; -------------------------------------------------------------------------------- ; @Title: MPSoC On-Chip Peripherals ; @Props: Released ; @Author: AMM, WYS, KKW, SEB, JRK ; @Manufacturer: XILINX - XILINX ; @Changelog: 2015-02-12 AMM ; 2016-03-23 KKW ; 2016-07-01 SEB ; 2016-08-08 JRK ; 2019-04-26 KMB ; @Doc: ug1087-zynq-ultrascale-registers.html and others html files (Rev. 1.1 2016-05-27) ; ug1085-zynq-ultrascale-trm.pdf Rev. 1.0 - 2015-11-24 ; @Core: CORTEX-A53, CORTEX-R5MPCORE ; @Chip: UltraScale+ MPSoC ; @Copyright: (C) 1989-2019 Lauterbach GmbH, licensed for use with TRACE32(R) only ; -------------------------------------------------------------------------------- ; $Id: permpsoc.per 10496 2019-04-26 09:30:21Z kwitkowski $ ; KNOWN PROBLEMS ; MODULE REGISTER DESCRIPTION ; APM IER, CR Missing selector for advanced and profile modes ; AXIPCIE SRC_Q_PTR_LO Queue location states description missing -> unspecified AXI/PCIe selector (implemented as AXI) ; AXIPCIE DST_Q_PTR_LO Queue location states description missing -> unspecified AXI/PCIe selector (implemented as AXI) ; AXIPCIE STAS_Q_PTR_LO Queue location states description missing -> unspecified AXI/PCIe selector (implemented as AXI) ; AXIPCIE RX_FIFO_MSG Unknown RX_FIFO_TYPE.INTR_TYPE bit values -> missing selector for "Received message" (implemented as "Received message") ; CAN TXFIFO_ID Frames selector in wgroup -> Bit check impossible (implemented as Extended) ; CAN TXHPB_ID Frames selector in wgroup -> Bit check impossible (implemented as Extended) ; CAN AFR Frames selector in wgroup -> Bit check impossible (implemented as Extended) ; ETM TRACEIDR Missing data trace disable/enable selector ; ETM ACATRN0..7 Missing IDR4.NUMCIDFC. If statement only for IDR4.NUMVMIDC ; I2C I2C_ADDRESS_REG0 Unknown selector for normal/extended addressing mode (implemented as extended) ; OCM CE_CNT Register unspecified in ug1085-zynq-ultrascale-trm.pdf ; OCM OCM_DBG_SYN_TOMEM Register unspecified in ug1085-zynq-ultrascale-trm.pdf ; OCM OCM_DBG_SYN_FROMEM Register unspecified in ug1085-zynq-ultrascale-trm.pdf config 16. 8. sif (CORENAME()=="CORTEXA53") tree "Core Registers (Cortex-A53)" AUTOINDENT.PUSH AUTOINDENT.ON center tree tree.open "AArch64" tree "ID Registers" rgroup.quad spr:0x30000++0x0 line.long 0x0 "MIDR_EL1,Main ID Register" hexmask.long.byte 0x0 24.--31. 0x1 "IMPL,Implementer code" bitfld.long 0x0 20.--23. "VAR,Variant" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 16.--19. "ARCH,Architecture" "Reserved,ARMv4,ARMv4T,ARMv5,ARMv5T,ARMv5TE,ARMv5TEJ,ARMv6,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,CPUID scheme" newline hexmask.long.word 0x0 4.--15. 0x1 "PART,Primary Part Number" bitfld.long 0x0 0.--3. "REV,Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" if (CORENAME()=="CORTEXA57") rgroup.quad spr:0x33001++0x0 line.long 0x0 "CTR_EL0,Cache Type Register" bitfld.long 0x0 24.--27. "CWG,Cache writeback granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." bitfld.long 0x0 20.--23. "ERG,Exclusives reservation granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." bitfld.long 0x0 16.--19. "DMINLINE,Smallest data cache line size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." newline bitfld.long 0x0 14.--15. "L1POLICY,L1 Instruction cache policy" "Reserved,Reserved,Reserved,PIPT" bitfld.long 0x0 0.--3. "IMINLINE,I-Cache Minimum Line Size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." elif (CORENAME()=="CORTEXA53") rgroup.quad spr:0x33001++0x0 line.long 0x0 "CTR_EL0,Cache Type Register" bitfld.long 0x0 24.--27. "CWG,Cache writeback granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." bitfld.long 0x0 20.--23. "ERG,Exclusives reservation granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." bitfld.long 0x0 16.--19. "DMINLINE,Smallest data cache line size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." newline bitfld.long 0x0 14.--15. "L1POLICY,L1 Instruction cache policy" "Reserved,Reserved,VIPT,?..." bitfld.long 0x0 0.--3. "IMINLINE,I-Cache Minimum Line Size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." endif if (CORENAME()=="CORTEXA57") rgroup.quad spr:0x30005++0x00 line.quad 0x0 "MPIDR_EL1,Multiprocessor Affinity Register" bitfld.quad 0x00 30. "U,Processor is part of a multiprocessor or uniprocessor system" "Multiprocessor,?..." bitfld.quad 0x00 24. "MT,Lowest level of affinity consist of logical processors" "Largely independent,?..." hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2. Second highest level affinity field" newline hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1. Third highest level affinity field" bitfld.quad 0x00 0.--1. "CPUID,CPU ID" "1,2,3,4" elif (CORENAME()=="CORTEXA53") rgroup.quad spr:0x30005++0x00 line.quad 0x0 "MPIDR_EL1,Multiprocessor Affinity Register" hexmask.quad.byte 0x00 32.--39. 1. "AFF2,Affinity level 3. Third highest level affinity field" newline bitfld.quad 0x00 30. "U,Processor is part of a multiprocessor or uniprocessor system" "Multiprocessor,?..." bitfld.quad 0x00 24. "MT,Lowest level of affinity consist of logical processors" "Largely independent,?..." hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2. Second highest level affinity field" newline hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1. Third highest level affinity field" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0. Lowest level affinity field" endif rgroup.quad SPR:0x30006++0x0 line.long 0x0 "REVIDR_EL1,Revision ID Register" rgroup.quad SPR:0x30014++0x00 line.long 0x00 "ID_MMFR0_EL1,Memory Model Feature Register 0" bitfld.long 0x00 28.--31. "IS,Indicates innermost shareability domain implemented" "Reserved,Implemented,?..." bitfld.long 0x00 24.--27. "FCSE,Fast Context Switch Memory Mappings Support" "Not supported,?..." bitfld.long 0x00 20.--23. "AR,Auxiliary Register Support" "Reserved,Supported,?..." newline bitfld.long 0x00 16.--19. "TCM,TCM and Associated DMA Support" "Not supported,?..." bitfld.long 0x00 12.--15. "SL,Shareability levels" "Reserved,Implemented 2 levels,?..." bitfld.long 0x00 8.--11. "OSS,Outer Shareable Support" "Reserved,Implemented,?..." newline bitfld.long 0x00 4.--7. "PMSA,Physical Memory System Architecture (PMSA) Support" "Not supported,?..." bitfld.long 0x00 0.--3. "VMSA,Virtual Memory System Architecture (VMSA) Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..." rgroup.quad SPR:0x30015++0x00 line.long 0x00 "ID_MMFR1_EL1,Memory Model Feature Register 1" bitfld.long 0x00 28.--31. "BTB,Branch Predictor" "Reserved,Reserved,Required,?..." bitfld.long 0x00 24.--27. "L1TCO,Test and Clean Operations on Data Cache/Harvard/Unified Architecture Support" "Not supported,?..." bitfld.long 0x00 20.--23. "L1UCMO,L1 Cache/All Maintenance Operations/Unified Architecture Support" "Not supported,?..." newline bitfld.long 0x00 16.--19. "L1HCMO,L1 Cache/All Maintenance Operations/Harvard Architecture Support" "Not supported,?..." bitfld.long 0x00 12.--15. "L1UCLMOSW,L1 Cache Line Maintenance Operations by Set and Way/Unified Architecture Support" "Not supported,?..." bitfld.long 0x00 8.--11. "L1HCLMOSW,L1 Cache Line Maintenance Operations by Set and Way/Harvard Architecture Support" "Not supported,?..." newline bitfld.long 0x00 4.--7. "L1UCLMOMVA,L1 Cache Line Maintenance Operations by VA/Unified Architecture Support" "Not supported,?..." bitfld.long 0x00 0.--3. "L1HCLMOMVA,L1 Cache Line Maintenance Operations by VA/Harvard Architecture" "Not supported,?..." rgroup.quad SPR:0x30016++0x00 line.long 0x00 "ID_MMFR2_EL1,Memory Model Feature Register 2" bitfld.long 0x00 28.--31. "HAF,Hardware Access Flag Support" "Not supported,?..." bitfld.long 0x00 24.--27. "WFI,Wait for Interrupt Stalling Support" "Reserved,Supported,?..." bitfld.long 0x00 20.--23. "MBF,Memory Barrier Operations Support" "Reserved,Reserved,Supported,?..." newline bitfld.long 0x00 16.--19. "UTLBMO,TLB Maintenance Operations/Unified Architecture Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 12.--15. "HTLBMO,TLB Maintenance Operations/Harvard Architecture Support" "Not supported,?..." bitfld.long 0x00 8.--11. "HL1CMRO,Cache Maintenance Range Operations/Harvard Architecture Support" "Not supported,?..." newline bitfld.long 0x00 4.--7. "HL1BPCRO,Background Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,?..." bitfld.long 0x00 0.--3. "HL1FPCRO,Foreground Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,?..." rgroup.quad SPR:0x30017++0x00 line.long 0x00 "ID_MMFR3_EL1,Memory Model Feature Register 3" bitfld.long 0x00 28.--31. "SS,Supersection support" "Supported,?..." bitfld.long 0x00 24.--27. "CMEMSZ,Cache memory size" "Reserved,Reserved,1TByte,?..." bitfld.long 0x00 20.--23. "CW,Coherent walk" "Reserved,Supported,Reserved,?..." newline bitfld.long 0x00 12.--15. "MB,Maintenance broadcast Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 8.--11. "BPM,Invalidate Branch predictor Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 4.--7. "HCMOSW,Invalidate Cache by Set and Way/Clean by Set and Way/Invalidate and Clean by Set and Way Support" "Reserved,Supported,?..." newline bitfld.long 0x00 0.--3. "HCMOMVA,Invalidate Cache MVA Support" "Reserved,Supported,?..." rgroup.quad spr:0x30026++0x00 line.long 0x00 "ID_MMFR4_EL1,Memory Model Feature Register 4" bitfld.long 0x00 4.--7. "AC2,Extension of ACTLR and HACTLR by ACTLR2 and HACTLR2" "Not implemented,Implemented,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved" if (CORENAME()=="CORTEXA53") rgroup.quad spr:0x30070++0x00 line.quad 0x00 "ID_AA64MMFR0_EL1,AArch64 Memory Model Feature Register 0" bitfld.quad 0x00 28.--31. "4KB,4KB granule supported" "Supported,?..." bitfld.quad 0x00 24.--27. "64KB,64KB granule supported" "Supported,?..." bitfld.quad 0x00 20.--23. "16KB,16KB granule supported" "Not supported,?..." newline bitfld.quad 0x00 12.--15. "SNSMEM,Secure versus Non-secure Memory distinction" "Reserved,Supported,?..." bitfld.quad 0x00 8.--11. "BIGEND,Mixed-endian configuration support" "Reserved,Supported,?..." bitfld.quad 0x00 4.--7. "ASIDBITS,Number of ASID bits" "Reserved,Reserved,16 bits,?..." newline bitfld.quad 0x00 0.--3. "PARANGE,Physical address range supported" "Reserved,Reserved,Reserved,Reserved,44 bits/16 TB,?..." elif (CORENAME()=="CORTEXA53") rgroup.quad spr:0x30070++0x00 line.quad 0x00 "ID_AA64MMFR0_EL1,AArch64 Memory Model Feature Register 0" bitfld.quad 0x00 28.--31. "4KB,4KB granule supported" "Supported,?..." bitfld.quad 0x00 24.--27. "64KB,64KB granule supported" "Supported,?..." bitfld.quad 0x00 20.--23. "16KB,16KB granule supported" "Not supported,?..." newline bitfld.quad 0x00 12.--15. "SNSMEM,Secure versus Non-secure Memory distinction" "Reserved,Supported,?..." bitfld.quad 0x00 8.--11. "BIGEND,Mixed-endian configuration support" "Reserved,Supported,?..." bitfld.quad 0x00 4.--7. "ASIDBITS,Number of ASID bits" "Reserved,Reserved,16 bits,?..." newline bitfld.quad 0x00 0.--3. "PARANGE,Physical address range supported" "Reserved,Reserved,40 bits/1 TB,?..." endif if (CORENAME()=="CORTEXA53") rgroup.quad spr:0x30071++0x00 line.quad 0x00 "ID_AA64MMFR1_EL1,AArch64 Memory Model Feature Register 1" endif rgroup.quad SPR:0x30020++0x00 line.long 0x00 "ID_ISAR0_EL1,Instruction Set Attribute Register 0" bitfld.long 0x00 24.--27. "DIVI,Divide Instructions Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 20.--23. "DEBI,Debug Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 16.--19. "CI,Coprocessor Instructions Support" "Not supported,?..." newline bitfld.long 0x00 12.--15. "CBI,Combined Compare and Branch Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 8.--11. "BI,Bitfield Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 4.--7. "BCI,Bit Counting Instructions Support" "Reserved,Supported,?..." newline bitfld.long 0x00 0.--3. "SI,Swap Instructions Support" "Not supported,?..." rgroup.quad SPR:0x30021++0x00 line.long 0x00 "ID_ISAR1_EL1,Instruction Set Attribute Register 1" bitfld.long 0x00 28.--31. "JI,Jazelle Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 24.--27. "INTI,Interwork Instructions Support" "Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 20.--23. "IMMI,Immediate Instructions Support" "Reserved,Supported,?..." newline bitfld.long 0x00 16.--19. "ITEI,If Then Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 12.--15. "EXTI,Extend Instructions Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 8.--11. "EARI,Exception A and R Instructions Support" "Reserved,Supported,?..." newline bitfld.long 0x00 4.--7. "EXIN,Exception in ARM Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 0.--3. "ENDI,Endian Instructions Support" "Reserved,Supported,?..." rgroup.quad SPR:0x30022++0x00 line.long 0x00 "ID_ISAR2_EL1,Instruction Set Attribute Register 2" bitfld.long 0x00 28.--31. "RI,Reversal Instructions Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 24.--27. "PSRI,PSR Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 20.--23. "UMI,Advanced Unsigned Multiply Instructions Support" "Reserved,Reserved,Supported,?..." newline bitfld.long 0x00 16.--19. "SMI,Advanced Signed Multiply Instructions Support" "Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 12.--15. "MI,Multiply Instructions Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 8.--11. "II,Multi-Access Interruptible Instructions Support" "Not supported,?..." newline bitfld.long 0x00 4.--7. "MHI,Memory Hint Instructions Support" "Reserved,Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 0.--3. "LSI,Load and Store Instructions Support" "Reserved,Reserved,Supported,?..." rgroup.quad SPR:0x30023++0x00 line.long 0x00 "ID_ISAR3_EL1,Instruction Set Attribute Register 3" bitfld.long 0x00 28.--31. "TEEEI,Thumb-EE Extensions Support" "Not supported,?..." bitfld.long 0x00 24.--27. "NOPI,True NOP Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 20.--23. "TCI,Thumb Copy Instructions Support" "Reserved,Supported,?..." newline bitfld.long 0x00 16.--19. "TBI,Table Branch Instructions Support" "Reserved,Supported,Reserved,?..." bitfld.long 0x00 12.--15. "SPI,Synchronization Primitive Instructions Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 8.--11. "SVCI,SVC Instructions Support" "Reserved,Supported,?..." newline bitfld.long 0x00 4.--7. "SIMDI,Single Instruction Multiple Data (SIMD) Instructions Support" "Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 0.--3. "SI,Saturate Instructions Support" "Reserved,Supported,?..." rgroup.quad SPR:0x30024++0x00 line.long 0x00 "ID_ISAR4_EL1,Instruction Set Attribute Register 4" bitfld.long 0x00 28.--31. "SWP_FRAC,Memory System Locking Support" "Not supported,?..." bitfld.long 0x00 24.--27. "PSR_M_I,PSR_M Instructions Support" "Not supported,?..." bitfld.long 0x00 20.--23. "SPRI,Synchronization Primitive instructions" "Supported,?..." newline bitfld.long 0x00 16.--19. "BI,Barrier Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 12.--15. "SMCI,SMC Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 8.--11. "WBI,Write-Back Instructions Support" "Reserved,Supported,?..." newline bitfld.long 0x00 4.--7. "WSI,With-Shift Instructions Support" "Reserved,Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 0.--3. "UI,Unprivileged Instructions Support" "Reserved,Reserved,Supported,?..." rgroup.quad SPR:0x30025++0x00 line.long 0x00 "ID_ISAR5_EL1,Instruction Set Attribute Register 5" bitfld.long 0x00 16.--19. "CRC32,CRC32 Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 12.--15. "SHA2,SHA2 Instructions Support" "Not supported,Supported,?..." bitfld.long 0x00 8.--11. "SHA1,SHA1 Instructions Support" "Not supported,Supported,?..." newline bitfld.long 0x00 4.--7. "AES,AES Instructions Support" "Not supported,Reserved,Supported,?..." bitfld.long 0x00 0.--3. "SEVL,SEVL Instructions Support" "Reserved,Supported,?..." rgroup.quad spr:0x30060++0x00 line.quad 0x00 "ID_AA64ISAR0_EL1,AArch64 Instruction Set Attribute Register 0" bitfld.quad 0x00 16.--19. "CRC32,CRC32" "Reserved,Implemented,?..." bitfld.quad 0x00 12.--15. "SHA2,SHA2 instructions are implemented" "Not implemented,Implemented,?..." bitfld.quad 0x00 8.--11. "SHA1,SHA1 instructions are implemented" "Not implemented,Implemented,?..." newline bitfld.quad 0x00 4.--7. "AES,AES instructions are implemented" "Not implemented,Reserved,Implemented,?..." if (CORENAME()=="CORTEXA53") rgroup.quad spr:0x30061++0x00 line.quad 0x00 "ID_AA64ISAR1_EL1,AArch64 Instruction Set Attribute Register 1" endif rgroup.quad SPR:0x30010++0x00 line.long 0x00 "ID_PFR0_EL1,Processor Feature Register 0" bitfld.long 0x00 12.--15. "STATE3,Thumb Execution Environment (Thumb-EE) Support" "Not supported,?..." bitfld.long 0x00 8.--11. "STATE2,Support for Jazelle extension" "Reserved,Supported,?..." bitfld.long 0x00 4.--7. "STATE1,Thumb Encoding Supported by the Processor Type" "Reserved,Reserved,Reserved,Supported,?..." newline bitfld.long 0x00 0.--3. "STATE0,ARM Instruction Set Support" "Reserved,Supported,?..." rgroup.quad SPR:0x30011++0x00 line.long 0x00 "ID_PFR1_EL1,Processor Feature Register 1" bitfld.long 0x00 28.--31. "GIC_CPU,GIC CPU Support" "Disabled,Enabled,?..." bitfld.long 0x00 16.--19. "GT,Generic Timer Support" "Reserved,Supported,?..." bitfld.long 0x00 12.--15. "VE,Virtualization Extensions Support" "Reserved,Supported,?..." newline bitfld.long 0x00 8.--11. "MPM,Microcontroller Programmer's Model Support" "Not supported,?..." bitfld.long 0x00 4.--7. "SE,Security Extensions Architecture v1 Support" "Reserved,Supported,?..." bitfld.long 0x00 0.--3. "PM,Standard ARMv4 Programmer's Model Support" "Reserved,Supported,?..." if (CORENAME()=="CORTEXA57") rgroup.quad spr:0x30040++0x00 line.quad 0x00 "ID_AA64PFR0_EL1,AArch64 Processor Feature Register 0" bitfld.quad 0x00 24.--27. "GIC,GIC CPU interface" "Disabled,Enabled,?..." bitfld.quad 0x00 20.--23. "ADVSIMD,Advanced SIMD" "Implemented,?..." bitfld.quad 0x00 16.--19. "FP,Floating-point" "Implemented,?..." newline bitfld.quad 0x00 12.--15. "EL3H,EL3 exception handling" "Reserved,Reserved,AArch64/AArch32,?..." bitfld.quad 0x00 8.--11. "EL2H,EL2 exception handling" "Reserved,Reserved,AArch64/AArch32,?..." bitfld.quad 0x00 4.--7. "EL1H,EL1 exception handling" "Reserved,Reserved,AArch64/AArch32,?..." newline bitfld.quad 0x00 0.--3. "EL0H,EL0 exception handling" "Reserved,Reserved,AArch64/AArch32,?..." elif (CORENAME()=="CORTEXA53") rgroup.quad spr:0x30040++0x00 line.quad 0x00 "ID_AA64PFR0_EL1,AArch64 Processor Feature Register 0" bitfld.quad 0x00 24.--27. "GIC,GIC CPU interface" "Disabled,Enabled,?..." bitfld.quad 0x00 20.--23. "ADVSIMD,Advanced SIMD" "Implemented,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Not implemented" bitfld.quad 0x00 16.--19. "FP,Floating-point" "Implemented,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Not implemented" newline bitfld.quad 0x00 12.--15. "EL3H,EL3 exception handling" "Reserved,Reserved,AArch64/AArch32,?..." bitfld.quad 0x00 8.--11. "EL2H,EL2 exception handling" "Reserved,Reserved,AArch64/AArch32,?..." bitfld.quad 0x00 4.--7. "EL1H,EL1 exception handling" "Reserved,Reserved,AArch64/AArch32,?..." newline bitfld.quad 0x00 0.--3. "EL0H,EL0 exception handling" "Reserved,Reserved,AArch64/AArch32,?..." endif if (CORENAME()=="CORTEXA53") rgroup.quad spr:0x30041++0x00 line.quad 0x00 "ID_AA64PFR1_EL1,AArch64 Processor Feature Register 1" endif if (CORENAME()=="CORTEXA57") rgroup.quad SPR:0x30012++0x00 line.long 0x00 "ID_DFR0_EL1,Debug Feature Register 0" bitfld.long 0x00 24.--27. "PMM,Performance Monitor Model Support" "Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 20.--23. "MDM_MM,Memory-mapped Debug Model for M profile processors Support" "Not supported,?..." bitfld.long 0x00 16.--19. "TM_MM,Trace Model (Memory-Mapped) Support" "Reserved,Supported,?..." newline bitfld.long 0x00 12.--15. "CTM_CB,Coprocessor-Based Trace Debug Model Support" "Not supported,?..." bitfld.long 0x00 8.--11. "CDM_MM,Memory-Mapped Debug Model Support" "Not supported,?..." bitfld.long 0x00 4.--7. "SDM_CB,Secure Debug Model (Coprocessor) Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..." newline bitfld.long 0x00 0.--3. "CDM_CB,Coprocessor Debug Model Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..." elif (CORENAME()=="CORTEXA53") rgroup.quad SPR:0x30012++0x00 line.long 0x00 "ID_DFR0_EL1,Debug Feature Register 0" bitfld.long 0x00 24.--27. "PMM,Performance Monitor Model Support" "Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 20.--23. "MDM_MM,Memory-mapped Debug Model for M profile processors Support" "Not supported,?..." bitfld.long 0x00 16.--19. "TM_MM,Trace Model (Memory-Mapped) Support" "Reserved,Supported,?..." newline bitfld.long 0x00 12.--15. "CTM_CB,Coprocessor-Based Trace Debug Model Support" "Not supported,?..." bitfld.long 0x00 4.--7. "SDM_CB,Secure Debug Model (Coprocessor) Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 0.--3. "CDM_CB,Coprocessor Debug Model Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..." endif rgroup.quad spr:0x30050++0x00 line.quad 0x00 "ID_AA64DFR0_EL1,AArch64 Debug Feature Register 0" bitfld.quad 0x00 28.--31. "CTX_CMPS,Number of breakpoints that are context-aware minus 1" "Reserved,2,?..." bitfld.quad 0x00 20.--23. "WRPS,The number of watchpoints minus 1" "Reserved,Reserved,Reserved,4,?..." bitfld.quad 0x00 12.--15. "BRPS,The number of breakpoints minus 1" "Reserved,Reserved,Reserved,Reserved,Reserved,6,?..." newline bitfld.quad 0x00 8.--11. "PMUVER,Performance Monitors extension version" "Reserved,Implemented,?..." bitfld.quad 0x00 4.--7. "TRACEVER,Trace extension" "Not implemented,?..." bitfld.quad 0x00 0.--3. "DEBUGGER,Debug architecture version" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Implemented,?..." if (CORENAME()=="CORTEXA53") rgroup.quad spr:0x30051++0x00 line.quad 0x00 "ID_AA64DFR1_EL1,AArch64 Debug Feature Register 1" rgroup.quad spr:0x30054++0x00 line.quad 0x00 "ID_AA64AFR0_EL1,AArch64 Auxiliary Feature Register 0" rgroup.quad spr:0x30055++0x00 line.quad 0x00 "ID_AA64AFR1_EL1,AArch64 Auxiliary Feature Register 1" endif rgroup.quad SPR:0x30013++0x00 line.long 0x00 "ID_AFR0_EL1,Auxiliary Feature Register 0" rgroup.quad SPR:0x31007++0x00 line.long 0x00 "AIDR_EL1,Auxiliary ID Register" rgroup.quad SPR:0x33007++0x00 line.long 0x00 "DCZID_EL0,Data Cache Zero ID" bitfld.long 0x00 4. "DZP,Prohibit the DC ZVA instruction" "Not prohibited,Prohibited" bitfld.long 0x00 0.--3. "BS,Block Size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." tree.end tree "System Control and Configuration" group.quad spr:0x36111++0x00 line.quad 0x00 "SDER32_EL3,Secure Debug Enable Register" bitfld.quad 0x00 1. "SUNIDEN,Enable non-invasive debug features in Secure User mode" "Disabled,Enabled" bitfld.quad 0x00 0. "SUIDEN,Enable debug exceptions in Secure User mode" "Disabled,Enabled" group.quad SPR:0x30100++0x0 line.long 0x00 "SCTLR_EL1,System Control Register (EL1)" bitfld.long 0x0 26. "UCI,EL0 access enable (DC CVAU|DC CIVAC|DC CVAC|IC IVAU)" "Disabled,Enabled" bitfld.long 0x0 25. "EE,Exception endianness" "Little,Big" newline bitfld.long 0x0 24. "E0E,Endianness of explicit data access at EL0" "Little,Big" bitfld.long 0x0 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced" newline bitfld.long 0x0 18. "NTWE,Not trap WFE" "No,Yes" bitfld.long 0x0 16. "NTWI,Not trap WFI" "No,Yes" newline bitfld.long 0x0 15. "UCT,EL0 access enable (CTR_EL0)" "Disabled,Enabled" bitfld.long 0x0 14. "DZE,EL0 access enable (DC ZVA)" "Disabled,Enabled" newline bitfld.long 0x0 12. "I,Instruction Cache Enable" "Disabled,Enabled" bitfld.long 0x0 9. "UMA,User Mask Access" "Disabled,Enabled" newline bitfld.long 0x0 8. "SED,SETEND Disable" "No,Yes" bitfld.long 0x0 7. "ITD,IT instruction disable" "No,Yes" newline bitfld.long 0x00 6. "THEE,Thumb EE enable" "Disabled,Enabled" bitfld.long 0x0 5. "CP15BEN,c15 barrier enable" "Disabled,Enabled" newline bitfld.long 0x0 4. "SA0,EL0 stack alignment check enable" "Disabled,Enabled" bitfld.long 0x0 3. "SA,SP stack alignment check enable" "Disabled,Enabled" newline bitfld.long 0x0 2. "C,Enable unified cache or data cache" "Disabled,Enabled" bitfld.long 0x0 1. "A,Strict Alignment" "Disabled,Enabled" newline bitfld.long 0x0 0. "M,MMU or Protection Unit" "Disabled,Enabled" group.quad SPR:0x34100++0x0 line.long 0x00 "SCTLR_EL2,System Control Register (EL2)" bitfld.long 0x0 25. "EE,Exception endianness" "Little,Big" bitfld.long 0x0 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced" newline bitfld.long 0x0 12. "I,Instruction Cache Enable" "Disabled,Enabled" bitfld.long 0x0 3. "SA,SP stack alignment check enable" "Disabled,Enabled" newline bitfld.long 0x0 2. "C,Enable unified cache or data cache" "Disabled,Enabled" bitfld.long 0x0 1. "A,Strict Alignment" "Disabled,Enabled" newline bitfld.long 0x0 0. "M,MMU or Protection Unit" "Disabled,Enabled" group.quad SPR:0x36100++0x0 line.long 0x00 "SCTLR_EL3,System Control Register (EL3)" bitfld.long 0x0 25. "EE,Exception endianness" "Little,Big" bitfld.long 0x0 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced" newline bitfld.long 0x0 12. "I,Instruction Cache Enable" "Disabled,Enabled" bitfld.long 0x0 3. "SA,SP stack alignment check enable" "Disabled,Enabled" newline bitfld.long 0x0 2. "C,Enable unified cache or data cache" "Disabled,Enabled" bitfld.long 0x0 1. "A,Strict Alignment" "Disabled,Enabled" newline bitfld.long 0x0 0. "M,MMU or Protection Unit" "Disabled,Enabled" rgroup.quad SPR:0x30101++0x0 line.long 0x00 "ACTLR_EL1,Auxiliary Control Register (EL1)" group.quad SPR:0x34101++0x0 line.long 0x00 "ACTLR_EL2,Auxiliary Control Register (EL2)" bitfld.long 0x00 6. "L2ACTLRAC,L2ACTLR write access control" "Disabled,Enabled" bitfld.long 0x00 5. "L2ECTLRAC,L2ECTLR write access control" "Disabled,Enabled" newline bitfld.long 0x00 4. "L2CTLRAC,L2CTLR write access control" "Disabled,Enabled" bitfld.long 0x00 1. "CPUECTLRAC,CPUECTLR write access control" "Disabled,Enabled" newline bitfld.long 0x00 0. "CPUACTLRAC,CPUACTLR write access control" "Disabled,Enabled" group.quad SPR:0x36101++0x0 line.long 0x00 "ACTLR_EL3,Auxiliary Control Register (EL3)" bitfld.long 0x00 6. "L2ACTLRAC,L2ACTLR write access control" "Disabled,Enabled" bitfld.long 0x00 5. "L2ECTLRAC,L2ECTLR write access control" "Disabled,Enabled" newline bitfld.long 0x00 4. "L2CTLRAC,L2CTLR write access control" "Disabled,Enabled" bitfld.long 0x00 1. "CPUECTLRAC,CPUECTLR write access control" "Disabled,Enabled" newline bitfld.long 0x00 0. "CPUACTLRAC,CPUACTLR write access control" "Disabled,Enabled" group.quad SPR:0x30102++0x00 line.long 0x00 "CPACR_EL1,Architectural Feature Access Control Register" bitfld.long 0x00 28. "TTA,Causes access to the Trace functionality to trap to EL1 when executed from EL0 or EL1" "Disabled,?..." bitfld.long 0x00 20.--21. "FPEN,Traps instructions that access registers associated with Advanced SIMD and Floating-point execution to trap to EL1 when executed from EL0 or EL1" "Trap all,Trap El0,Trap all,Not trapped" group.quad SPR:0x36110++0x0 line.long 0x0 "SCR_EL3,Secure Configuration Register" bitfld.long 0x00 13. "TWE,Trap WFE Instructions" "Not trapped,Trapped" bitfld.long 0x00 12. "TWI,Trap WFI Instructions" "Not trapped,Trapped" newline bitfld.long 0x00 11. "ST,Enable secure EL1 access" "Disabled,Enabled" bitfld.long 0x00 10. "RW,Register width control for lower exception levels" "AArch32,AArch64" newline bitfld.long 0x00 9. "SIF,Secure Instruction Fetch" "Permitted,Not permitted" bitfld.long 0x00 8. "HCE,Hypervisor Call enable" "No,Yes" newline bitfld.long 0x00 7. "SMD,Secure Monitor Call disable" "No,Yes" bitfld.long 0x00 3. "EA,External Abort exceptions handled in Abort mode or Monitor mode" "Abort,Monitor" newline bitfld.long 0x00 2. "FIQ,FIQ exceptions handled in Abort mode or Monitor mode" "FIQ,Monitor" bitfld.long 0x00 1. "IRQ,IRQ exceptions handled in Abort mode or Monitor mode" "IRQ,Monitor" newline bitfld.long 0x00 0. "NS,Secure mode" "Secure,Non-secure" group.quad spr:0x34110++0x00 line.quad 0x00 "HCR_EL2,Hypervisor Configuration Register" bitfld.quad 0x00 33. "ID,Stage 2 Instruction cache disable" "No,Yes" bitfld.quad 0x00 32. "CD,Stage 2 Data cache disable" "No,Yes" newline bitfld.quad 0x00 31. "RW,Register width control for lower exception levels" "AArch32,EL1 is 64-bit" bitfld.quad 0x00 30. "TRVM,Trap Read of Virtual Memory controls" "Disabled,Enabled" newline bitfld.quad 0x00 29. "HCD,Hypervisor Call Disable" "No,Yes" bitfld.quad 0x00 28. "TDZ,Trap DC ZVA instruction" "Disabled,Enabled" newline bitfld.quad 0x00 27. "TGE,Trap General Exceptions has an enhanced role when EL2 is using AArch64" "Disabled,Enabled" bitfld.quad 0x00 26. "TVM,Trap Virtual Memory controls to EL2" "Disabled,Enabled" newline bitfld.quad 0x00 25. "TTLB,Trap TLB maintenance instructions to EL2" "Disabled,Enabled" bitfld.quad 0x00 24. "TPU,Trap Cache maintenance instructions to Point of Unificiation to EL2" "Disabled,Enabled" newline bitfld.quad 0x00 23. "TPC,Trap Data/Unified Cache maintenance instructions to Point of Coherency tp EL2" "Disabled,Enabled" bitfld.quad 0x00 22. "TSW,Trap Data/Unified Cache maintenance instructions by Set/Way to EL2" "Disabled,Enabled" newline bitfld.quad 0x00 21. "TACR,Trap Auxiliary Control Register" "Disabled,Enabled" bitfld.quad 0x00 20. "TIDCP,Trap Implementation Dependent functionality" "Disabled,Enabled" newline bitfld.quad 0x00 19. "TSC,Trap SMC" "Disabled,Enabled" bitfld.quad 0x00 18. "TID3,Trap ID Group 3" "Disabled,Enabled" newline bitfld.quad 0x00 17. "TID2,Trap ID Group 2" "Disabled,Enabled" bitfld.quad 0x00 16. "TID1,Trap ID Group 1" "Disabled,Enabled" newline bitfld.quad 0x00 15. "TID0,Trap ID Group 0" "Disabled,Enabled" bitfld.quad 0x00 14. "TWE,Trap WFE" "Disabled,Enabled" newline bitfld.quad 0x00 13. "TWI,Trap WFI" "Disabled,Enabled" bitfld.quad 0x00 12. "DC,Default Cacheable" "Disabled,Enabled" newline bitfld.quad 0x00 10.--11. "BSU,Barrier Shareability upgrade. determines the minimum shareability domain that is applied to any barrier executed from EL1 or EL0" "No effect,Inner Shareable,Outer Shareable,Full System" bitfld.quad 0x00 9. "FB,Force broadcast" "Not forced,Forced" newline bitfld.quad 0x00 8. "VSE,Virtual System Error/Asynchronous Abort:" "No pending,Pending" bitfld.quad 0x00 7. "VI,Virtual IRQ Interrupt" "Not pending,Pending" newline bitfld.quad 0x00 6. "VF,Virtual FIQ Interrupt" "Not pending,Pending" bitfld.quad 0x00 5. "AMO,asynchronous abort and error interrupt routing" "Disabled,Enabled" newline bitfld.quad 0x00 4. "IMO,Physical IRQ Routing" "Disabled,Enabled" bitfld.quad 0x00 3. "FMO,Physical FIQ Routing" "Disabled,Enabled" newline bitfld.quad 0x00 2. "PTW,Protected Table Walk" "Disabled,Enabled" bitfld.quad 0x00 1. "SWIO,Set/Way Invalidation Override" "Disabled,Enabled" newline bitfld.quad 0x00 0. "VM,Second stage of Translation enable" "Disabled,Enabled" group.quad spr:0x30510++0x00 line.quad 0x00 "AFSR0_EL1,Auxiliary Fault Status Register 0 (EL1)" group.quad spr:0x30511++0x00 line.quad 0x00 "AFSR1_EL1,Auxiliary Fault Status Register 1 (EL1)" group.quad spr:0x34510++0x00 line.quad 0x00 "AFSR0_EL2,Auxiliary Fault Status Register 0 (EL2)" group.quad spr:0x34511++0x00 line.quad 0x00 "AFSR1_EL2,Auxiliary Fault Status Register 1 (EL2)" group.quad spr:0x36510++0x00 line.quad 0x00 "AFSR0_EL3,Auxiliary Fault Status Register 0 (EL3)" group.quad spr:0x36511++0x00 line.quad 0x00 "AFSR1_EL3,Auxiliary Fault Status Register 1 (EL3)" tree.open "Exception Syndrome Registers" if (CORENAME()=="CORTEXA57") if (((d.l(spr:0x30520))&0xFC000000)==(0x00000000||0x38000000||0x88000000||0x98000000)) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" elif (((d.l(spr:0x30520))&0xFC000000)==0x04000000) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline bitfld.long 0x00 0. "TI,Trapped instruction" "WFI,WFE" elif (((d.l(spr:0x30520))&0xFC000000)==(0x0C000000||0x14000000)) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline bitfld.long 0x00 17.--19. "Opc2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14.--16. "Opc1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 10.--13. "CRn,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" elif (((d.l(spr:0x30520))&0xFC000000)==(0x10000000||0x30000000)) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline bitfld.long 0x00 16.--19. "Opc1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 10.--14. "Rt2,Rt2 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" elif (((d.l(spr:0x30520))&0xFC000000)==0x18000000) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline hexmask.long.byte 0x00 12.--19. 1 "IMM8,The immediate value from the issued instruction" bitfld.long 0x00 5.--9. "Rn,Rn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 4. "OFFSET,Indicates whether the offset is added or subtracted" "Subtracted,Added" bitfld.long 0x00 1.--3. "AM,Addressing mode" "Immediate unindexed,Immediate post-indexed,Immediate offset,Immediate pre-indexed,Literal unindexed,Reserved,Literal offset,Reserved" newline bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" elif (((d.l(spr:0x30520))&0xFC000000)==0x1C000000) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" elif (((d.l(spr:0x30520))&0xFC000000)==(0x44000000||0x54000000)) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline hexmask.long.word 0x00 0.--15. "IMM16,The value of the immediate field from the HVC or SVC instruction" elif (((d.l(spr:0x30520))&0xFC000000)==0x60000000) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline bitfld.long 0x00 20.--21. "Op0,Op0 value from the issued instruction" "0,1,2,3" bitfld.long 0x00 17.--19. "Op2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 14.--16. "Op1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7" bitfld.long 0x00 10.--13. "CRn,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" elif (((d.l(spr:0x30520))&0xFC000000)==(0x80000000||0x84000000)) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 9. "EA,External abort type" "DECERR,SLVERR" bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2" newline bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "Address size/TTBR[0/1],Reserved,Reserved,Reserved,Reserved,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort,Reserved,Reserved,Reserved,Reserved,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity,Reserved,Reserved,Reserved,Reserved,Sync. parity/1st level,Sync. parity/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Debug,?..." elif (((d.l(spr:0x30520))&0xFD000000)==(0x91000000||0x95000000)) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid" bitfld.long 0x00 22.--23. "SAS,Syndrome Access Size" "Byte,Halfword,Word,Doubleword" newline bitfld.long 0x00 21. "SSE,Syndrome Sign Extend" "Not required,Required" bitfld.long 0x00 16.--20. "SRT,Syndrome Register transfer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 15. "SF,Width of the register accessed by the instruction is Sixty-Four" "32-bit,64-bit" bitfld.long 0x00 14. "AR,Acquire/Release" "No,Yes" newline bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes" bitfld.long 0x00 9. "EA,External abort type" "Not external,External" newline bitfld.long 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes" bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2" newline bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write" bitfld.long 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,Reserved" elif (((d.l(spr:0x30520))&0xFD000000)==(0x90000000||0x94000000)) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes" bitfld.long 0x00 9. "EA,External abort type" "Not external,External" newline bitfld.long 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes" bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2" newline bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write" bitfld.long 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,Reserved" elif (((d.l(spr:0x30520))&0xFC800000)==(0xA0800000||0xB0800000)) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid" bitfld.long 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 7. "IDF,Input Denormal floating-point exception trapped" "Not occurred,Occurred" bitfld.long 0x00 4. "IXF,Inexact floating-point exception trapped" "Not occurred,Occurred" newline bitfld.long 0x00 3. "UFF,Underflow floating-point exception trapped" "Not occurred,Occurred" bitfld.long 0x00 2. "OFF,Overflow floating-point exception trapped" "Not occurred,Occurred" newline bitfld.long 0x00 1. "DZF,Divide-by-zero floating-point exception trapped" "Not occurred,Occurred" bitfld.long 0x00 0. "IOF,Invalid Operation floating-point exception trapped" "Not occurred,Occurred" elif (((d.l(spr:0x30520))&0xFC800000)==(0xA0000000||0xB0000000)) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid" bitfld.long 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7" elif (((d.l(spr:0x30520))&0xFD000000)==0xBD000000) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid" hexmask.long.tbyte 0x00 0.--23. 1 "IS,Additional information about the SError interrupt" elif (((d.l(spr:0x30520))&0xFD000000)==0xBC000000) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid" elif (((d.l(spr:0x30520))&0xFC000000)==(0xC0000000||0xC4000000)) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "0,1,2,3,%d..." elif (((d.l(spr:0x30520))&0xFC000000)==(0xC8000000||0xCC000000)) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "ISV,EX bit valid" "Not valid,Valid" bitfld.long 0x00 6. "EX,Exclusive operation" "No,Yes" newline bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "0,1,2,3,%d..." elif (((d.l(spr:0x30520))&0xFC000000)==(0xD0000000||0xD4000000)) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 8. "CM,Data came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes" bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write" newline bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "0,1,2,3,%d..." elif (((d.l(spr:0x30520))&0xFC000000)==(0xE0000000||0xF0000000)) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline hexmask.long.word 0x00 0.--15. 1 "COMMENT,Set to the instruction comment field value" else group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" endif if (((d.l(spr:0x34520))&0xFC000000)==(0x00000000||0x38000000||0x88000000||0x98000000||0x4C000000)) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" elif (((d.l(spr:0x34520))&0xFC000000)==0x04000000) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline bitfld.long 0x00 0. "TI,Trapped instruction" "WFI,WFE" elif (((d.l(spr:0x34520))&0xFC000000)==(0x0C000000||0x14000000||0x20000000)) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline bitfld.long 0x00 17.--19. "Opc2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14.--16. "Opc1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 10.--13. "CRn,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" elif (((d.l(spr:0x34520))&0xFC000000)==(0x10000000||0x30000000)) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline bitfld.long 0x00 16.--19. "Opc1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 10.--14. "Rt2,Rt2 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" elif (((d.l(spr:0x34520))&0xFC000000)==0x18000000) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline hexmask.long.byte 0x00 12.--19. 1 "IMM8,The immediate value from the issued instruction" bitfld.long 0x00 5.--9. "Rn,Rn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 4. "OFFSET,Indicates whether the offset is added or subtracted" "Subtracted,Added" bitfld.long 0x00 1.--3. "AM,Addressing mode" "Immediate unindexed,Immediate post-indexed,Immediate offset,Immediate pre-indexed,Literal unindexed,Reserved,Literal offset,Reserved" newline bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" elif (((d.l(spr:0x34520))&0xFC000000)==0x1C000000) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" elif (((d.l(spr:0x34520))&0xFC000000)==(0x44000000||0x48000000||0x54000000||0x58000000)) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline hexmask.long.word 0x00 0.--15. "IMM16,The value of the immediate field from the HVC or SVC instruction" elif (((d.l(spr:0x34520))&0xFC000000)==0x5C000000) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline hexmask.long.word 0x00 0.--15. "IMM16,The value of the immediate field from the issued SMC instruction" elif (((d.l(spr:0x34520))&0xFC000000)==0x60000000) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline bitfld.long 0x00 20.--21. "Op0,Op0 value from the issued instruction" "0,1,2,3" bitfld.long 0x00 17.--19. "Op2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 14.--16. "Op1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7" bitfld.long 0x00 10.--13. "CRn,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" elif (((d.l(spr:0x34520))&0xFC000000)==(0x80000000||0x84000000)) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 9. "EA,External abort type" "DECERR,SLVERR" bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2" newline bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,?..." elif (((d.l(spr:0x34520))&0xFD000000)==(0x91000000||0x95000000)) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid" bitfld.long 0x00 22.--23. "SAS,Syndrome Access Size" "Byte,Halfword,Word,Doubleword" newline bitfld.long 0x00 21. "SSE,Syndrome Sign Extend" "Not required,Required" bitfld.long 0x00 16.--20. "SRT,Syndrome Register transfer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 15. "SF,Width of the register accessed by the instruction is Sixty-Four" "32-bit,64-bit" bitfld.long 0x00 14. "AR,Acquire/Release" "No,Yes" newline bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes" bitfld.long 0x00 9. "EA,External abort type" "Not external,External" newline bitfld.long 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes" bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2" newline bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write" bitfld.long 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,Reserved" elif (((d.l(spr:0x34520))&0xFD000000)==(0x90000000||0x94000000)) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes" bitfld.long 0x00 9. "EA,External abort type" "Not external,External" newline bitfld.long 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes" bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2" newline bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write" bitfld.long 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,Reserved" elif (((d.l(spr:0x34520))&0xFC800000)==(0xA0800000||0xB0800000)) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid" bitfld.long 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 7. "IDF,Input Denormal floating-point exception trapped" "Not occurred,Occurred" bitfld.long 0x00 4. "IXF,Inexact floating-point exception trapped" "Not occurred,Occurred" newline bitfld.long 0x00 3. "UFF,Underflow floating-point exception trapped" "Not occurred,Occurred" bitfld.long 0x00 2. "OFF,Overflow floating-point exception trapped" "Not occurred,Occurred" newline bitfld.long 0x00 1. "DZF,Divide-by-zero floating-point exception trapped" "Not occurred,Occurred" bitfld.long 0x00 0. "IOF,Invalid Operation floating-point exception trapped" "Not occurred,Occurred" elif (((d.l(spr:0x34520))&0xFC800000)==(0xA0000000||0xB0000000)) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid" bitfld.long 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7" elif (((d.l(spr:0x34520))&0xFD000000)==0xBD000000) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid" hexmask.long.tbyte 0x00 0.--23. 1 "IS,Additional information about the SError interrupt" elif (((d.l(spr:0x34520))&0xFD000000)==0xBC000000) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid" elif (((d.l(spr:0x34520))&0xFC000000)==(0xC0000000||0xC4000000||0xE8000000)) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "0,1,2,3,%d..." elif (((d.l(spr:0x34520))&0xFC000000)==(0xC8000000||0xCC000000)) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "ISV,EX bit valid" "Not valid,Valid" bitfld.long 0x00 6. "EX,Exclusive operation" "No,Yes" newline bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "0,1,2,3,%d..." elif (((d.l(spr:0x34520))&0xFC000000)==(0xD0000000||0xD4000000)) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 8. "CM,Data came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes" bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write" newline bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "0,1,2,3,%d..." elif (((d.l(spr:0x34520))&0xFC000000)==(0xE0000000||0xF0000000)) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" hexmask.long.word 0x00 0.--15. 1 "COMMENT,Set to the instruction comment field value" else group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" endif if (((d.l(spr:0x36520))&0xFC000000)==(0x00000000||0x38000000||0x88000000||0x98000000||0x4C000000)) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" elif (((d.l(spr:0x36520))&0xFC000000)==0x04000000) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline bitfld.long 0x00 0. "TI,Trapped instruction" "WFI,WFE" elif (((d.l(spr:0x36520))&0xFC000000)==(0x0C000000||0x14000000)) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline bitfld.long 0x00 17.--19. "Opc2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14.--16. "Opc1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 10.--13. "CRn,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" elif (((d.l(spr:0x36520))&0xFC000000)==(0x10000000||0x30000000)) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline bitfld.long 0x00 16.--19. "Opc1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 10.--14. "Rt2,Rt2 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" elif (((d.l(spr:0x36520))&0xFC000000)==0x18000000) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline hexmask.long.byte 0x00 12.--19. 1 "IMM8,The immediate value from the issued instruction" bitfld.long 0x00 5.--9. "Rn,Rn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 4. "OFFSET,Indicates whether the offset is added or subtracted" "Subtracted,Added" bitfld.long 0x00 1.--3. "AM,Addressing mode" "Immediate unindexed,Immediate post-indexed,Immediate offset,Immediate pre-indexed,Literal unindexed,Reserved,Literal offset,Reserved" newline bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" elif (((d.l(spr:0x36520))&0xFC000000)==0x1C000000) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" elif (((d.l(spr:0x36520))&0xFC000000)==(0x54000000||0x58000000)) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline hexmask.long.word 0x00 0.--15. "IMM16,The value of the immediate field from the HVC or SVC instruction" elif (((d.l(spr:0x36520))&0xFC000000)==0x5C000000) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline hexmask.long.word 0x00 0.--15. "IMM16,The value of the immediate field from the issued SMC instruction" elif (((d.l(spr:0x36520))&0xFC000000)==0x60000000) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline bitfld.long 0x00 20.--21. "Op0,Op0 value from the issued instruction" "0,1,2,3" bitfld.long 0x00 17.--19. "Op2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 14.--16. "Op1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7" bitfld.long 0x00 10.--13. "CRn,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" elif (((d.l(spr:0x36520))&0xFC000000)==0x7C000000) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" hexmask.long 0x00 0.--24. 1 "IMPL_DEF,Implementation defined" elif (((d.l(spr:0x36520))&0xFC000000)==(0x80000000||0x84000000)) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 9. "EA,External abort type" "DECERR,SLVERR" bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2" newline bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "Address size/TTBR[0/1],Reserved,Reserved,Reserved,Reserved,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort,Reserved,Reserved,Reserved,Reserved,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity,Reserved,Reserved,Reserved,Reserved,Sync. parity/1st level,Sync. parity/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Debug,?..." elif (((d.l(spr:0x36520))&0xFD000000)==(0x91000000||0x95000000)) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid" bitfld.long 0x00 22.--23. "SAS,Syndrome Access Size" "Byte,Halfword,Word,Doubleword" newline bitfld.long 0x00 21. "SSE,Syndrome Sign Extend" "Not required,Required" bitfld.long 0x00 16.--20. "SRT,Syndrome Register transfer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 15. "SF,Width of the register accessed by the instruction is Sixty-Four" "32-bit,64-bit" bitfld.long 0x00 14. "AR,Acquire/Release" "No,Yes" newline bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes" bitfld.long 0x00 9. "EA,External abort type" "Not external,External" newline bitfld.long 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes" bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2" newline bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write" bitfld.long 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,Reserved" elif (((d.l(spr:0x36520))&0xFD000000)==(0x90000000||0x94000000)) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes" bitfld.long 0x00 9. "EA,External abort type" "Not external,External" newline bitfld.long 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes" bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2" newline bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write" bitfld.long 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,Reserved" elif (((d.l(spr:0x36520))&0xFC800000)==0xB0800000) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid" bitfld.long 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 7. "IDF,Input Denormal floating-point exception trapped" "Not occurred,Occurred" bitfld.long 0x00 4. "IXF,Inexact floating-point exception trapped" "Not occurred,Occurred" newline bitfld.long 0x00 3. "UFF,Underflow floating-point exception trapped" "Not occurred,Occurred" bitfld.long 0x00 2. "OFF,Overflow floating-point exception trapped" "Not occurred,Occurred" newline bitfld.long 0x00 1. "DZF,Divide-by-zero floating-point exception trapped" "Not occurred,Occurred" bitfld.long 0x00 0. "IOF,Invalid Operation floating-point exception trapped" "Not occurred,Occurred" elif (((d.l(spr:0x36520))&0xFC800000)==0xB0000000) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid" bitfld.long 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7" elif (((d.l(spr:0x36520))&0xFD000000)==0xBD000000) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid" hexmask.long.tbyte 0x00 0.--23. 1 "IS,Additional information about the SError interrupt" elif (((d.l(spr:0x36520))&0xFD000000)==0xBC000000) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid" elif (((d.l(spr:0x36520))&0xFC000000)==0xF0000000) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline hexmask.long.word 0x00 0.--15. 1 "COMMENT,Set to the instruction comment field value" else group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" endif elif (CORENAME()=="CORTEXA53") if (((d.l(spr:0x30520))&0xFC000000)==(0x00000000||0x38000000||0x88000000||0x98000000)) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" elif (((d.l(spr:0x30520))&0xFC000000)==0x04000000) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline bitfld.long 0x00 0. "TI,Trapped instruction" "WFI,WFE" elif (((d.l(spr:0x30520))&0xFC000000)==(0x0C000000||0x14000000)) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline bitfld.long 0x00 17.--19. "Opc2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14.--16. "Opc1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 10.--13. "CRn,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" elif (((d.l(spr:0x30520))&0xFC000000)==(0x10000000||0x30000000)) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline bitfld.long 0x00 16.--19. "Opc1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 10.--14. "Rt2,Rt2 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" elif (((d.l(spr:0x30520))&0xFC000000)==0x18000000) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline hexmask.long.byte 0x00 12.--19. 1 "IMM8,The immediate value from the issued instruction" bitfld.long 0x00 5.--9. "Rn,Rn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 4. "OFFSET,Indicates whether the offset is added or subtracted" "Subtracted,Added" bitfld.long 0x00 1.--3. "AM,Addressing mode" "Immediate unindexed,Immediate post-indexed,Immediate offset,Immediate pre-indexed,Literal unindexed,Reserved,Literal offset,Reserved" newline bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" elif (((d.l(spr:0x30520))&0xFC000000)==0x1C000000) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" elif (((d.l(spr:0x30520))&0xFC000000)==(0x44000000||0x54000000)) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline hexmask.long.word 0x00 0.--15. "IMM16,The value of the immediate field from the HVC or SVC instruction" elif (((d.l(spr:0x30520))&0xFC000000)==0x60000000) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline bitfld.long 0x00 20.--21. "Op0,Op0 value from the issued instruction" "0,1,2,3" bitfld.long 0x00 17.--19. "Op2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 14.--16. "Op1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7" bitfld.long 0x00 10.--13. "CRn,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" elif (((d.l(spr:0x30520))&0xFC000000)==(0x80000000||0x84000000)) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes" bitfld.long 0x00 9. "EA,External abort type" "Not external,External" newline bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2" bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "Address size/0th level/base register,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1st level,Sync. external abort/2nd level,Sync. external abort/3rd level,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,?..." elif (((d.l(spr:0x30520))&0xFD000000)==(0x91000000||0x95000000)) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid" bitfld.long 0x00 22.--23. "SAS,Syndrome Access Size" "Byte,Halfword,Word,Doubleword" newline bitfld.long 0x00 21. "SSE,Syndrome Sign Extend" "Not required,Required" bitfld.long 0x00 16.--20. "SRT,Syndrome Register transfer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 15. "SF,Width of the register accessed by the instruction is Sixty-Four" "32-bit,64-bit" bitfld.long 0x00 14. "AR,Acquire/Release" "No,Yes" newline bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes" bitfld.long 0x00 9. "EA,External abort type" "Not external,External" newline bitfld.long 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes" bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2" newline bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write" bitfld.long 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,Reserved" elif (((d.l(spr:0x30520))&0xFD000000)==(0x90000000||0x94000000)) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes" bitfld.long 0x00 9. "EA,External abort type" "Not external,External" newline bitfld.long 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes" bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2" newline bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write" bitfld.long 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,Reserved" elif (((d.l(spr:0x30520))&0xFC800000)==(0xA0800000||0xB0800000)) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid" bitfld.long 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 7. "IDF,Input Denormal floating-point exception trapped" "Not occurred,Occurred" bitfld.long 0x00 4. "IXF,Inexact floating-point exception trapped" "Not occurred,Occurred" newline bitfld.long 0x00 3. "UFF,Underflow floating-point exception trapped" "Not occurred,Occurred" bitfld.long 0x00 2. "OFF,Overflow floating-point exception trapped" "Not occurred,Occurred" newline bitfld.long 0x00 1. "DZF,Divide-by-zero floating-point exception trapped" "Not occurred,Occurred" bitfld.long 0x00 0. "IOF,Invalid Operation floating-point exception trapped" "Not occurred,Occurred" elif (((d.l(spr:0x30520))&0xFC800000)==(0xA0000000||0xB0000000)) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid" bitfld.long 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7" elif (((d.l(spr:0x30520))&0xFD000000)==0xBD000000) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid" bitfld.long 0x00 22.--23. "SES,System Error Source" "Processor,System,External," newline hexmask.long.tbyte 0x00 0.--21. 1 "IS,Additional information about the SError interrupt" elif (((d.l(spr:0x30520))&0xFD000000)==0xBC000000) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid" elif (((d.l(spr:0x30520))&0xFC000000)==(0xC0000000||0xC4000000)) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "0,1,2,3,%d..." elif (((d.l(spr:0x30520))&0xFC000000)==(0xC8000000||0xCC000000)) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "ISV,EX bit valid" "Not valid,Valid" bitfld.long 0x00 6. "EX,Exclusive operation" "No,Yes" newline bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "0,1,2,3,%d..." elif (((d.l(spr:0x30520))&0xFC000000)==(0xD0000000||0xD4000000)) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 8. "CM,Data came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes" bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write" newline bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "0,1,2,3,%d..." elif (((d.l(spr:0x30520))&0xFC000000)==(0xE0000000||0xF0000000)) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline hexmask.long.word 0x00 0.--15. 1 "COMMENT,Set to the instruction comment field value" else group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" endif if (((d.l(spr:0x34520))&0xFC000000)==(0x00000000||0x38000000||0x88000000||0x98000000||0x4C000000)) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" elif (((d.l(spr:0x34520))&0xFC000000)==0x04000000) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline bitfld.long 0x00 0. "TI,Trapped instruction" "WFI,WFE" elif (((d.l(spr:0x34520))&0xFC000000)==(0x0C000000||0x14000000||0x20000000)) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline bitfld.long 0x00 17.--19. "Opc2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14.--16. "Opc1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 10.--13. "CRn,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" elif (((d.l(spr:0x34520))&0xFC000000)==(0x10000000||0x30000000)) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline bitfld.long 0x00 16.--19. "Opc1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 10.--14. "Rt2,Rt2 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" elif (((d.l(spr:0x34520))&0xFC000000)==0x18000000) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" hexmask.long.byte 0x00 12.--19. 1 "IMM8,The immediate value from the issued instruction" bitfld.long 0x00 5.--9. "Rn,Rn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 4. "OFFSET,Indicates whether the offset is added or subtracted" "Subtracted,Added" bitfld.long 0x00 1.--3. "AM,Addressing mode" "Immediate unindexed,Immediate post-indexed,Immediate offset,Immediate pre-indexed,Literal unindexed,Reserved,Literal offset,Reserved" newline bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" elif (((d.l(spr:0x34520))&0xFC000000)==0x1C000000) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" elif (((d.l(spr:0x34520))&0xFC000000)==(0x44000000||0x48000000||0x54000000||0x58000000)) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline hexmask.long.word 0x00 0.--15. "IMM16,The value of the immediate field from the HVC or SVC instruction" elif (((d.l(spr:0x34520))&0xFC000000)==0x5C000000) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline hexmask.long.word 0x00 0.--15. "IMM16,The value of the immediate field from the issued SMC instruction" elif (((d.l(spr:0x34520))&0xFC000000)==0x60000000) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline bitfld.long 0x00 20.--21. "Op0,Op0 value from the issued instruction" "0,1,2,3" bitfld.long 0x00 17.--19. "Op2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 14.--16. "Op1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7" bitfld.long 0x00 10.--13. "CRn,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" elif (((d.l(spr:0x34520))&0xFC000000)==(0x80000000||0x84000000)) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes" bitfld.long 0x00 9. "EA,External abort type" "Not external,External" newline bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2" bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "Address size/0th level/base register,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1st level,Sync. external abort/2nd level,Sync. external abort/3rd level,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,?..." elif (((d.l(spr:0x34520))&0xFD000000)==(0x91000000||0x95000000)) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid" bitfld.long 0x00 22.--23. "SAS,Syndrome Access Size" "Byte,Halfword,Word,Doubleword" newline bitfld.long 0x00 21. "SSE,Syndrome Sign Extend" "Not required,Required" bitfld.long 0x00 16.--20. "SRT,Syndrome Register transfer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 15. "SF,Width of the register accessed by the instruction is Sixty-Four" "32-bit,64-bit" bitfld.long 0x00 14. "AR,Acquire/Release" "No,Yes" newline bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes" bitfld.long 0x00 9. "EA,External abort type" "Not external,External" newline bitfld.long 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes" bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2" newline bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write" bitfld.long 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,Reserved" elif (((d.l(spr:0x34520))&0xFD000000)==(0x90000000||0x94000000)) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes" bitfld.long 0x00 9. "EA,External abort type" "Not external,External" newline bitfld.long 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes" bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2" newline bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write" bitfld.long 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,Reserved" elif (((d.l(spr:0x34520))&0xFC800000)==(0xA0800000||0xB0800000)) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid" bitfld.long 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 7. "IDF,Input Denormal floating-point exception trapped" "Not occurred,Occurred" bitfld.long 0x00 4. "IXF,Inexact floating-point exception trapped" "Not occurred,Occurred" newline bitfld.long 0x00 3. "UFF,Underflow floating-point exception trapped" "Not occurred,Occurred" bitfld.long 0x00 2. "OFF,Overflow floating-point exception trapped" "Not occurred,Occurred" newline bitfld.long 0x00 1. "DZF,Divide-by-zero floating-point exception trapped" "Not occurred,Occurred" bitfld.long 0x00 0. "IOF,Invalid Operation floating-point exception trapped" "Not occurred,Occurred" elif (((d.l(spr:0x34520))&0xFC800000)==(0xA0000000||0xB0000000)) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid" bitfld.long 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7" elif (((d.l(spr:0x34520))&0xFD000000)==0xBD000000) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid" hexmask.long.tbyte 0x00 0.--23. 1 "IS,Additional information about the SError interrupt" elif (((d.l(spr:0x34520))&0xFD000000)==0xBC000000) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid" elif (((d.l(spr:0x34520))&0xFC000000)==(0xC0000000||0xC4000000||0xE8000000)) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "0,1,2,3,%d..." elif (((d.l(spr:0x34520))&0xFC000000)==(0xC8000000||0xCC000000)) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "ISV,EX bit valid" "Not valid,Valid" bitfld.long 0x00 6. "EX,Exclusive operation" "No,Yes" newline bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "0,1,2,3,%d..." elif (((d.l(spr:0x34520))&0xFC000000)==(0xD0000000||0xD4000000)) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 8. "CM,Data came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes" bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write" newline bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "0,1,2,3,%d..." elif (((d.l(spr:0x34520))&0xFC000000)==(0xE0000000||0xF0000000)) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline hexmask.long.word 0x00 0.--15. 1 "COMMENT,Set to the instruction comment field value" else group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" endif if (((d.l(spr:0x36520))&0xFC000000)==(0x00000000||0x38000000||0x88000000||0x98000000||0x4C000000)) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" elif (((d.l(spr:0x36520))&0xFC000000)==0x04000000) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline bitfld.long 0x00 0. "TI,Trapped instruction" "WFI,WFE" elif (((d.l(spr:0x36520))&0xFC000000)==(0x0C000000||0x14000000)) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline bitfld.long 0x00 17.--19. "Opc2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14.--16. "Opc1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 10.--13. "CRn,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" elif (((d.l(spr:0x36520))&0xFC000000)==(0x10000000||0x30000000)) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline bitfld.long 0x00 16.--19. "Opc1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 10.--14. "Rt2,Rt2 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" elif (((d.l(spr:0x36520))&0xFC000000)==0x18000000) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" hexmask.long.byte 0x00 12.--19. 1 "IMM8,The immediate value from the issued instruction" bitfld.long 0x00 5.--9. "Rn,Rn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 4. "OFFSET,Indicates whether the offset is added or subtracted" "Subtracted,Added" bitfld.long 0x00 1.--3. "AM,Addressing mode" "Immediate unindexed,Immediate post-indexed,Immediate offset,Immediate pre-indexed,Literal unindexed,Reserved,Literal offset,Reserved" newline bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" elif (((d.l(spr:0x36520))&0xFC000000)==0x1C000000) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" elif (((d.l(spr:0x36520))&0xFC000000)==(0x54000000||0x58000000)) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline hexmask.long.word 0x00 0.--15. "IMM16,The value of the immediate field from the HVC or SVC instruction" elif (((d.l(spr:0x36520))&0xFC000000)==0x5C000000) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline hexmask.long.word 0x00 0.--15. "IMM16,The value of the immediate field from the issued SMC instruction" elif (((d.l(spr:0x36520))&0xFC000000)==0x60000000) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline bitfld.long 0x00 20.--21. "Op0,Op0 value from the issued instruction" "0,1,2,3" bitfld.long 0x00 17.--19. "Op2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 14.--16. "Op1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7" bitfld.long 0x00 10.--13. "CRn,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" elif (((d.l(spr:0x36520))&0xFC000000)==0x7C000000) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline hexmask.long 0x00 0.--24. 1 "IMPL_DEF,Implementation defined" elif (((d.l(spr:0x36520))&0xFC000000)==(0x80000000||0x84000000)) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes" bitfld.long 0x00 9. "EA,External abort type" "Not external,External" newline bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2" bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "Address size/0th level/base register,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1st level,Sync. external abort/2nd level,Sync. external abort/3rd level,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,?..." elif (((d.l(spr:0x36520))&0xFD000000)==(0x91000000||0x95000000)) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid" bitfld.long 0x00 22.--23. "SAS,Syndrome Access Size" "Byte,Halfword,Word,Doubleword" newline bitfld.long 0x00 21. "SSE,Syndrome Sign Extend" "Not required,Required" bitfld.long 0x00 16.--20. "SRT,Syndrome Register transfer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 15. "SF,Width of the register accessed by the instruction is Sixty-Four" "32-bit,64-bit" bitfld.long 0x00 14. "AR,Acquire/Release" "No,Yes" newline bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes" bitfld.long 0x00 9. "EA,External abort type" "Not external,External" newline bitfld.long 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes" bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2" newline bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write" bitfld.long 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,Reserved" elif (((d.l(spr:0x36520))&0xFD000000)==(0x90000000||0x94000000)) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes" bitfld.long 0x00 9. "EA,External abort type" "Not external,External" newline bitfld.long 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes" bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2" newline bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write" bitfld.long 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,Reserved" elif (((d.l(spr:0x36520))&0xFC800000)==0xB0800000) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid" bitfld.long 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 7. "IDF,Input Denormal floating-point exception trapped" "Not occurred,Occurred" bitfld.long 0x00 4. "IXF,Inexact floating-point exception trapped" "Not occurred,Occurred" newline bitfld.long 0x00 3. "UFF,Underflow floating-point exception trapped" "Not occurred,Occurred" bitfld.long 0x00 2. "OFF,Overflow floating-point exception trapped" "Not occurred,Occurred" newline bitfld.long 0x00 1. "DZF,Divide-by-zero floating-point exception trapped" "Not occurred,Occurred" bitfld.long 0x00 0. "IOF,Invalid Operation floating-point exception trapped" "Not occurred,Occurred" elif (((d.l(spr:0x36520))&0xFC800000)==0xB0000000) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid" bitfld.long 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7" elif (((d.l(spr:0x36520))&0xFD000000)==0xBD000000) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid" hexmask.long.tbyte 0x00 0.--23. 1 "IS,Additional information about the SError interrupt" elif (((d.l(spr:0x36520))&0xFD000000)==0xBC000000) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid" elif (((d.l(spr:0x36520))&0xFC000000)==0xF0000000) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline hexmask.long.word 0x00 0.--15. 1 "COMMENT,Set to the instruction comment field value" else group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" endif endif tree.end newline if (CORENAME()=="CORTEXA57") if (((per.q(spr:0x34501))&0x200)==0x200) group.quad spr:0x34501++0x00 line.quad 0x00 "IFSR32_EL2,Instruction Fault Status Register" bitfld.quad 0x00 12. "EXT,External Abort Type" "DECERR,SLVERR" bitfld.quad 0x00 9. "LPAE,Translation table formats on taking a Data Abort exception" "Short,Long" newline bitfld.quad 0x00 0.--5. "STATUS,Fault Status" "Address size/0th level/TTBR0/TTBR1,Reserved,Reserved,Reserved,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Access flag/0th level,Access flag/1st level,Access flag/2nd level,Access flag/3rd level,Permission/0th level,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external,Reserved,Reserved,Reserved,Sync. external/on TTW/0th level,Sync. external/on TTW/1st level,Sync. external/on TTW/2nd level,Sync. external/on TTW/3rd level,Sync. parity/on memory access,Reserved,Reserved,Reserved,Sync. parity/on memory access/on TTW/0th level,Sync. parity/on memory access/on TTW/1st level,Sync. parity/on memory access/on TTW/2nd level,Sync. parity/on memory access/on TTW/3rd level,Reserved,Alignment,Debug event,?..." else group.quad spr:0x34501++0x00 line.quad 0x00 "IFSR32_EL2,Instruction Fault Status Register" bitfld.quad 0x00 12. "EXT,External Abort Type" "DECERR,SLVERR" bitfld.quad 0x00 9. "LPAE,Translation table formats on taking a Data Abort exception" "Short,Long" newline bitfld.quad 0x00 0.--3. 10. "FS,Fault Status" "Reserved,Alignment,Debug event,Access flag/1st level,Reserved,Translation/1st level,Access flag/2nd level,Translation/2nd level,Sync. external/non-translation,Domain/1st level,Reserved,Domain/2nd level,Sync. external/on TTW/1st level,Permission/1st level,Sync. external/on TTW/2nd level,Permission/2nd level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Sync. parity/on memory access,Reserved,Reserved,Sync. parity/on TTW/1st level,Reserved,Sync. parity/on TTW/2nd level,?..." endif elif (CORENAME()=="CORTEXA53") if (((per.q(spr:0x34501))&0x200)==0x200) group.quad spr:0x34501++0x00 line.quad 0x00 "IFSR32_EL2,Instruction Fault Status Register" bitfld.quad 0x00 12. "EXT,External Abort Type" "DECERR,SLVERR" bitfld.quad 0x00 9. "LPAE,Translation table formats on taking a Data Abort exception" "Short,Long" newline bitfld.quad 0x00 0.--5. "STATUS,Fault Status" "Address size/TTBR0/TTBR1,Reserved,Reserved,Reserved,Reserved,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3rd level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external,Reserved,Reserved,Reserved,Reserved,Sync. external/on TTW/1st level,Sync. external/on TTW/2nd level,Sync. external/on TTW/3rd level,Sync. parity/on memory access,Reserved,Reserved,Reserved,Reserved,Sync. parity/on memory access/on TTW/1st level,Sync. parity/on memory access/on TTW/2nd level,Sync. parity/on memory access/on TTW/3rd level,Reserved,Alignment,Debug event,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,?..." else group.quad spr:0x34501++0x00 line.quad 0x00 "IFSR32_EL2,Instruction Fault Status Register" bitfld.quad 0x00 12. "EXT,External Abort Type" "DECERR,SLVERR" bitfld.quad 0x00 9. "LPAE,Translation table formats on taking a Data Abort exception" "Short,Long" newline bitfld.quad 0x00 0.--3. 10. "FS,Fault Status" "Reserved,Reserved,Debug event,Access flag/section,Reserved,Translation/section,Access flag/page,Translation/page,Sync. external/non-translation,Domain/section,Reserved,Domain/page,Sync. external/on TTW/1st level,Permission/section,Sync. external/on TTW/2nd level,Permission/page,TLB conflict,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Sync. parity/on memory access,Reserved,Reserved,Sync. parity/on TTW/1st level,Reserved,Sync. parity/on TTW/2nd level,?..." endif endif group.quad spr:0x30600++0x00 line.quad 0x00 "FAR_EL1,Fault Address Register" group.quad spr:0x34600++0x00 line.quad 0x00 "FAR_EL2,Fault Address Register" group.quad spr:0x36600++0x00 line.quad 0x00 "FAR_EL3,Fault Address Register" group.quad spr:0x34604++0x00 line.quad 0x00 "HPFAR_EL2,Hypervisor IPA Fault Address Register" group.quad spr:0x30C00++0x00 line.quad 0x00 "VBAR_EL1,Vector Base Address Register" hexmask.quad 0x00 11.--63. 0x800 "VBA,Vector base address" group.quad spr:0x34C00++0x00 line.quad 0x00 "VBAR_EL2,Vector Base Address Register" hexmask.quad 0x00 11.--63. 0x800 "VBA,Vector base address" group.quad spr:0x36C00++0x00 line.quad 0x00 "VBAR_EL3,Vector Base Address Register" hexmask.quad 0x00 11.--63. 0x800 "VBA,Vector base address" rgroup.quad spr:0x36C01++0x00 line.quad 0x00 "RVBAR_EL3,Reset Vector Base Address Register" hexmask.quad 0x00 2.--43. 0x4 "RVBA,Reset Vector Base Address" rgroup.quad SPR:0x30C10++0x00 line.long 0x00 "ISR_EL1,Interrupt Status Register" bitfld.long 0x00 8. "A,External abort pending flag" "Not pending,Pending" bitfld.long 0x00 7. "I,Interrupt pending flag" "Not pending,Pending" newline bitfld.long 0x00 6. "F,Fast interrupt pending flag" "Not pending,Pending" group.quad SPR:0x36C02++0x00 line.long 0x00 "RMR_EL3,Reset Management Register" bitfld.long 0x00 1. "RR,Reset Request" "Not requested,Requested" bitfld.long 0x00 0. "AA64,Determines which execution state the processor boots into after a warmreset" "AArch32,AArch64" if (CORENAME()=="CORTEXA57") rgroup.quad spr:0x31F30++0x00 line.quad 0x00 "CBAR_EL1,Configuration Base Address Register" hexmask.quad.long 0x00 18.--43. 1. "PERIPHBASE[43:18],Periphbase[43:18]" elif (CORENAME()=="CORTEXA53") rgroup.quad spr:0x31F30++0x00 line.quad 0x00 "CBAR_EL1,Configuration Base Address Register" hexmask.quad.tbyte 0x00 18.--39. 1. "PERIPHBASE[39:18],Periphbase[39:18]" endif group.quad spr:0x30D01++0x00 line.quad 0x00 "CONTEXTIDR_EL1,Context ID Register" group.quad spr:0x33D02++0x00 line.quad 0x00 "TPIDR_EL0,Software Thread ID Register" group.quad spr:0x33D03++0x00 line.quad 0x00 "TPIDRRO_EL0,Software Thread ID Register" group.quad spr:0x30D04++0x00 line.quad 0x00 "TPIDR_EL1,Software Thread ID Register" group.quad spr:0x34D02++0x00 line.quad 0x00 "TPIDR_EL2,Software Thread ID Register" group.quad spr:0x36D02++0x00 line.quad 0x00 "TPIDR_EL3,Software Thread ID Register" tree.end tree "Memory Management Unit" group.quad spr:0x30100++0x0 line.quad 0x00 "SCTLR_EL1,System Control Register (EL1)" bitfld.quad 0x00 26. "UCI,EL0 access enable (DC CVAU|DC CIVAC|DC CVAC|IC IVAU)" "Disabled,Enabled" bitfld.quad 0x00 25. "EE,Exception endianness" "Little,Big" newline bitfld.quad 0x00 24. "E0E,Endianness of explicit data access at EL0" "Little,Big" bitfld.quad 0x00 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced" newline bitfld.quad 0x00 18. "NTWE,Not trap WFE" "No,Yes" bitfld.quad 0x00 16. "NTWI,Not trap WFI" "No,Yes" newline bitfld.quad 0x00 15. "UCT,EL0 access enable (CTR_EL0)" "Disabled,Enabled" bitfld.quad 0x00 14. "DZE,EL0 access enable (DC ZVA)" "Disabled,Enabled" newline bitfld.quad 0x00 12. "I,Instruction Cache Enable" "Disabled,Enabled" bitfld.quad 0x00 9. "UMA,User Mask Access" "Disabled,Enabled" newline bitfld.quad 0x00 8. "SED,SETEND Disable" "No,Yes" bitfld.quad 0x00 7. "ITD,IT instruction disable" "No,Yes" newline bitfld.quad 0x00 5. "CP15BEN,c15 barrier enable" "Disabled,Enabled" bitfld.quad 0x00 4. "SA0,EL0 stack alignment check enable" "Disabled,Enabled" newline bitfld.quad 0x00 3. "SA,SP stack alignment check enable" "Disabled,Enabled" bitfld.quad 0x00 2. "C,Enable unified cache or data cache" "Disabled,Enabled" newline bitfld.quad 0x00 1. "A,Strict Alignment" "Disabled,Enabled" bitfld.quad 0x00 0. "M,MMU or Protection Unit" "Disabled,Enabled" group.quad spr:0x34100++0x0 line.quad 0x00 "SCTLR_EL2,System Control Register (EL2)" bitfld.quad 0x00 25. "EE,Exception endianness" "Little,Big" bitfld.quad 0x00 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced" newline bitfld.quad 0x00 12. "I,Instruction Cache Enable" "Disabled,Enabled" bitfld.quad 0x00 3. "SA,SP stack alignment check enable" "Disabled,Enabled" newline bitfld.quad 0x00 2. "C,Enable unified cache or data cache" "Disabled,Enabled" bitfld.quad 0x00 1. "A,Strict Alignment" "Disabled,Enabled" newline bitfld.quad 0x00 0. "M,MMU or Protection Unit" "Disabled,Enabled" group.quad spr:0x36100++0x0 line.quad 0x00 "SCTLR_EL3,System Control Register (EL3)" bitfld.quad 0x00 25. "EE,Exception endianness" "Little,Big" bitfld.quad 0x00 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced" newline bitfld.quad 0x00 12. "I,Instruction Cache Enable" "Disabled,Enabled" bitfld.quad 0x00 3. "SA,SP stack alignment check enable" "Disabled,Enabled" newline bitfld.quad 0x00 2. "C,Enable unified cache or data cache" "Disabled,Enabled" bitfld.quad 0x00 1. "A,Strict Alignment" "Disabled,Enabled" newline bitfld.quad 0x00 0. "M,MMU or Protection Unit" "Disabled,Enabled" group.quad spr:0x30200++0x00 line.quad 0x00 "TTBR0_EL1,Translation Table Base Register 0 (EL1)" hexmask.quad.word 0x00 48.--63. 1. "ASID,ASID for the translation table base address" hexmask.quad 0x00 0.--47. 1. "BADDR,Translation table base address" group.quad spr:0x30201++0x00 line.quad 0x00 "TTBR1_EL1,Translation Table Base Register 1 (EL1)" hexmask.quad.word 0x00 48.--63. 1. "ASID,ASID for the translation table base address" hexmask.quad 0x00 0.--47. 1. "BADDR,Translation table base address" if (CORENAME()=="CORTEXA57") group.quad spr:0x30202++0x00 line.quad 0x00 "TCR_EL1,Translation Control Register (EL1)" bitfld.quad 0x00 38. "TBI1,Top Byte Ignored 1" "Not ignored,Ignored" bitfld.quad 0x00 37. "TBI0,Top Byte Ignored 0" "Not ignored,Ignored" newline bitfld.quad 0x00 36. "AS,ASID size" "8-bit,16-bit" bitfld.quad 0x00 32.--34. "IPS,Intermediate Physical Address Size" "32 bits/4 GB,36 bits/64 GB,40 bits/1 TB,42 bits/4 TB,44 bits/16 TB,48 bits/256 TB,?..." newline bitfld.quad 0x00 30. "TG1,TTBR1_EL1 granule size" "4 KByte,64 KByte" bitfld.quad 0x00 28.--29. "SH1,Shareability attribute for memory associated with translation table walks using TTBR1_EL1" "Non-shareable,Reserved,Outer shareable,Inner shareable" newline bitfld.quad 0x00 26.--27. "ORGN1,Outer cacheability attribute for memory associated with translation table walks using TTBR1_EL1" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" bitfld.quad 0x00 24.--25. "IRGN1,Inner cacheability attribute for memory associated with translation table walks using TTBR1_EL1" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" newline bitfld.quad 0x00 23. "EPD1,Translation table walk disable for translations using TTBR1_EL1" "Enabled,Disabled" bitfld.quad 0x00 22. "A1,Selects whether TTBR0_EL1 or TTBR1_EL1 defines the ASID" "TTBR0_EL1,TTBR1_EL1" newline bitfld.quad 0x00 16.--21. "T1SZ,Size offset of the memory region addressed by TTBR1_EL1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.quad 0x00 14. "TG0,TTBR0_EL1 granule size" "4 KB,64 KB" newline bitfld.quad 0x00 12.--13. "SH0,Shareability attribute for memory associated with translation table walks using TTBR0_EL1" "Non-shareable,Reserved,Outer shareable,Inner shareable" bitfld.quad 0x00 10.--11. "ORGN0,Outer cacheability attribute for memory associated with translation table walks using TTBR0_EL1" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" newline bitfld.quad 0x00 8.--9. "IRGN0,Inner cacheability attribute for memory associated with translation table walks using TTBR0_EL1" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" bitfld.quad 0x00 0.--5. "T0SZ,Size offset of the memory region addressed by TTBR0_EL1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" elif (CORENAME()=="CORTEXA53") group.quad spr:0x30202++0x00 line.quad 0x00 "TCR_EL1,Translation Control Register (EL1)" bitfld.quad 0x00 38. "TBI1,Top Byte Ignored 1" "Not ignored,Ignored" bitfld.quad 0x00 37. "TBI0,Top Byte Ignored 0" "Not ignored,Ignored" newline bitfld.quad 0x00 36. "AS,ASID size" "8-bit,16-bit" bitfld.quad 0x00 32.--34. "IPS,Intermediate Physical Address Size" "32 bits/4 GB,36 bits/64 GB,40 bits/1 TB,?..." newline bitfld.quad 0x00 30.--31. "TG1,TTBR1_EL1 granule size" "Reserved,Reserved,4 KB,64 KB" bitfld.quad 0x00 28.--29. "SH1,Shareability attribute for memory associated with translation table walks using TTBR1_EL1" "Non-shareable,Reserved,Outer shareable,Inner shareable" newline bitfld.quad 0x00 26.--27. "ORGN1,Outer cacheability attribute for memory associated with translation table walks using TTBR1_EL1" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" bitfld.quad 0x00 24.--25. "IRGN1,Inner cacheability attribute for memory associated with translation table walks using TTBR1_EL1" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" newline bitfld.quad 0x00 23. "EPD1,Translation table walk disable for translations using TTBR1_EL1" "Enabled,Disabled" bitfld.quad 0x00 22. "A1,Selects whether TTBR0_EL1 or TTBR1_EL1 defines the ASID" "TTBR0_EL1,TTBR1_EL1" newline bitfld.quad 0x00 16.--21. "T1SZ,Size offset of the memory region addressed by TTBR1_EL1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.quad 0x00 14.--15. "TG0,TTBR0_EL1 granule size" "4 KB,64 KB,?..." newline bitfld.quad 0x00 12.--13. "SH0,Shareability attribute for memory associated with translation table walks using TTBR0_EL1" "Non-shareable,Reserved,Outer shareable,Inner shareable" bitfld.quad 0x00 10.--11. "ORGN0,Outer cacheability attribute for memory associated with translation table walks using TTBR0_EL1" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" newline bitfld.quad 0x00 8.--9. "IRGN0,Inner cacheability attribute for memory associated with translation table walks using TTBR0_EL1" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" bitfld.quad 0x00 7. "EPD0,Translation table walk disable for translations using TTBR0" "Enabled,Disabled" newline bitfld.quad 0x00 0.--5. "T0SZ,Size offset of the memory region addressed by TTBR0_EL1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif group.quad spr:0x34200++0x00 line.quad 0x00 "TTBR0_EL2,Translation Table Base Register 0 (EL2)" hexmask.quad 0x00 0.--47. 1. "BADDR,Translation table base address" if (CORENAME()=="CORTEXA57") group.quad spr:0x34202++0x00 line.quad 0x00 "TCR_EL2,Translation Control Register (EL2)" bitfld.quad 0x00 20. "TBI,Top Byte Ignored" "Not ignored,Ignored" bitfld.quad 0x00 16.--18. "PS,Intermediate Physical Address Size" "32 bits/4 GB,36 bits/64 GB,40 bits/1 TB,42 bits/4 TB,44 bits/16 TB,48 bits/256 TB,?..." newline bitfld.quad 0x00 14. "TG0,TTBR0_EL2 granule size" "4 KB,64 KB" bitfld.quad 0x00 12.--13. "SH0,Shareability attribute for memory associated with translation table walks using TTBR0_EL2" "Non-shareable,Reserved,Outer shareable,Inner shareable" newline bitfld.quad 0x00 10.--11. "ORGN0,Outer cacheability attribute for memory associated with translation table walks using TTBR0_EL2" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" bitfld.quad 0x00 8.--9. "IRGN0,Inner cacheability attribute for memory associated with translation table walks using TTBR0_EL2" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" newline bitfld.quad 0x00 0.--5. "T0SZ,Size offset of the memory region addressed by TTBR0_EL2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" elif (CORENAME()=="CORTEXA53") group.quad spr:0x34202++0x00 line.quad 0x00 "TCR_EL2,Translation Control Register (EL2)" bitfld.quad 0x00 20. "TBI,Top Byte Ignored" "Not ignored,Ignored" bitfld.quad 0x00 16.--18. "PS,Intermediate Physical Address Size" "32 bits/4 GB,36 bits/64 GB,40 bits/1 TB,?..." newline bitfld.quad 0x00 14.--15. "TG0,TTBR0_EL2 granule size" "4 KB,64 KB,?..." bitfld.quad 0x00 12.--13. "SH0,Shareability attribute for memory associated with translation table walks using TTBR0_EL2" "Non-shareable,Reserved,Outer shareable,Inner shareable" newline bitfld.quad 0x00 10.--11. "ORGN0,Outer cacheability attribute for memory associated with translation table walks using TTBR0_EL2" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" bitfld.quad 0x00 8.--9. "IRGN0,Inner cacheability attribute for memory associated with translation table walks using TTBR0_EL2" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" newline bitfld.quad 0x00 0.--5. "T0SZ,Size offset of the memory region addressed by TTBR0_EL2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif group.quad spr:0x36200++0x00 line.quad 0x00 "TTBR0_EL3,Translation Table Base Register 0 (EL3)" hexmask.quad 0x00 0.--47. 1. "BADDR,Translation table base address" if (CORENAME()=="CORTEXA57") group.quad spr:0x36202++0x00 line.quad 0x00 "TCR_EL3,Translation Control Register (EL3)" bitfld.quad 0x00 20. "TBI,Top Byte Ignored" "Not ignored,Ignored" bitfld.quad 0x00 16.--18. "PS,Intermediate Physical Address Size" "32 bits/4 GB,36 bits/64 GB,40 bits/1 TB,42 bits/4 TB,44 bits/16 TB,48 bits/256 TB,?..." newline bitfld.quad 0x00 14. "TG0,TTBR0_EL3 granule size" "4 KB,64 KB" bitfld.quad 0x00 12.--13. "SH0,Shareability attribute for memory associated with translation table walks using TTBR0_EL3" "Non-shareable,Reserved,Outer shareable,Inner shareable" newline bitfld.quad 0x00 10.--11. "ORGN0,Outer cacheability attribute for memory associated with translation table walks using TTBR0_EL3" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" bitfld.quad 0x00 8.--9. "IRGN0,Inner cacheability attribute for memory associated with translation table walks using TTBR0_EL3" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" newline bitfld.quad 0x00 0.--5. "T0SZ,Size offset of the memory region addressed by TTBR0_EL3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" elif (CORENAME()=="CORTEXA53") group.quad spr:0x36202++0x00 line.quad 0x00 "TCR_EL3,Translation Control Register (EL3)" bitfld.quad 0x00 20. "TBI,Top Byte Ignored" "Not ignored,Ignored" bitfld.quad 0x00 16.--18. "PS,Intermediate Physical Address Size" "32 bits/4 GB,36 bits/64 GB,40 bits/1 TB,?..." newline bitfld.quad 0x00 14.--15. "TG0,TTBR0_EL3 granule size" "4 KB,64 KB,?..." bitfld.quad 0x00 12.--13. "SH0,Shareability attribute for memory associated with translation table walks using TTBR0_EL3" "Non-shareable,Reserved,Outer shareable,Inner shareable" newline bitfld.quad 0x00 10.--11. "ORGN0,Outer cacheability attribute for memory associated with translation table walks using TTBR0_EL3" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" bitfld.quad 0x00 8.--9. "IRGN0,Inner cacheability attribute for memory associated with translation table walks using TTBR0_EL3" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" newline bitfld.quad 0x00 0.--5. "T0SZ,Size offset of the memory region addressed by TTBR0_EL3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif group.quad SPR:0x34300++0x00 line.long 0x00 "DACR32_EL2,Domain Access Control Register" bitfld.long 0x0 30.--31. "D15,Domain Access 15" "Denied,Client,Reserved,Manager" bitfld.long 0x0 28.--29. "D14,Domain Access 14" "Denied,Client,Reserved,Manager" newline bitfld.long 0x0 26.--27. "D13,Domain Access 13" "Denied,Client,Reserved,Manager" bitfld.long 0x0 24.--25. "D12,Domain Access 12" "Denied,Client,Reserved,Manager" newline bitfld.long 0x0 22.--23. "D11,Domain Access 11" "Denied,Client,Reserved,Manager" bitfld.long 0x0 20.--21. "D10,Domain Access 10" "Denied,Client,Reserved,Manager" newline bitfld.long 0x0 18.--19. "D9,Domain Access 9" "Denied,Client,Reserved,Manager" bitfld.long 0x0 16.--17. "D8,Domain Access 8" "Denied,Client,Reserved,Manager" newline bitfld.long 0x0 14.--15. "D7,Domain Access 7" "Denied,Client,Reserved,Manager" bitfld.long 0x0 12.--13. "D6,Domain Access 6" "Denied,Client,Reserved,Manager" newline bitfld.long 0x0 10.--11. "D5,Domain Access 5" "Denied,Client,Reserved,Manager" bitfld.long 0x0 8.--9. "D4,Domain Access 4" "Denied,Client,Reserved,Manager" newline bitfld.long 0x0 6.--7. "D3,Domain Access 3" "Denied,Client,Reserved,Manager" bitfld.long 0x0 4.--5. "D2,Domain Access 2" "Denied,Client,Reserved,Manager" newline bitfld.long 0x0 2.--3. "D1,Domain Access 1" "Denied,Client,Reserved,Manager" bitfld.long 0x0 0.--1. "D0,Domain Access 0" "Denied,Client,Reserved,Manager" if (CORENAME()=="CORTEXA57") if (((per.q(spr:0x34501))&0x200)==0x200) group.quad spr:0x34501++0x00 line.quad 0x00 "IFSR32_EL2,Instruction Fault Status Register" bitfld.quad 0x00 12. "EXT,External Abort Type" "DECERR,SLVERR" bitfld.quad 0x00 9. "LPAE,Translation table formats on taking a Data Abort exception" "Short,Long" newline bitfld.quad 0x00 0.--5. "STATUS,Fault Status" "Address size/0th level/TTBR0/TTBR1,Reserved,Reserved,Reserved,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Access flag/0th level,Access flag/1st level,Access flag/2nd level,Access flag/3rd level,Permission/0th level,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external,Reserved,Reserved,Reserved,Sync. external/on TTW/0th level,Sync. external/on TTW/1st level,Sync. external/on TTW/2nd level,Sync. external/on TTW/3rd level,Sync. parity/on memory access,Reserved,Reserved,Reserved,Sync. parity/on memory access/on TTW/0th level,Sync. parity/on memory access/on TTW/1st level,Sync. parity/on memory access/on TTW/2nd level,Sync. parity/on memory access/on TTW/3rd level,Reserved,Alignment,Debug event,?..." else group.quad spr:0x34501++0x00 line.quad 0x00 "IFSR32_EL2,Instruction Fault Status Register" bitfld.quad 0x00 12. "EXT,External Abort Type" "DECERR,SLVERR" bitfld.quad 0x00 9. "LPAE,Translation table formats on taking a Data Abort exception" "Short,Long" newline bitfld.quad 0x00 0.--3. 10. "FS,Fault Status" "Reserved,Alignment,Debug event,Access flag/1st level,Reserved,Translation/1st level,Access flag/2nd level,Translation/2nd level,Sync. external/non-translation,Domain/1st level,Reserved,Domain/2nd level,Sync. external/on TTW/1st level,Permission/1st level,Sync. external/on TTW/2nd level,Permission/2nd level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Sync. parity/on memory access,Reserved,Reserved,Sync. parity/on TTW/1st level,Reserved,Sync. parity/on TTW/2nd level,?..." endif elif (CORENAME()=="CORTEXA53") if (((per.q(spr:0x34501))&0x200)==0x200) group.quad spr:0x34501++0x00 line.quad 0x00 "IFSR32_EL2,Instruction Fault Status Register" bitfld.quad 0x00 12. "EXT,External Abort Type" "DECERR,SLVERR" bitfld.quad 0x00 9. "LPAE,Translation table formats on taking a Data Abort exception" "Short,Long" newline bitfld.quad 0x00 0.--5. "STATUS,Fault Status" "Address size/TTBR0/TTBR1,Reserved,Reserved,Reserved,Reserved,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3rd level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external,Reserved,Reserved,Reserved,Reserved,Sync. external/on TTW/1st level,Sync. external/on TTW/2nd level,Sync. external/on TTW/3rd level,Sync. parity/on memory access,Reserved,Reserved,Reserved,Reserved,Sync. parity/on memory access/on TTW/1st level,Sync. parity/on memory access/on TTW/2nd level,Sync. parity/on memory access/on TTW/3rd level,Reserved,Alignment,Debug event,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,?..." else group.quad spr:0x34501++0x00 line.quad 0x00 "IFSR32_EL2,Instruction Fault Status Register" bitfld.quad 0x00 12. "EXT,External Abort Type" "DECERR,SLVERR" bitfld.quad 0x00 9. "LPAE,Translation table formats on taking a Data Abort exception" "Short,Long" newline bitfld.quad 0x00 0.--3. 10. "FS,Fault Status" "Reserved,Reserved,Debug event,Access flag/section,Reserved,Translation/section,Access flag/page,Translation/page,Sync. external/non-translation,Domain/section,Reserved,Domain/page,Sync. external/on TTW/1st level,Permission/section,Sync. external/on TTW/2nd level,Permission/page,TLB conflict,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Sync. parity/on memory access,Reserved,Reserved,Sync. parity/on TTW/1st level,Reserved,Sync. parity/on TTW/2nd level,?..." endif endif rgroup.quad SPR:0x30510++0x00 line.long 0x00 "AFSR0_EL1,Auxiliary Fault Status Register 0 (EL1)" rgroup.quad SPR:0x34510++0x00 line.long 0x00 "AFSR0_EL2,Auxiliary Fault Status Register 0 (EL2)" rgroup.quad SPR:0x36510++0x00 line.long 0x00 "AFSR0_EL3,Auxiliary Fault Status Register 0 (EL3)" rgroup.quad SPR:0x30511++0x00 line.long 0x00 "AFSR1_EL1,Auxiliary Fault Status Register 1 (EL1)" rgroup.quad SPR:0x34511++0x00 line.long 0x00 "AFSR1_EL2,Auxiliary Fault Status Register 1 (EL2)" rgroup.quad SPR:0x36511++0x00 line.long 0x00 "AFSR1_EL3,Auxiliary Fault Status Register 1 (EL3)" if (((per.q(spr:0x30740))&0xF000000000000001)==0x0000000000000000) group.quad spr:0x30740++0x00 line.quad 0x00 "PAR_EL1,Physical Address Register" bitfld.quad 0x00 60.--63. "ATTRH,Device memory or Normal memory plus Outer cacheability [Type/Cacheable/Allocate]" "Device,Reserved,Reserved,Reserved,Normal/Non-cacheable,Reserved,Reserved,Reserved,Normal/Write-Through,Normal/Write-Through/Write,Normal/Write-Through/Read,Normal/Write-Through/Write|Read,Normal/Write-Back,Normal/Write-Back/Write,Normal/Write-Back/Read,Normal/Write-Back/Write|Read" bitfld.quad 0x00 56.--59. "ATTRL,Device memory or Normal memory plus Inner cacheability [Type/Cacheable/Allocate]" "Device-nGnRnE,Reserved,Reserved,Reserved,Device-not nGnRnE,?..." newline hexmask.quad 0x00 12.--47. 0x10 "PA[47:12],Physical Address" bitfld.quad 0x00 9. "NS,The NS attribute for a translation table entry read from Secure state" "No,Yes" newline bitfld.quad 0x00 7.--8. "SHA,Shareable attribute" "Non-shareable,Reserved,Outer Shareable,Inner Shareable" newline bitfld.quad 0x00 0. "F,Indicates whether the conversion completed successfully" "Successful,Aborted" elif (((per.q(spr:0x30740))&0x01)==0x00) group.quad spr:0x30740++0x00 line.quad 0x00 "PAR_EL1,Physical Address Register" bitfld.quad 0x00 60.--63. "ATTRH,Device memory or Normal memory plus Outer cacheability [Type/Cacheable/Allocate]" "Device,Reserved,Reserved,Reserved,Normal/Non-cacheable,Reserved,Reserved,Reserved,Normal/Write-Through,Normal/Write-Through/Write,Normal/Write-Through/Read,Normal/Write-Through/Write|Read,Normal/Write-Back,Normal/Write-Back/Write,Normal/Write-Back/Read,Normal/Write-Back/Write|Read" bitfld.quad 0x00 56.--59. "ATTRL,Device memory or Normal memory plus Inner cacheability [Type/Cacheable/Allocate]" "Reserved,Reserved,Reserved,Reserved,Normal/Non-cacheable,Reserved,Reserved,Reserved,Normal/Write-Through,Normal/Write-Through/Write,Normal/Write-Through/Read,Normal/Write-Through/Write|Read,Normal/Write-Back,Normal/Write-Back/Write,Normal/Write-Back/Read,Normal/Write-Back/Write|Read" newline hexmask.quad 0x00 12.--47. 0x10 "PA[47:12],Physical Address" bitfld.quad 0x00 9. "NS,The NS attribute for a translation table entry read from Secure state" "No,Yes" newline bitfld.quad 0x00 7.--8. "SHA,Shareable attribute" "Non-shareable,Reserved,Outer Shareable,Inner Shareable" newline bitfld.quad 0x00 0. "F,Indicates whether the conversion completed successfully" "Successful,Aborted" else group.quad spr:0x30740++0x00 line.quad 0x00 "PAR_EL1,Physical Address Register" newline bitfld.quad 0x00 9. "S,Indicates the translation stage at which the translation aborted" "Stage 1,Stage 2" bitfld.quad 0x00 8. "PTW,Translation aborted because of a stage 2 fault during a stage 1 translation table walk" "No,Yes" newline bitfld.quad 0x00 1.--6. "FST,Fault status field" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Reserved,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Atomic/AArch64,?..." newline bitfld.quad 0x00 0. "F,Indicates whether the conversion completed successfully" "Successful,Aborted" endif tree.open "Memory Attribute Indirection Registers" group.quad spr:0x30A20++0x00 line.quad 0x00 "MAIR_EL1,Memory Attribute Indirection Register (EL1)" bitfld.quad 0x00 60.--63. "ATTR7H,Attribute 7 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" bitfld.quad 0x00 56.--59. "ATTR7L,Attribute 7 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" newline bitfld.quad 0x00 52.--55. "ATTR6H,Attribute 6 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" bitfld.quad 0x00 48.--51. "ATTR6L,Attribute 6 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" newline bitfld.quad 0x00 44.--47. "ATTR5H,Attribute 5 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" bitfld.quad 0x00 40.--43. "ATTR5L,Attribute 5 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" newline bitfld.quad 0x00 36.--39. "ATTR4H,Attribute 4 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" bitfld.quad 0x00 32.--35. "ATTR4L,Attribute 4 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" newline bitfld.quad 0x00 28.--31. "ATTR3H,Attribute 3 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" bitfld.quad 0x00 24.--27. "ATTR3L,Attribute 3 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" newline bitfld.quad 0x00 20.--23. "ATTR2H,Attribute 2 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" bitfld.quad 0x00 16.--19. "ATTR2L,Attribute 2 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" newline bitfld.quad 0x00 12.--15. "ATTR1H,Attribute 1 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" bitfld.quad 0x00 8.--11. "ATTR1L,Attribute 1 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" newline bitfld.quad 0x00 4.--7. "ATTR0H,Attribute 0 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" bitfld.quad 0x00 0.--3. "ATTR0L,Attribute 0 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" group.quad spr:0x34A20++0x00 line.quad 0x00 "MAIR_EL2,Memory Attribute Indirection Register (EL2)" bitfld.quad 0x00 60.--63. "ATTR7H,Attribute 7 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" bitfld.quad 0x00 56.--59. "ATTR7L,Attribute 7 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" newline bitfld.quad 0x00 52.--55. "ATTR6H,Attribute 6 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" bitfld.quad 0x00 48.--51. "ATTR6L,Attribute 6 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" newline bitfld.quad 0x00 44.--47. "ATTR5H,Attribute 5 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" bitfld.quad 0x00 40.--43. "ATTR5L,Attribute 5 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" newline bitfld.quad 0x00 36.--39. "ATTR4H,Attribute 4 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" bitfld.quad 0x00 32.--35. "ATTR4L,Attribute 4 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" newline bitfld.quad 0x00 28.--31. "ATTR3H,Attribute 3 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" bitfld.quad 0x00 24.--27. "ATTR3L,Attribute 3 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" newline bitfld.quad 0x00 20.--23. "ATTR2H,Attribute 2 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" bitfld.quad 0x00 16.--19. "ATTR2L,Attribute 2 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" newline bitfld.quad 0x00 12.--15. "ATTR1H,Attribute 1 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" bitfld.quad 0x00 8.--11. "ATTR1L,Attribute 1 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" newline bitfld.quad 0x00 4.--7. "ATTR0H,Attribute 0 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" bitfld.quad 0x00 0.--3. "ATTR0L,Attribute 0 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" group.quad spr:0x36A20++0x00 line.quad 0x00 "MAIR_EL3,Memory Attribute Indirection Register (EL3)" bitfld.quad 0x00 60.--63. "ATTR7H,Attribute 7 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" bitfld.quad 0x00 56.--59. "ATTR7L,Attribute 7 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" newline bitfld.quad 0x00 52.--55. "ATTR6H,Attribute 6 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" bitfld.quad 0x00 48.--51. "ATTR6L,Attribute 6 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" newline bitfld.quad 0x00 44.--47. "ATTR5H,Attribute 5 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" bitfld.quad 0x00 40.--43. "ATTR5L,Attribute 5 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" newline bitfld.quad 0x00 36.--39. "ATTR4H,Attribute 4 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" bitfld.quad 0x00 32.--35. "ATTR4L,Attribute 4 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" newline bitfld.quad 0x00 28.--31. "ATTR3H,Attribute 3 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" bitfld.quad 0x00 24.--27. "ATTR3L,Attribute 3 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" newline bitfld.quad 0x00 20.--23. "ATTR2H,Attribute 2 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" bitfld.quad 0x00 16.--19. "ATTR2L,Attribute 2 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" newline bitfld.quad 0x00 12.--15. "ATTR1H,Attribute 1 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" bitfld.quad 0x00 8.--11. "ATTR1L,Attribute 1 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" newline bitfld.quad 0x00 4.--7. "ATTR0H,Attribute 0 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" bitfld.quad 0x00 0.--3. "ATTR0L,Attribute 0 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" rgroup.quad spr:0x30A30++0x00 line.quad 0x00 "AMAIR_EL1,Memory Attribute Indirection Register (EL1)" rgroup.quad spr:0x34A30++0x00 line.quad 0x00 "AMAIR_EL2,Memory Attribute Indirection Register (EL2)" rgroup.quad spr:0x36A30++0x00 line.quad 0x00 "AMAIR_EL3,Memory Attribute Indirection Register (EL3)" tree.end newline group.quad SPR:0x30D01++0x00 line.long 0x0 "CONTEXTIDR_EL1,Context ID Register" tree.end tree "Virtualization Extensions" group.quad SPR:0x34000++0x0 line.long 0x0 "VPIDR_EL2,Virtualization Processor ID Register" if (CORENAME()=="CORTEXA57") group.quad spr:0x34005++0x00 line.quad 0x0 "VMPIDR_EL2,Virtualization Multiprocessor ID Register" hexmask.quad.long 0x00 0.--31. 1. "VMPIDR_EL2,MPIDR value returned by Non-secure EL1 reads of the MPIDR_EL1" elif (CORENAME()=="CORTEXA53") group.quad spr:0x34005++0x00 line.quad 0x0 "VMPIDR_EL2,Virtualization Multiprocessor ID Register" endif group.quad spr:0x34100++0x0 line.quad 0x00 "SCTLR_EL2,System Control Register (EL2)" bitfld.quad 0x00 25. "EE,Exception endianness" "Little,Big" bitfld.quad 0x00 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced" newline bitfld.quad 0x00 12. "I,Instruction Cache Enable" "Disabled,Enabled" bitfld.quad 0x00 3. "SA,SP stack alignment check enable" "Disabled,Enabled" newline bitfld.quad 0x00 2. "C,Enable unified cache or data cache" "Disabled,Enabled" bitfld.quad 0x00 1. "A,Strict Alignment" "Disabled,Enabled" newline bitfld.quad 0x00 0. "M,MMU or Protection Unit" "Disabled,Enabled" group.quad spr:0x34110++0x00 line.quad 0x00 "HCR_EL2,Hypervisor Configuration Register" bitfld.quad 0x00 33. "ID,Stage 2 Instruction cache disable" "No,Yes" bitfld.quad 0x00 32. "CD,Stage 2 Data cache disable" "No,Yes" newline bitfld.quad 0x00 31. "RW,Register width control for lower exception levels" "AArch32,EL1 is 64-bit" bitfld.quad 0x00 30. "TRVM,Trap Read of Virtual Memory controls" "Disabled,Enabled" newline bitfld.quad 0x00 29. "HCD,Hypervisor Call Disable" "No,Yes" bitfld.quad 0x00 28. "TDZ,Trap DC ZVA instruction" "Disabled,Enabled" newline bitfld.quad 0x00 27. "TGE,Trap General Exceptions has an enhanced role when EL2 is using AArch64" "Disabled,Enabled" bitfld.quad 0x00 26. "TVM,Trap Virtual Memory controls to EL2" "Disabled,Enabled" newline bitfld.quad 0x00 25. "TTLB,Trap TLB maintenance instructions to EL2" "Disabled,Enabled" bitfld.quad 0x00 24. "TPU,Trap Cache maintenance instructions to Point of Unificiation to EL2" "Disabled,Enabled" newline bitfld.quad 0x00 23. "TPC,Trap Data/Unified Cache maintenance instructions to Point of Coherency tp EL2" "Disabled,Enabled" bitfld.quad 0x00 22. "TSW,Trap Data/Unified Cache maintenance instructions by Set/Way to EL2" "Disabled,Enabled" newline bitfld.quad 0x00 21. "TACR,Trap Auxiliary Control Register" "Disabled,Enabled" bitfld.quad 0x00 20. "TIDCP,Trap Implementation Dependent functionality" "Disabled,Enabled" newline bitfld.quad 0x00 19. "TSC,Trap SMC" "Disabled,Enabled" bitfld.quad 0x00 18. "TID3,Trap ID Group 3" "Disabled,Enabled" newline bitfld.quad 0x00 17. "TID2,Trap ID Group 2" "Disabled,Enabled" bitfld.quad 0x00 16. "TID1,Trap ID Group 1" "Disabled,Enabled" newline bitfld.quad 0x00 15. "TID0,Trap ID Group 0" "Disabled,Enabled" bitfld.quad 0x00 14. "TWE,Trap WFE" "Disabled,Enabled" newline bitfld.quad 0x00 13. "TWI,Trap WFI" "Disabled,Enabled" bitfld.quad 0x00 12. "DC,Default Cacheable" "Disabled,Enabled" newline bitfld.quad 0x00 10.--11. "BSU,Barrier Shareability upgrade. determines the minimum shareability domain that is applied to any barrier executed from EL1 or EL0" "No effect,Inner Shareable,Outer Shareable,Full System" bitfld.quad 0x00 9. "FB,Force broadcast" "Not forced,Forced" newline bitfld.quad 0x00 8. "VSE,Virtual System Error/Asynchronous Abort:" "No pending,Pending" bitfld.quad 0x00 7. "VI,Virtual IRQ Interrupt" "Not pending,Pending" newline bitfld.quad 0x00 6. "VF,Virtual FIQ Interrupt" "Not pending,Pending" bitfld.quad 0x00 5. "AMO,asynchronous abort and error interrupt routing" "Disabled,Enabled" newline bitfld.quad 0x00 4. "IMO,Physical IRQ Routing" "Disabled,Enabled" bitfld.quad 0x00 3. "FMO,Physical FIQ Routing" "Disabled,Enabled" newline bitfld.quad 0x00 2. "PTW,Protected Table Walk" "Disabled,Enabled" bitfld.quad 0x00 1. "SWIO,Set/Way Invalidation Override" "Disabled,Enabled" newline bitfld.quad 0x00 0. "VM,Second stage of Translation enable" "Disabled,Enabled" if (CORENAME()=="CORTEXA57") group.quad SPR:0x34111++0x00 line.long 0x00 "MDCR_EL2,Hypervisor Debug Control Register (EL2)" bitfld.long 0x00 11. "TDRA,Trap Debug ROM Access" "No effect,Valid" bitfld.long 0x00 10. "TDOSA,Trap Debug OS-related register Access" "No effect,Valid" bitfld.long 0x00 9. "TDA,Trap Debug Access" "No effect,Valid" newline bitfld.long 0x00 8. "TDE,Trap Debug Exceptions" "No effect,Valid" bitfld.long 0x00 7. "HPME,Hypervisor Performance Monitors Enable" "Disabled,Enabled" bitfld.long 0x00 6. "TPM,Trap Performance Monitors accesses" "No effect,Valid" newline bitfld.long 0x00 5. "TPMCR,Trap Performance Monitor Control Register accesses" "No effect,Valid" bitfld.long 0x00 0.--4. "HPMN,Defines the number of Performance Monitors counters" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif (CORENAME()=="CORTEXA53") group.quad SPR:0x34111++0x00 line.long 0x00 "MDCR_EL2,Hypervisor Debug Control Register (EL2)" bitfld.long 0x00 11. "TDRA,Trap Debug ROM Access" "No effect,Valid" bitfld.long 0x00 10. "TDOSA,Trap Debug OS-related register Access" "No effect,Valid" bitfld.long 0x00 9. "TDA,Trap Debug Access" "No effect,Valid" newline bitfld.long 0x00 8. "TDE,Trap Debug Exceptions" "No effect,Valid" bitfld.long 0x00 7. "HPME,Hypervisor Performance Monitors Enable" "Disabled,Enabled" bitfld.long 0x00 6. "TPM,Trap Performance Monitors accesses" "No effect,Valid" newline bitfld.long 0x00 5. "TPMCR,Trap Performance Monitor Control Register accesses" "No effect,Valid" bitfld.long 0x00 0.--4. "HPMN,Defines the number of Performance Monitors counters" "0,1,2,3,4,5,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6" endif group.quad SPR:0x34112++0x00 line.long 0x00 "CPTR_EL2,Architectural Feature Trap Register (EL2)" bitfld.long 0x0 31. "TCPAC,Trap Coprocessor Access Control" "Not trapped,Trapped" bitfld.long 0x0 10. "TFP,Traps instructions that access registers associated with Advanced SIMD and Floating-point execution from a lower exception level to EL2" "Not trapped,Trapped" group.quad SPR:0x36131++0x00 line.long 0x00 "MDCR_EL3,Hypervisor Debug Control Register (EL3)" bitfld.long 0x00 21. "EPMAD,External debugger access to Performance Monitors registers disabled" "No,Yes" bitfld.long 0x00 20. "EDAD,External debugger access to breakpoint and watchpoint registers disabled" "No,Yes" bitfld.long 0x00 17. "SPME,Secure performance monitors enable" "Disabled,Enabled" newline bitfld.long 0x00 16. "SDD,AArch64 secure debug disable" "No,Yes" bitfld.long 0x00 14.--15. "SPD32,AArch32 secure privileged debug" "Legacy,Reserved,Disabled,Enabled" bitfld.long 0x00 10. "TDOSA,Trap Debug OS-related register Access" "No effect,Valid" newline bitfld.long 0x00 9. "TDA,Trap Debug Access" "No effect,Valid" bitfld.long 0x00 6. "TPM,Trap Performance Monitors accesses" "No effect,Valid" group.quad SPR:0x36112++0x00 line.long 0x00 "CPTR_EL3,Architectural Feature Trap Register (EL3)" bitfld.long 0x0 31. "TCPAC,Trap Coprocessor Access Control" "Not trapped,Trapped" bitfld.long 0x0 10. "TFP,Traps instructions that access registers associated with Advanced SIMD and Floating-point execution from a lower exception level to EL2" "Not trapped,Trapped" group.quad SPR:0x34113++0x00 line.long 0x00 "HSTR_EL2,Hypervisor System Trap Register" bitfld.long 0x00 16. "TTEE,Trap ThumbEE" "Not supported,?..." bitfld.long 0x00 15. "T15,Trap coprocessor primary register CRn = 15" "No effect,Trapped" bitfld.long 0x00 13. "T13,Trap coprocessor primary register CRn = 13" "No effect,Trapped" newline bitfld.long 0x00 12. "T12,Trap coprocessor primary register CRn = 12" "No effect,Trapped" bitfld.long 0x00 11. "T11,Trap coprocessor primary register CRn = 11" "No effect,Trapped" bitfld.long 0x00 10. "T10,Trap coprocessor primary register CRn = 10" "No effect,Trapped" newline bitfld.long 0x00 9. "T9,Trap coprocessor primary register CRn = 9" "No effect,Trapped" bitfld.long 0x00 8. "T8,Trap coprocessor primary register CRn = 8" "No effect,Trapped" bitfld.long 0x00 7. "T7,Trap coprocessor primary register CRn = 7" "No effect,Trapped" newline bitfld.long 0x00 6. "T6,Trap coprocessor primary register CRn = 6" "No effect,Trapped" bitfld.long 0x00 5. "T5,Trap coprocessor primary register CRn = 5" "No effect,Trapped" bitfld.long 0x00 3. "T3,Trap coprocessor primary register CRn = 3" "No effect,Trapped" newline bitfld.long 0x00 2. "T2,Trap coprocessor primary register CRn = 2" "No effect,Trapped" bitfld.long 0x00 1. "T1,Trap coprocessor primary register CRn = 1" "No effect,Trapped" bitfld.long 0x00 0. "T0,Trap coprocessor primary register CRn = 0" "No effect,Trapped" rgroup.quad SPR:0x34117++0x00 line.long 0x00 "HACR_EL2,Hypervisor Auxiliary Configuration Register" group.quad spr:0x34210++0x00 line.quad 0x00 "VTTBR_EL2,Virtualization Translation Table Base Register" hexmask.quad.byte 0x00 48.--55. 1. "VMID,VMID for the translation table" hexmask.quad 0x00 0.--47. 1. "BADDR,Translation table base address" if (CORENAME()=="CORTEXA57") group.quad SPR:0x34212++0x00 line.long 0x00 "VTCR_EL2,Virtualization Translation Control Register" bitfld.long 0x00 16.--18. "PS,Physical Address Size" "32 bits/4GB,36 bits/64GB,40 bits/1TB,42 bits/4TB,44 bits/16TB,48 bits/256TB,?..." bitfld.long 0x00 14. "TG0,Granule size for the corresponding translation table base address register" "4 KB,64 KB" bitfld.long 0x00 12.--13. "SH0,Shareability attributes for the memory associated with the translation table walks using VTTBR" "0,1,2,3" newline bitfld.long 0x00 10.--11. "ORGN0,Outer Cacheability attributes for the memory associated with the translation table walks using VTTBR" "0,1,2,3" bitfld.long 0x00 8.--9. "IRGN0,Inner Cacheability attributes for the memory associated with the translation table walks VTTBR" "0,1,2,3" bitfld.long 0x00 6.--7. "SL0,Starting Level for VTCR addressed region" "0,1,2,3" newline bitfld.long 0x00 0.--5. "T0SZ,The Size offset of the VTCR addressed region" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" elif (CORENAME()=="CORTEXA53") group.quad SPR:0x34212++0x00 line.long 0x00 "VTCR_EL2,Virtualization Translation Control Register" bitfld.long 0x00 16.--18. "PS,Physical Address Size" "32 bits/4GB,36 bits/64GB,40 bits/1TB,?..." bitfld.long 0x00 14.--15. "TG0,Granule size for the corresponding translation table base address register" "4 KB,64 KB,?..." bitfld.long 0x00 12.--13. "SH0,Shareability attributes for the memory associated with the translation table walks using VTTBR" "0,1,2,3" newline bitfld.long 0x00 10.--11. "ORGN0,Outer Cacheability attributes for the memory associated with the translation table walks using VTTBR" "0,1,2,3" bitfld.long 0x00 8.--9. "IRGN0,Inner Cacheability attributes for the memory associated with the translation table walks VTTBR" "0,1,2,3" bitfld.long 0x00 6.--7. "SL0,Starting Level for VTCR addressed region" "0,1,2,3" newline bitfld.long 0x00 0.--5. "T0SZ,The Size offset of the VTCR addressed region" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif group.quad spr:0x34604++0x00 line.quad 0x00 "HPFAR_EL2,Hypervisor IPA Fault Address Register" hexmask.quad 0x00 4.--39. 0x10 "FIPA,Faulting IPA bits" tree.end tree "Cache Control and Configuration" if (CORENAME()=="CORTEXA57") rgroup.quad spr:0x33001++0x0 line.long 0x0 "CTR_EL0,Cache Type Register" bitfld.long 0x0 24.--27. "CWG,Cache writeback granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." bitfld.long 0x0 20.--23. "ERG,Exclusives reservation granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." bitfld.long 0x0 16.--19. "DMINLINE,Smallest data cache line size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." newline bitfld.long 0x0 14.--15. "L1POLICY,L1 Instruction cache policy" "Reserved,Reserved,Reserved,PIPT" bitfld.long 0x0 0.--3. "IMINLINE,I-Cache Minimum Line Size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." elif (CORENAME()=="CORTEXA53") rgroup.quad spr:0x33001++0x0 line.long 0x0 "CTR_EL0,Cache Type Register" bitfld.long 0x0 24.--27. "CWG,Cache writeback granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." bitfld.long 0x0 20.--23. "ERG,Exclusives reservation granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." bitfld.long 0x0 16.--19. "DMINLINE,Smallest data cache line size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." newline bitfld.long 0x0 14.--15. "L1POLICY,L1 Instruction cache policy" "Reserved,Reserved,VIPT,?..." bitfld.long 0x0 0.--3. "IMINLINE,I-Cache Minimum Line Size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." endif group.quad SPR:0x32000++0x0 line.long 0x0 "CSSELR_EL1,Cache Size Selection Register" bitfld.long 0x00 1.--3. "LEVEL,Cache level of required cache" "Level 1,Level 2,?..." bitfld.long 0x00 0. "IND,Instruction/Not Data" "Data/Unified,Instruction" if (CORENAME()=="CORTEXA57") rgroup.quad SPR:0x31001++0x0 line.long 0x0 "CLIDR_EL1,Cache Level ID Register" bitfld.long 0x00 27.--29. "LOUU,Level of Unification Uniprocessor" "Reserved,Level 1,?..." bitfld.long 0x00 24.--26. "LOC,Level of Coherency" "Reserved,Reserved,Level 3,?..." bitfld.long 0x00 21.--23. "LOUIS,Level of Unification Inner Shareable" "Reserved,Level 2,?..." newline bitfld.long 0x00 18.--20. "CTYPE7,Cache type for levels 7" "No cache,?..." bitfld.long 0x00 15.--17. "CTYPE6,Cache type for levels 6" "No cache,?..." bitfld.long 0x00 12.--14. "CTYPE5,Cache type for levels 5" "No cache,?..." newline bitfld.long 0x00 9.--11. "CTYPE4,Cache type for levels 4" "No cache,?..." bitfld.long 0x00 6.--8. "CTYPE3,Cache type for levels 3" "No cache,?..." bitfld.long 0x00 3.--5. "CTYPE2,Cache type for levels 2" "Reserved,Reserved,Reserved,Reserved,Unified,?..." newline bitfld.long 0x00 0.--2. "CTYPE1,Cache type for levels 1" "Reserved,Reserved,Reserved,Separate Inst/Data,?..." rgroup.quad SPR:0x31000++0x0 line.long 0x0 "CCSIDR_EL1,Current Cache Size ID Register" bitfld.long 0x00 31. "WT,Write-Through" "Not Supported,?..." bitfld.long 0x00 30. "WB,Write-Back" "Not Supported,Supported" bitfld.long 0x00 29. "RA,Read-Allocate" "Reserved,Supported" newline bitfld.long 0x00 28. "WA,Write-Allocate" "Not Supported,Supported" hexmask.long.word 0x00 13.--27. 1. 1. "SETS,Number of Sets" hexmask.long.word 0x00 3.--12. 1. 1. "ASSOC,Associativity" newline bitfld.long 0x00 0.--2. "LSIZE,Line Size" "Reserved,Reserved,64 bytes,?..." elif (CORENAME()=="CORTEXA53") rgroup.quad SPR:0x31001++0x0 line.long 0x0 "CLIDR_EL1,Cache Level ID Register" bitfld.long 0x00 30.--31. "ICB,Inner cache boundary" "Not disclosed,?..." bitfld.long 0x00 27.--29. "LOUU,Level of Unification Uniprocessor" "Reserved,Level 1,?..." bitfld.long 0x00 24.--26. "LOC,Level of Coherency" "Reserved,L1,L1/L2,?..." newline bitfld.long 0x00 21.--23. "LOUIS,Level of Unification Inner Shareable" "Reserved,Level 1,?..." bitfld.long 0x00 6.--8. "CTYPE3,Cache type for levels 3" "No cache,?..." bitfld.long 0x00 3.--5. "CTYPE2,Cache type for levels 2" "No cache,Reserved,Reserved,Reserved,Unified,?..." newline bitfld.long 0x00 0.--2. "CTYPE1,Cache type for levels 1" "Reserved,Reserved,Reserved,Separate Inst/Data,?..." rgroup.quad SPR:0x31000++0x0 line.long 0x0 "CCSIDR_EL1,Current Cache Size ID Register" bitfld.long 0x00 31. "WT,Write-Through" "Not Supported,?..." bitfld.long 0x00 30. "WB,Write-Back" "Not Supported,Supported" bitfld.long 0x00 29. "RA,Read-Allocate" "Not Supported,Supported" newline bitfld.long 0x00 28. "WA,Write-Allocate" "Not Supported,Supported" hexmask.long.word 0x00 13.--27. 1. 1. "SETS,Number of Sets" hexmask.long.word 0x00 3.--12. 1. 1. "ASSOC,Associativity" newline bitfld.long 0x00 0.--2. "LSIZE,Line Size" "1Reserved,Reserved,64 bytes,?..." endif tree "Level 1 memory system" if (CORENAME()=="CORTEXA57") group.quad SPR:0x30F10++0x00 line.long 0x00 "DL1DATA0_EL1,Data L1 Data 0 Register" group.quad SPR:0x30F11++0x00 line.long 0x00 "DL1DATA1_EL1,Data L1 Data 1 Register" group.quad SPR:0x30F12++0x00 line.long 0x00 "DL1DATA2_EL1,Data L1 Data 2 Register" group.quad SPR:0x30F13++0x00 line.long 0x00 "DL1DATA3_EL1,Data L1 Data 3 Register" group.quad SPR:0x30F00++0x00 line.long 0x00 "IL1DATA0_EL1,Instruction L1 Data 0 Register" group.quad SPR:0x30F01++0x00 line.long 0x00 "IL1DATA1_EL1,Instruction L1 Data 1 Register" group.quad SPR:0x30F02++0x00 line.long 0x00 "IL1DATA2_EL1,Instruction L1 Data 2 Register" group.quad SPR:0x30F03++0x00 line.long 0x00 "IL1DATA3_EL1,Instruction L1 Data 3 Register" group.quad spr:0x31F20++0x00 line.quad 0x00 "CPUACTLR_EL1,CPU Auxiliary Control Register" bitfld.quad 0x00 63. "FPRCGEC,Force processor RCG enables active" "Not forced,Forced" bitfld.quad 0x00 59. "DLPDMB,Disable load pass DMB" "No,Yes" bitfld.quad 0x00 58. "DDMBN,Disable DMB nullification" "No,Yes" newline bitfld.quad 0x00 57. "TA,Treat DMB st/stand DMB ld/allas DMB all/all" "Disabled,Enabled" bitfld.quad 0x00 56. "DL1DCHP,Disable L1 Data Cache hardware prefetcher" "No,Yes" bitfld.quad 0x00 55. "DLPS,Disable load pass store" "No,Yes" newline bitfld.quad 0x00 54. "TGRE,Treat GRE/nGRE as nGnRE" "Disabled,Enabled" bitfld.quad 0x00 53. "TDMBADSB,Treat DMBand DSBas if their domain field is SY" "Disabled,Enabled" bitfld.quad 0x00 52. "DORFLDNPI,Disable over-read from LDNP instruction" "No,Yes" newline bitfld.quad 0x00 51. "DCDAFEMP,Disable contention detection and fast exclusive monitor path" "No,Yes" bitfld.quad 0x00 50. "DSSONNCGREEMT,Disable store streaming on NC/GRE memory type" "No,Yes" bitfld.quad 0x00 49. "DNHOWBNAMT,Disable non-allocate hint of Write-Back No-Allocate (WBNA) memory type" "No,Yes" newline bitfld.quad 0x00 48. "DESRAFLSTL2,Disable early speculative read access from LS to L2" "No,Yes" bitfld.quad 0x00 47. "DL1L2HP,Disable L1/L2 hardware prefetch across 4KB page boundary even if page is 64KB or larger" "No,Yes" bitfld.quad 0x00 44. "EDCCADCCI,Enable data cache clean as data cache clean/invalidate" "Disabled,Enabled" newline bitfld.quad 0x00 39. "DIM,Disable instruction merging" "No,Yes" bitfld.quad 0x00 38. "FFPSCRWF,Force FPSCR write flush" "Not forced,Forced" bitfld.quad 0x00 37. "DIGS,Disable instruction group split" "No,Yes" newline bitfld.quad 0x00 36. "FIDSBONASBE,Force implicit DSB on an ISB event" "Not forced,Forced" bitfld.quad 0x00 34. "DSBP,Disable Static Branch Predictor" "No,Yes" bitfld.quad 0x00 33. "DL1ICWPIMBTB,Disable L1 Instruction Cache way prediction in micro-BTB" "No,Yes" newline bitfld.quad 0x00 32. "DL1ICP,Disable L1 Instruction Cache prefetch" "No,Yes" bitfld.quad 0x00 31. "SDEH,Snoop-delayed exclusive handling" "Disabled,Enabled" bitfld.quad 0x00 30. "FMCEA,Force main clock enable active" "Not forced,Forced" newline bitfld.quad 0x00 29. "FASIMDFPCEA,Force Advanced SIMD and floating-point clock enable active" "Disabled,Enabled" bitfld.quad 0x00 27.--28. "WSNAT,Write streaming no-allocate threshold" "12th,128th,512th,Disabled" bitfld.quad 0x00 25.--26. "WSNL1AT,Write streaming no-L1-allocate threshold" "4th,64th,128th,Disabled" newline bitfld.quad 0x00 24. "NCSE,Non-cacheable streaming enhancement" "Disabled,Enabled" bitfld.quad 0x00 23. "FIORTTSSAW,Force in-order requests to the same set and way" "Not forced,Forced" bitfld.quad 0x00 22. "FIOLI,Force in-order load issue" "Not forced,Forced" newline bitfld.quad 0x00 21. "DL2TLBP,Disable L2 TLB prefetching" "No,Yes" bitfld.quad 0x00 20. "DL2TTWIPAPAC,Disable L2 translation table walk IPA PA cache" "No,Yes" bitfld.quad 0x00 19. "DL2S1TTWC,Disable L2 stage 1 translation table walk cache" "No,Yes" newline bitfld.quad 0x00 18. "DL2S1TTWL2PAC,Disable L2 stage 1 translation table walk L2 PA cache" "No,Yes" bitfld.quad 0x00 17. "DL2TLBPO,Disable L2 TLB performance optimization" "No,Yes" bitfld.quad 0x00 16. "EFSOADLR,Enable full Strongly-ordered and Device load replay" "Disabled,Enabled" newline bitfld.quad 0x00 15. "FIOIIBEU,Force in-order issue in branch execute unit" "Not forced,Forced" bitfld.quad 0x00 14. "FLOFOIGCDAPC,Force limit of one instruction group commit/de-allocate per cycle" "Not forced,Forced" bitfld.quad 0x00 13. "FASPRW,Flush after Special Purpose Register (SPR) writes" "Disabled,Enabled" newline bitfld.quad 0x00 12. "FPOSPRS,Force push of SPRs" "Disabled,Enabled" bitfld.quad 0x00 11. "LTOIPIG,Limit to one instruction per instruction group" "Disabled,Enabled" bitfld.quad 0x00 10. "FSAEIG,Force serialization after each instruction group" "Not forced,Forced" newline bitfld.quad 0x00 9. "DFRO,Disable flag renaming optimization" "No,Yes" bitfld.quad 0x00 8. "EWFIIAANOPI,Execute WFI instruction as a NOP instruction" "Disabled,Enabled" bitfld.quad 0x00 7. "EWFEIAANOPI,Execute WFE instruction as a NOP instruction" "Disabled,Enabled" newline bitfld.quad 0x00 5. "EPLDPLDWIASNOP,Execute PLDand PLDWinstructions as a NOP" "Disabled,Enabled" bitfld.quad 0x00 4. "DIP,Disable indirect predictor" "No,Yes" bitfld.quad 0x00 3. "DMBTB,Disable micro-BTB" "No,Yes" newline bitfld.quad 0x00 1. "DICMS,Disable Instruction Cache miss streaming" "No,Yes" bitfld.quad 0x00 0. "EIOBTB,Enable invalidates of BTB" "Disabled,Enabled" group.quad spr:0x31F21++0x00 line.quad 0x00 "CPUECTLR_EL1,CPU Extended Control Register" bitfld.quad 0x00 38. "DTWDAP,Disable table walk descriptor access prefetch" "No,Yes" bitfld.quad 0x00 35.--36. "L2IFPD,L2 instruction fetch prefetch distance" "0 lines,1 line,2 lines,3 lines" bitfld.quad 0x00 32.--33. "L2LSDPD,L2 load/store data prefetch distance" "0 line,2 lines,4 lines,8 lines" newline bitfld.quad 0x00 6. "SMPEN,Enable hardware management of data coherency with other processors in the multiprocessor" "Disabled,Enabled" bitfld.quad 0x00 3.--5. "FPRETCTL,Advanced SIMD and Floating-point retention control" "2 ticks,8 ticks,32 ticks,64 ticks,128 ticks,256 ticks,512 ticks,?..." bitfld.quad 0x00 0.--2. "CPURETCTL,CPU retention control" "2 ticks,8 ticks,32 ticks,64 ticks,128 ticks,256 ticks,512 ticks,?..." elif (CORENAME()=="CORTEXA53") group.quad spr:0x31F20++0x00 line.quad 0x00 "CPUACTLR_EL1,CPU Auxiliary Control Register" bitfld.quad 0x00 44. "ENDCCASCI,Enable data cache clean as data cache clean/invalidate" "Disabled,Enabled" bitfld.quad 0x00 30. "FPDIDIS,Disable floating-point dual issue" "No,Yes" bitfld.quad 0x00 29. "DIDIS,Disable Dual Issue" "No,Yes" newline bitfld.quad 0x00 27.--28. "RADIS,Write streaming no-allocate threshold" "16th,128th,512th,Disabled" bitfld.quad 0x00 25.--26. "L1RADIS,Write streaming no-L1-allocate threshold" "4th,64th,128th,Disabled" bitfld.quad 0x00 24. "DTAH,Disable Transient allocation hint" "No,Yes" newline bitfld.quad 0x00 23. "STBPFRS,Disable ReadUnique request for prefetch streams initiated by STB accesses" "No,Yes" bitfld.quad 0x00 22. "STBPFDIS,Disable prefetch streams initiated from STB accesses" "No,Yes" bitfld.quad 0x00 21. "IFUTHDIS,IFU fetch throttle disabled" "No,Yes" newline bitfld.quad 0x00 19.--20. "NPFSTRM,Number of independent data prefetch streams" "1 stream,2 streams,3 streams,4 streams" bitfld.quad 0x00 18. "DSTDIS,Enable device split throttle" "Disabled,Enabled" bitfld.quad 0x00 17. "STRIDE,Enable stride detection" "Disabled,Enabled" newline bitfld.quad 0x00 13.--15. "L1PCTL,L1 Data prefetch control" "Disabled,1,2,3,4,5,6,8" bitfld.quad 0x00 10. "DODMBS,Disable optimized Data Memory Barrier behavior" "No,Yes" bitfld.quad 0x00 6. "L1DEIEN,L1 D-cache data RAM error injection enable" "Disabled,Enabled" group.quad spr:0x31F21++0x00 line.quad 0x00 "CPUECTLR_EL1,CPU Extended Control Register" bitfld.quad 0x00 6. "SMPEN,Enable hardware management of data coherency with other processors in the multiprocessor" "Disabled,Enabled" bitfld.quad 0x00 3.--5. "FPRETCTL,Advanced SIMD and Floating-point retention control" "Disabled,2 ticks,8 ticks,32 ticks,64 ticks,128 ticks,256 ticks,512 ticks" bitfld.quad 0x00 0.--2. "CPURETCTL,CPU retention control" "Disabled,2 ticks,8 ticks,32 ticks,64 ticks,128 ticks,256 ticks,512 ticks" endif if (CORENAME()=="CORTEXA57") group.quad spr:0x31F22++0x00 line.quad 0x00 "CPUMERRSR_EL1,CPU Memory Error Syndrome Register" bitfld.quad 0x00 63. "FATAL,Fatal bit" "0,1" hexmask.quad.byte 0x00 40.--47. 1. "OEC,Other error count" hexmask.quad.byte 0x00 32.--39. 1. "REC,Repeat error count" newline bitfld.quad 0x00 31. "VALID,Valid bit" "Not valid,Valid" hexmask.quad.byte 0x00 24.--30. 1. "RAMID,RAM Identifier" bitfld.quad 0x00 18.--22. "B/W,Bank/Way" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline hexmask.quad.tbyte 0x00 0.--17. 1. "INDEX,RAM address" elif (CORENAME()=="CORTEXA53") group.quad spr:0x31F22++0x00 line.quad 0x00 "CPUMERRSR_EL1,CPU Memory Error Syndrome Register" bitfld.quad 0x00 63. "FATAL,Fatal bit" "0,1" hexmask.quad.byte 0x00 40.--47. 1. "OEC,Other error count" hexmask.quad.byte 0x00 32.--39. 1. "REC,Repeat error count" newline bitfld.quad 0x00 31. "VALID,Valid bit" "Not valid,Valid" hexmask.quad.byte 0x00 24.--30. 1. "RAMID,RAM Identifier" bitfld.quad 0x00 18.--20. "C/W,CPUID/Way" "0,1,2,3,4,5,6,7" newline hexmask.quad.word 0x00 0.--11. 1. "RAD,RAM address" endif tree.end tree "Level 2 memory system" if (CORENAME()=="CORTEXA57") group.quad SPR:0x31B02++0x0 line.long 0x00 "L2CTLR_EL1,L2 Control Register" bitfld.long 0x00 31. "L2RSTDM,L2RSTDISABLE monitor" "No,Yes" bitfld.long 0x00 24.--25. "NCPU,Number of CPU" "1,2,3,4" rbitfld.long 0x00 22. "CPUCP,CPU Cache Protection" "Disabled,Enabled" newline bitfld.long 0x00 21. "SCUL2CP,SCU-L2 Cache Protection" "Disabled,Enabled" bitfld.long 0x00 20. "DIECCE,Data inline ECC enable" "Disabled,Enabled" rbitfld.long 0x00 13. "L2AS,L2 arbitration slice" "Not presented,Presented" newline rbitfld.long 0x00 12. "L2TRAMS,L2 Tag RAM slice" "Not presented,Presented" rbitfld.long 0x00 10.--11. "L2DRAMS,L2 Data RAM slice" "Not presented,1,2,?..." bitfld.long 0x00 9. "L2TRAMS,L2 Tag RAM setup" "0 cycle,1 cycle" newline bitfld.long 0x00 6.--8. "L2TRAML,L2 Tag RAM latency" "2 cycles,2 cycles,3 cycles,4 cycles,5 cycles,5 cycles,5 cycles,5 cycles" rbitfld.long 0x00 5. "DRAMIL,L2 data RAM input latency" "1 cycle,2 cycle" bitfld.long 0x00 0.--2. "DRAML,L2 data RAM latency" "2 cycles,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles" group.quad SPR:0x31B03++0x0 line.long 0x00 "L2ECTLR_EL1,L2 Extended Control Register" bitfld.long 0x00 30. "L2INTASYNCERR,L2 internal asynchronous error" "No error,Error" bitfld.long 0x00 29. "AXIASYNCERR,AXI asynchronous error" "No error,Error" bitfld.long 0x00 0.--2. "L2DRC,L2 dynamic retention control" "Disabled,2 ticks,8 ticks,32 ticks,64 ticks,128 ticks,256 ticks,512 ticks" group.quad SPR:0x31F00++0x00 line.long 0x00 "L2ACTLR_EL1,L2 Auxiliary Control Register" bitfld.long 0x00 28. "FL2TBCEA,Force L2 tag bank clock enable active" "Disabled,Enabled" bitfld.long 0x00 27. "FL2LCEA,Force L2 logic clock enable active" "Disabled,Enabled" bitfld.long 0x00 26. "FL2GICRCGEA,Forces L2, GIC CPU interface, and Timer Regional Clock Gate(RCG) enables active" "Not forced,Forced" newline bitfld.long 0x00 25. "ESIAA,Enables single issue across all tag banks when the L2 arbitration replay threshold is reached" "Disabled,Enabled" bitfld.long 0x00 23. "DPRFRUT,Disables prefetch requests from ReadUnique transactions" "No,Yes" bitfld.long 0x00 22. "DDTLSPR,Disable dynamic throttling of load/store prefetch requests" "No,Yes" newline bitfld.long 0x00 20.--21. "DTL2PRFEQOC,Disable throttling of L2 prefetch requests based on Fill/Evict Queue(FEQ) occupancy count" "12,10,8,Disabled" bitfld.long 0x00 18.--19. "DLASQ,Disable limit on NC/SO/Dev stores in Address Sequence Queue" "12 entries,10 entries,8 entries,No limit" bitfld.long 0x00 17. "DL2RRA,Disable L2 round-robin arbitration that only clocks through paths with an active requestor waiting to be arbitrated" "No,Yes" newline bitfld.long 0x00 16. "ERTSI,Enable replay threshold single issue" "Disabled,Enabled" bitfld.long 0x00 15. "DFFD,Disable fast forwarding of data from ACE or CHI to LS and IF" "No,Yes" bitfld.long 0x00 14. "EUCE,Enables UniqueClean evictions with data" "Disabled,Enabled" newline bitfld.long 0x00 13. "DCEO,Disable clean evict optimization" "No,Yes" bitfld.long 0x00 11. "DDSB,Disable DSB with no DVM synchronization" "No,Yes" bitfld.long 0x00 10. "DNSDAR,Disable Non-secure debug array read" "No,Yes" newline bitfld.long 0x00 8. "DDVMCMOMB,Disable DVM and cache maintenance operation message broadcast" "No,Yes" bitfld.long 0x00 7. "EHDT,Enable hazard detect timeout" "Disabled,Enabled" bitfld.long 0x00 6. "DACESCHIST,Disable ACE shareable or CHI snoopable transactions from master" "No,Yes" newline bitfld.long 0x00 4. "DWUWLUTFM,Disable WriteUnique and WriteLineUnique transactions from master" "Disabled,Enabled" bitfld.long 0x00 3. "DCEPTE,Disables clean/evict push to external" "No,Yes" bitfld.long 0x00 2. "LTORPTB,Limit to one request per tag bank" "Normal,Limited" newline bitfld.long 0x00 1. "EARTT,Enable arbitration replay threshold timeout" "Disabled,Enabled" bitfld.long 0x00 0. "DHPF,Disable hardware prefetch forwarding" "No,Yes" group.quad spr:0x31F23++0x00 line.quad 0x00 "L2MERRSR_EL1,L2 Memory Error Syndrome Register" bitfld.quad 0x00 63. "FATAL,Fatal bit" "0,1" hexmask.quad.byte 0x00 40.--47. 1. "OEC,Other error count" hexmask.quad.byte 0x00 32.--39. 1. "REC,Repeat error count" newline bitfld.quad 0x00 31. "VALID,Valid bit" "Not valid,Valid" hexmask.quad.byte 0x00 24.--30. 1. "RAMID,RAM Identifier" bitfld.quad 0x00 18.--21. "C/W,CPUID/Way" "CPU0 tag way 0,CPU0 tag way 1,CPU1 tag way 0,CPU1 tag way 1,CPU2 tag way 0,CPU2 tag way 1,CPU3 tag way 0,CPU3 tag way 1,?..." newline hexmask.quad.tbyte 0x00 0.--17. 1. "IND,Index" elif (CORENAME()=="CORTEXA53") group.quad SPR:0x31B02++0x0 line.long 0x00 "L2CTLR_EL1,L2 Control Register" bitfld.long 0x00 24.--25. "NCPU,Number of CPU" "1,2,3,4" bitfld.long 0x00 22. "CPUCP,CPU Cache Protection" "Disabled,Enabled" rbitfld.long 0x00 21. "SCUL2CP,SCU-L2 Cache Protection" "Disabled,Enabled" newline rbitfld.long 0x00 5. "DRAMIL,L2 data RAM input latency" "1 cycle,2 cycle" rbitfld.long 0x00 0. "DRAMOL,L2 data RAM output latency" "2 cycles,3 cycles" group.quad SPR:0x31B03++0x0 line.long 0x00 "L2ECTLR_EL1,L2 Extended Control Register" bitfld.long 0x00 30. "L2INTASYNCERR,L2 internal asynchronous error" "No error,Error" bitfld.long 0x00 29. "AXIASYNCERR,AXI asynchronous error" "No error,Error" bitfld.long 0x00 0.--2. "L2DRC,L2 dynamic retention control" "Disabled,2 ticks,8 ticks,32 ticks,64 ticks,128 ticks,256 ticks,512 ticks" group.quad SPR:0x31F00++0x00 line.long 0x00 "L2ACTLR_EL1,L2 Auxiliary Control Register" bitfld.long 0x00 30.--31. "L2VC,L2 Victim Control" "0,1,2,3" bitfld.long 0x00 29. "L2DEIEN,L2 cache data RAM error injection enable" "Disabled,Enabled" bitfld.long 0x00 24. "L2TEIEN,L2 cache tag RAM error injection enable." "Disabled,Enabled" newline bitfld.long 0x00 14. "EUCE,Enables UniqueClean evictions with data" "Disabled,Enabled" bitfld.long 0x00 3. "DCEPTE,Disables clean/evict push to external" "No,Yes" group.quad spr:0x31F23++0x00 line.quad 0x00 "L2MERRSR_EL1,L2 Memory Error Syndrome Register" bitfld.quad 0x00 63. "FATAL,Fatal bit" "0,1" hexmask.quad.byte 0x00 40.--47. 1. "OEC,Other error count" hexmask.quad.byte 0x00 32.--39. 1. "REC,Repeat error count" newline bitfld.quad 0x00 31. "VALID,Valid bit" "Not valid,Valid" hexmask.quad.byte 0x00 24.--30. 1. "RAMID,RAM Identifier" bitfld.quad 0x00 18.--21. "C/W,CPUID/Way" "CPU0 tag way 0,CPU0 tag way 1,CPU1 tag way 0,CPU1 tag way 1,CPU2 tag way 0,CPU2 tag way 1,CPU3 tag way 0,CPU3 tag way 1,?..." newline hexmask.quad.word 0x00 3.--16. 1. "RAD,RAM index address" endif tree.end tree.end tree "System Performance Monitor" group.quad SPR:0x339C0++0x00 line.long 0x0 "PMCR_EL0,Performance Monitor Control Register" hexmask.long.byte 0x00 24.--31. 1. "IMP,Implementer code" hexmask.long.byte 0x00 16.--23. 1. "IDCODE,Identification code" bitfld.long 0x00 11.--15. "N,Number of counters implemented" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 6. "LC,Long cycle count enable" "Disabled,Enabled" newline bitfld.long 0x00 5. "DP,Disable CCNT when prohibited" "No,Yes" bitfld.long 0x00 4. "X,Export Enable" "Disabled,Enabled" bitfld.long 0x00 3. "D,Clock Divider" "Every cycle,64th cycle" bitfld.long 0x00 2. "C,Clock Counter Reset" "No reset,Reset" newline bitfld.long 0x00 1. "P,Performance Counter Reset" "No reset,Reset" bitfld.long 0x00 0. "E,All Counters Enable" "Disabled,Enabled" group.quad SPR:0x339C1++0x00 line.long 0x00 "PMCNTENSET_EL0,Count Enable Set Register" bitfld.long 0x00 31. "C,PMCCNTR enable" "Disabled,Enabled" bitfld.long 0x00 30. "P30,Event Counter 30 enable bit" "Disabled,Enabled" bitfld.long 0x00 29. "P29,Event Counter 29 enable bit" "Disabled,Enabled" bitfld.long 0x00 28. "P28,Event Counter 28 enable bit" "Disabled,Enabled" newline bitfld.long 0x00 27. "P27,Event Counter 27 enable bit" "Disabled,Enabled" bitfld.long 0x00 26. "P26,Event Counter 26 enable bit" "Disabled,Enabled" bitfld.long 0x00 25. "P25,Event Counter 25 enable bit" "Disabled,Enabled" bitfld.long 0x00 24. "P24,Event Counter 24 enable bit" "Disabled,Enabled" newline bitfld.long 0x00 23. "P23,Event Counter 23 enable bit" "Disabled,Enabled" bitfld.long 0x00 22. "P22,Event Counter 22 enable bit" "Disabled,Enabled" bitfld.long 0x00 21. "P21,Event Counter 21 enable bit" "Disabled,Enabled" bitfld.long 0x00 20. "P20,Event Counter 20 enable bit" "Disabled,Enabled" newline bitfld.long 0x00 19. "P19,Event Counter 19 enable bit" "Disabled,Enabled" bitfld.long 0x00 18. "P18,Event Counter 18 enable bit" "Disabled,Enabled" bitfld.long 0x00 17. "P17,Event Counter 17 enable bit" "Disabled,Enabled" bitfld.long 0x00 16. "P16,Event Counter 16 enable bit" "Disabled,Enabled" newline bitfld.long 0x00 15. "P15,Event Counter 15 enable bit" "Disabled,Enabled" bitfld.long 0x00 14. "P14,Event Counter 14 enable bit" "Disabled,Enabled" bitfld.long 0x00 13. "P13,Event Counter 13 enable bit" "Disabled,Enabled" bitfld.long 0x00 12. "P12,Event Counter 12 enable bit" "Disabled,Enabled" newline bitfld.long 0x00 11. "P11,Event Counter 11 enable bit" "Disabled,Enabled" bitfld.long 0x00 10. "P10,Event Counter 10 enable bit" "Disabled,Enabled" bitfld.long 0x00 9. "P9,Event Counter 9 enable bit" "Disabled,Enabled" bitfld.long 0x00 8. "P8,Event Counter 8 enable bit" "Disabled,Enabled" newline bitfld.long 0x00 7. "P7,Event Counter 7 enable bit" "Disabled,Enabled" bitfld.long 0x00 6. "P6,Event Counter 6 enable bit" "Disabled,Enabled" bitfld.long 0x00 5. "P5,Event Counter 5 enable bit" "Disabled,Enabled" bitfld.long 0x00 4. "P4,Event Counter 4 enable bit" "Disabled,Enabled" newline bitfld.long 0x00 3. "P3,Event Counter 3 enable bit" "Disabled,Enabled" bitfld.long 0x00 2. "P2,Event Counter 2 enable bit" "Disabled,Enabled" bitfld.long 0x00 1. "P1,Event Counter 1 enable bit" "Disabled,Enabled" bitfld.long 0x00 0. "P0,Event Counter 0 enable bit" "Disabled,Enabled" group.quad SPR:0x339C2++0x00 line.long 0x00 "PMCNTENCLR_EL0,Count Enable Clear Register" bitfld.long 0x00 31. "C,PMCCNTR enable" "Disabled,Enabled" eventfld.long 0x00 30. "P30,Event Counter 30 clear bit" "Disabled,Enabled" eventfld.long 0x00 29. "P29,Event Counter 29 clear bit" "Disabled,Enabled" eventfld.long 0x00 28. "P28,Event Counter 28 clear bit" "Disabled,Enabled" newline eventfld.long 0x00 27. "P27,Event Counter 27 clear bit" "Disabled,Enabled" eventfld.long 0x00 26. "P26,Event Counter 26 clear bit" "Disabled,Enabled" eventfld.long 0x00 25. "P25,Event Counter 25 clear bit" "Disabled,Enabled" eventfld.long 0x00 24. "P24,Event Counter 24 clear bit" "Disabled,Enabled" newline eventfld.long 0x00 23. "P23,Event Counter 23 clear bit" "Disabled,Enabled" eventfld.long 0x00 22. "P22,Event Counter 22 clear bit" "Disabled,Enabled" eventfld.long 0x00 21. "P21,Event Counter 21 clear bit" "Disabled,Enabled" eventfld.long 0x00 20. "P20,Event Counter 20 clear bit" "Disabled,Enabled" newline eventfld.long 0x00 19. "P19,Event Counter 19 clear bit" "Disabled,Enabled" eventfld.long 0x00 18. "P18,Event Counter 18 clear bit" "Disabled,Enabled" eventfld.long 0x00 17. "P17,Event Counter 17 clear bit" "Disabled,Enabled" eventfld.long 0x00 16. "P16,Event Counter 16 clear bit" "Disabled,Enabled" newline eventfld.long 0x00 15. "P15,Event Counter 15 clear bit" "Disabled,Enabled" eventfld.long 0x00 14. "P14,Event Counter 14 clear bit" "Disabled,Enabled" eventfld.long 0x00 13. "P13,Event Counter 13 clear bit" "Disabled,Enabled" eventfld.long 0x00 12. "P12,Event Counter 12 clear bit" "Disabled,Enabled" newline eventfld.long 0x00 11. "P11,Event Counter 11 clear bit" "Disabled,Enabled" eventfld.long 0x00 10. "P10,Event Counter 10 clear bit" "Disabled,Enabled" eventfld.long 0x00 9. "P9,Event Counter 9 clear bit" "Disabled,Enabled" eventfld.long 0x00 8. "P8,Event Counter 8 clear bit" "Disabled,Enabled" newline eventfld.long 0x00 7. "P7,Event Counter 7 clear bit" "Disabled,Enabled" eventfld.long 0x00 6. "P6,Event Counter 6 clear bit" "Disabled,Enabled" eventfld.long 0x00 5. "P5,Event Counter 5 clear bit" "Disabled,Enabled" eventfld.long 0x00 4. "P4,Event Counter 4 clear bit" "Disabled,Enabled" newline eventfld.long 0x00 3. "P3,Event Counter 3 clear bit" "Disabled,Enabled" eventfld.long 0x00 2. "P2,Event Counter 2 clear bit" "Disabled,Enabled" eventfld.long 0x00 1. "P1,Event Counter 1 clear bit" "Disabled,Enabled" eventfld.long 0x00 0. "P0,Event Counter 0 clear bit" "Disabled,Enabled" group.quad SPR:0x339C3++0x00 line.long 0x00 "PMOVSCLR_EL0,Performance Monitors Overflow Flag Status Clear Register" bitfld.long 0x00 31. "C,PMCCNTR overflow" "No overflow,Overflow" eventfld.long 0x00 30. "P30,Event Counter 30 overflow clear bit" "Disabled,Enabled" eventfld.long 0x00 29. "P29,Event Counter 29 clear bit" "Disabled,Enabled" eventfld.long 0x00 28. "P28,Event Counter 28 overflow clear bit" "Disabled,Enabled" newline eventfld.long 0x00 27. "P27,Event Counter 27 overflow clear bit" "Disabled,Enabled" eventfld.long 0x00 26. "P26,Event Counter 26 overflow clear bit" "Disabled,Enabled" eventfld.long 0x00 25. "P25,Event Counter 25 overflow clear bit" "Disabled,Enabled" eventfld.long 0x00 24. "P24,Event Counter 24 overflow clear bit" "Disabled,Enabled" newline eventfld.long 0x00 23. "P23,Event Counter 23 overflow clear bit" "Disabled,Enabled" eventfld.long 0x00 22. "P22,Event Counter 22 overflow clear bit" "Disabled,Enabled" eventfld.long 0x00 21. "P21,Event Counter 21 overflow clear bit" "Disabled,Enabled" eventfld.long 0x00 20. "P20,Event Counter 20 overflow clear bit" "Disabled,Enabled" newline eventfld.long 0x00 19. "P19,Event Counter 19 overflow clear bit" "Disabled,Enabled" eventfld.long 0x00 18. "P18,Event Counter 18 overflow clear bit" "Disabled,Enabled" eventfld.long 0x00 17. "P17,Event Counter 17 overflow clear bit" "Disabled,Enabled" eventfld.long 0x00 16. "P16,Event Counter 16 overflow clear bit" "Disabled,Enabled" newline eventfld.long 0x00 15. "P15,Event Counter 15 overflow clear bit" "Disabled,Enabled" eventfld.long 0x00 14. "P14,Event Counter 14 overflow clear bit" "Disabled,Enabled" eventfld.long 0x00 13. "P13,Event Counter 13 overflow clear bit" "Disabled,Enabled" eventfld.long 0x00 12. "P12,Event Counter 12 overflow clear bit" "Disabled,Enabled" newline eventfld.long 0x00 11. "P11,Event Counter 11 overflow clear bit" "Disabled,Enabled" eventfld.long 0x00 10. "P10,Event Counter 10 overflow clear bit" "Disabled,Enabled" eventfld.long 0x00 9. "P9,Event Counter 9 overflow clear bit" "Disabled,Enabled" eventfld.long 0x00 8. "P8,Event Counter 8 overflow clear bit" "Disabled,Enabled" newline eventfld.long 0x00 7. "P7,Event Counter 7 overflow clear bit" "Disabled,Enabled" eventfld.long 0x00 6. "P6,Event Counter 6 overflow clear bit" "Disabled,Enabled" eventfld.long 0x00 5. "P5,Event Counter 5 overflow clear bit" "Disabled,Enabled" eventfld.long 0x00 4. "P4,Event Counter 4 overflow clear bit" "Disabled,Enabled" newline eventfld.long 0x00 3. "P3,Event Counter 3 overflow clear bit" "Disabled,Enabled" eventfld.long 0x00 2. "P2,Event Counter 2 overflow clear bit" "Disabled,Enabled" eventfld.long 0x00 1. "P1,Event Counter 1 overflow clear bit" "Disabled,Enabled" eventfld.long 0x00 0. "P0,Event Counter 0 overflow clear bit" "Disabled,Enabled" wgroup.quad SPR:0x339C4++0x00 line.long 0x00 "PMSWINC_EL0,Performance Monitor Software Increment" bitfld.long 0x00 30. "P30,Increment PMN30" "No action,Increment" bitfld.long 0x00 29. "P29,Increment PMN29" "No action,Increment" bitfld.long 0x00 28. "P28,Increment PMN28" "No action,Increment" bitfld.long 0x00 27. "P27,Increment PMN27" "No action,Increment" newline bitfld.long 0x00 26. "P26,Increment PMN26" "No action,Increment" bitfld.long 0x00 25. "P25,Increment PMN25" "No action,Increment" bitfld.long 0x00 24. "P24,Increment PMN24" "No action,Increment" bitfld.long 0x00 23. "P23,Increment PMN23" "No action,Increment" newline bitfld.long 0x00 22. "P22,Increment PMN22" "No action,Increment" bitfld.long 0x00 21. "P21,Increment PMN21" "No action,Increment" bitfld.long 0x00 20. "P20,Increment PMN20" "No action,Increment" bitfld.long 0x00 19. "P19,Increment PMN19" "No action,Increment" newline bitfld.long 0x00 18. "P18,Increment PMN18" "No action,Increment" bitfld.long 0x00 17. "P17,Increment PMN17" "No action,Increment" bitfld.long 0x00 16. "P16,Increment PMN16" "No action,Increment" bitfld.long 0x00 15. "P15,Increment PMN15" "No action,Increment" newline bitfld.long 0x00 14. "P14,Increment PMN14" "No action,Increment" bitfld.long 0x00 13. "P13,Increment PMN13" "No action,Increment" bitfld.long 0x00 12. "P12,Increment PMN12" "No action,Increment" bitfld.long 0x00 11. "P11,Increment PMN11" "No action,Increment" newline bitfld.long 0x00 10. "P10,Increment PMN10" "No action,Increment" bitfld.long 0x00 9. "P9,Increment PMN9" "No action,Increment" bitfld.long 0x00 8. "P8,Increment PMN8" "No action,Increment" bitfld.long 0x00 7. "P7,Increment PMN7" "No action,Increment" newline bitfld.long 0x00 6. "P6,Increment PMN6" "No action,Increment" bitfld.long 0x00 5. "P5,Increment PMN5" "No action,Increment" bitfld.long 0x00 4. "P4,Increment PMN4" "No action,Increment" bitfld.long 0x00 3. "P3,Increment PMN3" "No action,Increment" newline bitfld.long 0x00 2. "P2,Increment PMN2" "No action,Increment" bitfld.long 0x00 1. "P1,Increment PMN1" "No action,Increment" bitfld.long 0x00 0. "P0,Increment PMN0" "No action,Increment" group.quad SPR:0x339C5++0x00 line.long 0x00 "PMSELR_EL0,Performance Monitor Select Register" bitfld.long 0x00 0.--4. "SEL,Current event counter select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" tree.open "Common Event Identification Registers" if (CORENAME()=="CORTEXA57") rgroup.quad SPR:0x339C6++0x0 line.long 0x00 "PMCEID0_EL0,Common Event Identification Register 0" bitfld.long 0x00 30. "EVENT30,Chain" "Not implemented,Implemented" bitfld.long 0x00 29. "EVENT29,Bus cycle" "Not implemented,Implemented" bitfld.long 0x00 28. "EVENT28,Instruction architecturally executed condition check pass" "Not implemented,Implemented" newline bitfld.long 0x00 27. "EVENT27,Instruction speculatively executed" "Not implemented,Implemented" bitfld.long 0x00 26. "EVENT26,Local memory error" "Not implemented,Implemented" bitfld.long 0x00 25. "EVENT25,Bus access" "Not implemented,Implemented" newline bitfld.long 0x00 24. "EVENT24,Level 2 data cache write-back" "Not implemented,Implemented" bitfld.long 0x00 23. "EVENT23,Level 2 data cache refill" "Not implemented,Implemented" bitfld.long 0x00 22. "EVENT22,Level 2 data cache access" "Not implemented,Implemented" newline bitfld.long 0x00 21. "EVENT21,Level 1 data cache write-back" "Not implemented,Implemented" bitfld.long 0x00 20. "EVENT20,Level 1 instruction cache access" "Not implemented,Implemented" bitfld.long 0x00 19. "EVENT19,Data memory access" "Not implemented,Implemented" newline bitfld.long 0x00 18. "EVENT18,Predictable branch speculatively executed" "Not implemented,Implemented" bitfld.long 0x00 17. "EVENT17,Cycle" "Not implemented,Implemented" bitfld.long 0x00 16. "EVENT16,Mispredicted or not predicted branch speculatively executed" "Not implemented,Implemented" newline bitfld.long 0x00 15. "EVENT15,Instruction architecturally executed condition check pass unaligned load or store" "Not implemented,Implemented" bitfld.long 0x00 14. "EVENT14,Instruction architecturally executed condition check pass procedure return" "Not implemented,Implemented" bitfld.long 0x00 13. "EVENT13,Instruction architecturally executed immediate branch" "Not implemented,Implemented" newline bitfld.long 0x00 12. "EVENT12,Instruction architecturally executed condition check pass software change of the PC" "Not implemented,Implemented" bitfld.long 0x00 11. "EVENT11,Instruction architecturally executed condition check pass write to CONTEXTIDR" "Not implemented,Implemented" bitfld.long 0x00 10. "EVENT10,Instruction architecturally executed condition check pass exception return" "Not implemented,Implemented" newline bitfld.long 0x00 9. "EVENT9,Exception taken" "Not implemented,Implemented" bitfld.long 0x00 8. "EVENT8,Instruction architecturally executed" "Not implemented,Implemented" bitfld.long 0x00 7. "EVENT7,Instruction architecturally executed condition check pass store" "Not implemented,Implemented" newline bitfld.long 0x00 6. "EVENT6,Instruction architecturally executed condition check pass load" "Not implemented,Implemented" bitfld.long 0x00 5. "EVENT5,Level 1 data TLB refill" "Not implemented,Implemented" bitfld.long 0x00 4. "EVENT4,Level 1 data cache access" "Not implemented,Implemented" newline bitfld.long 0x00 3. "EVENT3,Level 1 data cache refill" "Not implemented,Implemented" bitfld.long 0x00 2. "EVENT2,Level 1 instruction TLB refill" "Not implemented,Implemented" bitfld.long 0x00 1. "EVENT1,Level 1 instruction cache refill" "Not implemented,Implemented" newline bitfld.long 0x00 0. "EVENT0,Instruction architecturally executed condition check pass software increment" "Not implemented,Implemented" elif (CORENAME()=="CORTEXA53") rgroup.quad SPR:0x339C6++0x0 line.long 0x00 "PMCEID0_EL0,Common Event Identification Register 0" bitfld.long 0x00 31. "EVENT31,L1 Data cache allocate" "Not implemented,Implemented" bitfld.long 0x00 30. "EVENT30,Chain" "Not implemented,Implemented" bitfld.long 0x00 29. "EVENT29,Bus cycle" "Not implemented,Implemented" newline bitfld.long 0x00 28. "EVENT28,Instruction architecturally executed condition check pass" "Not implemented,Implemented" bitfld.long 0x00 27. "EVENT27,Instruction speculatively executed" "Not implemented,Implemented" bitfld.long 0x00 26. "EVENT26,Local memory error" "Not implemented,Implemented" newline bitfld.long 0x00 25. "EVENT25,Bus access" "Not implemented,Implemented" bitfld.long 0x00 24. "EVENT24,Level 2 data cache write-back" "Not implemented,Implemented" bitfld.long 0x00 23. "EVENT23,Level 2 data cache refill" "Not implemented,Implemented" newline bitfld.long 0x00 22. "EVENT22,Level 2 data cache access" "Not implemented,Implemented" bitfld.long 0x00 21. "EVENT21,Level 1 data cache write-back" "Not implemented,Implemented" bitfld.long 0x00 20. "EVENT20,Level 1 instruction cache access" "Not implemented,Implemented" newline bitfld.long 0x00 19. "EVENT19,Data memory access" "Not implemented,Implemented" bitfld.long 0x00 18. "EVENT18,Predictable branch speculatively executed" "Not implemented,Implemented" bitfld.long 0x00 17. "EVENT17,Cycle" "Not implemented,Implemented" newline bitfld.long 0x00 16. "EVENT16,Mispredicted or not predicted branch speculatively executed" "Not implemented,Implemented" bitfld.long 0x00 15. "EVENT15,Instruction architecturally executed condition check pass unaligned load or store" "Not implemented,Implemented" bitfld.long 0x00 14. "EVENT14,Instruction architecturally executed condition check pass procedure return" "Not implemented,Implemented" newline bitfld.long 0x00 13. "EVENT13,Instruction architecturally executed immediate branch" "Not implemented,Implemented" bitfld.long 0x00 12. "EVENT12,Instruction architecturally executed condition check pass software change of the PC" "Not implemented,Implemented" bitfld.long 0x00 11. "EVENT11,Instruction architecturally executed condition check pass write to CONTEXTIDR" "Not implemented,Implemented" newline bitfld.long 0x00 10. "EVENT10,Instruction architecturally executed condition check pass exception return" "Not implemented,Implemented" bitfld.long 0x00 9. "EVENT9,Exception taken" "Not implemented,Implemented" bitfld.long 0x00 8. "EVENT8,Instruction architecturally executed" "Not implemented,Implemented" newline bitfld.long 0x00 7. "EVENT7,Instruction architecturally executed condition check pass store" "Not implemented,Implemented" bitfld.long 0x00 6. "EVENT6,Instruction architecturally executed condition check pass load" "Not implemented,Implemented" bitfld.long 0x00 5. "EVENT5,Level 1 data TLB refill" "Not implemented,Implemented" newline bitfld.long 0x00 4. "EVENT4,Level 1 data cache access" "Not implemented,Implemented" bitfld.long 0x00 3. "EVENT3,Level 1 data cache refill" "Not implemented,Implemented" bitfld.long 0x00 2. "EVENT2,Level 1 instruction TLB refill" "Not implemented,Implemented" newline bitfld.long 0x00 1. "EVENT1,Level 1 instruction cache refill" "Not implemented,Implemented" bitfld.long 0x00 0. "EVENT0,Instruction architecturally executed condition check pass software increment" "Not implemented,Implemented" endif rgroup.quad SPR:0x339C7++0x0 line.long 0x00 "PMCEID1_EL0,Common Event Identification Register 1" bitfld.long 0x00 0. "EVENT32,Level 2 cache allocate" "Not implemented,Implemented" tree.end newline group.quad spr:0x339D0++0x00 line.quad 0x00 "PMCCNTR_EL0,Performance Monitor Cycle Count Register" group.quad SPR:0x339D1++0x00 line.long 0x00 "PMXEVTYPER_EL0,Performance Monitor Event Type Register" group.quad SPR:0x339D2++0x00 line.long 0x00 "PMXEVCNTR_EL0,Performance Monitor Event Count Register" group.quad SPR:0x339E0++0x00 line.long 0x00 "PMUSERENR_EL0,Performance Monitor User Enable Register" bitfld.long 0x00 3. "ER,Event counter read enable" "Disabled,Enabled" bitfld.long 0x00 2. "EC,Cycle counter read enable" "Disabled,Enabled" bitfld.long 0x00 1. "SW,Software Increment write enable" "Disabled,Enabled" bitfld.long 0x00 0. "EN,User mode access enable" "Disabled,Enabled" group.quad SPR:0x309E1++0x00 line.long 0x00 "PMINTENSET_EL1,Performance Monitor Interrupt Enable Set" bitfld.long 0x00 31. "C,Cycle counter Overflow Interrupt clear" "Disabled,Enabled" bitfld.long 0x00 30. "P30,PMCNT30 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 29. "P29,PMCNT29 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 28. "P28,PMCNT28 Overflow Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 27. "P27,PMCNT27 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. "P26,PMCNT26 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. "P25,PMCNT25 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. "P24,PMCNT24 Overflow Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 23. "P23,PMCNT23 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22. "P22,PMCNT22 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 21. "P21,PMCNT21 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 20. "P20,PMCNT20 Overflow Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 19. "P19,PMCNT19 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 18. "P18,PMCNT18 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 17. "P17,PMCNT17 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 16. "P16,PMCNT16 Overflow Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 15. "P15,PMCNT15 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 14. "P14,PMCNT14 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 13. "P13,PMCNT13 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 12. "P12,PMCNT12 Overflow Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 11. "P11,PMCNT11 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 10. "P10,PMCNT10 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 9. "P9,PMCNT9 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 8. "P8,PMCNT8 Overflow Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 7. "P7,PMCNT7 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 6. "P6,PMCNT6 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. "P5,PMCNT5 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. "P4,PMCNT4 Overflow Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 3. "P3,PMCNT3 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 2. "P2,PMCNT2 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. "P1,PMCNT1 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. "P0,PMCNT0 Overflow Interrupt Enable" "Disabled,Enabled" group.quad SPR:0x309E2++0x00 line.long 0x00 "PMINTENCLR_EL1,Performance Monitor Interrupt Enable Clear" bitfld.long 0x00 31. "C,PMCCNTR enable" "Disabled,Enabled" eventfld.long 0x00 30. "P30,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 29. "P29,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 28. "P28,Overflow Interrupt Clear" "Disabled,Enabled" newline eventfld.long 0x00 27. "P27,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 26. "P26,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 25. "P25,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 24. "P24,Overflow Interrupt Clear" "Disabled,Enabled" newline eventfld.long 0x00 23. "P23,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 22. "P22,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 21. "P21,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 20. "P20,Overflow Interrupt Clear" "Disabled,Enabled" newline eventfld.long 0x00 19. "P19,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 18. "P18,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 17. "P17,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 16. "P16,Overflow Interrupt Clear" "Disabled,Enabled" newline eventfld.long 0x00 15. "P15,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 14. "P14,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 13. "P13,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 12. "P12,Overflow Interrupt Clear" "Disabled,Enabled" newline eventfld.long 0x00 11. "P11,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 10. "P10,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 9. "P9,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 8. "P8,Overflow Interrupt Clear" "Disabled,Enabled" newline eventfld.long 0x00 7. "P7,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 6. "P6,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 5. "P5,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 4. "P4,Overflow Interrupt Clear" "Disabled,Enabled" newline eventfld.long 0x00 3. "P3,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 2. "P2,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 1. "P1,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 0. "P0,Overflow Interrupt Clear" "Disabled,Enabled" group.quad SPR:0x339E3++0x00 line.long 0x00 "PMOVSSET_EL0,Performance Monitor Overflow Flag Status Set Register" group.quad SPR:(0x33E80+0x0)++0x00 line.long 0x00 "PMEVCNTR0_EL0,Performance Monitors Event Count Register 0" group.quad SPR:(0x33EC0+0x0)++0x00 line.long 0x00 "PMEVTYPER0_EL0,Performance Monitors Selected Event Type Register 0" bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled" bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled" newline bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled" bitfld.long 0x00 26. "M,Secure EL3 filtering bit" "Disabled,Enabled" hexmask.long.word 0x00 0.--9. 1. "EVTCOUNT,Event to count" group.quad SPR:(0x33E80+0x1)++0x00 line.long 0x00 "PMEVCNTR1_EL0,Performance Monitors Event Count Register 1" group.quad SPR:(0x33EC0+0x1)++0x00 line.long 0x00 "PMEVTYPER1_EL0,Performance Monitors Selected Event Type Register 1" bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled" bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled" newline bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled" bitfld.long 0x00 26. "M,Secure EL3 filtering bit" "Disabled,Enabled" hexmask.long.word 0x00 0.--9. 1. "EVTCOUNT,Event to count" group.quad SPR:(0x33E80+0x2)++0x00 line.long 0x00 "PMEVCNTR2_EL0,Performance Monitors Event Count Register 2" group.quad SPR:(0x33EC0+0x2)++0x00 line.long 0x00 "PMEVTYPER2_EL0,Performance Monitors Selected Event Type Register 2" bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled" bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled" newline bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled" bitfld.long 0x00 26. "M,Secure EL3 filtering bit" "Disabled,Enabled" hexmask.long.word 0x00 0.--9. 1. "EVTCOUNT,Event to count" group.quad SPR:(0x33E80+0x3)++0x00 line.long 0x00 "PMEVCNTR3_EL0,Performance Monitors Event Count Register 3" group.quad SPR:(0x33EC0+0x3)++0x00 line.long 0x00 "PMEVTYPER3_EL0,Performance Monitors Selected Event Type Register 3" bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled" bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled" newline bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled" bitfld.long 0x00 26. "M,Secure EL3 filtering bit" "Disabled,Enabled" hexmask.long.word 0x00 0.--9. 1. "EVTCOUNT,Event to count" group.quad SPR:(0x33E80+0x4)++0x00 line.long 0x00 "PMEVCNTR4_EL0,Performance Monitors Event Count Register 4" group.quad SPR:(0x33EC0+0x4)++0x00 line.long 0x00 "PMEVTYPER4_EL0,Performance Monitors Selected Event Type Register 4" bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled" bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled" newline bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled" bitfld.long 0x00 26. "M,Secure EL3 filtering bit" "Disabled,Enabled" hexmask.long.word 0x00 0.--9. 1. "EVTCOUNT,Event to count" group.quad SPR:(0x33E80+0x5)++0x00 line.long 0x00 "PMEVCNTR5_EL0,Performance Monitors Event Count Register 5" group.quad SPR:(0x33EC0+0x5)++0x00 line.long 0x00 "PMEVTYPER5_EL0,Performance Monitors Selected Event Type Register 5" bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled" bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled" newline bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled" bitfld.long 0x00 26. "M,Secure EL3 filtering bit" "Disabled,Enabled" hexmask.long.word 0x00 0.--9. 1. "EVTCOUNT,Event to count" group.quad SPR:0x33EF7++0x00 line.long 0x00 "PMCCFILTR_EL0,Performance Monitors Cycle Count Filter Register" bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled" bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled" newline bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled" bitfld.long 0x00 26. "M,Secure EL3 filtering bit" "Disabled,Enabled" tree.end tree "System Timer Registers" group.quad SPR:0x33E00++0x00 line.long 0x00 "CNTFRQ_EL0,Counter Frequency Register" rgroup.quad spr:0x33E01++0x00 line.quad 0x00 "CNTPCT_EL0,Counter Physical Count Register" group.quad SPR:0x30E10++0x00 line.long 0x00 "CNTKCTL_EL1,Timer PL1 Control Register" bitfld.long 0x00 9. "EL0PTEN,Controls whether the physical timer registers are accessible from EL0 modes" "Not accessible,Accessible" bitfld.long 0x00 8. "EL0VTEN,Controls whether the virtual timer registers are accessible from EL0 modes" "Not accessible,Accessible" bitfld.long 0x00 4.--7. "EVNTI,Selects which bit of CNTVCT is the trigger for the event stream generated from the virtual counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. "EVNTDIR,Controls which transition of the CNTVCT trigger bit" "0 to 1,1 to 0" newline bitfld.long 0x00 2. "EVNTEN,Enables the generation of an event stream from the virtual counter" "Disabled,Enabled" bitfld.long 0x00 1. "EL0VCTEN,Controls whether the virtual counter, CNTVCT, and the frequency register CNTFRQ, are accessible from EL0 modes" "Not accessible,Accessible" bitfld.long 0x00 0. "EL0PCTEN,Controls whether the physical counter, CNTPCT, and the frequency register CNTFRQ, are accessible from EL0 modes" "Not accessible,Accessible" group.quad SPR:0x33E20++0x00 line.long 0x00 "CNTP_TVAL_EL0,Counter-timer Physical Timer TimerValue register" group.quad SPR:0x33E21++0x00 line.long 0x00 "CNTP_CTL_EL0,Counter PL1 Physical Timer Control Register" bitfld.long 0x00 2. "ISTATUS,The status of the timer interrupt" "No interrupt,Interrupt" bitfld.long 0x00 1. "IMASK,Timer interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 0. "ENABLE,Enables the timer" "Disabled,Enabled" group.quad SPR:0x33E30++0x00 line.long 0x00 "CNTV_TVAL_EL0,Counter PL1 Virtual Timer Value Register" group.quad SPR:0x33E31++0x00 line.long 0x00 "CNTV_CTL_EL0,Counter PL1 Virtual Timer Control Register" bitfld.long 0x00 2. "ISTATUS,The status of the timer interrupt" "No interrupt,Interrupt" bitfld.long 0x00 1. "IMASK,Timer interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 0. "ENABLE,Enables the timer" "Disabled,Enabled" group.quad spr:0x33E02++0x00 line.quad 0x00 "CNTVCT_EL0,Counter Virtual Count Register" group.quad spr:0x33E22++0x00 line.quad 0x00 "CNTP_CVAL_EL0,Counter PL1 Physical Compare Value Register" group.quad spr:0x33E32++0x00 line.quad 0x00 "CNTV_CVAL_EL0,Counter PL1 Virtual Compare Value Register" group.quad spr:0x34E03++0x00 line.quad 0x00 "CNTVOFF_EL2,Counter Virtual Offset Register" group.quad SPR:0x34E10++0x00 line.long 0x00 "CNTHCTL_EL2,Counter Non-secure PL2 Control Register" bitfld.long 0x00 4.--7. "EVNTI,Selects which bit is the trigger for the event stream generated from counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 3. "EVNTDIR,Controls which transition of the CNTVCT trigger bit" "0 to 1,1 to 0" bitfld.long 0x00 2. "EVNTEN,Enables the generation of an event stream from the virtual counter" "Disabled,Enabled" newline bitfld.long 0x00 1. "EL0VCTEN,Controls whether the virtual counter, CNTVCT, and the frequency register CNTFRQ, are accessible from EL0 modes" "Not accessible,Accessible" bitfld.long 0x00 0. "EL0PCTEN,Controls whether the physical counter, CNTPCT, and the frequency register CNTFRQ, are accessible from EL0 modes" "Not accessible,Accessible" group.quad SPR:0x34E20++0x00 line.long 0x00 "CNTHP_TVAL_EL2,Counter Non-secure PL2 Physical Timer Value Register" group.quad SPR:0x34E21++0x00 line.long 0x00 "CNTHP_CTL_EL2,Counter Non-secure PL2 Physical Timer Control Register" rbitfld.long 0x00 2. "ISTATUS,The status of the timer interrupt" "No interrupt,Interrupt" bitfld.long 0x00 1. "IMASK,Timer interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 0. "ENABLE,Enables the timer" "Disabled,Enabled" group.quad spr:0x34E22++0x00 line.quad 0x00 "CNTHP_CVAL_EL2,Counter Non-secure PL2 Physical Compare Value Register" group.quad SPR:0x37E20++0x00 line.long 0x00 "CNTPS_TVAL_EL1,Counter-timer Physical SecureTimer TimerValue register" group.quad SPR:0x37E21++0x00 line.long 0x00 "CNTPS_CTL_EL1,Counter-timer Physical Secure Timer Control register" rbitfld.long 0x00 2. "ISTATUS,The status of the timer interrupt" "No interrupt,Interrupt" bitfld.long 0x00 1. "IMASK,Timer interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 0. "ENABLE,Enables the timer" "Disabled,Enabled" group.quad spr:0x37E22++0x00 line.quad 0x00 "CNTPS_CVAL_EL1,Counter-timer Physical Secure Timer CompareValue register" tree.end tree "Generic Interrupt Controller CPU Interface" tree "AArch64 GIC Physical CPU Interface System Registers" tree.open "Interrupt Controller Active Priorities Registers" group.quad spr:0x30C84++0x00 line.quad 0x00 "ICC_AP0R0_EL1,Interrupt Controller Active Priorities Group 0 Register 0 (EL1)" bitfld.quad 0x00 31. "P31,Group 0 interrupt active with priority level 31" "No interrupt,Interrupt" bitfld.quad 0x00 30. "P30,Group 0 interrupt active with priority level 30" "No interrupt,Interrupt" bitfld.quad 0x00 29. "P29,Group 0 interrupt active with priority level 29" "No interrupt,Interrupt" bitfld.quad 0x00 28. "P28,Group 0 interrupt active with priority level 28" "No interrupt,Interrupt" bitfld.quad 0x00 27. "P27,Group 0 interrupt active with priority level 27" "No interrupt,Interrupt" newline bitfld.quad 0x00 26. "P26,Group 0 interrupt active with priority level 26" "No interrupt,Interrupt" bitfld.quad 0x00 25. "P25,Group 0 interrupt active with priority level 25" "No interrupt,Interrupt" bitfld.quad 0x00 24. "P24,Group 0 interrupt active with priority level 24" "No interrupt,Interrupt" bitfld.quad 0x00 23. "P23,Group 0 interrupt active with priority level 23" "No interrupt,Interrupt" bitfld.quad 0x00 22. "P22,Group 0 interrupt active with priority level 22" "No interrupt,Interrupt" newline bitfld.quad 0x00 21. "P21,Group 0 interrupt active with priority level 21" "No interrupt,Interrupt" bitfld.quad 0x00 20. "P20,Group 0 interrupt active with priority level 20" "No interrupt,Interrupt" bitfld.quad 0x00 19. "P19,Group 0 interrupt active with priority level 19" "No interrupt,Interrupt" bitfld.quad 0x00 18. "P18,Group 0 interrupt active with priority level 18" "No interrupt,Interrupt" bitfld.quad 0x00 17. "P17,Group 0 interrupt active with priority level 17" "No interrupt,Interrupt" newline bitfld.quad 0x00 16. "P16,Group 0 interrupt active with priority level 16" "No interrupt,Interrupt" bitfld.quad 0x00 15. "P15,Group 0 interrupt active with priority level 15" "No interrupt,Interrupt" bitfld.quad 0x00 14. "P14,Group 0 interrupt active with priority level 14" "No interrupt,Interrupt" bitfld.quad 0x00 13. "P13,Group 0 interrupt active with priority level 13" "No interrupt,Interrupt" bitfld.quad 0x00 12. "P12,Group 0 interrupt active with priority level 12" "No interrupt,Interrupt" newline bitfld.quad 0x00 11. "P11,Group 0 interrupt active with priority level 11" "No interrupt,Interrupt" bitfld.quad 0x00 10. "P10,Group 0 interrupt active with priority level 10" "No interrupt,Interrupt" bitfld.quad 0x00 9. "P9,Group 0 interrupt active with priority level 9" "No interrupt,Interrupt" bitfld.quad 0x00 8. "P8,Group 0 interrupt active with priority level 8" "No interrupt,Interrupt" bitfld.quad 0x00 7. "P7,Group 0 interrupt active with priority level 7" "No interrupt,Interrupt" newline bitfld.quad 0x00 6. "P6,Group 0 interrupt active with priority level 6" "No interrupt,Interrupt" bitfld.quad 0x00 5. "P5,Group 0 interrupt active with priority level 5" "No interrupt,Interrupt" bitfld.quad 0x00 4. "P4,Group 0 interrupt active with priority level 4" "No interrupt,Interrupt" bitfld.quad 0x00 3. "P3,Group 0 interrupt active with priority level 3" "No interrupt,Interrupt" bitfld.quad 0x00 2. "P2,Group 0 interrupt active with priority level 2" "No interrupt,Interrupt" newline bitfld.quad 0x00 1. "P1,Group 0 interrupt active with priority level 1" "No interrupt,Interrupt" bitfld.quad 0x00 0. "P0,Group 0 interrupt active with priority level 0" "No interrupt,Interrupt" group.quad spr:0x30C90++0x00 line.quad 0x00 "ICC_AP1R0_EL1,Interrupt Controller Active Priorities Group 1 Register 0 (EL1)" bitfld.quad 0x00 31. "P31,Group 1 interrupt active with priority level 31" "No interrupt,Interrupt" bitfld.quad 0x00 30. "P30,Group 1 interrupt active with priority level 30" "No interrupt,Interrupt" bitfld.quad 0x00 29. "P29,Group 1 interrupt active with priority level 29" "No interrupt,Interrupt" bitfld.quad 0x00 28. "P28,Group 1 interrupt active with priority level 28" "No interrupt,Interrupt" bitfld.quad 0x00 27. "P27,Group 1 interrupt active with priority level 27" "No interrupt,Interrupt" newline bitfld.quad 0x00 26. "P26,Group 1 interrupt active with priority level 26" "No interrupt,Interrupt" bitfld.quad 0x00 25. "P25,Group 1 interrupt active with priority level 25" "No interrupt,Interrupt" bitfld.quad 0x00 24. "P24,Group 1 interrupt active with priority level 24" "No interrupt,Interrupt" bitfld.quad 0x00 23. "P23,Group 1 interrupt active with priority level 23" "No interrupt,Interrupt" bitfld.quad 0x00 22. "P22,Group 1 interrupt active with priority level 22" "No interrupt,Interrupt" newline bitfld.quad 0x00 21. "P21,Group 1 interrupt active with priority level 21" "No interrupt,Interrupt" bitfld.quad 0x00 20. "P20,Group 1 interrupt active with priority level 20" "No interrupt,Interrupt" bitfld.quad 0x00 19. "P19,Group 1 interrupt active with priority level 19" "No interrupt,Interrupt" bitfld.quad 0x00 18. "P18,Group 1 interrupt active with priority level 18" "No interrupt,Interrupt" bitfld.quad 0x00 17. "P17,Group 1 interrupt active with priority level 17" "No interrupt,Interrupt" newline bitfld.quad 0x00 16. "P16,Group 1 interrupt active with priority level 16" "No interrupt,Interrupt" bitfld.quad 0x00 15. "P15,Group 1 interrupt active with priority level 15" "No interrupt,Interrupt" bitfld.quad 0x00 14. "P14,Group 1 interrupt active with priority level 14" "No interrupt,Interrupt" bitfld.quad 0x00 13. "P13,Group 1 interrupt active with priority level 13" "No interrupt,Interrupt" bitfld.quad 0x00 12. "P12,Group 1 interrupt active with priority level 12" "No interrupt,Interrupt" newline bitfld.quad 0x00 11. "P11,Group 1 interrupt active with priority level 11" "No interrupt,Interrupt" bitfld.quad 0x00 10. "P10,Group 1 interrupt active with priority level 10" "No interrupt,Interrupt" bitfld.quad 0x00 9. "P9,Group 1 interrupt active with priority level 9" "No interrupt,Interrupt" bitfld.quad 0x00 8. "P8,Group 1 interrupt active with priority level 8" "No interrupt,Interrupt" bitfld.quad 0x00 7. "P7,Group 1 interrupt active with priority level 7" "No interrupt,Interrupt" newline bitfld.quad 0x00 6. "P6,Group 1 interrupt active with priority level 6" "No interrupt,Interrupt" bitfld.quad 0x00 5. "P5,Group 1 interrupt active with priority level 5" "No interrupt,Interrupt" bitfld.quad 0x00 4. "P4,Group 1 interrupt active with priority level 4" "No interrupt,Interrupt" bitfld.quad 0x00 3. "P3,Group 1 interrupt active with priority level 3" "No interrupt,Interrupt" bitfld.quad 0x00 2. "P2,Group 1 interrupt active with priority level 2" "No interrupt,Interrupt" newline bitfld.quad 0x00 1. "P1,Group 1 interrupt active with priority level 1" "No interrupt,Interrupt" bitfld.quad 0x00 0. "P0,Group 1 interrupt active with priority level 0" "No interrupt,Interrupt" tree.end newline if (((per.q(spr:0x30CB6))&0x10000000000)==0x00) wgroup.quad spr:0x30CB6++0x00 line.quad 0x00 "ICC_ASGI1R_EL1,Interrupt Controller Alias Software Generated Interrupt Group 1 Register" hexmask.quad.byte 0x00 48.--55. 1. "AFF3,Affinity 3" newline bitfld.quad 0x00 44.--47. "RS,Range selector" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 40. "IRM,Interrupt routing mode" "Target list,All PEs excluding self" newline hexmask.quad.byte 0x00 32.--39. 1. "AFF2,Affinity 2" bitfld.quad 0x00 24.--27. "INTID,The INTID of the SGI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.quad.byte 0x00 16.--23. 1. "AFF1,Affinity 1" hexmask.quad.word 0x00 0.--15. 1. "TARGETLIST,The set of PEs for which SGI interrupts will be generated" else wgroup.quad spr:0x30CB6++0x00 line.quad 0x00 "ICC_ASGI1R_EL1,Interrupt Controller Alias Software Generated Interrupt Group 1 Register" newline bitfld.quad 0x00 44.--47. "RS,Range selector" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 40. "IRM,Interrupt routing mode" "Target list,All PEs excluding self" newline bitfld.quad 0x00 24.--27. "INTID,The INTID of the SGI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline endif group.quad spr:0x30C83++0x00 line.quad 0x00 "ICC_BPR0_EL1,Interrupt Controller Binary Point Register 0" bitfld.quad 0x00 0.--2. "BINARYPOINT,Interrupt Priority Field Control and Interrupt Preemption Control" "[7:1]-[0],[7:2]-[1:0],[7:3]-[2:0],[7:4]-[3:0],[7:5]-[4:0],[7:6]-[5:0],[7]-[6:0],No preemption-[7:0]" group.quad spr:0x30CC3++0x00 line.quad 0x00 "ICC_BPR1_EL1,Interrupt Controller Binary Point Register 1" bitfld.quad 0x00 0.--2. "BINARYPOINT,Interrupt Priority Field Control and Interrupt Preemption Control" "Reserved,[7:1]-[0],[7:2]-[1:0],[7:3]-[2:0],[7:4]-[3:0],[7:5]-[4:0],[7:6]-[5:0],[7]-[6:0]" group.quad spr:0x30CC4++0x00 line.quad 0x00 "ICC_CTLR_EL1,Interrupt Controller Control Register (EL1)" rbitfld.quad 0x00 19. "EXTRANGE,Extended INTID range" "Reserved,Supported" rbitfld.quad 0x00 18. "RSS,Range selector support" "0 - 15,0 - 255" newline rbitfld.quad 0x00 15. "A3V,Affinity 3 Valid" "Zero,Non-zero" rbitfld.quad 0x00 14. "SEIS,Indicates whether the CPU interface supports local generation of SEIs" "Not supported,Supported" rbitfld.quad 0x00 11.--13. "IDBITS,The number of physical interrupt identifier bits supported" "16 bits,24 bits,?..." newline rbitfld.quad 0x00 8.--10. "PRIBITS,The number of priority bits implemented minus one" "0,1,2,3,4,5,6,7" bitfld.quad 0x00 6. "PMHE,Controls whether the priority mask Register is used as a hint for interrupt distribution" "Disabled,Enabled" bitfld.quad 0x00 1. "EOIMODE,Controls whether a write to an End of Interrupt Register also deactivates the interrupt" "Disabled,Enabled" newline bitfld.quad 0x00 0. "CBPR,Controls whether the same Register is used for interrupt preemption of both Group 0 and Group 1 interrupts" "Separate registers,Same Register" group.quad spr:0x36CC4++0x00 line.quad 0x00 "ICC_CTLR_EL3,Interrupt Controller Control Register (EL3)" rbitfld.quad 0x00 19. "ExtRange,Extended INTID range" "Not supported,Supported" rbitfld.quad 0x00 18. "RSS,Range Selector Support" "0 - 15,0 - 255" newline rbitfld.quad 0x00 17. "NDS,Disable Security not supported" "Supported,Not supported" rbitfld.quad 0x00 15. "A3V,Affinity 3 Valid" "Not supported,Supported" rbitfld.quad 0x00 14. "SEIS,Indicates whether the CPU interface supports generation of SEIs" "Not supported,Supported" newline rbitfld.quad 0x00 11.--13. "IDBITS,The number of physical interrupt identifier bits supported" "16 bits,24 bits,?..." rbitfld.quad 0x00 8.--10. "PRIBITS,The number of priority bits implemented minus one" "0,1,2,3,4,5,6,7" bitfld.quad 0x00 6. "PMHE,Priority Mask Hint Enable" "Disabled,Enabled" newline bitfld.quad 0x00 4. "EOIMODE_EL1NS,Controls whether a write to an End of Interrupt Register also deactivates the interrupt (Non-secure EL1 and EL2)" "Priority drop/Deactivation,Priority drop" bitfld.quad 0x00 3. "EOIMODE_EL1S,Controls whether a write to an End of Interrupt Register also deactivates the interrupt (Secure EL1)" "Priority drop/Deactivation,Priority drop" bitfld.quad 0x00 2. "EOIMODE_EL3,Controls whether a write to an End of Interrupt Register also deactivates the interrupt (EL3)" "Enabled,Disabled" newline bitfld.quad 0x00 1. "CBPR_EL1NS,Controls whether the same Register is used for interrupt preemption of both Group 0 and Group 1 Non-secure interrupts at EL1" "Separate registers,Same Register" bitfld.quad 0x00 0. "CBPR_EL1S,Controls whether the same Register is used for interrupt preemption of both Group 0 and Group 1 Secure interrupts in Secure non-Monitor modes" "Separate registers,Same Register" if (((per.q(spr:0x30CC4))&0x3800)==0x00) wgroup.quad spr:0x30CB1++0x00 line.quad 0x00 "ICC_DIR_EL1,Interrupt Controller Deactivate Interrupt Register" hexmask.quad.word 0x00 0.--15. 1. "INTID,The INTID of the interrupt to be deactivated" wgroup.quad spr:0x30C81++0x00 line.quad 0x00 "ICC_EOIR0_EL1,Interrupt Controller End Of Interrupt Register 0" hexmask.quad.word 0x00 0.--15. 1. "INTID,The INTID from the corresponding ICC_IAR0 access" wgroup.quad spr:0x30CC1++0x00 line.quad 0x00 "ICC_EOIR1_EL1,Interrupt Controller End Of Interrupt Register 1" hexmask.quad.word 0x00 0.--15. 1. "INTID,The INTID from the corresponding ICC_IAR1 access" rgroup.quad spr:0x30C82++0x00 line.quad 0x00 "ICC_HPPIR0_EL1,Interrupt Controller Highest Priority Pending Interrupt Register 0" hexmask.quad.word 0x00 0.--15. 1. "INTID,The INTID of the highest priority pending interrupt if that interrupt is observable at the currentSecurity state and Exception level" rgroup.quad spr:0x30CC2++0x00 line.quad 0x00 "ICC_HPPIR1_EL1,Interrupt Controller Highest Priority Pending Interrupt Register 1" hexmask.quad.word 0x00 0.--15. 1. "INTID,The INTID of the highest priority pending interrupt if that interrupt is observable at the currentSecurity state and Exception level" elif (((per.q(spr:0x30CC4))&0x3800)==0x800) wgroup.quad spr:0x30CB1++0x00 line.quad 0x00 "ICC_DIR_EL1,Interrupt Controller Deactivate Interrupt Register" hexmask.quad.tbyte 0x00 0.--23. 1. "INTID,The INTID of the interrupt to be deactivated" wgroup.quad spr:0x30C81++0x00 line.quad 0x00 "ICC_EOIR0_EL1,Interrupt Controller End Of Interrupt Register 0" hexmask.quad.tbyte 0x00 0.--23. 1. "INTID,The INTID from the corresponding ICC_IAR0 access" wgroup.quad spr:0x30CC1++0x00 line.quad 0x00 "ICC_EOIR1_EL1,Interrupt Controller End Of Interrupt Register 1" hexmask.quad.tbyte 0x00 0.--23. 1. "INTID,The INTID from the corresponding ICC_IAR1 access" rgroup.quad spr:0x30C82++0x00 line.quad 0x00 "ICC_HPPIR0_EL1,Interrupt Controller Highest Priority Pending Interrupt Register 0" hexmask.quad.tbyte 0x00 0.--23. 1. "INTID,The INTID of the highest priority pending interrupt if that interrupt is observable at the currentSecurity state and Exception level" rgroup.quad spr:0x30CC2++0x00 line.quad 0x00 "ICC_HPPIR1_EL1,Interrupt Controller Highest Priority Pending Interrupt Register 1" hexmask.quad.tbyte 0x00 0.--23. 1. "INTID,The INTID of the highest priority pending interrupt if that interrupt is observable at the currentSecurity state and Exception level" endif hgroup.quad spr:0x30C80++0x00 hide.long 0x00 "ICC_IAR0_EL1,Interrupt Acknowledge Register 0" in hgroup.quad spr:0x30CC0++0x00 hide.long 0x00 "ICC_IAR1_EL1,Interrupt Acknowledge Register 1" in newline group.quad SPR:0x30CC6++0x00 line.long 0x00 "ICC_IGRPEN0_EL1,Interrupt Group Enable Register 0" bitfld.long 0x00 0. "ENABLE,Enable" "Disabled,Enabled" group.quad SPR:0x30CC7++0x00 line.long 0x00 "ICC_IGRPEN1_EL1,Interrupt Group Enable Register 1 (EL1)" bitfld.long 0x00 0. "ENABLE,Enable" "Disabled,Enabled" group.quad SPR:0x36CC7++0x00 line.long 0x00 "ICC_IGRPEN1_EL3,Interrupt Group Enable Register 1 (EL3)" bitfld.long 0x00 1. "ENABLEGRP1S,Enable Group 1 interrupts for the Secure state" "Disabled,Enabled" bitfld.long 0x00 0. "ENABLEGRP1NS,Enable Group 1 interrupts for the Non-secure state" "Disabled,Enabled" group.quad SPR:0x30460++0x00 line.long 0x00 "ICC_PMR_EL1,Priority Mask Register" hexmask.long.byte 0x00 0.--7. 1. "PRIORITY,Priority mask level for the CPU interface" rgroup.quad SPR:0x30CB3++0x00 line.long 0x00 "ICC_RPR_EL1,Running Priority Register" hexmask.long.byte 0x00 0.--7. 1. "PRIORITY,Current running priority on the CPU interface" if (((per.q(spr:0x30CB7))&0x10000000000)==0x00) wgroup.quad spr:0x30CB7++0x00 line.quad 0x00 "ICC_SGI0R_EL1,Interrupt Controller Software Generated Interrupt Group 0 Register" hexmask.quad.byte 0x00 48.--55. 1. "AFF3,Affinity 3" newline bitfld.quad 0x00 44.--47. "RS,Range selector" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 40. "IRM,Interrupt routing mode" "Target list,All PEs excluding self" newline hexmask.quad.byte 0x00 32.--39. 1. "AFF2,Affinity 2" bitfld.quad 0x00 24.--27. "INTID,The INTID of the SGI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.quad.byte 0x00 16.--23. 1. "AFF1,Affinity 1" hexmask.quad.word 0x00 0.--15. 1. "TARGETLIST,The set of PEs for which SGI interrupts will be generated." else wgroup.quad spr:0x30CB7++0x00 line.quad 0x00 "ICC_SGI0R_EL1,Interrupt Controller Software Generated Interrupt Group 0 Register" newline bitfld.quad 0x00 44.--47. "RS,Range selector" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 40. "IRM,Interrupt routing mode" "Target list,All PEs excluding self" newline bitfld.quad 0x00 24.--27. "INTID,The INTID of the SGI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline endif if (((per.q(spr:0x30CB5))&0x10000000000)==0x00) wgroup.quad spr:0x30CB5++0x00 line.quad 0x00 "ICC_SGI1R_EL1,Interrupt Controller Software Generated Interrupt Group 0 Register" hexmask.quad.byte 0x00 48.--55. 1. "AFF3,Affinity 3" newline bitfld.quad 0x00 44.--47. "RS,Range selector" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 40. "IRM,Interrupt routing mode" "Target list,All PEs excluding self" newline hexmask.quad.byte 0x00 32.--39. 1. "AFF2,Affinity 2" bitfld.quad 0x00 24.--27. "INTID,The INTID of the SGI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.quad.byte 0x00 16.--23. 1. "AFF1,Affinity 1" hexmask.quad.word 0x00 0.--15. 1. "TARGETLIST,The set of PEs for which SGI interrupts will be generated" else wgroup.quad spr:0x30CB5++0x00 line.quad 0x00 "ICC_SGI1R_EL1,Interrupt Controller Software Generated Interrupt Group 0 Register" newline bitfld.quad 0x00 44.--47. "RS,Range selector" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 40. "IRM,Interrupt routing mode" "Target list,All PEs excluding self" newline bitfld.quad 0x00 24.--27. "INTID,The INTID of the SGI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline endif group.quad SPR:0x30CC5++0x00 line.long 0x00 "ICC_SRE_EL1,System Register Enable Register for EL1" bitfld.long 0x00 2. "DIB,Disable IRQ bypass" "No,Yes" bitfld.long 0x00 1. "DFB,Disable FIQ bypass" "No,Yes" bitfld.long 0x00 0. "SRE,System Register Enable" "Disabled,Enabled" group.quad SPR:0x34C95++0x00 line.long 0x00 "ICC_SRE_EL2,System Register Enable Register for EL2" bitfld.long 0x00 3. "ENABLE,Enable lower exception level access" "Disabled,Enabled" bitfld.long 0x00 2. "DIB,Disable IRQ bypass" "No,Yes" bitfld.long 0x00 1. "DFB,Disable FIQ bypass" "No,Yes" newline bitfld.long 0x00 0. "SRE,System Register Enable" "Disabled,Enabled" group.quad SPR:0x36CC5++0x00 line.long 0x00 "ICC_SRE_EL3,System Register Enable Register for EL3" bitfld.long 0x00 3. "ENABLE,Enable lower exception level access" "Disabled,Enabled" bitfld.long 0x00 2. "DIB,Disable IRQ bypass" "No,Yes" bitfld.long 0x00 1. "DFB,Disable FIQ bypass" "No,Yes" newline bitfld.long 0x00 0. "SRE,System Register Enable" "Disabled,Enabled" tree.end tree "AArch64 Virtual Interface Control System Registers" tree.open "Hypervisor Active Priorities Registers" group.quad SPR:0x34C80++0x00 line.long 0x00 "ICH_AP0R0_EL2,Interrupt Controller Hypervisor Active Priorities Group 0 Register 0" bitfld.long 0x00 31. "P31,Group 0 interrupt active with priority level 31" "No interrupt,Interrupt" bitfld.long 0x00 30. "P30,Group 0 interrupt active with priority level 30" "No interrupt,Interrupt" bitfld.long 0x00 29. "P29,Group 0 interrupt active with priority level 29" "No interrupt,Interrupt" newline bitfld.long 0x00 28. "P28,Group 0 interrupt active with priority level 28" "No interrupt,Interrupt" bitfld.long 0x00 27. "P27,Group 0 interrupt active with priority level 27" "No interrupt,Interrupt" bitfld.long 0x00 26. "P26,Group 0 interrupt active with priority level 26" "No interrupt,Interrupt" newline bitfld.long 0x00 25. "P25,Group 0 interrupt active with priority level 25" "No interrupt,Interrupt" bitfld.long 0x00 24. "P24,Group 0 interrupt active with priority level 24" "No interrupt,Interrupt" bitfld.long 0x00 23. "P23,Group 0 interrupt active with priority level 23" "No interrupt,Interrupt" newline bitfld.long 0x00 22. "P22,Group 0 interrupt active with priority level 22" "No interrupt,Interrupt" bitfld.long 0x00 21. "P21,Group 0 interrupt active with priority level 21" "No interrupt,Interrupt" bitfld.long 0x00 20. "P20,Group 0 interrupt active with priority level 20" "No interrupt,Interrupt" newline bitfld.long 0x00 19. "P19,Group 0 interrupt active with priority level 19" "No interrupt,Interrupt" bitfld.long 0x00 18. "P18,Group 0 interrupt active with priority level 18" "No interrupt,Interrupt" bitfld.long 0x00 17. "P17,Group 0 interrupt active with priority level 17" "No interrupt,Interrupt" newline bitfld.long 0x00 16. "P16,Group 0 interrupt active with priority level 16" "No interrupt,Interrupt" bitfld.long 0x00 15. "P15,Group 0 interrupt active with priority level 15" "No interrupt,Interrupt" bitfld.long 0x00 14. "P14,Group 0 interrupt active with priority level 14" "No interrupt,Interrupt" newline bitfld.long 0x00 13. "P13,Group 0 interrupt active with priority level 13" "No interrupt,Interrupt" bitfld.long 0x00 12. "P12,Group 0 interrupt active with priority level 12" "No interrupt,Interrupt" bitfld.long 0x00 11. "P11,Group 0 interrupt active with priority level 11" "No interrupt,Interrupt" newline bitfld.long 0x00 10. "P10,Group 0 interrupt active with priority level 10" "No interrupt,Interrupt" bitfld.long 0x00 9. "P9,Group 0 interrupt active with priority level 9" "No interrupt,Interrupt" bitfld.long 0x00 8. "P8,Group 0 interrupt active with priority level 8" "No interrupt,Interrupt" newline bitfld.long 0x00 7. "P7,Group 0 interrupt active with priority level 7" "No interrupt,Interrupt" bitfld.long 0x00 6. "P6,Group 0 interrupt active with priority level 6" "No interrupt,Interrupt" bitfld.long 0x00 5. "P5,Group 0 interrupt active with priority level 5" "No interrupt,Interrupt" newline bitfld.long 0x00 4. "P4,Group 0 interrupt active with priority level 4" "No interrupt,Interrupt" bitfld.long 0x00 3. "P3,Group 0 interrupt active with priority level 3" "No interrupt,Interrupt" bitfld.long 0x00 2. "P2,Group 0 interrupt active with priority level 2" "No interrupt,Interrupt" newline bitfld.long 0x00 1. "P1,Group 0 interrupt active with priority level 1" "No interrupt,Interrupt" bitfld.long 0x00 0. "P0,Group 0 interrupt active with priority level 0" "No interrupt,Interrupt" if (CORENAME()=="CORTEXA53") group.quad SPR:0x34C90++0x00 line.long 0x00 "ICH_AP1R0_EL2,Interrupt Controller Hypervisor Active Priorities Group 1 Register 0" bitfld.long 0x00 31. "P31,Group 1 interrupt active with priority level 31" "No interrupt,Interrupt" bitfld.long 0x00 30. "P30,Group 1 interrupt active with priority level 30" "No interrupt,Interrupt" bitfld.long 0x00 29. "P29,Group 1 interrupt active with priority level 29" "No interrupt,Interrupt" newline bitfld.long 0x00 28. "P28,Group 1 interrupt active with priority level 28" "No interrupt,Interrupt" bitfld.long 0x00 27. "P27,Group 1 interrupt active with priority level 27" "No interrupt,Interrupt" bitfld.long 0x00 26. "P26,Group 1 interrupt active with priority level 26" "No interrupt,Interrupt" newline bitfld.long 0x00 25. "P25,Group 1 interrupt active with priority level 25" "No interrupt,Interrupt" bitfld.long 0x00 24. "P24,Group 1 interrupt active with priority level 24" "No interrupt,Interrupt" bitfld.long 0x00 23. "P23,Group 1 interrupt active with priority level 23" "No interrupt,Interrupt" newline bitfld.long 0x00 22. "P22,Group 1 interrupt active with priority level 22" "No interrupt,Interrupt" bitfld.long 0x00 21. "P21,Group 1 interrupt active with priority level 21" "No interrupt,Interrupt" bitfld.long 0x00 20. "P20,Group 1 interrupt active with priority level 20" "No interrupt,Interrupt" newline bitfld.long 0x00 19. "P19,Group 1 interrupt active with priority level 19" "No interrupt,Interrupt" bitfld.long 0x00 18. "P18,Group 1 interrupt active with priority level 18" "No interrupt,Interrupt" bitfld.long 0x00 17. "P17,Group 1 interrupt active with priority level 17" "No interrupt,Interrupt" newline bitfld.long 0x00 16. "P16,Group 1 interrupt active with priority level 16" "No interrupt,Interrupt" bitfld.long 0x00 15. "P15,Group 1 interrupt active with priority level 15" "No interrupt,Interrupt" bitfld.long 0x00 14. "P14,Group 1 interrupt active with priority level 14" "No interrupt,Interrupt" newline bitfld.long 0x00 13. "P13,Group 1 interrupt active with priority level 13" "No interrupt,Interrupt" bitfld.long 0x00 12. "P12,Group 1 interrupt active with priority level 12" "No interrupt,Interrupt" bitfld.long 0x00 11. "P11,Group 1 interrupt active with priority level 11" "No interrupt,Interrupt" newline bitfld.long 0x00 10. "P10,Group 1 interrupt active with priority level 10" "No interrupt,Interrupt" bitfld.long 0x00 9. "P9,Group 1 interrupt active with priority level 9" "No interrupt,Interrupt" bitfld.long 0x00 8. "P8,Group 1 interrupt active with priority level 8" "No interrupt,Interrupt" newline bitfld.long 0x00 7. "P7,Group 1 interrupt active with priority level 7" "No interrupt,Interrupt" bitfld.long 0x00 6. "P6,Group 1 interrupt active with priority level 6" "No interrupt,Interrupt" bitfld.long 0x00 5. "P5,Group 1 interrupt active with priority level 5" "No interrupt,Interrupt" newline bitfld.long 0x00 4. "P4,Group 1 interrupt active with priority level 4" "No interrupt,Interrupt" bitfld.long 0x00 3. "P3,Group 1 interrupt active with priority level 3" "No interrupt,Interrupt" bitfld.long 0x00 2. "P2,Group 1 interrupt active with priority level 2" "No interrupt,Interrupt" newline bitfld.long 0x00 1. "P1,Group 1 interrupt active with priority level 1" "No interrupt,Interrupt" bitfld.long 0x00 0. "P0,Group 1 interrupt active with priority level 0" "No interrupt,Interrupt" endif tree.end newline rgroup.quad SPR:0x34CB3++0x00 line.long 0x00 "ICH_EISR_EL2,Interrupt Controller End of Interrupt Status Register" bitfld.long 0x00 3. "STATUS3,EOI maintenance interrupt status bit for List register 3" "No interrupt,Interrupt" bitfld.long 0x00 2. "STATUS2,EOI maintenance interrupt status bit for List register 2" "No interrupt,Interrupt" bitfld.long 0x00 1. "STATUS1,EOI maintenance interrupt status bit for List register 1" "No interrupt,Interrupt" newline bitfld.long 0x00 0. "STATUS0,EOI maintenance interrupt status bit for List register 0" "No interrupt,Interrupt" rgroup.quad SPR:0x34CB5++0x00 line.long 0x00 "ICH_ELRSR_EL2,Interrupt Controller Empty List Register Status Register" bitfld.long 0x00 3. "STATUS3,Status bit for List register 3" "Interrupt,No interrupt" bitfld.long 0x00 2. "STATUS2,Status bit for List register 2" "Interrupt,No interrupt" bitfld.long 0x00 1. "STATUS1,Status bit for List register 1" "Interrupt,No interrupt" newline bitfld.long 0x00 0. "STATUS0,Status bit for List register 0" "Interrupt,No interrupt" group.quad SPR:0x34CB0++0x00 line.long 0x00 "ICH_HCR_EL2,Interrupt Controller Hypervisor Control Register" bitfld.long 0x00 27.--31. "EOICOUNT,This field is incremented whenever a successful write to a virtual EOIR or DIR register would have resulted in a virtual interrupt deactivation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,?..." bitfld.long 0x00 14. "TDIR,Trap Non-secure EL1 writes to ICC_DIR" "Not trapped,Trapped" bitfld.long 0x00 13. "TSEI,Trap all locally generated SEIs" "Not trapped,Trapped" newline bitfld.long 0x00 12. "TALL1,Trap all Non-secure EL1 accesses to ICC_* System registers for Group 1 interrupts to EL2" "Not trapped,Trapped" bitfld.long 0x00 11. "TALL0,Trap all Non-secure EL1 accesses to ICC_* System registers for Group 0 interrupts to EL2" "Not trapped,Trapped" bitfld.long 0x00 10. "TC,Trap all Non-secure EL1 accesses to System registers that are common to Group 0 and Group 1 to EL2" "Not trapped,Trapped" newline bitfld.long 0x00 7. "VGRP1DIE,VM Group 1 Disabled Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 6. "VGRP1EIE,VM Group 1 Enabled Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. "VGRP0DIE,VM Group 0 Disabled Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 4. "VGRP0EIE,VM Group 0 Enabled Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. "NPIE,No Pending Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 2. "LRENPIE,List Register Entry Not Present Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 1. "UIE,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. "EN,Global enable bit for the virtual CPU interface" "Disabled,Enabled" if (((d.q(spr:(0x34CC0+0x0)))&0x2000000000000000)==0x00) group.quad spr:(0x34CC0+0x0)++0x00 line.quad 0x00 "ICH_LR0_EL2,Interrupt Controller List Register 0" bitfld.quad 0x00 62.--63. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active" bitfld.quad 0x00 61. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt, meaning that it corresponds to a physical interrupt" "Software,Hardware" bitfld.quad 0x00 60. "GROUP,Indicates the group for this virtual interrupt" "Group 0,Group 1" newline hexmask.quad.byte 0x00 48.--55. 1. "PRIORITY,The priority of this interrupt" bitfld.quad 0x00 41. "PINTID_EOI,End of Interrupt" "Interrupt,No interrupt" hexmask.quad.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt" else group.quad spr:(0x34CC0+0x0)++0x00 line.quad 0x00 "ICH_LR0_EL2,Interrupt Controller List Register 0" bitfld.quad 0x00 62.--63. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active" bitfld.quad 0x00 61. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt, meaning that it corresponds to a physical interrupt" "Software,Hardware" bitfld.quad 0x00 60. "GROUP,Indicates the group for this virtual interrupt" "Group 0,Group 1" newline hexmask.quad.byte 0x00 48.--55. 1. "PRIORITY,The priority of this interrupt" hexmask.quad.word 0x00 32.--41. 1. "PINTID,Physical INTID, for hardware interrupts" hexmask.quad.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt" endif if (((d.q(spr:(0x34CC0+0x1)))&0x2000000000000000)==0x00) group.quad spr:(0x34CC0+0x1)++0x00 line.quad 0x00 "ICH_LR1_EL2,Interrupt Controller List Register 1" bitfld.quad 0x00 62.--63. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active" bitfld.quad 0x00 61. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt, meaning that it corresponds to a physical interrupt" "Software,Hardware" bitfld.quad 0x00 60. "GROUP,Indicates the group for this virtual interrupt" "Group 0,Group 1" newline hexmask.quad.byte 0x00 48.--55. 1. "PRIORITY,The priority of this interrupt" bitfld.quad 0x00 41. "PINTID_EOI,End of Interrupt" "Interrupt,No interrupt" hexmask.quad.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt" else group.quad spr:(0x34CC0+0x1)++0x00 line.quad 0x00 "ICH_LR1_EL2,Interrupt Controller List Register 1" bitfld.quad 0x00 62.--63. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active" bitfld.quad 0x00 61. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt, meaning that it corresponds to a physical interrupt" "Software,Hardware" bitfld.quad 0x00 60. "GROUP,Indicates the group for this virtual interrupt" "Group 0,Group 1" newline hexmask.quad.byte 0x00 48.--55. 1. "PRIORITY,The priority of this interrupt" hexmask.quad.word 0x00 32.--41. 1. "PINTID,Physical INTID, for hardware interrupts" hexmask.quad.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt" endif if (((d.q(spr:(0x34CC0+0x2)))&0x2000000000000000)==0x00) group.quad spr:(0x34CC0+0x2)++0x00 line.quad 0x00 "ICH_LR2_EL2,Interrupt Controller List Register 2" bitfld.quad 0x00 62.--63. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active" bitfld.quad 0x00 61. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt, meaning that it corresponds to a physical interrupt" "Software,Hardware" bitfld.quad 0x00 60. "GROUP,Indicates the group for this virtual interrupt" "Group 0,Group 1" newline hexmask.quad.byte 0x00 48.--55. 1. "PRIORITY,The priority of this interrupt" bitfld.quad 0x00 41. "PINTID_EOI,End of Interrupt" "Interrupt,No interrupt" hexmask.quad.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt" else group.quad spr:(0x34CC0+0x2)++0x00 line.quad 0x00 "ICH_LR2_EL2,Interrupt Controller List Register 2" bitfld.quad 0x00 62.--63. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active" bitfld.quad 0x00 61. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt, meaning that it corresponds to a physical interrupt" "Software,Hardware" bitfld.quad 0x00 60. "GROUP,Indicates the group for this virtual interrupt" "Group 0,Group 1" newline hexmask.quad.byte 0x00 48.--55. 1. "PRIORITY,The priority of this interrupt" hexmask.quad.word 0x00 32.--41. 1. "PINTID,Physical INTID, for hardware interrupts" hexmask.quad.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt" endif if (((d.q(spr:(0x34CC0+0x3)))&0x2000000000000000)==0x00) group.quad spr:(0x34CC0+0x3)++0x00 line.quad 0x00 "ICH_LR3_EL2,Interrupt Controller List Register 3" bitfld.quad 0x00 62.--63. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active" bitfld.quad 0x00 61. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt, meaning that it corresponds to a physical interrupt" "Software,Hardware" bitfld.quad 0x00 60. "GROUP,Indicates the group for this virtual interrupt" "Group 0,Group 1" newline hexmask.quad.byte 0x00 48.--55. 1. "PRIORITY,The priority of this interrupt" bitfld.quad 0x00 41. "PINTID_EOI,End of Interrupt" "Interrupt,No interrupt" hexmask.quad.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt" else group.quad spr:(0x34CC0+0x3)++0x00 line.quad 0x00 "ICH_LR3_EL2,Interrupt Controller List Register 3" bitfld.quad 0x00 62.--63. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active" bitfld.quad 0x00 61. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt, meaning that it corresponds to a physical interrupt" "Software,Hardware" bitfld.quad 0x00 60. "GROUP,Indicates the group for this virtual interrupt" "Group 0,Group 1" newline hexmask.quad.byte 0x00 48.--55. 1. "PRIORITY,The priority of this interrupt" hexmask.quad.word 0x00 32.--41. 1. "PINTID,Physical INTID, for hardware interrupts" hexmask.quad.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt" endif rgroup.quad SPR:0x34CB2++0x00 line.long 0x00 "ICH_MISR_EL2,Interrupt Controller Maintenance Interrupt State Register" bitfld.long 0x00 7. "VGRP1D,VPE Group 1 Disabled" "Not asserted,Asserted" bitfld.long 0x00 6. "VGRP1E,VPE Group 1 Enabled" "Not asserted,Asserted" bitfld.long 0x00 5. "VGRP0D,VPE Group 0 Disabled" "Not asserted,Asserted" newline bitfld.long 0x00 4. "VGRP0E,VPE Group 0 Enabled" "Not asserted,Asserted" bitfld.long 0x00 3. "NP,No Pending" "Not asserted,Asserted" bitfld.long 0x00 2. "LRENP,List Register Entry Not Present" "Not asserted,Asserted" newline bitfld.long 0x00 1. "U,Underflow" "Not asserted,Asserted" bitfld.long 0x00 0. "EOI,End Of Interrupt" "Not asserted,Asserted" group.quad SPR:0x34CB7++0x00 line.long 0x00 "ICH_VMCR_EL2,Interrupt Controller Virtual Machine Control Register" hexmask.long.byte 0x00 24.--31. 1. "VPMR,The priority mask level for the virtual CPU interface" bitfld.long 0x00 21.--23. "VBPR0,Virtual Binary Point Register Group 0" "[7:1]-[0],[7:2]-[1:0],[7:3]-[2:0],[7:4]-[3:0],[7:5]-[4:0],[7:6]-[5:0],[7]-[6:0],No preemption-[7:0]" bitfld.long 0x00 18.--20. "VBPR1,Virtual Binary Point Register, Group 1" ",[7:1]-[0],[7:2]-[1:0],[7:3]-[2:0],[7:4]-[3:0],[7:5]-[4:0],[7:6]-[5:0],[7]-[6:0]" newline bitfld.long 0x00 9. "VEOIM,Controls whether a write to an End of Interrupt register also deactivates the virtual interrupt" "Disabled,Enabled" bitfld.long 0x00 4. "VCBPR,Virtual Common Binary Point Register" "Separate registers,Same register" bitfld.long 0x00 3. "VFIQEN,Virtual FIQ enable" "Virtual IRQs,Virtual FIQs" newline bitfld.long 0x00 2. "VACKCTL,Virtual FIQ enable" "1022,Corresponding interrupt" bitfld.long 0x00 1. "VENG1,Virtual Group 1 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. "VENG0,Virtual Group 0 interrupt enable" "Disabled,Enabled" group.quad SPR:0x34C94++0x00 line.long 0x00 "ICH_VSEIR_EL2,Interrupt Controller Virtual System Error Interrupt Register" rgroup.quad SPR:0x34CB1++0x00 line.long 0x00 "ICH_VTR_EL2,Interrupt Controller VGIC Type Register" bitfld.long 0x00 29.--31. "PRIBITS,The number of priority bits implemented minus one" "0,1,2,3,4,5,6,7" bitfld.long 0x00 26.--28. "PREBITS,The number of virtual preemption bits implemented, minus one" "0,1,2,3,4,5,6,7" bitfld.long 0x00 23.--25. "IDBITS,The number of physical interrupt identifier bits supported" "16 bits,24 bits,?..." newline bitfld.long 0x00 22. "SEIS,Indicates whether the CPU interface supports local generation of SEIs" "Not supported,Supported" bitfld.long 0x00 21. "A3V,Affinity 3 Valid" "Only zero values supported,Non-zero values supported" bitfld.long 0x00 20. "NV4,GICv4 direct injection of virtual interrupts not supported" "Supported,Not supported" newline bitfld.long 0x00 19. "TDS,Separate trapping of Non-secure EL1 writes to ICV_DIR_EL1 supported" "Not supported,Supported" bitfld.long 0x00 0.--4. "LISTREGS,The number of implemented List registers, minus one" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" tree.end tree.end tree "Debug Registers" rgroup.quad SPR:0x23010++0x00 line.long 0x00 "MDCCSR_EL0,Debug Comms Channel Status Register" bitfld.long 0x00 30. "RXFULL,DBGDTRRX Register full" "Empty,Full" bitfld.long 0x00 29. "TXFULL,DBGDTRTX Register full" "Empty,Full" group.quad SPR:0x20020++0x00 line.long 0x00 "MDCCINT_EL1,Debug Comms Channel Interrupt Enable register" bitfld.long 0x00 30. "RX,DCC interrupt enable controls" "Disabled,Enabled" bitfld.long 0x00 29. "TX,DCC interrupt enable controls" "Disabled,Enabled" group.quad spr:0x23040++0x00 line.quad 0x00 "DBGDTR_EL0,Half Duplex Data Transfer Register" rgroup.quad SPR:0x23050++0x00 line.long 0x00 "DBGDTRRX_EL0,Full Duplex Receive Data Transfer Register" wgroup.quad SPR:0x23050++0x00 line.long 0x00 "DBGDTRTX_EL0,Full Duplex Transmit Data Transfer Register" group.quad SPR:0x24070++0x00 line.long 0x00 "DBGVCR32_EL2,Vector Catch Register" bitfld.long 0x00 31. "NSF,FIQ vector catch enable in Non-secure state" "Low,High" bitfld.long 0x00 30. "NSI,IRQ vector catch enable in Non-secure state" "Low,High" bitfld.long 0x00 28. "NSD,Data Abort vector catch enable in Non-secure state" "Low,High" bitfld.long 0x00 27. "NSP,Prefetch Abort vector catch enable in Non-secure state" "Low,High" newline bitfld.long 0x00 26. "NSS,Supervisor Call (SVC) vector catch enable in Non-secure state" "Low,High" bitfld.long 0x00 25. "NSU,Undefined Instruction vector catch enable in Non-secure state" "Low,High" bitfld.long 0x00 7. "SF,FIQ vector catch enable in Secure state" "Low,High" bitfld.long 0x00 6. "SI,IRQ vector catch enable in Secure state" "Low,High" newline bitfld.long 0x00 4. "SD,Data Abort vector catch enable in Secure state" "Low,High" bitfld.long 0x00 3. "SP,Prefetch Abort vector catch enable in Secure state" "Low,High" bitfld.long 0x00 2. "SS,Supervisor Call (SVC) vector catch enable in Secure state" "Low,High" bitfld.long 0x00 1. "SU,Undefined Instruction vector catch enable in Secure state" "Low,High" group.quad SPR:0x20002++0x00 line.long 0x00 "OSDTRRX_EL1,OS Lock Data Transfer Register" group.quad SPR:0x20022++0x00 line.long 0x00 "MDSCR_EL1,Monitor Debug System Control Register" bitfld.long 0x00 30. "RXFULL,DBGDTRRX Register full" "Empty,Full" bitfld.long 0x00 29. "TXFULL,DBGDTRTX Register full" "Empty,Full" bitfld.long 0x00 27. "RXO,Save/restore bit" "Low,High" bitfld.long 0x00 26. "TXU,Save/restore bit" "Low,High" newline bitfld.long 0x00 22.--23. "INTDIS,Save/restore bits" "0,1,2,3" bitfld.long 0x00 21. "TDA,Save/restore bit" "Low,High" bitfld.long 0x00 15. "MDE,Monitor debug events" "Disabled,Enabled" bitfld.long 0x00 14. "HDE,Save/restore bit" "Low,High" newline bitfld.long 0x00 13. "KDE,Local (kernel) debug enable" "Disabled,Enabled" bitfld.long 0x00 12. "TDCC,Trap accesses to the debug comms channel in EL0" "Disabled,Enabled" bitfld.long 0x00 6. "ERR,Save/restore bit" "Low,High" bitfld.long 0x00 0. "SS,Software step control" "Disabled,Enabled" group.quad SPR:0x20032++0x00 line.long 0x00 "OSDTRTX_EL1,OS Lock Data Transfer Register" group.quad SPR:0x20062++0x00 line.long 0x00 "OSECCR_EL1,OS Lock Exception Catch Control Register" rgroup.quad spr:0x20100++0x00 line.quad 0x00 "MDRAR_EL1,Debug ROM Address Register" hexmask.quad 0x00 12.--47. 0x1000 "ROMADDR,ROM base physical address" bitfld.quad 0x00 0.--1. "VALID,ROM address valid" "Invalid,Reserved,Reserved,Valid" wgroup.quad SPR:0x20104++0x00 line.long 0x00 "OSLAR_EL1,OS Lock Access Register" bitfld.long 0x00 0. "OSLK,OS lock" "Unlock,Lock" rgroup.quad SPR:0x20114++0x00 line.long 0x00 "OSLSR_EL1,OS Lock Status Register" bitfld.long 0x00 2. "NTT,Not 32-bit access" "Low,High" bitfld.long 0x00 1. "OSLK,OS lock status" "Not locked,Locked" bitfld.long 0x00 0. 3. "OSLM,OS lock model implemented field" "Reserved,Reserved,Impelemented,?..." group.quad SPR:0x20134++0x00 line.long 0x00 "OSDLR_EL1,OS Double-lock Register" bitfld.long 0x00 0. "DLK,OS double-lock control" "Not locked,Locked" group.quad SPR:0x20144++0x00 line.long 0x00 "DBGPRCR_EL1,Debug Power/Reset Control Register" bitfld.long 0x00 0. "CORENPDRQ,Core no powerdown request" "No,Yes" group.quad SPR:0x20786++0x00 line.long 0x00 "DBGCLAIMSET_EL1,Claim Tag register Set" bitfld.long 0x0 7. "CT7,Claim Tag 7 Set" "Not set,Set" bitfld.long 0x0 6. "CT6,Claim Tag 6 Set" "Not set,Set" bitfld.long 0x0 5. "CT5,Claim Tag 5 Set" "Not set,Set" bitfld.long 0x0 4. "CT4,Claim Tag 4 Set" "Not set,Set" newline bitfld.long 0x0 3. "CT3,Claim Tag 3 Set" "Not set,Set" bitfld.long 0x0 2. "CT2,Claim Tag 2 Set" "Not set,Set" bitfld.long 0x0 1. "CT1,Claim Tag 1 Set" "Not set,Set" bitfld.long 0x0 0. "CT0,Claim Tag 0 Set" "Not set,Set" group.quad SPR:0x20796++0x00 line.long 0x00 "DBGCLAIMCLR_EL1,Claim Tag register Clear" bitfld.long 0x0 7. "CT7,Claim Tag 7 Clear" "Not cleared,Cleared" bitfld.long 0x0 6. "CT6,Claim Tag 6 Clear" "Not cleared,Cleared" bitfld.long 0x0 5. "CT5,Claim Tag 5 Clear" "Not cleared,Cleared" bitfld.long 0x0 4. "CT4,Claim Tag 4 Clear" "Not cleared,Cleared" newline bitfld.long 0x0 3. "CT3,Claim Tag 3 Clear" "Not cleared,Cleared" bitfld.long 0x0 2. "CT2,Claim Tag 2 Clear" "Not cleared,Cleared" bitfld.long 0x0 1. "CT1,Claim Tag 1 Clear" "Not cleared,Cleared" bitfld.long 0x0 0. "CT0,Claim Tag 0 Clear" "Not cleared,Cleared" rgroup.quad SPR:0x207E6++0x00 line.long 0x00 "DBGAUTHSTATUS_EL1,Authentication Status register" bitfld.long 0x00 7. "SNI,Secure non-invasive debug implemented" "Not implemented,Implemented" bitfld.long 0x00 6. "SNE,Secure non-invasive debug enabled" "Disabled,Enabled" bitfld.long 0x00 5. "SI,Secure invasive debug implemented" "Not implemented,Implemented" bitfld.long 0x00 4. "SE,Secure invasive debug enabled" "Disabled,Enabled" newline bitfld.long 0x00 3. "NSNI,Non-secure non-invasive debug implemented" "Not implemented,Implemented" bitfld.long 0x00 2. "NSNE,Non-secure non-invasive debug enabled" "Disabled,Enabled" bitfld.long 0x00 1. "NSI,Non-secure invasive debug implemented" "Not implemented,Implemented" bitfld.long 0x00 0. "NSE,Non-secure invasive debug enabled" "Disabled,Enabled" group.quad SPR:0x33450++0x00 line.long 0x00 "DSPSR_EL0,Debug Saved Processor Status Register" group.quad spr:0x33451++0x00 line.quad 0x00 "DLR_EL0,Debug Link Register" tree.end tree "Breakpoint Registers" if (((d.l(spr:(0x20005+0x0)))&0xF00000)==(0x000000||0x100000||0x400000||0x500000)) group.quad spr:(0x20004+0x0)++0x00 "Breakpoint 0" line.quad 0x00 "DBGBVR0_EL1,Breakpoint Value Register" hexmask.quad 0x00 2.--48. 0x4 "VA,Bits[31:2] of the address value for comparison" elif (((d.l(spr:(0x20005+0x0)))&0xF00000)==(0x800000||0x900000||0xC00000||0xD00000)) group.quad spr:(0x20004+0x0)++0x00 "Breakpoint 0" line.quad 0x00 "DBGBVR0_EL1,Breakpoint Value Register" hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison" elif (((d.l(spr:(0x20005+0x0)))&0xF00000)==(0xA00000||0xB00000||0xE00000||0xF00000)) else group.quad spr:(0x20004+0x0)++0x00 "Breakpoint 0" line.quad 0x00 "DBGBVR0_EL1,Breakpoint Value Register" hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison" hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID" endif group.quad SPR:(0x20005+0x0)++0x0 line.long 0x00 "DBGBCR0_EL1,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..." bitfld.long 0x00 13. "HMC,Higher mode control" "Disabled,Enabled" newline bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode" bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled" if (((d.l(spr:(0x20005+0x10)))&0xF00000)==(0x000000||0x100000||0x400000||0x500000)) group.quad spr:(0x20004+0x10)++0x00 "Breakpoint 1" line.quad 0x00 "DBGBVR1_EL1,Breakpoint Value Register" hexmask.quad 0x00 2.--48. 0x4 "VA,Bits[31:2] of the address value for comparison" elif (((d.l(spr:(0x20005+0x10)))&0xF00000)==(0x800000||0x900000||0xC00000||0xD00000)) group.quad spr:(0x20004+0x10)++0x00 "Breakpoint 1" line.quad 0x00 "DBGBVR1_EL1,Breakpoint Value Register" hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison" elif (((d.l(spr:(0x20005+0x10)))&0xF00000)==(0xA00000||0xB00000||0xE00000||0xF00000)) else group.quad spr:(0x20004+0x10)++0x00 "Breakpoint 1" line.quad 0x00 "DBGBVR1_EL1,Breakpoint Value Register" hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison" hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID" endif group.quad SPR:(0x20005+0x10)++0x0 line.long 0x00 "DBGBCR1_EL1,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..." bitfld.long 0x00 13. "HMC,Higher mode control" "Disabled,Enabled" newline bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode" bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled" if (((d.l(spr:(0x20005+0x20)))&0xF00000)==(0x000000||0x100000||0x400000||0x500000)) group.quad spr:(0x20004+0x20)++0x00 "Breakpoint 2" line.quad 0x00 "DBGBVR2_EL1,Breakpoint Value Register" hexmask.quad 0x00 2.--48. 0x4 "VA,Bits[31:2] of the address value for comparison" elif (((d.l(spr:(0x20005+0x20)))&0xF00000)==(0x800000||0x900000||0xC00000||0xD00000)) group.quad spr:(0x20004+0x20)++0x00 "Breakpoint 2" line.quad 0x00 "DBGBVR2_EL1,Breakpoint Value Register" hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison" elif (((d.l(spr:(0x20005+0x20)))&0xF00000)==(0xA00000||0xB00000||0xE00000||0xF00000)) else group.quad spr:(0x20004+0x20)++0x00 "Breakpoint 2" line.quad 0x00 "DBGBVR2_EL1,Breakpoint Value Register" hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison" hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID" endif group.quad SPR:(0x20005+0x20)++0x0 line.long 0x00 "DBGBCR2_EL1,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..." bitfld.long 0x00 13. "HMC,Higher mode control" "Disabled,Enabled" newline bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode" bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled" if (((d.l(spr:(0x20005+0x30)))&0xF00000)==(0x000000||0x100000||0x400000||0x500000)) group.quad spr:(0x20004+0x30)++0x00 "Breakpoint 3" line.quad 0x00 "DBGBVR3_EL1,Breakpoint Value Register" hexmask.quad 0x00 2.--48. 0x4 "VA,Bits[31:2] of the address value for comparison" elif (((d.l(spr:(0x20005+0x30)))&0xF00000)==(0x800000||0x900000||0xC00000||0xD00000)) group.quad spr:(0x20004+0x30)++0x00 "Breakpoint 3" line.quad 0x00 "DBGBVR3_EL1,Breakpoint Value Register" hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison" elif (((d.l(spr:(0x20005+0x30)))&0xF00000)==(0xA00000||0xB00000||0xE00000||0xF00000)) else group.quad spr:(0x20004+0x30)++0x00 "Breakpoint 3" line.quad 0x00 "DBGBVR3_EL1,Breakpoint Value Register" hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison" hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID" endif group.quad SPR:(0x20005+0x30)++0x0 line.long 0x00 "DBGBCR3_EL1,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..." bitfld.long 0x00 13. "HMC,Higher mode control" "Disabled,Enabled" newline bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode" bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled" if (((d.l(spr:(0x20005+0x40)))&0xF00000)==(0x000000||0x100000||0x400000||0x500000)) group.quad spr:(0x20004+0x40)++0x00 "Breakpoint 4" line.quad 0x00 "DBGBVR4_EL1,Breakpoint Value Register" hexmask.quad 0x00 2.--48. 0x4 "VA,Bits[31:2] of the address value for comparison" elif (((d.l(spr:(0x20005+0x40)))&0xF00000)==(0x800000||0x900000||0xC00000||0xD00000)) group.quad spr:(0x20004+0x40)++0x00 "Breakpoint 4" line.quad 0x00 "DBGBVR4_EL1,Breakpoint Value Register" hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison" elif (((d.l(spr:(0x20005+0x40)))&0xF00000)==(0xA00000||0xB00000||0xE00000||0xF00000)) else group.quad spr:(0x20004+0x40)++0x00 "Breakpoint 4" line.quad 0x00 "DBGBVR4_EL1,Breakpoint Value Register" hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison" hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID" endif group.quad SPR:(0x20005+0x40)++0x0 line.long 0x00 "DBGBCR4_EL1,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..." bitfld.long 0x00 13. "HMC,Higher mode control" "Disabled,Enabled" newline bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode" bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled" if (((d.l(spr:(0x20005+0x50)))&0xF00000)==(0x000000||0x100000||0x400000||0x500000)) group.quad spr:(0x20004+0x50)++0x00 "Breakpoint 5" line.quad 0x00 "DBGBVR5_EL1,Breakpoint Value Register" hexmask.quad 0x00 2.--48. 0x4 "VA,Bits[31:2] of the address value for comparison" elif (((d.l(spr:(0x20005+0x50)))&0xF00000)==(0x800000||0x900000||0xC00000||0xD00000)) group.quad spr:(0x20004+0x50)++0x00 "Breakpoint 5" line.quad 0x00 "DBGBVR5_EL1,Breakpoint Value Register" hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison" elif (((d.l(spr:(0x20005+0x50)))&0xF00000)==(0xA00000||0xB00000||0xE00000||0xF00000)) else group.quad spr:(0x20004+0x50)++0x00 "Breakpoint 5" line.quad 0x00 "DBGBVR5_EL1,Breakpoint Value Register" hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison" hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID" endif group.quad SPR:(0x20005+0x50)++0x0 line.long 0x00 "DBGBCR5_EL1,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..." bitfld.long 0x00 13. "HMC,Higher mode control" "Disabled,Enabled" newline bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode" bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled" tree.end tree "Watchpoint Control Registers" group.quad spr:(0x20006+0x0)++0x00 "Watchpoint 0" line.quad 0x00 "DBGWVR0_EL1,Watchpoint Value Register (AArch64)" hexmask.quad 0x00 2.--48. 0x4 "ADDRESS,Data address" group.quad spr:(0x20007+0x0)++0x00 line.quad 0x00 "DBGWCR0_EL1,Watchpoint Control Register" bitfld.quad 0x0 24.--28. "MASK,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.quad 0x00 20. "WT,Watchpoint type" "Unlinked,Linked" bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..." bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled" hexmask.quad.byte 0x00 5.--12. 1. "BAS,Byte address select" newline bitfld.quad 0x00 3.--4. "LSC,Load/store control" "Reserved,Load,Store,Both" bitfld.quad 0x00 1.--2. "PAC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode" bitfld.quad 0x00 0. "E,Enable" "Disabled,Enabled" group.quad spr:(0x20006+0x10)++0x00 "Watchpoint 1" line.quad 0x00 "DBGWVR1_EL1,Watchpoint Value Register (AArch64)" hexmask.quad 0x00 2.--48. 0x4 "ADDRESS,Data address" group.quad spr:(0x20007+0x10)++0x00 line.quad 0x00 "DBGWCR1_EL1,Watchpoint Control Register" bitfld.quad 0x0 24.--28. "MASK,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.quad 0x00 20. "WT,Watchpoint type" "Unlinked,Linked" bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..." bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled" hexmask.quad.byte 0x00 5.--12. 1. "BAS,Byte address select" newline bitfld.quad 0x00 3.--4. "LSC,Load/store control" "Reserved,Load,Store,Both" bitfld.quad 0x00 1.--2. "PAC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode" bitfld.quad 0x00 0. "E,Enable" "Disabled,Enabled" group.quad spr:(0x20006+0x20)++0x00 "Watchpoint 2" line.quad 0x00 "DBGWVR2_EL1,Watchpoint Value Register (AArch64)" hexmask.quad 0x00 2.--48. 0x4 "ADDRESS,Data address" group.quad spr:(0x20007+0x20)++0x00 line.quad 0x00 "DBGWCR2_EL1,Watchpoint Control Register" bitfld.quad 0x0 24.--28. "MASK,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.quad 0x00 20. "WT,Watchpoint type" "Unlinked,Linked" bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..." bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled" hexmask.quad.byte 0x00 5.--12. 1. "BAS,Byte address select" newline bitfld.quad 0x00 3.--4. "LSC,Load/store control" "Reserved,Load,Store,Both" bitfld.quad 0x00 1.--2. "PAC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode" bitfld.quad 0x00 0. "E,Enable" "Disabled,Enabled" group.quad spr:(0x20006+0x30)++0x00 "Watchpoint 3" line.quad 0x00 "DBGWVR3_EL1,Watchpoint Value Register (AArch64)" hexmask.quad 0x00 2.--48. 0x4 "ADDRESS,Data address" group.quad spr:(0x20007+0x30)++0x00 line.quad 0x00 "DBGWCR3_EL1,Watchpoint Control Register" bitfld.quad 0x0 24.--28. "MASK,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.quad 0x00 20. "WT,Watchpoint type" "Unlinked,Linked" bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..." bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled" hexmask.quad.byte 0x00 5.--12. 1. "BAS,Byte address select" newline bitfld.quad 0x00 3.--4. "LSC,Load/store control" "Reserved,Load,Store,Both" bitfld.quad 0x00 1.--2. "PAC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode" bitfld.quad 0x00 0. "E,Enable" "Disabled,Enabled" tree.end tree.end tree.open "AArch32" tree "ID Registers" rgroup.long c15:0x0000++0x0 line.long 0x0 "MIDR,Main ID Register" hexmask.long.byte 0x0 24.--31. 0x1 "IMPL,Implementer code" bitfld.long 0x0 20.--23. "VAR,Variant" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 16.--19. "ARCH, Architecture" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ARMv8" newline hexmask.long.word 0x0 4.--15. 0x10 "PART,Primary Part Number" bitfld.long 0x0 0.--3. "REV,Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" if (CORENAME()=="CORTEXA57") rgroup.long c15:0x0100++0x0 line.long 0x0 "CTR,Cache Type Register" bitfld.long 0x0 24.--27. "CWG,Cache writeback granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." newline bitfld.long 0x0 20.--23. "ERG,Exclusives reservation granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." bitfld.long 0x0 16.--19. "DMINLINE,Smallest data cache line size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." newline bitfld.long 0x0 14.--15. "L1POLICY,L1 Instruction cache policy" "Reserved,Reserved,Reserved,PIPT" bitfld.long 0x0 0.--3. "IMINLINE,I-Cache Minimum Line Size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." elif (CORENAME()=="CORTEXA53") rgroup.long c15:0x0100++0x0 line.long 0x0 "CTR,Cache Type Register" bitfld.long 0x0 24.--27. "CWG,Cache writeback granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." newline bitfld.long 0x0 20.--23. "ERG,Exclusives reservation granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." bitfld.long 0x0 16.--19. "DMINLINE,Smallest data cache line size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." newline bitfld.long 0x0 14.--15. "L1POLICY,L1 Instruction cache policy" "Reserved,Reserved,VIPT,?..." bitfld.long 0x0 0.--3. "IMINLINE,I-Cache Minimum Line Size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." endif if corename()=="CORTEXA57" rgroup.long c15:0x0300++0x0 line.long 0x0 "TLBTR,TLB Type Register" endif if corename()=="CORTEXA57" rgroup.long c15:0x0500++0x0 line.long 0x0 "MPIDR,Multiprocessor Affinity Register" bitfld.long 0x00 30. "U,Processor is part of a multiprocessor or uniprocessor system" "Multiprocessor,?..." newline bitfld.long 0x00 24. "MT,Lowest level of affinity consist of logical processors" "Not implemented,Implemented" hexmask.long.byte 0x00 16.--23. 1. "AFF2,Affinity level 2. Second highest level affinity field" hexmask.long.byte 0x00 8.--15. 1. "AFF1,Affinity level 1. Third highest level affinity field" newline bitfld.long 0x00 0.--1. "CPUID,Indicates the core number in the device" "1,2,3,4" elif corename()=="CORTEXA53" rgroup.long c15:0x0500++0x0 line.long 0x0 "MPIDR,Multiprocessor Affinity Register" bitfld.long 0x00 30. "U,Processor is part of a multiprocessor or uniprocessor system" "Multiprocessor,?..." newline bitfld.long 0x00 24. "MT,Lowest level of affinity consist of logical processors" "Not implemented,?..." hexmask.long.byte 0x00 16.--23. 1. "AFF2,Affinity level 2. Second highest level affinity field" hexmask.long.byte 0x00 8.--15. 1. "AFF1,Affinity level 1. Third highest level affinity field" newline hexmask.long.byte 0x00 0.--7. 1. "AFF0,Affinity level 0. Lowest level affinity field" endif rgroup.long c15:0x0600++0x0 line.long 0x0 "REVIDR,Revision ID Register" rgroup.long c15:0x0410++0x00 line.long 0x00 "ID_MMFR0,Memory Model Feature Register 0" bitfld.long 0x00 28.--31. "IS,Indicates innermost shareability domain implemented" "Reserved,Implemented,?..." bitfld.long 0x00 24.--27. "FCSE,Fast Context Switch Memory Mappings Support" "Not supported,?..." bitfld.long 0x00 20.--23. "AR,Auxiliary Register Support" "Reserved,Supported,?..." newline bitfld.long 0x00 16.--19. "TCM,TCM and Associated DMA Support" "Not supported,?..." bitfld.long 0x00 12.--15. "SL,Shareability levels" "Reserved,Implemented 2 levels,?..." bitfld.long 0x00 8.--11. "OSS,Outer Shareable Support" "Reserved,Implemented,?..." newline bitfld.long 0x00 4.--7. "PMSA,Physical Memory System Architecture (PMSA) Support" "Not supported,?..." bitfld.long 0x00 0.--3. "VMSA,Virtual Memory System Architecture (VMSA) Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..." rgroup.long c15:0x0510++0x00 line.long 0x00 "ID_MMFR1,Memory Model Feature Register 1" bitfld.long 0x00 28.--31. "BTB,Branch Predictor" "Reserved,Reserved,Required,?..." bitfld.long 0x00 24.--27. "L1TCO,Test and Clean Operations on Data Cache/Harvard/Unified Architecture Support" "Not supported,?..." bitfld.long 0x00 20.--23. "L1UCMO,L1 Cache/All Maintenance Operations/Unified Architecture Support" "Not supported,?..." newline bitfld.long 0x00 16.--19. "L1HCMO,L1 Cache/All Maintenance Operations/Harvard Architecture Support" "Not supported,?..." bitfld.long 0x00 12.--15. "L1UCLMOSW,L1 Cache Line Maintenance Operations by Set and Way/Unified Architecture Support" "Not supported,?..." bitfld.long 0x00 8.--11. "L1HCLMOSW,L1 Cache Line Maintenance Operations by Set and Way/Harvard Architecture Support" "Not supported,?..." newline bitfld.long 0x00 4.--7. "L1UCLMOMVA,L1 Cache Line Maintenance Operations by VA/Unified Architecture Support" "Not supported,?..." bitfld.long 0x00 0.--3. "L1HCLMOMVA,L1 Cache Line Maintenance Operations by VA/Harvard Architecture" "Not supported,?..." rgroup.long c15:0x0610++0x00 line.long 0x00 "ID_MMFR2,Memory Model Feature Register 2" bitfld.long 0x00 28.--31. "HAF,Hardware Access Flag Support" "Not supported,?..." bitfld.long 0x00 24.--27. "WFI,Wait for Interrupt Stalling Support" "Reserved,Supported,?..." bitfld.long 0x00 20.--23. "MBF,Memory Barrier Operations Support" "Reserved,Reserved,Supported,?..." newline bitfld.long 0x00 16.--19. "UTLBMO,TLB Maintenance Operations/Unified Architecture Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 12.--15. "HTLBMO,TLB Maintenance Operations/Harvard Architecture Support" "Not supported,?..." bitfld.long 0x00 8.--11. "HL1CMRO,Cache Maintenance Range Operations/Harvard Architecture Support" "Not supported,?..." newline bitfld.long 0x00 4.--7. "HL1BPCRO,Background Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,?..." bitfld.long 0x00 0.--3. "HL1FPCRO,Foreground Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,?..." rgroup.long c15:0x0710++0x00 line.long 0x00 "ID_MMFR3,Memory Model Feature Register 3" bitfld.long 0x00 28.--31. "SS,Supersection support" "Supported,?..." bitfld.long 0x00 24.--27. "CMEMSZ,Cache memory size" "Reserved,Reserved,1TByte,?..." bitfld.long 0x00 20.--23. "CW,Coherent walk" "Reserved,Supported,?..." newline bitfld.long 0x00 12.--15. "MB,Maintenance broadcast Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 8.--11. "BPM,Invalidate Branch predictor Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 4.--7. "HCMOSW,Invalidate Cache by Set and Way/Clean by Set and Way/Invalidate and Clean by Set and Way Support" "Reserved,Supported,?..." newline bitfld.long 0x00 0.--3. "HCMOMVA,Invalidate Cache MVA Support" "Reserved,Supported,?..." rgroup.long c15:0x0620++0x00 line.long 0x00 "ID_MMFR4,ID_MMFR4" bitfld.long 0x00 4.--7. "AC2,Extension of ACTLR and HACTLR by ACTLR2 and HACTLR2" "Not implemented, implemented,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved" rgroup.long c15:0x0020++0x00 line.long 0x00 "ID_ISAR0,Instruction Set Attribute Register 0" bitfld.long 0x00 24.--27. "DIVI,Divide Instructions Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 20.--23. "DEBI,Debug Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 16.--19. "CI,Coprocessor Instructions Support" "Not supported,?..." newline bitfld.long 0x00 12.--15. "CBI,Combined Compare and Branch Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 8.--11. "BI,Bitfield Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 4.--7. "BCI,Bit Counting Instructions Support" "Reserved,Supported,?..." newline bitfld.long 0x00 0.--3. "SI,Swap Instructions Support" "Not supported,?..." rgroup.long c15:0x0120++0x00 line.long 0x00 "ID_ISAR1,Instruction Set Attribute Register 1" bitfld.long 0x00 28.--31. "JI,Jazelle Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 24.--27. "INTI,Interwork Instructions Support" "Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 20.--23. "IMMI,Immediate Instructions Support" "Reserved,Supported,?..." newline bitfld.long 0x00 16.--19. "ITEI,If Then Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 12.--15. "EXTI,Extend Instructions Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 8.--11. "EARI,Exception A and R Instructions Support" "Reserved,Supported,?..." newline bitfld.long 0x00 4.--7. "EXIN,Exception in ARM Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 0.--3. "ENDI,Endian Instructions Support" "Reserved,Supported,?..." rgroup.long c15:0x0220++0x00 line.long 0x00 "ID_ISAR2,Instruction Set Attribute Register 2" bitfld.long 0x00 28.--31. "RI,Reversal Instructions Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 24.--27. "PSRI,PSR Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 20.--23. "UMI,Advanced Unsigned Multiply Instructions Support" "Reserved,Reserved,Supported,?..." newline bitfld.long 0x00 16.--19. "SMI,Advanced Signed Multiply Instructions Support" "Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 12.--15. "MI,Multiply Instructions Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 8.--11. "II,Multi-Access Interruptible Instructions Support" "Not supported,?..." newline bitfld.long 0x00 4.--7. "MHI,Memory Hint Instructions Support" "Reserved,Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 0.--3. "LSI,Load and Store Instructions Support" "Reserved,Reserved,Supported,?..." rgroup.long c15:0x0320++0x00 line.long 0x00 "ID_ISAR3,Instruction Set Attribute Register 3" bitfld.long 0x00 28.--31. "TEEEI,Thumb-EE Extensions Support" "Not supported,?..." bitfld.long 0x00 24.--27. "NOPI,True NOP Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 20.--23. "TCI,Thumb Copy Instructions Support" "Reserved,Supported,?..." newline bitfld.long 0x00 16.--19. "TBI,Table Branch Instructions Support" "Reserved,Supported,Reserved,?..." bitfld.long 0x00 12.--15. "SPI,Synchronization Primitive Instructions Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 8.--11. "SVCI,SVC Instructions Support" "Reserved,Supported,?..." newline bitfld.long 0x00 4.--7. "SIMDI,Single Instruction Multiple Data (SIMD) Instructions Support" "Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 0.--3. "SI,Saturate Instructions Support" "Reserved,Supported,?..." rgroup.long c15:0x0420++0x00 line.long 0x00 "ID_ISAR4,Instruction Set Attribute Register 4" bitfld.long 0x00 28.--31. "SWP_FRAC,Memory System Locking Support" "Not supported,?..." bitfld.long 0x00 24.--27. "PSR_M_I,PSR_M Instructions Support" "Not supported,?..." bitfld.long 0x00 20.--23. "SPRI,Synchronization Primitive instructions" "Supported,?..." newline bitfld.long 0x00 16.--19. "BI,Barrier Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 12.--15. "SMCI,SMC Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 8.--11. "WBI,Write-Back Instructions Support" "Reserved,Supported,?..." newline bitfld.long 0x00 4.--7. "WSI,With-Shift Instructions Support" "Reserved,Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 0.--3. "UI,Unprivileged Instructions Support" "Reserved,Reserved,Supported,?..." rgroup.long c15:0x0520++0x00 line.long 0x00 "ID_ISAR5,Instruction Set Attribute Register 5" bitfld.long 0x00 16.--19. "CRC32,CRC32 Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 12.--15. "SHA2,SHA2 Instructions Support" "Not supported,Supported,?..." bitfld.long 0x00 8.--11. "SHA1,SHA1 Instructions Support" "Not supported,Supported,?..." newline bitfld.long 0x00 4.--7. "AES,AES Instructions Support" "Not supported,Reserved,Supported,?..." bitfld.long 0x00 0.--3. "SEVL,SEVL Instructions Support" "Reserved,Supported,?..." rgroup.long c15:0x0010++0x00 line.long 0x00 "ID_PFR0,Processor Feature Register 0" bitfld.long 0x00 12.--15. "STATE3,Thumb Execution Environment (Thumb-EE) Support" "Not supported,?..." bitfld.long 0x00 8.--11. "STATE2,Support for Jazelle extension" "Reserved,Supported,?..." bitfld.long 0x00 4.--7. "STATE1,Thumb Encoding Supported by the Processor Type" "Reserved,Reserved,Reserved,Supported,?..." newline bitfld.long 0x00 0.--3. "STATE0,ARM Instruction Set Support" "Reserved,Supported,?..." rgroup.long c15:0x0110++0x00 line.long 0x00 "ID_PFR1,Processor Feature Register 1" bitfld.long 0x00 28.--31. "GIC_CPU,GIC CPU Support" "Disabled,Enabled,?..." newline bitfld.long 0x00 16.--19. "GT,Generic Timer Support" "Reserved,Supported,?..." bitfld.long 0x00 12.--15. "VE,Virtualization Extensions Support" "Reserved,Supported,?..." bitfld.long 0x00 8.--11. "MPM,Microcontroller Programmer's Model Support" "Not supported,?..." newline bitfld.long 0x00 4.--7. "SE,Security Extensions Architecture v1 Support" "Reserved,Supported,?..." bitfld.long 0x00 0.--3. "PM,Standard ARMv4 Programmer's Model Support" "Reserved,Supported,?..." if corename()=="CORTEXA57" rgroup.long c15:0x0210++0x00 line.long 0x00 "ID_DFR0,Debug Feature Register 0" bitfld.long 0x00 24.--27. "PMM,Performance Monitor Model Support" "Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 20.--23. "MDM_MM,Memory-mapped Debug Model for M profile processors Support" "Not supported,?..." bitfld.long 0x00 16.--19. "TM_MM,Trace Model (Memory-Mapped) Support" "Reserved,Supported,?..." newline bitfld.long 0x00 12.--15. "CTM_CB,Coprocessor-Based Trace Debug Model Support" "Not supported,?..." bitfld.long 0x00 8.--11. "CDM_MM,Memory-Mapped Debug Model Support" "Not supported,?..." bitfld.long 0x00 4.--7. "SDM_CB,Secure Debug Model (Coprocessor) Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..." newline bitfld.long 0x00 0.--3. "CDM_CB,Coprocessor Debug Model Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..." elif corename()=="CORTEXA53" rgroup.long c15:0x0210++0x00 line.long 0x00 "ID_DFR0,Debug Feature Register 0" bitfld.long 0x00 24.--27. "PMM,Performance Monitor Model Support" "Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 20.--23. "MDM_MM,Memory-mapped Debug Model for M profile processors Support" "Not supported,?..." bitfld.long 0x00 16.--19. "TM_MM,Trace Model (Memory-Mapped) Support" "Reserved,Supported,?..." newline bitfld.long 0x00 12.--15. "CTM_CB,Coprocessor-Based Trace Debug Model Support" "Not supported,?..." bitfld.long 0x00 4.--7. "SDM_CB,Secure Debug Model (Coprocessor) Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 0.--3. "CDM_CB,Coprocessor Debug Model Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..." endif group.long c15:0x0310++0x00 line.long 0x00 "ID_AFR0,Auxiliary Feature Register 0" if corename()=="CORTEXA57" rgroup.long c15:0x6C9++0x0 line.long 0x00 "PMCEID0,Common Event Identification Register 0" bitfld.long 0x00 30. "EVENT30,Chain" "Not implemented,Implemented" newline bitfld.long 0x00 29. "EVENT29,Bus cycle" "Not implemented,Implemented" bitfld.long 0x00 28. "EVENT28,Instruction architecturally executed condition check pass" "Not implemented,Implemented" bitfld.long 0x00 27. "EVENT27,Instruction speculatively executed" "Not implemented,Implemented" newline bitfld.long 0x00 26. "EVENT26,Local memory error" "Not implemented,Implemented" bitfld.long 0x00 25. "EVENT25,Bus access" "Not implemented,Implemented" bitfld.long 0x00 24. "EVENT24,Level 2 data cache write-back" "Not implemented,Implemented" newline bitfld.long 0x00 23. "EVENT23,Level 2 data cache refill" "Not implemented,Implemented" bitfld.long 0x00 22. "EVENT22,Level 2 data cache access" "Not implemented,Implemented" bitfld.long 0x00 21. "EVENT21,Level 1 data cache write-back" "Not implemented,Implemented" newline bitfld.long 0x00 20. "EVENT20,Level 1 instruction cache access" "Not implemented,Implemented" bitfld.long 0x00 19. "EVENT19,Data memory access" "Not implemented,Implemented" bitfld.long 0x00 18. "EVENT18,Predictable branch speculatively executed" "Not implemented,Implemented" newline bitfld.long 0x00 17. "EVENT17,Cycle" "Not implemented,Implemented" bitfld.long 0x00 16. "EVENT16,Mispredicted or not predicted branch speculatively executed" "Not implemented,Implemented" bitfld.long 0x00 15. "EVENT15,Instruction architecturally executed condition check pass unaligned load or store" "Not implemented,Implemented" newline bitfld.long 0x00 14. "EVENT14,Instruction architecturally executed condition check pass procedure return" "Not implemented,Implemented" bitfld.long 0x00 13. "EVENT13,Instruction architecturally executed immediate branch" "Not implemented,Implemented" bitfld.long 0x00 12. "EVENT12,Instruction architecturally executed condition check pass software change of the PC" "Not implemented,Implemented" newline bitfld.long 0x00 11. "EVENT11,Instruction architecturally executed condition check pass write to CONTEXTIDR" "Not implemented,Implemented" bitfld.long 0x00 10. "EVENT10,Instruction architecturally executed condition check pass exception return" "Not implemented,Implemented" bitfld.long 0x00 9. "EVENT9,Exception taken" "Not implemented,Implemented" newline bitfld.long 0x00 8. "EVENT8,Instruction architecturally executed" "Not implemented,Implemented" bitfld.long 0x00 7. "EVENT7,Instruction architecturally executed condition check pass store" "Not implemented,Implemented" bitfld.long 0x00 6. "EVENT6,Instruction architecturally executed condition check pass load" "Not implemented,Implemented" newline bitfld.long 0x00 5. "EVENT5,Level 1 data TLB refill" "Not implemented,Implemented" bitfld.long 0x00 4. "EVENT4,Level 1 data cache access" "Not implemented,Implemented" bitfld.long 0x00 3. "EVENT3,Level 1 data cache refill" "Not implemented,Implemented" newline bitfld.long 0x00 2. "EVENT2,Level 1 instruction TLB refill" "Not implemented,Implemented" bitfld.long 0x00 1. "EVENT1,Level 1 instruction cache refill" "Not implemented,Implemented" bitfld.long 0x00 0. "EVENT0,Instruction architecturally executed condition check pass software increment" "Not implemented,Implemented" rgroup.long c15:0x7C9++0x0 line.long 0x00 "PMCEID1,Common Event Identification Register 1" elif corename()=="CORTEXA53" rgroup.long c15:0x6C9++0x0 line.long 0x00 "PMCEID0,Common Event Identification Register 0" bitfld.long 0x00 31. "EVENT31,L1 Data cache allocate" "Not implemented,Implemented" bitfld.long 0x00 30. "EVENT30,Chain" "Not implemented,Implemented" newline bitfld.long 0x00 29. "EVENT29,Bus cycle" "Not implemented,Implemented" bitfld.long 0x00 28. "EVENT28,Instruction architecturally executed condition check pass" "Not implemented,Implemented" bitfld.long 0x00 27. "EVENT27,Instruction speculatively executed" "Not implemented,Implemented" newline bitfld.long 0x00 26. "EVENT26,Local memory error" "Not implemented,Implemented" bitfld.long 0x00 25. "EVENT25,Bus access" "Not implemented,Implemented" bitfld.long 0x00 24. "EVENT24,Level 2 data cache write-back" "Not implemented,Implemented" newline bitfld.long 0x00 23. "EVENT23,Level 2 data cache refill" "Not implemented,Implemented" bitfld.long 0x00 22. "EVENT22,Level 2 data cache access" "Not implemented,Implemented" bitfld.long 0x00 21. "EVENT21,Level 1 data cache write-back" "Not implemented,Implemented" newline bitfld.long 0x00 20. "EVENT20,Level 1 instruction cache access" "Not implemented,Implemented" bitfld.long 0x00 19. "EVENT19,Data memory access" "Not implemented,Implemented" bitfld.long 0x00 18. "EVENT18,Predictable branch speculatively executed" "Not implemented,Implemented" newline bitfld.long 0x00 17. "EVENT17,Cycle" "Not implemented,Implemented" bitfld.long 0x00 16. "EVENT16,Mispredicted or not predicted branch speculatively executed" "Not implemented,Implemented" bitfld.long 0x00 15. "EVENT15,Instruction architecturally executed condition check pass unaligned load or store" "Not implemented,Implemented" newline bitfld.long 0x00 14. "EVENT14,Instruction architecturally executed condition check pass procedure return" "Not implemented,Implemented" bitfld.long 0x00 13. "EVENT13,Instruction architecturally executed immediate branch" "Not implemented,Implemented" bitfld.long 0x00 12. "EVENT12,Instruction architecturally executed condition check pass software change of the PC" "Not implemented,Implemented" newline bitfld.long 0x00 11. "EVENT11,Instruction architecturally executed condition check pass write to CONTEXTIDR" "Not implemented,Implemented" bitfld.long 0x00 10. "EVENT10,Instruction architecturally executed condition check pass exception return" "Not implemented,Implemented" bitfld.long 0x00 9. "EVENT9,Exception taken" "Not implemented,Implemented" newline bitfld.long 0x00 8. "EVENT8,Instruction architecturally executed" "Not implemented,Implemented" bitfld.long 0x00 7. "EVENT7,Instruction architecturally executed condition check pass store" "Not implemented,Implemented" bitfld.long 0x00 6. "EVENT6,Instruction architecturally executed condition check pass load" "Not implemented,Implemented" newline bitfld.long 0x00 5. "EVENT5,Level 1 data TLB refill" "Not implemented,Implemented" bitfld.long 0x00 4. "EVENT4,Level 1 data cache access" "Not implemented,Implemented" bitfld.long 0x00 3. "EVENT3,Level 1 data cache refill" "Not implemented,Implemented" newline bitfld.long 0x00 2. "EVENT2,Level 1 instruction TLB refill" "Not implemented,Implemented" bitfld.long 0x00 1. "EVENT1,Level 1 instruction cache refill" "Not implemented,Implemented" bitfld.long 0x00 0. "EVENT0,Instruction architecturally executed condition check pass software increment" "Not implemented,Implemented" rgroup.long c15:0x7C9++0x0 line.long 0x00 "PMCEID1,Common Event Identification Register 1" bitfld.long 0x00 0. "EVENT32,L2D Cache Allocate" "Not implemented,Implemented" endif group.long c15:0x020D++0x00 line.long 0x00 "TPIDRURW,User Read/Write Thread ID Register" group.long c15:0x030D++0x00 line.long 0x00 "TPIDRURO,User Read-Only Thread ID Register" group.long c15:0x040D++0x00 line.long 0x00 "TPIDRPRW,EL1 only Thread ID Register" group.long c15:0x420D++0x00 line.long 0x00 "HTPIDR,Hypervisor Software Thread ID Register" tree.end tree "System Control and Configuration" if corename()=="CORTEXA57" if (((per.l(c15:0x202))&0x80000000)==0x00000000) group.long c15:0x0001++0x0 line.long 0x0 "SCTLR,System Control Register" bitfld.long 0x0 30. "TE,T32 exception enable" "A32,T32" bitfld.long 0x0 29. "AFE,Access Flag Enable" "Disabled,Enabled" newline bitfld.long 0x0 28. "TRE,TEX remap enable" "Disabled,Enabled" bitfld.long 0x0 25. "EE,Exception endianness" "Little,Big" newline bitfld.long 0x0 20. "UWXN,Unprivileged write permission implies PL1 Execute Never" "Not forced,Forced" bitfld.long 0x0 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced" newline bitfld.long 0x0 18. "NTWE,Not trap WFE" "No,Yes" bitfld.long 0x0 16. "NTWI,Not trap WFI" "No,Yes" newline bitfld.long 0x0 13. "V,Base Location of Exception Registers" "0x00000000,0xFFFF0000" bitfld.long 0x0 12. "I,Instruction Cache Enable" "Disabled,Enabled" newline bitfld.long 0x0 8. "SED,SETEND Disable" "No,Yes" bitfld.long 0x0 7. "ITD,IT Disable" "No,Yes" newline bitfld.long 0x0 6. "THEE,ThumbEE Disable" "No,Yes" bitfld.long 0x0 5. "CP15BEN,c15 barrier enable" "Disabled,Enabled" newline bitfld.long 0x0 2. "C,Enable unified cache or data cache" "Disabled,Enabled" bitfld.long 0x0 1. "A,Strict Alignment" "Disabled,Enabled" newline bitfld.long 0x0 0. "M,MMU or Protection Unit" "Disabled,Enabled" else group.long c15:0x0001++0x0 line.long 0x0 "SCTLR,Control Register" bitfld.long 0x0 30. "TE,T32 exception enable" "A32,T32" bitfld.long 0x0 25. "EE,Exception endianness" "Little,Big" newline bitfld.long 0x0 20. "UWXN,Unprivileged write permission implies PL1 Execute Never" "Not forced,Forced" bitfld.long 0x0 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced" newline bitfld.long 0x0 18. "NTWE,Not trap WFE" "No,Yes" bitfld.long 0x0 16. "NTWI,Not trap WFI" "No,Yes" newline bitfld.long 0x0 13. "V,Base Location of Exception Registers" "0x00000000,0xFFFF0000" bitfld.long 0x0 12. "I,Instruction Cache Enable" "Disabled,Enabled" newline bitfld.long 0x0 8. "SED,SETEND Disable" "No,Yes" bitfld.long 0x0 7. "ITD,IT Disable" "No,Yes" newline bitfld.long 0x0 6. "THEE,ThumbEE Disable" "No,Yes" bitfld.long 0x0 5. "CP15BEN,c15 barrier enable" "Disabled,Enabled" newline bitfld.long 0x0 2. "C,Enable unified cache or data cache" "Disabled,Enabled" bitfld.long 0x0 1. "A,Strict Alignment" "Disabled,Enabled" newline bitfld.long 0x0 0. "M,MMU or Protection Unit" "Disabled,Enabled" endif group.quad c15:0x100F0++0x01 line.quad 0x00 "CPUACTLR,CPU Auxiliary Control Register" bitfld.quad 0x00 63. "FPRCGEC,Force processor RCG enables active" "Not forced,Forced" bitfld.quad 0x00 59. "DLPDMB,Disable load pass DMB" "No,Yes" newline bitfld.quad 0x00 58. "DDMBN,Disable DMB nullification" "No,Yes" bitfld.quad 0x00 57. "TA,Treat DMB st/stand DMB ld/allas DMB all/all" "Disabled,Enabled" newline bitfld.quad 0x00 56. "DL1DCHP,Disable L1 Data Cache hardware prefetcher" "No,Yes" bitfld.quad 0x00 55. "DLPS,Disable load pass store" "No,Yes" newline bitfld.quad 0x00 54. "TGRE,Treat GRE/nGRE as nGnRE" "Disabled,Enabled" bitfld.quad 0x00 53. "TDMBADSB,Treat DMBand DSBas if their domain field is SY" "Disabled,Enabled" newline bitfld.quad 0x00 52. "DORFLDNPI,Disable over-read from LDNP instruction" "No,Yes" bitfld.quad 0x00 51. "DCDAFEMP,Disable contention detection and fast exclusive monitor path" "No,Yes" newline bitfld.quad 0x00 50. "DSSONNCGREEMT,Disable store streaming on NC/GRE memory type" "No,Yes" bitfld.quad 0x00 49. "DNHOWBNAMT,Disable non-allocate hint of Write-Back No-Allocate (WBNA) memory type" "No,Yes" newline bitfld.quad 0x00 48. "DESRAFLSTL2,Disable early speculative read access from LS to L2" "No,Yes" bitfld.quad 0x00 47. "DL1L2HP,Disable L1/L2 hardware prefetch across 4KB page boundary even if page is 64KB or larger" "No,Yes" newline bitfld.quad 0x00 44. "EDCCADCCI,Enable data cache clean as data cache clean/invalidate" "Disabled,Enabled" bitfld.quad 0x00 39. "DIM,Disable instruction merging" "No,Yes" newline bitfld.quad 0x00 38. "FFPSCRWF,Force FPSCR write flush" "Not forced,Forced" bitfld.quad 0x00 37. "DIGS,Disable instruction group split" "No,Yes" newline bitfld.quad 0x00 36. "FIDSBONASBE,Force implicit DSB on an ISB event" "Not forced,Forced" bitfld.quad 0x00 34. "DSBP,Disable Static Branch Predictor" "No,Yes" newline bitfld.quad 0x00 33. "DL1ICWPIMBTB,Disable L1 Instruction Cache way prediction in micro-BTB" "No,Yes" bitfld.quad 0x00 32. "DL1ICP,Disable L1 Instruction Cache prefetch" "No,Yes" newline bitfld.quad 0x00 31. "SDEH,Snoop-delayed exclusive handling" "Disabled,Enabled" bitfld.quad 0x00 30. "FMCEA,Force main clock enable active" "Not forced,Forced" newline bitfld.quad 0x00 29. "FASIMDFPCEA,Force Advanced SIMD and floating-point clock enable active" "Disabled,Enabled" bitfld.quad 0x00 27.--28. "WSNAT,Write streaming no-allocate threshold" "12th,128th,512th,Disabled" newline bitfld.quad 0x00 25.--26. "WSNL1AT,Write streaming no-L1-allocate threshold" "4th,64th,128th,Disabled" bitfld.quad 0x00 24. "NCSE,Non-cacheable streaming enhancement" "Disabled,Enabled" newline bitfld.quad 0x00 23. "FIORTTSSAW,Force in-order requests to the same set and way" "Not forced,Forced" bitfld.quad 0x00 22. "FIOLI,Force in-order load issue" "Not forced,Forced" newline bitfld.quad 0x00 21. "DL2TLBP,Disable L2 TLB prefetching" "No,Yes" bitfld.quad 0x00 20. "DL2TTWIPAPAC,Disable L2 translation table walk IPA PA cache" "No,Yes" newline bitfld.quad 0x00 19. "DL2S1TTWC,Disable L2 stage 1 translation table walk cache" "No,Yes" bitfld.quad 0x00 18. "DL2S1TTWL2PAC,Disable L2 stage 1 translation table walk L2 PA cache" "No,Yes" newline bitfld.quad 0x00 17. "DL2TLBPO,Disable L2 TLB performance optimization" "No,Yes" bitfld.quad 0x00 16. "EFSOADLR,Enable full Strongly-ordered and Device load replay" "Disabled,Enabled" newline bitfld.quad 0x00 15. "FIOIIBEU,Force in-order issue in branch execute unit" "Not forced,Forced" bitfld.quad 0x00 14. "FLOFOIGCDAPC,Force limit of one instruction group commit/de-allocate per cycle" "Not forced,Forced" newline bitfld.quad 0x00 13. "FASPRW,Flush after Special Purpose Register (SPR) writes" "Disabled,Enabled" bitfld.quad 0x00 12. "FPOSPRS,Force push of SPRs" "Disabled,Enabled" newline bitfld.quad 0x00 11. "LTOIPIG,Limit to one instruction per instruction group" "Disabled,Enabled" bitfld.quad 0x00 10. "FSAEIG,Force serialization after each instruction group" "Not forced,Forced" newline bitfld.quad 0x00 9. "DFRO,Disable flag renaming optimization" "No,Yes" bitfld.quad 0x00 8. "EWFIIAANOPI,Execute WFI instruction as a NOP instruction" "Disabled,Enabled" newline bitfld.quad 0x00 7. "EWFEIAANOPI,Execute WFE instruction as a NOP instruction" "Disabled,Enabled" bitfld.quad 0x00 5. "EPLDPLDWIASNOP,Execute PLDand PLDWinstructions as a NOP" "Disabled,Enabled" newline bitfld.quad 0x00 4. "DIP,Disable indirect predictor" "No,Yes" bitfld.quad 0x00 3. "DMBTB,Disable micro-BTB" "No,Yes" newline bitfld.quad 0x00 1. "DICMS,Disable Instruction Cache miss streaming" "No,Yes" bitfld.quad 0x00 0. "EIOBTB,Enable invalidates of BTB" "Disabled,Enabled" group.quad c15:0x110F0++0x01 line.quad 0x00 "CPUECTLR,CPU Extended Control Register" bitfld.quad 0x00 38. "DTWDAP,Disable table walk descriptor access prefetch" "No,Yes" bitfld.quad 0x00 35.--36. "L2IFPD,L2 instruction fetch prefetch distance" "0 lines,1 line,2 lines,3 lines" newline bitfld.quad 0x00 32.--33. "L2LSDPD,L2 load/store data prefetch distance" "0 line,2 lines,4 lines,8 lines" bitfld.quad 0x00 6. "SMPEN,Enable hardware management of data coherency with other processors in the multiprocessor" "Disabled,Enabled" newline bitfld.quad 0x00 0.--2. "CPURETCTL,CPU retention control" "Disabled,2 ticks,8 ticks,32 ticks,64 ticks,128 ticks,256 ticks,512 ticks" group.quad c15:0x120F0++0x01 line.quad 0x00 "CPUMERRSR,CPU Memory Error Syndrome Register" bitfld.quad 0x00 63. "FATAL,Fatal bit" "0,1" hexmask.quad.byte 0x00 40.--47. 1. "OEC,Other error count" newline hexmask.quad.byte 0x00 32.--39. 1. "REC,Repeat error count" bitfld.quad 0x00 31. "VALID,Valid bit" "Not valid,Valid" newline hexmask.quad.byte 0x00 24.--30. 1. "RAMID,RAM Identifier" bitfld.quad 0x00 18.--22. "B/W,Bank/Way" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline hexmask.quad.tbyte 0x00 0.--17. 1. "INDEX,RAM address" group.long c15:0x0101++0x0 line.long 0x0 "ACTLR,Auxiliary Control Register" elif corename()=="CORTEXA53" group.long c15:0x0001++0x0 line.long 0x0 "SCTLR,Control Register" bitfld.long 0x0 30. "TE,T32 exception enable" "A32,T32" bitfld.long 0x0 29. "AFE,Access Flag Enable" "Disabled,Enabled" newline bitfld.long 0x0 28. "TRE,TEX remap enable" "Disabled,Enabled" bitfld.long 0x0 25. "EE,Exception endianness" "Little,Big" newline bitfld.long 0x0 20. "UWXN,Unprivileged write permission implies PL1 Execute Never" "Not forced,Forced" bitfld.long 0x0 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced" newline bitfld.long 0x0 18. "NTWE,Not trap WFE" "No,Yes" bitfld.long 0x0 16. "NTWI,Not trap WFI" "No,Yes" newline bitfld.long 0x0 13. "V,Base Location of Exception Registers" "0x00000000,0xFFFF0000" bitfld.long 0x0 12. "I,Instruction Cache Enable" "Disabled,Enabled" newline bitfld.long 0x0 8. "SED,SETEND Disable" "No,Yes" bitfld.long 0x0 6. "ITD,IT Disable" "No,Yes" newline bitfld.long 0x0 5. "CP15BEN,c15 barrier enable" "Disabled,Enabled" bitfld.long 0x0 2. "C,Enable unified cache or data cache" "Disabled,Enabled" newline bitfld.long 0x0 1. "A,Strict Alignment" "Disabled,Enabled" bitfld.long 0x0 0. "M,MMU or Protection Unit" "Disabled,Enabled" group.quad c15:0x100F0++0x01 line.quad 0x00 "CPUACTLR,CPU Auxiliary Control Register" bitfld.quad 0x00 30. "FPDIDIS,Disable floating-point dual issue" "No,Yes" bitfld.quad 0x00 29. "DIDIS,Disable Dual Issue" "No,Yes" newline bitfld.quad 0x00 27.--28. "RADIS,Write streaming no-allocate threshold" "16th,128th,512th,Disabled" bitfld.quad 0x00 25.--26. "L1RADIS,Write streaming no-L1-allocate threshold" "4th,64th,128th,Disabled" newline bitfld.quad 0x00 24. "DTAH,Disable Transient allocation hint" "No,Yes" bitfld.quad 0x00 23. "STBPFRS,Disable ReadUnique request for prefetch streams initiated by STB accesses" "No,Yes" newline bitfld.quad 0x00 22. "STBPFDIS,Disable prefetch streams initiated from STB accesses" "No,Yes" bitfld.quad 0x00 21. "IFUTHDIS,IFU fetch throttle disabled" "No,Yes" newline bitfld.quad 0x00 19.--20. "NPFSTRM,Number of independent data prefetch streams" "1 stream,2 streams,3 streams,4 streams" bitfld.quad 0x00 18. "DSTDIS,Enable device split throttle" "Disabled,Enabled" newline bitfld.quad 0x00 17. "STRIDE,Enable stride detection" "Disabled,Enabled" bitfld.quad 0x00 13.--15. "L1PCTL,L1 Data prefetch control" "Disabled,1,2,3,4,5,6,7" newline bitfld.quad 0x00 10. "DODMBS,Disable optimized Data Memory Barrier behavior" "No,Yes" group.quad c15:0x110F0++0x01 line.quad 0x00 "CPUECTLR,CPU Extended Control Register" bitfld.quad 0x00 6. "SMPEN,Enable hardware management of data coherency with other processors in the multiprocessor" "Disabled,Enabled" bitfld.quad 0x00 3.--5. "FPRETCTL,Advanced SIMD and Floating-point retention control" "Disabled,2 ticks,8 ticks,32 ticks,64 ticks,128 ticks,256 ticks,512 ticks" newline bitfld.quad 0x00 0.--2. "CPURETCTL,CPU retention control" "Disabled,2 ticks,8 ticks,32 ticks,64 ticks,128 ticks,256 ticks,512 ticks" group.quad c15:0x120F0++0x01 line.quad 0x00 "CPUMERRSR,CPU Memory Error Syndrome Register" bitfld.quad 0x00 63. "FATAL,Fatal bit" "0,1" hexmask.quad.byte 0x00 40.--47. 1. "OEC,Other error count" newline hexmask.quad.byte 0x00 32.--39. 1. "REC,Repeat error count" bitfld.quad 0x00 31. "VALID,Valid bit" "Not valid,Valid" newline hexmask.quad.byte 0x00 24.--30. 1. "RAMID,RAM Identifier" bitfld.quad 0x00 18.--20. "C/W,CPUID/Way" "0,1,2,3,4,5,6,7" newline hexmask.quad.word 0x00 0.--11. 1. "RAD,RAM address" group.long c15:0x0101++0x0 line.long 0x0 "ACTLR,Auxiliary Control Register" bitfld.long 0x00 6. "L2ACTLRAC,L2ACTLR write access control" "Disabled,Enabled" bitfld.long 0x00 5. "L2ECTLRAC,L2ECTLR write access control" "Disabled,Enabled" newline bitfld.long 0x00 4. "L2CTLRAC,L2CTLR write access control" "Disabled,Enabled" bitfld.long 0x00 1. "CPUECTLRAC,CPUECTLR write access control" "Disabled,Enabled" newline bitfld.long 0x00 0. "CPUACTLRAC,CPUACTLR write access control" "Disabled,Enabled" endif if corename()=="CORTEXA57" group.long c15:0x0201++0x00 line.long 0x0 "CPACR,Coprocessor Access Control Register" bitfld.long 0x0 31. "ASEDIS,Disable Advanced SIMD Extension functionality" "No,Yes" bitfld.long 0x0 28. "TRCDIS,Disable CP14 access to trace registers" "No,Yes" newline bitfld.long 0x0 22.--23. "CP11,Coprocessor access control" "Denied,EL1 or higher,Reserved,Full" bitfld.long 0x0 20.--21. "CP10,Coprocessor access control" "Denied,EL1 or higher,Reserved,Full" elif corename()=="CORTEXA53" group.long c15:0x201++0x00 line.long 0x0 "CPACR,Coprocessor Access Control Register" bitfld.long 0x0 31. "ASEDIS,Disable Advanced SIMD Extension functionality" "No,Yes" bitfld.long 0x0 22.--23. "CP11,Coprocessor access control" "Denied,EL1 only,Reserved,Full" newline bitfld.long 0x0 20.--21. "CP10,Coprocessor access control" "Denied,EL1 only,Reserved,Full" endif group.long c15:0x0011++0x0 line.long 0x00 "SCR,Secure Configuration Register" bitfld.long 0x00 13. "TWE,Trap WFE Instructions" "Not trapped,Trapped" bitfld.long 0x00 12. "TWI,Trap WFI Instructions" "Not trapped,Trapped" newline bitfld.long 0x00 9. "SIF,Secure Instruction Fetch" "Permitted,Not permitted" bitfld.long 0x00 8. "HCE,Hypervisor Call enable" "No,Yes" newline bitfld.long 0x00 7. "SCD,Secure Monitor Call disable" "No,Yes" bitfld.long 0x00 5. "AW,Controls whether the Non-secure world can modify the A-bit in the CPSR" "Not allowed,Allowed" newline bitfld.long 0x00 4. "FW,Controls whether the Non-secure world can modify the F-bit in the CPSR" "Not allowed,Allowed" bitfld.long 0x00 3. "EA,External Abort exceptions handled in Abort mode or Monitor mode" "Abort,Monitor" newline bitfld.long 0x00 2. "FIQ,FIQ exceptions handled in Abort mode or Monitor mode" "FIQ,Monitor" bitfld.long 0x00 1. "IRQ,IRQ exceptions handled in Abort mode or Monitor mode" "IRQ,Monitor" newline bitfld.long 0x00 0. "NS,Secure mode " "Secure,Non-secure" group.long c15:0x0111++0x00 line.long 0x00 "SDER,Secure Debug Enable Register" bitfld.long 0x00 1. "SUNIDEN,Non-Invasive Secure User Debug Enable bit" "Denied,Permitted" bitfld.long 0x00 0. "SUIDEN,Invasive Secure User Debug Enable bit" "Denied,Permitted" group.long c15:0x0131++0x00 line.long 0x00 "SDCR,Secure Debug Control Register" bitfld.long 0x00 21. "EPMAD,External debugger access to Performance Monitors registers disabled" "No,Yes" bitfld.long 0x00 20. "EDAD,External debugger access to breakpoint and watchpoint registers disabled" "No,Yes" newline bitfld.long 0x00 17. "SPME,Secure performance monitors enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. "SPD,AArch32 secure privileged debug" "Legacy,Reserved,Disabled,Enabled" group.long c15:0x0211++0x00 line.long 0x00 "NSACR,Non-Secure Access Control Register" bitfld.long 0x00 15. "NSASEDIS,Disable Non-secure Advanced SIMD Extension functionality" "No,Yes" bitfld.long 0x00 11. "CP11,Coprocessor 11 in the Non-secure World Access Permission" "Denied,Permitted" newline bitfld.long 0x00 10. "CP10,Coprocessor 10 in the Non-secure World Access Permission" "Denied,Permitted" if corename()=="CORTEXA57" group.long c15:0x000C++0x00 line.long 0x00 "VBAR,Vector Base Address Register" hexmask.long 0x00 5.--31. 0x20 "VBA,Vector Base Address" group.long c15:0x010C++0x00 line.long 0x00 "MVBAR,Monitor Vector Base Address Register" hexmask.long 0x00 5.--31. 0x20 "VBA,Vector Base Address" elif corename()=="CORTEXA53" group.long c15:0x000C++0x00 line.long 0x00 "VBAR,Vector Base Address Register" group.long c15:0x010C++0x00 line.long 0x00 "MVBAR,Monitor Vector Base Address Register" endif rgroup.long c15:0x001C++0x00 line.long 0x00 "ISR,Interrupt Status Register" bitfld.long 0x00 8. "A,External abort pending flag" "Not pending,Pending" bitfld.long 0x00 7. "I,Interrupt pending flag" "Not pending,Pending" newline bitfld.long 0x00 6. "F,Fast interrupt pending flag" "Not pending,Pending" group.long c15:0x020C++0x00 line.long 0x00 "RMR,Reset Management Register" bitfld.long 0x00 1. "RR,Reset Request" "Not requested,Requested" bitfld.long 0x00 0. "AA64,Determines which execution state the processor boots into after a warm reset" "AArch32,AArch64" group.long c15:0x0015++0x00 line.long 0x00 "ADFSR,Auxiliary Data Fault Status Register" group.long c15:0x0115++0x00 line.long 0x00 "AIFSR,Auxiliary Instruction Fault Status Register" if corename()=="CORTEXA57" if (((per.l(c15:0x202))&0x80000000)==0x80000000) group.long c15:0x0005++0x00 line.long 0x00 "DFSR,Data Fault Status Register" bitfld.long 0x00 15. "UA,Unattributable fault" "Attributable,Unattributable" bitfld.long 0x00 14. "UC,Uncontainable fault" "Containable,Uncontainable" newline bitfld.long 0x00 13. "CM,Cache maintenance fault" "Not aborted,Aborted" bitfld.long 0x00 12. "EXT,External Abort Qualifier" "DECERR,SLVERR" newline bitfld.long 0x00 9. "LPAE,Large physical address extension" "Disabled,Enabled" bitfld.long 0x00 0.--5. "STATUS,Fault Status" "Address size/TTBR0/TTBR1,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Access flag/0th level,Access flag/1st level,Access flag/2nd level,Access flag/3rd level,Permission/0th level,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external,Async. external,Reserved,Reserved,Sync. external/on TTW/0th level,Sync. external/on TTW/1st level,Sync. external/on TTW/2nd level,Sync. external/on TTW/3rd level,Sync. parity/on memory access,Async. parity/on memory access,Reserved,Reserved,Sync. parity/on memory access/on TTW/0th level,Sync. parity/on memory access/on TTW/1st level,Sync. parity/on memory access/on TTW/2nd level,Sync. parity/on memory access/on TTW/3rd level,Reserved,Alignment,Debug event,?..." else group.long c15:0x0005++0x00 line.long 0x00 "DFSR,Data Fault Status Register" bitfld.long 0x00 15. "UA,Unattributable fault" "Attributable,Unattributable" bitfld.long 0x00 14. "UC,Uncontainable fault" "Containable,Uncontainable" newline bitfld.long 0x00 13. "CM,Cache maintenance fault" "Not aborted,Aborted" bitfld.long 0x00 12. "EXT,External Abort Qualifier" "DECERR,SLVERR" newline bitfld.long 0x00 11. "WNR,Access Caused an Abort Type" "Read,Write" bitfld.long 0x00 9. "LPAE,Large physical address extension" "Disabled,Enabled" newline bitfld.long 0x00 4.--7. "DOMAIN,Domain Accessed When a Data Fault Occurs" "D0,D1,D2,D3,D4,D5,D6,D7,D8,D9,D10,D11,D12,D13,D14,D15" bitfld.long 0x00 0.--3. 10. "FS,Fault Status" "Reserved,Alignment,Debug event,Access flag/1st level,Reserved,Translation/1st level,Access flag/2nd level,Translation/1st level,Sync. external/non-translation,Domain/1st level,Reserved,Domain/2nd level,Sync. external/1st level,Permission/1nd level,Sync. external/2nd level,Permission/2nd level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Async. external,Reserved,Async. parity,Sync. parity,Reserved,Reserved,Sync. parity/1st level,Reserved,Sync. parity/2nd level,?..." endif elif corename()=="CORTEXA53" if (((per.l(c15:0x202))&0x80000000)==0x80000000) group.long c15:0x0005++0x00 line.long 0x00 "DFSR,Data Fault Status Register" bitfld.long 0x00 13. "CM,Cache maintenance fault" "Not aborted,Aborted" bitfld.long 0x00 12. "EXT,External Abort Qualifier" "DECERR,SLVERR" newline bitfld.long 0x00 11. "WNR,Access Caused an Abort Type" "Read,Write" bitfld.long 0x00 0.--5. "STATUS,Fault Status" "Reserved,Reserved,Reserved,Reserved,Reserved,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3rd level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external,Reserved,Reserved,Reserved,Reserved,Sync. external/on TTW/1st level,Sync. external/on TTW/2nd level,Sync. external/on TTW/3rd level,Sync. parity/on memory access,Reserved,Reserved,Reserved,Reserved,Sync. parity/on memory access/on TTW/1st level,Sync. parity/on memory access/on TTW/2nd level,Sync. parity/on memory access/on TTW/3rd level,Reserved,Alignment,Debug event,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Reserved,LDREX/STREX,?..." else group.long c15:0x0005++0x00 line.long 0x00 "DFSR,Data Fault Status Register" bitfld.long 0x00 13. "CM,Cache maintenance fault" "Not aborted,Aborted" bitfld.long 0x00 12. "EXT,External Abort Qualifier" "DECERR,SLVERR" newline bitfld.long 0x00 11. "WNR,Access Caused an Abort Type" "Read,Write" bitfld.long 0x00 4.--7. "DOMAIN,Domain Accessed When a Data Fault Occurs" "D0,D1,D2,D3,D4,D5,D6,D7,D8,D9,D10,D11,D12,D13,D14,D15" newline bitfld.long 0x00 0.--3. 10. "FS,Fault Status" "Reserved,Alignment,Debug event,Access flag/section,Instruction cache maintenance,Translation/section,Access flag/page,Translation/page,Sync. external/non-translation,Domain/section,Reserved,Domain/page,Sync. external/1st level,Permission/section,Sync. external/2nd level,Permission/2nd level,TLB conflict,Reserved,Reserved,Reserved,Reserved,LDREX or STREX,Async. external,Reserved,Async. parity,Sync. parity,Reserved,Reserved,Sync. parity/1st level,Reserved,Sync. parity/2nd level,?..." endif endif if corename()=="CORTEXA57" if (((per.l(c15:0x202))&0x80000000)==0x80000000) group.long c15:0x0105++0x00 line.long 0x00 "IFSR,Instruction Fault Status Register" bitfld.long 0x00 12. "EXT,External Abort Type" "DECERR,SLVERR" bitfld.long 0x00 9. "LPAE,Large physical address extension" "Disabled,Enabled" newline bitfld.long 0x00 0.--5. "STATUS,Fault Status" "Address size/TTBR0/TTBR1,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Access flag/0th level,Access flag/1st level,Access flag/2nd level,Access flag/3rd level,Permission/0th level,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external,Reserved,Reserved,Reserved,Reserved,Sync. external/on TTW/1st level,Sync. external/on TTW/2nd level,Sync. external/on TTW/3rd level,Sync. parity/on memory access,Reserved,Reserved,Reserved,Reserved,Sync. parity/on memory access/on TTW/1st level,Sync. parity/on memory access/on TTW/2nd level,Sync. parity/on memory access/on TTW/3rd level,Reserved,Alignment,Debug event,?..." else group.long c15:0x0105++0x00 line.long 0x00 "IFSR,Instruction Fault Status Register" bitfld.long 0x00 12. "EXT,External Abort Type" "DECERR,SLVERR" bitfld.long 0x00 9. "LPAE,Large physical address extension" "Disabled,Enabled" newline bitfld.long 0x00 0.--3. 10. "FS,Fault Status" "Reserved,Alignment,Debug event,Access flag/1st level,Reserved,Translation/1st level,Access flag/2nd level,Translation/2nd level,Sync. external/non-translation,Domain/1st level,Reserved,Domain/2nd level,Sync. external/on TTW/1st level,Permission/1st level,Sync. external/on TTW/2nd level,Permission/2nd level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Sync. parity/on memory access,Reserved,Reserved,Sync. parity/on TTW/1st level,Reserved,Sync. parity/on TTW/2nd level,?..." endif elif corename()=="CORTEXA53" if (((per.l(c15:0x202))&0x80000000)==0x80000000) group.long c15:0x0105++0x00 line.long 0x00 "IFSR,Instruction Fault Status Register" bitfld.long 0x00 12. "EXT,External Abort Type" "DECERR,SLVERR" bitfld.long 0x00 9. "LPAE,Large physical address extension" "Disabled,Enabled" newline bitfld.long 0x00 0.--5. "STATUS,Fault Status" "Address size/TTBR0/TTBR1,Reserved,Reserved,Reserved,Reserved,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3rd level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external,Reserved,Reserved,Reserved,Reserved,Sync. external/on TTW/1st level,Sync. external/on TTW/2nd level,Sync. external/on TTW/3rd level,Sync. parity/on memory access,Reserved,Reserved,Reserved,Reserved,Sync. parity/on memory access/on TTW/1st level,Sync. parity/on memory access/on TTW/2nd level,Sync. parity/on memory access/on TTW/3rd level,Reserved,Alignment,Debug event,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,?..." else group.long c15:0x0105++0x00 line.long 0x00 "IFSR,Instruction Fault Status Register" bitfld.long 0x00 12. "EXT,External Abort Type" "DECERR,SLVERR" bitfld.long 0x00 9. "LPAE,Large physical address extension" "Disabled,Enabled" newline bitfld.long 0x00 0.--3. 10. "FS,Fault Status" "Reserved,Reserved,Debug event,Access flag/section,Reserved,Translation/section,Access flag/page,Translation/page,Sync. external/non-translation,Domain/section,Reserved,Domain/page,Sync. external/on TTW/1st level,Permission/section,Sync. external/on TTW/2nd level,Permission/page,TLB conflict,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Sync. parity/on memory access,Reserved,Reserved,Sync. parity/on TTW/1st level,Reserved,Sync. parity/on TTW/2nd level,?..." endif endif group.long c15:0x0006++0x00 line.long 0x00 "DFAR,Data Fault Address Register" group.long c15:0x0206++0x00 line.long 0x00 "IFAR,Instruction Fault Address Register" if corename()=="CORTEXA57" rgroup.long c15:0x103F++0x00 line.long 0x00 "CBAR,Configuration Base Address Register" hexmask.long.word 0x00 18.--31. 1. "PERIPHBASE[31:18],Periphbase[31:18]" hexmask.long.word 0x00 0.--11. 1. "PERIPHBASE[42:32],Periphbase[42:32]" elif corename()=="CORTEXA53" rgroup.long c15:0x103F++0x00 line.long 0x00 "CBAR,Configuration Base Address Register" hexmask.long.word 0x00 18.--31. 1. "PERIPHBASE[31:18],Periphbase[31:18]" hexmask.long.byte 0x00 0.--7. 1. "PERIPHBASE[39:32],Periphbase[39:32]" endif group.long c15:0x000D++0x00 line.long 0x00 "FCSEIDR,FCSE Process ID register" group.long c15:0x020D++0x00 line.long 0x00 "TPIDRURW,PL0 Read/Write Software Thread ID Register" group.long c15:0x030D++0x00 line.long 0x00 "TPIDRURO,PL0 Read-Only Software Thread ID Register" group.long c15:0x040D++0x00 line.long 0x00 "TPIDRPRW,PL1 Software Thread ID Register" tree.end tree "Memory Management Unit" if corename()=="CORTEXA57" group.long c15:0x0001++0x0 line.long 0x0 "SCTLR,Control Register" bitfld.long 0x0 30. "TE,T32 exception enable" "A32,T32" bitfld.long 0x0 29. "AFE,Access Flag Enable" "Disabled,Enabled" newline bitfld.long 0x0 28. "TRE,TEX remap enable" "Disabled,Enabled" bitfld.long 0x0 25. "EE,Exception endianness" "Little,Big" newline bitfld.long 0x0 20. "UWXN,Unprivileged write permission implies PL1 Execute Never" "Not forced,Forced" bitfld.long 0x0 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced" newline bitfld.long 0x0 18. "NTWE,Not trap WFE" "No,Yes" bitfld.long 0x0 16. "NTWI,Not trap WFI" "No,Yes" newline bitfld.long 0x0 13. "V,Base Location of Exception Registers" "0x00000000,0xFFFF0000" bitfld.long 0x0 12. "I,Instruction Cache Enable" "Disabled,Enabled" newline bitfld.long 0x0 8. "SED,SETEND Disable" "No,Yes" bitfld.long 0x0 7. "ITD,IT Disable" "No,Yes" newline bitfld.long 0x0 6. "THEE,ThumbEE Disable" "No,Yes" bitfld.long 0x0 5. "CP15BEN,c15 barrier enable" "Disabled,Enabled" newline bitfld.long 0x0 2. "C,Enable unified cache or data cache" "Disabled,Enabled" bitfld.long 0x0 1. "A,Strict Alignment" "Disabled,Enabled" newline bitfld.long 0x0 0. "M,MMU or Protection Unit" "Disabled,Enabled" group.long c15:0x4001++0x0 line.long 0x00 "HSCTLR,System Control Register" bitfld.long 0x0 30. "TE,Thumb exception enable" "ARM,Thumb" bitfld.long 0x0 25. "EE,Exception endianness" "Little,Big" newline bitfld.long 0x0 21. "FI,Fast Interrupts configuration enable" "Disabled,Enabled" bitfld.long 0x0 19. "WXN,Write permission implies XN" "Not forced,Forced" newline bitfld.long 0x0 12. "I,Instruction Cache Enable" "Disabled,Enabled" bitfld.long 0x0 8. "SED,SETEND Disable" "No,Yes" newline bitfld.long 0x0 7. "ITD,IT Disable" "No,Yes" bitfld.long 0x0 5. "CP15BEN,CP15 barrier enable" "Disabled,Enabled" newline bitfld.long 0x0 2. "C,Enable unified cache or data cache" "Disabled,Enabled" bitfld.long 0x0 1. "A,Strict Alignment" "Disabled,Enabled" newline bitfld.long 0x0 0. "M,Enable address translation" "Disabled,Enabled" if (((per.l(c15:0x0202))&0x80000000)==0x00000000) // MPIDR[31]==1 case is missing here for TTBR0 and TTBR1 group.long c15:0x0002++0x00 line.long 0x00 "TTBR0,Translation Table Base Registers" hexmask.long 0x00 6.--31. 0x40 "TTB1,Translation table base address" bitfld.long 0x00 5. "NOS,Not outer shareable bit" "Outer,Inner" newline bitfld.long 0x00 3.--4. "RGN,Region" "Normal,Outer Write-Back Write-Allocate Cacheable,Outer Write-Through Cacheable,Outer Write-Back no Write-Allocate Cacheable" bitfld.long 0x00 2. "IMP,Implementation" "Low,High" newline bitfld.long 0x00 1. "S,Shareable" "Non-shareable,Shareable" bitfld.long 0x00 0. "C,Cacheable" "Non-cacheable,Cacheable" group.long c15:0x0102++0x00 line.long 0x00 "TTBR1,Translation Table Base Registers" hexmask.long 0x00 6.--31. 0x40 "TTBA,Translation table base address" bitfld.long 0x00 5. "NOS,Not outer shareable bit" "Outer,Inner" newline bitfld.long 0x00 3.--4. "RGN,Region" "Normal,Outer Write-Back Write-Allocate Cacheable,Outer Write-Through Cacheable,Outer Write-Back no Write-Allocate Cacheable" bitfld.long 0x00 2. "IMP,Implementation" "Low,High" newline bitfld.long 0x00 1. "S,Shareable" "Non-shareable,Shareable" bitfld.long 0x00 0. "C,Cacheable" "Non-cacheable,Cacheable" else group.quad c15:0x10020++0x01 line.quad 0x00 "TTBR0,Translation Table Base Registers" hexmask.quad.byte 0x00 48.--55. 1. "ASID,ASID for the translation table base address" hexmask.quad 0x00 0.--47. 1. "BADDR,Translation table base address" group.quad c15:0x11020++0x01 line.quad 0x00 "TTBR1,Translation Table Base Registers" hexmask.quad.byte 0x00 48.--55. 1. "ASID,ASID for the translation table base address" hexmask.quad 0x00 0.--47. 1. "BADDR,Translation table base address" endif if (((per.l(c15:0x0202))&0x80000000)==0x00000000) group.long c15:0x0202++0x00 line.long 0x00 "TTBCR,Translation Table Base Control Register" bitfld.long 0x00 31. "EAE,Extended Address Enable" "32-bit,40-bit" bitfld.long 0x00 5. "PD1,Translation table walk disable for translations using TTBR1" "No,Yes" newline bitfld.long 0x00 4. "PD0,Translation table walk disable for translations using TTBR0" "No,Yes" bitfld.long 0x00 0.--2. "N,Width of the base address held in TTBR0" "0,1,2,3,4,5,6,7" else group.long c15:0x0202++0x00 line.long 0x00 "TTBCR,Translation Table Base Control Register" bitfld.long 0x00 31. "EAE,Extended Address Enable" "32-bit,40-bit" bitfld.long 0x00 28.--29. "SH1,Shareability attributes for the memory associated with the translation table walks using TTBR1" "Non-Shareable,Reserved,Non-Shareable,Inner Shareable" newline bitfld.long 0x00 26.--27. "ORGN1,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR1" "0,1,2,3" bitfld.long 0x00 24.--25. "IRGN1,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR1" "0,1,2,3" newline bitfld.long 0x00 23. "EPD1,Translation Walk Disable for TTBR1" "No,Yes" bitfld.long 0x00 22. "A1,Select ASID from TTBR1 ASID field" "Selected,Not selected" newline bitfld.long 0x00 16.--18. "T1SZ,The Size offset of the TTBR1 addressed region" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--13. "SH0,Shareability attributes for the memory associated with the translation table walks using TTBR0/HTTBR" "Non-Shareable,Reserved,Non-Shareable,Inner Shareable" newline bitfld.long 0x00 10.--11. "ORGN0,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR0/HTTBR" "0,1,2,3" bitfld.long 0x00 8.--9. "IRGN0,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR0/HTTBR" "0,1,2,3" newline bitfld.long 0x00 7. "EPD0,Translation Walk Disable for TTBR0 region" "No,Yes" bitfld.long 0x00 0.--2. "T0SZ,The Size offset of the TTBR0/HTTBR addressed region" "0,1,2,3,4,5,6,7" endif elif corename()=="CORTEXA53" group.long c15:0x0001++0x0 line.long 0x0 "SCTLR,Control Register" bitfld.long 0x0 30. "TE,T32 exception enable" "A32,T32" bitfld.long 0x0 29. "AFE,Access Flag Enable" "Disabled,Enabled" newline bitfld.long 0x0 28. "TRE,TEX remap enable" "Disabled,Enabled" bitfld.long 0x0 25. "EE,Exception endianness" "Little,Big" newline bitfld.long 0x0 20. "UWXN,Unprivileged write permission implies PL1 Execute Never" "Not forced,Forced" bitfld.long 0x0 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced" newline bitfld.long 0x0 18. "NTWE,Not trap WFE" "No,Yes" bitfld.long 0x0 16. "NTWI,Not trap WFI" "No,Yes" newline bitfld.long 0x0 13. "V,Base Location of Exception Registers" "0x00000000,0xFFFF0000" bitfld.long 0x0 12. "I,Instruction Cache Enable" "Disabled,Enabled" newline bitfld.long 0x0 8. "SED,SETEND Disable" "No,Yes" bitfld.long 0x0 6. "ITD,IT Disable" "No,Yes" newline bitfld.long 0x0 5. "CP15BEN,c15 barrier enable" "Disabled,Enabled" bitfld.long 0x0 2. "C,Enable unified cache or data cache" "Disabled,Enabled" newline bitfld.long 0x0 1. "A,Strict Alignment" "Disabled,Enabled" bitfld.long 0x0 0. "M,MMU or Protection Unit" "Disabled,Enabled" group.long c15:0x4001++0x0 line.long 0x00 "HSCTLR,System Control Register" bitfld.long 0x0 30. "TE,Thumb exception enable" "ARM,Thumb" bitfld.long 0x0 25. "EE,Exception endianness" "Little,Big" newline bitfld.long 0x0 21. "FI,Fast Interrupts configuration enable" "Disabled,Enabled" bitfld.long 0x0 19. "WXN,Write permission implies XN" "Not forced,Forced" newline bitfld.long 0x0 12. "I,Instruction Cache Enable" "Disabled,Enabled" bitfld.long 0x0 8. "SED,SETEND Disable" "No,Yes" newline bitfld.long 0x0 7. "ITD,IT Disable" "No,Yes" bitfld.long 0x0 5. "CP15BEN,CP15 barrier enable" "Disabled,Enabled" newline bitfld.long 0x0 2. "C,Enable unified cache or data cache" "Disabled,Enabled" bitfld.long 0x0 1. "A,Strict Alignment" "Disabled,Enabled" newline bitfld.long 0x0 0. "M,Enable address translation" "Disabled,Enabled" if (((per.l(c15:0x202))&0x80000000)==0x80000000) group.quad c15:0x10020++0x01 line.quad 0x00 "TTBR0,Translation Table Base Register 0" hexmask.quad.byte 0x00 48.--55. 1. "ASID,ASID for the translation table base address" hexmask.quad 0x00 0.--47. 1. "BADDR,Translation table base address" group.quad c15:0x11020++0x01 line.quad 0x00 "TTBR1,Translation Table Base Register 1" hexmask.quad.byte 0x00 48.--55. 1. "ASID,ASID for the translation table base address" hexmask.quad 0x00 0.--47. 1. "BADDR,Translation table base address" group.long c15:0x0202++0x00 line.long 0x00 "TTBCR,Translation Table Base Control Register" bitfld.long 0x00 31. "EAE,Extended Address Enable" "32-bit,40-bit" bitfld.long 0x00 28.--29. "SH1,Shareability attributes for the memory associated with the translation table walks using TTBR1" "Non-Shareable,Reserved,Outer Shareable,Inner Shareable" newline bitfld.long 0x00 26.--27. "ORGN1,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR1" "0,1,2,3" bitfld.long 0x00 24.--25. "IRGN1,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR1" "0,1,2,3" newline bitfld.long 0x00 23. "EPD1,Translation Walk Disable for TTBR1" "No,Yes" bitfld.long 0x00 22. "A1,Select ASID from TTBR1 ASID field" "Selected,Not selected" newline bitfld.long 0x00 16.--18. "T1SZ,The Size offset of the TTBR1 addressed region" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--13. "SH0,Shareability attributes for the memory associated with the translation table walks using TTBR0/HTTBR" "Non-Shareable,Reserved,Outer Shareable,Inner Shareable" newline bitfld.long 0x00 10.--11. "ORGN0,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR0/HTTBR" "0,1,2,3" bitfld.long 0x00 8.--9. "IRGN0,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR0/HTTBR" "0,1,2,3" newline bitfld.long 0x00 7. "EPD0,Translation Walk Disable for TTBR0 region" "No,Yes" bitfld.long 0x00 0.--2. "T0SZ,The Size offset of the TTBR0/HTTBR addressed region" "0,1,2,3,4,5,6,7" else group.long c15:0x0002++0x00 line.long 0x00 "TTBR0,Translation Table Base Register 0" hexmask.long 0x00 7.--31. 0x80 "TTB0,Translation table base 0 address" bitfld.long 0x00 6. 0. "IRGN,Inner region bits" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" newline bitfld.long 0x00 5. "NOS,Not Outer Shareable bit" "Outer,Inner" bitfld.long 0x00 3.--4. "RGN,RGN" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" newline bitfld.long 0x00 1. "S,Shareable bit" "Non-shareable,Shareable" group.long c15:0x0102++0x00 line.long 0x00 "TTBR1,Translation Table Base Register 1" hexmask.long 0x00 7.--31. 0x80 "TTB1,Translation table base 1 address" bitfld.long 0x00 0. 6. "IRGN,Inner region bits" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" newline bitfld.long 0x00 5. "NOS,Not Outer Shareable bit" "Outer,Inner" bitfld.long 0x00 3.--4. "RGN,RGN" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" newline bitfld.long 0x00 1. "S,Shareable bit" "Non-shareable,Shareable" group.long c15:0x0202++0x00 line.long 0x00 "TTBCR,Translation Table Base Control Register" bitfld.long 0x00 31. "EAE,Extended Address Enable" "32-bit,40-bit" bitfld.long 0x00 5. "PD1,Translation table walk disable for translations using TTBR1" "No,Yes" newline bitfld.long 0x00 4. "PD0,Translation table walk disable for translations using TTBR0" "No,Yes" bitfld.long 0x00 0.--2. "N,Width of the base address held in TTBR0" "0,1,2,3,4,5,6,7" endif endif if corename()=="CORTEXA57" group.quad c15:0x14020++0x01 line.quad 0x00 "HTTBR,Hypervisor Translation Table Base Register" hexmask.quad 0x00 0.--47. 1. "BADDR,Translation table base address" elif corename()=="CORTEXA53" group.quad c15:0x14020++0x01 line.quad 0x00 "HTTBR,Hypervisor Translation Table Base Register" endif group.long c15:0x4202++0x00 line.long 0x00 "HTCR,Hypervisor Translation Control Register" bitfld.long 0x00 12.--13. "SH0,Shareability attributes for the memory associated with the translation table walks using TTBR0/HTTBR" "Non-Shareable,Reserved,Outer Shareable,Inner Shareable" bitfld.long 0x00 10.--11. "ORGN0,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR0/HTTBR" "0,1,2,3" newline bitfld.long 0x00 8.--9. "IRGN0,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR0/HTTBR" "0,1,2,3" bitfld.long 0x00 0.--2. "T0SZ,The Size offset of the TTBR0/HTTBR addressed region" "0,1,2,3,4,5,6,7" group.long c15:0x0003++0x00 line.long 0x00 "DACR,Domain Access Control Register" bitfld.long 0x0 30.--31. "D15,Domain Access 15" "Denied,Client,Reserved,Manager" bitfld.long 0x0 28.--29. "D14,Domain Access 14" "Denied,Client,Reserved,Manager" newline bitfld.long 0x0 26.--27. "D13,Domain Access 13" "Denied,Client,Reserved,Manager" bitfld.long 0x0 24.--25. "D12,Domain Access 12" "Denied,Client,Reserved,Manager" newline bitfld.long 0x0 22.--23. "D11,Domain Access 11" "Denied,Client,Reserved,Manager" bitfld.long 0x0 20.--21. "D10,Domain Access 10" "Denied,Client,Reserved,Manager" newline bitfld.long 0x0 18.--19. "D9,Domain Access 9" "Denied,Client,Reserved,Manager" bitfld.long 0x0 16.--17. "D8,Domain Access 8" "Denied,Client,Reserved,Manager" newline bitfld.long 0x0 14.--15. "D7,Domain Access 7" "Denied,Client,Reserved,Manager" bitfld.long 0x0 12.--13. "D6,Domain Access 6" "Denied,Client,Reserved,Manager" newline bitfld.long 0x0 10.--11. "D5,Domain Access 5" "Denied,Client,Reserved,Manager" bitfld.long 0x0 8.--9. "D4,Domain Access 4" "Denied,Client,Reserved,Manager" newline bitfld.long 0x0 6.--7. "D3,Domain Access 3" "Denied,Client,Reserved,Manager" bitfld.long 0x0 4.--5. "D2,Domain Access 2" "Denied,Client,Reserved,Manager" newline bitfld.long 0x0 2.--3. "D1,Domain Access 1" "Denied,Client,Reserved,Manager" bitfld.long 0x0 0.--1. "D0,Domain Access 0" "Denied,Client,Reserved,Manager" if (((per.l(c15:0x202))&0x80000000)==0x80000000) group.quad c15:0x10070++0x01 line.quad 0x00 "PAR,Physical Address Register" else group.long c15:0x0047++0x00 line.long 0x00 "PAR,Physical Address Register" endif tree.open "Memory Attribute Indirection Registers" group.long c15:0x403A++0x00 line.long 0x00 "HAMAIR0,Hypervisor Auxiliary Memory Attribute Indirection Register 0" group.long c15:0x413A++0x00 line.long 0x00 "HAMAIR1,Hypervisor Auxiliary Memory Attribute Indirection Register 1" group.long c15:0x002A++0x00 line.long 0x00 "MAIR0,Memory Attribute Indirection Register 0" bitfld.long 0x00 28.--31. "ATTR3H,Attribute 3 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient" bitfld.long 0x00 24.--27. "ATTR3L,Attribute 3 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient" newline bitfld.long 0x00 20.--23. "ATTR2H,Attribute 2 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient" bitfld.long 0x00 16.--19. "ATTR2L,Attribute 2 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient" newline bitfld.long 0x00 12.--15. "ATTR1H,Attribute 1 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient" bitfld.long 0x00 8.--11. "ATTR1L,Attribute 1 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient" newline bitfld.long 0x00 4.--7. "ATTR0H,Attribute 0 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient" bitfld.long 0x00 0.--3. "ATTR0L,Attribute 0 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient" group.long c15:0x012A++0x00 line.long 0x00 "MAIR1,Memory Attribute Indirection Register 1" bitfld.long 0x00 28.--31. "ATTR7H,Attribute 7 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient" bitfld.long 0x00 24.--27. "ATTR7L,Attribute 7 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient" newline bitfld.long 0x00 20.--23. "ATTR6H,Attribute 6 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient" bitfld.long 0x00 16.--19. "ATTR6L,Attribute 6 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient" newline bitfld.long 0x00 12.--15. "ATTR5H,Attribute 5 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient" bitfld.long 0x00 8.--11. "ATTR5L,Attribute 5 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient" newline bitfld.long 0x00 4.--7. "ATTR4H,Attribute 4 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient" bitfld.long 0x00 0.--3. "ATTR4L,Attribute 4 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient" group.long c15:0x003A++0x00 line.long 0x00 "AMAIR0,Auxiliary Memory Attribute Indirection Register 0" group.long c15:0x013A++0x00 line.long 0x00 "AMAIR1,Auxiliary Memory Attribute Indirection Register 1" group.long c15:0x402A++0x00 line.long 0x00 "HMAIR0,Hypervisor Memory Attribute Indirection Register 0" bitfld.long 0x00 28.--31. "ATTR3H,Attribute 3 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient" bitfld.long 0x00 24.--27. "ATTR3L,Attribute 3 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient" newline bitfld.long 0x00 20.--23. "ATTR2H,Attribute 2 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient" bitfld.long 0x00 16.--19. "ATTR2L,Attribute 2 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient" newline bitfld.long 0x00 12.--15. "ATTR1H,Attribute 1 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient" bitfld.long 0x00 8.--11. "ATTR1L,Attribute 1 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient" newline bitfld.long 0x00 4.--7. "ATTR0H,Attribute 0 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient" bitfld.long 0x00 0.--3. "ATTR0L,Attribute 0 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient" group.long c15:0x412A++0x00 line.long 0x00 "HMAIR1,Hypervisor Memory Attribute Indirection Register 1" bitfld.long 0x00 28.--31. "ATTR7H,Attribute 7 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient" bitfld.long 0x00 24.--27. "ATTR7L,Attribute 7 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient" newline bitfld.long 0x00 20.--23. "ATTR6H,Attribute 6 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient" bitfld.long 0x00 16.--19. "ATTR6L,Attribute 6 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient" newline bitfld.long 0x00 12.--15. "ATTR5H,Attribute 5 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient" bitfld.long 0x00 8.--11. "ATTR5L,Attribute 5 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient" newline bitfld.long 0x00 4.--7. "ATTR4H,Attribute 4 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient" bitfld.long 0x00 0.--3. "ATTR4L,Attribute 4 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient" if (((per.l(c15:0x202))&0x80000000)==0x00000000) group.long c15:0x002A++0x0 line.long 0x00 "PRRR,Primary Region Remap Register" bitfld.long 0x00 31. "NOS7,Outer Shareable property mapping for memory attributes" "Outer,Inner" bitfld.long 0x00 30. "NOS6,Outer Shareable property mapping for memory attributes" "Outer,Inner" newline bitfld.long 0x00 29. "NOS5,Outer Shareable property mapping for memory attributes" "Outer,Inner" bitfld.long 0x00 28. "NOS4,Outer Shareable property mapping for memory attributes" "Outer,Inner" newline bitfld.long 0x00 27. "NOS3,Outer Shareable property mapping for memory attributes" "Outer,Inner" bitfld.long 0x00 26. "NOS2,Outer Shareable property mapping for memory attributes" "Outer,Inner" newline bitfld.long 0x00 25. "NOS1,Outer Shareable property mapping for memory attributes" "Outer,Inner" bitfld.long 0x00 24. "NOS0,Outer Shareable property mapping for memory attributes" "Outer,Inner" newline bitfld.long 0x00 19. "NS1,Shareable Attribute Remap when S=1 for Normal Regions" "Remapped,Not remapped" bitfld.long 0x00 18. "NS0,Shareable Attribute Remap when S=0 for Normal Regions" "Not remapped,Remapped" newline bitfld.long 0x00 17. "DS1,Shareable Attribute Remap when S=1 for Device regions" "Remapped,Not remapped" bitfld.long 0x00 16. "DS0,Shareable Attribute Remap when S=0 for Device regions" "Not remapped,Remapped" newline bitfld.long 0x00 14.--15. "TR7,{TEX[0] C B} = b111 Remap" "Device-nGnRnE,Device-nGnRE,Normal,?..." bitfld.long 0x00 12.--13. "TR6,{TEX[0] C B} = b110 Remap" "Device-nGnRnE,Device-nGnRE,Normal,?..." newline bitfld.long 0x00 10.--11. "TR5,{TEX[0] C B} = b101 Remap" "Device-nGnRnE,Device-nGnRE,Normal,?..." bitfld.long 0x00 8.--9. "TR4,{TEX[0] C B} = b100 Remap" "Device-nGnRnE,Device-nGnRE,Normal,?..." newline bitfld.long 0x00 6.--7. "TR3,{TEX[0] C B} = b011 Remap" "Device-nGnRnE,Device-nGnRE,Normal,?..." bitfld.long 0x00 4.--5. "TR2,{TEX[0] C B} = b010 Remap" "Device-nGnRnE,Device-nGnRE,Normal,?..." newline bitfld.long 0x00 2.--3. "TR1,{TEX[0] C B} = b001 Remap" "Device-nGnRnE,Device-nGnRE,Normal,?..." bitfld.long 0x00 0.--1. "TR0,{TEX[0] C B} = b000 Remap" "Device-nGnRnE,Device-nGnRE,Normal,?..." group.long c15:0x012A++0x0 line.long 0x00 "NMRR,Normal Memory Remap Register" bitfld.long 0x00 30.--31. "OR7,Outer Attribute for {TEX[0] C B} = b111 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate" bitfld.long 0x00 28.--29. "OR6,Outer Attribute for {TEX[0] C B} = b110 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate" newline bitfld.long 0x00 26.--27. "OR5,Outer Attribute for {TEX[0] C B} = b101 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate" bitfld.long 0x00 24.--25. "OR4,Outer Attribute for {TEX[0] C B} = b100 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate" newline bitfld.long 0x00 22.--23. "OR3,Outer Attribute for {TEX[0] C B} = b011 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate" bitfld.long 0x00 20.--21. "OR2,Outer Attribute for {TEX[0] C B} = b010 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate" newline bitfld.long 0x00 18.--19. "OR1,Outer Attribute for {TEX[0] C B} = b001 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate" bitfld.long 0x00 16.--17. "OR0,Outer Attribute for {TEX[0] C B} = b000 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate" newline bitfld.long 0x00 14.--15. "IR7,Inner attribute for {TEX[0] C B} = b111 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate" bitfld.long 0x00 12.--13. "IR6,Inner attribute for {TEX[0] C B} = b110 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate" newline bitfld.long 0x00 10.--11. "IR5,Inner attribute for {TEX[0] C B} = b101 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate" bitfld.long 0x00 8.--9. "IR4,Inner attribute for {TEX[0] C B} = b100 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate" newline bitfld.long 0x00 6.--7. "IR3,Inner attribute for {TEX[0] C B} = b011 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate" bitfld.long 0x00 4.--5. "IR2,Inner attribute for {TEX[0] C B} = b010 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate" newline bitfld.long 0x00 2.--3. "IR1,Inner attribute for {TEX[0] C B} = b001 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate" bitfld.long 0x00 0.--1. "IR0,Inner attribute for {TEX[0] C B} = b000 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate" newline endif tree.end newline if (((per.l(c15:0x202))&0x80000000)==0x00000000) group.long c15:0x10d++0x00 line.long 0x00 "CONTEXTIDR,Context ID Register" else group.long c15:0x10d++0x00 line.long 0x00 "CONTEXTIDR,Context ID Register" hexmask.long.tbyte 0x00 8.--31. 1. "PROCID,Process identifier" hexmask.long.byte 0x00 0.--7. 1. "ASID,Address space identifier" endif tree.end tree "Virtualization Extensions" group.long c15:0x4000++0x0 line.long 0x00 "VPIDR,Virtualization Processor ID Register" group.long c15:0x4500++0x00 line.long 0x00 "VMPIDR,Virtualization Multiprocessor ID Register" group.long c15:0x420D++0x00 line.long 0x00 "HTPIDR,Hypervisor Software Thread ID Register" group.long c15:0x4001++0x0 line.long 0x00 "HSCTLR,System Control Register" bitfld.long 0x0 30. "TE,Thumb exception enable" "ARM,Thumb" bitfld.long 0x0 25. "EE,Exception endianness" "Little,Big" newline bitfld.long 0x0 21. "FI,Fast Interrupts configuration enable" "Disabled,Enabled" bitfld.long 0x0 19. "WXN,Write permission implies XN" "Not forced,Forced" newline bitfld.long 0x0 12. "I,Instruction Cache Enable" "Disabled,Enabled" bitfld.long 0x0 8. "SED,SETEND Disable" "No,Yes" newline bitfld.long 0x0 7. "ITD,IT Disable" "No,Yes" bitfld.long 0x0 5. "CP15BEN,CP15 barrier enable" "Disabled,Enabled" newline bitfld.long 0x0 2. "C,Enable unified cache or data cache" "Disabled,Enabled" bitfld.long 0x0 1. "A,Strict Alignment" "Disabled,Enabled" newline bitfld.long 0x0 0. "M,Enable address translation" "Disabled,Enabled" group.long c15:0x4101++0x00 line.long 0x00 "HACTLR,Hypervisor Auxiliary Control Register" bitfld.long 0x00 6. "L2ACTLRAC,L2ACTLR write access control" "Disabled,Enabled" bitfld.long 0x00 5. "L2ECTLRAC,L2ECTLR write access control" "Disabled,Enabled" newline bitfld.long 0x00 4. "L2CTLRAC,L2CTLR write access control" "Disabled,Enabled" bitfld.long 0x00 1. "CPUECTLRAC,CPUECTLR write access control" "Disabled,Enabled" newline bitfld.long 0x00 0. "CPUACTLRAC,CPUACTLR write access control" "Disabled,Enabled" if corename()=="CORTEXA57" group.long c15:0x4011++0x00 line.long 0x00 "HCR,Hypervisor Configuration Register" bitfld.long 0x00 30. "TRVM,Trap Read of Virtual Memory controls" "Disabled,Enabled" bitfld.long 0x00 27. "TGE,Trap General Exceptions" "Disabled,Enabled" newline bitfld.long 0x00 26. "TVM,Trap Virtual Memory Controls" "Disabled,Enabled" bitfld.long 0x00 25. "TTLB,Trap TLB maintenance instructions" "Disabled,Enabled" newline bitfld.long 0x00 24. "TPU,Trap Cache maintenance instructions to point of unification" "Disabled,Enabled" bitfld.long 0x00 23. "TPC,Trap Data/Unified cache maintenance instructions to point of coherency" "Disabled,Enabled" newline bitfld.long 0x00 22. "TSW,Trap Data/Unified cache Set/Way instructions" "Disabled,Enabled" bitfld.long 0x00 21. "TAC,Trap Auxiliary Control Register Accesses" "Disabled,Enabled" newline bitfld.long 0x00 20. "TIDCP,Trap Lockdown" "Disabled,Enabled" bitfld.long 0x00 19. "TSC,Trap SMC" "Disabled,Enabled" newline bitfld.long 0x00 18. "TID3,Trap ID Group 3" "Disabled,Enabled" bitfld.long 0x00 17. "TID2,Trap ID Group 2" "Disabled,Enabled" newline bitfld.long 0x00 16. "TID1,Trap ID Group 1" "Disabled,Enabled" bitfld.long 0x00 15. "TID0,Trap ID Group 0" "Disabled,Enabled" newline bitfld.long 0x00 14. "TWE,Trap WFE" "Disabled,Enabled" bitfld.long 0x00 13. "TWI,Trap WFI" "Disabled,Enabled" newline bitfld.long 0x00 12. "DC,Default Cacheable" "Disabled,Enabled" bitfld.long 0x00 10.--11. "BSU,Barrier Shareability Upgrade" "0,1,2,3" newline bitfld.long 0x00 9. "FB,Force Broadcast of TLB maintenance BPIALL and ICIALLU instructions" "Disabled,Enabled" bitfld.long 0x00 8. "VA,Virtual External Asynchronous Abort" "Not aborted,Aborted" newline bitfld.long 0x00 7. "VI,Virtual IRQ interrupt" "No interrupt,Interrupt" bitfld.long 0x00 6. "VF,Virtual FIQ interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 5. "AMO,A-bit Mask Override" "Not routed,Routed" bitfld.long 0x00 4. "IMO,I-bit Mask Override" "Not routed,Routed" newline bitfld.long 0x00 3. "FMO,F-bit Mask Override" "Not routed,Routed" bitfld.long 0x00 2. "PTW,Protected Table Walk" "Disabled,Enabled" newline bitfld.long 0x00 1. "SWIO,Set/Way Invalidation Override" "No override,Override" bitfld.long 0x00 0. "VM,Second Stage of Translation Enable" "Disabled,Enabled" elif corename()=="CORTEXA53" group.long c15:0x4011++0x00 line.long 0x00 "HCR,Hypervisor Configuration Register" bitfld.long 0x00 30. "TRVM,Trap Read of Virtual Memory controls" "Disabled,Enabled" bitfld.long 0x00 29. "HCD,Hypervisor Call Disable" "No,Yes" newline bitfld.long 0x00 27. "TGE,Trap General Exceptions" "Disabled,Enabled" bitfld.long 0x00 26. "TVM,Trap Virtual Memory Controls" "Disabled,Enabled" newline bitfld.long 0x00 25. "TTLB,Trap TLB maintenance instructions" "Disabled,Enabled" bitfld.long 0x00 24. "TPU,Trap Cache maintenance instructions to point of unification" "Disabled,Enabled" newline bitfld.long 0x00 23. "TPC,Trap Data/Unified cache maintenance instructions to point of coherency" "Disabled,Enabled" bitfld.long 0x00 22. "TSW,Trap Data/Unified cache Set/Way instructions" "Disabled,Enabled" newline bitfld.long 0x00 21. "TAC,Trap Auxiliary Control Register Accesses" "Disabled,Enabled" bitfld.long 0x00 20. "TIDCP,Trap Lockdown" "Disabled,Enabled" newline bitfld.long 0x00 19. "TSC,Trap SMC" "Disabled,Enabled" bitfld.long 0x00 18. "TID3,Trap ID Group 3" "Disabled,Enabled" newline bitfld.long 0x00 17. "TID2,Trap ID Group 2" "Disabled,Enabled" bitfld.long 0x00 16. "TID1,Trap ID Group 1" "Disabled,Enabled" newline bitfld.long 0x00 15. "TID0,Trap ID Group 0" "Disabled,Enabled" bitfld.long 0x00 14. "TWE,Trap WFE" "Disabled,Enabled" newline bitfld.long 0x00 13. "TWI,Trap WFI" "Disabled,Enabled" bitfld.long 0x00 12. "DC,Default Cacheable" "Disabled,Enabled" newline bitfld.long 0x00 10.--11. "BSU,Barrier Shareability Upgrade" "0,1,2,3" bitfld.long 0x00 9. "FB,Force Broadcast of TLB maintenance BPIALL and ICIALLU instructions" "Disabled,Enabled" newline bitfld.long 0x00 8. "VA,Virtual External Asynchronous Abort" "No aborted,Aborted" bitfld.long 0x00 7. "VI,Virtual IRQ interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 6. "VF,Virtual FIQ interrupt" "No interrupt,Interrupt" bitfld.long 0x00 5. "AMO,A-bit Mask Override" "No override,Override" newline bitfld.long 0x00 4. "IMO,I-bit Mask Override" "No override,Override" bitfld.long 0x00 3. "FMO,F-bit Mask Override" "No override,Override" newline bitfld.long 0x00 2. "PTW,Protected Table Walk" "Disabled,Enabled" bitfld.long 0x00 1. "SWIO,Set/Way Invalidation Override" "No override,Override" newline bitfld.long 0x00 0. "VM,Second Stage of Translation Enable" "Disabled,Enabled" endif group.long c15:0x4411++0x00 line.long 0x00 "HCR2,Hypervisor Configuration Register 2" bitfld.long 0x00 1. "ID,Stage 2 Instruction cache disable" "No,Yes" bitfld.long 0x00 0. "CD,Stage 2 Data cache disable" "No,Yes" group.long c15:0x4111++0x00 line.long 0x00 "HDCR,Hypervisor Debug Control Register" bitfld.long 0x00 11. "TDRA,Trap Debug ROM Access" "No effect,Valid" bitfld.long 0x00 10. "TDOSA,Trap Debug OS-related register Access" "No effect,Valid" newline bitfld.long 0x00 9. "TDA,Trap Debug Access" "No effect,Valid" bitfld.long 0x00 8. "TDE,Trap Debug Exceptions" "No effect,Valid" newline bitfld.long 0x00 7. "HPME,Hypervisor Performance Monitors Enable" "Disabled,Enabled" bitfld.long 0x00 6. "TPM,Trap Performance Monitors accesses" "No effect,Valid" newline bitfld.long 0x00 5. "TPMCR,Trap Performance Monitor Control Register accesses" "No effect,Valid" bitfld.long 0x00 0.--4. "HPMN,Defines the number of Performance Monitors counters" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long c15:0x4211++0x00 line.long 0x00 "HCPTR,Hypervisor Architectural Feature Trap Register" bitfld.long 0x0 31. "TCPAC,Trap Coprocessor Access Control" "Not trapped,Trapped" bitfld.long 0x0 20. "TTA,Trap Trace Access" "Not trapped,?..." newline bitfld.long 0x0 15. "TASE,Trap Advanced SIMD extensions" "Not trapped,Trapped" bitfld.long 0x0 11. "TCP11,Trap coprocessor 11" "Not trapped,Trapped" newline bitfld.long 0x0 10. "TCP10,Trap coprocessor 10" "Not trapped,Trapped" group.long c15:0x4311++0x00 line.long 0x00 "HSTR,Hypervisor System Trap Register" bitfld.long 0x00 16. "TTEE,Trap ThumbEE" "Disabled,Enabled" bitfld.long 0x00 15. "T15,Trap to Hypervisor mode Non-secure priv 15" "Reserved,?..." newline hexmask.long.word 0x00 5.--13. 1. "T4_15,Trap to Hypervisor mode Non-secure priv 5 - 13" bitfld.long 0x00 0.--3. "T0_13,Trap to Hypervisor mode Non-secure priv 0 - 3," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long c15:0x4711++0x00 line.long 0x00 "HACR,Hypervisor Auxiliary Configuration Register" if corename()=="CORTEXA57" group.quad c15:0x14020++0x01 line.quad 0x00 "HTTBR,Hypervisor Translation Table Base Register" hexmask.quad 0x00 0.--47. 1. "BADDR,Translation table base address" elif corename()=="CORTEXA53" group.quad c15:0x14020++0x01 line.quad 0x00 "HTTBR,Hypervisor Translation Table Base Register" endif group.long c15:0x4202++0x00 line.long 0x00 "HTCR,Hypervisor Translation Control Register" bitfld.long 0x00 12.--13. "SH0,Shareability attributes for the memory associated with the translation table walks using TTBR0/HTTBR" "Non-Shareable,Reserved,Outer Shareable,Inner Shareable" bitfld.long 0x00 10.--11. "ORGN0,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR0/HTTBR" "0,1,2,3" newline bitfld.long 0x00 8.--9. "IRGN0,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR0/HTTBR" "0,1,2,3" bitfld.long 0x00 0.--2. "T0SZ,The Size offset of the TTBR0/HTTBR addressed region" "0,1,2,3,4,5,6,7" group.quad c15:0x16020++0x01 line.quad 0x00 "VTTBR,Virtualization Translation Table Base Register" group.long c15:0x4212++0x00 line.long 0x00 "VTCR,Virtualization Translation Control Register" bitfld.long 0x00 12.--13. "SH0,Shareability attributes for the memory associated with the translation table walks using VTTBR" "0,1,2,3" bitfld.long 0x00 10.--11. "ORGN0,Outer Cacheability attributes for the memory associated with the translation table walks using VTTBR" "0,1,2,3" newline bitfld.long 0x00 8.--9. "IRGN0,Inner Cacheability attributes for the memory associated with the translation table walks VTTBR" "0,1,2,3" bitfld.long 0x00 6.--7. "SL0,Starting Level for VTCR addressed region" "0,1,2,3" newline bitfld.long 0x00 4. "S,Sign-extension of the T0SZ field" "Low,High" bitfld.long 0x00 0.--3. "T0SZ,The Size offset of the VTCR addressed region" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long c15:0x4015++0x00 line.long 0x00 "HADFSR,Hypervisor Auxiliary Data Fault Status Syndrome Register" group.long c15:0x4115++0x00 line.long 0x00 "HAIFSR,Hypervisor Auxiliary Instruction Fault Status Syndrome Register" group.long c15:0x4006++0x00 line.long 0x00 "HDFAR,Hypervisor Data Fault Address Register" group.long c15:0x4025++0x00 line.long 0x00 "HSR,Hypervisor Syndrome Register" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,Trapped WFI/WFE,Reserved,Trapped MCR/MRC to c15,Trapped MCRR/MRRC to c15,Trapped MCR/MRC to CP14,Trapped LDC/STC to CP14,Trapped Coprocessor Usage,Trapped MRC,Trapped Jazelle instruction,Trapped BXJ,Reserved,Trapped MRRC,Reserved,Reserved,Reserved,Reserved,SVC,HVC,Trapped SMC,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Entry into Hypervisor mode Instruction Abort,Executing within Hypervisor mode Instruction Abort,Reserved,Reserved,Entry into Hypervisor mode Data Abort,Executing within Hypervisor mode Data Abort,?..." bitfld.long 0x00 25. "IL,Instruction length" "16-bit,32-bit" newline hexmask.long 0x00 0.--24. 1. "ISS,Instruction specific syndrome" group.long c15:0x4206++0x00 line.long 0x00 "HIFAR,Hypervisor Instruction Fault Address Register" group.long c15:0x4406++0x00 line.long 0x00 "HPFAR,Hypervisor IPA Fault Address Register" hexmask.long 0x00 4.--31. 1. "FIPA[39:12],Bits [39:12] of the faulting intermediate physical address" tree.open "Hypervisor Memory Attribute Indirection Registers" group.long c15:0x402A++0x00 line.long 0x00 "HMAIR0,Hypervisor Memory Attribute Indirection Register 0" bitfld.long 0x00 28.--31. "ATTR3H,Attribute 3 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient" bitfld.long 0x00 24.--27. "ATTR3L,Attribute 3 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient" newline bitfld.long 0x00 20.--23. "ATTR2H,Attribute 2 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient" bitfld.long 0x00 16.--19. "ATTR2L,Attribute 2 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient" newline bitfld.long 0x00 12.--15. "ATTR1H,Attribute 1 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient" bitfld.long 0x00 8.--11. "ATTR1L,Attribute 1 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient" newline bitfld.long 0x00 4.--7. "ATTR0H,Attribute 0 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient" bitfld.long 0x00 0.--3. "ATTR0L,Attribute 0 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient" group.long c15:0x412A++0x00 line.long 0x00 "HMAIR1,Hypervisor Memory Attribute Indirection Register 1" bitfld.long 0x00 28.--31. "ATTR7H,Attribute 7 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient" bitfld.long 0x00 24.--27. "ATTR7L,Attribute 7 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient" newline bitfld.long 0x00 20.--23. "ATTR6H,Attribute 6 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient" bitfld.long 0x00 16.--19. "ATTR6L,Attribute 6 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient" newline bitfld.long 0x00 12.--15. "ATTR5H,Attribute 5 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient" bitfld.long 0x00 8.--11. "ATTR5L,Attribute 5 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient" newline bitfld.long 0x00 4.--7. "ATTR4H,Attribute 4 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient" bitfld.long 0x00 0.--3. "ATTR4L,Attribute 4 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient" group.long c15:0x403A++0x00 line.long 0x00 "HAMAIR0,Hypervisor Auxiliary Memory Attribute Indirection Register 0" group.long c15:0x413A++0x00 line.long 0x00 "HAMAIR1,Hypervisor Auxiliary Memory Attribute Indirection Register 1" tree.end newline group.long c15:0x400C++0x00 line.long 0x00 "HVBAR,Hypervisor Vector Base Address Register" hexmask.long 0x00 5.--31. 0x20 "HVBADDR,Hypervisor Vector Base Address" tree.end tree "Cache Control and Configuration" rgroup.long c15:0x0100++0x0 line.long 0x0 "CTR,Cache Type Register" bitfld.long 0x0 24.--27. "CWG,Cache writeback granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." bitfld.long 0x0 20.--23. "ERG,Exclusives reservation granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." newline bitfld.long 0x0 16.--19. "DMINLINE,Smallest data cache line size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." bitfld.long 0x0 14.--15. "L1POLICY,L1 Instruction cache policy" "Reserved,Reserved,VIPT,PIPT" newline bitfld.long 0x0 0.--3. "IMINLINE,I-Cache Minimum Line Size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." if corename()=="CORTEXA57" rgroup.long c15:0x1100++0x0 line.long 0x0 "CLIDR,Cache Level ID Register" bitfld.long 0x00 27.--29. "LOUU,Level of Unification Uniprocessor" "Reserved,Level 1,?..." bitfld.long 0x00 24.--26. "LOC,Level of Coherency" "Reserved,Reserved,Level 3,?..." bitfld.long 0x00 21.--23. "LOUIS,Level of Unification Inner Shareable" "Reserved,Level 2,?..." newline bitfld.long 0x00 18.--20. "CTYPE7,Cache type for levels 7" "No cache,?..." bitfld.long 0x00 15.--17. "CTYPE6,Cache type for levels 6" "No cache,?..." bitfld.long 0x00 12.--14. "CTYPE5,Cache type for levels 5" "No cache,?..." newline bitfld.long 0x00 9.--11. "CTYPE4,Cache type for levels 4" "No cache,?..." bitfld.long 0x00 6.--8. "CTYPE3,Cache type for levels 3" "No cache,?..." bitfld.long 0x00 3.--5. "CTYPE2,Cache type for levels 2" "Reserved,Reserved,Reserved,Reserved,Unified,?..." newline bitfld.long 0x00 0.--2. "CTYPE1,Cache type for levels 1" "Reserved,Reserved,Reserved,Separate Inst/Data,?..." elif corename()=="CORTEXA53" rgroup.long c15:0x1100++0x0 line.long 0x0 "CLIDR,Cache Level ID Register" bitfld.long 0x00 30.--31. "ICB,Inner cache boundary" "Not disclosed,?..." bitfld.long 0x00 27.--29. "LOUU,Level of Unification Uniprocessor" "Reserved,Level 1,?..." bitfld.long 0x00 24.--26. "LOC,Level of Coherency" "Reserved,L1,L1/L2,?..." newline bitfld.long 0x00 21.--23. "LOUIS,Level of Unification Inner Shareable" "Reserved,Level 1,?..." bitfld.long 0x00 6.--8. "CTYPE3,Cache type for levels 3" "No cache,?..." bitfld.long 0x00 3.--5. "CTYPE2,Cache type for levels 2" "No cache,Reserved,Reserved,Reserved,Unified,?..." newline bitfld.long 0x00 0.--2. "CTYPE1,Cache type for levels 1" "Reserved,Reserved,Reserved,Separate Inst/Data,?..." endif rgroup.long c15:0x1700++0x0 line.long 0x00 "AIDR,Auxiliary ID Register" rgroup.long c15:0x1000++0x0 line.long 0x0 "CCSIDR,Current Cache Size ID Register" bitfld.long 0x00 31. "WT,Write-Through" "Not Supported,Supported" bitfld.long 0x00 30. "WB,Write-Back" "Not Supported,Supported" newline bitfld.long 0x00 29. "RA,Read-Allocate" "Not Supported,Supported" bitfld.long 0x00 28. "WA,Write-Allocate" "Not Supported,Supported" newline hexmask.long.word 0x00 13.--27. 1. "SETS,Number of Sets" hexmask.long.word 0x00 3.--12. 1. "ASSOC,Associativity" newline bitfld.long 0x00 0.--2. "LSIZE,Line Size" "16 bytes,32 bytes,64 bytes,128 bytes,?..." group.long c15:0x2000++0x0 line.long 0x0 "CSSELR,Cache Size Selection Register" bitfld.long 0x00 1.--3. "LEVEL,Cache level of required cache" "Level 1,Level 2,?..." bitfld.long 0x00 0. "IND,Instruction/Not Data" "Data/Unified,Instruction" tree "Level 1 memory system" if corename()=="CORTEXA57" group.long c15:0x001F++0x00 line.long 0x00 "DL1DATA0,Data L1 Data 0 Register" group.long c15:0x011F++0x00 line.long 0x00 "DL1DATA1,Data L1 Data 1 Register" group.long c15:0x021F++0x00 line.long 0x00 "DL1DATA2,Data L1 Data 2 Register" group.long c15:0x031F++0x00 line.long 0x00 "DL1DATA3,Data L1 Data 3 Register" group.long c15:0x000F++0x00 line.long 0x00 "IL1DATA0,Instruction L1 Data 0 Register" group.long c15:0x010F++0x00 line.long 0x00 "IL1DATA1,Instruction L1 Data 1 Register" group.long c15:0x020F++0x00 line.long 0x00 "IL1DATA2,Instruction L1 Data 2 Register" group.long c15:0x030F++0x00 line.long 0x00 "IL1DATA3,Instruction L1 Data 3 Register" wgroup.long c15:0x04F++0x00 line.long 0x00 "RAMINDEX,RAM Index Operation Register" elif corename()=="CORTEXA53" rgroup.long c15:0x300F++0x00 line.long 0x00 "CDBGDR0,Cache Debug Data Register 0" rgroup.long c15:0x310F++0x00 line.long 0x00 "CDBGDR1,Cache Debug Data Register 1" rgroup.long c15:0x320F++0x00 line.long 0x00 "CDBGDR2,Cache Debug Data Register 2" rgroup.long c15:0x330F++0x00 line.long 0x00 "CDBGDR3,Cache Debug Data Register 3" wgroup.long c15:0x302F++0x00 line.long 0x00 "CDBGDCT,Cache Debug Data Cache Tag Read Operation Register" wgroup.long c15:0x312F++0x00 line.long 0x00 "CDBGICT,Cache Debug Instruction Cache Tag Read Operation Register" wgroup.long c15:0x304F++0x00 line.long 0x00 "CDBGDCD,Cache Debug Cache Debug Data Cache Data Read Operation Register" wgroup.long c15:0x314F++0x00 line.long 0x00 "CDBGICD,Cache Debug Instruction Cache Data Read Operation Register" wgroup.long c15:0x324F++0x00 line.long 0x00 "CDBGTD,Cache Debug TLB Data Read Operation Register" endif tree.end tree "Level 2 memory system" if corename()=="CORTEXA57" group.long c15:0x1209++0x0 line.long 0x00 "L2CTLR,L2 Control Register" bitfld.long 0x00 31. "L2RSTDM,L2RSTDISABLE monitor" "No,Yes" bitfld.long 0x00 24.--25. "NCPU, Number of CPU" "1,2,3,4" newline rbitfld.long 0x00 22. "CPUCP,CPU Cache Protection" "Not supported,Supported" bitfld.long 0x00 21. "SCUL2CP,SCU-L2 Cache Protection" "Disabled,Enabled" newline bitfld.long 0x00 20. "DIECCE,Data in-line ECC enable" "Disabled,Enabled" rbitfld.long 0x00 13. "L2AS,L2 arbitration slice" "Not present,Present" newline rbitfld.long 0x00 12. "L2TRAMS,L2 Tag RAM slice" "Not present,Present" rbitfld.long 0x00 10.--11. "L2DRAMS,L2 Data RAM slice" "Not present,1,2,Present" newline bitfld.long 0x00 9. "L2TRAMS,L2 Tag RAM setup" "0 cycle,1 cycle" bitfld.long 0x00 6.--8. "L2TRAML,L2 Tag RAM latency" "2 cycles,2 cycles,3 cycles,4 cycles,5 cycles,5 cycles,5 cycles,5 cycles" newline rbitfld.long 0x00 5. "DRAMIL,L2 data RAM input latency" "0 cycle,1 cycle" bitfld.long 0x00 0.--2. "DRAML,L2 data RAM latency" "2 cycles,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles" group.long c15:0x1309++0x0 line.long 0x00 "L2ECTLR,L2 Extended Control Register" bitfld.long 0x00 30. "L2INTASYNCERR,L2 internal asynchronous error" "No error,Error" bitfld.long 0x00 29. "AXIASYNCERR,AXI asynchronous error" "No error,Error" newline bitfld.long 0x00 0.--2. "L2DRC,L2 dynamic retention control" "Disabled,2 ticks,8 ticks,32 ticks,64 ticks,128 ticks,256 ticks,512 ticks" group.long c15:0x100F++0x00 line.long 0x00 "L2ACTLR,L2 Auxiliary Control Register" bitfld.long 0x00 28. "FL2TBCEA,Force L2 tag bank clock enable active" "Disabled,Enabled" bitfld.long 0x00 27. "FL2LCEA,Force L2 logic clock enable active" "Disabled,Enabled" newline bitfld.long 0x00 26. "FL2GICRCGEA,Forces L2, GIC CPU interface, and Timer Regional Clock Gate(RCG) enables active" "Not forced,Forced" bitfld.long 0x00 25. "ESIAA,Enables single issue across all tag banks when the L2 arbitration replay threshold is reached" "Disabled,Enabled" newline bitfld.long 0x00 23. "DPRFRUT,Disables prefetch requests from ReadUnique transactions" "No,Yes" bitfld.long 0x00 22. "DDTLSPR,Disable dynamic throttling of load/store prefetch requests" "No,Yes" newline bitfld.long 0x00 20.--21. "DTL2PRFEQOC,Disable throttling of L2 prefetch requests based on Fill/Evict Queue(FEQ) occupancy count" "12,10,8,Disabled" bitfld.long 0x00 18.--19. "DLASQ,Disable limit on NC/SO/Dev stores in Address Sequence Queue" "12 entries,10 entries,8 entries,No limit" newline bitfld.long 0x00 17. "DL2RRA,Disable L2 round-robin arbitration that only clocks through paths with an active requestor waiting to be arbitrated" "No,Yes" bitfld.long 0x00 16. "ERTSI,Enable replay threshold single issue" "Disabled,Enabled" newline bitfld.long 0x00 15. "DFFD,Disable fast forwarding of data from ACE or CHI to LS and IF" "No,Yes" bitfld.long 0x00 14. "EUCE,Enables UniqueClean evictions with data" "Disabled,Enabled" newline bitfld.long 0x00 13. "DCEO,Disable clean evict optimization" "No,Yes" bitfld.long 0x00 11. "DDSB,Disable DSB with no DVM synchronization" "No,Yes" newline bitfld.long 0x00 10. "DNSDAR,Disable Non-secure debug array read" "No,Yes" bitfld.long 0x00 8. "DDVMCMOMB,Disable DVM and cache maintenance operation message broadcast" "No,Yes" newline bitfld.long 0x00 7. "EHDT,Enable hazard detect timeout" "Disabled,Enabled" bitfld.long 0x00 6. "DACESCHIST,Disable ACE shareable or CHI snoopable transactions from master" "No,Yes" newline bitfld.long 0x00 4. "DWUWLUTFM,Disable WriteUnique and WriteLineUnique transactions from master" "Disabled,Enabled" bitfld.long 0x00 3. "DCEPTE,Disables clean/evict push to external" "No,Yes" newline bitfld.long 0x00 2. "LTORPTB,Limit to one request per tag bank" "Normal,Limited" bitfld.long 0x00 1. "EARTT,Enable arbitration replay threshold timeout" "Disabled,Enabled" newline bitfld.long 0x00 0. "DHPF,Disable hardware prefetch forwarding" "No,Yes" group.quad c15:0x130F0++0x01 line.quad 0x00 "L2MERRSR,L2 Memory Error Syndrome Register" bitfld.quad 0x00 63. "FATAL,Fatal bit" "0,1" hexmask.quad.byte 0x00 40.--47. 1. "OEC,Other error count" newline hexmask.quad.byte 0x00 32.--39. 1. "REC,Repeat error count" bitfld.quad 0x00 31. "VALID,Valid bit" "Not valid,Valid" newline hexmask.quad.byte 0x00 24.--30. 1. "RAMID,RAM Identifier" bitfld.quad 0x00 18.--21. "C/W,CPUID/Way" "CPU0 tag way 0,CPU0 tag way 1,CPU1 tag way 0,CPU1 tag way 1,CPU2 tag way 0,CPU2 tag way 1,CPU3 tag way 0,CPU3 tag way 1,?..." newline hexmask.quad.tbyte 0x00 0.--17. 1. "IND,Index" elif corename()=="CORTEXA53" group.long c15:0x1209++0x0 line.long 0x00 "L2CTLR,L2 Control Register" bitfld.long 0x00 24.--25. "NCPU, Number of CPU" "1,2,3,4" bitfld.long 0x00 22. "CPUCP,CPU Cache Protection" "Disabled,Enabled" newline rbitfld.long 0x00 21. "SCUL2CP,SCU-L2 Cache Protection" "Disabled,Enabled" rbitfld.long 0x00 5. "DRAMIL,L2 data RAM input latency" "1 cycle,2 cycle" newline rbitfld.long 0x00 0. "DRAMOL,L2 data RAM output latency" "2 cycles,3 cycles" group.long c15:0x1309++0x0 line.long 0x00 "L2ECTLR,L2 Extended Control Register" bitfld.long 0x00 30. "L2INTASYNCERR,L2 internal asynchronous error" "No error,Error" bitfld.long 0x00 29. "AXIASYNCERR,AXI asynchronous error" "No error,Error" newline bitfld.long 0x00 0.--2. "L2DRC,L2 dynamic retention control" "Disabled,2 ticks,8 ticks,32 ticks,64 ticks,128 ticks,256 ticks,512 ticks" group.long c15:0x100F++0x00 line.long 0x00 "L2ACTLR,L2 Auxiliary Control Register" bitfld.long 0x00 30.--31. "L2VC,L2 victim Control" "0,1,2,3" bitfld.long 0x00 14. "EUCE,Enables UniqueClean evictions with data" "Disabled,Enabled" newline bitfld.long 0x00 3. "DCEPTE,Disables clean/evict push to external" "No,Yes" group.quad c15:0x110F0++0x01 line.quad 0x00 "L2MERRSR,L2 Memory Error Syndrome Register" bitfld.quad 0x00 63. "FATAL,Fatal bit" "0,1" hexmask.quad.byte 0x00 40.--47. 1. "OEC,Other error count" newline hexmask.quad.byte 0x00 32.--39. 1. "REC,Repeat error count" bitfld.quad 0x00 31. "VALID,Valid bit" "Not valid,Valid" newline hexmask.quad.byte 0x00 24.--30. 1. "RAMID,RAM Identifier" bitfld.quad 0x00 18.--21. "C/W,CPUID/Way" "CPU0 tag way 0,CPU0 tag way 1,CPU1 tag way 0,CPU1 tag way 1,CPU2 tag way 0,CPU2 tag way 1,CPU3 tag way 0,CPU3 tag way 1,?..." newline hexmask.quad.word 0x00 3.--16. 1. "RAD,RAM index address" endif tree.end tree.end tree "System Performance Monitor" group.long c15:0xc9++0x00 line.long 0x0 "PMCR,Performance Monitor Control Register" hexmask.long.byte 0x00 24.--31. 1. "IMP,Implementer code" hexmask.long.byte 0x00 16.--23. 1. "IDCODE,Identification code" rbitfld.long 0x00 11.--15. "N,Number of counters implemented" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 6. "LC,Long cycle count enable" "Disabled,Enabled" newline bitfld.long 0x00 5. "DP,Disable CCNT when prohibited" "No,Yes" bitfld.long 0x00 4. "X,Export Enable" "Disabled,Enabled" bitfld.long 0x00 3. "D,Clock Divider" "Every cycle,64th cycle" bitfld.long 0x00 2. "C,Clock Counter Reset" "No reset,Reset" newline bitfld.long 0x00 1. "P,Performance Counter Reset" "No reset,Reset" bitfld.long 0x00 0. "E,All Counters Enable" "Disabled,Enabled" newline group.long c15:0x1c9++0x00 line.long 0x00 "PMNCNTENSET,Count Enable Set Register " bitfld.long 0x00 31. "C,PMCCNTR enable" "Disabled,Enabled" bitfld.long 0x00 30. "P30,Event Counter 30 enable bit" "Disabled,Enabled" bitfld.long 0x00 29. "P29,Event Counter 29 enable bit" "Disabled,Enabled" bitfld.long 0x00 28. "P28,Event Counter 28 enable bit" "Disabled,Enabled" bitfld.long 0x00 27. "P27,Event Counter 27 enable bit" "Disabled,Enabled" newline bitfld.long 0x00 26. "P26,Event Counter 26 enable bit" "Disabled,Enabled" bitfld.long 0x00 25. "P25,Event Counter 25 enable bit" "Disabled,Enabled" bitfld.long 0x00 24. "P24,Event Counter 24 enable bit" "Disabled,Enabled" bitfld.long 0x00 23. "P23,Event Counter 23 enable bit" "Disabled,Enabled" bitfld.long 0x00 22. "P22,Event Counter 22 enable bit" "Disabled,Enabled" newline bitfld.long 0x00 21. "P21,Event Counter 21 enable bit" "Disabled,Enabled" bitfld.long 0x00 20. "P20,Event Counter 20 enable bit" "Disabled,Enabled" bitfld.long 0x00 19. "P19,Event Counter 19 enable bit" "Disabled,Enabled" bitfld.long 0x00 18. "P18,Event Counter 18 enable bit" "Disabled,Enabled" bitfld.long 0x00 17. "P17,Event Counter 17 enable bit" "Disabled,Enabled" newline bitfld.long 0x00 16. "P16,Event Counter 16 enable bit" "Disabled,Enabled" bitfld.long 0x00 15. "P15,Event Counter 15 enable bit" "Disabled,Enabled" bitfld.long 0x00 14. "P14,Event Counter 14 enable bit" "Disabled,Enabled" bitfld.long 0x00 13. "P13,Event Counter 13 enable bit" "Disabled,Enabled" bitfld.long 0x00 12. "P12,Event Counter 12 enable bit" "Disabled,Enabled" newline bitfld.long 0x00 11. "P11,Event Counter 11 enable bit" "Disabled,Enabled" bitfld.long 0x00 10. "P10,Event Counter 10 enable bit" "Disabled,Enabled" bitfld.long 0x00 9. "P9,Event Counter 9 enable bit" "Disabled,Enabled" bitfld.long 0x00 8. "P8,Event Counter 8 enable bit" "Disabled,Enabled" bitfld.long 0x00 7. "P7,Event Counter 7 enable bit" "Disabled,Enabled" newline bitfld.long 0x00 6. "P6,Event Counter 6 enable bit" "Disabled,Enabled" bitfld.long 0x00 5. "P5,Event Counter 5 enable bit" "Disabled,Enabled" bitfld.long 0x00 4. "P4,Event Counter 4 enable bit" "Disabled,Enabled" bitfld.long 0x00 3. "P3,Event Counter 3 enable bit" "Disabled,Enabled" bitfld.long 0x00 2. "P2,Event Counter 2 enable bit" "Disabled,Enabled" newline bitfld.long 0x00 1. "P1,Event Counter 1 enable bit" "Disabled,Enabled" bitfld.long 0x00 0. "P0,Event Counter 0 enable bit" "Disabled,Enabled" group.long c15:0x2c9++0x00 line.long 0x00 "PMCNTENCLR,Count Enable Clear Register" eventfld.long 0x00 31. "C,PMCCNTR enable" "Disabled,Enabled" eventfld.long 0x00 30. "P30,Event Counter 30 clear bit" "Disabled,Enabled" eventfld.long 0x00 29. "P29,Event Counter 29 clear bit " "Disabled,Enabled" eventfld.long 0x00 28. "P28,Event Counter 28 clear bit " "Disabled,Enabled" eventfld.long 0x00 27. "P27,Event Counter 27 clear bit " "Disabled,Enabled" newline eventfld.long 0x00 26. "P26,Event Counter 26 clear bit " "Disabled,Enabled" eventfld.long 0x00 25. "P25,Event Counter 25 clear bit " "Disabled,Enabled" eventfld.long 0x00 24. "P24,Event Counter 24 clear bit " "Disabled,Enabled" eventfld.long 0x00 23. "P23,Event Counter 23 clear bit " "Disabled,Enabled" eventfld.long 0x00 22. "P22,Event Counter 22 clear bit " "Disabled,Enabled" newline eventfld.long 0x00 21. "P21,Event Counter 21 clear bit " "Disabled,Enabled" eventfld.long 0x00 20. "P20,Event Counter 20 clear bit " "Disabled,Enabled" eventfld.long 0x00 19. "P19,Event Counter 19 clear bit " "Disabled,Enabled" eventfld.long 0x00 18. "P18,Event Counter 18 clear bit " "Disabled,Enabled" eventfld.long 0x00 17. "P17,Event Counter 17 clear bit " "Disabled,Enabled" newline eventfld.long 0x00 16. "P16,Event Counter 16 clear bit " "Disabled,Enabled" eventfld.long 0x00 15. "P15,Event Counter 15 clear bit" "Disabled,Enabled" eventfld.long 0x00 14. "P14,Event Counter 14 clear bit" "Disabled,Enabled" eventfld.long 0x00 13. "P13,Event Counter 13 clear bit" "Disabled,Enabled" eventfld.long 0x00 12. "P12,Event Counter 12 clear bit" "Disabled,Enabled" newline eventfld.long 0x00 11. "P11,Event Counter 11 clear bit" "Disabled,Enabled" eventfld.long 0x00 10. "P10,Event Counter 10 clear bit" "Disabled,Enabled" eventfld.long 0x00 9. "P9,Event Counter 9 clear bit" "Disabled,Enabled" eventfld.long 0x00 8. "P8,Event Counter 8 clear bit" "Disabled,Enabled" eventfld.long 0x00 7. "P7,Event Counter 7 clear bit" "Disabled,Enabled" newline eventfld.long 0x00 6. "P6,Event Counter 6 clear bit" "Disabled,Enabled" eventfld.long 0x00 5. "P5,Event Counter 5 clear bit" "Disabled,Enabled" eventfld.long 0x00 4. "P4,Event Counter 4 clear bit" "Disabled,Enabled" eventfld.long 0x00 3. "P3,Event Counter 3 clear bit" "Disabled,Enabled" eventfld.long 0x00 2. "P2,Event Counter 2 clear bit" "Disabled,Enabled" newline eventfld.long 0x00 1. "P1,Event Counter 1 clear bit" "Disabled,Enabled" eventfld.long 0x00 0. "P0,Event Counter 0 clear bit" "Disabled,Enabled" group.long c15:0x3c9++0x00 line.long 0x00 "PMOVSR,Performance Monitor Overflow Status Register" eventfld.long 0x00 31. "C,PMCCNTR overflow" "No overflow,Overflow" eventfld.long 0x00 30. "P30,PMN30 overflow" "No overflow,Overflow" eventfld.long 0x00 29. "P29,PMN29 overflow" "No overflow,Overflow" eventfld.long 0x00 28. "P28,PMN28 overflow" "No overflow,Overflow" eventfld.long 0x00 27. "P27,PMN27 overflow" "No overflow,Overflow" newline eventfld.long 0x00 26. "P26,PMN26 overflow" "No overflow,Overflow" eventfld.long 0x00 25. "P25,PMN25 overflow" "No overflow,Overflow" eventfld.long 0x00 24. "P24,PMN24 overflow" "No overflow,Overflow" eventfld.long 0x00 23. "P23,PMN23 overflow" "No overflow,Overflow" eventfld.long 0x00 22. "P22,PMN22 overflow" "No overflow,Overflow" newline eventfld.long 0x00 21. "P21,PMN21 overflow" "No overflow,Overflow" eventfld.long 0x00 20. "P20,PMN20 overflow" "No overflow,Overflow" eventfld.long 0x00 19. "P19,PMN19 overflow" "No overflow,Overflow" eventfld.long 0x00 18. "P18,PMN18 overflow" "No overflow,Overflow" eventfld.long 0x00 17. "P17,PMN17 overflow" "No overflow,Overflow" newline eventfld.long 0x00 16. "P16,PMN16 overflow" "No overflow,Overflow" eventfld.long 0x00 15. "P15,PMN15 overflow" "No overflow,Overflow" eventfld.long 0x00 14. "P14,PMN14 overflow" "No overflow,Overflow" eventfld.long 0x00 13. "P13,PMN13 overflow" "No overflow,Overflow" eventfld.long 0x00 12. "P12,PMN12 overflow" "No overflow,Overflow" newline eventfld.long 0x00 11. "P11,PMN11 overflow" "No overflow,Overflow" eventfld.long 0x00 10. "P10,PMN10 overflow" "No overflow,Overflow" eventfld.long 0x00 9. "P9,PMN9 overflow" "No overflow,Overflow" eventfld.long 0x00 8. "P8,PMN8 overflow" "No overflow,Overflow" eventfld.long 0x00 7. "P7,PMN7 overflow" "No overflow,Overflow" newline eventfld.long 0x00 6. "P6,PMN6 overflow" "No overflow,Overflow" eventfld.long 0x00 5. "P5,PMN5 overflow" "No overflow,Overflow" eventfld.long 0x00 4. "P4,PMN4 overflow" "No overflow,Overflow" eventfld.long 0x00 3. "P3,PMN3 overflow" "No overflow,Overflow" eventfld.long 0x00 2. "P2,PMN2 overflow" "No overflow,Overflow" newline eventfld.long 0x00 1. "P1,PMN1 overflow" "No overflow,Overflow" eventfld.long 0x00 0. "P0,PMN0 overflow" "No overflow,Overflow" group.long c15:0x4c9++0x00 line.long 0x00 "PMSWINC,Performance Monitor Software Increment" bitfld.long 0x00 30. "P30,Increment PMN30" "No action,Increment" bitfld.long 0x00 29. "P29,Increment PMN29" "No action,Increment" bitfld.long 0x00 28. "P28,Increment PMN28" "No action,Increment" bitfld.long 0x00 27. "P27,Increment PMN27" "No action,Increment" bitfld.long 0x00 26. "P26,Increment PMN26" "No action,Increment" newline bitfld.long 0x00 25. "P25,Increment PMN25" "No action,Increment" bitfld.long 0x00 24. "P24,Increment PMN24" "No action,Increment" bitfld.long 0x00 23. "P23,Increment PMN23" "No action,Increment" bitfld.long 0x00 22. "P22,Increment PMN22" "No action,Increment" bitfld.long 0x00 21. "P21,Increment PMN21" "No action,Increment" newline bitfld.long 0x00 20. "P20,Increment PMN20" "No action,Increment" bitfld.long 0x00 19. "P19,Increment PMN19" "No action,Increment" bitfld.long 0x00 18. "P18,Increment PMN18" "No action,Increment" bitfld.long 0x00 17. "P17,Increment PMN17" "No action,Increment" bitfld.long 0x00 16. "P16,Increment PMN16" "No action,Increment" newline bitfld.long 0x00 15. "P15,Increment PMN15" "No action,Increment" bitfld.long 0x00 14. "P14,Increment PMN14" "No action,Increment" bitfld.long 0x00 13. "P13,Increment PMN13" "No action,Increment" bitfld.long 0x00 12. "P12,Increment PMN12" "No action,Increment" bitfld.long 0x00 11. "P11,Increment PMN11" "No action,Increment" newline bitfld.long 0x00 10. "P10,Increment PMN10" "No action,Increment" bitfld.long 0x00 9. "P9,Increment PMN9" "No action,Increment" bitfld.long 0x00 8. "P8,Increment PMN8" "No action,Increment" bitfld.long 0x00 7. "P7,Increment PMN7" "No action,Increment" bitfld.long 0x00 6. "P6,Increment PMN6" "No action,Increment" newline bitfld.long 0x00 5. "P5,Increment PMN5" "No action,Increment" bitfld.long 0x00 4. "P4,Increment PMN4" "No action,Increment" bitfld.long 0x00 3. "P3,Increment PMN3" "No action,Increment" bitfld.long 0x00 2. "P2,Increment PMN2" "No action,Increment" bitfld.long 0x00 1. "P1,Increment PMN1" "No action,Increment" newline bitfld.long 0x00 0. "P0,Increment PMN0" "No action,Increment" group.long c15:0x5c9++0x00 line.long 0x00 "PMSELR,Performance Monitor Select Register" bitfld.long 0x00 0.--4. "SEL,Current event counter select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,?..." group.long c15:0xd9++0x00 line.long 0x00 "PMCCNTR,Performance Monitor Cycle Count Register" group.long c15:0x1d9++0x00 line.long 0x00 "PMXEVTYPER,Performance Monitor Event Type Register" group.long c15:0x2d9++0x00 line.long 0x00 "PMXEVCNTR,Performance Monitor Event Count Register" group.long c15:0xe9++0x00 line.long 0x00 "PMUSERENR,Performance Monitor User Enable Register" bitfld.long 0x00 3. "ER,Event counter read enable" "Disabled,Enabled" bitfld.long 0x00 2. "CR,Cycle counter read enable" "Disabled,Enabled" bitfld.long 0x00 1. "SW,Software Increment write enable" "Disabled,Enabled" bitfld.long 0x00 0. "EN,User mode access enable" "Disabled,Enabled" group.long c15:0x1e9++0x00 line.long 0x00 "PMINTENSET,Performance Monitor Interrupt Enable Set" bitfld.long 0x00 31. "C,PMCCNTR enable" "Disabled,Enabled" bitfld.long 0x00 30. "P30,PMCNT30 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 29. "P29,PMCNT29 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 28. "P28,PMCNT28 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 27. "P27,PMCNT27 Overflow Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 26. "P26,PMCNT26 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. "P25,PMCNT25 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. "P24,PMCNT24 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 23. "P23,PMCNT23 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22. "P22,PMCNT22 Overflow Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 21. "P21,PMCNT21 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 20. "P20,PMCNT20 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 19. "P19,PMCNT19 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 18. "P18,PMCNT18 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 17. "P17,PMCNT17 Overflow Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 16. "P16,PMCNT16 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 15. "P15,PMCNT15 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 14. "P14,PMCNT14 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 13. "P13,PMCNT13 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 12. "P12,PMCNT12 Overflow Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 11. "P11,PMCNT11 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 10. "P10,PMCNT10 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 9. "P9,PMCNT9 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 8. "P8,PMCNT8 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 7. "P7,PMCNT7 Overflow Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 6. "P6,PMCNT6 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. "P5,PMCNT5 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. "P4,PMCNT4 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. "P3,PMCNT3 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 2. "P2,PMCNT2 Overflow Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 1. "P1,PMCNT1 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. "P0,PMCNT0 Overflow Interrupt Enable" "Disabled,Enabled" group.long c15:0x2e9++0x00 line.long 0x00 "PMINTENCLR,Performance Monitor Interrupt Enable Clear" eventfld.long 0x00 31. "C,PMCCNTR enable" "Disabled,Enabled" eventfld.long 0x00 30. "P30,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 29. "P29,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 28. "P28,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 27. "P27,Overflow Interrupt Clear" "Disabled,Enabled" newline eventfld.long 0x00 26. "P26,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 25. "P25,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 24. "P24,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 23. "P23,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 22. "P22,Overflow Interrupt Clear" "Disabled,Enabled" newline eventfld.long 0x00 21. "P21,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 20. "P20,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 19. "P19,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 18. "P18,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 17. "P17,Overflow Interrupt Clear" "Disabled,Enabled" newline eventfld.long 0x00 16. "P16,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 15. "P15,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 14. "P14,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 13. "P13,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 12. "P12,Overflow Interrupt Clear" "Disabled,Enabled" newline eventfld.long 0x00 11. "P11,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 10. "P10,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 9. "P9,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 8. "P8,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 7. "P7,Overflow Interrupt Clear" "Disabled,Enabled" newline eventfld.long 0x00 6. "P6,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 5. "P5,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 4. "P4,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 3. "P3,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 2. "P2,Overflow Interrupt Clear" "Disabled,Enabled" newline eventfld.long 0x00 1. "P1,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 0. "P0,Overflow Interrupt Clear" "Disabled,Enabled" group.long c15:0x3e9++0x00 line.long 0x00 "PMOVSSET,Performance Monitor Overflow Flag Status Set Register" group.long c15:0x8E++0x00 line.long 0x00 "PMEVCNTR0,Performance Monitors Event Count Register 0" group.long c15:(0x8E+0x40)++0x00 line.long 0x00 "PMEVTYPER0,Performance Monitors Selected Event Type Register 0" bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled" bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled" newline bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled" hexmask.long.word 0x00 0.--9. 1. "EVTCOUNT,Event to count" group.long c15:0x18E++0x00 line.long 0x00 "PMEVCNTR1,Performance Monitors Event Count Register 1" group.long c15:(0x18E+0x40)++0x00 line.long 0x00 "PMEVTYPER1,Performance Monitors Selected Event Type Register 1" bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled" bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled" newline bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled" hexmask.long.word 0x00 0.--9. 1. "EVTCOUNT,Event to count" group.long c15:0x28E++0x00 line.long 0x00 "PMEVCNTR2,Performance Monitors Event Count Register 2" group.long c15:(0x28E+0x40)++0x00 line.long 0x00 "PMEVTYPER2,Performance Monitors Selected Event Type Register 2" bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled" bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled" newline bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled" hexmask.long.word 0x00 0.--9. 1. "EVTCOUNT,Event to count" group.long c15:0x38E++0x00 line.long 0x00 "PMEVCNTR3,Performance Monitors Event Count Register 3" group.long c15:(0x38E+0x40)++0x00 line.long 0x00 "PMEVTYPER3,Performance Monitors Selected Event Type Register 3" bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled" bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled" newline bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled" hexmask.long.word 0x00 0.--9. 1. "EVTCOUNT,Event to count" group.long c15:0x48E++0x00 line.long 0x00 "PMEVCNTR4,Performance Monitors Event Count Register 4" group.long c15:(0x48E+0x40)++0x00 line.long 0x00 "PMEVTYPER4,Performance Monitors Selected Event Type Register 4" bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled" bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled" newline bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled" hexmask.long.word 0x00 0.--9. 1. "EVTCOUNT,Event to count" group.long c15:0x58E++0x00 line.long 0x00 "PMEVCNTR5,Performance Monitors Event Count Register 5" group.long c15:(0x58E+0x40)++0x00 line.long 0x00 "PMEVTYPER5,Performance Monitors Selected Event Type Register 5" bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled" bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled" newline bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled" hexmask.long.word 0x00 0.--9. 1. "EVTCOUNT,Event to count" group.long c15:0x07FE++0x00 line.long 0x00 "PMCCFILTR,Performance Monitors Cycle Count Filter Register" bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled" bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled" newline bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled" tree.end tree "System Timer Registers" group.long c15:0x000E++0x00 line.long 0x00 "CNTFRQ,Counter Frequency Register" rgroup.quad c15:0x100E0++0x01 line.quad 0x00 "CNTPCT,Counter Physical Count Register" group.long c15:0x001E++0x00 line.long 0x00 "CNTKCTL,Timer PL1 Control Register" bitfld.long 0x00 9. "EL0PTEN,Controls whether the physical timer registers are accessible from EL0 modes" "Not accessible,Accessible" bitfld.long 0x00 8. "EL0VTEN,Controls whether the virtual timer registers are accessible from EL0 modes" "Not accessible,Accessible" bitfld.long 0x00 4.--7. "EVNTI,Selects which bit of CNTVCT is the trigger for the event stream generated from the virtual counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. "EVNTDIR,Controls which transition of the CNTVCT trigger bit" "0 to 1,1 to 0" newline bitfld.long 0x00 2. "EVNTEN,Enables the generation of an event stream from the virtual counter" "Disabled,Enabled" bitfld.long 0x00 1. "EL0VCTEN,Controls whether the virtual counter, CNTVCT, and the frequency register CNTFRQ, are accessible from EL0 modes" "Not accessible,Accessible" bitfld.long 0x00 0. "EL0PCTEN,Controls whether the physical counter, CNTPCT, and the frequency register CNTFRQ, are accessible from EL0 modes" "Not accessible,Accessible" group.long c15:0x002E++0x00 line.long 0x00 "CNTP_TVAL,Counter PL1 Physical Compare Value Register" group.long c15:0x012E++0x00 line.long 0x00 "CNTP_CTL,Counter PL1 Physical Timer Control Register" rbitfld.long 0x00 2. "ISTATUS,The status of the timer interrupt" "No interrupt,Interrupt" bitfld.long 0x00 1. "IMASK,Timer interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 0. "ENABLE,Enables the timer" "Disabled,Enabled" group.long c15:0x003E++0x00 line.long 0x00 "CNTV_TVAL,Counter PL1 Virtual Timer Value Register" group.long c15:0x013E++0x00 line.long 0x00 "CNTV_CTL,Counter PL1 Virtual Timer Control Register" rbitfld.long 0x00 2. "ISTATUS,The status of the timer interrupt" "No interrupt,Interrupt" bitfld.long 0x00 1. "IMASK,Timer interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 0. "ENABLE,Enables the timer" "Disabled,Enabled" group.quad c15:0x110E0++0x01 line.quad 0x00 "CNTVCT,Counter Virtual Count Register" group.quad c15:0x120E0++0x01 line.quad 0x00 "CNTP_CVAL,Counter PL1 Physical Compare Value Register" group.quad c15:0x130E0++0x01 line.quad 0x00 "CNTV_CVAL,Counter PL1 Virtual Compare Value Register" group.quad c15:0x140E0++0x01 line.quad 0x00 "CNTVOFF,Counter Virtual Offset Register" group.long c15:0x401E++0x00 line.long 0x00 "CNTHCTL,Counter Non-secure PL2 Control Register" bitfld.long 0x00 4.--7. "EVNTI,Select trigger for the event stream generated from counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 3. "EVNTDIR,Controls which transition of the CNTVCT trigger bit" "0 to 1,1 to 0" bitfld.long 0x00 2. "EVNTEN,Enables the generation of an event stream from the virtual counter" "Disabled,Enabled" newline bitfld.long 0x00 1. "EL1VCTEN,Controls whether the Non-secure copies of the physical timer registers are accessible from Non-secure EL1 and EL0 modes" "Not accessible,Accessible" bitfld.long 0x00 0. "EL1PCTEN,Controls whether the physical counter, CNTPCT, is accessible from Non-secure EL1 and EL0 modes" "Not accessible,Accessible" group.long c15:0x402E++0x00 line.long 0x00 "CNTHP_TVAL,Counter Non-secure PL2 Physical Timer Value Register" group.long c15:0x412E++0x00 line.long 0x00 "CNTHP_CTL,Counter Non-secure PL2 Physical Timer Control Register" rbitfld.long 0x00 2. "ISTATUS,The status of the timer interrupt" "No interrupt,Interrupt" bitfld.long 0x00 1. "IMASK,Timer interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 0. "ENABLE,Enables the timer" "Disabled,Enabled" group.quad c15:0x160E0++0x01 line.quad 0x00 "CNTHP_CVAL,Counter Non-secure PL2 Physical Compare Value Register" tree.end tree "Generic Interrupt Controller CPU Interface" tree "AArch32 GIC Physical CPU Interface System Registers" tree.open "Interrupt Controller Active Priorities Registers" group.long c15:0x048C++0x00 line.long 0x00 "ICC_AP0R0,Active Priorities Group 0 Register 0" bitfld.long 0x00 31. "P31,Group 0 interrupt active with priority level 31" "No interrupt,Interrupt" bitfld.long 0x00 30. "P30,Group 0 interrupt active with priority level 30" "No interrupt,Interrupt" bitfld.long 0x00 29. "P29,Group 0 interrupt active with priority level 29" "No interrupt,Interrupt" newline bitfld.long 0x00 28. "P28,Group 0 interrupt active with priority level 28" "No interrupt,Interrupt" bitfld.long 0x00 27. "P27,Group 0 interrupt active with priority level 27" "No interrupt,Interrupt" bitfld.long 0x00 26. "P26,Group 0 interrupt active with priority level 26" "No interrupt,Interrupt" newline bitfld.long 0x00 25. "P25,Group 0 interrupt active with priority level 25" "No interrupt,Interrupt" bitfld.long 0x00 24. "P24,Group 0 interrupt active with priority level 24" "No interrupt,Interrupt" bitfld.long 0x00 23. "P23,Group 0 interrupt active with priority level 23" "No interrupt,Interrupt" newline bitfld.long 0x00 22. "P22,Group 0 interrupt active with priority level 22" "No interrupt,Interrupt" bitfld.long 0x00 21. "P21,Group 0 interrupt active with priority level 21" "No interrupt,Interrupt" bitfld.long 0x00 20. "P20,Group 0 interrupt active with priority level 20" "No interrupt,Interrupt" newline bitfld.long 0x00 19. "P19,Group 0 interrupt active with priority level 19" "No interrupt,Interrupt" bitfld.long 0x00 18. "P18,Group 0 interrupt active with priority level 18" "No interrupt,Interrupt" bitfld.long 0x00 17. "P17,Group 0 interrupt active with priority level 17" "No interrupt,Interrupt" newline bitfld.long 0x00 16. "P16,Group 0 interrupt active with priority level 16" "No interrupt,Interrupt" bitfld.long 0x00 15. "P15,Group 0 interrupt active with priority level 15" "No interrupt,Interrupt" bitfld.long 0x00 14. "P14,Group 0 interrupt active with priority level 14" "No interrupt,Interrupt" newline bitfld.long 0x00 13. "P13,Group 0 interrupt active with priority level 13" "No interrupt,Interrupt" bitfld.long 0x00 12. "P12,Group 0 interrupt active with priority level 12" "No interrupt,Interrupt" bitfld.long 0x00 11. "P11,Group 0 interrupt active with priority level 11" "No interrupt,Interrupt" newline bitfld.long 0x00 10. "P10,Group 0 interrupt active with priority level 10" "No interrupt,Interrupt" bitfld.long 0x00 9. "P9,Group 0 interrupt active with priority level 9" "No interrupt,Interrupt" bitfld.long 0x00 8. "P8,Group 0 interrupt active with priority level 8" "No interrupt,Interrupt" newline bitfld.long 0x00 7. "P7,Group 0 interrupt active with priority level 7" "No interrupt,Interrupt" bitfld.long 0x00 6. "P6,Group 0 interrupt active with priority level 6" "No interrupt,Interrupt" bitfld.long 0x00 5. "P5,Group 0 interrupt active with priority level 5" "No interrupt,Interrupt" newline bitfld.long 0x00 4. "P4,Group 0 interrupt active with priority level 4" "No interrupt,Interrupt" bitfld.long 0x00 3. "P3,Group 0 interrupt active with priority level 3" "No interrupt,Interrupt" bitfld.long 0x00 2. "P2,Group 0 interrupt active with priority level 2" "No interrupt,Interrupt" newline bitfld.long 0x00 1. "P1,Group 0 interrupt active with priority level 1" "No interrupt,Interrupt" bitfld.long 0x00 0. "P0,Group 0 interrupt active with priority level 0" "No interrupt,Interrupt" group.long c15:0x009C++0x00 line.long 0x00 "ICC_AP1R0,Active Priorities Group 1 Register 0" bitfld.long 0x00 31. "P31,Group 1 interrupt active with priority level 31" "No interrupt,Interrupt" bitfld.long 0x00 30. "P30,Group 1 interrupt active with priority level 30" "No interrupt,Interrupt" bitfld.long 0x00 29. "P29,Group 1 interrupt active with priority level 29" "No interrupt,Interrupt" newline bitfld.long 0x00 28. "P28,Group 1 interrupt active with priority level 28" "No interrupt,Interrupt" bitfld.long 0x00 27. "P27,Group 1 interrupt active with priority level 27" "No interrupt,Interrupt" bitfld.long 0x00 26. "P26,Group 1 interrupt active with priority level 26" "No interrupt,Interrupt" newline bitfld.long 0x00 25. "P25,Group 1 interrupt active with priority level 25" "No interrupt,Interrupt" bitfld.long 0x00 24. "P24,Group 1 interrupt active with priority level 24" "No interrupt,Interrupt" bitfld.long 0x00 23. "P23,Group 1 interrupt active with priority level 23" "No interrupt,Interrupt" newline bitfld.long 0x00 22. "P22,Group 1 interrupt active with priority level 22" "No interrupt,Interrupt" bitfld.long 0x00 21. "P21,Group 1 interrupt active with priority level 21" "No interrupt,Interrupt" bitfld.long 0x00 20. "P20,Group 1 interrupt active with priority level 20" "No interrupt,Interrupt" newline bitfld.long 0x00 19. "P19,Group 1 interrupt active with priority level 19" "No interrupt,Interrupt" bitfld.long 0x00 18. "P18,Group 1 interrupt active with priority level 18" "No interrupt,Interrupt" bitfld.long 0x00 17. "P17,Group 1 interrupt active with priority level 17" "No interrupt,Interrupt" newline bitfld.long 0x00 16. "P16,Group 1 interrupt active with priority level 16" "No interrupt,Interrupt" bitfld.long 0x00 15. "P15,Group 1 interrupt active with priority level 15" "No interrupt,Interrupt" bitfld.long 0x00 14. "P14,Group 1 interrupt active with priority level 14" "No interrupt,Interrupt" newline bitfld.long 0x00 13. "P13,Group 1 interrupt active with priority level 13" "No interrupt,Interrupt" bitfld.long 0x00 12. "P12,Group 1 interrupt active with priority level 12" "No interrupt,Interrupt" bitfld.long 0x00 11. "P11,Group 1 interrupt active with priority level 11" "No interrupt,Interrupt" newline bitfld.long 0x00 10. "P10,Group 1 interrupt active with priority level 10" "No interrupt,Interrupt" bitfld.long 0x00 9. "P9,Group 1 interrupt active with priority level 9" "No interrupt,Interrupt" bitfld.long 0x00 8. "P8,Group 1 interrupt active with priority level 8" "No interrupt,Interrupt" newline bitfld.long 0x00 7. "P7,Group 1 interrupt active with priority level 7" "No interrupt,Interrupt" bitfld.long 0x00 6. "P6,Group 1 interrupt active with priority level 6" "No interrupt,Interrupt" bitfld.long 0x00 5. "P5,Group 1 interrupt active with priority level 5" "No interrupt,Interrupt" newline bitfld.long 0x00 4. "P4,Group 1 interrupt active with priority level 4" "No interrupt,Interrupt" bitfld.long 0x00 3. "P3,Group 1 interrupt active with priority level 3" "No interrupt,Interrupt" bitfld.long 0x00 2. "P2,Group 1 interrupt active with priority level 2" "No interrupt,Interrupt" newline bitfld.long 0x00 1. "P1,Group 1 interrupt active with priority level 1" "No interrupt,Interrupt" bitfld.long 0x00 0. "P0,Group 1 interrupt active with priority level 0" "No interrupt,Interrupt" tree.end newline wgroup.quad c15:0x110C0++0x01 line.quad 0x00 "ICC_ASGI1R,Alternate SGI Generation Register 1" hexmask.quad.byte 0x00 48.--55. 1. "AFF3,Affinity 3" bitfld.quad 0x00 40. "IRM,Interrupt Routing Mode" "Disabled,Enabled" hexmask.quad.byte 0x00 32.--39. 1. "AFF2,Affinity 2" newline bitfld.quad 0x00 24.--27. "SGIID,SGI Interrupt ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.quad.byte 0x00 16.--23. 1. "AFF1,Affinity 1" hexmask.quad.word 0x00 0.--15. 1. "TARGETLIST,Target List" group.long c15:0x038C++0x00 line.long 0x00 "ICC_BPR0,Binary Point Register 0" bitfld.long 0x00 0.--2. "BINARYPOINT,Binary point" "0,1,2,3,4,5,6,7" group.long c15:0x03CC++0x00 line.long 0x00 "ICC_BPR1,Binary Point Register 1" bitfld.long 0x00 0.--2. "BINARYPOINT,Binary point" "0,1,2,3,4,5,6,7" group.long c15:0x04CC++0x00 line.long 0x00 "ICC_CTLR,Interrupt Control Registers for EL1" rbitfld.long 0x00 15. "A3V,Affinity 3 Valid" "Not supported,Supported" rbitfld.long 0x00 14. "SEIS,SEI Support" "Not supported,Supported" rbitfld.long 0x00 11.--13. "IDBITS,Number of physical interrupt identifier bits supported" "16 bits,24 bits,?..." newline rbitfld.long 0x00 8.--10. "PRIBITS,Number of priority bits implemented" "0,1,2,3,4,5,6,7" bitfld.long 0x00 6. "PMHE,Priority Mask Hint Enable" "Disabled,Enabled" bitfld.long 0x00 1. "EOIMODE,Alias of ICC_MCTLR.EOImode_EL1" "0,1" newline bitfld.long 0x00 0. "CBPR,Common Binary Point Register" "0,1" group.long c15:0x64CC++0x00 line.long 0x00 "ICC_MCTLR,Interrupt Control Registers for EL3" rbitfld.long 0x00 17. "NDS,Disable Security not supported" "Supported,Not supported" rbitfld.long 0x00 15. "A3V,Affinity 3 Valid" "Not supported,Supported" rbitfld.long 0x00 14. "SEIS,Indicates whether the CPU interface supports generation of SEIs" "Not supported,Supported" newline rbitfld.long 0x00 11.--13. "IDBITS,The number of physical interrupt identifier bits supported" "16 bits,24 bits,?..." rbitfld.long 0x00 8.--10. "PRIBITS,The number of priority bits implemented minus one" "0,1,2,3,4,5,6,7" bitfld.long 0x00 6. "PMHE,Priority Mask Hint Enable" "Disabled,Enabled" newline bitfld.long 0x00 4. "EOIMODE_EL1NS,Controls whether a write to an End of Interrupt register also deactivates the interrupt(Non-secure EL1 and EL2)" "Enabled,Disabled" bitfld.long 0x00 3. "EOIMODE_EL1S,Controls whether a write to an End of Interrupt register also deactivates the interrupt(Secure EL1)" "Enabled,Disabled" bitfld.long 0x00 2. "EOIMODE_EL3,Controls whether a write to an End of Interrupt register also deactivates the interrupt(EL3)" "Enabled,Disabled" newline bitfld.long 0x00 1. "CBPR_EL1NS,Controls whether the same register is used for interrupt preemption of both Group 0 and Group 1 Non-secure interrupts at EL1" "Separate registers,Same register" bitfld.long 0x00 0. "CBPR_EL1S,Controls whether the same register is used for interrupt preemption of both Group 0 and Group 1 Secure interrupts in Secure non-Monitor modes" "Separate registers,Same register" if (((per.l(c15:0x4CC))&0x3800)==0x00) wgroup.long c15:0x01BC++0x00 line.long 0x00 "ICC_DIR,Interrupt Controller Deactivate Interrupt Register" hexmask.long.word 0x00 0.--15. 1. "INTID,The INTID of the interrupt to be deactivated" wgroup.long c15:0x018C++0x00 line.long 0x00 "ICC_EOIR0,Interrupt Controller End Of Interrupt Register 0" hexmask.long.word 0x00 0.--15. 1. "INTID,The INTID from the corresponding ICC_IAR0 access" wgroup.long c15:0x01CC++0x00 line.long 0x00 "ICC_EOIR1,Interrupt Controller End Of Interrupt Register 1" hexmask.long.word 0x00 0.--15. 1. "INTID,The INTID from the corresponding ICC_IAR1 access" rgroup.long c15:0x028C++0x00 line.long 0x00 "ICC_HPPIR0,Interrupt Controller Highest Priority Pending Interrupt Register 0" hexmask.long.word 0x00 0.--15. 1. "INTID,The INTID of the highest priority pending interrupt if that interrupt is observable at the current security state and exception level" rgroup.long c15:0x02CC++0x00 line.long 0x00 "ICC_HPPIR1,Interrupt Controller Highest Priority Pending Interrupt Register 1" hexmask.long.word 0x00 0.--15. 1. "INTID,The INTID of the highest priority pending interrupt if that interrupt is observable at the current security state and exception level" elif (((per.l(c15:0x4CC))&0x3800)==0x800) wgroup.long c15:0x01BC++0x00 line.long 0x00 "ICC_DIR,Interrupt Controller Deactivate Interrupt Register" hexmask.long.tbyte 0x00 0.--23. 1. "INTID,The INTID of the interrupt to be deactivated" wgroup.long c15:0x018C++0x00 line.long 0x00 "ICC_EOIR0,Interrupt Controller End Of Interrupt Register 0" hexmask.long.tbyte 0x00 0.--23. 1. "INTID,The INTID from the corresponding ICC_IAR0 access" wgroup.long c15:0x01CC++0x00 line.long 0x00 "ICC_EOIR1,Interrupt Controller End Of Interrupt Register 1" hexmask.long.tbyte 0x00 0.--23. 1. "INTID,The INTID from the corresponding ICC_IAR1 access" rgroup.long c15:0x028C++0x00 line.long 0x00 "ICC_HPPIR0,Interrupt Controller Highest Priority Pending Interrupt Register 0" hexmask.long.tbyte 0x00 0.--23. 1. "INTID,The INTID of the highest priority pending interrupt if that interrupt is observable at the current security state and exception level" rgroup.long c15:0x02CC++0x00 line.long 0x00 "ICC_HPPIR1,Interrupt Controller Highest Priority Pending Interrupt Register 1" hexmask.long.tbyte 0x00 0.--23. 1. "INTID,The INTID of the highest priority pending interrupt if that interrupt is observable at the current security state and exception level" endif hgroup.long c15:0x008C++0x00 hide.long 0x00 "ICC_IAR0,Interrupt Acknowledge Register 0" in hgroup.long c15:0x00CC++0x00 hide.long 0x00 "ICC_IAR1,Interrupt Acknowledge Register 1" in group.long c15:0x06CC++0x00 line.long 0x00 "ICC_IGRPEN0,Interrupt Group Enable Register 0" bitfld.long 0x00 0. "ENABLE,Enables Group 0 interrupts" "Disabled,Enabled" group.long c15:0x07CC++0x00 line.long 0x00 "ICC_IGRPEN1,Interrupt Group Enable Register 1" bitfld.long 0x00 0. "ENABLE,Enables Group 0 interrupts" "Disabled,Enabled" group.long c15:0x0064++0x00 line.long 0x00 "ICC_PMR,Priority Mask Register" hexmask.long.byte 0x00 0.--7. 1. "PRIORITY,Priority mask level for the CPU interface" rgroup.long c15:0x03BC++0x00 line.long 0x00 "ICC_RPR,Running Priority Register" hexmask.long.byte 0x00 0.--7. 1. "PRIORITY,Current running priority on the CPU interface" wgroup.quad c15:0x120C0++0x01 line.quad 0x00 "ICC_SGI0R,SGI Generation Register 0" hexmask.quad.byte 0x00 48.--55. 1. "AFF3,Affinity 3" bitfld.quad 0x00 40. "IRM,Interrupt Routing Mode" "Disabled,Enabled" hexmask.quad.byte 0x00 32.--39. 1. "AFF2,Affinity 2" newline bitfld.quad 0x00 24.--27. "INTID,The INTID of the SGI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.quad.byte 0x00 16.--23. 1. "AFF1,Affinity 1" hexmask.quad.word 0x00 0.--15. 1. "TARGETLIST,Target List" wgroup.quad c15:0x100C0++0x01 line.quad 0x00 "ICC_SGI1R,SGI Generation Register 1" hexmask.quad.byte 0x00 48.--55. 1. "AFF3,Affinity 3" bitfld.quad 0x00 40. "IRM,Interrupt Routing Mode" "Disabled,Enabled" hexmask.quad.byte 0x00 32.--39. 1. "AFF2,Affinity 2" newline bitfld.quad 0x00 24.--27. "INTID,The INTID of the SGI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.quad.byte 0x00 16.--23. 1. "AFF1,Affinity 1" hexmask.quad.word 0x00 0.--15. 1. "TARGETLIST,Target List" group.long c15:0x05CC++0x00 line.long 0x00 "ICC_SRE,System Register Enable Register for EL1" bitfld.long 0x00 2. "DIB,Disable IRQ bypass" "No,Yes" bitfld.long 0x00 1. "DFB,Disable FIQ bypass" "No,Yes" bitfld.long 0x00 0. "SRE,System Register Enable" "Disabled,Enabled" if corename()=="CORTEXA53" group.long c15:0x459C++0x00 line.long 0x00 "ICC_HSRE,System Register Enable Register for EL2" bitfld.long 0x00 3. "ENABLE,Enable lower exception level access to ICC_SRE_EL1" "Disabled,Enabled" bitfld.long 0x00 2. "DIB,Disable IRQ bypass" "No,Yes" bitfld.long 0x00 1. "DFB,Disable FIQ bypass" "No,Yes" newline bitfld.long 0x00 0. "SRE,System Register Enable" "Disabled,Enabled" endif group.long c15:0x65CC++0x00 line.long 0x00 "ICC_MSRE,System Register Enable Register for EL3" bitfld.long 0x00 3. "ENABLE,Enable lower exception level access to ICC_SRE_EL1 and ICC_SRE_EL2" "Disabled,Enabled" bitfld.long 0x00 2. "DIB,Disable IRQ bypass" "No,Yes" bitfld.long 0x00 1. "DFB,Disable FIQ bypass" "No,Yes" newline bitfld.long 0x00 0. "SRE,System Register Enable" "Disabled,Enabled" group.long c15:0x67CC++0x00 line.long 0x00 "ICC_MGRPEN1,Monitor Group1 Interrupt Group Enable" bitfld.long 0x00 1. "ENABLEGRP1S,Enables Group 1 interrupts for the Secure state" "Disabled,Enabled" bitfld.long 0x00 0. "ENABLEGRP1NS,Enables Group 1 interrupts for the Non-secure state" "Disabled,Enabled" tree.end tree "AArch32 Virtual Interface Control System Registers" tree.open "Hypervisor Active Priorities Registers" group.long c15:0x408C++0x00 line.long 0x00 "ICH_AP0R0,Interrupt Controller Hypervisor Active Priorities Group 0 Register 0" bitfld.long 0x00 31. "P31,Group 0 interrupt active with priority level 31" "No interrupt,Interrupt" bitfld.long 0x00 30. "P30,Group 0 interrupt active with priority level 30" "No interrupt,Interrupt" bitfld.long 0x00 29. "P29,Group 0 interrupt active with priority level 29" "No interrupt,Interrupt" newline bitfld.long 0x00 28. "P28,Group 0 interrupt active with priority level 28" "No interrupt,Interrupt" bitfld.long 0x00 27. "P27,Group 0 interrupt active with priority level 27" "No interrupt,Interrupt" bitfld.long 0x00 26. "P26,Group 0 interrupt active with priority level 26" "No interrupt,Interrupt" newline bitfld.long 0x00 25. "P25,Group 0 interrupt active with priority level 25" "No interrupt,Interrupt" bitfld.long 0x00 24. "P24,Group 0 interrupt active with priority level 24" "No interrupt,Interrupt" bitfld.long 0x00 23. "P23,Group 0 interrupt active with priority level 23" "No interrupt,Interrupt" newline bitfld.long 0x00 22. "P22,Group 0 interrupt active with priority level 22" "No interrupt,Interrupt" bitfld.long 0x00 21. "P21,Group 0 interrupt active with priority level 21" "No interrupt,Interrupt" bitfld.long 0x00 20. "P20,Group 0 interrupt active with priority level 20" "No interrupt,Interrupt" newline bitfld.long 0x00 19. "P19,Group 0 interrupt active with priority level 19" "No interrupt,Interrupt" bitfld.long 0x00 18. "P18,Group 0 interrupt active with priority level 18" "No interrupt,Interrupt" bitfld.long 0x00 17. "P17,Group 0 interrupt active with priority level 17" "No interrupt,Interrupt" newline bitfld.long 0x00 16. "P16,Group 0 interrupt active with priority level 16" "No interrupt,Interrupt" bitfld.long 0x00 15. "P15,Group 0 interrupt active with priority level 15" "No interrupt,Interrupt" bitfld.long 0x00 14. "P14,Group 0 interrupt active with priority level 14" "No interrupt,Interrupt" newline bitfld.long 0x00 13. "P13,Group 0 interrupt active with priority level 13" "No interrupt,Interrupt" bitfld.long 0x00 12. "P12,Group 0 interrupt active with priority level 12" "No interrupt,Interrupt" bitfld.long 0x00 11. "P11,Group 0 interrupt active with priority level 11" "No interrupt,Interrupt" newline bitfld.long 0x00 10. "P10,Group 0 interrupt active with priority level 10" "No interrupt,Interrupt" bitfld.long 0x00 9. "P9,Group 0 interrupt active with priority level 9" "No interrupt,Interrupt" bitfld.long 0x00 8. "P8,Group 0 interrupt active with priority level 8" "No interrupt,Interrupt" newline bitfld.long 0x00 7. "P7,Group 0 interrupt active with priority level 7" "No interrupt,Interrupt" bitfld.long 0x00 6. "P6,Group 0 interrupt active with priority level 6" "No interrupt,Interrupt" bitfld.long 0x00 5. "P5,Group 0 interrupt active with priority level 5" "No interrupt,Interrupt" newline bitfld.long 0x00 4. "P4,Group 0 interrupt active with priority level 4" "No interrupt,Interrupt" bitfld.long 0x00 3. "P3,Group 0 interrupt active with priority level 3" "No interrupt,Interrupt" bitfld.long 0x00 2. "P2,Group 0 interrupt active with priority level 2" "No interrupt,Interrupt" newline bitfld.long 0x00 1. "P1,Group 0 interrupt active with priority level 1" "No interrupt,Interrupt" bitfld.long 0x00 0. "P0,Group 0 interrupt active with priority level 0" "No interrupt,Interrupt" group.long c15:0x409C++0x00 line.long 0x00 "ICH_AP1R0,Interrupt Controller Hypervisor Active Priorities Group 1 Register 0" bitfld.long 0x00 31. "P31,Group 1 interrupt active with priority level 31" "No interrupt,Interrupt" bitfld.long 0x00 30. "P30,Group 1 interrupt active with priority level 30" "No interrupt,Interrupt" bitfld.long 0x00 29. "P29,Group 1 interrupt active with priority level 29" "No interrupt,Interrupt" newline bitfld.long 0x00 28. "P28,Group 1 interrupt active with priority level 28" "No interrupt,Interrupt" bitfld.long 0x00 27. "P27,Group 1 interrupt active with priority level 27" "No interrupt,Interrupt" bitfld.long 0x00 26. "P26,Group 1 interrupt active with priority level 26" "No interrupt,Interrupt" newline bitfld.long 0x00 25. "P25,Group 1 interrupt active with priority level 25" "No interrupt,Interrupt" bitfld.long 0x00 24. "P24,Group 1 interrupt active with priority level 24" "No interrupt,Interrupt" bitfld.long 0x00 23. "P23,Group 1 interrupt active with priority level 23" "No interrupt,Interrupt" newline bitfld.long 0x00 22. "P22,Group 1 interrupt active with priority level 22" "No interrupt,Interrupt" bitfld.long 0x00 21. "P21,Group 1 interrupt active with priority level 21" "No interrupt,Interrupt" bitfld.long 0x00 20. "P20,Group 1 interrupt active with priority level 20" "No interrupt,Interrupt" newline bitfld.long 0x00 19. "P19,Group 1 interrupt active with priority level 19" "No interrupt,Interrupt" bitfld.long 0x00 18. "P18,Group 1 interrupt active with priority level 18" "No interrupt,Interrupt" bitfld.long 0x00 17. "P17,Group 1 interrupt active with priority level 17" "No interrupt,Interrupt" newline bitfld.long 0x00 16. "P16,Group 1 interrupt active with priority level 16" "No interrupt,Interrupt" bitfld.long 0x00 15. "P15,Group 1 interrupt active with priority level 15" "No interrupt,Interrupt" bitfld.long 0x00 14. "P14,Group 1 interrupt active with priority level 14" "No interrupt,Interrupt" newline bitfld.long 0x00 13. "P13,Group 1 interrupt active with priority level 13" "No interrupt,Interrupt" bitfld.long 0x00 12. "P12,Group 1 interrupt active with priority level 12" "No interrupt,Interrupt" bitfld.long 0x00 11. "P11,Group 1 interrupt active with priority level 11" "No interrupt,Interrupt" newline bitfld.long 0x00 10. "P10,Group 1 interrupt active with priority level 10" "No interrupt,Interrupt" bitfld.long 0x00 9. "P9,Group 1 interrupt active with priority level 9" "No interrupt,Interrupt" bitfld.long 0x00 8. "P8,Group 1 interrupt active with priority level 8" "No interrupt,Interrupt" newline bitfld.long 0x00 7. "P7,Group 1 interrupt active with priority level 7" "No interrupt,Interrupt" bitfld.long 0x00 6. "P6,Group 1 interrupt active with priority level 6" "No interrupt,Interrupt" bitfld.long 0x00 5. "P5,Group 1 interrupt active with priority level 5" "No interrupt,Interrupt" newline bitfld.long 0x00 4. "P4,Group 1 interrupt active with priority level 4" "No interrupt,Interrupt" bitfld.long 0x00 3. "P3,Group 1 interrupt active with priority level 3" "No interrupt,Interrupt" bitfld.long 0x00 2. "P2,Group 1 interrupt active with priority level 2" "No interrupt,Interrupt" newline bitfld.long 0x00 1. "P1,Group 1 interrupt active with priority level 1" "No interrupt,Interrupt" bitfld.long 0x00 0. "P0,Group 1 interrupt active with priority level 0" "No interrupt,Interrupt" tree.end newline rgroup.long c15:0x43BC++0x00 line.long 0x00 "ICH_EISR,Interrupt Controller End of Interrupt Status Register" bitfld.long 0x00 3. "STATUS3,EOI maintenance interrupt status bit for List register 3" "No interrupt,Interrupt" bitfld.long 0x00 2. "STATUS2,EOI maintenance interrupt status bit for List register 2" "No interrupt,Interrupt" bitfld.long 0x00 1. "STATUS1,EOI maintenance interrupt status bit for List register 1" "No interrupt,Interrupt" newline bitfld.long 0x00 0. "STATUS0,EOI maintenance interrupt status bit for List register 0" "No interrupt,Interrupt" rgroup.long c15:0x45BC++0x00 line.long 0x00 "ICH_ELRSR,Interrupt Controller Empty List Register Status Register" bitfld.long 0x00 3. "STATUS3,Status bit for List register 3" "Interrupt,No interrupt" bitfld.long 0x00 2. "STATUS2,Status bit for List register 2" "Interrupt,No interrupt" bitfld.long 0x00 1. "STATUS1,Status bit for List register 1" "Interrupt,No interrupt" newline bitfld.long 0x00 0. "STATUS0,Status bit for List register 0" "Interrupt,No interrupt" group.long c15:0x40BC++0x00 line.long 0x00 "ICH_HCR,Interrupt Controller Hypervisor Control Register" bitfld.long 0x00 27.--31. "EOICOUNT,This field is incremented whenever a successful write to a virtual EOIR or DIR register would have resulted in a virtual interrupt deactivation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. "TDIR,Trap Non-secure EL1 writes to ICC_DIR" "Not trapped,Trapped" bitfld.long 0x00 13. "TSEI,Trap all locally generated SEIs" "Not trapped,Trapped" newline bitfld.long 0x00 12. "TALL1,Trap all Non-secure EL1 accesses to ICC_* System registers for Group 1 interrupts to EL2" "Not trapped,Trapped" bitfld.long 0x00 11. "TALL0,Trap all Non-secure EL1 accesses to ICC_* System registers for Group 0 interrupts to EL2" "Not trapped,Trapped" bitfld.long 0x00 10. "TC,Trap all Non-secure EL1 accesses to System registers that are common to Group 0 and Group 1 to EL2" "Not trapped,Trapped" newline bitfld.long 0x00 7. "VGRP1DIE,VM Group 1 Disabled Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 6. "VGRP1EIE,VM Group 1 Enabled Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. "VGRP0DIE,VM Group 0 Disabled Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 4. "VGRP0EIE,VM Group 0 Enabled Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. "NPIE,No Pending Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 2. "LRENPIE,List Register Entry Not Present Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 1. "UIE,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. "EN,Global enable bit for the virtual CPU interface" "Disabled,Enabled" group.long c15:(0x40CC+0x0)++0x00 line.long 0x00 "ICH_LR0,Interrupt Controller List Register 0" hexmask.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt" group.long c15:(0x40CC+0x100)++0x00 line.long 0x00 "ICH_LR1,Interrupt Controller List Register 1" hexmask.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt" group.long c15:(0x40CC+0x200)++0x00 line.long 0x00 "ICH_LR2,Interrupt Controller List Register 2" hexmask.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt" group.long c15:(0x40CC+0x300)++0x00 line.long 0x00 "ICH_LR3,Interrupt Controller List Register 3" hexmask.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt" group.long c15:(0x40EC+0x0)++0x00 line.long 0x00 "ICH_LRC0,Interrupt Controller List Register Extension 0" bitfld.long 0x00 30.--31. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active" bitfld.long 0x00 29. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt, meaning that it corresponds to a physical interrupt." "Triggered by Software,Hardware interrupt" bitfld.long 0x00 28. "GROUP,Indicates the group for this virtual interrupt" "Group 1,Group 0" newline hexmask.long.byte 0x00 16.--23. 1. "PRIORITY,The priority of this interrupt" hexmask.long.word 0x00 0.--9. 1. "PINTID,Physical INTID for hardware interrupts" group.long c15:(0x40EC+0x100)++0x00 line.long 0x00 "ICH_LRC1,Interrupt Controller List Register Extension 1" bitfld.long 0x00 30.--31. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active" bitfld.long 0x00 29. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt, meaning that it corresponds to a physical interrupt." "Triggered by Software,Hardware interrupt" bitfld.long 0x00 28. "GROUP,Indicates the group for this virtual interrupt" "Group 1,Group 0" newline hexmask.long.byte 0x00 16.--23. 1. "PRIORITY,The priority of this interrupt" hexmask.long.word 0x00 0.--9. 1. "PINTID,Physical INTID for hardware interrupts" group.long c15:(0x40EC+0x200)++0x00 line.long 0x00 "ICH_LRC2,Interrupt Controller List Register Extension 2" bitfld.long 0x00 30.--31. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active" bitfld.long 0x00 29. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt, meaning that it corresponds to a physical interrupt." "Triggered by Software,Hardware interrupt" bitfld.long 0x00 28. "GROUP,Indicates the group for this virtual interrupt" "Group 1,Group 0" newline hexmask.long.byte 0x00 16.--23. 1. "PRIORITY,The priority of this interrupt" hexmask.long.word 0x00 0.--9. 1. "PINTID,Physical INTID for hardware interrupts" group.long c15:(0x40EC+0x300)++0x00 line.long 0x00 "ICH_LRC3,Interrupt Controller List Register Extension 3" bitfld.long 0x00 30.--31. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active" bitfld.long 0x00 29. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt, meaning that it corresponds to a physical interrupt." "Triggered by Software,Hardware interrupt" bitfld.long 0x00 28. "GROUP,Indicates the group for this virtual interrupt" "Group 1,Group 0" newline hexmask.long.byte 0x00 16.--23. 1. "PRIORITY,The priority of this interrupt" hexmask.long.word 0x00 0.--9. 1. "PINTID,Physical INTID for hardware interrupts" rgroup.long c15:0x42BC++0x00 line.long 0x00 "ICH_MISR,Interrupt Controller Maintenance Interrupt State Register" bitfld.long 0x00 7. "VGRP1D,VPE Group 1 Disabled" "Not asserted,Asserted" bitfld.long 0x00 6. "VGRP1E,VPE Group 1 Enabled" "Not asserted,Asserted" bitfld.long 0x00 5. "VGRP0D,VPE Group 0 Disabled" "Not asserted,Asserted" newline bitfld.long 0x00 4. "VGRP0E,VPE Group 0 Enabled" "Not asserted,Asserted" bitfld.long 0x00 3. "NP,No Pending" "Not asserted,Asserted" bitfld.long 0x00 2. "LRENP,List Register Entry Not Present" "Not asserted,Asserted" newline bitfld.long 0x00 1. "U,Underflow" "Not asserted,Asserted" bitfld.long 0x00 0. "EOI,End Of Interrupt" "Not asserted,Asserted" group.long c15:0x459C++0x00 line.long 0x00 "ICH_SRE,Hypervisor System Register" group.long c15:0x47BC++0x00 line.long 0x00 "ICH_VMCR,Interrupt Controller Virtual Machine Control Register" hexmask.long.byte 0x00 24.--31. 1. "VPMR,The priority mask level for the virtual CPU interface" bitfld.long 0x00 21.--23. "VBPR0,Virtual Binary Point Register Group 0" "[7:1]-[0],[7:2]-[1:0],[7:3]-[2:0],[7:4]-[3:0],[7:5]-[4:0],[7:6]-[5:0],[7]-[6:0],No preemption-[7:0]" bitfld.long 0x00 18.--20. "VBPR1,Virtual Binary Point Register, Group 1" ",[7:1]-[0],[7:2]-[1:0],[7:3]-[2:0],[7:4]-[3:0],[7:5]-[4:0],[7:6]-[5:0],[7]-[6:0]" newline bitfld.long 0x00 9. "VEOIM,Controls whether a write to an End of Interrupt register also deactivates the virtual interrupt" "Disabled,Enabled" bitfld.long 0x00 4. "VCBPR,Virtual Common Binary Point Register" "Separate registers,Same register" bitfld.long 0x00 3. "VFIQEN,Virtual FIQ enable" "Virtual IRQs,Virtual FIQs" newline bitfld.long 0x00 2. "VACKCTL,Virtual FIQ enable" "1022,Corresponding interrupt" bitfld.long 0x00 1. "VENG1,Virtual Group 1 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. "VENG0,Virtual Group 0 interrupt enable" "Disabled,Enabled" group.long c15:0x449C++0x00 line.long 0x00 "ICH_VSEIR,Virtual System Error Interrupt Register" rgroup.long c15:0x41BC++0x00 line.long 0x00 "ICH_VTR,Interrupt Controller VGIC Type Register" bitfld.long 0x00 29.--31. "PRIBITS,The number of priority bits implemented minus one" "0,1,2,3,4,5,6,7" bitfld.long 0x00 26.--28. "PREBITS,The number of virtual preemption bits implemented, minus one" "0,1,2,3,4,5,6,7" bitfld.long 0x00 23.--25. "IDBITS,The number of physical interrupt identifier bits supported" "16 bits,24 bits,?..." newline bitfld.long 0x00 22. "SEIS,Indicates whether the CPU interface supports local generation of SEIs" "Not supported,Supported" bitfld.long 0x00 21. "A3V,Affinity 3 Valid" "Only zero values supported,Non-zero values supported" bitfld.long 0x00 20. "NV4,GICv4 direct injection of virtual interrupts not supported" "Supported,Not supported" newline bitfld.long 0x00 19. "TDS,Separate trapping of Non-secure EL1 writes to ICV_DIR_EL1 supported" "Not supported,Supported" bitfld.long 0x00 0.--4. "LISTREGS,The number of implemented List registers, minus one" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" tree.end tree.end tree "Debug Registers" tree "Coresight Management Registers" if corename()=="CORTEXA57" rgroup.long c14:0x0000++0x0 line.long 0x0 "DBGDIDR,Debug ID Register" bitfld.long 0x0 28.--31. "WRP,Number of Watchpoint Register Pairs" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x0 24.--27. "BRP,Number of Breakpoint Register Pairs" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x0 20.--23. "CTX_CMP,Number of BRPs with Context ID Comparison Capability" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" newline hexmask.long.byte 0x0 16.--19. 1. "VERSION,Debug Architecture Version" bitfld.long 0x0 14. "NSUHD,Secure User halting debug-mode" "Supported,Not supported" bitfld.long 0x0 12. "SE,Security Extensions implemented" "Not implemented,Implemented" elif corename()=="CORTEXA53" rgroup.long c14:0x0000++0x0 line.long 0x0 "DBGDIDR,Debug ID Register" bitfld.long 0x0 28.--31. "WRP,Number of Watchpoint Register Pairs" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x0 24.--27. "BRP,Number of Breakpoint Register Pairs" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x0 20.--23. "CTX_CMP,Number of BRPs with Context ID Comparison Capability" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" newline hexmask.long.byte 0x0 16.--19. 1. "VERSION,Debug Architecture Version" bitfld.long 0x0 15. "DEVID,Debug Device ID" "Low,High" bitfld.long 0x0 14. "NSUHD,Secure User halting debug-mode" "Supported,Not supported" newline bitfld.long 0x0 13. "PCSR,PC Sample register implemented" "Not implemented,Implemented" bitfld.long 0x0 12. "SE,Security Extensions implemented" "Not implemented,Implemented" hexmask.long.byte 0x0 4.--7. 1. "VARIANT,Implementation-defined Variant Number" newline hexmask.long.byte 0x0 0.--3. 1. "REVISION,Implementation-defined Revision Number" endif rgroup.long c14:0x0060++0x0 line.long 0x00 "DBGWFAR,Watchpoint Fault Address Register" group.long c14:0x0070++0x0 line.long 0x00 "DBGVCR,Debug Vector Catch register" bitfld.long 0x00 31. "FIQVCE_NS,FIQ vector catch in Non-secure state" "Disabled,Enabled" bitfld.long 0x00 30. "IRQVCE_NS,IRG vector catch in Non-secure state" "Disabled,Enabled" bitfld.long 0x00 28. "DAVCE_NS,Data Abort vector catch in Non-secure state" "Disabled,Enabled" newline bitfld.long 0x00 27. "PAVCE_NS,Prefetch Abort vector catch in Non-secure state" "Disabled,Enabled" bitfld.long 0x00 26. "SVCVCE_NS,SVC vector catch in Non-secure state" "Disabled,Enabled" bitfld.long 0x00 25. "UIVCE_NS,Undefined instruction vector catch in Non-secure state" "Disabled,Enabled" newline bitfld.long 0x00 15. "FIQVCE_SM,FIQ vector catch enable in Secure state on Monitor mode vector" "Disabled,Enabled" bitfld.long 0x00 14. "IRQVCE_SM,IRQ vector catch enable in Secure state on Monitor mode vector" "Disabled,Enabled" bitfld.long 0x00 12. "DAVCE_SM,Data Abort vector catch enable in Secure state on Monitor mode vector" "Disabled,Enabled" newline bitfld.long 0x00 11. "PAVCE_SM,Prefetch Abort vector catch enable in Secure state on Monitor mode vector" "Disabled,Enabled" bitfld.long 0x00 10. "SMCVCE_S,SMC vector catch enable in Secure state" "Disabled,Enabled" bitfld.long 0x00 7. "FIQVCE_S,FIQ vector catch in Secure state" "Disabled,Enabled" newline bitfld.long 0x00 6. "IRQVCE_S,IRG vector catch in Secure state" "Disabled,Enabled" bitfld.long 0x00 4. "DAVCE_S,Data Abort vector catch in Secure state" "Disabled,Enabled" bitfld.long 0x00 3. "PAVCE_S,Prefetch Abort vector catch in Secure state" "Disabled,Enabled" newline bitfld.long 0x00 2. "SVCVCE_S,SVC vector catch in Secure state" "Disabled,Enabled" bitfld.long 0x00 1. "UIVCE_S,Undefined instruction vector catch in Secure state" "Disabled,Enabled" group.long c14:0x0020++0x00 line.long 0x00 "DBGDCCINT,DCC Interrupt Enable Register" bitfld.long 0x00 30. "RX,DCC interrupt request enable control for DTRRX" "Disabled,Enabled" bitfld.long 0x00 29. "TX,DCC interrupt request enable control for DTRTX" "Disabled,Enabled" group.long c14:0x0200++0x0 line.long 0x00 "DBGDTRRXEXT,Debug Receive Register (External View)" group.long c14:0x0220++0x0 line.long 0x00 "DBGDSCREXT,Debug Status and Control Register (External View)" bitfld.long 0x00 30. "RXFULL,DBGDTRRX Register full" "Empty,Full" bitfld.long 0x00 29. "TXFULL,DBGDTRTX Register full" "Empty,Full" bitfld.long 0x00 27. "RXO,Used for save/restore of EDSCR.RXO" "Disabled,Enabled" newline bitfld.long 0x00 26. "TXU,Used for save/restore of EDSCR.TXU" "Disabled,Enabled" bitfld.long 0x00 21. "TDA,Used for save/restore of EDSCR.TDA" "Disabled,Enabled" bitfld.long 0x00 18. "NS,Non-secure status bit" "Secure,Non-secure" newline bitfld.long 0x00 17. "SPNIDDIS,Secure Privileged Non-Invasive Debug Disable" "No,Yes" bitfld.long 0x00 16. "SPIDDIS,Secure Privileged Invasive Debug Disable" "No,Yes" bitfld.long 0x00 15. "MDBGEN,Monitor debug-mode enable" "Disabled,Enabled" newline bitfld.long 0x00 14. "HDE,Used for save/restore of EDSCR.HDE" "Disabled,Enabled" bitfld.long 0x00 12. "UDCCDIS,User mode access to Communications Channel disable" "No,Yes" bitfld.long 0x00 6. "ERR,Used for save/restore of EDSCR.ERR" "Disabled,Enabled" newline bitfld.long 0x00 2.--5. "MOE,Method of debug entry field" "Reserved,Breakpoint,Reserved,BKPT Instruction,Reserved,Vector Catch,Reserved,Reserved,Reserved,Reserved,Synchronous Watchpoint,?..." rgroup.long c14:0x0010++0x0 line.long 0x00 "DBGDSCRINT,Debug Status and Control Register (Internal View)" bitfld.long 0x00 30. "RXFULL,DBGDTRRX Register full" "Empty,Full" bitfld.long 0x00 29. "TXFULL,DBGDTRTX Register full" "Empty,Full" bitfld.long 0x00 18. "NS,Non-secure status bit" "Secure,Non-secure" newline bitfld.long 0x00 17. "SPNIDDIS,Secure Privileged Non-Invasive Debug Disable" "No,Yes" bitfld.long 0x00 16. "SPIDDIS,Secure Privileged Invasive Debug Disable" "No,Yes" bitfld.long 0x00 15. "MDBGEN,Monitor debug-mode enable" "Disabled,Enabled" newline bitfld.long 0x00 12. "UDCCDIS,User mode access to Communications Channel disable" "No,Yes" bitfld.long 0x00 2.--5. "MOE,Method of debug entry field" "Reserved,Breakpoint,Reserved,BKPT Instruction,Reserved,Vector Catch,Reserved,Reserved,Reserved,Reserved,Synchronous Watchpoint,?..." wgroup.long c14:0x0230++0x0 line.long 0x00 "DBGDTRTXEXT,Debug Transmit Register (External View)" group.long c14:0x0050++0x0 line.long 0x00 "DBGDTRTXINT,Debug Transmit/Receive Register (Internal View)" group.long c14:0x0687++0x0 line.long 0x0 "DBGCLAIMSET,Claim Tag Set Register" bitfld.long 0x0 7. "CT7,Claim Tag 7 Set" "Not set,Set" bitfld.long 0x0 6. "CT6,Claim Tag 6 Set" "Not set,Set" bitfld.long 0x0 5. "CT5,Claim Tag 5 Set" "Not set,Set" newline bitfld.long 0x0 4. "CT4,Claim Tag 4 Set" "Not set,Set" bitfld.long 0x0 3. "CT3,Claim Tag 3 Set" "Not set,Set" bitfld.long 0x0 2. "CT2,Claim Tag 2 Set" "Not set,Set" newline bitfld.long 0x0 1. "CT1,Claim Tag 1 Set" "Not set,Set" bitfld.long 0x0 0. "CT0,Claim Tag 0 Set" "Not set,Set" group.long c14:0x0697++0x0 line.long 0x0 "DBGCLAIMCLR,Claim Tag Clear Register" bitfld.long 0x0 7. "CT7,Claim Tag 7 Clear" "Not cleared,Cleared" bitfld.long 0x0 6. "CT6,Claim Tag 6 Clear" "Not cleared,Cleared" bitfld.long 0x0 5. "CT5,Claim Tag 5 Clear" "Not cleared,Cleared" newline bitfld.long 0x0 4. "CT4,Claim Tag 4 Clear" "Not cleared,Cleared" bitfld.long 0x0 3. "CT3,Claim Tag 3 Clear" "Not cleared,Cleared" bitfld.long 0x0 2. "CT2,Claim Tag 2 Clear" "Not cleared,Cleared" newline bitfld.long 0x0 1. "CT1,Claim Tag 1 Clear" "Not cleared,Cleared" bitfld.long 0x0 0. "CT0,Claim Tag 0 Clear" "Not cleared,Cleared" rgroup.long c14:0x06E7++0x0 line.long 0x0 "DBGAUTHSTATUS,Debug Authentication Status Register" bitfld.long 0x00 7. "SNDFI,Secure non-invasive debug features implementation" "No effect,Implemented" bitfld.long 0x00 6. "SNDE,Secure non-invasive debug enable" "Disabled,Enabled" bitfld.long 0x00 5. "SIDFI,Secure invasive debug features implementation" "No effect,Implemented" newline bitfld.long 0x00 4. "SIDE,Secure invasive debug enable" "Disabled,Enabled" bitfld.long 0x00 3. "NSNDFI,Non-secure non-invasive debug features implementation" "Not implemented,Implemented" bitfld.long 0x00 2. "NSNDE,Non-secure non-invasive debug enable" "0,1" newline bitfld.long 0x00 1. "NSIDFI,Non-secure invasive debug features implementation" "Not implemented,Implemented" bitfld.long 0x00 0. "NSIDE,Non-secure invasive debug enable" "0,1" rgroup.long c14:0x0707++0x0 line.long 0x0 "DBGDEVID2,Debug Device ID Register 2" rgroup.long c14:0x0717++0x0 line.long 0x0 "DBGDEVID1,Debug Device ID Register 1" bitfld.long 0x00 0.--3. "PCSROFFSET,This field defines the offset applied to DBGPCSR samples" "0,1,No offset,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long c14:0x0727++0x00 line.long 0x00 "DBGDEVID,Debug Device ID Register 0" bitfld.long 0x00 28.--31. "CIDMASK,Specifies the level of support for the Context ID matching breakpoint masking capability" "Not implemented,?..." bitfld.long 0x00 24.--27. "AUXREGS,Specifies support for the Debug External Auxiliary Control Register" "Not implemented,?..." bitfld.long 0x00 20.--23. "DOUBLELOCK,Specifies support for the Debug OS Double Lock Register" "Reserved,Implemented,?..." newline bitfld.long 0x00 16.--19. "VIREXTNS,Specifies whether EL2 is implemented" "Reserved,Implemented,?..." bitfld.long 0x00 12.--15. "VECTORCATCH,Defines the form of the vector catch event implemented" "Implemented,?..." bitfld.long 0x00 8.--11. "BPADDRMASK,Indicates the level of support for the Immediate Virtual Address(IVA) matching breakpoint masking capability" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Implemented" newline bitfld.long 0x00 4.--7. "WPADDRMASK,Indicates the level of support for the DVA matching watchpoint masking capability" "Reserved,Implemented,?..." bitfld.long 0x00 0.--3. "PCSAMPLE,Indicates the level of support for Program Counter sampling using debug registers 40 and 41" "Reserved,Reserved,Reserved,Implemented,?..." tree.end newline rgroup.quad c14:0x10010++0x1 line.quad 0x0 "DBGDRAR,Debug ROM Address Register" hexmask.quad.word 0x0 32.--47. 0x1 "ROMADDR,ROM physical address" hexmask.quad.tbyte 0x0 12.--31. 0x10 "ROMADDR,ROM physical address" bitfld.quad 0x0 1. "VALID1,ROM table address valid" "Not valid,Valid" newline bitfld.quad 0x0 0. "VALID0,ROM table address valid" "Not valid,Valid" rgroup.quad c14:0x10020++0x1 line.quad 0x0 "DBGDSAR,Debug Self Address Offset Register" wgroup.long c14:0x0401++0x00 line.long 0x00 "DBGOSLAR,Operating System Lock Access Register" rgroup.long c14:0x0411++0x00 line.long 0x00 "DBGOSLSR,Operating System Lock Status Register" bitfld.long 0x00 2. "NTT,32-Bit Access" "Not required,Required" bitfld.long 0x00 1. "OSLK,Status of the OS Lock" "Not locked,Locked" bitfld.long 0x00 0. 3. "OSLM,OS Lock Model implemented Bit" "Reserved,Reserved,Implemented,?..." if (((per.l(c14:0x0411))&0x2)==0x2) group.long c14:0x0260++0x00 line.long 0x00 "DBGOSECCR,Debug OS Lock Exception Catch Control Register" else hgroup.long c14:0x0260++0x00 hide.long 0x00 "DBGOSECCR,Debug OS Lock Exception Catch Control Register" endif group.long c14:0x0431++0x00 line.long 0x00 "DBGOSDLR,Debug OS Double Lock Register" bitfld.long 0x00 0. "DLK,OS Double Lock control bit" "Not locked,Locked" group.long c14:0x0441++0x00 line.long 0x00 "DBGPRCR,Device Power-Down and Reset Control Register" bitfld.long 0x00 0. "CORENPDRQ,Core No Power down Request" "Low,High" tree.end tree "Breakpoint Registers" if (((per.l(c14:(0x500+0x0)))&0xF00000)==(0x000000||0x100000||0x400000||0x500000)) group.long c14:(0x0400+0x0)++0x0 "Breakpoint 0" line.long 0x00 "DBGBVR0,Breakpoint Value Register (Instruction address)" hexmask.long 0x00 2.--31. 0x4 "VA,Bits[31:2] of the address value for comparison" elif (((per.l(c14:(0x500+0x0)))&0xF00000)==(0x800000||0x900000||0xA00000||0xB00000)) hgroup.long c14:(0x0400+0x0)++0x0 "Breakpoint 0" hide.long 0x00 "DBGBVR0,Breakpoint Value Register (VMID)" else group.long c14:(0x0400+0x0)++0x0 "Breakpoint 0" line.long 0x00 "DBGBVR0,Breakpoint Value Register (Context ID)" endif group.long c14:(0x0500+0x0)++0x0 line.long 0x00 "DBGBCR0,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..." bitfld.long 0x00 13. "HMM,Hypervisor mode match" "Not matched,Matched" newline bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode" bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled" if (((per.l(c14:(0x500+0x10)))&0xF00000)==(0x000000||0x100000||0x400000||0x500000)) group.long c14:(0x0400+0x10)++0x0 "Breakpoint 1" line.long 0x00 "DBGBVR1,Breakpoint Value Register (Instruction address)" hexmask.long 0x00 2.--31. 0x4 "VA,Bits[31:2] of the address value for comparison" elif (((per.l(c14:(0x500+0x10)))&0xF00000)==(0x800000||0x900000||0xA00000||0xB00000)) hgroup.long c14:(0x0400+0x10)++0x0 "Breakpoint 1" hide.long 0x00 "DBGBVR1,Breakpoint Value Register (VMID)" else group.long c14:(0x0400+0x10)++0x0 "Breakpoint 1" line.long 0x00 "DBGBVR1,Breakpoint Value Register (Context ID)" endif group.long c14:(0x0500+0x10)++0x0 line.long 0x00 "DBGBCR1,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..." bitfld.long 0x00 13. "HMM,Hypervisor mode match" "Not matched,Matched" newline bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode" bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled" if (((per.l(c14:(0x500+0x20)))&0xF00000)==(0x000000||0x100000||0x400000||0x500000)) group.long c14:(0x0400+0x20)++0x0 "Breakpoint 2" line.long 0x00 "DBGBVR2,Breakpoint Value Register (Instruction address)" hexmask.long 0x00 2.--31. 0x4 "VA,Bits[31:2] of the address value for comparison" elif (((per.l(c14:(0x500+0x20)))&0xF00000)==(0x800000||0x900000||0xA00000||0xB00000)) hgroup.long c14:(0x0400+0x20)++0x0 "Breakpoint 2" hide.long 0x00 "DBGBVR2,Breakpoint Value Register (VMID)" else group.long c14:(0x0400+0x20)++0x0 "Breakpoint 2" line.long 0x00 "DBGBVR2,Breakpoint Value Register (Context ID)" endif group.long c14:(0x0500+0x20)++0x0 line.long 0x00 "DBGBCR2,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..." bitfld.long 0x00 13. "HMM,Hypervisor mode match" "Not matched,Matched" newline bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode" bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled" if (((per.l(c14:(0x500+0x30)))&0xF00000)==(0x000000||0x100000||0x400000||0x500000)) group.long c14:(0x0400+0x30)++0x0 "Breakpoint 3" line.long 0x00 "DBGBVR3,Breakpoint Value Register (Instruction address)" hexmask.long 0x00 2.--31. 0x4 "VA,Bits[31:2] of the address value for comparison" elif (((per.l(c14:(0x500+0x30)))&0xF00000)==(0x800000||0x900000||0xA00000||0xB00000)) hgroup.long c14:(0x0400+0x30)++0x0 "Breakpoint 3" hide.long 0x00 "DBGBVR3,Breakpoint Value Register (VMID)" else group.long c14:(0x0400+0x30)++0x0 "Breakpoint 3" line.long 0x00 "DBGBVR3,Breakpoint Value Register (Context ID)" endif group.long c14:(0x0500+0x30)++0x0 line.long 0x00 "DBGBCR3,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..." bitfld.long 0x00 13. "HMM,Hypervisor mode match" "Not matched,Matched" newline bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode" bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled" if (((per.l(c14:(0x500+0x40)))&0xF00000)==(0x000000||0x100000||0x400000||0x500000)) group.long c14:(0x0400+0x40)++0x0 "Breakpoint 4" line.long 0x00 "DBGBVR4,Breakpoint Value Register (Instruction address)" hexmask.long 0x00 2.--31. 0x4 "VA,Bits[31:2] of the address value for comparison" elif (((per.l(c14:(0x500+0x40)))&0xF00000)==(0x800000||0x900000||0xA00000||0xB00000)) hgroup.long c14:(0x0400+0x40)++0x0 "Breakpoint 4" hide.long 0x00 "DBGBVR4,Breakpoint Value Register (VMID)" else group.long c14:(0x0400+0x40)++0x0 "Breakpoint 4" line.long 0x00 "DBGBVR4,Breakpoint Value Register (Context ID)" endif group.long c14:(0x0500+0x40)++0x0 line.long 0x00 "DBGBCR4,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..." bitfld.long 0x00 13. "HMM,Hypervisor mode match" "Not matched,Matched" newline bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode" bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled" if (((per.l(c14:(0x500+0x50)))&0xF00000)==(0x000000||0x100000||0x400000||0x500000)) group.long c14:(0x0400+0x50)++0x0 "Breakpoint 5" line.long 0x00 "DBGBVR5,Breakpoint Value Register (Instruction address)" hexmask.long 0x00 2.--31. 0x4 "VA,Bits[31:2] of the address value for comparison" elif (((per.l(c14:(0x500+0x50)))&0xF00000)==(0x800000||0x900000||0xA00000||0xB00000)) hgroup.long c14:(0x0400+0x50)++0x0 "Breakpoint 5" hide.long 0x00 "DBGBVR5,Breakpoint Value Register (VMID)" else group.long c14:(0x0400+0x50)++0x0 "Breakpoint 5" line.long 0x00 "DBGBVR5,Breakpoint Value Register (Context ID)" endif group.long c14:(0x0500+0x50)++0x0 line.long 0x00 "DBGBCR5,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..." bitfld.long 0x00 13. "HMM,Hypervisor mode match" "Not matched,Matched" newline bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode" bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled" group.long c14:0x0141++0x0 line.long 0x00 "DBGBXVR4,Debug Breakpoint Extended Value Register 4" hexmask.long.byte 0x00 0.--7. 1. "VMID, VMID value" group.long c14:0x0151++0x0 line.long 0x00 "DBGBXVR5,Debug Breakpoint Extended Value Register 5" hexmask.long.byte 0x00 0.--7. 1. "VMID, VMID value" tree.end tree "Watchpoint Control Registers" group.long c14:(0x0600+0x0)++0x00 "Breakpoint 0" line.long 0x00 "DBGWVR0,Watchpoint Value Register" hexmask.long 0x00 2.--31. 0x4 "DA,Data address" group.long c14:(0x0700+0x0)++0x00 line.long 0x00 "DBGWCR0,Watchpoint Control Register" bitfld.long 0x0 24.--28. "MASK,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x0 20. "WT,Watchpoint Type" "Unlinked data address match,Linked data address match" bitfld.long 0x0 16.--19. "LBN,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" newline bitfld.long 0x0 14.--15. "SSC,Secure state control" "Both,Non-secure,Secure,?..." bitfld.long 0x0 13. "HMC,Hypervisor Mode Control" "Disabled,Enabled" hexmask.long.byte 0x0 5.--12. "BAS,Byte address select" newline bitfld.long 0x0 3.--4. "LSC,Load/Store access control" "Reserved,Load,Store,Any" bitfld.long 0x0 1.--2. "PAC,Privileged Access control" "Reserved,Match privileged accesses,Match unprivileged accesses,Match all accesses" bitfld.long 0x0 0. "WE,Watchpoint enable" "Disabled,Enabled" group.long c14:(0x0600+0x10)++0x00 "Breakpoint 1" line.long 0x00 "DBGWVR1,Watchpoint Value Register" hexmask.long 0x00 2.--31. 0x4 "DA,Data address" group.long c14:(0x0700+0x10)++0x00 line.long 0x00 "DBGWCR1,Watchpoint Control Register" bitfld.long 0x0 24.--28. "MASK,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x0 20. "WT,Watchpoint Type" "Unlinked data address match,Linked data address match" bitfld.long 0x0 16.--19. "LBN,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" newline bitfld.long 0x0 14.--15. "SSC,Secure state control" "Both,Non-secure,Secure,?..." bitfld.long 0x0 13. "HMC,Hypervisor Mode Control" "Disabled,Enabled" hexmask.long.byte 0x0 5.--12. "BAS,Byte address select" newline bitfld.long 0x0 3.--4. "LSC,Load/Store access control" "Reserved,Load,Store,Any" bitfld.long 0x0 1.--2. "PAC,Privileged Access control" "Reserved,Match privileged accesses,Match unprivileged accesses,Match all accesses" bitfld.long 0x0 0. "WE,Watchpoint enable" "Disabled,Enabled" group.long c14:(0x0600+0x20)++0x00 "Breakpoint 2" line.long 0x00 "DBGWVR2,Watchpoint Value Register" hexmask.long 0x00 2.--31. 0x4 "DA,Data address" group.long c14:(0x0700+0x20)++0x00 line.long 0x00 "DBGWCR2,Watchpoint Control Register" bitfld.long 0x0 24.--28. "MASK,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x0 20. "WT,Watchpoint Type" "Unlinked data address match,Linked data address match" bitfld.long 0x0 16.--19. "LBN,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" newline bitfld.long 0x0 14.--15. "SSC,Secure state control" "Both,Non-secure,Secure,?..." bitfld.long 0x0 13. "HMC,Hypervisor Mode Control" "Disabled,Enabled" hexmask.long.byte 0x0 5.--12. "BAS,Byte address select" newline bitfld.long 0x0 3.--4. "LSC,Load/Store access control" "Reserved,Load,Store,Any" bitfld.long 0x0 1.--2. "PAC,Privileged Access control" "Reserved,Match privileged accesses,Match unprivileged accesses,Match all accesses" bitfld.long 0x0 0. "WE,Watchpoint enable" "Disabled,Enabled" group.long c14:(0x0600+0x30)++0x00 "Breakpoint 3" line.long 0x00 "DBGWVR3,Watchpoint Value Register" hexmask.long 0x00 2.--31. 0x4 "DA,Data address" group.long c14:(0x0700+0x30)++0x00 line.long 0x00 "DBGWCR3,Watchpoint Control Register" bitfld.long 0x0 24.--28. "MASK,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x0 20. "WT,Watchpoint Type" "Unlinked data address match,Linked data address match" bitfld.long 0x0 16.--19. "LBN,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" newline bitfld.long 0x0 14.--15. "SSC,Secure state control" "Both,Non-secure,Secure,?..." bitfld.long 0x0 13. "HMC,Hypervisor Mode Control" "Disabled,Enabled" hexmask.long.byte 0x0 5.--12. "BAS,Byte address select" newline bitfld.long 0x0 3.--4. "LSC,Load/Store access control" "Reserved,Load,Store,Any" bitfld.long 0x0 1.--2. "PAC,Privileged Access control" "Reserved,Match privileged accesses,Match unprivileged accesses,Match all accesses" bitfld.long 0x0 0. "WE,Watchpoint enable" "Disabled,Enabled" tree.end tree.end AUTOINDENT.OFF AUTOINDENT.POP tree.open "Interrupt Controller (GIC-400)" width 17. width 17. base ad:0xF9010000 tree "Distributor Interface" if (((per.l(ad:0xF9010000+0x04))&0x400)==0x400) if PER.ADDRESS.isSECUREEX(ad:0xF9010000) group.long 0x0000++0x03 line.long 0x00 "GICD_CTLR,Distributor Control Register (Secure access)" bitfld.long 0x00 1. " ENABLEGRP1 ,Global Interrupt Enable Group 1" "Disabled,Enabled" bitfld.long 0x00 0. " ENABLEGRP0 ,Global Interrupt Enable Group 1" "Disabled,Enabled" else group.long 0x0000++0x03 line.long 0x00 "GICD_CTLR,Distributor Control Register (Non-secure access)" bitfld.long 0x00 0. " ENABLE ,Global enable for forwarding pending interrupts from the Distributor to the CPU interfaces" "Disabled,Enabled" endif else group.long 0x0000++0x03 line.long 0x00 "GICD_CTLR,Distributor Control Register" bitfld.long 0x00 0. " ENABLE ,Global enable for forwarding pending interrupts from the Distributor to the CPU interfaces" "Disabled,Enabled" endif if (((per.l(ad:0xF9010000+0x04))&0x400)==0x400) rgroup.long 0x0004++0x03 line.long 0x00 "GICD_TYPER,Interrupt Controller Type Register" bitfld.long 0x00 11.--15. " LSPI ,Locable Shared Peripheral Interrupts" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 10. " SECURITYEXTN ,Indicate whether interrupt controller implements the security extensions" "Not implemented,Implemented" textline " " bitfld.long 0x00 5.--7. " CPUNUMBER ,Indicates the number of implemented CPU interfaces" "1,2,3,4,?..." bitfld.long 0x00 0.--4. " ITLN ,Indicates the number of interrupts that the interrupt controller supports" "Up to 32,Up to 64,Up to 96,Up to 128,Up to 160,Up to 192,Up to 224,Up to 256,Up to 288,Up to 320,Up to 352,Up to 384,Up to 416,Up to 448,Up to 480,Up to 512,Up to 544,Up to 576,Up to 608,Up to 640,Up to 672,Up to 704,Up to 736,Up to 768,Up to 800,Up to 832,Up to 864,Up to 896,Up to 928,Up to 960,Up to 992,Up to 1020" else rgroup.long 0x0004++0x03 line.long 0x00 "GICD_TYPER,Interrupt Controller Type Register" bitfld.long 0x00 10. " SECURITYEXTN ,Indicates whether interrupt controller implements the security extensions" "Not implemented,Implemented" textline " " bitfld.long 0x00 5.--7. " CPUNUMBER ,Indicates the number of implemented CPU interfaces" "1,2,3,4,?..." bitfld.long 0x00 0.--4. " ITLN ,Indicates the number of interrupts that the interrupt controller supports" "Up to 32,Up to 64,Up to 96,Up to 128,Up to 160,Up to 192,Up to 224,Up to 256,Up to 288,Up to 320,Up to 352,Up to 384,Up to 416,Up to 448,Up to 480,Up to 512,Up to 544,Up to 576,Up to 608,Up to 640,Up to 672,Up to 704,Up to 736,Up to 768,Up to 800,Up to 832,Up to 864,Up to 896,Up to 928,Up to 960,Up to 992,Up to 1020" endif rgroup.long 0x0008++0x03 line.long 0x00 "GICD_IIDR,Distributor Implementer Identification Register" bitfld.long 0x00 24.--31. " PRODID ,Indicates the product ID" "PL390,PL390,GIC400,GIC400,?..." bitfld.long 0x00 16.--19. " VAR ,Major revison number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 12.--15. " REV ,Minor revision number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 0.--11. 1. " IMP ,Implementer" sif CPU.FEATURE(hypervisor)||CPU.FEATURE(secure) width 17. tree "Group/Security Registers" if PER.ADDRESS.isSECUREEX(ad:0xF9010000+0x0080) group.long 0x0080++0x03 line.long 0x0 "GICD_IGROUPR0,Interrupt Group Register 0 (Secure Access)" bitfld.long 0x00 31. " GSB31 ,Group Status Bit 31" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB30 ,Group Status Bit 30" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB29 ,Group Status Bit 29" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB28 ,Group Status Bit 28" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB27 ,Group Status Bit 27" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB26 ,Group Status Bit 26" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB25 ,Group Status Bit 25" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB24 ,Group Status Bit 24" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB23 ,Group Status Bit 23" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB22 ,Group Status Bit 22" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB21 ,Group Status Bit 21" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB20 ,Group Status Bit 20" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB19 ,Group Status Bit 19" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB18 ,Group Status Bit 18" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB17 ,Group Status Bit 17" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB16 ,Group Status Bit 16" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB15 ,Group Status Bit 15" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB14 ,Group Status Bit 14" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB13 ,Group Status Bit 13" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB12 ,Group Status Bit 12" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB11 ,Group Status Bit 11" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB10 ,Group Status Bit 10" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB9 ,Group Status Bit 9" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB8 ,Group Status Bit 8" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB7 ,Group Status Bit 7" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB6 ,Group Status Bit 6" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB5 ,Group Status Bit 5" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB4 ,Group Status Bit 4" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB3 ,Group Status Bit 3" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB2 ,Group Status Bit 2" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB1 ,Group Status Bit 1" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB0 ,Group Status Bit 0" "Group 0 (Secure),Group 1 (Non-secure)" else group.long 0x0080++0x03 line.long 0x0 "GICD_IGROUPR0,Interrupt Group Register 0 (Non-secure access)" bitfld.long 0x00 31. " GSB31 ,Group Status Bit 31" "Group 0,Group 1" bitfld.long 0x00 30. " GSB30 ,Group Status Bit 30" "Group 0,Group 1" bitfld.long 0x00 29. " GSB29 ,Group Status Bit 29" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB28 ,Group Status Bit 28" "Group 0,Group 1" bitfld.long 0x00 27. " GSB27 ,Group Status Bit 27" "Group 0,Group 1" bitfld.long 0x00 26. " GSB26 ,Group Status Bit 26" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB25 ,Group Status Bit 25" "Group 0,Group 1" bitfld.long 0x00 24. " GSB24 ,Group Status Bit 24" "Group 0,Group 1" bitfld.long 0x00 23. " GSB23 ,Group Status Bit 23" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB22 ,Group Status Bit 22" "Group 0,Group 1" bitfld.long 0x00 21. " GSB21 ,Group Status Bit 21" "Group 0,Group 1" bitfld.long 0x00 20. " GSB20 ,Group Status Bit 20" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB19 ,Group Status Bit 19" "Group 0,Group 1" bitfld.long 0x00 18. " GSB18 ,Group Status Bit 18" "Group 0,Group 1" bitfld.long 0x00 17. " GSB17 ,Group Status Bit 17" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB16 ,Group Status Bit 16" "Group 0,Group 1" bitfld.long 0x00 15. " GSB15 ,Group Status Bit 15" "Group 0,Group 1" bitfld.long 0x00 14. " GSB14 ,Group Status Bit 14" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB13 ,Group Status Bit 13" "Group 0,Group 1" bitfld.long 0x00 12. " GSB12 ,Group Status Bit 12" "Group 0,Group 1" bitfld.long 0x00 11. " GSB11 ,Group Status Bit 11" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB10 ,Group Status Bit 10" "Group 0,Group 1" bitfld.long 0x00 9. " GSB9 ,Group Status Bit 9" "Group 0,Group 1" bitfld.long 0x00 8. " GSB8 ,Group Status Bit 8" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB7 ,Group Status Bit 7" "Group 0,Group 1" bitfld.long 0x00 6. " GSB6 ,Group Status Bit 6" "Group 0,Group 1" bitfld.long 0x00 5. " GSB5 ,Group Status Bit 5" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB4 ,Group Status Bit 4" "Group 0,Group 1" bitfld.long 0x00 3. " GSB3 ,Group Status Bit 3" "Group 0,Group 1" bitfld.long 0x00 2. " GSB2 ,Group Status Bit 2" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB1 ,Group Status Bit 1" "Group 0,Group 1" bitfld.long 0x00 0. " GSB0 ,Group Status Bit 0" "Group 0,Group 1" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x01)&&(PER.ADDRESS.isSECUREEX(ad:0xF9010000+0x0084)) group.long 0x0084++0x03 line.long 0x0 "GICD_IGROUPR1,Interrupt Group Register 1 (Secure Access)" bitfld.long 0x00 31. " GSB63 ,Group Status Bit 63" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB62 ,Group Status Bit 62" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB61 ,Group Status Bit 61" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB60 ,Group Status Bit 60" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB59 ,Group Status Bit 59" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB58 ,Group Status Bit 58" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB57 ,Group Status Bit 57" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB56 ,Group Status Bit 56" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB55 ,Group Status Bit 55" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB54 ,Group Status Bit 54" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB53 ,Group Status Bit 53" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB52 ,Group Status Bit 52" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB51 ,Group Status Bit 51" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB50 ,Group Status Bit 50" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB49 ,Group Status Bit 49" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB48 ,Group Status Bit 48" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB47 ,Group Status Bit 47" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB46 ,Group Status Bit 46" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB45 ,Group Status Bit 45" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB44 ,Group Status Bit 44" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB43 ,Group Status Bit 43" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB42 ,Group Status Bit 42" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB41 ,Group Status Bit 41" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB40 ,Group Status Bit 40" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB39 ,Group Status Bit 39" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB38 ,Group Status Bit 38" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB37 ,Group Status Bit 37" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB36 ,Group Status Bit 36" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB35 ,Group Status Bit 35" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB34 ,Group Status Bit 34" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB33 ,Group Status Bit 33" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB32 ,Group Status Bit 32" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x01) group.long 0x0084++0x03 line.long 0x0 "GICD_IGROUPR1,Interrupt Group Register 1 (Non-secure access)" bitfld.long 0x00 31. " GSB63 ,Group Status Bit 63" "Group 0,Group 1" bitfld.long 0x00 30. " GSB62 ,Group Status Bit 62" "Group 0,Group 1" bitfld.long 0x00 29. " GSB61 ,Group Status Bit 61" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB60 ,Group Status Bit 60" "Group 0,Group 1" bitfld.long 0x00 27. " GSB59 ,Group Status Bit 59" "Group 0,Group 1" bitfld.long 0x00 26. " GSB58 ,Group Status Bit 58" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB57 ,Group Status Bit 57" "Group 0,Group 1" bitfld.long 0x00 24. " GSB56 ,Group Status Bit 56" "Group 0,Group 1" bitfld.long 0x00 23. " GSB55 ,Group Status Bit 55" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB54 ,Group Status Bit 54" "Group 0,Group 1" bitfld.long 0x00 21. " GSB53 ,Group Status Bit 53" "Group 0,Group 1" bitfld.long 0x00 20. " GSB52 ,Group Status Bit 52" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB51 ,Group Status Bit 51" "Group 0,Group 1" bitfld.long 0x00 18. " GSB50 ,Group Status Bit 50" "Group 0,Group 1" bitfld.long 0x00 17. " GSB49 ,Group Status Bit 49" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB48 ,Group Status Bit 48" "Group 0,Group 1" bitfld.long 0x00 15. " GSB47 ,Group Status Bit 47" "Group 0,Group 1" bitfld.long 0x00 14. " GSB46 ,Group Status Bit 46" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB45 ,Group Status Bit 45" "Group 0,Group 1" bitfld.long 0x00 12. " GSB44 ,Group Status Bit 44" "Group 0,Group 1" bitfld.long 0x00 11. " GSB43 ,Group Status Bit 43" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB42 ,Group Status Bit 42" "Group 0,Group 1" bitfld.long 0x00 9. " GSB41 ,Group Status Bit 41" "Group 0,Group 1" bitfld.long 0x00 8. " GSB40 ,Group Status Bit 40" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB39 ,Group Status Bit 39" "Group 0,Group 1" bitfld.long 0x00 6. " GSB38 ,Group Status Bit 38" "Group 0,Group 1" bitfld.long 0x00 5. " GSB37 ,Group Status Bit 37" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB36 ,Group Status Bit 36" "Group 0,Group 1" bitfld.long 0x00 3. " GSB35 ,Group Status Bit 35" "Group 0,Group 1" bitfld.long 0x00 2. " GSB34 ,Group Status Bit 34" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB33 ,Group Status Bit 33" "Group 0,Group 1" bitfld.long 0x00 0. " GSB32 ,Group Status Bit 32" "Group 0,Group 1" else rgroup.long 0x0084++0x03 line.long 0x0 "GICD_IGROUPR1,Interrupt Group Register 1" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x02)&&(PER.ADDRESS.isSECUREEX(ad:0xF9010000+0x0088)) group.long 0x0088++0x03 line.long 0x0 "GICD_IGROUPR2,Interrupt Group Register 2 (Secure access)" bitfld.long 0x00 31. " GSB95 ,Group Status Bit 95" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB94 ,Group Status Bit 94" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB93 ,Group Status Bit 93" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB92 ,Group Status Bit 92" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB91 ,Group Status Bit 91" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB90 ,Group Status Bit 90" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB89 ,Group Status Bit 89" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB88 ,Group Status Bit 88" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB87 ,Group Status Bit 87" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB86 ,Group Status Bit 86" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB85 ,Group Status Bit 85" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB84 ,Group Status Bit 84" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB83 ,Group Status Bit 83" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB82 ,Group Status Bit 82" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB81 ,Group Status Bit 81" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB80 ,Group Status Bit 80" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB79 ,Group Status Bit 79" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB78 ,Group Status Bit 78" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB77 ,Group Status Bit 77" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB76 ,Group Status Bit 76" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB75 ,Group Status Bit 75" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB74 ,Group Status Bit 74" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB73 ,Group Status Bit 73" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB72 ,Group Status Bit 72" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB71 ,Group Status Bit 71" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB70 ,Group Status Bit 70" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB69 ,Group Status Bit 69" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB68 ,Group Status Bit 68" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB67 ,Group Status Bit 67" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB66 ,Group Status Bit 66" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB65 ,Group Status Bit 65" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB64 ,Group Status Bit 64" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x02) group.long 0x0088++0x03 line.long 0x0 "GICD_IGROUPR2,Interrupt Group Register 2 (Non-secure access)" bitfld.long 0x00 31. " GSB95 ,Group Status Bit 95" "Group 0,Group 1" bitfld.long 0x00 30. " GSB94 ,Group Status Bit 94" "Group 0,Group 1" bitfld.long 0x00 29. " GSB93 ,Group Status Bit 93" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB92 ,Group Status Bit 92" "Group 0,Group 1" bitfld.long 0x00 27. " GSB91 ,Group Status Bit 91" "Group 0,Group 1" bitfld.long 0x00 26. " GSB90 ,Group Status Bit 90" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB89 ,Group Status Bit 89" "Group 0,Group 1" bitfld.long 0x00 24. " GSB88 ,Group Status Bit 88" "Group 0,Group 1" bitfld.long 0x00 23. " GSB87 ,Group Status Bit 87" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB86 ,Group Status Bit 86" "Group 0,Group 1" bitfld.long 0x00 21. " GSB85 ,Group Status Bit 85" "Group 0,Group 1" bitfld.long 0x00 20. " GSB84 ,Group Status Bit 84" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB83 ,Group Status Bit 83" "Group 0,Group 1" bitfld.long 0x00 18. " GSB82 ,Group Status Bit 82" "Group 0,Group 1" bitfld.long 0x00 17. " GSB81 ,Group Status Bit 81" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB80 ,Group Status Bit 80" "Group 0,Group 1" bitfld.long 0x00 15. " GSB79 ,Group Status Bit 79" "Group 0,Group 1" bitfld.long 0x00 14. " GSB78 ,Group Status Bit 78" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB77 ,Group Status Bit 77" "Group 0,Group 1" bitfld.long 0x00 12. " GSB76 ,Group Status Bit 76" "Group 0,Group 1" bitfld.long 0x00 11. " GSB75 ,Group Status Bit 75" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB74 ,Group Status Bit 74" "Group 0,Group 1" bitfld.long 0x00 9. " GSB73 ,Group Status Bit 73" "Group 0,Group 1" bitfld.long 0x00 8. " GSB72 ,Group Status Bit 72" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB71 ,Group Status Bit 71" "Group 0,Group 1" bitfld.long 0x00 6. " GSB70 ,Group Status Bit 70" "Group 0,Group 1" bitfld.long 0x00 5. " GSB69 ,Group Status Bit 69" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB68 ,Group Status Bit 68" "Group 0,Group 1" bitfld.long 0x00 3. " GSB67 ,Group Status Bit 67" "Group 0,Group 1" bitfld.long 0x00 2. " GSB66 ,Group Status Bit 66" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB65 ,Group Status Bit 65" "Group 0,Group 1" bitfld.long 0x00 0. " GSB64 ,Group Status Bit 64" "Group 0,Group 1" else rgroup.long 0x0088++0x03 line.long 0x0 "GICD_IGROUPR2,Interrupt Group Register 2" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x03)&&(PER.ADDRESS.isSECUREEX(ad:0xF9010000+0x008C)) group.long 0x008C++0x03 line.long 0x0 "GICD_IGROUPR3,Interrupt Group Register 3 (Secure access)" bitfld.long 0x00 31. " GSB127 ,Group Status Bit 127" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB126 ,Group Status Bit 126" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB125 ,Group Status Bit 125" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB124 ,Group Status Bit 124" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB123 ,Group Status Bit 123" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB122 ,Group Status Bit 122" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB121 ,Group Status Bit 121" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB120 ,Group Status Bit 120" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB119 ,Group Status Bit 119" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB118 ,Group Status Bit 118" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB117 ,Group Status Bit 117" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB116 ,Group Status Bit 116" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB115 ,Group Status Bit 115" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB114 ,Group Status Bit 114" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB113 ,Group Status Bit 113" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB112 ,Group Status Bit 112" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB111 ,Group Status Bit 111" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB110 ,Group Status Bit 110" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB109 ,Group Status Bit 109" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB108 ,Group Status Bit 108" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB107 ,Group Status Bit 107" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB106 ,Group Status Bit 106" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB105 ,Group Status Bit 105" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB104 ,Group Status Bit 104" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB103 ,Group Status Bit 103" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB102 ,Group Status Bit 102" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB101 ,Group Status Bit 101" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB100 ,Group Status Bit 100" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB99 ,Group Status Bit 99" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB98 ,Group Status Bit 98" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB97 ,Group Status Bit 97" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB96 ,Group Status Bit 96" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x03) group.long 0x008C++0x03 line.long 0x0 "GICD_IGROUPR3,Interrupt Group Register 3 (Non-secure access)" bitfld.long 0x00 31. " GSB127 ,Group Status Bit 127" "Group 0,Group 1" bitfld.long 0x00 30. " GSB126 ,Group Status Bit 126" "Group 0,Group 1" bitfld.long 0x00 29. " GSB125 ,Group Status Bit 125" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB124 ,Group Status Bit 124" "Group 0,Group 1" bitfld.long 0x00 27. " GSB123 ,Group Status Bit 123" "Group 0,Group 1" bitfld.long 0x00 26. " GSB122 ,Group Status Bit 122" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB121 ,Group Status Bit 121" "Group 0,Group 1" bitfld.long 0x00 24. " GSB120 ,Group Status Bit 120" "Group 0,Group 1" bitfld.long 0x00 23. " GSB119 ,Group Status Bit 119" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB118 ,Group Status Bit 118" "Group 0,Group 1" bitfld.long 0x00 21. " GSB117 ,Group Status Bit 117" "Group 0,Group 1" bitfld.long 0x00 20. " GSB116 ,Group Status Bit 116" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB115 ,Group Status Bit 115" "Group 0,Group 1" bitfld.long 0x00 18. " GSB114 ,Group Status Bit 114" "Group 0,Group 1" bitfld.long 0x00 17. " GSB113 ,Group Status Bit 113" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB112 ,Group Status Bit 112" "Group 0,Group 1" bitfld.long 0x00 15. " GSB111 ,Group Status Bit 111" "Group 0,Group 1" bitfld.long 0x00 14. " GSB110 ,Group Status Bit 110" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB109 ,Group Status Bit 109" "Group 0,Group 1" bitfld.long 0x00 12. " GSB108 ,Group Status Bit 108" "Group 0,Group 1" bitfld.long 0x00 11. " GSB107 ,Group Status Bit 107" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB106 ,Group Status Bit 106" "Group 0,Group 1" bitfld.long 0x00 9. " GSB105 ,Group Status Bit 105" "Group 0,Group 1" bitfld.long 0x00 8. " GSB104 ,Group Status Bit 104" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB103 ,Group Status Bit 103" "Group 0,Group 1" bitfld.long 0x00 6. " GSB102 ,Group Status Bit 102" "Group 0,Group 1" bitfld.long 0x00 5. " GSB101 ,Group Status Bit 101" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB100 ,Group Status Bit 100" "Group 0,Group 1" bitfld.long 0x00 3. " GSB99 ,Group Status Bit 99" "Group 0,Group 1" bitfld.long 0x00 2. " GSB98 ,Group Status Bit 98" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB97 ,Group Status Bit 97" "Group 0,Group 1" bitfld.long 0x00 0. " GSB96 ,Group Status Bit 96" "Group 0,Group 1" else rgroup.long 0x008C++0x03 line.long 0x0 "GICD_IGROUPR3,Interrupt Group Register 3" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x04)&&(PER.ADDRESS.isSECUREEX(ad:0xF9010000+0x0090)) group.long 0x0090++0x03 line.long 0x0 "GICD_IGROUPR4,Interrupt Group Register 4 (Secure access)" bitfld.long 0x00 31. " GSB159 ,Group Status Bit 159" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB158 ,Group Status Bit 158" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB157 ,Group Status Bit 157" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB156 ,Group Status Bit 156" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB155 ,Group Status Bit 155" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB154 ,Group Status Bit 154" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB153 ,Group Status Bit 153" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB152 ,Group Status Bit 152" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB151 ,Group Status Bit 151" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB150 ,Group Status Bit 150" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB149 ,Group Status Bit 149" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB148 ,Group Status Bit 148" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB147 ,Group Status Bit 147" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB146 ,Group Status Bit 146" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB145 ,Group Status Bit 145" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB144 ,Group Status Bit 144" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB143 ,Group Status Bit 143" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB142 ,Group Status Bit 142" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB141 ,Group Status Bit 141" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB140 ,Group Status Bit 140" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB139 ,Group Status Bit 139" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB138 ,Group Status Bit 138" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB137 ,Group Status Bit 137" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB136 ,Group Status Bit 136" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB135 ,Group Status Bit 135" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB134 ,Group Status Bit 134" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB133 ,Group Status Bit 133" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB132 ,Group Status Bit 132" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB131 ,Group Status Bit 131" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB130 ,Group Status Bit 130" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB129 ,Group Status Bit 129" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB128 ,Group Status Bit 128" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x04) group.long 0x0090++0x03 line.long 0x0 "GICD_IGROUPR4,Interrupt Group Register 4 (Non-secure access)" bitfld.long 0x00 31. " GSB159 ,Group Status Bit 159" "Group 0,Group 1" bitfld.long 0x00 30. " GSB158 ,Group Status Bit 158" "Group 0,Group 1" bitfld.long 0x00 29. " GSB157 ,Group Status Bit 157" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB156 ,Group Status Bit 156" "Group 0,Group 1" bitfld.long 0x00 27. " GSB155 ,Group Status Bit 155" "Group 0,Group 1" bitfld.long 0x00 26. " GSB154 ,Group Status Bit 154" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB153 ,Group Status Bit 153" "Group 0,Group 1" bitfld.long 0x00 24. " GSB152 ,Group Status Bit 152" "Group 0,Group 1" bitfld.long 0x00 23. " GSB151 ,Group Status Bit 151" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB150 ,Group Status Bit 150" "Group 0,Group 1" bitfld.long 0x00 21. " GSB149 ,Group Status Bit 149" "Group 0,Group 1" bitfld.long 0x00 20. " GSB148 ,Group Status Bit 148" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB147 ,Group Status Bit 147" "Group 0,Group 1" bitfld.long 0x00 18. " GSB146 ,Group Status Bit 146" "Group 0,Group 1" bitfld.long 0x00 17. " GSB145 ,Group Status Bit 145" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB144 ,Group Status Bit 144" "Group 0,Group 1" bitfld.long 0x00 15. " GSB143 ,Group Status Bit 143" "Group 0,Group 1" bitfld.long 0x00 14. " GSB142 ,Group Status Bit 142" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB141 ,Group Status Bit 141" "Group 0,Group 1" bitfld.long 0x00 12. " GSB140 ,Group Status Bit 140" "Group 0,Group 1" bitfld.long 0x00 11. " GSB139 ,Group Status Bit 139" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB138 ,Group Status Bit 138" "Group 0,Group 1" bitfld.long 0x00 9. " GSB137 ,Group Status Bit 137" "Group 0,Group 1" bitfld.long 0x00 8. " GSB136 ,Group Status Bit 136" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB135 ,Group Status Bit 135" "Group 0,Group 1" bitfld.long 0x00 6. " GSB134 ,Group Status Bit 134" "Group 0,Group 1" bitfld.long 0x00 5. " GSB133 ,Group Status Bit 133" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB132 ,Group Status Bit 132" "Group 0,Group 1" bitfld.long 0x00 3. " GSB131 ,Group Status Bit 131" "Group 0,Group 1" bitfld.long 0x00 2. " GSB130 ,Group Status Bit 130" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB129 ,Group Status Bit 129" "Group 0,Group 1" bitfld.long 0x00 0. " GSB128 ,Group Status Bit 128" "Group 0,Group 1" else rgroup.long 0x0090++0x03 line.long 0x0 "GICD_IGROUPR4,Interrupt Group Register 4" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x05)&&(PER.ADDRESS.isSECUREEX(ad:0xF9010000+0x0094)) group.long 0x0094++0x03 line.long 0x0 "GICD_IGROUPR5,Interrupt Group Register 5 (Secure access)" bitfld.long 0x00 31. " GSB191 ,Group Status Bit 191" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB190 ,Group Status Bit 190" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB189 ,Group Status Bit 189" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB188 ,Group Status Bit 188" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB187 ,Group Status Bit 187" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB186 ,Group Status Bit 186" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB185 ,Group Status Bit 185" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB184 ,Group Status Bit 184" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB183 ,Group Status Bit 183" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB182 ,Group Status Bit 182" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB181 ,Group Status Bit 181" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB180 ,Group Status Bit 180" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB179 ,Group Status Bit 179" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB178 ,Group Status Bit 178" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB177 ,Group Status Bit 177" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB176 ,Group Status Bit 176" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB175 ,Group Status Bit 175" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB174 ,Group Status Bit 174" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB173 ,Group Status Bit 173" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB172 ,Group Status Bit 172" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB171 ,Group Status Bit 171" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB170 ,Group Status Bit 170" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB169 ,Group Status Bit 169" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB168 ,Group Status Bit 168" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB167 ,Group Status Bit 167" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB166 ,Group Status Bit 166" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB165 ,Group Status Bit 165" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB164 ,Group Status Bit 164" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB163 ,Group Status Bit 163" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB162 ,Group Status Bit 162" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB161 ,Group Status Bit 161" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB160 ,Group Status Bit 160" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x05) group.long 0x0094++0x03 line.long 0x0 "GICD_IGROUPR5,Interrupt Group Register 5 (Non-secure access)" bitfld.long 0x00 31. " GSB191 ,Group Status Bit 191" "Group 0,Group 1" bitfld.long 0x00 30. " GSB190 ,Group Status Bit 190" "Group 0,Group 1" bitfld.long 0x00 29. " GSB189 ,Group Status Bit 189" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB188 ,Group Status Bit 188" "Group 0,Group 1" bitfld.long 0x00 27. " GSB187 ,Group Status Bit 187" "Group 0,Group 1" bitfld.long 0x00 26. " GSB186 ,Group Status Bit 186" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB185 ,Group Status Bit 185" "Group 0,Group 1" bitfld.long 0x00 24. " GSB184 ,Group Status Bit 184" "Group 0,Group 1" bitfld.long 0x00 23. " GSB183 ,Group Status Bit 183" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB182 ,Group Status Bit 182" "Group 0,Group 1" bitfld.long 0x00 21. " GSB181 ,Group Status Bit 181" "Group 0,Group 1" bitfld.long 0x00 20. " GSB180 ,Group Status Bit 180" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB179 ,Group Status Bit 179" "Group 0,Group 1" bitfld.long 0x00 18. " GSB178 ,Group Status Bit 178" "Group 0,Group 1" bitfld.long 0x00 17. " GSB177 ,Group Status Bit 177" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB176 ,Group Status Bit 176" "Group 0,Group 1" bitfld.long 0x00 15. " GSB175 ,Group Status Bit 175" "Group 0,Group 1" bitfld.long 0x00 14. " GSB174 ,Group Status Bit 174" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB173 ,Group Status Bit 173" "Group 0,Group 1" bitfld.long 0x00 12. " GSB172 ,Group Status Bit 172" "Group 0,Group 1" bitfld.long 0x00 11. " GSB171 ,Group Status Bit 171" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB170 ,Group Status Bit 170" "Group 0,Group 1" bitfld.long 0x00 9. " GSB169 ,Group Status Bit 169" "Group 0,Group 1" bitfld.long 0x00 8. " GSB168 ,Group Status Bit 168" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB167 ,Group Status Bit 167" "Group 0,Group 1" bitfld.long 0x00 6. " GSB166 ,Group Status Bit 166" "Group 0,Group 1" bitfld.long 0x00 5. " GSB165 ,Group Status Bit 165" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB164 ,Group Status Bit 164" "Group 0,Group 1" bitfld.long 0x00 3. " GSB163 ,Group Status Bit 163" "Group 0,Group 1" bitfld.long 0x00 2. " GSB162 ,Group Status Bit 162" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB161 ,Group Status Bit 161" "Group 0,Group 1" bitfld.long 0x00 0. " GSB160 ,Group Status Bit 160" "Group 0,Group 1" else rgroup.long 0x0094++0x03 line.long 0x0 "GICD_IGROUPR5,Interrupt Group Register 5" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x06)&&(PER.ADDRESS.isSECUREEX(ad:0xF9010000+0x0098)) group.long 0x0098++0x03 line.long 0x0 "GICD_IGROUPR6,Interrupt Group Register 6 (Secure access)" bitfld.long 0x00 31. " GSB223 ,Group Status Bit 223" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB222 ,Group Status Bit 222" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB221 ,Group Status Bit 221" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB220 ,Group Status Bit 220" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB219 ,Group Status Bit 219" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB218 ,Group Status Bit 218" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB217 ,Group Status Bit 217" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB216 ,Group Status Bit 216" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB215 ,Group Status Bit 215" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB214 ,Group Status Bit 214" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB213 ,Group Status Bit 213" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB212 ,Group Status Bit 212" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB211 ,Group Status Bit 211" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB210 ,Group Status Bit 210" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB209 ,Group Status Bit 209" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB208 ,Group Status Bit 208" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB207 ,Group Status Bit 207" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB206 ,Group Status Bit 206" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB205 ,Group Status Bit 205" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB204 ,Group Status Bit 204" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB203 ,Group Status Bit 203" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB202 ,Group Status Bit 202" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB201 ,Group Status Bit 201" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB200 ,Group Status Bit 200" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB199 ,Group Status Bit 199" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB198 ,Group Status Bit 198" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB197 ,Group Status Bit 197" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB196 ,Group Status Bit 196" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB195 ,Group Status Bit 195" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB194 ,Group Status Bit 194" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB193 ,Group Status Bit 193" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB192 ,Group Status Bit 192" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x06) group.long 0x0098++0x03 line.long 0x0 "GICD_IGROUPR6,Interrupt Group Register 6 (Non-secure access)" bitfld.long 0x00 31. " GSB223 ,Group Status Bit 223" "Group 0,Group 1" bitfld.long 0x00 30. " GSB222 ,Group Status Bit 222" "Group 0,Group 1" bitfld.long 0x00 29. " GSB221 ,Group Status Bit 221" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB220 ,Group Status Bit 220" "Group 0,Group 1" bitfld.long 0x00 27. " GSB219 ,Group Status Bit 219" "Group 0,Group 1" bitfld.long 0x00 26. " GSB218 ,Group Status Bit 218" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB217 ,Group Status Bit 217" "Group 0,Group 1" bitfld.long 0x00 24. " GSB216 ,Group Status Bit 216" "Group 0,Group 1" bitfld.long 0x00 23. " GSB215 ,Group Status Bit 215" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB214 ,Group Status Bit 214" "Group 0,Group 1" bitfld.long 0x00 21. " GSB213 ,Group Status Bit 213" "Group 0,Group 1" bitfld.long 0x00 20. " GSB212 ,Group Status Bit 212" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB211 ,Group Status Bit 211" "Group 0,Group 1" bitfld.long 0x00 18. " GSB210 ,Group Status Bit 210" "Group 0,Group 1" bitfld.long 0x00 17. " GSB209 ,Group Status Bit 209" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB208 ,Group Status Bit 208" "Group 0,Group 1" bitfld.long 0x00 15. " GSB207 ,Group Status Bit 207" "Group 0,Group 1" bitfld.long 0x00 14. " GSB206 ,Group Status Bit 206" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB205 ,Group Status Bit 205" "Group 0,Group 1" bitfld.long 0x00 12. " GSB204 ,Group Status Bit 204" "Group 0,Group 1" bitfld.long 0x00 11. " GSB203 ,Group Status Bit 203" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB202 ,Group Status Bit 202" "Group 0,Group 1" bitfld.long 0x00 9. " GSB201 ,Group Status Bit 201" "Group 0,Group 1" bitfld.long 0x00 8. " GSB200 ,Group Status Bit 200" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB199 ,Group Status Bit 199" "Group 0,Group 1" bitfld.long 0x00 6. " GSB198 ,Group Status Bit 198" "Group 0,Group 1" bitfld.long 0x00 5. " GSB197 ,Group Status Bit 197" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB196 ,Group Status Bit 196" "Group 0,Group 1" bitfld.long 0x00 3. " GSB195 ,Group Status Bit 195" "Group 0,Group 1" bitfld.long 0x00 2. " GSB194 ,Group Status Bit 194" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB193 ,Group Status Bit 193" "Group 0,Group 1" bitfld.long 0x00 0. " GSB192 ,Group Status Bit 192" "Group 0,Group 1" else rgroup.long 0x0098++0x03 line.long 0x0 "GICD_IGROUPR6,Interrupt Group Register 6" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x07)&&(PER.ADDRESS.isSECUREEX(ad:0xF9010000+0x009C)) group.long 0x009C++0x03 line.long 0x0 "GICD_IGROUPR7,Interrupt Group Register 7 (Secure access)" bitfld.long 0x00 31. " GSB255 ,Group Status Bit 255" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB254 ,Group Status Bit 254" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB253 ,Group Status Bit 253" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB252 ,Group Status Bit 252" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB251 ,Group Status Bit 251" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB250 ,Group Status Bit 250" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB249 ,Group Status Bit 249" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB248 ,Group Status Bit 248" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB247 ,Group Status Bit 247" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB246 ,Group Status Bit 246" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB245 ,Group Status Bit 245" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB244 ,Group Status Bit 244" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB243 ,Group Status Bit 243" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB242 ,Group Status Bit 242" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB241 ,Group Status Bit 241" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB240 ,Group Status Bit 240" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB239 ,Group Status Bit 239" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB238 ,Group Status Bit 238" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB237 ,Group Status Bit 237" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB236 ,Group Status Bit 236" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB235 ,Group Status Bit 235" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB234 ,Group Status Bit 234" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB233 ,Group Status Bit 233" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB232 ,Group Status Bit 232" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB231 ,Group Status Bit 231" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB230 ,Group Status Bit 230" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB229 ,Group Status Bit 229" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB228 ,Group Status Bit 228" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB227 ,Group Status Bit 227" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB226 ,Group Status Bit 226" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB225 ,Group Status Bit 225" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB224 ,Group Status Bit 224" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x07) group.long 0x009C++0x03 line.long 0x0 "GICD_IGROUPR7,Interrupt Group Register 7 (Non-secure access)" bitfld.long 0x00 31. " GSB255 ,Group Status Bit 255" "Group 0,Group 1" bitfld.long 0x00 30. " GSB254 ,Group Status Bit 254" "Group 0,Group 1" bitfld.long 0x00 29. " GSB253 ,Group Status Bit 253" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB252 ,Group Status Bit 252" "Group 0,Group 1" bitfld.long 0x00 27. " GSB251 ,Group Status Bit 251" "Group 0,Group 1" bitfld.long 0x00 26. " GSB250 ,Group Status Bit 250" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB249 ,Group Status Bit 249" "Group 0,Group 1" bitfld.long 0x00 24. " GSB248 ,Group Status Bit 248" "Group 0,Group 1" bitfld.long 0x00 23. " GSB247 ,Group Status Bit 247" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB246 ,Group Status Bit 246" "Group 0,Group 1" bitfld.long 0x00 21. " GSB245 ,Group Status Bit 245" "Group 0,Group 1" bitfld.long 0x00 20. " GSB244 ,Group Status Bit 244" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB243 ,Group Status Bit 243" "Group 0,Group 1" bitfld.long 0x00 18. " GSB242 ,Group Status Bit 242" "Group 0,Group 1" bitfld.long 0x00 17. " GSB241 ,Group Status Bit 241" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB240 ,Group Status Bit 240" "Group 0,Group 1" bitfld.long 0x00 15. " GSB239 ,Group Status Bit 239" "Group 0,Group 1" bitfld.long 0x00 14. " GSB238 ,Group Status Bit 238" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB237 ,Group Status Bit 237" "Group 0,Group 1" bitfld.long 0x00 12. " GSB236 ,Group Status Bit 236" "Group 0,Group 1" bitfld.long 0x00 11. " GSB235 ,Group Status Bit 235" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB234 ,Group Status Bit 234" "Group 0,Group 1" bitfld.long 0x00 9. " GSB233 ,Group Status Bit 233" "Group 0,Group 1" bitfld.long 0x00 8. " GSB232 ,Group Status Bit 232" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB231 ,Group Status Bit 231" "Group 0,Group 1" bitfld.long 0x00 6. " GSB230 ,Group Status Bit 230" "Group 0,Group 1" bitfld.long 0x00 5. " GSB229 ,Group Status Bit 229" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB228 ,Group Status Bit 228" "Group 0,Group 1" bitfld.long 0x00 3. " GSB227 ,Group Status Bit 227" "Group 0,Group 1" bitfld.long 0x00 2. " GSB226 ,Group Status Bit 226" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB225 ,Group Status Bit 225" "Group 0,Group 1" bitfld.long 0x00 0. " GSB224 ,Group Status Bit 224" "Group 0,Group 1" else rgroup.long 0x009C++0x03 line.long 0x0 "GICD_IGROUPR7,Interrupt Group Register 7" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x08)&&(PER.ADDRESS.isSECUREEX(ad:0xF9010000+0x00A0)) group.long 0x00A0++0x03 line.long 0x0 "GICD_IGROUPR8,Interrupt Group Register 8 (Secure access)" bitfld.long 0x00 31. " GSB287 ,Group Status Bit 287" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB286 ,Group Status Bit 286" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB285 ,Group Status Bit 285" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB284 ,Group Status Bit 284" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB283 ,Group Status Bit 283" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB282 ,Group Status Bit 282" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB281 ,Group Status Bit 281" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB280 ,Group Status Bit 280" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB279 ,Group Status Bit 279" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB278 ,Group Status Bit 278" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB277 ,Group Status Bit 277" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB276 ,Group Status Bit 276" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB275 ,Group Status Bit 275" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB274 ,Group Status Bit 274" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB273 ,Group Status Bit 273" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB272 ,Group Status Bit 272" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB271 ,Group Status Bit 271" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB270 ,Group Status Bit 270" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB269 ,Group Status Bit 269" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB268 ,Group Status Bit 268" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB267 ,Group Status Bit 267" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB266 ,Group Status Bit 266" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB265 ,Group Status Bit 265" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB264 ,Group Status Bit 264" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB263 ,Group Status Bit 263" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB262 ,Group Status Bit 262" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB261 ,Group Status Bit 261" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB260 ,Group Status Bit 260" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB259 ,Group Status Bit 259" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB258 ,Group Status Bit 258" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB257 ,Group Status Bit 257" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB256 ,Group Status Bit 256" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x08) group.long 0x00A0++0x03 line.long 0x0 "GICD_IGROUPR8,Interrupt Group Register 8 (Non-secure access)" bitfld.long 0x00 31. " GSB287 ,Group Status Bit 287" "Group 0,Group 1" bitfld.long 0x00 30. " GSB286 ,Group Status Bit 286" "Group 0,Group 1" bitfld.long 0x00 29. " GSB285 ,Group Status Bit 285" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB284 ,Group Status Bit 284" "Group 0,Group 1" bitfld.long 0x00 27. " GSB283 ,Group Status Bit 283" "Group 0,Group 1" bitfld.long 0x00 26. " GSB282 ,Group Status Bit 282" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB281 ,Group Status Bit 281" "Group 0,Group 1" bitfld.long 0x00 24. " GSB280 ,Group Status Bit 280" "Group 0,Group 1" bitfld.long 0x00 23. " GSB279 ,Group Status Bit 279" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB278 ,Group Status Bit 278" "Group 0,Group 1" bitfld.long 0x00 21. " GSB277 ,Group Status Bit 277" "Group 0,Group 1" bitfld.long 0x00 20. " GSB276 ,Group Status Bit 276" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB275 ,Group Status Bit 275" "Group 0,Group 1" bitfld.long 0x00 18. " GSB274 ,Group Status Bit 274" "Group 0,Group 1" bitfld.long 0x00 17. " GSB273 ,Group Status Bit 273" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB272 ,Group Status Bit 272" "Group 0,Group 1" bitfld.long 0x00 15. " GSB271 ,Group Status Bit 271" "Group 0,Group 1" bitfld.long 0x00 14. " GSB270 ,Group Status Bit 270" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB269 ,Group Status Bit 269" "Group 0,Group 1" bitfld.long 0x00 12. " GSB268 ,Group Status Bit 268" "Group 0,Group 1" bitfld.long 0x00 11. " GSB267 ,Group Status Bit 267" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB266 ,Group Status Bit 266" "Group 0,Group 1" bitfld.long 0x00 9. " GSB265 ,Group Status Bit 265" "Group 0,Group 1" bitfld.long 0x00 8. " GSB264 ,Group Status Bit 264" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB263 ,Group Status Bit 263" "Group 0,Group 1" bitfld.long 0x00 6. " GSB262 ,Group Status Bit 262" "Group 0,Group 1" bitfld.long 0x00 5. " GSB261 ,Group Status Bit 261" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB260 ,Group Status Bit 260" "Group 0,Group 1" bitfld.long 0x00 3. " GSB259 ,Group Status Bit 259" "Group 0,Group 1" bitfld.long 0x00 2. " GSB258 ,Group Status Bit 258" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB257 ,Group Status Bit 257" "Group 0,Group 1" bitfld.long 0x00 0. " GSB256 ,Group Status Bit 256" "Group 0,Group 1" else rgroup.long 0x00A0++0x03 line.long 0x0 "GICD_IGROUPR8,Interrupt Group Register 8" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x09)&&(PER.ADDRESS.isSECUREEX(ad:0xF9010000+0x00A4)) group.long 0x00A4++0x03 line.long 0x0 "GICD_IGROUPR9,Interrupt Group Register 9 (Secure access)" bitfld.long 0x00 31. " GSB319 ,Group Status Bit 319" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB318 ,Group Status Bit 318" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB317 ,Group Status Bit 317" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB316 ,Group Status Bit 316" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB315 ,Group Status Bit 315" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB314 ,Group Status Bit 314" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB313 ,Group Status Bit 313" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB312 ,Group Status Bit 312" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB311 ,Group Status Bit 311" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB310 ,Group Status Bit 310" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB309 ,Group Status Bit 309" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB308 ,Group Status Bit 308" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB307 ,Group Status Bit 307" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB306 ,Group Status Bit 306" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB305 ,Group Status Bit 305" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB304 ,Group Status Bit 304" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB303 ,Group Status Bit 303" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB302 ,Group Status Bit 302" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB301 ,Group Status Bit 301" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB300 ,Group Status Bit 300" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB299 ,Group Status Bit 299" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB298 ,Group Status Bit 298" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB297 ,Group Status Bit 297" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB296 ,Group Status Bit 296" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB295 ,Group Status Bit 295" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB294 ,Group Status Bit 294" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB293 ,Group Status Bit 293" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB292 ,Group Status Bit 292" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB291 ,Group Status Bit 291" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB290 ,Group Status Bit 290" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB289 ,Group Status Bit 289" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB288 ,Group Status Bit 288" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x09) group.long 0x00A4++0x03 line.long 0x0 "GICD_IGROUPR9,Interrupt Group Register 9 (Non-secure access)" bitfld.long 0x00 31. " GSB319 ,Group Status Bit 319" "Group 0,Group 1" bitfld.long 0x00 30. " GSB318 ,Group Status Bit 318" "Group 0,Group 1" bitfld.long 0x00 29. " GSB317 ,Group Status Bit 317" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB316 ,Group Status Bit 316" "Group 0,Group 1" bitfld.long 0x00 27. " GSB315 ,Group Status Bit 315" "Group 0,Group 1" bitfld.long 0x00 26. " GSB314 ,Group Status Bit 314" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB313 ,Group Status Bit 313" "Group 0,Group 1" bitfld.long 0x00 24. " GSB312 ,Group Status Bit 312" "Group 0,Group 1" bitfld.long 0x00 23. " GSB311 ,Group Status Bit 311" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB310 ,Group Status Bit 310" "Group 0,Group 1" bitfld.long 0x00 21. " GSB309 ,Group Status Bit 309" "Group 0,Group 1" bitfld.long 0x00 20. " GSB308 ,Group Status Bit 308" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB307 ,Group Status Bit 307" "Group 0,Group 1" bitfld.long 0x00 18. " GSB306 ,Group Status Bit 306" "Group 0,Group 1" bitfld.long 0x00 17. " GSB305 ,Group Status Bit 305" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB304 ,Group Status Bit 304" "Group 0,Group 1" bitfld.long 0x00 15. " GSB303 ,Group Status Bit 303" "Group 0,Group 1" bitfld.long 0x00 14. " GSB302 ,Group Status Bit 302" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB301 ,Group Status Bit 301" "Group 0,Group 1" bitfld.long 0x00 12. " GSB300 ,Group Status Bit 300" "Group 0,Group 1" bitfld.long 0x00 11. " GSB299 ,Group Status Bit 299" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB298 ,Group Status Bit 298" "Group 0,Group 1" bitfld.long 0x00 9. " GSB297 ,Group Status Bit 297" "Group 0,Group 1" bitfld.long 0x00 8. " GSB296 ,Group Status Bit 296" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB295 ,Group Status Bit 295" "Group 0,Group 1" bitfld.long 0x00 6. " GSB294 ,Group Status Bit 294" "Group 0,Group 1" bitfld.long 0x00 5. " GSB293 ,Group Status Bit 293" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB292 ,Group Status Bit 292" "Group 0,Group 1" bitfld.long 0x00 3. " GSB291 ,Group Status Bit 291" "Group 0,Group 1" bitfld.long 0x00 2. " GSB290 ,Group Status Bit 290" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB289 ,Group Status Bit 289" "Group 0,Group 1" bitfld.long 0x00 0. " GSB288 ,Group Status Bit 288" "Group 0,Group 1" else rgroup.long 0x00A4++0x03 line.long 0x0 "GICD_IGROUPR9,Interrupt Group Register 9" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x0A)&&(PER.ADDRESS.isSECUREEX(ad:0xF9010000+0x00A8)) group.long 0x00A8++0x03 line.long 0x0 "GICD_IGROUPR10,Interrupt Group Register 10 (Secure access)" bitfld.long 0x00 31. " GSB351 ,Group Status Bit 351" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB350 ,Group Status Bit 350" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB349 ,Group Status Bit 349" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB348 ,Group Status Bit 348" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB347 ,Group Status Bit 347" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB346 ,Group Status Bit 346" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB345 ,Group Status Bit 345" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB344 ,Group Status Bit 344" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB343 ,Group Status Bit 343" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB342 ,Group Status Bit 342" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB341 ,Group Status Bit 341" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB340 ,Group Status Bit 340" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB339 ,Group Status Bit 339" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB338 ,Group Status Bit 338" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB337 ,Group Status Bit 337" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB336 ,Group Status Bit 336" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB335 ,Group Status Bit 335" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB334 ,Group Status Bit 334" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB333 ,Group Status Bit 333" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB332 ,Group Status Bit 332" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB331 ,Group Status Bit 331" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB330 ,Group Status Bit 330" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB329 ,Group Status Bit 329" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB328 ,Group Status Bit 328" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB327 ,Group Status Bit 327" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB326 ,Group Status Bit 326" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB325 ,Group Status Bit 325" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB324 ,Group Status Bit 324" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB323 ,Group Status Bit 323" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB322 ,Group Status Bit 322" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB321 ,Group Status Bit 321" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB320 ,Group Status Bit 320" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x0A) group.long 0x00A8++0x03 line.long 0x0 "GICD_IGROUPR10,Interrupt Group Register 10 (Non-secure access)" bitfld.long 0x00 31. " GSB351 ,Group Status Bit 351" "Group 0,Group 1" bitfld.long 0x00 30. " GSB350 ,Group Status Bit 350" "Group 0,Group 1" bitfld.long 0x00 29. " GSB349 ,Group Status Bit 349" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB348 ,Group Status Bit 348" "Group 0,Group 1" bitfld.long 0x00 27. " GSB347 ,Group Status Bit 347" "Group 0,Group 1" bitfld.long 0x00 26. " GSB346 ,Group Status Bit 346" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB345 ,Group Status Bit 345" "Group 0,Group 1" bitfld.long 0x00 24. " GSB344 ,Group Status Bit 344" "Group 0,Group 1" bitfld.long 0x00 23. " GSB343 ,Group Status Bit 343" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB342 ,Group Status Bit 342" "Group 0,Group 1" bitfld.long 0x00 21. " GSB341 ,Group Status Bit 341" "Group 0,Group 1" bitfld.long 0x00 20. " GSB340 ,Group Status Bit 340" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB339 ,Group Status Bit 339" "Group 0,Group 1" bitfld.long 0x00 18. " GSB338 ,Group Status Bit 338" "Group 0,Group 1" bitfld.long 0x00 17. " GSB337 ,Group Status Bit 337" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB336 ,Group Status Bit 336" "Group 0,Group 1" bitfld.long 0x00 15. " GSB335 ,Group Status Bit 335" "Group 0,Group 1" bitfld.long 0x00 14. " GSB334 ,Group Status Bit 334" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB333 ,Group Status Bit 333" "Group 0,Group 1" bitfld.long 0x00 12. " GSB332 ,Group Status Bit 332" "Group 0,Group 1" bitfld.long 0x00 11. " GSB331 ,Group Status Bit 331" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB330 ,Group Status Bit 330" "Group 0,Group 1" bitfld.long 0x00 9. " GSB329 ,Group Status Bit 329" "Group 0,Group 1" bitfld.long 0x00 8. " GSB328 ,Group Status Bit 328" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB327 ,Group Status Bit 327" "Group 0,Group 1" bitfld.long 0x00 6. " GSB326 ,Group Status Bit 326" "Group 0,Group 1" bitfld.long 0x00 5. " GSB325 ,Group Status Bit 325" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB324 ,Group Status Bit 324" "Group 0,Group 1" bitfld.long 0x00 3. " GSB323 ,Group Status Bit 323" "Group 0,Group 1" bitfld.long 0x00 2. " GSB322 ,Group Status Bit 322" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB321 ,Group Status Bit 321" "Group 0,Group 1" bitfld.long 0x00 0. " GSB320 ,Group Status Bit 320" "Group 0,Group 1" else rgroup.long 0x00A8++0x03 line.long 0x0 "GICD_IGROUPR10,Interrupt Group Register 10" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x0B)&&(PER.ADDRESS.isSECUREEX(ad:0xF9010000+0x00AC)) group.long 0x00AC++0x03 line.long 0x0 "GICD_IGROUPR11,Interrupt Group Register 11 (Secure access)" bitfld.long 0x00 31. " GSB383 ,Group Status Bit 383" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB382 ,Group Status Bit 382" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB381 ,Group Status Bit 381" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB380 ,Group Status Bit 380" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB379 ,Group Status Bit 379" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB378 ,Group Status Bit 378" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB377 ,Group Status Bit 377" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB376 ,Group Status Bit 376" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB375 ,Group Status Bit 375" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB374 ,Group Status Bit 374" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB373 ,Group Status Bit 373" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB372 ,Group Status Bit 372" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB371 ,Group Status Bit 371" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB370 ,Group Status Bit 370" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB369 ,Group Status Bit 369" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB368 ,Group Status Bit 368" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB367 ,Group Status Bit 367" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB366 ,Group Status Bit 366" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB365 ,Group Status Bit 365" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB364 ,Group Status Bit 364" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB363 ,Group Status Bit 363" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB362 ,Group Status Bit 362" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB361 ,Group Status Bit 361" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB360 ,Group Status Bit 360" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB359 ,Group Status Bit 359" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB358 ,Group Status Bit 358" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB357 ,Group Status Bit 357" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB356 ,Group Status Bit 356" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB355 ,Group Status Bit 355" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB354 ,Group Status Bit 354" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB353 ,Group Status Bit 353" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB352 ,Group Status Bit 352" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x0B) group.long 0x00AC++0x03 line.long 0x0 "GICD_IGROUPR11,Interrupt Group Register 11 (Non-secure access)" bitfld.long 0x00 31. " GSB383 ,Group Status Bit 383" "Group 0,Group 1" bitfld.long 0x00 30. " GSB382 ,Group Status Bit 382" "Group 0,Group 1" bitfld.long 0x00 29. " GSB381 ,Group Status Bit 381" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB380 ,Group Status Bit 380" "Group 0,Group 1" bitfld.long 0x00 27. " GSB379 ,Group Status Bit 379" "Group 0,Group 1" bitfld.long 0x00 26. " GSB378 ,Group Status Bit 378" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB377 ,Group Status Bit 377" "Group 0,Group 1" bitfld.long 0x00 24. " GSB376 ,Group Status Bit 376" "Group 0,Group 1" bitfld.long 0x00 23. " GSB375 ,Group Status Bit 375" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB374 ,Group Status Bit 374" "Group 0,Group 1" bitfld.long 0x00 21. " GSB373 ,Group Status Bit 373" "Group 0,Group 1" bitfld.long 0x00 20. " GSB372 ,Group Status Bit 372" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB371 ,Group Status Bit 371" "Group 0,Group 1" bitfld.long 0x00 18. " GSB370 ,Group Status Bit 370" "Group 0,Group 1" bitfld.long 0x00 17. " GSB369 ,Group Status Bit 369" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB368 ,Group Status Bit 368" "Group 0,Group 1" bitfld.long 0x00 15. " GSB367 ,Group Status Bit 367" "Group 0,Group 1" bitfld.long 0x00 14. " GSB366 ,Group Status Bit 366" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB365 ,Group Status Bit 365" "Group 0,Group 1" bitfld.long 0x00 12. " GSB364 ,Group Status Bit 364" "Group 0,Group 1" bitfld.long 0x00 11. " GSB363 ,Group Status Bit 363" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB362 ,Group Status Bit 362" "Group 0,Group 1" bitfld.long 0x00 9. " GSB361 ,Group Status Bit 361" "Group 0,Group 1" bitfld.long 0x00 8. " GSB360 ,Group Status Bit 360" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB359 ,Group Status Bit 359" "Group 0,Group 1" bitfld.long 0x00 6. " GSB358 ,Group Status Bit 358" "Group 0,Group 1" bitfld.long 0x00 5. " GSB357 ,Group Status Bit 357" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB356 ,Group Status Bit 356" "Group 0,Group 1" bitfld.long 0x00 3. " GSB355 ,Group Status Bit 355" "Group 0,Group 1" bitfld.long 0x00 2. " GSB354 ,Group Status Bit 354" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB353 ,Group Status Bit 353" "Group 0,Group 1" bitfld.long 0x00 0. " GSB352 ,Group Status Bit 352" "Group 0,Group 1" else rgroup.long 0x00AC++0x03 line.long 0x0 "GICD_IGROUPR11,Interrupt Group Register 11" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x0C)&&(PER.ADDRESS.isSECUREEX(ad:0xF9010000+0x00B0)) group.long 0x00B0++0x03 line.long 0x0 "GICD_IGROUPR12,Interrupt Group Register 12 (Secure access)" bitfld.long 0x00 31. " GSB415 ,Group Status Bit 415" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB414 ,Group Status Bit 414" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB413 ,Group Status Bit 413" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB412 ,Group Status Bit 412" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB411 ,Group Status Bit 411" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB410 ,Group Status Bit 410" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB409 ,Group Status Bit 409" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB408 ,Group Status Bit 408" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB407 ,Group Status Bit 407" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB406 ,Group Status Bit 406" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB405 ,Group Status Bit 405" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB404 ,Group Status Bit 404" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB403 ,Group Status Bit 403" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB402 ,Group Status Bit 402" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB401 ,Group Status Bit 401" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB400 ,Group Status Bit 400" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB399 ,Group Status Bit 399" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB398 ,Group Status Bit 398" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB397 ,Group Status Bit 397" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB396 ,Group Status Bit 396" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB395 ,Group Status Bit 395" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB394 ,Group Status Bit 394" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB393 ,Group Status Bit 393" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB392 ,Group Status Bit 392" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB391 ,Group Status Bit 391" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB390 ,Group Status Bit 390" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB389 ,Group Status Bit 389" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB388 ,Group Status Bit 388" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB387 ,Group Status Bit 387" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB386 ,Group Status Bit 386" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB385 ,Group Status Bit 385" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB384 ,Group Status Bit 384" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x0C) group.long 0x00B0++0x03 line.long 0x0 "GICD_IGROUPR12,Interrupt Group Register 12 (Non-secure access)" bitfld.long 0x00 31. " GSB415 ,Group Status Bit 415" "Group 0,Group 1" bitfld.long 0x00 30. " GSB414 ,Group Status Bit 414" "Group 0,Group 1" bitfld.long 0x00 29. " GSB413 ,Group Status Bit 413" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB412 ,Group Status Bit 412" "Group 0,Group 1" bitfld.long 0x00 27. " GSB411 ,Group Status Bit 411" "Group 0,Group 1" bitfld.long 0x00 26. " GSB410 ,Group Status Bit 410" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB409 ,Group Status Bit 409" "Group 0,Group 1" bitfld.long 0x00 24. " GSB408 ,Group Status Bit 408" "Group 0,Group 1" bitfld.long 0x00 23. " GSB407 ,Group Status Bit 407" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB406 ,Group Status Bit 406" "Group 0,Group 1" bitfld.long 0x00 21. " GSB405 ,Group Status Bit 405" "Group 0,Group 1" bitfld.long 0x00 20. " GSB404 ,Group Status Bit 404" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB403 ,Group Status Bit 403" "Group 0,Group 1" bitfld.long 0x00 18. " GSB402 ,Group Status Bit 402" "Group 0,Group 1" bitfld.long 0x00 17. " GSB401 ,Group Status Bit 401" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB400 ,Group Status Bit 400" "Group 0,Group 1" bitfld.long 0x00 15. " GSB399 ,Group Status Bit 399" "Group 0,Group 1" bitfld.long 0x00 14. " GSB398 ,Group Status Bit 398" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB397 ,Group Status Bit 397" "Group 0,Group 1" bitfld.long 0x00 12. " GSB396 ,Group Status Bit 396" "Group 0,Group 1" bitfld.long 0x00 11. " GSB395 ,Group Status Bit 395" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB394 ,Group Status Bit 394" "Group 0,Group 1" bitfld.long 0x00 9. " GSB393 ,Group Status Bit 393" "Group 0,Group 1" bitfld.long 0x00 8. " GSB392 ,Group Status Bit 392" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB391 ,Group Status Bit 391" "Group 0,Group 1" bitfld.long 0x00 6. " GSB390 ,Group Status Bit 390" "Group 0,Group 1" bitfld.long 0x00 5. " GSB389 ,Group Status Bit 389" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB388 ,Group Status Bit 388" "Group 0,Group 1" bitfld.long 0x00 3. " GSB387 ,Group Status Bit 387" "Group 0,Group 1" bitfld.long 0x00 2. " GSB386 ,Group Status Bit 386" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB385 ,Group Status Bit 385" "Group 0,Group 1" bitfld.long 0x00 0. " GSB384 ,Group Status Bit 384" "Group 0,Group 1" else rgroup.long 0x00B0++0x03 line.long 0x0 "GICD_IGROUPR12,Interrupt Group Register 12" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x0D)&&(PER.ADDRESS.isSECUREEX(ad:0xF9010000+0x00B4)) group.long 0x00B4++0x03 line.long 0x0 "GICD_IGROUPR13,Interrupt Group Register 13 (Secure access)" bitfld.long 0x00 31. " GSB447 ,Group Status Bit 447" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB446 ,Group Status Bit 446" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB445 ,Group Status Bit 445" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB444 ,Group Status Bit 444" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB443 ,Group Status Bit 443" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB442 ,Group Status Bit 442" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB441 ,Group Status Bit 441" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB440 ,Group Status Bit 440" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB439 ,Group Status Bit 439" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB438 ,Group Status Bit 438" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB437 ,Group Status Bit 437" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB436 ,Group Status Bit 436" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB435 ,Group Status Bit 435" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB434 ,Group Status Bit 434" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB433 ,Group Status Bit 433" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB432 ,Group Status Bit 432" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB431 ,Group Status Bit 431" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB430 ,Group Status Bit 430" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB429 ,Group Status Bit 429" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB428 ,Group Status Bit 428" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB427 ,Group Status Bit 427" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB426 ,Group Status Bit 426" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB425 ,Group Status Bit 425" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB424 ,Group Status Bit 424" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB423 ,Group Status Bit 423" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB422 ,Group Status Bit 422" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB421 ,Group Status Bit 421" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB420 ,Group Status Bit 420" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB419 ,Group Status Bit 419" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB418 ,Group Status Bit 418" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB417 ,Group Status Bit 417" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB416 ,Group Status Bit 416" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x0D) group.long 0x00B4++0x03 line.long 0x0 "GICD_IGROUPR13,Interrupt Group Register 13 (Non-secure access)" bitfld.long 0x00 31. " GSB447 ,Group Status Bit 447" "Group 0,Group 1" bitfld.long 0x00 30. " GSB446 ,Group Status Bit 446" "Group 0,Group 1" bitfld.long 0x00 29. " GSB445 ,Group Status Bit 445" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB444 ,Group Status Bit 444" "Group 0,Group 1" bitfld.long 0x00 27. " GSB443 ,Group Status Bit 443" "Group 0,Group 1" bitfld.long 0x00 26. " GSB442 ,Group Status Bit 442" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB441 ,Group Status Bit 441" "Group 0,Group 1" bitfld.long 0x00 24. " GSB440 ,Group Status Bit 440" "Group 0,Group 1" bitfld.long 0x00 23. " GSB439 ,Group Status Bit 439" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB438 ,Group Status Bit 438" "Group 0,Group 1" bitfld.long 0x00 21. " GSB437 ,Group Status Bit 437" "Group 0,Group 1" bitfld.long 0x00 20. " GSB436 ,Group Status Bit 436" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB435 ,Group Status Bit 435" "Group 0,Group 1" bitfld.long 0x00 18. " GSB434 ,Group Status Bit 434" "Group 0,Group 1" bitfld.long 0x00 17. " GSB433 ,Group Status Bit 433" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB432 ,Group Status Bit 432" "Group 0,Group 1" bitfld.long 0x00 15. " GSB431 ,Group Status Bit 431" "Group 0,Group 1" bitfld.long 0x00 14. " GSB430 ,Group Status Bit 430" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB429 ,Group Status Bit 429" "Group 0,Group 1" bitfld.long 0x00 12. " GSB428 ,Group Status Bit 428" "Group 0,Group 1" bitfld.long 0x00 11. " GSB427 ,Group Status Bit 427" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB426 ,Group Status Bit 426" "Group 0,Group 1" bitfld.long 0x00 9. " GSB425 ,Group Status Bit 425" "Group 0,Group 1" bitfld.long 0x00 8. " GSB424 ,Group Status Bit 424" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB423 ,Group Status Bit 423" "Group 0,Group 1" bitfld.long 0x00 6. " GSB422 ,Group Status Bit 422" "Group 0,Group 1" bitfld.long 0x00 5. " GSB421 ,Group Status Bit 421" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB420 ,Group Status Bit 420" "Group 0,Group 1" bitfld.long 0x00 3. " GSB419 ,Group Status Bit 419" "Group 0,Group 1" bitfld.long 0x00 2. " GSB418 ,Group Status Bit 418" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB417 ,Group Status Bit 417" "Group 0,Group 1" bitfld.long 0x00 0. " GSB416 ,Group Status Bit 416" "Group 0,Group 1" else rgroup.long 0x00B4++0x03 line.long 0x0 "GICD_IGROUPR13,Interrupt Group Register 13" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x0E)&&(PER.ADDRESS.isSECUREEX(ad:0xF9010000+0x00B8)) group.long 0x00B8++0x03 line.long 0x0 "GICD_IGROUPR14,Interrupt Group Register 14 (Secure access)" bitfld.long 0x00 31. " GSB479 ,Group Status Bit 479" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB478 ,Group Status Bit 478" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB477 ,Group Status Bit 477" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB476 ,Group Status Bit 476" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB475 ,Group Status Bit 475" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB474 ,Group Status Bit 474" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB473 ,Group Status Bit 473" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB472 ,Group Status Bit 472" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB471 ,Group Status Bit 471" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB470 ,Group Status Bit 470" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB469 ,Group Status Bit 469" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB468 ,Group Status Bit 468" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB467 ,Group Status Bit 467" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB466 ,Group Status Bit 466" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB465 ,Group Status Bit 465" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB464 ,Group Status Bit 464" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB463 ,Group Status Bit 463" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB462 ,Group Status Bit 462" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB461 ,Group Status Bit 461" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB460 ,Group Status Bit 460" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB459 ,Group Status Bit 459" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB458 ,Group Status Bit 458" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB457 ,Group Status Bit 457" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB456 ,Group Status Bit 456" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB455 ,Group Status Bit 455" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB454 ,Group Status Bit 454" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB453 ,Group Status Bit 453" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB452 ,Group Status Bit 452" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB451 ,Group Status Bit 451" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB450 ,Group Status Bit 450" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB449 ,Group Status Bit 449" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB448 ,Group Status Bit 448" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x0E) group.long 0x00B8++0x03 line.long 0x0 "GICD_IGROUPR14,Interrupt Group Register 14 (Non-secure access)" bitfld.long 0x00 31. " GSB479 ,Group Status Bit 479" "Group 0,Group 1" bitfld.long 0x00 30. " GSB478 ,Group Status Bit 478" "Group 0,Group 1" bitfld.long 0x00 29. " GSB477 ,Group Status Bit 477" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB476 ,Group Status Bit 476" "Group 0,Group 1" bitfld.long 0x00 27. " GSB475 ,Group Status Bit 475" "Group 0,Group 1" bitfld.long 0x00 26. " GSB474 ,Group Status Bit 474" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB473 ,Group Status Bit 473" "Group 0,Group 1" bitfld.long 0x00 24. " GSB472 ,Group Status Bit 472" "Group 0,Group 1" bitfld.long 0x00 23. " GSB471 ,Group Status Bit 471" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB470 ,Group Status Bit 470" "Group 0,Group 1" bitfld.long 0x00 21. " GSB469 ,Group Status Bit 469" "Group 0,Group 1" bitfld.long 0x00 20. " GSB468 ,Group Status Bit 468" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB467 ,Group Status Bit 467" "Group 0,Group 1" bitfld.long 0x00 18. " GSB466 ,Group Status Bit 466" "Group 0,Group 1" bitfld.long 0x00 17. " GSB465 ,Group Status Bit 465" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB464 ,Group Status Bit 464" "Group 0,Group 1" bitfld.long 0x00 15. " GSB463 ,Group Status Bit 463" "Group 0,Group 1" bitfld.long 0x00 14. " GSB462 ,Group Status Bit 462" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB461 ,Group Status Bit 461" "Group 0,Group 1" bitfld.long 0x00 12. " GSB460 ,Group Status Bit 460" "Group 0,Group 1" bitfld.long 0x00 11. " GSB459 ,Group Status Bit 459" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB458 ,Group Status Bit 458" "Group 0,Group 1" bitfld.long 0x00 9. " GSB457 ,Group Status Bit 457" "Group 0,Group 1" bitfld.long 0x00 8. " GSB456 ,Group Status Bit 456" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB455 ,Group Status Bit 455" "Group 0,Group 1" bitfld.long 0x00 6. " GSB454 ,Group Status Bit 454" "Group 0,Group 1" bitfld.long 0x00 5. " GSB453 ,Group Status Bit 453" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB452 ,Group Status Bit 452" "Group 0,Group 1" bitfld.long 0x00 3. " GSB451 ,Group Status Bit 451" "Group 0,Group 1" bitfld.long 0x00 2. " GSB450 ,Group Status Bit 450" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB449 ,Group Status Bit 449" "Group 0,Group 1" bitfld.long 0x00 0. " GSB448 ,Group Status Bit 448" "Group 0,Group 1" else rgroup.long 0x00B8++0x03 line.long 0x0 "GICD_IGROUPR14,Interrupt Group Register 14" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x0F)&&(PER.ADDRESS.isSECUREEX(ad:0xF9010000+0x00BC)) group.long 0x00BC++0x03 line.long 0x0 "GICD_IGROUPR15,Interrupt Group Register 15 (Secure access)" bitfld.long 0x00 31. " GSB511 ,Group Status Bit 511" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB510 ,Group Status Bit 510" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB509 ,Group Status Bit 509" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB508 ,Group Status Bit 508" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB507 ,Group Status Bit 507" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB506 ,Group Status Bit 506" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB505 ,Group Status Bit 505" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB504 ,Group Status Bit 504" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB503 ,Group Status Bit 503" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB502 ,Group Status Bit 502" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB501 ,Group Status Bit 501" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB500 ,Group Status Bit 500" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB499 ,Group Status Bit 499" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB498 ,Group Status Bit 498" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB497 ,Group Status Bit 497" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB496 ,Group Status Bit 496" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB495 ,Group Status Bit 495" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB494 ,Group Status Bit 494" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB493 ,Group Status Bit 493" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB492 ,Group Status Bit 492" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB491 ,Group Status Bit 491" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB490 ,Group Status Bit 490" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB489 ,Group Status Bit 489" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB488 ,Group Status Bit 488" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB487 ,Group Status Bit 487" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB486 ,Group Status Bit 486" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB485 ,Group Status Bit 485" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB484 ,Group Status Bit 484" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB483 ,Group Status Bit 483" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB482 ,Group Status Bit 482" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB481 ,Group Status Bit 481" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB480 ,Group Status Bit 480" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x0F) group.long 0x00BC++0x03 line.long 0x0 "GICD_IGROUPR15,Interrupt Group Register 15 (Non-secure access)" bitfld.long 0x00 31. " GSB511 ,Group Status Bit 511" "Group 0,Group 1" bitfld.long 0x00 30. " GSB510 ,Group Status Bit 510" "Group 0,Group 1" bitfld.long 0x00 29. " GSB509 ,Group Status Bit 509" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB508 ,Group Status Bit 508" "Group 0,Group 1" bitfld.long 0x00 27. " GSB507 ,Group Status Bit 507" "Group 0,Group 1" bitfld.long 0x00 26. " GSB506 ,Group Status Bit 506" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB505 ,Group Status Bit 505" "Group 0,Group 1" bitfld.long 0x00 24. " GSB504 ,Group Status Bit 504" "Group 0,Group 1" bitfld.long 0x00 23. " GSB503 ,Group Status Bit 503" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB502 ,Group Status Bit 502" "Group 0,Group 1" bitfld.long 0x00 21. " GSB501 ,Group Status Bit 501" "Group 0,Group 1" bitfld.long 0x00 20. " GSB500 ,Group Status Bit 500" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB499 ,Group Status Bit 499" "Group 0,Group 1" bitfld.long 0x00 18. " GSB498 ,Group Status Bit 498" "Group 0,Group 1" bitfld.long 0x00 17. " GSB497 ,Group Status Bit 497" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB496 ,Group Status Bit 496" "Group 0,Group 1" bitfld.long 0x00 15. " GSB495 ,Group Status Bit 495" "Group 0,Group 1" bitfld.long 0x00 14. " GSB494 ,Group Status Bit 494" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB493 ,Group Status Bit 493" "Group 0,Group 1" bitfld.long 0x00 12. " GSB492 ,Group Status Bit 492" "Group 0,Group 1" bitfld.long 0x00 11. " GSB491 ,Group Status Bit 491" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB490 ,Group Status Bit 490" "Group 0,Group 1" bitfld.long 0x00 9. " GSB489 ,Group Status Bit 489" "Group 0,Group 1" bitfld.long 0x00 8. " GSB488 ,Group Status Bit 488" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB487 ,Group Status Bit 487" "Group 0,Group 1" bitfld.long 0x00 6. " GSB486 ,Group Status Bit 486" "Group 0,Group 1" bitfld.long 0x00 5. " GSB485 ,Group Status Bit 485" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB484 ,Group Status Bit 484" "Group 0,Group 1" bitfld.long 0x00 3. " GSB483 ,Group Status Bit 483" "Group 0,Group 1" bitfld.long 0x00 2. " GSB482 ,Group Status Bit 482" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB481 ,Group Status Bit 481" "Group 0,Group 1" bitfld.long 0x00 0. " GSB480 ,Group Status Bit 480" "Group 0,Group 1" else rgroup.long 0x00BC++0x03 line.long 0x0 "GICD_IGROUPR15,Interrupt Group Register 15" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x10)&&(PER.ADDRESS.isSECUREEX(ad:0xF9010000+0x00C0)) group.long 0x00C0++0x03 line.long 0x0 "GICD_IGROUPR16,Interrupt Group Register 16 (Secure access)" bitfld.long 0x00 31. " GSB543 ,Group Status Bit 543" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB542 ,Group Status Bit 542" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB541 ,Group Status Bit 541" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB540 ,Group Status Bit 540" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB539 ,Group Status Bit 539" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB538 ,Group Status Bit 538" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB537 ,Group Status Bit 537" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB536 ,Group Status Bit 536" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB535 ,Group Status Bit 535" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB534 ,Group Status Bit 534" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB533 ,Group Status Bit 533" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB532 ,Group Status Bit 532" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB531 ,Group Status Bit 531" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB530 ,Group Status Bit 530" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB529 ,Group Status Bit 529" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB528 ,Group Status Bit 528" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB527 ,Group Status Bit 527" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB526 ,Group Status Bit 526" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB525 ,Group Status Bit 525" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB524 ,Group Status Bit 524" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB523 ,Group Status Bit 523" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB522 ,Group Status Bit 522" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB521 ,Group Status Bit 521" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB520 ,Group Status Bit 520" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB519 ,Group Status Bit 519" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB518 ,Group Status Bit 518" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB517 ,Group Status Bit 517" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB516 ,Group Status Bit 516" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB515 ,Group Status Bit 515" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB514 ,Group Status Bit 514" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB513 ,Group Status Bit 513" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB512 ,Group Status Bit 512" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x10) group.long 0x00C0++0x03 line.long 0x0 "GICD_IGROUPR16,Interrupt Group Register 16 (Non-secure access)" bitfld.long 0x00 31. " GSB543 ,Group Status Bit 543" "Group 0,Group 1" bitfld.long 0x00 30. " GSB542 ,Group Status Bit 542" "Group 0,Group 1" bitfld.long 0x00 29. " GSB541 ,Group Status Bit 541" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB540 ,Group Status Bit 540" "Group 0,Group 1" bitfld.long 0x00 27. " GSB539 ,Group Status Bit 539" "Group 0,Group 1" bitfld.long 0x00 26. " GSB538 ,Group Status Bit 538" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB537 ,Group Status Bit 537" "Group 0,Group 1" bitfld.long 0x00 24. " GSB536 ,Group Status Bit 536" "Group 0,Group 1" bitfld.long 0x00 23. " GSB535 ,Group Status Bit 535" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB534 ,Group Status Bit 534" "Group 0,Group 1" bitfld.long 0x00 21. " GSB533 ,Group Status Bit 533" "Group 0,Group 1" bitfld.long 0x00 20. " GSB532 ,Group Status Bit 532" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB531 ,Group Status Bit 531" "Group 0,Group 1" bitfld.long 0x00 18. " GSB530 ,Group Status Bit 530" "Group 0,Group 1" bitfld.long 0x00 17. " GSB529 ,Group Status Bit 529" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB528 ,Group Status Bit 528" "Group 0,Group 1" bitfld.long 0x00 15. " GSB527 ,Group Status Bit 527" "Group 0,Group 1" bitfld.long 0x00 14. " GSB526 ,Group Status Bit 526" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB525 ,Group Status Bit 525" "Group 0,Group 1" bitfld.long 0x00 12. " GSB524 ,Group Status Bit 524" "Group 0,Group 1" bitfld.long 0x00 11. " GSB523 ,Group Status Bit 523" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB522 ,Group Status Bit 522" "Group 0,Group 1" bitfld.long 0x00 9. " GSB521 ,Group Status Bit 521" "Group 0,Group 1" bitfld.long 0x00 8. " GSB520 ,Group Status Bit 520" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB519 ,Group Status Bit 519" "Group 0,Group 1" bitfld.long 0x00 6. " GSB518 ,Group Status Bit 518" "Group 0,Group 1" bitfld.long 0x00 5. " GSB517 ,Group Status Bit 517" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB516 ,Group Status Bit 516" "Group 0,Group 1" bitfld.long 0x00 3. " GSB515 ,Group Status Bit 515" "Group 0,Group 1" bitfld.long 0x00 2. " GSB514 ,Group Status Bit 514" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB513 ,Group Status Bit 513" "Group 0,Group 1" bitfld.long 0x00 0. " GSB512 ,Group Status Bit 512" "Group 0,Group 1" else rgroup.long 0x00C0++0x03 line.long 0x0 "GICD_IGROUPR16,Interrupt Group Register 16" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x11)&&(PER.ADDRESS.isSECUREEX(ad:0xF9010000+0x00C4)) group.long 0x00C4++0x03 line.long 0x0 "GICD_IGROUPR17,Interrupt Group Register 17 (Secure access)" bitfld.long 0x00 31. " GSB575 ,Group Status Bit 575" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB574 ,Group Status Bit 574" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB573 ,Group Status Bit 573" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB572 ,Group Status Bit 572" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB571 ,Group Status Bit 571" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB570 ,Group Status Bit 570" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB569 ,Group Status Bit 569" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB568 ,Group Status Bit 568" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB567 ,Group Status Bit 567" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB566 ,Group Status Bit 566" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB565 ,Group Status Bit 565" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB564 ,Group Status Bit 564" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB563 ,Group Status Bit 563" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB562 ,Group Status Bit 562" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB561 ,Group Status Bit 561" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB560 ,Group Status Bit 560" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB559 ,Group Status Bit 559" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB558 ,Group Status Bit 558" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB557 ,Group Status Bit 557" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB556 ,Group Status Bit 556" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB555 ,Group Status Bit 555" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB554 ,Group Status Bit 554" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB553 ,Group Status Bit 553" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB552 ,Group Status Bit 552" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB551 ,Group Status Bit 551" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB550 ,Group Status Bit 550" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB549 ,Group Status Bit 549" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB548 ,Group Status Bit 548" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB547 ,Group Status Bit 547" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB546 ,Group Status Bit 546" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB545 ,Group Status Bit 545" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB544 ,Group Status Bit 544" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x11) group.long 0x00C4++0x03 line.long 0x0 "GICD_IGROUPR17,Interrupt Group Register 17 (Non-secure access)" bitfld.long 0x00 31. " GSB575 ,Group Status Bit 575" "Group 0,Group 1" bitfld.long 0x00 30. " GSB574 ,Group Status Bit 574" "Group 0,Group 1" bitfld.long 0x00 29. " GSB573 ,Group Status Bit 573" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB572 ,Group Status Bit 572" "Group 0,Group 1" bitfld.long 0x00 27. " GSB571 ,Group Status Bit 571" "Group 0,Group 1" bitfld.long 0x00 26. " GSB570 ,Group Status Bit 570" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB569 ,Group Status Bit 569" "Group 0,Group 1" bitfld.long 0x00 24. " GSB568 ,Group Status Bit 568" "Group 0,Group 1" bitfld.long 0x00 23. " GSB567 ,Group Status Bit 567" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB566 ,Group Status Bit 566" "Group 0,Group 1" bitfld.long 0x00 21. " GSB565 ,Group Status Bit 565" "Group 0,Group 1" bitfld.long 0x00 20. " GSB564 ,Group Status Bit 564" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB563 ,Group Status Bit 563" "Group 0,Group 1" bitfld.long 0x00 18. " GSB562 ,Group Status Bit 562" "Group 0,Group 1" bitfld.long 0x00 17. " GSB561 ,Group Status Bit 561" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB560 ,Group Status Bit 560" "Group 0,Group 1" bitfld.long 0x00 15. " GSB559 ,Group Status Bit 559" "Group 0,Group 1" bitfld.long 0x00 14. " GSB558 ,Group Status Bit 558" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB557 ,Group Status Bit 557" "Group 0,Group 1" bitfld.long 0x00 12. " GSB556 ,Group Status Bit 556" "Group 0,Group 1" bitfld.long 0x00 11. " GSB555 ,Group Status Bit 555" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB554 ,Group Status Bit 554" "Group 0,Group 1" bitfld.long 0x00 9. " GSB553 ,Group Status Bit 553" "Group 0,Group 1" bitfld.long 0x00 8. " GSB552 ,Group Status Bit 552" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB551 ,Group Status Bit 551" "Group 0,Group 1" bitfld.long 0x00 6. " GSB550 ,Group Status Bit 550" "Group 0,Group 1" bitfld.long 0x00 5. " GSB549 ,Group Status Bit 549" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB548 ,Group Status Bit 548" "Group 0,Group 1" bitfld.long 0x00 3. " GSB547 ,Group Status Bit 547" "Group 0,Group 1" bitfld.long 0x00 2. " GSB546 ,Group Status Bit 546" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB545 ,Group Status Bit 545" "Group 0,Group 1" bitfld.long 0x00 0. " GSB544 ,Group Status Bit 544" "Group 0,Group 1" else rgroup.long 0x00C4++0x03 line.long 0x0 "GICD_IGROUPR17,Interrupt Group Register 17" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x12)&&(PER.ADDRESS.isSECUREEX(ad:0xF9010000+0x00C8)) group.long 0x00C8++0x03 line.long 0x0 "GICD_IGROUPR18,Interrupt Group Register 18 (Secure access)" bitfld.long 0x00 31. " GSB607 ,Group Status Bit 607" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB606 ,Group Status Bit 606" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB605 ,Group Status Bit 605" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB604 ,Group Status Bit 604" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB603 ,Group Status Bit 603" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB602 ,Group Status Bit 602" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB601 ,Group Status Bit 601" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB600 ,Group Status Bit 600" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB599 ,Group Status Bit 599" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB598 ,Group Status Bit 598" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB597 ,Group Status Bit 597" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB596 ,Group Status Bit 596" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB595 ,Group Status Bit 595" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB594 ,Group Status Bit 594" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB593 ,Group Status Bit 593" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB592 ,Group Status Bit 592" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB591 ,Group Status Bit 591" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB590 ,Group Status Bit 590" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB589 ,Group Status Bit 589" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB588 ,Group Status Bit 588" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB587 ,Group Status Bit 587" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB586 ,Group Status Bit 586" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB585 ,Group Status Bit 585" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB584 ,Group Status Bit 584" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB583 ,Group Status Bit 583" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB582 ,Group Status Bit 582" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB581 ,Group Status Bit 581" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB580 ,Group Status Bit 580" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB579 ,Group Status Bit 579" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB578 ,Group Status Bit 578" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB577 ,Group Status Bit 577" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB576 ,Group Status Bit 576" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x12) group.long 0x00C8++0x03 line.long 0x0 "GICD_IGROUPR18,Interrupt Group Register 18 (Non-secure access)" bitfld.long 0x00 31. " GSB607 ,Group Status Bit 607" "Group 0,Group 1" bitfld.long 0x00 30. " GSB606 ,Group Status Bit 606" "Group 0,Group 1" bitfld.long 0x00 29. " GSB605 ,Group Status Bit 605" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB604 ,Group Status Bit 604" "Group 0,Group 1" bitfld.long 0x00 27. " GSB603 ,Group Status Bit 603" "Group 0,Group 1" bitfld.long 0x00 26. " GSB602 ,Group Status Bit 602" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB601 ,Group Status Bit 601" "Group 0,Group 1" bitfld.long 0x00 24. " GSB600 ,Group Status Bit 600" "Group 0,Group 1" bitfld.long 0x00 23. " GSB599 ,Group Status Bit 599" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB598 ,Group Status Bit 598" "Group 0,Group 1" bitfld.long 0x00 21. " GSB597 ,Group Status Bit 597" "Group 0,Group 1" bitfld.long 0x00 20. " GSB596 ,Group Status Bit 596" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB595 ,Group Status Bit 595" "Group 0,Group 1" bitfld.long 0x00 18. " GSB594 ,Group Status Bit 594" "Group 0,Group 1" bitfld.long 0x00 17. " GSB593 ,Group Status Bit 593" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB592 ,Group Status Bit 592" "Group 0,Group 1" bitfld.long 0x00 15. " GSB591 ,Group Status Bit 591" "Group 0,Group 1" bitfld.long 0x00 14. " GSB590 ,Group Status Bit 590" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB589 ,Group Status Bit 589" "Group 0,Group 1" bitfld.long 0x00 12. " GSB588 ,Group Status Bit 588" "Group 0,Group 1" bitfld.long 0x00 11. " GSB587 ,Group Status Bit 587" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB586 ,Group Status Bit 586" "Group 0,Group 1" bitfld.long 0x00 9. " GSB585 ,Group Status Bit 585" "Group 0,Group 1" bitfld.long 0x00 8. " GSB584 ,Group Status Bit 584" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB583 ,Group Status Bit 583" "Group 0,Group 1" bitfld.long 0x00 6. " GSB582 ,Group Status Bit 582" "Group 0,Group 1" bitfld.long 0x00 5. " GSB581 ,Group Status Bit 581" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB580 ,Group Status Bit 580" "Group 0,Group 1" bitfld.long 0x00 3. " GSB579 ,Group Status Bit 579" "Group 0,Group 1" bitfld.long 0x00 2. " GSB578 ,Group Status Bit 578" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB577 ,Group Status Bit 577" "Group 0,Group 1" bitfld.long 0x00 0. " GSB576 ,Group Status Bit 576" "Group 0,Group 1" else rgroup.long 0x00C8++0x03 line.long 0x0 "GICD_IGROUPR18,Interrupt Group Register 18" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x13)&&(PER.ADDRESS.isSECUREEX(ad:0xF9010000+0x00CC)) group.long 0x00CC++0x03 line.long 0x0 "GICD_IGROUPR19,Interrupt Group Register 19 (Secure access)" bitfld.long 0x00 31. " GSB639 ,Group Status Bit 639" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB638 ,Group Status Bit 638" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB637 ,Group Status Bit 637" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB636 ,Group Status Bit 636" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB635 ,Group Status Bit 635" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB634 ,Group Status Bit 634" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB633 ,Group Status Bit 633" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB632 ,Group Status Bit 632" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB631 ,Group Status Bit 631" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB630 ,Group Status Bit 630" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB629 ,Group Status Bit 629" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB628 ,Group Status Bit 628" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB627 ,Group Status Bit 627" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB626 ,Group Status Bit 626" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB625 ,Group Status Bit 625" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB624 ,Group Status Bit 624" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB623 ,Group Status Bit 623" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB622 ,Group Status Bit 622" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB621 ,Group Status Bit 621" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB620 ,Group Status Bit 620" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB619 ,Group Status Bit 619" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB618 ,Group Status Bit 618" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB617 ,Group Status Bit 617" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB616 ,Group Status Bit 616" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB615 ,Group Status Bit 615" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB614 ,Group Status Bit 614" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB613 ,Group Status Bit 613" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB612 ,Group Status Bit 612" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB611 ,Group Status Bit 611" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB610 ,Group Status Bit 610" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB609 ,Group Status Bit 609" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB608 ,Group Status Bit 608" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x13) group.long 0x00CC++0x03 line.long 0x0 "GICD_IGROUPR19,Interrupt Group Register 19 (Non-secure access)" bitfld.long 0x00 31. " GSB639 ,Group Status Bit 639" "Group 0,Group 1" bitfld.long 0x00 30. " GSB638 ,Group Status Bit 638" "Group 0,Group 1" bitfld.long 0x00 29. " GSB637 ,Group Status Bit 637" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB636 ,Group Status Bit 636" "Group 0,Group 1" bitfld.long 0x00 27. " GSB635 ,Group Status Bit 635" "Group 0,Group 1" bitfld.long 0x00 26. " GSB634 ,Group Status Bit 634" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB633 ,Group Status Bit 633" "Group 0,Group 1" bitfld.long 0x00 24. " GSB632 ,Group Status Bit 632" "Group 0,Group 1" bitfld.long 0x00 23. " GSB631 ,Group Status Bit 631" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB630 ,Group Status Bit 630" "Group 0,Group 1" bitfld.long 0x00 21. " GSB629 ,Group Status Bit 629" "Group 0,Group 1" bitfld.long 0x00 20. " GSB628 ,Group Status Bit 628" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB627 ,Group Status Bit 627" "Group 0,Group 1" bitfld.long 0x00 18. " GSB626 ,Group Status Bit 626" "Group 0,Group 1" bitfld.long 0x00 17. " GSB625 ,Group Status Bit 625" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB624 ,Group Status Bit 624" "Group 0,Group 1" bitfld.long 0x00 15. " GSB623 ,Group Status Bit 623" "Group 0,Group 1" bitfld.long 0x00 14. " GSB622 ,Group Status Bit 622" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB621 ,Group Status Bit 621" "Group 0,Group 1" bitfld.long 0x00 12. " GSB620 ,Group Status Bit 620" "Group 0,Group 1" bitfld.long 0x00 11. " GSB619 ,Group Status Bit 619" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB618 ,Group Status Bit 618" "Group 0,Group 1" bitfld.long 0x00 9. " GSB617 ,Group Status Bit 617" "Group 0,Group 1" bitfld.long 0x00 8. " GSB616 ,Group Status Bit 616" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB615 ,Group Status Bit 615" "Group 0,Group 1" bitfld.long 0x00 6. " GSB614 ,Group Status Bit 614" "Group 0,Group 1" bitfld.long 0x00 5. " GSB613 ,Group Status Bit 613" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB612 ,Group Status Bit 612" "Group 0,Group 1" bitfld.long 0x00 3. " GSB611 ,Group Status Bit 611" "Group 0,Group 1" bitfld.long 0x00 2. " GSB610 ,Group Status Bit 610" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB609 ,Group Status Bit 609" "Group 0,Group 1" bitfld.long 0x00 0. " GSB608 ,Group Status Bit 608" "Group 0,Group 1" else rgroup.long 0x00CC++0x03 line.long 0x0 "GICD_IGROUPR19,Interrupt Group Register 19" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x14)&&(PER.ADDRESS.isSECUREEX(ad:0xF9010000+0x00D0)) group.long 0x00D0++0x03 line.long 0x0 "GICD_IGROUPR20,Interrupt Group Register 20 (Secure access)" bitfld.long 0x00 31. " GSB671 ,Group Status Bit 671" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB670 ,Group Status Bit 670" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB669 ,Group Status Bit 669" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB668 ,Group Status Bit 668" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB667 ,Group Status Bit 667" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB666 ,Group Status Bit 666" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB665 ,Group Status Bit 665" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB664 ,Group Status Bit 664" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB663 ,Group Status Bit 663" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB662 ,Group Status Bit 662" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB661 ,Group Status Bit 661" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB660 ,Group Status Bit 660" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB659 ,Group Status Bit 659" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB658 ,Group Status Bit 658" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB657 ,Group Status Bit 657" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB656 ,Group Status Bit 656" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB655 ,Group Status Bit 655" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB654 ,Group Status Bit 654" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB653 ,Group Status Bit 653" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB652 ,Group Status Bit 652" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB651 ,Group Status Bit 651" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB650 ,Group Status Bit 650" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB649 ,Group Status Bit 649" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB648 ,Group Status Bit 648" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB647 ,Group Status Bit 647" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB646 ,Group Status Bit 646" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB645 ,Group Status Bit 645" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB644 ,Group Status Bit 644" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB643 ,Group Status Bit 643" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB642 ,Group Status Bit 642" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB641 ,Group Status Bit 641" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB640 ,Group Status Bit 640" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x14) group.long 0x00D0++0x03 line.long 0x0 "GICD_IGROUPR20,Interrupt Group Register 20 (Non-secure access)" bitfld.long 0x00 31. " GSB671 ,Group Status Bit 671" "Group 0,Group 1" bitfld.long 0x00 30. " GSB670 ,Group Status Bit 670" "Group 0,Group 1" bitfld.long 0x00 29. " GSB669 ,Group Status Bit 669" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB668 ,Group Status Bit 668" "Group 0,Group 1" bitfld.long 0x00 27. " GSB667 ,Group Status Bit 667" "Group 0,Group 1" bitfld.long 0x00 26. " GSB666 ,Group Status Bit 666" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB665 ,Group Status Bit 665" "Group 0,Group 1" bitfld.long 0x00 24. " GSB664 ,Group Status Bit 664" "Group 0,Group 1" bitfld.long 0x00 23. " GSB663 ,Group Status Bit 663" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB662 ,Group Status Bit 662" "Group 0,Group 1" bitfld.long 0x00 21. " GSB661 ,Group Status Bit 661" "Group 0,Group 1" bitfld.long 0x00 20. " GSB660 ,Group Status Bit 660" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB659 ,Group Status Bit 659" "Group 0,Group 1" bitfld.long 0x00 18. " GSB658 ,Group Status Bit 658" "Group 0,Group 1" bitfld.long 0x00 17. " GSB657 ,Group Status Bit 657" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB656 ,Group Status Bit 656" "Group 0,Group 1" bitfld.long 0x00 15. " GSB655 ,Group Status Bit 655" "Group 0,Group 1" bitfld.long 0x00 14. " GSB654 ,Group Status Bit 654" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB653 ,Group Status Bit 653" "Group 0,Group 1" bitfld.long 0x00 12. " GSB652 ,Group Status Bit 652" "Group 0,Group 1" bitfld.long 0x00 11. " GSB651 ,Group Status Bit 651" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB650 ,Group Status Bit 650" "Group 0,Group 1" bitfld.long 0x00 9. " GSB649 ,Group Status Bit 649" "Group 0,Group 1" bitfld.long 0x00 8. " GSB648 ,Group Status Bit 648" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB647 ,Group Status Bit 647" "Group 0,Group 1" bitfld.long 0x00 6. " GSB646 ,Group Status Bit 646" "Group 0,Group 1" bitfld.long 0x00 5. " GSB645 ,Group Status Bit 645" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB644 ,Group Status Bit 644" "Group 0,Group 1" bitfld.long 0x00 3. " GSB643 ,Group Status Bit 643" "Group 0,Group 1" bitfld.long 0x00 2. " GSB642 ,Group Status Bit 642" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB641 ,Group Status Bit 641" "Group 0,Group 1" bitfld.long 0x00 0. " GSB640 ,Group Status Bit 640" "Group 0,Group 1" else rgroup.long 0x00D0++0x03 line.long 0x0 "GICD_IGROUPR20,Interrupt Group Register 20" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x15)&&(PER.ADDRESS.isSECUREEX(ad:0xF9010000+0x00D4)) group.long 0x00D4++0x03 line.long 0x0 "GICD_IGROUPR21,Interrupt Group Register 21 (Secure access)" bitfld.long 0x00 31. " GSB703 ,Group Status Bit 703" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB702 ,Group Status Bit 702" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB701 ,Group Status Bit 701" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB700 ,Group Status Bit 700" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB699 ,Group Status Bit 699" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB698 ,Group Status Bit 698" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB697 ,Group Status Bit 697" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB696 ,Group Status Bit 696" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB695 ,Group Status Bit 695" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB694 ,Group Status Bit 694" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB693 ,Group Status Bit 693" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB692 ,Group Status Bit 692" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB691 ,Group Status Bit 691" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB690 ,Group Status Bit 690" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB689 ,Group Status Bit 689" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB688 ,Group Status Bit 688" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB687 ,Group Status Bit 687" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB686 ,Group Status Bit 686" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB685 ,Group Status Bit 685" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB684 ,Group Status Bit 684" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB683 ,Group Status Bit 683" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB682 ,Group Status Bit 682" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB681 ,Group Status Bit 681" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB680 ,Group Status Bit 680" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB679 ,Group Status Bit 679" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB678 ,Group Status Bit 678" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB677 ,Group Status Bit 677" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB676 ,Group Status Bit 676" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB675 ,Group Status Bit 675" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB674 ,Group Status Bit 674" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB673 ,Group Status Bit 673" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB672 ,Group Status Bit 672" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x15) group.long 0x00D4++0x03 line.long 0x0 "GICD_IGROUPR21,Interrupt Group Register 21 (Non-secure access)" bitfld.long 0x00 31. " GSB703 ,Group Status Bit 703" "Group 0,Group 1" bitfld.long 0x00 30. " GSB702 ,Group Status Bit 702" "Group 0,Group 1" bitfld.long 0x00 29. " GSB701 ,Group Status Bit 701" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB700 ,Group Status Bit 700" "Group 0,Group 1" bitfld.long 0x00 27. " GSB699 ,Group Status Bit 699" "Group 0,Group 1" bitfld.long 0x00 26. " GSB698 ,Group Status Bit 698" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB697 ,Group Status Bit 697" "Group 0,Group 1" bitfld.long 0x00 24. " GSB696 ,Group Status Bit 696" "Group 0,Group 1" bitfld.long 0x00 23. " GSB695 ,Group Status Bit 695" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB694 ,Group Status Bit 694" "Group 0,Group 1" bitfld.long 0x00 21. " GSB693 ,Group Status Bit 693" "Group 0,Group 1" bitfld.long 0x00 20. " GSB692 ,Group Status Bit 692" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB691 ,Group Status Bit 691" "Group 0,Group 1" bitfld.long 0x00 18. " GSB690 ,Group Status Bit 690" "Group 0,Group 1" bitfld.long 0x00 17. " GSB689 ,Group Status Bit 689" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB688 ,Group Status Bit 688" "Group 0,Group 1" bitfld.long 0x00 15. " GSB687 ,Group Status Bit 687" "Group 0,Group 1" bitfld.long 0x00 14. " GSB686 ,Group Status Bit 686" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB685 ,Group Status Bit 685" "Group 0,Group 1" bitfld.long 0x00 12. " GSB684 ,Group Status Bit 684" "Group 0,Group 1" bitfld.long 0x00 11. " GSB683 ,Group Status Bit 683" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB682 ,Group Status Bit 682" "Group 0,Group 1" bitfld.long 0x00 9. " GSB681 ,Group Status Bit 681" "Group 0,Group 1" bitfld.long 0x00 8. " GSB680 ,Group Status Bit 680" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB679 ,Group Status Bit 679" "Group 0,Group 1" bitfld.long 0x00 6. " GSB678 ,Group Status Bit 678" "Group 0,Group 1" bitfld.long 0x00 5. " GSB677 ,Group Status Bit 677" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB676 ,Group Status Bit 676" "Group 0,Group 1" bitfld.long 0x00 3. " GSB675 ,Group Status Bit 675" "Group 0,Group 1" bitfld.long 0x00 2. " GSB674 ,Group Status Bit 674" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB673 ,Group Status Bit 673" "Group 0,Group 1" bitfld.long 0x00 0. " GSB672 ,Group Status Bit 672" "Group 0,Group 1" else rgroup.long 0x00D4++0x03 line.long 0x0 "GICD_IGROUPR21,Interrupt Group Register 21" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x16)&&(PER.ADDRESS.isSECUREEX(ad:0xF9010000+0x00D8)) group.long 0x00D8++0x03 line.long 0x0 "GICD_IGROUPR22,Interrupt Group Register 22 (Secure access)" bitfld.long 0x00 31. " GSB735 ,Group Status Bit 735" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB734 ,Group Status Bit 734" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB733 ,Group Status Bit 733" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB732 ,Group Status Bit 732" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB731 ,Group Status Bit 731" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB730 ,Group Status Bit 730" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB729 ,Group Status Bit 729" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB728 ,Group Status Bit 728" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB727 ,Group Status Bit 727" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB726 ,Group Status Bit 726" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB725 ,Group Status Bit 725" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB724 ,Group Status Bit 724" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB723 ,Group Status Bit 723" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB722 ,Group Status Bit 722" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB721 ,Group Status Bit 721" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB720 ,Group Status Bit 720" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB719 ,Group Status Bit 719" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB718 ,Group Status Bit 718" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB717 ,Group Status Bit 717" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB716 ,Group Status Bit 716" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB715 ,Group Status Bit 715" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB714 ,Group Status Bit 714" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB713 ,Group Status Bit 713" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB712 ,Group Status Bit 712" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB711 ,Group Status Bit 711" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB710 ,Group Status Bit 710" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB709 ,Group Status Bit 709" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB708 ,Group Status Bit 708" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB707 ,Group Status Bit 707" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB706 ,Group Status Bit 706" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB705 ,Group Status Bit 705" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB704 ,Group Status Bit 704" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x16) group.long 0x00D8++0x03 line.long 0x0 "GICD_IGROUPR22,Interrupt Group Register 22 (Non-secure access)" bitfld.long 0x00 31. " GSB735 ,Group Status Bit 735" "Group 0,Group 1" bitfld.long 0x00 30. " GSB734 ,Group Status Bit 734" "Group 0,Group 1" bitfld.long 0x00 29. " GSB733 ,Group Status Bit 733" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB732 ,Group Status Bit 732" "Group 0,Group 1" bitfld.long 0x00 27. " GSB731 ,Group Status Bit 731" "Group 0,Group 1" bitfld.long 0x00 26. " GSB730 ,Group Status Bit 730" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB729 ,Group Status Bit 729" "Group 0,Group 1" bitfld.long 0x00 24. " GSB728 ,Group Status Bit 728" "Group 0,Group 1" bitfld.long 0x00 23. " GSB727 ,Group Status Bit 727" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB726 ,Group Status Bit 726" "Group 0,Group 1" bitfld.long 0x00 21. " GSB725 ,Group Status Bit 725" "Group 0,Group 1" bitfld.long 0x00 20. " GSB724 ,Group Status Bit 724" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB723 ,Group Status Bit 723" "Group 0,Group 1" bitfld.long 0x00 18. " GSB722 ,Group Status Bit 722" "Group 0,Group 1" bitfld.long 0x00 17. " GSB721 ,Group Status Bit 721" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB720 ,Group Status Bit 720" "Group 0,Group 1" bitfld.long 0x00 15. " GSB719 ,Group Status Bit 719" "Group 0,Group 1" bitfld.long 0x00 14. " GSB718 ,Group Status Bit 718" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB717 ,Group Status Bit 717" "Group 0,Group 1" bitfld.long 0x00 12. " GSB716 ,Group Status Bit 716" "Group 0,Group 1" bitfld.long 0x00 11. " GSB715 ,Group Status Bit 715" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB714 ,Group Status Bit 714" "Group 0,Group 1" bitfld.long 0x00 9. " GSB713 ,Group Status Bit 713" "Group 0,Group 1" bitfld.long 0x00 8. " GSB712 ,Group Status Bit 712" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB711 ,Group Status Bit 711" "Group 0,Group 1" bitfld.long 0x00 6. " GSB710 ,Group Status Bit 710" "Group 0,Group 1" bitfld.long 0x00 5. " GSB709 ,Group Status Bit 709" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB708 ,Group Status Bit 708" "Group 0,Group 1" bitfld.long 0x00 3. " GSB707 ,Group Status Bit 707" "Group 0,Group 1" bitfld.long 0x00 2. " GSB706 ,Group Status Bit 706" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB705 ,Group Status Bit 705" "Group 0,Group 1" bitfld.long 0x00 0. " GSB704 ,Group Status Bit 704" "Group 0,Group 1" else rgroup.long 0x00D8++0x03 line.long 0x0 "GICD_IGROUPR22,Interrupt Group Register 22" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x17)&&(PER.ADDRESS.isSECUREEX(ad:0xF9010000+0x00DC)) group.long 0x00DC++0x03 line.long 0x0 "GICD_IGROUPR23,Interrupt Group Register 23 (Secure access)" bitfld.long 0x00 31. " GSB767 ,Group Status Bit 767" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB766 ,Group Status Bit 766" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB765 ,Group Status Bit 765" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB764 ,Group Status Bit 764" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB763 ,Group Status Bit 763" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB762 ,Group Status Bit 762" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB761 ,Group Status Bit 761" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB760 ,Group Status Bit 760" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB759 ,Group Status Bit 759" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB758 ,Group Status Bit 758" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB757 ,Group Status Bit 757" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB756 ,Group Status Bit 756" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB755 ,Group Status Bit 755" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB754 ,Group Status Bit 754" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB753 ,Group Status Bit 753" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB752 ,Group Status Bit 752" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB751 ,Group Status Bit 751" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB750 ,Group Status Bit 750" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB749 ,Group Status Bit 749" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB748 ,Group Status Bit 748" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB747 ,Group Status Bit 747" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB746 ,Group Status Bit 746" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB745 ,Group Status Bit 745" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB744 ,Group Status Bit 744" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB743 ,Group Status Bit 743" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB742 ,Group Status Bit 742" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB741 ,Group Status Bit 741" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB740 ,Group Status Bit 740" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB739 ,Group Status Bit 739" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB738 ,Group Status Bit 738" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB737 ,Group Status Bit 737" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB736 ,Group Status Bit 736" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x17) group.long 0x00DC++0x03 line.long 0x0 "GICD_IGROUPR23,Interrupt Group Register 23 (Non-secure access)" bitfld.long 0x00 31. " GSB767 ,Group Status Bit 767" "Group 0,Group 1" bitfld.long 0x00 30. " GSB766 ,Group Status Bit 766" "Group 0,Group 1" bitfld.long 0x00 29. " GSB765 ,Group Status Bit 765" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB764 ,Group Status Bit 764" "Group 0,Group 1" bitfld.long 0x00 27. " GSB763 ,Group Status Bit 763" "Group 0,Group 1" bitfld.long 0x00 26. " GSB762 ,Group Status Bit 762" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB761 ,Group Status Bit 761" "Group 0,Group 1" bitfld.long 0x00 24. " GSB760 ,Group Status Bit 760" "Group 0,Group 1" bitfld.long 0x00 23. " GSB759 ,Group Status Bit 759" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB758 ,Group Status Bit 758" "Group 0,Group 1" bitfld.long 0x00 21. " GSB757 ,Group Status Bit 757" "Group 0,Group 1" bitfld.long 0x00 20. " GSB756 ,Group Status Bit 756" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB755 ,Group Status Bit 755" "Group 0,Group 1" bitfld.long 0x00 18. " GSB754 ,Group Status Bit 754" "Group 0,Group 1" bitfld.long 0x00 17. " GSB753 ,Group Status Bit 753" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB752 ,Group Status Bit 752" "Group 0,Group 1" bitfld.long 0x00 15. " GSB751 ,Group Status Bit 751" "Group 0,Group 1" bitfld.long 0x00 14. " GSB750 ,Group Status Bit 750" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB749 ,Group Status Bit 749" "Group 0,Group 1" bitfld.long 0x00 12. " GSB748 ,Group Status Bit 748" "Group 0,Group 1" bitfld.long 0x00 11. " GSB747 ,Group Status Bit 747" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB746 ,Group Status Bit 746" "Group 0,Group 1" bitfld.long 0x00 9. " GSB745 ,Group Status Bit 745" "Group 0,Group 1" bitfld.long 0x00 8. " GSB744 ,Group Status Bit 744" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB743 ,Group Status Bit 743" "Group 0,Group 1" bitfld.long 0x00 6. " GSB742 ,Group Status Bit 742" "Group 0,Group 1" bitfld.long 0x00 5. " GSB741 ,Group Status Bit 741" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB740 ,Group Status Bit 740" "Group 0,Group 1" bitfld.long 0x00 3. " GSB739 ,Group Status Bit 739" "Group 0,Group 1" bitfld.long 0x00 2. " GSB738 ,Group Status Bit 738" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB737 ,Group Status Bit 737" "Group 0,Group 1" bitfld.long 0x00 0. " GSB736 ,Group Status Bit 736" "Group 0,Group 1" else rgroup.long 0x00DC++0x03 line.long 0x0 "GICD_IGROUPR23,Interrupt Group Register 23" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x18)&&(PER.ADDRESS.isSECUREEX(ad:0xF9010000+0x00E0)) group.long 0x00E0++0x03 line.long 0x0 "GICD_IGROUPR24,Interrupt Group Register 24 (Secure access)" bitfld.long 0x00 31. " GSB799 ,Group Status Bit 799" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB798 ,Group Status Bit 798" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB797 ,Group Status Bit 797" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB796 ,Group Status Bit 796" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB795 ,Group Status Bit 795" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB794 ,Group Status Bit 794" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB793 ,Group Status Bit 793" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB792 ,Group Status Bit 792" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB791 ,Group Status Bit 791" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB790 ,Group Status Bit 790" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB789 ,Group Status Bit 789" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB788 ,Group Status Bit 788" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB787 ,Group Status Bit 787" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB786 ,Group Status Bit 786" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB785 ,Group Status Bit 785" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB784 ,Group Status Bit 784" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB783 ,Group Status Bit 783" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB782 ,Group Status Bit 782" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB781 ,Group Status Bit 781" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB780 ,Group Status Bit 780" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB779 ,Group Status Bit 779" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB778 ,Group Status Bit 778" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB777 ,Group Status Bit 777" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB776 ,Group Status Bit 776" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB775 ,Group Status Bit 775" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB774 ,Group Status Bit 774" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB773 ,Group Status Bit 773" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB772 ,Group Status Bit 772" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB771 ,Group Status Bit 771" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB770 ,Group Status Bit 770" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB769 ,Group Status Bit 769" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB768 ,Group Status Bit 768" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x18) group.long 0x00E0++0x03 line.long 0x0 "GICD_IGROUPR24,Interrupt Group Register 24 (Non-secure access)" bitfld.long 0x00 31. " GSB799 ,Group Status Bit 799" "Group 0,Group 1" bitfld.long 0x00 30. " GSB798 ,Group Status Bit 798" "Group 0,Group 1" bitfld.long 0x00 29. " GSB797 ,Group Status Bit 797" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB796 ,Group Status Bit 796" "Group 0,Group 1" bitfld.long 0x00 27. " GSB795 ,Group Status Bit 795" "Group 0,Group 1" bitfld.long 0x00 26. " GSB794 ,Group Status Bit 794" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB793 ,Group Status Bit 793" "Group 0,Group 1" bitfld.long 0x00 24. " GSB792 ,Group Status Bit 792" "Group 0,Group 1" bitfld.long 0x00 23. " GSB791 ,Group Status Bit 791" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB790 ,Group Status Bit 790" "Group 0,Group 1" bitfld.long 0x00 21. " GSB789 ,Group Status Bit 789" "Group 0,Group 1" bitfld.long 0x00 20. " GSB788 ,Group Status Bit 788" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB787 ,Group Status Bit 787" "Group 0,Group 1" bitfld.long 0x00 18. " GSB786 ,Group Status Bit 786" "Group 0,Group 1" bitfld.long 0x00 17. " GSB785 ,Group Status Bit 785" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB784 ,Group Status Bit 784" "Group 0,Group 1" bitfld.long 0x00 15. " GSB783 ,Group Status Bit 783" "Group 0,Group 1" bitfld.long 0x00 14. " GSB782 ,Group Status Bit 782" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB781 ,Group Status Bit 781" "Group 0,Group 1" bitfld.long 0x00 12. " GSB780 ,Group Status Bit 780" "Group 0,Group 1" bitfld.long 0x00 11. " GSB779 ,Group Status Bit 779" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB778 ,Group Status Bit 778" "Group 0,Group 1" bitfld.long 0x00 9. " GSB777 ,Group Status Bit 777" "Group 0,Group 1" bitfld.long 0x00 8. " GSB776 ,Group Status Bit 776" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB775 ,Group Status Bit 775" "Group 0,Group 1" bitfld.long 0x00 6. " GSB774 ,Group Status Bit 774" "Group 0,Group 1" bitfld.long 0x00 5. " GSB773 ,Group Status Bit 773" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB772 ,Group Status Bit 772" "Group 0,Group 1" bitfld.long 0x00 3. " GSB771 ,Group Status Bit 771" "Group 0,Group 1" bitfld.long 0x00 2. " GSB770 ,Group Status Bit 770" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB769 ,Group Status Bit 769" "Group 0,Group 1" bitfld.long 0x00 0. " GSB768 ,Group Status Bit 768" "Group 0,Group 1" else rgroup.long 0x0E0++0x03 line.long 0x0 "GICD_IGROUPR24,Interrupt Group Register 24" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x19)&&(PER.ADDRESS.isSECUREEX(ad:0xF9010000+0x00E4)) group.long 0x00E4++0x03 line.long 0x0 "GICD_IGROUPR25,Interrupt Group Register 25 (Secure access)" bitfld.long 0x00 31. " GSB831 ,Group Status Bit 831" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB830 ,Group Status Bit 830" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB829 ,Group Status Bit 829" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB828 ,Group Status Bit 828" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB827 ,Group Status Bit 827" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB826 ,Group Status Bit 826" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB825 ,Group Status Bit 825" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB824 ,Group Status Bit 824" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB823 ,Group Status Bit 823" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB822 ,Group Status Bit 822" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB821 ,Group Status Bit 821" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB820 ,Group Status Bit 820" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB819 ,Group Status Bit 819" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB818 ,Group Status Bit 818" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB817 ,Group Status Bit 817" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB816 ,Group Status Bit 816" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB815 ,Group Status Bit 815" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB814 ,Group Status Bit 814" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB813 ,Group Status Bit 813" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB812 ,Group Status Bit 812" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB811 ,Group Status Bit 811" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB810 ,Group Status Bit 810" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB809 ,Group Status Bit 809" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB808 ,Group Status Bit 808" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB807 ,Group Status Bit 807" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB806 ,Group Status Bit 806" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB805 ,Group Status Bit 805" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB804 ,Group Status Bit 804" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB803 ,Group Status Bit 803" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB802 ,Group Status Bit 802" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB801 ,Group Status Bit 801" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB800 ,Group Status Bit 800" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x19) group.long 0x00E4++0x03 line.long 0x0 "GICD_IGROUPR25,Interrupt Group Register 25 (Non-secure access)" bitfld.long 0x00 31. " GSB831 ,Group Status Bit 831" "Group 0,Group 1" bitfld.long 0x00 30. " GSB830 ,Group Status Bit 830" "Group 0,Group 1" bitfld.long 0x00 29. " GSB829 ,Group Status Bit 829" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB828 ,Group Status Bit 828" "Group 0,Group 1" bitfld.long 0x00 27. " GSB827 ,Group Status Bit 827" "Group 0,Group 1" bitfld.long 0x00 26. " GSB826 ,Group Status Bit 826" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB825 ,Group Status Bit 825" "Group 0,Group 1" bitfld.long 0x00 24. " GSB824 ,Group Status Bit 824" "Group 0,Group 1" bitfld.long 0x00 23. " GSB823 ,Group Status Bit 823" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB822 ,Group Status Bit 822" "Group 0,Group 1" bitfld.long 0x00 21. " GSB821 ,Group Status Bit 821" "Group 0,Group 1" bitfld.long 0x00 20. " GSB820 ,Group Status Bit 820" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB819 ,Group Status Bit 819" "Group 0,Group 1" bitfld.long 0x00 18. " GSB818 ,Group Status Bit 818" "Group 0,Group 1" bitfld.long 0x00 17. " GSB817 ,Group Status Bit 817" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB816 ,Group Status Bit 816" "Group 0,Group 1" bitfld.long 0x00 15. " GSB815 ,Group Status Bit 815" "Group 0,Group 1" bitfld.long 0x00 14. " GSB814 ,Group Status Bit 814" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB813 ,Group Status Bit 813" "Group 0,Group 1" bitfld.long 0x00 12. " GSB812 ,Group Status Bit 812" "Group 0,Group 1" bitfld.long 0x00 11. " GSB811 ,Group Status Bit 811" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB810 ,Group Status Bit 810" "Group 0,Group 1" bitfld.long 0x00 9. " GSB809 ,Group Status Bit 809" "Group 0,Group 1" bitfld.long 0x00 8. " GSB808 ,Group Status Bit 808" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB807 ,Group Status Bit 807" "Group 0,Group 1" bitfld.long 0x00 6. " GSB806 ,Group Status Bit 806" "Group 0,Group 1" bitfld.long 0x00 5. " GSB805 ,Group Status Bit 805" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB804 ,Group Status Bit 804" "Group 0,Group 1" bitfld.long 0x00 3. " GSB803 ,Group Status Bit 803" "Group 0,Group 1" bitfld.long 0x00 2. " GSB802 ,Group Status Bit 802" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB801 ,Group Status Bit 801" "Group 0,Group 1" bitfld.long 0x00 0. " GSB800 ,Group Status Bit 800" "Group 0,Group 1" else rgroup.long 0x00E4++0x03 line.long 0x0 "GICD_IGROUPR25,Interrupt Group Register 25" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x1A)&&(PER.ADDRESS.isSECUREEX(ad:0xF9010000+0x00E8)) group.long 0x00E8++0x03 line.long 0x0 "GICD_IGROUPR26,Interrupt Group Register 26 (Secure access)" bitfld.long 0x00 31. " GSB863 ,Group Status Bit 863" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB862 ,Group Status Bit 862" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB861 ,Group Status Bit 861" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB860 ,Group Status Bit 860" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB859 ,Group Status Bit 859" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB858 ,Group Status Bit 858" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB857 ,Group Status Bit 857" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB856 ,Group Status Bit 856" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB855 ,Group Status Bit 855" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB854 ,Group Status Bit 854" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB853 ,Group Status Bit 853" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB852 ,Group Status Bit 852" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB851 ,Group Status Bit 851" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB850 ,Group Status Bit 850" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB849 ,Group Status Bit 849" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB848 ,Group Status Bit 848" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB847 ,Group Status Bit 847" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB846 ,Group Status Bit 846" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB845 ,Group Status Bit 845" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB844 ,Group Status Bit 844" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB843 ,Group Status Bit 843" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB842 ,Group Status Bit 842" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB841 ,Group Status Bit 841" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB840 ,Group Status Bit 840" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB839 ,Group Status Bit 839" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB838 ,Group Status Bit 838" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB837 ,Group Status Bit 837" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB836 ,Group Status Bit 836" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB835 ,Group Status Bit 835" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB834 ,Group Status Bit 834" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB833 ,Group Status Bit 833" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB832 ,Group Status Bit 832" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x1A) group.long 0x00E8++0x03 line.long 0x0 "GICD_IGROUPR26,Interrupt Group Register 26 (Non-secure access)" bitfld.long 0x00 31. " GSB863 ,Group Status Bit 863" "Group 0,Group 1" bitfld.long 0x00 30. " GSB862 ,Group Status Bit 862" "Group 0,Group 1" bitfld.long 0x00 29. " GSB861 ,Group Status Bit 861" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB860 ,Group Status Bit 860" "Group 0,Group 1" bitfld.long 0x00 27. " GSB859 ,Group Status Bit 859" "Group 0,Group 1" bitfld.long 0x00 26. " GSB858 ,Group Status Bit 858" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB857 ,Group Status Bit 857" "Group 0,Group 1" bitfld.long 0x00 24. " GSB856 ,Group Status Bit 856" "Group 0,Group 1" bitfld.long 0x00 23. " GSB855 ,Group Status Bit 855" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB854 ,Group Status Bit 854" "Group 0,Group 1" bitfld.long 0x00 21. " GSB853 ,Group Status Bit 853" "Group 0,Group 1" bitfld.long 0x00 20. " GSB852 ,Group Status Bit 852" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB851 ,Group Status Bit 851" "Group 0,Group 1" bitfld.long 0x00 18. " GSB850 ,Group Status Bit 850" "Group 0,Group 1" bitfld.long 0x00 17. " GSB849 ,Group Status Bit 849" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB848 ,Group Status Bit 848" "Group 0,Group 1" bitfld.long 0x00 15. " GSB847 ,Group Status Bit 847" "Group 0,Group 1" bitfld.long 0x00 14. " GSB846 ,Group Status Bit 846" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB845 ,Group Status Bit 845" "Group 0,Group 1" bitfld.long 0x00 12. " GSB844 ,Group Status Bit 844" "Group 0,Group 1" bitfld.long 0x00 11. " GSB843 ,Group Status Bit 843" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB842 ,Group Status Bit 842" "Group 0,Group 1" bitfld.long 0x00 9. " GSB841 ,Group Status Bit 841" "Group 0,Group 1" bitfld.long 0x00 8. " GSB840 ,Group Status Bit 840" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB839 ,Group Status Bit 839" "Group 0,Group 1" bitfld.long 0x00 6. " GSB838 ,Group Status Bit 838" "Group 0,Group 1" bitfld.long 0x00 5. " GSB837 ,Group Status Bit 837" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB836 ,Group Status Bit 836" "Group 0,Group 1" bitfld.long 0x00 3. " GSB835 ,Group Status Bit 835" "Group 0,Group 1" bitfld.long 0x00 2. " GSB834 ,Group Status Bit 834" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB833 ,Group Status Bit 833" "Group 0,Group 1" bitfld.long 0x00 0. " GSB832 ,Group Status Bit 832" "Group 0,Group 1" else rgroup.long 0x00E8++0x03 line.long 0x0 "GICD_IGROUPR26,Interrupt Group Register 26" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x1B)&&(PER.ADDRESS.isSECUREEX(ad:0xF9010000+0x00EC)) group.long 0x00EC++0x03 line.long 0x0 "GICD_IGROUPR27,Interrupt Group Register 27 (Secure access)" bitfld.long 0x00 31. " GSB895 ,Group Status Bit 895" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB894 ,Group Status Bit 894" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB893 ,Group Status Bit 893" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB892 ,Group Status Bit 892" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB891 ,Group Status Bit 891" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB890 ,Group Status Bit 890" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB889 ,Group Status Bit 889" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB888 ,Group Status Bit 888" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB887 ,Group Status Bit 887" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB886 ,Group Status Bit 886" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB885 ,Group Status Bit 885" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB884 ,Group Status Bit 884" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB883 ,Group Status Bit 883" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB882 ,Group Status Bit 882" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB881 ,Group Status Bit 881" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB880 ,Group Status Bit 880" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB879 ,Group Status Bit 879" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB878 ,Group Status Bit 878" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB877 ,Group Status Bit 877" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB876 ,Group Status Bit 876" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB875 ,Group Status Bit 875" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB874 ,Group Status Bit 874" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB873 ,Group Status Bit 873" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB872 ,Group Status Bit 872" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB871 ,Group Status Bit 871" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB870 ,Group Status Bit 870" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB869 ,Group Status Bit 869" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB868 ,Group Status Bit 868" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB867 ,Group Status Bit 867" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB866 ,Group Status Bit 866" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB865 ,Group Status Bit 865" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB864 ,Group Status Bit 864" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x1B) group.long 0x00EC++0x03 line.long 0x0 "GICD_IGROUPR27,Interrupt Group Register 27 (Non-Secure access)" bitfld.long 0x00 31. " GSB895 ,Group Status Bit 895" "Group 0,Group 1" bitfld.long 0x00 30. " GSB894 ,Group Status Bit 894" "Group 0,Group 1" bitfld.long 0x00 29. " GSB893 ,Group Status Bit 893" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB892 ,Group Status Bit 892" "Group 0,Group 1" bitfld.long 0x00 27. " GSB891 ,Group Status Bit 891" "Group 0,Group 1" bitfld.long 0x00 26. " GSB890 ,Group Status Bit 890" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB889 ,Group Status Bit 889" "Group 0,Group 1" bitfld.long 0x00 24. " GSB888 ,Group Status Bit 888" "Group 0,Group 1" bitfld.long 0x00 23. " GSB887 ,Group Status Bit 887" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB886 ,Group Status Bit 886" "Group 0,Group 1" bitfld.long 0x00 21. " GSB885 ,Group Status Bit 885" "Group 0,Group 1" bitfld.long 0x00 20. " GSB884 ,Group Status Bit 884" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB883 ,Group Status Bit 883" "Group 0,Group 1" bitfld.long 0x00 18. " GSB882 ,Group Status Bit 882" "Group 0,Group 1" bitfld.long 0x00 17. " GSB881 ,Group Status Bit 881" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB880 ,Group Status Bit 880" "Group 0,Group 1" bitfld.long 0x00 15. " GSB879 ,Group Status Bit 879" "Group 0,Group 1" bitfld.long 0x00 14. " GSB878 ,Group Status Bit 878" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB877 ,Group Status Bit 877" "Group 0,Group 1" bitfld.long 0x00 12. " GSB876 ,Group Status Bit 876" "Group 0,Group 1" bitfld.long 0x00 11. " GSB875 ,Group Status Bit 875" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB874 ,Group Status Bit 874" "Group 0,Group 1" bitfld.long 0x00 9. " GSB873 ,Group Status Bit 873" "Group 0,Group 1" bitfld.long 0x00 8. " GSB872 ,Group Status Bit 872" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB871 ,Group Status Bit 871" "Group 0,Group 1" bitfld.long 0x00 6. " GSB870 ,Group Status Bit 870" "Group 0,Group 1" bitfld.long 0x00 5. " GSB869 ,Group Status Bit 869" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB868 ,Group Status Bit 868" "Group 0,Group 1" bitfld.long 0x00 3. " GSB867 ,Group Status Bit 867" "Group 0,Group 1" bitfld.long 0x00 2. " GSB866 ,Group Status Bit 866" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB865 ,Group Status Bit 865" "Group 0,Group 1" bitfld.long 0x00 0. " GSB864 ,Group Status Bit 864" "Group 0,Group 1" else rgroup.long 0x00EC++0x03 line.long 0x0 "GICD_IGROUPR27,Interrupt Group Register 27" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x1C)&&(PER.ADDRESS.isSECUREEX(ad:0xF9010000+0x00F0)) group.long 0x00F0++0x03 line.long 0x0 "GICD_IGROUPR28,Interrupt Group Register 28 (Secure access)" bitfld.long 0x00 31. " GSB927 ,Group Status Bit 927" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB926 ,Group Status Bit 926" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB925 ,Group Status Bit 925" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB924 ,Group Status Bit 924" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB923 ,Group Status Bit 923" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB922 ,Group Status Bit 922" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB921 ,Group Status Bit 921" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB920 ,Group Status Bit 920" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB919 ,Group Status Bit 919" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB918 ,Group Status Bit 918" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB917 ,Group Status Bit 917" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB916 ,Group Status Bit 916" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB915 ,Group Status Bit 915" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB914 ,Group Status Bit 914" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB913 ,Group Status Bit 913" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB912 ,Group Status Bit 912" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB911 ,Group Status Bit 911" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB910 ,Group Status Bit 910" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB909 ,Group Status Bit 909" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB908 ,Group Status Bit 908" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB907 ,Group Status Bit 907" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB906 ,Group Status Bit 906" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB905 ,Group Status Bit 905" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB904 ,Group Status Bit 904" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB903 ,Group Status Bit 903" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB902 ,Group Status Bit 902" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB901 ,Group Status Bit 901" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB900 ,Group Status Bit 900" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB899 ,Group Status Bit 899" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB898 ,Group Status Bit 898" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB897 ,Group Status Bit 897" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB896 ,Group Status Bit 896" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x1C) group.long 0x00F0++0x03 line.long 0x0 "GICD_IGROUPR28,Interrupt Group Register 28 (Non-secure access)" bitfld.long 0x00 31. " GSB927 ,Group Status Bit 927" "Group 0,Group 1" bitfld.long 0x00 30. " GSB926 ,Group Status Bit 926" "Group 0,Group 1" bitfld.long 0x00 29. " GSB925 ,Group Status Bit 925" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB924 ,Group Status Bit 924" "Group 0,Group 1" bitfld.long 0x00 27. " GSB923 ,Group Status Bit 923" "Group 0,Group 1" bitfld.long 0x00 26. " GSB922 ,Group Status Bit 922" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB921 ,Group Status Bit 921" "Group 0,Group 1" bitfld.long 0x00 24. " GSB920 ,Group Status Bit 920" "Group 0,Group 1" bitfld.long 0x00 23. " GSB919 ,Group Status Bit 919" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB918 ,Group Status Bit 918" "Group 0,Group 1" bitfld.long 0x00 21. " GSB917 ,Group Status Bit 917" "Group 0,Group 1" bitfld.long 0x00 20. " GSB916 ,Group Status Bit 916" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB915 ,Group Status Bit 915" "Group 0,Group 1" bitfld.long 0x00 18. " GSB914 ,Group Status Bit 914" "Group 0,Group 1" bitfld.long 0x00 17. " GSB913 ,Group Status Bit 913" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB912 ,Group Status Bit 912" "Group 0,Group 1" bitfld.long 0x00 15. " GSB911 ,Group Status Bit 911" "Group 0,Group 1" bitfld.long 0x00 14. " GSB910 ,Group Status Bit 910" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB909 ,Group Status Bit 909" "Group 0,Group 1" bitfld.long 0x00 12. " GSB908 ,Group Status Bit 908" "Group 0,Group 1" bitfld.long 0x00 11. " GSB907 ,Group Status Bit 907" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB906 ,Group Status Bit 906" "Group 0,Group 1" bitfld.long 0x00 9. " GSB905 ,Group Status Bit 905" "Group 0,Group 1" bitfld.long 0x00 8. " GSB904 ,Group Status Bit 904" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB903 ,Group Status Bit 903" "Group 0,Group 1" bitfld.long 0x00 6. " GSB902 ,Group Status Bit 902" "Group 0,Group 1" bitfld.long 0x00 5. " GSB901 ,Group Status Bit 901" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB900 ,Group Status Bit 900" "Group 0,Group 1" bitfld.long 0x00 3. " GSB899 ,Group Status Bit 899" "Group 0,Group 1" bitfld.long 0x00 2. " GSB898 ,Group Status Bit 898" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB897 ,Group Status Bit 897" "Group 0,Group 1" bitfld.long 0x00 0. " GSB896 ,Group Status Bit 896" "Group 0,Group 1" else rgroup.long 0x0F0++0x03 line.long 0x0 "GICD_IGROUPR28,Interrupt Group Register 28" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x1D)&&(PER.ADDRESS.isSECUREEX(ad:0xF9010000+0x00F4)) group.long 0x00F4++0x03 line.long 0x0 "GICD_IGROUPR29,Interrupt Group Register 29 (Secure access)" bitfld.long 0x00 31. " GSB959 ,Group Status Bit 959" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB958 ,Group Status Bit 958" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB957 ,Group Status Bit 957" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB956 ,Group Status Bit 956" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB955 ,Group Status Bit 955" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB954 ,Group Status Bit 954" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB953 ,Group Status Bit 953" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB952 ,Group Status Bit 952" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB951 ,Group Status Bit 951" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB950 ,Group Status Bit 950" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB949 ,Group Status Bit 949" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB948 ,Group Status Bit 948" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB947 ,Group Status Bit 947" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB946 ,Group Status Bit 946" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB945 ,Group Status Bit 945" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB944 ,Group Status Bit 944" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB943 ,Group Status Bit 943" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB942 ,Group Status Bit 942" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB941 ,Group Status Bit 941" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB940 ,Group Status Bit 940" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB939 ,Group Status Bit 939" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB938 ,Group Status Bit 938" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB937 ,Group Status Bit 937" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB936 ,Group Status Bit 936" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB935 ,Group Status Bit 935" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB934 ,Group Status Bit 934" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB933 ,Group Status Bit 933" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB932 ,Group Status Bit 932" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB931 ,Group Status Bit 931" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB930 ,Group Status Bit 930" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB929 ,Group Status Bit 929" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB928 ,Group Status Bit 928" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x1D) group.long 0x00F4++0x03 line.long 0x0 "GICD_IGROUPR29,Interrupt Group Register 29 (Non-secure access)" bitfld.long 0x00 31. " GSB959 ,Group Status Bit 959" "Group 0,Group 1" bitfld.long 0x00 30. " GSB958 ,Group Status Bit 958" "Group 0,Group 1" bitfld.long 0x00 29. " GSB957 ,Group Status Bit 957" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB956 ,Group Status Bit 956" "Group 0,Group 1" bitfld.long 0x00 27. " GSB955 ,Group Status Bit 955" "Group 0,Group 1" bitfld.long 0x00 26. " GSB954 ,Group Status Bit 954" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB953 ,Group Status Bit 953" "Group 0,Group 1" bitfld.long 0x00 24. " GSB952 ,Group Status Bit 952" "Group 0,Group 1" bitfld.long 0x00 23. " GSB951 ,Group Status Bit 951" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB950 ,Group Status Bit 950" "Group 0,Group 1" bitfld.long 0x00 21. " GSB949 ,Group Status Bit 949" "Group 0,Group 1" bitfld.long 0x00 20. " GSB948 ,Group Status Bit 948" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB947 ,Group Status Bit 947" "Group 0,Group 1" bitfld.long 0x00 18. " GSB946 ,Group Status Bit 946" "Group 0,Group 1" bitfld.long 0x00 17. " GSB945 ,Group Status Bit 945" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB944 ,Group Status Bit 944" "Group 0,Group 1" bitfld.long 0x00 15. " GSB943 ,Group Status Bit 943" "Group 0,Group 1" bitfld.long 0x00 14. " GSB942 ,Group Status Bit 942" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB941 ,Group Status Bit 941" "Group 0,Group 1" bitfld.long 0x00 12. " GSB940 ,Group Status Bit 940" "Group 0,Group 1" bitfld.long 0x00 11. " GSB939 ,Group Status Bit 939" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB938 ,Group Status Bit 938" "Group 0,Group 1" bitfld.long 0x00 9. " GSB937 ,Group Status Bit 937" "Group 0,Group 1" bitfld.long 0x00 8. " GSB936 ,Group Status Bit 936" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB935 ,Group Status Bit 935" "Group 0,Group 1" bitfld.long 0x00 6. " GSB934 ,Group Status Bit 934" "Group 0,Group 1" bitfld.long 0x00 5. " GSB933 ,Group Status Bit 933" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB932 ,Group Status Bit 932" "Group 0,Group 1" bitfld.long 0x00 3. " GSB931 ,Group Status Bit 931" "Group 0,Group 1" bitfld.long 0x00 2. " GSB930 ,Group Status Bit 930" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB929 ,Group Status Bit 929" "Group 0,Group 1" bitfld.long 0x00 0. " GSB928 ,Group Status Bit 928" "Group 0,Group 1" else rgroup.long 0x00F4++0x03 line.long 0x0 "GICD_IGROUPR29,Interrupt Group Register 29" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x1E)&&(PER.ADDRESS.isSECUREEX(ad:0xF9010000+0x00F8)) group.long 0x00F8++0x03 line.long 0x0 "GICD_IGROUPR30,Interrupt Group Register 30 (Secure access)" bitfld.long 0x00 31. " GSB991 ,Group Status Bit 991" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB990 ,Group Status Bit 990" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB989 ,Group Status Bit 989" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB988 ,Group Status Bit 988" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB987 ,Group Status Bit 987" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB986 ,Group Status Bit 986" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB985 ,Group Status Bit 985" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB984 ,Group Status Bit 984" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB983 ,Group Status Bit 983" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB982 ,Group Status Bit 982" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB981 ,Group Status Bit 981" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB980 ,Group Status Bit 980" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB979 ,Group Status Bit 979" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB978 ,Group Status Bit 978" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB977 ,Group Status Bit 977" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB976 ,Group Status Bit 976" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB975 ,Group Status Bit 975" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB974 ,Group Status Bit 974" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB973 ,Group Status Bit 973" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB972 ,Group Status Bit 972" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB971 ,Group Status Bit 971" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB970 ,Group Status Bit 970" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB969 ,Group Status Bit 969" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB968 ,Group Status Bit 968" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB967 ,Group Status Bit 967" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB966 ,Group Status Bit 966" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB965 ,Group Status Bit 965" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB964 ,Group Status Bit 964" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB963 ,Group Status Bit 963" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB962 ,Group Status Bit 962" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB961 ,Group Status Bit 961" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB960 ,Group Status Bit 960" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x1E) group.long 0x00F8++0x03 line.long 0x0 "GICD_IGROUPR30,Interrupt Group Register 30 (Non-secure access)" bitfld.long 0x00 31. " GSB991 ,Group Status Bit 991" "Group 0,Group 1" bitfld.long 0x00 30. " GSB990 ,Group Status Bit 990" "Group 0,Group 1" bitfld.long 0x00 29. " GSB989 ,Group Status Bit 989" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB988 ,Group Status Bit 988" "Group 0,Group 1" bitfld.long 0x00 27. " GSB987 ,Group Status Bit 987" "Group 0,Group 1" bitfld.long 0x00 26. " GSB986 ,Group Status Bit 986" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB985 ,Group Status Bit 985" "Group 0,Group 1" bitfld.long 0x00 24. " GSB984 ,Group Status Bit 984" "Group 0,Group 1" bitfld.long 0x00 23. " GSB983 ,Group Status Bit 983" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB982 ,Group Status Bit 982" "Group 0,Group 1" bitfld.long 0x00 21. " GSB981 ,Group Status Bit 981" "Group 0,Group 1" bitfld.long 0x00 20. " GSB980 ,Group Status Bit 980" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB979 ,Group Status Bit 979" "Group 0,Group 1" bitfld.long 0x00 18. " GSB978 ,Group Status Bit 978" "Group 0,Group 1" bitfld.long 0x00 17. " GSB977 ,Group Status Bit 977" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB976 ,Group Status Bit 976" "Group 0,Group 1" bitfld.long 0x00 15. " GSB975 ,Group Status Bit 975" "Group 0,Group 1" bitfld.long 0x00 14. " GSB974 ,Group Status Bit 974" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB973 ,Group Status Bit 973" "Group 0,Group 1" bitfld.long 0x00 12. " GSB972 ,Group Status Bit 972" "Group 0,Group 1" bitfld.long 0x00 11. " GSB971 ,Group Status Bit 971" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB970 ,Group Status Bit 970" "Group 0,Group 1" bitfld.long 0x00 9. " GSB969 ,Group Status Bit 969" "Group 0,Group 1" bitfld.long 0x00 8. " GSB968 ,Group Status Bit 968" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB967 ,Group Status Bit 967" "Group 0,Group 1" bitfld.long 0x00 6. " GSB966 ,Group Status Bit 966" "Group 0,Group 1" bitfld.long 0x00 5. " GSB965 ,Group Status Bit 965" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB964 ,Group Status Bit 964" "Group 0,Group 1" bitfld.long 0x00 3. " GSB963 ,Group Status Bit 963" "Group 0,Group 1" bitfld.long 0x00 2. " GSB962 ,Group Status Bit 962" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB961 ,Group Status Bit 961" "Group 0,Group 1" bitfld.long 0x00 0. " GSB960 ,Group Status Bit 960" "Group 0,Group 1" else rgroup.long 0x00F8++0x03 line.long 0x0 "GICD_IGROUPR30,Interrupt Group Register 30" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)==0x1F)&&(PER.ADDRESS.isSECUREEX(ad:0xF9010000+0x00FC)) group.long 0x00FC++0x03 line.long 0x0 "GICD_IGROUPR31,Interrupt Group Register 31 (Secure access)" bitfld.long 0x00 27. " GSB1019 ,Group Status Bit 1019" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB1018 ,Group Status Bit 1018" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB1017 ,Group Status Bit 1017" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB1016 ,Group Status Bit 1016" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB1015 ,Group Status Bit 1015" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB1014 ,Group Status Bit 1014" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB1013 ,Group Status Bit 1013" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB1012 ,Group Status Bit 1012" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB1011 ,Group Status Bit 1011" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB1010 ,Group Status Bit 1010" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB1009 ,Group Status Bit 1009" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB1008 ,Group Status Bit 1008" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB1007 ,Group Status Bit 1007" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB1006 ,Group Status Bit 1006" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB1005 ,Group Status Bit 1005" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB1004 ,Group Status Bit 1004" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB1003 ,Group Status Bit 1003" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB1002 ,Group Status Bit 1002" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB1001 ,Group Status Bit 1001" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB1000 ,Group Status Bit 1000" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB999 ,Group Status Bit 999" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB998 ,Group Status Bit 998" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB997 ,Group Status Bit 997" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB996 ,Group Status Bit 996" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB995 ,Group Status Bit 995" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB994 ,Group Status Bit 994" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB993 ,Group Status Bit 993" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB992 ,Group Status Bit 992" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xF9010000+0x04))&0x0000001F)==0x1F) group.long 0x00FC++0x03 line.long 0x0 "GICD_IGROUPR31,Interrupt Group Register 31 (Non-secure access)" bitfld.long 0x00 27. " GSB1019 ,Group Status Bit 1019" "Group 0,Group 1" bitfld.long 0x00 26. " GSB1018 ,Group Status Bit 1018" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB1017 ,Group Status Bit 1017" "Group 0,Group 1" bitfld.long 0x00 24. " GSB1016 ,Group Status Bit 1016" "Group 0,Group 1" bitfld.long 0x00 23. " GSB1015 ,Group Status Bit 1015" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB1014 ,Group Status Bit 1014" "Group 0,Group 1" bitfld.long 0x00 21. " GSB1013 ,Group Status Bit 1013" "Group 0,Group 1" bitfld.long 0x00 20. " GSB1012 ,Group Status Bit 1012" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB1011 ,Group Status Bit 1011" "Group 0,Group 1" bitfld.long 0x00 18. " GSB1010 ,Group Status Bit 1010" "Group 0,Group 1" bitfld.long 0x00 17. " GSB1009 ,Group Status Bit 1009" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB1008 ,Group Status Bit 1008" "Group 0,Group 1" bitfld.long 0x00 15. " GSB1007 ,Group Status Bit 1007" "Group 0,Group 1" bitfld.long 0x00 14. " GSB1006 ,Group Status Bit 1006" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB1005 ,Group Status Bit 1005" "Group 0,Group 1" bitfld.long 0x00 12. " GSB1004 ,Group Status Bit 1004" "Group 0,Group 1" bitfld.long 0x00 11. " GSB1003 ,Group Status Bit 1003" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB1002 ,Group Status Bit 1002" "Group 0,Group 1" bitfld.long 0x00 9. " GSB1001 ,Group Status Bit 1001" "Group 0,Group 1" bitfld.long 0x00 8. " GSB1000 ,Group Status Bit 1000" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB999 ,Group Status Bit 999" "Group 0,Group 1" bitfld.long 0x00 6. " GSB998 ,Group Status Bit 998" "Group 0,Group 1" bitfld.long 0x00 5. " GSB997 ,Group Status Bit 997" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB996 ,Group Status Bit 996" "Group 0,Group 1" bitfld.long 0x00 3. " GSB995 ,Group Status Bit 995" "Group 0,Group 1" bitfld.long 0x00 2. " GSB994 ,Group Status Bit 994" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB993 ,Group Status Bit 993" "Group 0,Group 1" bitfld.long 0x00 0. " GSB992 ,Group Status Bit 992" "Group 0,Group 1" else rgroup.long 0x00FC++0x03 line.long 0x0 "GICD_IGROUPR31,Interrupt Group Register 31" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif tree.end endif width 24. tree "Set/Clear Enable Registers" group.long 0x0100++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER0,Interrupt Set/Clear Enable Register 0" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB31 ,Set/Clear Enable Bit 31" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB30 ,Set/Clear Enable Bit 30" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB29 ,Set/Clear Enable Bit 29" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB28 ,Set/Clear Enable Bit 28" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB27 ,Set/Clear Enable Bit 27" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB26 ,Set/Clear Enable Bit 26" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB25 ,Set/Clear Enable Bit 25" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB24 ,Set/Clear Enable Bit 24" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB23 ,Set/Clear Enable Bit 23" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB22 ,Set/Clear Enable Bit 22" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB21 ,Set/Clear Enable Bit 21" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB20 ,Set/Clear Enable Bit 20" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB19 ,Set/Clear Enable Bit 19" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB18 ,Set/Clear Enable Bit 18" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB17 ,Set/Clear Enable Bit 17" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB16 ,Set/Clear Enable Bit 16" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB15 ,Set/Clear Enable Bit 15" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB14 ,Set/Clear Enable Bit 14" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB13 ,Set/Clear Enable Bit 13" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB12 ,Set/Clear Enable Bit 12" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB11 ,Set/Clear Enable Bit 11" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB10 ,Set/Clear Enable Bit 10" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB9 ,Set/Clear Enable Bit 9" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB8 ,Set/Clear Enable Bit 8" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB7 ,Set/Clear Enable Bit 7" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB6 ,Set/Clear Enable Bit 6" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB5 ,Set/Clear Enable Bit 5" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB4 ,Set/Clear Enable Bit 4" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB3 ,Set/Clear Enable Bit 3" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB2 ,Set/Clear Enable Bit 2" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB1 ,Set/Clear Enable Bit 1" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB0 ,Set/Clear Enable Bit 0" "Disabled,Enabled" if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x01) group.long 0x0104++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER1,Interrupt Set/Clear Enable Register 1" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB63 ,Set/Clear Enable Bit 63" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB62 ,Set/Clear Enable Bit 62" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB61 ,Set/Clear Enable Bit 61" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB60 ,Set/Clear Enable Bit 60" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB59 ,Set/Clear Enable Bit 59" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB58 ,Set/Clear Enable Bit 58" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB57 ,Set/Clear Enable Bit 57" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB56 ,Set/Clear Enable Bit 56" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB55 ,Set/Clear Enable Bit 55" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB54 ,Set/Clear Enable Bit 54" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB53 ,Set/Clear Enable Bit 53" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB52 ,Set/Clear Enable Bit 52" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB51 ,Set/Clear Enable Bit 51" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB50 ,Set/Clear Enable Bit 50" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB49 ,Set/Clear Enable Bit 49" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB48 ,Set/Clear Enable Bit 48" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB47 ,Set/Clear Enable Bit 47" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB46 ,Set/Clear Enable Bit 46" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB45 ,Set/Clear Enable Bit 45" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB44 ,Set/Clear Enable Bit 44" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB43 ,Set/Clear Enable Bit 43" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB42 ,Set/Clear Enable Bit 42" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB41 ,Set/Clear Enable Bit 41" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB40 ,Set/Clear Enable Bit 40" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB39 ,Set/Clear Enable Bit 39" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB38 ,Set/Clear Enable Bit 38" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB37 ,Set/Clear Enable Bit 37" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB36 ,Set/Clear Enable Bit 36" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB35 ,Set/Clear Enable Bit 35" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB34 ,Set/Clear Enable Bit 34" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB33 ,Set/Clear Enable Bit 33" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB32 ,Set/Clear Enable Bit 32" "Disabled,Enabled" else rgroup.long 0x0104++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER1,Interrupt Set/Clear Enable Register 1" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x02) group.long 0x0108++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER2,Interrupt Set/Clear Enable Register 2" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB95 ,Set/Clear Enable Bit 95" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB94 ,Set/Clear Enable Bit 94" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB93 ,Set/Clear Enable Bit 93" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB92 ,Set/Clear Enable Bit 92" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB91 ,Set/Clear Enable Bit 91" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB90 ,Set/Clear Enable Bit 90" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB89 ,Set/Clear Enable Bit 89" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB88 ,Set/Clear Enable Bit 88" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB87 ,Set/Clear Enable Bit 87" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB86 ,Set/Clear Enable Bit 86" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB85 ,Set/Clear Enable Bit 85" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB84 ,Set/Clear Enable Bit 84" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB83 ,Set/Clear Enable Bit 83" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB82 ,Set/Clear Enable Bit 82" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB81 ,Set/Clear Enable Bit 81" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB80 ,Set/Clear Enable Bit 80" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB79 ,Set/Clear Enable Bit 79" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB78 ,Set/Clear Enable Bit 78" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB77 ,Set/Clear Enable Bit 77" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB76 ,Set/Clear Enable Bit 76" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB75 ,Set/Clear Enable Bit 75" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB74 ,Set/Clear Enable Bit 74" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB73 ,Set/Clear Enable Bit 73" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB72 ,Set/Clear Enable Bit 72" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB71 ,Set/Clear Enable Bit 71" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB70 ,Set/Clear Enable Bit 70" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB69 ,Set/Clear Enable Bit 69" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB68 ,Set/Clear Enable Bit 68" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB67 ,Set/Clear Enable Bit 67" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB66 ,Set/Clear Enable Bit 66" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB65 ,Set/Clear Enable Bit 65" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB64 ,Set/Clear Enable Bit 64" "Disabled,Enabled" else rgroup.long 0x0108++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER2,Interrupt Set/Clear Enable Register 2" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x03) group.long 0x010C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER3,Interrupt Set/Clear Enable Register 3" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB127 ,Set/Clear Enable Bit 127" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB126 ,Set/Clear Enable Bit 126" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB125 ,Set/Clear Enable Bit 125" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB124 ,Set/Clear Enable Bit 124" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB123 ,Set/Clear Enable Bit 123" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB122 ,Set/Clear Enable Bit 122" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB121 ,Set/Clear Enable Bit 121" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB120 ,Set/Clear Enable Bit 120" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB119 ,Set/Clear Enable Bit 119" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB118 ,Set/Clear Enable Bit 118" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB117 ,Set/Clear Enable Bit 117" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB116 ,Set/Clear Enable Bit 116" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB115 ,Set/Clear Enable Bit 115" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB114 ,Set/Clear Enable Bit 114" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB113 ,Set/Clear Enable Bit 113" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB112 ,Set/Clear Enable Bit 112" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB111 ,Set/Clear Enable Bit 111" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB110 ,Set/Clear Enable Bit 110" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB109 ,Set/Clear Enable Bit 109" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB108 ,Set/Clear Enable Bit 108" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB107 ,Set/Clear Enable Bit 107" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB106 ,Set/Clear Enable Bit 106" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB105 ,Set/Clear Enable Bit 105" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB104 ,Set/Clear Enable Bit 104" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB103 ,Set/Clear Enable Bit 103" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB102 ,Set/Clear Enable Bit 102" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB101 ,Set/Clear Enable Bit 101" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB100 ,Set/Clear Enable Bit 100" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB99 ,Set/Clear Enable Bit 99" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB98 ,Set/Clear Enable Bit 98" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB97 ,Set/Clear Enable Bit 97" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB96 ,Set/Clear Enable Bit 96" "Disabled,Enabled" else rgroup.long 0x010C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER3,Interrupt Set/Clear Enable Register 3" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x04) group.long 0x0110++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER4,Interrupt Set/Clear Enable Register 4" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB159 ,Set/Clear Enable Bit 159" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB158 ,Set/Clear Enable Bit 158" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB157 ,Set/Clear Enable Bit 157" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB156 ,Set/Clear Enable Bit 156" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB155 ,Set/Clear Enable Bit 155" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB154 ,Set/Clear Enable Bit 154" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB153 ,Set/Clear Enable Bit 153" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB152 ,Set/Clear Enable Bit 152" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB151 ,Set/Clear Enable Bit 151" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB150 ,Set/Clear Enable Bit 150" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB149 ,Set/Clear Enable Bit 149" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB148 ,Set/Clear Enable Bit 148" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB147 ,Set/Clear Enable Bit 147" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB146 ,Set/Clear Enable Bit 146" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB145 ,Set/Clear Enable Bit 145" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB144 ,Set/Clear Enable Bit 144" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB143 ,Set/Clear Enable Bit 143" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB142 ,Set/Clear Enable Bit 142" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB141 ,Set/Clear Enable Bit 141" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB140 ,Set/Clear Enable Bit 140" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB139 ,Set/Clear Enable Bit 139" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB138 ,Set/Clear Enable Bit 138" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB137 ,Set/Clear Enable Bit 137" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB136 ,Set/Clear Enable Bit 136" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB135 ,Set/Clear Enable Bit 135" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB134 ,Set/Clear Enable Bit 134" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB133 ,Set/Clear Enable Bit 133" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB132 ,Set/Clear Enable Bit 132" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB131 ,Set/Clear Enable Bit 131" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB130 ,Set/Clear Enable Bit 130" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB129 ,Set/Clear Enable Bit 129" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB128 ,Set/Clear Enable Bit 128" "Disabled,Enabled" else rgroup.long 0x0110++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER4,Interrupt Set/Clear Enable Register 4" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x05) group.long 0x0114++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER5,Interrupt Set/Clear Enable Register 5" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB191 ,Set/Clear Enable Bit 191" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB190 ,Set/Clear Enable Bit 190" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB189 ,Set/Clear Enable Bit 189" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB188 ,Set/Clear Enable Bit 188" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB187 ,Set/Clear Enable Bit 187" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB186 ,Set/Clear Enable Bit 186" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB185 ,Set/Clear Enable Bit 185" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB184 ,Set/Clear Enable Bit 184" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB183 ,Set/Clear Enable Bit 183" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB182 ,Set/Clear Enable Bit 182" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB181 ,Set/Clear Enable Bit 181" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB180 ,Set/Clear Enable Bit 180" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB179 ,Set/Clear Enable Bit 179" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB178 ,Set/Clear Enable Bit 178" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB177 ,Set/Clear Enable Bit 177" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB176 ,Set/Clear Enable Bit 176" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB175 ,Set/Clear Enable Bit 175" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB174 ,Set/Clear Enable Bit 174" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB173 ,Set/Clear Enable Bit 173" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB172 ,Set/Clear Enable Bit 172" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB171 ,Set/Clear Enable Bit 171" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB170 ,Set/Clear Enable Bit 170" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB169 ,Set/Clear Enable Bit 169" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB168 ,Set/Clear Enable Bit 168" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB167 ,Set/Clear Enable Bit 167" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB166 ,Set/Clear Enable Bit 166" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB165 ,Set/Clear Enable Bit 165" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB164 ,Set/Clear Enable Bit 164" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB163 ,Set/Clear Enable Bit 163" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB162 ,Set/Clear Enable Bit 162" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB161 ,Set/Clear Enable Bit 161" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB160 ,Set/Clear Enable Bit 160" "Disabled,Enabled" else rgroup.long 0x0114++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER5,Interrupt Set/Clear Enable Register 5" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x06) group.long 0x0118++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER6,Interrupt Set/Clear Enable Register 6" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB223 ,Set/Clear Enable Bit 223" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB222 ,Set/Clear Enable Bit 222" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB221 ,Set/Clear Enable Bit 221" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB220 ,Set/Clear Enable Bit 220" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB219 ,Set/Clear Enable Bit 219" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB218 ,Set/Clear Enable Bit 218" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB217 ,Set/Clear Enable Bit 217" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB216 ,Set/Clear Enable Bit 216" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB215 ,Set/Clear Enable Bit 215" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB214 ,Set/Clear Enable Bit 214" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB213 ,Set/Clear Enable Bit 213" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB212 ,Set/Clear Enable Bit 212" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB211 ,Set/Clear Enable Bit 211" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB210 ,Set/Clear Enable Bit 210" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB209 ,Set/Clear Enable Bit 209" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB208 ,Set/Clear Enable Bit 208" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB207 ,Set/Clear Enable Bit 207" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB206 ,Set/Clear Enable Bit 206" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB205 ,Set/Clear Enable Bit 205" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB204 ,Set/Clear Enable Bit 204" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB203 ,Set/Clear Enable Bit 203" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB202 ,Set/Clear Enable Bit 202" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB201 ,Set/Clear Enable Bit 201" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB200 ,Set/Clear Enable Bit 200" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB199 ,Set/Clear Enable Bit 199" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB198 ,Set/Clear Enable Bit 198" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB197 ,Set/Clear Enable Bit 197" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB196 ,Set/Clear Enable Bit 196" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB195 ,Set/Clear Enable Bit 195" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB194 ,Set/Clear Enable Bit 194" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB193 ,Set/Clear Enable Bit 193" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB192 ,Set/Clear Enable Bit 192" "Disabled,Enabled" else rgroup.long 0x0118++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER6,Interrupt Set/Clear Enable Register 6" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x07) group.long 0x011C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER7,Interrupt Set/Clear Enable Register 7" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB255 ,Set/Clear Enable Bit 255" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB254 ,Set/Clear Enable Bit 254" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB253 ,Set/Clear Enable Bit 253" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB252 ,Set/Clear Enable Bit 252" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB251 ,Set/Clear Enable Bit 251" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB250 ,Set/Clear Enable Bit 250" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB249 ,Set/Clear Enable Bit 249" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB248 ,Set/Clear Enable Bit 248" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB247 ,Set/Clear Enable Bit 247" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB246 ,Set/Clear Enable Bit 246" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB245 ,Set/Clear Enable Bit 245" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB244 ,Set/Clear Enable Bit 244" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB243 ,Set/Clear Enable Bit 243" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB242 ,Set/Clear Enable Bit 242" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB241 ,Set/Clear Enable Bit 241" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB240 ,Set/Clear Enable Bit 240" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB239 ,Set/Clear Enable Bit 239" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB238 ,Set/Clear Enable Bit 238" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB237 ,Set/Clear Enable Bit 237" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB236 ,Set/Clear Enable Bit 236" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB235 ,Set/Clear Enable Bit 235" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB234 ,Set/Clear Enable Bit 234" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB233 ,Set/Clear Enable Bit 233" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB232 ,Set/Clear Enable Bit 232" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB231 ,Set/Clear Enable Bit 231" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB230 ,Set/Clear Enable Bit 230" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB229 ,Set/Clear Enable Bit 229" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB228 ,Set/Clear Enable Bit 228" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB227 ,Set/Clear Enable Bit 227" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB226 ,Set/Clear Enable Bit 226" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB225 ,Set/Clear Enable Bit 225" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB224 ,Set/Clear Enable Bit 224" "Disabled,Enabled" else rgroup.long 0x011C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER7,Interrupt Set/Clear Enable Register 7" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x08) group.long 0x0120++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER8,Interrupt Set/Clear Enable Register 8" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB287 ,Set/Clear Enable Bit 287" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB286 ,Set/Clear Enable Bit 286" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB285 ,Set/Clear Enable Bit 285" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB284 ,Set/Clear Enable Bit 284" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB283 ,Set/Clear Enable Bit 283" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB282 ,Set/Clear Enable Bit 282" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB281 ,Set/Clear Enable Bit 281" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB280 ,Set/Clear Enable Bit 280" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB279 ,Set/Clear Enable Bit 279" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB278 ,Set/Clear Enable Bit 278" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB277 ,Set/Clear Enable Bit 277" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB276 ,Set/Clear Enable Bit 276" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB275 ,Set/Clear Enable Bit 275" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB274 ,Set/Clear Enable Bit 274" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB273 ,Set/Clear Enable Bit 273" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB272 ,Set/Clear Enable Bit 272" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB271 ,Set/Clear Enable Bit 271" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB270 ,Set/Clear Enable Bit 270" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB269 ,Set/Clear Enable Bit 269" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB268 ,Set/Clear Enable Bit 268" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB267 ,Set/Clear Enable Bit 267" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB266 ,Set/Clear Enable Bit 266" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB265 ,Set/Clear Enable Bit 265" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB264 ,Set/Clear Enable Bit 264" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB263 ,Set/Clear Enable Bit 263" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB262 ,Set/Clear Enable Bit 262" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB261 ,Set/Clear Enable Bit 261" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB260 ,Set/Clear Enable Bit 260" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB259 ,Set/Clear Enable Bit 259" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB258 ,Set/Clear Enable Bit 258" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB257 ,Set/Clear Enable Bit 257" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB256 ,Set/Clear Enable Bit 256" "Disabled,Enabled" else rgroup.long 0x0120++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER8,Interrupt Set/Clear Enable Register 8" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x09) group.long 0x0124++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER9,Interrupt Set/Clear Enable Register 9" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB319 ,Set/Clear Enable Bit 319" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB318 ,Set/Clear Enable Bit 318" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB317 ,Set/Clear Enable Bit 317" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB316 ,Set/Clear Enable Bit 316" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB315 ,Set/Clear Enable Bit 315" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB314 ,Set/Clear Enable Bit 314" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB313 ,Set/Clear Enable Bit 313" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB312 ,Set/Clear Enable Bit 312" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB311 ,Set/Clear Enable Bit 311" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB310 ,Set/Clear Enable Bit 310" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB309 ,Set/Clear Enable Bit 309" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB308 ,Set/Clear Enable Bit 308" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB307 ,Set/Clear Enable Bit 307" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB306 ,Set/Clear Enable Bit 306" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB305 ,Set/Clear Enable Bit 305" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB304 ,Set/Clear Enable Bit 304" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB303 ,Set/Clear Enable Bit 303" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB302 ,Set/Clear Enable Bit 302" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB301 ,Set/Clear Enable Bit 301" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB300 ,Set/Clear Enable Bit 300" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB299 ,Set/Clear Enable Bit 299" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB298 ,Set/Clear Enable Bit 298" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB297 ,Set/Clear Enable Bit 297" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB296 ,Set/Clear Enable Bit 296" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB295 ,Set/Clear Enable Bit 295" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB294 ,Set/Clear Enable Bit 294" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB293 ,Set/Clear Enable Bit 293" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB292 ,Set/Clear Enable Bit 292" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB291 ,Set/Clear Enable Bit 291" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB290 ,Set/Clear Enable Bit 290" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB289 ,Set/Clear Enable Bit 289" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB288 ,Set/Clear Enable Bit 288" "Disabled,Enabled" else rgroup.long 0x0124++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER9,Interrupt Set/Clear Enable Register 9" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x0A) group.long 0x0128++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER10,Interrupt Set/Clear Enable Register 10" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB351 ,Set/Clear Enable Bit 351" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB350 ,Set/Clear Enable Bit 350" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB349 ,Set/Clear Enable Bit 349" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB348 ,Set/Clear Enable Bit 348" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB347 ,Set/Clear Enable Bit 347" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB346 ,Set/Clear Enable Bit 346" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB345 ,Set/Clear Enable Bit 345" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB344 ,Set/Clear Enable Bit 344" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB343 ,Set/Clear Enable Bit 343" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB342 ,Set/Clear Enable Bit 342" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB341 ,Set/Clear Enable Bit 341" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB340 ,Set/Clear Enable Bit 340" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB339 ,Set/Clear Enable Bit 339" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB338 ,Set/Clear Enable Bit 338" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB337 ,Set/Clear Enable Bit 337" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB336 ,Set/Clear Enable Bit 336" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB335 ,Set/Clear Enable Bit 335" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB334 ,Set/Clear Enable Bit 334" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB333 ,Set/Clear Enable Bit 333" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB332 ,Set/Clear Enable Bit 332" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB331 ,Set/Clear Enable Bit 331" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB330 ,Set/Clear Enable Bit 330" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB329 ,Set/Clear Enable Bit 329" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB328 ,Set/Clear Enable Bit 328" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB327 ,Set/Clear Enable Bit 327" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB326 ,Set/Clear Enable Bit 326" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB325 ,Set/Clear Enable Bit 325" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB324 ,Set/Clear Enable Bit 324" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB323 ,Set/Clear Enable Bit 323" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB322 ,Set/Clear Enable Bit 322" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB321 ,Set/Clear Enable Bit 321" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB320 ,Set/Clear Enable Bit 320" "Disabled,Enabled" else rgroup.long 0x0128++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER10,Interrupt Set/Clear Enable Register 10" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x0B) group.long 0x012C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER11,Interrupt Set/Clear Enable Register 11" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB383 ,Set/Clear Enable Bit 383" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB382 ,Set/Clear Enable Bit 382" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB381 ,Set/Clear Enable Bit 381" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB380 ,Set/Clear Enable Bit 380" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB379 ,Set/Clear Enable Bit 379" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB378 ,Set/Clear Enable Bit 378" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB377 ,Set/Clear Enable Bit 377" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB376 ,Set/Clear Enable Bit 376" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB375 ,Set/Clear Enable Bit 375" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB374 ,Set/Clear Enable Bit 374" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB373 ,Set/Clear Enable Bit 373" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB372 ,Set/Clear Enable Bit 372" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB371 ,Set/Clear Enable Bit 371" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB370 ,Set/Clear Enable Bit 370" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB369 ,Set/Clear Enable Bit 369" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB368 ,Set/Clear Enable Bit 368" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB367 ,Set/Clear Enable Bit 367" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB366 ,Set/Clear Enable Bit 366" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB365 ,Set/Clear Enable Bit 365" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB364 ,Set/Clear Enable Bit 364" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB363 ,Set/Clear Enable Bit 363" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB362 ,Set/Clear Enable Bit 362" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB361 ,Set/Clear Enable Bit 361" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB360 ,Set/Clear Enable Bit 360" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB359 ,Set/Clear Enable Bit 359" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB358 ,Set/Clear Enable Bit 358" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB357 ,Set/Clear Enable Bit 357" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB356 ,Set/Clear Enable Bit 356" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB355 ,Set/Clear Enable Bit 355" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB354 ,Set/Clear Enable Bit 354" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB353 ,Set/Clear Enable Bit 353" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB352 ,Set/Clear Enable Bit 352" "Disabled,Enabled" else rgroup.long 0x012C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER11,Interrupt Set/Clear Enable Register 11" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x0C) group.long 0x0130++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER12,Interrupt Set/Clear Enable Register 12" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB415 ,Set/Clear Enable Bit 415" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB414 ,Set/Clear Enable Bit 414" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB413 ,Set/Clear Enable Bit 413" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB412 ,Set/Clear Enable Bit 412" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB411 ,Set/Clear Enable Bit 411" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB410 ,Set/Clear Enable Bit 410" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB409 ,Set/Clear Enable Bit 409" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB408 ,Set/Clear Enable Bit 408" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB407 ,Set/Clear Enable Bit 407" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB406 ,Set/Clear Enable Bit 406" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB405 ,Set/Clear Enable Bit 405" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB404 ,Set/Clear Enable Bit 404" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB403 ,Set/Clear Enable Bit 403" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB402 ,Set/Clear Enable Bit 402" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB401 ,Set/Clear Enable Bit 401" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB400 ,Set/Clear Enable Bit 400" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB399 ,Set/Clear Enable Bit 399" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB398 ,Set/Clear Enable Bit 398" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB397 ,Set/Clear Enable Bit 397" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB396 ,Set/Clear Enable Bit 396" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB395 ,Set/Clear Enable Bit 395" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB394 ,Set/Clear Enable Bit 394" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB393 ,Set/Clear Enable Bit 393" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB392 ,Set/Clear Enable Bit 392" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB391 ,Set/Clear Enable Bit 391" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB390 ,Set/Clear Enable Bit 390" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB389 ,Set/Clear Enable Bit 389" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB388 ,Set/Clear Enable Bit 388" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB387 ,Set/Clear Enable Bit 387" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB386 ,Set/Clear Enable Bit 386" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB385 ,Set/Clear Enable Bit 385" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB384 ,Set/Clear Enable Bit 384" "Disabled,Enabled" else rgroup.long 0x0130++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER12,Interrupt Set/Clear Enable Register 12" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x0D) group.long 0x0134++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER13,Interrupt Set/Clear Enable Register 13" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB447 ,Set/Clear Enable Bit 447" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB446 ,Set/Clear Enable Bit 446" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB445 ,Set/Clear Enable Bit 445" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB444 ,Set/Clear Enable Bit 444" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB443 ,Set/Clear Enable Bit 443" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB442 ,Set/Clear Enable Bit 442" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB441 ,Set/Clear Enable Bit 441" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB440 ,Set/Clear Enable Bit 440" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB439 ,Set/Clear Enable Bit 439" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB438 ,Set/Clear Enable Bit 438" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB437 ,Set/Clear Enable Bit 437" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB436 ,Set/Clear Enable Bit 436" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB435 ,Set/Clear Enable Bit 435" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB434 ,Set/Clear Enable Bit 434" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB433 ,Set/Clear Enable Bit 433" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB432 ,Set/Clear Enable Bit 432" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB431 ,Set/Clear Enable Bit 431" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB430 ,Set/Clear Enable Bit 430" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB429 ,Set/Clear Enable Bit 429" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB428 ,Set/Clear Enable Bit 428" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB427 ,Set/Clear Enable Bit 427" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB426 ,Set/Clear Enable Bit 426" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB425 ,Set/Clear Enable Bit 425" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB424 ,Set/Clear Enable Bit 424" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB423 ,Set/Clear Enable Bit 423" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB422 ,Set/Clear Enable Bit 422" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB421 ,Set/Clear Enable Bit 421" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB420 ,Set/Clear Enable Bit 420" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB419 ,Set/Clear Enable Bit 419" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB418 ,Set/Clear Enable Bit 418" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB417 ,Set/Clear Enable Bit 417" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB416 ,Set/Clear Enable Bit 416" "Disabled,Enabled" else rgroup.long 0x0134++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER13,Interrupt Set/Clear Enable Register 13" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x0E) group.long 0x0138++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER14,Interrupt Set/Clear Enable Register 14" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB479 ,Set/Clear Enable Bit 479" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB478 ,Set/Clear Enable Bit 478" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB477 ,Set/Clear Enable Bit 477" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB476 ,Set/Clear Enable Bit 476" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB475 ,Set/Clear Enable Bit 475" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB474 ,Set/Clear Enable Bit 474" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB473 ,Set/Clear Enable Bit 473" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB472 ,Set/Clear Enable Bit 472" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB471 ,Set/Clear Enable Bit 471" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB470 ,Set/Clear Enable Bit 470" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB469 ,Set/Clear Enable Bit 469" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB468 ,Set/Clear Enable Bit 468" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB467 ,Set/Clear Enable Bit 467" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB466 ,Set/Clear Enable Bit 466" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB465 ,Set/Clear Enable Bit 465" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB464 ,Set/Clear Enable Bit 464" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB463 ,Set/Clear Enable Bit 463" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB462 ,Set/Clear Enable Bit 462" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB461 ,Set/Clear Enable Bit 461" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB460 ,Set/Clear Enable Bit 460" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB459 ,Set/Clear Enable Bit 459" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB458 ,Set/Clear Enable Bit 458" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB457 ,Set/Clear Enable Bit 457" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB456 ,Set/Clear Enable Bit 456" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB455 ,Set/Clear Enable Bit 455" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB454 ,Set/Clear Enable Bit 454" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB453 ,Set/Clear Enable Bit 453" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB452 ,Set/Clear Enable Bit 452" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB451 ,Set/Clear Enable Bit 451" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB450 ,Set/Clear Enable Bit 450" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB449 ,Set/Clear Enable Bit 449" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB448 ,Set/Clear Enable Bit 448" "Disabled,Enabled" else rgroup.long 0x0138++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER14,Interrupt Set/Clear Enable Register 14" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x0F) group.long 0x013C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER15,Interrupt Set/Clear Enable Register 15" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB511 ,Set/Clear Enable Bit 511" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB510 ,Set/Clear Enable Bit 510" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB509 ,Set/Clear Enable Bit 509" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB508 ,Set/Clear Enable Bit 508" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB507 ,Set/Clear Enable Bit 507" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB506 ,Set/Clear Enable Bit 506" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB505 ,Set/Clear Enable Bit 505" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB504 ,Set/Clear Enable Bit 504" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB503 ,Set/Clear Enable Bit 503" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB502 ,Set/Clear Enable Bit 502" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB501 ,Set/Clear Enable Bit 501" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB500 ,Set/Clear Enable Bit 500" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB499 ,Set/Clear Enable Bit 499" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB498 ,Set/Clear Enable Bit 498" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB497 ,Set/Clear Enable Bit 497" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB496 ,Set/Clear Enable Bit 496" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB495 ,Set/Clear Enable Bit 495" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB494 ,Set/Clear Enable Bit 494" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB493 ,Set/Clear Enable Bit 493" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB492 ,Set/Clear Enable Bit 492" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB491 ,Set/Clear Enable Bit 491" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB490 ,Set/Clear Enable Bit 490" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB489 ,Set/Clear Enable Bit 489" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB488 ,Set/Clear Enable Bit 488" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB487 ,Set/Clear Enable Bit 487" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB486 ,Set/Clear Enable Bit 486" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB485 ,Set/Clear Enable Bit 485" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB484 ,Set/Clear Enable Bit 484" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB483 ,Set/Clear Enable Bit 483" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB482 ,Set/Clear Enable Bit 482" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB481 ,Set/Clear Enable Bit 481" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB480 ,Set/Clear Enable Bit 480" "Disabled,Enabled" else rgroup.long 0x013C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER15,Interrupt Set/Clear Enable Register 15" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x10) group.long 0x0140++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER16,Interrupt Set/Clear Enable Register 16" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB543 ,Set/Clear Enable Bit 543" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB542 ,Set/Clear Enable Bit 542" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB541 ,Set/Clear Enable Bit 541" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB540 ,Set/Clear Enable Bit 540" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB539 ,Set/Clear Enable Bit 539" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB538 ,Set/Clear Enable Bit 538" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB537 ,Set/Clear Enable Bit 537" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB536 ,Set/Clear Enable Bit 536" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB535 ,Set/Clear Enable Bit 535" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB534 ,Set/Clear Enable Bit 534" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB533 ,Set/Clear Enable Bit 533" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB532 ,Set/Clear Enable Bit 532" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB531 ,Set/Clear Enable Bit 531" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB530 ,Set/Clear Enable Bit 530" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB529 ,Set/Clear Enable Bit 529" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB528 ,Set/Clear Enable Bit 528" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB527 ,Set/Clear Enable Bit 527" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB526 ,Set/Clear Enable Bit 526" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB525 ,Set/Clear Enable Bit 525" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB524 ,Set/Clear Enable Bit 524" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB523 ,Set/Clear Enable Bit 523" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB522 ,Set/Clear Enable Bit 522" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB521 ,Set/Clear Enable Bit 521" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB520 ,Set/Clear Enable Bit 520" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB519 ,Set/Clear Enable Bit 519" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB518 ,Set/Clear Enable Bit 518" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB517 ,Set/Clear Enable Bit 517" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB516 ,Set/Clear Enable Bit 516" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB515 ,Set/Clear Enable Bit 515" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB514 ,Set/Clear Enable Bit 514" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB513 ,Set/Clear Enable Bit 513" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB512 ,Set/Clear Enable Bit 512" "Disabled,Enabled" else rgroup.long 0x0140++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER16,Interrupt Set/Clear Enable Register 16" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x11) group.long 0x0144++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER17,Interrupt Set/Clear Enable Register 17" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB575 ,Set/Clear Enable Bit 575" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB574 ,Set/Clear Enable Bit 574" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB573 ,Set/Clear Enable Bit 573" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB572 ,Set/Clear Enable Bit 572" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB571 ,Set/Clear Enable Bit 571" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB570 ,Set/Clear Enable Bit 570" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB569 ,Set/Clear Enable Bit 569" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB568 ,Set/Clear Enable Bit 568" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB567 ,Set/Clear Enable Bit 567" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB566 ,Set/Clear Enable Bit 566" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB565 ,Set/Clear Enable Bit 565" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB564 ,Set/Clear Enable Bit 564" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB563 ,Set/Clear Enable Bit 563" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB562 ,Set/Clear Enable Bit 562" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB561 ,Set/Clear Enable Bit 561" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB560 ,Set/Clear Enable Bit 560" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB559 ,Set/Clear Enable Bit 559" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB558 ,Set/Clear Enable Bit 558" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB557 ,Set/Clear Enable Bit 557" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB556 ,Set/Clear Enable Bit 556" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB555 ,Set/Clear Enable Bit 555" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB554 ,Set/Clear Enable Bit 554" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB553 ,Set/Clear Enable Bit 553" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB552 ,Set/Clear Enable Bit 552" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB551 ,Set/Clear Enable Bit 551" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB550 ,Set/Clear Enable Bit 550" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB549 ,Set/Clear Enable Bit 549" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB548 ,Set/Clear Enable Bit 548" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB547 ,Set/Clear Enable Bit 547" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB546 ,Set/Clear Enable Bit 546" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB545 ,Set/Clear Enable Bit 545" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB544 ,Set/Clear Enable Bit 544" "Disabled,Enabled" else rgroup.long 0x0144++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER17,Interrupt Set/Clear Enable Register 17" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x12) group.long 0x0148++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER18,Interrupt Set/Clear Enable Register 18" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB607 ,Set/Clear Enable Bit 607" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB606 ,Set/Clear Enable Bit 606" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB605 ,Set/Clear Enable Bit 605" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB604 ,Set/Clear Enable Bit 604" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB603 ,Set/Clear Enable Bit 603" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB602 ,Set/Clear Enable Bit 602" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB601 ,Set/Clear Enable Bit 601" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB600 ,Set/Clear Enable Bit 600" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB599 ,Set/Clear Enable Bit 599" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB598 ,Set/Clear Enable Bit 598" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB597 ,Set/Clear Enable Bit 597" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB596 ,Set/Clear Enable Bit 596" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB595 ,Set/Clear Enable Bit 595" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB594 ,Set/Clear Enable Bit 594" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB593 ,Set/Clear Enable Bit 593" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB592 ,Set/Clear Enable Bit 592" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB591 ,Set/Clear Enable Bit 591" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB590 ,Set/Clear Enable Bit 590" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB589 ,Set/Clear Enable Bit 589" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB588 ,Set/Clear Enable Bit 588" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB587 ,Set/Clear Enable Bit 587" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB586 ,Set/Clear Enable Bit 586" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB585 ,Set/Clear Enable Bit 585" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB584 ,Set/Clear Enable Bit 584" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB583 ,Set/Clear Enable Bit 583" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB582 ,Set/Clear Enable Bit 582" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB581 ,Set/Clear Enable Bit 581" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB580 ,Set/Clear Enable Bit 580" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB579 ,Set/Clear Enable Bit 579" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB578 ,Set/Clear Enable Bit 578" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB577 ,Set/Clear Enable Bit 577" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB576 ,Set/Clear Enable Bit 576" "Disabled,Enabled" else rgroup.long 0x0148++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER18,Interrupt Set/Clear Enable Register 18" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x13) group.long 0x014C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER19,Interrupt Set/Clear Enable Register 19" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB639 ,Set/Clear Enable Bit 639" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB638 ,Set/Clear Enable Bit 638" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB637 ,Set/Clear Enable Bit 637" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB636 ,Set/Clear Enable Bit 636" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB635 ,Set/Clear Enable Bit 635" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB634 ,Set/Clear Enable Bit 634" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB633 ,Set/Clear Enable Bit 633" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB632 ,Set/Clear Enable Bit 632" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB631 ,Set/Clear Enable Bit 631" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB630 ,Set/Clear Enable Bit 630" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB629 ,Set/Clear Enable Bit 629" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB628 ,Set/Clear Enable Bit 628" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB627 ,Set/Clear Enable Bit 627" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB626 ,Set/Clear Enable Bit 626" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB625 ,Set/Clear Enable Bit 625" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB624 ,Set/Clear Enable Bit 624" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB623 ,Set/Clear Enable Bit 623" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB622 ,Set/Clear Enable Bit 622" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB621 ,Set/Clear Enable Bit 621" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB620 ,Set/Clear Enable Bit 620" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB619 ,Set/Clear Enable Bit 619" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB618 ,Set/Clear Enable Bit 618" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB617 ,Set/Clear Enable Bit 617" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB616 ,Set/Clear Enable Bit 616" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB615 ,Set/Clear Enable Bit 615" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB614 ,Set/Clear Enable Bit 614" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB613 ,Set/Clear Enable Bit 613" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB612 ,Set/Clear Enable Bit 612" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB611 ,Set/Clear Enable Bit 611" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB610 ,Set/Clear Enable Bit 610" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB609 ,Set/Clear Enable Bit 609" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB608 ,Set/Clear Enable Bit 608" "Disabled,Enabled" else rgroup.long 0x014C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER19,Interrupt Set/Clear Enable Register 19" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x14) group.long 0x0150++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER20,Interrupt Set/Clear Enable Register 20" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB671 ,Set/Clear Enable Bit 671" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB670 ,Set/Clear Enable Bit 670" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB669 ,Set/Clear Enable Bit 669" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB668 ,Set/Clear Enable Bit 668" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB667 ,Set/Clear Enable Bit 667" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB666 ,Set/Clear Enable Bit 666" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB665 ,Set/Clear Enable Bit 665" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB664 ,Set/Clear Enable Bit 664" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB663 ,Set/Clear Enable Bit 663" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB662 ,Set/Clear Enable Bit 662" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB661 ,Set/Clear Enable Bit 661" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB660 ,Set/Clear Enable Bit 660" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB659 ,Set/Clear Enable Bit 659" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB658 ,Set/Clear Enable Bit 658" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB657 ,Set/Clear Enable Bit 657" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB656 ,Set/Clear Enable Bit 656" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB655 ,Set/Clear Enable Bit 655" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB654 ,Set/Clear Enable Bit 654" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB653 ,Set/Clear Enable Bit 653" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB652 ,Set/Clear Enable Bit 652" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB651 ,Set/Clear Enable Bit 651" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB650 ,Set/Clear Enable Bit 650" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB649 ,Set/Clear Enable Bit 649" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB648 ,Set/Clear Enable Bit 648" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB647 ,Set/Clear Enable Bit 647" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB646 ,Set/Clear Enable Bit 646" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB645 ,Set/Clear Enable Bit 645" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB644 ,Set/Clear Enable Bit 644" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB643 ,Set/Clear Enable Bit 643" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB642 ,Set/Clear Enable Bit 642" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB641 ,Set/Clear Enable Bit 641" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB640 ,Set/Clear Enable Bit 640" "Disabled,Enabled" else rgroup.long 0x0150++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER20,Interrupt Set/Clear Enable Register 20" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x15) group.long 0x0154++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER21,Interrupt Set/Clear Enable Register 21" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB703 ,Set/Clear Enable Bit 703" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB702 ,Set/Clear Enable Bit 702" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB701 ,Set/Clear Enable Bit 701" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB700 ,Set/Clear Enable Bit 700" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB699 ,Set/Clear Enable Bit 699" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB698 ,Set/Clear Enable Bit 698" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB697 ,Set/Clear Enable Bit 697" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB696 ,Set/Clear Enable Bit 696" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB695 ,Set/Clear Enable Bit 695" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB694 ,Set/Clear Enable Bit 694" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB693 ,Set/Clear Enable Bit 693" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB692 ,Set/Clear Enable Bit 692" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB691 ,Set/Clear Enable Bit 691" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB690 ,Set/Clear Enable Bit 690" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB689 ,Set/Clear Enable Bit 689" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB688 ,Set/Clear Enable Bit 688" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB687 ,Set/Clear Enable Bit 687" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB686 ,Set/Clear Enable Bit 686" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB685 ,Set/Clear Enable Bit 685" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB684 ,Set/Clear Enable Bit 684" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB683 ,Set/Clear Enable Bit 683" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB682 ,Set/Clear Enable Bit 682" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB681 ,Set/Clear Enable Bit 681" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB680 ,Set/Clear Enable Bit 680" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB679 ,Set/Clear Enable Bit 679" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB678 ,Set/Clear Enable Bit 678" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB677 ,Set/Clear Enable Bit 677" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB676 ,Set/Clear Enable Bit 676" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB675 ,Set/Clear Enable Bit 675" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB674 ,Set/Clear Enable Bit 674" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB673 ,Set/Clear Enable Bit 673" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB672 ,Set/Clear Enable Bit 672" "Disabled,Enabled" else rgroup.long 0x0154++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER21,Interrupt Set/Clear Enable Register 21" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x16) group.long 0x0158++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER22,Interrupt Set/Clear Enable Register 22" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB735 ,Set/Clear Enable Bit 735" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB734 ,Set/Clear Enable Bit 734" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB733 ,Set/Clear Enable Bit 733" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB732 ,Set/Clear Enable Bit 732" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB731 ,Set/Clear Enable Bit 731" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB730 ,Set/Clear Enable Bit 730" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB729 ,Set/Clear Enable Bit 729" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB728 ,Set/Clear Enable Bit 728" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB727 ,Set/Clear Enable Bit 727" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB726 ,Set/Clear Enable Bit 726" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB725 ,Set/Clear Enable Bit 725" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB724 ,Set/Clear Enable Bit 724" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB723 ,Set/Clear Enable Bit 723" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB722 ,Set/Clear Enable Bit 722" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB721 ,Set/Clear Enable Bit 721" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB720 ,Set/Clear Enable Bit 720" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB719 ,Set/Clear Enable Bit 719" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB718 ,Set/Clear Enable Bit 718" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB717 ,Set/Clear Enable Bit 717" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB716 ,Set/Clear Enable Bit 716" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB715 ,Set/Clear Enable Bit 715" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB714 ,Set/Clear Enable Bit 714" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB713 ,Set/Clear Enable Bit 713" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB712 ,Set/Clear Enable Bit 712" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB711 ,Set/Clear Enable Bit 711" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB710 ,Set/Clear Enable Bit 710" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB709 ,Set/Clear Enable Bit 709" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB708 ,Set/Clear Enable Bit 708" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB707 ,Set/Clear Enable Bit 707" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB706 ,Set/Clear Enable Bit 706" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB705 ,Set/Clear Enable Bit 705" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB704 ,Set/Clear Enable Bit 704" "Disabled,Enabled" else rgroup.long 0x0158++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER22,Interrupt Set/Clear Enable Register 22" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x17) group.long 0x015C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER23,Interrupt Set/Clear Enable Register 23" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB767 ,Set/Clear Enable Bit 767" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB766 ,Set/Clear Enable Bit 766" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB765 ,Set/Clear Enable Bit 765" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB764 ,Set/Clear Enable Bit 764" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB763 ,Set/Clear Enable Bit 763" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB762 ,Set/Clear Enable Bit 762" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB761 ,Set/Clear Enable Bit 761" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB760 ,Set/Clear Enable Bit 760" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB759 ,Set/Clear Enable Bit 759" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB758 ,Set/Clear Enable Bit 758" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB757 ,Set/Clear Enable Bit 757" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB756 ,Set/Clear Enable Bit 756" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB755 ,Set/Clear Enable Bit 755" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB754 ,Set/Clear Enable Bit 754" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB753 ,Set/Clear Enable Bit 753" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB752 ,Set/Clear Enable Bit 752" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB751 ,Set/Clear Enable Bit 751" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB750 ,Set/Clear Enable Bit 750" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB749 ,Set/Clear Enable Bit 749" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB748 ,Set/Clear Enable Bit 748" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB747 ,Set/Clear Enable Bit 747" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB746 ,Set/Clear Enable Bit 746" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB745 ,Set/Clear Enable Bit 745" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB744 ,Set/Clear Enable Bit 744" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB743 ,Set/Clear Enable Bit 743" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB742 ,Set/Clear Enable Bit 742" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB741 ,Set/Clear Enable Bit 741" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB740 ,Set/Clear Enable Bit 740" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB739 ,Set/Clear Enable Bit 739" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB738 ,Set/Clear Enable Bit 738" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB737 ,Set/Clear Enable Bit 737" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB736 ,Set/Clear Enable Bit 736" "Disabled,Enabled" else rgroup.long 0x015C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER23,Interrupt Set/Clear Enable Register 23" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x18) group.long 0x0160++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER24,Interrupt Set/Clear Enable Register 24" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB799 ,Set/Clear Enable Bit 799" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB798 ,Set/Clear Enable Bit 798" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB797 ,Set/Clear Enable Bit 797" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB796 ,Set/Clear Enable Bit 796" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB795 ,Set/Clear Enable Bit 795" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB794 ,Set/Clear Enable Bit 794" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB793 ,Set/Clear Enable Bit 793" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB792 ,Set/Clear Enable Bit 792" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB791 ,Set/Clear Enable Bit 791" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB790 ,Set/Clear Enable Bit 790" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB789 ,Set/Clear Enable Bit 789" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB788 ,Set/Clear Enable Bit 788" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB787 ,Set/Clear Enable Bit 787" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB786 ,Set/Clear Enable Bit 786" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB785 ,Set/Clear Enable Bit 785" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB784 ,Set/Clear Enable Bit 784" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB783 ,Set/Clear Enable Bit 783" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB782 ,Set/Clear Enable Bit 782" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB781 ,Set/Clear Enable Bit 781" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB780 ,Set/Clear Enable Bit 780" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB779 ,Set/Clear Enable Bit 779" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB778 ,Set/Clear Enable Bit 778" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB777 ,Set/Clear Enable Bit 777" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB776 ,Set/Clear Enable Bit 776" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB775 ,Set/Clear Enable Bit 775" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB774 ,Set/Clear Enable Bit 774" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB773 ,Set/Clear Enable Bit 773" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB772 ,Set/Clear Enable Bit 772" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB771 ,Set/Clear Enable Bit 771" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB770 ,Set/Clear Enable Bit 770" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB769 ,Set/Clear Enable Bit 769" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB768 ,Set/Clear Enable Bit 768" "Disabled,Enabled" else rgroup.long 0x0160++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER24,Interrupt Set/Clear Enable Register 24" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x19) group.long 0x0164++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER25,Interrupt Set/Clear Enable Register 25" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB831 ,Set/Clear Enable Bit 831" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB830 ,Set/Clear Enable Bit 830" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB829 ,Set/Clear Enable Bit 829" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB828 ,Set/Clear Enable Bit 828" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB827 ,Set/Clear Enable Bit 827" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB826 ,Set/Clear Enable Bit 826" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB825 ,Set/Clear Enable Bit 825" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB824 ,Set/Clear Enable Bit 824" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB823 ,Set/Clear Enable Bit 823" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB822 ,Set/Clear Enable Bit 822" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB821 ,Set/Clear Enable Bit 821" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB820 ,Set/Clear Enable Bit 820" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB819 ,Set/Clear Enable Bit 819" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB818 ,Set/Clear Enable Bit 818" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB817 ,Set/Clear Enable Bit 817" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB816 ,Set/Clear Enable Bit 816" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB815 ,Set/Clear Enable Bit 815" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB814 ,Set/Clear Enable Bit 814" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB813 ,Set/Clear Enable Bit 813" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB812 ,Set/Clear Enable Bit 812" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB811 ,Set/Clear Enable Bit 811" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB810 ,Set/Clear Enable Bit 810" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB809 ,Set/Clear Enable Bit 809" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB808 ,Set/Clear Enable Bit 808" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB807 ,Set/Clear Enable Bit 807" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB806 ,Set/Clear Enable Bit 806" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB805 ,Set/Clear Enable Bit 805" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB804 ,Set/Clear Enable Bit 804" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB803 ,Set/Clear Enable Bit 803" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB802 ,Set/Clear Enable Bit 802" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB801 ,Set/Clear Enable Bit 801" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB800 ,Set/Clear Enable Bit 800" "Disabled,Enabled" else rgroup.long 0x0164++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER25,Interrupt Set/Clear Enable Register 25" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x1A) group.long 0x0168++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER26,Interrupt Set/Clear Enable Register 26" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB863 ,Set/Clear Enable Bit 863" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB862 ,Set/Clear Enable Bit 862" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB861 ,Set/Clear Enable Bit 861" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB860 ,Set/Clear Enable Bit 860" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB859 ,Set/Clear Enable Bit 859" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB858 ,Set/Clear Enable Bit 858" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB857 ,Set/Clear Enable Bit 857" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB856 ,Set/Clear Enable Bit 856" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB855 ,Set/Clear Enable Bit 855" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB854 ,Set/Clear Enable Bit 854" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB853 ,Set/Clear Enable Bit 853" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB852 ,Set/Clear Enable Bit 852" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB851 ,Set/Clear Enable Bit 851" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB850 ,Set/Clear Enable Bit 850" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB849 ,Set/Clear Enable Bit 849" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB848 ,Set/Clear Enable Bit 848" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB847 ,Set/Clear Enable Bit 847" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB846 ,Set/Clear Enable Bit 846" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB845 ,Set/Clear Enable Bit 845" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB844 ,Set/Clear Enable Bit 844" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB843 ,Set/Clear Enable Bit 843" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB842 ,Set/Clear Enable Bit 842" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB841 ,Set/Clear Enable Bit 841" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB840 ,Set/Clear Enable Bit 840" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB839 ,Set/Clear Enable Bit 839" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB838 ,Set/Clear Enable Bit 838" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB837 ,Set/Clear Enable Bit 837" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB836 ,Set/Clear Enable Bit 836" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB835 ,Set/Clear Enable Bit 835" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB834 ,Set/Clear Enable Bit 834" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB833 ,Set/Clear Enable Bit 833" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB832 ,Set/Clear Enable Bit 832" "Disabled,Enabled" else rgroup.long 0x0168++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER26,Interrupt Set/Clear Enable Register 26" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x1B) group.long 0x016C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER27,Interrupt Set/Clear Enable Register 27" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB895 ,Set/Clear Enable Bit 895" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB894 ,Set/Clear Enable Bit 894" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB893 ,Set/Clear Enable Bit 893" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB892 ,Set/Clear Enable Bit 892" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB891 ,Set/Clear Enable Bit 891" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB890 ,Set/Clear Enable Bit 890" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB889 ,Set/Clear Enable Bit 889" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB888 ,Set/Clear Enable Bit 888" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB887 ,Set/Clear Enable Bit 887" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB886 ,Set/Clear Enable Bit 886" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB885 ,Set/Clear Enable Bit 885" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB884 ,Set/Clear Enable Bit 884" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB883 ,Set/Clear Enable Bit 883" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB882 ,Set/Clear Enable Bit 882" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB881 ,Set/Clear Enable Bit 881" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB880 ,Set/Clear Enable Bit 880" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB879 ,Set/Clear Enable Bit 879" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB878 ,Set/Clear Enable Bit 878" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB877 ,Set/Clear Enable Bit 877" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB876 ,Set/Clear Enable Bit 876" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB875 ,Set/Clear Enable Bit 875" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB874 ,Set/Clear Enable Bit 874" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB873 ,Set/Clear Enable Bit 873" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB872 ,Set/Clear Enable Bit 872" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB871 ,Set/Clear Enable Bit 871" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB870 ,Set/Clear Enable Bit 870" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB869 ,Set/Clear Enable Bit 869" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB868 ,Set/Clear Enable Bit 868" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB867 ,Set/Clear Enable Bit 867" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB866 ,Set/Clear Enable Bit 866" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB865 ,Set/Clear Enable Bit 865" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB864 ,Set/Clear Enable Bit 864" "Disabled,Enabled" else rgroup.long 0x016C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER27,Interrupt Set/Clear Enable Register 27" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x1C) group.long 0x0170++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER28,Interrupt Set/Clear Enable Register 28" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB927 ,Set/Clear Enable Bit 927" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB926 ,Set/Clear Enable Bit 926" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB925 ,Set/Clear Enable Bit 925" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB924 ,Set/Clear Enable Bit 924" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB923 ,Set/Clear Enable Bit 923" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB922 ,Set/Clear Enable Bit 922" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB921 ,Set/Clear Enable Bit 921" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB920 ,Set/Clear Enable Bit 920" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB919 ,Set/Clear Enable Bit 919" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB918 ,Set/Clear Enable Bit 918" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB917 ,Set/Clear Enable Bit 917" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB916 ,Set/Clear Enable Bit 916" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB915 ,Set/Clear Enable Bit 915" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB914 ,Set/Clear Enable Bit 914" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB913 ,Set/Clear Enable Bit 913" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB912 ,Set/Clear Enable Bit 912" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB911 ,Set/Clear Enable Bit 911" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB910 ,Set/Clear Enable Bit 910" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB909 ,Set/Clear Enable Bit 909" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB908 ,Set/Clear Enable Bit 908" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB907 ,Set/Clear Enable Bit 907" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB906 ,Set/Clear Enable Bit 906" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB905 ,Set/Clear Enable Bit 905" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB904 ,Set/Clear Enable Bit 904" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB903 ,Set/Clear Enable Bit 903" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB902 ,Set/Clear Enable Bit 902" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB901 ,Set/Clear Enable Bit 901" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB900 ,Set/Clear Enable Bit 900" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB899 ,Set/Clear Enable Bit 899" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB898 ,Set/Clear Enable Bit 898" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB897 ,Set/Clear Enable Bit 897" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB896 ,Set/Clear Enable Bit 896" "Disabled,Enabled" else rgroup.long 0x0170++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER28,Interrupt Set/Clear Enable Register 28" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x1D) group.long 0x0174++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER29,Interrupt Set/Clear Enable Register 29" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB959 ,Set/Clear Enable Bit 959" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB958 ,Set/Clear Enable Bit 958" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB957 ,Set/Clear Enable Bit 957" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB956 ,Set/Clear Enable Bit 956" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB955 ,Set/Clear Enable Bit 955" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB954 ,Set/Clear Enable Bit 954" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB953 ,Set/Clear Enable Bit 953" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB952 ,Set/Clear Enable Bit 952" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB951 ,Set/Clear Enable Bit 951" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB950 ,Set/Clear Enable Bit 950" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB949 ,Set/Clear Enable Bit 949" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB948 ,Set/Clear Enable Bit 948" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB947 ,Set/Clear Enable Bit 947" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB946 ,Set/Clear Enable Bit 946" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB945 ,Set/Clear Enable Bit 945" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB944 ,Set/Clear Enable Bit 944" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB943 ,Set/Clear Enable Bit 943" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB942 ,Set/Clear Enable Bit 942" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB941 ,Set/Clear Enable Bit 941" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB940 ,Set/Clear Enable Bit 940" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB939 ,Set/Clear Enable Bit 939" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB938 ,Set/Clear Enable Bit 938" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB937 ,Set/Clear Enable Bit 937" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB936 ,Set/Clear Enable Bit 936" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB935 ,Set/Clear Enable Bit 935" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB934 ,Set/Clear Enable Bit 934" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB933 ,Set/Clear Enable Bit 933" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB932 ,Set/Clear Enable Bit 932" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB931 ,Set/Clear Enable Bit 931" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB930 ,Set/Clear Enable Bit 930" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB929 ,Set/Clear Enable Bit 929" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB928 ,Set/Clear Enable Bit 928" "Disabled,Enabled" else rgroup.long 0x0174++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER29,Interrupt Set/Clear Enable Register 29" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x1E) group.long 0x0178++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER30,Interrupt Set/Clear Enable Register 30" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB991 ,Set/Clear Enable Bit 991" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB990 ,Set/Clear Enable Bit 990" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB989 ,Set/Clear Enable Bit 989" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB988 ,Set/Clear Enable Bit 988" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB987 ,Set/Clear Enable Bit 987" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB986 ,Set/Clear Enable Bit 986" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB985 ,Set/Clear Enable Bit 985" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB984 ,Set/Clear Enable Bit 984" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB983 ,Set/Clear Enable Bit 983" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB982 ,Set/Clear Enable Bit 982" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB981 ,Set/Clear Enable Bit 981" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB980 ,Set/Clear Enable Bit 980" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB979 ,Set/Clear Enable Bit 979" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB978 ,Set/Clear Enable Bit 978" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB977 ,Set/Clear Enable Bit 977" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB976 ,Set/Clear Enable Bit 976" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB975 ,Set/Clear Enable Bit 975" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB974 ,Set/Clear Enable Bit 974" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB973 ,Set/Clear Enable Bit 973" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB972 ,Set/Clear Enable Bit 972" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB971 ,Set/Clear Enable Bit 971" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB970 ,Set/Clear Enable Bit 970" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB969 ,Set/Clear Enable Bit 969" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB968 ,Set/Clear Enable Bit 968" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB967 ,Set/Clear Enable Bit 967" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB966 ,Set/Clear Enable Bit 966" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB965 ,Set/Clear Enable Bit 965" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB964 ,Set/Clear Enable Bit 964" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB963 ,Set/Clear Enable Bit 963" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB962 ,Set/Clear Enable Bit 962" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB961 ,Set/Clear Enable Bit 961" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB960 ,Set/Clear Enable Bit 960" "Disabled,Enabled" else rgroup.long 0x0178++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER30,Interrupt Set/Clear Enable Register 30" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)==0x1F) group.long 0x017C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER31,Interrupt Set/Clear Enable Register 31" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB1019 ,Set/Clear Enable Bit 1019" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB1018 ,Set/Clear Enable Bit 1018" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB1017 ,Set/Clear Enable Bit 1017" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB1016 ,Set/Clear Enable Bit 1016" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB1015 ,Set/Clear Enable Bit 1015" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB1014 ,Set/Clear Enable Bit 1014" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB1013 ,Set/Clear Enable Bit 1013" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB1012 ,Set/Clear Enable Bit 1012" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB1011 ,Set/Clear Enable Bit 1011" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB1010 ,Set/Clear Enable Bit 1010" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB1009 ,Set/Clear Enable Bit 1009" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB1008 ,Set/Clear Enable Bit 1008" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB1007 ,Set/Clear Enable Bit 1007" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB1006 ,Set/Clear Enable Bit 1006" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB1005 ,Set/Clear Enable Bit 1005" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB1004 ,Set/Clear Enable Bit 1004" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB1003 ,Set/Clear Enable Bit 1003" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB1002 ,Set/Clear Enable Bit 1002" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB1001 ,Set/Clear Enable Bit 1001" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB1000 ,Set/Clear Enable Bit 1000" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB999 ,Set/Clear Enable Bit 999" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB998 ,Set/Clear Enable Bit 998" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB997 ,Set/Clear Enable Bit 997" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB996 ,Set/Clear Enable Bit 996" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB995 ,Set/Clear Enable Bit 995" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB994 ,Set/Clear Enable Bit 994" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB993 ,Set/Clear Enable Bit 993" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB992 ,Set/Clear Enable Bit 992" "Disabled,Enabled" else rgroup.long 0x017C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER31,Interrupt Set/Clear Enable Register 31" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif tree.end width 22. tree "Set/Clear Pending Registers" group.long 0x0200++0x03 line.long 0x0 "GICD_SET/CLR_PENDR0,Interrupt Set/Clear Pending Register 0" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND31 ,Set/Clear Pending Bit 31" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND30 ,Set/Clear Pending Bit 30" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND29 ,Set/Clear Pending Bit 29" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND28 ,Set/Clear Pending Bit 28" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND27 ,Set/Clear Pending Bit 27" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND26 ,Set/Clear Pending Bit 26" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND25 ,Set/Clear Pending Bit 25" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND24 ,Set/Clear Pending Bit 24" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND23 ,Set/Clear Pending Bit 23" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND22 ,Set/Clear Pending Bit 22" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND21 ,Set/Clear Pending Bit 21" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND20 ,Set/Clear Pending Bit 20" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND19 ,Set/Clear Pending Bit 19" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND18 ,Set/Clear Pending Bit 18" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND17 ,Set/Clear Pending Bit 17" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND16 ,Set/Clear Pending Bit 16" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND15 ,Set/Clear Pending Bit 15" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND14 ,Set/Clear Pending Bit 14" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND13 ,Set/Clear Pending Bit 13" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND12 ,Set/Clear Pending Bit 12" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND11 ,Set/Clear Pending Bit 11" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND10 ,Set/Clear Pending Bit 10" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND9 ,Set/Clear Pending Bit 9" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND8 ,Set/Clear Pending Bit 8" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND7 ,Set/Clear Pending Bit 7" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND6 ,Set/Clear Pending Bit 6" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND5 ,Set/Clear Pending Bit 5" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND4 ,Set/Clear Pending Bit 4" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND3 ,Set/Clear Pending Bit 3" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND2 ,Set/Clear Pending Bit 2" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND1 ,Set/Clear Pending Bit 1" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND0 ,Set/Clear Pending Bit 0" "Not pending,Pending" if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x01) group.long 0x0204++0x03 line.long 0x0 "GICD_SET/CLR_PENDR1,Interrupt Set/Clear Pending Register 1" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND63 ,Set/Clear Pending Bit 63" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND62 ,Set/Clear Pending Bit 62" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND61 ,Set/Clear Pending Bit 61" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND60 ,Set/Clear Pending Bit 60" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND59 ,Set/Clear Pending Bit 59" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND58 ,Set/Clear Pending Bit 58" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND57 ,Set/Clear Pending Bit 57" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND56 ,Set/Clear Pending Bit 56" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND55 ,Set/Clear Pending Bit 55" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND54 ,Set/Clear Pending Bit 54" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND53 ,Set/Clear Pending Bit 53" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND52 ,Set/Clear Pending Bit 52" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND51 ,Set/Clear Pending Bit 51" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND50 ,Set/Clear Pending Bit 50" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND49 ,Set/Clear Pending Bit 49" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND48 ,Set/Clear Pending Bit 48" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND47 ,Set/Clear Pending Bit 47" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND46 ,Set/Clear Pending Bit 46" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND45 ,Set/Clear Pending Bit 45" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND44 ,Set/Clear Pending Bit 44" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND43 ,Set/Clear Pending Bit 43" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND42 ,Set/Clear Pending Bit 42" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND41 ,Set/Clear Pending Bit 41" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND40 ,Set/Clear Pending Bit 40" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND39 ,Set/Clear Pending Bit 39" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND38 ,Set/Clear Pending Bit 38" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND37 ,Set/Clear Pending Bit 37" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND36 ,Set/Clear Pending Bit 36" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND35 ,Set/Clear Pending Bit 35" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND34 ,Set/Clear Pending Bit 34" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND33 ,Set/Clear Pending Bit 33" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND32 ,Set/Clear Pending Bit 32" "Not pending,Pending" else rgroup.long 0x0204++0x03 line.long 0x0 "GICD_SET/CLR_PENDR1,Interrupt Set/Clear Pending Register 1" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x02) group.long 0x0208++0x03 line.long 0x0 "GICD_SET/CLR_PENDR2,Interrupt Set/Clear Pending Register 2" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND95 ,Set/Clear Pending Bit 95" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND94 ,Set/Clear Pending Bit 94" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND93 ,Set/Clear Pending Bit 93" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND92 ,Set/Clear Pending Bit 92" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND91 ,Set/Clear Pending Bit 91" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND90 ,Set/Clear Pending Bit 90" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND89 ,Set/Clear Pending Bit 89" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND88 ,Set/Clear Pending Bit 88" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND87 ,Set/Clear Pending Bit 87" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND86 ,Set/Clear Pending Bit 86" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND85 ,Set/Clear Pending Bit 85" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND84 ,Set/Clear Pending Bit 84" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND83 ,Set/Clear Pending Bit 83" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND82 ,Set/Clear Pending Bit 82" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND81 ,Set/Clear Pending Bit 81" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND80 ,Set/Clear Pending Bit 80" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND79 ,Set/Clear Pending Bit 79" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND78 ,Set/Clear Pending Bit 78" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND77 ,Set/Clear Pending Bit 77" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND76 ,Set/Clear Pending Bit 76" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND75 ,Set/Clear Pending Bit 75" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND74 ,Set/Clear Pending Bit 74" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND73 ,Set/Clear Pending Bit 73" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND72 ,Set/Clear Pending Bit 72" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND71 ,Set/Clear Pending Bit 71" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND70 ,Set/Clear Pending Bit 70" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND69 ,Set/Clear Pending Bit 69" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND68 ,Set/Clear Pending Bit 68" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND67 ,Set/Clear Pending Bit 67" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND66 ,Set/Clear Pending Bit 66" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND65 ,Set/Clear Pending Bit 65" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND64 ,Set/Clear Pending Bit 64" "Not pending,Pending" else rgroup.long 0x0208++0x03 line.long 0x0 "GICD_SET/CLR_PENDR2,Interrupt Set/Clear Pending Register 2" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x03) group.long 0x020C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR3,Interrupt Set/Clear Pending Register 3" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND127 ,Set/Clear Pending Bit 127" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND126 ,Set/Clear Pending Bit 126" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND125 ,Set/Clear Pending Bit 125" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND124 ,Set/Clear Pending Bit 124" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND123 ,Set/Clear Pending Bit 123" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND122 ,Set/Clear Pending Bit 122" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND121 ,Set/Clear Pending Bit 121" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND120 ,Set/Clear Pending Bit 120" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND119 ,Set/Clear Pending Bit 119" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND118 ,Set/Clear Pending Bit 118" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND117 ,Set/Clear Pending Bit 117" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND116 ,Set/Clear Pending Bit 116" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND115 ,Set/Clear Pending Bit 115" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND114 ,Set/Clear Pending Bit 114" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND113 ,Set/Clear Pending Bit 113" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND112 ,Set/Clear Pending Bit 112" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND111 ,Set/Clear Pending Bit 111" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND110 ,Set/Clear Pending Bit 110" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND109 ,Set/Clear Pending Bit 109" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND108 ,Set/Clear Pending Bit 108" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND107 ,Set/Clear Pending Bit 107" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND106 ,Set/Clear Pending Bit 106" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND105 ,Set/Clear Pending Bit 105" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND104 ,Set/Clear Pending Bit 104" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND103 ,Set/Clear Pending Bit 103" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND102 ,Set/Clear Pending Bit 102" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND101 ,Set/Clear Pending Bit 101" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND100 ,Set/Clear Pending Bit 100" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND99 ,Set/Clear Pending Bit 99" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND98 ,Set/Clear Pending Bit 98" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND97 ,Set/Clear Pending Bit 97" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND96 ,Set/Clear Pending Bit 96" "Not pending,Pending" else rgroup.long 0x020C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR3,Interrupt Set/Clear Pending Register 3" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x04) group.long 0x0210++0x03 line.long 0x0 "GICD_SET/CLR_PENDR4,Interrupt Set/Clear Pending Register 4" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND159 ,Set/Clear Pending Bit 159" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND158 ,Set/Clear Pending Bit 158" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND157 ,Set/Clear Pending Bit 157" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND156 ,Set/Clear Pending Bit 156" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND155 ,Set/Clear Pending Bit 155" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND154 ,Set/Clear Pending Bit 154" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND153 ,Set/Clear Pending Bit 153" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND152 ,Set/Clear Pending Bit 152" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND151 ,Set/Clear Pending Bit 151" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND150 ,Set/Clear Pending Bit 150" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND149 ,Set/Clear Pending Bit 149" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND148 ,Set/Clear Pending Bit 148" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND147 ,Set/Clear Pending Bit 147" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND146 ,Set/Clear Pending Bit 146" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND145 ,Set/Clear Pending Bit 145" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND144 ,Set/Clear Pending Bit 144" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND143 ,Set/Clear Pending Bit 143" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND142 ,Set/Clear Pending Bit 142" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND141 ,Set/Clear Pending Bit 141" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND140 ,Set/Clear Pending Bit 140" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND139 ,Set/Clear Pending Bit 139" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND138 ,Set/Clear Pending Bit 138" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND137 ,Set/Clear Pending Bit 137" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND136 ,Set/Clear Pending Bit 136" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND135 ,Set/Clear Pending Bit 135" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND134 ,Set/Clear Pending Bit 134" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND133 ,Set/Clear Pending Bit 133" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND132 ,Set/Clear Pending Bit 132" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND131 ,Set/Clear Pending Bit 131" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND130 ,Set/Clear Pending Bit 130" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND129 ,Set/Clear Pending Bit 129" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND128 ,Set/Clear Pending Bit 128" "Not pending,Pending" else rgroup.long 0x0210++0x03 line.long 0x0 "GICD_SET/CLR_PENDR4,Interrupt Set/Clear Pending Register 4" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x05) group.long 0x0214++0x03 line.long 0x0 "GICD_SET/CLR_PENDR5,Interrupt Set/Clear Pending Register 5" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND191 ,Set/Clear Pending Bit 191" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND190 ,Set/Clear Pending Bit 190" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND189 ,Set/Clear Pending Bit 189" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND188 ,Set/Clear Pending Bit 188" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND187 ,Set/Clear Pending Bit 187" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND186 ,Set/Clear Pending Bit 186" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND185 ,Set/Clear Pending Bit 185" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND184 ,Set/Clear Pending Bit 184" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND183 ,Set/Clear Pending Bit 183" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND182 ,Set/Clear Pending Bit 182" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND181 ,Set/Clear Pending Bit 181" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND180 ,Set/Clear Pending Bit 180" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND179 ,Set/Clear Pending Bit 179" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND178 ,Set/Clear Pending Bit 178" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND177 ,Set/Clear Pending Bit 177" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND176 ,Set/Clear Pending Bit 176" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND175 ,Set/Clear Pending Bit 175" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND174 ,Set/Clear Pending Bit 174" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND173 ,Set/Clear Pending Bit 173" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND172 ,Set/Clear Pending Bit 172" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND171 ,Set/Clear Pending Bit 171" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND170 ,Set/Clear Pending Bit 170" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND169 ,Set/Clear Pending Bit 169" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND168 ,Set/Clear Pending Bit 168" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND167 ,Set/Clear Pending Bit 167" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND166 ,Set/Clear Pending Bit 166" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND165 ,Set/Clear Pending Bit 165" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND164 ,Set/Clear Pending Bit 164" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND163 ,Set/Clear Pending Bit 163" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND162 ,Set/Clear Pending Bit 162" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND161 ,Set/Clear Pending Bit 161" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND160 ,Set/Clear Pending Bit 160" "Not pending,Pending" else rgroup.long 0x0214++0x03 line.long 0x0 "GICD_SET/CLR_PENDR5,Interrupt Set/Clear Pending Register 5" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x06) group.long 0x0218++0x03 line.long 0x0 "GICD_SET/CLR_PENDR6,Interrupt Set/Clear Pending Register 6" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND223 ,Set/Clear Pending Bit 223" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND222 ,Set/Clear Pending Bit 222" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND221 ,Set/Clear Pending Bit 221" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND220 ,Set/Clear Pending Bit 220" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND219 ,Set/Clear Pending Bit 219" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND218 ,Set/Clear Pending Bit 218" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND217 ,Set/Clear Pending Bit 217" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND216 ,Set/Clear Pending Bit 216" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND215 ,Set/Clear Pending Bit 215" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND214 ,Set/Clear Pending Bit 214" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND213 ,Set/Clear Pending Bit 213" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND212 ,Set/Clear Pending Bit 212" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND211 ,Set/Clear Pending Bit 211" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND210 ,Set/Clear Pending Bit 210" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND209 ,Set/Clear Pending Bit 209" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND208 ,Set/Clear Pending Bit 208" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND207 ,Set/Clear Pending Bit 207" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND206 ,Set/Clear Pending Bit 206" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND205 ,Set/Clear Pending Bit 205" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND204 ,Set/Clear Pending Bit 204" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND203 ,Set/Clear Pending Bit 203" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND202 ,Set/Clear Pending Bit 202" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND201 ,Set/Clear Pending Bit 201" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND200 ,Set/Clear Pending Bit 200" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND199 ,Set/Clear Pending Bit 199" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND198 ,Set/Clear Pending Bit 198" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND197 ,Set/Clear Pending Bit 197" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND196 ,Set/Clear Pending Bit 196" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND195 ,Set/Clear Pending Bit 195" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND194 ,Set/Clear Pending Bit 194" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND193 ,Set/Clear Pending Bit 193" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND192 ,Set/Clear Pending Bit 192" "Not pending,Pending" else rgroup.long 0x0218++0x03 line.long 0x0 "GICD_SET/CLR_PENDR6,Interrupt Set/Clear Pending Register 6" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x07) group.long 0x021C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR7,Interrupt Set/Clear Pending Register 7" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND255 ,Set/Clear Pending Bit 255" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND254 ,Set/Clear Pending Bit 254" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND253 ,Set/Clear Pending Bit 253" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND252 ,Set/Clear Pending Bit 252" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND251 ,Set/Clear Pending Bit 251" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND250 ,Set/Clear Pending Bit 250" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND249 ,Set/Clear Pending Bit 249" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND248 ,Set/Clear Pending Bit 248" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND247 ,Set/Clear Pending Bit 247" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND246 ,Set/Clear Pending Bit 246" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND245 ,Set/Clear Pending Bit 245" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND244 ,Set/Clear Pending Bit 244" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND243 ,Set/Clear Pending Bit 243" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND242 ,Set/Clear Pending Bit 242" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND241 ,Set/Clear Pending Bit 241" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND240 ,Set/Clear Pending Bit 240" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND239 ,Set/Clear Pending Bit 239" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND238 ,Set/Clear Pending Bit 238" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND237 ,Set/Clear Pending Bit 237" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND236 ,Set/Clear Pending Bit 236" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND235 ,Set/Clear Pending Bit 235" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND234 ,Set/Clear Pending Bit 234" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND233 ,Set/Clear Pending Bit 233" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND232 ,Set/Clear Pending Bit 232" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND231 ,Set/Clear Pending Bit 231" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND230 ,Set/Clear Pending Bit 230" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND229 ,Set/Clear Pending Bit 229" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND228 ,Set/Clear Pending Bit 228" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND227 ,Set/Clear Pending Bit 227" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND226 ,Set/Clear Pending Bit 226" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND225 ,Set/Clear Pending Bit 225" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND224 ,Set/Clear Pending Bit 224" "Not pending,Pending" else rgroup.long 0x021C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR7,Interrupt Set/Clear Pending Register 7" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x08) group.long 0x0220++0x03 line.long 0x0 "GICD_SET/CLR_PENDR8,Interrupt Set/Clear Pending Register 8" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND287 ,Set/Clear Pending Bit 287" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND286 ,Set/Clear Pending Bit 286" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND285 ,Set/Clear Pending Bit 285" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND284 ,Set/Clear Pending Bit 284" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND283 ,Set/Clear Pending Bit 283" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND282 ,Set/Clear Pending Bit 282" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND281 ,Set/Clear Pending Bit 281" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND280 ,Set/Clear Pending Bit 280" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND279 ,Set/Clear Pending Bit 279" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND278 ,Set/Clear Pending Bit 278" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND277 ,Set/Clear Pending Bit 277" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND276 ,Set/Clear Pending Bit 276" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND275 ,Set/Clear Pending Bit 275" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND274 ,Set/Clear Pending Bit 274" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND273 ,Set/Clear Pending Bit 273" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND272 ,Set/Clear Pending Bit 272" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND271 ,Set/Clear Pending Bit 271" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND270 ,Set/Clear Pending Bit 270" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND269 ,Set/Clear Pending Bit 269" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND268 ,Set/Clear Pending Bit 268" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND267 ,Set/Clear Pending Bit 267" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND266 ,Set/Clear Pending Bit 266" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND265 ,Set/Clear Pending Bit 265" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND264 ,Set/Clear Pending Bit 264" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND263 ,Set/Clear Pending Bit 263" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND262 ,Set/Clear Pending Bit 262" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND261 ,Set/Clear Pending Bit 261" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND260 ,Set/Clear Pending Bit 260" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND259 ,Set/Clear Pending Bit 259" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND258 ,Set/Clear Pending Bit 258" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND257 ,Set/Clear Pending Bit 257" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND256 ,Set/Clear Pending Bit 256" "Not pending,Pending" else rgroup.long 0x0220++0x03 line.long 0x0 "GICD_SET/CLR_PENDR8,Interrupt Set/Clear Pending Register 8" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x09) group.long 0x0224++0x03 line.long 0x0 "GICD_SET/CLR_PENDR9,Interrupt Set/Clear Pending Register 9" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND319 ,Set/Clear Pending Bit 319" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND318 ,Set/Clear Pending Bit 318" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND317 ,Set/Clear Pending Bit 317" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND316 ,Set/Clear Pending Bit 316" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND315 ,Set/Clear Pending Bit 315" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND314 ,Set/Clear Pending Bit 314" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND313 ,Set/Clear Pending Bit 313" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND312 ,Set/Clear Pending Bit 312" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND311 ,Set/Clear Pending Bit 311" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND310 ,Set/Clear Pending Bit 310" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND309 ,Set/Clear Pending Bit 309" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND308 ,Set/Clear Pending Bit 308" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND307 ,Set/Clear Pending Bit 307" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND306 ,Set/Clear Pending Bit 306" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND305 ,Set/Clear Pending Bit 305" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND304 ,Set/Clear Pending Bit 304" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND303 ,Set/Clear Pending Bit 303" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND302 ,Set/Clear Pending Bit 302" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND301 ,Set/Clear Pending Bit 301" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND300 ,Set/Clear Pending Bit 300" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND299 ,Set/Clear Pending Bit 299" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND298 ,Set/Clear Pending Bit 298" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND297 ,Set/Clear Pending Bit 297" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND296 ,Set/Clear Pending Bit 296" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND295 ,Set/Clear Pending Bit 295" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND294 ,Set/Clear Pending Bit 294" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND293 ,Set/Clear Pending Bit 293" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND292 ,Set/Clear Pending Bit 292" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND291 ,Set/Clear Pending Bit 291" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND290 ,Set/Clear Pending Bit 290" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND289 ,Set/Clear Pending Bit 289" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND288 ,Set/Clear Pending Bit 288" "Not pending,Pending" else rgroup.long 0x0224++0x03 line.long 0x0 "GICD_SET/CLR_PENDR9,Interrupt Set/Clear Pending Register 9" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x0A) group.long 0x0228++0x03 line.long 0x0 "GICD_SET/CLR_PENDR10,Interrupt Set/Clear Pending Register 10" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND351 ,Set/Clear Pending Bit 351" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND350 ,Set/Clear Pending Bit 350" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND349 ,Set/Clear Pending Bit 349" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND348 ,Set/Clear Pending Bit 348" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND347 ,Set/Clear Pending Bit 347" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND346 ,Set/Clear Pending Bit 346" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND345 ,Set/Clear Pending Bit 345" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND344 ,Set/Clear Pending Bit 344" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND343 ,Set/Clear Pending Bit 343" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND342 ,Set/Clear Pending Bit 342" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND341 ,Set/Clear Pending Bit 341" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND340 ,Set/Clear Pending Bit 340" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND339 ,Set/Clear Pending Bit 339" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND338 ,Set/Clear Pending Bit 338" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND337 ,Set/Clear Pending Bit 337" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND336 ,Set/Clear Pending Bit 336" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND335 ,Set/Clear Pending Bit 335" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND334 ,Set/Clear Pending Bit 334" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND333 ,Set/Clear Pending Bit 333" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND332 ,Set/Clear Pending Bit 332" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND331 ,Set/Clear Pending Bit 331" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND330 ,Set/Clear Pending Bit 330" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND329 ,Set/Clear Pending Bit 329" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND328 ,Set/Clear Pending Bit 328" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND327 ,Set/Clear Pending Bit 327" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND326 ,Set/Clear Pending Bit 326" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND325 ,Set/Clear Pending Bit 325" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND324 ,Set/Clear Pending Bit 324" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND323 ,Set/Clear Pending Bit 323" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND322 ,Set/Clear Pending Bit 322" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND321 ,Set/Clear Pending Bit 321" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND320 ,Set/Clear Pending Bit 320" "Not pending,Pending" else rgroup.long 0x0228++0x03 line.long 0x0 "GICD_SET/CLR_PENDR10,Interrupt Set/Clear Pending Register 10" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x0B) group.long 0x022C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR11,Interrupt Set/Clear Pending Register 11" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND383 ,Set/Clear Pending Bit 383" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND382 ,Set/Clear Pending Bit 382" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND381 ,Set/Clear Pending Bit 381" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND380 ,Set/Clear Pending Bit 380" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND379 ,Set/Clear Pending Bit 379" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND378 ,Set/Clear Pending Bit 378" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND377 ,Set/Clear Pending Bit 377" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND376 ,Set/Clear Pending Bit 376" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND375 ,Set/Clear Pending Bit 375" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND374 ,Set/Clear Pending Bit 374" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND373 ,Set/Clear Pending Bit 373" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND372 ,Set/Clear Pending Bit 372" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND371 ,Set/Clear Pending Bit 371" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND370 ,Set/Clear Pending Bit 370" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND369 ,Set/Clear Pending Bit 369" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND368 ,Set/Clear Pending Bit 368" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND367 ,Set/Clear Pending Bit 367" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND366 ,Set/Clear Pending Bit 366" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND365 ,Set/Clear Pending Bit 365" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND364 ,Set/Clear Pending Bit 364" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND363 ,Set/Clear Pending Bit 363" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND362 ,Set/Clear Pending Bit 362" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND361 ,Set/Clear Pending Bit 361" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND360 ,Set/Clear Pending Bit 360" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND359 ,Set/Clear Pending Bit 359" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND358 ,Set/Clear Pending Bit 358" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND357 ,Set/Clear Pending Bit 357" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND356 ,Set/Clear Pending Bit 356" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND355 ,Set/Clear Pending Bit 355" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND354 ,Set/Clear Pending Bit 354" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND353 ,Set/Clear Pending Bit 353" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND352 ,Set/Clear Pending Bit 352" "Not pending,Pending" else rgroup.long 0x022C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR11,Interrupt Set/Clear Pending Register 11" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x0C) group.long 0x0230++0x03 line.long 0x0 "GICD_SET/CLR_PENDR12,Interrupt Set/Clear Pending Register 12" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND415 ,Set/Clear Pending Bit 415" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND414 ,Set/Clear Pending Bit 414" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND413 ,Set/Clear Pending Bit 413" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND412 ,Set/Clear Pending Bit 412" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND411 ,Set/Clear Pending Bit 411" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND410 ,Set/Clear Pending Bit 410" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND409 ,Set/Clear Pending Bit 409" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND408 ,Set/Clear Pending Bit 408" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND407 ,Set/Clear Pending Bit 407" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND406 ,Set/Clear Pending Bit 406" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND405 ,Set/Clear Pending Bit 405" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND404 ,Set/Clear Pending Bit 404" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND403 ,Set/Clear Pending Bit 403" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND402 ,Set/Clear Pending Bit 402" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND401 ,Set/Clear Pending Bit 401" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND400 ,Set/Clear Pending Bit 400" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND399 ,Set/Clear Pending Bit 399" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND398 ,Set/Clear Pending Bit 398" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND397 ,Set/Clear Pending Bit 397" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND396 ,Set/Clear Pending Bit 396" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND395 ,Set/Clear Pending Bit 395" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND394 ,Set/Clear Pending Bit 394" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND393 ,Set/Clear Pending Bit 393" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND392 ,Set/Clear Pending Bit 392" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND391 ,Set/Clear Pending Bit 391" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND390 ,Set/Clear Pending Bit 390" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND389 ,Set/Clear Pending Bit 389" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND388 ,Set/Clear Pending Bit 388" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND387 ,Set/Clear Pending Bit 387" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND386 ,Set/Clear Pending Bit 386" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND385 ,Set/Clear Pending Bit 385" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND384 ,Set/Clear Pending Bit 384" "Not pending,Pending" else rgroup.long 0x0230++0x03 line.long 0x0 "GICD_SET/CLR_PENDR12,Interrupt Set/Clear Pending Register 12" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x0D) group.long 0x0234++0x03 line.long 0x0 "GICD_SET/CLR_PENDR13,Interrupt Set/Clear Pending Register 13" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND447 ,Set/Clear Pending Bit 447" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND446 ,Set/Clear Pending Bit 446" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND445 ,Set/Clear Pending Bit 445" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND444 ,Set/Clear Pending Bit 444" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND443 ,Set/Clear Pending Bit 443" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND442 ,Set/Clear Pending Bit 442" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND441 ,Set/Clear Pending Bit 441" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND440 ,Set/Clear Pending Bit 440" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND439 ,Set/Clear Pending Bit 439" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND438 ,Set/Clear Pending Bit 438" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND437 ,Set/Clear Pending Bit 437" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND436 ,Set/Clear Pending Bit 436" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND435 ,Set/Clear Pending Bit 435" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND434 ,Set/Clear Pending Bit 434" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND433 ,Set/Clear Pending Bit 433" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND432 ,Set/Clear Pending Bit 432" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND431 ,Set/Clear Pending Bit 431" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND430 ,Set/Clear Pending Bit 430" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND429 ,Set/Clear Pending Bit 429" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND428 ,Set/Clear Pending Bit 428" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND427 ,Set/Clear Pending Bit 427" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND426 ,Set/Clear Pending Bit 426" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND425 ,Set/Clear Pending Bit 425" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND424 ,Set/Clear Pending Bit 424" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND423 ,Set/Clear Pending Bit 423" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND422 ,Set/Clear Pending Bit 422" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND421 ,Set/Clear Pending Bit 421" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND420 ,Set/Clear Pending Bit 420" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND419 ,Set/Clear Pending Bit 419" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND418 ,Set/Clear Pending Bit 418" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND417 ,Set/Clear Pending Bit 417" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND416 ,Set/Clear Pending Bit 416" "Not pending,Pending" else rgroup.long 0x0234++0x03 line.long 0x0 "GICD_SET/CLR_PENDR13,Interrupt Set/Clear Pending Register 13" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x0E) group.long 0x0238++0x03 line.long 0x0 "GICD_SET/CLR_PENDR14,Interrupt Set/Clear Pending Register 14" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND479 ,Set/Clear Pending Bit 479" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND478 ,Set/Clear Pending Bit 478" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND477 ,Set/Clear Pending Bit 477" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND476 ,Set/Clear Pending Bit 476" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND475 ,Set/Clear Pending Bit 475" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND474 ,Set/Clear Pending Bit 474" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND473 ,Set/Clear Pending Bit 473" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND472 ,Set/Clear Pending Bit 472" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND471 ,Set/Clear Pending Bit 471" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND470 ,Set/Clear Pending Bit 470" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND469 ,Set/Clear Pending Bit 469" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND468 ,Set/Clear Pending Bit 468" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND467 ,Set/Clear Pending Bit 467" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND466 ,Set/Clear Pending Bit 466" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND465 ,Set/Clear Pending Bit 465" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND464 ,Set/Clear Pending Bit 464" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND463 ,Set/Clear Pending Bit 463" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND462 ,Set/Clear Pending Bit 462" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND461 ,Set/Clear Pending Bit 461" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND460 ,Set/Clear Pending Bit 460" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND459 ,Set/Clear Pending Bit 459" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND458 ,Set/Clear Pending Bit 458" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND457 ,Set/Clear Pending Bit 457" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND456 ,Set/Clear Pending Bit 456" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND455 ,Set/Clear Pending Bit 455" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND454 ,Set/Clear Pending Bit 454" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND453 ,Set/Clear Pending Bit 453" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND452 ,Set/Clear Pending Bit 452" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND451 ,Set/Clear Pending Bit 451" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND450 ,Set/Clear Pending Bit 450" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND449 ,Set/Clear Pending Bit 449" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND448 ,Set/Clear Pending Bit 448" "Not pending,Pending" else rgroup.long 0x0238++0x03 line.long 0x0 "GICD_SET/CLR_PENDR14,Interrupt Set/Clear Pending Register 14" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x0F) group.long 0x023C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR15,Interrupt Set/Clear Pending Register 15" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND511 ,Set/Clear Pending Bit 511" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND510 ,Set/Clear Pending Bit 510" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND509 ,Set/Clear Pending Bit 509" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND508 ,Set/Clear Pending Bit 508" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND507 ,Set/Clear Pending Bit 507" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND506 ,Set/Clear Pending Bit 506" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND505 ,Set/Clear Pending Bit 505" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND504 ,Set/Clear Pending Bit 504" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND503 ,Set/Clear Pending Bit 503" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND502 ,Set/Clear Pending Bit 502" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND501 ,Set/Clear Pending Bit 501" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND500 ,Set/Clear Pending Bit 500" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND499 ,Set/Clear Pending Bit 499" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND498 ,Set/Clear Pending Bit 498" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND497 ,Set/Clear Pending Bit 497" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND496 ,Set/Clear Pending Bit 496" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND495 ,Set/Clear Pending Bit 495" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND494 ,Set/Clear Pending Bit 494" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND493 ,Set/Clear Pending Bit 493" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND492 ,Set/Clear Pending Bit 492" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND491 ,Set/Clear Pending Bit 491" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND490 ,Set/Clear Pending Bit 490" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND489 ,Set/Clear Pending Bit 489" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND488 ,Set/Clear Pending Bit 488" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND487 ,Set/Clear Pending Bit 487" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND486 ,Set/Clear Pending Bit 486" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND485 ,Set/Clear Pending Bit 485" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND484 ,Set/Clear Pending Bit 484" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND483 ,Set/Clear Pending Bit 483" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND482 ,Set/Clear Pending Bit 482" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND481 ,Set/Clear Pending Bit 481" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND480 ,Set/Clear Pending Bit 480" "Not pending,Pending" else rgroup.long 0x023C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR15,Interrupt Set/Clear Pending Register 15" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x10) group.long 0x0240++0x03 line.long 0x0 "GICD_SET/CLR_PENDR16,Interrupt Set/Clear Pending Register 16" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND543 ,Set/Clear Pending Bit 543" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND542 ,Set/Clear Pending Bit 542" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND541 ,Set/Clear Pending Bit 541" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND540 ,Set/Clear Pending Bit 540" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND539 ,Set/Clear Pending Bit 539" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND538 ,Set/Clear Pending Bit 538" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND537 ,Set/Clear Pending Bit 537" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND536 ,Set/Clear Pending Bit 536" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND535 ,Set/Clear Pending Bit 535" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND534 ,Set/Clear Pending Bit 534" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND533 ,Set/Clear Pending Bit 533" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND532 ,Set/Clear Pending Bit 532" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND531 ,Set/Clear Pending Bit 531" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND530 ,Set/Clear Pending Bit 530" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND529 ,Set/Clear Pending Bit 529" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND528 ,Set/Clear Pending Bit 528" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND527 ,Set/Clear Pending Bit 527" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND526 ,Set/Clear Pending Bit 526" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND525 ,Set/Clear Pending Bit 525" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND524 ,Set/Clear Pending Bit 524" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND523 ,Set/Clear Pending Bit 523" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND522 ,Set/Clear Pending Bit 522" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND521 ,Set/Clear Pending Bit 521" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND520 ,Set/Clear Pending Bit 520" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND519 ,Set/Clear Pending Bit 519" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND518 ,Set/Clear Pending Bit 518" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND517 ,Set/Clear Pending Bit 517" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND516 ,Set/Clear Pending Bit 516" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND515 ,Set/Clear Pending Bit 515" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND514 ,Set/Clear Pending Bit 514" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND513 ,Set/Clear Pending Bit 513" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND512 ,Set/Clear Pending Bit 512" "Not pending,Pending" else rgroup.long 0x0240++0x03 line.long 0x0 "GICD_SET/CLR_PENDR16,Interrupt Set/Clear Pending Register 16" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x11) group.long 0x0244++0x03 line.long 0x0 "GICD_SET/CLR_PENDR17,Interrupt Set/Clear Pending Register 17" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND575 ,Set/Clear Pending Bit 575" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND574 ,Set/Clear Pending Bit 574" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND573 ,Set/Clear Pending Bit 573" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND572 ,Set/Clear Pending Bit 572" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND571 ,Set/Clear Pending Bit 571" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND570 ,Set/Clear Pending Bit 570" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND569 ,Set/Clear Pending Bit 569" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND568 ,Set/Clear Pending Bit 568" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND567 ,Set/Clear Pending Bit 567" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND566 ,Set/Clear Pending Bit 566" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND565 ,Set/Clear Pending Bit 565" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND564 ,Set/Clear Pending Bit 564" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND563 ,Set/Clear Pending Bit 563" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND562 ,Set/Clear Pending Bit 562" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND561 ,Set/Clear Pending Bit 561" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND560 ,Set/Clear Pending Bit 560" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND559 ,Set/Clear Pending Bit 559" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND558 ,Set/Clear Pending Bit 558" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND557 ,Set/Clear Pending Bit 557" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND556 ,Set/Clear Pending Bit 556" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND555 ,Set/Clear Pending Bit 555" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND554 ,Set/Clear Pending Bit 554" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND553 ,Set/Clear Pending Bit 553" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND552 ,Set/Clear Pending Bit 552" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND551 ,Set/Clear Pending Bit 551" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND550 ,Set/Clear Pending Bit 550" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND549 ,Set/Clear Pending Bit 549" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND548 ,Set/Clear Pending Bit 548" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND547 ,Set/Clear Pending Bit 547" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND546 ,Set/Clear Pending Bit 546" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND545 ,Set/Clear Pending Bit 545" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND544 ,Set/Clear Pending Bit 544" "Not pending,Pending" else rgroup.long 0x0244++0x03 line.long 0x0 "GICD_SET/CLR_PENDR17,Interrupt Set/Clear Pending Register 17" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x12) group.long 0x0248++0x03 line.long 0x0 "GICD_SET/CLR_PENDR18,Interrupt Set/Clear Pending Register 18" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND607 ,Set/Clear Pending Bit 607" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND606 ,Set/Clear Pending Bit 606" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND605 ,Set/Clear Pending Bit 605" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND604 ,Set/Clear Pending Bit 604" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND603 ,Set/Clear Pending Bit 603" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND602 ,Set/Clear Pending Bit 602" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND601 ,Set/Clear Pending Bit 601" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND600 ,Set/Clear Pending Bit 600" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND599 ,Set/Clear Pending Bit 599" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND598 ,Set/Clear Pending Bit 598" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND597 ,Set/Clear Pending Bit 597" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND596 ,Set/Clear Pending Bit 596" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND595 ,Set/Clear Pending Bit 595" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND594 ,Set/Clear Pending Bit 594" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND593 ,Set/Clear Pending Bit 593" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND592 ,Set/Clear Pending Bit 592" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND591 ,Set/Clear Pending Bit 591" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND590 ,Set/Clear Pending Bit 590" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND589 ,Set/Clear Pending Bit 589" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND588 ,Set/Clear Pending Bit 588" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND587 ,Set/Clear Pending Bit 587" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND586 ,Set/Clear Pending Bit 586" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND585 ,Set/Clear Pending Bit 585" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND584 ,Set/Clear Pending Bit 584" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND583 ,Set/Clear Pending Bit 583" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND582 ,Set/Clear Pending Bit 582" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND581 ,Set/Clear Pending Bit 581" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND580 ,Set/Clear Pending Bit 580" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND579 ,Set/Clear Pending Bit 579" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND578 ,Set/Clear Pending Bit 578" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND577 ,Set/Clear Pending Bit 577" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND576 ,Set/Clear Pending Bit 576" "Not pending,Pending" else rgroup.long 0x0248++0x03 line.long 0x0 "GICD_SET/CLR_PENDR18,Interrupt Set/Clear Pending Register 18" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x13) group.long 0x024C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR19,Interrupt Set/Clear Pending Register 19" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND639 ,Set/Clear Pending Bit 639" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND638 ,Set/Clear Pending Bit 638" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND637 ,Set/Clear Pending Bit 637" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND636 ,Set/Clear Pending Bit 636" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND635 ,Set/Clear Pending Bit 635" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND634 ,Set/Clear Pending Bit 634" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND633 ,Set/Clear Pending Bit 633" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND632 ,Set/Clear Pending Bit 632" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND631 ,Set/Clear Pending Bit 631" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND630 ,Set/Clear Pending Bit 630" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND629 ,Set/Clear Pending Bit 629" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND628 ,Set/Clear Pending Bit 628" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND627 ,Set/Clear Pending Bit 627" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND626 ,Set/Clear Pending Bit 626" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND625 ,Set/Clear Pending Bit 625" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND624 ,Set/Clear Pending Bit 624" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND623 ,Set/Clear Pending Bit 623" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND622 ,Set/Clear Pending Bit 622" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND621 ,Set/Clear Pending Bit 621" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND620 ,Set/Clear Pending Bit 620" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND619 ,Set/Clear Pending Bit 619" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND618 ,Set/Clear Pending Bit 618" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND617 ,Set/Clear Pending Bit 617" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND616 ,Set/Clear Pending Bit 616" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND615 ,Set/Clear Pending Bit 615" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND614 ,Set/Clear Pending Bit 614" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND613 ,Set/Clear Pending Bit 613" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND612 ,Set/Clear Pending Bit 612" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND611 ,Set/Clear Pending Bit 611" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND610 ,Set/Clear Pending Bit 610" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND609 ,Set/Clear Pending Bit 609" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND608 ,Set/Clear Pending Bit 608" "Not pending,Pending" else rgroup.long 0x024C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR19,Interrupt Set/Clear Pending Register 19" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x14) group.long 0x0250++0x03 line.long 0x0 "GICD_SET/CLR_PENDR20,Interrupt Set/Clear Pending Register 20" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND671 ,Set/Clear Pending Bit 671" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND670 ,Set/Clear Pending Bit 670" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND669 ,Set/Clear Pending Bit 669" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND668 ,Set/Clear Pending Bit 668" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND667 ,Set/Clear Pending Bit 667" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND666 ,Set/Clear Pending Bit 666" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND665 ,Set/Clear Pending Bit 665" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND664 ,Set/Clear Pending Bit 664" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND663 ,Set/Clear Pending Bit 663" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND662 ,Set/Clear Pending Bit 662" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND661 ,Set/Clear Pending Bit 661" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND660 ,Set/Clear Pending Bit 660" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND659 ,Set/Clear Pending Bit 659" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND658 ,Set/Clear Pending Bit 658" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND657 ,Set/Clear Pending Bit 657" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND656 ,Set/Clear Pending Bit 656" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND655 ,Set/Clear Pending Bit 655" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND654 ,Set/Clear Pending Bit 654" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND653 ,Set/Clear Pending Bit 653" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND652 ,Set/Clear Pending Bit 652" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND651 ,Set/Clear Pending Bit 651" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND650 ,Set/Clear Pending Bit 650" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND649 ,Set/Clear Pending Bit 649" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND648 ,Set/Clear Pending Bit 648" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND647 ,Set/Clear Pending Bit 647" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND646 ,Set/Clear Pending Bit 646" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND645 ,Set/Clear Pending Bit 645" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND644 ,Set/Clear Pending Bit 644" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND643 ,Set/Clear Pending Bit 643" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND642 ,Set/Clear Pending Bit 642" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND641 ,Set/Clear Pending Bit 641" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND640 ,Set/Clear Pending Bit 640" "Not pending,Pending" else rgroup.long 0x0250++0x03 line.long 0x0 "GICD_SET/CLR_PENDR20,Interrupt Set/Clear Pending Register 20" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x15) group.long 0x0254++0x03 line.long 0x0 "GICD_SET/CLR_PENDR21,Interrupt Set/Clear Pending Register 21" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND703 ,Set/Clear Pending Bit 703" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND702 ,Set/Clear Pending Bit 702" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND701 ,Set/Clear Pending Bit 701" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND700 ,Set/Clear Pending Bit 700" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND699 ,Set/Clear Pending Bit 699" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND698 ,Set/Clear Pending Bit 698" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND697 ,Set/Clear Pending Bit 697" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND696 ,Set/Clear Pending Bit 696" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND695 ,Set/Clear Pending Bit 695" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND694 ,Set/Clear Pending Bit 694" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND693 ,Set/Clear Pending Bit 693" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND692 ,Set/Clear Pending Bit 692" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND691 ,Set/Clear Pending Bit 691" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND690 ,Set/Clear Pending Bit 690" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND689 ,Set/Clear Pending Bit 689" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND688 ,Set/Clear Pending Bit 688" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND687 ,Set/Clear Pending Bit 687" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND686 ,Set/Clear Pending Bit 686" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND685 ,Set/Clear Pending Bit 685" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND684 ,Set/Clear Pending Bit 684" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND683 ,Set/Clear Pending Bit 683" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND682 ,Set/Clear Pending Bit 682" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND681 ,Set/Clear Pending Bit 681" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND680 ,Set/Clear Pending Bit 680" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND679 ,Set/Clear Pending Bit 679" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND678 ,Set/Clear Pending Bit 678" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND677 ,Set/Clear Pending Bit 677" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND676 ,Set/Clear Pending Bit 676" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND675 ,Set/Clear Pending Bit 675" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND674 ,Set/Clear Pending Bit 674" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND673 ,Set/Clear Pending Bit 673" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND672 ,Set/Clear Pending Bit 672" "Not pending,Pending" else rgroup.long 0x0254++0x03 line.long 0x0 "GICD_SET/CLR_PENDR21,Interrupt Set/Clear Pending Register 21" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x16) group.long 0x0258++0x03 line.long 0x0 "GICD_SET/CLR_PENDR22,Interrupt Set/Clear Pending Register 22" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND735 ,Set/Clear Pending Bit 735" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND734 ,Set/Clear Pending Bit 734" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND733 ,Set/Clear Pending Bit 733" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND732 ,Set/Clear Pending Bit 732" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND731 ,Set/Clear Pending Bit 731" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND730 ,Set/Clear Pending Bit 730" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND729 ,Set/Clear Pending Bit 729" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND728 ,Set/Clear Pending Bit 728" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND727 ,Set/Clear Pending Bit 727" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND726 ,Set/Clear Pending Bit 726" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND725 ,Set/Clear Pending Bit 725" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND724 ,Set/Clear Pending Bit 724" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND723 ,Set/Clear Pending Bit 723" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND722 ,Set/Clear Pending Bit 722" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND721 ,Set/Clear Pending Bit 721" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND720 ,Set/Clear Pending Bit 720" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND719 ,Set/Clear Pending Bit 719" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND718 ,Set/Clear Pending Bit 718" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND717 ,Set/Clear Pending Bit 717" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND716 ,Set/Clear Pending Bit 716" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND715 ,Set/Clear Pending Bit 715" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND714 ,Set/Clear Pending Bit 714" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND713 ,Set/Clear Pending Bit 713" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND712 ,Set/Clear Pending Bit 712" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND711 ,Set/Clear Pending Bit 711" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND710 ,Set/Clear Pending Bit 710" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND709 ,Set/Clear Pending Bit 709" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND708 ,Set/Clear Pending Bit 708" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND707 ,Set/Clear Pending Bit 707" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND706 ,Set/Clear Pending Bit 706" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND705 ,Set/Clear Pending Bit 705" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND704 ,Set/Clear Pending Bit 704" "Not pending,Pending" else rgroup.long 0x0258++0x03 line.long 0x0 "GICD_SET/CLR_PENDR22,Interrupt Set/Clear Pending Register 22" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x17) group.long 0x025C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR23,Interrupt Set/Clear Pending Register 23" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND767 ,Set/Clear Pending Bit 767" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND766 ,Set/Clear Pending Bit 766" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND765 ,Set/Clear Pending Bit 765" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND764 ,Set/Clear Pending Bit 764" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND763 ,Set/Clear Pending Bit 763" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND762 ,Set/Clear Pending Bit 762" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND761 ,Set/Clear Pending Bit 761" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND760 ,Set/Clear Pending Bit 760" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND759 ,Set/Clear Pending Bit 759" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND758 ,Set/Clear Pending Bit 758" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND757 ,Set/Clear Pending Bit 757" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND756 ,Set/Clear Pending Bit 756" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND755 ,Set/Clear Pending Bit 755" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND754 ,Set/Clear Pending Bit 754" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND753 ,Set/Clear Pending Bit 753" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND752 ,Set/Clear Pending Bit 752" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND751 ,Set/Clear Pending Bit 751" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND750 ,Set/Clear Pending Bit 750" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND749 ,Set/Clear Pending Bit 749" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND748 ,Set/Clear Pending Bit 748" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND747 ,Set/Clear Pending Bit 747" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND746 ,Set/Clear Pending Bit 746" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND745 ,Set/Clear Pending Bit 745" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND744 ,Set/Clear Pending Bit 744" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND743 ,Set/Clear Pending Bit 743" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND742 ,Set/Clear Pending Bit 742" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND741 ,Set/Clear Pending Bit 741" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND740 ,Set/Clear Pending Bit 740" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND739 ,Set/Clear Pending Bit 739" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND738 ,Set/Clear Pending Bit 738" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND737 ,Set/Clear Pending Bit 737" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND736 ,Set/Clear Pending Bit 736" "Not pending,Pending" else rgroup.long 0x025C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR23,Interrupt Set/Clear Pending Register 23" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x18) group.long 0x0260++0x03 line.long 0x0 "GICD_SET/CLR_PENDR24,Interrupt Set/Clear Pending Register 24" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND799 ,Set/Clear Pending Bit 799" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND798 ,Set/Clear Pending Bit 798" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND797 ,Set/Clear Pending Bit 797" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND796 ,Set/Clear Pending Bit 796" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND795 ,Set/Clear Pending Bit 795" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND794 ,Set/Clear Pending Bit 794" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND793 ,Set/Clear Pending Bit 793" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND792 ,Set/Clear Pending Bit 792" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND791 ,Set/Clear Pending Bit 791" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND790 ,Set/Clear Pending Bit 790" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND789 ,Set/Clear Pending Bit 789" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND788 ,Set/Clear Pending Bit 788" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND787 ,Set/Clear Pending Bit 787" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND786 ,Set/Clear Pending Bit 786" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND785 ,Set/Clear Pending Bit 785" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND784 ,Set/Clear Pending Bit 784" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND783 ,Set/Clear Pending Bit 783" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND782 ,Set/Clear Pending Bit 782" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND781 ,Set/Clear Pending Bit 781" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND780 ,Set/Clear Pending Bit 780" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND779 ,Set/Clear Pending Bit 779" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND778 ,Set/Clear Pending Bit 778" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND777 ,Set/Clear Pending Bit 777" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND776 ,Set/Clear Pending Bit 776" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND775 ,Set/Clear Pending Bit 775" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND774 ,Set/Clear Pending Bit 774" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND773 ,Set/Clear Pending Bit 773" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND772 ,Set/Clear Pending Bit 772" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND771 ,Set/Clear Pending Bit 771" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND770 ,Set/Clear Pending Bit 770" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND769 ,Set/Clear Pending Bit 769" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND768 ,Set/Clear Pending Bit 768" "Not pending,Pending" else rgroup.long 0x0260++0x03 line.long 0x0 "GICD_SET/CLR_PENDR24,Interrupt Set/Clear Pending Register 24" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x19) group.long 0x0264++0x03 line.long 0x0 "GICD_SET/CLR_PENDR25,Interrupt Set/Clear Pending Register 25" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND831 ,Set/Clear Pending Bit 831" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND830 ,Set/Clear Pending Bit 830" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND829 ,Set/Clear Pending Bit 829" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND828 ,Set/Clear Pending Bit 828" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND827 ,Set/Clear Pending Bit 827" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND826 ,Set/Clear Pending Bit 826" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND825 ,Set/Clear Pending Bit 825" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND824 ,Set/Clear Pending Bit 824" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND823 ,Set/Clear Pending Bit 823" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND822 ,Set/Clear Pending Bit 822" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND821 ,Set/Clear Pending Bit 821" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND820 ,Set/Clear Pending Bit 820" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND819 ,Set/Clear Pending Bit 819" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND818 ,Set/Clear Pending Bit 818" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND817 ,Set/Clear Pending Bit 817" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND816 ,Set/Clear Pending Bit 816" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND815 ,Set/Clear Pending Bit 815" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND814 ,Set/Clear Pending Bit 814" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND813 ,Set/Clear Pending Bit 813" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND812 ,Set/Clear Pending Bit 812" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND811 ,Set/Clear Pending Bit 811" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND810 ,Set/Clear Pending Bit 810" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND809 ,Set/Clear Pending Bit 809" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND808 ,Set/Clear Pending Bit 808" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND807 ,Set/Clear Pending Bit 807" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND806 ,Set/Clear Pending Bit 806" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND805 ,Set/Clear Pending Bit 805" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND804 ,Set/Clear Pending Bit 804" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND803 ,Set/Clear Pending Bit 803" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND802 ,Set/Clear Pending Bit 802" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND801 ,Set/Clear Pending Bit 801" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND800 ,Set/Clear Pending Bit 800" "Not pending,Pending" else rgroup.long 0x0264++0x03 line.long 0x0 "GICD_SET/CLR_PENDR25,Interrupt Set/Clear Pending Register 25" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x1A) group.long 0x0268++0x03 line.long 0x0 "GICD_SET/CLR_PENDR26,Interrupt Set/Clear Pending Register 26" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND863 ,Set/Clear Pending Bit 863" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND862 ,Set/Clear Pending Bit 862" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND861 ,Set/Clear Pending Bit 861" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND860 ,Set/Clear Pending Bit 860" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND859 ,Set/Clear Pending Bit 859" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND858 ,Set/Clear Pending Bit 858" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND857 ,Set/Clear Pending Bit 857" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND856 ,Set/Clear Pending Bit 856" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND855 ,Set/Clear Pending Bit 855" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND854 ,Set/Clear Pending Bit 854" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND853 ,Set/Clear Pending Bit 853" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND852 ,Set/Clear Pending Bit 852" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND851 ,Set/Clear Pending Bit 851" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND850 ,Set/Clear Pending Bit 850" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND849 ,Set/Clear Pending Bit 849" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND848 ,Set/Clear Pending Bit 848" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND847 ,Set/Clear Pending Bit 847" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND846 ,Set/Clear Pending Bit 846" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND845 ,Set/Clear Pending Bit 845" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND844 ,Set/Clear Pending Bit 844" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND843 ,Set/Clear Pending Bit 843" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND842 ,Set/Clear Pending Bit 842" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND841 ,Set/Clear Pending Bit 841" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND840 ,Set/Clear Pending Bit 840" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND839 ,Set/Clear Pending Bit 839" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND838 ,Set/Clear Pending Bit 838" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND837 ,Set/Clear Pending Bit 837" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND836 ,Set/Clear Pending Bit 836" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND835 ,Set/Clear Pending Bit 835" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND834 ,Set/Clear Pending Bit 834" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND833 ,Set/Clear Pending Bit 833" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND832 ,Set/Clear Pending Bit 832" "Not pending,Pending" else rgroup.long 0x0268++0x03 line.long 0x0 "GICD_SET/CLR_PENDR26,Interrupt Set/Clear Pending Register 26" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x1B) group.long 0x026C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR27,Interrupt Set/Clear Pending Register 27" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND895 ,Set/Clear Pending Bit 895" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND894 ,Set/Clear Pending Bit 894" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND893 ,Set/Clear Pending Bit 893" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND892 ,Set/Clear Pending Bit 892" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND891 ,Set/Clear Pending Bit 891" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND890 ,Set/Clear Pending Bit 890" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND889 ,Set/Clear Pending Bit 889" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND888 ,Set/Clear Pending Bit 888" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND887 ,Set/Clear Pending Bit 887" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND886 ,Set/Clear Pending Bit 886" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND885 ,Set/Clear Pending Bit 885" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND884 ,Set/Clear Pending Bit 884" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND883 ,Set/Clear Pending Bit 883" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND882 ,Set/Clear Pending Bit 882" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND881 ,Set/Clear Pending Bit 881" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND880 ,Set/Clear Pending Bit 880" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND879 ,Set/Clear Pending Bit 879" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND878 ,Set/Clear Pending Bit 878" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND877 ,Set/Clear Pending Bit 877" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND876 ,Set/Clear Pending Bit 876" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND875 ,Set/Clear Pending Bit 875" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND874 ,Set/Clear Pending Bit 874" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND873 ,Set/Clear Pending Bit 873" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND872 ,Set/Clear Pending Bit 872" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND871 ,Set/Clear Pending Bit 871" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND870 ,Set/Clear Pending Bit 870" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND869 ,Set/Clear Pending Bit 869" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND868 ,Set/Clear Pending Bit 868" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND867 ,Set/Clear Pending Bit 867" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND866 ,Set/Clear Pending Bit 866" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND865 ,Set/Clear Pending Bit 865" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND864 ,Set/Clear Pending Bit 864" "Not pending,Pending" else rgroup.long 0x026C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR27,Interrupt Set/Clear Pending Register 27" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x1C) group.long 0x0270++0x03 line.long 0x0 "GICD_SET/CLR_PENDR28,Interrupt Set/Clear Pending Register 28" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND927 ,Set/Clear Pending Bit 927" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND926 ,Set/Clear Pending Bit 926" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND925 ,Set/Clear Pending Bit 925" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND924 ,Set/Clear Pending Bit 924" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND923 ,Set/Clear Pending Bit 923" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND922 ,Set/Clear Pending Bit 922" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND921 ,Set/Clear Pending Bit 921" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND920 ,Set/Clear Pending Bit 920" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND919 ,Set/Clear Pending Bit 919" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND918 ,Set/Clear Pending Bit 918" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND917 ,Set/Clear Pending Bit 917" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND916 ,Set/Clear Pending Bit 916" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND915 ,Set/Clear Pending Bit 915" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND914 ,Set/Clear Pending Bit 914" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND913 ,Set/Clear Pending Bit 913" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND912 ,Set/Clear Pending Bit 912" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND911 ,Set/Clear Pending Bit 911" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND910 ,Set/Clear Pending Bit 910" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND909 ,Set/Clear Pending Bit 909" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND908 ,Set/Clear Pending Bit 908" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND907 ,Set/Clear Pending Bit 907" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND906 ,Set/Clear Pending Bit 906" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND905 ,Set/Clear Pending Bit 905" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND904 ,Set/Clear Pending Bit 904" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND903 ,Set/Clear Pending Bit 903" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND902 ,Set/Clear Pending Bit 902" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND901 ,Set/Clear Pending Bit 901" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND900 ,Set/Clear Pending Bit 900" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND899 ,Set/Clear Pending Bit 899" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND898 ,Set/Clear Pending Bit 898" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND897 ,Set/Clear Pending Bit 897" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND896 ,Set/Clear Pending Bit 896" "Not pending,Pending" else rgroup.long 0x0270++0x03 line.long 0x0 "GICD_SET/CLR_PENDR28,Interrupt Set/Clear Pending Register 28" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x1D) group.long 0x0274++0x03 line.long 0x0 "GICD_SET/CLR_PENDR29,Interrupt Set/Clear Pending Register 29" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND959 ,Set/Clear Pending Bit 959" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND958 ,Set/Clear Pending Bit 958" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND957 ,Set/Clear Pending Bit 957" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND956 ,Set/Clear Pending Bit 956" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND955 ,Set/Clear Pending Bit 955" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND954 ,Set/Clear Pending Bit 954" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND953 ,Set/Clear Pending Bit 953" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND952 ,Set/Clear Pending Bit 952" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND951 ,Set/Clear Pending Bit 951" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND950 ,Set/Clear Pending Bit 950" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND949 ,Set/Clear Pending Bit 949" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND948 ,Set/Clear Pending Bit 948" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND947 ,Set/Clear Pending Bit 947" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND946 ,Set/Clear Pending Bit 946" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND945 ,Set/Clear Pending Bit 945" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND944 ,Set/Clear Pending Bit 944" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND943 ,Set/Clear Pending Bit 943" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND942 ,Set/Clear Pending Bit 942" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND941 ,Set/Clear Pending Bit 941" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND940 ,Set/Clear Pending Bit 940" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND939 ,Set/Clear Pending Bit 939" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND938 ,Set/Clear Pending Bit 938" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND937 ,Set/Clear Pending Bit 937" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND936 ,Set/Clear Pending Bit 936" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND935 ,Set/Clear Pending Bit 935" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND934 ,Set/Clear Pending Bit 934" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND933 ,Set/Clear Pending Bit 933" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND932 ,Set/Clear Pending Bit 932" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND931 ,Set/Clear Pending Bit 931" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND930 ,Set/Clear Pending Bit 930" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND929 ,Set/Clear Pending Bit 929" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND928 ,Set/Clear Pending Bit 928" "Not pending,Pending" else rgroup.long 0x0274++0x03 line.long 0x0 "GICD_SET/CLR_PENDR29,Interrupt Set/Clear Pending Register 29" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x1E) group.long 0x0278++0x03 line.long 0x0 "GICD_SET/CLR_PENDR30,Interrupt Set/Clear Pending Register 30" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND991 ,Set/Clear Pending Bit 991" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND990 ,Set/Clear Pending Bit 990" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND989 ,Set/Clear Pending Bit 989" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND988 ,Set/Clear Pending Bit 988" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND987 ,Set/Clear Pending Bit 987" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND986 ,Set/Clear Pending Bit 986" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND985 ,Set/Clear Pending Bit 985" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND984 ,Set/Clear Pending Bit 984" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND983 ,Set/Clear Pending Bit 983" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND982 ,Set/Clear Pending Bit 982" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND981 ,Set/Clear Pending Bit 981" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND980 ,Set/Clear Pending Bit 980" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND979 ,Set/Clear Pending Bit 979" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND978 ,Set/Clear Pending Bit 978" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND977 ,Set/Clear Pending Bit 977" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND976 ,Set/Clear Pending Bit 976" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND975 ,Set/Clear Pending Bit 975" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND974 ,Set/Clear Pending Bit 974" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND973 ,Set/Clear Pending Bit 973" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND972 ,Set/Clear Pending Bit 972" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND971 ,Set/Clear Pending Bit 971" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND970 ,Set/Clear Pending Bit 970" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND969 ,Set/Clear Pending Bit 969" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND968 ,Set/Clear Pending Bit 968" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND967 ,Set/Clear Pending Bit 967" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND966 ,Set/Clear Pending Bit 966" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND965 ,Set/Clear Pending Bit 965" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND964 ,Set/Clear Pending Bit 964" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND963 ,Set/Clear Pending Bit 963" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND962 ,Set/Clear Pending Bit 962" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND961 ,Set/Clear Pending Bit 961" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND960 ,Set/Clear Pending Bit 960" "Not pending,Pending" else rgroup.long 0x0278++0x03 line.long 0x0 "GICD_SET/CLR_PENDR30,Interrupt Set/Clear Pending Register 30" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)==0x1F) group.long 0x027C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR31,Interrupt Set/Clear Pending Register 31" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND1019 ,Set/Clear Pending Bit 1019" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND1018 ,Set/Clear Pending Bit 1018" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND1017 ,Set/Clear Pending Bit 1017" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND1016 ,Set/Clear Pending Bit 1016" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND1015 ,Set/Clear Pending Bit 1015" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND1014 ,Set/Clear Pending Bit 1014" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND1013 ,Set/Clear Pending Bit 1013" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND1012 ,Set/Clear Pending Bit 1012" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND1011 ,Set/Clear Pending Bit 1011" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND1010 ,Set/Clear Pending Bit 1010" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND1009 ,Set/Clear Pending Bit 1009" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND1008 ,Set/Clear Pending Bit 1008" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND1007 ,Set/Clear Pending Bit 1007" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND1006 ,Set/Clear Pending Bit 1006" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND1005 ,Set/Clear Pending Bit 1005" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND1004 ,Set/Clear Pending Bit 1004" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND1003 ,Set/Clear Pending Bit 1003" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND1002 ,Set/Clear Pending Bit 1002" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND1001 ,Set/Clear Pending Bit 1001" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND1000 ,Set/Clear Pending Bit 1000" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND999 ,Set/Clear Pending Bit 999" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND998 ,Set/Clear Pending Bit 998" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND997 ,Set/Clear Pending Bit 997" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND996 ,Set/Clear Pending Bit 996" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND995 ,Set/Clear Pending Bit 995" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND994 ,Set/Clear Pending Bit 994" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND993 ,Set/Clear Pending Bit 993" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND992 ,Set/Clear Pending Bit 992" "Not pending,Pending" else rgroup.long 0x027C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR31,Interrupt Set/Clear Pending Register 31" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif tree.end width 24. tree "Set/Clear Active Registers" if (((per.l(ad:0xF9010000+0x08))&0xFF000000)==(0x0000000||0x1000000)) rgroup.long 0x0300++0x03 line.long 0x0 "GICD_ICDABR0,Active Status Register 0" bitfld.long 0x00 31. " ASB31 ,Active Status Bit 31" "Not active,Active" bitfld.long 0x00 30. " ASB30 ,Active Status Bit 30" "Not active,Active" bitfld.long 0x00 29. " ASB29 ,Active Status Bit 29" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB28 ,Active Status Bit 28" "Not active,Active" bitfld.long 0x00 27. " ASB27 ,Active Status Bit 27" "Not active,Active" bitfld.long 0x00 26. " ASB26 ,Active Status Bit 26" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB25 ,Active Status Bit 25" "Not active,Active" bitfld.long 0x00 24. " ASB24 ,Active Status Bit 24" "Not active,Active" bitfld.long 0x00 23. " ASB23 ,Active Status Bit 23" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB22 ,Active Status Bit 22" "Not active,Active" bitfld.long 0x00 21. " ASB21 ,Active Status Bit 21" "Not active,Active" bitfld.long 0x00 20. " ASB20 ,Active Status Bit 20" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB19 ,Active Status Bit 19" "Not active,Active" bitfld.long 0x00 18. " ASB18 ,Active Status Bit 18" "Not active,Active" bitfld.long 0x00 17. " ASB17 ,Active Status Bit 17" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB16 ,Active Status Bit 16" "Not active,Active" bitfld.long 0x00 15. " ASB15 ,Active Status Bit 15" "Not active,Active" bitfld.long 0x00 14. " ASB14 ,Active Status Bit 14" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB13 ,Active Status Bit 13" "Not active,Active" bitfld.long 0x00 12. " ASB12 ,Active Status Bit 12" "Not active,Active" bitfld.long 0x00 11. " ASB11 ,Active Status Bit 11" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB10 ,Active Status Bit 10" "Not active,Active" bitfld.long 0x00 9. " ASB9 ,Active Status Bit 9" "Not active,Active" bitfld.long 0x00 8. " ASB8 ,Active Status Bit 8" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB7 ,Active Status Bit 7" "Not active,Active" bitfld.long 0x00 6. " ASB6 ,Active Status Bit 6" "Not active,Active" bitfld.long 0x00 5. " ASB5 ,Active Status Bit 5" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB4 ,Active Status Bit 4" "Not active,Active" bitfld.long 0x00 3. " ASB3 ,Active Status Bit 3" "Not active,Active" bitfld.long 0x00 2. " ASB2 ,Active Status Bit 2" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB1 ,Active Status Bit 1" "Not active,Active" bitfld.long 0x00 0. " ASB0 ,Active Status Bit 0" "Not active,Active" if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x01) rgroup.long 0x0304++0x03 line.long 0x0 "GICD_ICDABR1,Active Status Register 1" bitfld.long 0x00 31. " ASB63 ,Active Status Bit 63" "Not active,Active" bitfld.long 0x00 30. " ASB62 ,Active Status Bit 62" "Not active,Active" bitfld.long 0x00 29. " ASB61 ,Active Status Bit 61" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB60 ,Active Status Bit 60" "Not active,Active" bitfld.long 0x00 27. " ASB59 ,Active Status Bit 59" "Not active,Active" bitfld.long 0x00 26. " ASB58 ,Active Status Bit 58" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB57 ,Active Status Bit 57" "Not active,Active" bitfld.long 0x00 24. " ASB56 ,Active Status Bit 56" "Not active,Active" bitfld.long 0x00 23. " ASB55 ,Active Status Bit 55" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB54 ,Active Status Bit 54" "Not active,Active" bitfld.long 0x00 21. " ASB53 ,Active Status Bit 53" "Not active,Active" bitfld.long 0x00 20. " ASB52 ,Active Status Bit 52" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB51 ,Active Status Bit 51" "Not active,Active" bitfld.long 0x00 18. " ASB50 ,Active Status Bit 50" "Not active,Active" bitfld.long 0x00 17. " ASB49 ,Active Status Bit 49" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB48 ,Active Status Bit 48" "Not active,Active" bitfld.long 0x00 15. " ASB47 ,Active Status Bit 47" "Not active,Active" bitfld.long 0x00 14. " ASB46 ,Active Status Bit 46" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB45 ,Active Status Bit 45" "Not active,Active" bitfld.long 0x00 12. " ASB44 ,Active Status Bit 44" "Not active,Active" bitfld.long 0x00 11. " ASB43 ,Active Status Bit 43" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB42 ,Active Status Bit 42" "Not active,Active" bitfld.long 0x00 9. " ASB41 ,Active Status Bit 41" "Not active,Active" bitfld.long 0x00 8. " ASB40 ,Active Status Bit 40" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB39 ,Active Status Bit 39" "Not active,Active" bitfld.long 0x00 6. " ASB38 ,Active Status Bit 38" "Not active,Active" bitfld.long 0x00 5. " ASB37 ,Active Status Bit 37" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB36 ,Active Status Bit 36" "Not active,Active" bitfld.long 0x00 3. " ASB35 ,Active Status Bit 35" "Not active,Active" bitfld.long 0x00 2. " ASB34 ,Active Status Bit 34" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB33 ,Active Status Bit 33" "Not active,Active" bitfld.long 0x00 0. " ASB32 ,Active Status Bit 32" "Not active,Active" else rgroup.long 0x0304++0x03 line.long 0x0 "GICD_ICDABR1,Active Status Register 1" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x02) rgroup.long 0x0308++0x03 line.long 0x0 "GICD_ICDABR2,Active Status Register 2" bitfld.long 0x00 31. " ASB95 ,Active Status Bit 95" "Not active,Active" bitfld.long 0x00 30. " ASB94 ,Active Status Bit 94" "Not active,Active" bitfld.long 0x00 29. " ASB93 ,Active Status Bit 93" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB92 ,Active Status Bit 92" "Not active,Active" bitfld.long 0x00 27. " ASB91 ,Active Status Bit 91" "Not active,Active" bitfld.long 0x00 26. " ASB90 ,Active Status Bit 90" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB89 ,Active Status Bit 89" "Not active,Active" bitfld.long 0x00 24. " ASB88 ,Active Status Bit 88" "Not active,Active" bitfld.long 0x00 23. " ASB87 ,Active Status Bit 87" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB86 ,Active Status Bit 86" "Not active,Active" bitfld.long 0x00 21. " ASB85 ,Active Status Bit 85" "Not active,Active" bitfld.long 0x00 20. " ASB84 ,Active Status Bit 84" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB83 ,Active Status Bit 83" "Not active,Active" bitfld.long 0x00 18. " ASB82 ,Active Status Bit 82" "Not active,Active" bitfld.long 0x00 17. " ASB81 ,Active Status Bit 81" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB80 ,Active Status Bit 80" "Not active,Active" bitfld.long 0x00 15. " ASB79 ,Active Status Bit 79" "Not active,Active" bitfld.long 0x00 14. " ASB78 ,Active Status Bit 78" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB77 ,Active Status Bit 77" "Not active,Active" bitfld.long 0x00 12. " ASB76 ,Active Status Bit 76" "Not active,Active" bitfld.long 0x00 11. " ASB75 ,Active Status Bit 75" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB74 ,Active Status Bit 74" "Not active,Active" bitfld.long 0x00 9. " ASB73 ,Active Status Bit 73" "Not active,Active" bitfld.long 0x00 8. " ASB72 ,Active Status Bit 72" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB71 ,Active Status Bit 71" "Not active,Active" bitfld.long 0x00 6. " ASB70 ,Active Status Bit 70" "Not active,Active" bitfld.long 0x00 5. " ASB69 ,Active Status Bit 69" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB68 ,Active Status Bit 68" "Not active,Active" bitfld.long 0x00 3. " ASB67 ,Active Status Bit 67" "Not active,Active" bitfld.long 0x00 2. " ASB66 ,Active Status Bit 66" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB65 ,Active Status Bit 65" "Not active,Active" bitfld.long 0x00 0. " ASB64 ,Active Status Bit 64" "Not active,Active" else rgroup.long 0x0308++0x03 line.long 0x0 "GICD_ICDABR2,Active Status Register 2" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x03) rgroup.long 0x030C++0x03 line.long 0x0 "GICD_ICDABR3,Active Status Register 3" bitfld.long 0x00 31. " ASB127 ,Active Status Bit 127" "Not active,Active" bitfld.long 0x00 30. " ASB126 ,Active Status Bit 126" "Not active,Active" bitfld.long 0x00 29. " ASB125 ,Active Status Bit 125" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB124 ,Active Status Bit 124" "Not active,Active" bitfld.long 0x00 27. " ASB123 ,Active Status Bit 123" "Not active,Active" bitfld.long 0x00 26. " ASB122 ,Active Status Bit 122" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB121 ,Active Status Bit 121" "Not active,Active" bitfld.long 0x00 24. " ASB120 ,Active Status Bit 120" "Not active,Active" bitfld.long 0x00 23. " ASB119 ,Active Status Bit 119" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB118 ,Active Status Bit 118" "Not active,Active" bitfld.long 0x00 21. " ASB117 ,Active Status Bit 117" "Not active,Active" bitfld.long 0x00 20. " ASB116 ,Active Status Bit 116" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB115 ,Active Status Bit 115" "Not active,Active" bitfld.long 0x00 18. " ASB114 ,Active Status Bit 114" "Not active,Active" bitfld.long 0x00 17. " ASB113 ,Active Status Bit 113" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB112 ,Active Status Bit 112" "Not active,Active" bitfld.long 0x00 15. " ASB111 ,Active Status Bit 111" "Not active,Active" bitfld.long 0x00 14. " ASB110 ,Active Status Bit 110" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB109 ,Active Status Bit 109" "Not active,Active" bitfld.long 0x00 12. " ASB108 ,Active Status Bit 108" "Not active,Active" bitfld.long 0x00 11. " ASB107 ,Active Status Bit 107" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB106 ,Active Status Bit 106" "Not active,Active" bitfld.long 0x00 9. " ASB105 ,Active Status Bit 105" "Not active,Active" bitfld.long 0x00 8. " ASB104 ,Active Status Bit 104" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB103 ,Active Status Bit 103" "Not active,Active" bitfld.long 0x00 6. " ASB102 ,Active Status Bit 102" "Not active,Active" bitfld.long 0x00 5. " ASB101 ,Active Status Bit 101" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB100 ,Active Status Bit 100" "Not active,Active" bitfld.long 0x00 3. " ASB99 ,Active Status Bit 99" "Not active,Active" bitfld.long 0x00 2. " ASB98 ,Active Status Bit 98" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB97 ,Active Status Bit 97" "Not active,Active" bitfld.long 0x00 0. " ASB96 ,Active Status Bit 96" "Not active,Active" else rgroup.long 0x030C++0x03 line.long 0x0 "GICD_ICDABR3,Active Status Register 3" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x04) rgroup.long 0x0310++0x03 line.long 0x0 "GICD_ICDABR4,Active Status Register 4" bitfld.long 0x00 31. " ASB159 ,Active Status Bit 159" "Not active,Active" bitfld.long 0x00 30. " ASB158 ,Active Status Bit 158" "Not active,Active" bitfld.long 0x00 29. " ASB157 ,Active Status Bit 157" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB156 ,Active Status Bit 156" "Not active,Active" bitfld.long 0x00 27. " ASB155 ,Active Status Bit 155" "Not active,Active" bitfld.long 0x00 26. " ASB154 ,Active Status Bit 154" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB153 ,Active Status Bit 153" "Not active,Active" bitfld.long 0x00 24. " ASB152 ,Active Status Bit 152" "Not active,Active" bitfld.long 0x00 23. " ASB151 ,Active Status Bit 151" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB150 ,Active Status Bit 150" "Not active,Active" bitfld.long 0x00 21. " ASB149 ,Active Status Bit 149" "Not active,Active" bitfld.long 0x00 20. " ASB148 ,Active Status Bit 148" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB147 ,Active Status Bit 147" "Not active,Active" bitfld.long 0x00 18. " ASB146 ,Active Status Bit 146" "Not active,Active" bitfld.long 0x00 17. " ASB145 ,Active Status Bit 145" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB144 ,Active Status Bit 144" "Not active,Active" bitfld.long 0x00 15. " ASB143 ,Active Status Bit 143" "Not active,Active" bitfld.long 0x00 14. " ASB142 ,Active Status Bit 142" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB141 ,Active Status Bit 141" "Not active,Active" bitfld.long 0x00 12. " ASB140 ,Active Status Bit 140" "Not active,Active" bitfld.long 0x00 11. " ASB139 ,Active Status Bit 139" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB138 ,Active Status Bit 138" "Not active,Active" bitfld.long 0x00 9. " ASB137 ,Active Status Bit 137" "Not active,Active" bitfld.long 0x00 8. " ASB136 ,Active Status Bit 136" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB135 ,Active Status Bit 135" "Not active,Active" bitfld.long 0x00 6. " ASB134 ,Active Status Bit 134" "Not active,Active" bitfld.long 0x00 5. " ASB133 ,Active Status Bit 133" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB132 ,Active Status Bit 132" "Not active,Active" bitfld.long 0x00 3. " ASB131 ,Active Status Bit 131" "Not active,Active" bitfld.long 0x00 2. " ASB130 ,Active Status Bit 130" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB129 ,Active Status Bit 129" "Not active,Active" bitfld.long 0x00 0. " ASB128 ,Active Status Bit 128" "Not active,Active" else rgroup.long 0x0310++0x03 line.long 0x0 "GICD_ICDABR4,Active Status Register 4" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x05) rgroup.long 0x0314++0x03 line.long 0x0 "GICD_ICDABR5,Active Status Register 5" bitfld.long 0x00 31. " ASB191 ,Active Status Bit 191" "Not active,Active" bitfld.long 0x00 30. " ASB190 ,Active Status Bit 190" "Not active,Active" bitfld.long 0x00 29. " ASB189 ,Active Status Bit 189" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB188 ,Active Status Bit 188" "Not active,Active" bitfld.long 0x00 27. " ASB187 ,Active Status Bit 187" "Not active,Active" bitfld.long 0x00 26. " ASB186 ,Active Status Bit 186" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB185 ,Active Status Bit 185" "Not active,Active" bitfld.long 0x00 24. " ASB184 ,Active Status Bit 184" "Not active,Active" bitfld.long 0x00 23. " ASB183 ,Active Status Bit 183" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB182 ,Active Status Bit 182" "Not active,Active" bitfld.long 0x00 21. " ASB181 ,Active Status Bit 181" "Not active,Active" bitfld.long 0x00 20. " ASB180 ,Active Status Bit 180" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB179 ,Active Status Bit 179" "Not active,Active" bitfld.long 0x00 18. " ASB178 ,Active Status Bit 178" "Not active,Active" bitfld.long 0x00 17. " ASB177 ,Active Status Bit 177" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB176 ,Active Status Bit 176" "Not active,Active" bitfld.long 0x00 15. " ASB175 ,Active Status Bit 175" "Not active,Active" bitfld.long 0x00 14. " ASB174 ,Active Status Bit 174" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB173 ,Active Status Bit 173" "Not active,Active" bitfld.long 0x00 12. " ASB172 ,Active Status Bit 172" "Not active,Active" bitfld.long 0x00 11. " ASB171 ,Active Status Bit 171" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB170 ,Active Status Bit 170" "Not active,Active" bitfld.long 0x00 9. " ASB169 ,Active Status Bit 169" "Not active,Active" bitfld.long 0x00 8. " ASB168 ,Active Status Bit 168" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB167 ,Active Status Bit 167" "Not active,Active" bitfld.long 0x00 6. " ASB166 ,Active Status Bit 166" "Not active,Active" bitfld.long 0x00 5. " ASB165 ,Active Status Bit 165" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB164 ,Active Status Bit 164" "Not active,Active" bitfld.long 0x00 3. " ASB163 ,Active Status Bit 163" "Not active,Active" bitfld.long 0x00 2. " ASB162 ,Active Status Bit 162" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB161 ,Active Status Bit 161" "Not active,Active" bitfld.long 0x00 0. " ASB160 ,Active Status Bit 160" "Not active,Active" else rgroup.long 0x0314++0x03 line.long 0x0 "GICD_ICDABR5,Active Status Register 5" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x06) rgroup.long 0x0318++0x03 line.long 0x0 "GICD_ICDABR6,Active Status Register 6" bitfld.long 0x00 31. " ASB223 ,Active Status Bit 223" "Not active,Active" bitfld.long 0x00 30. " ASB222 ,Active Status Bit 222" "Not active,Active" bitfld.long 0x00 29. " ASB221 ,Active Status Bit 221" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB220 ,Active Status Bit 220" "Not active,Active" bitfld.long 0x00 27. " ASB219 ,Active Status Bit 219" "Not active,Active" bitfld.long 0x00 26. " ASB218 ,Active Status Bit 218" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB217 ,Active Status Bit 217" "Not active,Active" bitfld.long 0x00 24. " ASB216 ,Active Status Bit 216" "Not active,Active" bitfld.long 0x00 23. " ASB215 ,Active Status Bit 215" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB214 ,Active Status Bit 214" "Not active,Active" bitfld.long 0x00 21. " ASB213 ,Active Status Bit 213" "Not active,Active" bitfld.long 0x00 20. " ASB212 ,Active Status Bit 212" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB211 ,Active Status Bit 211" "Not active,Active" bitfld.long 0x00 18. " ASB210 ,Active Status Bit 210" "Not active,Active" bitfld.long 0x00 17. " ASB209 ,Active Status Bit 209" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB208 ,Active Status Bit 208" "Not active,Active" bitfld.long 0x00 15. " ASB207 ,Active Status Bit 207" "Not active,Active" bitfld.long 0x00 14. " ASB206 ,Active Status Bit 206" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB205 ,Active Status Bit 205" "Not active,Active" bitfld.long 0x00 12. " ASB204 ,Active Status Bit 204" "Not active,Active" bitfld.long 0x00 11. " ASB203 ,Active Status Bit 203" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB202 ,Active Status Bit 202" "Not active,Active" bitfld.long 0x00 9. " ASB201 ,Active Status Bit 201" "Not active,Active" bitfld.long 0x00 8. " ASB200 ,Active Status Bit 200" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB199 ,Active Status Bit 199" "Not active,Active" bitfld.long 0x00 6. " ASB198 ,Active Status Bit 198" "Not active,Active" bitfld.long 0x00 5. " ASB197 ,Active Status Bit 197" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB196 ,Active Status Bit 196" "Not active,Active" bitfld.long 0x00 3. " ASB195 ,Active Status Bit 195" "Not active,Active" bitfld.long 0x00 2. " ASB194 ,Active Status Bit 194" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB193 ,Active Status Bit 193" "Not active,Active" bitfld.long 0x00 0. " ASB192 ,Active Status Bit 192" "Not active,Active" else rgroup.long 0x0318++0x03 line.long 0x0 "GICD_ICDABR6,Active Status Register 6" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x07) rgroup.long 0x031C++0x03 line.long 0x0 "GICD_ICDABR7,Active Status Register 7" bitfld.long 0x00 31. " ASB255 ,Active Status Bit 255" "Not active,Active" bitfld.long 0x00 30. " ASB254 ,Active Status Bit 254" "Not active,Active" bitfld.long 0x00 29. " ASB253 ,Active Status Bit 253" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB252 ,Active Status Bit 252" "Not active,Active" bitfld.long 0x00 27. " ASB251 ,Active Status Bit 251" "Not active,Active" bitfld.long 0x00 26. " ASB250 ,Active Status Bit 250" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB249 ,Active Status Bit 249" "Not active,Active" bitfld.long 0x00 24. " ASB248 ,Active Status Bit 248" "Not active,Active" bitfld.long 0x00 23. " ASB247 ,Active Status Bit 247" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB246 ,Active Status Bit 246" "Not active,Active" bitfld.long 0x00 21. " ASB245 ,Active Status Bit 245" "Not active,Active" bitfld.long 0x00 20. " ASB244 ,Active Status Bit 244" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB243 ,Active Status Bit 243" "Not active,Active" bitfld.long 0x00 18. " ASB242 ,Active Status Bit 242" "Not active,Active" bitfld.long 0x00 17. " ASB241 ,Active Status Bit 241" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB240 ,Active Status Bit 240" "Not active,Active" bitfld.long 0x00 15. " ASB239 ,Active Status Bit 239" "Not active,Active" bitfld.long 0x00 14. " ASB238 ,Active Status Bit 238" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB237 ,Active Status Bit 237" "Not active,Active" bitfld.long 0x00 12. " ASB236 ,Active Status Bit 236" "Not active,Active" bitfld.long 0x00 11. " ASB235 ,Active Status Bit 235" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB234 ,Active Status Bit 234" "Not active,Active" bitfld.long 0x00 9. " ASB233 ,Active Status Bit 233" "Not active,Active" bitfld.long 0x00 8. " ASB232 ,Active Status Bit 232" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB231 ,Active Status Bit 231" "Not active,Active" bitfld.long 0x00 6. " ASB230 ,Active Status Bit 230" "Not active,Active" bitfld.long 0x00 5. " ASB229 ,Active Status Bit 229" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB228 ,Active Status Bit 228" "Not active,Active" bitfld.long 0x00 3. " ASB227 ,Active Status Bit 227" "Not active,Active" bitfld.long 0x00 2. " ASB226 ,Active Status Bit 226" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB225 ,Active Status Bit 225" "Not active,Active" bitfld.long 0x00 0. " ASB224 ,Active Status Bit 224" "Not active,Active" else rgroup.long 0x031C++0x03 line.long 0x0 "GICD_ICDABR7,Active Status Register 7" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x08) rgroup.long 0x0320++0x03 line.long 0x0 "GICD_ICDABR8,Active Status Register 8" bitfld.long 0x00 31. " ASB287 ,Active Status Bit 287" "Not active,Active" bitfld.long 0x00 30. " ASB286 ,Active Status Bit 286" "Not active,Active" bitfld.long 0x00 29. " ASB285 ,Active Status Bit 285" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB284 ,Active Status Bit 284" "Not active,Active" bitfld.long 0x00 27. " ASB283 ,Active Status Bit 283" "Not active,Active" bitfld.long 0x00 26. " ASB282 ,Active Status Bit 282" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB281 ,Active Status Bit 281" "Not active,Active" bitfld.long 0x00 24. " ASB280 ,Active Status Bit 280" "Not active,Active" bitfld.long 0x00 23. " ASB279 ,Active Status Bit 279" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB278 ,Active Status Bit 278" "Not active,Active" bitfld.long 0x00 21. " ASB277 ,Active Status Bit 277" "Not active,Active" bitfld.long 0x00 20. " ASB276 ,Active Status Bit 276" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB275 ,Active Status Bit 275" "Not active,Active" bitfld.long 0x00 18. " ASB274 ,Active Status Bit 274" "Not active,Active" bitfld.long 0x00 17. " ASB273 ,Active Status Bit 273" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB272 ,Active Status Bit 272" "Not active,Active" bitfld.long 0x00 15. " ASB271 ,Active Status Bit 271" "Not active,Active" bitfld.long 0x00 14. " ASB270 ,Active Status Bit 270" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB269 ,Active Status Bit 269" "Not active,Active" bitfld.long 0x00 12. " ASB268 ,Active Status Bit 268" "Not active,Active" bitfld.long 0x00 11. " ASB267 ,Active Status Bit 267" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB266 ,Active Status Bit 266" "Not active,Active" bitfld.long 0x00 9. " ASB265 ,Active Status Bit 265" "Not active,Active" bitfld.long 0x00 8. " ASB264 ,Active Status Bit 264" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB263 ,Active Status Bit 263" "Not active,Active" bitfld.long 0x00 6. " ASB262 ,Active Status Bit 262" "Not active,Active" bitfld.long 0x00 5. " ASB261 ,Active Status Bit 261" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB260 ,Active Status Bit 260" "Not active,Active" bitfld.long 0x00 3. " ASB259 ,Active Status Bit 259" "Not active,Active" bitfld.long 0x00 2. " ASB258 ,Active Status Bit 258" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB257 ,Active Status Bit 257" "Not active,Active" bitfld.long 0x00 0. " ASB256 ,Active Status Bit 256" "Not active,Active" else rgroup.long 0x0320++0x03 line.long 0x0 "GICD_ICDABR8,Active Status Register 8" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x09) rgroup.long 0x0324++0x03 line.long 0x0 "GICD_ICDABR9,Active Status Register 9" bitfld.long 0x00 31. " ASB319 ,Active Status Bit 319" "Not active,Active" bitfld.long 0x00 30. " ASB318 ,Active Status Bit 318" "Not active,Active" bitfld.long 0x00 29. " ASB317 ,Active Status Bit 317" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB316 ,Active Status Bit 316" "Not active,Active" bitfld.long 0x00 27. " ASB315 ,Active Status Bit 315" "Not active,Active" bitfld.long 0x00 26. " ASB314 ,Active Status Bit 314" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB313 ,Active Status Bit 313" "Not active,Active" bitfld.long 0x00 24. " ASB312 ,Active Status Bit 312" "Not active,Active" bitfld.long 0x00 23. " ASB311 ,Active Status Bit 311" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB310 ,Active Status Bit 310" "Not active,Active" bitfld.long 0x00 21. " ASB309 ,Active Status Bit 309" "Not active,Active" bitfld.long 0x00 20. " ASB308 ,Active Status Bit 308" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB307 ,Active Status Bit 307" "Not active,Active" bitfld.long 0x00 18. " ASB306 ,Active Status Bit 306" "Not active,Active" bitfld.long 0x00 17. " ASB305 ,Active Status Bit 305" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB304 ,Active Status Bit 304" "Not active,Active" bitfld.long 0x00 15. " ASB303 ,Active Status Bit 303" "Not active,Active" bitfld.long 0x00 14. " ASB302 ,Active Status Bit 302" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB301 ,Active Status Bit 301" "Not active,Active" bitfld.long 0x00 12. " ASB300 ,Active Status Bit 300" "Not active,Active" bitfld.long 0x00 11. " ASB299 ,Active Status Bit 299" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB298 ,Active Status Bit 298" "Not active,Active" bitfld.long 0x00 9. " ASB297 ,Active Status Bit 297" "Not active,Active" bitfld.long 0x00 8. " ASB296 ,Active Status Bit 296" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB295 ,Active Status Bit 295" "Not active,Active" bitfld.long 0x00 6. " ASB294 ,Active Status Bit 294" "Not active,Active" bitfld.long 0x00 5. " ASB293 ,Active Status Bit 293" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB292 ,Active Status Bit 292" "Not active,Active" bitfld.long 0x00 3. " ASB291 ,Active Status Bit 291" "Not active,Active" bitfld.long 0x00 2. " ASB290 ,Active Status Bit 290" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB289 ,Active Status Bit 289" "Not active,Active" bitfld.long 0x00 0. " ASB288 ,Active Status Bit 288" "Not active,Active" else rgroup.long 0x0324++0x03 line.long 0x0 "GICD_ICDABR9,Active Status Register 9" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x0A) rgroup.long 0x0328++0x03 line.long 0x0 "GICD_ICDABR10,Active Status Register 10" bitfld.long 0x00 31. " ASB351 ,Active Status Bit 351" "Not active,Active" bitfld.long 0x00 30. " ASB350 ,Active Status Bit 350" "Not active,Active" bitfld.long 0x00 29. " ASB349 ,Active Status Bit 349" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB348 ,Active Status Bit 348" "Not active,Active" bitfld.long 0x00 27. " ASB347 ,Active Status Bit 347" "Not active,Active" bitfld.long 0x00 26. " ASB346 ,Active Status Bit 346" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB345 ,Active Status Bit 345" "Not active,Active" bitfld.long 0x00 24. " ASB344 ,Active Status Bit 344" "Not active,Active" bitfld.long 0x00 23. " ASB343 ,Active Status Bit 343" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB342 ,Active Status Bit 342" "Not active,Active" bitfld.long 0x00 21. " ASB341 ,Active Status Bit 341" "Not active,Active" bitfld.long 0x00 20. " ASB340 ,Active Status Bit 340" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB339 ,Active Status Bit 339" "Not active,Active" bitfld.long 0x00 18. " ASB338 ,Active Status Bit 338" "Not active,Active" bitfld.long 0x00 17. " ASB337 ,Active Status Bit 337" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB336 ,Active Status Bit 336" "Not active,Active" bitfld.long 0x00 15. " ASB335 ,Active Status Bit 335" "Not active,Active" bitfld.long 0x00 14. " ASB334 ,Active Status Bit 334" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB333 ,Active Status Bit 333" "Not active,Active" bitfld.long 0x00 12. " ASB332 ,Active Status Bit 332" "Not active,Active" bitfld.long 0x00 11. " ASB331 ,Active Status Bit 331" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB330 ,Active Status Bit 330" "Not active,Active" bitfld.long 0x00 9. " ASB329 ,Active Status Bit 329" "Not active,Active" bitfld.long 0x00 8. " ASB328 ,Active Status Bit 328" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB327 ,Active Status Bit 327" "Not active,Active" bitfld.long 0x00 6. " ASB326 ,Active Status Bit 326" "Not active,Active" bitfld.long 0x00 5. " ASB325 ,Active Status Bit 325" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB324 ,Active Status Bit 324" "Not active,Active" bitfld.long 0x00 3. " ASB323 ,Active Status Bit 323" "Not active,Active" bitfld.long 0x00 2. " ASB322 ,Active Status Bit 322" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB321 ,Active Status Bit 321" "Not active,Active" bitfld.long 0x00 0. " ASB320 ,Active Status Bit 320" "Not active,Active" else rgroup.long 0x0328++0x03 line.long 0x0 "GICD_ICDABR10,Active Status Register 10" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x0B) rgroup.long 0x032C++0x03 line.long 0x0 "GICD_ICDABR11,Active Status Register 11" bitfld.long 0x00 31. " ASB383 ,Active Status Bit 383" "Not active,Active" bitfld.long 0x00 30. " ASB382 ,Active Status Bit 382" "Not active,Active" bitfld.long 0x00 29. " ASB381 ,Active Status Bit 381" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB380 ,Active Status Bit 380" "Not active,Active" bitfld.long 0x00 27. " ASB379 ,Active Status Bit 379" "Not active,Active" bitfld.long 0x00 26. " ASB378 ,Active Status Bit 378" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB377 ,Active Status Bit 377" "Not active,Active" bitfld.long 0x00 24. " ASB376 ,Active Status Bit 376" "Not active,Active" bitfld.long 0x00 23. " ASB375 ,Active Status Bit 375" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB374 ,Active Status Bit 374" "Not active,Active" bitfld.long 0x00 21. " ASB373 ,Active Status Bit 373" "Not active,Active" bitfld.long 0x00 20. " ASB372 ,Active Status Bit 372" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB371 ,Active Status Bit 371" "Not active,Active" bitfld.long 0x00 18. " ASB370 ,Active Status Bit 370" "Not active,Active" bitfld.long 0x00 17. " ASB369 ,Active Status Bit 369" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB368 ,Active Status Bit 368" "Not active,Active" bitfld.long 0x00 15. " ASB367 ,Active Status Bit 367" "Not active,Active" bitfld.long 0x00 14. " ASB366 ,Active Status Bit 366" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB365 ,Active Status Bit 365" "Not active,Active" bitfld.long 0x00 12. " ASB364 ,Active Status Bit 364" "Not active,Active" bitfld.long 0x00 11. " ASB363 ,Active Status Bit 363" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB362 ,Active Status Bit 362" "Not active,Active" bitfld.long 0x00 9. " ASB361 ,Active Status Bit 361" "Not active,Active" bitfld.long 0x00 8. " ASB360 ,Active Status Bit 360" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB359 ,Active Status Bit 359" "Not active,Active" bitfld.long 0x00 6. " ASB358 ,Active Status Bit 358" "Not active,Active" bitfld.long 0x00 5. " ASB357 ,Active Status Bit 357" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB356 ,Active Status Bit 356" "Not active,Active" bitfld.long 0x00 3. " ASB355 ,Active Status Bit 355" "Not active,Active" bitfld.long 0x00 2. " ASB354 ,Active Status Bit 354" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB353 ,Active Status Bit 353" "Not active,Active" bitfld.long 0x00 0. " ASB352 ,Active Status Bit 352" "Not active,Active" else rgroup.long 0x032C++0x03 line.long 0x0 "GICD_ICDABR11,Active Status Register 11" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x0C) rgroup.long 0x0330++0x03 line.long 0x0 "GICD_ICDABR12,Active Status Register 12" bitfld.long 0x00 31. " ASB415 ,Active Status Bit 415" "Not active,Active" bitfld.long 0x00 30. " ASB414 ,Active Status Bit 414" "Not active,Active" bitfld.long 0x00 29. " ASB413 ,Active Status Bit 413" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB412 ,Active Status Bit 412" "Not active,Active" bitfld.long 0x00 27. " ASB411 ,Active Status Bit 411" "Not active,Active" bitfld.long 0x00 26. " ASB410 ,Active Status Bit 410" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB409 ,Active Status Bit 409" "Not active,Active" bitfld.long 0x00 24. " ASB408 ,Active Status Bit 408" "Not active,Active" bitfld.long 0x00 23. " ASB407 ,Active Status Bit 407" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB406 ,Active Status Bit 406" "Not active,Active" bitfld.long 0x00 21. " ASB405 ,Active Status Bit 405" "Not active,Active" bitfld.long 0x00 20. " ASB404 ,Active Status Bit 404" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB403 ,Active Status Bit 403" "Not active,Active" bitfld.long 0x00 18. " ASB402 ,Active Status Bit 402" "Not active,Active" bitfld.long 0x00 17. " ASB401 ,Active Status Bit 401" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB400 ,Active Status Bit 400" "Not active,Active" bitfld.long 0x00 15. " ASB399 ,Active Status Bit 399" "Not active,Active" bitfld.long 0x00 14. " ASB398 ,Active Status Bit 398" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB397 ,Active Status Bit 397" "Not active,Active" bitfld.long 0x00 12. " ASB396 ,Active Status Bit 396" "Not active,Active" bitfld.long 0x00 11. " ASB395 ,Active Status Bit 395" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB394 ,Active Status Bit 394" "Not active,Active" bitfld.long 0x00 9. " ASB393 ,Active Status Bit 393" "Not active,Active" bitfld.long 0x00 8. " ASB392 ,Active Status Bit 392" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB391 ,Active Status Bit 391" "Not active,Active" bitfld.long 0x00 6. " ASB390 ,Active Status Bit 390" "Not active,Active" bitfld.long 0x00 5. " ASB389 ,Active Status Bit 389" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB388 ,Active Status Bit 388" "Not active,Active" bitfld.long 0x00 3. " ASB387 ,Active Status Bit 387" "Not active,Active" bitfld.long 0x00 2. " ASB386 ,Active Status Bit 386" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB385 ,Active Status Bit 385" "Not active,Active" bitfld.long 0x00 0. " ASB384 ,Active Status Bit 384" "Not active,Active" else rgroup.long 0x0330++0x03 line.long 0x0 "GICD_ICDABR12,Active Status Register 12" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x0D) rgroup.long 0x0334++0x03 line.long 0x0 "GICD_ICDABR13,Active Status Register 13" bitfld.long 0x00 31. " ASB447 ,Active Status Bit 447" "Not active,Active" bitfld.long 0x00 30. " ASB446 ,Active Status Bit 446" "Not active,Active" bitfld.long 0x00 29. " ASB445 ,Active Status Bit 445" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB444 ,Active Status Bit 444" "Not active,Active" bitfld.long 0x00 27. " ASB443 ,Active Status Bit 443" "Not active,Active" bitfld.long 0x00 26. " ASB442 ,Active Status Bit 442" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB441 ,Active Status Bit 441" "Not active,Active" bitfld.long 0x00 24. " ASB440 ,Active Status Bit 440" "Not active,Active" bitfld.long 0x00 23. " ASB439 ,Active Status Bit 439" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB438 ,Active Status Bit 438" "Not active,Active" bitfld.long 0x00 21. " ASB437 ,Active Status Bit 437" "Not active,Active" bitfld.long 0x00 20. " ASB436 ,Active Status Bit 436" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB435 ,Active Status Bit 435" "Not active,Active" bitfld.long 0x00 18. " ASB434 ,Active Status Bit 434" "Not active,Active" bitfld.long 0x00 17. " ASB433 ,Active Status Bit 433" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB432 ,Active Status Bit 432" "Not active,Active" bitfld.long 0x00 15. " ASB431 ,Active Status Bit 431" "Not active,Active" bitfld.long 0x00 14. " ASB430 ,Active Status Bit 430" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB429 ,Active Status Bit 429" "Not active,Active" bitfld.long 0x00 12. " ASB428 ,Active Status Bit 428" "Not active,Active" bitfld.long 0x00 11. " ASB427 ,Active Status Bit 427" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB426 ,Active Status Bit 426" "Not active,Active" bitfld.long 0x00 9. " ASB425 ,Active Status Bit 425" "Not active,Active" bitfld.long 0x00 8. " ASB424 ,Active Status Bit 424" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB423 ,Active Status Bit 423" "Not active,Active" bitfld.long 0x00 6. " ASB422 ,Active Status Bit 422" "Not active,Active" bitfld.long 0x00 5. " ASB421 ,Active Status Bit 421" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB420 ,Active Status Bit 420" "Not active,Active" bitfld.long 0x00 3. " ASB419 ,Active Status Bit 419" "Not active,Active" bitfld.long 0x00 2. " ASB418 ,Active Status Bit 418" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB417 ,Active Status Bit 417" "Not active,Active" bitfld.long 0x00 0. " ASB416 ,Active Status Bit 416" "Not active,Active" else rgroup.long 0x0334++0x03 line.long 0x0 "GICD_ICDABR13,Active Status Register 13" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x0E) rgroup.long 0x0338++0x03 line.long 0x0 "GICD_ICDABR14,Active Status Register 14" bitfld.long 0x00 31. " ASB479 ,Active Status Bit 479" "Not active,Active" bitfld.long 0x00 30. " ASB478 ,Active Status Bit 478" "Not active,Active" bitfld.long 0x00 29. " ASB477 ,Active Status Bit 477" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB476 ,Active Status Bit 476" "Not active,Active" bitfld.long 0x00 27. " ASB475 ,Active Status Bit 475" "Not active,Active" bitfld.long 0x00 26. " ASB474 ,Active Status Bit 474" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB473 ,Active Status Bit 473" "Not active,Active" bitfld.long 0x00 24. " ASB472 ,Active Status Bit 472" "Not active,Active" bitfld.long 0x00 23. " ASB471 ,Active Status Bit 471" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB470 ,Active Status Bit 470" "Not active,Active" bitfld.long 0x00 21. " ASB469 ,Active Status Bit 469" "Not active,Active" bitfld.long 0x00 20. " ASB468 ,Active Status Bit 468" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB467 ,Active Status Bit 467" "Not active,Active" bitfld.long 0x00 18. " ASB466 ,Active Status Bit 466" "Not active,Active" bitfld.long 0x00 17. " ASB465 ,Active Status Bit 465" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB464 ,Active Status Bit 464" "Not active,Active" bitfld.long 0x00 15. " ASB463 ,Active Status Bit 463" "Not active,Active" bitfld.long 0x00 14. " ASB462 ,Active Status Bit 462" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB461 ,Active Status Bit 461" "Not active,Active" bitfld.long 0x00 12. " ASB460 ,Active Status Bit 460" "Not active,Active" bitfld.long 0x00 11. " ASB459 ,Active Status Bit 459" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB458 ,Active Status Bit 458" "Not active,Active" bitfld.long 0x00 9. " ASB457 ,Active Status Bit 457" "Not active,Active" bitfld.long 0x00 8. " ASB456 ,Active Status Bit 456" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB455 ,Active Status Bit 455" "Not active,Active" bitfld.long 0x00 6. " ASB454 ,Active Status Bit 454" "Not active,Active" bitfld.long 0x00 5. " ASB453 ,Active Status Bit 453" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB452 ,Active Status Bit 452" "Not active,Active" bitfld.long 0x00 3. " ASB451 ,Active Status Bit 451" "Not active,Active" bitfld.long 0x00 2. " ASB450 ,Active Status Bit 450" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB449 ,Active Status Bit 449" "Not active,Active" bitfld.long 0x00 0. " ASB448 ,Active Status Bit 448" "Not active,Active" else rgroup.long 0x0338++0x03 line.long 0x0 "GICD_ICDABR14,Active Status Register 14" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x0F) rgroup.long 0x033C++0x03 line.long 0x0 "GICD_ICDABR15,Active Status Register 15" bitfld.long 0x00 31. " ASB511 ,Active Status Bit 511" "Not active,Active" bitfld.long 0x00 30. " ASB510 ,Active Status Bit 510" "Not active,Active" bitfld.long 0x00 29. " ASB509 ,Active Status Bit 509" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB508 ,Active Status Bit 508" "Not active,Active" bitfld.long 0x00 27. " ASB507 ,Active Status Bit 507" "Not active,Active" bitfld.long 0x00 26. " ASB506 ,Active Status Bit 506" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB505 ,Active Status Bit 505" "Not active,Active" bitfld.long 0x00 24. " ASB504 ,Active Status Bit 504" "Not active,Active" bitfld.long 0x00 23. " ASB503 ,Active Status Bit 503" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB502 ,Active Status Bit 502" "Not active,Active" bitfld.long 0x00 21. " ASB501 ,Active Status Bit 501" "Not active,Active" bitfld.long 0x00 20. " ASB500 ,Active Status Bit 500" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB499 ,Active Status Bit 499" "Not active,Active" bitfld.long 0x00 18. " ASB498 ,Active Status Bit 498" "Not active,Active" bitfld.long 0x00 17. " ASB497 ,Active Status Bit 497" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB496 ,Active Status Bit 496" "Not active,Active" bitfld.long 0x00 15. " ASB495 ,Active Status Bit 495" "Not active,Active" bitfld.long 0x00 14. " ASB494 ,Active Status Bit 494" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB493 ,Active Status Bit 493" "Not active,Active" bitfld.long 0x00 12. " ASB492 ,Active Status Bit 492" "Not active,Active" bitfld.long 0x00 11. " ASB491 ,Active Status Bit 491" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB490 ,Active Status Bit 490" "Not active,Active" bitfld.long 0x00 9. " ASB489 ,Active Status Bit 489" "Not active,Active" bitfld.long 0x00 8. " ASB488 ,Active Status Bit 488" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB487 ,Active Status Bit 487" "Not active,Active" bitfld.long 0x00 6. " ASB486 ,Active Status Bit 486" "Not active,Active" bitfld.long 0x00 5. " ASB485 ,Active Status Bit 485" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB484 ,Active Status Bit 484" "Not active,Active" bitfld.long 0x00 3. " ASB483 ,Active Status Bit 483" "Not active,Active" bitfld.long 0x00 2. " ASB482 ,Active Status Bit 482" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB481 ,Active Status Bit 481" "Not active,Active" bitfld.long 0x00 0. " ASB480 ,Active Status Bit 480" "Not active,Active" else rgroup.long 0x033C++0x03 line.long 0x0 "GICD_ICDABR15,Active Status Register 15" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x10) rgroup.long 0x0340++0x03 line.long 0x0 "GICD_ICDABR16,Active Status Register 16" bitfld.long 0x00 31. " ASB543 ,Active Status Bit 543" "Not active,Active" bitfld.long 0x00 30. " ASB542 ,Active Status Bit 542" "Not active,Active" bitfld.long 0x00 29. " ASB541 ,Active Status Bit 541" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB540 ,Active Status Bit 540" "Not active,Active" bitfld.long 0x00 27. " ASB539 ,Active Status Bit 539" "Not active,Active" bitfld.long 0x00 26. " ASB538 ,Active Status Bit 538" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB537 ,Active Status Bit 537" "Not active,Active" bitfld.long 0x00 24. " ASB536 ,Active Status Bit 536" "Not active,Active" bitfld.long 0x00 23. " ASB535 ,Active Status Bit 535" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB534 ,Active Status Bit 534" "Not active,Active" bitfld.long 0x00 21. " ASB533 ,Active Status Bit 533" "Not active,Active" bitfld.long 0x00 20. " ASB532 ,Active Status Bit 532" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB531 ,Active Status Bit 531" "Not active,Active" bitfld.long 0x00 18. " ASB530 ,Active Status Bit 530" "Not active,Active" bitfld.long 0x00 17. " ASB529 ,Active Status Bit 529" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB528 ,Active Status Bit 528" "Not active,Active" bitfld.long 0x00 15. " ASB527 ,Active Status Bit 527" "Not active,Active" bitfld.long 0x00 14. " ASB526 ,Active Status Bit 526" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB525 ,Active Status Bit 525" "Not active,Active" bitfld.long 0x00 12. " ASB524 ,Active Status Bit 524" "Not active,Active" bitfld.long 0x00 11. " ASB523 ,Active Status Bit 523" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB522 ,Active Status Bit 522" "Not active,Active" bitfld.long 0x00 9. " ASB521 ,Active Status Bit 521" "Not active,Active" bitfld.long 0x00 8. " ASB520 ,Active Status Bit 520" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB519 ,Active Status Bit 519" "Not active,Active" bitfld.long 0x00 6. " ASB518 ,Active Status Bit 518" "Not active,Active" bitfld.long 0x00 5. " ASB517 ,Active Status Bit 517" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB516 ,Active Status Bit 516" "Not active,Active" bitfld.long 0x00 3. " ASB515 ,Active Status Bit 515" "Not active,Active" bitfld.long 0x00 2. " ASB514 ,Active Status Bit 514" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB513 ,Active Status Bit 513" "Not active,Active" bitfld.long 0x00 0. " ASB512 ,Active Status Bit 512" "Not active,Active" else rgroup.long 0x0340++0x03 line.long 0x0 "GICD_ICDABR16,Active Status Register 16" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x11) rgroup.long 0x0344++0x03 line.long 0x0 "GICD_ICDABR17,Active Status Register 17" bitfld.long 0x00 31. " ASB575 ,Active Status Bit 575" "Not active,Active" bitfld.long 0x00 30. " ASB574 ,Active Status Bit 574" "Not active,Active" bitfld.long 0x00 29. " ASB573 ,Active Status Bit 573" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB572 ,Active Status Bit 572" "Not active,Active" bitfld.long 0x00 27. " ASB571 ,Active Status Bit 571" "Not active,Active" bitfld.long 0x00 26. " ASB570 ,Active Status Bit 570" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB569 ,Active Status Bit 569" "Not active,Active" bitfld.long 0x00 24. " ASB568 ,Active Status Bit 568" "Not active,Active" bitfld.long 0x00 23. " ASB567 ,Active Status Bit 567" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB566 ,Active Status Bit 566" "Not active,Active" bitfld.long 0x00 21. " ASB565 ,Active Status Bit 565" "Not active,Active" bitfld.long 0x00 20. " ASB564 ,Active Status Bit 564" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB563 ,Active Status Bit 563" "Not active,Active" bitfld.long 0x00 18. " ASB562 ,Active Status Bit 562" "Not active,Active" bitfld.long 0x00 17. " ASB561 ,Active Status Bit 561" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB560 ,Active Status Bit 560" "Not active,Active" bitfld.long 0x00 15. " ASB559 ,Active Status Bit 559" "Not active,Active" bitfld.long 0x00 14. " ASB558 ,Active Status Bit 558" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB557 ,Active Status Bit 557" "Not active,Active" bitfld.long 0x00 12. " ASB556 ,Active Status Bit 556" "Not active,Active" bitfld.long 0x00 11. " ASB555 ,Active Status Bit 555" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB554 ,Active Status Bit 554" "Not active,Active" bitfld.long 0x00 9. " ASB553 ,Active Status Bit 553" "Not active,Active" bitfld.long 0x00 8. " ASB552 ,Active Status Bit 552" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB551 ,Active Status Bit 551" "Not active,Active" bitfld.long 0x00 6. " ASB550 ,Active Status Bit 550" "Not active,Active" bitfld.long 0x00 5. " ASB549 ,Active Status Bit 549" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB548 ,Active Status Bit 548" "Not active,Active" bitfld.long 0x00 3. " ASB547 ,Active Status Bit 547" "Not active,Active" bitfld.long 0x00 2. " ASB546 ,Active Status Bit 546" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB545 ,Active Status Bit 545" "Not active,Active" bitfld.long 0x00 0. " ASB544 ,Active Status Bit 544" "Not active,Active" else rgroup.long 0x0344++0x03 line.long 0x0 "GICD_ICDABR17,Active Status Register 17" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x12) rgroup.long 0x0348++0x03 line.long 0x0 "GICD_ICDABR18,Active Status Register 18" bitfld.long 0x00 31. " ASB607 ,Active Status Bit 607" "Not active,Active" bitfld.long 0x00 30. " ASB606 ,Active Status Bit 606" "Not active,Active" bitfld.long 0x00 29. " ASB605 ,Active Status Bit 605" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB604 ,Active Status Bit 604" "Not active,Active" bitfld.long 0x00 27. " ASB603 ,Active Status Bit 603" "Not active,Active" bitfld.long 0x00 26. " ASB602 ,Active Status Bit 602" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB601 ,Active Status Bit 601" "Not active,Active" bitfld.long 0x00 24. " ASB600 ,Active Status Bit 600" "Not active,Active" bitfld.long 0x00 23. " ASB599 ,Active Status Bit 599" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB598 ,Active Status Bit 598" "Not active,Active" bitfld.long 0x00 21. " ASB597 ,Active Status Bit 597" "Not active,Active" bitfld.long 0x00 20. " ASB596 ,Active Status Bit 596" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB595 ,Active Status Bit 595" "Not active,Active" bitfld.long 0x00 18. " ASB594 ,Active Status Bit 594" "Not active,Active" bitfld.long 0x00 17. " ASB593 ,Active Status Bit 593" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB592 ,Active Status Bit 592" "Not active,Active" bitfld.long 0x00 15. " ASB591 ,Active Status Bit 591" "Not active,Active" bitfld.long 0x00 14. " ASB590 ,Active Status Bit 590" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB589 ,Active Status Bit 589" "Not active,Active" bitfld.long 0x00 12. " ASB588 ,Active Status Bit 588" "Not active,Active" bitfld.long 0x00 11. " ASB587 ,Active Status Bit 587" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB586 ,Active Status Bit 586" "Not active,Active" bitfld.long 0x00 9. " ASB585 ,Active Status Bit 585" "Not active,Active" bitfld.long 0x00 8. " ASB584 ,Active Status Bit 584" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB583 ,Active Status Bit 583" "Not active,Active" bitfld.long 0x00 6. " ASB582 ,Active Status Bit 582" "Not active,Active" bitfld.long 0x00 5. " ASB581 ,Active Status Bit 581" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB580 ,Active Status Bit 580" "Not active,Active" bitfld.long 0x00 3. " ASB579 ,Active Status Bit 579" "Not active,Active" bitfld.long 0x00 2. " ASB578 ,Active Status Bit 578" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB577 ,Active Status Bit 577" "Not active,Active" bitfld.long 0x00 0. " ASB576 ,Active Status Bit 576" "Not active,Active" else rgroup.long 0x0348++0x03 line.long 0x0 "GICD_ICDABR18,Active Status Register 18" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x13) rgroup.long 0x034C++0x03 line.long 0x0 "GICD_ICDABR19,Active Status Register 19" bitfld.long 0x00 31. " ASB639 ,Active Status Bit 639" "Not active,Active" bitfld.long 0x00 30. " ASB638 ,Active Status Bit 638" "Not active,Active" bitfld.long 0x00 29. " ASB637 ,Active Status Bit 637" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB636 ,Active Status Bit 636" "Not active,Active" bitfld.long 0x00 27. " ASB635 ,Active Status Bit 635" "Not active,Active" bitfld.long 0x00 26. " ASB634 ,Active Status Bit 634" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB633 ,Active Status Bit 633" "Not active,Active" bitfld.long 0x00 24. " ASB632 ,Active Status Bit 632" "Not active,Active" bitfld.long 0x00 23. " ASB631 ,Active Status Bit 631" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB630 ,Active Status Bit 630" "Not active,Active" bitfld.long 0x00 21. " ASB629 ,Active Status Bit 629" "Not active,Active" bitfld.long 0x00 20. " ASB628 ,Active Status Bit 628" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB627 ,Active Status Bit 627" "Not active,Active" bitfld.long 0x00 18. " ASB626 ,Active Status Bit 626" "Not active,Active" bitfld.long 0x00 17. " ASB625 ,Active Status Bit 625" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB624 ,Active Status Bit 624" "Not active,Active" bitfld.long 0x00 15. " ASB623 ,Active Status Bit 623" "Not active,Active" bitfld.long 0x00 14. " ASB622 ,Active Status Bit 622" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB621 ,Active Status Bit 621" "Not active,Active" bitfld.long 0x00 12. " ASB620 ,Active Status Bit 620" "Not active,Active" bitfld.long 0x00 11. " ASB619 ,Active Status Bit 619" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB618 ,Active Status Bit 618" "Not active,Active" bitfld.long 0x00 9. " ASB617 ,Active Status Bit 617" "Not active,Active" bitfld.long 0x00 8. " ASB616 ,Active Status Bit 616" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB615 ,Active Status Bit 615" "Not active,Active" bitfld.long 0x00 6. " ASB614 ,Active Status Bit 614" "Not active,Active" bitfld.long 0x00 5. " ASB613 ,Active Status Bit 613" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB612 ,Active Status Bit 612" "Not active,Active" bitfld.long 0x00 3. " ASB611 ,Active Status Bit 611" "Not active,Active" bitfld.long 0x00 2. " ASB610 ,Active Status Bit 610" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB609 ,Active Status Bit 609" "Not active,Active" bitfld.long 0x00 0. " ASB608 ,Active Status Bit 608" "Not active,Active" else rgroup.long 0x034C++0x03 line.long 0x0 "GICD_ICDABR19,Active Status Register 19" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x14) rgroup.long 0x0350++0x03 line.long 0x0 "GICD_ICDABR20,Active Status Register 20" bitfld.long 0x00 31. " ASB671 ,Active Status Bit 671" "Not active,Active" bitfld.long 0x00 30. " ASB670 ,Active Status Bit 670" "Not active,Active" bitfld.long 0x00 29. " ASB669 ,Active Status Bit 669" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB668 ,Active Status Bit 668" "Not active,Active" bitfld.long 0x00 27. " ASB667 ,Active Status Bit 667" "Not active,Active" bitfld.long 0x00 26. " ASB666 ,Active Status Bit 666" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB665 ,Active Status Bit 665" "Not active,Active" bitfld.long 0x00 24. " ASB664 ,Active Status Bit 664" "Not active,Active" bitfld.long 0x00 23. " ASB663 ,Active Status Bit 663" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB662 ,Active Status Bit 662" "Not active,Active" bitfld.long 0x00 21. " ASB661 ,Active Status Bit 661" "Not active,Active" bitfld.long 0x00 20. " ASB660 ,Active Status Bit 660" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB659 ,Active Status Bit 659" "Not active,Active" bitfld.long 0x00 18. " ASB658 ,Active Status Bit 658" "Not active,Active" bitfld.long 0x00 17. " ASB657 ,Active Status Bit 657" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB656 ,Active Status Bit 656" "Not active,Active" bitfld.long 0x00 15. " ASB655 ,Active Status Bit 655" "Not active,Active" bitfld.long 0x00 14. " ASB654 ,Active Status Bit 654" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB653 ,Active Status Bit 653" "Not active,Active" bitfld.long 0x00 12. " ASB652 ,Active Status Bit 652" "Not active,Active" bitfld.long 0x00 11. " ASB651 ,Active Status Bit 651" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB650 ,Active Status Bit 650" "Not active,Active" bitfld.long 0x00 9. " ASB649 ,Active Status Bit 649" "Not active,Active" bitfld.long 0x00 8. " ASB648 ,Active Status Bit 648" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB647 ,Active Status Bit 647" "Not active,Active" bitfld.long 0x00 6. " ASB646 ,Active Status Bit 646" "Not active,Active" bitfld.long 0x00 5. " ASB645 ,Active Status Bit 645" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB644 ,Active Status Bit 644" "Not active,Active" bitfld.long 0x00 3. " ASB643 ,Active Status Bit 643" "Not active,Active" bitfld.long 0x00 2. " ASB642 ,Active Status Bit 642" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB641 ,Active Status Bit 641" "Not active,Active" bitfld.long 0x00 0. " ASB640 ,Active Status Bit 640" "Not active,Active" else rgroup.long 0x0350++0x03 line.long 0x0 "GICD_ICDABR20,Active Status Register 20" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x15) rgroup.long 0x0354++0x03 line.long 0x0 "GICD_ICDABR21,Active Status Register 21" bitfld.long 0x00 31. " ASB703 ,Active Status Bit 703" "Not active,Active" bitfld.long 0x00 30. " ASB702 ,Active Status Bit 702" "Not active,Active" bitfld.long 0x00 29. " ASB701 ,Active Status Bit 701" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB700 ,Active Status Bit 700" "Not active,Active" bitfld.long 0x00 27. " ASB699 ,Active Status Bit 699" "Not active,Active" bitfld.long 0x00 26. " ASB698 ,Active Status Bit 698" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB697 ,Active Status Bit 697" "Not active,Active" bitfld.long 0x00 24. " ASB696 ,Active Status Bit 696" "Not active,Active" bitfld.long 0x00 23. " ASB695 ,Active Status Bit 695" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB694 ,Active Status Bit 694" "Not active,Active" bitfld.long 0x00 21. " ASB693 ,Active Status Bit 693" "Not active,Active" bitfld.long 0x00 20. " ASB692 ,Active Status Bit 692" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB691 ,Active Status Bit 691" "Not active,Active" bitfld.long 0x00 18. " ASB690 ,Active Status Bit 690" "Not active,Active" bitfld.long 0x00 17. " ASB689 ,Active Status Bit 689" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB688 ,Active Status Bit 688" "Not active,Active" bitfld.long 0x00 15. " ASB687 ,Active Status Bit 687" "Not active,Active" bitfld.long 0x00 14. " ASB686 ,Active Status Bit 686" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB685 ,Active Status Bit 685" "Not active,Active" bitfld.long 0x00 12. " ASB684 ,Active Status Bit 684" "Not active,Active" bitfld.long 0x00 11. " ASB683 ,Active Status Bit 683" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB682 ,Active Status Bit 682" "Not active,Active" bitfld.long 0x00 9. " ASB681 ,Active Status Bit 681" "Not active,Active" bitfld.long 0x00 8. " ASB680 ,Active Status Bit 680" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB679 ,Active Status Bit 679" "Not active,Active" bitfld.long 0x00 6. " ASB678 ,Active Status Bit 678" "Not active,Active" bitfld.long 0x00 5. " ASB677 ,Active Status Bit 677" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB676 ,Active Status Bit 676" "Not active,Active" bitfld.long 0x00 3. " ASB675 ,Active Status Bit 675" "Not active,Active" bitfld.long 0x00 2. " ASB674 ,Active Status Bit 674" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB673 ,Active Status Bit 673" "Not active,Active" bitfld.long 0x00 0. " ASB672 ,Active Status Bit 672" "Not active,Active" else rgroup.long 0x0354++0x03 line.long 0x0 "GICD_ICDABR21,Active Status Register 21" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x16) rgroup.long 0x0358++0x03 line.long 0x0 "GICD_ICDABR22,Active Status Register 22" bitfld.long 0x00 31. " ASB735 ,Active Status Bit 735" "Not active,Active" bitfld.long 0x00 30. " ASB734 ,Active Status Bit 734" "Not active,Active" bitfld.long 0x00 29. " ASB733 ,Active Status Bit 733" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB732 ,Active Status Bit 732" "Not active,Active" bitfld.long 0x00 27. " ASB731 ,Active Status Bit 731" "Not active,Active" bitfld.long 0x00 26. " ASB730 ,Active Status Bit 730" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB729 ,Active Status Bit 729" "Not active,Active" bitfld.long 0x00 24. " ASB728 ,Active Status Bit 728" "Not active,Active" bitfld.long 0x00 23. " ASB727 ,Active Status Bit 727" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB726 ,Active Status Bit 726" "Not active,Active" bitfld.long 0x00 21. " ASB725 ,Active Status Bit 725" "Not active,Active" bitfld.long 0x00 20. " ASB724 ,Active Status Bit 724" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB723 ,Active Status Bit 723" "Not active,Active" bitfld.long 0x00 18. " ASB722 ,Active Status Bit 722" "Not active,Active" bitfld.long 0x00 17. " ASB721 ,Active Status Bit 721" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB720 ,Active Status Bit 720" "Not active,Active" bitfld.long 0x00 15. " ASB719 ,Active Status Bit 719" "Not active,Active" bitfld.long 0x00 14. " ASB718 ,Active Status Bit 718" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB717 ,Active Status Bit 717" "Not active,Active" bitfld.long 0x00 12. " ASB716 ,Active Status Bit 716" "Not active,Active" bitfld.long 0x00 11. " ASB715 ,Active Status Bit 715" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB714 ,Active Status Bit 714" "Not active,Active" bitfld.long 0x00 9. " ASB713 ,Active Status Bit 713" "Not active,Active" bitfld.long 0x00 8. " ASB712 ,Active Status Bit 712" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB711 ,Active Status Bit 711" "Not active,Active" bitfld.long 0x00 6. " ASB710 ,Active Status Bit 710" "Not active,Active" bitfld.long 0x00 5. " ASB709 ,Active Status Bit 709" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB708 ,Active Status Bit 708" "Not active,Active" bitfld.long 0x00 3. " ASB707 ,Active Status Bit 707" "Not active,Active" bitfld.long 0x00 2. " ASB706 ,Active Status Bit 706" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB705 ,Active Status Bit 705" "Not active,Active" bitfld.long 0x00 0. " ASB704 ,Active Status Bit 704" "Not active,Active" else rgroup.long 0x0358++0x03 line.long 0x0 "GICD_ICDABR22,Active Status Register 22" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x17) rgroup.long 0x035C++0x03 line.long 0x0 "GICD_ICDABR23,Active Status Register 23" bitfld.long 0x00 31. " ASB767 ,Active Status Bit 767" "Not active,Active" bitfld.long 0x00 30. " ASB766 ,Active Status Bit 766" "Not active,Active" bitfld.long 0x00 29. " ASB765 ,Active Status Bit 765" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB764 ,Active Status Bit 764" "Not active,Active" bitfld.long 0x00 27. " ASB763 ,Active Status Bit 763" "Not active,Active" bitfld.long 0x00 26. " ASB762 ,Active Status Bit 762" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB761 ,Active Status Bit 761" "Not active,Active" bitfld.long 0x00 24. " ASB760 ,Active Status Bit 760" "Not active,Active" bitfld.long 0x00 23. " ASB759 ,Active Status Bit 759" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB758 ,Active Status Bit 758" "Not active,Active" bitfld.long 0x00 21. " ASB757 ,Active Status Bit 757" "Not active,Active" bitfld.long 0x00 20. " ASB756 ,Active Status Bit 756" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB755 ,Active Status Bit 755" "Not active,Active" bitfld.long 0x00 18. " ASB754 ,Active Status Bit 754" "Not active,Active" bitfld.long 0x00 17. " ASB753 ,Active Status Bit 753" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB752 ,Active Status Bit 752" "Not active,Active" bitfld.long 0x00 15. " ASB751 ,Active Status Bit 751" "Not active,Active" bitfld.long 0x00 14. " ASB750 ,Active Status Bit 750" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB749 ,Active Status Bit 749" "Not active,Active" bitfld.long 0x00 12. " ASB748 ,Active Status Bit 748" "Not active,Active" bitfld.long 0x00 11. " ASB747 ,Active Status Bit 747" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB746 ,Active Status Bit 746" "Not active,Active" bitfld.long 0x00 9. " ASB745 ,Active Status Bit 745" "Not active,Active" bitfld.long 0x00 8. " ASB744 ,Active Status Bit 744" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB743 ,Active Status Bit 743" "Not active,Active" bitfld.long 0x00 6. " ASB742 ,Active Status Bit 742" "Not active,Active" bitfld.long 0x00 5. " ASB741 ,Active Status Bit 741" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB740 ,Active Status Bit 740" "Not active,Active" bitfld.long 0x00 3. " ASB739 ,Active Status Bit 739" "Not active,Active" bitfld.long 0x00 2. " ASB738 ,Active Status Bit 738" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB737 ,Active Status Bit 737" "Not active,Active" bitfld.long 0x00 0. " ASB736 ,Active Status Bit 736" "Not active,Active" else rgroup.long 0x035C++0x03 line.long 0x0 "GICD_ICDABR23,Active Status Register 23" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x18) rgroup.long 0x0360++0x03 line.long 0x0 "GICD_ICDABR24,Active Status Register 24" bitfld.long 0x00 31. " ASB799 ,Active Status Bit 799" "Not active,Active" bitfld.long 0x00 30. " ASB798 ,Active Status Bit 798" "Not active,Active" bitfld.long 0x00 29. " ASB797 ,Active Status Bit 797" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB796 ,Active Status Bit 796" "Not active,Active" bitfld.long 0x00 27. " ASB795 ,Active Status Bit 795" "Not active,Active" bitfld.long 0x00 26. " ASB794 ,Active Status Bit 794" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB793 ,Active Status Bit 793" "Not active,Active" bitfld.long 0x00 24. " ASB792 ,Active Status Bit 792" "Not active,Active" bitfld.long 0x00 23. " ASB791 ,Active Status Bit 791" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB790 ,Active Status Bit 790" "Not active,Active" bitfld.long 0x00 21. " ASB789 ,Active Status Bit 789" "Not active,Active" bitfld.long 0x00 20. " ASB788 ,Active Status Bit 788" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB787 ,Active Status Bit 787" "Not active,Active" bitfld.long 0x00 18. " ASB786 ,Active Status Bit 786" "Not active,Active" bitfld.long 0x00 17. " ASB785 ,Active Status Bit 785" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB784 ,Active Status Bit 784" "Not active,Active" bitfld.long 0x00 15. " ASB783 ,Active Status Bit 783" "Not active,Active" bitfld.long 0x00 14. " ASB782 ,Active Status Bit 782" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB781 ,Active Status Bit 781" "Not active,Active" bitfld.long 0x00 12. " ASB780 ,Active Status Bit 780" "Not active,Active" bitfld.long 0x00 11. " ASB779 ,Active Status Bit 779" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB778 ,Active Status Bit 778" "Not active,Active" bitfld.long 0x00 9. " ASB777 ,Active Status Bit 777" "Not active,Active" bitfld.long 0x00 8. " ASB776 ,Active Status Bit 776" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB775 ,Active Status Bit 775" "Not active,Active" bitfld.long 0x00 6. " ASB774 ,Active Status Bit 774" "Not active,Active" bitfld.long 0x00 5. " ASB773 ,Active Status Bit 773" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB772 ,Active Status Bit 772" "Not active,Active" bitfld.long 0x00 3. " ASB771 ,Active Status Bit 771" "Not active,Active" bitfld.long 0x00 2. " ASB770 ,Active Status Bit 770" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB769 ,Active Status Bit 769" "Not active,Active" bitfld.long 0x00 0. " ASB768 ,Active Status Bit 768" "Not active,Active" else rgroup.long 0x0360++0x03 line.long 0x0 "GICD_ICDABR24,Active Status Register 24" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x19) rgroup.long 0x0364++0x03 line.long 0x0 "GICD_ICDABR25,Active Status Register 25" bitfld.long 0x00 31. " ASB831 ,Active Status Bit 831" "Not active,Active" bitfld.long 0x00 30. " ASB830 ,Active Status Bit 830" "Not active,Active" bitfld.long 0x00 29. " ASB829 ,Active Status Bit 829" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB828 ,Active Status Bit 828" "Not active,Active" bitfld.long 0x00 27. " ASB827 ,Active Status Bit 827" "Not active,Active" bitfld.long 0x00 26. " ASB826 ,Active Status Bit 826" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB825 ,Active Status Bit 825" "Not active,Active" bitfld.long 0x00 24. " ASB824 ,Active Status Bit 824" "Not active,Active" bitfld.long 0x00 23. " ASB823 ,Active Status Bit 823" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB822 ,Active Status Bit 822" "Not active,Active" bitfld.long 0x00 21. " ASB821 ,Active Status Bit 821" "Not active,Active" bitfld.long 0x00 20. " ASB820 ,Active Status Bit 820" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB819 ,Active Status Bit 819" "Not active,Active" bitfld.long 0x00 18. " ASB818 ,Active Status Bit 818" "Not active,Active" bitfld.long 0x00 17. " ASB817 ,Active Status Bit 817" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB816 ,Active Status Bit 816" "Not active,Active" bitfld.long 0x00 15. " ASB815 ,Active Status Bit 815" "Not active,Active" bitfld.long 0x00 14. " ASB814 ,Active Status Bit 814" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB813 ,Active Status Bit 813" "Not active,Active" bitfld.long 0x00 12. " ASB812 ,Active Status Bit 812" "Not active,Active" bitfld.long 0x00 11. " ASB811 ,Active Status Bit 811" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB810 ,Active Status Bit 810" "Not active,Active" bitfld.long 0x00 9. " ASB809 ,Active Status Bit 809" "Not active,Active" bitfld.long 0x00 8. " ASB808 ,Active Status Bit 808" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB807 ,Active Status Bit 807" "Not active,Active" bitfld.long 0x00 6. " ASB806 ,Active Status Bit 806" "Not active,Active" bitfld.long 0x00 5. " ASB805 ,Active Status Bit 805" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB804 ,Active Status Bit 804" "Not active,Active" bitfld.long 0x00 3. " ASB803 ,Active Status Bit 803" "Not active,Active" bitfld.long 0x00 2. " ASB802 ,Active Status Bit 802" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB801 ,Active Status Bit 801" "Not active,Active" bitfld.long 0x00 0. " ASB800 ,Active Status Bit 800" "Not active,Active" else rgroup.long 0x0364++0x03 line.long 0x0 "GICD_ICDABR25,Active Status Register 25" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x1A) rgroup.long 0x0368++0x03 line.long 0x0 "GICD_ICDABR26,Active Status Register 26" bitfld.long 0x00 31. " ASB863 ,Active Status Bit 863" "Not active,Active" bitfld.long 0x00 30. " ASB862 ,Active Status Bit 862" "Not active,Active" bitfld.long 0x00 29. " ASB861 ,Active Status Bit 861" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB860 ,Active Status Bit 860" "Not active,Active" bitfld.long 0x00 27. " ASB859 ,Active Status Bit 859" "Not active,Active" bitfld.long 0x00 26. " ASB858 ,Active Status Bit 858" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB857 ,Active Status Bit 857" "Not active,Active" bitfld.long 0x00 24. " ASB856 ,Active Status Bit 856" "Not active,Active" bitfld.long 0x00 23. " ASB855 ,Active Status Bit 855" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB854 ,Active Status Bit 854" "Not active,Active" bitfld.long 0x00 21. " ASB853 ,Active Status Bit 853" "Not active,Active" bitfld.long 0x00 20. " ASB852 ,Active Status Bit 852" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB851 ,Active Status Bit 851" "Not active,Active" bitfld.long 0x00 18. " ASB850 ,Active Status Bit 850" "Not active,Active" bitfld.long 0x00 17. " ASB849 ,Active Status Bit 849" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB848 ,Active Status Bit 848" "Not active,Active" bitfld.long 0x00 15. " ASB847 ,Active Status Bit 847" "Not active,Active" bitfld.long 0x00 14. " ASB846 ,Active Status Bit 846" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB845 ,Active Status Bit 845" "Not active,Active" bitfld.long 0x00 12. " ASB844 ,Active Status Bit 844" "Not active,Active" bitfld.long 0x00 11. " ASB843 ,Active Status Bit 843" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB842 ,Active Status Bit 842" "Not active,Active" bitfld.long 0x00 9. " ASB841 ,Active Status Bit 841" "Not active,Active" bitfld.long 0x00 8. " ASB840 ,Active Status Bit 840" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB839 ,Active Status Bit 839" "Not active,Active" bitfld.long 0x00 6. " ASB838 ,Active Status Bit 838" "Not active,Active" bitfld.long 0x00 5. " ASB837 ,Active Status Bit 837" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB836 ,Active Status Bit 836" "Not active,Active" bitfld.long 0x00 3. " ASB835 ,Active Status Bit 835" "Not active,Active" bitfld.long 0x00 2. " ASB834 ,Active Status Bit 834" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB833 ,Active Status Bit 833" "Not active,Active" bitfld.long 0x00 0. " ASB832 ,Active Status Bit 832" "Not active,Active" else rgroup.long 0x0368++0x03 line.long 0x0 "GICD_ICDABR26,Active Status Register 26" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x1B) rgroup.long 0x036C++0x03 line.long 0x0 "GICD_ICDABR27,Active Status Register 27" bitfld.long 0x00 31. " ASB895 ,Active Status Bit 895" "Not active,Active" bitfld.long 0x00 30. " ASB894 ,Active Status Bit 894" "Not active,Active" bitfld.long 0x00 29. " ASB893 ,Active Status Bit 893" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB892 ,Active Status Bit 892" "Not active,Active" bitfld.long 0x00 27. " ASB891 ,Active Status Bit 891" "Not active,Active" bitfld.long 0x00 26. " ASB890 ,Active Status Bit 890" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB889 ,Active Status Bit 889" "Not active,Active" bitfld.long 0x00 24. " ASB888 ,Active Status Bit 888" "Not active,Active" bitfld.long 0x00 23. " ASB887 ,Active Status Bit 887" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB886 ,Active Status Bit 886" "Not active,Active" bitfld.long 0x00 21. " ASB885 ,Active Status Bit 885" "Not active,Active" bitfld.long 0x00 20. " ASB884 ,Active Status Bit 884" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB883 ,Active Status Bit 883" "Not active,Active" bitfld.long 0x00 18. " ASB882 ,Active Status Bit 882" "Not active,Active" bitfld.long 0x00 17. " ASB881 ,Active Status Bit 881" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB880 ,Active Status Bit 880" "Not active,Active" bitfld.long 0x00 15. " ASB879 ,Active Status Bit 879" "Not active,Active" bitfld.long 0x00 14. " ASB878 ,Active Status Bit 878" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB877 ,Active Status Bit 877" "Not active,Active" bitfld.long 0x00 12. " ASB876 ,Active Status Bit 876" "Not active,Active" bitfld.long 0x00 11. " ASB875 ,Active Status Bit 875" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB874 ,Active Status Bit 874" "Not active,Active" bitfld.long 0x00 9. " ASB873 ,Active Status Bit 873" "Not active,Active" bitfld.long 0x00 8. " ASB872 ,Active Status Bit 872" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB871 ,Active Status Bit 871" "Not active,Active" bitfld.long 0x00 6. " ASB870 ,Active Status Bit 870" "Not active,Active" bitfld.long 0x00 5. " ASB869 ,Active Status Bit 869" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB868 ,Active Status Bit 868" "Not active,Active" bitfld.long 0x00 3. " ASB867 ,Active Status Bit 867" "Not active,Active" bitfld.long 0x00 2. " ASB866 ,Active Status Bit 866" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB865 ,Active Status Bit 865" "Not active,Active" bitfld.long 0x00 0. " ASB864 ,Active Status Bit 864" "Not active,Active" else rgroup.long 0x036C++0x03 line.long 0x0 "GICD_ICDABR27,Active Status Register 27" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x1C) rgroup.long 0x0370++0x03 line.long 0x0 "GICD_ICDABR28,Active Status Register 28" bitfld.long 0x00 31. " ASB927 ,Active Status Bit 927" "Not active,Active" bitfld.long 0x00 30. " ASB926 ,Active Status Bit 926" "Not active,Active" bitfld.long 0x00 29. " ASB925 ,Active Status Bit 925" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB924 ,Active Status Bit 924" "Not active,Active" bitfld.long 0x00 27. " ASB923 ,Active Status Bit 923" "Not active,Active" bitfld.long 0x00 26. " ASB922 ,Active Status Bit 922" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB921 ,Active Status Bit 921" "Not active,Active" bitfld.long 0x00 24. " ASB920 ,Active Status Bit 920" "Not active,Active" bitfld.long 0x00 23. " ASB919 ,Active Status Bit 919" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB918 ,Active Status Bit 918" "Not active,Active" bitfld.long 0x00 21. " ASB917 ,Active Status Bit 917" "Not active,Active" bitfld.long 0x00 20. " ASB916 ,Active Status Bit 916" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB915 ,Active Status Bit 915" "Not active,Active" bitfld.long 0x00 18. " ASB914 ,Active Status Bit 914" "Not active,Active" bitfld.long 0x00 17. " ASB913 ,Active Status Bit 913" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB912 ,Active Status Bit 912" "Not active,Active" bitfld.long 0x00 15. " ASB911 ,Active Status Bit 911" "Not active,Active" bitfld.long 0x00 14. " ASB910 ,Active Status Bit 910" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB909 ,Active Status Bit 909" "Not active,Active" bitfld.long 0x00 12. " ASB908 ,Active Status Bit 908" "Not active,Active" bitfld.long 0x00 11. " ASB907 ,Active Status Bit 907" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB906 ,Active Status Bit 906" "Not active,Active" bitfld.long 0x00 9. " ASB905 ,Active Status Bit 905" "Not active,Active" bitfld.long 0x00 8. " ASB904 ,Active Status Bit 904" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB903 ,Active Status Bit 903" "Not active,Active" bitfld.long 0x00 6. " ASB902 ,Active Status Bit 902" "Not active,Active" bitfld.long 0x00 5. " ASB901 ,Active Status Bit 901" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB900 ,Active Status Bit 900" "Not active,Active" bitfld.long 0x00 3. " ASB899 ,Active Status Bit 899" "Not active,Active" bitfld.long 0x00 2. " ASB898 ,Active Status Bit 898" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB897 ,Active Status Bit 897" "Not active,Active" bitfld.long 0x00 0. " ASB896 ,Active Status Bit 896" "Not active,Active" else rgroup.long 0x0370++0x03 line.long 0x0 "GICD_ICDABR28,Active Status Register 28" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x1D) rgroup.long 0x0374++0x03 line.long 0x0 "GICD_ICDABR29,Active Status Register 29" bitfld.long 0x00 31. " ASB959 ,Active Status Bit 959" "Not active,Active" bitfld.long 0x00 30. " ASB958 ,Active Status Bit 958" "Not active,Active" bitfld.long 0x00 29. " ASB957 ,Active Status Bit 957" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB956 ,Active Status Bit 956" "Not active,Active" bitfld.long 0x00 27. " ASB955 ,Active Status Bit 955" "Not active,Active" bitfld.long 0x00 26. " ASB954 ,Active Status Bit 954" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB953 ,Active Status Bit 953" "Not active,Active" bitfld.long 0x00 24. " ASB952 ,Active Status Bit 952" "Not active,Active" bitfld.long 0x00 23. " ASB951 ,Active Status Bit 951" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB950 ,Active Status Bit 950" "Not active,Active" bitfld.long 0x00 21. " ASB949 ,Active Status Bit 949" "Not active,Active" bitfld.long 0x00 20. " ASB948 ,Active Status Bit 948" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB947 ,Active Status Bit 947" "Not active,Active" bitfld.long 0x00 18. " ASB946 ,Active Status Bit 946" "Not active,Active" bitfld.long 0x00 17. " ASB945 ,Active Status Bit 945" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB944 ,Active Status Bit 944" "Not active,Active" bitfld.long 0x00 15. " ASB943 ,Active Status Bit 943" "Not active,Active" bitfld.long 0x00 14. " ASB942 ,Active Status Bit 942" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB941 ,Active Status Bit 941" "Not active,Active" bitfld.long 0x00 12. " ASB940 ,Active Status Bit 940" "Not active,Active" bitfld.long 0x00 11. " ASB939 ,Active Status Bit 939" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB938 ,Active Status Bit 938" "Not active,Active" bitfld.long 0x00 9. " ASB937 ,Active Status Bit 937" "Not active,Active" bitfld.long 0x00 8. " ASB936 ,Active Status Bit 936" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB935 ,Active Status Bit 935" "Not active,Active" bitfld.long 0x00 6. " ASB934 ,Active Status Bit 934" "Not active,Active" bitfld.long 0x00 5. " ASB933 ,Active Status Bit 933" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB932 ,Active Status Bit 932" "Not active,Active" bitfld.long 0x00 3. " ASB931 ,Active Status Bit 931" "Not active,Active" bitfld.long 0x00 2. " ASB930 ,Active Status Bit 930" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB929 ,Active Status Bit 929" "Not active,Active" bitfld.long 0x00 0. " ASB928 ,Active Status Bit 928" "Not active,Active" else rgroup.long 0x0374++0x03 line.long 0x0 "GICD_ICDABR29,Active Status Register 29" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x1E) rgroup.long 0x0378++0x03 line.long 0x0 "GICD_ICDABR30,Active Status Register 30" bitfld.long 0x00 31. " ASB991 ,Active Status Bit 991" "Not active,Active" bitfld.long 0x00 30. " ASB990 ,Active Status Bit 990" "Not active,Active" bitfld.long 0x00 29. " ASB989 ,Active Status Bit 989" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB988 ,Active Status Bit 988" "Not active,Active" bitfld.long 0x00 27. " ASB987 ,Active Status Bit 987" "Not active,Active" bitfld.long 0x00 26. " ASB986 ,Active Status Bit 986" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB985 ,Active Status Bit 985" "Not active,Active" bitfld.long 0x00 24. " ASB984 ,Active Status Bit 984" "Not active,Active" bitfld.long 0x00 23. " ASB983 ,Active Status Bit 983" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB982 ,Active Status Bit 982" "Not active,Active" bitfld.long 0x00 21. " ASB981 ,Active Status Bit 981" "Not active,Active" bitfld.long 0x00 20. " ASB980 ,Active Status Bit 980" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB979 ,Active Status Bit 979" "Not active,Active" bitfld.long 0x00 18. " ASB978 ,Active Status Bit 978" "Not active,Active" bitfld.long 0x00 17. " ASB977 ,Active Status Bit 977" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB976 ,Active Status Bit 976" "Not active,Active" bitfld.long 0x00 15. " ASB975 ,Active Status Bit 975" "Not active,Active" bitfld.long 0x00 14. " ASB974 ,Active Status Bit 974" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB973 ,Active Status Bit 973" "Not active,Active" bitfld.long 0x00 12. " ASB972 ,Active Status Bit 972" "Not active,Active" bitfld.long 0x00 11. " ASB971 ,Active Status Bit 971" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB970 ,Active Status Bit 970" "Not active,Active" bitfld.long 0x00 9. " ASB969 ,Active Status Bit 969" "Not active,Active" bitfld.long 0x00 8. " ASB968 ,Active Status Bit 968" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB967 ,Active Status Bit 967" "Not active,Active" bitfld.long 0x00 6. " ASB966 ,Active Status Bit 966" "Not active,Active" bitfld.long 0x00 5. " ASB965 ,Active Status Bit 965" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB964 ,Active Status Bit 964" "Not active,Active" bitfld.long 0x00 3. " ASB963 ,Active Status Bit 963" "Not active,Active" bitfld.long 0x00 2. " ASB962 ,Active Status Bit 962" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB961 ,Active Status Bit 961" "Not active,Active" bitfld.long 0x00 0. " ASB960 ,Active Status Bit 960" "Not active,Active" else rgroup.long 0x0378++0x03 line.long 0x0 "GICD_ICDABR30,Active Status Register 30" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)==0x1F) rgroup.long 0x037C++0x03 line.long 0x0 "GICD_ICDABR31,Active Status Register 31" bitfld.long 0x00 27. " ASB1019 ,Active Status Bit 1019" "Not active,Active" bitfld.long 0x00 26. " ASB1018 ,Active Status Bit 1018" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB1017 ,Active Status Bit 1017" "Not active,Active" bitfld.long 0x00 24. " ASB1016 ,Active Status Bit 1016" "Not active,Active" bitfld.long 0x00 23. " ASB1015 ,Active Status Bit 1015" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB1014 ,Active Status Bit 1014" "Not active,Active" bitfld.long 0x00 21. " ASB1013 ,Active Status Bit 1013" "Not active,Active" bitfld.long 0x00 20. " ASB1012 ,Active Status Bit 1012" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB1011 ,Active Status Bit 1011" "Not active,Active" bitfld.long 0x00 18. " ASB1010 ,Active Status Bit 1010" "Not active,Active" bitfld.long 0x00 17. " ASB1009 ,Active Status Bit 1009" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB1008 ,Active Status Bit 1008" "Not active,Active" bitfld.long 0x00 15. " ASB1007 ,Active Status Bit 1007" "Not active,Active" bitfld.long 0x00 14. " ASB1006 ,Active Status Bit 1006" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB1005 ,Active Status Bit 1005" "Not active,Active" bitfld.long 0x00 12. " ASB1004 ,Active Status Bit 1004" "Not active,Active" bitfld.long 0x00 11. " ASB1003 ,Active Status Bit 1003" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB1002 ,Active Status Bit 1002" "Not active,Active" bitfld.long 0x00 9. " ASB1001 ,Active Status Bit 1001" "Not active,Active" bitfld.long 0x00 8. " ASB1000 ,Active Status Bit 1000" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB999 ,Active Status Bit 999" "Not active,Active" bitfld.long 0x00 6. " ASB998 ,Active Status Bit 998" "Not active,Active" bitfld.long 0x00 5. " ASB997 ,Active Status Bit 997" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB996 ,Active Status Bit 996" "Not active,Active" bitfld.long 0x00 3. " ASB995 ,Active Status Bit 995" "Not active,Active" bitfld.long 0x00 2. " ASB994 ,Active Status Bit 994" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB993 ,Active Status Bit 993" "Not active,Active" bitfld.long 0x00 0. " ASB992 ,Active Status Bit 992" "Not active,Active" else rgroup.long 0x037C++0x03 line.long 0x0 "GICD_ICDABR31,Active Status Register 31" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif else group.long 0x0300++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER0,Interrupt Set/Clear Active Register 0" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE31 ,Set/Clear Active Bit 31" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE30 ,Set/Clear Active Bit 30" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE29 ,Set/Clear Active Bit 29" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE28 ,Set/Clear Active Bit 28" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE27 ,Set/Clear Active Bit 27" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE26 ,Set/Clear Active Bit 26" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE25 ,Set/Clear Active Bit 25" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE24 ,Set/Clear Active Bit 24" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE23 ,Set/Clear Active Bit 23" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE22 ,Set/Clear Active Bit 22" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE21 ,Set/Clear Active Bit 21" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE20 ,Set/Clear Active Bit 20" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE19 ,Set/Clear Active Bit 19" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE18 ,Set/Clear Active Bit 18" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE17 ,Set/Clear Active Bit 17" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE16 ,Set/Clear Active Bit 16" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE15 ,Set/Clear Active Bit 15" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE14 ,Set/Clear Active Bit 14" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE13 ,Set/Clear Active Bit 13" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE12 ,Set/Clear Active Bit 12" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE11 ,Set/Clear Active Bit 11" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE10 ,Set/Clear Active Bit 10" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE9 ,Set/Clear Active Bit 9" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE8 ,Set/Clear Active Bit 8" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE7 ,Set/Clear Active Bit 7" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE6 ,Set/Clear Active Bit 6" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE5 ,Set/Clear Active Bit 5" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE4 ,Set/Clear Active Bit 4" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE3 ,Set/Clear Active Bit 3" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE2 ,Set/Clear Active Bit 2" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE1 ,Set/Clear Active Bit 1" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE0 ,Set/Clear Active Bit 0" "Not active,Active" if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x01) group.long 0x0304++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER1,Interrupt Set/Clear Active Register 1" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE63 ,Set/Clear Active Bit 63" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE62 ,Set/Clear Active Bit 62" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE61 ,Set/Clear Active Bit 61" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE60 ,Set/Clear Active Bit 60" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE59 ,Set/Clear Active Bit 59" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE58 ,Set/Clear Active Bit 58" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE57 ,Set/Clear Active Bit 57" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE56 ,Set/Clear Active Bit 56" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE55 ,Set/Clear Active Bit 55" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE54 ,Set/Clear Active Bit 54" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE53 ,Set/Clear Active Bit 53" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE52 ,Set/Clear Active Bit 52" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE51 ,Set/Clear Active Bit 51" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE50 ,Set/Clear Active Bit 50" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE49 ,Set/Clear Active Bit 49" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE48 ,Set/Clear Active Bit 48" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE47 ,Set/Clear Active Bit 47" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE46 ,Set/Clear Active Bit 46" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE45 ,Set/Clear Active Bit 45" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE44 ,Set/Clear Active Bit 44" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE43 ,Set/Clear Active Bit 43" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE42 ,Set/Clear Active Bit 42" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE41 ,Set/Clear Active Bit 41" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE40 ,Set/Clear Active Bit 40" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE39 ,Set/Clear Active Bit 39" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE38 ,Set/Clear Active Bit 38" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE37 ,Set/Clear Active Bit 37" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE36 ,Set/Clear Active Bit 36" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE35 ,Set/Clear Active Bit 35" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE34 ,Set/Clear Active Bit 34" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE33 ,Set/Clear Active Bit 33" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE32 ,Set/Clear Active Bit 32" "Not active,Active" else rgroup.long 0x0304++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER1,Interrupt Set/Clear Active Register 1" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x02) group.long 0x0308++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER2,Interrupt Set/Clear Active Register 2" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE95 ,Set/Clear Active Bit 95" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE94 ,Set/Clear Active Bit 94" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE93 ,Set/Clear Active Bit 93" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE92 ,Set/Clear Active Bit 92" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE91 ,Set/Clear Active Bit 91" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE90 ,Set/Clear Active Bit 90" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE89 ,Set/Clear Active Bit 89" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE88 ,Set/Clear Active Bit 88" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE87 ,Set/Clear Active Bit 87" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE86 ,Set/Clear Active Bit 86" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE85 ,Set/Clear Active Bit 85" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE84 ,Set/Clear Active Bit 84" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE83 ,Set/Clear Active Bit 83" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE82 ,Set/Clear Active Bit 82" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE81 ,Set/Clear Active Bit 81" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE80 ,Set/Clear Active Bit 80" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE79 ,Set/Clear Active Bit 79" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE78 ,Set/Clear Active Bit 78" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE77 ,Set/Clear Active Bit 77" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE76 ,Set/Clear Active Bit 76" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE75 ,Set/Clear Active Bit 75" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE74 ,Set/Clear Active Bit 74" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE73 ,Set/Clear Active Bit 73" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE72 ,Set/Clear Active Bit 72" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE71 ,Set/Clear Active Bit 71" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE70 ,Set/Clear Active Bit 70" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE69 ,Set/Clear Active Bit 69" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE68 ,Set/Clear Active Bit 68" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE67 ,Set/Clear Active Bit 67" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE66 ,Set/Clear Active Bit 66" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE65 ,Set/Clear Active Bit 65" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE64 ,Set/Clear Active Bit 64" "Not active,Active" else rgroup.long 0x0308++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER2,Interrupt Set/Clear Active Register 2" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x03) group.long 0x030C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER3,Interrupt Set/Clear Active Register 3" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE127 ,Set/Clear Active Bit 127" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE126 ,Set/Clear Active Bit 126" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE125 ,Set/Clear Active Bit 125" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE124 ,Set/Clear Active Bit 124" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE123 ,Set/Clear Active Bit 123" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE122 ,Set/Clear Active Bit 122" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE121 ,Set/Clear Active Bit 121" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE120 ,Set/Clear Active Bit 120" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE119 ,Set/Clear Active Bit 119" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE118 ,Set/Clear Active Bit 118" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE117 ,Set/Clear Active Bit 117" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE116 ,Set/Clear Active Bit 116" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE115 ,Set/Clear Active Bit 115" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE114 ,Set/Clear Active Bit 114" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE113 ,Set/Clear Active Bit 113" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE112 ,Set/Clear Active Bit 112" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE111 ,Set/Clear Active Bit 111" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE110 ,Set/Clear Active Bit 110" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE109 ,Set/Clear Active Bit 109" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE108 ,Set/Clear Active Bit 108" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE107 ,Set/Clear Active Bit 107" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE106 ,Set/Clear Active Bit 106" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE105 ,Set/Clear Active Bit 105" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE104 ,Set/Clear Active Bit 104" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE103 ,Set/Clear Active Bit 103" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE102 ,Set/Clear Active Bit 102" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE101 ,Set/Clear Active Bit 101" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE100 ,Set/Clear Active Bit 100" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE99 ,Set/Clear Active Bit 99" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE98 ,Set/Clear Active Bit 98" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE97 ,Set/Clear Active Bit 97" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE96 ,Set/Clear Active Bit 96" "Not active,Active" else rgroup.long 0x030C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER3,Interrupt Set/Clear Active Register 3" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x04) group.long 0x0310++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER4,Interrupt Set/Clear Active Register 4" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE159 ,Set/Clear Active Bit 159" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE158 ,Set/Clear Active Bit 158" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE157 ,Set/Clear Active Bit 157" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE156 ,Set/Clear Active Bit 156" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE155 ,Set/Clear Active Bit 155" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE154 ,Set/Clear Active Bit 154" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE153 ,Set/Clear Active Bit 153" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE152 ,Set/Clear Active Bit 152" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE151 ,Set/Clear Active Bit 151" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE150 ,Set/Clear Active Bit 150" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE149 ,Set/Clear Active Bit 149" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE148 ,Set/Clear Active Bit 148" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE147 ,Set/Clear Active Bit 147" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE146 ,Set/Clear Active Bit 146" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE145 ,Set/Clear Active Bit 145" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE144 ,Set/Clear Active Bit 144" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE143 ,Set/Clear Active Bit 143" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE142 ,Set/Clear Active Bit 142" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE141 ,Set/Clear Active Bit 141" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE140 ,Set/Clear Active Bit 140" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE139 ,Set/Clear Active Bit 139" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE138 ,Set/Clear Active Bit 138" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE137 ,Set/Clear Active Bit 137" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE136 ,Set/Clear Active Bit 136" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE135 ,Set/Clear Active Bit 135" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE134 ,Set/Clear Active Bit 134" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE133 ,Set/Clear Active Bit 133" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE132 ,Set/Clear Active Bit 132" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE131 ,Set/Clear Active Bit 131" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE130 ,Set/Clear Active Bit 130" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE129 ,Set/Clear Active Bit 129" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE128 ,Set/Clear Active Bit 128" "Not active,Active" else rgroup.long 0x0310++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER4,Interrupt Set/Clear Active Register 4" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x05) group.long 0x0314++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER5,Interrupt Set/Clear Active Register 5" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE191 ,Set/Clear Active Bit 191" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE190 ,Set/Clear Active Bit 190" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE189 ,Set/Clear Active Bit 189" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE188 ,Set/Clear Active Bit 188" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE187 ,Set/Clear Active Bit 187" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE186 ,Set/Clear Active Bit 186" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE185 ,Set/Clear Active Bit 185" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE184 ,Set/Clear Active Bit 184" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE183 ,Set/Clear Active Bit 183" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE182 ,Set/Clear Active Bit 182" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE181 ,Set/Clear Active Bit 181" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE180 ,Set/Clear Active Bit 180" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE179 ,Set/Clear Active Bit 179" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE178 ,Set/Clear Active Bit 178" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE177 ,Set/Clear Active Bit 177" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE176 ,Set/Clear Active Bit 176" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE175 ,Set/Clear Active Bit 175" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE174 ,Set/Clear Active Bit 174" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE173 ,Set/Clear Active Bit 173" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE172 ,Set/Clear Active Bit 172" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE171 ,Set/Clear Active Bit 171" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE170 ,Set/Clear Active Bit 170" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE169 ,Set/Clear Active Bit 169" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE168 ,Set/Clear Active Bit 168" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE167 ,Set/Clear Active Bit 167" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE166 ,Set/Clear Active Bit 166" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE165 ,Set/Clear Active Bit 165" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE164 ,Set/Clear Active Bit 164" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE163 ,Set/Clear Active Bit 163" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE162 ,Set/Clear Active Bit 162" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE161 ,Set/Clear Active Bit 161" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE160 ,Set/Clear Active Bit 160" "Not active,Active" else rgroup.long 0x0314++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER5,Interrupt Set/Clear Active Register 5" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x06) group.long 0x0318++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER6,Interrupt Set/Clear Active Register 6" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE223 ,Set/Clear Active Bit 223" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE222 ,Set/Clear Active Bit 222" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE221 ,Set/Clear Active Bit 221" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE220 ,Set/Clear Active Bit 220" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE219 ,Set/Clear Active Bit 219" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE218 ,Set/Clear Active Bit 218" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE217 ,Set/Clear Active Bit 217" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE216 ,Set/Clear Active Bit 216" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE215 ,Set/Clear Active Bit 215" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE214 ,Set/Clear Active Bit 214" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE213 ,Set/Clear Active Bit 213" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE212 ,Set/Clear Active Bit 212" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE211 ,Set/Clear Active Bit 211" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE210 ,Set/Clear Active Bit 210" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE209 ,Set/Clear Active Bit 209" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE208 ,Set/Clear Active Bit 208" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE207 ,Set/Clear Active Bit 207" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE206 ,Set/Clear Active Bit 206" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE205 ,Set/Clear Active Bit 205" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE204 ,Set/Clear Active Bit 204" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE203 ,Set/Clear Active Bit 203" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE202 ,Set/Clear Active Bit 202" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE201 ,Set/Clear Active Bit 201" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE200 ,Set/Clear Active Bit 200" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE199 ,Set/Clear Active Bit 199" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE198 ,Set/Clear Active Bit 198" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE197 ,Set/Clear Active Bit 197" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE196 ,Set/Clear Active Bit 196" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE195 ,Set/Clear Active Bit 195" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE194 ,Set/Clear Active Bit 194" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE193 ,Set/Clear Active Bit 193" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE192 ,Set/Clear Active Bit 192" "Not active,Active" else rgroup.long 0x0318++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER6,Interrupt Set/Clear Active Register 6" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x07) group.long 0x031C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER7,Interrupt Set/Clear Active Register 7" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE255 ,Set/Clear Active Bit 255" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE254 ,Set/Clear Active Bit 254" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE253 ,Set/Clear Active Bit 253" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE252 ,Set/Clear Active Bit 252" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE251 ,Set/Clear Active Bit 251" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE250 ,Set/Clear Active Bit 250" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE249 ,Set/Clear Active Bit 249" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE248 ,Set/Clear Active Bit 248" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE247 ,Set/Clear Active Bit 247" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE246 ,Set/Clear Active Bit 246" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE245 ,Set/Clear Active Bit 245" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE244 ,Set/Clear Active Bit 244" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE243 ,Set/Clear Active Bit 243" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE242 ,Set/Clear Active Bit 242" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE241 ,Set/Clear Active Bit 241" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE240 ,Set/Clear Active Bit 240" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE239 ,Set/Clear Active Bit 239" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE238 ,Set/Clear Active Bit 238" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE237 ,Set/Clear Active Bit 237" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE236 ,Set/Clear Active Bit 236" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE235 ,Set/Clear Active Bit 235" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE234 ,Set/Clear Active Bit 234" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE233 ,Set/Clear Active Bit 233" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE232 ,Set/Clear Active Bit 232" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE231 ,Set/Clear Active Bit 231" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE230 ,Set/Clear Active Bit 230" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE229 ,Set/Clear Active Bit 229" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE228 ,Set/Clear Active Bit 228" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE227 ,Set/Clear Active Bit 227" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE226 ,Set/Clear Active Bit 226" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE225 ,Set/Clear Active Bit 225" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE224 ,Set/Clear Active Bit 224" "Not active,Active" else rgroup.long 0x031C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER7,Interrupt Set/Clear Active Register 7" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x08) group.long 0x0320++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER8,Interrupt Set/Clear Active Register 8" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE287 ,Set/Clear Active Bit 287" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE286 ,Set/Clear Active Bit 286" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE285 ,Set/Clear Active Bit 285" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE284 ,Set/Clear Active Bit 284" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE283 ,Set/Clear Active Bit 283" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE282 ,Set/Clear Active Bit 282" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE281 ,Set/Clear Active Bit 281" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE280 ,Set/Clear Active Bit 280" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE279 ,Set/Clear Active Bit 279" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE278 ,Set/Clear Active Bit 278" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE277 ,Set/Clear Active Bit 277" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE276 ,Set/Clear Active Bit 276" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE275 ,Set/Clear Active Bit 275" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE274 ,Set/Clear Active Bit 274" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE273 ,Set/Clear Active Bit 273" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE272 ,Set/Clear Active Bit 272" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE271 ,Set/Clear Active Bit 271" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE270 ,Set/Clear Active Bit 270" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE269 ,Set/Clear Active Bit 269" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE268 ,Set/Clear Active Bit 268" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE267 ,Set/Clear Active Bit 267" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE266 ,Set/Clear Active Bit 266" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE265 ,Set/Clear Active Bit 265" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE264 ,Set/Clear Active Bit 264" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE263 ,Set/Clear Active Bit 263" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE262 ,Set/Clear Active Bit 262" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE261 ,Set/Clear Active Bit 261" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE260 ,Set/Clear Active Bit 260" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE259 ,Set/Clear Active Bit 259" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE258 ,Set/Clear Active Bit 258" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE257 ,Set/Clear Active Bit 257" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE256 ,Set/Clear Active Bit 256" "Not active,Active" else rgroup.long 0x0320++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER8,Interrupt Set/Clear Active Register 8" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x09) group.long 0x0324++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER9,Interrupt Set/Clear Active Register 9" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE319 ,Set/Clear Active Bit 319" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE318 ,Set/Clear Active Bit 318" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE317 ,Set/Clear Active Bit 317" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE316 ,Set/Clear Active Bit 316" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE315 ,Set/Clear Active Bit 315" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE314 ,Set/Clear Active Bit 314" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE313 ,Set/Clear Active Bit 313" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE312 ,Set/Clear Active Bit 312" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE311 ,Set/Clear Active Bit 311" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE310 ,Set/Clear Active Bit 310" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE309 ,Set/Clear Active Bit 309" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE308 ,Set/Clear Active Bit 308" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE307 ,Set/Clear Active Bit 307" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE306 ,Set/Clear Active Bit 306" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE305 ,Set/Clear Active Bit 305" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE304 ,Set/Clear Active Bit 304" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE303 ,Set/Clear Active Bit 303" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE302 ,Set/Clear Active Bit 302" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE301 ,Set/Clear Active Bit 301" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE300 ,Set/Clear Active Bit 300" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE299 ,Set/Clear Active Bit 299" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE298 ,Set/Clear Active Bit 298" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE297 ,Set/Clear Active Bit 297" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE296 ,Set/Clear Active Bit 296" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE295 ,Set/Clear Active Bit 295" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE294 ,Set/Clear Active Bit 294" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE293 ,Set/Clear Active Bit 293" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE292 ,Set/Clear Active Bit 292" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE291 ,Set/Clear Active Bit 291" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE290 ,Set/Clear Active Bit 290" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE289 ,Set/Clear Active Bit 289" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE288 ,Set/Clear Active Bit 288" "Not active,Active" else rgroup.long 0x0324++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER9,Interrupt Set/Clear Active Register 9" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x0A) group.long 0x0328++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER10,Interrupt Set/Clear Active Register 10" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE351 ,Set/Clear Active Bit 351" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE350 ,Set/Clear Active Bit 350" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE349 ,Set/Clear Active Bit 349" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE348 ,Set/Clear Active Bit 348" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE347 ,Set/Clear Active Bit 347" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE346 ,Set/Clear Active Bit 346" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE345 ,Set/Clear Active Bit 345" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE344 ,Set/Clear Active Bit 344" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE343 ,Set/Clear Active Bit 343" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE342 ,Set/Clear Active Bit 342" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE341 ,Set/Clear Active Bit 341" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE340 ,Set/Clear Active Bit 340" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE339 ,Set/Clear Active Bit 339" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE338 ,Set/Clear Active Bit 338" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE337 ,Set/Clear Active Bit 337" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE336 ,Set/Clear Active Bit 336" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE335 ,Set/Clear Active Bit 335" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE334 ,Set/Clear Active Bit 334" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE333 ,Set/Clear Active Bit 333" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE332 ,Set/Clear Active Bit 332" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE331 ,Set/Clear Active Bit 331" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE330 ,Set/Clear Active Bit 330" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE329 ,Set/Clear Active Bit 329" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE328 ,Set/Clear Active Bit 328" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE327 ,Set/Clear Active Bit 327" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE326 ,Set/Clear Active Bit 326" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE325 ,Set/Clear Active Bit 325" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE324 ,Set/Clear Active Bit 324" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE323 ,Set/Clear Active Bit 323" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE322 ,Set/Clear Active Bit 322" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE321 ,Set/Clear Active Bit 321" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE320 ,Set/Clear Active Bit 320" "Not active,Active" else rgroup.long 0x0328++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER10,Interrupt Set/Clear Active Register 10" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x0B) group.long 0x032C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER11,Interrupt Set/Clear Active Register 11" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE383 ,Set/Clear Active Bit 383" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE382 ,Set/Clear Active Bit 382" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE381 ,Set/Clear Active Bit 381" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE380 ,Set/Clear Active Bit 380" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE379 ,Set/Clear Active Bit 379" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE378 ,Set/Clear Active Bit 378" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE377 ,Set/Clear Active Bit 377" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE376 ,Set/Clear Active Bit 376" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE375 ,Set/Clear Active Bit 375" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE374 ,Set/Clear Active Bit 374" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE373 ,Set/Clear Active Bit 373" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE372 ,Set/Clear Active Bit 372" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE371 ,Set/Clear Active Bit 371" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE370 ,Set/Clear Active Bit 370" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE369 ,Set/Clear Active Bit 369" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE368 ,Set/Clear Active Bit 368" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE367 ,Set/Clear Active Bit 367" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE366 ,Set/Clear Active Bit 366" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE365 ,Set/Clear Active Bit 365" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE364 ,Set/Clear Active Bit 364" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE363 ,Set/Clear Active Bit 363" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE362 ,Set/Clear Active Bit 362" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE361 ,Set/Clear Active Bit 361" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE360 ,Set/Clear Active Bit 360" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE359 ,Set/Clear Active Bit 359" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE358 ,Set/Clear Active Bit 358" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE357 ,Set/Clear Active Bit 357" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE356 ,Set/Clear Active Bit 356" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE355 ,Set/Clear Active Bit 355" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE354 ,Set/Clear Active Bit 354" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE353 ,Set/Clear Active Bit 353" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE352 ,Set/Clear Active Bit 352" "Not active,Active" else rgroup.long 0x032C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER11,Interrupt Set/Clear Active Register 11" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x0C) group.long 0x0330++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER12,Interrupt Set/Clear Active Register 12" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE415 ,Set/Clear Active Bit 415" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE414 ,Set/Clear Active Bit 414" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE413 ,Set/Clear Active Bit 413" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE412 ,Set/Clear Active Bit 412" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE411 ,Set/Clear Active Bit 411" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE410 ,Set/Clear Active Bit 410" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE409 ,Set/Clear Active Bit 409" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE408 ,Set/Clear Active Bit 408" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE407 ,Set/Clear Active Bit 407" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE406 ,Set/Clear Active Bit 406" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE405 ,Set/Clear Active Bit 405" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE404 ,Set/Clear Active Bit 404" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE403 ,Set/Clear Active Bit 403" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE402 ,Set/Clear Active Bit 402" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE401 ,Set/Clear Active Bit 401" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE400 ,Set/Clear Active Bit 400" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE399 ,Set/Clear Active Bit 399" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE398 ,Set/Clear Active Bit 398" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE397 ,Set/Clear Active Bit 397" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE396 ,Set/Clear Active Bit 396" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE395 ,Set/Clear Active Bit 395" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE394 ,Set/Clear Active Bit 394" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE393 ,Set/Clear Active Bit 393" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE392 ,Set/Clear Active Bit 392" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE391 ,Set/Clear Active Bit 391" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE390 ,Set/Clear Active Bit 390" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE389 ,Set/Clear Active Bit 389" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE388 ,Set/Clear Active Bit 388" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE387 ,Set/Clear Active Bit 387" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE386 ,Set/Clear Active Bit 386" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE385 ,Set/Clear Active Bit 385" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE384 ,Set/Clear Active Bit 384" "Not active,Active" else rgroup.long 0x0330++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER12,Interrupt Set/Clear Active Register 12" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x0D) group.long 0x0334++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER13,Interrupt Set/Clear Active Register 13" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE447 ,Set/Clear Active Bit 447" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE446 ,Set/Clear Active Bit 446" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE445 ,Set/Clear Active Bit 445" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE444 ,Set/Clear Active Bit 444" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE443 ,Set/Clear Active Bit 443" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE442 ,Set/Clear Active Bit 442" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE441 ,Set/Clear Active Bit 441" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE440 ,Set/Clear Active Bit 440" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE439 ,Set/Clear Active Bit 439" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE438 ,Set/Clear Active Bit 438" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE437 ,Set/Clear Active Bit 437" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE436 ,Set/Clear Active Bit 436" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE435 ,Set/Clear Active Bit 435" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE434 ,Set/Clear Active Bit 434" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE433 ,Set/Clear Active Bit 433" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE432 ,Set/Clear Active Bit 432" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE431 ,Set/Clear Active Bit 431" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE430 ,Set/Clear Active Bit 430" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE429 ,Set/Clear Active Bit 429" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE428 ,Set/Clear Active Bit 428" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE427 ,Set/Clear Active Bit 427" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE426 ,Set/Clear Active Bit 426" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE425 ,Set/Clear Active Bit 425" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE424 ,Set/Clear Active Bit 424" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE423 ,Set/Clear Active Bit 423" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE422 ,Set/Clear Active Bit 422" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE421 ,Set/Clear Active Bit 421" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE420 ,Set/Clear Active Bit 420" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE419 ,Set/Clear Active Bit 419" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE418 ,Set/Clear Active Bit 418" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE417 ,Set/Clear Active Bit 417" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE416 ,Set/Clear Active Bit 416" "Not active,Active" else rgroup.long 0x0334++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER13,Interrupt Set/Clear Active Register 13" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x0E) group.long 0x0338++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER14,Interrupt Set/Clear Active Register 14" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE479 ,Set/Clear Active Bit 479" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE478 ,Set/Clear Active Bit 478" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE477 ,Set/Clear Active Bit 477" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE476 ,Set/Clear Active Bit 476" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE475 ,Set/Clear Active Bit 475" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE474 ,Set/Clear Active Bit 474" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE473 ,Set/Clear Active Bit 473" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE472 ,Set/Clear Active Bit 472" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE471 ,Set/Clear Active Bit 471" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE470 ,Set/Clear Active Bit 470" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE469 ,Set/Clear Active Bit 469" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE468 ,Set/Clear Active Bit 468" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE467 ,Set/Clear Active Bit 467" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE466 ,Set/Clear Active Bit 466" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE465 ,Set/Clear Active Bit 465" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE464 ,Set/Clear Active Bit 464" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE463 ,Set/Clear Active Bit 463" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE462 ,Set/Clear Active Bit 462" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE461 ,Set/Clear Active Bit 461" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE460 ,Set/Clear Active Bit 460" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE459 ,Set/Clear Active Bit 459" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE458 ,Set/Clear Active Bit 458" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE457 ,Set/Clear Active Bit 457" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE456 ,Set/Clear Active Bit 456" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE455 ,Set/Clear Active Bit 455" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE454 ,Set/Clear Active Bit 454" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE453 ,Set/Clear Active Bit 453" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE452 ,Set/Clear Active Bit 452" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE451 ,Set/Clear Active Bit 451" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE450 ,Set/Clear Active Bit 450" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE449 ,Set/Clear Active Bit 449" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE448 ,Set/Clear Active Bit 448" "Not active,Active" else rgroup.long 0x0338++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER14,Interrupt Set/Clear Active Register 14" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x0F) group.long 0x033C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER15,Interrupt Set/Clear Active Register 15" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE511 ,Set/Clear Active Bit 511" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE510 ,Set/Clear Active Bit 510" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE509 ,Set/Clear Active Bit 509" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE508 ,Set/Clear Active Bit 508" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE507 ,Set/Clear Active Bit 507" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE506 ,Set/Clear Active Bit 506" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE505 ,Set/Clear Active Bit 505" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE504 ,Set/Clear Active Bit 504" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE503 ,Set/Clear Active Bit 503" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE502 ,Set/Clear Active Bit 502" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE501 ,Set/Clear Active Bit 501" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE500 ,Set/Clear Active Bit 500" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE499 ,Set/Clear Active Bit 499" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE498 ,Set/Clear Active Bit 498" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE497 ,Set/Clear Active Bit 497" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE496 ,Set/Clear Active Bit 496" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE495 ,Set/Clear Active Bit 495" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE494 ,Set/Clear Active Bit 494" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE493 ,Set/Clear Active Bit 493" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE492 ,Set/Clear Active Bit 492" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE491 ,Set/Clear Active Bit 491" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE490 ,Set/Clear Active Bit 490" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE489 ,Set/Clear Active Bit 489" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE488 ,Set/Clear Active Bit 488" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE487 ,Set/Clear Active Bit 487" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE486 ,Set/Clear Active Bit 486" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE485 ,Set/Clear Active Bit 485" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE484 ,Set/Clear Active Bit 484" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE483 ,Set/Clear Active Bit 483" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE482 ,Set/Clear Active Bit 482" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE481 ,Set/Clear Active Bit 481" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE480 ,Set/Clear Active Bit 480" "Not active,Active" else rgroup.long 0x033C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER15,Interrupt Set/Clear Active Register 15" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif rgroup.long 0x0340++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER16,Interrupt Set/Clear Active Register 16" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x0344++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER17,Interrupt Set/Clear Active Register 17" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x0348++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER18,Interrupt Set/Clear Active Register 18" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x034C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER19,Interrupt Set/Clear Active Register 19" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x0350++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER20,Interrupt Set/Clear Active Register 20" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x0354++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER21,Interrupt Set/Clear Active Register 21" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x0358++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER22,Interrupt Set/Clear Active Register 22" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x035C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER23,Interrupt Set/Clear Active Register 23" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x0360++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER24,Interrupt Set/Clear Active Register 24" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x0364++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER25,Interrupt Set/Clear Active Register 25" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x0368++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER26,Interrupt Set/Clear Active Register 26" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x036C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER27,Interrupt Set/Clear Active Register 27" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x0370++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER28,Interrupt Set/Clear Active Register 28" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x0374++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER29,Interrupt Set/Clear Active Register 29" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x0378++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER30,Interrupt Set/Clear Active Register 30" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x037C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER31,Interrupt Set/Clear Active Register 31" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif tree.end tree "Priority Registers" group.long 0x400++0x03 line.long 0x00 "GICD_IPRIORITYR0,Interrupt Priority Register 0" hexmask.long.byte 0x00 24.--31. 1. " INTID3 ,Interrupt ID3 Priority/Priority Byte Offset 3 " hexmask.long.byte 0x00 16.--23. 1. " INTID2 ,Interrupt ID2 Priority/Priority Byte Offset 2 " hexmask.long.byte 0x00 8.--15. 1. " INTID1 ,Interrupt ID1 Priority/Priority Byte Offset 1 " hexmask.long.byte 0x00 0.--7. 1. " INTID0 ,Interrupt ID0 Priority/Priority Byte Offset 0 " group.long 0x404++0x03 line.long 0x00 "GICD_IPRIORITYR1,Interrupt Priority Register 1" hexmask.long.byte 0x00 24.--31. 1. " INTID7 ,Interrupt ID7 Priority/Priority Byte Offset 7 " hexmask.long.byte 0x00 16.--23. 1. " INTID6 ,Interrupt ID6 Priority/Priority Byte Offset 6 " hexmask.long.byte 0x00 8.--15. 1. " INTID5 ,Interrupt ID5 Priority/Priority Byte Offset 5 " hexmask.long.byte 0x00 0.--7. 1. " INTID4 ,Interrupt ID4 Priority/Priority Byte Offset 4 " group.long 0x408++0x03 line.long 0x00 "GICD_IPRIORITYR2,Interrupt Priority Register 2" hexmask.long.byte 0x00 24.--31. 1. " INTID11 ,Interrupt ID11 Priority/Priority Byte Offset 11 " hexmask.long.byte 0x00 16.--23. 1. " INTID10 ,Interrupt ID10 Priority/Priority Byte Offset 10 " hexmask.long.byte 0x00 8.--15. 1. " INTID9 ,Interrupt ID9 Priority/Priority Byte Offset 9 " hexmask.long.byte 0x00 0.--7. 1. " INTID8 ,Interrupt ID8 Priority/Priority Byte Offset 8 " group.long 0x40C++0x03 line.long 0x00 "GICD_IPRIORITYR3,Interrupt Priority Register 3" hexmask.long.byte 0x00 24.--31. 1. " INTID15 ,Interrupt ID15 Priority/Priority Byte Offset 15 " hexmask.long.byte 0x00 16.--23. 1. " INTID14 ,Interrupt ID14 Priority/Priority Byte Offset 14 " hexmask.long.byte 0x00 8.--15. 1. " INTID13 ,Interrupt ID13 Priority/Priority Byte Offset 13 " hexmask.long.byte 0x00 0.--7. 1. " INTID12 ,Interrupt ID12 Priority/Priority Byte Offset 12 " group.long 0x410++0x03 line.long 0x00 "GICD_IPRIORITYR4,Interrupt Priority Register 4" hexmask.long.byte 0x00 24.--31. 1. " INTID19 ,Interrupt ID19 Priority/Priority Byte Offset 19 " hexmask.long.byte 0x00 16.--23. 1. " INTID18 ,Interrupt ID18 Priority/Priority Byte Offset 18 " hexmask.long.byte 0x00 8.--15. 1. " INTID17 ,Interrupt ID17 Priority/Priority Byte Offset 17 " hexmask.long.byte 0x00 0.--7. 1. " INTID16 ,Interrupt ID16 Priority/Priority Byte Offset 16 " group.long 0x414++0x03 line.long 0x00 "GICD_IPRIORITYR5,Interrupt Priority Register 5" hexmask.long.byte 0x00 24.--31. 1. " INTID23 ,Interrupt ID23 Priority/Priority Byte Offset 23 " hexmask.long.byte 0x00 16.--23. 1. " INTID22 ,Interrupt ID22 Priority/Priority Byte Offset 22 " hexmask.long.byte 0x00 8.--15. 1. " INTID21 ,Interrupt ID21 Priority/Priority Byte Offset 21 " hexmask.long.byte 0x00 0.--7. 1. " INTID20 ,Interrupt ID20 Priority/Priority Byte Offset 20 " group.long 0x418++0x03 line.long 0x00 "GICD_IPRIORITYR6,Interrupt Priority Register 6" hexmask.long.byte 0x00 24.--31. 1. " INTID27 ,Interrupt ID27 Priority/Priority Byte Offset 27 " hexmask.long.byte 0x00 16.--23. 1. " INTID26 ,Interrupt ID26 Priority/Priority Byte Offset 26 " hexmask.long.byte 0x00 8.--15. 1. " INTID25 ,Interrupt ID25 Priority/Priority Byte Offset 25 " hexmask.long.byte 0x00 0.--7. 1. " INTID24 ,Interrupt ID24 Priority/Priority Byte Offset 24 " group.long 0x41C++0x03 line.long 0x00 "GICD_IPRIORITYR7,Interrupt Priority Register 7" hexmask.long.byte 0x00 24.--31. 1. " INTID31 ,Interrupt ID31 Priority/Priority Byte Offset 31 " hexmask.long.byte 0x00 16.--23. 1. " INTID30 ,Interrupt ID30 Priority/Priority Byte Offset 30 " hexmask.long.byte 0x00 8.--15. 1. " INTID29 ,Interrupt ID29 Priority/Priority Byte Offset 29 " hexmask.long.byte 0x00 0.--7. 1. " INTID28 ,Interrupt ID28 Priority/Priority Byte Offset 28 " if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x01) group.long 0x420++0x03 line.long 0x00 "GICD_IPRIORITYR8,Interrupt Priority Register 8" hexmask.long.byte 0x00 24.--31. 1. " INTID35 ,Interrupt ID35 Priority/Priority Byte Offset 35 " hexmask.long.byte 0x00 16.--23. 1. " INTID34 ,Interrupt ID34 Priority/Priority Byte Offset 34 " hexmask.long.byte 0x00 8.--15. 1. " INTID33 ,Interrupt ID33 Priority/Priority Byte Offset 33 " hexmask.long.byte 0x00 0.--7. 1. " INTID32 ,Interrupt ID32 Priority/Priority Byte Offset 32 " group.long 0x424++0x03 line.long 0x00 "GICD_IPRIORITYR9,Interrupt Priority Register 9" hexmask.long.byte 0x00 24.--31. 1. " INTID39 ,Interrupt ID39 Priority/Priority Byte Offset 39 " hexmask.long.byte 0x00 16.--23. 1. " INTID38 ,Interrupt ID38 Priority/Priority Byte Offset 38 " hexmask.long.byte 0x00 8.--15. 1. " INTID37 ,Interrupt ID37 Priority/Priority Byte Offset 37 " hexmask.long.byte 0x00 0.--7. 1. " INTID36 ,Interrupt ID36 Priority/Priority Byte Offset 36 " group.long 0x428++0x03 line.long 0x00 "GICD_IPRIORITYR10,Interrupt Priority Register 10" hexmask.long.byte 0x00 24.--31. 1. " INTID43 ,Interrupt ID43 Priority/Priority Byte Offset 43 " hexmask.long.byte 0x00 16.--23. 1. " INTID42 ,Interrupt ID42 Priority/Priority Byte Offset 42 " hexmask.long.byte 0x00 8.--15. 1. " INTID41 ,Interrupt ID41 Priority/Priority Byte Offset 41 " hexmask.long.byte 0x00 0.--7. 1. " INTID40 ,Interrupt ID40 Priority/Priority Byte Offset 40 " group.long 0x42C++0x03 line.long 0x00 "GICD_IPRIORITYR11,Interrupt Priority Register 11" hexmask.long.byte 0x00 24.--31. 1. " INTID47 ,Interrupt ID47 Priority/Priority Byte Offset 47 " hexmask.long.byte 0x00 16.--23. 1. " INTID46 ,Interrupt ID46 Priority/Priority Byte Offset 46 " hexmask.long.byte 0x00 8.--15. 1. " INTID45 ,Interrupt ID45 Priority/Priority Byte Offset 45 " hexmask.long.byte 0x00 0.--7. 1. " INTID44 ,Interrupt ID44 Priority/Priority Byte Offset 44 " group.long 0x430++0x03 line.long 0x00 "GICD_IPRIORITYR12,Interrupt Priority Register 12" hexmask.long.byte 0x00 24.--31. 1. " INTID51 ,Interrupt ID51 Priority/Priority Byte Offset 51 " hexmask.long.byte 0x00 16.--23. 1. " INTID50 ,Interrupt ID50 Priority/Priority Byte Offset 50 " hexmask.long.byte 0x00 8.--15. 1. " INTID49 ,Interrupt ID49 Priority/Priority Byte Offset 49 " hexmask.long.byte 0x00 0.--7. 1. " INTID48 ,Interrupt ID48 Priority/Priority Byte Offset 48 " group.long 0x434++0x03 line.long 0x00 "GICD_IPRIORITYR13,Interrupt Priority Register 13" hexmask.long.byte 0x00 24.--31. 1. " INTID55 ,Interrupt ID55 Priority/Priority Byte Offset 55 " hexmask.long.byte 0x00 16.--23. 1. " INTID54 ,Interrupt ID54 Priority/Priority Byte Offset 54 " hexmask.long.byte 0x00 8.--15. 1. " INTID53 ,Interrupt ID53 Priority/Priority Byte Offset 53 " hexmask.long.byte 0x00 0.--7. 1. " INTID52 ,Interrupt ID52 Priority/Priority Byte Offset 52 " group.long 0x438++0x03 line.long 0x00 "GICD_IPRIORITYR14,Interrupt Priority Register 14" hexmask.long.byte 0x00 24.--31. 1. " INTID59 ,Interrupt ID59 Priority/Priority Byte Offset 59 " hexmask.long.byte 0x00 16.--23. 1. " INTID58 ,Interrupt ID58 Priority/Priority Byte Offset 58 " hexmask.long.byte 0x00 8.--15. 1. " INTID57 ,Interrupt ID57 Priority/Priority Byte Offset 57 " hexmask.long.byte 0x00 0.--7. 1. " INTID56 ,Interrupt ID56 Priority/Priority Byte Offset 56 " group.long 0x43C++0x03 line.long 0x00 "GICD_IPRIORITYR15,Interrupt Priority Register 15" hexmask.long.byte 0x00 24.--31. 1. " INTID63 ,Interrupt ID63 Priority/Priority Byte Offset 63 " hexmask.long.byte 0x00 16.--23. 1. " INTID62 ,Interrupt ID62 Priority/Priority Byte Offset 62 " hexmask.long.byte 0x00 8.--15. 1. " INTID61 ,Interrupt ID61 Priority/Priority Byte Offset 61 " hexmask.long.byte 0x00 0.--7. 1. " INTID60 ,Interrupt ID60 Priority/Priority Byte Offset 60 " else rgroup.long 0x420++0x03 line.long 0x00 "GICD_IPRIORITYR8,Interrupt Priority Register 8" rgroup.long 0x424++0x03 line.long 0x00 "GICD_IPRIORITYR9,Interrupt Priority Register 9" rgroup.long 0x428++0x03 line.long 0x00 "GICD_IPRIORITYR10,Interrupt Priority Register 10" rgroup.long 0x42C++0x03 line.long 0x00 "GICD_IPRIORITYR11,Interrupt Priority Register 11" rgroup.long 0x430++0x03 line.long 0x00 "GICD_IPRIORITYR12,Interrupt Priority Register 12" rgroup.long 0x434++0x03 line.long 0x00 "GICD_IPRIORITYR13,Interrupt Priority Register 13" rgroup.long 0x438++0x03 line.long 0x00 "GICD_IPRIORITYR14,Interrupt Priority Register 14" rgroup.long 0x43C++0x03 line.long 0x00 "GICD_IPRIORITYR15,Interrupt Priority Register 15" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x02) group.long 0x440++0x03 line.long 0x00 "GICD_IPRIORITYR16,Interrupt Priority Register 16" hexmask.long.byte 0x00 24.--31. 1. " INTID67 ,Interrupt ID67 Priority/Priority Byte Offset 67 " hexmask.long.byte 0x00 16.--23. 1. " INTID66 ,Interrupt ID66 Priority/Priority Byte Offset 66 " hexmask.long.byte 0x00 8.--15. 1. " INTID65 ,Interrupt ID65 Priority/Priority Byte Offset 65 " hexmask.long.byte 0x00 0.--7. 1. " INTID64 ,Interrupt ID64 Priority/Priority Byte Offset 64 " group.long 0x444++0x03 line.long 0x00 "GICD_IPRIORITYR17,Interrupt Priority Register 17" hexmask.long.byte 0x00 24.--31. 1. " INTID71 ,Interrupt ID71 Priority/Priority Byte Offset 71 " hexmask.long.byte 0x00 16.--23. 1. " INTID70 ,Interrupt ID70 Priority/Priority Byte Offset 70 " hexmask.long.byte 0x00 8.--15. 1. " INTID69 ,Interrupt ID69 Priority/Priority Byte Offset 69 " hexmask.long.byte 0x00 0.--7. 1. " INTID68 ,Interrupt ID68 Priority/Priority Byte Offset 68 " group.long 0x448++0x03 line.long 0x00 "GICD_IPRIORITYR18,Interrupt Priority Register 18" hexmask.long.byte 0x00 24.--31. 1. " INTID75 ,Interrupt ID75 Priority/Priority Byte Offset 75 " hexmask.long.byte 0x00 16.--23. 1. " INTID74 ,Interrupt ID74 Priority/Priority Byte Offset 74 " hexmask.long.byte 0x00 8.--15. 1. " INTID73 ,Interrupt ID73 Priority/Priority Byte Offset 73 " hexmask.long.byte 0x00 0.--7. 1. " INTID72 ,Interrupt ID72 Priority/Priority Byte Offset 72 " group.long 0x44C++0x03 line.long 0x00 "GICD_IPRIORITYR19,Interrupt Priority Register 19" hexmask.long.byte 0x00 24.--31. 1. " INTID79 ,Interrupt ID79 Priority/Priority Byte Offset 79 " hexmask.long.byte 0x00 16.--23. 1. " INTID78 ,Interrupt ID78 Priority/Priority Byte Offset 78 " hexmask.long.byte 0x00 8.--15. 1. " INTID77 ,Interrupt ID77 Priority/Priority Byte Offset 77 " hexmask.long.byte 0x00 0.--7. 1. " INTID76 ,Interrupt ID76 Priority/Priority Byte Offset 76 " group.long 0x450++0x03 line.long 0x00 "GICD_IPRIORITYR20,Interrupt Priority Register 20" hexmask.long.byte 0x00 24.--31. 1. " INTID83 ,Interrupt ID83 Priority/Priority Byte Offset 83 " hexmask.long.byte 0x00 16.--23. 1. " INTID82 ,Interrupt ID82 Priority/Priority Byte Offset 82 " hexmask.long.byte 0x00 8.--15. 1. " INTID81 ,Interrupt ID81 Priority/Priority Byte Offset 81 " hexmask.long.byte 0x00 0.--7. 1. " INTID80 ,Interrupt ID80 Priority/Priority Byte Offset 80 " group.long 0x454++0x03 line.long 0x00 "GICD_IPRIORITYR21,Interrupt Priority Register 21" hexmask.long.byte 0x00 24.--31. 1. " INTID87 ,Interrupt ID87 Priority/Priority Byte Offset 87 " hexmask.long.byte 0x00 16.--23. 1. " INTID86 ,Interrupt ID86 Priority/Priority Byte Offset 86 " hexmask.long.byte 0x00 8.--15. 1. " INTID85 ,Interrupt ID85 Priority/Priority Byte Offset 85 " hexmask.long.byte 0x00 0.--7. 1. " INTID84 ,Interrupt ID84 Priority/Priority Byte Offset 84 " group.long 0x458++0x03 line.long 0x00 "GICD_IPRIORITYR22,Interrupt Priority Register 22" hexmask.long.byte 0x00 24.--31. 1. " INTID91 ,Interrupt ID91 Priority/Priority Byte Offset 91 " hexmask.long.byte 0x00 16.--23. 1. " INTID90 ,Interrupt ID90 Priority/Priority Byte Offset 90 " hexmask.long.byte 0x00 8.--15. 1. " INTID89 ,Interrupt ID89 Priority/Priority Byte Offset 89 " hexmask.long.byte 0x00 0.--7. 1. " INTID88 ,Interrupt ID88 Priority/Priority Byte Offset 88 " group.long 0x45C++0x03 line.long 0x00 "GICD_IPRIORITYR23,Interrupt Priority Register 23" hexmask.long.byte 0x00 24.--31. 1. " INTID95 ,Interrupt ID95 Priority/Priority Byte Offset 95 " hexmask.long.byte 0x00 16.--23. 1. " INTID94 ,Interrupt ID94 Priority/Priority Byte Offset 94 " hexmask.long.byte 0x00 8.--15. 1. " INTID93 ,Interrupt ID93 Priority/Priority Byte Offset 93 " hexmask.long.byte 0x00 0.--7. 1. " INTID92 ,Interrupt ID92 Priority/Priority Byte Offset 92 " else rgroup.long 0x440++0x03 line.long 0x00 "GICD_IPRIORITYR16,Interrupt Priority Register 16" rgroup.long 0x444++0x03 line.long 0x00 "GICD_IPRIORITYR17,Interrupt Priority Register 17" rgroup.long 0x448++0x03 line.long 0x00 "GICD_IPRIORITYR18,Interrupt Priority Register 18" rgroup.long 0x44C++0x03 line.long 0x00 "GICD_IPRIORITYR19,Interrupt Priority Register 19" rgroup.long 0x450++0x03 line.long 0x00 "GICD_IPRIORITYR20,Interrupt Priority Register 20" rgroup.long 0x454++0x03 line.long 0x00 "GICD_IPRIORITYR21,Interrupt Priority Register 21" rgroup.long 0x458++0x03 line.long 0x00 "GICD_IPRIORITYR22,Interrupt Priority Register 22" rgroup.long 0x45C++0x03 line.long 0x00 "GICD_IPRIORITYR23,Interrupt Priority Register 23" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x03) group.long 0x460++0x03 line.long 0x00 "GICD_IPRIORITYR24,Interrupt Priority Register 24" hexmask.long.byte 0x00 24.--31. 1. " INTID99 ,Interrupt ID99 Priority/Priority Byte Offset 99 " hexmask.long.byte 0x00 16.--23. 1. " INTID98 ,Interrupt ID98 Priority/Priority Byte Offset 98 " hexmask.long.byte 0x00 8.--15. 1. " INTID97 ,Interrupt ID97 Priority/Priority Byte Offset 97 " hexmask.long.byte 0x00 0.--7. 1. " INTID96 ,Interrupt ID96 Priority/Priority Byte Offset 96 " group.long 0x464++0x03 line.long 0x00 "GICD_IPRIORITYR25,Interrupt Priority Register 25" hexmask.long.byte 0x00 24.--31. 1. " INTID103 ,Interrupt ID103 Priority/Priority Byte Offset 103 " hexmask.long.byte 0x00 16.--23. 1. " INTID102 ,Interrupt ID102 Priority/Priority Byte Offset 102 " hexmask.long.byte 0x00 8.--15. 1. " INTID101 ,Interrupt ID101 Priority/Priority Byte Offset 101 " hexmask.long.byte 0x00 0.--7. 1. " INTID100 ,Interrupt ID100 Priority/Priority Byte Offset 100 " group.long 0x468++0x03 line.long 0x00 "GICD_IPRIORITYR26,Interrupt Priority Register 26" hexmask.long.byte 0x00 24.--31. 1. " INTID107 ,Interrupt ID107 Priority/Priority Byte Offset 107 " hexmask.long.byte 0x00 16.--23. 1. " INTID106 ,Interrupt ID106 Priority/Priority Byte Offset 106 " hexmask.long.byte 0x00 8.--15. 1. " INTID105 ,Interrupt ID105 Priority/Priority Byte Offset 105 " hexmask.long.byte 0x00 0.--7. 1. " INTID104 ,Interrupt ID104 Priority/Priority Byte Offset 104 " group.long 0x46C++0x03 line.long 0x00 "GICD_IPRIORITYR27,Interrupt Priority Register 27" hexmask.long.byte 0x00 24.--31. 1. " INTID111 ,Interrupt ID111 Priority/Priority Byte Offset 111 " hexmask.long.byte 0x00 16.--23. 1. " INTID110 ,Interrupt ID110 Priority/Priority Byte Offset 110 " hexmask.long.byte 0x00 8.--15. 1. " INTID109 ,Interrupt ID109 Priority/Priority Byte Offset 109 " hexmask.long.byte 0x00 0.--7. 1. " INTID108 ,Interrupt ID108 Priority/Priority Byte Offset 108 " group.long 0x470++0x03 line.long 0x00 "GICD_IPRIORITYR28,Interrupt Priority Register 28" hexmask.long.byte 0x00 24.--31. 1. " INTID115 ,Interrupt ID115 Priority/Priority Byte Offset 115 " hexmask.long.byte 0x00 16.--23. 1. " INTID114 ,Interrupt ID114 Priority/Priority Byte Offset 114 " hexmask.long.byte 0x00 8.--15. 1. " INTID113 ,Interrupt ID113 Priority/Priority Byte Offset 113 " hexmask.long.byte 0x00 0.--7. 1. " INTID112 ,Interrupt ID112 Priority/Priority Byte Offset 112 " group.long 0x474++0x03 line.long 0x00 "GICD_IPRIORITYR29,Interrupt Priority Register 29" hexmask.long.byte 0x00 24.--31. 1. " INTID119 ,Interrupt ID119 Priority/Priority Byte Offset 119 " hexmask.long.byte 0x00 16.--23. 1. " INTID118 ,Interrupt ID118 Priority/Priority Byte Offset 118 " hexmask.long.byte 0x00 8.--15. 1. " INTID117 ,Interrupt ID117 Priority/Priority Byte Offset 117 " hexmask.long.byte 0x00 0.--7. 1. " INTID116 ,Interrupt ID116 Priority/Priority Byte Offset 116 " group.long 0x478++0x03 line.long 0x00 "GICD_IPRIORITYR30,Interrupt Priority Register 30" hexmask.long.byte 0x00 24.--31. 1. " INTID123 ,Interrupt ID123 Priority/Priority Byte Offset 123 " hexmask.long.byte 0x00 16.--23. 1. " INTID122 ,Interrupt ID122 Priority/Priority Byte Offset 122 " hexmask.long.byte 0x00 8.--15. 1. " INTID121 ,Interrupt ID121 Priority/Priority Byte Offset 121 " hexmask.long.byte 0x00 0.--7. 1. " INTID120 ,Interrupt ID120 Priority/Priority Byte Offset 120 " group.long 0x47C++0x03 line.long 0x00 "GICD_IPRIORITYR31,Interrupt Priority Register 31" hexmask.long.byte 0x00 24.--31. 1. " INTID127 ,Interrupt ID127 Priority/Priority Byte Offset 127 " hexmask.long.byte 0x00 16.--23. 1. " INTID126 ,Interrupt ID126 Priority/Priority Byte Offset 126 " hexmask.long.byte 0x00 8.--15. 1. " INTID125 ,Interrupt ID125 Priority/Priority Byte Offset 125 " hexmask.long.byte 0x00 0.--7. 1. " INTID124 ,Interrupt ID124 Priority/Priority Byte Offset 124 " else rgroup.long 0x460++0x03 line.long 0x00 "GICD_IPRIORITYR24,Interrupt Priority Register 24" rgroup.long 0x464++0x03 line.long 0x00 "GICD_IPRIORITYR25,Interrupt Priority Register 25" rgroup.long 0x468++0x03 line.long 0x00 "GICD_IPRIORITYR26,Interrupt Priority Register 26" rgroup.long 0x46C++0x03 line.long 0x00 "GICD_IPRIORITYR27,Interrupt Priority Register 27" rgroup.long 0x470++0x03 line.long 0x00 "GICD_IPRIORITYR28,Interrupt Priority Register 28" rgroup.long 0x474++0x03 line.long 0x00 "GICD_IPRIORITYR29,Interrupt Priority Register 29" rgroup.long 0x478++0x03 line.long 0x00 "GICD_IPRIORITYR30,Interrupt Priority Register 30" rgroup.long 0x47C++0x03 line.long 0x00 "GICD_IPRIORITYR31,Interrupt Priority Register 31" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x04) group.long 0x480++0x03 line.long 0x00 "GICD_IPRIORITYR32,Interrupt Priority Register 32" hexmask.long.byte 0x00 24.--31. 1. " INTID131 ,Interrupt ID131 Priority/Priority Byte Offset 131 " hexmask.long.byte 0x00 16.--23. 1. " INTID130 ,Interrupt ID130 Priority/Priority Byte Offset 130 " hexmask.long.byte 0x00 8.--15. 1. " INTID129 ,Interrupt ID129 Priority/Priority Byte Offset 129 " hexmask.long.byte 0x00 0.--7. 1. " INTID128 ,Interrupt ID128 Priority/Priority Byte Offset 128 " group.long 0x484++0x03 line.long 0x00 "GICD_IPRIORITYR33,Interrupt Priority Register 33" hexmask.long.byte 0x00 24.--31. 1. " INTID135 ,Interrupt ID135 Priority/Priority Byte Offset 135 " hexmask.long.byte 0x00 16.--23. 1. " INTID134 ,Interrupt ID134 Priority/Priority Byte Offset 134 " hexmask.long.byte 0x00 8.--15. 1. " INTID133 ,Interrupt ID133 Priority/Priority Byte Offset 133 " hexmask.long.byte 0x00 0.--7. 1. " INTID132 ,Interrupt ID132 Priority/Priority Byte Offset 132 " group.long 0x488++0x03 line.long 0x00 "GICD_IPRIORITYR34,Interrupt Priority Register 34" hexmask.long.byte 0x00 24.--31. 1. " INTID139 ,Interrupt ID139 Priority/Priority Byte Offset 139 " hexmask.long.byte 0x00 16.--23. 1. " INTID138 ,Interrupt ID138 Priority/Priority Byte Offset 138 " hexmask.long.byte 0x00 8.--15. 1. " INTID137 ,Interrupt ID137 Priority/Priority Byte Offset 137 " hexmask.long.byte 0x00 0.--7. 1. " INTID136 ,Interrupt ID136 Priority/Priority Byte Offset 136 " group.long 0x48C++0x03 line.long 0x00 "GICD_IPRIORITYR35,Interrupt Priority Register 35" hexmask.long.byte 0x00 24.--31. 1. " INTID143 ,Interrupt ID143 Priority/Priority Byte Offset 143 " hexmask.long.byte 0x00 16.--23. 1. " INTID142 ,Interrupt ID142 Priority/Priority Byte Offset 142 " hexmask.long.byte 0x00 8.--15. 1. " INTID141 ,Interrupt ID141 Priority/Priority Byte Offset 141 " hexmask.long.byte 0x00 0.--7. 1. " INTID140 ,Interrupt ID140 Priority/Priority Byte Offset 140 " group.long 0x490++0x03 line.long 0x00 "GICD_IPRIORITYR36,Interrupt Priority Register 36" hexmask.long.byte 0x00 24.--31. 1. " INTID147 ,Interrupt ID147 Priority/Priority Byte Offset 147 " hexmask.long.byte 0x00 16.--23. 1. " INTID146 ,Interrupt ID146 Priority/Priority Byte Offset 146 " hexmask.long.byte 0x00 8.--15. 1. " INTID145 ,Interrupt ID145 Priority/Priority Byte Offset 145 " hexmask.long.byte 0x00 0.--7. 1. " INTID144 ,Interrupt ID144 Priority/Priority Byte Offset 144 " group.long 0x494++0x03 line.long 0x00 "GICD_IPRIORITYR37,Interrupt Priority Register 37" hexmask.long.byte 0x00 24.--31. 1. " INTID151 ,Interrupt ID151 Priority/Priority Byte Offset 151 " hexmask.long.byte 0x00 16.--23. 1. " INTID150 ,Interrupt ID150 Priority/Priority Byte Offset 150 " hexmask.long.byte 0x00 8.--15. 1. " INTID149 ,Interrupt ID149 Priority/Priority Byte Offset 149 " hexmask.long.byte 0x00 0.--7. 1. " INTID148 ,Interrupt ID148 Priority/Priority Byte Offset 148 " group.long 0x498++0x03 line.long 0x00 "GICD_IPRIORITYR38,Interrupt Priority Register 38" hexmask.long.byte 0x00 24.--31. 1. " INTID155 ,Interrupt ID155 Priority/Priority Byte Offset 155 " hexmask.long.byte 0x00 16.--23. 1. " INTID154 ,Interrupt ID154 Priority/Priority Byte Offset 154 " hexmask.long.byte 0x00 8.--15. 1. " INTID153 ,Interrupt ID153 Priority/Priority Byte Offset 153 " hexmask.long.byte 0x00 0.--7. 1. " INTID152 ,Interrupt ID152 Priority/Priority Byte Offset 152 " group.long 0x49C++0x03 line.long 0x00 "GICD_IPRIORITYR39,Interrupt Priority Register 39" hexmask.long.byte 0x00 24.--31. 1. " INTID159 ,Interrupt ID159 Priority/Priority Byte Offset 159 " hexmask.long.byte 0x00 16.--23. 1. " INTID158 ,Interrupt ID158 Priority/Priority Byte Offset 158 " hexmask.long.byte 0x00 8.--15. 1. " INTID157 ,Interrupt ID157 Priority/Priority Byte Offset 157 " hexmask.long.byte 0x00 0.--7. 1. " INTID156 ,Interrupt ID156 Priority/Priority Byte Offset 156 " else rgroup.long 0x480++0x03 line.long 0x00 "GICD_IPRIORITYR32,Interrupt Priority Register 32" rgroup.long 0x484++0x03 line.long 0x00 "GICD_IPRIORITYR33,Interrupt Priority Register 33" rgroup.long 0x488++0x03 line.long 0x00 "GICD_IPRIORITYR34,Interrupt Priority Register 34" rgroup.long 0x48C++0x03 line.long 0x00 "GICD_IPRIORITYR35,Interrupt Priority Register 35" rgroup.long 0x490++0x03 line.long 0x00 "GICD_IPRIORITYR36,Interrupt Priority Register 36" rgroup.long 0x494++0x03 line.long 0x00 "GICD_IPRIORITYR37,Interrupt Priority Register 37" rgroup.long 0x498++0x03 line.long 0x00 "GICD_IPRIORITYR38,Interrupt Priority Register 38" rgroup.long 0x49C++0x03 line.long 0x00 "GICD_IPRIORITYR39,Interrupt Priority Register 39" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x05) group.long 0x4A0++0x03 line.long 0x00 "GICD_IPRIORITYR40,Interrupt Priority Register 40" hexmask.long.byte 0x00 24.--31. 1. " INTID163 ,Interrupt ID163 Priority/Priority Byte Offset 163 " hexmask.long.byte 0x00 16.--23. 1. " INTID162 ,Interrupt ID162 Priority/Priority Byte Offset 162 " hexmask.long.byte 0x00 8.--15. 1. " INTID161 ,Interrupt ID161 Priority/Priority Byte Offset 161 " hexmask.long.byte 0x00 0.--7. 1. " INTID160 ,Interrupt ID160 Priority/Priority Byte Offset 160 " group.long 0x4A4++0x03 line.long 0x00 "GICD_IPRIORITYR41,Interrupt Priority Register 41" hexmask.long.byte 0x00 24.--31. 1. " INTID167 ,Interrupt ID167 Priority/Priority Byte Offset 167 " hexmask.long.byte 0x00 16.--23. 1. " INTID166 ,Interrupt ID166 Priority/Priority Byte Offset 166 " hexmask.long.byte 0x00 8.--15. 1. " INTID165 ,Interrupt ID165 Priority/Priority Byte Offset 165 " hexmask.long.byte 0x00 0.--7. 1. " INTID164 ,Interrupt ID164 Priority/Priority Byte Offset 164 " group.long 0x4A8++0x03 line.long 0x00 "GICD_IPRIORITYR42,Interrupt Priority Register 42" hexmask.long.byte 0x00 24.--31. 1. " INTID171 ,Interrupt ID171 Priority/Priority Byte Offset 171 " hexmask.long.byte 0x00 16.--23. 1. " INTID170 ,Interrupt ID170 Priority/Priority Byte Offset 170 " hexmask.long.byte 0x00 8.--15. 1. " INTID169 ,Interrupt ID169 Priority/Priority Byte Offset 169 " hexmask.long.byte 0x00 0.--7. 1. " INTID168 ,Interrupt ID168 Priority/Priority Byte Offset 168 " group.long 0x4AC++0x03 line.long 0x00 "GICD_IPRIORITYR43,Interrupt Priority Register 43" hexmask.long.byte 0x00 24.--31. 1. " INTID175 ,Interrupt ID175 Priority/Priority Byte Offset 175 " hexmask.long.byte 0x00 16.--23. 1. " INTID174 ,Interrupt ID174 Priority/Priority Byte Offset 174 " hexmask.long.byte 0x00 8.--15. 1. " INTID173 ,Interrupt ID173 Priority/Priority Byte Offset 173 " hexmask.long.byte 0x00 0.--7. 1. " INTID172 ,Interrupt ID172 Priority/Priority Byte Offset 172 " group.long 0x4B0++0x03 line.long 0x00 "GICD_IPRIORITYR44,Interrupt Priority Register 44" hexmask.long.byte 0x00 24.--31. 1. " INTID179 ,Interrupt ID179 Priority/Priority Byte Offset 179 " hexmask.long.byte 0x00 16.--23. 1. " INTID178 ,Interrupt ID178 Priority/Priority Byte Offset 178 " hexmask.long.byte 0x00 8.--15. 1. " INTID177 ,Interrupt ID177 Priority/Priority Byte Offset 177 " hexmask.long.byte 0x00 0.--7. 1. " INTID176 ,Interrupt ID176 Priority/Priority Byte Offset 176 " group.long 0x4B4++0x03 line.long 0x00 "GICD_IPRIORITYR45,Interrupt Priority Register 45" hexmask.long.byte 0x00 24.--31. 1. " INTID183 ,Interrupt ID183 Priority/Priority Byte Offset 183 " hexmask.long.byte 0x00 16.--23. 1. " INTID182 ,Interrupt ID182 Priority/Priority Byte Offset 182 " hexmask.long.byte 0x00 8.--15. 1. " INTID181 ,Interrupt ID181 Priority/Priority Byte Offset 181 " hexmask.long.byte 0x00 0.--7. 1. " INTID180 ,Interrupt ID180 Priority/Priority Byte Offset 180 " group.long 0x4B8++0x03 line.long 0x00 "GICD_IPRIORITYR46,Interrupt Priority Register 46" hexmask.long.byte 0x00 24.--31. 1. " INTID187 ,Interrupt ID187 Priority/Priority Byte Offset 187 " hexmask.long.byte 0x00 16.--23. 1. " INTID186 ,Interrupt ID186 Priority/Priority Byte Offset 186 " hexmask.long.byte 0x00 8.--15. 1. " INTID185 ,Interrupt ID185 Priority/Priority Byte Offset 185 " hexmask.long.byte 0x00 0.--7. 1. " INTID184 ,Interrupt ID184 Priority/Priority Byte Offset 184 " group.long 0x4BC++0x03 line.long 0x00 "GICD_IPRIORITYR47,Interrupt Priority Register 47" hexmask.long.byte 0x00 24.--31. 1. " INTID191 ,Interrupt ID191 Priority/Priority Byte Offset 191 " hexmask.long.byte 0x00 16.--23. 1. " INTID190 ,Interrupt ID190 Priority/Priority Byte Offset 190 " hexmask.long.byte 0x00 8.--15. 1. " INTID189 ,Interrupt ID189 Priority/Priority Byte Offset 189 " hexmask.long.byte 0x00 0.--7. 1. " INTID188 ,Interrupt ID188 Priority/Priority Byte Offset 188 " else rgroup.long 0x4A0++0x03 line.long 0x00 "GICD_IPRIORITYR40,Interrupt Priority Register 40" rgroup.long 0x4A4++0x03 line.long 0x00 "GICD_IPRIORITYR41,Interrupt Priority Register 41" rgroup.long 0x4A8++0x03 line.long 0x00 "GICD_IPRIORITYR42,Interrupt Priority Register 42" rgroup.long 0x4AC++0x03 line.long 0x00 "GICD_IPRIORITYR43,Interrupt Priority Register 43" rgroup.long 0x4B0++0x03 line.long 0x00 "GICD_IPRIORITYR44,Interrupt Priority Register 44" rgroup.long 0x4B4++0x03 line.long 0x00 "GICD_IPRIORITYR45,Interrupt Priority Register 45" rgroup.long 0x4B8++0x03 line.long 0x00 "GICD_IPRIORITYR46,Interrupt Priority Register 46" rgroup.long 0x4BC++0x03 line.long 0x00 "GICD_IPRIORITYR47,Interrupt Priority Register 47" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x06) group.long 0x4C0++0x03 line.long 0x00 "GICD_IPRIORITYR48,Interrupt Priority Register 48" hexmask.long.byte 0x00 24.--31. 1. " INTID195 ,Interrupt ID195 Priority/Priority Byte Offset 195 " hexmask.long.byte 0x00 16.--23. 1. " INTID194 ,Interrupt ID194 Priority/Priority Byte Offset 194 " hexmask.long.byte 0x00 8.--15. 1. " INTID193 ,Interrupt ID193 Priority/Priority Byte Offset 193 " hexmask.long.byte 0x00 0.--7. 1. " INTID192 ,Interrupt ID192 Priority/Priority Byte Offset 192 " group.long 0x4C4++0x03 line.long 0x00 "GICD_IPRIORITYR49,Interrupt Priority Register 49" hexmask.long.byte 0x00 24.--31. 1. " INTID199 ,Interrupt ID199 Priority/Priority Byte Offset 199 " hexmask.long.byte 0x00 16.--23. 1. " INTID198 ,Interrupt ID198 Priority/Priority Byte Offset 198 " hexmask.long.byte 0x00 8.--15. 1. " INTID197 ,Interrupt ID197 Priority/Priority Byte Offset 197 " hexmask.long.byte 0x00 0.--7. 1. " INTID196 ,Interrupt ID196 Priority/Priority Byte Offset 196 " group.long 0x4C8++0x03 line.long 0x00 "GICD_IPRIORITYR50,Interrupt Priority Register 50" hexmask.long.byte 0x00 24.--31. 1. " INTID203 ,Interrupt ID203 Priority/Priority Byte Offset 203 " hexmask.long.byte 0x00 16.--23. 1. " INTID202 ,Interrupt ID202 Priority/Priority Byte Offset 202 " hexmask.long.byte 0x00 8.--15. 1. " INTID201 ,Interrupt ID201 Priority/Priority Byte Offset 201 " hexmask.long.byte 0x00 0.--7. 1. " INTID200 ,Interrupt ID200 Priority/Priority Byte Offset 200 " group.long 0x4CC++0x03 line.long 0x00 "GICD_IPRIORITYR51,Interrupt Priority Register 51" hexmask.long.byte 0x00 24.--31. 1. " INTID207 ,Interrupt ID207 Priority/Priority Byte Offset 207 " hexmask.long.byte 0x00 16.--23. 1. " INTID206 ,Interrupt ID206 Priority/Priority Byte Offset 206 " hexmask.long.byte 0x00 8.--15. 1. " INTID205 ,Interrupt ID205 Priority/Priority Byte Offset 205 " hexmask.long.byte 0x00 0.--7. 1. " INTID204 ,Interrupt ID204 Priority/Priority Byte Offset 204 " group.long 0x4D0++0x03 line.long 0x00 "GICD_IPRIORITYR52,Interrupt Priority Register 52" hexmask.long.byte 0x00 24.--31. 1. " INTID211 ,Interrupt ID211 Priority/Priority Byte Offset 211 " hexmask.long.byte 0x00 16.--23. 1. " INTID210 ,Interrupt ID210 Priority/Priority Byte Offset 210 " hexmask.long.byte 0x00 8.--15. 1. " INTID209 ,Interrupt ID209 Priority/Priority Byte Offset 209 " hexmask.long.byte 0x00 0.--7. 1. " INTID208 ,Interrupt ID208 Priority/Priority Byte Offset 208 " group.long 0x4D4++0x03 line.long 0x00 "GICD_IPRIORITYR53,Interrupt Priority Register 53" hexmask.long.byte 0x00 24.--31. 1. " INTID215 ,Interrupt ID215 Priority/Priority Byte Offset 215 " hexmask.long.byte 0x00 16.--23. 1. " INTID214 ,Interrupt ID214 Priority/Priority Byte Offset 214 " hexmask.long.byte 0x00 8.--15. 1. " INTID213 ,Interrupt ID213 Priority/Priority Byte Offset 213 " hexmask.long.byte 0x00 0.--7. 1. " INTID212 ,Interrupt ID212 Priority/Priority Byte Offset 212 " group.long 0x4D8++0x03 line.long 0x00 "GICD_IPRIORITYR54,Interrupt Priority Register 54" hexmask.long.byte 0x00 24.--31. 1. " INTID219 ,Interrupt ID219 Priority/Priority Byte Offset 219 " hexmask.long.byte 0x00 16.--23. 1. " INTID218 ,Interrupt ID218 Priority/Priority Byte Offset 218 " hexmask.long.byte 0x00 8.--15. 1. " INTID217 ,Interrupt ID217 Priority/Priority Byte Offset 217 " hexmask.long.byte 0x00 0.--7. 1. " INTID216 ,Interrupt ID216 Priority/Priority Byte Offset 216 " group.long 0x4DC++0x03 line.long 0x00 "GICD_IPRIORITYR55,Interrupt Priority Register 55" hexmask.long.byte 0x00 24.--31. 1. " INTID223 ,Interrupt ID223 Priority/Priority Byte Offset 223 " hexmask.long.byte 0x00 16.--23. 1. " INTID222 ,Interrupt ID222 Priority/Priority Byte Offset 222 " hexmask.long.byte 0x00 8.--15. 1. " INTID221 ,Interrupt ID221 Priority/Priority Byte Offset 221 " hexmask.long.byte 0x00 0.--7. 1. " INTID220 ,Interrupt ID220 Priority/Priority Byte Offset 220 " else rgroup.long 0x4C0++0x03 line.long 0x00 "GICD_IPRIORITYR48,Interrupt Priority Register 48" rgroup.long 0x4C4++0x03 line.long 0x00 "GICD_IPRIORITYR49,Interrupt Priority Register 49" rgroup.long 0x4C8++0x03 line.long 0x00 "GICD_IPRIORITYR50,Interrupt Priority Register 50" rgroup.long 0x4CC++0x03 line.long 0x00 "GICD_IPRIORITYR51,Interrupt Priority Register 51" rgroup.long 0x4D0++0x03 line.long 0x00 "GICD_IPRIORITYR52,Interrupt Priority Register 52" rgroup.long 0x4D4++0x03 line.long 0x00 "GICD_IPRIORITYR53,Interrupt Priority Register 53" rgroup.long 0x4D8++0x03 line.long 0x00 "GICD_IPRIORITYR54,Interrupt Priority Register 54" rgroup.long 0x4DC++0x03 line.long 0x00 "GICD_IPRIORITYR55,Interrupt Priority Register 55" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x07) group.long 0x4E0++0x03 line.long 0x00 "GICD_IPRIORITYR56,Interrupt Priority Register 56" hexmask.long.byte 0x00 24.--31. 1. " INTID227 ,Interrupt ID227 Priority/Priority Byte Offset 227 " hexmask.long.byte 0x00 16.--23. 1. " INTID226 ,Interrupt ID226 Priority/Priority Byte Offset 226 " hexmask.long.byte 0x00 8.--15. 1. " INTID225 ,Interrupt ID225 Priority/Priority Byte Offset 225 " hexmask.long.byte 0x00 0.--7. 1. " INTID224 ,Interrupt ID224 Priority/Priority Byte Offset 224 " group.long 0x4E4++0x03 line.long 0x00 "GICD_IPRIORITYR57,Interrupt Priority Register 57" hexmask.long.byte 0x00 24.--31. 1. " INTID231 ,Interrupt ID231 Priority/Priority Byte Offset 231 " hexmask.long.byte 0x00 16.--23. 1. " INTID230 ,Interrupt ID230 Priority/Priority Byte Offset 230 " hexmask.long.byte 0x00 8.--15. 1. " INTID229 ,Interrupt ID229 Priority/Priority Byte Offset 229 " hexmask.long.byte 0x00 0.--7. 1. " INTID228 ,Interrupt ID228 Priority/Priority Byte Offset 228 " group.long 0x4E8++0x03 line.long 0x00 "GICD_IPRIORITYR58,Interrupt Priority Register 58" hexmask.long.byte 0x00 24.--31. 1. " INTID235 ,Interrupt ID235 Priority/Priority Byte Offset 235 " hexmask.long.byte 0x00 16.--23. 1. " INTID234 ,Interrupt ID234 Priority/Priority Byte Offset 234 " hexmask.long.byte 0x00 8.--15. 1. " INTID233 ,Interrupt ID233 Priority/Priority Byte Offset 233 " hexmask.long.byte 0x00 0.--7. 1. " INTID232 ,Interrupt ID232 Priority/Priority Byte Offset 232 " group.long 0x4EC++0x03 line.long 0x00 "GICD_IPRIORITYR59,Interrupt Priority Register 59" hexmask.long.byte 0x00 24.--31. 1. " INTID239 ,Interrupt ID239 Priority/Priority Byte Offset 239 " hexmask.long.byte 0x00 16.--23. 1. " INTID238 ,Interrupt ID238 Priority/Priority Byte Offset 238 " hexmask.long.byte 0x00 8.--15. 1. " INTID237 ,Interrupt ID237 Priority/Priority Byte Offset 237 " hexmask.long.byte 0x00 0.--7. 1. " INTID236 ,Interrupt ID236 Priority/Priority Byte Offset 236 " group.long 0x4F0++0x03 line.long 0x00 "GICD_IPRIORITYR60,Interrupt Priority Register 60" hexmask.long.byte 0x00 24.--31. 1. " INTID243 ,Interrupt ID243 Priority/Priority Byte Offset 243 " hexmask.long.byte 0x00 16.--23. 1. " INTID242 ,Interrupt ID242 Priority/Priority Byte Offset 242 " hexmask.long.byte 0x00 8.--15. 1. " INTID241 ,Interrupt ID241 Priority/Priority Byte Offset 241 " hexmask.long.byte 0x00 0.--7. 1. " INTID240 ,Interrupt ID240 Priority/Priority Byte Offset 240 " group.long 0x4F4++0x03 line.long 0x00 "GICD_IPRIORITYR61,Interrupt Priority Register 61" hexmask.long.byte 0x00 24.--31. 1. " INTID247 ,Interrupt ID247 Priority/Priority Byte Offset 247 " hexmask.long.byte 0x00 16.--23. 1. " INTID246 ,Interrupt ID246 Priority/Priority Byte Offset 246 " hexmask.long.byte 0x00 8.--15. 1. " INTID245 ,Interrupt ID245 Priority/Priority Byte Offset 245 " hexmask.long.byte 0x00 0.--7. 1. " INTID244 ,Interrupt ID244 Priority/Priority Byte Offset 244 " group.long 0x4F8++0x03 line.long 0x00 "GICD_IPRIORITYR62,Interrupt Priority Register 62" hexmask.long.byte 0x00 24.--31. 1. " INTID251 ,Interrupt ID251 Priority/Priority Byte Offset 251 " hexmask.long.byte 0x00 16.--23. 1. " INTID250 ,Interrupt ID250 Priority/Priority Byte Offset 250 " hexmask.long.byte 0x00 8.--15. 1. " INTID249 ,Interrupt ID249 Priority/Priority Byte Offset 249 " hexmask.long.byte 0x00 0.--7. 1. " INTID248 ,Interrupt ID248 Priority/Priority Byte Offset 248 " group.long 0x4FC++0x03 line.long 0x00 "GICD_IPRIORITYR63,Interrupt Priority Register 63" hexmask.long.byte 0x00 24.--31. 1. " INTID255 ,Interrupt ID255 Priority/Priority Byte Offset 255 " hexmask.long.byte 0x00 16.--23. 1. " INTID254 ,Interrupt ID254 Priority/Priority Byte Offset 254 " hexmask.long.byte 0x00 8.--15. 1. " INTID253 ,Interrupt ID253 Priority/Priority Byte Offset 253 " hexmask.long.byte 0x00 0.--7. 1. " INTID252 ,Interrupt ID252 Priority/Priority Byte Offset 252 " else rgroup.long 0x4E0++0x03 line.long 0x00 "GICD_IPRIORITYR56,Interrupt Priority Register 56" rgroup.long 0x4E4++0x03 line.long 0x00 "GICD_IPRIORITYR57,Interrupt Priority Register 57" rgroup.long 0x4E8++0x03 line.long 0x00 "GICD_IPRIORITYR58,Interrupt Priority Register 58" rgroup.long 0x4EC++0x03 line.long 0x00 "GICD_IPRIORITYR59,Interrupt Priority Register 59" rgroup.long 0x4F0++0x03 line.long 0x00 "GICD_IPRIORITYR60,Interrupt Priority Register 60" rgroup.long 0x4F4++0x03 line.long 0x00 "GICD_IPRIORITYR61,Interrupt Priority Register 61" rgroup.long 0x4F8++0x03 line.long 0x00 "GICD_IPRIORITYR62,Interrupt Priority Register 62" rgroup.long 0x4FC++0x03 line.long 0x00 "GICD_IPRIORITYR63,Interrupt Priority Register 63" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x08) group.long 0x500++0x03 line.long 0x00 "GICD_IPRIORITYR64,Interrupt Priority Register 64" hexmask.long.byte 0x00 24.--31. 1. " INTID259 ,Interrupt ID259 Priority/Priority Byte Offset 259 " hexmask.long.byte 0x00 16.--23. 1. " INTID258 ,Interrupt ID258 Priority/Priority Byte Offset 258 " hexmask.long.byte 0x00 8.--15. 1. " INTID257 ,Interrupt ID257 Priority/Priority Byte Offset 257 " hexmask.long.byte 0x00 0.--7. 1. " INTID256 ,Interrupt ID256 Priority/Priority Byte Offset 256 " group.long 0x504++0x03 line.long 0x00 "GICD_IPRIORITYR65,Interrupt Priority Register 65" hexmask.long.byte 0x00 24.--31. 1. " INTID263 ,Interrupt ID263 Priority/Priority Byte Offset 263 " hexmask.long.byte 0x00 16.--23. 1. " INTID262 ,Interrupt ID262 Priority/Priority Byte Offset 262 " hexmask.long.byte 0x00 8.--15. 1. " INTID261 ,Interrupt ID261 Priority/Priority Byte Offset 261 " hexmask.long.byte 0x00 0.--7. 1. " INTID260 ,Interrupt ID260 Priority/Priority Byte Offset 260 " group.long 0x508++0x03 line.long 0x00 "GICD_IPRIORITYR66,Interrupt Priority Register 66" hexmask.long.byte 0x00 24.--31. 1. " INTID267 ,Interrupt ID267 Priority/Priority Byte Offset 267 " hexmask.long.byte 0x00 16.--23. 1. " INTID266 ,Interrupt ID266 Priority/Priority Byte Offset 266 " hexmask.long.byte 0x00 8.--15. 1. " INTID265 ,Interrupt ID265 Priority/Priority Byte Offset 265 " hexmask.long.byte 0x00 0.--7. 1. " INTID264 ,Interrupt ID264 Priority/Priority Byte Offset 264 " group.long 0x50C++0x03 line.long 0x00 "GICD_IPRIORITYR67,Interrupt Priority Register 67" hexmask.long.byte 0x00 24.--31. 1. " INTID271 ,Interrupt ID271 Priority/Priority Byte Offset 271 " hexmask.long.byte 0x00 16.--23. 1. " INTID270 ,Interrupt ID270 Priority/Priority Byte Offset 270 " hexmask.long.byte 0x00 8.--15. 1. " INTID269 ,Interrupt ID269 Priority/Priority Byte Offset 269 " hexmask.long.byte 0x00 0.--7. 1. " INTID268 ,Interrupt ID268 Priority/Priority Byte Offset 268 " group.long 0x510++0x03 line.long 0x00 "GICD_IPRIORITYR68,Interrupt Priority Register 68" hexmask.long.byte 0x00 24.--31. 1. " INTID275 ,Interrupt ID275 Priority/Priority Byte Offset 275 " hexmask.long.byte 0x00 16.--23. 1. " INTID274 ,Interrupt ID274 Priority/Priority Byte Offset 274 " hexmask.long.byte 0x00 8.--15. 1. " INTID273 ,Interrupt ID273 Priority/Priority Byte Offset 273 " hexmask.long.byte 0x00 0.--7. 1. " INTID272 ,Interrupt ID272 Priority/Priority Byte Offset 272 " group.long 0x514++0x03 line.long 0x00 "GICD_IPRIORITYR69,Interrupt Priority Register 69" hexmask.long.byte 0x00 24.--31. 1. " INTID279 ,Interrupt ID279 Priority/Priority Byte Offset 279 " hexmask.long.byte 0x00 16.--23. 1. " INTID278 ,Interrupt ID278 Priority/Priority Byte Offset 278 " hexmask.long.byte 0x00 8.--15. 1. " INTID277 ,Interrupt ID277 Priority/Priority Byte Offset 277 " hexmask.long.byte 0x00 0.--7. 1. " INTID276 ,Interrupt ID276 Priority/Priority Byte Offset 276 " group.long 0x518++0x03 line.long 0x00 "GICD_IPRIORITYR70,Interrupt Priority Register 70" hexmask.long.byte 0x00 24.--31. 1. " INTID283 ,Interrupt ID283 Priority/Priority Byte Offset 283 " hexmask.long.byte 0x00 16.--23. 1. " INTID282 ,Interrupt ID282 Priority/Priority Byte Offset 282 " hexmask.long.byte 0x00 8.--15. 1. " INTID281 ,Interrupt ID281 Priority/Priority Byte Offset 281 " hexmask.long.byte 0x00 0.--7. 1. " INTID280 ,Interrupt ID280 Priority/Priority Byte Offset 280 " group.long 0x51C++0x03 line.long 0x00 "GICD_IPRIORITYR71,Interrupt Priority Register 71" hexmask.long.byte 0x00 24.--31. 1. " INTID287 ,Interrupt ID287 Priority/Priority Byte Offset 287 " hexmask.long.byte 0x00 16.--23. 1. " INTID286 ,Interrupt ID286 Priority/Priority Byte Offset 286 " hexmask.long.byte 0x00 8.--15. 1. " INTID285 ,Interrupt ID285 Priority/Priority Byte Offset 285 " hexmask.long.byte 0x00 0.--7. 1. " INTID284 ,Interrupt ID284 Priority/Priority Byte Offset 284 " else rgroup.long 0x500++0x03 line.long 0x00 "GICD_IPRIORITYR64,Interrupt Priority Register 64" rgroup.long 0x504++0x03 line.long 0x00 "GICD_IPRIORITYR65,Interrupt Priority Register 65" rgroup.long 0x508++0x03 line.long 0x00 "GICD_IPRIORITYR66,Interrupt Priority Register 66" rgroup.long 0x50C++0x03 line.long 0x00 "GICD_IPRIORITYR67,Interrupt Priority Register 67" rgroup.long 0x510++0x03 line.long 0x00 "GICD_IPRIORITYR68,Interrupt Priority Register 68" rgroup.long 0x514++0x03 line.long 0x00 "GICD_IPRIORITYR69,Interrupt Priority Register 69" rgroup.long 0x518++0x03 line.long 0x00 "GICD_IPRIORITYR70,Interrupt Priority Register 70" rgroup.long 0x51C++0x03 line.long 0x00 "GICD_IPRIORITYR71,Interrupt Priority Register 71" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x09) group.long 0x520++0x03 line.long 0x00 "GICD_IPRIORITYR72,Interrupt Priority Register 72" hexmask.long.byte 0x00 24.--31. 1. " INTID291 ,Interrupt ID291 Priority/Priority Byte Offset 291 " hexmask.long.byte 0x00 16.--23. 1. " INTID290 ,Interrupt ID290 Priority/Priority Byte Offset 290 " hexmask.long.byte 0x00 8.--15. 1. " INTID289 ,Interrupt ID289 Priority/Priority Byte Offset 289 " hexmask.long.byte 0x00 0.--7. 1. " INTID288 ,Interrupt ID288 Priority/Priority Byte Offset 288 " group.long 0x524++0x03 line.long 0x00 "GICD_IPRIORITYR73,Interrupt Priority Register 73" hexmask.long.byte 0x00 24.--31. 1. " INTID295 ,Interrupt ID295 Priority/Priority Byte Offset 295 " hexmask.long.byte 0x00 16.--23. 1. " INTID294 ,Interrupt ID294 Priority/Priority Byte Offset 294 " hexmask.long.byte 0x00 8.--15. 1. " INTID293 ,Interrupt ID293 Priority/Priority Byte Offset 293 " hexmask.long.byte 0x00 0.--7. 1. " INTID292 ,Interrupt ID292 Priority/Priority Byte Offset 292 " group.long 0x528++0x03 line.long 0x00 "GICD_IPRIORITYR74,Interrupt Priority Register 74" hexmask.long.byte 0x00 24.--31. 1. " INTID299 ,Interrupt ID299 Priority/Priority Byte Offset 299 " hexmask.long.byte 0x00 16.--23. 1. " INTID298 ,Interrupt ID298 Priority/Priority Byte Offset 298 " hexmask.long.byte 0x00 8.--15. 1. " INTID297 ,Interrupt ID297 Priority/Priority Byte Offset 297 " hexmask.long.byte 0x00 0.--7. 1. " INTID296 ,Interrupt ID296 Priority/Priority Byte Offset 296 " group.long 0x52C++0x03 line.long 0x00 "GICD_IPRIORITYR75,Interrupt Priority Register 75" hexmask.long.byte 0x00 24.--31. 1. " INTID303 ,Interrupt ID303 Priority/Priority Byte Offset 303 " hexmask.long.byte 0x00 16.--23. 1. " INTID302 ,Interrupt ID302 Priority/Priority Byte Offset 302 " hexmask.long.byte 0x00 8.--15. 1. " INTID301 ,Interrupt ID301 Priority/Priority Byte Offset 301 " hexmask.long.byte 0x00 0.--7. 1. " INTID300 ,Interrupt ID300 Priority/Priority Byte Offset 300 " group.long 0x530++0x03 line.long 0x00 "GICD_IPRIORITYR76,Interrupt Priority Register 76" hexmask.long.byte 0x00 24.--31. 1. " INTID307 ,Interrupt ID307 Priority/Priority Byte Offset 307 " hexmask.long.byte 0x00 16.--23. 1. " INTID306 ,Interrupt ID306 Priority/Priority Byte Offset 306 " hexmask.long.byte 0x00 8.--15. 1. " INTID305 ,Interrupt ID305 Priority/Priority Byte Offset 305 " hexmask.long.byte 0x00 0.--7. 1. " INTID304 ,Interrupt ID304 Priority/Priority Byte Offset 304 " group.long 0x534++0x03 line.long 0x00 "GICD_IPRIORITYR77,Interrupt Priority Register 77" hexmask.long.byte 0x00 24.--31. 1. " INTID311 ,Interrupt ID311 Priority/Priority Byte Offset 311 " hexmask.long.byte 0x00 16.--23. 1. " INTID310 ,Interrupt ID310 Priority/Priority Byte Offset 310 " hexmask.long.byte 0x00 8.--15. 1. " INTID309 ,Interrupt ID309 Priority/Priority Byte Offset 309 " hexmask.long.byte 0x00 0.--7. 1. " INTID308 ,Interrupt ID308 Priority/Priority Byte Offset 308 " group.long 0x538++0x03 line.long 0x00 "GICD_IPRIORITYR78,Interrupt Priority Register 78" hexmask.long.byte 0x00 24.--31. 1. " INTID315 ,Interrupt ID315 Priority/Priority Byte Offset 315 " hexmask.long.byte 0x00 16.--23. 1. " INTID314 ,Interrupt ID314 Priority/Priority Byte Offset 314 " hexmask.long.byte 0x00 8.--15. 1. " INTID313 ,Interrupt ID313 Priority/Priority Byte Offset 313 " hexmask.long.byte 0x00 0.--7. 1. " INTID312 ,Interrupt ID312 Priority/Priority Byte Offset 312 " group.long 0x53C++0x03 line.long 0x00 "GICD_IPRIORITYR79,Interrupt Priority Register 79" hexmask.long.byte 0x00 24.--31. 1. " INTID319 ,Interrupt ID319 Priority/Priority Byte Offset 319 " hexmask.long.byte 0x00 16.--23. 1. " INTID318 ,Interrupt ID318 Priority/Priority Byte Offset 318 " hexmask.long.byte 0x00 8.--15. 1. " INTID317 ,Interrupt ID317 Priority/Priority Byte Offset 317 " hexmask.long.byte 0x00 0.--7. 1. " INTID316 ,Interrupt ID316 Priority/Priority Byte Offset 316 " else rgroup.long 0x520++0x03 line.long 0x00 "GICD_IPRIORITYR72,Interrupt Priority Register 72" rgroup.long 0x524++0x03 line.long 0x00 "GICD_IPRIORITYR73,Interrupt Priority Register 73" rgroup.long 0x528++0x03 line.long 0x00 "GICD_IPRIORITYR74,Interrupt Priority Register 74" rgroup.long 0x52C++0x03 line.long 0x00 "GICD_IPRIORITYR75,Interrupt Priority Register 75" rgroup.long 0x530++0x03 line.long 0x00 "GICD_IPRIORITYR76,Interrupt Priority Register 76" rgroup.long 0x534++0x03 line.long 0x00 "GICD_IPRIORITYR77,Interrupt Priority Register 77" rgroup.long 0x538++0x03 line.long 0x00 "GICD_IPRIORITYR78,Interrupt Priority Register 78" rgroup.long 0x53C++0x03 line.long 0x00 "GICD_IPRIORITYR79,Interrupt Priority Register 79" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x0A) group.long 0x540++0x03 line.long 0x00 "GICD_IPRIORITYR80,Interrupt Priority Register 80" hexmask.long.byte 0x00 24.--31. 1. " INTID323 ,Interrupt ID323 Priority/Priority Byte Offset 323 " hexmask.long.byte 0x00 16.--23. 1. " INTID322 ,Interrupt ID322 Priority/Priority Byte Offset 322 " hexmask.long.byte 0x00 8.--15. 1. " INTID321 ,Interrupt ID321 Priority/Priority Byte Offset 321 " hexmask.long.byte 0x00 0.--7. 1. " INTID320 ,Interrupt ID320 Priority/Priority Byte Offset 320 " group.long 0x544++0x03 line.long 0x00 "GICD_IPRIORITYR81,Interrupt Priority Register 81" hexmask.long.byte 0x00 24.--31. 1. " INTID327 ,Interrupt ID327 Priority/Priority Byte Offset 327 " hexmask.long.byte 0x00 16.--23. 1. " INTID326 ,Interrupt ID326 Priority/Priority Byte Offset 326 " hexmask.long.byte 0x00 8.--15. 1. " INTID325 ,Interrupt ID325 Priority/Priority Byte Offset 325 " hexmask.long.byte 0x00 0.--7. 1. " INTID324 ,Interrupt ID324 Priority/Priority Byte Offset 324 " group.long 0x548++0x03 line.long 0x00 "GICD_IPRIORITYR82,Interrupt Priority Register 82" hexmask.long.byte 0x00 24.--31. 1. " INTID331 ,Interrupt ID331 Priority/Priority Byte Offset 331 " hexmask.long.byte 0x00 16.--23. 1. " INTID330 ,Interrupt ID330 Priority/Priority Byte Offset 330 " hexmask.long.byte 0x00 8.--15. 1. " INTID329 ,Interrupt ID329 Priority/Priority Byte Offset 329 " hexmask.long.byte 0x00 0.--7. 1. " INTID328 ,Interrupt ID328 Priority/Priority Byte Offset 328 " group.long 0x54C++0x03 line.long 0x00 "GICD_IPRIORITYR83,Interrupt Priority Register 83" hexmask.long.byte 0x00 24.--31. 1. " INTID335 ,Interrupt ID335 Priority/Priority Byte Offset 335 " hexmask.long.byte 0x00 16.--23. 1. " INTID334 ,Interrupt ID334 Priority/Priority Byte Offset 334 " hexmask.long.byte 0x00 8.--15. 1. " INTID333 ,Interrupt ID333 Priority/Priority Byte Offset 333 " hexmask.long.byte 0x00 0.--7. 1. " INTID332 ,Interrupt ID332 Priority/Priority Byte Offset 332 " group.long 0x550++0x03 line.long 0x00 "GICD_IPRIORITYR84,Interrupt Priority Register 84" hexmask.long.byte 0x00 24.--31. 1. " INTID339 ,Interrupt ID339 Priority/Priority Byte Offset 339 " hexmask.long.byte 0x00 16.--23. 1. " INTID338 ,Interrupt ID338 Priority/Priority Byte Offset 338 " hexmask.long.byte 0x00 8.--15. 1. " INTID337 ,Interrupt ID337 Priority/Priority Byte Offset 337 " hexmask.long.byte 0x00 0.--7. 1. " INTID336 ,Interrupt ID336 Priority/Priority Byte Offset 336 " group.long 0x554++0x03 line.long 0x00 "GICD_IPRIORITYR85,Interrupt Priority Register 85" hexmask.long.byte 0x00 24.--31. 1. " INTID343 ,Interrupt ID343 Priority/Priority Byte Offset 343 " hexmask.long.byte 0x00 16.--23. 1. " INTID342 ,Interrupt ID342 Priority/Priority Byte Offset 342 " hexmask.long.byte 0x00 8.--15. 1. " INTID341 ,Interrupt ID341 Priority/Priority Byte Offset 341 " hexmask.long.byte 0x00 0.--7. 1. " INTID340 ,Interrupt ID340 Priority/Priority Byte Offset 340 " group.long 0x558++0x03 line.long 0x00 "GICD_IPRIORITYR86,Interrupt Priority Register 86" hexmask.long.byte 0x00 24.--31. 1. " INTID347 ,Interrupt ID347 Priority/Priority Byte Offset 347 " hexmask.long.byte 0x00 16.--23. 1. " INTID346 ,Interrupt ID346 Priority/Priority Byte Offset 346 " hexmask.long.byte 0x00 8.--15. 1. " INTID345 ,Interrupt ID345 Priority/Priority Byte Offset 345 " hexmask.long.byte 0x00 0.--7. 1. " INTID344 ,Interrupt ID344 Priority/Priority Byte Offset 344 " group.long 0x55C++0x03 line.long 0x00 "GICD_IPRIORITYR87,Interrupt Priority Register 87" hexmask.long.byte 0x00 24.--31. 1. " INTID351 ,Interrupt ID351 Priority/Priority Byte Offset 351 " hexmask.long.byte 0x00 16.--23. 1. " INTID350 ,Interrupt ID350 Priority/Priority Byte Offset 350 " hexmask.long.byte 0x00 8.--15. 1. " INTID349 ,Interrupt ID349 Priority/Priority Byte Offset 349 " hexmask.long.byte 0x00 0.--7. 1. " INTID348 ,Interrupt ID348 Priority/Priority Byte Offset 348 " else rgroup.long 0x540++0x03 line.long 0x00 "GICD_IPRIORITYR80,Interrupt Priority Register 80" rgroup.long 0x544++0x03 line.long 0x00 "GICD_IPRIORITYR81,Interrupt Priority Register 81" rgroup.long 0x548++0x03 line.long 0x00 "GICD_IPRIORITYR82,Interrupt Priority Register 82" rgroup.long 0x54C++0x03 line.long 0x00 "GICD_IPRIORITYR83,Interrupt Priority Register 83" rgroup.long 0x550++0x03 line.long 0x00 "GICD_IPRIORITYR84,Interrupt Priority Register 84" rgroup.long 0x554++0x03 line.long 0x00 "GICD_IPRIORITYR85,Interrupt Priority Register 85" rgroup.long 0x558++0x03 line.long 0x00 "GICD_IPRIORITYR86,Interrupt Priority Register 86" rgroup.long 0x55C++0x03 line.long 0x00 "GICD_IPRIORITYR87,Interrupt Priority Register 87" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x0B) group.long 0x560++0x03 line.long 0x00 "GICD_IPRIORITYR88,Interrupt Priority Register 88" hexmask.long.byte 0x00 24.--31. 1. " INTID355 ,Interrupt ID355 Priority/Priority Byte Offset 355 " hexmask.long.byte 0x00 16.--23. 1. " INTID354 ,Interrupt ID354 Priority/Priority Byte Offset 354 " hexmask.long.byte 0x00 8.--15. 1. " INTID353 ,Interrupt ID353 Priority/Priority Byte Offset 353 " hexmask.long.byte 0x00 0.--7. 1. " INTID352 ,Interrupt ID352 Priority/Priority Byte Offset 352 " group.long 0x564++0x03 line.long 0x00 "GICD_IPRIORITYR89,Interrupt Priority Register 89" hexmask.long.byte 0x00 24.--31. 1. " INTID359 ,Interrupt ID359 Priority/Priority Byte Offset 359 " hexmask.long.byte 0x00 16.--23. 1. " INTID358 ,Interrupt ID358 Priority/Priority Byte Offset 358 " hexmask.long.byte 0x00 8.--15. 1. " INTID357 ,Interrupt ID357 Priority/Priority Byte Offset 357 " hexmask.long.byte 0x00 0.--7. 1. " INTID356 ,Interrupt ID356 Priority/Priority Byte Offset 356 " group.long 0x568++0x03 line.long 0x00 "GICD_IPRIORITYR90,Interrupt Priority Register 90" hexmask.long.byte 0x00 24.--31. 1. " INTID363 ,Interrupt ID363 Priority/Priority Byte Offset 363 " hexmask.long.byte 0x00 16.--23. 1. " INTID362 ,Interrupt ID362 Priority/Priority Byte Offset 362 " hexmask.long.byte 0x00 8.--15. 1. " INTID361 ,Interrupt ID361 Priority/Priority Byte Offset 361 " hexmask.long.byte 0x00 0.--7. 1. " INTID360 ,Interrupt ID360 Priority/Priority Byte Offset 360 " group.long 0x56C++0x03 line.long 0x00 "GICD_IPRIORITYR91,Interrupt Priority Register 91" hexmask.long.byte 0x00 24.--31. 1. " INTID367 ,Interrupt ID367 Priority/Priority Byte Offset 367 " hexmask.long.byte 0x00 16.--23. 1. " INTID366 ,Interrupt ID366 Priority/Priority Byte Offset 366 " hexmask.long.byte 0x00 8.--15. 1. " INTID365 ,Interrupt ID365 Priority/Priority Byte Offset 365 " hexmask.long.byte 0x00 0.--7. 1. " INTID364 ,Interrupt ID364 Priority/Priority Byte Offset 364 " group.long 0x570++0x03 line.long 0x00 "GICD_IPRIORITYR92,Interrupt Priority Register 92" hexmask.long.byte 0x00 24.--31. 1. " INTID371 ,Interrupt ID371 Priority/Priority Byte Offset 371 " hexmask.long.byte 0x00 16.--23. 1. " INTID370 ,Interrupt ID370 Priority/Priority Byte Offset 370 " hexmask.long.byte 0x00 8.--15. 1. " INTID369 ,Interrupt ID369 Priority/Priority Byte Offset 369 " hexmask.long.byte 0x00 0.--7. 1. " INTID368 ,Interrupt ID368 Priority/Priority Byte Offset 368 " group.long 0x574++0x03 line.long 0x00 "GICD_IPRIORITYR93,Interrupt Priority Register 93" hexmask.long.byte 0x00 24.--31. 1. " INTID375 ,Interrupt ID375 Priority/Priority Byte Offset 375 " hexmask.long.byte 0x00 16.--23. 1. " INTID374 ,Interrupt ID374 Priority/Priority Byte Offset 374 " hexmask.long.byte 0x00 8.--15. 1. " INTID373 ,Interrupt ID373 Priority/Priority Byte Offset 373 " hexmask.long.byte 0x00 0.--7. 1. " INTID372 ,Interrupt ID372 Priority/Priority Byte Offset 372 " group.long 0x578++0x03 line.long 0x00 "GICD_IPRIORITYR94,Interrupt Priority Register 94" hexmask.long.byte 0x00 24.--31. 1. " INTID379 ,Interrupt ID379 Priority/Priority Byte Offset 379 " hexmask.long.byte 0x00 16.--23. 1. " INTID378 ,Interrupt ID378 Priority/Priority Byte Offset 378 " hexmask.long.byte 0x00 8.--15. 1. " INTID377 ,Interrupt ID377 Priority/Priority Byte Offset 377 " hexmask.long.byte 0x00 0.--7. 1. " INTID376 ,Interrupt ID376 Priority/Priority Byte Offset 376 " group.long 0x57C++0x03 line.long 0x00 "GICD_IPRIORITYR95,Interrupt Priority Register 95" hexmask.long.byte 0x00 24.--31. 1. " INTID383 ,Interrupt ID383 Priority/Priority Byte Offset 383 " hexmask.long.byte 0x00 16.--23. 1. " INTID382 ,Interrupt ID382 Priority/Priority Byte Offset 382 " hexmask.long.byte 0x00 8.--15. 1. " INTID381 ,Interrupt ID381 Priority/Priority Byte Offset 381 " hexmask.long.byte 0x00 0.--7. 1. " INTID380 ,Interrupt ID380 Priority/Priority Byte Offset 380 " else rgroup.long 0x560++0x03 line.long 0x00 "GICD_IPRIORITYR88,Interrupt Priority Register 88" rgroup.long 0x564++0x03 line.long 0x00 "GICD_IPRIORITYR89,Interrupt Priority Register 89" rgroup.long 0x568++0x03 line.long 0x00 "GICD_IPRIORITYR90,Interrupt Priority Register 90" rgroup.long 0x56C++0x03 line.long 0x00 "GICD_IPRIORITYR91,Interrupt Priority Register 91" rgroup.long 0x570++0x03 line.long 0x00 "GICD_IPRIORITYR92,Interrupt Priority Register 92" rgroup.long 0x574++0x03 line.long 0x00 "GICD_IPRIORITYR93,Interrupt Priority Register 93" rgroup.long 0x578++0x03 line.long 0x00 "GICD_IPRIORITYR94,Interrupt Priority Register 94" rgroup.long 0x57C++0x03 line.long 0x00 "GICD_IPRIORITYR95,Interrupt Priority Register 95" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x0C) group.long 0x580++0x03 line.long 0x00 "GICD_IPRIORITYR96,Interrupt Priority Register 96" hexmask.long.byte 0x00 24.--31. 1. " INTID387 ,Interrupt ID387 Priority/Priority Byte Offset 387 " hexmask.long.byte 0x00 16.--23. 1. " INTID386 ,Interrupt ID386 Priority/Priority Byte Offset 386 " hexmask.long.byte 0x00 8.--15. 1. " INTID385 ,Interrupt ID385 Priority/Priority Byte Offset 385 " hexmask.long.byte 0x00 0.--7. 1. " INTID384 ,Interrupt ID384 Priority/Priority Byte Offset 384 " group.long 0x584++0x03 line.long 0x00 "GICD_IPRIORITYR97,Interrupt Priority Register 97" hexmask.long.byte 0x00 24.--31. 1. " INTID391 ,Interrupt ID391 Priority/Priority Byte Offset 391 " hexmask.long.byte 0x00 16.--23. 1. " INTID390 ,Interrupt ID390 Priority/Priority Byte Offset 390 " hexmask.long.byte 0x00 8.--15. 1. " INTID389 ,Interrupt ID389 Priority/Priority Byte Offset 389 " hexmask.long.byte 0x00 0.--7. 1. " INTID388 ,Interrupt ID388 Priority/Priority Byte Offset 388 " group.long 0x588++0x03 line.long 0x00 "GICD_IPRIORITYR98,Interrupt Priority Register 98" hexmask.long.byte 0x00 24.--31. 1. " INTID395 ,Interrupt ID395 Priority/Priority Byte Offset 395 " hexmask.long.byte 0x00 16.--23. 1. " INTID394 ,Interrupt ID394 Priority/Priority Byte Offset 394 " hexmask.long.byte 0x00 8.--15. 1. " INTID393 ,Interrupt ID393 Priority/Priority Byte Offset 393 " hexmask.long.byte 0x00 0.--7. 1. " INTID392 ,Interrupt ID392 Priority/Priority Byte Offset 392 " group.long 0x58C++0x03 line.long 0x00 "GICD_IPRIORITYR99,Interrupt Priority Register 99" hexmask.long.byte 0x00 24.--31. 1. " INTID399 ,Interrupt ID399 Priority/Priority Byte Offset 399 " hexmask.long.byte 0x00 16.--23. 1. " INTID398 ,Interrupt ID398 Priority/Priority Byte Offset 398 " hexmask.long.byte 0x00 8.--15. 1. " INTID397 ,Interrupt ID397 Priority/Priority Byte Offset 397 " hexmask.long.byte 0x00 0.--7. 1. " INTID396 ,Interrupt ID396 Priority/Priority Byte Offset 396 " group.long 0x590++0x03 line.long 0x00 "GICD_IPRIORITYR100,Interrupt Priority Register 100" hexmask.long.byte 0x00 24.--31. 1. " INTID403 ,Interrupt ID403 Priority/Priority Byte Offset 403 " hexmask.long.byte 0x00 16.--23. 1. " INTID402 ,Interrupt ID402 Priority/Priority Byte Offset 402 " hexmask.long.byte 0x00 8.--15. 1. " INTID401 ,Interrupt ID401 Priority/Priority Byte Offset 401 " hexmask.long.byte 0x00 0.--7. 1. " INTID400 ,Interrupt ID400 Priority/Priority Byte Offset 400 " group.long 0x594++0x03 line.long 0x00 "GICD_IPRIORITYR101,Interrupt Priority Register 101" hexmask.long.byte 0x00 24.--31. 1. " INTID407 ,Interrupt ID407 Priority/Priority Byte Offset 407 " hexmask.long.byte 0x00 16.--23. 1. " INTID406 ,Interrupt ID406 Priority/Priority Byte Offset 406 " hexmask.long.byte 0x00 8.--15. 1. " INTID405 ,Interrupt ID405 Priority/Priority Byte Offset 405 " hexmask.long.byte 0x00 0.--7. 1. " INTID404 ,Interrupt ID404 Priority/Priority Byte Offset 404 " group.long 0x598++0x03 line.long 0x00 "GICD_IPRIORITYR102,Interrupt Priority Register 102" hexmask.long.byte 0x00 24.--31. 1. " INTID411 ,Interrupt ID411 Priority/Priority Byte Offset 411 " hexmask.long.byte 0x00 16.--23. 1. " INTID410 ,Interrupt ID410 Priority/Priority Byte Offset 410 " hexmask.long.byte 0x00 8.--15. 1. " INTID409 ,Interrupt ID409 Priority/Priority Byte Offset 409 " hexmask.long.byte 0x00 0.--7. 1. " INTID408 ,Interrupt ID408 Priority/Priority Byte Offset 408 " group.long 0x59C++0x03 line.long 0x00 "GICD_IPRIORITYR103,Interrupt Priority Register 103" hexmask.long.byte 0x00 24.--31. 1. " INTID415 ,Interrupt ID415 Priority/Priority Byte Offset 415 " hexmask.long.byte 0x00 16.--23. 1. " INTID414 ,Interrupt ID414 Priority/Priority Byte Offset 414 " hexmask.long.byte 0x00 8.--15. 1. " INTID413 ,Interrupt ID413 Priority/Priority Byte Offset 413 " hexmask.long.byte 0x00 0.--7. 1. " INTID412 ,Interrupt ID412 Priority/Priority Byte Offset 412 " else rgroup.long 0x580++0x03 line.long 0x00 "GICD_IPRIORITYR96,Interrupt Priority Register 96" rgroup.long 0x584++0x03 line.long 0x00 "GICD_IPRIORITYR97,Interrupt Priority Register 97" rgroup.long 0x588++0x03 line.long 0x00 "GICD_IPRIORITYR98,Interrupt Priority Register 98" rgroup.long 0x58C++0x03 line.long 0x00 "GICD_IPRIORITYR99,Interrupt Priority Register 99" rgroup.long 0x590++0x03 line.long 0x00 "GICD_IPRIORITYR100,Interrupt Priority Register 100" rgroup.long 0x594++0x03 line.long 0x00 "GICD_IPRIORITYR101,Interrupt Priority Register 101" rgroup.long 0x598++0x03 line.long 0x00 "GICD_IPRIORITYR102,Interrupt Priority Register 102" rgroup.long 0x59C++0x03 line.long 0x00 "GICD_IPRIORITYR103,Interrupt Priority Register 103" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x0D) group.long 0x5A0++0x03 line.long 0x00 "GICD_IPRIORITYR104,Interrupt Priority Register 104" hexmask.long.byte 0x00 24.--31. 1. " INTID419 ,Interrupt ID419 Priority/Priority Byte Offset 419 " hexmask.long.byte 0x00 16.--23. 1. " INTID418 ,Interrupt ID418 Priority/Priority Byte Offset 418 " hexmask.long.byte 0x00 8.--15. 1. " INTID417 ,Interrupt ID417 Priority/Priority Byte Offset 417 " hexmask.long.byte 0x00 0.--7. 1. " INTID416 ,Interrupt ID416 Priority/Priority Byte Offset 416 " group.long 0x5A4++0x03 line.long 0x00 "GICD_IPRIORITYR105,Interrupt Priority Register 105" hexmask.long.byte 0x00 24.--31. 1. " INTID423 ,Interrupt ID423 Priority/Priority Byte Offset 423 " hexmask.long.byte 0x00 16.--23. 1. " INTID422 ,Interrupt ID422 Priority/Priority Byte Offset 422 " hexmask.long.byte 0x00 8.--15. 1. " INTID421 ,Interrupt ID421 Priority/Priority Byte Offset 421 " hexmask.long.byte 0x00 0.--7. 1. " INTID420 ,Interrupt ID420 Priority/Priority Byte Offset 420 " group.long 0x5A8++0x03 line.long 0x00 "GICD_IPRIORITYR106,Interrupt Priority Register 106" hexmask.long.byte 0x00 24.--31. 1. " INTID427 ,Interrupt ID427 Priority/Priority Byte Offset 427 " hexmask.long.byte 0x00 16.--23. 1. " INTID426 ,Interrupt ID426 Priority/Priority Byte Offset 426 " hexmask.long.byte 0x00 8.--15. 1. " INTID425 ,Interrupt ID425 Priority/Priority Byte Offset 425 " hexmask.long.byte 0x00 0.--7. 1. " INTID424 ,Interrupt ID424 Priority/Priority Byte Offset 424 " group.long 0x5AC++0x03 line.long 0x00 "GICD_IPRIORITYR107,Interrupt Priority Register 107" hexmask.long.byte 0x00 24.--31. 1. " INTID431 ,Interrupt ID431 Priority/Priority Byte Offset 431 " hexmask.long.byte 0x00 16.--23. 1. " INTID430 ,Interrupt ID430 Priority/Priority Byte Offset 430 " hexmask.long.byte 0x00 8.--15. 1. " INTID429 ,Interrupt ID429 Priority/Priority Byte Offset 429 " hexmask.long.byte 0x00 0.--7. 1. " INTID428 ,Interrupt ID428 Priority/Priority Byte Offset 428 " group.long 0x5B0++0x03 line.long 0x00 "GICD_IPRIORITYR108,Interrupt Priority Register 108" hexmask.long.byte 0x00 24.--31. 1. " INTID435 ,Interrupt ID435 Priority/Priority Byte Offset 435 " hexmask.long.byte 0x00 16.--23. 1. " INTID434 ,Interrupt ID434 Priority/Priority Byte Offset 434 " hexmask.long.byte 0x00 8.--15. 1. " INTID433 ,Interrupt ID433 Priority/Priority Byte Offset 433 " hexmask.long.byte 0x00 0.--7. 1. " INTID432 ,Interrupt ID432 Priority/Priority Byte Offset 432 " group.long 0x5B4++0x03 line.long 0x00 "GICD_IPRIORITYR109,Interrupt Priority Register 109" hexmask.long.byte 0x00 24.--31. 1. " INTID439 ,Interrupt ID439 Priority/Priority Byte Offset 439 " hexmask.long.byte 0x00 16.--23. 1. " INTID438 ,Interrupt ID438 Priority/Priority Byte Offset 438 " hexmask.long.byte 0x00 8.--15. 1. " INTID437 ,Interrupt ID437 Priority/Priority Byte Offset 437 " hexmask.long.byte 0x00 0.--7. 1. " INTID436 ,Interrupt ID436 Priority/Priority Byte Offset 436 " group.long 0x5B8++0x03 line.long 0x00 "GICD_IPRIORITYR110,Interrupt Priority Register 110" hexmask.long.byte 0x00 24.--31. 1. " INTID443 ,Interrupt ID443 Priority/Priority Byte Offset 443 " hexmask.long.byte 0x00 16.--23. 1. " INTID442 ,Interrupt ID442 Priority/Priority Byte Offset 442 " hexmask.long.byte 0x00 8.--15. 1. " INTID441 ,Interrupt ID441 Priority/Priority Byte Offset 441 " hexmask.long.byte 0x00 0.--7. 1. " INTID440 ,Interrupt ID440 Priority/Priority Byte Offset 440 " group.long 0x5BC++0x03 line.long 0x00 "GICD_IPRIORITYR111,Interrupt Priority Register 111" hexmask.long.byte 0x00 24.--31. 1. " INTID447 ,Interrupt ID447 Priority/Priority Byte Offset 447 " hexmask.long.byte 0x00 16.--23. 1. " INTID446 ,Interrupt ID446 Priority/Priority Byte Offset 446 " hexmask.long.byte 0x00 8.--15. 1. " INTID445 ,Interrupt ID445 Priority/Priority Byte Offset 445 " hexmask.long.byte 0x00 0.--7. 1. " INTID444 ,Interrupt ID444 Priority/Priority Byte Offset 444 " else rgroup.long 0x5A0++0x03 line.long 0x00 "GICD_IPRIORITYR104,Interrupt Priority Register 104" rgroup.long 0x5A4++0x03 line.long 0x00 "GICD_IPRIORITYR105,Interrupt Priority Register 105" rgroup.long 0x5A8++0x03 line.long 0x00 "GICD_IPRIORITYR106,Interrupt Priority Register 106" rgroup.long 0x5AC++0x03 line.long 0x00 "GICD_IPRIORITYR107,Interrupt Priority Register 107" rgroup.long 0x5B0++0x03 line.long 0x00 "GICD_IPRIORITYR108,Interrupt Priority Register 108" rgroup.long 0x5B4++0x03 line.long 0x00 "GICD_IPRIORITYR109,Interrupt Priority Register 109" rgroup.long 0x5B8++0x03 line.long 0x00 "GICD_IPRIORITYR110,Interrupt Priority Register 110" rgroup.long 0x5BC++0x03 line.long 0x00 "GICD_IPRIORITYR111,Interrupt Priority Register 111" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x0E) group.long 0x5C0++0x03 line.long 0x00 "GICD_IPRIORITYR112,Interrupt Priority Register 112" hexmask.long.byte 0x00 24.--31. 1. " INTID451 ,Interrupt ID451 Priority/Priority Byte Offset 451 " hexmask.long.byte 0x00 16.--23. 1. " INTID450 ,Interrupt ID450 Priority/Priority Byte Offset 450 " hexmask.long.byte 0x00 8.--15. 1. " INTID449 ,Interrupt ID449 Priority/Priority Byte Offset 449 " hexmask.long.byte 0x00 0.--7. 1. " INTID448 ,Interrupt ID448 Priority/Priority Byte Offset 448 " group.long 0x5C4++0x03 line.long 0x00 "GICD_IPRIORITYR113,Interrupt Priority Register 113" hexmask.long.byte 0x00 24.--31. 1. " INTID455 ,Interrupt ID455 Priority/Priority Byte Offset 455 " hexmask.long.byte 0x00 16.--23. 1. " INTID454 ,Interrupt ID454 Priority/Priority Byte Offset 454 " hexmask.long.byte 0x00 8.--15. 1. " INTID453 ,Interrupt ID453 Priority/Priority Byte Offset 453 " hexmask.long.byte 0x00 0.--7. 1. " INTID452 ,Interrupt ID452 Priority/Priority Byte Offset 452 " group.long 0x5C8++0x03 line.long 0x00 "GICD_IPRIORITYR114,Interrupt Priority Register 114" hexmask.long.byte 0x00 24.--31. 1. " INTID459 ,Interrupt ID459 Priority/Priority Byte Offset 459 " hexmask.long.byte 0x00 16.--23. 1. " INTID458 ,Interrupt ID458 Priority/Priority Byte Offset 458 " hexmask.long.byte 0x00 8.--15. 1. " INTID457 ,Interrupt ID457 Priority/Priority Byte Offset 457 " hexmask.long.byte 0x00 0.--7. 1. " INTID456 ,Interrupt ID456 Priority/Priority Byte Offset 456 " group.long 0x5CC++0x03 line.long 0x00 "GICD_IPRIORITYR115,Interrupt Priority Register 115" hexmask.long.byte 0x00 24.--31. 1. " INTID463 ,Interrupt ID463 Priority/Priority Byte Offset 463 " hexmask.long.byte 0x00 16.--23. 1. " INTID462 ,Interrupt ID462 Priority/Priority Byte Offset 462 " hexmask.long.byte 0x00 8.--15. 1. " INTID461 ,Interrupt ID461 Priority/Priority Byte Offset 461 " hexmask.long.byte 0x00 0.--7. 1. " INTID460 ,Interrupt ID460 Priority/Priority Byte Offset 460 " group.long 0x5D0++0x03 line.long 0x00 "GICD_IPRIORITYR116,Interrupt Priority Register 116" hexmask.long.byte 0x00 24.--31. 1. " INTID467 ,Interrupt ID467 Priority/Priority Byte Offset 467 " hexmask.long.byte 0x00 16.--23. 1. " INTID466 ,Interrupt ID466 Priority/Priority Byte Offset 466 " hexmask.long.byte 0x00 8.--15. 1. " INTID465 ,Interrupt ID465 Priority/Priority Byte Offset 465 " hexmask.long.byte 0x00 0.--7. 1. " INTID464 ,Interrupt ID464 Priority/Priority Byte Offset 464 " group.long 0x5D4++0x03 line.long 0x00 "GICD_IPRIORITYR117,Interrupt Priority Register 117" hexmask.long.byte 0x00 24.--31. 1. " INTID471 ,Interrupt ID471 Priority/Priority Byte Offset 471 " hexmask.long.byte 0x00 16.--23. 1. " INTID470 ,Interrupt ID470 Priority/Priority Byte Offset 470 " hexmask.long.byte 0x00 8.--15. 1. " INTID469 ,Interrupt ID469 Priority/Priority Byte Offset 469 " hexmask.long.byte 0x00 0.--7. 1. " INTID468 ,Interrupt ID468 Priority/Priority Byte Offset 468 " group.long 0x5D8++0x03 line.long 0x00 "GICD_IPRIORITYR118,Interrupt Priority Register 118" hexmask.long.byte 0x00 24.--31. 1. " INTID475 ,Interrupt ID475 Priority/Priority Byte Offset 475 " hexmask.long.byte 0x00 16.--23. 1. " INTID474 ,Interrupt ID474 Priority/Priority Byte Offset 474 " hexmask.long.byte 0x00 8.--15. 1. " INTID473 ,Interrupt ID473 Priority/Priority Byte Offset 473 " hexmask.long.byte 0x00 0.--7. 1. " INTID472 ,Interrupt ID472 Priority/Priority Byte Offset 472 " group.long 0x5DC++0x03 line.long 0x00 "GICD_IPRIORITYR119,Interrupt Priority Register 119" hexmask.long.byte 0x00 24.--31. 1. " INTID479 ,Interrupt ID479 Priority/Priority Byte Offset 479 " hexmask.long.byte 0x00 16.--23. 1. " INTID478 ,Interrupt ID478 Priority/Priority Byte Offset 478 " hexmask.long.byte 0x00 8.--15. 1. " INTID477 ,Interrupt ID477 Priority/Priority Byte Offset 477 " hexmask.long.byte 0x00 0.--7. 1. " INTID476 ,Interrupt ID476 Priority/Priority Byte Offset 476 " else rgroup.long 0x5C0++0x03 line.long 0x00 "GICD_IPRIORITYR112,Interrupt Priority Register 112" rgroup.long 0x5C4++0x03 line.long 0x00 "GICD_IPRIORITYR113,Interrupt Priority Register 113" rgroup.long 0x5C8++0x03 line.long 0x00 "GICD_IPRIORITYR114,Interrupt Priority Register 114" rgroup.long 0x5CC++0x03 line.long 0x00 "GICD_IPRIORITYR115,Interrupt Priority Register 115" rgroup.long 0x5D0++0x03 line.long 0x00 "GICD_IPRIORITYR116,Interrupt Priority Register 116" rgroup.long 0x5D4++0x03 line.long 0x00 "GICD_IPRIORITYR117,Interrupt Priority Register 117" rgroup.long 0x5D8++0x03 line.long 0x00 "GICD_IPRIORITYR118,Interrupt Priority Register 118" rgroup.long 0x5DC++0x03 line.long 0x00 "GICD_IPRIORITYR119,Interrupt Priority Register 119" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x0F) group.long 0x5E0++0x03 line.long 0x00 "GICD_IPRIORITYR120,Interrupt Priority Register 120" hexmask.long.byte 0x00 24.--31. 1. " INTID483 ,Interrupt ID483 Priority/Priority Byte Offset 483 " hexmask.long.byte 0x00 16.--23. 1. " INTID482 ,Interrupt ID482 Priority/Priority Byte Offset 482 " hexmask.long.byte 0x00 8.--15. 1. " INTID481 ,Interrupt ID481 Priority/Priority Byte Offset 481 " hexmask.long.byte 0x00 0.--7. 1. " INTID480 ,Interrupt ID480 Priority/Priority Byte Offset 480 " group.long 0x5E4++0x03 line.long 0x00 "GICD_IPRIORITYR121,Interrupt Priority Register 121" hexmask.long.byte 0x00 24.--31. 1. " INTID487 ,Interrupt ID487 Priority/Priority Byte Offset 487 " hexmask.long.byte 0x00 16.--23. 1. " INTID486 ,Interrupt ID486 Priority/Priority Byte Offset 486 " hexmask.long.byte 0x00 8.--15. 1. " INTID485 ,Interrupt ID485 Priority/Priority Byte Offset 485 " hexmask.long.byte 0x00 0.--7. 1. " INTID484 ,Interrupt ID484 Priority/Priority Byte Offset 484 " group.long 0x5E8++0x03 line.long 0x00 "GICD_IPRIORITYR122,Interrupt Priority Register 122" hexmask.long.byte 0x00 24.--31. 1. " INTID491 ,Interrupt ID491 Priority/Priority Byte Offset 491 " hexmask.long.byte 0x00 16.--23. 1. " INTID490 ,Interrupt ID490 Priority/Priority Byte Offset 490 " hexmask.long.byte 0x00 8.--15. 1. " INTID489 ,Interrupt ID489 Priority/Priority Byte Offset 489 " hexmask.long.byte 0x00 0.--7. 1. " INTID488 ,Interrupt ID488 Priority/Priority Byte Offset 488 " group.long 0x5EC++0x03 line.long 0x00 "GICD_IPRIORITYR123,Interrupt Priority Register 123" hexmask.long.byte 0x00 24.--31. 1. " INTID495 ,Interrupt ID495 Priority/Priority Byte Offset 495 " hexmask.long.byte 0x00 16.--23. 1. " INTID494 ,Interrupt ID494 Priority/Priority Byte Offset 494 " hexmask.long.byte 0x00 8.--15. 1. " INTID493 ,Interrupt ID493 Priority/Priority Byte Offset 493 " hexmask.long.byte 0x00 0.--7. 1. " INTID492 ,Interrupt ID492 Priority/Priority Byte Offset 492 " group.long 0x5F0++0x03 line.long 0x00 "GICD_IPRIORITYR124,Interrupt Priority Register 124" hexmask.long.byte 0x00 24.--31. 1. " INTID499 ,Interrupt ID499 Priority/Priority Byte Offset 499 " hexmask.long.byte 0x00 16.--23. 1. " INTID498 ,Interrupt ID498 Priority/Priority Byte Offset 498 " hexmask.long.byte 0x00 8.--15. 1. " INTID497 ,Interrupt ID497 Priority/Priority Byte Offset 497 " hexmask.long.byte 0x00 0.--7. 1. " INTID496 ,Interrupt ID496 Priority/Priority Byte Offset 496 " group.long 0x5F4++0x03 line.long 0x00 "GICD_IPRIORITYR125,Interrupt Priority Register 125" hexmask.long.byte 0x00 24.--31. 1. " INTID503 ,Interrupt ID503 Priority/Priority Byte Offset 503 " hexmask.long.byte 0x00 16.--23. 1. " INTID502 ,Interrupt ID502 Priority/Priority Byte Offset 502 " hexmask.long.byte 0x00 8.--15. 1. " INTID501 ,Interrupt ID501 Priority/Priority Byte Offset 501 " hexmask.long.byte 0x00 0.--7. 1. " INTID500 ,Interrupt ID500 Priority/Priority Byte Offset 500 " group.long 0x5F8++0x03 line.long 0x00 "GICD_IPRIORITYR126,Interrupt Priority Register 126" hexmask.long.byte 0x00 24.--31. 1. " INTID507 ,Interrupt ID507 Priority/Priority Byte Offset 507 " hexmask.long.byte 0x00 16.--23. 1. " INTID506 ,Interrupt ID506 Priority/Priority Byte Offset 506 " hexmask.long.byte 0x00 8.--15. 1. " INTID505 ,Interrupt ID505 Priority/Priority Byte Offset 505 " hexmask.long.byte 0x00 0.--7. 1. " INTID504 ,Interrupt ID504 Priority/Priority Byte Offset 504 " group.long 0x5FC++0x03 line.long 0x00 "GICD_IPRIORITYR127,Interrupt Priority Register 127" hexmask.long.byte 0x00 24.--31. 1. " INTID511 ,Interrupt ID511 Priority/Priority Byte Offset 511 " hexmask.long.byte 0x00 16.--23. 1. " INTID510 ,Interrupt ID510 Priority/Priority Byte Offset 510 " hexmask.long.byte 0x00 8.--15. 1. " INTID509 ,Interrupt ID509 Priority/Priority Byte Offset 509 " hexmask.long.byte 0x00 0.--7. 1. " INTID508 ,Interrupt ID508 Priority/Priority Byte Offset 508 " else rgroup.long 0x5E0++0x03 line.long 0x00 "GICD_IPRIORITYR120,Interrupt Priority Register 120" rgroup.long 0x5E4++0x03 line.long 0x00 "GICD_IPRIORITYR121,Interrupt Priority Register 121" rgroup.long 0x5E8++0x03 line.long 0x00 "GICD_IPRIORITYR122,Interrupt Priority Register 122" rgroup.long 0x5EC++0x03 line.long 0x00 "GICD_IPRIORITYR123,Interrupt Priority Register 123" rgroup.long 0x5F0++0x03 line.long 0x00 "GICD_IPRIORITYR124,Interrupt Priority Register 124" rgroup.long 0x5F4++0x03 line.long 0x00 "GICD_IPRIORITYR125,Interrupt Priority Register 125" rgroup.long 0x5F8++0x03 line.long 0x00 "GICD_IPRIORITYR126,Interrupt Priority Register 126" rgroup.long 0x5FC++0x03 line.long 0x00 "GICD_IPRIORITYR127,Interrupt Priority Register 127" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x10) group.long 0x600++0x03 line.long 0x00 "GICD_IPRIORITYR128,Interrupt Priority Register 128" hexmask.long.byte 0x00 24.--31. 1. " INTID515 ,Interrupt ID515 Priority/Priority Byte Offset 515 " hexmask.long.byte 0x00 16.--23. 1. " INTID514 ,Interrupt ID514 Priority/Priority Byte Offset 514 " hexmask.long.byte 0x00 8.--15. 1. " INTID513 ,Interrupt ID513 Priority/Priority Byte Offset 513 " hexmask.long.byte 0x00 0.--7. 1. " INTID512 ,Interrupt ID512 Priority/Priority Byte Offset 512 " group.long 0x604++0x03 line.long 0x00 "GICD_IPRIORITYR129,Interrupt Priority Register 129" hexmask.long.byte 0x00 24.--31. 1. " INTID519 ,Interrupt ID519 Priority/Priority Byte Offset 519 " hexmask.long.byte 0x00 16.--23. 1. " INTID518 ,Interrupt ID518 Priority/Priority Byte Offset 518 " hexmask.long.byte 0x00 8.--15. 1. " INTID517 ,Interrupt ID517 Priority/Priority Byte Offset 517 " hexmask.long.byte 0x00 0.--7. 1. " INTID516 ,Interrupt ID516 Priority/Priority Byte Offset 516 " group.long 0x608++0x03 line.long 0x00 "GICD_IPRIORITYR130,Interrupt Priority Register 130" hexmask.long.byte 0x00 24.--31. 1. " INTID523 ,Interrupt ID523 Priority/Priority Byte Offset 523 " hexmask.long.byte 0x00 16.--23. 1. " INTID522 ,Interrupt ID522 Priority/Priority Byte Offset 522 " hexmask.long.byte 0x00 8.--15. 1. " INTID521 ,Interrupt ID521 Priority/Priority Byte Offset 521 " hexmask.long.byte 0x00 0.--7. 1. " INTID520 ,Interrupt ID520 Priority/Priority Byte Offset 520 " group.long 0x60C++0x03 line.long 0x00 "GICD_IPRIORITYR131,Interrupt Priority Register 131" hexmask.long.byte 0x00 24.--31. 1. " INTID527 ,Interrupt ID527 Priority/Priority Byte Offset 527 " hexmask.long.byte 0x00 16.--23. 1. " INTID526 ,Interrupt ID526 Priority/Priority Byte Offset 526 " hexmask.long.byte 0x00 8.--15. 1. " INTID525 ,Interrupt ID525 Priority/Priority Byte Offset 525 " hexmask.long.byte 0x00 0.--7. 1. " INTID524 ,Interrupt ID524 Priority/Priority Byte Offset 524 " group.long 0x610++0x03 line.long 0x00 "GICD_IPRIORITYR132,Interrupt Priority Register 132" hexmask.long.byte 0x00 24.--31. 1. " INTID531 ,Interrupt ID531 Priority/Priority Byte Offset 531 " hexmask.long.byte 0x00 16.--23. 1. " INTID530 ,Interrupt ID530 Priority/Priority Byte Offset 530 " hexmask.long.byte 0x00 8.--15. 1. " INTID529 ,Interrupt ID529 Priority/Priority Byte Offset 529 " hexmask.long.byte 0x00 0.--7. 1. " INTID528 ,Interrupt ID528 Priority/Priority Byte Offset 528 " group.long 0x614++0x03 line.long 0x00 "GICD_IPRIORITYR133,Interrupt Priority Register 133" hexmask.long.byte 0x00 24.--31. 1. " INTID535 ,Interrupt ID535 Priority/Priority Byte Offset 535 " hexmask.long.byte 0x00 16.--23. 1. " INTID534 ,Interrupt ID534 Priority/Priority Byte Offset 534 " hexmask.long.byte 0x00 8.--15. 1. " INTID533 ,Interrupt ID533 Priority/Priority Byte Offset 533 " hexmask.long.byte 0x00 0.--7. 1. " INTID532 ,Interrupt ID532 Priority/Priority Byte Offset 532 " group.long 0x618++0x03 line.long 0x00 "GICD_IPRIORITYR134,Interrupt Priority Register 134" hexmask.long.byte 0x00 24.--31. 1. " INTID539 ,Interrupt ID539 Priority/Priority Byte Offset 539 " hexmask.long.byte 0x00 16.--23. 1. " INTID538 ,Interrupt ID538 Priority/Priority Byte Offset 538 " hexmask.long.byte 0x00 8.--15. 1. " INTID537 ,Interrupt ID537 Priority/Priority Byte Offset 537 " hexmask.long.byte 0x00 0.--7. 1. " INTID536 ,Interrupt ID536 Priority/Priority Byte Offset 536 " group.long 0x61C++0x03 line.long 0x00 "GICD_IPRIORITYR135,Interrupt Priority Register 135" hexmask.long.byte 0x00 24.--31. 1. " INTID543 ,Interrupt ID543 Priority/Priority Byte Offset 543 " hexmask.long.byte 0x00 16.--23. 1. " INTID542 ,Interrupt ID542 Priority/Priority Byte Offset 542 " hexmask.long.byte 0x00 8.--15. 1. " INTID541 ,Interrupt ID541 Priority/Priority Byte Offset 541 " hexmask.long.byte 0x00 0.--7. 1. " INTID540 ,Interrupt ID540 Priority/Priority Byte Offset 540 " else rgroup.long 0x600++0x03 line.long 0x00 "GICD_IPRIORITYR128,Interrupt Priority Register 128" rgroup.long 0x604++0x03 line.long 0x00 "GICD_IPRIORITYR129,Interrupt Priority Register 129" rgroup.long 0x608++0x03 line.long 0x00 "GICD_IPRIORITYR130,Interrupt Priority Register 130" rgroup.long 0x60C++0x03 line.long 0x00 "GICD_IPRIORITYR131,Interrupt Priority Register 131" rgroup.long 0x610++0x03 line.long 0x00 "GICD_IPRIORITYR132,Interrupt Priority Register 132" rgroup.long 0x614++0x03 line.long 0x00 "GICD_IPRIORITYR133,Interrupt Priority Register 133" rgroup.long 0x618++0x03 line.long 0x00 "GICD_IPRIORITYR134,Interrupt Priority Register 134" rgroup.long 0x61C++0x03 line.long 0x00 "GICD_IPRIORITYR135,Interrupt Priority Register 135" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x11) group.long 0x620++0x03 line.long 0x00 "GICD_IPRIORITYR136,Interrupt Priority Register 136" hexmask.long.byte 0x00 24.--31. 1. " INTID547 ,Interrupt ID547 Priority/Priority Byte Offset 547 " hexmask.long.byte 0x00 16.--23. 1. " INTID546 ,Interrupt ID546 Priority/Priority Byte Offset 546 " hexmask.long.byte 0x00 8.--15. 1. " INTID545 ,Interrupt ID545 Priority/Priority Byte Offset 545 " hexmask.long.byte 0x00 0.--7. 1. " INTID544 ,Interrupt ID544 Priority/Priority Byte Offset 544 " group.long 0x624++0x03 line.long 0x00 "GICD_IPRIORITYR137,Interrupt Priority Register 137" hexmask.long.byte 0x00 24.--31. 1. " INTID551 ,Interrupt ID551 Priority/Priority Byte Offset 551 " hexmask.long.byte 0x00 16.--23. 1. " INTID550 ,Interrupt ID550 Priority/Priority Byte Offset 550 " hexmask.long.byte 0x00 8.--15. 1. " INTID549 ,Interrupt ID549 Priority/Priority Byte Offset 549 " hexmask.long.byte 0x00 0.--7. 1. " INTID548 ,Interrupt ID548 Priority/Priority Byte Offset 548 " group.long 0x628++0x03 line.long 0x00 "GICD_IPRIORITYR138,Interrupt Priority Register 138" hexmask.long.byte 0x00 24.--31. 1. " INTID555 ,Interrupt ID555 Priority/Priority Byte Offset 555 " hexmask.long.byte 0x00 16.--23. 1. " INTID554 ,Interrupt ID554 Priority/Priority Byte Offset 554 " hexmask.long.byte 0x00 8.--15. 1. " INTID553 ,Interrupt ID553 Priority/Priority Byte Offset 553 " hexmask.long.byte 0x00 0.--7. 1. " INTID552 ,Interrupt ID552 Priority/Priority Byte Offset 552 " group.long 0x62C++0x03 line.long 0x00 "GICD_IPRIORITYR139,Interrupt Priority Register 139" hexmask.long.byte 0x00 24.--31. 1. " INTID559 ,Interrupt ID559 Priority/Priority Byte Offset 559 " hexmask.long.byte 0x00 16.--23. 1. " INTID558 ,Interrupt ID558 Priority/Priority Byte Offset 558 " hexmask.long.byte 0x00 8.--15. 1. " INTID557 ,Interrupt ID557 Priority/Priority Byte Offset 557 " hexmask.long.byte 0x00 0.--7. 1. " INTID556 ,Interrupt ID556 Priority/Priority Byte Offset 556 " group.long 0x630++0x03 line.long 0x00 "GICD_IPRIORITYR140,Interrupt Priority Register 140" hexmask.long.byte 0x00 24.--31. 1. " INTID563 ,Interrupt ID563 Priority/Priority Byte Offset 563 " hexmask.long.byte 0x00 16.--23. 1. " INTID562 ,Interrupt ID562 Priority/Priority Byte Offset 562 " hexmask.long.byte 0x00 8.--15. 1. " INTID561 ,Interrupt ID561 Priority/Priority Byte Offset 561 " hexmask.long.byte 0x00 0.--7. 1. " INTID560 ,Interrupt ID560 Priority/Priority Byte Offset 560 " group.long 0x634++0x03 line.long 0x00 "GICD_IPRIORITYR141,Interrupt Priority Register 141" hexmask.long.byte 0x00 24.--31. 1. " INTID567 ,Interrupt ID567 Priority/Priority Byte Offset 567 " hexmask.long.byte 0x00 16.--23. 1. " INTID566 ,Interrupt ID566 Priority/Priority Byte Offset 566 " hexmask.long.byte 0x00 8.--15. 1. " INTID565 ,Interrupt ID565 Priority/Priority Byte Offset 565 " hexmask.long.byte 0x00 0.--7. 1. " INTID564 ,Interrupt ID564 Priority/Priority Byte Offset 564 " group.long 0x638++0x03 line.long 0x00 "GICD_IPRIORITYR142,Interrupt Priority Register 142" hexmask.long.byte 0x00 24.--31. 1. " INTID571 ,Interrupt ID571 Priority/Priority Byte Offset 571 " hexmask.long.byte 0x00 16.--23. 1. " INTID570 ,Interrupt ID570 Priority/Priority Byte Offset 570 " hexmask.long.byte 0x00 8.--15. 1. " INTID569 ,Interrupt ID569 Priority/Priority Byte Offset 569 " hexmask.long.byte 0x00 0.--7. 1. " INTID568 ,Interrupt ID568 Priority/Priority Byte Offset 568 " group.long 0x63C++0x03 line.long 0x00 "GICD_IPRIORITYR143,Interrupt Priority Register 143" hexmask.long.byte 0x00 24.--31. 1. " INTID575 ,Interrupt ID575 Priority/Priority Byte Offset 575 " hexmask.long.byte 0x00 16.--23. 1. " INTID574 ,Interrupt ID574 Priority/Priority Byte Offset 574 " hexmask.long.byte 0x00 8.--15. 1. " INTID573 ,Interrupt ID573 Priority/Priority Byte Offset 573 " hexmask.long.byte 0x00 0.--7. 1. " INTID572 ,Interrupt ID572 Priority/Priority Byte Offset 572 " else rgroup.long 0x620++0x03 line.long 0x00 "GICD_IPRIORITYR136,Interrupt Priority Register 136" rgroup.long 0x624++0x03 line.long 0x00 "GICD_IPRIORITYR137,Interrupt Priority Register 137" rgroup.long 0x628++0x03 line.long 0x00 "GICD_IPRIORITYR138,Interrupt Priority Register 138" rgroup.long 0x62C++0x03 line.long 0x00 "GICD_IPRIORITYR139,Interrupt Priority Register 139" rgroup.long 0x630++0x03 line.long 0x00 "GICD_IPRIORITYR140,Interrupt Priority Register 140" rgroup.long 0x634++0x03 line.long 0x00 "GICD_IPRIORITYR141,Interrupt Priority Register 141" rgroup.long 0x638++0x03 line.long 0x00 "GICD_IPRIORITYR142,Interrupt Priority Register 142" rgroup.long 0x63C++0x03 line.long 0x00 "GICD_IPRIORITYR143,Interrupt Priority Register 143" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x12) group.long 0x640++0x03 line.long 0x00 "GICD_IPRIORITYR144,Interrupt Priority Register 144" hexmask.long.byte 0x00 24.--31. 1. " INTID579 ,Interrupt ID579 Priority/Priority Byte Offset 579 " hexmask.long.byte 0x00 16.--23. 1. " INTID578 ,Interrupt ID578 Priority/Priority Byte Offset 578 " hexmask.long.byte 0x00 8.--15. 1. " INTID577 ,Interrupt ID577 Priority/Priority Byte Offset 577 " hexmask.long.byte 0x00 0.--7. 1. " INTID576 ,Interrupt ID576 Priority/Priority Byte Offset 576 " group.long 0x644++0x03 line.long 0x00 "GICD_IPRIORITYR145,Interrupt Priority Register 145" hexmask.long.byte 0x00 24.--31. 1. " INTID583 ,Interrupt ID583 Priority/Priority Byte Offset 583 " hexmask.long.byte 0x00 16.--23. 1. " INTID582 ,Interrupt ID582 Priority/Priority Byte Offset 582 " hexmask.long.byte 0x00 8.--15. 1. " INTID581 ,Interrupt ID581 Priority/Priority Byte Offset 581 " hexmask.long.byte 0x00 0.--7. 1. " INTID580 ,Interrupt ID580 Priority/Priority Byte Offset 580 " group.long 0x648++0x03 line.long 0x00 "GICD_IPRIORITYR146,Interrupt Priority Register 146" hexmask.long.byte 0x00 24.--31. 1. " INTID587 ,Interrupt ID587 Priority/Priority Byte Offset 587 " hexmask.long.byte 0x00 16.--23. 1. " INTID586 ,Interrupt ID586 Priority/Priority Byte Offset 586 " hexmask.long.byte 0x00 8.--15. 1. " INTID585 ,Interrupt ID585 Priority/Priority Byte Offset 585 " hexmask.long.byte 0x00 0.--7. 1. " INTID584 ,Interrupt ID584 Priority/Priority Byte Offset 584 " group.long 0x64C++0x03 line.long 0x00 "GICD_IPRIORITYR147,Interrupt Priority Register 147" hexmask.long.byte 0x00 24.--31. 1. " INTID591 ,Interrupt ID591 Priority/Priority Byte Offset 591 " hexmask.long.byte 0x00 16.--23. 1. " INTID590 ,Interrupt ID590 Priority/Priority Byte Offset 590 " hexmask.long.byte 0x00 8.--15. 1. " INTID589 ,Interrupt ID589 Priority/Priority Byte Offset 589 " hexmask.long.byte 0x00 0.--7. 1. " INTID588 ,Interrupt ID588 Priority/Priority Byte Offset 588 " group.long 0x650++0x03 line.long 0x00 "GICD_IPRIORITYR148,Interrupt Priority Register 148" hexmask.long.byte 0x00 24.--31. 1. " INTID595 ,Interrupt ID595 Priority/Priority Byte Offset 595 " hexmask.long.byte 0x00 16.--23. 1. " INTID594 ,Interrupt ID594 Priority/Priority Byte Offset 594 " hexmask.long.byte 0x00 8.--15. 1. " INTID593 ,Interrupt ID593 Priority/Priority Byte Offset 593 " hexmask.long.byte 0x00 0.--7. 1. " INTID592 ,Interrupt ID592 Priority/Priority Byte Offset 592 " group.long 0x654++0x03 line.long 0x00 "GICD_IPRIORITYR149,Interrupt Priority Register 149" hexmask.long.byte 0x00 24.--31. 1. " INTID599 ,Interrupt ID599 Priority/Priority Byte Offset 599 " hexmask.long.byte 0x00 16.--23. 1. " INTID598 ,Interrupt ID598 Priority/Priority Byte Offset 598 " hexmask.long.byte 0x00 8.--15. 1. " INTID597 ,Interrupt ID597 Priority/Priority Byte Offset 597 " hexmask.long.byte 0x00 0.--7. 1. " INTID596 ,Interrupt ID596 Priority/Priority Byte Offset 596 " group.long 0x658++0x03 line.long 0x00 "GICD_IPRIORITYR150,Interrupt Priority Register 150" hexmask.long.byte 0x00 24.--31. 1. " INTID603 ,Interrupt ID603 Priority/Priority Byte Offset 603 " hexmask.long.byte 0x00 16.--23. 1. " INTID602 ,Interrupt ID602 Priority/Priority Byte Offset 602 " hexmask.long.byte 0x00 8.--15. 1. " INTID601 ,Interrupt ID601 Priority/Priority Byte Offset 601 " hexmask.long.byte 0x00 0.--7. 1. " INTID600 ,Interrupt ID600 Priority/Priority Byte Offset 600 " group.long 0x65C++0x03 line.long 0x00 "GICD_IPRIORITYR151,Interrupt Priority Register 151" hexmask.long.byte 0x00 24.--31. 1. " INTID607 ,Interrupt ID607 Priority/Priority Byte Offset 607 " hexmask.long.byte 0x00 16.--23. 1. " INTID606 ,Interrupt ID606 Priority/Priority Byte Offset 606 " hexmask.long.byte 0x00 8.--15. 1. " INTID605 ,Interrupt ID605 Priority/Priority Byte Offset 605 " hexmask.long.byte 0x00 0.--7. 1. " INTID604 ,Interrupt ID604 Priority/Priority Byte Offset 604 " else rgroup.long 0x640++0x03 line.long 0x00 "GICD_IPRIORITYR144,Interrupt Priority Register 144" rgroup.long 0x644++0x03 line.long 0x00 "GICD_IPRIORITYR145,Interrupt Priority Register 145" rgroup.long 0x648++0x03 line.long 0x00 "GICD_IPRIORITYR146,Interrupt Priority Register 146" rgroup.long 0x64C++0x03 line.long 0x00 "GICD_IPRIORITYR147,Interrupt Priority Register 147" rgroup.long 0x650++0x03 line.long 0x00 "GICD_IPRIORITYR148,Interrupt Priority Register 148" rgroup.long 0x654++0x03 line.long 0x00 "GICD_IPRIORITYR149,Interrupt Priority Register 149" rgroup.long 0x658++0x03 line.long 0x00 "GICD_IPRIORITYR150,Interrupt Priority Register 150" rgroup.long 0x65C++0x03 line.long 0x00 "GICD_IPRIORITYR151,Interrupt Priority Register 151" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x13) group.long 0x660++0x03 line.long 0x00 "GICD_IPRIORITYR152,Interrupt Priority Register 152" hexmask.long.byte 0x00 24.--31. 1. " INTID611 ,Interrupt ID611 Priority/Priority Byte Offset 611 " hexmask.long.byte 0x00 16.--23. 1. " INTID610 ,Interrupt ID610 Priority/Priority Byte Offset 610 " hexmask.long.byte 0x00 8.--15. 1. " INTID609 ,Interrupt ID609 Priority/Priority Byte Offset 609 " hexmask.long.byte 0x00 0.--7. 1. " INTID608 ,Interrupt ID608 Priority/Priority Byte Offset 608 " group.long 0x664++0x03 line.long 0x00 "GICD_IPRIORITYR153,Interrupt Priority Register 153" hexmask.long.byte 0x00 24.--31. 1. " INTID615 ,Interrupt ID615 Priority/Priority Byte Offset 615 " hexmask.long.byte 0x00 16.--23. 1. " INTID614 ,Interrupt ID614 Priority/Priority Byte Offset 614 " hexmask.long.byte 0x00 8.--15. 1. " INTID613 ,Interrupt ID613 Priority/Priority Byte Offset 613 " hexmask.long.byte 0x00 0.--7. 1. " INTID612 ,Interrupt ID612 Priority/Priority Byte Offset 612 " group.long 0x668++0x03 line.long 0x00 "GICD_IPRIORITYR154,Interrupt Priority Register 154" hexmask.long.byte 0x00 24.--31. 1. " INTID619 ,Interrupt ID619 Priority/Priority Byte Offset 619 " hexmask.long.byte 0x00 16.--23. 1. " INTID618 ,Interrupt ID618 Priority/Priority Byte Offset 618 " hexmask.long.byte 0x00 8.--15. 1. " INTID617 ,Interrupt ID617 Priority/Priority Byte Offset 617 " hexmask.long.byte 0x00 0.--7. 1. " INTID616 ,Interrupt ID616 Priority/Priority Byte Offset 616 " group.long 0x66C++0x03 line.long 0x00 "GICD_IPRIORITYR155,Interrupt Priority Register 155" hexmask.long.byte 0x00 24.--31. 1. " INTID623 ,Interrupt ID623 Priority/Priority Byte Offset 623 " hexmask.long.byte 0x00 16.--23. 1. " INTID622 ,Interrupt ID622 Priority/Priority Byte Offset 622 " hexmask.long.byte 0x00 8.--15. 1. " INTID621 ,Interrupt ID621 Priority/Priority Byte Offset 621 " hexmask.long.byte 0x00 0.--7. 1. " INTID620 ,Interrupt ID620 Priority/Priority Byte Offset 620 " group.long 0x670++0x03 line.long 0x00 "GICD_IPRIORITYR156,Interrupt Priority Register 156" hexmask.long.byte 0x00 24.--31. 1. " INTID627 ,Interrupt ID627 Priority/Priority Byte Offset 627 " hexmask.long.byte 0x00 16.--23. 1. " INTID626 ,Interrupt ID626 Priority/Priority Byte Offset 626 " hexmask.long.byte 0x00 8.--15. 1. " INTID625 ,Interrupt ID625 Priority/Priority Byte Offset 625 " hexmask.long.byte 0x00 0.--7. 1. " INTID624 ,Interrupt ID624 Priority/Priority Byte Offset 624 " group.long 0x674++0x03 line.long 0x00 "GICD_IPRIORITYR157,Interrupt Priority Register 157" hexmask.long.byte 0x00 24.--31. 1. " INTID631 ,Interrupt ID631 Priority/Priority Byte Offset 631 " hexmask.long.byte 0x00 16.--23. 1. " INTID630 ,Interrupt ID630 Priority/Priority Byte Offset 630 " hexmask.long.byte 0x00 8.--15. 1. " INTID629 ,Interrupt ID629 Priority/Priority Byte Offset 629 " hexmask.long.byte 0x00 0.--7. 1. " INTID628 ,Interrupt ID628 Priority/Priority Byte Offset 628 " group.long 0x678++0x03 line.long 0x00 "GICD_IPRIORITYR158,Interrupt Priority Register 158" hexmask.long.byte 0x00 24.--31. 1. " INTID635 ,Interrupt ID635 Priority/Priority Byte Offset 635 " hexmask.long.byte 0x00 16.--23. 1. " INTID634 ,Interrupt ID634 Priority/Priority Byte Offset 634 " hexmask.long.byte 0x00 8.--15. 1. " INTID633 ,Interrupt ID633 Priority/Priority Byte Offset 633 " hexmask.long.byte 0x00 0.--7. 1. " INTID632 ,Interrupt ID632 Priority/Priority Byte Offset 632 " group.long 0x67C++0x03 line.long 0x00 "GICD_IPRIORITYR159,Interrupt Priority Register 159" hexmask.long.byte 0x00 24.--31. 1. " INTID639 ,Interrupt ID639 Priority/Priority Byte Offset 639 " hexmask.long.byte 0x00 16.--23. 1. " INTID638 ,Interrupt ID638 Priority/Priority Byte Offset 638 " hexmask.long.byte 0x00 8.--15. 1. " INTID637 ,Interrupt ID637 Priority/Priority Byte Offset 637 " hexmask.long.byte 0x00 0.--7. 1. " INTID636 ,Interrupt ID636 Priority/Priority Byte Offset 636 " else rgroup.long 0x660++0x03 line.long 0x00 "GICD_IPRIORITYR152,Interrupt Priority Register 152" rgroup.long 0x664++0x03 line.long 0x00 "GICD_IPRIORITYR153,Interrupt Priority Register 153" rgroup.long 0x668++0x03 line.long 0x00 "GICD_IPRIORITYR154,Interrupt Priority Register 154" rgroup.long 0x66C++0x03 line.long 0x00 "GICD_IPRIORITYR155,Interrupt Priority Register 155" rgroup.long 0x670++0x03 line.long 0x00 "GICD_IPRIORITYR156,Interrupt Priority Register 156" rgroup.long 0x674++0x03 line.long 0x00 "GICD_IPRIORITYR157,Interrupt Priority Register 157" rgroup.long 0x678++0x03 line.long 0x00 "GICD_IPRIORITYR158,Interrupt Priority Register 158" rgroup.long 0x67C++0x03 line.long 0x00 "GICD_IPRIORITYR159,Interrupt Priority Register 159" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x14) group.long 0x680++0x03 line.long 0x00 "GICD_IPRIORITYR160,Interrupt Priority Register 160" hexmask.long.byte 0x00 24.--31. 1. " INTID643 ,Interrupt ID643 Priority/Priority Byte Offset 643 " hexmask.long.byte 0x00 16.--23. 1. " INTID642 ,Interrupt ID642 Priority/Priority Byte Offset 642 " hexmask.long.byte 0x00 8.--15. 1. " INTID641 ,Interrupt ID641 Priority/Priority Byte Offset 641 " hexmask.long.byte 0x00 0.--7. 1. " INTID640 ,Interrupt ID640 Priority/Priority Byte Offset 640 " group.long 0x684++0x03 line.long 0x00 "GICD_IPRIORITYR161,Interrupt Priority Register 161" hexmask.long.byte 0x00 24.--31. 1. " INTID647 ,Interrupt ID647 Priority/Priority Byte Offset 647 " hexmask.long.byte 0x00 16.--23. 1. " INTID646 ,Interrupt ID646 Priority/Priority Byte Offset 646 " hexmask.long.byte 0x00 8.--15. 1. " INTID645 ,Interrupt ID645 Priority/Priority Byte Offset 645 " hexmask.long.byte 0x00 0.--7. 1. " INTID644 ,Interrupt ID644 Priority/Priority Byte Offset 644 " group.long 0x688++0x03 line.long 0x00 "GICD_IPRIORITYR162,Interrupt Priority Register 162" hexmask.long.byte 0x00 24.--31. 1. " INTID651 ,Interrupt ID651 Priority/Priority Byte Offset 651 " hexmask.long.byte 0x00 16.--23. 1. " INTID650 ,Interrupt ID650 Priority/Priority Byte Offset 650 " hexmask.long.byte 0x00 8.--15. 1. " INTID649 ,Interrupt ID649 Priority/Priority Byte Offset 649 " hexmask.long.byte 0x00 0.--7. 1. " INTID648 ,Interrupt ID648 Priority/Priority Byte Offset 648 " group.long 0x68C++0x03 line.long 0x00 "GICD_IPRIORITYR163,Interrupt Priority Register 163" hexmask.long.byte 0x00 24.--31. 1. " INTID655 ,Interrupt ID655 Priority/Priority Byte Offset 655 " hexmask.long.byte 0x00 16.--23. 1. " INTID654 ,Interrupt ID654 Priority/Priority Byte Offset 654 " hexmask.long.byte 0x00 8.--15. 1. " INTID653 ,Interrupt ID653 Priority/Priority Byte Offset 653 " hexmask.long.byte 0x00 0.--7. 1. " INTID652 ,Interrupt ID652 Priority/Priority Byte Offset 652 " group.long 0x690++0x03 line.long 0x00 "GICD_IPRIORITYR164,Interrupt Priority Register 164" hexmask.long.byte 0x00 24.--31. 1. " INTID659 ,Interrupt ID659 Priority/Priority Byte Offset 659 " hexmask.long.byte 0x00 16.--23. 1. " INTID658 ,Interrupt ID658 Priority/Priority Byte Offset 658 " hexmask.long.byte 0x00 8.--15. 1. " INTID657 ,Interrupt ID657 Priority/Priority Byte Offset 657 " hexmask.long.byte 0x00 0.--7. 1. " INTID656 ,Interrupt ID656 Priority/Priority Byte Offset 656 " group.long 0x694++0x03 line.long 0x00 "GICD_IPRIORITYR165,Interrupt Priority Register 165" hexmask.long.byte 0x00 24.--31. 1. " INTID663 ,Interrupt ID663 Priority/Priority Byte Offset 663 " hexmask.long.byte 0x00 16.--23. 1. " INTID662 ,Interrupt ID662 Priority/Priority Byte Offset 662 " hexmask.long.byte 0x00 8.--15. 1. " INTID661 ,Interrupt ID661 Priority/Priority Byte Offset 661 " hexmask.long.byte 0x00 0.--7. 1. " INTID660 ,Interrupt ID660 Priority/Priority Byte Offset 660 " group.long 0x698++0x03 line.long 0x00 "GICD_IPRIORITYR166,Interrupt Priority Register 166" hexmask.long.byte 0x00 24.--31. 1. " INTID667 ,Interrupt ID667 Priority/Priority Byte Offset 667 " hexmask.long.byte 0x00 16.--23. 1. " INTID666 ,Interrupt ID666 Priority/Priority Byte Offset 666 " hexmask.long.byte 0x00 8.--15. 1. " INTID665 ,Interrupt ID665 Priority/Priority Byte Offset 665 " hexmask.long.byte 0x00 0.--7. 1. " INTID664 ,Interrupt ID664 Priority/Priority Byte Offset 664 " group.long 0x69C++0x03 line.long 0x00 "GICD_IPRIORITYR167,Interrupt Priority Register 167" hexmask.long.byte 0x00 24.--31. 1. " INTID671 ,Interrupt ID671 Priority/Priority Byte Offset 671 " hexmask.long.byte 0x00 16.--23. 1. " INTID670 ,Interrupt ID670 Priority/Priority Byte Offset 670 " hexmask.long.byte 0x00 8.--15. 1. " INTID669 ,Interrupt ID669 Priority/Priority Byte Offset 669 " hexmask.long.byte 0x00 0.--7. 1. " INTID668 ,Interrupt ID668 Priority/Priority Byte Offset 668 " else rgroup.long 0x680++0x03 line.long 0x00 "GICD_IPRIORITYR160,Interrupt Priority Register 160" rgroup.long 0x684++0x03 line.long 0x00 "GICD_IPRIORITYR161,Interrupt Priority Register 161" rgroup.long 0x688++0x03 line.long 0x00 "GICD_IPRIORITYR162,Interrupt Priority Register 162" rgroup.long 0x68C++0x03 line.long 0x00 "GICD_IPRIORITYR163,Interrupt Priority Register 163" rgroup.long 0x690++0x03 line.long 0x00 "GICD_IPRIORITYR164,Interrupt Priority Register 164" rgroup.long 0x694++0x03 line.long 0x00 "GICD_IPRIORITYR165,Interrupt Priority Register 165" rgroup.long 0x698++0x03 line.long 0x00 "GICD_IPRIORITYR166,Interrupt Priority Register 166" rgroup.long 0x69C++0x03 line.long 0x00 "GICD_IPRIORITYR167,Interrupt Priority Register 167" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x15) group.long 0x6A0++0x03 line.long 0x00 "GICD_IPRIORITYR168,Interrupt Priority Register 168" hexmask.long.byte 0x00 24.--31. 1. " INTID675 ,Interrupt ID675 Priority/Priority Byte Offset 675 " hexmask.long.byte 0x00 16.--23. 1. " INTID674 ,Interrupt ID674 Priority/Priority Byte Offset 674 " hexmask.long.byte 0x00 8.--15. 1. " INTID673 ,Interrupt ID673 Priority/Priority Byte Offset 673 " hexmask.long.byte 0x00 0.--7. 1. " INTID672 ,Interrupt ID672 Priority/Priority Byte Offset 672 " group.long 0x6A4++0x03 line.long 0x00 "GICD_IPRIORITYR169,Interrupt Priority Register 169" hexmask.long.byte 0x00 24.--31. 1. " INTID679 ,Interrupt ID679 Priority/Priority Byte Offset 679 " hexmask.long.byte 0x00 16.--23. 1. " INTID678 ,Interrupt ID678 Priority/Priority Byte Offset 678 " hexmask.long.byte 0x00 8.--15. 1. " INTID677 ,Interrupt ID677 Priority/Priority Byte Offset 677 " hexmask.long.byte 0x00 0.--7. 1. " INTID676 ,Interrupt ID676 Priority/Priority Byte Offset 676 " group.long 0x6A8++0x03 line.long 0x00 "GICD_IPRIORITYR170,Interrupt Priority Register 170" hexmask.long.byte 0x00 24.--31. 1. " INTID683 ,Interrupt ID683 Priority/Priority Byte Offset 683 " hexmask.long.byte 0x00 16.--23. 1. " INTID682 ,Interrupt ID682 Priority/Priority Byte Offset 682 " hexmask.long.byte 0x00 8.--15. 1. " INTID681 ,Interrupt ID681 Priority/Priority Byte Offset 681 " hexmask.long.byte 0x00 0.--7. 1. " INTID680 ,Interrupt ID680 Priority/Priority Byte Offset 680 " group.long 0x6AC++0x03 line.long 0x00 "GICD_IPRIORITYR171,Interrupt Priority Register 171" hexmask.long.byte 0x00 24.--31. 1. " INTID687 ,Interrupt ID687 Priority/Priority Byte Offset 687 " hexmask.long.byte 0x00 16.--23. 1. " INTID686 ,Interrupt ID686 Priority/Priority Byte Offset 686 " hexmask.long.byte 0x00 8.--15. 1. " INTID685 ,Interrupt ID685 Priority/Priority Byte Offset 685 " hexmask.long.byte 0x00 0.--7. 1. " INTID684 ,Interrupt ID684 Priority/Priority Byte Offset 684 " group.long 0x6B0++0x03 line.long 0x00 "GICD_IPRIORITYR172,Interrupt Priority Register 172" hexmask.long.byte 0x00 24.--31. 1. " INTID691 ,Interrupt ID691 Priority/Priority Byte Offset 691 " hexmask.long.byte 0x00 16.--23. 1. " INTID690 ,Interrupt ID690 Priority/Priority Byte Offset 690 " hexmask.long.byte 0x00 8.--15. 1. " INTID689 ,Interrupt ID689 Priority/Priority Byte Offset 689 " hexmask.long.byte 0x00 0.--7. 1. " INTID688 ,Interrupt ID688 Priority/Priority Byte Offset 688 " group.long 0x6B4++0x03 line.long 0x00 "GICD_IPRIORITYR173,Interrupt Priority Register 173" hexmask.long.byte 0x00 24.--31. 1. " INTID695 ,Interrupt ID695 Priority/Priority Byte Offset 695 " hexmask.long.byte 0x00 16.--23. 1. " INTID694 ,Interrupt ID694 Priority/Priority Byte Offset 694 " hexmask.long.byte 0x00 8.--15. 1. " INTID693 ,Interrupt ID693 Priority/Priority Byte Offset 693 " hexmask.long.byte 0x00 0.--7. 1. " INTID692 ,Interrupt ID692 Priority/Priority Byte Offset 692 " group.long 0x6B8++0x03 line.long 0x00 "GICD_IPRIORITYR174,Interrupt Priority Register 174" hexmask.long.byte 0x00 24.--31. 1. " INTID699 ,Interrupt ID699 Priority/Priority Byte Offset 699 " hexmask.long.byte 0x00 16.--23. 1. " INTID698 ,Interrupt ID698 Priority/Priority Byte Offset 698 " hexmask.long.byte 0x00 8.--15. 1. " INTID697 ,Interrupt ID697 Priority/Priority Byte Offset 697 " hexmask.long.byte 0x00 0.--7. 1. " INTID696 ,Interrupt ID696 Priority/Priority Byte Offset 696 " group.long 0x6BC++0x03 line.long 0x00 "GICD_IPRIORITYR175,Interrupt Priority Register 175" hexmask.long.byte 0x00 24.--31. 1. " INTID703 ,Interrupt ID703 Priority/Priority Byte Offset 703 " hexmask.long.byte 0x00 16.--23. 1. " INTID702 ,Interrupt ID702 Priority/Priority Byte Offset 702 " hexmask.long.byte 0x00 8.--15. 1. " INTID701 ,Interrupt ID701 Priority/Priority Byte Offset 701 " hexmask.long.byte 0x00 0.--7. 1. " INTID700 ,Interrupt ID700 Priority/Priority Byte Offset 700 " else rgroup.long 0x6A0++0x03 line.long 0x00 "GICD_IPRIORITYR168,Interrupt Priority Register 168" rgroup.long 0x6A4++0x03 line.long 0x00 "GICD_IPRIORITYR169,Interrupt Priority Register 169" rgroup.long 0x6A8++0x03 line.long 0x00 "GICD_IPRIORITYR170,Interrupt Priority Register 170" rgroup.long 0x6AC++0x03 line.long 0x00 "GICD_IPRIORITYR171,Interrupt Priority Register 171" rgroup.long 0x6B0++0x03 line.long 0x00 "GICD_IPRIORITYR172,Interrupt Priority Register 172" rgroup.long 0x6B4++0x03 line.long 0x00 "GICD_IPRIORITYR173,Interrupt Priority Register 173" rgroup.long 0x6B8++0x03 line.long 0x00 "GICD_IPRIORITYR174,Interrupt Priority Register 174" rgroup.long 0x6BC++0x03 line.long 0x00 "GICD_IPRIORITYR175,Interrupt Priority Register 175" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x16) group.long 0x6C0++0x03 line.long 0x00 "GICD_IPRIORITYR176,Interrupt Priority Register 176" hexmask.long.byte 0x00 24.--31. 1. " INTID707 ,Interrupt ID707 Priority/Priority Byte Offset 707 " hexmask.long.byte 0x00 16.--23. 1. " INTID706 ,Interrupt ID706 Priority/Priority Byte Offset 706 " hexmask.long.byte 0x00 8.--15. 1. " INTID705 ,Interrupt ID705 Priority/Priority Byte Offset 705 " hexmask.long.byte 0x00 0.--7. 1. " INTID704 ,Interrupt ID704 Priority/Priority Byte Offset 704 " group.long 0x6C4++0x03 line.long 0x00 "GICD_IPRIORITYR177,Interrupt Priority Register 177" hexmask.long.byte 0x00 24.--31. 1. " INTID711 ,Interrupt ID711 Priority/Priority Byte Offset 711 " hexmask.long.byte 0x00 16.--23. 1. " INTID710 ,Interrupt ID710 Priority/Priority Byte Offset 710 " hexmask.long.byte 0x00 8.--15. 1. " INTID709 ,Interrupt ID709 Priority/Priority Byte Offset 709 " hexmask.long.byte 0x00 0.--7. 1. " INTID708 ,Interrupt ID708 Priority/Priority Byte Offset 708 " group.long 0x6C8++0x03 line.long 0x00 "GICD_IPRIORITYR178,Interrupt Priority Register 178" hexmask.long.byte 0x00 24.--31. 1. " INTID715 ,Interrupt ID715 Priority/Priority Byte Offset 715 " hexmask.long.byte 0x00 16.--23. 1. " INTID714 ,Interrupt ID714 Priority/Priority Byte Offset 714 " hexmask.long.byte 0x00 8.--15. 1. " INTID713 ,Interrupt ID713 Priority/Priority Byte Offset 713 " hexmask.long.byte 0x00 0.--7. 1. " INTID712 ,Interrupt ID712 Priority/Priority Byte Offset 712 " group.long 0x6CC++0x03 line.long 0x00 "GICD_IPRIORITYR179,Interrupt Priority Register 179" hexmask.long.byte 0x00 24.--31. 1. " INTID719 ,Interrupt ID719 Priority/Priority Byte Offset 719 " hexmask.long.byte 0x00 16.--23. 1. " INTID718 ,Interrupt ID718 Priority/Priority Byte Offset 718 " hexmask.long.byte 0x00 8.--15. 1. " INTID717 ,Interrupt ID717 Priority/Priority Byte Offset 717 " hexmask.long.byte 0x00 0.--7. 1. " INTID716 ,Interrupt ID716 Priority/Priority Byte Offset 716 " group.long 0x6D0++0x03 line.long 0x00 "GICD_IPRIORITYR180,Interrupt Priority Register 180" hexmask.long.byte 0x00 24.--31. 1. " INTID723 ,Interrupt ID723 Priority/Priority Byte Offset 723 " hexmask.long.byte 0x00 16.--23. 1. " INTID722 ,Interrupt ID722 Priority/Priority Byte Offset 722 " hexmask.long.byte 0x00 8.--15. 1. " INTID721 ,Interrupt ID721 Priority/Priority Byte Offset 721 " hexmask.long.byte 0x00 0.--7. 1. " INTID720 ,Interrupt ID720 Priority/Priority Byte Offset 720 " group.long 0x6D4++0x03 line.long 0x00 "GICD_IPRIORITYR181,Interrupt Priority Register 181" hexmask.long.byte 0x00 24.--31. 1. " INTID727 ,Interrupt ID727 Priority/Priority Byte Offset 727 " hexmask.long.byte 0x00 16.--23. 1. " INTID726 ,Interrupt ID726 Priority/Priority Byte Offset 726 " hexmask.long.byte 0x00 8.--15. 1. " INTID725 ,Interrupt ID725 Priority/Priority Byte Offset 725 " hexmask.long.byte 0x00 0.--7. 1. " INTID724 ,Interrupt ID724 Priority/Priority Byte Offset 724 " group.long 0x6D8++0x03 line.long 0x00 "GICD_IPRIORITYR182,Interrupt Priority Register 182" hexmask.long.byte 0x00 24.--31. 1. " INTID731 ,Interrupt ID731 Priority/Priority Byte Offset 731 " hexmask.long.byte 0x00 16.--23. 1. " INTID730 ,Interrupt ID730 Priority/Priority Byte Offset 730 " hexmask.long.byte 0x00 8.--15. 1. " INTID729 ,Interrupt ID729 Priority/Priority Byte Offset 729 " hexmask.long.byte 0x00 0.--7. 1. " INTID728 ,Interrupt ID728 Priority/Priority Byte Offset 728 " group.long 0x6DC++0x03 line.long 0x00 "GICD_IPRIORITYR183,Interrupt Priority Register 183" hexmask.long.byte 0x00 24.--31. 1. " INTID735 ,Interrupt ID735 Priority/Priority Byte Offset 735 " hexmask.long.byte 0x00 16.--23. 1. " INTID734 ,Interrupt ID734 Priority/Priority Byte Offset 734 " hexmask.long.byte 0x00 8.--15. 1. " INTID733 ,Interrupt ID733 Priority/Priority Byte Offset 733 " hexmask.long.byte 0x00 0.--7. 1. " INTID732 ,Interrupt ID732 Priority/Priority Byte Offset 732 " else rgroup.long 0x6C0++0x03 line.long 0x00 "GICD_IPRIORITYR176,Interrupt Priority Register 176" rgroup.long 0x6C4++0x03 line.long 0x00 "GICD_IPRIORITYR177,Interrupt Priority Register 177" rgroup.long 0x6C8++0x03 line.long 0x00 "GICD_IPRIORITYR178,Interrupt Priority Register 178" rgroup.long 0x6CC++0x03 line.long 0x00 "GICD_IPRIORITYR179,Interrupt Priority Register 179" rgroup.long 0x6D0++0x03 line.long 0x00 "GICD_IPRIORITYR180,Interrupt Priority Register 180" rgroup.long 0x6D4++0x03 line.long 0x00 "GICD_IPRIORITYR181,Interrupt Priority Register 181" rgroup.long 0x6D8++0x03 line.long 0x00 "GICD_IPRIORITYR182,Interrupt Priority Register 182" rgroup.long 0x6DC++0x03 line.long 0x00 "GICD_IPRIORITYR183,Interrupt Priority Register 183" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x17) group.long 0x6E0++0x03 line.long 0x00 "GICD_IPRIORITYR184,Interrupt Priority Register 184" hexmask.long.byte 0x00 24.--31. 1. " INTID739 ,Interrupt ID739 Priority/Priority Byte Offset 739 " hexmask.long.byte 0x00 16.--23. 1. " INTID738 ,Interrupt ID738 Priority/Priority Byte Offset 738 " hexmask.long.byte 0x00 8.--15. 1. " INTID737 ,Interrupt ID737 Priority/Priority Byte Offset 737 " hexmask.long.byte 0x00 0.--7. 1. " INTID736 ,Interrupt ID736 Priority/Priority Byte Offset 736 " group.long 0x6E4++0x03 line.long 0x00 "GICD_IPRIORITYR185,Interrupt Priority Register 185" hexmask.long.byte 0x00 24.--31. 1. " INTID743 ,Interrupt ID743 Priority/Priority Byte Offset 743 " hexmask.long.byte 0x00 16.--23. 1. " INTID742 ,Interrupt ID742 Priority/Priority Byte Offset 742 " hexmask.long.byte 0x00 8.--15. 1. " INTID741 ,Interrupt ID741 Priority/Priority Byte Offset 741 " hexmask.long.byte 0x00 0.--7. 1. " INTID740 ,Interrupt ID740 Priority/Priority Byte Offset 740 " group.long 0x6E8++0x03 line.long 0x00 "GICD_IPRIORITYR186,Interrupt Priority Register 186" hexmask.long.byte 0x00 24.--31. 1. " INTID747 ,Interrupt ID747 Priority/Priority Byte Offset 747 " hexmask.long.byte 0x00 16.--23. 1. " INTID746 ,Interrupt ID746 Priority/Priority Byte Offset 746 " hexmask.long.byte 0x00 8.--15. 1. " INTID745 ,Interrupt ID745 Priority/Priority Byte Offset 745 " hexmask.long.byte 0x00 0.--7. 1. " INTID744 ,Interrupt ID744 Priority/Priority Byte Offset 744 " group.long 0x6EC++0x03 line.long 0x00 "GICD_IPRIORITYR187,Interrupt Priority Register 187" hexmask.long.byte 0x00 24.--31. 1. " INTID751 ,Interrupt ID751 Priority/Priority Byte Offset 751 " hexmask.long.byte 0x00 16.--23. 1. " INTID750 ,Interrupt ID750 Priority/Priority Byte Offset 750 " hexmask.long.byte 0x00 8.--15. 1. " INTID749 ,Interrupt ID749 Priority/Priority Byte Offset 749 " hexmask.long.byte 0x00 0.--7. 1. " INTID748 ,Interrupt ID748 Priority/Priority Byte Offset 748 " group.long 0x6F0++0x03 line.long 0x00 "GICD_IPRIORITYR188,Interrupt Priority Register 188" hexmask.long.byte 0x00 24.--31. 1. " INTID755 ,Interrupt ID755 Priority/Priority Byte Offset 755 " hexmask.long.byte 0x00 16.--23. 1. " INTID754 ,Interrupt ID754 Priority/Priority Byte Offset 754 " hexmask.long.byte 0x00 8.--15. 1. " INTID753 ,Interrupt ID753 Priority/Priority Byte Offset 753 " hexmask.long.byte 0x00 0.--7. 1. " INTID752 ,Interrupt ID752 Priority/Priority Byte Offset 752 " group.long 0x6F4++0x03 line.long 0x00 "GICD_IPRIORITYR189,Interrupt Priority Register 189" hexmask.long.byte 0x00 24.--31. 1. " INTID759 ,Interrupt ID759 Priority/Priority Byte Offset 759 " hexmask.long.byte 0x00 16.--23. 1. " INTID758 ,Interrupt ID758 Priority/Priority Byte Offset 758 " hexmask.long.byte 0x00 8.--15. 1. " INTID757 ,Interrupt ID757 Priority/Priority Byte Offset 757 " hexmask.long.byte 0x00 0.--7. 1. " INTID756 ,Interrupt ID756 Priority/Priority Byte Offset 756 " group.long 0x6F8++0x03 line.long 0x00 "GICD_IPRIORITYR190,Interrupt Priority Register 190" hexmask.long.byte 0x00 24.--31. 1. " INTID763 ,Interrupt ID763 Priority/Priority Byte Offset 763 " hexmask.long.byte 0x00 16.--23. 1. " INTID762 ,Interrupt ID762 Priority/Priority Byte Offset 762 " hexmask.long.byte 0x00 8.--15. 1. " INTID761 ,Interrupt ID761 Priority/Priority Byte Offset 761 " hexmask.long.byte 0x00 0.--7. 1. " INTID760 ,Interrupt ID760 Priority/Priority Byte Offset 760 " group.long 0x6FC++0x03 line.long 0x00 "GICD_IPRIORITYR191,Interrupt Priority Register 191" hexmask.long.byte 0x00 24.--31. 1. " INTID767 ,Interrupt ID767 Priority/Priority Byte Offset 767 " hexmask.long.byte 0x00 16.--23. 1. " INTID766 ,Interrupt ID766 Priority/Priority Byte Offset 766 " hexmask.long.byte 0x00 8.--15. 1. " INTID765 ,Interrupt ID765 Priority/Priority Byte Offset 765 " hexmask.long.byte 0x00 0.--7. 1. " INTID764 ,Interrupt ID764 Priority/Priority Byte Offset 764 " else rgroup.long 0x6E0++0x03 line.long 0x00 "GICD_IPRIORITYR184,Interrupt Priority Register 184" rgroup.long 0x6E4++0x03 line.long 0x00 "GICD_IPRIORITYR185,Interrupt Priority Register 185" rgroup.long 0x6E8++0x03 line.long 0x00 "GICD_IPRIORITYR186,Interrupt Priority Register 186" rgroup.long 0x6EC++0x03 line.long 0x00 "GICD_IPRIORITYR187,Interrupt Priority Register 187" rgroup.long 0x6F0++0x03 line.long 0x00 "GICD_IPRIORITYR188,Interrupt Priority Register 188" rgroup.long 0x6F4++0x03 line.long 0x00 "GICD_IPRIORITYR189,Interrupt Priority Register 189" rgroup.long 0x6F8++0x03 line.long 0x00 "GICD_IPRIORITYR190,Interrupt Priority Register 190" rgroup.long 0x6FC++0x03 line.long 0x00 "GICD_IPRIORITYR191,Interrupt Priority Register 191" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x18) group.long 0x700++0x03 line.long 0x00 "GICD_IPRIORITYR192,Interrupt Priority Register 192" hexmask.long.byte 0x00 24.--31. 1. " INTID771 ,Interrupt ID771 Priority/Priority Byte Offset 771 " hexmask.long.byte 0x00 16.--23. 1. " INTID770 ,Interrupt ID770 Priority/Priority Byte Offset 770 " hexmask.long.byte 0x00 8.--15. 1. " INTID769 ,Interrupt ID769 Priority/Priority Byte Offset 769 " hexmask.long.byte 0x00 0.--7. 1. " INTID768 ,Interrupt ID768 Priority/Priority Byte Offset 768 " group.long 0x704++0x03 line.long 0x00 "GICD_IPRIORITYR193,Interrupt Priority Register 193" hexmask.long.byte 0x00 24.--31. 1. " INTID775 ,Interrupt ID775 Priority/Priority Byte Offset 775 " hexmask.long.byte 0x00 16.--23. 1. " INTID774 ,Interrupt ID774 Priority/Priority Byte Offset 774 " hexmask.long.byte 0x00 8.--15. 1. " INTID773 ,Interrupt ID773 Priority/Priority Byte Offset 773 " hexmask.long.byte 0x00 0.--7. 1. " INTID772 ,Interrupt ID772 Priority/Priority Byte Offset 772 " group.long 0x708++0x03 line.long 0x00 "GICD_IPRIORITYR194,Interrupt Priority Register 194" hexmask.long.byte 0x00 24.--31. 1. " INTID779 ,Interrupt ID779 Priority/Priority Byte Offset 779 " hexmask.long.byte 0x00 16.--23. 1. " INTID778 ,Interrupt ID778 Priority/Priority Byte Offset 778 " hexmask.long.byte 0x00 8.--15. 1. " INTID777 ,Interrupt ID777 Priority/Priority Byte Offset 777 " hexmask.long.byte 0x00 0.--7. 1. " INTID776 ,Interrupt ID776 Priority/Priority Byte Offset 776 " group.long 0x70C++0x03 line.long 0x00 "GICD_IPRIORITYR195,Interrupt Priority Register 195" hexmask.long.byte 0x00 24.--31. 1. " INTID783 ,Interrupt ID783 Priority/Priority Byte Offset 783 " hexmask.long.byte 0x00 16.--23. 1. " INTID782 ,Interrupt ID782 Priority/Priority Byte Offset 782 " hexmask.long.byte 0x00 8.--15. 1. " INTID781 ,Interrupt ID781 Priority/Priority Byte Offset 781 " hexmask.long.byte 0x00 0.--7. 1. " INTID780 ,Interrupt ID780 Priority/Priority Byte Offset 780 " group.long 0x710++0x03 line.long 0x00 "GICD_IPRIORITYR196,Interrupt Priority Register 196" hexmask.long.byte 0x00 24.--31. 1. " INTID787 ,Interrupt ID787 Priority/Priority Byte Offset 787 " hexmask.long.byte 0x00 16.--23. 1. " INTID786 ,Interrupt ID786 Priority/Priority Byte Offset 786 " hexmask.long.byte 0x00 8.--15. 1. " INTID785 ,Interrupt ID785 Priority/Priority Byte Offset 785 " hexmask.long.byte 0x00 0.--7. 1. " INTID784 ,Interrupt ID784 Priority/Priority Byte Offset 784 " group.long 0x714++0x03 line.long 0x00 "GICD_IPRIORITYR197,Interrupt Priority Register 197" hexmask.long.byte 0x00 24.--31. 1. " INTID791 ,Interrupt ID791 Priority/Priority Byte Offset 791 " hexmask.long.byte 0x00 16.--23. 1. " INTID790 ,Interrupt ID790 Priority/Priority Byte Offset 790 " hexmask.long.byte 0x00 8.--15. 1. " INTID789 ,Interrupt ID789 Priority/Priority Byte Offset 789 " hexmask.long.byte 0x00 0.--7. 1. " INTID788 ,Interrupt ID788 Priority/Priority Byte Offset 788 " group.long 0x718++0x03 line.long 0x00 "GICD_IPRIORITYR198,Interrupt Priority Register 198" hexmask.long.byte 0x00 24.--31. 1. " INTID795 ,Interrupt ID795 Priority/Priority Byte Offset 795 " hexmask.long.byte 0x00 16.--23. 1. " INTID794 ,Interrupt ID794 Priority/Priority Byte Offset 794 " hexmask.long.byte 0x00 8.--15. 1. " INTID793 ,Interrupt ID793 Priority/Priority Byte Offset 793 " hexmask.long.byte 0x00 0.--7. 1. " INTID792 ,Interrupt ID792 Priority/Priority Byte Offset 792 " group.long 0x71C++0x03 line.long 0x00 "GICD_IPRIORITYR199,Interrupt Priority Register 199" hexmask.long.byte 0x00 24.--31. 1. " INTID799 ,Interrupt ID799 Priority/Priority Byte Offset 799 " hexmask.long.byte 0x00 16.--23. 1. " INTID798 ,Interrupt ID798 Priority/Priority Byte Offset 798 " hexmask.long.byte 0x00 8.--15. 1. " INTID797 ,Interrupt ID797 Priority/Priority Byte Offset 797 " hexmask.long.byte 0x00 0.--7. 1. " INTID796 ,Interrupt ID796 Priority/Priority Byte Offset 796 " else rgroup.long 0x700++0x03 line.long 0x00 "GICD_IPRIORITYR192,Interrupt Priority Register 192" rgroup.long 0x704++0x03 line.long 0x00 "GICD_IPRIORITYR193,Interrupt Priority Register 193" rgroup.long 0x708++0x03 line.long 0x00 "GICD_IPRIORITYR194,Interrupt Priority Register 194" rgroup.long 0x70C++0x03 line.long 0x00 "GICD_IPRIORITYR195,Interrupt Priority Register 195" rgroup.long 0x710++0x03 line.long 0x00 "GICD_IPRIORITYR196,Interrupt Priority Register 196" rgroup.long 0x714++0x03 line.long 0x00 "GICD_IPRIORITYR197,Interrupt Priority Register 197" rgroup.long 0x718++0x03 line.long 0x00 "GICD_IPRIORITYR198,Interrupt Priority Register 198" rgroup.long 0x71C++0x03 line.long 0x00 "GICD_IPRIORITYR199,Interrupt Priority Register 199" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x19) group.long 0x720++0x03 line.long 0x00 "GICD_IPRIORITYR200,Interrupt Priority Register 200" hexmask.long.byte 0x00 24.--31. 1. " INTID803 ,Interrupt ID803 Priority/Priority Byte Offset 803 " hexmask.long.byte 0x00 16.--23. 1. " INTID802 ,Interrupt ID802 Priority/Priority Byte Offset 802 " hexmask.long.byte 0x00 8.--15. 1. " INTID801 ,Interrupt ID801 Priority/Priority Byte Offset 801 " hexmask.long.byte 0x00 0.--7. 1. " INTID800 ,Interrupt ID800 Priority/Priority Byte Offset 800 " group.long 0x724++0x03 line.long 0x00 "GICD_IPRIORITYR201,Interrupt Priority Register 201" hexmask.long.byte 0x00 24.--31. 1. " INTID807 ,Interrupt ID807 Priority/Priority Byte Offset 807 " hexmask.long.byte 0x00 16.--23. 1. " INTID806 ,Interrupt ID806 Priority/Priority Byte Offset 806 " hexmask.long.byte 0x00 8.--15. 1. " INTID805 ,Interrupt ID805 Priority/Priority Byte Offset 805 " hexmask.long.byte 0x00 0.--7. 1. " INTID804 ,Interrupt ID804 Priority/Priority Byte Offset 804 " group.long 0x728++0x03 line.long 0x00 "GICD_IPRIORITYR202,Interrupt Priority Register 202" hexmask.long.byte 0x00 24.--31. 1. " INTID811 ,Interrupt ID811 Priority/Priority Byte Offset 811 " hexmask.long.byte 0x00 16.--23. 1. " INTID810 ,Interrupt ID810 Priority/Priority Byte Offset 810 " hexmask.long.byte 0x00 8.--15. 1. " INTID809 ,Interrupt ID809 Priority/Priority Byte Offset 809 " hexmask.long.byte 0x00 0.--7. 1. " INTID808 ,Interrupt ID808 Priority/Priority Byte Offset 808 " group.long 0x72C++0x03 line.long 0x00 "GICD_IPRIORITYR203,Interrupt Priority Register 203" hexmask.long.byte 0x00 24.--31. 1. " INTID815 ,Interrupt ID815 Priority/Priority Byte Offset 815 " hexmask.long.byte 0x00 16.--23. 1. " INTID814 ,Interrupt ID814 Priority/Priority Byte Offset 814 " hexmask.long.byte 0x00 8.--15. 1. " INTID813 ,Interrupt ID813 Priority/Priority Byte Offset 813 " hexmask.long.byte 0x00 0.--7. 1. " INTID812 ,Interrupt ID812 Priority/Priority Byte Offset 812 " group.long 0x730++0x03 line.long 0x00 "GICD_IPRIORITYR204,Interrupt Priority Register 204" hexmask.long.byte 0x00 24.--31. 1. " INTID819 ,Interrupt ID819 Priority/Priority Byte Offset 819 " hexmask.long.byte 0x00 16.--23. 1. " INTID818 ,Interrupt ID818 Priority/Priority Byte Offset 818 " hexmask.long.byte 0x00 8.--15. 1. " INTID817 ,Interrupt ID817 Priority/Priority Byte Offset 817 " hexmask.long.byte 0x00 0.--7. 1. " INTID816 ,Interrupt ID816 Priority/Priority Byte Offset 816 " group.long 0x734++0x03 line.long 0x00 "GICD_IPRIORITYR205,Interrupt Priority Register 205" hexmask.long.byte 0x00 24.--31. 1. " INTID823 ,Interrupt ID823 Priority/Priority Byte Offset 823 " hexmask.long.byte 0x00 16.--23. 1. " INTID822 ,Interrupt ID822 Priority/Priority Byte Offset 822 " hexmask.long.byte 0x00 8.--15. 1. " INTID821 ,Interrupt ID821 Priority/Priority Byte Offset 821 " hexmask.long.byte 0x00 0.--7. 1. " INTID820 ,Interrupt ID820 Priority/Priority Byte Offset 820 " group.long 0x738++0x03 line.long 0x00 "GICD_IPRIORITYR206,Interrupt Priority Register 206" hexmask.long.byte 0x00 24.--31. 1. " INTID827 ,Interrupt ID827 Priority/Priority Byte Offset 827 " hexmask.long.byte 0x00 16.--23. 1. " INTID826 ,Interrupt ID826 Priority/Priority Byte Offset 826 " hexmask.long.byte 0x00 8.--15. 1. " INTID825 ,Interrupt ID825 Priority/Priority Byte Offset 825 " hexmask.long.byte 0x00 0.--7. 1. " INTID824 ,Interrupt ID824 Priority/Priority Byte Offset 824 " group.long 0x73C++0x03 line.long 0x00 "GICD_IPRIORITYR207,Interrupt Priority Register 207" hexmask.long.byte 0x00 24.--31. 1. " INTID831 ,Interrupt ID831 Priority/Priority Byte Offset 831 " hexmask.long.byte 0x00 16.--23. 1. " INTID830 ,Interrupt ID830 Priority/Priority Byte Offset 830 " hexmask.long.byte 0x00 8.--15. 1. " INTID829 ,Interrupt ID829 Priority/Priority Byte Offset 829 " hexmask.long.byte 0x00 0.--7. 1. " INTID828 ,Interrupt ID828 Priority/Priority Byte Offset 828 " else rgroup.long 0x720++0x03 line.long 0x00 "GICD_IPRIORITYR200,Interrupt Priority Register 200" rgroup.long 0x724++0x03 line.long 0x00 "GICD_IPRIORITYR201,Interrupt Priority Register 201" rgroup.long 0x728++0x03 line.long 0x00 "GICD_IPRIORITYR202,Interrupt Priority Register 202" rgroup.long 0x72C++0x03 line.long 0x00 "GICD_IPRIORITYR203,Interrupt Priority Register 203" rgroup.long 0x730++0x03 line.long 0x00 "GICD_IPRIORITYR204,Interrupt Priority Register 204" rgroup.long 0x734++0x03 line.long 0x00 "GICD_IPRIORITYR205,Interrupt Priority Register 205" rgroup.long 0x738++0x03 line.long 0x00 "GICD_IPRIORITYR206,Interrupt Priority Register 206" rgroup.long 0x73C++0x03 line.long 0x00 "GICD_IPRIORITYR207,Interrupt Priority Register 207" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x1A) group.long 0x740++0x03 line.long 0x00 "GICD_IPRIORITYR208,Interrupt Priority Register 208" hexmask.long.byte 0x00 24.--31. 1. " INTID835 ,Interrupt ID835 Priority/Priority Byte Offset 835 " hexmask.long.byte 0x00 16.--23. 1. " INTID834 ,Interrupt ID834 Priority/Priority Byte Offset 834 " hexmask.long.byte 0x00 8.--15. 1. " INTID833 ,Interrupt ID833 Priority/Priority Byte Offset 833 " hexmask.long.byte 0x00 0.--7. 1. " INTID832 ,Interrupt ID832 Priority/Priority Byte Offset 832 " group.long 0x744++0x03 line.long 0x00 "GICD_IPRIORITYR209,Interrupt Priority Register 209" hexmask.long.byte 0x00 24.--31. 1. " INTID839 ,Interrupt ID839 Priority/Priority Byte Offset 839 " hexmask.long.byte 0x00 16.--23. 1. " INTID838 ,Interrupt ID838 Priority/Priority Byte Offset 838 " hexmask.long.byte 0x00 8.--15. 1. " INTID837 ,Interrupt ID837 Priority/Priority Byte Offset 837 " hexmask.long.byte 0x00 0.--7. 1. " INTID836 ,Interrupt ID836 Priority/Priority Byte Offset 836 " group.long 0x748++0x03 line.long 0x00 "GICD_IPRIORITYR210,Interrupt Priority Register 210" hexmask.long.byte 0x00 24.--31. 1. " INTID843 ,Interrupt ID843 Priority/Priority Byte Offset 843 " hexmask.long.byte 0x00 16.--23. 1. " INTID842 ,Interrupt ID842 Priority/Priority Byte Offset 842 " hexmask.long.byte 0x00 8.--15. 1. " INTID841 ,Interrupt ID841 Priority/Priority Byte Offset 841 " hexmask.long.byte 0x00 0.--7. 1. " INTID840 ,Interrupt ID840 Priority/Priority Byte Offset 840 " group.long 0x74C++0x03 line.long 0x00 "GICD_IPRIORITYR211,Interrupt Priority Register 211" hexmask.long.byte 0x00 24.--31. 1. " INTID847 ,Interrupt ID847 Priority/Priority Byte Offset 847 " hexmask.long.byte 0x00 16.--23. 1. " INTID846 ,Interrupt ID846 Priority/Priority Byte Offset 846 " hexmask.long.byte 0x00 8.--15. 1. " INTID845 ,Interrupt ID845 Priority/Priority Byte Offset 845 " hexmask.long.byte 0x00 0.--7. 1. " INTID844 ,Interrupt ID844 Priority/Priority Byte Offset 844 " group.long 0x750++0x03 line.long 0x00 "GICD_IPRIORITYR212,Interrupt Priority Register 212" hexmask.long.byte 0x00 24.--31. 1. " INTID851 ,Interrupt ID851 Priority/Priority Byte Offset 851 " hexmask.long.byte 0x00 16.--23. 1. " INTID850 ,Interrupt ID850 Priority/Priority Byte Offset 850 " hexmask.long.byte 0x00 8.--15. 1. " INTID849 ,Interrupt ID849 Priority/Priority Byte Offset 849 " hexmask.long.byte 0x00 0.--7. 1. " INTID848 ,Interrupt ID848 Priority/Priority Byte Offset 848 " group.long 0x754++0x03 line.long 0x00 "GICD_IPRIORITYR213,Interrupt Priority Register 213" hexmask.long.byte 0x00 24.--31. 1. " INTID855 ,Interrupt ID855 Priority/Priority Byte Offset 855 " hexmask.long.byte 0x00 16.--23. 1. " INTID854 ,Interrupt ID854 Priority/Priority Byte Offset 854 " hexmask.long.byte 0x00 8.--15. 1. " INTID853 ,Interrupt ID853 Priority/Priority Byte Offset 853 " hexmask.long.byte 0x00 0.--7. 1. " INTID852 ,Interrupt ID852 Priority/Priority Byte Offset 852 " group.long 0x758++0x03 line.long 0x00 "GICD_IPRIORITYR214,Interrupt Priority Register 214" hexmask.long.byte 0x00 24.--31. 1. " INTID859 ,Interrupt ID859 Priority/Priority Byte Offset 859 " hexmask.long.byte 0x00 16.--23. 1. " INTID858 ,Interrupt ID858 Priority/Priority Byte Offset 858 " hexmask.long.byte 0x00 8.--15. 1. " INTID857 ,Interrupt ID857 Priority/Priority Byte Offset 857 " hexmask.long.byte 0x00 0.--7. 1. " INTID856 ,Interrupt ID856 Priority/Priority Byte Offset 856 " group.long 0x75C++0x03 line.long 0x00 "GICD_IPRIORITYR215,Interrupt Priority Register 215" hexmask.long.byte 0x00 24.--31. 1. " INTID863 ,Interrupt ID863 Priority/Priority Byte Offset 863 " hexmask.long.byte 0x00 16.--23. 1. " INTID862 ,Interrupt ID862 Priority/Priority Byte Offset 862 " hexmask.long.byte 0x00 8.--15. 1. " INTID861 ,Interrupt ID861 Priority/Priority Byte Offset 861 " hexmask.long.byte 0x00 0.--7. 1. " INTID860 ,Interrupt ID860 Priority/Priority Byte Offset 860 " else rgroup.long 0x740++0x03 line.long 0x00 "GICD_IPRIORITYR208,Interrupt Priority Register 208" rgroup.long 0x744++0x03 line.long 0x00 "GICD_IPRIORITYR209,Interrupt Priority Register 209" rgroup.long 0x748++0x03 line.long 0x00 "GICD_IPRIORITYR210,Interrupt Priority Register 210" rgroup.long 0x74C++0x03 line.long 0x00 "GICD_IPRIORITYR211,Interrupt Priority Register 211" rgroup.long 0x750++0x03 line.long 0x00 "GICD_IPRIORITYR212,Interrupt Priority Register 212" rgroup.long 0x754++0x03 line.long 0x00 "GICD_IPRIORITYR213,Interrupt Priority Register 213" rgroup.long 0x758++0x03 line.long 0x00 "GICD_IPRIORITYR214,Interrupt Priority Register 214" rgroup.long 0x75C++0x03 line.long 0x00 "GICD_IPRIORITYR215,Interrupt Priority Register 215" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x1B) group.long 0x760++0x03 line.long 0x00 "GICD_IPRIORITYR216,Interrupt Priority Register 216" hexmask.long.byte 0x00 24.--31. 1. " INTID867 ,Interrupt ID867 Priority/Priority Byte Offset 867 " hexmask.long.byte 0x00 16.--23. 1. " INTID866 ,Interrupt ID866 Priority/Priority Byte Offset 866 " hexmask.long.byte 0x00 8.--15. 1. " INTID865 ,Interrupt ID865 Priority/Priority Byte Offset 865 " hexmask.long.byte 0x00 0.--7. 1. " INTID864 ,Interrupt ID864 Priority/Priority Byte Offset 864 " group.long 0x764++0x03 line.long 0x00 "GICD_IPRIORITYR217,Interrupt Priority Register 217" hexmask.long.byte 0x00 24.--31. 1. " INTID871 ,Interrupt ID871 Priority/Priority Byte Offset 871 " hexmask.long.byte 0x00 16.--23. 1. " INTID870 ,Interrupt ID870 Priority/Priority Byte Offset 870 " hexmask.long.byte 0x00 8.--15. 1. " INTID869 ,Interrupt ID869 Priority/Priority Byte Offset 869 " hexmask.long.byte 0x00 0.--7. 1. " INTID868 ,Interrupt ID868 Priority/Priority Byte Offset 868 " group.long 0x768++0x03 line.long 0x00 "GICD_IPRIORITYR218,Interrupt Priority Register 218" hexmask.long.byte 0x00 24.--31. 1. " INTID875 ,Interrupt ID875 Priority/Priority Byte Offset 875 " hexmask.long.byte 0x00 16.--23. 1. " INTID874 ,Interrupt ID874 Priority/Priority Byte Offset 874 " hexmask.long.byte 0x00 8.--15. 1. " INTID873 ,Interrupt ID873 Priority/Priority Byte Offset 873 " hexmask.long.byte 0x00 0.--7. 1. " INTID872 ,Interrupt ID872 Priority/Priority Byte Offset 872 " group.long 0x76C++0x03 line.long 0x00 "GICD_IPRIORITYR219,Interrupt Priority Register 219" hexmask.long.byte 0x00 24.--31. 1. " INTID879 ,Interrupt ID879 Priority/Priority Byte Offset 879 " hexmask.long.byte 0x00 16.--23. 1. " INTID878 ,Interrupt ID878 Priority/Priority Byte Offset 878 " hexmask.long.byte 0x00 8.--15. 1. " INTID877 ,Interrupt ID877 Priority/Priority Byte Offset 877 " hexmask.long.byte 0x00 0.--7. 1. " INTID876 ,Interrupt ID876 Priority/Priority Byte Offset 876 " group.long 0x770++0x03 line.long 0x00 "GICD_IPRIORITYR220,Interrupt Priority Register 220" hexmask.long.byte 0x00 24.--31. 1. " INTID883 ,Interrupt ID883 Priority/Priority Byte Offset 883 " hexmask.long.byte 0x00 16.--23. 1. " INTID882 ,Interrupt ID882 Priority/Priority Byte Offset 882 " hexmask.long.byte 0x00 8.--15. 1. " INTID881 ,Interrupt ID881 Priority/Priority Byte Offset 881 " hexmask.long.byte 0x00 0.--7. 1. " INTID880 ,Interrupt ID880 Priority/Priority Byte Offset 880 " group.long 0x774++0x03 line.long 0x00 "GICD_IPRIORITYR221,Interrupt Priority Register 221" hexmask.long.byte 0x00 24.--31. 1. " INTID887 ,Interrupt ID887 Priority/Priority Byte Offset 887 " hexmask.long.byte 0x00 16.--23. 1. " INTID886 ,Interrupt ID886 Priority/Priority Byte Offset 886 " hexmask.long.byte 0x00 8.--15. 1. " INTID885 ,Interrupt ID885 Priority/Priority Byte Offset 885 " hexmask.long.byte 0x00 0.--7. 1. " INTID884 ,Interrupt ID884 Priority/Priority Byte Offset 884 " group.long 0x778++0x03 line.long 0x00 "GICD_IPRIORITYR222,Interrupt Priority Register 222" hexmask.long.byte 0x00 24.--31. 1. " INTID891 ,Interrupt ID891 Priority/Priority Byte Offset 891 " hexmask.long.byte 0x00 16.--23. 1. " INTID890 ,Interrupt ID890 Priority/Priority Byte Offset 890 " hexmask.long.byte 0x00 8.--15. 1. " INTID889 ,Interrupt ID889 Priority/Priority Byte Offset 889 " hexmask.long.byte 0x00 0.--7. 1. " INTID888 ,Interrupt ID888 Priority/Priority Byte Offset 888 " group.long 0x77C++0x03 line.long 0x00 "GICD_IPRIORITYR223,Interrupt Priority Register 223" hexmask.long.byte 0x00 24.--31. 1. " INTID895 ,Interrupt ID895 Priority/Priority Byte Offset 895 " hexmask.long.byte 0x00 16.--23. 1. " INTID894 ,Interrupt ID894 Priority/Priority Byte Offset 894 " hexmask.long.byte 0x00 8.--15. 1. " INTID893 ,Interrupt ID893 Priority/Priority Byte Offset 893 " hexmask.long.byte 0x00 0.--7. 1. " INTID892 ,Interrupt ID892 Priority/Priority Byte Offset 892 " else rgroup.long 0x760++0x03 line.long 0x00 "GICD_IPRIORITYR216,Interrupt Priority Register 216" rgroup.long 0x764++0x03 line.long 0x00 "GICD_IPRIORITYR217,Interrupt Priority Register 217" rgroup.long 0x768++0x03 line.long 0x00 "GICD_IPRIORITYR218,Interrupt Priority Register 218" rgroup.long 0x76C++0x03 line.long 0x00 "GICD_IPRIORITYR219,Interrupt Priority Register 219" rgroup.long 0x770++0x03 line.long 0x00 "GICD_IPRIORITYR220,Interrupt Priority Register 220" rgroup.long 0x774++0x03 line.long 0x00 "GICD_IPRIORITYR221,Interrupt Priority Register 221" rgroup.long 0x778++0x03 line.long 0x00 "GICD_IPRIORITYR222,Interrupt Priority Register 222" rgroup.long 0x77C++0x03 line.long 0x00 "GICD_IPRIORITYR223,Interrupt Priority Register 223" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x1C) group.long 0x780++0x03 line.long 0x00 "GICD_IPRIORITYR224,Interrupt Priority Register 224" hexmask.long.byte 0x00 24.--31. 1. " INTID899 ,Interrupt ID899 Priority/Priority Byte Offset 899 " hexmask.long.byte 0x00 16.--23. 1. " INTID898 ,Interrupt ID898 Priority/Priority Byte Offset 898 " hexmask.long.byte 0x00 8.--15. 1. " INTID897 ,Interrupt ID897 Priority/Priority Byte Offset 897 " hexmask.long.byte 0x00 0.--7. 1. " INTID896 ,Interrupt ID896 Priority/Priority Byte Offset 896 " group.long 0x784++0x03 line.long 0x00 "GICD_IPRIORITYR225,Interrupt Priority Register 225" hexmask.long.byte 0x00 24.--31. 1. " INTID903 ,Interrupt ID903 Priority/Priority Byte Offset 903 " hexmask.long.byte 0x00 16.--23. 1. " INTID902 ,Interrupt ID902 Priority/Priority Byte Offset 902 " hexmask.long.byte 0x00 8.--15. 1. " INTID901 ,Interrupt ID901 Priority/Priority Byte Offset 901 " hexmask.long.byte 0x00 0.--7. 1. " INTID900 ,Interrupt ID900 Priority/Priority Byte Offset 900 " group.long 0x788++0x03 line.long 0x00 "GICD_IPRIORITYR226,Interrupt Priority Register 226" hexmask.long.byte 0x00 24.--31. 1. " INTID907 ,Interrupt ID907 Priority/Priority Byte Offset 907 " hexmask.long.byte 0x00 16.--23. 1. " INTID906 ,Interrupt ID906 Priority/Priority Byte Offset 906 " hexmask.long.byte 0x00 8.--15. 1. " INTID905 ,Interrupt ID905 Priority/Priority Byte Offset 905 " hexmask.long.byte 0x00 0.--7. 1. " INTID904 ,Interrupt ID904 Priority/Priority Byte Offset 904 " group.long 0x78C++0x03 line.long 0x00 "GICD_IPRIORITYR227,Interrupt Priority Register 227" hexmask.long.byte 0x00 24.--31. 1. " INTID911 ,Interrupt ID911 Priority/Priority Byte Offset 911 " hexmask.long.byte 0x00 16.--23. 1. " INTID910 ,Interrupt ID910 Priority/Priority Byte Offset 910 " hexmask.long.byte 0x00 8.--15. 1. " INTID909 ,Interrupt ID909 Priority/Priority Byte Offset 909 " hexmask.long.byte 0x00 0.--7. 1. " INTID908 ,Interrupt ID908 Priority/Priority Byte Offset 908 " group.long 0x790++0x03 line.long 0x00 "GICD_IPRIORITYR228,Interrupt Priority Register 228" hexmask.long.byte 0x00 24.--31. 1. " INTID915 ,Interrupt ID915 Priority/Priority Byte Offset 915 " hexmask.long.byte 0x00 16.--23. 1. " INTID914 ,Interrupt ID914 Priority/Priority Byte Offset 914 " hexmask.long.byte 0x00 8.--15. 1. " INTID913 ,Interrupt ID913 Priority/Priority Byte Offset 913 " hexmask.long.byte 0x00 0.--7. 1. " INTID912 ,Interrupt ID912 Priority/Priority Byte Offset 912 " group.long 0x794++0x03 line.long 0x00 "GICD_IPRIORITYR229,Interrupt Priority Register 229" hexmask.long.byte 0x00 24.--31. 1. " INTID919 ,Interrupt ID919 Priority/Priority Byte Offset 919 " hexmask.long.byte 0x00 16.--23. 1. " INTID918 ,Interrupt ID918 Priority/Priority Byte Offset 918 " hexmask.long.byte 0x00 8.--15. 1. " INTID917 ,Interrupt ID917 Priority/Priority Byte Offset 917 " hexmask.long.byte 0x00 0.--7. 1. " INTID916 ,Interrupt ID916 Priority/Priority Byte Offset 916 " group.long 0x798++0x03 line.long 0x00 "GICD_IPRIORITYR230,Interrupt Priority Register 230" hexmask.long.byte 0x00 24.--31. 1. " INTID923 ,Interrupt ID923 Priority/Priority Byte Offset 923 " hexmask.long.byte 0x00 16.--23. 1. " INTID922 ,Interrupt ID922 Priority/Priority Byte Offset 922 " hexmask.long.byte 0x00 8.--15. 1. " INTID921 ,Interrupt ID921 Priority/Priority Byte Offset 921 " hexmask.long.byte 0x00 0.--7. 1. " INTID920 ,Interrupt ID920 Priority/Priority Byte Offset 920 " group.long 0x79C++0x03 line.long 0x00 "GICD_IPRIORITYR231,Interrupt Priority Register 231" hexmask.long.byte 0x00 24.--31. 1. " INTID927 ,Interrupt ID927 Priority/Priority Byte Offset 927 " hexmask.long.byte 0x00 16.--23. 1. " INTID926 ,Interrupt ID926 Priority/Priority Byte Offset 926 " hexmask.long.byte 0x00 8.--15. 1. " INTID925 ,Interrupt ID925 Priority/Priority Byte Offset 925 " hexmask.long.byte 0x00 0.--7. 1. " INTID924 ,Interrupt ID924 Priority/Priority Byte Offset 924 " else rgroup.long 0x780++0x03 line.long 0x00 "GICD_IPRIORITYR224,Interrupt Priority Register 224" rgroup.long 0x784++0x03 line.long 0x00 "GICD_IPRIORITYR225,Interrupt Priority Register 225" rgroup.long 0x788++0x03 line.long 0x00 "GICD_IPRIORITYR226,Interrupt Priority Register 226" rgroup.long 0x78C++0x03 line.long 0x00 "GICD_IPRIORITYR227,Interrupt Priority Register 227" rgroup.long 0x790++0x03 line.long 0x00 "GICD_IPRIORITYR228,Interrupt Priority Register 228" rgroup.long 0x794++0x03 line.long 0x00 "GICD_IPRIORITYR229,Interrupt Priority Register 229" rgroup.long 0x798++0x03 line.long 0x00 "GICD_IPRIORITYR230,Interrupt Priority Register 230" rgroup.long 0x79C++0x03 line.long 0x00 "GICD_IPRIORITYR231,Interrupt Priority Register 231" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x1D) group.long 0x7A0++0x03 line.long 0x00 "GICD_IPRIORITYR232,Interrupt Priority Register 232" hexmask.long.byte 0x00 24.--31. 1. " INTID931 ,Interrupt ID931 Priority/Priority Byte Offset 931 " hexmask.long.byte 0x00 16.--23. 1. " INTID930 ,Interrupt ID930 Priority/Priority Byte Offset 930 " hexmask.long.byte 0x00 8.--15. 1. " INTID929 ,Interrupt ID929 Priority/Priority Byte Offset 929 " hexmask.long.byte 0x00 0.--7. 1. " INTID928 ,Interrupt ID928 Priority/Priority Byte Offset 928 " group.long 0x7A4++0x03 line.long 0x00 "GICD_IPRIORITYR233,Interrupt Priority Register 233" hexmask.long.byte 0x00 24.--31. 1. " INTID935 ,Interrupt ID935 Priority/Priority Byte Offset 935 " hexmask.long.byte 0x00 16.--23. 1. " INTID934 ,Interrupt ID934 Priority/Priority Byte Offset 934 " hexmask.long.byte 0x00 8.--15. 1. " INTID933 ,Interrupt ID933 Priority/Priority Byte Offset 933 " hexmask.long.byte 0x00 0.--7. 1. " INTID932 ,Interrupt ID932 Priority/Priority Byte Offset 932 " group.long 0x7A8++0x03 line.long 0x00 "GICD_IPRIORITYR234,Interrupt Priority Register 234" hexmask.long.byte 0x00 24.--31. 1. " INTID939 ,Interrupt ID939 Priority/Priority Byte Offset 939 " hexmask.long.byte 0x00 16.--23. 1. " INTID938 ,Interrupt ID938 Priority/Priority Byte Offset 938 " hexmask.long.byte 0x00 8.--15. 1. " INTID937 ,Interrupt ID937 Priority/Priority Byte Offset 937 " hexmask.long.byte 0x00 0.--7. 1. " INTID936 ,Interrupt ID936 Priority/Priority Byte Offset 936 " group.long 0x7AC++0x03 line.long 0x00 "GICD_IPRIORITYR235,Interrupt Priority Register 235" hexmask.long.byte 0x00 24.--31. 1. " INTID943 ,Interrupt ID943 Priority/Priority Byte Offset 943 " hexmask.long.byte 0x00 16.--23. 1. " INTID942 ,Interrupt ID942 Priority/Priority Byte Offset 942 " hexmask.long.byte 0x00 8.--15. 1. " INTID941 ,Interrupt ID941 Priority/Priority Byte Offset 941 " hexmask.long.byte 0x00 0.--7. 1. " INTID940 ,Interrupt ID940 Priority/Priority Byte Offset 940 " group.long 0x7B0++0x03 line.long 0x00 "GICD_IPRIORITYR236,Interrupt Priority Register 236" hexmask.long.byte 0x00 24.--31. 1. " INTID947 ,Interrupt ID947 Priority/Priority Byte Offset 947 " hexmask.long.byte 0x00 16.--23. 1. " INTID946 ,Interrupt ID946 Priority/Priority Byte Offset 946 " hexmask.long.byte 0x00 8.--15. 1. " INTID945 ,Interrupt ID945 Priority/Priority Byte Offset 945 " hexmask.long.byte 0x00 0.--7. 1. " INTID944 ,Interrupt ID944 Priority/Priority Byte Offset 944 " group.long 0x7B4++0x03 line.long 0x00 "GICD_IPRIORITYR237,Interrupt Priority Register 237" hexmask.long.byte 0x00 24.--31. 1. " INTID951 ,Interrupt ID951 Priority/Priority Byte Offset 951 " hexmask.long.byte 0x00 16.--23. 1. " INTID950 ,Interrupt ID950 Priority/Priority Byte Offset 950 " hexmask.long.byte 0x00 8.--15. 1. " INTID949 ,Interrupt ID949 Priority/Priority Byte Offset 949 " hexmask.long.byte 0x00 0.--7. 1. " INTID948 ,Interrupt ID948 Priority/Priority Byte Offset 948 " group.long 0x7B8++0x03 line.long 0x00 "GICD_IPRIORITYR238,Interrupt Priority Register 238" hexmask.long.byte 0x00 24.--31. 1. " INTID955 ,Interrupt ID955 Priority/Priority Byte Offset 955 " hexmask.long.byte 0x00 16.--23. 1. " INTID954 ,Interrupt ID954 Priority/Priority Byte Offset 954 " hexmask.long.byte 0x00 8.--15. 1. " INTID953 ,Interrupt ID953 Priority/Priority Byte Offset 953 " hexmask.long.byte 0x00 0.--7. 1. " INTID952 ,Interrupt ID952 Priority/Priority Byte Offset 952 " group.long 0x7BC++0x03 line.long 0x00 "GICD_IPRIORITYR239,Interrupt Priority Register 239" hexmask.long.byte 0x00 24.--31. 1. " INTID959 ,Interrupt ID959 Priority/Priority Byte Offset 959 " hexmask.long.byte 0x00 16.--23. 1. " INTID958 ,Interrupt ID958 Priority/Priority Byte Offset 958 " hexmask.long.byte 0x00 8.--15. 1. " INTID957 ,Interrupt ID957 Priority/Priority Byte Offset 957 " hexmask.long.byte 0x00 0.--7. 1. " INTID956 ,Interrupt ID956 Priority/Priority Byte Offset 956 " else rgroup.long 0x7A0++0x03 line.long 0x00 "GICD_IPRIORITYR232,Interrupt Priority Register 232" rgroup.long 0x7A4++0x03 line.long 0x00 "GICD_IPRIORITYR233,Interrupt Priority Register 233" rgroup.long 0x7A8++0x03 line.long 0x00 "GICD_IPRIORITYR234,Interrupt Priority Register 234" rgroup.long 0x7AC++0x03 line.long 0x00 "GICD_IPRIORITYR235,Interrupt Priority Register 235" rgroup.long 0x7B0++0x03 line.long 0x00 "GICD_IPRIORITYR236,Interrupt Priority Register 236" rgroup.long 0x7B4++0x03 line.long 0x00 "GICD_IPRIORITYR237,Interrupt Priority Register 237" rgroup.long 0x7B8++0x03 line.long 0x00 "GICD_IPRIORITYR238,Interrupt Priority Register 238" rgroup.long 0x7BC++0x03 line.long 0x00 "GICD_IPRIORITYR239,Interrupt Priority Register 239" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x1E) group.long 0x7C0++0x03 line.long 0x00 "GICD_IPRIORITYR240,Interrupt Priority Register 240" hexmask.long.byte 0x00 24.--31. 1. " INTID963 ,Interrupt ID963 Priority/Priority Byte Offset 963 " hexmask.long.byte 0x00 16.--23. 1. " INTID962 ,Interrupt ID962 Priority/Priority Byte Offset 962 " hexmask.long.byte 0x00 8.--15. 1. " INTID961 ,Interrupt ID961 Priority/Priority Byte Offset 961 " hexmask.long.byte 0x00 0.--7. 1. " INTID960 ,Interrupt ID960 Priority/Priority Byte Offset 960 " group.long 0x7C4++0x03 line.long 0x00 "GICD_IPRIORITYR241,Interrupt Priority Register 241" hexmask.long.byte 0x00 24.--31. 1. " INTID967 ,Interrupt ID967 Priority/Priority Byte Offset 967 " hexmask.long.byte 0x00 16.--23. 1. " INTID966 ,Interrupt ID966 Priority/Priority Byte Offset 966 " hexmask.long.byte 0x00 8.--15. 1. " INTID965 ,Interrupt ID965 Priority/Priority Byte Offset 965 " hexmask.long.byte 0x00 0.--7. 1. " INTID964 ,Interrupt ID964 Priority/Priority Byte Offset 964 " group.long 0x7C8++0x03 line.long 0x00 "GICD_IPRIORITYR242,Interrupt Priority Register 242" hexmask.long.byte 0x00 24.--31. 1. " INTID971 ,Interrupt ID971 Priority/Priority Byte Offset 971 " hexmask.long.byte 0x00 16.--23. 1. " INTID970 ,Interrupt ID970 Priority/Priority Byte Offset 970 " hexmask.long.byte 0x00 8.--15. 1. " INTID969 ,Interrupt ID969 Priority/Priority Byte Offset 969 " hexmask.long.byte 0x00 0.--7. 1. " INTID968 ,Interrupt ID968 Priority/Priority Byte Offset 968 " group.long 0x7CC++0x03 line.long 0x00 "GICD_IPRIORITYR243,Interrupt Priority Register 243" hexmask.long.byte 0x00 24.--31. 1. " INTID975 ,Interrupt ID975 Priority/Priority Byte Offset 975 " hexmask.long.byte 0x00 16.--23. 1. " INTID974 ,Interrupt ID974 Priority/Priority Byte Offset 974 " hexmask.long.byte 0x00 8.--15. 1. " INTID973 ,Interrupt ID973 Priority/Priority Byte Offset 973 " hexmask.long.byte 0x00 0.--7. 1. " INTID972 ,Interrupt ID972 Priority/Priority Byte Offset 972 " group.long 0x7D0++0x03 line.long 0x00 "GICD_IPRIORITYR244,Interrupt Priority Register 244" hexmask.long.byte 0x00 24.--31. 1. " INTID979 ,Interrupt ID979 Priority/Priority Byte Offset 979 " hexmask.long.byte 0x00 16.--23. 1. " INTID978 ,Interrupt ID978 Priority/Priority Byte Offset 978 " hexmask.long.byte 0x00 8.--15. 1. " INTID977 ,Interrupt ID977 Priority/Priority Byte Offset 977 " hexmask.long.byte 0x00 0.--7. 1. " INTID976 ,Interrupt ID976 Priority/Priority Byte Offset 976 " group.long 0x7D4++0x03 line.long 0x00 "GICD_IPRIORITYR245,Interrupt Priority Register 245" hexmask.long.byte 0x00 24.--31. 1. " INTID983 ,Interrupt ID983 Priority/Priority Byte Offset 983 " hexmask.long.byte 0x00 16.--23. 1. " INTID982 ,Interrupt ID982 Priority/Priority Byte Offset 982 " hexmask.long.byte 0x00 8.--15. 1. " INTID981 ,Interrupt ID981 Priority/Priority Byte Offset 981 " hexmask.long.byte 0x00 0.--7. 1. " INTID980 ,Interrupt ID980 Priority/Priority Byte Offset 980 " group.long 0x7D8++0x03 line.long 0x00 "GICD_IPRIORITYR246,Interrupt Priority Register 246" hexmask.long.byte 0x00 24.--31. 1. " INTID987 ,Interrupt ID987 Priority/Priority Byte Offset 987 " hexmask.long.byte 0x00 16.--23. 1. " INTID986 ,Interrupt ID986 Priority/Priority Byte Offset 986 " hexmask.long.byte 0x00 8.--15. 1. " INTID985 ,Interrupt ID985 Priority/Priority Byte Offset 985 " hexmask.long.byte 0x00 0.--7. 1. " INTID984 ,Interrupt ID984 Priority/Priority Byte Offset 984 " group.long 0x7DC++0x03 line.long 0x00 "GICD_IPRIORITYR247,Interrupt Priority Register 247" hexmask.long.byte 0x00 24.--31. 1. " INTID991 ,Interrupt ID991 Priority/Priority Byte Offset 991 " hexmask.long.byte 0x00 16.--23. 1. " INTID990 ,Interrupt ID990 Priority/Priority Byte Offset 990 " hexmask.long.byte 0x00 8.--15. 1. " INTID989 ,Interrupt ID989 Priority/Priority Byte Offset 989 " hexmask.long.byte 0x00 0.--7. 1. " INTID988 ,Interrupt ID988 Priority/Priority Byte Offset 988 " else rgroup.long 0x7C0++0x03 line.long 0x00 "GICD_IPRIORITYR240,Interrupt Priority Register 240" rgroup.long 0x7C4++0x03 line.long 0x00 "GICD_IPRIORITYR241,Interrupt Priority Register 241" rgroup.long 0x7C8++0x03 line.long 0x00 "GICD_IPRIORITYR242,Interrupt Priority Register 242" rgroup.long 0x7CC++0x03 line.long 0x00 "GICD_IPRIORITYR243,Interrupt Priority Register 243" rgroup.long 0x7D0++0x03 line.long 0x00 "GICD_IPRIORITYR244,Interrupt Priority Register 244" rgroup.long 0x7D4++0x03 line.long 0x00 "GICD_IPRIORITYR245,Interrupt Priority Register 245" rgroup.long 0x7D8++0x03 line.long 0x00 "GICD_IPRIORITYR246,Interrupt Priority Register 246" rgroup.long 0x7DC++0x03 line.long 0x00 "GICD_IPRIORITYR247,Interrupt Priority Register 247" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x1F) group.long 0x7E0++0x03 line.long 0x00 "GICD_IPRIORITYR248,Interrupt Priority Register 248" hexmask.long.byte 0x00 24.--31. 1. " INTID995 ,Interrupt ID995 Priority/Priority Byte Offset 995 " hexmask.long.byte 0x00 16.--23. 1. " INTID994 ,Interrupt ID994 Priority/Priority Byte Offset 994 " hexmask.long.byte 0x00 8.--15. 1. " INTID993 ,Interrupt ID993 Priority/Priority Byte Offset 993 " hexmask.long.byte 0x00 0.--7. 1. " INTID992 ,Interrupt ID992 Priority/Priority Byte Offset 992 " group.long 0x7E4++0x03 line.long 0x00 "GICD_IPRIORITYR249,Interrupt Priority Register 249" hexmask.long.byte 0x00 24.--31. 1. " INTID999 ,Interrupt ID999 Priority/Priority Byte Offset 999 " hexmask.long.byte 0x00 16.--23. 1. " INTID998 ,Interrupt ID998 Priority/Priority Byte Offset 998 " hexmask.long.byte 0x00 8.--15. 1. " INTID997 ,Interrupt ID997 Priority/Priority Byte Offset 997 " hexmask.long.byte 0x00 0.--7. 1. " INTID996 ,Interrupt ID996 Priority/Priority Byte Offset 996 " group.long 0x7E8++0x03 line.long 0x00 "GICD_IPRIORITYR250,Interrupt Priority Register 250" hexmask.long.byte 0x00 24.--31. 1. " INTID1003 ,Interrupt ID1003 Priority/Priority Byte Offset 1003" hexmask.long.byte 0x00 16.--23. 1. " INTID1002 ,Interrupt ID1002 Priority/Priority Byte Offset 1002" hexmask.long.byte 0x00 8.--15. 1. " INTID1001 ,Interrupt ID1001 Priority/Priority Byte Offset 1001" hexmask.long.byte 0x00 0.--7. 1. " INTID1000 ,Interrupt ID1000 Priority/Priority Byte Offset 1000" group.long 0x7EC++0x03 line.long 0x00 "GICD_IPRIORITYR251,Interrupt Priority Register 251" hexmask.long.byte 0x00 24.--31. 1. " INTID1007 ,Interrupt ID1007 Priority/Priority Byte Offset 1007" hexmask.long.byte 0x00 16.--23. 1. " INTID1006 ,Interrupt ID1006 Priority/Priority Byte Offset 1006" hexmask.long.byte 0x00 8.--15. 1. " INTID1005 ,Interrupt ID1005 Priority/Priority Byte Offset 1005" hexmask.long.byte 0x00 0.--7. 1. " INTID1004 ,Interrupt ID1004 Priority/Priority Byte Offset 1004" group.long 0x7F0++0x03 line.long 0x00 "GICD_IPRIORITYR252,Interrupt Priority Register 252" hexmask.long.byte 0x00 24.--31. 1. " INTID1011 ,Interrupt ID1011 Priority/Priority Byte Offset 1011" hexmask.long.byte 0x00 16.--23. 1. " INTID1010 ,Interrupt ID1010 Priority/Priority Byte Offset 1010" hexmask.long.byte 0x00 8.--15. 1. " INTID1009 ,Interrupt ID1009 Priority/Priority Byte Offset 1009" hexmask.long.byte 0x00 0.--7. 1. " INTID1008 ,Interrupt ID1008 Priority/Priority Byte Offset 1008" group.long 0x7F4++0x03 line.long 0x00 "GICD_IPRIORITYR253,Interrupt Priority Register 253" hexmask.long.byte 0x00 24.--31. 1. " INTID1015 ,Interrupt ID1015 Priority/Priority Byte Offset 1015" hexmask.long.byte 0x00 16.--23. 1. " INTID1014 ,Interrupt ID1014 Priority/Priority Byte Offset 1014" hexmask.long.byte 0x00 8.--15. 1. " INTID1013 ,Interrupt ID1013 Priority/Priority Byte Offset 1013" hexmask.long.byte 0x00 0.--7. 1. " INTID1012 ,Interrupt ID1012 Priority/Priority Byte Offset 1012" group.long 0x7F8++0x03 line.long 0x00 "GICD_IPRIORITYR254,Interrupt Priority Register 254" hexmask.long.byte 0x00 24.--31. 1. " INTID1019 ,Interrupt ID1019 Priority/Priority Byte Offset 1019" hexmask.long.byte 0x00 16.--23. 1. " INTID1018 ,Interrupt ID1018 Priority/Priority Byte Offset 1018" hexmask.long.byte 0x00 8.--15. 1. " INTID1017 ,Interrupt ID1017 Priority/Priority Byte Offset 1017" hexmask.long.byte 0x00 0.--7. 1. " INTID1016 ,Interrupt ID1016 Priority/Priority Byte Offset 1016" else rgroup.long 0x7E0++0x03 line.long 0x00 "GICD_IPRIORITYR248,Interrupt Priority Register 248" rgroup.long 0x7E4++0x03 line.long 0x00 "GICD_IPRIORITYR249,Interrupt Priority Register 249" rgroup.long 0x7E8++0x03 line.long 0x00 "GICD_IPRIORITYR250,Interrupt Priority Register 250" rgroup.long 0x7EC++0x03 line.long 0x00 "GICD_IPRIORITYR251,Interrupt Priority Register 251" rgroup.long 0x7F0++0x03 line.long 0x00 "GICD_IPRIORITYR252,Interrupt Priority Register 252" rgroup.long 0x7F4++0x03 line.long 0x00 "GICD_IPRIORITYR253,Interrupt Priority Register 253" rgroup.long 0x7F8++0x03 line.long 0x00 "GICD_IPRIORITYR254,Interrupt Priority Register 254" endif tree.end width 19. tree "Processor Targets Registers" if (((per.l(ad:0xF9010000+0x04))&0x000000E0)>0x1) rgroup.long 0x800++0x03 line.long 0x00 "GICD_ITARGETSR0,Interrupt Processor Targets Register 0" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0 " rgroup.long 0x804++0x03 line.long 0x00 "GICD_ITARGETSR1,Interrupt Processor Targets Register 1" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO7 ,CPU Targets Byte Offset 7 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO6 ,CPU Targets Byte Offset 6 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO5 ,CPU Targets Byte Offset 5 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO4 ,CPU Targets Byte Offset 4 " rgroup.long 0x808++0x03 line.long 0x00 "GICD_ITARGETSR2,Interrupt Processor Targets Register 2" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO11 ,CPU Targets Byte Offset 11 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO10 ,CPU Targets Byte Offset 10 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO9 ,CPU Targets Byte Offset 9 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO8 ,CPU Targets Byte Offset 8 " rgroup.long 0x80C++0x03 line.long 0x00 "GICD_ITARGETSR3,Interrupt Processor Targets Register 3" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO15 ,CPU Targets Byte Offset 15 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO14 ,CPU Targets Byte Offset 14 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO13 ,CPU Targets Byte Offset 13 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO12 ,CPU Targets Byte Offset 12 " rgroup.long 0x810++0x03 line.long 0x00 "GICD_ITARGETSR4,Interrupt Processor Targets Register 4" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO19 ,CPU Targets Byte Offset 19 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO18 ,CPU Targets Byte Offset 18 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO17 ,CPU Targets Byte Offset 17 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO16 ,CPU Targets Byte Offset 16 " rgroup.long 0x814++0x03 line.long 0x00 "GICD_ITARGETSR5,Interrupt Processor Targets Register 5" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO23 ,CPU Targets Byte Offset 23 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO22 ,CPU Targets Byte Offset 22 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO21 ,CPU Targets Byte Offset 21 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO20 ,CPU Targets Byte Offset 20 " rgroup.long 0x818++0x03 line.long 0x00 "GICD_ITARGETSR6,Interrupt Processor Targets Register 6" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO27 ,CPU Targets Byte Offset 27 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO26 ,CPU Targets Byte Offset 26 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO25 ,CPU Targets Byte Offset 25 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO24 ,CPU Targets Byte Offset 24 " rgroup.long 0x81C++0x03 line.long 0x00 "GICD_ITARGETSR7,Interrupt Processor Targets Register 7" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO31 ,CPU Targets Byte Offset 31 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO30 ,CPU Targets Byte Offset 30 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO29 ,CPU Targets Byte Offset 29 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO28 ,CPU Targets Byte Offset 28 " if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x01) group.long 0x820++0x03 line.long 0x00 "GICD_ITARGETSR8,Interrupt Processor Targets Register 8" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO35 ,CPU Targets Byte Offset 35 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO34 ,CPU Targets Byte Offset 34 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO33 ,CPU Targets Byte Offset 33 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO32 ,CPU Targets Byte Offset 32 " group.long 0x824++0x03 line.long 0x00 "GICD_ITARGETSR9,Interrupt Processor Targets Register 9" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO39 ,CPU Targets Byte Offset 39 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO38 ,CPU Targets Byte Offset 38 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO37 ,CPU Targets Byte Offset 37 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO36 ,CPU Targets Byte Offset 36 " group.long 0x828++0x03 line.long 0x00 "GICD_ITARGETSR10,Interrupt Processor Targets Register 10" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO43 ,CPU Targets Byte Offset 43 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO42 ,CPU Targets Byte Offset 42 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO41 ,CPU Targets Byte Offset 41 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO40 ,CPU Targets Byte Offset 40 " group.long 0x82C++0x03 line.long 0x00 "GICD_ITARGETSR11,Interrupt Processor Targets Register 11" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO47 ,CPU Targets Byte Offset 47 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO46 ,CPU Targets Byte Offset 46 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO45 ,CPU Targets Byte Offset 45 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO44 ,CPU Targets Byte Offset 44 " group.long 0x830++0x03 line.long 0x00 "GICD_ITARGETSR12,Interrupt Processor Targets Register 12" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO51 ,CPU Targets Byte Offset 51 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO50 ,CPU Targets Byte Offset 50 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO49 ,CPU Targets Byte Offset 49 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO48 ,CPU Targets Byte Offset 48 " group.long 0x834++0x03 line.long 0x00 "GICD_ITARGETSR13,Interrupt Processor Targets Register 13" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO55 ,CPU Targets Byte Offset 55 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO54 ,CPU Targets Byte Offset 54 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO53 ,CPU Targets Byte Offset 53 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO52 ,CPU Targets Byte Offset 52 " group.long 0x838++0x03 line.long 0x00 "GICD_ITARGETSR14,Interrupt Processor Targets Register 14" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO59 ,CPU Targets Byte Offset 59 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO58 ,CPU Targets Byte Offset 58 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO57 ,CPU Targets Byte Offset 57 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO56 ,CPU Targets Byte Offset 56 " group.long 0x83C++0x03 line.long 0x00 "GICD_ITARGETSR15,Interrupt Processor Targets Register 15" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO63 ,CPU Targets Byte Offset 63 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO62 ,CPU Targets Byte Offset 62 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO61 ,CPU Targets Byte Offset 61 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO60 ,CPU Targets Byte Offset 60 " else rgroup.long 0x820++0x03 line.long 0x00 "GICD_ITARGETSR8,Interrupt Processor Targets Register 8" rgroup.long 0x824++0x03 line.long 0x00 "GICD_ITARGETSR9,Interrupt Processor Targets Register 9" rgroup.long 0x828++0x03 line.long 0x00 "GICD_ITARGETSR10,Interrupt Processor Targets Register 10" rgroup.long 0x82C++0x03 line.long 0x00 "GICD_ITARGETSR11,Interrupt Processor Targets Register 11" rgroup.long 0x830++0x03 line.long 0x00 "GICD_ITARGETSR12,Interrupt Processor Targets Register 12" rgroup.long 0x834++0x03 line.long 0x00 "GICD_ITARGETSR13,Interrupt Processor Targets Register 13" rgroup.long 0x838++0x03 line.long 0x00 "GICD_ITARGETSR14,Interrupt Processor Targets Register 14" rgroup.long 0x83C++0x03 line.long 0x00 "GICD_ITARGETSR15,Interrupt Processor Targets Register 15" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x02) group.long 0x840++0x03 line.long 0x00 "GICD_ITARGETSR16,Interrupt Processor Targets Register 16" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO67 ,CPU Targets Byte Offset 67 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO66 ,CPU Targets Byte Offset 66 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO65 ,CPU Targets Byte Offset 65 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO64 ,CPU Targets Byte Offset 64 " group.long 0x844++0x03 line.long 0x00 "GICD_ITARGETSR17,Interrupt Processor Targets Register 17" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO71 ,CPU Targets Byte Offset 71 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO70 ,CPU Targets Byte Offset 70 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO69 ,CPU Targets Byte Offset 69 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO68 ,CPU Targets Byte Offset 68 " group.long 0x848++0x03 line.long 0x00 "GICD_ITARGETSR18,Interrupt Processor Targets Register 18" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO75 ,CPU Targets Byte Offset 75 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO74 ,CPU Targets Byte Offset 74 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO73 ,CPU Targets Byte Offset 73 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO72 ,CPU Targets Byte Offset 72 " group.long 0x84C++0x03 line.long 0x00 "GICD_ITARGETSR19,Interrupt Processor Targets Register 19" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO79 ,CPU Targets Byte Offset 79 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO78 ,CPU Targets Byte Offset 78 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO77 ,CPU Targets Byte Offset 77 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO76 ,CPU Targets Byte Offset 76 " group.long 0x850++0x03 line.long 0x00 "GICD_ITARGETSR20,Interrupt Processor Targets Register 20" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO83 ,CPU Targets Byte Offset 83 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO82 ,CPU Targets Byte Offset 82 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO81 ,CPU Targets Byte Offset 81 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO80 ,CPU Targets Byte Offset 80 " group.long 0x854++0x03 line.long 0x00 "GICD_ITARGETSR21,Interrupt Processor Targets Register 21" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO87 ,CPU Targets Byte Offset 87 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO86 ,CPU Targets Byte Offset 86 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO85 ,CPU Targets Byte Offset 85 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO84 ,CPU Targets Byte Offset 84 " group.long 0x858++0x03 line.long 0x00 "GICD_ITARGETSR22,Interrupt Processor Targets Register 22" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO91 ,CPU Targets Byte Offset 91 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO90 ,CPU Targets Byte Offset 90 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO89 ,CPU Targets Byte Offset 89 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO88 ,CPU Targets Byte Offset 88 " group.long 0x85C++0x03 line.long 0x00 "GICD_ITARGETSR23,Interrupt Processor Targets Register 23" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO95 ,CPU Targets Byte Offset 95 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO94 ,CPU Targets Byte Offset 94 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO93 ,CPU Targets Byte Offset 93 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO92 ,CPU Targets Byte Offset 92 " else rgroup.long 0x840++0x03 line.long 0x00 "GICD_ITARGETSR16,Interrupt Processor Targets Register 16" rgroup.long 0x844++0x03 line.long 0x00 "GICD_ITARGETSR17,Interrupt Processor Targets Register 17" rgroup.long 0x848++0x03 line.long 0x00 "GICD_ITARGETSR18,Interrupt Processor Targets Register 18" rgroup.long 0x84C++0x03 line.long 0x00 "GICD_ITARGETSR19,Interrupt Processor Targets Register 19" rgroup.long 0x850++0x03 line.long 0x00 "GICD_ITARGETSR20,Interrupt Processor Targets Register 20" rgroup.long 0x854++0x03 line.long 0x00 "GICD_ITARGETSR21,Interrupt Processor Targets Register 21" rgroup.long 0x858++0x03 line.long 0x00 "GICD_ITARGETSR22,Interrupt Processor Targets Register 22" rgroup.long 0x85C++0x03 line.long 0x00 "GICD_ITARGETSR23,Interrupt Processor Targets Register 23" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x03) group.long 0x860++0x03 line.long 0x00 "GICD_ITARGETSR24,Interrupt Processor Targets Register 24" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO99 ,CPU Targets Byte Offset 99 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO98 ,CPU Targets Byte Offset 98 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO97 ,CPU Targets Byte Offset 97 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO96 ,CPU Targets Byte Offset 96 " group.long 0x864++0x03 line.long 0x00 "GICD_ITARGETSR25,Interrupt Processor Targets Register 25" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO103 ,CPU Targets Byte Offset 103 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO102 ,CPU Targets Byte Offset 102 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO101 ,CPU Targets Byte Offset 101 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO100 ,CPU Targets Byte Offset 100 " group.long 0x868++0x03 line.long 0x00 "GICD_ITARGETSR26,Interrupt Processor Targets Register 26" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO107 ,CPU Targets Byte Offset 107 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO106 ,CPU Targets Byte Offset 106 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO105 ,CPU Targets Byte Offset 105 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO104 ,CPU Targets Byte Offset 104 " group.long 0x86C++0x03 line.long 0x00 "GICD_ITARGETSR27,Interrupt Processor Targets Register 27" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO111 ,CPU Targets Byte Offset 111 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO110 ,CPU Targets Byte Offset 110 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO109 ,CPU Targets Byte Offset 109 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO108 ,CPU Targets Byte Offset 108 " group.long 0x870++0x03 line.long 0x00 "GICD_ITARGETSR28,Interrupt Processor Targets Register 28" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO115 ,CPU Targets Byte Offset 115 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO114 ,CPU Targets Byte Offset 114 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO113 ,CPU Targets Byte Offset 113 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO112 ,CPU Targets Byte Offset 112 " group.long 0x874++0x03 line.long 0x00 "GICD_ITARGETSR29,Interrupt Processor Targets Register 29" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO119 ,CPU Targets Byte Offset 119 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO118 ,CPU Targets Byte Offset 118 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO117 ,CPU Targets Byte Offset 117 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO116 ,CPU Targets Byte Offset 116 " group.long 0x878++0x03 line.long 0x00 "GICD_ITARGETSR30,Interrupt Processor Targets Register 30" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO123 ,CPU Targets Byte Offset 123 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO122 ,CPU Targets Byte Offset 122 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO121 ,CPU Targets Byte Offset 121 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO120 ,CPU Targets Byte Offset 120 " group.long 0x87C++0x03 line.long 0x00 "GICD_ITARGETSR31,Interrupt Processor Targets Register 31" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO127 ,CPU Targets Byte Offset 127 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO126 ,CPU Targets Byte Offset 126 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO125 ,CPU Targets Byte Offset 125 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO124 ,CPU Targets Byte Offset 124 " else rgroup.long 0x860++0x03 line.long 0x00 "GICD_ITARGETSR24,Interrupt Processor Targets Register 24" rgroup.long 0x864++0x03 line.long 0x00 "GICD_ITARGETSR25,Interrupt Processor Targets Register 25" rgroup.long 0x868++0x03 line.long 0x00 "GICD_ITARGETSR26,Interrupt Processor Targets Register 26" rgroup.long 0x86C++0x03 line.long 0x00 "GICD_ITARGETSR27,Interrupt Processor Targets Register 27" rgroup.long 0x870++0x03 line.long 0x00 "GICD_ITARGETSR28,Interrupt Processor Targets Register 28" rgroup.long 0x874++0x03 line.long 0x00 "GICD_ITARGETSR29,Interrupt Processor Targets Register 29" rgroup.long 0x878++0x03 line.long 0x00 "GICD_ITARGETSR30,Interrupt Processor Targets Register 30" rgroup.long 0x87C++0x03 line.long 0x00 "GICD_ITARGETSR31,Interrupt Processor Targets Register 31" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x04) group.long 0x880++0x03 line.long 0x00 "GICD_ITARGETSR32,Interrupt Processor Targets Register 32" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO131 ,CPU Targets Byte Offset 131 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO130 ,CPU Targets Byte Offset 130 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO129 ,CPU Targets Byte Offset 129 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO128 ,CPU Targets Byte Offset 128 " group.long 0x884++0x03 line.long 0x00 "GICD_ITARGETSR33,Interrupt Processor Targets Register 33" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO135 ,CPU Targets Byte Offset 135 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO134 ,CPU Targets Byte Offset 134 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO133 ,CPU Targets Byte Offset 133 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO132 ,CPU Targets Byte Offset 132 " group.long 0x888++0x03 line.long 0x00 "GICD_ITARGETSR34,Interrupt Processor Targets Register 34" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO139 ,CPU Targets Byte Offset 139 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO138 ,CPU Targets Byte Offset 138 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO137 ,CPU Targets Byte Offset 137 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO136 ,CPU Targets Byte Offset 136 " group.long 0x88C++0x03 line.long 0x00 "GICD_ITARGETSR35,Interrupt Processor Targets Register 35" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO143 ,CPU Targets Byte Offset 143 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO142 ,CPU Targets Byte Offset 142 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO141 ,CPU Targets Byte Offset 141 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO140 ,CPU Targets Byte Offset 140 " group.long 0x890++0x03 line.long 0x00 "GICD_ITARGETSR36,Interrupt Processor Targets Register 36" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO147 ,CPU Targets Byte Offset 147 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO146 ,CPU Targets Byte Offset 146 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO145 ,CPU Targets Byte Offset 145 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO144 ,CPU Targets Byte Offset 144 " group.long 0x894++0x03 line.long 0x00 "GICD_ITARGETSR37,Interrupt Processor Targets Register 37" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO151 ,CPU Targets Byte Offset 151 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO150 ,CPU Targets Byte Offset 150 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO149 ,CPU Targets Byte Offset 149 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO148 ,CPU Targets Byte Offset 148 " group.long 0x898++0x03 line.long 0x00 "GICD_ITARGETSR38,Interrupt Processor Targets Register 38" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO155 ,CPU Targets Byte Offset 155 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO154 ,CPU Targets Byte Offset 154 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO153 ,CPU Targets Byte Offset 153 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO152 ,CPU Targets Byte Offset 152 " group.long 0x89C++0x03 line.long 0x00 "GICD_ITARGETSR39,Interrupt Processor Targets Register 39" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO159 ,CPU Targets Byte Offset 159 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO158 ,CPU Targets Byte Offset 158 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO157 ,CPU Targets Byte Offset 157 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO156 ,CPU Targets Byte Offset 156 " else rgroup.long 0x880++0x03 line.long 0x00 "GICD_ITARGETSR32,Interrupt Processor Targets Register 32" rgroup.long 0x884++0x03 line.long 0x00 "GICD_ITARGETSR33,Interrupt Processor Targets Register 33" rgroup.long 0x888++0x03 line.long 0x00 "GICD_ITARGETSR34,Interrupt Processor Targets Register 34" rgroup.long 0x88C++0x03 line.long 0x00 "GICD_ITARGETSR35,Interrupt Processor Targets Register 35" rgroup.long 0x890++0x03 line.long 0x00 "GICD_ITARGETSR36,Interrupt Processor Targets Register 36" rgroup.long 0x894++0x03 line.long 0x00 "GICD_ITARGETSR37,Interrupt Processor Targets Register 37" rgroup.long 0x898++0x03 line.long 0x00 "GICD_ITARGETSR38,Interrupt Processor Targets Register 38" rgroup.long 0x89C++0x03 line.long 0x00 "GICD_ITARGETSR39,Interrupt Processor Targets Register 39" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x05) group.long 0x8A0++0x03 line.long 0x00 "GICD_ITARGETSR40,Interrupt Processor Targets Register 40" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO163 ,CPU Targets Byte Offset 163 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO162 ,CPU Targets Byte Offset 162 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO161 ,CPU Targets Byte Offset 161 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO160 ,CPU Targets Byte Offset 160 " group.long 0x8A4++0x03 line.long 0x00 "GICD_ITARGETSR41,Interrupt Processor Targets Register 41" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO167 ,CPU Targets Byte Offset 167 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO166 ,CPU Targets Byte Offset 166 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO165 ,CPU Targets Byte Offset 165 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO164 ,CPU Targets Byte Offset 164 " group.long 0x8A8++0x03 line.long 0x00 "GICD_ITARGETSR42,Interrupt Processor Targets Register 42" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO171 ,CPU Targets Byte Offset 171 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO170 ,CPU Targets Byte Offset 170 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO169 ,CPU Targets Byte Offset 169 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO168 ,CPU Targets Byte Offset 168 " group.long 0x8AC++0x03 line.long 0x00 "GICD_ITARGETSR43,Interrupt Processor Targets Register 43" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO175 ,CPU Targets Byte Offset 175 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO174 ,CPU Targets Byte Offset 174 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO173 ,CPU Targets Byte Offset 173 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO172 ,CPU Targets Byte Offset 172 " group.long 0x8B0++0x03 line.long 0x00 "GICD_ITARGETSR44,Interrupt Processor Targets Register 44" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO179 ,CPU Targets Byte Offset 179 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO178 ,CPU Targets Byte Offset 178 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO177 ,CPU Targets Byte Offset 177 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO176 ,CPU Targets Byte Offset 176 " group.long 0x8B4++0x03 line.long 0x00 "GICD_ITARGETSR45,Interrupt Processor Targets Register 45" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO183 ,CPU Targets Byte Offset 183 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO182 ,CPU Targets Byte Offset 182 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO181 ,CPU Targets Byte Offset 181 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO180 ,CPU Targets Byte Offset 180 " group.long 0x8B8++0x03 line.long 0x00 "GICD_ITARGETSR46,Interrupt Processor Targets Register 46" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO187 ,CPU Targets Byte Offset 187 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO186 ,CPU Targets Byte Offset 186 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO185 ,CPU Targets Byte Offset 185 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO184 ,CPU Targets Byte Offset 184 " group.long 0x8BC++0x03 line.long 0x00 "GICD_ITARGETSR47,Interrupt Processor Targets Register 47" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO191 ,CPU Targets Byte Offset 191 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO190 ,CPU Targets Byte Offset 190 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO189 ,CPU Targets Byte Offset 189 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO188 ,CPU Targets Byte Offset 188 " else rgroup.long 0x8A0++0x03 line.long 0x00 "GICD_ITARGETSR40,Interrupt Processor Targets Register 40" rgroup.long 0x8A4++0x03 line.long 0x00 "GICD_ITARGETSR41,Interrupt Processor Targets Register 41" rgroup.long 0x8A8++0x03 line.long 0x00 "GICD_ITARGETSR42,Interrupt Processor Targets Register 42" rgroup.long 0x8AC++0x03 line.long 0x00 "GICD_ITARGETSR43,Interrupt Processor Targets Register 43" rgroup.long 0x8B0++0x03 line.long 0x00 "GICD_ITARGETSR44,Interrupt Processor Targets Register 44" rgroup.long 0x8B4++0x03 line.long 0x00 "GICD_ITARGETSR45,Interrupt Processor Targets Register 45" rgroup.long 0x8B8++0x03 line.long 0x00 "GICD_ITARGETSR46,Interrupt Processor Targets Register 46" rgroup.long 0x8BC++0x03 line.long 0x00 "GICD_ITARGETSR47,Interrupt Processor Targets Register 47" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x06) group.long 0x8C0++0x03 line.long 0x00 "GICD_ITARGETSR48,Interrupt Processor Targets Register 48" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO195 ,CPU Targets Byte Offset 195 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO194 ,CPU Targets Byte Offset 194 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO193 ,CPU Targets Byte Offset 193 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO192 ,CPU Targets Byte Offset 192 " group.long 0x8C4++0x03 line.long 0x00 "GICD_ITARGETSR49,Interrupt Processor Targets Register 49" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO199 ,CPU Targets Byte Offset 199 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO198 ,CPU Targets Byte Offset 198 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO197 ,CPU Targets Byte Offset 197 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO196 ,CPU Targets Byte Offset 196 " group.long 0x8C8++0x03 line.long 0x00 "GICD_ITARGETSR50,Interrupt Processor Targets Register 50" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO203 ,CPU Targets Byte Offset 203 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO202 ,CPU Targets Byte Offset 202 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO201 ,CPU Targets Byte Offset 201 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO200 ,CPU Targets Byte Offset 200 " group.long 0x8CC++0x03 line.long 0x00 "GICD_ITARGETSR51,Interrupt Processor Targets Register 51" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO207 ,CPU Targets Byte Offset 207 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO206 ,CPU Targets Byte Offset 206 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO205 ,CPU Targets Byte Offset 205 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO204 ,CPU Targets Byte Offset 204 " group.long 0x8D0++0x03 line.long 0x00 "GICD_ITARGETSR52,Interrupt Processor Targets Register 52" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO211 ,CPU Targets Byte Offset 211 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO210 ,CPU Targets Byte Offset 210 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO209 ,CPU Targets Byte Offset 209 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO208 ,CPU Targets Byte Offset 208 " group.long 0x8D4++0x03 line.long 0x00 "GICD_ITARGETSR53,Interrupt Processor Targets Register 53" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO215 ,CPU Targets Byte Offset 215 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO214 ,CPU Targets Byte Offset 214 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO213 ,CPU Targets Byte Offset 213 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO212 ,CPU Targets Byte Offset 212 " group.long 0x8D8++0x03 line.long 0x00 "GICD_ITARGETSR54,Interrupt Processor Targets Register 54" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO219 ,CPU Targets Byte Offset 219 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO218 ,CPU Targets Byte Offset 218 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO217 ,CPU Targets Byte Offset 217 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO216 ,CPU Targets Byte Offset 216 " group.long 0x8DC++0x03 line.long 0x00 "GICD_ITARGETSR55,Interrupt Processor Targets Register 55" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO223 ,CPU Targets Byte Offset 223 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO222 ,CPU Targets Byte Offset 222 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO221 ,CPU Targets Byte Offset 221 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO220 ,CPU Targets Byte Offset 220 " else rgroup.long 0x8C0++0x03 line.long 0x00 "GICD_ITARGETSR48,Interrupt Processor Targets Register 48" rgroup.long 0x8C4++0x03 line.long 0x00 "GICD_ITARGETSR49,Interrupt Processor Targets Register 49" rgroup.long 0x8C8++0x03 line.long 0x00 "GICD_ITARGETSR50,Interrupt Processor Targets Register 50" rgroup.long 0x8CC++0x03 line.long 0x00 "GICD_ITARGETSR51,Interrupt Processor Targets Register 51" rgroup.long 0x8D0++0x03 line.long 0x00 "GICD_ITARGETSR52,Interrupt Processor Targets Register 52" rgroup.long 0x8D4++0x03 line.long 0x00 "GICD_ITARGETSR53,Interrupt Processor Targets Register 53" rgroup.long 0x8D8++0x03 line.long 0x00 "GICD_ITARGETSR54,Interrupt Processor Targets Register 54" rgroup.long 0x8DC++0x03 line.long 0x00 "GICD_ITARGETSR55,Interrupt Processor Targets Register 55" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x07) group.long 0x8E0++0x03 line.long 0x00 "GICD_ITARGETSR56,Interrupt Processor Targets Register 56" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO227 ,CPU Targets Byte Offset 227 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO226 ,CPU Targets Byte Offset 226 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO225 ,CPU Targets Byte Offset 225 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO224 ,CPU Targets Byte Offset 224 " group.long 0x8E4++0x03 line.long 0x00 "GICD_ITARGETSR57,Interrupt Processor Targets Register 57" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO231 ,CPU Targets Byte Offset 231 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO230 ,CPU Targets Byte Offset 230 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO229 ,CPU Targets Byte Offset 229 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO228 ,CPU Targets Byte Offset 228 " group.long 0x8E8++0x03 line.long 0x00 "GICD_ITARGETSR58,Interrupt Processor Targets Register 58" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO235 ,CPU Targets Byte Offset 235 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO234 ,CPU Targets Byte Offset 234 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO233 ,CPU Targets Byte Offset 233 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO232 ,CPU Targets Byte Offset 232 " group.long 0x8EC++0x03 line.long 0x00 "GICD_ITARGETSR59,Interrupt Processor Targets Register 59" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO239 ,CPU Targets Byte Offset 239 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO238 ,CPU Targets Byte Offset 238 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO237 ,CPU Targets Byte Offset 237 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO236 ,CPU Targets Byte Offset 236 " group.long 0x8F0++0x03 line.long 0x00 "GICD_ITARGETSR60,Interrupt Processor Targets Register 60" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO243 ,CPU Targets Byte Offset 243 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO242 ,CPU Targets Byte Offset 242 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO241 ,CPU Targets Byte Offset 241 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO240 ,CPU Targets Byte Offset 240 " group.long 0x8F4++0x03 line.long 0x00 "GICD_ITARGETSR61,Interrupt Processor Targets Register 61" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO247 ,CPU Targets Byte Offset 247 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO246 ,CPU Targets Byte Offset 246 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO245 ,CPU Targets Byte Offset 245 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO244 ,CPU Targets Byte Offset 244 " group.long 0x8F8++0x03 line.long 0x00 "GICD_ITARGETSR62,Interrupt Processor Targets Register 62" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO251 ,CPU Targets Byte Offset 251 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO250 ,CPU Targets Byte Offset 250 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO249 ,CPU Targets Byte Offset 249 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO248 ,CPU Targets Byte Offset 248 " group.long 0x8FC++0x03 line.long 0x00 "GICD_ITARGETSR63,Interrupt Processor Targets Register 63" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO255 ,CPU Targets Byte Offset 255 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO254 ,CPU Targets Byte Offset 254 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO253 ,CPU Targets Byte Offset 253 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO252 ,CPU Targets Byte Offset 252 " else rgroup.long 0x8E0++0x03 line.long 0x00 "GICD_ITARGETSR56,Interrupt Processor Targets Register 56" rgroup.long 0x8E4++0x03 line.long 0x00 "GICD_ITARGETSR57,Interrupt Processor Targets Register 57" rgroup.long 0x8E8++0x03 line.long 0x00 "GICD_ITARGETSR58,Interrupt Processor Targets Register 58" rgroup.long 0x8EC++0x03 line.long 0x00 "GICD_ITARGETSR59,Interrupt Processor Targets Register 59" rgroup.long 0x8F0++0x03 line.long 0x00 "GICD_ITARGETSR60,Interrupt Processor Targets Register 60" rgroup.long 0x8F4++0x03 line.long 0x00 "GICD_ITARGETSR61,Interrupt Processor Targets Register 61" rgroup.long 0x8F8++0x03 line.long 0x00 "GICD_ITARGETSR62,Interrupt Processor Targets Register 62" rgroup.long 0x8FC++0x03 line.long 0x00 "GICD_ITARGETSR63,Interrupt Processor Targets Register 63" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x08) group.long 0x900++0x03 line.long 0x00 "GICD_ITARGETSR64,Interrupt Processor Targets Register 64" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO259 ,CPU Targets Byte Offset 259 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO258 ,CPU Targets Byte Offset 258 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO257 ,CPU Targets Byte Offset 257 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO256 ,CPU Targets Byte Offset 256 " group.long 0x904++0x03 line.long 0x00 "GICD_ITARGETSR65,Interrupt Processor Targets Register 65" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO263 ,CPU Targets Byte Offset 263 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO262 ,CPU Targets Byte Offset 262 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO261 ,CPU Targets Byte Offset 261 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO260 ,CPU Targets Byte Offset 260 " group.long 0x908++0x03 line.long 0x00 "GICD_ITARGETSR66,Interrupt Processor Targets Register 66" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO267 ,CPU Targets Byte Offset 267 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO266 ,CPU Targets Byte Offset 266 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO265 ,CPU Targets Byte Offset 265 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO264 ,CPU Targets Byte Offset 264 " group.long 0x90C++0x03 line.long 0x00 "GICD_ITARGETSR67,Interrupt Processor Targets Register 67" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO271 ,CPU Targets Byte Offset 271 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO270 ,CPU Targets Byte Offset 270 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO269 ,CPU Targets Byte Offset 269 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO268 ,CPU Targets Byte Offset 268 " group.long 0x910++0x03 line.long 0x00 "GICD_ITARGETSR68,Interrupt Processor Targets Register 68" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO275 ,CPU Targets Byte Offset 275 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO274 ,CPU Targets Byte Offset 274 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO273 ,CPU Targets Byte Offset 273 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO272 ,CPU Targets Byte Offset 272 " group.long 0x914++0x03 line.long 0x00 "GICD_ITARGETSR69,Interrupt Processor Targets Register 69" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO279 ,CPU Targets Byte Offset 279 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO278 ,CPU Targets Byte Offset 278 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO277 ,CPU Targets Byte Offset 277 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO276 ,CPU Targets Byte Offset 276 " group.long 0x918++0x03 line.long 0x00 "GICD_ITARGETSR70,Interrupt Processor Targets Register 70" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO283 ,CPU Targets Byte Offset 283 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO282 ,CPU Targets Byte Offset 282 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO281 ,CPU Targets Byte Offset 281 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO280 ,CPU Targets Byte Offset 280 " group.long 0x91C++0x03 line.long 0x00 "GICD_ITARGETSR71,Interrupt Processor Targets Register 71" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO287 ,CPU Targets Byte Offset 287 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO286 ,CPU Targets Byte Offset 286 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO285 ,CPU Targets Byte Offset 285 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO284 ,CPU Targets Byte Offset 284 " else rgroup.long 0x900++0x03 line.long 0x00 "GICD_ITARGETSR64,Interrupt Processor Targets Register 64" rgroup.long 0x904++0x03 line.long 0x00 "GICD_ITARGETSR65,Interrupt Processor Targets Register 65" rgroup.long 0x908++0x03 line.long 0x00 "GICD_ITARGETSR66,Interrupt Processor Targets Register 66" rgroup.long 0x90C++0x03 line.long 0x00 "GICD_ITARGETSR67,Interrupt Processor Targets Register 67" rgroup.long 0x910++0x03 line.long 0x00 "GICD_ITARGETSR68,Interrupt Processor Targets Register 68" rgroup.long 0x914++0x03 line.long 0x00 "GICD_ITARGETSR69,Interrupt Processor Targets Register 69" rgroup.long 0x918++0x03 line.long 0x00 "GICD_ITARGETSR70,Interrupt Processor Targets Register 70" rgroup.long 0x91C++0x03 line.long 0x00 "GICD_ITARGETSR71,Interrupt Processor Targets Register 71" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x09) group.long 0x920++0x03 line.long 0x00 "GICD_ITARGETSR72,Interrupt Processor Targets Register 72" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO291 ,CPU Targets Byte Offset 291 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO290 ,CPU Targets Byte Offset 290 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO289 ,CPU Targets Byte Offset 289 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO288 ,CPU Targets Byte Offset 288 " group.long 0x924++0x03 line.long 0x00 "GICD_ITARGETSR73,Interrupt Processor Targets Register 73" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO295 ,CPU Targets Byte Offset 295 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO294 ,CPU Targets Byte Offset 294 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO293 ,CPU Targets Byte Offset 293 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO292 ,CPU Targets Byte Offset 292 " group.long 0x928++0x03 line.long 0x00 "GICD_ITARGETSR74,Interrupt Processor Targets Register 74" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO299 ,CPU Targets Byte Offset 299 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO298 ,CPU Targets Byte Offset 298 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO297 ,CPU Targets Byte Offset 297 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO296 ,CPU Targets Byte Offset 296 " group.long 0x92C++0x03 line.long 0x00 "GICD_ITARGETSR75,Interrupt Processor Targets Register 75" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO303 ,CPU Targets Byte Offset 303 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO302 ,CPU Targets Byte Offset 302 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO301 ,CPU Targets Byte Offset 301 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO300 ,CPU Targets Byte Offset 300 " group.long 0x930++0x03 line.long 0x00 "GICD_ITARGETSR76,Interrupt Processor Targets Register 76" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO307 ,CPU Targets Byte Offset 307 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO306 ,CPU Targets Byte Offset 306 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO305 ,CPU Targets Byte Offset 305 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO304 ,CPU Targets Byte Offset 304 " group.long 0x934++0x03 line.long 0x00 "GICD_ITARGETSR77,Interrupt Processor Targets Register 77" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO311 ,CPU Targets Byte Offset 311 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO310 ,CPU Targets Byte Offset 310 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO309 ,CPU Targets Byte Offset 309 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO308 ,CPU Targets Byte Offset 308 " group.long 0x938++0x03 line.long 0x00 "GICD_ITARGETSR78,Interrupt Processor Targets Register 78" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO315 ,CPU Targets Byte Offset 315 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO314 ,CPU Targets Byte Offset 314 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO313 ,CPU Targets Byte Offset 313 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO312 ,CPU Targets Byte Offset 312 " group.long 0x93C++0x03 line.long 0x00 "GICD_ITARGETSR79,Interrupt Processor Targets Register 79" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO319 ,CPU Targets Byte Offset 319 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO318 ,CPU Targets Byte Offset 318 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO317 ,CPU Targets Byte Offset 317 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO316 ,CPU Targets Byte Offset 316 " else rgroup.long 0x920++0x03 line.long 0x00 "GICD_ITARGETSR72,Interrupt Processor Targets Register 72" rgroup.long 0x924++0x03 line.long 0x00 "GICD_ITARGETSR73,Interrupt Processor Targets Register 73" rgroup.long 0x928++0x03 line.long 0x00 "GICD_ITARGETSR74,Interrupt Processor Targets Register 74" rgroup.long 0x92C++0x03 line.long 0x00 "GICD_ITARGETSR75,Interrupt Processor Targets Register 75" rgroup.long 0x930++0x03 line.long 0x00 "GICD_ITARGETSR76,Interrupt Processor Targets Register 76" rgroup.long 0x934++0x03 line.long 0x00 "GICD_ITARGETSR77,Interrupt Processor Targets Register 77" rgroup.long 0x938++0x03 line.long 0x00 "GICD_ITARGETSR78,Interrupt Processor Targets Register 78" rgroup.long 0x93C++0x03 line.long 0x00 "GICD_ITARGETSR79,Interrupt Processor Targets Register 79" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x0A) group.long 0x940++0x03 line.long 0x00 "GICD_ITARGETSR80,Interrupt Processor Targets Register 80" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO323 ,CPU Targets Byte Offset 323 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO322 ,CPU Targets Byte Offset 322 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO321 ,CPU Targets Byte Offset 321 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO320 ,CPU Targets Byte Offset 320 " group.long 0x944++0x03 line.long 0x00 "GICD_ITARGETSR81,Interrupt Processor Targets Register 81" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO327 ,CPU Targets Byte Offset 327 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO326 ,CPU Targets Byte Offset 326 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO325 ,CPU Targets Byte Offset 325 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO324 ,CPU Targets Byte Offset 324 " group.long 0x948++0x03 line.long 0x00 "GICD_ITARGETSR82,Interrupt Processor Targets Register 82" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO331 ,CPU Targets Byte Offset 331 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO330 ,CPU Targets Byte Offset 330 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO329 ,CPU Targets Byte Offset 329 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO328 ,CPU Targets Byte Offset 328 " group.long 0x94C++0x03 line.long 0x00 "GICD_ITARGETSR83,Interrupt Processor Targets Register 83" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO335 ,CPU Targets Byte Offset 335 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO334 ,CPU Targets Byte Offset 334 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO333 ,CPU Targets Byte Offset 333 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO332 ,CPU Targets Byte Offset 332 " group.long 0x950++0x03 line.long 0x00 "GICD_ITARGETSR84,Interrupt Processor Targets Register 84" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO339 ,CPU Targets Byte Offset 339 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO338 ,CPU Targets Byte Offset 338 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO337 ,CPU Targets Byte Offset 337 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO336 ,CPU Targets Byte Offset 336 " group.long 0x954++0x03 line.long 0x00 "GICD_ITARGETSR85,Interrupt Processor Targets Register 85" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO343 ,CPU Targets Byte Offset 343 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO342 ,CPU Targets Byte Offset 342 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO341 ,CPU Targets Byte Offset 341 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO340 ,CPU Targets Byte Offset 340 " group.long 0x958++0x03 line.long 0x00 "GICD_ITARGETSR86,Interrupt Processor Targets Register 86" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO347 ,CPU Targets Byte Offset 347 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO346 ,CPU Targets Byte Offset 346 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO345 ,CPU Targets Byte Offset 345 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO344 ,CPU Targets Byte Offset 344 " group.long 0x95C++0x03 line.long 0x00 "GICD_ITARGETSR87,Interrupt Processor Targets Register 87" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO351 ,CPU Targets Byte Offset 351 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO350 ,CPU Targets Byte Offset 350 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO349 ,CPU Targets Byte Offset 349 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO348 ,CPU Targets Byte Offset 348 " else rgroup.long 0x940++0x03 line.long 0x00 "GICD_ITARGETSR80,Interrupt Processor Targets Register 80" rgroup.long 0x944++0x03 line.long 0x00 "GICD_ITARGETSR81,Interrupt Processor Targets Register 81" rgroup.long 0x948++0x03 line.long 0x00 "GICD_ITARGETSR82,Interrupt Processor Targets Register 82" rgroup.long 0x94C++0x03 line.long 0x00 "GICD_ITARGETSR83,Interrupt Processor Targets Register 83" rgroup.long 0x950++0x03 line.long 0x00 "GICD_ITARGETSR84,Interrupt Processor Targets Register 84" rgroup.long 0x954++0x03 line.long 0x00 "GICD_ITARGETSR85,Interrupt Processor Targets Register 85" rgroup.long 0x958++0x03 line.long 0x00 "GICD_ITARGETSR86,Interrupt Processor Targets Register 86" rgroup.long 0x95C++0x03 line.long 0x00 "GICD_ITARGETSR87,Interrupt Processor Targets Register 87" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x0B) group.long 0x960++0x03 line.long 0x00 "GICD_ITARGETSR88,Interrupt Processor Targets Register 88" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO355 ,CPU Targets Byte Offset 355 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO354 ,CPU Targets Byte Offset 354 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO353 ,CPU Targets Byte Offset 353 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO352 ,CPU Targets Byte Offset 352 " group.long 0x964++0x03 line.long 0x00 "GICD_ITARGETSR89,Interrupt Processor Targets Register 89" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO359 ,CPU Targets Byte Offset 359 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO358 ,CPU Targets Byte Offset 358 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO357 ,CPU Targets Byte Offset 357 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO356 ,CPU Targets Byte Offset 356 " group.long 0x968++0x03 line.long 0x00 "GICD_ITARGETSR90,Interrupt Processor Targets Register 90" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO363 ,CPU Targets Byte Offset 363 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO362 ,CPU Targets Byte Offset 362 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO361 ,CPU Targets Byte Offset 361 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO360 ,CPU Targets Byte Offset 360 " group.long 0x96C++0x03 line.long 0x00 "GICD_ITARGETSR91,Interrupt Processor Targets Register 91" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO367 ,CPU Targets Byte Offset 367 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO366 ,CPU Targets Byte Offset 366 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO365 ,CPU Targets Byte Offset 365 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO364 ,CPU Targets Byte Offset 364 " group.long 0x970++0x03 line.long 0x00 "GICD_ITARGETSR92,Interrupt Processor Targets Register 92" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO371 ,CPU Targets Byte Offset 371 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO370 ,CPU Targets Byte Offset 370 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO369 ,CPU Targets Byte Offset 369 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO368 ,CPU Targets Byte Offset 368 " group.long 0x974++0x03 line.long 0x00 "GICD_ITARGETSR93,Interrupt Processor Targets Register 93" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO375 ,CPU Targets Byte Offset 375 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO374 ,CPU Targets Byte Offset 374 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO373 ,CPU Targets Byte Offset 373 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO372 ,CPU Targets Byte Offset 372 " group.long 0x978++0x03 line.long 0x00 "GICD_ITARGETSR94,Interrupt Processor Targets Register 94" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO379 ,CPU Targets Byte Offset 379 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO378 ,CPU Targets Byte Offset 378 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO377 ,CPU Targets Byte Offset 377 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO376 ,CPU Targets Byte Offset 376 " group.long 0x97C++0x03 line.long 0x00 "GICD_ITARGETSR95,Interrupt Processor Targets Register 95" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO383 ,CPU Targets Byte Offset 383 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO382 ,CPU Targets Byte Offset 382 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO381 ,CPU Targets Byte Offset 381 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO380 ,CPU Targets Byte Offset 380 " else rgroup.long 0x960++0x03 line.long 0x00 "GICD_ITARGETSR88,Interrupt Processor Targets Register 88" rgroup.long 0x964++0x03 line.long 0x00 "GICD_ITARGETSR89,Interrupt Processor Targets Register 89" rgroup.long 0x968++0x03 line.long 0x00 "GICD_ITARGETSR90,Interrupt Processor Targets Register 90" rgroup.long 0x96C++0x03 line.long 0x00 "GICD_ITARGETSR91,Interrupt Processor Targets Register 91" rgroup.long 0x970++0x03 line.long 0x00 "GICD_ITARGETSR92,Interrupt Processor Targets Register 92" rgroup.long 0x974++0x03 line.long 0x00 "GICD_ITARGETSR93,Interrupt Processor Targets Register 93" rgroup.long 0x978++0x03 line.long 0x00 "GICD_ITARGETSR94,Interrupt Processor Targets Register 94" rgroup.long 0x97C++0x03 line.long 0x00 "GICD_ITARGETSR95,Interrupt Processor Targets Register 95" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x0C) group.long 0x980++0x03 line.long 0x00 "GICD_ITARGETSR96,Interrupt Processor Targets Register 96" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO387 ,CPU Targets Byte Offset 387 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO386 ,CPU Targets Byte Offset 386 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO385 ,CPU Targets Byte Offset 385 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO384 ,CPU Targets Byte Offset 384 " group.long 0x984++0x03 line.long 0x00 "GICD_ITARGETSR97,Interrupt Processor Targets Register 97" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO391 ,CPU Targets Byte Offset 391 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO390 ,CPU Targets Byte Offset 390 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO389 ,CPU Targets Byte Offset 389 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO388 ,CPU Targets Byte Offset 388 " group.long 0x988++0x03 line.long 0x00 "GICD_ITARGETSR98,Interrupt Processor Targets Register 98" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO395 ,CPU Targets Byte Offset 395 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO394 ,CPU Targets Byte Offset 394 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO393 ,CPU Targets Byte Offset 393 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO392 ,CPU Targets Byte Offset 392 " group.long 0x98C++0x03 line.long 0x00 "GICD_ITARGETSR99,Interrupt Processor Targets Register 99" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO399 ,CPU Targets Byte Offset 399 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO398 ,CPU Targets Byte Offset 398 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO397 ,CPU Targets Byte Offset 397 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO396 ,CPU Targets Byte Offset 396 " group.long 0x990++0x03 line.long 0x00 "GICD_ITARGETSR100,Interrupt Processor Targets Register 100" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO403 ,CPU Targets Byte Offset 403 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO402 ,CPU Targets Byte Offset 402 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO401 ,CPU Targets Byte Offset 401 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO400 ,CPU Targets Byte Offset 400 " group.long 0x994++0x03 line.long 0x00 "GICD_ITARGETSR101,Interrupt Processor Targets Register 101" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO407 ,CPU Targets Byte Offset 407 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO406 ,CPU Targets Byte Offset 406 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO405 ,CPU Targets Byte Offset 405 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO404 ,CPU Targets Byte Offset 404 " group.long 0x998++0x03 line.long 0x00 "GICD_ITARGETSR102,Interrupt Processor Targets Register 102" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO411 ,CPU Targets Byte Offset 411 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO410 ,CPU Targets Byte Offset 410 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO409 ,CPU Targets Byte Offset 409 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO408 ,CPU Targets Byte Offset 408 " group.long 0x99C++0x03 line.long 0x00 "GICD_ITARGETSR103,Interrupt Processor Targets Register 103" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO415 ,CPU Targets Byte Offset 415 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO414 ,CPU Targets Byte Offset 414 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO413 ,CPU Targets Byte Offset 413 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO412 ,CPU Targets Byte Offset 412 " else rgroup.long 0x980++0x03 line.long 0x00 "GICD_ITARGETSR96,Interrupt Processor Targets Register 96" rgroup.long 0x984++0x03 line.long 0x00 "GICD_ITARGETSR97,Interrupt Processor Targets Register 97" rgroup.long 0x988++0x03 line.long 0x00 "GICD_ITARGETSR98,Interrupt Processor Targets Register 98" rgroup.long 0x98C++0x03 line.long 0x00 "GICD_ITARGETSR99,Interrupt Processor Targets Register 99" rgroup.long 0x990++0x03 line.long 0x00 "GICD_ITARGETSR100,Interrupt Processor Targets Register 100" rgroup.long 0x994++0x03 line.long 0x00 "GICD_ITARGETSR101,Interrupt Processor Targets Register 101" rgroup.long 0x998++0x03 line.long 0x00 "GICD_ITARGETSR102,Interrupt Processor Targets Register 102" rgroup.long 0x99C++0x03 line.long 0x00 "GICD_ITARGETSR103,Interrupt Processor Targets Register 103" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x0D) group.long 0x9A0++0x03 line.long 0x00 "GICD_ITARGETSR104,Interrupt Processor Targets Register 104" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO419 ,CPU Targets Byte Offset 419 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO418 ,CPU Targets Byte Offset 418 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO417 ,CPU Targets Byte Offset 417 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO416 ,CPU Targets Byte Offset 416 " group.long 0x9A4++0x03 line.long 0x00 "GICD_ITARGETSR105,Interrupt Processor Targets Register 105" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO423 ,CPU Targets Byte Offset 423 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO422 ,CPU Targets Byte Offset 422 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO421 ,CPU Targets Byte Offset 421 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO420 ,CPU Targets Byte Offset 420 " group.long 0x9A8++0x03 line.long 0x00 "GICD_ITARGETSR106,Interrupt Processor Targets Register 106" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO427 ,CPU Targets Byte Offset 427 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO426 ,CPU Targets Byte Offset 426 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO425 ,CPU Targets Byte Offset 425 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO424 ,CPU Targets Byte Offset 424 " group.long 0x9AC++0x03 line.long 0x00 "GICD_ITARGETSR107,Interrupt Processor Targets Register 107" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO431 ,CPU Targets Byte Offset 431 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO430 ,CPU Targets Byte Offset 430 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO429 ,CPU Targets Byte Offset 429 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO428 ,CPU Targets Byte Offset 428 " group.long 0x9B0++0x03 line.long 0x00 "GICD_ITARGETSR108,Interrupt Processor Targets Register 108" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO435 ,CPU Targets Byte Offset 435 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO434 ,CPU Targets Byte Offset 434 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO433 ,CPU Targets Byte Offset 433 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO432 ,CPU Targets Byte Offset 432 " group.long 0x9B4++0x03 line.long 0x00 "GICD_ITARGETSR109,Interrupt Processor Targets Register 109" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO439 ,CPU Targets Byte Offset 439 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO438 ,CPU Targets Byte Offset 438 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO437 ,CPU Targets Byte Offset 437 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO436 ,CPU Targets Byte Offset 436 " group.long 0x9B8++0x03 line.long 0x00 "GICD_ITARGETSR110,Interrupt Processor Targets Register 110" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO443 ,CPU Targets Byte Offset 443 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO442 ,CPU Targets Byte Offset 442 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO441 ,CPU Targets Byte Offset 441 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO440 ,CPU Targets Byte Offset 440 " group.long 0x9BC++0x03 line.long 0x00 "GICD_ITARGETSR111,Interrupt Processor Targets Register 111" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO447 ,CPU Targets Byte Offset 447 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO446 ,CPU Targets Byte Offset 446 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO445 ,CPU Targets Byte Offset 445 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO444 ,CPU Targets Byte Offset 444 " else rgroup.long 0x9A0++0x03 line.long 0x00 "GICD_ITARGETSR104,Interrupt Processor Targets Register 104" rgroup.long 0x9A4++0x03 line.long 0x00 "GICD_ITARGETSR105,Interrupt Processor Targets Register 105" rgroup.long 0x9A8++0x03 line.long 0x00 "GICD_ITARGETSR106,Interrupt Processor Targets Register 106" rgroup.long 0x9AC++0x03 line.long 0x00 "GICD_ITARGETSR107,Interrupt Processor Targets Register 107" rgroup.long 0x9B0++0x03 line.long 0x00 "GICD_ITARGETSR108,Interrupt Processor Targets Register 108" rgroup.long 0x9B4++0x03 line.long 0x00 "GICD_ITARGETSR109,Interrupt Processor Targets Register 109" rgroup.long 0x9B8++0x03 line.long 0x00 "GICD_ITARGETSR110,Interrupt Processor Targets Register 110" rgroup.long 0x9BC++0x03 line.long 0x00 "GICD_ITARGETSR111,Interrupt Processor Targets Register 111" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x0E) group.long 0x9C0++0x03 line.long 0x00 "GICD_ITARGETSR112,Interrupt Processor Targets Register 112" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO451 ,CPU Targets Byte Offset 451 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO450 ,CPU Targets Byte Offset 450 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO449 ,CPU Targets Byte Offset 449 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO448 ,CPU Targets Byte Offset 448 " group.long 0x9C4++0x03 line.long 0x00 "GICD_ITARGETSR113,Interrupt Processor Targets Register 113" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO455 ,CPU Targets Byte Offset 455 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO454 ,CPU Targets Byte Offset 454 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO453 ,CPU Targets Byte Offset 453 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO452 ,CPU Targets Byte Offset 452 " group.long 0x9C8++0x03 line.long 0x00 "GICD_ITARGETSR114,Interrupt Processor Targets Register 114" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO459 ,CPU Targets Byte Offset 459 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO458 ,CPU Targets Byte Offset 458 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO457 ,CPU Targets Byte Offset 457 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO456 ,CPU Targets Byte Offset 456 " group.long 0x9CC++0x03 line.long 0x00 "GICD_ITARGETSR115,Interrupt Processor Targets Register 115" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO463 ,CPU Targets Byte Offset 463 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO462 ,CPU Targets Byte Offset 462 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO461 ,CPU Targets Byte Offset 461 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO460 ,CPU Targets Byte Offset 460 " group.long 0x9D0++0x03 line.long 0x00 "GICD_ITARGETSR116,Interrupt Processor Targets Register 116" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO467 ,CPU Targets Byte Offset 467 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO466 ,CPU Targets Byte Offset 466 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO465 ,CPU Targets Byte Offset 465 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO464 ,CPU Targets Byte Offset 464 " group.long 0x9D4++0x03 line.long 0x00 "GICD_ITARGETSR117,Interrupt Processor Targets Register 117" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO471 ,CPU Targets Byte Offset 471 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO470 ,CPU Targets Byte Offset 470 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO469 ,CPU Targets Byte Offset 469 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO468 ,CPU Targets Byte Offset 468 " group.long 0x9D8++0x03 line.long 0x00 "GICD_ITARGETSR118,Interrupt Processor Targets Register 118" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO475 ,CPU Targets Byte Offset 475 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO474 ,CPU Targets Byte Offset 474 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO473 ,CPU Targets Byte Offset 473 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO472 ,CPU Targets Byte Offset 472 " group.long 0x9DC++0x03 line.long 0x00 "GICD_ITARGETSR119,Interrupt Processor Targets Register 119" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO479 ,CPU Targets Byte Offset 479 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO478 ,CPU Targets Byte Offset 478 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO477 ,CPU Targets Byte Offset 477 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO476 ,CPU Targets Byte Offset 476 " else rgroup.long 0x9C0++0x03 line.long 0x00 "GICD_ITARGETSR112,Interrupt Processor Targets Register 112" rgroup.long 0x9C4++0x03 line.long 0x00 "GICD_ITARGETSR113,Interrupt Processor Targets Register 113" rgroup.long 0x9C8++0x03 line.long 0x00 "GICD_ITARGETSR114,Interrupt Processor Targets Register 114" rgroup.long 0x9CC++0x03 line.long 0x00 "GICD_ITARGETSR115,Interrupt Processor Targets Register 115" rgroup.long 0x9D0++0x03 line.long 0x00 "GICD_ITARGETSR116,Interrupt Processor Targets Register 116" rgroup.long 0x9D4++0x03 line.long 0x00 "GICD_ITARGETSR117,Interrupt Processor Targets Register 117" rgroup.long 0x9D8++0x03 line.long 0x00 "GICD_ITARGETSR118,Interrupt Processor Targets Register 118" rgroup.long 0x9DC++0x03 line.long 0x00 "GICD_ITARGETSR119,Interrupt Processor Targets Register 119" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x0F) group.long 0x9E0++0x03 line.long 0x00 "GICD_ITARGETSR120,Interrupt Processor Targets Register 120" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO483 ,CPU Targets Byte Offset 483 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO482 ,CPU Targets Byte Offset 482 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO481 ,CPU Targets Byte Offset 481 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO480 ,CPU Targets Byte Offset 480 " group.long 0x9E4++0x03 line.long 0x00 "GICD_ITARGETSR121,Interrupt Processor Targets Register 121" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO487 ,CPU Targets Byte Offset 487 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO486 ,CPU Targets Byte Offset 486 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO485 ,CPU Targets Byte Offset 485 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO484 ,CPU Targets Byte Offset 484 " group.long 0x9E8++0x03 line.long 0x00 "GICD_ITARGETSR122,Interrupt Processor Targets Register 122" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO491 ,CPU Targets Byte Offset 491 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO490 ,CPU Targets Byte Offset 490 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO489 ,CPU Targets Byte Offset 489 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO488 ,CPU Targets Byte Offset 488 " group.long 0x9EC++0x03 line.long 0x00 "GICD_ITARGETSR123,Interrupt Processor Targets Register 123" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO495 ,CPU Targets Byte Offset 495 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO494 ,CPU Targets Byte Offset 494 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO493 ,CPU Targets Byte Offset 493 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO492 ,CPU Targets Byte Offset 492 " group.long 0x9F0++0x03 line.long 0x00 "GICD_ITARGETSR124,Interrupt Processor Targets Register 124" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO499 ,CPU Targets Byte Offset 499 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO498 ,CPU Targets Byte Offset 498 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO497 ,CPU Targets Byte Offset 497 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO496 ,CPU Targets Byte Offset 496 " group.long 0x9F4++0x03 line.long 0x00 "GICD_ITARGETSR125,Interrupt Processor Targets Register 125" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO503 ,CPU Targets Byte Offset 503 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO502 ,CPU Targets Byte Offset 502 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO501 ,CPU Targets Byte Offset 501 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO500 ,CPU Targets Byte Offset 500 " group.long 0x9F8++0x03 line.long 0x00 "GICD_ITARGETSR126,Interrupt Processor Targets Register 126" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO507 ,CPU Targets Byte Offset 507 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO506 ,CPU Targets Byte Offset 506 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO505 ,CPU Targets Byte Offset 505 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO504 ,CPU Targets Byte Offset 504 " group.long 0x9FC++0x03 line.long 0x00 "GICD_ITARGETSR127,Interrupt Processor Targets Register 127" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO511 ,CPU Targets Byte Offset 511 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO510 ,CPU Targets Byte Offset 510 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO509 ,CPU Targets Byte Offset 509 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO508 ,CPU Targets Byte Offset 508 " else rgroup.long 0x9E0++0x03 line.long 0x00 "GICD_ITARGETSR120,Interrupt Processor Targets Register 120" rgroup.long 0x9E4++0x03 line.long 0x00 "GICD_ITARGETSR121,Interrupt Processor Targets Register 121" rgroup.long 0x9E8++0x03 line.long 0x00 "GICD_ITARGETSR122,Interrupt Processor Targets Register 122" rgroup.long 0x9EC++0x03 line.long 0x00 "GICD_ITARGETSR123,Interrupt Processor Targets Register 123" rgroup.long 0x9F0++0x03 line.long 0x00 "GICD_ITARGETSR124,Interrupt Processor Targets Register 124" rgroup.long 0x9F4++0x03 line.long 0x00 "GICD_ITARGETSR125,Interrupt Processor Targets Register 125" rgroup.long 0x9F8++0x03 line.long 0x00 "GICD_ITARGETSR126,Interrupt Processor Targets Register 126" rgroup.long 0x9FC++0x03 line.long 0x00 "GICD_ITARGETSR127,Interrupt Processor Targets Register 127" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x10) group.long 0xA00++0x03 line.long 0x00 "GICD_ITARGETSR128,Interrupt Processor Targets Register 128" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO515 ,CPU Targets Byte Offset 515 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO514 ,CPU Targets Byte Offset 514 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO513 ,CPU Targets Byte Offset 513 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO512 ,CPU Targets Byte Offset 512 " group.long 0xA04++0x03 line.long 0x00 "GICD_ITARGETSR129,Interrupt Processor Targets Register 129" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO519 ,CPU Targets Byte Offset 519 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO518 ,CPU Targets Byte Offset 518 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO517 ,CPU Targets Byte Offset 517 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO516 ,CPU Targets Byte Offset 516 " group.long 0xA08++0x03 line.long 0x00 "GICD_ITARGETSR130,Interrupt Processor Targets Register 130" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO523 ,CPU Targets Byte Offset 523 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO522 ,CPU Targets Byte Offset 522 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO521 ,CPU Targets Byte Offset 521 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO520 ,CPU Targets Byte Offset 520 " group.long 0xA0C++0x03 line.long 0x00 "GICD_ITARGETSR131,Interrupt Processor Targets Register 131" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO527 ,CPU Targets Byte Offset 527 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO526 ,CPU Targets Byte Offset 526 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO525 ,CPU Targets Byte Offset 525 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO524 ,CPU Targets Byte Offset 524 " group.long 0xA10++0x03 line.long 0x00 "GICD_ITARGETSR132,Interrupt Processor Targets Register 132" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO531 ,CPU Targets Byte Offset 531 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO530 ,CPU Targets Byte Offset 530 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO529 ,CPU Targets Byte Offset 529 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO528 ,CPU Targets Byte Offset 528 " group.long 0xA14++0x03 line.long 0x00 "GICD_ITARGETSR133,Interrupt Processor Targets Register 133" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO535 ,CPU Targets Byte Offset 535 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO534 ,CPU Targets Byte Offset 534 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO533 ,CPU Targets Byte Offset 533 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO532 ,CPU Targets Byte Offset 532 " group.long 0xA18++0x03 line.long 0x00 "GICD_ITARGETSR134,Interrupt Processor Targets Register 134" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO539 ,CPU Targets Byte Offset 539 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO538 ,CPU Targets Byte Offset 538 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO537 ,CPU Targets Byte Offset 537 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO536 ,CPU Targets Byte Offset 536 " group.long 0xA1C++0x03 line.long 0x00 "GICD_ITARGETSR135,Interrupt Processor Targets Register 135" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO543 ,CPU Targets Byte Offset 543 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO542 ,CPU Targets Byte Offset 542 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO541 ,CPU Targets Byte Offset 541 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO540 ,CPU Targets Byte Offset 540 " else rgroup.long 0xA00++0x03 line.long 0x00 "GICD_ITARGETSR128,Interrupt Processor Targets Register 128" rgroup.long 0xA04++0x03 line.long 0x00 "GICD_ITARGETSR129,Interrupt Processor Targets Register 129" rgroup.long 0xA08++0x03 line.long 0x00 "GICD_ITARGETSR130,Interrupt Processor Targets Register 130" rgroup.long 0xA0C++0x03 line.long 0x00 "GICD_ITARGETSR131,Interrupt Processor Targets Register 131" rgroup.long 0xA10++0x03 line.long 0x00 "GICD_ITARGETSR132,Interrupt Processor Targets Register 132" rgroup.long 0xA14++0x03 line.long 0x00 "GICD_ITARGETSR133,Interrupt Processor Targets Register 133" rgroup.long 0xA18++0x03 line.long 0x00 "GICD_ITARGETSR134,Interrupt Processor Targets Register 134" rgroup.long 0xA1C++0x03 line.long 0x00 "GICD_ITARGETSR135,Interrupt Processor Targets Register 135" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x11) group.long 0xA20++0x03 line.long 0x00 "GICD_ITARGETSR136,Interrupt Processor Targets Register 136" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO547 ,CPU Targets Byte Offset 547 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO546 ,CPU Targets Byte Offset 546 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO545 ,CPU Targets Byte Offset 545 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO544 ,CPU Targets Byte Offset 544 " group.long 0xA24++0x03 line.long 0x00 "GICD_ITARGETSR137,Interrupt Processor Targets Register 137" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO551 ,CPU Targets Byte Offset 551 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO550 ,CPU Targets Byte Offset 550 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO549 ,CPU Targets Byte Offset 549 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO548 ,CPU Targets Byte Offset 548 " group.long 0xA28++0x03 line.long 0x00 "GICD_ITARGETSR138,Interrupt Processor Targets Register 138" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO555 ,CPU Targets Byte Offset 555 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO554 ,CPU Targets Byte Offset 554 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO553 ,CPU Targets Byte Offset 553 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO552 ,CPU Targets Byte Offset 552 " group.long 0xA2C++0x03 line.long 0x00 "GICD_ITARGETSR139,Interrupt Processor Targets Register 139" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO559 ,CPU Targets Byte Offset 559 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO558 ,CPU Targets Byte Offset 558 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO557 ,CPU Targets Byte Offset 557 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO556 ,CPU Targets Byte Offset 556 " group.long 0xA30++0x03 line.long 0x00 "GICD_ITARGETSR140,Interrupt Processor Targets Register 140" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO563 ,CPU Targets Byte Offset 563 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO562 ,CPU Targets Byte Offset 562 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO561 ,CPU Targets Byte Offset 561 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO560 ,CPU Targets Byte Offset 560 " group.long 0xA34++0x03 line.long 0x00 "GICD_ITARGETSR141,Interrupt Processor Targets Register 141" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO567 ,CPU Targets Byte Offset 567 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO566 ,CPU Targets Byte Offset 566 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO565 ,CPU Targets Byte Offset 565 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO564 ,CPU Targets Byte Offset 564 " group.long 0xA38++0x03 line.long 0x00 "GICD_ITARGETSR142,Interrupt Processor Targets Register 142" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO571 ,CPU Targets Byte Offset 571 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO570 ,CPU Targets Byte Offset 570 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO569 ,CPU Targets Byte Offset 569 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO568 ,CPU Targets Byte Offset 568 " group.long 0xA3C++0x03 line.long 0x00 "GICD_ITARGETSR143,Interrupt Processor Targets Register 143" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO575 ,CPU Targets Byte Offset 575 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO574 ,CPU Targets Byte Offset 574 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO573 ,CPU Targets Byte Offset 573 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO572 ,CPU Targets Byte Offset 572 " else rgroup.long 0xA20++0x03 line.long 0x00 "GICD_ITARGETSR136,Interrupt Processor Targets Register 136" rgroup.long 0xA24++0x03 line.long 0x00 "GICD_ITARGETSR137,Interrupt Processor Targets Register 137" rgroup.long 0xA28++0x03 line.long 0x00 "GICD_ITARGETSR138,Interrupt Processor Targets Register 138" rgroup.long 0xA2C++0x03 line.long 0x00 "GICD_ITARGETSR139,Interrupt Processor Targets Register 139" rgroup.long 0xA30++0x03 line.long 0x00 "GICD_ITARGETSR140,Interrupt Processor Targets Register 140" rgroup.long 0xA34++0x03 line.long 0x00 "GICD_ITARGETSR141,Interrupt Processor Targets Register 141" rgroup.long 0xA38++0x03 line.long 0x00 "GICD_ITARGETSR142,Interrupt Processor Targets Register 142" rgroup.long 0xA3C++0x03 line.long 0x00 "GICD_ITARGETSR143,Interrupt Processor Targets Register 143" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x12) group.long 0xA40++0x03 line.long 0x00 "GICD_ITARGETSR144,Interrupt Processor Targets Register 144" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO579 ,CPU Targets Byte Offset 579 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO578 ,CPU Targets Byte Offset 578 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO577 ,CPU Targets Byte Offset 577 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO576 ,CPU Targets Byte Offset 576 " group.long 0xA44++0x03 line.long 0x00 "GICD_ITARGETSR145,Interrupt Processor Targets Register 145" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO583 ,CPU Targets Byte Offset 583 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO582 ,CPU Targets Byte Offset 582 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO581 ,CPU Targets Byte Offset 581 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO580 ,CPU Targets Byte Offset 580 " group.long 0xA48++0x03 line.long 0x00 "GICD_ITARGETSR146,Interrupt Processor Targets Register 146" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO587 ,CPU Targets Byte Offset 587 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO586 ,CPU Targets Byte Offset 586 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO585 ,CPU Targets Byte Offset 585 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO584 ,CPU Targets Byte Offset 584 " group.long 0xA4C++0x03 line.long 0x00 "GICD_ITARGETSR147,Interrupt Processor Targets Register 147" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO591 ,CPU Targets Byte Offset 591 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO590 ,CPU Targets Byte Offset 590 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO589 ,CPU Targets Byte Offset 589 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO588 ,CPU Targets Byte Offset 588 " group.long 0xA50++0x03 line.long 0x00 "GICD_ITARGETSR148,Interrupt Processor Targets Register 148" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO595 ,CPU Targets Byte Offset 595 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO594 ,CPU Targets Byte Offset 594 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO593 ,CPU Targets Byte Offset 593 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO592 ,CPU Targets Byte Offset 592 " group.long 0xA54++0x03 line.long 0x00 "GICD_ITARGETSR149,Interrupt Processor Targets Register 149" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO599 ,CPU Targets Byte Offset 599 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO598 ,CPU Targets Byte Offset 598 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO597 ,CPU Targets Byte Offset 597 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO596 ,CPU Targets Byte Offset 596 " group.long 0xA58++0x03 line.long 0x00 "GICD_ITARGETSR150,Interrupt Processor Targets Register 150" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO603 ,CPU Targets Byte Offset 603 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO602 ,CPU Targets Byte Offset 602 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO601 ,CPU Targets Byte Offset 601 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO600 ,CPU Targets Byte Offset 600 " group.long 0xA5C++0x03 line.long 0x00 "GICD_ITARGETSR151,Interrupt Processor Targets Register 151" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO607 ,CPU Targets Byte Offset 607 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO606 ,CPU Targets Byte Offset 606 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO605 ,CPU Targets Byte Offset 605 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO604 ,CPU Targets Byte Offset 604 " else rgroup.long 0xA40++0x03 line.long 0x00 "GICD_ITARGETSR144,Interrupt Processor Targets Register 144" rgroup.long 0xA44++0x03 line.long 0x00 "GICD_ITARGETSR145,Interrupt Processor Targets Register 145" rgroup.long 0xA48++0x03 line.long 0x00 "GICD_ITARGETSR146,Interrupt Processor Targets Register 146" rgroup.long 0xA4C++0x03 line.long 0x00 "GICD_ITARGETSR147,Interrupt Processor Targets Register 147" rgroup.long 0xA50++0x03 line.long 0x00 "GICD_ITARGETSR148,Interrupt Processor Targets Register 148" rgroup.long 0xA54++0x03 line.long 0x00 "GICD_ITARGETSR149,Interrupt Processor Targets Register 149" rgroup.long 0xA58++0x03 line.long 0x00 "GICD_ITARGETSR150,Interrupt Processor Targets Register 150" rgroup.long 0xA5C++0x03 line.long 0x00 "GICD_ITARGETSR151,Interrupt Processor Targets Register 151" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x13) group.long 0xA60++0x03 line.long 0x00 "GICD_ITARGETSR152,Interrupt Processor Targets Register 152" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO611 ,CPU Targets Byte Offset 611 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO610 ,CPU Targets Byte Offset 610 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO609 ,CPU Targets Byte Offset 609 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO608 ,CPU Targets Byte Offset 608 " group.long 0xA64++0x03 line.long 0x00 "GICD_ITARGETSR153,Interrupt Processor Targets Register 153" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO615 ,CPU Targets Byte Offset 615 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO614 ,CPU Targets Byte Offset 614 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO613 ,CPU Targets Byte Offset 613 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO612 ,CPU Targets Byte Offset 612 " group.long 0xA68++0x03 line.long 0x00 "GICD_ITARGETSR154,Interrupt Processor Targets Register 154" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO619 ,CPU Targets Byte Offset 619 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO618 ,CPU Targets Byte Offset 618 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO617 ,CPU Targets Byte Offset 617 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO616 ,CPU Targets Byte Offset 616 " group.long 0xA6C++0x03 line.long 0x00 "GICD_ITARGETSR155,Interrupt Processor Targets Register 155" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO623 ,CPU Targets Byte Offset 623 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO622 ,CPU Targets Byte Offset 622 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO621 ,CPU Targets Byte Offset 621 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO620 ,CPU Targets Byte Offset 620 " group.long 0xA70++0x03 line.long 0x00 "GICD_ITARGETSR156,Interrupt Processor Targets Register 156" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO627 ,CPU Targets Byte Offset 627 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO626 ,CPU Targets Byte Offset 626 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO625 ,CPU Targets Byte Offset 625 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO624 ,CPU Targets Byte Offset 624 " group.long 0xA74++0x03 line.long 0x00 "GICD_ITARGETSR157,Interrupt Processor Targets Register 157" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO631 ,CPU Targets Byte Offset 631 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO630 ,CPU Targets Byte Offset 630 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO629 ,CPU Targets Byte Offset 629 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO628 ,CPU Targets Byte Offset 628 " group.long 0xA78++0x03 line.long 0x00 "GICD_ITARGETSR158,Interrupt Processor Targets Register 158" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO635 ,CPU Targets Byte Offset 635 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO634 ,CPU Targets Byte Offset 634 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO633 ,CPU Targets Byte Offset 633 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO632 ,CPU Targets Byte Offset 632 " group.long 0xA7C++0x03 line.long 0x00 "GICD_ITARGETSR159,Interrupt Processor Targets Register 159" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO639 ,CPU Targets Byte Offset 639 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO638 ,CPU Targets Byte Offset 638 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO637 ,CPU Targets Byte Offset 637 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO636 ,CPU Targets Byte Offset 636 " else rgroup.long 0xA60++0x03 line.long 0x00 "GICD_ITARGETSR152,Interrupt Processor Targets Register 152" rgroup.long 0xA64++0x03 line.long 0x00 "GICD_ITARGETSR153,Interrupt Processor Targets Register 153" rgroup.long 0xA68++0x03 line.long 0x00 "GICD_ITARGETSR154,Interrupt Processor Targets Register 154" rgroup.long 0xA6C++0x03 line.long 0x00 "GICD_ITARGETSR155,Interrupt Processor Targets Register 155" rgroup.long 0xA70++0x03 line.long 0x00 "GICD_ITARGETSR156,Interrupt Processor Targets Register 156" rgroup.long 0xA74++0x03 line.long 0x00 "GICD_ITARGETSR157,Interrupt Processor Targets Register 157" rgroup.long 0xA78++0x03 line.long 0x00 "GICD_ITARGETSR158,Interrupt Processor Targets Register 158" rgroup.long 0xA7C++0x03 line.long 0x00 "GICD_ITARGETSR159,Interrupt Processor Targets Register 159" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x14) group.long 0xA80++0x03 line.long 0x00 "GICD_ITARGETSR160,Interrupt Processor Targets Register 160" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO643 ,CPU Targets Byte Offset 643 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO642 ,CPU Targets Byte Offset 642 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO641 ,CPU Targets Byte Offset 641 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO640 ,CPU Targets Byte Offset 640 " group.long 0xA84++0x03 line.long 0x00 "GICD_ITARGETSR161,Interrupt Processor Targets Register 161" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO647 ,CPU Targets Byte Offset 647 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO646 ,CPU Targets Byte Offset 646 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO645 ,CPU Targets Byte Offset 645 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO644 ,CPU Targets Byte Offset 644 " group.long 0xA88++0x03 line.long 0x00 "GICD_ITARGETSR162,Interrupt Processor Targets Register 162" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO651 ,CPU Targets Byte Offset 651 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO650 ,CPU Targets Byte Offset 650 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO649 ,CPU Targets Byte Offset 649 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO648 ,CPU Targets Byte Offset 648 " group.long 0xA8C++0x03 line.long 0x00 "GICD_ITARGETSR163,Interrupt Processor Targets Register 163" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO655 ,CPU Targets Byte Offset 655 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO654 ,CPU Targets Byte Offset 654 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO653 ,CPU Targets Byte Offset 653 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO652 ,CPU Targets Byte Offset 652 " group.long 0xA90++0x03 line.long 0x00 "GICD_ITARGETSR164,Interrupt Processor Targets Register 164" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO659 ,CPU Targets Byte Offset 659 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO658 ,CPU Targets Byte Offset 658 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO657 ,CPU Targets Byte Offset 657 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO656 ,CPU Targets Byte Offset 656 " group.long 0xA94++0x03 line.long 0x00 "GICD_ITARGETSR165,Interrupt Processor Targets Register 165" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO663 ,CPU Targets Byte Offset 663 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO662 ,CPU Targets Byte Offset 662 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO661 ,CPU Targets Byte Offset 661 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO660 ,CPU Targets Byte Offset 660 " group.long 0xA98++0x03 line.long 0x00 "GICD_ITARGETSR166,Interrupt Processor Targets Register 166" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO667 ,CPU Targets Byte Offset 667 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO666 ,CPU Targets Byte Offset 666 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO665 ,CPU Targets Byte Offset 665 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO664 ,CPU Targets Byte Offset 664 " group.long 0xA9C++0x03 line.long 0x00 "GICD_ITARGETSR167,Interrupt Processor Targets Register 167" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO671 ,CPU Targets Byte Offset 671 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO670 ,CPU Targets Byte Offset 670 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO669 ,CPU Targets Byte Offset 669 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO668 ,CPU Targets Byte Offset 668 " else rgroup.long 0xA80++0x03 line.long 0x00 "GICD_ITARGETSR160,Interrupt Processor Targets Register 160" rgroup.long 0xA84++0x03 line.long 0x00 "GICD_ITARGETSR161,Interrupt Processor Targets Register 161" rgroup.long 0xA88++0x03 line.long 0x00 "GICD_ITARGETSR162,Interrupt Processor Targets Register 162" rgroup.long 0xA8C++0x03 line.long 0x00 "GICD_ITARGETSR163,Interrupt Processor Targets Register 163" rgroup.long 0xA90++0x03 line.long 0x00 "GICD_ITARGETSR164,Interrupt Processor Targets Register 164" rgroup.long 0xA94++0x03 line.long 0x00 "GICD_ITARGETSR165,Interrupt Processor Targets Register 165" rgroup.long 0xA98++0x03 line.long 0x00 "GICD_ITARGETSR166,Interrupt Processor Targets Register 166" rgroup.long 0xA9C++0x03 line.long 0x00 "GICD_ITARGETSR167,Interrupt Processor Targets Register 167" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x15) group.long 0xAA0++0x03 line.long 0x00 "GICD_ITARGETSR168,Interrupt Processor Targets Register 168" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO675 ,CPU Targets Byte Offset 675 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO674 ,CPU Targets Byte Offset 674 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO673 ,CPU Targets Byte Offset 673 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO672 ,CPU Targets Byte Offset 672 " group.long 0xAA4++0x03 line.long 0x00 "GICD_ITARGETSR169,Interrupt Processor Targets Register 169" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO679 ,CPU Targets Byte Offset 679 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO678 ,CPU Targets Byte Offset 678 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO677 ,CPU Targets Byte Offset 677 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO676 ,CPU Targets Byte Offset 676 " group.long 0xAA8++0x03 line.long 0x00 "GICD_ITARGETSR170,Interrupt Processor Targets Register 170" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO683 ,CPU Targets Byte Offset 683 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO682 ,CPU Targets Byte Offset 682 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO681 ,CPU Targets Byte Offset 681 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO680 ,CPU Targets Byte Offset 680 " group.long 0xAAC++0x03 line.long 0x00 "GICD_ITARGETSR171,Interrupt Processor Targets Register 171" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO687 ,CPU Targets Byte Offset 687 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO686 ,CPU Targets Byte Offset 686 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO685 ,CPU Targets Byte Offset 685 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO684 ,CPU Targets Byte Offset 684 " group.long 0xAB0++0x03 line.long 0x00 "GICD_ITARGETSR172,Interrupt Processor Targets Register 172" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO691 ,CPU Targets Byte Offset 691 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO690 ,CPU Targets Byte Offset 690 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO689 ,CPU Targets Byte Offset 689 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO688 ,CPU Targets Byte Offset 688 " group.long 0xAB4++0x03 line.long 0x00 "GICD_ITARGETSR173,Interrupt Processor Targets Register 173" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO695 ,CPU Targets Byte Offset 695 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO694 ,CPU Targets Byte Offset 694 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO693 ,CPU Targets Byte Offset 693 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO692 ,CPU Targets Byte Offset 692 " group.long 0xAB8++0x03 line.long 0x00 "GICD_ITARGETSR174,Interrupt Processor Targets Register 174" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO699 ,CPU Targets Byte Offset 699 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO698 ,CPU Targets Byte Offset 698 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO697 ,CPU Targets Byte Offset 697 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO696 ,CPU Targets Byte Offset 696 " group.long 0xABC++0x03 line.long 0x00 "GICD_ITARGETSR175,Interrupt Processor Targets Register 175" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO703 ,CPU Targets Byte Offset 703 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO702 ,CPU Targets Byte Offset 702 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO701 ,CPU Targets Byte Offset 701 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO700 ,CPU Targets Byte Offset 700 " else rgroup.long 0xAA0++0x03 line.long 0x00 "GICD_ITARGETSR168,Interrupt Processor Targets Register 168" rgroup.long 0xAA4++0x03 line.long 0x00 "GICD_ITARGETSR169,Interrupt Processor Targets Register 169" rgroup.long 0xAA8++0x03 line.long 0x00 "GICD_ITARGETSR170,Interrupt Processor Targets Register 170" rgroup.long 0xAAC++0x03 line.long 0x00 "GICD_ITARGETSR171,Interrupt Processor Targets Register 171" rgroup.long 0xAB0++0x03 line.long 0x00 "GICD_ITARGETSR172,Interrupt Processor Targets Register 172" rgroup.long 0xAB4++0x03 line.long 0x00 "GICD_ITARGETSR173,Interrupt Processor Targets Register 173" rgroup.long 0xAB8++0x03 line.long 0x00 "GICD_ITARGETSR174,Interrupt Processor Targets Register 174" rgroup.long 0xABC++0x03 line.long 0x00 "GICD_ITARGETSR175,Interrupt Processor Targets Register 175" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x16) group.long 0xAC0++0x03 line.long 0x00 "GICD_ITARGETSR176,Interrupt Processor Targets Register 176" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO707 ,CPU Targets Byte Offset 707 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO706 ,CPU Targets Byte Offset 706 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO705 ,CPU Targets Byte Offset 705 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO704 ,CPU Targets Byte Offset 704 " group.long 0xAC4++0x03 line.long 0x00 "GICD_ITARGETSR177,Interrupt Processor Targets Register 177" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO711 ,CPU Targets Byte Offset 711 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO710 ,CPU Targets Byte Offset 710 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO709 ,CPU Targets Byte Offset 709 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO708 ,CPU Targets Byte Offset 708 " group.long 0xAC8++0x03 line.long 0x00 "GICD_ITARGETSR178,Interrupt Processor Targets Register 178" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO715 ,CPU Targets Byte Offset 715 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO714 ,CPU Targets Byte Offset 714 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO713 ,CPU Targets Byte Offset 713 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO712 ,CPU Targets Byte Offset 712 " group.long 0xACC++0x03 line.long 0x00 "GICD_ITARGETSR179,Interrupt Processor Targets Register 179" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO719 ,CPU Targets Byte Offset 719 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO718 ,CPU Targets Byte Offset 718 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO717 ,CPU Targets Byte Offset 717 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO716 ,CPU Targets Byte Offset 716 " group.long 0xAD0++0x03 line.long 0x00 "GICD_ITARGETSR180,Interrupt Processor Targets Register 180" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO723 ,CPU Targets Byte Offset 723 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO722 ,CPU Targets Byte Offset 722 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO721 ,CPU Targets Byte Offset 721 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO720 ,CPU Targets Byte Offset 720 " group.long 0xAD4++0x03 line.long 0x00 "GICD_ITARGETSR181,Interrupt Processor Targets Register 181" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO727 ,CPU Targets Byte Offset 727 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO726 ,CPU Targets Byte Offset 726 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO725 ,CPU Targets Byte Offset 725 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO724 ,CPU Targets Byte Offset 724 " group.long 0xAD8++0x03 line.long 0x00 "GICD_ITARGETSR182,Interrupt Processor Targets Register 182" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO731 ,CPU Targets Byte Offset 731 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO730 ,CPU Targets Byte Offset 730 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO729 ,CPU Targets Byte Offset 729 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO728 ,CPU Targets Byte Offset 728 " group.long 0xADC++0x03 line.long 0x00 "GICD_ITARGETSR183,Interrupt Processor Targets Register 183" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO735 ,CPU Targets Byte Offset 735 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO734 ,CPU Targets Byte Offset 734 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO733 ,CPU Targets Byte Offset 733 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO732 ,CPU Targets Byte Offset 732 " else rgroup.long 0xAC0++0x03 line.long 0x00 "GICD_ITARGETSR176,Interrupt Processor Targets Register 176" rgroup.long 0xAC4++0x03 line.long 0x00 "GICD_ITARGETSR177,Interrupt Processor Targets Register 177" rgroup.long 0xAC8++0x03 line.long 0x00 "GICD_ITARGETSR178,Interrupt Processor Targets Register 178" rgroup.long 0xACC++0x03 line.long 0x00 "GICD_ITARGETSR179,Interrupt Processor Targets Register 179" rgroup.long 0xAD0++0x03 line.long 0x00 "GICD_ITARGETSR180,Interrupt Processor Targets Register 180" rgroup.long 0xAD4++0x03 line.long 0x00 "GICD_ITARGETSR181,Interrupt Processor Targets Register 181" rgroup.long 0xAD8++0x03 line.long 0x00 "GICD_ITARGETSR182,Interrupt Processor Targets Register 182" rgroup.long 0xADC++0x03 line.long 0x00 "GICD_ITARGETSR183,Interrupt Processor Targets Register 183" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x17) group.long 0xAE0++0x03 line.long 0x00 "GICD_ITARGETSR184,Interrupt Processor Targets Register 184" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO739 ,CPU Targets Byte Offset 739 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO738 ,CPU Targets Byte Offset 738 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO737 ,CPU Targets Byte Offset 737 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO736 ,CPU Targets Byte Offset 736 " group.long 0xAE4++0x03 line.long 0x00 "GICD_ITARGETSR185,Interrupt Processor Targets Register 185" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO743 ,CPU Targets Byte Offset 743 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO742 ,CPU Targets Byte Offset 742 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO741 ,CPU Targets Byte Offset 741 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO740 ,CPU Targets Byte Offset 740 " group.long 0xAE8++0x03 line.long 0x00 "GICD_ITARGETSR186,Interrupt Processor Targets Register 186" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO747 ,CPU Targets Byte Offset 747 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO746 ,CPU Targets Byte Offset 746 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO745 ,CPU Targets Byte Offset 745 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO744 ,CPU Targets Byte Offset 744 " group.long 0xAEC++0x03 line.long 0x00 "GICD_ITARGETSR187,Interrupt Processor Targets Register 187" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO751 ,CPU Targets Byte Offset 751 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO750 ,CPU Targets Byte Offset 750 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO749 ,CPU Targets Byte Offset 749 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO748 ,CPU Targets Byte Offset 748 " group.long 0xAF0++0x03 line.long 0x00 "GICD_ITARGETSR188,Interrupt Processor Targets Register 188" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO755 ,CPU Targets Byte Offset 755 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO754 ,CPU Targets Byte Offset 754 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO753 ,CPU Targets Byte Offset 753 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO752 ,CPU Targets Byte Offset 752 " group.long 0xAF4++0x03 line.long 0x00 "GICD_ITARGETSR189,Interrupt Processor Targets Register 189" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO759 ,CPU Targets Byte Offset 759 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO758 ,CPU Targets Byte Offset 758 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO757 ,CPU Targets Byte Offset 757 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO756 ,CPU Targets Byte Offset 756 " group.long 0xAF8++0x03 line.long 0x00 "GICD_ITARGETSR190,Interrupt Processor Targets Register 190" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO763 ,CPU Targets Byte Offset 763 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO762 ,CPU Targets Byte Offset 762 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO761 ,CPU Targets Byte Offset 761 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO760 ,CPU Targets Byte Offset 760 " group.long 0xAFC++0x03 line.long 0x00 "GICD_ITARGETSR191,Interrupt Processor Targets Register 191" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO767 ,CPU Targets Byte Offset 767 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO766 ,CPU Targets Byte Offset 766 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO765 ,CPU Targets Byte Offset 765 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO764 ,CPU Targets Byte Offset 764 " else rgroup.long 0xAE0++0x03 line.long 0x00 "GICD_ITARGETSR184,Interrupt Processor Targets Register 184" rgroup.long 0xAE4++0x03 line.long 0x00 "GICD_ITARGETSR185,Interrupt Processor Targets Register 185" rgroup.long 0xAE8++0x03 line.long 0x00 "GICD_ITARGETSR186,Interrupt Processor Targets Register 186" rgroup.long 0xAEC++0x03 line.long 0x00 "GICD_ITARGETSR187,Interrupt Processor Targets Register 187" rgroup.long 0xAF0++0x03 line.long 0x00 "GICD_ITARGETSR188,Interrupt Processor Targets Register 188" rgroup.long 0xAF4++0x03 line.long 0x00 "GICD_ITARGETSR189,Interrupt Processor Targets Register 189" rgroup.long 0xAF8++0x03 line.long 0x00 "GICD_ITARGETSR190,Interrupt Processor Targets Register 190" rgroup.long 0xAFC++0x03 line.long 0x00 "GICD_ITARGETSR191,Interrupt Processor Targets Register 191" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x18) group.long 0xB00++0x03 line.long 0x00 "GICD_ITARGETSR192,Interrupt Processor Targets Register 192" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO771 ,CPU Targets Byte Offset 771 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO770 ,CPU Targets Byte Offset 770 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO769 ,CPU Targets Byte Offset 769 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO768 ,CPU Targets Byte Offset 768 " group.long 0xB04++0x03 line.long 0x00 "GICD_ITARGETSR193,Interrupt Processor Targets Register 193" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO775 ,CPU Targets Byte Offset 775 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO774 ,CPU Targets Byte Offset 774 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO773 ,CPU Targets Byte Offset 773 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO772 ,CPU Targets Byte Offset 772 " group.long 0xB08++0x03 line.long 0x00 "GICD_ITARGETSR194,Interrupt Processor Targets Register 194" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO779 ,CPU Targets Byte Offset 779 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO778 ,CPU Targets Byte Offset 778 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO777 ,CPU Targets Byte Offset 777 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO776 ,CPU Targets Byte Offset 776 " group.long 0xB0C++0x03 line.long 0x00 "GICD_ITARGETSR195,Interrupt Processor Targets Register 195" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO783 ,CPU Targets Byte Offset 783 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO782 ,CPU Targets Byte Offset 782 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO781 ,CPU Targets Byte Offset 781 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO780 ,CPU Targets Byte Offset 780 " group.long 0xB10++0x03 line.long 0x00 "GICD_ITARGETSR196,Interrupt Processor Targets Register 196" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO787 ,CPU Targets Byte Offset 787 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO786 ,CPU Targets Byte Offset 786 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO785 ,CPU Targets Byte Offset 785 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO784 ,CPU Targets Byte Offset 784 " group.long 0xB14++0x03 line.long 0x00 "GICD_ITARGETSR197,Interrupt Processor Targets Register 197" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO791 ,CPU Targets Byte Offset 791 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO790 ,CPU Targets Byte Offset 790 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO789 ,CPU Targets Byte Offset 789 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO788 ,CPU Targets Byte Offset 788 " group.long 0xB18++0x03 line.long 0x00 "GICD_ITARGETSR198,Interrupt Processor Targets Register 198" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO795 ,CPU Targets Byte Offset 795 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO794 ,CPU Targets Byte Offset 794 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO793 ,CPU Targets Byte Offset 793 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO792 ,CPU Targets Byte Offset 792 " group.long 0xB1C++0x03 line.long 0x00 "GICD_ITARGETSR199,Interrupt Processor Targets Register 199" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO799 ,CPU Targets Byte Offset 799 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO798 ,CPU Targets Byte Offset 798 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO797 ,CPU Targets Byte Offset 797 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO796 ,CPU Targets Byte Offset 796 " else rgroup.long 0xB00++0x03 line.long 0x00 "GICD_ITARGETSR192,Interrupt Processor Targets Register 192" rgroup.long 0xB04++0x03 line.long 0x00 "GICD_ITARGETSR193,Interrupt Processor Targets Register 193" rgroup.long 0xB08++0x03 line.long 0x00 "GICD_ITARGETSR194,Interrupt Processor Targets Register 194" rgroup.long 0xB0C++0x03 line.long 0x00 "GICD_ITARGETSR195,Interrupt Processor Targets Register 195" rgroup.long 0xB10++0x03 line.long 0x00 "GICD_ITARGETSR196,Interrupt Processor Targets Register 196" rgroup.long 0xB14++0x03 line.long 0x00 "GICD_ITARGETSR197,Interrupt Processor Targets Register 197" rgroup.long 0xB18++0x03 line.long 0x00 "GICD_ITARGETSR198,Interrupt Processor Targets Register 198" rgroup.long 0xB1C++0x03 line.long 0x00 "GICD_ITARGETSR199,Interrupt Processor Targets Register 199" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x19) group.long 0xB20++0x03 line.long 0x00 "GICD_ITARGETSR200,Interrupt Processor Targets Register 200" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO803 ,CPU Targets Byte Offset 803 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO802 ,CPU Targets Byte Offset 802 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO801 ,CPU Targets Byte Offset 801 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO800 ,CPU Targets Byte Offset 800 " group.long 0xB24++0x03 line.long 0x00 "GICD_ITARGETSR201,Interrupt Processor Targets Register 201" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO807 ,CPU Targets Byte Offset 807 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO806 ,CPU Targets Byte Offset 806 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO805 ,CPU Targets Byte Offset 805 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO804 ,CPU Targets Byte Offset 804 " group.long 0xB28++0x03 line.long 0x00 "GICD_ITARGETSR202,Interrupt Processor Targets Register 202" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO811 ,CPU Targets Byte Offset 811 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO810 ,CPU Targets Byte Offset 810 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO809 ,CPU Targets Byte Offset 809 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO808 ,CPU Targets Byte Offset 808 " group.long 0xB2C++0x03 line.long 0x00 "GICD_ITARGETSR203,Interrupt Processor Targets Register 203" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO815 ,CPU Targets Byte Offset 815 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO814 ,CPU Targets Byte Offset 814 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO813 ,CPU Targets Byte Offset 813 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO812 ,CPU Targets Byte Offset 812 " group.long 0xB30++0x03 line.long 0x00 "GICD_ITARGETSR204,Interrupt Processor Targets Register 204" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO819 ,CPU Targets Byte Offset 819 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO818 ,CPU Targets Byte Offset 818 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO817 ,CPU Targets Byte Offset 817 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO816 ,CPU Targets Byte Offset 816 " group.long 0xB34++0x03 line.long 0x00 "GICD_ITARGETSR205,Interrupt Processor Targets Register 205" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO823 ,CPU Targets Byte Offset 823 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO822 ,CPU Targets Byte Offset 822 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO821 ,CPU Targets Byte Offset 821 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO820 ,CPU Targets Byte Offset 820 " group.long 0xB38++0x03 line.long 0x00 "GICD_ITARGETSR206,Interrupt Processor Targets Register 206" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO827 ,CPU Targets Byte Offset 827 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO826 ,CPU Targets Byte Offset 826 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO825 ,CPU Targets Byte Offset 825 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO824 ,CPU Targets Byte Offset 824 " group.long 0xB3C++0x03 line.long 0x00 "GICD_ITARGETSR207,Interrupt Processor Targets Register 207" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO831 ,CPU Targets Byte Offset 831 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO830 ,CPU Targets Byte Offset 830 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO829 ,CPU Targets Byte Offset 829 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO828 ,CPU Targets Byte Offset 828 " else rgroup.long 0xB20++0x03 line.long 0x00 "GICD_ITARGETSR200,Interrupt Processor Targets Register 200" rgroup.long 0xB24++0x03 line.long 0x00 "GICD_ITARGETSR201,Interrupt Processor Targets Register 201" rgroup.long 0xB28++0x03 line.long 0x00 "GICD_ITARGETSR202,Interrupt Processor Targets Register 202" rgroup.long 0xB2C++0x03 line.long 0x00 "GICD_ITARGETSR203,Interrupt Processor Targets Register 203" rgroup.long 0xB30++0x03 line.long 0x00 "GICD_ITARGETSR204,Interrupt Processor Targets Register 204" rgroup.long 0xB34++0x03 line.long 0x00 "GICD_ITARGETSR205,Interrupt Processor Targets Register 205" rgroup.long 0xB38++0x03 line.long 0x00 "GICD_ITARGETSR206,Interrupt Processor Targets Register 206" rgroup.long 0xB3C++0x03 line.long 0x00 "GICD_ITARGETSR207,Interrupt Processor Targets Register 207" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x1A) group.long 0xB40++0x03 line.long 0x00 "GICD_ITARGETSR208,Interrupt Processor Targets Register 208" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO835 ,CPU Targets Byte Offset 835 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO834 ,CPU Targets Byte Offset 834 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO833 ,CPU Targets Byte Offset 833 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO832 ,CPU Targets Byte Offset 832 " group.long 0xB44++0x03 line.long 0x00 "GICD_ITARGETSR209,Interrupt Processor Targets Register 209" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO839 ,CPU Targets Byte Offset 839 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO838 ,CPU Targets Byte Offset 838 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO837 ,CPU Targets Byte Offset 837 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO836 ,CPU Targets Byte Offset 836 " group.long 0xB48++0x03 line.long 0x00 "GICD_ITARGETSR210,Interrupt Processor Targets Register 210" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO843 ,CPU Targets Byte Offset 843 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO842 ,CPU Targets Byte Offset 842 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO841 ,CPU Targets Byte Offset 841 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO840 ,CPU Targets Byte Offset 840 " group.long 0xB4C++0x03 line.long 0x00 "GICD_ITARGETSR211,Interrupt Processor Targets Register 211" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO847 ,CPU Targets Byte Offset 847 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO846 ,CPU Targets Byte Offset 846 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO845 ,CPU Targets Byte Offset 845 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO844 ,CPU Targets Byte Offset 844 " group.long 0xB50++0x03 line.long 0x00 "GICD_ITARGETSR212,Interrupt Processor Targets Register 212" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO851 ,CPU Targets Byte Offset 851 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO850 ,CPU Targets Byte Offset 850 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO849 ,CPU Targets Byte Offset 849 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO848 ,CPU Targets Byte Offset 848 " group.long 0xB54++0x03 line.long 0x00 "GICD_ITARGETSR213,Interrupt Processor Targets Register 213" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO855 ,CPU Targets Byte Offset 855 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO854 ,CPU Targets Byte Offset 854 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO853 ,CPU Targets Byte Offset 853 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO852 ,CPU Targets Byte Offset 852 " group.long 0xB58++0x03 line.long 0x00 "GICD_ITARGETSR214,Interrupt Processor Targets Register 214" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO859 ,CPU Targets Byte Offset 859 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO858 ,CPU Targets Byte Offset 858 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO857 ,CPU Targets Byte Offset 857 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO856 ,CPU Targets Byte Offset 856 " group.long 0xB5C++0x03 line.long 0x00 "GICD_ITARGETSR215,Interrupt Processor Targets Register 215" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO863 ,CPU Targets Byte Offset 863 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO862 ,CPU Targets Byte Offset 862 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO861 ,CPU Targets Byte Offset 861 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO860 ,CPU Targets Byte Offset 860 " else rgroup.long 0xB40++0x03 line.long 0x00 "GICD_ITARGETSR208,Interrupt Processor Targets Register 208" rgroup.long 0xB44++0x03 line.long 0x00 "GICD_ITARGETSR209,Interrupt Processor Targets Register 209" rgroup.long 0xB48++0x03 line.long 0x00 "GICD_ITARGETSR210,Interrupt Processor Targets Register 210" rgroup.long 0xB4C++0x03 line.long 0x00 "GICD_ITARGETSR211,Interrupt Processor Targets Register 211" rgroup.long 0xB50++0x03 line.long 0x00 "GICD_ITARGETSR212,Interrupt Processor Targets Register 212" rgroup.long 0xB54++0x03 line.long 0x00 "GICD_ITARGETSR213,Interrupt Processor Targets Register 213" rgroup.long 0xB58++0x03 line.long 0x00 "GICD_ITARGETSR214,Interrupt Processor Targets Register 214" rgroup.long 0xB5C++0x03 line.long 0x00 "GICD_ITARGETSR215,Interrupt Processor Targets Register 215" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x1B) group.long 0xB60++0x03 line.long 0x00 "GICD_ITARGETSR216,Interrupt Processor Targets Register 216" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO867 ,CPU Targets Byte Offset 867 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO866 ,CPU Targets Byte Offset 866 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO865 ,CPU Targets Byte Offset 865 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO864 ,CPU Targets Byte Offset 864 " group.long 0xB64++0x03 line.long 0x00 "GICD_ITARGETSR217,Interrupt Processor Targets Register 217" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO871 ,CPU Targets Byte Offset 871 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO870 ,CPU Targets Byte Offset 870 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO869 ,CPU Targets Byte Offset 869 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO868 ,CPU Targets Byte Offset 868 " group.long 0xB68++0x03 line.long 0x00 "GICD_ITARGETSR218,Interrupt Processor Targets Register 218" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO875 ,CPU Targets Byte Offset 875 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO874 ,CPU Targets Byte Offset 874 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO873 ,CPU Targets Byte Offset 873 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO872 ,CPU Targets Byte Offset 872 " group.long 0xB6C++0x03 line.long 0x00 "GICD_ITARGETSR219,Interrupt Processor Targets Register 219" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO879 ,CPU Targets Byte Offset 879 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO878 ,CPU Targets Byte Offset 878 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO877 ,CPU Targets Byte Offset 877 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO876 ,CPU Targets Byte Offset 876 " group.long 0xB70++0x03 line.long 0x00 "GICD_ITARGETSR220,Interrupt Processor Targets Register 220" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO883 ,CPU Targets Byte Offset 883 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO882 ,CPU Targets Byte Offset 882 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO881 ,CPU Targets Byte Offset 881 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO880 ,CPU Targets Byte Offset 880 " group.long 0xB74++0x03 line.long 0x00 "GICD_ITARGETSR221,Interrupt Processor Targets Register 221" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO887 ,CPU Targets Byte Offset 887 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO886 ,CPU Targets Byte Offset 886 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO885 ,CPU Targets Byte Offset 885 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO884 ,CPU Targets Byte Offset 884 " group.long 0xB78++0x03 line.long 0x00 "GICD_ITARGETSR222,Interrupt Processor Targets Register 222" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO891 ,CPU Targets Byte Offset 891 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO890 ,CPU Targets Byte Offset 890 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO889 ,CPU Targets Byte Offset 889 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO888 ,CPU Targets Byte Offset 888 " group.long 0xB7C++0x03 line.long 0x00 "GICD_ITARGETSR223,Interrupt Processor Targets Register 223" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO895 ,CPU Targets Byte Offset 895 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO894 ,CPU Targets Byte Offset 894 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO893 ,CPU Targets Byte Offset 893 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO892 ,CPU Targets Byte Offset 892 " else rgroup.long 0xB60++0x03 line.long 0x00 "GICD_ITARGETSR216,Interrupt Processor Targets Register 216" rgroup.long 0xB64++0x03 line.long 0x00 "GICD_ITARGETSR217,Interrupt Processor Targets Register 217" rgroup.long 0xB68++0x03 line.long 0x00 "GICD_ITARGETSR218,Interrupt Processor Targets Register 218" rgroup.long 0xB6C++0x03 line.long 0x00 "GICD_ITARGETSR219,Interrupt Processor Targets Register 219" rgroup.long 0xB70++0x03 line.long 0x00 "GICD_ITARGETSR220,Interrupt Processor Targets Register 220" rgroup.long 0xB74++0x03 line.long 0x00 "GICD_ITARGETSR221,Interrupt Processor Targets Register 221" rgroup.long 0xB78++0x03 line.long 0x00 "GICD_ITARGETSR222,Interrupt Processor Targets Register 222" rgroup.long 0xB7C++0x03 line.long 0x00 "GICD_ITARGETSR223,Interrupt Processor Targets Register 223" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x1C) group.long 0xB80++0x03 line.long 0x00 "GICD_ITARGETSR224,Interrupt Processor Targets Register 224" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO899 ,CPU Targets Byte Offset 899 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO898 ,CPU Targets Byte Offset 898 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO897 ,CPU Targets Byte Offset 897 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO896 ,CPU Targets Byte Offset 896 " group.long 0xB84++0x03 line.long 0x00 "GICD_ITARGETSR225,Interrupt Processor Targets Register 225" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO903 ,CPU Targets Byte Offset 903 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO902 ,CPU Targets Byte Offset 902 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO901 ,CPU Targets Byte Offset 901 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO900 ,CPU Targets Byte Offset 900 " group.long 0xB88++0x03 line.long 0x00 "GICD_ITARGETSR226,Interrupt Processor Targets Register 226" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO907 ,CPU Targets Byte Offset 907 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO906 ,CPU Targets Byte Offset 906 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO905 ,CPU Targets Byte Offset 905 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO904 ,CPU Targets Byte Offset 904 " group.long 0xB8C++0x03 line.long 0x00 "GICD_ITARGETSR227,Interrupt Processor Targets Register 227" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO911 ,CPU Targets Byte Offset 911 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO910 ,CPU Targets Byte Offset 910 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO909 ,CPU Targets Byte Offset 909 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO908 ,CPU Targets Byte Offset 908 " group.long 0xB90++0x03 line.long 0x00 "GICD_ITARGETSR228,Interrupt Processor Targets Register 228" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO915 ,CPU Targets Byte Offset 915 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO914 ,CPU Targets Byte Offset 914 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO913 ,CPU Targets Byte Offset 913 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO912 ,CPU Targets Byte Offset 912 " group.long 0xB94++0x03 line.long 0x00 "GICD_ITARGETSR229,Interrupt Processor Targets Register 229" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO919 ,CPU Targets Byte Offset 919 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO918 ,CPU Targets Byte Offset 918 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO917 ,CPU Targets Byte Offset 917 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO916 ,CPU Targets Byte Offset 916 " group.long 0xB98++0x03 line.long 0x00 "GICD_ITARGETSR230,Interrupt Processor Targets Register 230" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO923 ,CPU Targets Byte Offset 923 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO922 ,CPU Targets Byte Offset 922 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO921 ,CPU Targets Byte Offset 921 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO920 ,CPU Targets Byte Offset 920 " group.long 0xB9C++0x03 line.long 0x00 "GICD_ITARGETSR231,Interrupt Processor Targets Register 231" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO927 ,CPU Targets Byte Offset 927 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO926 ,CPU Targets Byte Offset 926 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO925 ,CPU Targets Byte Offset 925 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO924 ,CPU Targets Byte Offset 924 " else rgroup.long 0xB80++0x03 line.long 0x00 "GICD_ITARGETSR224,Interrupt Processor Targets Register 224" rgroup.long 0xB84++0x03 line.long 0x00 "GICD_ITARGETSR225,Interrupt Processor Targets Register 225" rgroup.long 0xB88++0x03 line.long 0x00 "GICD_ITARGETSR226,Interrupt Processor Targets Register 226" rgroup.long 0xB8C++0x03 line.long 0x00 "GICD_ITARGETSR227,Interrupt Processor Targets Register 227" rgroup.long 0xB90++0x03 line.long 0x00 "GICD_ITARGETSR228,Interrupt Processor Targets Register 228" rgroup.long 0xB94++0x03 line.long 0x00 "GICD_ITARGETSR229,Interrupt Processor Targets Register 229" rgroup.long 0xB98++0x03 line.long 0x00 "GICD_ITARGETSR230,Interrupt Processor Targets Register 230" rgroup.long 0xB9C++0x03 line.long 0x00 "GICD_ITARGETSR231,Interrupt Processor Targets Register 231" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x1D) group.long 0xBA0++0x03 line.long 0x00 "GICD_ITARGETSR232,Interrupt Processor Targets Register 232" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO931 ,CPU Targets Byte Offset 931 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO930 ,CPU Targets Byte Offset 930 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO929 ,CPU Targets Byte Offset 929 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO928 ,CPU Targets Byte Offset 928 " group.long 0xBA4++0x03 line.long 0x00 "GICD_ITARGETSR233,Interrupt Processor Targets Register 233" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO935 ,CPU Targets Byte Offset 935 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO934 ,CPU Targets Byte Offset 934 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO933 ,CPU Targets Byte Offset 933 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO932 ,CPU Targets Byte Offset 932 " group.long 0xBA8++0x03 line.long 0x00 "GICD_ITARGETSR234,Interrupt Processor Targets Register 234" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO939 ,CPU Targets Byte Offset 939 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO938 ,CPU Targets Byte Offset 938 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO937 ,CPU Targets Byte Offset 937 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO936 ,CPU Targets Byte Offset 936 " group.long 0xBAC++0x03 line.long 0x00 "GICD_ITARGETSR235,Interrupt Processor Targets Register 235" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO943 ,CPU Targets Byte Offset 943 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO942 ,CPU Targets Byte Offset 942 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO941 ,CPU Targets Byte Offset 941 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO940 ,CPU Targets Byte Offset 940 " group.long 0xBB0++0x03 line.long 0x00 "GICD_ITARGETSR236,Interrupt Processor Targets Register 236" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO947 ,CPU Targets Byte Offset 947 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO946 ,CPU Targets Byte Offset 946 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO945 ,CPU Targets Byte Offset 945 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO944 ,CPU Targets Byte Offset 944 " group.long 0xBB4++0x03 line.long 0x00 "GICD_ITARGETSR237,Interrupt Processor Targets Register 237" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO951 ,CPU Targets Byte Offset 951 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO950 ,CPU Targets Byte Offset 950 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO949 ,CPU Targets Byte Offset 949 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO948 ,CPU Targets Byte Offset 948 " group.long 0xBB8++0x03 line.long 0x00 "GICD_ITARGETSR238,Interrupt Processor Targets Register 238" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO955 ,CPU Targets Byte Offset 955 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO954 ,CPU Targets Byte Offset 954 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO953 ,CPU Targets Byte Offset 953 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO952 ,CPU Targets Byte Offset 952 " group.long 0xBBC++0x03 line.long 0x00 "GICD_ITARGETSR239,Interrupt Processor Targets Register 239" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO959 ,CPU Targets Byte Offset 959 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO958 ,CPU Targets Byte Offset 958 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO957 ,CPU Targets Byte Offset 957 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO956 ,CPU Targets Byte Offset 956 " else rgroup.long 0xBA0++0x03 line.long 0x00 "GICD_ITARGETSR232,Interrupt Processor Targets Register 232" rgroup.long 0xBA4++0x03 line.long 0x00 "GICD_ITARGETSR233,Interrupt Processor Targets Register 233" rgroup.long 0xBA8++0x03 line.long 0x00 "GICD_ITARGETSR234,Interrupt Processor Targets Register 234" rgroup.long 0xBAC++0x03 line.long 0x00 "GICD_ITARGETSR235,Interrupt Processor Targets Register 235" rgroup.long 0xBB0++0x03 line.long 0x00 "GICD_ITARGETSR236,Interrupt Processor Targets Register 236" rgroup.long 0xBB4++0x03 line.long 0x00 "GICD_ITARGETSR237,Interrupt Processor Targets Register 237" rgroup.long 0xBB8++0x03 line.long 0x00 "GICD_ITARGETSR238,Interrupt Processor Targets Register 238" rgroup.long 0xBBC++0x03 line.long 0x00 "GICD_ITARGETSR239,Interrupt Processor Targets Register 239" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x1E) group.long 0xBC0++0x03 line.long 0x00 "GICD_ITARGETSR240,Interrupt Processor Targets Register 240" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO963 ,CPU Targets Byte Offset 963 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO962 ,CPU Targets Byte Offset 962 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO961 ,CPU Targets Byte Offset 961 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO960 ,CPU Targets Byte Offset 960 " group.long 0xBC4++0x03 line.long 0x00 "GICD_ITARGETSR241,Interrupt Processor Targets Register 241" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO967 ,CPU Targets Byte Offset 967 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO966 ,CPU Targets Byte Offset 966 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO965 ,CPU Targets Byte Offset 965 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO964 ,CPU Targets Byte Offset 964 " group.long 0xBC8++0x03 line.long 0x00 "GICD_ITARGETSR242,Interrupt Processor Targets Register 242" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO971 ,CPU Targets Byte Offset 971 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO970 ,CPU Targets Byte Offset 970 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO969 ,CPU Targets Byte Offset 969 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO968 ,CPU Targets Byte Offset 968 " group.long 0xBCC++0x03 line.long 0x00 "GICD_ITARGETSR243,Interrupt Processor Targets Register 243" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO975 ,CPU Targets Byte Offset 975 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO974 ,CPU Targets Byte Offset 974 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO973 ,CPU Targets Byte Offset 973 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO972 ,CPU Targets Byte Offset 972 " group.long 0xBD0++0x03 line.long 0x00 "GICD_ITARGETSR244,Interrupt Processor Targets Register 244" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO979 ,CPU Targets Byte Offset 979 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO978 ,CPU Targets Byte Offset 978 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO977 ,CPU Targets Byte Offset 977 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO976 ,CPU Targets Byte Offset 976 " group.long 0xBD4++0x03 line.long 0x00 "GICD_ITARGETSR245,Interrupt Processor Targets Register 245" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO983 ,CPU Targets Byte Offset 983 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO982 ,CPU Targets Byte Offset 982 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO981 ,CPU Targets Byte Offset 981 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO980 ,CPU Targets Byte Offset 980 " group.long 0xBD8++0x03 line.long 0x00 "GICD_ITARGETSR246,Interrupt Processor Targets Register 246" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO987 ,CPU Targets Byte Offset 987 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO986 ,CPU Targets Byte Offset 986 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO985 ,CPU Targets Byte Offset 985 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO984 ,CPU Targets Byte Offset 984 " group.long 0xBDC++0x03 line.long 0x00 "GICD_ITARGETSR247,Interrupt Processor Targets Register 247" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO991 ,CPU Targets Byte Offset 991 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO990 ,CPU Targets Byte Offset 990 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO989 ,CPU Targets Byte Offset 989 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO988 ,CPU Targets Byte Offset 988 " else rgroup.long 0xBC0++0x03 line.long 0x00 "GICD_ITARGETSR240,Interrupt Processor Targets Register 240" rgroup.long 0xBC4++0x03 line.long 0x00 "GICD_ITARGETSR241,Interrupt Processor Targets Register 241" rgroup.long 0xBC8++0x03 line.long 0x00 "GICD_ITARGETSR242,Interrupt Processor Targets Register 242" rgroup.long 0xBCC++0x03 line.long 0x00 "GICD_ITARGETSR243,Interrupt Processor Targets Register 243" rgroup.long 0xBD0++0x03 line.long 0x00 "GICD_ITARGETSR244,Interrupt Processor Targets Register 244" rgroup.long 0xBD4++0x03 line.long 0x00 "GICD_ITARGETSR245,Interrupt Processor Targets Register 245" rgroup.long 0xBD8++0x03 line.long 0x00 "GICD_ITARGETSR246,Interrupt Processor Targets Register 246" rgroup.long 0xBDC++0x03 line.long 0x00 "GICD_ITARGETSR247,Interrupt Processor Targets Register 247" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x1F) group.long 0xBE0++0x03 line.long 0x00 "GICD_ITARGETSR248,Interrupt Processor Targets Register 248" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO995 ,CPU Targets Byte Offset 995 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO994 ,CPU Targets Byte Offset 994 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO993 ,CPU Targets Byte Offset 993 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO992 ,CPU Targets Byte Offset 992 " group.long 0xBE4++0x03 line.long 0x00 "GICD_ITARGETSR249,Interrupt Processor Targets Register 249" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO999 ,CPU Targets Byte Offset 999 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO998 ,CPU Targets Byte Offset 998 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO997 ,CPU Targets Byte Offset 997 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO996 ,CPU Targets Byte Offset 996 " group.long 0xBE8++0x03 line.long 0x00 "GICD_ITARGETSR250,Interrupt Processor Targets Register 250" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO1003 ,CPU Targets Byte Offset 1003" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO1002 ,CPU Targets Byte Offset 1002" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1001 ,CPU Targets Byte Offset 1001" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO1000 ,CPU Targets Byte Offset 1000" group.long 0xBEC++0x03 line.long 0x00 "GICD_ITARGETSR251,Interrupt Processor Targets Register 251" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO1007 ,CPU Targets Byte Offset 1007" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO1006 ,CPU Targets Byte Offset 1006" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1005 ,CPU Targets Byte Offset 1005" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO1004 ,CPU Targets Byte Offset 1004" group.long 0xBF0++0x03 line.long 0x00 "GICD_ITARGETSR252,Interrupt Processor Targets Register 252" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO1011 ,CPU Targets Byte Offset 1011" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO1010 ,CPU Targets Byte Offset 1010" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1009 ,CPU Targets Byte Offset 1009" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO1008 ,CPU Targets Byte Offset 1008" group.long 0xBF4++0x03 line.long 0x00 "GICD_ITARGETSR253,Interrupt Processor Targets Register 253" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO1015 ,CPU Targets Byte Offset 1015" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO1014 ,CPU Targets Byte Offset 1014" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1013 ,CPU Targets Byte Offset 1013" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO1012 ,CPU Targets Byte Offset 1012" group.long 0xBF8++0x03 line.long 0x00 "GICD_ITARGETSR254,Interrupt Processor Targets Register 254" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO1019 ,CPU Targets Byte Offset 1019" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO1018 ,CPU Targets Byte Offset 1018" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1017 ,CPU Targets Byte Offset 1017" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO1016 ,CPU Targets Byte Offset 1016" else rgroup.long 0xBE0++0x03 line.long 0x00 "GICD_ITARGETSR248,Interrupt Processor Targets Register 248" rgroup.long 0xBE4++0x03 line.long 0x00 "GICD_ITARGETSR249,Interrupt Processor Targets Register 249" rgroup.long 0xBE8++0x03 line.long 0x00 "GICD_ITARGETSR250,Interrupt Processor Targets Register 250" rgroup.long 0xBEC++0x03 line.long 0x00 "GICD_ITARGETSR251,Interrupt Processor Targets Register 251" rgroup.long 0xBF0++0x03 line.long 0x00 "GICD_ITARGETSR252,Interrupt Processor Targets Register 252" rgroup.long 0xBF4++0x03 line.long 0x00 "GICD_ITARGETSR253,Interrupt Processor Targets Register 253" rgroup.long 0xBF8++0x03 line.long 0x00 "GICD_ITARGETSR254,Interrupt Processor Targets Register 254" endif else rgroup.long 0x800++0x03 line.long 0x00 "GICD_ITARGETSR0 ,Interrupt Processor Targets Register 0 " rgroup.long 0x804++0x03 line.long 0x00 "GICD_ITARGETSR1 ,Interrupt Processor Targets Register 1 " rgroup.long 0x808++0x03 line.long 0x00 "GICD_ITARGETSR2 ,Interrupt Processor Targets Register 2 " rgroup.long 0x80C++0x03 line.long 0x00 "GICD_ITARGETSR3 ,Interrupt Processor Targets Register 3 " rgroup.long 0x810++0x03 line.long 0x00 "GICD_ITARGETSR4 ,Interrupt Processor Targets Register 4 " rgroup.long 0x814++0x03 line.long 0x00 "GICD_ITARGETSR5 ,Interrupt Processor Targets Register 5 " rgroup.long 0x818++0x03 line.long 0x00 "GICD_ITARGETSR6 ,Interrupt Processor Targets Register 6 " rgroup.long 0x81C++0x03 line.long 0x00 "GICD_ITARGETSR7 ,Interrupt Processor Targets Register 7 " rgroup.long 0x820++0x03 line.long 0x00 "GICD_ITARGETSR8 ,Interrupt Processor Targets Register 8 " rgroup.long 0x824++0x03 line.long 0x00 "GICD_ITARGETSR9 ,Interrupt Processor Targets Register 9 " rgroup.long 0x828++0x03 line.long 0x00 "GICD_ITARGETSR10 ,Interrupt Processor Targets Register 10 " rgroup.long 0x82C++0x03 line.long 0x00 "GICD_ITARGETSR11 ,Interrupt Processor Targets Register 11 " rgroup.long 0x830++0x03 line.long 0x00 "GICD_ITARGETSR12 ,Interrupt Processor Targets Register 12 " rgroup.long 0x834++0x03 line.long 0x00 "GICD_ITARGETSR13 ,Interrupt Processor Targets Register 13 " rgroup.long 0x838++0x03 line.long 0x00 "GICD_ITARGETSR14 ,Interrupt Processor Targets Register 14 " rgroup.long 0x83C++0x03 line.long 0x00 "GICD_ITARGETSR15 ,Interrupt Processor Targets Register 15 " rgroup.long 0x840++0x03 line.long 0x00 "GICD_ITARGETSR16 ,Interrupt Processor Targets Register 16 " rgroup.long 0x844++0x03 line.long 0x00 "GICD_ITARGETSR17 ,Interrupt Processor Targets Register 17 " rgroup.long 0x848++0x03 line.long 0x00 "GICD_ITARGETSR18 ,Interrupt Processor Targets Register 18 " rgroup.long 0x84C++0x03 line.long 0x00 "GICD_ITARGETSR19 ,Interrupt Processor Targets Register 19 " rgroup.long 0x850++0x03 line.long 0x00 "GICD_ITARGETSR20 ,Interrupt Processor Targets Register 20 " rgroup.long 0x854++0x03 line.long 0x00 "GICD_ITARGETSR21 ,Interrupt Processor Targets Register 21 " rgroup.long 0x858++0x03 line.long 0x00 "GICD_ITARGETSR22 ,Interrupt Processor Targets Register 22 " rgroup.long 0x85C++0x03 line.long 0x00 "GICD_ITARGETSR23 ,Interrupt Processor Targets Register 23 " rgroup.long 0x860++0x03 line.long 0x00 "GICD_ITARGETSR24 ,Interrupt Processor Targets Register 24 " rgroup.long 0x864++0x03 line.long 0x00 "GICD_ITARGETSR25 ,Interrupt Processor Targets Register 25 " rgroup.long 0x868++0x03 line.long 0x00 "GICD_ITARGETSR26 ,Interrupt Processor Targets Register 26 " rgroup.long 0x86C++0x03 line.long 0x00 "GICD_ITARGETSR27 ,Interrupt Processor Targets Register 27 " rgroup.long 0x870++0x03 line.long 0x00 "GICD_ITARGETSR28 ,Interrupt Processor Targets Register 28 " rgroup.long 0x874++0x03 line.long 0x00 "GICD_ITARGETSR29 ,Interrupt Processor Targets Register 29 " rgroup.long 0x878++0x03 line.long 0x00 "GICD_ITARGETSR30 ,Interrupt Processor Targets Register 30 " rgroup.long 0x87C++0x03 line.long 0x00 "GICD_ITARGETSR31 ,Interrupt Processor Targets Register 31 " rgroup.long 0x880++0x03 line.long 0x00 "GICD_ITARGETSR32 ,Interrupt Processor Targets Register 32 " rgroup.long 0x884++0x03 line.long 0x00 "GICD_ITARGETSR33 ,Interrupt Processor Targets Register 33 " rgroup.long 0x888++0x03 line.long 0x00 "GICD_ITARGETSR34 ,Interrupt Processor Targets Register 34 " rgroup.long 0x88C++0x03 line.long 0x00 "GICD_ITARGETSR35 ,Interrupt Processor Targets Register 35 " rgroup.long 0x890++0x03 line.long 0x00 "GICD_ITARGETSR36 ,Interrupt Processor Targets Register 36 " rgroup.long 0x894++0x03 line.long 0x00 "GICD_ITARGETSR37 ,Interrupt Processor Targets Register 37 " rgroup.long 0x898++0x03 line.long 0x00 "GICD_ITARGETSR38 ,Interrupt Processor Targets Register 38 " rgroup.long 0x89C++0x03 line.long 0x00 "GICD_ITARGETSR39 ,Interrupt Processor Targets Register 39 " rgroup.long 0x8A0++0x03 line.long 0x00 "GICD_ITARGETSR40 ,Interrupt Processor Targets Register 40 " rgroup.long 0x8A4++0x03 line.long 0x00 "GICD_ITARGETSR41 ,Interrupt Processor Targets Register 41 " rgroup.long 0x8A8++0x03 line.long 0x00 "GICD_ITARGETSR42 ,Interrupt Processor Targets Register 42 " rgroup.long 0x8AC++0x03 line.long 0x00 "GICD_ITARGETSR43 ,Interrupt Processor Targets Register 43 " rgroup.long 0x8B0++0x03 line.long 0x00 "GICD_ITARGETSR44 ,Interrupt Processor Targets Register 44 " rgroup.long 0x8B4++0x03 line.long 0x00 "GICD_ITARGETSR45 ,Interrupt Processor Targets Register 45 " rgroup.long 0x8B8++0x03 line.long 0x00 "GICD_ITARGETSR46 ,Interrupt Processor Targets Register 46 " rgroup.long 0x8BC++0x03 line.long 0x00 "GICD_ITARGETSR47 ,Interrupt Processor Targets Register 47 " rgroup.long 0x8C0++0x03 line.long 0x00 "GICD_ITARGETSR48 ,Interrupt Processor Targets Register 48 " rgroup.long 0x8C4++0x03 line.long 0x00 "GICD_ITARGETSR49 ,Interrupt Processor Targets Register 49 " rgroup.long 0x8C8++0x03 line.long 0x00 "GICD_ITARGETSR50 ,Interrupt Processor Targets Register 50 " rgroup.long 0x8CC++0x03 line.long 0x00 "GICD_ITARGETSR51 ,Interrupt Processor Targets Register 51 " rgroup.long 0x8D0++0x03 line.long 0x00 "GICD_ITARGETSR52 ,Interrupt Processor Targets Register 52 " rgroup.long 0x8D4++0x03 line.long 0x00 "GICD_ITARGETSR53 ,Interrupt Processor Targets Register 53 " rgroup.long 0x8D8++0x03 line.long 0x00 "GICD_ITARGETSR54 ,Interrupt Processor Targets Register 54 " rgroup.long 0x8DC++0x03 line.long 0x00 "GICD_ITARGETSR55 ,Interrupt Processor Targets Register 55 " rgroup.long 0x8E0++0x03 line.long 0x00 "GICD_ITARGETSR56 ,Interrupt Processor Targets Register 56 " rgroup.long 0x8E4++0x03 line.long 0x00 "GICD_ITARGETSR57 ,Interrupt Processor Targets Register 57 " rgroup.long 0x8E8++0x03 line.long 0x00 "GICD_ITARGETSR58 ,Interrupt Processor Targets Register 58 " rgroup.long 0x8EC++0x03 line.long 0x00 "GICD_ITARGETSR59 ,Interrupt Processor Targets Register 59 " rgroup.long 0x8F0++0x03 line.long 0x00 "GICD_ITARGETSR60 ,Interrupt Processor Targets Register 60 " rgroup.long 0x8F4++0x03 line.long 0x00 "GICD_ITARGETSR61 ,Interrupt Processor Targets Register 61 " rgroup.long 0x8F8++0x03 line.long 0x00 "GICD_ITARGETSR62 ,Interrupt Processor Targets Register 62 " rgroup.long 0x8FC++0x03 line.long 0x00 "GICD_ITARGETSR63 ,Interrupt Processor Targets Register 63 " rgroup.long 0x900++0x03 line.long 0x00 "GICD_ITARGETSR64 ,Interrupt Processor Targets Register 64 " rgroup.long 0x904++0x03 line.long 0x00 "GICD_ITARGETSR65 ,Interrupt Processor Targets Register 65 " rgroup.long 0x908++0x03 line.long 0x00 "GICD_ITARGETSR66 ,Interrupt Processor Targets Register 66 " rgroup.long 0x90C++0x03 line.long 0x00 "GICD_ITARGETSR67 ,Interrupt Processor Targets Register 67 " rgroup.long 0x910++0x03 line.long 0x00 "GICD_ITARGETSR68 ,Interrupt Processor Targets Register 68 " rgroup.long 0x914++0x03 line.long 0x00 "GICD_ITARGETSR69 ,Interrupt Processor Targets Register 69 " rgroup.long 0x918++0x03 line.long 0x00 "GICD_ITARGETSR70 ,Interrupt Processor Targets Register 70 " rgroup.long 0x91C++0x03 line.long 0x00 "GICD_ITARGETSR71 ,Interrupt Processor Targets Register 71 " rgroup.long 0x920++0x03 line.long 0x00 "GICD_ITARGETSR72 ,Interrupt Processor Targets Register 72 " rgroup.long 0x924++0x03 line.long 0x00 "GICD_ITARGETSR73 ,Interrupt Processor Targets Register 73 " rgroup.long 0x928++0x03 line.long 0x00 "GICD_ITARGETSR74 ,Interrupt Processor Targets Register 74 " rgroup.long 0x92C++0x03 line.long 0x00 "GICD_ITARGETSR75 ,Interrupt Processor Targets Register 75 " rgroup.long 0x930++0x03 line.long 0x00 "GICD_ITARGETSR76 ,Interrupt Processor Targets Register 76 " rgroup.long 0x934++0x03 line.long 0x00 "GICD_ITARGETSR77 ,Interrupt Processor Targets Register 77 " rgroup.long 0x938++0x03 line.long 0x00 "GICD_ITARGETSR78 ,Interrupt Processor Targets Register 78 " rgroup.long 0x93C++0x03 line.long 0x00 "GICD_ITARGETSR79 ,Interrupt Processor Targets Register 79 " rgroup.long 0x940++0x03 line.long 0x00 "GICD_ITARGETSR80 ,Interrupt Processor Targets Register 80 " rgroup.long 0x944++0x03 line.long 0x00 "GICD_ITARGETSR81 ,Interrupt Processor Targets Register 81 " rgroup.long 0x948++0x03 line.long 0x00 "GICD_ITARGETSR82 ,Interrupt Processor Targets Register 82 " rgroup.long 0x94C++0x03 line.long 0x00 "GICD_ITARGETSR83 ,Interrupt Processor Targets Register 83 " rgroup.long 0x950++0x03 line.long 0x00 "GICD_ITARGETSR84 ,Interrupt Processor Targets Register 84 " rgroup.long 0x954++0x03 line.long 0x00 "GICD_ITARGETSR85 ,Interrupt Processor Targets Register 85 " rgroup.long 0x958++0x03 line.long 0x00 "GICD_ITARGETSR86 ,Interrupt Processor Targets Register 86 " rgroup.long 0x95C++0x03 line.long 0x00 "GICD_ITARGETSR87 ,Interrupt Processor Targets Register 87 " rgroup.long 0x960++0x03 line.long 0x00 "GICD_ITARGETSR88 ,Interrupt Processor Targets Register 88 " rgroup.long 0x964++0x03 line.long 0x00 "GICD_ITARGETSR89 ,Interrupt Processor Targets Register 89 " rgroup.long 0x968++0x03 line.long 0x00 "GICD_ITARGETSR90 ,Interrupt Processor Targets Register 90 " rgroup.long 0x96C++0x03 line.long 0x00 "GICD_ITARGETSR91 ,Interrupt Processor Targets Register 91 " rgroup.long 0x970++0x03 line.long 0x00 "GICD_ITARGETSR92 ,Interrupt Processor Targets Register 92 " rgroup.long 0x974++0x03 line.long 0x00 "GICD_ITARGETSR93 ,Interrupt Processor Targets Register 93 " rgroup.long 0x978++0x03 line.long 0x00 "GICD_ITARGETSR94 ,Interrupt Processor Targets Register 94 " rgroup.long 0x97C++0x03 line.long 0x00 "GICD_ITARGETSR95 ,Interrupt Processor Targets Register 95 " rgroup.long 0x980++0x03 line.long 0x00 "GICD_ITARGETSR96 ,Interrupt Processor Targets Register 96 " rgroup.long 0x984++0x03 line.long 0x00 "GICD_ITARGETSR97 ,Interrupt Processor Targets Register 97 " rgroup.long 0x988++0x03 line.long 0x00 "GICD_ITARGETSR98 ,Interrupt Processor Targets Register 98 " rgroup.long 0x98C++0x03 line.long 0x00 "GICD_ITARGETSR99 ,Interrupt Processor Targets Register 99 " rgroup.long 0x990++0x03 line.long 0x00 "GICD_ITARGETSR100,Interrupt Processor Targets Register 100" rgroup.long 0x994++0x03 line.long 0x00 "GICD_ITARGETSR101,Interrupt Processor Targets Register 101" rgroup.long 0x998++0x03 line.long 0x00 "GICD_ITARGETSR102,Interrupt Processor Targets Register 102" rgroup.long 0x99C++0x03 line.long 0x00 "GICD_ITARGETSR103,Interrupt Processor Targets Register 103" rgroup.long 0x9A0++0x03 line.long 0x00 "GICD_ITARGETSR104,Interrupt Processor Targets Register 104" rgroup.long 0x9A4++0x03 line.long 0x00 "GICD_ITARGETSR105,Interrupt Processor Targets Register 105" rgroup.long 0x9A8++0x03 line.long 0x00 "GICD_ITARGETSR106,Interrupt Processor Targets Register 106" rgroup.long 0x9AC++0x03 line.long 0x00 "GICD_ITARGETSR107,Interrupt Processor Targets Register 107" rgroup.long 0x9B0++0x03 line.long 0x00 "GICD_ITARGETSR108,Interrupt Processor Targets Register 108" rgroup.long 0x9B4++0x03 line.long 0x00 "GICD_ITARGETSR109,Interrupt Processor Targets Register 109" rgroup.long 0x9B8++0x03 line.long 0x00 "GICD_ITARGETSR110,Interrupt Processor Targets Register 110" rgroup.long 0x9BC++0x03 line.long 0x00 "GICD_ITARGETSR111,Interrupt Processor Targets Register 111" rgroup.long 0x9C0++0x03 line.long 0x00 "GICD_ITARGETSR112,Interrupt Processor Targets Register 112" rgroup.long 0x9C4++0x03 line.long 0x00 "GICD_ITARGETSR113,Interrupt Processor Targets Register 113" rgroup.long 0x9C8++0x03 line.long 0x00 "GICD_ITARGETSR114,Interrupt Processor Targets Register 114" rgroup.long 0x9CC++0x03 line.long 0x00 "GICD_ITARGETSR115,Interrupt Processor Targets Register 115" rgroup.long 0x9D0++0x03 line.long 0x00 "GICD_ITARGETSR116,Interrupt Processor Targets Register 116" rgroup.long 0x9D4++0x03 line.long 0x00 "GICD_ITARGETSR117,Interrupt Processor Targets Register 117" rgroup.long 0x9D8++0x03 line.long 0x00 "GICD_ITARGETSR118,Interrupt Processor Targets Register 118" rgroup.long 0x9DC++0x03 line.long 0x00 "GICD_ITARGETSR119,Interrupt Processor Targets Register 119" rgroup.long 0x9E0++0x03 line.long 0x00 "GICD_ITARGETSR120,Interrupt Processor Targets Register 120" rgroup.long 0x9E4++0x03 line.long 0x00 "GICD_ITARGETSR121,Interrupt Processor Targets Register 121" rgroup.long 0x9E8++0x03 line.long 0x00 "GICD_ITARGETSR122,Interrupt Processor Targets Register 122" rgroup.long 0x9EC++0x03 line.long 0x00 "GICD_ITARGETSR123,Interrupt Processor Targets Register 123" rgroup.long 0x9F0++0x03 line.long 0x00 "GICD_ITARGETSR124,Interrupt Processor Targets Register 124" rgroup.long 0x9F4++0x03 line.long 0x00 "GICD_ITARGETSR125,Interrupt Processor Targets Register 125" rgroup.long 0x9F8++0x03 line.long 0x00 "GICD_ITARGETSR126,Interrupt Processor Targets Register 126" rgroup.long 0x9FC++0x03 line.long 0x00 "GICD_ITARGETSR127,Interrupt Processor Targets Register 127" rgroup.long 0xA00++0x03 line.long 0x00 "GICD_ITARGETSR128,Interrupt Processor Targets Register 128" rgroup.long 0xA04++0x03 line.long 0x00 "GICD_ITARGETSR129,Interrupt Processor Targets Register 129" rgroup.long 0xA08++0x03 line.long 0x00 "GICD_ITARGETSR130,Interrupt Processor Targets Register 130" rgroup.long 0xA0C++0x03 line.long 0x00 "GICD_ITARGETSR131,Interrupt Processor Targets Register 131" rgroup.long 0xA10++0x03 line.long 0x00 "GICD_ITARGETSR132,Interrupt Processor Targets Register 132" rgroup.long 0xA14++0x03 line.long 0x00 "GICD_ITARGETSR133,Interrupt Processor Targets Register 133" rgroup.long 0xA18++0x03 line.long 0x00 "GICD_ITARGETSR134,Interrupt Processor Targets Register 134" rgroup.long 0xA1C++0x03 line.long 0x00 "GICD_ITARGETSR135,Interrupt Processor Targets Register 135" rgroup.long 0xA20++0x03 line.long 0x00 "GICD_ITARGETSR136,Interrupt Processor Targets Register 136" rgroup.long 0xA24++0x03 line.long 0x00 "GICD_ITARGETSR137,Interrupt Processor Targets Register 137" rgroup.long 0xA28++0x03 line.long 0x00 "GICD_ITARGETSR138,Interrupt Processor Targets Register 138" rgroup.long 0xA2C++0x03 line.long 0x00 "GICD_ITARGETSR139,Interrupt Processor Targets Register 139" rgroup.long 0xA30++0x03 line.long 0x00 "GICD_ITARGETSR140,Interrupt Processor Targets Register 140" rgroup.long 0xA34++0x03 line.long 0x00 "GICD_ITARGETSR141,Interrupt Processor Targets Register 141" rgroup.long 0xA38++0x03 line.long 0x00 "GICD_ITARGETSR142,Interrupt Processor Targets Register 142" rgroup.long 0xA3C++0x03 line.long 0x00 "GICD_ITARGETSR143,Interrupt Processor Targets Register 143" rgroup.long 0xA40++0x03 line.long 0x00 "GICD_ITARGETSR144,Interrupt Processor Targets Register 144" rgroup.long 0xA44++0x03 line.long 0x00 "GICD_ITARGETSR145,Interrupt Processor Targets Register 145" rgroup.long 0xA48++0x03 line.long 0x00 "GICD_ITARGETSR146,Interrupt Processor Targets Register 146" rgroup.long 0xA4C++0x03 line.long 0x00 "GICD_ITARGETSR147,Interrupt Processor Targets Register 147" rgroup.long 0xA50++0x03 line.long 0x00 "GICD_ITARGETSR148,Interrupt Processor Targets Register 148" rgroup.long 0xA54++0x03 line.long 0x00 "GICD_ITARGETSR149,Interrupt Processor Targets Register 149" rgroup.long 0xA58++0x03 line.long 0x00 "GICD_ITARGETSR150,Interrupt Processor Targets Register 150" rgroup.long 0xA5C++0x03 line.long 0x00 "GICD_ITARGETSR151,Interrupt Processor Targets Register 151" rgroup.long 0xA60++0x03 line.long 0x00 "GICD_ITARGETSR152,Interrupt Processor Targets Register 152" rgroup.long 0xA64++0x03 line.long 0x00 "GICD_ITARGETSR153,Interrupt Processor Targets Register 153" rgroup.long 0xA68++0x03 line.long 0x00 "GICD_ITARGETSR154,Interrupt Processor Targets Register 154" rgroup.long 0xA6C++0x03 line.long 0x00 "GICD_ITARGETSR155,Interrupt Processor Targets Register 155" rgroup.long 0xA70++0x03 line.long 0x00 "GICD_ITARGETSR156,Interrupt Processor Targets Register 156" rgroup.long 0xA74++0x03 line.long 0x00 "GICD_ITARGETSR157,Interrupt Processor Targets Register 157" rgroup.long 0xA78++0x03 line.long 0x00 "GICD_ITARGETSR158,Interrupt Processor Targets Register 158" rgroup.long 0xA7C++0x03 line.long 0x00 "GICD_ITARGETSR159,Interrupt Processor Targets Register 159" rgroup.long 0xA80++0x03 line.long 0x00 "GICD_ITARGETSR160,Interrupt Processor Targets Register 160" rgroup.long 0xA84++0x03 line.long 0x00 "GICD_ITARGETSR161,Interrupt Processor Targets Register 161" rgroup.long 0xA88++0x03 line.long 0x00 "GICD_ITARGETSR162,Interrupt Processor Targets Register 162" rgroup.long 0xA8C++0x03 line.long 0x00 "GICD_ITARGETSR163,Interrupt Processor Targets Register 163" rgroup.long 0xA90++0x03 line.long 0x00 "GICD_ITARGETSR164,Interrupt Processor Targets Register 164" rgroup.long 0xA94++0x03 line.long 0x00 "GICD_ITARGETSR165,Interrupt Processor Targets Register 165" rgroup.long 0xA98++0x03 line.long 0x00 "GICD_ITARGETSR166,Interrupt Processor Targets Register 166" rgroup.long 0xA9C++0x03 line.long 0x00 "GICD_ITARGETSR167,Interrupt Processor Targets Register 167" rgroup.long 0xAA0++0x03 line.long 0x00 "GICD_ITARGETSR168,Interrupt Processor Targets Register 168" rgroup.long 0xAA4++0x03 line.long 0x00 "GICD_ITARGETSR169,Interrupt Processor Targets Register 169" rgroup.long 0xAA8++0x03 line.long 0x00 "GICD_ITARGETSR170,Interrupt Processor Targets Register 170" rgroup.long 0xAAC++0x03 line.long 0x00 "GICD_ITARGETSR171,Interrupt Processor Targets Register 171" rgroup.long 0xAB0++0x03 line.long 0x00 "GICD_ITARGETSR172,Interrupt Processor Targets Register 172" rgroup.long 0xAB4++0x03 line.long 0x00 "GICD_ITARGETSR173,Interrupt Processor Targets Register 173" rgroup.long 0xAB8++0x03 line.long 0x00 "GICD_ITARGETSR174,Interrupt Processor Targets Register 174" rgroup.long 0xABC++0x03 line.long 0x00 "GICD_ITARGETSR175,Interrupt Processor Targets Register 175" rgroup.long 0xAC0++0x03 line.long 0x00 "GICD_ITARGETSR176,Interrupt Processor Targets Register 176" rgroup.long 0xAC4++0x03 line.long 0x00 "GICD_ITARGETSR177,Interrupt Processor Targets Register 177" rgroup.long 0xAC8++0x03 line.long 0x00 "GICD_ITARGETSR178,Interrupt Processor Targets Register 178" rgroup.long 0xACC++0x03 line.long 0x00 "GICD_ITARGETSR179,Interrupt Processor Targets Register 179" rgroup.long 0xAD0++0x03 line.long 0x00 "GICD_ITARGETSR180,Interrupt Processor Targets Register 180" rgroup.long 0xAD4++0x03 line.long 0x00 "GICD_ITARGETSR181,Interrupt Processor Targets Register 181" rgroup.long 0xAD8++0x03 line.long 0x00 "GICD_ITARGETSR182,Interrupt Processor Targets Register 182" rgroup.long 0xADC++0x03 line.long 0x00 "GICD_ITARGETSR183,Interrupt Processor Targets Register 183" rgroup.long 0xAE0++0x03 line.long 0x00 "GICD_ITARGETSR184,Interrupt Processor Targets Register 184" rgroup.long 0xAE4++0x03 line.long 0x00 "GICD_ITARGETSR185,Interrupt Processor Targets Register 185" rgroup.long 0xAE8++0x03 line.long 0x00 "GICD_ITARGETSR186,Interrupt Processor Targets Register 186" rgroup.long 0xAEC++0x03 line.long 0x00 "GICD_ITARGETSR187,Interrupt Processor Targets Register 187" rgroup.long 0xAF0++0x03 line.long 0x00 "GICD_ITARGETSR188,Interrupt Processor Targets Register 188" rgroup.long 0xAF4++0x03 line.long 0x00 "GICD_ITARGETSR189,Interrupt Processor Targets Register 189" rgroup.long 0xAF8++0x03 line.long 0x00 "GICD_ITARGETSR190,Interrupt Processor Targets Register 190" rgroup.long 0xAFC++0x03 line.long 0x00 "GICD_ITARGETSR191,Interrupt Processor Targets Register 191" rgroup.long 0xB00++0x03 line.long 0x00 "GICD_ITARGETSR192,Interrupt Processor Targets Register 192" rgroup.long 0xB04++0x03 line.long 0x00 "GICD_ITARGETSR193,Interrupt Processor Targets Register 193" rgroup.long 0xB08++0x03 line.long 0x00 "GICD_ITARGETSR194,Interrupt Processor Targets Register 194" rgroup.long 0xB0C++0x03 line.long 0x00 "GICD_ITARGETSR195,Interrupt Processor Targets Register 195" rgroup.long 0xB10++0x03 line.long 0x00 "GICD_ITARGETSR196,Interrupt Processor Targets Register 196" rgroup.long 0xB14++0x03 line.long 0x00 "GICD_ITARGETSR197,Interrupt Processor Targets Register 197" rgroup.long 0xB18++0x03 line.long 0x00 "GICD_ITARGETSR198,Interrupt Processor Targets Register 198" rgroup.long 0xB1C++0x03 line.long 0x00 "GICD_ITARGETSR199,Interrupt Processor Targets Register 199" rgroup.long 0xB20++0x03 line.long 0x00 "GICD_ITARGETSR200,Interrupt Processor Targets Register 200" rgroup.long 0xB24++0x03 line.long 0x00 "GICD_ITARGETSR201,Interrupt Processor Targets Register 201" rgroup.long 0xB28++0x03 line.long 0x00 "GICD_ITARGETSR202,Interrupt Processor Targets Register 202" rgroup.long 0xB2C++0x03 line.long 0x00 "GICD_ITARGETSR203,Interrupt Processor Targets Register 203" rgroup.long 0xB30++0x03 line.long 0x00 "GICD_ITARGETSR204,Interrupt Processor Targets Register 204" rgroup.long 0xB34++0x03 line.long 0x00 "GICD_ITARGETSR205,Interrupt Processor Targets Register 205" rgroup.long 0xB38++0x03 line.long 0x00 "GICD_ITARGETSR206,Interrupt Processor Targets Register 206" rgroup.long 0xB3C++0x03 line.long 0x00 "GICD_ITARGETSR207,Interrupt Processor Targets Register 207" rgroup.long 0xB40++0x03 line.long 0x00 "GICD_ITARGETSR208,Interrupt Processor Targets Register 208" rgroup.long 0xB44++0x03 line.long 0x00 "GICD_ITARGETSR209,Interrupt Processor Targets Register 209" rgroup.long 0xB48++0x03 line.long 0x00 "GICD_ITARGETSR210,Interrupt Processor Targets Register 210" rgroup.long 0xB4C++0x03 line.long 0x00 "GICD_ITARGETSR211,Interrupt Processor Targets Register 211" rgroup.long 0xB50++0x03 line.long 0x00 "GICD_ITARGETSR212,Interrupt Processor Targets Register 212" rgroup.long 0xB54++0x03 line.long 0x00 "GICD_ITARGETSR213,Interrupt Processor Targets Register 213" rgroup.long 0xB58++0x03 line.long 0x00 "GICD_ITARGETSR214,Interrupt Processor Targets Register 214" rgroup.long 0xB5C++0x03 line.long 0x00 "GICD_ITARGETSR215,Interrupt Processor Targets Register 215" rgroup.long 0xB60++0x03 line.long 0x00 "GICD_ITARGETSR216,Interrupt Processor Targets Register 216" rgroup.long 0xB64++0x03 line.long 0x00 "GICD_ITARGETSR217,Interrupt Processor Targets Register 217" rgroup.long 0xB68++0x03 line.long 0x00 "GICD_ITARGETSR218,Interrupt Processor Targets Register 218" rgroup.long 0xB6C++0x03 line.long 0x00 "GICD_ITARGETSR219,Interrupt Processor Targets Register 219" rgroup.long 0xB70++0x03 line.long 0x00 "GICD_ITARGETSR220,Interrupt Processor Targets Register 220" rgroup.long 0xB74++0x03 line.long 0x00 "GICD_ITARGETSR221,Interrupt Processor Targets Register 221" rgroup.long 0xB78++0x03 line.long 0x00 "GICD_ITARGETSR222,Interrupt Processor Targets Register 222" rgroup.long 0xB7C++0x03 line.long 0x00 "GICD_ITARGETSR223,Interrupt Processor Targets Register 223" rgroup.long 0xB80++0x03 line.long 0x00 "GICD_ITARGETSR224,Interrupt Processor Targets Register 224" rgroup.long 0xB84++0x03 line.long 0x00 "GICD_ITARGETSR225,Interrupt Processor Targets Register 225" rgroup.long 0xB88++0x03 line.long 0x00 "GICD_ITARGETSR226,Interrupt Processor Targets Register 226" rgroup.long 0xB8C++0x03 line.long 0x00 "GICD_ITARGETSR227,Interrupt Processor Targets Register 227" rgroup.long 0xB90++0x03 line.long 0x00 "GICD_ITARGETSR228,Interrupt Processor Targets Register 228" rgroup.long 0xB94++0x03 line.long 0x00 "GICD_ITARGETSR229,Interrupt Processor Targets Register 229" rgroup.long 0xB98++0x03 line.long 0x00 "GICD_ITARGETSR230,Interrupt Processor Targets Register 230" rgroup.long 0xB9C++0x03 line.long 0x00 "GICD_ITARGETSR231,Interrupt Processor Targets Register 231" rgroup.long 0xBA0++0x03 line.long 0x00 "GICD_ITARGETSR232,Interrupt Processor Targets Register 232" rgroup.long 0xBA4++0x03 line.long 0x00 "GICD_ITARGETSR233,Interrupt Processor Targets Register 233" rgroup.long 0xBA8++0x03 line.long 0x00 "GICD_ITARGETSR234,Interrupt Processor Targets Register 234" rgroup.long 0xBAC++0x03 line.long 0x00 "GICD_ITARGETSR235,Interrupt Processor Targets Register 235" rgroup.long 0xBB0++0x03 line.long 0x00 "GICD_ITARGETSR236,Interrupt Processor Targets Register 236" rgroup.long 0xBB4++0x03 line.long 0x00 "GICD_ITARGETSR237,Interrupt Processor Targets Register 237" rgroup.long 0xBB8++0x03 line.long 0x00 "GICD_ITARGETSR238,Interrupt Processor Targets Register 238" rgroup.long 0xBBC++0x03 line.long 0x00 "GICD_ITARGETSR239,Interrupt Processor Targets Register 239" rgroup.long 0xBC0++0x03 line.long 0x00 "GICD_ITARGETSR240,Interrupt Processor Targets Register 240" rgroup.long 0xBC4++0x03 line.long 0x00 "GICD_ITARGETSR241,Interrupt Processor Targets Register 241" rgroup.long 0xBC8++0x03 line.long 0x00 "GICD_ITARGETSR242,Interrupt Processor Targets Register 242" rgroup.long 0xBCC++0x03 line.long 0x00 "GICD_ITARGETSR243,Interrupt Processor Targets Register 243" rgroup.long 0xBD0++0x03 line.long 0x00 "GICD_ITARGETSR244,Interrupt Processor Targets Register 244" rgroup.long 0xBD4++0x03 line.long 0x00 "GICD_ITARGETSR245,Interrupt Processor Targets Register 245" rgroup.long 0xBD8++0x03 line.long 0x00 "GICD_ITARGETSR246,Interrupt Processor Targets Register 246" rgroup.long 0xBDC++0x03 line.long 0x00 "GICD_ITARGETSR247,Interrupt Processor Targets Register 247" rgroup.long 0xBE0++0x03 line.long 0x00 "GICD_ITARGETSR248,Interrupt Processor Targets Register 248" rgroup.long 0xBE4++0x03 line.long 0x00 "GICD_ITARGETSR249,Interrupt Processor Targets Register 249" rgroup.long 0xBE8++0x03 line.long 0x00 "GICD_ITARGETSR250,Interrupt Processor Targets Register 250" rgroup.long 0xBEC++0x03 line.long 0x00 "GICD_ITARGETSR251,Interrupt Processor Targets Register 251" rgroup.long 0xBF0++0x03 line.long 0x00 "GICD_ITARGETSR252,Interrupt Processor Targets Register 252" rgroup.long 0xBF4++0x03 line.long 0x00 "GICD_ITARGETSR253,Interrupt Processor Targets Register 253" rgroup.long 0xBF8++0x03 line.long 0x00 "GICD_ITARGETSR254,Interrupt Processor Targets Register 254" endif tree.end width 14. tree "Configuration Registers" rgroup.long 0xC00++0x03 line.long 0x00 "GICD_ICFGR0,Interrupt Configuration Register" textline " " rgroup.long 0xC04++0x03 line.long 0x00 "GICD_ICFGR1,Interrupt Configuration Register" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x1) group.long 0xC08++0x03 line.long 0x00 "GICD_ICFGR2,Interrupt Configuration Register 2" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC0C++0x03 line.long 0x00 "GICD_ICFGR3,Interrupt Configuration Register 3" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC08++0x03 line.long 0x00 "GICD_ICFGR2,Interrupt Configuration Register 2" rgroup.long 0xC0C++0x03 line.long 0x00 "GICD_ICFGR3,Interrupt Configuration Register 3" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x2) group.long 0xC10++0x03 line.long 0x00 "GICD_ICFGR4,Interrupt Configuration Register 4" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC14++0x03 line.long 0x00 "GICD_ICFGR5,Interrupt Configuration Register 5" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC10++0x03 line.long 0x00 "GICD_ICFGR4,Interrupt Configuration Register 4" rgroup.long 0xC14++0x03 line.long 0x00 "GICD_ICFGR5,Interrupt Configuration Register 5" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x3) group.long 0xC18++0x03 line.long 0x00 "GICD_ICFGR6,Interrupt Configuration Register 6" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC1C++0x03 line.long 0x00 "GICD_ICFGR7,Interrupt Configuration Register 7" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC18++0x03 line.long 0x00 "GICD_ICFGR6,Interrupt Configuration Register 6" rgroup.long 0xC1C++0x03 line.long 0x00 "GICD_ICFGR7,Interrupt Configuration Register 7" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x4) group.long 0xC20++0x03 line.long 0x00 "GICD_ICFGR8,Interrupt Configuration Register 8" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC24++0x03 line.long 0x00 "GICD_ICFGR9,Interrupt Configuration Register 9" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC20++0x03 line.long 0x00 "GICD_ICFGR8,Interrupt Configuration Register 8" rgroup.long 0xC24++0x03 line.long 0x00 "GICD_ICFGR9,Interrupt Configuration Register 9" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x5) group.long 0xC28++0x03 line.long 0x00 "GICD_ICFGR10,Interrupt Configuration Register 10" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC2C++0x03 line.long 0x00 "GICD_ICFGR11,Interrupt Configuration Register 11" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC28++0x03 line.long 0x00 "GICD_ICFGR10,Interrupt Configuration Register 10" rgroup.long 0xC2C++0x03 line.long 0x00 "GICD_ICFGR11,Interrupt Configuration Register 11" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x6) group.long 0xC30++0x03 line.long 0x00 "GICD_ICFGR12,Interrupt Configuration Register 12" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC34++0x03 line.long 0x00 "GICD_ICFGR13,Interrupt Configuration Register 13" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC30++0x03 line.long 0x00 "GICD_ICFGR12,Interrupt Configuration Register 12" rgroup.long 0xC34++0x03 line.long 0x00 "GICD_ICFGR13,Interrupt Configuration Register 13" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x7) group.long 0xC38++0x03 line.long 0x00 "GICD_ICFGR14,Interrupt Configuration Register 14" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC3C++0x03 line.long 0x00 "GICD_ICFGR15,Interrupt Configuration Register 15" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC38++0x03 line.long 0x00 "GICD_ICFGR14,Interrupt Configuration Register 14" rgroup.long 0xC3C++0x03 line.long 0x00 "GICD_ICFGR15,Interrupt Configuration Register 15" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x8) group.long 0xC40++0x03 line.long 0x00 "GICD_ICFGR16,Interrupt Configuration Register 16" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC44++0x03 line.long 0x00 "GICD_ICFGR17,Interrupt Configuration Register 17" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC40++0x03 line.long 0x00 "GICD_ICFGR16,Interrupt Configuration Register 16" rgroup.long 0xC44++0x03 line.long 0x00 "GICD_ICFGR17,Interrupt Configuration Register 17" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x9) group.long 0xC48++0x03 line.long 0x00 "GICD_ICFGR18,Interrupt Configuration Register 18" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC4C++0x03 line.long 0x00 "GICD_ICFGR19,Interrupt Configuration Register 19" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC48++0x03 line.long 0x00 "GICD_ICFGR18,Interrupt Configuration Register 18" rgroup.long 0xC4C++0x03 line.long 0x00 "GICD_ICFGR19,Interrupt Configuration Register 19" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0xA) group.long 0xC50++0x03 line.long 0x00 "GICD_ICFGR20,Interrupt Configuration Register 20" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC54++0x03 line.long 0x00 "GICD_ICFGR21,Interrupt Configuration Register 21" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC50++0x03 line.long 0x00 "GICD_ICFGR20,Interrupt Configuration Register 20" rgroup.long 0xC54++0x03 line.long 0x00 "GICD_ICFGR21,Interrupt Configuration Register 21" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0xB) group.long 0xC58++0x03 line.long 0x00 "GICD_ICFGR22,Interrupt Configuration Register 22" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC5C++0x03 line.long 0x00 "GICD_ICFGR23,Interrupt Configuration Register 23" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC58++0x03 line.long 0x00 "GICD_ICFGR22,Interrupt Configuration Register 22" rgroup.long 0xC5C++0x03 line.long 0x00 "GICD_ICFGR23,Interrupt Configuration Register 23" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0xC) group.long 0xC60++0x03 line.long 0x00 "GICD_ICFGR24,Interrupt Configuration Register 24" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC64++0x03 line.long 0x00 "GICD_ICFGR25,Interrupt Configuration Register 25" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC60++0x03 line.long 0x00 "GICD_ICFGR24,Interrupt Configuration Register 24" rgroup.long 0xC64++0x03 line.long 0x00 "GICD_ICFGR25,Interrupt Configuration Register 25" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0xD) group.long 0xC68++0x03 line.long 0x00 "GICD_ICFGR26,Interrupt Configuration Register 26" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC6C++0x03 line.long 0x00 "GICD_ICFGR27,Interrupt Configuration Register 27" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC68++0x03 line.long 0x00 "GICD_ICFGR26,Interrupt Configuration Register 26" rgroup.long 0xC6C++0x03 line.long 0x00 "GICD_ICFGR27,Interrupt Configuration Register 27" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0xE) group.long 0xC70++0x03 line.long 0x00 "GICD_ICFGR28,Interrupt Configuration Register 28" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC74++0x03 line.long 0x00 "GICD_ICFGR29,Interrupt Configuration Register 29" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC70++0x03 line.long 0x00 "GICD_ICFGR28,Interrupt Configuration Register 28" rgroup.long 0xC74++0x03 line.long 0x00 "GICD_ICFGR29,Interrupt Configuration Register 29" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0xF) group.long 0xC78++0x03 line.long 0x00 "GICD_ICFGR30,Interrupt Configuration Register 30" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC7C++0x03 line.long 0x00 "GICD_ICFGR31,Interrupt Configuration Register 31" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC78++0x03 line.long 0x00 "GICD_ICFGR30,Interrupt Configuration Register 30" rgroup.long 0xC7C++0x03 line.long 0x00 "GICD_ICFGR31,Interrupt Configuration Register 31" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x10) group.long 0xC80++0x03 line.long 0x00 "GICD_ICFGR32,Interrupt Configuration Register 32" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC84++0x03 line.long 0x00 "GICD_ICFGR33,Interrupt Configuration Register 33" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC80++0x03 line.long 0x00 "GICD_ICFGR32,Interrupt Configuration Register 32" rgroup.long 0xC84++0x03 line.long 0x00 "GICD_ICFGR33,Interrupt Configuration Register 33" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x11) group.long 0xC88++0x03 line.long 0x00 "GICD_ICFGR34,Interrupt Configuration Register 34" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC8C++0x03 line.long 0x00 "GICD_ICFGR35,Interrupt Configuration Register 35" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC88++0x03 line.long 0x00 "GICD_ICFGR34,Interrupt Configuration Register 34" rgroup.long 0xC8C++0x03 line.long 0x00 "GICD_ICFGR35,Interrupt Configuration Register 35" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x12) group.long 0xC90++0x03 line.long 0x00 "GICD_ICFGR36,Interrupt Configuration Register 36" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC94++0x03 line.long 0x00 "GICD_ICFGR37,Interrupt Configuration Register 37" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC90++0x03 line.long 0x00 "GICD_ICFGR36,Interrupt Configuration Register 36" rgroup.long 0xC94++0x03 line.long 0x00 "GICD_ICFGR37,Interrupt Configuration Register 37" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x13) group.long 0xC98++0x03 line.long 0x00 "GICD_ICFGR38,Interrupt Configuration Register 38" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC9C++0x03 line.long 0x00 "GICD_ICFGR39,Interrupt Configuration Register 39" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC98++0x03 line.long 0x00 "GICD_ICFGR38,Interrupt Configuration Register 38" rgroup.long 0xC9C++0x03 line.long 0x00 "GICD_ICFGR39,Interrupt Configuration Register 39" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x14) group.long 0xCA0++0x03 line.long 0x00 "GICD_ICFGR40,Interrupt Configuration Register 40" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCA4++0x03 line.long 0x00 "GICD_ICFGR41,Interrupt Configuration Register 41" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xCA0++0x03 line.long 0x00 "GICD_ICFGR40,Interrupt Configuration Register 40" rgroup.long 0xCA4++0x03 line.long 0x00 "GICD_ICFGR41,Interrupt Configuration Register 41" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x15) group.long 0xCA8++0x03 line.long 0x00 "GICD_ICFGR42,Interrupt Configuration Register 42" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCAC++0x03 line.long 0x00 "GICD_ICFGR43,Interrupt Configuration Register 43" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xCA8++0x03 line.long 0x00 "GICD_ICFGR42,Interrupt Configuration Register 42" rgroup.long 0xCAC++0x03 line.long 0x00 "GICD_ICFGR43,Interrupt Configuration Register 43" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x16) group.long 0xCB0++0x03 line.long 0x00 "GICD_ICFGR44,Interrupt Configuration Register 44" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCB4++0x03 line.long 0x00 "GICD_ICFGR45,Interrupt Configuration Register 45" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xCB0++0x03 line.long 0x00 "GICD_ICFGR44,Interrupt Configuration Register 44" rgroup.long 0xCB4++0x03 line.long 0x00 "GICD_ICFGR45,Interrupt Configuration Register 45" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x17) group.long 0xCB8++0x03 line.long 0x00 "GICD_ICFGR46,Interrupt Configuration Register 46" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCBC++0x03 line.long 0x00 "GICD_ICFGR47,Interrupt Configuration Register 47" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xCB8++0x03 line.long 0x00 "GICD_ICFGR46,Interrupt Configuration Register 46" rgroup.long 0xCBC++0x03 line.long 0x00 "GICD_ICFGR47,Interrupt Configuration Register 47" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x18) group.long 0xCC0++0x03 line.long 0x00 "GICD_ICFGR48,Interrupt Configuration Register 48" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCC4++0x03 line.long 0x00 "GICD_ICFGR49,Interrupt Configuration Register 49" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xCC0++0x03 line.long 0x00 "GICD_ICFGR48,Interrupt Configuration Register 48" rgroup.long 0xCC4++0x03 line.long 0x00 "GICD_ICFGR49,Interrupt Configuration Register 49" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x19) group.long 0xCC8++0x03 line.long 0x00 "GICD_ICFGR50,Interrupt Configuration Register 50" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCCC++0x03 line.long 0x00 "GICD_ICFGR51,Interrupt Configuration Register 51" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xCC8++0x03 line.long 0x00 "GICD_ICFGR50,Interrupt Configuration Register 50" rgroup.long 0xCCC++0x03 line.long 0x00 "GICD_ICFGR51,Interrupt Configuration Register 51" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x1A) group.long 0xCD0++0x03 line.long 0x00 "GICD_ICFGR52,Interrupt Configuration Register 52" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCD4++0x03 line.long 0x00 "GICD_ICFGR53,Interrupt Configuration Register 53" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xCD0++0x03 line.long 0x00 "GICD_ICFGR52,Interrupt Configuration Register 52" rgroup.long 0xCD4++0x03 line.long 0x00 "GICD_ICFGR53,Interrupt Configuration Register 53" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x1B) group.long 0xCD8++0x03 line.long 0x00 "GICD_ICFGR54,Interrupt Configuration Register 54" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCDC++0x03 line.long 0x00 "GICD_ICFGR55,Interrupt Configuration Register 55" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xCD8++0x03 line.long 0x00 "GICD_ICFGR54,Interrupt Configuration Register 54" rgroup.long 0xCDC++0x03 line.long 0x00 "GICD_ICFGR55,Interrupt Configuration Register 55" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x1C) group.long 0xCE0++0x03 line.long 0x00 "GICD_ICFGR56,Interrupt Configuration Register 56" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCE4++0x03 line.long 0x00 "GICD_ICFGR57,Interrupt Configuration Register 57" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xCE0++0x03 line.long 0x00 "GICD_ICFGR56,Interrupt Configuration Register 56" rgroup.long 0xCE4++0x03 line.long 0x00 "GICD_ICFGR57,Interrupt Configuration Register 57" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x1D) group.long 0xCE8++0x03 line.long 0x00 "GICD_ICFGR58,Interrupt Configuration Register 58" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCEC++0x03 line.long 0x00 "GICD_ICFGR59,Interrupt Configuration Register 59" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xCE8++0x03 line.long 0x00 "GICD_ICFGR58,Interrupt Configuration Register 58" rgroup.long 0xCEC++0x03 line.long 0x00 "GICD_ICFGR59,Interrupt Configuration Register 59" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x1E) group.long 0xCF0++0x03 line.long 0x00 "GICD_ICFGR60,Interrupt Configuration Register 60" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCF4++0x03 line.long 0x00 "GICD_ICFGR61,Interrupt Configuration Register 61" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xCF0++0x03 line.long 0x00 "GICD_ICFGR60,Interrupt Configuration Register 60" rgroup.long 0xCF4++0x03 line.long 0x00 "GICD_ICFGR61,Interrupt Configuration Register 61" endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x1F) group.long 0xCF8++0x03 line.long 0x00 "GICD_ICFGR62,Interrupt Configuration Register 62" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCFC++0x03 line.long 0x00 "GICD_ICFGR63,Interrupt Configuration Register 63" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xCF8++0x03 line.long 0x00 "GICD_ICFGR62,Interrupt Configuration Register 62" rgroup.long 0xCFC++0x03 line.long 0x00 "GICD_ICFGR63,Interrupt Configuration Register 63" endif tree.end width 12. tree "Peripheral Interrupt Status Registers" rgroup.long 0x0D00++0x03 line.long 0x00 "GICD_PPISR,Private Peripheral Interrupt Status Register" bitfld.long 0x00 15. " PPI3S ,nIRQ pin status" "No interrupt,Interrupt" bitfld.long 0x00 14. " PPI2S ,Non-secure Physical Timer event status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 13. " PPI1S ,Secure Physical Timer event status" "No interrupt,Interrupt" bitfld.long 0x00 12. " PPI0S ,nFIQ pin status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 11. " PPI4S ,Virtual Timer event status" "No interrupt,Interrupt" bitfld.long 0x00 10. " PPI5S ,Hypervisor Timer event status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 9. " PPI6S ,Virtual Maintenance Status" "No interrupt,Interrupt" textline " " width 22. if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x01) rgroup.long 0x0D04++0x03 line.long 0x0 "GICD_SPISR0,Shared Peripheral Interrupt Status Register 0" bitfld.long 0x00 31. " IRQS31 ,IRQS Status Bit 31" "Low,High" bitfld.long 0x00 30. " IRQS30 ,IRQS Status Bit 30" "Low,High" bitfld.long 0x00 29. " IRQS29 ,IRQS Status Bit 29" "Low,High" textline " " bitfld.long 0x00 28. " IRQS28 ,IRQS Status Bit 28" "Low,High" bitfld.long 0x00 27. " IRQS27 ,IRQS Status Bit 27" "Low,High" bitfld.long 0x00 26. " IRQS26 ,IRQS Status Bit 26" "Low,High" textline " " bitfld.long 0x00 25. " IRQS25 ,IRQS Status Bit 25" "Low,High" bitfld.long 0x00 24. " IRQS24 ,IRQS Status Bit 24" "Low,High" bitfld.long 0x00 23. " IRQS23 ,IRQS Status Bit 23" "Low,High" textline " " bitfld.long 0x00 22. " IRQS22 ,IRQS Status Bit 22" "Low,High" bitfld.long 0x00 21. " IRQS21 ,IRQS Status Bit 21" "Low,High" bitfld.long 0x00 20. " IRQS20 ,IRQS Status Bit 20" "Low,High" textline " " bitfld.long 0x00 19. " IRQS19 ,IRQS Status Bit 19" "Low,High" bitfld.long 0x00 18. " IRQS18 ,IRQS Status Bit 18" "Low,High" bitfld.long 0x00 17. " IRQS17 ,IRQS Status Bit 17" "Low,High" textline " " bitfld.long 0x00 16. " IRQS16 ,IRQS Status Bit 16" "Low,High" bitfld.long 0x00 15. " IRQS15 ,IRQS Status Bit 15" "Low,High" bitfld.long 0x00 14. " IRQS14 ,IRQS Status Bit 14" "Low,High" textline " " bitfld.long 0x00 13. " IRQS13 ,IRQS Status Bit 13" "Low,High" bitfld.long 0x00 12. " IRQS12 ,IRQS Status Bit 12" "Low,High" bitfld.long 0x00 11. " IRQS11 ,IRQS Status Bit 11" "Low,High" textline " " bitfld.long 0x00 10. " IRQS10 ,IRQS Status Bit 10" "Low,High" bitfld.long 0x00 9. " IRQS9 ,IRQS Status Bit 9" "Low,High" bitfld.long 0x00 8. " IRQS8 ,IRQS Status Bit 8" "Low,High" textline " " bitfld.long 0x00 7. " IRQS7 ,IRQS Status Bit 7" "Low,High" bitfld.long 0x00 6. " IRQS6 ,IRQS Status Bit 6" "Low,High" bitfld.long 0x00 5. " IRQS5 ,IRQS Status Bit 5" "Low,High" textline " " bitfld.long 0x00 4. " IRQS4 ,IRQS Status Bit 4" "Low,High" bitfld.long 0x00 3. " IRQS3 ,IRQS Status Bit 3" "Low,High" bitfld.long 0x00 2. " IRQS2 ,IRQS Status Bit 2" "Low,High" textline " " bitfld.long 0x00 1. " IRQS1 ,IRQS Status Bit 1" "Low,High" bitfld.long 0x00 0. " IRQS0 ,IRQS Status Bit 0" "Low,High" else rgroup.long 0x0D04++0x03 line.long 0x0 "GICD_SPISR0,Shared Peripheral Interrupt Status Register 1" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x02) rgroup.long 0x0D08++0x03 line.long 0x0 "GICD_SPISR1,Shared Peripheral Interrupt Status Register 1" bitfld.long 0x00 31. " IRQS63 ,IRQS Status Bit 63" "Low,High" bitfld.long 0x00 30. " IRQS62 ,IRQS Status Bit 62" "Low,High" bitfld.long 0x00 29. " IRQS61 ,IRQS Status Bit 61" "Low,High" textline " " bitfld.long 0x00 28. " IRQS60 ,IRQS Status Bit 60" "Low,High" bitfld.long 0x00 27. " IRQS59 ,IRQS Status Bit 59" "Low,High" bitfld.long 0x00 26. " IRQS58 ,IRQS Status Bit 58" "Low,High" textline " " bitfld.long 0x00 25. " IRQS57 ,IRQS Status Bit 57" "Low,High" bitfld.long 0x00 24. " IRQS56 ,IRQS Status Bit 56" "Low,High" bitfld.long 0x00 23. " IRQS55 ,IRQS Status Bit 55" "Low,High" textline " " bitfld.long 0x00 22. " IRQS54 ,IRQS Status Bit 54" "Low,High" bitfld.long 0x00 21. " IRQS53 ,IRQS Status Bit 53" "Low,High" bitfld.long 0x00 20. " IRQS52 ,IRQS Status Bit 52" "Low,High" textline " " bitfld.long 0x00 19. " IRQS51 ,IRQS Status Bit 51" "Low,High" bitfld.long 0x00 18. " IRQS50 ,IRQS Status Bit 50" "Low,High" bitfld.long 0x00 17. " IRQS49 ,IRQS Status Bit 49" "Low,High" textline " " bitfld.long 0x00 16. " IRQS48 ,IRQS Status Bit 48" "Low,High" bitfld.long 0x00 15. " IRQS47 ,IRQS Status Bit 47" "Low,High" bitfld.long 0x00 14. " IRQS46 ,IRQS Status Bit 46" "Low,High" textline " " bitfld.long 0x00 13. " IRQS45 ,IRQS Status Bit 45" "Low,High" bitfld.long 0x00 12. " IRQS44 ,IRQS Status Bit 44" "Low,High" bitfld.long 0x00 11. " IRQS43 ,IRQS Status Bit 43" "Low,High" textline " " bitfld.long 0x00 10. " IRQS42 ,IRQS Status Bit 42" "Low,High" bitfld.long 0x00 9. " IRQS41 ,IRQS Status Bit 41" "Low,High" bitfld.long 0x00 8. " IRQS40 ,IRQS Status Bit 40" "Low,High" textline " " bitfld.long 0x00 7. " IRQS39 ,IRQS Status Bit 39" "Low,High" bitfld.long 0x00 6. " IRQS38 ,IRQS Status Bit 38" "Low,High" bitfld.long 0x00 5. " IRQS37 ,IRQS Status Bit 37" "Low,High" textline " " bitfld.long 0x00 4. " IRQS36 ,IRQS Status Bit 36" "Low,High" bitfld.long 0x00 3. " IRQS35 ,IRQS Status Bit 35" "Low,High" bitfld.long 0x00 2. " IRQS34 ,IRQS Status Bit 34" "Low,High" textline " " bitfld.long 0x00 1. " IRQS33 ,IRQS Status Bit 33" "Low,High" bitfld.long 0x00 0. " IRQS32 ,IRQS Status Bit 32" "Low,High" else rgroup.long 0x0D08++0x03 line.long 0x0 "GICD_SPISR1,Shared Peripheral Interrupt Status Register 1" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x03) rgroup.long 0x0D0C++0x03 line.long 0x0 "GICD_SPISR2,Shared Peripheral Interrupt Status Register 2" bitfld.long 0x00 31. " IRQS95 ,IRQS Status Bit 95" "Low,High" bitfld.long 0x00 30. " IRQS94 ,IRQS Status Bit 94" "Low,High" bitfld.long 0x00 29. " IRQS93 ,IRQS Status Bit 93" "Low,High" textline " " bitfld.long 0x00 28. " IRQS92 ,IRQS Status Bit 92" "Low,High" bitfld.long 0x00 27. " IRQS91 ,IRQS Status Bit 91" "Low,High" bitfld.long 0x00 26. " IRQS90 ,IRQS Status Bit 90" "Low,High" textline " " bitfld.long 0x00 25. " IRQS89 ,IRQS Status Bit 89" "Low,High" bitfld.long 0x00 24. " IRQS88 ,IRQS Status Bit 88" "Low,High" bitfld.long 0x00 23. " IRQS87 ,IRQS Status Bit 87" "Low,High" textline " " bitfld.long 0x00 22. " IRQS86 ,IRQS Status Bit 86" "Low,High" bitfld.long 0x00 21. " IRQS85 ,IRQS Status Bit 85" "Low,High" bitfld.long 0x00 20. " IRQS84 ,IRQS Status Bit 84" "Low,High" textline " " bitfld.long 0x00 19. " IRQS83 ,IRQS Status Bit 83" "Low,High" bitfld.long 0x00 18. " IRQS82 ,IRQS Status Bit 82" "Low,High" bitfld.long 0x00 17. " IRQS81 ,IRQS Status Bit 81" "Low,High" textline " " bitfld.long 0x00 16. " IRQS80 ,IRQS Status Bit 80" "Low,High" bitfld.long 0x00 15. " IRQS79 ,IRQS Status Bit 79" "Low,High" bitfld.long 0x00 14. " IRQS78 ,IRQS Status Bit 78" "Low,High" textline " " bitfld.long 0x00 13. " IRQS77 ,IRQS Status Bit 77" "Low,High" bitfld.long 0x00 12. " IRQS76 ,IRQS Status Bit 76" "Low,High" bitfld.long 0x00 11. " IRQS75 ,IRQS Status Bit 75" "Low,High" textline " " bitfld.long 0x00 10. " IRQS74 ,IRQS Status Bit 74" "Low,High" bitfld.long 0x00 9. " IRQS73 ,IRQS Status Bit 73" "Low,High" bitfld.long 0x00 8. " IRQS72 ,IRQS Status Bit 72" "Low,High" textline " " bitfld.long 0x00 7. " IRQS71 ,IRQS Status Bit 71" "Low,High" bitfld.long 0x00 6. " IRQS70 ,IRQS Status Bit 70" "Low,High" bitfld.long 0x00 5. " IRQS69 ,IRQS Status Bit 69" "Low,High" textline " " bitfld.long 0x00 4. " IRQS68 ,IRQS Status Bit 68" "Low,High" bitfld.long 0x00 3. " IRQS67 ,IRQS Status Bit 67" "Low,High" bitfld.long 0x00 2. " IRQS66 ,IRQS Status Bit 66" "Low,High" textline " " bitfld.long 0x00 1. " IRQS65 ,IRQS Status Bit 65" "Low,High" bitfld.long 0x00 0. " IRQS64 ,IRQS Status Bit 64" "Low,High" else rgroup.long 0x0D0C++0x03 line.long 0x0 "GICD_SPISR2,Shared Peripheral Interrupt Status Register 2" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x04) rgroup.long 0x0D10++0x03 line.long 0x0 "GICD_SPISR3,Shared Peripheral Interrupt Status Register 3" bitfld.long 0x00 31. " IRQS127 ,IRQS Status Bit 127" "Low,High" bitfld.long 0x00 30. " IRQS126 ,IRQS Status Bit 126" "Low,High" bitfld.long 0x00 29. " IRQS125 ,IRQS Status Bit 125" "Low,High" textline " " bitfld.long 0x00 28. " IRQS124 ,IRQS Status Bit 124" "Low,High" bitfld.long 0x00 27. " IRQS123 ,IRQS Status Bit 123" "Low,High" bitfld.long 0x00 26. " IRQS122 ,IRQS Status Bit 122" "Low,High" textline " " bitfld.long 0x00 25. " IRQS121 ,IRQS Status Bit 121" "Low,High" bitfld.long 0x00 24. " IRQS120 ,IRQS Status Bit 120" "Low,High" bitfld.long 0x00 23. " IRQS119 ,IRQS Status Bit 119" "Low,High" textline " " bitfld.long 0x00 22. " IRQS118 ,IRQS Status Bit 118" "Low,High" bitfld.long 0x00 21. " IRQS117 ,IRQS Status Bit 117" "Low,High" bitfld.long 0x00 20. " IRQS116 ,IRQS Status Bit 116" "Low,High" textline " " bitfld.long 0x00 19. " IRQS115 ,IRQS Status Bit 115" "Low,High" bitfld.long 0x00 18. " IRQS114 ,IRQS Status Bit 114" "Low,High" bitfld.long 0x00 17. " IRQS113 ,IRQS Status Bit 113" "Low,High" textline " " bitfld.long 0x00 16. " IRQS112 ,IRQS Status Bit 112" "Low,High" bitfld.long 0x00 15. " IRQS111 ,IRQS Status Bit 111" "Low,High" bitfld.long 0x00 14. " IRQS110 ,IRQS Status Bit 110" "Low,High" textline " " bitfld.long 0x00 13. " IRQS109 ,IRQS Status Bit 109" "Low,High" bitfld.long 0x00 12. " IRQS108 ,IRQS Status Bit 108" "Low,High" bitfld.long 0x00 11. " IRQS107 ,IRQS Status Bit 107" "Low,High" textline " " bitfld.long 0x00 10. " IRQS106 ,IRQS Status Bit 106" "Low,High" bitfld.long 0x00 9. " IRQS105 ,IRQS Status Bit 105" "Low,High" bitfld.long 0x00 8. " IRQS104 ,IRQS Status Bit 104" "Low,High" textline " " bitfld.long 0x00 7. " IRQS103 ,IRQS Status Bit 103" "Low,High" bitfld.long 0x00 6. " IRQS102 ,IRQS Status Bit 102" "Low,High" bitfld.long 0x00 5. " IRQS101 ,IRQS Status Bit 101" "Low,High" textline " " bitfld.long 0x00 4. " IRQS100 ,IRQS Status Bit 100" "Low,High" bitfld.long 0x00 3. " IRQS99 ,IRQS Status Bit 99" "Low,High" bitfld.long 0x00 2. " IRQS98 ,IRQS Status Bit 98" "Low,High" textline " " bitfld.long 0x00 1. " IRQS97 ,IRQS Status Bit 97" "Low,High" bitfld.long 0x00 0. " IRQS96 ,IRQS Status Bit 96" "Low,High" else rgroup.long 0x0D10++0x03 line.long 0x0 "GICD_SPISR3,Shared Peripheral Interrupt Status Register 3" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x05) rgroup.long 0x0D14++0x03 line.long 0x0 "GICD_SPISR4,Shared Peripheral Interrupt Status Register 4" bitfld.long 0x00 31. " IRQS159 ,IRQS Status Bit 159" "Low,High" bitfld.long 0x00 30. " IRQS158 ,IRQS Status Bit 158" "Low,High" bitfld.long 0x00 29. " IRQS157 ,IRQS Status Bit 157" "Low,High" textline " " bitfld.long 0x00 28. " IRQS156 ,IRQS Status Bit 156" "Low,High" bitfld.long 0x00 27. " IRQS155 ,IRQS Status Bit 155" "Low,High" bitfld.long 0x00 26. " IRQS154 ,IRQS Status Bit 154" "Low,High" textline " " bitfld.long 0x00 25. " IRQS153 ,IRQS Status Bit 153" "Low,High" bitfld.long 0x00 24. " IRQS152 ,IRQS Status Bit 152" "Low,High" bitfld.long 0x00 23. " IRQS151 ,IRQS Status Bit 151" "Low,High" textline " " bitfld.long 0x00 22. " IRQS150 ,IRQS Status Bit 150" "Low,High" bitfld.long 0x00 21. " IRQS149 ,IRQS Status Bit 149" "Low,High" bitfld.long 0x00 20. " IRQS148 ,IRQS Status Bit 148" "Low,High" textline " " bitfld.long 0x00 19. " IRQS147 ,IRQS Status Bit 147" "Low,High" bitfld.long 0x00 18. " IRQS146 ,IRQS Status Bit 146" "Low,High" bitfld.long 0x00 17. " IRQS145 ,IRQS Status Bit 145" "Low,High" textline " " bitfld.long 0x00 16. " IRQS144 ,IRQS Status Bit 144" "Low,High" bitfld.long 0x00 15. " IRQS143 ,IRQS Status Bit 143" "Low,High" bitfld.long 0x00 14. " IRQS142 ,IRQS Status Bit 142" "Low,High" textline " " bitfld.long 0x00 13. " IRQS141 ,IRQS Status Bit 141" "Low,High" bitfld.long 0x00 12. " IRQS140 ,IRQS Status Bit 140" "Low,High" bitfld.long 0x00 11. " IRQS139 ,IRQS Status Bit 139" "Low,High" textline " " bitfld.long 0x00 10. " IRQS138 ,IRQS Status Bit 138" "Low,High" bitfld.long 0x00 9. " IRQS137 ,IRQS Status Bit 137" "Low,High" bitfld.long 0x00 8. " IRQS136 ,IRQS Status Bit 136" "Low,High" textline " " bitfld.long 0x00 7. " IRQS135 ,IRQS Status Bit 135" "Low,High" bitfld.long 0x00 6. " IRQS134 ,IRQS Status Bit 134" "Low,High" bitfld.long 0x00 5. " IRQS133 ,IRQS Status Bit 133" "Low,High" textline " " bitfld.long 0x00 4. " IRQS132 ,IRQS Status Bit 132" "Low,High" bitfld.long 0x00 3. " IRQS131 ,IRQS Status Bit 131" "Low,High" bitfld.long 0x00 2. " IRQS130 ,IRQS Status Bit 130" "Low,High" textline " " bitfld.long 0x00 1. " IRQS129 ,IRQS Status Bit 129" "Low,High" bitfld.long 0x00 0. " IRQS128 ,IRQS Status Bit 128" "Low,High" else rgroup.long 0x0D14++0x03 line.long 0x0 "GICD_SPISR4,Shared Peripheral Interrupt Status Register 4" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x06) rgroup.long 0x0D18++0x03 line.long 0x0 "GICD_SPISR5,Shared Peripheral Interrupt Status Register 5" bitfld.long 0x00 31. " IRQS191 ,IRQS Status Bit 191" "Low,High" bitfld.long 0x00 30. " IRQS190 ,IRQS Status Bit 190" "Low,High" bitfld.long 0x00 29. " IRQS189 ,IRQS Status Bit 189" "Low,High" textline " " bitfld.long 0x00 28. " IRQS188 ,IRQS Status Bit 188" "Low,High" bitfld.long 0x00 27. " IRQS187 ,IRQS Status Bit 187" "Low,High" bitfld.long 0x00 26. " IRQS186 ,IRQS Status Bit 186" "Low,High" textline " " bitfld.long 0x00 25. " IRQS185 ,IRQS Status Bit 185" "Low,High" bitfld.long 0x00 24. " IRQS184 ,IRQS Status Bit 184" "Low,High" bitfld.long 0x00 23. " IRQS183 ,IRQS Status Bit 183" "Low,High" textline " " bitfld.long 0x00 22. " IRQS182 ,IRQS Status Bit 182" "Low,High" bitfld.long 0x00 21. " IRQS181 ,IRQS Status Bit 181" "Low,High" bitfld.long 0x00 20. " IRQS180 ,IRQS Status Bit 180" "Low,High" textline " " bitfld.long 0x00 19. " IRQS179 ,IRQS Status Bit 179" "Low,High" bitfld.long 0x00 18. " IRQS178 ,IRQS Status Bit 178" "Low,High" bitfld.long 0x00 17. " IRQS177 ,IRQS Status Bit 177" "Low,High" textline " " bitfld.long 0x00 16. " IRQS176 ,IRQS Status Bit 176" "Low,High" bitfld.long 0x00 15. " IRQS175 ,IRQS Status Bit 175" "Low,High" bitfld.long 0x00 14. " IRQS174 ,IRQS Status Bit 174" "Low,High" textline " " bitfld.long 0x00 13. " IRQS173 ,IRQS Status Bit 173" "Low,High" bitfld.long 0x00 12. " IRQS172 ,IRQS Status Bit 172" "Low,High" bitfld.long 0x00 11. " IRQS171 ,IRQS Status Bit 171" "Low,High" textline " " bitfld.long 0x00 10. " IRQS170 ,IRQS Status Bit 170" "Low,High" bitfld.long 0x00 9. " IRQS169 ,IRQS Status Bit 169" "Low,High" bitfld.long 0x00 8. " IRQS168 ,IRQS Status Bit 168" "Low,High" textline " " bitfld.long 0x00 7. " IRQS167 ,IRQS Status Bit 167" "Low,High" bitfld.long 0x00 6. " IRQS166 ,IRQS Status Bit 166" "Low,High" bitfld.long 0x00 5. " IRQS165 ,IRQS Status Bit 165" "Low,High" textline " " bitfld.long 0x00 4. " IRQS164 ,IRQS Status Bit 164" "Low,High" bitfld.long 0x00 3. " IRQS163 ,IRQS Status Bit 163" "Low,High" bitfld.long 0x00 2. " IRQS162 ,IRQS Status Bit 162" "Low,High" textline " " bitfld.long 0x00 1. " IRQS161 ,IRQS Status Bit 161" "Low,High" bitfld.long 0x00 0. " IRQS160 ,IRQS Status Bit 160" "Low,High" else rgroup.long 0x0D18++0x03 line.long 0x0 "GICD_SPISR5,Shared Peripheral Interrupt Status Register 5" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x07) rgroup.long 0x0D1C++0x03 line.long 0x0 "GICD_SPISR6,Shared Peripheral Interrupt Status Register 6" bitfld.long 0x00 31. " IRQS223 ,IRQS Status Bit 223" "Low,High" bitfld.long 0x00 30. " IRQS222 ,IRQS Status Bit 222" "Low,High" bitfld.long 0x00 29. " IRQS221 ,IRQS Status Bit 221" "Low,High" textline " " bitfld.long 0x00 28. " IRQS220 ,IRQS Status Bit 220" "Low,High" bitfld.long 0x00 27. " IRQS219 ,IRQS Status Bit 219" "Low,High" bitfld.long 0x00 26. " IRQS218 ,IRQS Status Bit 218" "Low,High" textline " " bitfld.long 0x00 25. " IRQS217 ,IRQS Status Bit 217" "Low,High" bitfld.long 0x00 24. " IRQS216 ,IRQS Status Bit 216" "Low,High" bitfld.long 0x00 23. " IRQS215 ,IRQS Status Bit 215" "Low,High" textline " " bitfld.long 0x00 22. " IRQS214 ,IRQS Status Bit 214" "Low,High" bitfld.long 0x00 21. " IRQS213 ,IRQS Status Bit 213" "Low,High" bitfld.long 0x00 20. " IRQS212 ,IRQS Status Bit 212" "Low,High" textline " " bitfld.long 0x00 19. " IRQS211 ,IRQS Status Bit 211" "Low,High" bitfld.long 0x00 18. " IRQS210 ,IRQS Status Bit 210" "Low,High" bitfld.long 0x00 17. " IRQS209 ,IRQS Status Bit 209" "Low,High" textline " " bitfld.long 0x00 16. " IRQS208 ,IRQS Status Bit 208" "Low,High" bitfld.long 0x00 15. " IRQS207 ,IRQS Status Bit 207" "Low,High" bitfld.long 0x00 14. " IRQS206 ,IRQS Status Bit 206" "Low,High" textline " " bitfld.long 0x00 13. " IRQS205 ,IRQS Status Bit 205" "Low,High" bitfld.long 0x00 12. " IRQS204 ,IRQS Status Bit 204" "Low,High" bitfld.long 0x00 11. " IRQS203 ,IRQS Status Bit 203" "Low,High" textline " " bitfld.long 0x00 10. " IRQS202 ,IRQS Status Bit 202" "Low,High" bitfld.long 0x00 9. " IRQS201 ,IRQS Status Bit 201" "Low,High" bitfld.long 0x00 8. " IRQS200 ,IRQS Status Bit 200" "Low,High" textline " " bitfld.long 0x00 7. " IRQS199 ,IRQS Status Bit 199" "Low,High" bitfld.long 0x00 6. " IRQS198 ,IRQS Status Bit 198" "Low,High" bitfld.long 0x00 5. " IRQS197 ,IRQS Status Bit 197" "Low,High" textline " " bitfld.long 0x00 4. " IRQS196 ,IRQS Status Bit 196" "Low,High" bitfld.long 0x00 3. " IRQS195 ,IRQS Status Bit 195" "Low,High" bitfld.long 0x00 2. " IRQS194 ,IRQS Status Bit 194" "Low,High" textline " " bitfld.long 0x00 1. " IRQS193 ,IRQS Status Bit 193" "Low,High" bitfld.long 0x00 0. " IRQS192 ,IRQS Status Bit 192" "Low,High" else rgroup.long 0x0D1C++0x03 line.long 0x0 "GICD_SPISR6,Shared Peripheral Interrupt Status Register 6" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x08) rgroup.long 0x0D20++0x03 line.long 0x0 "GICD_SPISR7,Shared Peripheral Interrupt Status Register 7" bitfld.long 0x00 31. " IRQS255 ,IRQS Status Bit 255" "Low,High" bitfld.long 0x00 30. " IRQS254 ,IRQS Status Bit 254" "Low,High" bitfld.long 0x00 29. " IRQS253 ,IRQS Status Bit 253" "Low,High" textline " " bitfld.long 0x00 28. " IRQS252 ,IRQS Status Bit 252" "Low,High" bitfld.long 0x00 27. " IRQS251 ,IRQS Status Bit 251" "Low,High" bitfld.long 0x00 26. " IRQS250 ,IRQS Status Bit 250" "Low,High" textline " " bitfld.long 0x00 25. " IRQS249 ,IRQS Status Bit 249" "Low,High" bitfld.long 0x00 24. " IRQS248 ,IRQS Status Bit 248" "Low,High" bitfld.long 0x00 23. " IRQS247 ,IRQS Status Bit 247" "Low,High" textline " " bitfld.long 0x00 22. " IRQS246 ,IRQS Status Bit 246" "Low,High" bitfld.long 0x00 21. " IRQS245 ,IRQS Status Bit 245" "Low,High" bitfld.long 0x00 20. " IRQS244 ,IRQS Status Bit 244" "Low,High" textline " " bitfld.long 0x00 19. " IRQS243 ,IRQS Status Bit 243" "Low,High" bitfld.long 0x00 18. " IRQS242 ,IRQS Status Bit 242" "Low,High" bitfld.long 0x00 17. " IRQS241 ,IRQS Status Bit 241" "Low,High" textline " " bitfld.long 0x00 16. " IRQS240 ,IRQS Status Bit 240" "Low,High" bitfld.long 0x00 15. " IRQS239 ,IRQS Status Bit 239" "Low,High" bitfld.long 0x00 14. " IRQS238 ,IRQS Status Bit 238" "Low,High" textline " " bitfld.long 0x00 13. " IRQS237 ,IRQS Status Bit 237" "Low,High" bitfld.long 0x00 12. " IRQS236 ,IRQS Status Bit 236" "Low,High" bitfld.long 0x00 11. " IRQS235 ,IRQS Status Bit 235" "Low,High" textline " " bitfld.long 0x00 10. " IRQS234 ,IRQS Status Bit 234" "Low,High" bitfld.long 0x00 9. " IRQS233 ,IRQS Status Bit 233" "Low,High" bitfld.long 0x00 8. " IRQS232 ,IRQS Status Bit 232" "Low,High" textline " " bitfld.long 0x00 7. " IRQS231 ,IRQS Status Bit 231" "Low,High" bitfld.long 0x00 6. " IRQS230 ,IRQS Status Bit 230" "Low,High" bitfld.long 0x00 5. " IRQS229 ,IRQS Status Bit 229" "Low,High" textline " " bitfld.long 0x00 4. " IRQS228 ,IRQS Status Bit 228" "Low,High" bitfld.long 0x00 3. " IRQS227 ,IRQS Status Bit 227" "Low,High" bitfld.long 0x00 2. " IRQS226 ,IRQS Status Bit 226" "Low,High" textline " " bitfld.long 0x00 1. " IRQS225 ,IRQS Status Bit 225" "Low,High" bitfld.long 0x00 0. " IRQS224 ,IRQS Status Bit 224" "Low,High" else rgroup.long 0x0D20++0x03 line.long 0x0 "GICD_SPISR7,Shared Peripheral Interrupt Status Register 7" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x09) rgroup.long 0x0D24++0x03 line.long 0x0 "GICD_SPISR8,Shared Peripheral Interrupt Status Register 8" bitfld.long 0x00 31. " IRQS287 ,IRQS Status Bit 287" "Low,High" bitfld.long 0x00 30. " IRQS286 ,IRQS Status Bit 286" "Low,High" bitfld.long 0x00 29. " IRQS285 ,IRQS Status Bit 285" "Low,High" textline " " bitfld.long 0x00 28. " IRQS284 ,IRQS Status Bit 284" "Low,High" bitfld.long 0x00 27. " IRQS283 ,IRQS Status Bit 283" "Low,High" bitfld.long 0x00 26. " IRQS282 ,IRQS Status Bit 282" "Low,High" textline " " bitfld.long 0x00 25. " IRQS281 ,IRQS Status Bit 281" "Low,High" bitfld.long 0x00 24. " IRQS280 ,IRQS Status Bit 280" "Low,High" bitfld.long 0x00 23. " IRQS279 ,IRQS Status Bit 279" "Low,High" textline " " bitfld.long 0x00 22. " IRQS278 ,IRQS Status Bit 278" "Low,High" bitfld.long 0x00 21. " IRQS277 ,IRQS Status Bit 277" "Low,High" bitfld.long 0x00 20. " IRQS276 ,IRQS Status Bit 276" "Low,High" textline " " bitfld.long 0x00 19. " IRQS275 ,IRQS Status Bit 275" "Low,High" bitfld.long 0x00 18. " IRQS274 ,IRQS Status Bit 274" "Low,High" bitfld.long 0x00 17. " IRQS273 ,IRQS Status Bit 273" "Low,High" textline " " bitfld.long 0x00 16. " IRQS272 ,IRQS Status Bit 272" "Low,High" bitfld.long 0x00 15. " IRQS271 ,IRQS Status Bit 271" "Low,High" bitfld.long 0x00 14. " IRQS270 ,IRQS Status Bit 270" "Low,High" textline " " bitfld.long 0x00 13. " IRQS269 ,IRQS Status Bit 269" "Low,High" bitfld.long 0x00 12. " IRQS268 ,IRQS Status Bit 268" "Low,High" bitfld.long 0x00 11. " IRQS267 ,IRQS Status Bit 267" "Low,High" textline " " bitfld.long 0x00 10. " IRQS266 ,IRQS Status Bit 266" "Low,High" bitfld.long 0x00 9. " IRQS265 ,IRQS Status Bit 265" "Low,High" bitfld.long 0x00 8. " IRQS264 ,IRQS Status Bit 264" "Low,High" textline " " bitfld.long 0x00 7. " IRQS263 ,IRQS Status Bit 263" "Low,High" bitfld.long 0x00 6. " IRQS262 ,IRQS Status Bit 262" "Low,High" bitfld.long 0x00 5. " IRQS261 ,IRQS Status Bit 261" "Low,High" textline " " bitfld.long 0x00 4. " IRQS260 ,IRQS Status Bit 260" "Low,High" bitfld.long 0x00 3. " IRQS259 ,IRQS Status Bit 259" "Low,High" bitfld.long 0x00 2. " IRQS258 ,IRQS Status Bit 258" "Low,High" textline " " bitfld.long 0x00 1. " IRQS257 ,IRQS Status Bit 257" "Low,High" bitfld.long 0x00 0. " IRQS256 ,IRQS Status Bit 256" "Low,High" else rgroup.long 0x0D24++0x03 line.long 0x0 "GICD_SPISR8,Shared Peripheral Interrupt Status Register 8" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x0A) rgroup.long 0x0D28++0x03 line.long 0x0 "GICD_SPISR9,Shared Peripheral Interrupt Status Register 9" bitfld.long 0x00 31. " IRQS319 ,IRQS Status Bit 319" "Low,High" bitfld.long 0x00 30. " IRQS318 ,IRQS Status Bit 318" "Low,High" bitfld.long 0x00 29. " IRQS317 ,IRQS Status Bit 317" "Low,High" textline " " bitfld.long 0x00 28. " IRQS316 ,IRQS Status Bit 316" "Low,High" bitfld.long 0x00 27. " IRQS315 ,IRQS Status Bit 315" "Low,High" bitfld.long 0x00 26. " IRQS314 ,IRQS Status Bit 314" "Low,High" textline " " bitfld.long 0x00 25. " IRQS313 ,IRQS Status Bit 313" "Low,High" bitfld.long 0x00 24. " IRQS312 ,IRQS Status Bit 312" "Low,High" bitfld.long 0x00 23. " IRQS311 ,IRQS Status Bit 311" "Low,High" textline " " bitfld.long 0x00 22. " IRQS310 ,IRQS Status Bit 310" "Low,High" bitfld.long 0x00 21. " IRQS309 ,IRQS Status Bit 309" "Low,High" bitfld.long 0x00 20. " IRQS308 ,IRQS Status Bit 308" "Low,High" textline " " bitfld.long 0x00 19. " IRQS307 ,IRQS Status Bit 307" "Low,High" bitfld.long 0x00 18. " IRQS306 ,IRQS Status Bit 306" "Low,High" bitfld.long 0x00 17. " IRQS305 ,IRQS Status Bit 305" "Low,High" textline " " bitfld.long 0x00 16. " IRQS304 ,IRQS Status Bit 304" "Low,High" bitfld.long 0x00 15. " IRQS303 ,IRQS Status Bit 303" "Low,High" bitfld.long 0x00 14. " IRQS302 ,IRQS Status Bit 302" "Low,High" textline " " bitfld.long 0x00 13. " IRQS301 ,IRQS Status Bit 301" "Low,High" bitfld.long 0x00 12. " IRQS300 ,IRQS Status Bit 300" "Low,High" bitfld.long 0x00 11. " IRQS299 ,IRQS Status Bit 299" "Low,High" textline " " bitfld.long 0x00 10. " IRQS298 ,IRQS Status Bit 298" "Low,High" bitfld.long 0x00 9. " IRQS297 ,IRQS Status Bit 297" "Low,High" bitfld.long 0x00 8. " IRQS296 ,IRQS Status Bit 296" "Low,High" textline " " bitfld.long 0x00 7. " IRQS295 ,IRQS Status Bit 295" "Low,High" bitfld.long 0x00 6. " IRQS294 ,IRQS Status Bit 294" "Low,High" bitfld.long 0x00 5. " IRQS293 ,IRQS Status Bit 293" "Low,High" textline " " bitfld.long 0x00 4. " IRQS292 ,IRQS Status Bit 292" "Low,High" bitfld.long 0x00 3. " IRQS291 ,IRQS Status Bit 291" "Low,High" bitfld.long 0x00 2. " IRQS290 ,IRQS Status Bit 290" "Low,High" textline " " bitfld.long 0x00 1. " IRQS289 ,IRQS Status Bit 289" "Low,High" bitfld.long 0x00 0. " IRQS288 ,IRQS Status Bit 288" "Low,High" else rgroup.long 0x0D28++0x03 line.long 0x0 "GICD_SPISR9,Shared Peripheral Interrupt Status Register 9" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x0B) rgroup.long 0x0D2C++0x03 line.long 0x0 "GICD_SPISR10,Shared Peripheral Interrupt Status Register 10" bitfld.long 0x00 31. " IRQS351 ,IRQS Status Bit 351" "Low,High" bitfld.long 0x00 30. " IRQS350 ,IRQS Status Bit 350" "Low,High" bitfld.long 0x00 29. " IRQS349 ,IRQS Status Bit 349" "Low,High" textline " " bitfld.long 0x00 28. " IRQS348 ,IRQS Status Bit 348" "Low,High" bitfld.long 0x00 27. " IRQS347 ,IRQS Status Bit 347" "Low,High" bitfld.long 0x00 26. " IRQS346 ,IRQS Status Bit 346" "Low,High" textline " " bitfld.long 0x00 25. " IRQS345 ,IRQS Status Bit 345" "Low,High" bitfld.long 0x00 24. " IRQS344 ,IRQS Status Bit 344" "Low,High" bitfld.long 0x00 23. " IRQS343 ,IRQS Status Bit 343" "Low,High" textline " " bitfld.long 0x00 22. " IRQS342 ,IRQS Status Bit 342" "Low,High" bitfld.long 0x00 21. " IRQS341 ,IRQS Status Bit 341" "Low,High" bitfld.long 0x00 20. " IRQS340 ,IRQS Status Bit 340" "Low,High" textline " " bitfld.long 0x00 19. " IRQS339 ,IRQS Status Bit 339" "Low,High" bitfld.long 0x00 18. " IRQS338 ,IRQS Status Bit 338" "Low,High" bitfld.long 0x00 17. " IRQS337 ,IRQS Status Bit 337" "Low,High" textline " " bitfld.long 0x00 16. " IRQS336 ,IRQS Status Bit 336" "Low,High" bitfld.long 0x00 15. " IRQS335 ,IRQS Status Bit 335" "Low,High" bitfld.long 0x00 14. " IRQS334 ,IRQS Status Bit 334" "Low,High" textline " " bitfld.long 0x00 13. " IRQS333 ,IRQS Status Bit 333" "Low,High" bitfld.long 0x00 12. " IRQS332 ,IRQS Status Bit 332" "Low,High" bitfld.long 0x00 11. " IRQS331 ,IRQS Status Bit 331" "Low,High" textline " " bitfld.long 0x00 10. " IRQS330 ,IRQS Status Bit 330" "Low,High" bitfld.long 0x00 9. " IRQS329 ,IRQS Status Bit 329" "Low,High" bitfld.long 0x00 8. " IRQS328 ,IRQS Status Bit 328" "Low,High" textline " " bitfld.long 0x00 7. " IRQS327 ,IRQS Status Bit 327" "Low,High" bitfld.long 0x00 6. " IRQS326 ,IRQS Status Bit 326" "Low,High" bitfld.long 0x00 5. " IRQS325 ,IRQS Status Bit 325" "Low,High" textline " " bitfld.long 0x00 4. " IRQS324 ,IRQS Status Bit 324" "Low,High" bitfld.long 0x00 3. " IRQS323 ,IRQS Status Bit 323" "Low,High" bitfld.long 0x00 2. " IRQS322 ,IRQS Status Bit 322" "Low,High" textline " " bitfld.long 0x00 1. " IRQS321 ,IRQS Status Bit 321" "Low,High" bitfld.long 0x00 0. " IRQS320 ,IRQS Status Bit 320" "Low,High" else rgroup.long 0x0D2C++0x03 line.long 0x0 "GICD_SPISR10,Shared Peripheral Interrupt Status Register 10" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x0C) rgroup.long 0x0D30++0x03 line.long 0x0 "GICD_SPISR11,Shared Peripheral Interrupt Status Register 11" bitfld.long 0x00 31. " IRQS383 ,IRQS Status Bit 383" "Low,High" bitfld.long 0x00 30. " IRQS382 ,IRQS Status Bit 382" "Low,High" bitfld.long 0x00 29. " IRQS381 ,IRQS Status Bit 381" "Low,High" textline " " bitfld.long 0x00 28. " IRQS380 ,IRQS Status Bit 380" "Low,High" bitfld.long 0x00 27. " IRQS379 ,IRQS Status Bit 379" "Low,High" bitfld.long 0x00 26. " IRQS378 ,IRQS Status Bit 378" "Low,High" textline " " bitfld.long 0x00 25. " IRQS377 ,IRQS Status Bit 377" "Low,High" bitfld.long 0x00 24. " IRQS376 ,IRQS Status Bit 376" "Low,High" bitfld.long 0x00 23. " IRQS375 ,IRQS Status Bit 375" "Low,High" textline " " bitfld.long 0x00 22. " IRQS374 ,IRQS Status Bit 374" "Low,High" bitfld.long 0x00 21. " IRQS373 ,IRQS Status Bit 373" "Low,High" bitfld.long 0x00 20. " IRQS372 ,IRQS Status Bit 372" "Low,High" textline " " bitfld.long 0x00 19. " IRQS371 ,IRQS Status Bit 371" "Low,High" bitfld.long 0x00 18. " IRQS370 ,IRQS Status Bit 370" "Low,High" bitfld.long 0x00 17. " IRQS369 ,IRQS Status Bit 369" "Low,High" textline " " bitfld.long 0x00 16. " IRQS368 ,IRQS Status Bit 368" "Low,High" bitfld.long 0x00 15. " IRQS367 ,IRQS Status Bit 367" "Low,High" bitfld.long 0x00 14. " IRQS366 ,IRQS Status Bit 366" "Low,High" textline " " bitfld.long 0x00 13. " IRQS365 ,IRQS Status Bit 365" "Low,High" bitfld.long 0x00 12. " IRQS364 ,IRQS Status Bit 364" "Low,High" bitfld.long 0x00 11. " IRQS363 ,IRQS Status Bit 363" "Low,High" textline " " bitfld.long 0x00 10. " IRQS362 ,IRQS Status Bit 362" "Low,High" bitfld.long 0x00 9. " IRQS361 ,IRQS Status Bit 361" "Low,High" bitfld.long 0x00 8. " IRQS360 ,IRQS Status Bit 360" "Low,High" textline " " bitfld.long 0x00 7. " IRQS359 ,IRQS Status Bit 359" "Low,High" bitfld.long 0x00 6. " IRQS358 ,IRQS Status Bit 358" "Low,High" bitfld.long 0x00 5. " IRQS357 ,IRQS Status Bit 357" "Low,High" textline " " bitfld.long 0x00 4. " IRQS356 ,IRQS Status Bit 356" "Low,High" bitfld.long 0x00 3. " IRQS355 ,IRQS Status Bit 355" "Low,High" bitfld.long 0x00 2. " IRQS354 ,IRQS Status Bit 354" "Low,High" textline " " bitfld.long 0x00 1. " IRQS353 ,IRQS Status Bit 353" "Low,High" bitfld.long 0x00 0. " IRQS352 ,IRQS Status Bit 352" "Low,High" else rgroup.long 0x0D30++0x03 line.long 0x0 "GICD_SPISR11,Shared Peripheral Interrupt Status Register 11" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x0D) rgroup.long 0x0D34++0x03 line.long 0x0 "GICD_SPISR12,Shared Peripheral Interrupt Status Register 12" bitfld.long 0x00 31. " IRQS415 ,IRQS Status Bit 415" "Low,High" bitfld.long 0x00 30. " IRQS414 ,IRQS Status Bit 414" "Low,High" bitfld.long 0x00 29. " IRQS413 ,IRQS Status Bit 413" "Low,High" textline " " bitfld.long 0x00 28. " IRQS412 ,IRQS Status Bit 412" "Low,High" bitfld.long 0x00 27. " IRQS411 ,IRQS Status Bit 411" "Low,High" bitfld.long 0x00 26. " IRQS410 ,IRQS Status Bit 410" "Low,High" textline " " bitfld.long 0x00 25. " IRQS409 ,IRQS Status Bit 409" "Low,High" bitfld.long 0x00 24. " IRQS408 ,IRQS Status Bit 408" "Low,High" bitfld.long 0x00 23. " IRQS407 ,IRQS Status Bit 407" "Low,High" textline " " bitfld.long 0x00 22. " IRQS406 ,IRQS Status Bit 406" "Low,High" bitfld.long 0x00 21. " IRQS405 ,IRQS Status Bit 405" "Low,High" bitfld.long 0x00 20. " IRQS404 ,IRQS Status Bit 404" "Low,High" textline " " bitfld.long 0x00 19. " IRQS403 ,IRQS Status Bit 403" "Low,High" bitfld.long 0x00 18. " IRQS402 ,IRQS Status Bit 402" "Low,High" bitfld.long 0x00 17. " IRQS401 ,IRQS Status Bit 401" "Low,High" textline " " bitfld.long 0x00 16. " IRQS400 ,IRQS Status Bit 400" "Low,High" bitfld.long 0x00 15. " IRQS399 ,IRQS Status Bit 399" "Low,High" bitfld.long 0x00 14. " IRQS398 ,IRQS Status Bit 398" "Low,High" textline " " bitfld.long 0x00 13. " IRQS397 ,IRQS Status Bit 397" "Low,High" bitfld.long 0x00 12. " IRQS396 ,IRQS Status Bit 396" "Low,High" bitfld.long 0x00 11. " IRQS395 ,IRQS Status Bit 395" "Low,High" textline " " bitfld.long 0x00 10. " IRQS394 ,IRQS Status Bit 394" "Low,High" bitfld.long 0x00 9. " IRQS393 ,IRQS Status Bit 393" "Low,High" bitfld.long 0x00 8. " IRQS392 ,IRQS Status Bit 392" "Low,High" textline " " bitfld.long 0x00 7. " IRQS391 ,IRQS Status Bit 391" "Low,High" bitfld.long 0x00 6. " IRQS390 ,IRQS Status Bit 390" "Low,High" bitfld.long 0x00 5. " IRQS389 ,IRQS Status Bit 389" "Low,High" textline " " bitfld.long 0x00 4. " IRQS388 ,IRQS Status Bit 388" "Low,High" bitfld.long 0x00 3. " IRQS387 ,IRQS Status Bit 387" "Low,High" bitfld.long 0x00 2. " IRQS386 ,IRQS Status Bit 386" "Low,High" textline " " bitfld.long 0x00 1. " IRQS385 ,IRQS Status Bit 385" "Low,High" bitfld.long 0x00 0. " IRQS384 ,IRQS Status Bit 384" "Low,High" else rgroup.long 0x0D34++0x03 line.long 0x0 "GICD_SPISR12,Shared Peripheral Interrupt Status Register 12" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x0E) rgroup.long 0x0D38++0x03 line.long 0x0 "GICD_SPISR13,Shared Peripheral Interrupt Status Register 13" bitfld.long 0x00 31. " IRQS447 ,IRQS Status Bit 447" "Low,High" bitfld.long 0x00 30. " IRQS446 ,IRQS Status Bit 446" "Low,High" bitfld.long 0x00 29. " IRQS445 ,IRQS Status Bit 445" "Low,High" textline " " bitfld.long 0x00 28. " IRQS444 ,IRQS Status Bit 444" "Low,High" bitfld.long 0x00 27. " IRQS443 ,IRQS Status Bit 443" "Low,High" bitfld.long 0x00 26. " IRQS442 ,IRQS Status Bit 442" "Low,High" textline " " bitfld.long 0x00 25. " IRQS441 ,IRQS Status Bit 441" "Low,High" bitfld.long 0x00 24. " IRQS440 ,IRQS Status Bit 440" "Low,High" bitfld.long 0x00 23. " IRQS439 ,IRQS Status Bit 439" "Low,High" textline " " bitfld.long 0x00 22. " IRQS438 ,IRQS Status Bit 438" "Low,High" bitfld.long 0x00 21. " IRQS437 ,IRQS Status Bit 437" "Low,High" bitfld.long 0x00 20. " IRQS436 ,IRQS Status Bit 436" "Low,High" textline " " bitfld.long 0x00 19. " IRQS435 ,IRQS Status Bit 435" "Low,High" bitfld.long 0x00 18. " IRQS434 ,IRQS Status Bit 434" "Low,High" bitfld.long 0x00 17. " IRQS433 ,IRQS Status Bit 433" "Low,High" textline " " bitfld.long 0x00 16. " IRQS432 ,IRQS Status Bit 432" "Low,High" bitfld.long 0x00 15. " IRQS431 ,IRQS Status Bit 431" "Low,High" bitfld.long 0x00 14. " IRQS430 ,IRQS Status Bit 430" "Low,High" textline " " bitfld.long 0x00 13. " IRQS429 ,IRQS Status Bit 429" "Low,High" bitfld.long 0x00 12. " IRQS428 ,IRQS Status Bit 428" "Low,High" bitfld.long 0x00 11. " IRQS427 ,IRQS Status Bit 427" "Low,High" textline " " bitfld.long 0x00 10. " IRQS426 ,IRQS Status Bit 426" "Low,High" bitfld.long 0x00 9. " IRQS425 ,IRQS Status Bit 425" "Low,High" bitfld.long 0x00 8. " IRQS424 ,IRQS Status Bit 424" "Low,High" textline " " bitfld.long 0x00 7. " IRQS423 ,IRQS Status Bit 423" "Low,High" bitfld.long 0x00 6. " IRQS422 ,IRQS Status Bit 422" "Low,High" bitfld.long 0x00 5. " IRQS421 ,IRQS Status Bit 421" "Low,High" textline " " bitfld.long 0x00 4. " IRQS420 ,IRQS Status Bit 420" "Low,High" bitfld.long 0x00 3. " IRQS419 ,IRQS Status Bit 419" "Low,High" bitfld.long 0x00 2. " IRQS418 ,IRQS Status Bit 418" "Low,High" textline " " bitfld.long 0x00 1. " IRQS417 ,IRQS Status Bit 417" "Low,High" bitfld.long 0x00 0. " IRQS416 ,IRQS Status Bit 416" "Low,High" else rgroup.long 0x0D38++0x03 line.long 0x0 "GICD_SPISR13,Shared Peripheral Interrupt Status Register 13" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x0F) rgroup.long 0x0D3C++0x03 line.long 0x0 "GICD_SPISR14,Shared Peripheral Interrupt Status Register 14" bitfld.long 0x00 31. " IRQS479 ,IRQS Status Bit 479" "Low,High" bitfld.long 0x00 30. " IRQS478 ,IRQS Status Bit 478" "Low,High" bitfld.long 0x00 29. " IRQS477 ,IRQS Status Bit 477" "Low,High" textline " " bitfld.long 0x00 28. " IRQS476 ,IRQS Status Bit 476" "Low,High" bitfld.long 0x00 27. " IRQS475 ,IRQS Status Bit 475" "Low,High" bitfld.long 0x00 26. " IRQS474 ,IRQS Status Bit 474" "Low,High" textline " " bitfld.long 0x00 25. " IRQS473 ,IRQS Status Bit 473" "Low,High" bitfld.long 0x00 24. " IRQS472 ,IRQS Status Bit 472" "Low,High" bitfld.long 0x00 23. " IRQS471 ,IRQS Status Bit 471" "Low,High" textline " " bitfld.long 0x00 22. " IRQS470 ,IRQS Status Bit 470" "Low,High" bitfld.long 0x00 21. " IRQS469 ,IRQS Status Bit 469" "Low,High" bitfld.long 0x00 20. " IRQS468 ,IRQS Status Bit 468" "Low,High" textline " " bitfld.long 0x00 19. " IRQS467 ,IRQS Status Bit 467" "Low,High" bitfld.long 0x00 18. " IRQS466 ,IRQS Status Bit 466" "Low,High" bitfld.long 0x00 17. " IRQS465 ,IRQS Status Bit 465" "Low,High" textline " " bitfld.long 0x00 16. " IRQS464 ,IRQS Status Bit 464" "Low,High" bitfld.long 0x00 15. " IRQS463 ,IRQS Status Bit 463" "Low,High" bitfld.long 0x00 14. " IRQS462 ,IRQS Status Bit 462" "Low,High" textline " " bitfld.long 0x00 13. " IRQS461 ,IRQS Status Bit 461" "Low,High" bitfld.long 0x00 12. " IRQS460 ,IRQS Status Bit 460" "Low,High" bitfld.long 0x00 11. " IRQS459 ,IRQS Status Bit 459" "Low,High" textline " " bitfld.long 0x00 10. " IRQS458 ,IRQS Status Bit 458" "Low,High" bitfld.long 0x00 9. " IRQS457 ,IRQS Status Bit 457" "Low,High" bitfld.long 0x00 8. " IRQS456 ,IRQS Status Bit 456" "Low,High" textline " " bitfld.long 0x00 7. " IRQS455 ,IRQS Status Bit 455" "Low,High" bitfld.long 0x00 6. " IRQS454 ,IRQS Status Bit 454" "Low,High" bitfld.long 0x00 5. " IRQS453 ,IRQS Status Bit 453" "Low,High" textline " " bitfld.long 0x00 4. " IRQS452 ,IRQS Status Bit 452" "Low,High" bitfld.long 0x00 3. " IRQS451 ,IRQS Status Bit 451" "Low,High" bitfld.long 0x00 2. " IRQS450 ,IRQS Status Bit 450" "Low,High" textline " " bitfld.long 0x00 1. " IRQS449 ,IRQS Status Bit 449" "Low,High" bitfld.long 0x00 0. " IRQS448 ,IRQS Status Bit 448" "Low,High" else rgroup.long 0x0D3C++0x03 line.long 0x0 "GICD_SPISR14,Shared Peripheral Interrupt Status Register 14" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x10) rgroup.long 0x0D40++0x03 line.long 0x0 "GICD_SPISR15,Shared Peripheral Interrupt Status Register 15" bitfld.long 0x00 31. " IRQS511 ,IRQS Status Bit 511" "Low,High" bitfld.long 0x00 30. " IRQS510 ,IRQS Status Bit 510" "Low,High" bitfld.long 0x00 29. " IRQS509 ,IRQS Status Bit 509" "Low,High" textline " " bitfld.long 0x00 28. " IRQS508 ,IRQS Status Bit 508" "Low,High" bitfld.long 0x00 27. " IRQS507 ,IRQS Status Bit 507" "Low,High" bitfld.long 0x00 26. " IRQS506 ,IRQS Status Bit 506" "Low,High" textline " " bitfld.long 0x00 25. " IRQS505 ,IRQS Status Bit 505" "Low,High" bitfld.long 0x00 24. " IRQS504 ,IRQS Status Bit 504" "Low,High" bitfld.long 0x00 23. " IRQS503 ,IRQS Status Bit 503" "Low,High" textline " " bitfld.long 0x00 22. " IRQS502 ,IRQS Status Bit 502" "Low,High" bitfld.long 0x00 21. " IRQS501 ,IRQS Status Bit 501" "Low,High" bitfld.long 0x00 20. " IRQS500 ,IRQS Status Bit 500" "Low,High" textline " " bitfld.long 0x00 19. " IRQS499 ,IRQS Status Bit 499" "Low,High" bitfld.long 0x00 18. " IRQS498 ,IRQS Status Bit 498" "Low,High" bitfld.long 0x00 17. " IRQS497 ,IRQS Status Bit 497" "Low,High" textline " " bitfld.long 0x00 16. " IRQS496 ,IRQS Status Bit 496" "Low,High" bitfld.long 0x00 15. " IRQS495 ,IRQS Status Bit 495" "Low,High" bitfld.long 0x00 14. " IRQS494 ,IRQS Status Bit 494" "Low,High" textline " " bitfld.long 0x00 13. " IRQS493 ,IRQS Status Bit 493" "Low,High" bitfld.long 0x00 12. " IRQS492 ,IRQS Status Bit 492" "Low,High" bitfld.long 0x00 11. " IRQS491 ,IRQS Status Bit 491" "Low,High" textline " " bitfld.long 0x00 10. " IRQS490 ,IRQS Status Bit 490" "Low,High" bitfld.long 0x00 9. " IRQS489 ,IRQS Status Bit 489" "Low,High" bitfld.long 0x00 8. " IRQS488 ,IRQS Status Bit 488" "Low,High" textline " " bitfld.long 0x00 7. " IRQS487 ,IRQS Status Bit 487" "Low,High" bitfld.long 0x00 6. " IRQS486 ,IRQS Status Bit 486" "Low,High" bitfld.long 0x00 5. " IRQS485 ,IRQS Status Bit 485" "Low,High" textline " " bitfld.long 0x00 4. " IRQS484 ,IRQS Status Bit 484" "Low,High" bitfld.long 0x00 3. " IRQS483 ,IRQS Status Bit 483" "Low,High" bitfld.long 0x00 2. " IRQS482 ,IRQS Status Bit 482" "Low,High" textline " " bitfld.long 0x00 1. " IRQS481 ,IRQS Status Bit 481" "Low,High" bitfld.long 0x00 0. " IRQS480 ,IRQS Status Bit 480" "Low,High" else rgroup.long 0x0D40++0x03 line.long 0x0 "GICD_SPISR15,Shared Peripheral Interrupt Status Register 15" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x11) rgroup.long 0x0D44++0x03 line.long 0x0 "GICD_SPISR16,Shared Peripheral Interrupt Status Register 16" bitfld.long 0x00 31. " IRQS543 ,IRQS Status Bit 543" "Low,High" bitfld.long 0x00 30. " IRQS542 ,IRQS Status Bit 542" "Low,High" bitfld.long 0x00 29. " IRQS541 ,IRQS Status Bit 541" "Low,High" textline " " bitfld.long 0x00 28. " IRQS540 ,IRQS Status Bit 540" "Low,High" bitfld.long 0x00 27. " IRQS539 ,IRQS Status Bit 539" "Low,High" bitfld.long 0x00 26. " IRQS538 ,IRQS Status Bit 538" "Low,High" textline " " bitfld.long 0x00 25. " IRQS537 ,IRQS Status Bit 537" "Low,High" bitfld.long 0x00 24. " IRQS536 ,IRQS Status Bit 536" "Low,High" bitfld.long 0x00 23. " IRQS535 ,IRQS Status Bit 535" "Low,High" textline " " bitfld.long 0x00 22. " IRQS534 ,IRQS Status Bit 534" "Low,High" bitfld.long 0x00 21. " IRQS533 ,IRQS Status Bit 533" "Low,High" bitfld.long 0x00 20. " IRQS532 ,IRQS Status Bit 532" "Low,High" textline " " bitfld.long 0x00 19. " IRQS531 ,IRQS Status Bit 531" "Low,High" bitfld.long 0x00 18. " IRQS530 ,IRQS Status Bit 530" "Low,High" bitfld.long 0x00 17. " IRQS529 ,IRQS Status Bit 529" "Low,High" textline " " bitfld.long 0x00 16. " IRQS528 ,IRQS Status Bit 528" "Low,High" bitfld.long 0x00 15. " IRQS527 ,IRQS Status Bit 527" "Low,High" bitfld.long 0x00 14. " IRQS526 ,IRQS Status Bit 526" "Low,High" textline " " bitfld.long 0x00 13. " IRQS525 ,IRQS Status Bit 525" "Low,High" bitfld.long 0x00 12. " IRQS524 ,IRQS Status Bit 524" "Low,High" bitfld.long 0x00 11. " IRQS523 ,IRQS Status Bit 523" "Low,High" textline " " bitfld.long 0x00 10. " IRQS522 ,IRQS Status Bit 522" "Low,High" bitfld.long 0x00 9. " IRQS521 ,IRQS Status Bit 521" "Low,High" bitfld.long 0x00 8. " IRQS520 ,IRQS Status Bit 520" "Low,High" textline " " bitfld.long 0x00 7. " IRQS519 ,IRQS Status Bit 519" "Low,High" bitfld.long 0x00 6. " IRQS518 ,IRQS Status Bit 518" "Low,High" bitfld.long 0x00 5. " IRQS517 ,IRQS Status Bit 517" "Low,High" textline " " bitfld.long 0x00 4. " IRQS516 ,IRQS Status Bit 516" "Low,High" bitfld.long 0x00 3. " IRQS515 ,IRQS Status Bit 515" "Low,High" bitfld.long 0x00 2. " IRQS514 ,IRQS Status Bit 514" "Low,High" textline " " bitfld.long 0x00 1. " IRQS513 ,IRQS Status Bit 513" "Low,High" bitfld.long 0x00 0. " IRQS512 ,IRQS Status Bit 512" "Low,High" else rgroup.long 0x0D44++0x03 line.long 0x0 "GICD_SPISR16,Shared Peripheral Interrupt Status Register 16" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x12) rgroup.long 0x0D48++0x03 line.long 0x0 "GICD_SPISR17,Shared Peripheral Interrupt Status Register 17" bitfld.long 0x00 31. " IRQS575 ,IRQS Status Bit 575" "Low,High" bitfld.long 0x00 30. " IRQS574 ,IRQS Status Bit 574" "Low,High" bitfld.long 0x00 29. " IRQS573 ,IRQS Status Bit 573" "Low,High" textline " " bitfld.long 0x00 28. " IRQS572 ,IRQS Status Bit 572" "Low,High" bitfld.long 0x00 27. " IRQS571 ,IRQS Status Bit 571" "Low,High" bitfld.long 0x00 26. " IRQS570 ,IRQS Status Bit 570" "Low,High" textline " " bitfld.long 0x00 25. " IRQS569 ,IRQS Status Bit 569" "Low,High" bitfld.long 0x00 24. " IRQS568 ,IRQS Status Bit 568" "Low,High" bitfld.long 0x00 23. " IRQS567 ,IRQS Status Bit 567" "Low,High" textline " " bitfld.long 0x00 22. " IRQS566 ,IRQS Status Bit 566" "Low,High" bitfld.long 0x00 21. " IRQS565 ,IRQS Status Bit 565" "Low,High" bitfld.long 0x00 20. " IRQS564 ,IRQS Status Bit 564" "Low,High" textline " " bitfld.long 0x00 19. " IRQS563 ,IRQS Status Bit 563" "Low,High" bitfld.long 0x00 18. " IRQS562 ,IRQS Status Bit 562" "Low,High" bitfld.long 0x00 17. " IRQS561 ,IRQS Status Bit 561" "Low,High" textline " " bitfld.long 0x00 16. " IRQS560 ,IRQS Status Bit 560" "Low,High" bitfld.long 0x00 15. " IRQS559 ,IRQS Status Bit 559" "Low,High" bitfld.long 0x00 14. " IRQS558 ,IRQS Status Bit 558" "Low,High" textline " " bitfld.long 0x00 13. " IRQS557 ,IRQS Status Bit 557" "Low,High" bitfld.long 0x00 12. " IRQS556 ,IRQS Status Bit 556" "Low,High" bitfld.long 0x00 11. " IRQS555 ,IRQS Status Bit 555" "Low,High" textline " " bitfld.long 0x00 10. " IRQS554 ,IRQS Status Bit 554" "Low,High" bitfld.long 0x00 9. " IRQS553 ,IRQS Status Bit 553" "Low,High" bitfld.long 0x00 8. " IRQS552 ,IRQS Status Bit 552" "Low,High" textline " " bitfld.long 0x00 7. " IRQS551 ,IRQS Status Bit 551" "Low,High" bitfld.long 0x00 6. " IRQS550 ,IRQS Status Bit 550" "Low,High" bitfld.long 0x00 5. " IRQS549 ,IRQS Status Bit 549" "Low,High" textline " " bitfld.long 0x00 4. " IRQS548 ,IRQS Status Bit 548" "Low,High" bitfld.long 0x00 3. " IRQS547 ,IRQS Status Bit 547" "Low,High" bitfld.long 0x00 2. " IRQS546 ,IRQS Status Bit 546" "Low,High" textline " " bitfld.long 0x00 1. " IRQS545 ,IRQS Status Bit 545" "Low,High" bitfld.long 0x00 0. " IRQS544 ,IRQS Status Bit 544" "Low,High" else rgroup.long 0x0D48++0x03 line.long 0x0 "GICD_SPISR17,Shared Peripheral Interrupt Status Register 17" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x13) rgroup.long 0x0D4C++0x03 line.long 0x0 "GICD_SPISR18,Shared Peripheral Interrupt Status Register 18" bitfld.long 0x00 31. " IRQS607 ,IRQS Status Bit 607" "Low,High" bitfld.long 0x00 30. " IRQS606 ,IRQS Status Bit 606" "Low,High" bitfld.long 0x00 29. " IRQS605 ,IRQS Status Bit 605" "Low,High" textline " " bitfld.long 0x00 28. " IRQS604 ,IRQS Status Bit 604" "Low,High" bitfld.long 0x00 27. " IRQS603 ,IRQS Status Bit 603" "Low,High" bitfld.long 0x00 26. " IRQS602 ,IRQS Status Bit 602" "Low,High" textline " " bitfld.long 0x00 25. " IRQS601 ,IRQS Status Bit 601" "Low,High" bitfld.long 0x00 24. " IRQS600 ,IRQS Status Bit 600" "Low,High" bitfld.long 0x00 23. " IRQS599 ,IRQS Status Bit 599" "Low,High" textline " " bitfld.long 0x00 22. " IRQS598 ,IRQS Status Bit 598" "Low,High" bitfld.long 0x00 21. " IRQS597 ,IRQS Status Bit 597" "Low,High" bitfld.long 0x00 20. " IRQS596 ,IRQS Status Bit 596" "Low,High" textline " " bitfld.long 0x00 19. " IRQS595 ,IRQS Status Bit 595" "Low,High" bitfld.long 0x00 18. " IRQS594 ,IRQS Status Bit 594" "Low,High" bitfld.long 0x00 17. " IRQS593 ,IRQS Status Bit 593" "Low,High" textline " " bitfld.long 0x00 16. " IRQS592 ,IRQS Status Bit 592" "Low,High" bitfld.long 0x00 15. " IRQS591 ,IRQS Status Bit 591" "Low,High" bitfld.long 0x00 14. " IRQS590 ,IRQS Status Bit 590" "Low,High" textline " " bitfld.long 0x00 13. " IRQS589 ,IRQS Status Bit 589" "Low,High" bitfld.long 0x00 12. " IRQS588 ,IRQS Status Bit 588" "Low,High" bitfld.long 0x00 11. " IRQS587 ,IRQS Status Bit 587" "Low,High" textline " " bitfld.long 0x00 10. " IRQS586 ,IRQS Status Bit 586" "Low,High" bitfld.long 0x00 9. " IRQS585 ,IRQS Status Bit 585" "Low,High" bitfld.long 0x00 8. " IRQS584 ,IRQS Status Bit 584" "Low,High" textline " " bitfld.long 0x00 7. " IRQS583 ,IRQS Status Bit 583" "Low,High" bitfld.long 0x00 6. " IRQS582 ,IRQS Status Bit 582" "Low,High" bitfld.long 0x00 5. " IRQS581 ,IRQS Status Bit 581" "Low,High" textline " " bitfld.long 0x00 4. " IRQS580 ,IRQS Status Bit 580" "Low,High" bitfld.long 0x00 3. " IRQS579 ,IRQS Status Bit 579" "Low,High" bitfld.long 0x00 2. " IRQS578 ,IRQS Status Bit 578" "Low,High" textline " " bitfld.long 0x00 1. " IRQS577 ,IRQS Status Bit 577" "Low,High" bitfld.long 0x00 0. " IRQS576 ,IRQS Status Bit 576" "Low,High" else rgroup.long 0x0D4C++0x03 line.long 0x0 "GICD_SPISR18,Shared Peripheral Interrupt Status Register 18" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x14) rgroup.long 0x0D50++0x03 line.long 0x0 "GICD_SPISR19,Shared Peripheral Interrupt Status Register 19" bitfld.long 0x00 31. " IRQS639 ,IRQS Status Bit 639" "Low,High" bitfld.long 0x00 30. " IRQS638 ,IRQS Status Bit 638" "Low,High" bitfld.long 0x00 29. " IRQS637 ,IRQS Status Bit 637" "Low,High" textline " " bitfld.long 0x00 28. " IRQS636 ,IRQS Status Bit 636" "Low,High" bitfld.long 0x00 27. " IRQS635 ,IRQS Status Bit 635" "Low,High" bitfld.long 0x00 26. " IRQS634 ,IRQS Status Bit 634" "Low,High" textline " " bitfld.long 0x00 25. " IRQS633 ,IRQS Status Bit 633" "Low,High" bitfld.long 0x00 24. " IRQS632 ,IRQS Status Bit 632" "Low,High" bitfld.long 0x00 23. " IRQS631 ,IRQS Status Bit 631" "Low,High" textline " " bitfld.long 0x00 22. " IRQS630 ,IRQS Status Bit 630" "Low,High" bitfld.long 0x00 21. " IRQS629 ,IRQS Status Bit 629" "Low,High" bitfld.long 0x00 20. " IRQS628 ,IRQS Status Bit 628" "Low,High" textline " " bitfld.long 0x00 19. " IRQS627 ,IRQS Status Bit 627" "Low,High" bitfld.long 0x00 18. " IRQS626 ,IRQS Status Bit 626" "Low,High" bitfld.long 0x00 17. " IRQS625 ,IRQS Status Bit 625" "Low,High" textline " " bitfld.long 0x00 16. " IRQS624 ,IRQS Status Bit 624" "Low,High" bitfld.long 0x00 15. " IRQS623 ,IRQS Status Bit 623" "Low,High" bitfld.long 0x00 14. " IRQS622 ,IRQS Status Bit 622" "Low,High" textline " " bitfld.long 0x00 13. " IRQS621 ,IRQS Status Bit 621" "Low,High" bitfld.long 0x00 12. " IRQS620 ,IRQS Status Bit 620" "Low,High" bitfld.long 0x00 11. " IRQS619 ,IRQS Status Bit 619" "Low,High" textline " " bitfld.long 0x00 10. " IRQS618 ,IRQS Status Bit 618" "Low,High" bitfld.long 0x00 9. " IRQS617 ,IRQS Status Bit 617" "Low,High" bitfld.long 0x00 8. " IRQS616 ,IRQS Status Bit 616" "Low,High" textline " " bitfld.long 0x00 7. " IRQS615 ,IRQS Status Bit 615" "Low,High" bitfld.long 0x00 6. " IRQS614 ,IRQS Status Bit 614" "Low,High" bitfld.long 0x00 5. " IRQS613 ,IRQS Status Bit 613" "Low,High" textline " " bitfld.long 0x00 4. " IRQS612 ,IRQS Status Bit 612" "Low,High" bitfld.long 0x00 3. " IRQS611 ,IRQS Status Bit 611" "Low,High" bitfld.long 0x00 2. " IRQS610 ,IRQS Status Bit 610" "Low,High" textline " " bitfld.long 0x00 1. " IRQS609 ,IRQS Status Bit 609" "Low,High" bitfld.long 0x00 0. " IRQS608 ,IRQS Status Bit 608" "Low,High" else rgroup.long 0x0D50++0x03 line.long 0x0 "GICD_SPISR19,Shared Peripheral Interrupt Status Register 19" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x15) rgroup.long 0x0D54++0x03 line.long 0x0 "GICD_SPISR20,Shared Peripheral Interrupt Status Register 20" bitfld.long 0x00 31. " IRQS671 ,IRQS Status Bit 671" "Low,High" bitfld.long 0x00 30. " IRQS670 ,IRQS Status Bit 670" "Low,High" bitfld.long 0x00 29. " IRQS669 ,IRQS Status Bit 669" "Low,High" textline " " bitfld.long 0x00 28. " IRQS668 ,IRQS Status Bit 668" "Low,High" bitfld.long 0x00 27. " IRQS667 ,IRQS Status Bit 667" "Low,High" bitfld.long 0x00 26. " IRQS666 ,IRQS Status Bit 666" "Low,High" textline " " bitfld.long 0x00 25. " IRQS665 ,IRQS Status Bit 665" "Low,High" bitfld.long 0x00 24. " IRQS664 ,IRQS Status Bit 664" "Low,High" bitfld.long 0x00 23. " IRQS663 ,IRQS Status Bit 663" "Low,High" textline " " bitfld.long 0x00 22. " IRQS662 ,IRQS Status Bit 662" "Low,High" bitfld.long 0x00 21. " IRQS661 ,IRQS Status Bit 661" "Low,High" bitfld.long 0x00 20. " IRQS660 ,IRQS Status Bit 660" "Low,High" textline " " bitfld.long 0x00 19. " IRQS659 ,IRQS Status Bit 659" "Low,High" bitfld.long 0x00 18. " IRQS658 ,IRQS Status Bit 658" "Low,High" bitfld.long 0x00 17. " IRQS657 ,IRQS Status Bit 657" "Low,High" textline " " bitfld.long 0x00 16. " IRQS656 ,IRQS Status Bit 656" "Low,High" bitfld.long 0x00 15. " IRQS655 ,IRQS Status Bit 655" "Low,High" bitfld.long 0x00 14. " IRQS654 ,IRQS Status Bit 654" "Low,High" textline " " bitfld.long 0x00 13. " IRQS653 ,IRQS Status Bit 653" "Low,High" bitfld.long 0x00 12. " IRQS652 ,IRQS Status Bit 652" "Low,High" bitfld.long 0x00 11. " IRQS651 ,IRQS Status Bit 651" "Low,High" textline " " bitfld.long 0x00 10. " IRQS650 ,IRQS Status Bit 650" "Low,High" bitfld.long 0x00 9. " IRQS649 ,IRQS Status Bit 649" "Low,High" bitfld.long 0x00 8. " IRQS648 ,IRQS Status Bit 648" "Low,High" textline " " bitfld.long 0x00 7. " IRQS647 ,IRQS Status Bit 647" "Low,High" bitfld.long 0x00 6. " IRQS646 ,IRQS Status Bit 646" "Low,High" bitfld.long 0x00 5. " IRQS645 ,IRQS Status Bit 645" "Low,High" textline " " bitfld.long 0x00 4. " IRQS644 ,IRQS Status Bit 644" "Low,High" bitfld.long 0x00 3. " IRQS643 ,IRQS Status Bit 643" "Low,High" bitfld.long 0x00 2. " IRQS642 ,IRQS Status Bit 642" "Low,High" textline " " bitfld.long 0x00 1. " IRQS641 ,IRQS Status Bit 641" "Low,High" bitfld.long 0x00 0. " IRQS640 ,IRQS Status Bit 640" "Low,High" else rgroup.long 0x0D54++0x03 line.long 0x0 "GICD_SPISR20,Shared Peripheral Interrupt Status Register 20" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x16) rgroup.long 0x0D58++0x03 line.long 0x0 "GICD_SPISR21,Shared Peripheral Interrupt Status Register 21" bitfld.long 0x00 31. " IRQS703 ,IRQS Status Bit 703" "Low,High" bitfld.long 0x00 30. " IRQS702 ,IRQS Status Bit 702" "Low,High" bitfld.long 0x00 29. " IRQS701 ,IRQS Status Bit 701" "Low,High" textline " " bitfld.long 0x00 28. " IRQS700 ,IRQS Status Bit 700" "Low,High" bitfld.long 0x00 27. " IRQS699 ,IRQS Status Bit 699" "Low,High" bitfld.long 0x00 26. " IRQS698 ,IRQS Status Bit 698" "Low,High" textline " " bitfld.long 0x00 25. " IRQS697 ,IRQS Status Bit 697" "Low,High" bitfld.long 0x00 24. " IRQS696 ,IRQS Status Bit 696" "Low,High" bitfld.long 0x00 23. " IRQS695 ,IRQS Status Bit 695" "Low,High" textline " " bitfld.long 0x00 22. " IRQS694 ,IRQS Status Bit 694" "Low,High" bitfld.long 0x00 21. " IRQS693 ,IRQS Status Bit 693" "Low,High" bitfld.long 0x00 20. " IRQS692 ,IRQS Status Bit 692" "Low,High" textline " " bitfld.long 0x00 19. " IRQS691 ,IRQS Status Bit 691" "Low,High" bitfld.long 0x00 18. " IRQS690 ,IRQS Status Bit 690" "Low,High" bitfld.long 0x00 17. " IRQS689 ,IRQS Status Bit 689" "Low,High" textline " " bitfld.long 0x00 16. " IRQS688 ,IRQS Status Bit 688" "Low,High" bitfld.long 0x00 15. " IRQS687 ,IRQS Status Bit 687" "Low,High" bitfld.long 0x00 14. " IRQS686 ,IRQS Status Bit 686" "Low,High" textline " " bitfld.long 0x00 13. " IRQS685 ,IRQS Status Bit 685" "Low,High" bitfld.long 0x00 12. " IRQS684 ,IRQS Status Bit 684" "Low,High" bitfld.long 0x00 11. " IRQS683 ,IRQS Status Bit 683" "Low,High" textline " " bitfld.long 0x00 10. " IRQS682 ,IRQS Status Bit 682" "Low,High" bitfld.long 0x00 9. " IRQS681 ,IRQS Status Bit 681" "Low,High" bitfld.long 0x00 8. " IRQS680 ,IRQS Status Bit 680" "Low,High" textline " " bitfld.long 0x00 7. " IRQS679 ,IRQS Status Bit 679" "Low,High" bitfld.long 0x00 6. " IRQS678 ,IRQS Status Bit 678" "Low,High" bitfld.long 0x00 5. " IRQS677 ,IRQS Status Bit 677" "Low,High" textline " " bitfld.long 0x00 4. " IRQS676 ,IRQS Status Bit 676" "Low,High" bitfld.long 0x00 3. " IRQS675 ,IRQS Status Bit 675" "Low,High" bitfld.long 0x00 2. " IRQS674 ,IRQS Status Bit 674" "Low,High" textline " " bitfld.long 0x00 1. " IRQS673 ,IRQS Status Bit 673" "Low,High" bitfld.long 0x00 0. " IRQS672 ,IRQS Status Bit 672" "Low,High" else rgroup.long 0x0D58++0x03 line.long 0x0 "GICD_SPISR21,Shared Peripheral Interrupt Status Register 21" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x17) rgroup.long 0x0D5C++0x03 line.long 0x0 "GICD_SPISR22,Shared Peripheral Interrupt Status Register 22" bitfld.long 0x00 31. " IRQS735 ,IRQS Status Bit 735" "Low,High" bitfld.long 0x00 30. " IRQS734 ,IRQS Status Bit 734" "Low,High" bitfld.long 0x00 29. " IRQS733 ,IRQS Status Bit 733" "Low,High" textline " " bitfld.long 0x00 28. " IRQS732 ,IRQS Status Bit 732" "Low,High" bitfld.long 0x00 27. " IRQS731 ,IRQS Status Bit 731" "Low,High" bitfld.long 0x00 26. " IRQS730 ,IRQS Status Bit 730" "Low,High" textline " " bitfld.long 0x00 25. " IRQS729 ,IRQS Status Bit 729" "Low,High" bitfld.long 0x00 24. " IRQS728 ,IRQS Status Bit 728" "Low,High" bitfld.long 0x00 23. " IRQS727 ,IRQS Status Bit 727" "Low,High" textline " " bitfld.long 0x00 22. " IRQS726 ,IRQS Status Bit 726" "Low,High" bitfld.long 0x00 21. " IRQS725 ,IRQS Status Bit 725" "Low,High" bitfld.long 0x00 20. " IRQS724 ,IRQS Status Bit 724" "Low,High" textline " " bitfld.long 0x00 19. " IRQS723 ,IRQS Status Bit 723" "Low,High" bitfld.long 0x00 18. " IRQS722 ,IRQS Status Bit 722" "Low,High" bitfld.long 0x00 17. " IRQS721 ,IRQS Status Bit 721" "Low,High" textline " " bitfld.long 0x00 16. " IRQS720 ,IRQS Status Bit 720" "Low,High" bitfld.long 0x00 15. " IRQS719 ,IRQS Status Bit 719" "Low,High" bitfld.long 0x00 14. " IRQS718 ,IRQS Status Bit 718" "Low,High" textline " " bitfld.long 0x00 13. " IRQS717 ,IRQS Status Bit 717" "Low,High" bitfld.long 0x00 12. " IRQS716 ,IRQS Status Bit 716" "Low,High" bitfld.long 0x00 11. " IRQS715 ,IRQS Status Bit 715" "Low,High" textline " " bitfld.long 0x00 10. " IRQS714 ,IRQS Status Bit 714" "Low,High" bitfld.long 0x00 9. " IRQS713 ,IRQS Status Bit 713" "Low,High" bitfld.long 0x00 8. " IRQS712 ,IRQS Status Bit 712" "Low,High" textline " " bitfld.long 0x00 7. " IRQS711 ,IRQS Status Bit 711" "Low,High" bitfld.long 0x00 6. " IRQS710 ,IRQS Status Bit 710" "Low,High" bitfld.long 0x00 5. " IRQS709 ,IRQS Status Bit 709" "Low,High" textline " " bitfld.long 0x00 4. " IRQS708 ,IRQS Status Bit 708" "Low,High" bitfld.long 0x00 3. " IRQS707 ,IRQS Status Bit 707" "Low,High" bitfld.long 0x00 2. " IRQS706 ,IRQS Status Bit 706" "Low,High" textline " " bitfld.long 0x00 1. " IRQS705 ,IRQS Status Bit 705" "Low,High" bitfld.long 0x00 0. " IRQS704 ,IRQS Status Bit 704" "Low,High" else rgroup.long 0x0D5C++0x03 line.long 0x0 "GICD_SPISR22,Shared Peripheral Interrupt Status Register 22" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x18) rgroup.long 0x060++0x03 line.long 0x0 "GICD_SPISR23,Shared Peripheral Interrupt Status Register 23" bitfld.long 0x00 31. " IRQS767 ,IRQS Status Bit 767" "Low,High" bitfld.long 0x00 30. " IRQS766 ,IRQS Status Bit 766" "Low,High" bitfld.long 0x00 29. " IRQS765 ,IRQS Status Bit 765" "Low,High" textline " " bitfld.long 0x00 28. " IRQS764 ,IRQS Status Bit 764" "Low,High" bitfld.long 0x00 27. " IRQS763 ,IRQS Status Bit 763" "Low,High" bitfld.long 0x00 26. " IRQS762 ,IRQS Status Bit 762" "Low,High" textline " " bitfld.long 0x00 25. " IRQS761 ,IRQS Status Bit 761" "Low,High" bitfld.long 0x00 24. " IRQS760 ,IRQS Status Bit 760" "Low,High" bitfld.long 0x00 23. " IRQS759 ,IRQS Status Bit 759" "Low,High" textline " " bitfld.long 0x00 22. " IRQS758 ,IRQS Status Bit 758" "Low,High" bitfld.long 0x00 21. " IRQS757 ,IRQS Status Bit 757" "Low,High" bitfld.long 0x00 20. " IRQS756 ,IRQS Status Bit 756" "Low,High" textline " " bitfld.long 0x00 19. " IRQS755 ,IRQS Status Bit 755" "Low,High" bitfld.long 0x00 18. " IRQS754 ,IRQS Status Bit 754" "Low,High" bitfld.long 0x00 17. " IRQS753 ,IRQS Status Bit 753" "Low,High" textline " " bitfld.long 0x00 16. " IRQS752 ,IRQS Status Bit 752" "Low,High" bitfld.long 0x00 15. " IRQS751 ,IRQS Status Bit 751" "Low,High" bitfld.long 0x00 14. " IRQS750 ,IRQS Status Bit 750" "Low,High" textline " " bitfld.long 0x00 13. " IRQS749 ,IRQS Status Bit 749" "Low,High" bitfld.long 0x00 12. " IRQS748 ,IRQS Status Bit 748" "Low,High" bitfld.long 0x00 11. " IRQS747 ,IRQS Status Bit 747" "Low,High" textline " " bitfld.long 0x00 10. " IRQS746 ,IRQS Status Bit 746" "Low,High" bitfld.long 0x00 9. " IRQS745 ,IRQS Status Bit 745" "Low,High" bitfld.long 0x00 8. " IRQS744 ,IRQS Status Bit 744" "Low,High" textline " " bitfld.long 0x00 7. " IRQS743 ,IRQS Status Bit 743" "Low,High" bitfld.long 0x00 6. " IRQS742 ,IRQS Status Bit 742" "Low,High" bitfld.long 0x00 5. " IRQS741 ,IRQS Status Bit 741" "Low,High" textline " " bitfld.long 0x00 4. " IRQS740 ,IRQS Status Bit 740" "Low,High" bitfld.long 0x00 3. " IRQS739 ,IRQS Status Bit 739" "Low,High" bitfld.long 0x00 2. " IRQS738 ,IRQS Status Bit 738" "Low,High" textline " " bitfld.long 0x00 1. " IRQS737 ,IRQS Status Bit 737" "Low,High" bitfld.long 0x00 0. " IRQS736 ,IRQS Status Bit 736" "Low,High" else rgroup.long 0x0D60++0x03 line.long 0x0 "GICD_SPISR23,Shared Peripheral Interrupt Status Register 23" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x19) rgroup.long 0x0D64++0x03 line.long 0x0 "GICD_SPISR24,Shared Peripheral Interrupt Status Register 24" bitfld.long 0x00 31. " IRQS799 ,IRQS Status Bit 799" "Low,High" bitfld.long 0x00 30. " IRQS798 ,IRQS Status Bit 798" "Low,High" bitfld.long 0x00 29. " IRQS797 ,IRQS Status Bit 797" "Low,High" textline " " bitfld.long 0x00 28. " IRQS796 ,IRQS Status Bit 796" "Low,High" bitfld.long 0x00 27. " IRQS795 ,IRQS Status Bit 795" "Low,High" bitfld.long 0x00 26. " IRQS794 ,IRQS Status Bit 794" "Low,High" textline " " bitfld.long 0x00 25. " IRQS793 ,IRQS Status Bit 793" "Low,High" bitfld.long 0x00 24. " IRQS792 ,IRQS Status Bit 792" "Low,High" bitfld.long 0x00 23. " IRQS791 ,IRQS Status Bit 791" "Low,High" textline " " bitfld.long 0x00 22. " IRQS790 ,IRQS Status Bit 790" "Low,High" bitfld.long 0x00 21. " IRQS789 ,IRQS Status Bit 789" "Low,High" bitfld.long 0x00 20. " IRQS788 ,IRQS Status Bit 788" "Low,High" textline " " bitfld.long 0x00 19. " IRQS787 ,IRQS Status Bit 787" "Low,High" bitfld.long 0x00 18. " IRQS786 ,IRQS Status Bit 786" "Low,High" bitfld.long 0x00 17. " IRQS785 ,IRQS Status Bit 785" "Low,High" textline " " bitfld.long 0x00 16. " IRQS784 ,IRQS Status Bit 784" "Low,High" bitfld.long 0x00 15. " IRQS783 ,IRQS Status Bit 783" "Low,High" bitfld.long 0x00 14. " IRQS782 ,IRQS Status Bit 782" "Low,High" textline " " bitfld.long 0x00 13. " IRQS781 ,IRQS Status Bit 781" "Low,High" bitfld.long 0x00 12. " IRQS780 ,IRQS Status Bit 780" "Low,High" bitfld.long 0x00 11. " IRQS779 ,IRQS Status Bit 779" "Low,High" textline " " bitfld.long 0x00 10. " IRQS778 ,IRQS Status Bit 778" "Low,High" bitfld.long 0x00 9. " IRQS777 ,IRQS Status Bit 777" "Low,High" bitfld.long 0x00 8. " IRQS776 ,IRQS Status Bit 776" "Low,High" textline " " bitfld.long 0x00 7. " IRQS775 ,IRQS Status Bit 775" "Low,High" bitfld.long 0x00 6. " IRQS774 ,IRQS Status Bit 774" "Low,High" bitfld.long 0x00 5. " IRQS773 ,IRQS Status Bit 773" "Low,High" textline " " bitfld.long 0x00 4. " IRQS772 ,IRQS Status Bit 772" "Low,High" bitfld.long 0x00 3. " IRQS771 ,IRQS Status Bit 771" "Low,High" bitfld.long 0x00 2. " IRQS770 ,IRQS Status Bit 770" "Low,High" textline " " bitfld.long 0x00 1. " IRQS769 ,IRQS Status Bit 769" "Low,High" bitfld.long 0x00 0. " IRQS768 ,IRQS Status Bit 768" "Low,High" else rgroup.long 0x0D64++0x03 line.long 0x0 "GICD_SPISR24,Shared Peripheral Interrupt Status Register 24" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x1A) rgroup.long 0x0D68++0x03 line.long 0x0 "GICD_SPISR25,Shared Peripheral Interrupt Status Register 25" bitfld.long 0x00 31. " IRQS831 ,IRQS Status Bit 831" "Low,High" bitfld.long 0x00 30. " IRQS830 ,IRQS Status Bit 830" "Low,High" bitfld.long 0x00 29. " IRQS829 ,IRQS Status Bit 829" "Low,High" textline " " bitfld.long 0x00 28. " IRQS828 ,IRQS Status Bit 828" "Low,High" bitfld.long 0x00 27. " IRQS827 ,IRQS Status Bit 827" "Low,High" bitfld.long 0x00 26. " IRQS826 ,IRQS Status Bit 826" "Low,High" textline " " bitfld.long 0x00 25. " IRQS825 ,IRQS Status Bit 825" "Low,High" bitfld.long 0x00 24. " IRQS824 ,IRQS Status Bit 824" "Low,High" bitfld.long 0x00 23. " IRQS823 ,IRQS Status Bit 823" "Low,High" textline " " bitfld.long 0x00 22. " IRQS822 ,IRQS Status Bit 822" "Low,High" bitfld.long 0x00 21. " IRQS821 ,IRQS Status Bit 821" "Low,High" bitfld.long 0x00 20. " IRQS820 ,IRQS Status Bit 820" "Low,High" textline " " bitfld.long 0x00 19. " IRQS819 ,IRQS Status Bit 819" "Low,High" bitfld.long 0x00 18. " IRQS818 ,IRQS Status Bit 818" "Low,High" bitfld.long 0x00 17. " IRQS817 ,IRQS Status Bit 817" "Low,High" textline " " bitfld.long 0x00 16. " IRQS816 ,IRQS Status Bit 816" "Low,High" bitfld.long 0x00 15. " IRQS815 ,IRQS Status Bit 815" "Low,High" bitfld.long 0x00 14. " IRQS814 ,IRQS Status Bit 814" "Low,High" textline " " bitfld.long 0x00 13. " IRQS813 ,IRQS Status Bit 813" "Low,High" bitfld.long 0x00 12. " IRQS812 ,IRQS Status Bit 812" "Low,High" bitfld.long 0x00 11. " IRQS811 ,IRQS Status Bit 811" "Low,High" textline " " bitfld.long 0x00 10. " IRQS810 ,IRQS Status Bit 810" "Low,High" bitfld.long 0x00 9. " IRQS809 ,IRQS Status Bit 809" "Low,High" bitfld.long 0x00 8. " IRQS808 ,IRQS Status Bit 808" "Low,High" textline " " bitfld.long 0x00 7. " IRQS807 ,IRQS Status Bit 807" "Low,High" bitfld.long 0x00 6. " IRQS806 ,IRQS Status Bit 806" "Low,High" bitfld.long 0x00 5. " IRQS805 ,IRQS Status Bit 805" "Low,High" textline " " bitfld.long 0x00 4. " IRQS804 ,IRQS Status Bit 804" "Low,High" bitfld.long 0x00 3. " IRQS803 ,IRQS Status Bit 803" "Low,High" bitfld.long 0x00 2. " IRQS802 ,IRQS Status Bit 802" "Low,High" textline " " bitfld.long 0x00 1. " IRQS801 ,IRQS Status Bit 801" "Low,High" bitfld.long 0x00 0. " IRQS800 ,IRQS Status Bit 800" "Low,High" else rgroup.long 0x0D68++0x03 line.long 0x0 "GICD_SPISR25,Shared Peripheral Interrupt Status Register 25" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x1B) rgroup.long 0x0D6C++0x03 line.long 0x0 "GICD_SPISR26,Shared Peripheral Interrupt Status Register 26" bitfld.long 0x00 31. " IRQS863 ,IRQS Status Bit 863" "Low,High" bitfld.long 0x00 30. " IRQS862 ,IRQS Status Bit 862" "Low,High" bitfld.long 0x00 29. " IRQS861 ,IRQS Status Bit 861" "Low,High" textline " " bitfld.long 0x00 28. " IRQS860 ,IRQS Status Bit 860" "Low,High" bitfld.long 0x00 27. " IRQS859 ,IRQS Status Bit 859" "Low,High" bitfld.long 0x00 26. " IRQS858 ,IRQS Status Bit 858" "Low,High" textline " " bitfld.long 0x00 25. " IRQS857 ,IRQS Status Bit 857" "Low,High" bitfld.long 0x00 24. " IRQS856 ,IRQS Status Bit 856" "Low,High" bitfld.long 0x00 23. " IRQS855 ,IRQS Status Bit 855" "Low,High" textline " " bitfld.long 0x00 22. " IRQS854 ,IRQS Status Bit 854" "Low,High" bitfld.long 0x00 21. " IRQS853 ,IRQS Status Bit 853" "Low,High" bitfld.long 0x00 20. " IRQS852 ,IRQS Status Bit 852" "Low,High" textline " " bitfld.long 0x00 19. " IRQS851 ,IRQS Status Bit 851" "Low,High" bitfld.long 0x00 18. " IRQS850 ,IRQS Status Bit 850" "Low,High" bitfld.long 0x00 17. " IRQS849 ,IRQS Status Bit 849" "Low,High" textline " " bitfld.long 0x00 16. " IRQS848 ,IRQS Status Bit 848" "Low,High" bitfld.long 0x00 15. " IRQS847 ,IRQS Status Bit 847" "Low,High" bitfld.long 0x00 14. " IRQS846 ,IRQS Status Bit 846" "Low,High" textline " " bitfld.long 0x00 13. " IRQS845 ,IRQS Status Bit 845" "Low,High" bitfld.long 0x00 12. " IRQS844 ,IRQS Status Bit 844" "Low,High" bitfld.long 0x00 11. " IRQS843 ,IRQS Status Bit 843" "Low,High" textline " " bitfld.long 0x00 10. " IRQS842 ,IRQS Status Bit 842" "Low,High" bitfld.long 0x00 9. " IRQS841 ,IRQS Status Bit 841" "Low,High" bitfld.long 0x00 8. " IRQS840 ,IRQS Status Bit 840" "Low,High" textline " " bitfld.long 0x00 7. " IRQS839 ,IRQS Status Bit 839" "Low,High" bitfld.long 0x00 6. " IRQS838 ,IRQS Status Bit 838" "Low,High" bitfld.long 0x00 5. " IRQS837 ,IRQS Status Bit 837" "Low,High" textline " " bitfld.long 0x00 4. " IRQS836 ,IRQS Status Bit 836" "Low,High" bitfld.long 0x00 3. " IRQS835 ,IRQS Status Bit 835" "Low,High" bitfld.long 0x00 2. " IRQS834 ,IRQS Status Bit 834" "Low,High" textline " " bitfld.long 0x00 1. " IRQS833 ,IRQS Status Bit 833" "Low,High" bitfld.long 0x00 0. " IRQS832 ,IRQS Status Bit 832" "Low,High" else rgroup.long 0x0D6C++0x03 line.long 0x0 "GICD_SPISR26,Shared Peripheral Interrupt Status Register 26" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x1C) rgroup.long 0x0D70++0x03 line.long 0x0 "GICD_SPISR27,Shared Peripheral Interrupt Status Register 27" bitfld.long 0x00 31. " IRQS895 ,IRQS Status Bit 895" "Low,High" bitfld.long 0x00 30. " IRQS894 ,IRQS Status Bit 894" "Low,High" bitfld.long 0x00 29. " IRQS893 ,IRQS Status Bit 893" "Low,High" textline " " bitfld.long 0x00 28. " IRQS892 ,IRQS Status Bit 892" "Low,High" bitfld.long 0x00 27. " IRQS891 ,IRQS Status Bit 891" "Low,High" bitfld.long 0x00 26. " IRQS890 ,IRQS Status Bit 890" "Low,High" textline " " bitfld.long 0x00 25. " IRQS889 ,IRQS Status Bit 889" "Low,High" bitfld.long 0x00 24. " IRQS888 ,IRQS Status Bit 888" "Low,High" bitfld.long 0x00 23. " IRQS887 ,IRQS Status Bit 887" "Low,High" textline " " bitfld.long 0x00 22. " IRQS886 ,IRQS Status Bit 886" "Low,High" bitfld.long 0x00 21. " IRQS885 ,IRQS Status Bit 885" "Low,High" bitfld.long 0x00 20. " IRQS884 ,IRQS Status Bit 884" "Low,High" textline " " bitfld.long 0x00 19. " IRQS883 ,IRQS Status Bit 883" "Low,High" bitfld.long 0x00 18. " IRQS882 ,IRQS Status Bit 882" "Low,High" bitfld.long 0x00 17. " IRQS881 ,IRQS Status Bit 881" "Low,High" textline " " bitfld.long 0x00 16. " IRQS880 ,IRQS Status Bit 880" "Low,High" bitfld.long 0x00 15. " IRQS879 ,IRQS Status Bit 879" "Low,High" bitfld.long 0x00 14. " IRQS878 ,IRQS Status Bit 878" "Low,High" textline " " bitfld.long 0x00 13. " IRQS877 ,IRQS Status Bit 877" "Low,High" bitfld.long 0x00 12. " IRQS876 ,IRQS Status Bit 876" "Low,High" bitfld.long 0x00 11. " IRQS875 ,IRQS Status Bit 875" "Low,High" textline " " bitfld.long 0x00 10. " IRQS874 ,IRQS Status Bit 874" "Low,High" bitfld.long 0x00 9. " IRQS873 ,IRQS Status Bit 873" "Low,High" bitfld.long 0x00 8. " IRQS872 ,IRQS Status Bit 872" "Low,High" textline " " bitfld.long 0x00 7. " IRQS871 ,IRQS Status Bit 871" "Low,High" bitfld.long 0x00 6. " IRQS870 ,IRQS Status Bit 870" "Low,High" bitfld.long 0x00 5. " IRQS869 ,IRQS Status Bit 869" "Low,High" textline " " bitfld.long 0x00 4. " IRQS868 ,IRQS Status Bit 868" "Low,High" bitfld.long 0x00 3. " IRQS867 ,IRQS Status Bit 867" "Low,High" bitfld.long 0x00 2. " IRQS866 ,IRQS Status Bit 866" "Low,High" textline " " bitfld.long 0x00 1. " IRQS865 ,IRQS Status Bit 865" "Low,High" bitfld.long 0x00 0. " IRQS864 ,IRQS Status Bit 864" "Low,High" else rgroup.long 0x0D70++0x03 line.long 0x0 "GICD_SPISR27,Shared Peripheral Interrupt Status Register 27" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x1D) rgroup.long 0x0D74++0x03 line.long 0x0 "GICD_SPISR28,Shared Peripheral Interrupt Status Register 28" bitfld.long 0x00 31. " IRQS927 ,IRQS Status Bit 927" "Low,High" bitfld.long 0x00 30. " IRQS926 ,IRQS Status Bit 926" "Low,High" bitfld.long 0x00 29. " IRQS925 ,IRQS Status Bit 925" "Low,High" textline " " bitfld.long 0x00 28. " IRQS924 ,IRQS Status Bit 924" "Low,High" bitfld.long 0x00 27. " IRQS923 ,IRQS Status Bit 923" "Low,High" bitfld.long 0x00 26. " IRQS922 ,IRQS Status Bit 922" "Low,High" textline " " bitfld.long 0x00 25. " IRQS921 ,IRQS Status Bit 921" "Low,High" bitfld.long 0x00 24. " IRQS920 ,IRQS Status Bit 920" "Low,High" bitfld.long 0x00 23. " IRQS919 ,IRQS Status Bit 919" "Low,High" textline " " bitfld.long 0x00 22. " IRQS918 ,IRQS Status Bit 918" "Low,High" bitfld.long 0x00 21. " IRQS917 ,IRQS Status Bit 917" "Low,High" bitfld.long 0x00 20. " IRQS916 ,IRQS Status Bit 916" "Low,High" textline " " bitfld.long 0x00 19. " IRQS915 ,IRQS Status Bit 915" "Low,High" bitfld.long 0x00 18. " IRQS914 ,IRQS Status Bit 914" "Low,High" bitfld.long 0x00 17. " IRQS913 ,IRQS Status Bit 913" "Low,High" textline " " bitfld.long 0x00 16. " IRQS912 ,IRQS Status Bit 912" "Low,High" bitfld.long 0x00 15. " IRQS911 ,IRQS Status Bit 911" "Low,High" bitfld.long 0x00 14. " IRQS910 ,IRQS Status Bit 910" "Low,High" textline " " bitfld.long 0x00 13. " IRQS909 ,IRQS Status Bit 909" "Low,High" bitfld.long 0x00 12. " IRQS908 ,IRQS Status Bit 908" "Low,High" bitfld.long 0x00 11. " IRQS907 ,IRQS Status Bit 907" "Low,High" textline " " bitfld.long 0x00 10. " IRQS906 ,IRQS Status Bit 906" "Low,High" bitfld.long 0x00 9. " IRQS905 ,IRQS Status Bit 905" "Low,High" bitfld.long 0x00 8. " IRQS904 ,IRQS Status Bit 904" "Low,High" textline " " bitfld.long 0x00 7. " IRQS903 ,IRQS Status Bit 903" "Low,High" bitfld.long 0x00 6. " IRQS902 ,IRQS Status Bit 902" "Low,High" bitfld.long 0x00 5. " IRQS901 ,IRQS Status Bit 901" "Low,High" textline " " bitfld.long 0x00 4. " IRQS900 ,IRQS Status Bit 900" "Low,High" bitfld.long 0x00 3. " IRQS899 ,IRQS Status Bit 899" "Low,High" bitfld.long 0x00 2. " IRQS898 ,IRQS Status Bit 898" "Low,High" textline " " bitfld.long 0x00 1. " IRQS897 ,IRQS Status Bit 897" "Low,High" bitfld.long 0x00 0. " IRQS896 ,IRQS Status Bit 896" "Low,High" else rgroup.long 0x0D74++0x03 line.long 0x0 "GICD_SPISR28,Shared Peripheral Interrupt Status Register 28" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x1E) rgroup.long 0x0D78++0x03 line.long 0x0 "GICD_SPISR29,Shared Peripheral Interrupt Status Register 29" bitfld.long 0x00 31. " IRQS959 ,IRQS Status Bit 959" "Low,High" bitfld.long 0x00 30. " IRQS958 ,IRQS Status Bit 958" "Low,High" bitfld.long 0x00 29. " IRQS957 ,IRQS Status Bit 957" "Low,High" textline " " bitfld.long 0x00 28. " IRQS956 ,IRQS Status Bit 956" "Low,High" bitfld.long 0x00 27. " IRQS955 ,IRQS Status Bit 955" "Low,High" bitfld.long 0x00 26. " IRQS954 ,IRQS Status Bit 954" "Low,High" textline " " bitfld.long 0x00 25. " IRQS953 ,IRQS Status Bit 953" "Low,High" bitfld.long 0x00 24. " IRQS952 ,IRQS Status Bit 952" "Low,High" bitfld.long 0x00 23. " IRQS951 ,IRQS Status Bit 951" "Low,High" textline " " bitfld.long 0x00 22. " IRQS950 ,IRQS Status Bit 950" "Low,High" bitfld.long 0x00 21. " IRQS949 ,IRQS Status Bit 949" "Low,High" bitfld.long 0x00 20. " IRQS948 ,IRQS Status Bit 948" "Low,High" textline " " bitfld.long 0x00 19. " IRQS947 ,IRQS Status Bit 947" "Low,High" bitfld.long 0x00 18. " IRQS946 ,IRQS Status Bit 946" "Low,High" bitfld.long 0x00 17. " IRQS945 ,IRQS Status Bit 945" "Low,High" textline " " bitfld.long 0x00 16. " IRQS944 ,IRQS Status Bit 944" "Low,High" bitfld.long 0x00 15. " IRQS943 ,IRQS Status Bit 943" "Low,High" bitfld.long 0x00 14. " IRQS942 ,IRQS Status Bit 942" "Low,High" textline " " bitfld.long 0x00 13. " IRQS941 ,IRQS Status Bit 941" "Low,High" bitfld.long 0x00 12. " IRQS940 ,IRQS Status Bit 940" "Low,High" bitfld.long 0x00 11. " IRQS939 ,IRQS Status Bit 939" "Low,High" textline " " bitfld.long 0x00 10. " IRQS938 ,IRQS Status Bit 938" "Low,High" bitfld.long 0x00 9. " IRQS937 ,IRQS Status Bit 937" "Low,High" bitfld.long 0x00 8. " IRQS936 ,IRQS Status Bit 936" "Low,High" textline " " bitfld.long 0x00 7. " IRQS935 ,IRQS Status Bit 935" "Low,High" bitfld.long 0x00 6. " IRQS934 ,IRQS Status Bit 934" "Low,High" bitfld.long 0x00 5. " IRQS933 ,IRQS Status Bit 933" "Low,High" textline " " bitfld.long 0x00 4. " IRQS932 ,IRQS Status Bit 932" "Low,High" bitfld.long 0x00 3. " IRQS931 ,IRQS Status Bit 931" "Low,High" bitfld.long 0x00 2. " IRQS930 ,IRQS Status Bit 930" "Low,High" textline " " bitfld.long 0x00 1. " IRQS929 ,IRQS Status Bit 929" "Low,High" bitfld.long 0x00 0. " IRQS928 ,IRQS Status Bit 928" "Low,High" else rgroup.long 0x0D78++0x03 line.long 0x0 "GICD_SPISR29,Shared Peripheral Interrupt Status Register 29" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xF9010000+0x04))&0x0000001F)>=0x1F) rgroup.long 0x0D7C++0x03 line.long 0x0 "GICD_SPISR30,Shared Peripheral Interrupt Status Register 30" bitfld.long 0x00 27. " IRQS987 ,IRQS Status Bit 987" "Low,High" bitfld.long 0x00 26. " IRQS986 ,IRQS Status Bit 986" "Low,High" textline " " bitfld.long 0x00 25. " IRQS985 ,IRQS Status Bit 985" "Low,High" bitfld.long 0x00 24. " IRQS984 ,IRQS Status Bit 984" "Low,High" bitfld.long 0x00 23. " IRQS983 ,IRQS Status Bit 983" "Low,High" textline " " bitfld.long 0x00 22. " IRQS982 ,IRQS Status Bit 982" "Low,High" bitfld.long 0x00 21. " IRQS981 ,IRQS Status Bit 981" "Low,High" bitfld.long 0x00 20. " IRQS980 ,IRQS Status Bit 980" "Low,High" textline " " bitfld.long 0x00 19. " IRQS979 ,IRQS Status Bit 979" "Low,High" bitfld.long 0x00 18. " IRQS978 ,IRQS Status Bit 978" "Low,High" bitfld.long 0x00 17. " IRQS977 ,IRQS Status Bit 977" "Low,High" textline " " bitfld.long 0x00 16. " IRQS976 ,IRQS Status Bit 976" "Low,High" bitfld.long 0x00 15. " IRQS975 ,IRQS Status Bit 975" "Low,High" bitfld.long 0x00 14. " IRQS974 ,IRQS Status Bit 974" "Low,High" textline " " bitfld.long 0x00 13. " IRQS973 ,IRQS Status Bit 973" "Low,High" bitfld.long 0x00 12. " IRQS972 ,IRQS Status Bit 972" "Low,High" bitfld.long 0x00 11. " IRQS971 ,IRQS Status Bit 971" "Low,High" textline " " bitfld.long 0x00 10. " IRQS970 ,IRQS Status Bit 970" "Low,High" bitfld.long 0x00 9. " IRQS969 ,IRQS Status Bit 969" "Low,High" bitfld.long 0x00 8. " IRQS968 ,IRQS Status Bit 968" "Low,High" textline " " bitfld.long 0x00 7. " IRQS967 ,IRQS Status Bit 967" "Low,High" bitfld.long 0x00 6. " IRQS966 ,IRQS Status Bit 966" "Low,High" bitfld.long 0x00 5. " IRQS965 ,IRQS Status Bit 965" "Low,High" textline " " bitfld.long 0x00 4. " IRQS964 ,IRQS Status Bit 964" "Low,High" bitfld.long 0x00 3. " IRQS963 ,IRQS Status Bit 963" "Low,High" bitfld.long 0x00 2. " IRQS962 ,IRQS Status Bit 962" "Low,High" textline " " bitfld.long 0x00 1. " IRQS961 ,IRQS Status Bit 961" "Low,High" bitfld.long 0x00 0. " IRQS960 ,IRQS Status Bit 960" "Low,High" else rgroup.long 0x0D7C++0x03 line.long 0x0 "GICD_SPISR30,Shared Peripheral Interrupt Status Register 30" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif tree.end width 25. tree "Software Generated Interrupt" if (((per.l(ad:0xF9010000+0x04))&0x400)==0x400) wgroup.long 0x0F00++0x03 line.long 0x00 "GICD_SGIR,Software Generated Interrupt Register" bitfld.long 0x00 24.--25. " TLF ,Target List Filter" "TargetList,All CPUs,Request CPU,?..." hexmask.long.byte 0x00 16.--23. 1. " CPUTL ,CPU Target List" textline " " bitfld.long 0x00 15. " NSATT ,NSATT" "Secure,Non-secure" bitfld.long 0x00 0.--3. " SGINTID ,SGI Interrupt ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else wgroup.long 0x0F00++0x03 line.long 0x00 "GICD_SGIR,Software Generated Interrupt Register" bitfld.long 0x00 24.--25. " TLF ,Target List Filter" "TargetList,All CPUs,Request CPU,?..." hexmask.long.byte 0x00 16.--23. 1. " CPUTL ,CPU Target List" textline " " bitfld.long 0x00 0.--3. " SGINTID ,SGI Interrupt ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif group.long 0x0F20++0x03 line.long 0x00 "GICD_SET/CLR_PENDSGIR0,SGI Set/Clear Pending Register 0" setclrfld.long 0x00 31. 0x00 31. -0x10 31. " SET/CLR_SGI0 ,SGI0 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. -0x10 30. " SET/CLR_SGI0 ,SGI0 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. -0x10 29. " SET/CLR_SGI0 ,SGI0 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. -0x10 28. " SET/CLR_SGI0 ,SGI0 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. -0x10 27. " SET/CLR_SGI0 ,SGI0 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. -0x10 26. " SET/CLR_SGI0 ,SGI0 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. -0x10 25. " SET/CLR_SGI0 ,SGI0 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. -0x10 24. " SET/CLR_SGI0 ,SGI0 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. -0x10 23. " SET/CLR_SGI1 ,SGI1 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. -0x10 22. " SET/CLR_SGI1 ,SGI1 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. -0x10 21. " SET/CLR_SGI1 ,SGI1 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. -0x10 20. " SET/CLR_SGI1 ,SGI1 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. -0x10 19. " SET/CLR_SGI1 ,SGI1 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. -0x10 18. " SET/CLR_SGI1 ,SGI1 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. -0x10 17. " SET/CLR_SGI1 ,SGI1 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. -0x10 16. " SET/CLR_SGI1 ,SGI1 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. -0x10 15. " SET/CLR_SGI2 ,SGI2 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. -0x10 14. " SET/CLR_SGI2 ,SGI2 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. -0x10 13. " SET/CLR_SGI2 ,SGI2 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. -0x10 12. " SET/CLR_SGI2 ,SGI2 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. -0x10 11. " SET/CLR_SGI2 ,SGI2 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. -0x10 10. " SET/CLR_SGI2 ,SGI2 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. -0x10 9. " SET/CLR_SGI2 ,SGI2 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. -0x10 8. " SET/CLR_SGI2 ,SGI2 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. -0x10 7. " SET/CLR_SGI3 ,SGI3 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. -0x10 6. " SET/CLR_SGI3 ,SGI3 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. -0x10 5. " SET/CLR_SGI3 ,SGI3 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. -0x10 4. " SET/CLR_SGI3 ,SGI3 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. -0x10 3. " SET/CLR_SGI3 ,SGI3 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. -0x10 2. " SET/CLR_SGI3 ,SGI3 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. -0x10 1. " SET/CLR_SGI3 ,SGI3 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. -0x10 0. " SET/CLR_SGI3 ,SGI3 Set/Clear Pending Bit" "Disabled,Enabled" group.long 0x0F24++0x03 line.long 0x00 "GICD_SET/CLR_PENDSGIR1,SGI Set/Clear Pending Register 1" setclrfld.long 0x00 31. 0x00 31. -0x10 31. " SET/CLR_SGI4 ,SGI4 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. -0x10 30. " SET/CLR_SGI4 ,SGI4 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. -0x10 29. " SET/CLR_SGI4 ,SGI4 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. -0x10 28. " SET/CLR_SGI4 ,SGI4 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. -0x10 27. " SET/CLR_SGI4 ,SGI4 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. -0x10 26. " SET/CLR_SGI4 ,SGI4 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. -0x10 25. " SET/CLR_SGI4 ,SGI4 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. -0x10 24. " SET/CLR_SGI4 ,SGI4 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. -0x10 23. " SET/CLR_SGI5 ,SGI5 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. -0x10 22. " SET/CLR_SGI5 ,SGI5 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. -0x10 21. " SET/CLR_SGI5 ,SGI5 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. -0x10 20. " SET/CLR_SGI5 ,SGI5 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. -0x10 19. " SET/CLR_SGI5 ,SGI5 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. -0x10 18. " SET/CLR_SGI5 ,SGI5 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. -0x10 17. " SET/CLR_SGI5 ,SGI5 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. -0x10 16. " SET/CLR_SGI5 ,SGI5 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. -0x10 15. " SET/CLR_SGI6 ,SGI6 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. -0x10 14. " SET/CLR_SGI6 ,SGI6 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. -0x10 13. " SET/CLR_SGI6 ,SGI6 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. -0x10 12. " SET/CLR_SGI6 ,SGI6 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. -0x10 11. " SET/CLR_SGI6 ,SGI6 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. -0x10 10. " SET/CLR_SGI6 ,SGI6 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. -0x10 9. " SET/CLR_SGI6 ,SGI6 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. -0x10 8. " SET/CLR_SGI6 ,SGI6 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. -0x10 7. " SET/CLR_SGI7 ,SGI7 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. -0x10 6. " SET/CLR_SGI7 ,SGI7 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. -0x10 5. " SET/CLR_SGI7 ,SGI7 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. -0x10 4. " SET/CLR_SGI7 ,SGI7 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. -0x10 3. " SET/CLR_SGI7 ,SGI7 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. -0x10 2. " SET/CLR_SGI7 ,SGI7 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. -0x10 1. " SET/CLR_SGI7 ,SGI7 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. -0x10 0. " SET/CLR_SGI7 ,SGI7 Set/Clear Pending Bit" "Disabled,Enabled" group.long 0x0F28++0x03 line.long 0x00 "GICD_SET/CLR_PENDSGIR2,SGI Set/Clear Pending Register 2" setclrfld.long 0x00 31. 0x00 31. -0x10 31. " SET/CLR_SGI8 ,SGI8 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. -0x10 30. " SET/CLR_SGI8 ,SGI8 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. -0x10 29. " SET/CLR_SGI8 ,SGI8 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. -0x10 28. " SET/CLR_SGI8 ,SGI8 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. -0x10 27. " SET/CLR_SGI8 ,SGI8 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. -0x10 26. " SET/CLR_SGI8 ,SGI8 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. -0x10 25. " SET/CLR_SGI8 ,SGI8 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. -0x10 24. " SET/CLR_SGI8 ,SGI8 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. -0x10 23. " SET/CLR_SGI9 ,SGI9 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. -0x10 22. " SET/CLR_SGI9 ,SGI9 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. -0x10 21. " SET/CLR_SGI9 ,SGI9 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. -0x10 20. " SET/CLR_SGI9 ,SGI9 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. -0x10 19. " SET/CLR_SGI9 ,SGI9 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. -0x10 18. " SET/CLR_SGI9 ,SGI9 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. -0x10 17. " SET/CLR_SGI9 ,SGI9 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. -0x10 16. " SET/CLR_SGI9 ,SGI9 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. -0x10 15. " SET/CLR_SGI10 ,SGI10 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. -0x10 14. " SET/CLR_SGI10 ,SGI10 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. -0x10 13. " SET/CLR_SGI10 ,SGI10 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. -0x10 12. " SET/CLR_SGI10 ,SGI10 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. -0x10 11. " SET/CLR_SGI10 ,SGI10 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. -0x10 10. " SET/CLR_SGI10 ,SGI10 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. -0x10 9. " SET/CLR_SGI10 ,SGI10 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. -0x10 8. " SET/CLR_SGI10 ,SGI10 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. -0x10 7. " SET/CLR_SGI11 ,SGI11 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. -0x10 6. " SET/CLR_SGI11 ,SGI11 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. -0x10 5. " SET/CLR_SGI11 ,SGI11 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. -0x10 4. " SET/CLR_SGI11 ,SGI11 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. -0x10 3. " SET/CLR_SGI11 ,SGI11 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. -0x10 2. " SET/CLR_SGI11 ,SGI11 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. -0x10 1. " SET/CLR_SGI11 ,SGI11 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. -0x10 0. " SET/CLR_SGI11 ,SGI11 Set/Clear Pending Bit" "Disabled,Enabled" group.long 0x0F2C++0x03 line.long 0x00 "GICD_SET/CLR_PENDSGIR2,SGI Set/Clear Pending Register 3" setclrfld.long 0x00 31. 0x00 31. -0x10 31. " SET/CLR_SGI12 ,SGI12 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. -0x10 30. " SET/CLR_SGI12 ,SGI12 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. -0x10 29. " SET/CLR_SGI12 ,SGI12 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. -0x10 28. " SET/CLR_SGI12 ,SGI12 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. -0x10 27. " SET/CLR_SGI12 ,SGI12 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. -0x10 26. " SET/CLR_SGI12 ,SGI12 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. -0x10 25. " SET/CLR_SGI12 ,SGI12 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. -0x10 24. " SET/CLR_SGI12 ,SGI12 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. -0x10 23. " SET/CLR_SGI13 ,SGI13 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. -0x10 22. " SET/CLR_SGI13 ,SGI13 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. -0x10 21. " SET/CLR_SGI13 ,SGI13 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. -0x10 20. " SET/CLR_SGI13 ,SGI13 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. -0x10 19. " SET/CLR_SGI13 ,SGI13 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. -0x10 18. " SET/CLR_SGI13 ,SGI13 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. -0x10 17. " SET/CLR_SGI13 ,SGI13 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. -0x10 16. " SET/CLR_SGI13 ,SGI13 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. -0x10 15. " SET/CLR_SGI14 ,SGI14 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. -0x10 14. " SET/CLR_SGI14 ,SGI14 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. -0x10 13. " SET/CLR_SGI14 ,SGI14 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. -0x10 12. " SET/CLR_SGI14 ,SGI14 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. -0x10 11. " SET/CLR_SGI14 ,SGI14 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. -0x10 10. " SET/CLR_SGI14 ,SGI14 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. -0x10 9. " SET/CLR_SGI14 ,SGI14 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. -0x10 8. " SET/CLR_SGI14 ,SGI14 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. -0x10 7. " SET/CLR_SGI15 ,SGI15 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. -0x10 6. " SET/CLR_SGI15 ,SGI15 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. -0x10 5. " SET/CLR_SGI15 ,SGI15 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. -0x10 4. " SET/CLR_SGI15 ,SGI15 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. -0x10 3. " SET/CLR_SGI15 ,SGI15 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. -0x10 2. " SET/CLR_SGI15 ,SGI15 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. -0x10 1. " SET/CLR_SGI15 ,SGI15 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. -0x10 0. " SET/CLR_SGI15 ,SGI15 Set/Clear Pending Bit" "Disabled,Enabled" tree.end width 12. tree "Peripheral/Component ID Registers" rgroup.byte 0x0FE0++0x00 line.byte 0x00 "GICD_PIDR0,Peripheral ID0 Register" hexmask.byte 0x00 0.--7. 1. " DEVID ,DevID field" rgroup.byte 0x0FE4++0x00 line.byte 0x00 "GICD_PIDR1,Peripheral ID1 Register" bitfld.byte 0x00 4.--7. " ARCHID ,ArchID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.byte 0x00 0.--3. " DEVID ,DevID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.byte 0x0FE8++0x00 line.byte 0x00 "GICD_PIDR2,Peripheral ID2 Register" bitfld.byte 0x00 4.--7. " ARCHREV ,ArchRev field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.byte 0x00 3. " UJEPCODE ,UsesJEPcode field" "Low,High" bitfld.byte 0x00 0.--2. " ARCHID ,ArchID field" "0,1,2,3,4,5,6,7" rgroup.byte 0x0FEC++0x00 line.byte 0x00 "GICD_PIDR3,Peripheral ID3 Register" bitfld.byte 0x00 4.--7. " REVID ,Revision field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.byte 0x0FD0++0x00 line.byte 0x00 "GICD_PIDR4,Peripheral ID4 Register" bitfld.byte 0x00 0.--3. " CC ,ContinuationCode field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.byte 0xFD4++0x00 line.byte 0x00 "GICD_PIDR5,Peripheral ID5 Register" rgroup.byte 0xFD8++0x00 line.byte 0x00 "GICD_PIDR6,Peripheral ID6 Register" rgroup.byte 0xFDC++0x00 line.byte 0x00 "GICD_PIDR7,Peripheral ID7 Register" textline " " rgroup.byte 0xFF0++0x00 line.byte 0x00 "GICD_CIDR0,Component ID0 Register" hexmask.byte 0x00 0.--7. 1. " FIXVAL ,ARM-defined fixed values for the preamble for component discovery" rgroup.byte 0xFF4++0x00 line.byte 0x00 "GICD_CIDR1,Component ID1 Register" hexmask.byte 0x00 0.--7. 1. " FIXVAL ,ARM-defined fixed values for the preamble for component discovery" rgroup.byte 0xFF8++0x00 line.byte 0x00 "GICD_CIDR2,Component ID2 Register" hexmask.byte 0x00 0.--7. 1. " FIXVAL ,ARM-defined fixed values for the preamble for component discovery" rgroup.byte 0xFFC++0x00 line.byte 0x00 "GICD_CIDR3,Component ID3 Register" hexmask.byte 0x00 0.--7. 1. " FIXVAL ,ARM-defined fixed values for the preamble for component discovery" textline " " tree.end tree.end width 0x0B base ad:0xF9020000 width 17. tree "CPU Interface" if (((per.l(ad:0xF9010000+0x04))&0x400)==0x0) group.long 0x0000++0x03 line.long 0x00 "GICC_CTLR,CPU Interface Control Register" bitfld.long 0x00 9. " EOIMODENS ,Controls the behavior of Non-secure accesses to the GICC_EOIR and GICC_DIR registers" "Priority drop/Deactivate,Priority drop" bitfld.long 0x00 6. " IRQBYPDISGRP1 ,When the signaling of IRQs by the CPU interface is disabled this bit partly controls whether the bypass IRQ signal is signaled to the processor" "Signaled,Not signaled" bitfld.long 0x00 5. " FIQBYPDISGRP1 ,When the signaling of FIQs by the CPU interface is disabled this bit partly controls whether the bypass FIQ signal is signaled to the processor" "Signaled,Not signaled" textline " " bitfld.long 0x00 0. " ENABLEGRP1 ,Enable for the signaling of Group 1 interrupts by the CPU interface to the connected processor" "Disabled,Enabled" textline " " textline " " else if PER.ADDRESS.isSECUREEX(ad:0xF9020000) group.long 0x0000++0x03 line.long 0x00 "GICC_CTLR,CPU Interface Control Register (Secure access)" bitfld.long 0x00 10. " EOIMODENS ,Controls the behavior of Non-secure accesses to the GICC_EOIR and GICC_DIR registers" "Priority drop/Deactivate,Priority drop" bitfld.long 0x00 9. " EOIMODES ,Controls the behavior of accesses to GICC_EOIR and GICC_DIR registers" "Priority drop/Deactivate,Priority drop" bitfld.long 0x00 8. " IRQBYPDISGRP1 ,When the signaling of IRQs by the CPU interface is disabled this bit partly controls whether the bypass IRQ signal is signaled to the processor" "Signaled,Not signaled" textline " " bitfld.long 0x00 7. " FIQBYPDISGRP1 ,When the signaling of FIQs by the CPU interface is disabled this bit partly controls whether the bypass FIQ signal is signaled to the processor" "Signaled,Not signaled" bitfld.long 0x00 6. " IRQBYPDISGRP0 ,When the signaling of FIQs by the CPU interface is disabled this bit partly controls whether the bypass FIQ signal is signaled to the processor" "Signaled,Not signaled" bitfld.long 0x00 5. " FIQBYPDISGRP0 ,When the signaling of FIQs by the CPU interface is disabled this bit partly controls whether the bypass FIQ signal is signaled to the processor" "Signaled,Not signaled" textline " " bitfld.long 0x00 4. " CBPR ,Controls whether the GICC_BPR provides common control to Group 0 and Group 1 interrupts" "BPR/ABPR split,BPR common" bitfld.long 0x00 3. " FIQEN ,Controls whether the CPU interface signals Group 0 interrupts to a target processor using the FIQ or the IRQ signal" "IRQ,FIQ" bitfld.long 0x00 2. " ACKCTL ,Acknowledge Control" "ID 1022 interrupt,Corresponding interrupt" textline " " bitfld.long 0x00 1. " ENABLEGRP1 ,Enable for the signaling of Group 1 interrupts by the CPU interface to the connected processor" "Disabled,Enabled" bitfld.long 0x00 0. " ENABLEGRP0 ,Enable for the signaling of Group 0 interrupts by the CPU interface to the connected processor" "Disabled,Enabled" else group.long 0x0000++0x03 line.long 0x00 "GICC_CTLR,CPU Interface Control Register (Non-secure access)" bitfld.long 0x00 9. " EOIMODENS ,Controls the behavior of Non-secure accesses to the GICC_EOIR and GICC_DIR registers" "Priority drop/Deactivate,Priority drop" bitfld.long 0x00 6. " IRQBYPDISGRP1 ,When the signaling of IRQs by the CPU interface is disabled this bit partly controls whether the bypass IRQ signal is signaled to the processor" "Signaled,Not signaled" bitfld.long 0x00 5. " FIQBYPDISGRP1 ,When the signaling of FIQs by the CPU interface is disabled this bit partly controls whether the bypass FIQ signal is signaled to the processor" "Signaled,Not signaled" textline " " bitfld.long 0x00 0. " ENABLEGRP1 ,Enable for the signaling of Group 1 interrupts by the CPU interface to the connected processor" "Disabled,Enabled" textline " " textline " " endif endif group.long 0x0004++0x03 line.long 0x00 "GICC_PMR,Interrupt Priority Mask Register" hexmask.long.byte 0x00 0.--7. 1. " PRIORITY ,Priority mask level for CPU interface" if (((per.l(ad:0xF9010000+0x04))&0x400)==0x400) if PER.ADDRESS.isSECUREEX(ad:0xF9020000+0x0008) group.long 0x0008++0x03 line.long 0x00 "GICC_BPR,Binary Point Register (Secure access)" bitfld.long 0x00 0.--2. " BINARY_POINT ,The value of this field controls how the 8-bit interrupt priority field is split into a group priority field and subpriority field" "Reserved,Reserved,[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]" else group.long 0x0008++0x03 line.long 0x00 "GICC_BPR,Binary Point Register (Non-secure access)" bitfld.long 0x00 0.--2. " BINARY_POINT ,The value of this field controls how the 8-bit interrupt priority field is split into a group priority field and subpriority field" "Reserved,Reserved,Reserved,[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]" endif else group.long 0x0008++0x03 line.long 0x00 "GICC_BPR,Binary Point Register" bitfld.long 0x00 0.--2. " BINARY_POINT ,The value of this field controls how the 8-bit interrupt priority field is split into a group priority field and subpriority field" "Reserved,Reserved,Reserved,[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]" endif hgroup.long 0x000C++0x03 hide.long 0x00 "GICC_IAR,Interrupt Acknowledge Register" in wgroup.long 0x0010++0x03 line.long 0x00 "GICC_EOIR,End Of Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation if the write refers to an SGI this field contains the CPUID value from the corresponding GICC_IAR access" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " EOIINTID ,The Interrupt ID value from the corresponding GICC_IAR access" rgroup.long 0x0014++0x03 line.long 0x00 "GICC_RPR,Running Priority Register" hexmask.long.byte 0x00 0.--7. 1. " PRIORITY ,The current running priority on the CPU interface" rgroup.long 0x0018++0x03 line.long 0x00 "GICC_HPIR,Highest Priority Pending Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation if the PENDINTID field returns the ID of an SGI this field contains the CPUID value for that interrupt" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " PENDINTID ,The interrupt ID of the highest priority pending interrupt" if (((per.l(ad:0xF9010000+0x04))&0x400)==0x400) group.long 0x001C++0x03 line.long 0x00 "GICC_ABPR,Aliased Binary Point Register" bitfld.long 0x00 0.--2. " BINARY_POINT ,The value of this field controls how the 8-bit interrupt priority field is split into a group priority field and subpriority field" "[7:1]/[0],[7:2]/[1:0],[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]" else hgroup.long 0x001C++0x03 hide.long 0x00 "GICC_ABPR,Aliased Binary Point Register" endif hgroup.long 0x0020++0x003 hide.long 0x00 "GICC_AIAR,Aliased Interrupt Acknowledge Register" in if (((per.l(ad:0xF9010000+0x04))&0x400)==0x400) wgroup.long 0x0024++0x03 line.long 0x00 "GICC_AEOIR,Aliased End of Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation if the write refers to an SGI this field contains the CPUID value from the corresponding GICC_IAR access" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " EOIINTID ,The Interrupt ID value from the corresponding GICC_IAR access" rgroup.long 0x0028++0x03 line.long 0x00 "GICC_AHPPIR,Aliased Highest Priority Pending Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation if the PENDINTID field returns the ID of an SGI this field contains the CPUID value for that interrupt" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " PENDINTID ,The interrupt ID of the highest priority pending interrupt" else hgroup.long 0x0024++0x03 hide.long 0x00 "GICC_AEOIR,Aliased End of Interrupt Register" hgroup.long 0x0028++0x03 hide.long 0x00 "GICC_AHPPIR,Aliased Highest Priority Pending Interrupt Register" endif group.long 0x00D0++0x03 line.long 0x00 "GICC_APR0,Active Priorities Register" if (((per.l(ad:0xF9010000+0x04))&0x400)==0x400) group.long 0x00E0++0x03 line.long 0x00 "GICC_NSAPR0,Non-Secure Active Priorities Register" else hgroup.long 0x00E0++0x03 hide.long 0x00 "GICC_NSAPR0,Non-Secure Active Priorities Register" endif rgroup.long 0x00FC++0x03 line.long 0x00 "GICC_IIDR,CPU and Virtual CPU Interface Identification Register" hexmask.long.word 0x00 20.--31. 1. " PRODID ,Product ID" bitfld.long 0x00 16.--19. " ARCH_VER ,Identifies the architecture version of the GIC" "GICv1,GICv1,GICv2,GICv2,?..." textline " " bitfld.long 0x00 12.--15. " REV ,Revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 0.--11. 1. " IMP ,Implementer" wgroup.long 0x1000++0x03 line.long 0x00 "GICC_DIR,Deactivate Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation this field identifies the processor that requested the interrupt" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " INTID ,The interrupt ID" tree.end sif CPU.FEATURE(hypervisor) base ad:0xF9040000 width 12. tree "Virtual CPU Control Interface" group.long 0x0000++0x03 line.long 0x00 "GICH_HCR,Hypervisor Control Register" bitfld.long 0x00 27.--31. " EOICOUNT ,Counts the number of EOIs received that do not have a corresponding entry in the List registers" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 7. " VGRP1DIE ,VM Disable Group 1 Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 6. " VGRP1EIE ,VM Enable Group 1 Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " VGRP0DIE ,VM Disable Group 0 Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. " VGRP0EIE ,VM Disable Group 0 Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " NPIE ,No Pending Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " LRENPIE ,List Register Entry Not Present Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " UIE ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" rgroup.long 0x0004++0x03 line.long 0x00 "GICH_VTR,VGIC Type Register" bitfld.long 0x00 29.--31. " PRIBITS ,Number of priority bits" "Reserved,Reserved,Reserved,Reserved,5 bits 32 PRI levels,?..." textline " " bitfld.long 0x00 26.--28. " PREBITS ,Number of pre-emption bits" "Reserved,Reserved,Reserved,Reserved,5 bits 32 PRE levels,?..." textline " " bitfld.long 0x00 0.--5. " LISTREGS ,List regs number" "Reserved,Reserved,Reserved,4 lists,?..." group.long 0x008++0x03 line.long 0x00 "GICH_VMCR,Virtual Machine Control Register" bitfld.long 0x00 27.--31. " VMPRIMASK ,Alias of GICV_PMR.Priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 21.--23. " VMBP ,Alias of GICV_BPR.Binary point" "0,1,2,3,4,5,6,7" bitfld.long 0x00 18.--20. " VMABP ,Alias of GICV_ABPR.Binary point" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 9. " VEM ,Alias of GICV_CTLR.EOImode" "0,1" bitfld.long 0x00 4. " VMCBPR ,Alias of GICV_CTLR.CBPR" "0,1" bitfld.long 0x00 3. " VMFIQEN ,Alias of GICV_CTLR.FIQEn" "0,1" textline " " bitfld.long 0x00 2. " VMACKCTL ,Alias of GICV_CTLR.AckCtl" "0,1" bitfld.long 0x00 1. " VMGRP1EN ,Alias of GICV_CTLR.EnableGrp1" "0,1" bitfld.long 0x00 0. " VMGRP0EN ,Alias of GICV_CTLR.EnableGrp0" "0,1" rgroup.long 0x0010++0x03 line.long 0x00 "GICH_MISR,Maintenance Interrupt Status Register" bitfld.long 0x00 7. " VGRP1D ,Disabled Group 1 maintenance interrupt" "No interrupt,Interrupt" bitfld.long 0x00 6. " VGRP1E ,Enabled Group 1 maintenance interrupt" "No interrupt,Interrupt" bitfld.long 0x00 5. " VGRP0D ,Disabled Group 0 maintenance interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 4. " VGRP0E ,Enabled Group 0 maintenance interrupt" "No interrupt,Interrupt" bitfld.long 0x00 3. " NP ,No Pending maintenance interrupt" "No interrupt,Interrupt" bitfld.long 0x00 2. " LRENP ,List Register Entry Not Present maintenance interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " U ,Underflow maintenance interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " EOI ,EOI maintenance interrupt" "No interrupt,Interrupt" rgroup.long 0x020++0x03 line.long 0x00 "GICH_EISR0,End of Interrupt Status Register" bitfld.long 0x00 3. " STATUS3 ,EOI maintenance interrupt status for List register 3" "No interrupt,Interrupt" bitfld.long 0x00 2. " STATUS2 ,EOI maintenance interrupt status for List register 2" "No interrupt,Interrupt" bitfld.long 0x00 1. " STATUS1 ,EOI maintenance interrupt status for List register 1" "No interrupt,Interrupt" textline " " bitfld.long 0x00 0. " STATUS0 ,EOI maintenance interrupt status for List register 0" "No interrupt,Interrupt" rgroup.long 0x0030++0x03 line.long 0x00 "GICH_ELSR0,Empty List register Status Register" bitfld.long 0x00 3. " STATUS3 ,Emptiness status bit for List register 3" "Not empty,Empty" bitfld.long 0x00 2. " STATUS2 ,Emptiness status bit for List register 2" "Not empty,Empty" bitfld.long 0x00 1. " STATUS1 ,Emptiness status bit for List register 1" "Not empty,Empty" textline " " bitfld.long 0x00 0. " STATUS0 ,Emptiness status bit for List register 0" "Not empty,Empty" group.long 0x00F0++0x03 line.long 0x00 "GICH_APR0,Active Priorities Register" bitfld.long 0x00 31. " APB31 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 30. " APB30 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 29. " APB29 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 28. " APB28 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 27. " APB27 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 26. " APB26 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 25. " APB25 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 24. " APB24 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 23. " APB23 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 22. " APB22 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 21. " APB21 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 20. " APB20 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 19. " APB19 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 18. " APB18 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 17. " APB17 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 16. " APB16 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 15. " APB15 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 14. " APB14 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 13. " APB13 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 12. " APB12 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 11. " APB11 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 10. " APB10 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 9. " APB9 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 8. " APB8 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 7. " APB7 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 6. " APB6 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 5. " APB5 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 4. " APB4 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 3. " APB3 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 2. " APB2 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 1. " APB1 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 0. " APB0 ,Determines whether the corresponding preemption level is active" "Not active,Active" if (((per.l(ad:0xF9040000+0x100))&0x80000000)==0x80000000) group.long 0x100++0x03 line.long 0x00 "GICH_LR0,List Register 0" bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x00 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x00 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x00 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x00 10.--19. 1. " PHYSICALID ,Indicates the physical interrupt ID that the hypervisor forwards to the Distributor" hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" else group.long 0x100++0x03 line.long 0x00 "GICH_LR0,List Register 0" bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x00 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x00 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x00 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 19. " EOI ,Indicates whether this interrupt triggers an EOI maintenance interrupt" "Not asserted,Asserted" bitfld.long 0x00 10.--12. " CPUID ,If the interrupt has the VirtualID for an SGI that is 0-15 this field shows the requesting CPU ID" "0,1,2,3,4,5,6,7" textline " " hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" endif if (((per.l(ad:0xF9040000+0x104))&0x80000000)==0x80000000) group.long 0x104++0x03 line.long 0x00 "GICH_LR1,List Register 1" bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x00 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x00 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x00 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x00 10.--19. 1. " PHYSICALID ,Indicates the physical interrupt ID that the hypervisor forwards to the Distributor" hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" else group.long 0x104++0x03 line.long 0x00 "GICH_LR1,List Register 1" bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x00 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x00 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x00 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 19. " EOI ,Indicates whether this interrupt triggers an EOI maintenance interrupt" "Not asserted,Asserted" bitfld.long 0x00 10.--12. " CPUID ,If the interrupt has the VirtualID for an SGI that is 0-15 this field shows the requesting CPU ID" "0,1,2,3,4,5,6,7" textline " " hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" endif if (((per.l(ad:0xF9040000+0x108))&0x80000000)==0x80000000) group.long 0x108++0x03 line.long 0x00 "GICH_LR2,List Register 2" bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x00 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x00 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x00 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x00 10.--19. 1. " PHYSICALID ,Indicates the physical interrupt ID that the hypervisor forwards to the Distributor" hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" else group.long 0x108++0x03 line.long 0x00 "GICH_LR2,List Register 2" bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x00 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x00 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x00 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 19. " EOI ,Indicates whether this interrupt triggers an EOI maintenance interrupt" "Not asserted,Asserted" bitfld.long 0x00 10.--12. " CPUID ,If the interrupt has the VirtualID for an SGI that is 0-15 this field shows the requesting CPU ID" "0,1,2,3,4,5,6,7" textline " " hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" endif if (((per.l(ad:0xF9040000+0x10C))&0x80000000)==0x80000000) group.long 0x10C++0x03 line.long 0x00 "GICH_LR3,List Register 3" bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x00 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x00 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x00 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x00 10.--19. 1. " PHYSICALID ,Indicates the physical interrupt ID that the hypervisor forwards to the Distributor" hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" else group.long 0x10C++0x03 line.long 0x00 "GICH_LR3,List Register 3" bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x00 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x00 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x00 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 19. " EOI ,Indicates whether this interrupt triggers an EOI maintenance interrupt" "Not asserted,Asserted" bitfld.long 0x00 10.--12. " CPUID ,If the interrupt has the VirtualID for an SGI that is 0-15 this field shows the requesting CPU ID" "0,1,2,3,4,5,6,7" textline " " hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" endif tree.end base ad:0xF9060000 width 12. tree "Virtual CPU Interface" group.long 0x0000++0x03 line.long 0x00 "GICV_CTLR,Virtual Machine Control Register" bitfld.long 0x00 9. " EOIMODE ,Controls the behavior associated with the GICV_EOIR GICV_AEOIR and GICV_DIR registers" "Priority drop/Deactivate,Priority drop" bitfld.long 0x00 4. " CBPR ,Controls whether the GICV_BPR controls both Group 0 and Group 1 virtual interrupts" "BPR/ABPR split,BPR common" bitfld.long 0x00 3. " FIQEN ,Controls whether interrupts marked as Group 0 are presented as virtual FIQs" "IRQs,FIQs" textline " " bitfld.long 0x00 2. " ACKCTL ,Acknowledge Control" "ID 1022 interrupt,Corresponding interrupt" bitfld.long 0x00 1. " ENABLEGRP1 ,Enables the signaling of Group 1 virtual interrupts by the virtual CPU interface to the virtual machine" "Disabled,Enabled" bitfld.long 0x00 0. " ENABLEGRP0 ,Enables the signaling of Group 0 virtual interrupts by the virtual CPU interface to the virtual machine" "Disabled,Enabled" group.long 0x0004++0x03 line.long 0x00 "GICV_PMR,VM Priority Mask Register" bitfld.long 0x00 3.--7. " PRIORITY ,Priority mask level for CPU interface" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x0008++0x03 line.long 0x00 "GICV_BPR,VM Binary Point Register" bitfld.long 0x00 0.--2. " BINARY_POINT ,The value of this field controls how the 8-bit interrupt priority field is split into a group priority field and subpriority field" "Reserved,Reserved,[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]" hgroup.long 0x000C++0x03 hide.long 0x00 "GICV_IAR,VM Interrupt Acknowledge Register" in wgroup.long 0x0010++0x03 line.long 0x00 "GICV_EOIR,VM End of Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation if the write refers to an SGI this field contains the CPUID value from the corresponding GICC_IAR access" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " EOIINTID ,The Interrupt ID value from the corresponding GICC_IAR access" rgroup.long 0x0014++0x03 line.long 0x00 "GICV_RPR,VM Running Priority Register" hexmask.long.byte 0x00 0.--7. 1. " PRIORITY ,The current running priority on the Virtual CPU interface" rgroup.long 0x0018++0x03 line.long 0x00 "GICV_HPPIR,VM Highest Priority Pending Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation if the PENDINTID field returns the ID of an SGI this field contains the CPUID value for that interrupt" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " PENDINTID ,The interrupt ID of the highest priority pending interrupt" group.long 0x001C++0x03 line.long 0x00 "GICV_ABPR,VM Aliased Binary Point Register" bitfld.long 0x00 0.--2. " BINARY_POINT ,The value of this field controls how the 8-bit interrupt priority field is split into a group priority field and subpriority field" "[7:1]/[0],[7:2]/[1:0],[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]" hgroup.long 0x0020++0x03 hide.long 0x00 "GICV_AIAR,VM Aliased Interrupt Acknowledge Register" in wgroup.long 0x0024++0x03 line.long 0x00 "GICV_AEOIR,VM Aliased End of Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation if the write refers to an SGI this field contains the CPUID value from the corresponding GICC_IAR access" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " EOIINTID ,The Interrupt ID value from the corresponding GICC_IAR access" rgroup.long 0x0028++0x03 line.long 0x00 "GICV_AHPPIR,VM Aliased Highest Priority Pending Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation if the PENDINTID field returns the ID of an SGI this field contains the CPUID value for that interrupt" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " PENDINTID ,The interrupt ID of the highest priority pending interrupt" group.long 0x00D0++0x03 line.long 0x00 "GICV_APR0,VM Active Priority Register" bitfld.long 0x00 31. " APB31 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 30. " APB30 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 29. " APB29 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 28. " APB28 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 27. " APB27 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 26. " APB26 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 25. " APB25 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 24. " APB24 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 23. " APB23 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 22. " APB22 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 21. " APB21 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 20. " APB20 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 19. " APB19 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 18. " APB18 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 17. " APB17 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 16. " APB16 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 15. " APB15 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 14. " APB14 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 13. " APB13 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 12. " APB12 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 11. " APB11 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 10. " APB10 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 9. " APB9 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 8. " APB8 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 7. " APB7 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 6. " APB6 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 5. " APB5 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 4. " APB4 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 3. " APB3 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 2. " APB2 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 1. " APB1 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 0. " APB0 ,Determines whether the corresponding preemption level is active" "Not active,Active" rgroup.long 0x00FC++0x03 line.long 0x00 "GICV_IIDR,VM CPU Interface Identification Register" hexmask.long.word 0x00 20.--31. 1. " PRODID ,Product ID" bitfld.long 0x00 16.--19. " ARCH_VER ,Identifies the architecture version of the GIC" "GICv1,GICv2,?..." textline " " bitfld.long 0x00 12.--15. " REV ,Revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 0.--11. 1. " IMP ,Implementer" wgroup.long 0x1000++0x03 line.long 0x00 "GICV_DIR,VM Deactivate Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation this field identifies the processor that requested the interrupt" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " INTID ,The interrupt ID" tree.end endif width 0x0B tree.end tree.end tree "GIC400 (ARM Generic Interrupt Controller)" base ad:0xF9000000 width 15. tree "Distributor Interface" group.long 0x10000++0x03 line.long 0x00 "GICD_CTLR,Distributor Control Register" bitfld.long 0x00 1. " ENABLEGRP1 ,Global Interrupt Enable Group 1" "Disabled,Enabled" bitfld.long 0x00 0. " ENABLEGRP0 ,Global Interrupt Enable Group 1" "Disabled,Enabled" rgroup.long 0x10004++0x07 line.long 0x00 "GICD_TYPER,Interrupt Controller Type Register" bitfld.long 0x00 11.--15. " LSPI ,Locable Shared Peripheral Interrupts" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 10. " SECURITYEXTN ,Indicate whether interrupt controller implements the security extensions" "Not implemented,Implemented" textline " " bitfld.long 0x00 5.--7. " CPUNUMBER ,Indicates the number of implemented CPU interfaces" "1,2,3,4,?..." bitfld.long 0x00 0.--4. " ITLN ,Indicates the number of interrupts that the interrupt controller supports" "Up to 32,Up to 64,Up to 96,Up to 128,Up to 160,Up to 192,?..." line.long 0x04 "GICD_IIDR,Distributor Implementer Identification Register" bitfld.long 0x04 24.--31. " PRODID ,Indicates the product ID" ",,,GIC400,?..." bitfld.long 0x04 16.--19. " VAR ,Major revison number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 12.--15. " REV ,Minor revision number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x04 0.--11. 1. " IMP ,Implementer" textline " " width 23. tree "Group Registers" group.long 0x10080++0x17 line.long 0x0 "GICD_IGROUPR0,Interrupt Group Register 0" bitfld.long 0x00 31. " PPI31 ,Legacy IRQ from programmable logic (PL)" "Group 0,Group 1" bitfld.long 0x00 30. " PPI30 ,Non-secure physical timer event" "Group 0,Group 1" bitfld.long 0x00 29. " PPI29 ,Secure physical timer event" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " PPI28 ,Legacy nFIQ from programmable logic (PL)" "Group 0,Group 1" bitfld.long 0x00 27. " PPI27 ,Virtual timer event" "Group 0,Group 1" bitfld.long 0x00 26. " PPI26 ,Hypervisor timer event" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " PPI25 ,Virtual maintenance interrupt" "Group 0,Group 1" textline " " bitfld.long 0x00 15. " SGI15 ,Software Generated Interrupt 15" "Group 0,Group 1" bitfld.long 0x00 14. " SGI14 ,Software Generated Interrupt 14" "Group 0,Group 1" bitfld.long 0x00 13. " SGI13 ,Software Generated Interrupt 13" "Group 0,Group 1" textline " " bitfld.long 0x00 12. " SGI12 ,Software Generated Interrupt 12" "Group 0,Group 1" bitfld.long 0x00 11. " SGI11 ,Software Generated Interrupt 11" "Group 0,Group 1" bitfld.long 0x00 10. " SGI10 ,Software Generated Interrupt 10" "Group 0,Group 1" textline " " bitfld.long 0x00 9. " SGI9 ,Software Generated Interrupt 9" "Group 0,Group 1" bitfld.long 0x00 8. " SGI8 ,Software Generated Interrupt 8" "Group 0,Group 1" bitfld.long 0x00 7. " SGI7 ,Software Generated Interrupt 7" "Group 0,Group 1" textline " " bitfld.long 0x00 6. " SGI6 ,Software Generated Interrupt 6" "Group 0,Group 1" bitfld.long 0x00 5. " SGI5 ,Software Generated Interrupt 5" "Group 0,Group 1" bitfld.long 0x00 4. " SGI4 ,Software Generated Interrupt 4" "Group 0,Group 1" textline " " bitfld.long 0x00 3. " SGI3 ,Software Generated Interrupt 3" "Group 0,Group 1" bitfld.long 0x00 2. " SGI2 ,Software Generated Interrupt 2" "Group 0,Group 1" bitfld.long 0x00 1. " SGI1 ,Software Generated Interrupt 1" "Group 0,Group 1" textline " " bitfld.long 0x00 0. " SGI0 ,Software Generated Interrupt 0" "Group 0,Group 1" line.long 0x4 "GICD_IGROUPR1,Interrupt Group Register 1" bitfld.long 0x04 31. " PL_IPI3 ,OR of all IPIs targeted to the RPU PL3" "Group 0,Group 1" bitfld.long 0x04 30. " PL_IPI2 ,OR of all IPIs targeted to the RPU PL2" "Group 0,Group 1" bitfld.long 0x04 29. " PL_IPI1 ,OR of all IPIs targeted to the RPU PL1" "Group 0,Group 1" textline " " bitfld.long 0x04 28. " PL_IPI0 ,OR of all IPIs targeted to the RPU PL0" "Group 0,Group 1" bitfld.long 0x04 27. " CLKMON ,Clock monitor coming from the CRL" "Group 0,Group 1" bitfld.long 0x04 26. " RTC_SECONDS ,RTC seconds interrupt" "Group 0,Group 1" textline " " bitfld.long 0x04 25. " RTC_ALARM ,RTC alarm interrupt" "Group 0,Group 1" bitfld.long 0x04 24. " APM_LPD ,OR of all LPD APMs" "Group 0,Group 1" bitfld.long 0x04 23. " CAN1 ,CAN1 interrupt." "Group 0,Group 1" textline " " bitfld.long 0x04 22. " CAN0 ,CAN0 interrupt" "Group 0,Group 1" bitfld.long 0x04 21. " UART1 ,UART1 interrupt" "Group 0,Group 1" bitfld.long 0x04 20. " UART0 ,UART0 interrupt" "Group 0,Group 1" textline " " bitfld.long 0x04 19. " SPI1 ,SPI1 interrupt" "Group 0,Group 1" bitfld.long 0x04 18. " SPI0 ,SPI0 interrupt" "Group 0,Group 1" bitfld.long 0x04 17. " I2C1 ,I2C1 interrupt" "Group 0,Group 1" textline " " bitfld.long 0x04 16. " I2C0 ,I2C0 interrupt" "Group 0,Group 1" bitfld.long 0x04 15. " GPIO ,GPIO interrupt" "Group 0,Group 1" bitfld.long 0x04 14. " QSPI ,SPI interrupt" "Group 0,Group 1" textline " " bitfld.long 0x04 13. " NAND ,NAND/NOR/SRAM static memory controller interrupt" "Group 0,Group 1" bitfld.long 0x04 12. " RPU1_ECC ,RPU CPU1 ECC errors interrupt" "Group 0,Group 1" bitfld.long 0x04 11. " RPU0_ECC ,RPU CPU0 ECC errors interrupt" "Group 0,Group 1" textline " " bitfld.long 0x04 10. " LPD_APB_INT ,OR of all APB interrupts from the LPD" "Group 0,Group 1" bitfld.long 0x04 9. " OCMINTR ,RPU interrupt (error)" "Group 0,Group 1" bitfld.long 0x04 8. " RPU1_PERF_MON ,RPU performance monitor" "Group 0,Group 1" textline " " bitfld.long 0x04 7. " RPU0_PERF_MON ,RPU performance monitor" "Group 0,Group 1" line.long 0x8 "GICD_IGROUPR2,Interrupt Group Register 2" bitfld.long 0x08 31. " GIGABITETH3_WAKEUP ,Gigabit Ethernet3 wakeup interrupt" "Group 0,Group 1" bitfld.long 0x08 30. " GIGABITETH3 ,Gigabit Ethernet3 interrupt" "Group 0,Group 1" bitfld.long 0x08 29. " GIGABITETH2_WAKEUP ,Gigabit Ethernet2 wakeup interrupt" "Group 0,Group 1" textline " " bitfld.long 0x08 28. " GIGABITETH2 ,Gigabit Ethernet2 interrupt" "Group 0,Group 1" bitfld.long 0x08 27. " GIGABITETH_WAKEUP1 ,Gigabit Ethernet1 wakeup interrupt" "Group 0,Group 1" bitfld.long 0x08 26. " GIGABITETH1 ,Gigabit Ethernet1 interrupt" "Group 0,Group 1" textline " " bitfld.long 0x08 25. " GIGABITETH_WAKE0 ,Ethernet0 wakeup interrupt" "Group 0,Group 1" bitfld.long 0x08 24. " GIGABITETH0 ,Ethernet0 interrupt" "Group 0,Group 1" bitfld.long 0x08 23. " AMS ,AMS interrupt" "Group 0,Group 1" textline " " bitfld.long 0x08 22. " AIB_AXI ,AIB AXI interrupt" "Group 0,Group 1" bitfld.long 0x08 21. " ATB_ERR_LPD ,ATB interrupt" "Group 0,Group 1" bitfld.long 0x08 20. " CSUPMU_WDT ,WDT in the CSU PMU" "Group 0,Group 1" textline " " bitfld.long 0x08 19. " LP_WDT ,Watchdog timer (WDT) in the LPD (IOU)" "Group 0,Group 1" bitfld.long 0x08 18. " SDIO1_WAKE ,SDIO1 wake interrupt" "Group 0,Group 1" bitfld.long 0x08 17. " SDIO0_WAKE ,SDIO0 wake interrupt" "Group 0,Group 1" textline " " bitfld.long 0x08 16. " SDIO1 ,SDIO1 interrupt" "Group 0,Group 1" bitfld.long 0x08 15. " SDIO0 ,SDIO0 interrupt" "Group 0,Group 1" bitfld.long 0x08 14. " TTC3 ,Triple-timer counter 3" "Group 0,Group 1" textline " " bitfld.long 0x08 13. " TTC3 ,Triple-timer counter 3" "Group 0,Group 1" bitfld.long 0x08 12. " TTC3 ,Triple-timer counter 3" "Group 0,Group 1" bitfld.long 0x08 11. " TTC2 ,Triple-timer counter 2" "Group 0,Group 1" textline " " bitfld.long 0x08 10. " TTC2 ,Triple-timer counter 2" "Group 0,Group 1" bitfld.long 0x08 9. " TTC2 ,Triple-timer counter 2" "Group 0,Group 1" bitfld.long 0x08 8. " TTC1 ,Triple-timer counter 1" "Group 0,Group 1" textline " " bitfld.long 0x08 7. " TTC1 ,Triple-timer counter 1" "Group 0,Group 1" bitfld.long 0x08 6. " TTC1 ,Triple-timer counter 1" "Group 0,Group 1" bitfld.long 0x08 5. " TTC0 ,Triple-timer counter 0" "Group 0,Group 1" textline " " bitfld.long 0x08 4. " TTC0 ,Triple-timer counter 0" "Group 0,Group 1" bitfld.long 0x08 3. " TTC0 ,Triple-timer counter 0" "Group 0,Group 1" bitfld.long 0x08 2. " APU_IPI0 ,OR of all IPIs targeted to the APU CPU" "Group 0,Group 1" textline " " bitfld.long 0x08 1. " RPU_IPI1 ,OR of all IPIs targeted to the RPU CPU1" "Group 0,Group 1" bitfld.long 0x08 0. " RPU_IPI0 ,OR of all IPIs targeted to the RPU CPU0" "Group 0,Group 1" line.long 0xC "GICD_IGROUPR3,Interrupt Group Register 3" bitfld.long 0x0C 31. " PL_PS_GRP0_0 ,PL_PS IRQ[7]" "Group 0,Group 1" bitfld.long 0x0C 30. " PL_PS_GRP0_0 ,PL_PS IRQ[6]" "Group 0,Group 1" bitfld.long 0x0C 29. " PL_PS_GRP0_0 ,PL_PS IRQ[5]" "Group 0,Group 1" textline " " bitfld.long 0x0C 28. " PL_PS_GRP0_0 ,PL_PS IRQ[4]" "Group 0,Group 1" bitfld.long 0x0C 27. " PL_PS_GRP0_0 ,PL_PS IRQ[3]" "Group 0,Group 1" bitfld.long 0x0C 26. " PL_PS_GRP0_0 ,PL_PS IRQ[2]" "Group 0,Group 1" textline " " bitfld.long 0x0C 25. " PL_PS_GRP0_0 ,PL_PS IRQ[1]" "Group 0,Group 1" bitfld.long 0x0C 24. " PL_PS_GRP0_0 ,PL_PS IRQ[0]" "Group 0,Group 1" bitfld.long 0x0C 23. " XMPU_LPD ,XMPU error interrupt for the LPD" "Group 0,Group 1" textline " " bitfld.long 0x0C 22. " EFUSE ,EFUSE interrupt" "Group 0,Group 1" bitfld.long 0x0C 21. " CSU_DMA ,DMA for CSU interrupt" "Group 0,Group 1" bitfld.long 0x0C 20. " CSU ,Device configuration module interrupt" "Group 0,Group 1" textline " " bitfld.long 0x0C 19. " LPD-DMA_7 ,LPD-DMA channel 7" "Group 0,Group 1" bitfld.long 0x0C 18. " LPD-DMA_6 ,LPD-DMA channel 6" "Group 0,Group 1" bitfld.long 0x0C 17. " LPD-DMA_5 ,LPD-DMA channel 5" "Group 0,Group 1" textline " " bitfld.long 0x0C 16. " LPD-DMA_4 ,LPD-DMA channel 4" "Group 0,Group 1" bitfld.long 0x0C 15. " LPD-DMA_3 ,LPD-DMA channel 3" "Group 0,Group 1" bitfld.long 0x0C 14. " LPD-DMA_2 ,LPD-DMA channel 2" "Group 0,Group 1" textline " " bitfld.long 0x0C 13. " LPD-DMA_1 ,LPD-DMA channel 1" "Group 0,Group 1" bitfld.long 0x0C 12. " LPD-DMA_0 ,LPD-DMA channel 0" "Group 0,Group 1" bitfld.long 0x0C 11. " USB3_0_1_PMU_WKP ,Wakeup from USB3_1 to PMU" "Group 0,Group 1" textline " " bitfld.long 0x0C 10. " USB3_0_1_PMU_WKP ,Wakeup from USB3_0 to PMU" "Group 0,Group 1" bitfld.long 0x0C 9. " USB3_1_OTG ,USB3_1 OTG interrupt" "Group 0,Group 1" bitfld.long 0x0C 8. " USB3_1_ENDPOINT ,USB3_1 Endpoint related interrupt" "Group 0,Group 1" textline " " bitfld.long 0x0C 7. " USB3_1_ENDPOINT ,USB3_1 Endpoint related interrupt" "Group 0,Group 1" bitfld.long 0x0C 6. " USB3_1_ENDPOINT ,USB3_1 Endpoint related interrupt" "Group 0,Group 1" bitfld.long 0x0C 5. " USB3_1_ENDPOINT ,USB3_1 Endpoint related interrupt" "Group 0,Group 1" textline " " bitfld.long 0x0C 4. " USB3_0_OTG ,USB3_0 OTG interrupt" "Group 0,Group 1" bitfld.long 0x0C 3. " USB3_0_ENDPOINT ,USB3_0 Endpoint related interrupt" "Group 0,Group 1" bitfld.long 0x0C 2. " USB3_0_ENDPOINT ,USB3_0 Endpoint related interrupt" "Group 0,Group 1" textline " " bitfld.long 0x0C 1. " USB3_0_ENDPOINT ,USB3_0 Endpoint related interrupt" "Group 0,Group 1" bitfld.long 0x0C 0. " USB3_0_ENDPOINT ,USB3_0 Endpoint related interrupt" "Group 0,Group 1" line.long 0x10 "GICD_IGROUPR4,Interrupt Group Register 4" bitfld.long 0x10 31. " APU_CPUMNT_0 ,VCPUMT[0]" "Group 0,Group 1" bitfld.long 0x10 30. " XMPU_FPD ,XMPU error interrupt for the FPD" "Group 0,Group 1" bitfld.long 0x10 29. " SATA ,SATA controller interrupt" "Group 0,Group 1" textline " " bitfld.long 0x10 28. " GPU ,OR of all GPU interrupts" "Group 0,Group 1" bitfld.long 0x10 27. " FPD-DMA_7 ,Interrupts from the FPD-DMA 7" "Group 0,Group 1" bitfld.long 0x10 26. " FPD-DMA_6 ,Interrupts from the FPD-DMA 6" "Group 0,Group 1" textline " " bitfld.long 0x10 25. " FPD-DMA_5 ,Interrupts from the FPD-DMA 5" "Group 0,Group 1" bitfld.long 0x10 24. " FPD-DMA_4 ,Interrupts from the FPD-DMA 4" "Group 0,Group 1" bitfld.long 0x10 23. " FPD-DMA_3 ,Interrupts from the FPD-DMA 3" "Group 0,Group 1" textline " " bitfld.long 0x10 22. " FPD-DMA_2 ,Interrupts from the FPD-DMA 2" "Group 0,Group 1" bitfld.long 0x10 21. " FPD-DMA_1 ,Interrupts from the FPD-DMA 1" "Group 0,Group 1" bitfld.long 0x10 20. " FPD-DMA_0 ,Interrupts from the FPD-DMA 0" "Group 0,Group 1" textline " " bitfld.long 0x10 19. " APM_FPD ,OR of all APMs for the FPD" "Group 0,Group 1" bitfld.long 0x10 18. " DPDMA_INT ,DisplayPort DMA interrupt" "Group 0,Group 1" bitfld.long 0x10 17. " FPD_ATB_ERROR ,ATB interrupt for the FPD" "Group 0,Group 1" textline " " bitfld.long 0x10 16. " FPD_APB_INT ,OR of all APB interrupts from the LPD" "Group 0,Group 1" bitfld.long 0x10 15. " DPORT ,DisplayPort general-purpose interrupt" "Group 0,Group 1" bitfld.long 0x10 14. " PCIE_MSC ,PCIe miscellaneous interrupts" "Group 0,Group 1" textline " " bitfld.long 0x10 13. " PCIE_DMA ,PCIe bridge DMA interrupts" "Group 0,Group 1" bitfld.long 0x10 12. " PCIE_LEGACY ,PCIe legacy (INTA/BC/D) interrupts" "Group 0,Group 1" bitfld.long 0x10 11. " PCIE_MSI ,PCIe interrupt for MSI vectors 63 to 32" "Group 0,Group 1" textline " " bitfld.long 0x10 10. " PCIE_MSI ,PCIe interrupt for MSI vectors 31 to 0" "Group 0,Group 1" bitfld.long 0x10 9. " FP_WDT ,Top-level watchdog timer interrupt" "Group 0,Group 1" bitfld.long 0x10 8. " DDR_SS ,DDR controller subsystem interrupt" "Group 0,Group 1" textline " " bitfld.long 0x10 7. " PL_PS_GRP1 ,PL_PS IRQ[15]" "Group 0,Group 1" bitfld.long 0x10 6. " PL_PS_GRP1 ,PL_PS IRQ[14]" "Group 0,Group 1" bitfld.long 0x10 5. " PL_PS_GRP1 ,PL_PS IRQ[13]" "Group 0,Group 1" textline " " bitfld.long 0x10 4. " PL_PS_GRP1 ,PL_PS IRQ[12]" "Group 0,Group 1" bitfld.long 0x10 3. " PL_PS_GRP1 ,PL_PS IRQ[11]" "Group 0,Group 1" bitfld.long 0x10 2. " PL_PS_GRP1 ,PL_PS IRQ[10]" "Group 0,Group 1" textline " " bitfld.long 0x10 1. " PL_PS_GRP1 ,PL_PS IRQ[9]" "Group 0,Group 1" bitfld.long 0x10 0. " PL_PS_GRP1 ,PL_PS IRQ[8]" "Group 0,Group 1" line.long 0x14 "GICD_IGROUPR5,Interrupt Group Register 5" bitfld.long 0x14 19. " INTF_FPD_SMMU ,SMMU (from int_fpd)" "Group 0,Group 1" bitfld.long 0x14 18. " INTF_PPD_CCI ,CCI (from int_fpd)" "Group 0,Group 1" bitfld.long 0x14 17. " APU_REGS ,REGS" "Group 0,Group 1" textline " " bitfld.long 0x14 16. " APU_EXTERR ,EXTERR" "Group 0,Group 1" bitfld.long 0x14 15. " APU_L2ERR ,EXT error" "Group 0,Group 1" bitfld.long 0x14 14. " APU_COMM_3 ,L2 error[3]" "Group 0,Group 1" textline " " bitfld.long 0x14 13. " APU_COMM_2 ,L2 error[2]" "Group 0,Group 1" bitfld.long 0x14 12. " APU_COMM_1 ,L2 error[1]" "Group 0,Group 1" bitfld.long 0x14 11. " APU_COMM_0 ,L2 error[0]" "Group 0,Group 1" textline " " bitfld.long 0x14 10. " APU_PMU_3 ,Performance monitor unit[3]" "Group 0,Group 1" bitfld.long 0x14 9. " APU_PMU_2 ,Performance monitor unit[2]" "Group 0,Group 1" bitfld.long 0x14 8. " APU_PMU_1 ,Performance monitor unit[1]" "Group 0,Group 1" textline " " bitfld.long 0x14 7. " APU_PMU_0 ,Performance monitor unit[0]" "Group 0,Group 1" bitfld.long 0x14 6. " APU_CTI_3 ,CTI[3]" "Group 0,Group 1" bitfld.long 0x14 5. " APU_CTI_2 ,CTI[2]" "Group 0,Group 1" textline " " bitfld.long 0x14 4. " APU_CTI_1 ,CTI[1]" "Group 0,Group 1" bitfld.long 0x14 3. " APU_CTI_0 ,CTI[0]" "Group 0,Group 1" bitfld.long 0x14 2. " APU_CPUMNT_3 ,VCPUMT[3]" "Group 0,Group 1" textline " " bitfld.long 0x14 1. " APU_CPUMNT_2 ,VCPUMT[2]" "Group 0,Group 1" bitfld.long 0x14 0. " APU_CPUMNT_1 ,VCPUMT[1]" "Group 0,Group 1" textline " " tree.end tree "Set/Clear Enable Registers" group.long 0x10100++0x17 line.long 0x0 "GICD_SET/CLR_ENABLER0,Interrupt Set/Clear Enable Register 0" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PPI31 ,Legacy IRQ from programmable logic (PL)" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PPI30 ,Non-secure physical timer event" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PPI29 ,Secure physical timer event" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PPI28 ,Legacy nFIQ from programmable logic (PL)" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PPI27 ,Virtual timer event" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PPI26 ,Hypervisor timer event" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PPI25 ,Virtual maintenance interrupt" "Disabled,Enabled" textline " " setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SGI15 ,Software Generated Interrupt 15" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SGI14 ,Software Generated Interrupt 14" "Disabled,Enabled" setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SGI13 ,Software Generated Interrupt 13" "Disabled,Enabled" textline " " setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SGI12 ,Software Generated Interrupt 12" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SGI11 ,Software Generated Interrupt 11" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SGI10 ,Software Generated Interrupt 10" "Disabled,Enabled" textline " " setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SGI9 ,Software Generated Interrupt 9" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SGI8 ,Software Generated Interrupt 8" "Disabled,Enabled" setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SGI7 ,Software Generated Interrupt 7" "Disabled,Enabled" textline " " setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SGI6 ,Software Generated Interrupt 6" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SGI5 ,Software Generated Interrupt 5" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SGI4 ,Software Generated Interrupt 4" "Disabled,Enabled" textline " " setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SGI3 ,Software Generated Interrupt 3" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SGI2 ,Software Generated Interrupt 2" "Disabled,Enabled" setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SGI1 ,Software Generated Interrupt 1" "Disabled,Enabled" line.long 0x4 "GICD_SET/CLR_ENABLER1,Interrupt Set/Clear Enable Register 1" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PL_IPI3 ,OR of all IPIs targeted to the RPU PL3" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PL_IPI2 ,OR of all IPIs targeted to the RPU PL2" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PL_IPI1 ,OR of all IPIs targeted to the RPU PL1" "Disabled,Enabled" textline " " setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PL_IPI0 ,OR of all IPIs targeted to the RPU PL0" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " CLKMON ,Clock monitor coming from the CRL" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " RTC_SECONDS ,RTC seconds interrupt" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " RTC_ALARM ,RTC alarm interrupt" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " APM_LPD ,OR of all LPD APMs" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " CAN1 ,CAN1 interrupt." "Disabled,Enabled" textline " " setclrfld.long 0x04 22. 0x04 22. 0x84 22. " CAN0 ,CAN0 interrupt" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " UART1 ,UART1 interrupt" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " UART0 ,UART0 interrupt" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " SPI1 ,SPI1 interrupt" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " SPI0 ,SPI0 interrupt" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " I2C1 ,I2C1 interrupt" "Disabled,Enabled" textline " " setclrfld.long 0x04 16. 0x04 16. 0x84 16. " I2C0 ,I2C0 interrupt" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " GPIO ,GPIO interrupt" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " QSPI ,SPI interrupt" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " NAND ,NAND/NOR/SRAM static memory controller interrupt" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " RPU1_ECC ,RPU CPU1 ECC errors interrupt" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " RPU0_ECC ,RPU CPU0 ECC errors interrupt" "Disabled,Enabled" textline " " setclrfld.long 0x04 10. 0x04 10. 0x84 10. " LPD_APB_INT ,OR of all APB interrupts from the LPD" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " OCMINTR ,RPU interrupt (error)" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " RPU1_PERF_MON ,RPU performance monitor" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " RPU0_PERF_MON ,RPU performance monitor" "Disabled,Enabled" line.long 0x8 "GICD_SET/CLR_ENABLER2,Interrupt Set/Clear Enable Register 2" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " GIGABITETH3_WAKEUP ,Gigabit Ethernet3 wakeup interrupt" "Disabled,Enabled" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " GIGABITETH3 ,Gigabit Ethernet3 interrupt" "Disabled,Enabled" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " GIGABITETH2_WAKEUP ,Gigabit Ethernet2 wakeup interrupt" "Disabled,Enabled" textline " " setclrfld.long 0x08 28. 0x08 28. 0x88 28. " GIGABITETH2 ,Gigabit Ethernet2 interrupt" "Disabled,Enabled" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " GIGABITETH_WAKEUP1 ,Gigabit Ethernet1 wakeup interrupt" "Disabled,Enabled" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " GIGABITETH1 ,Gigabit Ethernet1 interrupt" "Disabled,Enabled" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " GIGABITETH_WAKE0 ,Ethernet0 wakeup interrupt" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " GIGABITETH0 ,Ethernet0 interrupt" "Disabled,Enabled" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " AMS ,AMS interrupt" "Disabled,Enabled" textline " " setclrfld.long 0x08 22. 0x08 22. 0x88 22. " AIB_AXI ,AIB AXI interrupt" "Disabled,Enabled" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ATB_ERR_LPD ,ATB interrupt" "Disabled,Enabled" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " CSUPMU_WDT ,WDT in the CSU PMU" "Disabled,Enabled" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " LP_WDT ,Watchdog timer (WDT) in the LPD (IOU)" "Disabled,Enabled" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " SDIO1_WAKE ,SDIO1 wake interrupt" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " SDIO0_WAKE ,SDIO0 wake interrupt" "Disabled,Enabled" textline " " setclrfld.long 0x08 16. 0x08 16. 0x88 16. " SDIO1 ,SDIO1 interrupt" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " SDIO0 ,SDIO0 interrupt" "Disabled,Enabled" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " TTC3 ,Triple-timer counter 3" "Disabled,Enabled" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " TTC3 ,Triple-timer counter 3" "Disabled,Enabled" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " TTC3 ,Triple-timer counter 3" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " TTC2 ,Triple-timer counter 2" "Disabled,Enabled" textline " " setclrfld.long 0x08 10. 0x08 10. 0x88 10. " TTC2 ,Triple-timer counter 2" "Disabled,Enabled" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " TTC2 ,Triple-timer counter 2" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " TTC1 ,Triple-timer counter 1" "Disabled,Enabled" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " TTC1 ,Triple-timer counter 1" "Disabled,Enabled" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " TTC1 ,Triple-timer counter 1" "Disabled,Enabled" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " TTC0 ,Triple-timer counter 0" "Disabled,Enabled" textline " " setclrfld.long 0x08 4. 0x08 4. 0x88 4. " TTC0 ,Triple-timer counter 0" "Disabled,Enabled" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " TTC0 ,Triple-timer counter 0" "Disabled,Enabled" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " APU_IPI0 ,OR of all IPIs targeted to the APU CPU" "Disabled,Enabled" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " RPU_IPI1 ,OR of all IPIs targeted to the RPU CPU1" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " RPU_IPI0 ,OR of all IPIs targeted to the RPU CPU0" "Disabled,Enabled" line.long 0xC "GICD_SET/CLR_ENABLER3,Interrupt Set/Clear Enable Register 3" setclrfld.long 0x0C 31. 0x0C 31. 0x8C 31. " PL_PS_GRP0_0 ,PL_PS IRQ[7]" "Disabled,Enabled" setclrfld.long 0x0C 30. 0x0C 30. 0x8C 30. " PL_PS_GRP0_0 ,PL_PS IRQ[6]" "Disabled,Enabled" setclrfld.long 0x0C 29. 0x0C 29. 0x8C 29. " PL_PS_GRP0_0 ,PL_PS IRQ[5]" "Disabled,Enabled" textline " " setclrfld.long 0x0C 28. 0x0C 28. 0x8C 28. " PL_PS_GRP0_0 ,PL_PS IRQ[4]" "Disabled,Enabled" setclrfld.long 0x0C 27. 0x0C 27. 0x8C 27. " PL_PS_GRP0_0 ,PL_PS IRQ[3]" "Disabled,Enabled" setclrfld.long 0x0C 26. 0x0C 26. 0x8C 26. " PL_PS_GRP0_0 ,PL_PS IRQ[2]" "Disabled,Enabled" textline " " setclrfld.long 0x0C 25. 0x0C 25. 0x8C 25. " PL_PS_GRP0_0 ,PL_PS IRQ[1]" "Disabled,Enabled" setclrfld.long 0x0C 24. 0x0C 24. 0x8C 24. " PL_PS_GRP0_0 ,PL_PS IRQ[0]" "Disabled,Enabled" setclrfld.long 0x0C 23. 0x0C 23. 0x8C 23. " XMPU_LPD ,XMPU error interrupt for the LPD" "Disabled,Enabled" textline " " setclrfld.long 0x0C 22. 0x0C 22. 0x8C 22. " EFUSE ,EFUSE interrupt" "Disabled,Enabled" setclrfld.long 0x0C 21. 0x0C 21. 0x8C 21. " CSU_DMA ,DMA for CSU interrupt" "Disabled,Enabled" setclrfld.long 0x0C 20. 0x0C 20. 0x8C 20. " CSU ,Device configuration module interrupt" "Disabled,Enabled" textline " " setclrfld.long 0x0C 19. 0x0C 19. 0x8C 19. " LPD-DMA_7 ,LPD-DMA channel 7" "Disabled,Enabled" setclrfld.long 0x0C 18. 0x0C 18. 0x8C 18. " LPD-DMA_6 ,LPD-DMA channel 6" "Disabled,Enabled" setclrfld.long 0x0C 17. 0x0C 17. 0x8C 17. " LPD-DMA_5 ,LPD-DMA channel 5" "Disabled,Enabled" textline " " setclrfld.long 0x0C 16. 0x0C 16. 0x8C 16. " LPD-DMA_4 ,LPD-DMA channel 4" "Disabled,Enabled" setclrfld.long 0x0C 15. 0x0C 15. 0x8C 15. " LPD-DMA_3 ,LPD-DMA channel 3" "Disabled,Enabled" setclrfld.long 0x0C 14. 0x0C 14. 0x8C 14. " LPD-DMA_2 ,LPD-DMA channel 2" "Disabled,Enabled" textline " " setclrfld.long 0x0C 13. 0x0C 13. 0x8C 13. " LPD-DMA_1 ,LPD-DMA channel 1" "Disabled,Enabled" setclrfld.long 0x0C 12. 0x0C 12. 0x8C 12. " LPD-DMA_0 ,LPD-DMA channel 0" "Disabled,Enabled" setclrfld.long 0x0C 11. 0x0C 11. 0x8C 11. " USB3_0_1_PMU_WKP ,Wakeup from USB3_1 to PMU" "Disabled,Enabled" textline " " setclrfld.long 0x0C 10. 0x0C 10. 0x8C 10. " USB3_0_1_PMU_WKP ,Wakeup from USB3_0 to PMU" "Disabled,Enabled" setclrfld.long 0x0C 9. 0x0C 9. 0x8C 9. " USB3_1_OTG ,USB3_1 OTG interrupt" "Disabled,Enabled" setclrfld.long 0x0C 8. 0x0C 8. 0x8C 8. " USB3_1_ENDPOINT ,USB3_1 Endpoint related interrupt" "Disabled,Enabled" textline " " setclrfld.long 0x0C 7. 0x0C 7. 0x8C 7. " USB3_1_ENDPOINT ,USB3_1 Endpoint related interrupt" "Disabled,Enabled" setclrfld.long 0x0C 6. 0x0C 6. 0x8C 6. " USB3_1_ENDPOINT ,USB3_1 Endpoint related interrupt" "Disabled,Enabled" setclrfld.long 0x0C 5. 0x0C 5. 0x8C 5. " USB3_1_ENDPOINT ,USB3_1 Endpoint related interrupt" "Disabled,Enabled" textline " " setclrfld.long 0x0C 4. 0x0C 4. 0x8C 4. " USB3_0_OTG ,USB3_0 OTG interrupt" "Disabled,Enabled" setclrfld.long 0x0C 3. 0x0C 3. 0x8C 3. " USB3_0_ENDPOINT ,USB3_0 Endpoint related interrupt" "Disabled,Enabled" setclrfld.long 0x0C 2. 0x0C 2. 0x8C 2. " USB3_0_ENDPOINT ,USB3_0 Endpoint related interrupt" "Disabled,Enabled" textline " " setclrfld.long 0x0C 1. 0x0C 1. 0x8C 1. " USB3_0_ENDPOINT ,USB3_0 Endpoint related interrupt" "Disabled,Enabled" setclrfld.long 0x0C 0. 0x0C 0. 0x8C 0. " USB3_0_ENDPOINT ,USB3_0 Endpoint related interrupt" "Disabled,Enabled" line.long 0x10 "GICD_SET/CLR_ENABLER4,Interrupt Set/Clear Enable Register 4" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " APU_CPUMNT_0 ,VCPUMT[0]" "Disabled,Enabled" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " XMPU_FPD ,XMPU error interrupt for the FPD" "Disabled,Enabled" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " SATA ,SATA controller interrupt" "Disabled,Enabled" textline " " setclrfld.long 0x10 28. 0x10 28. 0x90 28. " GPU ,OR of all GPU interrupts" "Disabled,Enabled" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " FPD-DMA_7 ,Interrupts from the FPD-DMA 7" "Disabled,Enabled" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " FPD-DMA_6 ,Interrupts from the FPD-DMA 6" "Disabled,Enabled" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " FPD-DMA_5 ,Interrupts from the FPD-DMA 5" "Disabled,Enabled" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " FPD-DMA_4 ,Interrupts from the FPD-DMA 4" "Disabled,Enabled" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " FPD-DMA_3 ,Interrupts from the FPD-DMA 3" "Disabled,Enabled" textline " " setclrfld.long 0x10 22. 0x10 22. 0x90 22. " FPD-DMA_2 ,Interrupts from the FPD-DMA 2" "Disabled,Enabled" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " FPD-DMA_1 ,Interrupts from the FPD-DMA 1" "Disabled,Enabled" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " FPD-DMA_0 ,Interrupts from the FPD-DMA 0" "Disabled,Enabled" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " APM_FPD ,OR of all APMs for the FPD" "Disabled,Enabled" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " DPDMA_INT ,DisplayPort DMA interrupt" "Disabled,Enabled" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " FPD_ATB_ERROR ,ATB interrupt for the FPD" "Disabled,Enabled" textline " " setclrfld.long 0x10 16. 0x10 16. 0x90 16. " FPD_APB_INT ,OR of all APB interrupts from the LPD" "Disabled,Enabled" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " DPORT ,DisplayPort general-purpose interrupt" "Disabled,Enabled" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PCIE_MSC ,PCIe miscellaneous interrupts" "Disabled,Enabled" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PCIE_DMA ,PCIe bridge DMA interrupts" "Disabled,Enabled" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PCIE_LEGACY ,PCIe legacy (INTA/BC/D) interrupts" "Disabled,Enabled" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PCIE_MSI ,PCIe interrupt for MSI vectors 63 to 32" "Disabled,Enabled" textline " " setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PCIE_MSI ,PCIe interrupt for MSI vectors 31 to 0" "Disabled,Enabled" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " FP_WDT ,Top-level watchdog timer interrupt" "Disabled,Enabled" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " DDR_SS ,DDR controller subsystem interrupt" "Disabled,Enabled" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PL_PS_GRP1 ,PL_PS IRQ[15]" "Disabled,Enabled" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PL_PS_GRP1 ,PL_PS IRQ[14]" "Disabled,Enabled" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PL_PS_GRP1 ,PL_PS IRQ[13]" "Disabled,Enabled" textline " " setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PL_PS_GRP1 ,PL_PS IRQ[12]" "Disabled,Enabled" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PL_PS_GRP1 ,PL_PS IRQ[11]" "Disabled,Enabled" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PL_PS_GRP1 ,PL_PS IRQ[10]" "Disabled,Enabled" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PL_PS_GRP1 ,PL_PS IRQ[9]" "Disabled,Enabled" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PL_PS_GRP1 ,PL_PS IRQ[8]" "Disabled,Enabled" line.long 0x14 "GICD_SET/CLR_ENABLER5,Interrupt Set/Clear Enable Register 5" setclrfld.long 0x14 19. 0x14 19. 0x94 19. " INTF_FPD_SMMU ,SMMU (from int_fpd)" "Disabled,Enabled" setclrfld.long 0x14 18. 0x14 18. 0x94 18. " INTF_PPD_CCI ,CCI (from int_fpd)" "Disabled,Enabled" setclrfld.long 0x14 17. 0x14 17. 0x94 17. " APU_REGS ,REGS" "Disabled,Enabled" textline " " setclrfld.long 0x14 16. 0x14 16. 0x94 16. " APU_EXTERR ,EXTERR" "Disabled,Enabled" setclrfld.long 0x14 15. 0x14 15. 0x94 15. " APU_L2ERR ,EXT error" "Disabled,Enabled" setclrfld.long 0x14 14. 0x14 14. 0x94 14. " APU_COMM_3 ,L2 error[3]" "Disabled,Enabled" textline " " setclrfld.long 0x14 13. 0x14 13. 0x94 13. " APU_COMM_2 ,L2 error[2]" "Disabled,Enabled" setclrfld.long 0x14 12. 0x14 12. 0x94 12. " APU_COMM_1 ,L2 error[1]" "Disabled,Enabled" setclrfld.long 0x14 11. 0x14 11. 0x94 11. " APU_COMM_0 ,L2 error[0]" "Disabled,Enabled" textline " " setclrfld.long 0x14 10. 0x14 10. 0x94 10. " APU_PMU_3 ,Performance monitor unit[3]" "Disabled,Enabled" setclrfld.long 0x14 9. 0x14 9. 0x94 9. " APU_PMU_2 ,Performance monitor unit[2]" "Disabled,Enabled" setclrfld.long 0x14 8. 0x14 8. 0x94 8. " APU_PMU_1 ,Performance monitor unit[1]" "Disabled,Enabled" textline " " setclrfld.long 0x14 7. 0x14 7. 0x94 7. " APU_PMU_0 ,Performance monitor unit[0]" "Disabled,Enabled" setclrfld.long 0x14 6. 0x14 6. 0x94 6. " APU_CTI_3 ,CTI[3]" "Disabled,Enabled" setclrfld.long 0x14 5. 0x14 5. 0x94 5. " APU_CTI_2 ,CTI[2]" "Disabled,Enabled" textline " " setclrfld.long 0x14 4. 0x14 4. 0x94 4. " APU_CTI_1 ,CTI[1]" "Disabled,Enabled" setclrfld.long 0x14 3. 0x14 3. 0x94 3. " APU_CTI_0 ,CTI[0]" "Disabled,Enabled" setclrfld.long 0x14 2. 0x14 2. 0x94 2. " APU_CPUMNT_3 ,VCPUMT[3]" "Disabled,Enabled" textline " " setclrfld.long 0x14 1. 0x14 1. 0x94 1. " APU_CPUMNT_2 ,VCPUMT[2]" "Disabled,Enabled" setclrfld.long 0x14 0. 0x14 0. 0x94 0. " APU_CPUMNT_1 ,VCPUMT[1]" "Disabled,Enabled" tree.end tree "Set/Clear Pending Registers" group.long 0x10200++0x17 line.long 0x0 "GICD_SET/CLR_PENDR0,Interrupt Set/Clear Pending Register 0" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PPI31 ,Legacy IRQ from programmable logic (PL)" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PPI30 ,Non-secure physical timer event" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PPI29 ,Secure physical timer event" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PPI28 ,Legacy nFIQ from programmable logic (PL)" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PPI27 ,Virtual timer event" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PPI26 ,Hypervisor timer event" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PPI25 ,Virtual maintenance interrupt" "Disabled,Enabled" textline " " setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SGI15 ,Software Generated Interrupt 15" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SGI14 ,Software Generated Interrupt 14" "Disabled,Enabled" setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SGI13 ,Software Generated Interrupt 13" "Disabled,Enabled" textline " " setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SGI12 ,Software Generated Interrupt 12" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SGI11 ,Software Generated Interrupt 11" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SGI10 ,Software Generated Interrupt 10" "Disabled,Enabled" textline " " setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SGI9 ,Software Generated Interrupt 9" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SGI8 ,Software Generated Interrupt 8" "Disabled,Enabled" setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SGI7 ,Software Generated Interrupt 7" "Disabled,Enabled" textline " " setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SGI6 ,Software Generated Interrupt 6" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SGI5 ,Software Generated Interrupt 5" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SGI4 ,Software Generated Interrupt 4" "Disabled,Enabled" textline " " setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SGI3 ,Software Generated Interrupt 3" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SGI2 ,Software Generated Interrupt 2" "Disabled,Enabled" setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SGI1 ,Software Generated Interrupt 1" "Disabled,Enabled" line.long 0x4 "GICD_SET/CLR_PENDR1,Interrupt Set/Clear Pending Register 1" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PL_IPI3 ,OR of all IPIs targeted to the RPU PL3" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PL_IPI2 ,OR of all IPIs targeted to the RPU PL2" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PL_IPI1 ,OR of all IPIs targeted to the RPU PL1" "Disabled,Enabled" textline " " setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PL_IPI0 ,OR of all IPIs targeted to the RPU PL0" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " CLKMON ,Clock monitor coming from the CRL" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " RTC_SECONDS ,RTC seconds interrupt" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " RTC_ALARM ,RTC alarm interrupt" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " APM_LPD ,OR of all LPD APMs" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " CAN1 ,CAN1 interrupt." "Disabled,Enabled" textline " " setclrfld.long 0x04 22. 0x04 22. 0x84 22. " CAN0 ,CAN0 interrupt" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " UART1 ,UART1 interrupt" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " UART0 ,UART0 interrupt" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " SPI1 ,SPI1 interrupt" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " SPI0 ,SPI0 interrupt" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " I2C1 ,I2C1 interrupt" "Disabled,Enabled" textline " " setclrfld.long 0x04 16. 0x04 16. 0x84 16. " I2C0 ,I2C0 interrupt" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " GPIO ,GPIO interrupt" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " QSPI ,SPI interrupt" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " NAND ,NAND/NOR/SRAM static memory controller interrupt" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " RPU1_ECC ,RPU CPU1 ECC errors interrupt" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " RPU0_ECC ,RPU CPU0 ECC errors interrupt" "Disabled,Enabled" textline " " setclrfld.long 0x04 10. 0x04 10. 0x84 10. " LPD_APB_INT ,OR of all APB interrupts from the LPD" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " OCMINTR ,RPU interrupt (error)" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " RPU1_PERF_MON ,RPU performance monitor" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " RPU0_PERF_MON ,RPU performance monitor" "Disabled,Enabled" line.long 0x8 "GICD_SET/CLR_PENDR2,Interrupt Set/Clear Pending Register 2" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " GIGABITETH3_WAKEUP ,Gigabit Ethernet3 wakeup interrupt" "Disabled,Enabled" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " GIGABITETH3 ,Gigabit Ethernet3 interrupt" "Disabled,Enabled" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " GIGABITETH2_WAKEUP ,Gigabit Ethernet2 wakeup interrupt" "Disabled,Enabled" textline " " setclrfld.long 0x08 28. 0x08 28. 0x88 28. " GIGABITETH2 ,Gigabit Ethernet2 interrupt" "Disabled,Enabled" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " GIGABITETH_WAKEUP1 ,Gigabit Ethernet1 wakeup interrupt" "Disabled,Enabled" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " GIGABITETH1 ,Gigabit Ethernet1 interrupt" "Disabled,Enabled" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " GIGABITETH_WAKE0 ,Ethernet0 wakeup interrupt" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " GIGABITETH0 ,Ethernet0 interrupt" "Disabled,Enabled" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " AMS ,AMS interrupt" "Disabled,Enabled" textline " " setclrfld.long 0x08 22. 0x08 22. 0x88 22. " AIB_AXI ,AIB AXI interrupt" "Disabled,Enabled" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ATB_ERR_LPD ,ATB interrupt" "Disabled,Enabled" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " CSUPMU_WDT ,WDT in the CSU PMU" "Disabled,Enabled" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " LP_WDT ,Watchdog timer (WDT) in the LPD (IOU)" "Disabled,Enabled" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " SDIO1_WAKE ,SDIO1 wake interrupt" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " SDIO0_WAKE ,SDIO0 wake interrupt" "Disabled,Enabled" textline " " setclrfld.long 0x08 16. 0x08 16. 0x88 16. " SDIO1 ,SDIO1 interrupt" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " SDIO0 ,SDIO0 interrupt" "Disabled,Enabled" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " TTC3 ,Triple-timer counter 3" "Disabled,Enabled" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " TTC3 ,Triple-timer counter 3" "Disabled,Enabled" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " TTC3 ,Triple-timer counter 3" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " TTC2 ,Triple-timer counter 2" "Disabled,Enabled" textline " " setclrfld.long 0x08 10. 0x08 10. 0x88 10. " TTC2 ,Triple-timer counter 2" "Disabled,Enabled" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " TTC2 ,Triple-timer counter 2" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " TTC1 ,Triple-timer counter 1" "Disabled,Enabled" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " TTC1 ,Triple-timer counter 1" "Disabled,Enabled" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " TTC1 ,Triple-timer counter 1" "Disabled,Enabled" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " TTC0 ,Triple-timer counter 0" "Disabled,Enabled" textline " " setclrfld.long 0x08 4. 0x08 4. 0x88 4. " TTC0 ,Triple-timer counter 0" "Disabled,Enabled" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " TTC0 ,Triple-timer counter 0" "Disabled,Enabled" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " APU_IPI0 ,OR of all IPIs targeted to the APU CPU" "Disabled,Enabled" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " RPU_IPI1 ,OR of all IPIs targeted to the RPU CPU1" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " RPU_IPI0 ,OR of all IPIs targeted to the RPU CPU0" "Disabled,Enabled" line.long 0xC "GICD_SET/CLR_PENDR3,Interrupt Set/Clear Pending Register 3" setclrfld.long 0x0C 31. 0x0C 31. 0x8C 31. " PL_PS_GRP0_0 ,PL_PS IRQ[7]" "Disabled,Enabled" setclrfld.long 0x0C 30. 0x0C 30. 0x8C 30. " PL_PS_GRP0_0 ,PL_PS IRQ[6]" "Disabled,Enabled" setclrfld.long 0x0C 29. 0x0C 29. 0x8C 29. " PL_PS_GRP0_0 ,PL_PS IRQ[5]" "Disabled,Enabled" textline " " setclrfld.long 0x0C 28. 0x0C 28. 0x8C 28. " PL_PS_GRP0_0 ,PL_PS IRQ[4]" "Disabled,Enabled" setclrfld.long 0x0C 27. 0x0C 27. 0x8C 27. " PL_PS_GRP0_0 ,PL_PS IRQ[3]" "Disabled,Enabled" setclrfld.long 0x0C 26. 0x0C 26. 0x8C 26. " PL_PS_GRP0_0 ,PL_PS IRQ[2]" "Disabled,Enabled" textline " " setclrfld.long 0x0C 25. 0x0C 25. 0x8C 25. " PL_PS_GRP0_0 ,PL_PS IRQ[1]" "Disabled,Enabled" setclrfld.long 0x0C 24. 0x0C 24. 0x8C 24. " PL_PS_GRP0_0 ,PL_PS IRQ[0]" "Disabled,Enabled" setclrfld.long 0x0C 23. 0x0C 23. 0x8C 23. " XMPU_LPD ,XMPU error interrupt for the LPD" "Disabled,Enabled" textline " " setclrfld.long 0x0C 22. 0x0C 22. 0x8C 22. " EFUSE ,EFUSE interrupt" "Disabled,Enabled" setclrfld.long 0x0C 21. 0x0C 21. 0x8C 21. " CSU_DMA ,DMA for CSU interrupt" "Disabled,Enabled" setclrfld.long 0x0C 20. 0x0C 20. 0x8C 20. " CSU ,Device configuration module interrupt" "Disabled,Enabled" textline " " setclrfld.long 0x0C 19. 0x0C 19. 0x8C 19. " LPD-DMA_7 ,LPD-DMA channel 7" "Disabled,Enabled" setclrfld.long 0x0C 18. 0x0C 18. 0x8C 18. " LPD-DMA_6 ,LPD-DMA channel 6" "Disabled,Enabled" setclrfld.long 0x0C 17. 0x0C 17. 0x8C 17. " LPD-DMA_5 ,LPD-DMA channel 5" "Disabled,Enabled" textline " " setclrfld.long 0x0C 16. 0x0C 16. 0x8C 16. " LPD-DMA_4 ,LPD-DMA channel 4" "Disabled,Enabled" setclrfld.long 0x0C 15. 0x0C 15. 0x8C 15. " LPD-DMA_3 ,LPD-DMA channel 3" "Disabled,Enabled" setclrfld.long 0x0C 14. 0x0C 14. 0x8C 14. " LPD-DMA_2 ,LPD-DMA channel 2" "Disabled,Enabled" textline " " setclrfld.long 0x0C 13. 0x0C 13. 0x8C 13. " LPD-DMA_1 ,LPD-DMA channel 1" "Disabled,Enabled" setclrfld.long 0x0C 12. 0x0C 12. 0x8C 12. " LPD-DMA_0 ,LPD-DMA channel 0" "Disabled,Enabled" setclrfld.long 0x0C 11. 0x0C 11. 0x8C 11. " USB3_0_1_PMU_WKP ,Wakeup from USB3_1 to PMU" "Disabled,Enabled" textline " " setclrfld.long 0x0C 10. 0x0C 10. 0x8C 10. " USB3_0_1_PMU_WKP ,Wakeup from USB3_0 to PMU" "Disabled,Enabled" setclrfld.long 0x0C 9. 0x0C 9. 0x8C 9. " USB3_1_OTG ,USB3_1 OTG interrupt" "Disabled,Enabled" setclrfld.long 0x0C 8. 0x0C 8. 0x8C 8. " USB3_1_ENDPOINT ,USB3_1 Endpoint related interrupt" "Disabled,Enabled" textline " " setclrfld.long 0x0C 7. 0x0C 7. 0x8C 7. " USB3_1_ENDPOINT ,USB3_1 Endpoint related interrupt" "Disabled,Enabled" setclrfld.long 0x0C 6. 0x0C 6. 0x8C 6. " USB3_1_ENDPOINT ,USB3_1 Endpoint related interrupt" "Disabled,Enabled" setclrfld.long 0x0C 5. 0x0C 5. 0x8C 5. " USB3_1_ENDPOINT ,USB3_1 Endpoint related interrupt" "Disabled,Enabled" textline " " setclrfld.long 0x0C 4. 0x0C 4. 0x8C 4. " USB3_0_OTG ,USB3_0 OTG interrupt" "Disabled,Enabled" setclrfld.long 0x0C 3. 0x0C 3. 0x8C 3. " USB3_0_ENDPOINT ,USB3_0 Endpoint related interrupt" "Disabled,Enabled" setclrfld.long 0x0C 2. 0x0C 2. 0x8C 2. " USB3_0_ENDPOINT ,USB3_0 Endpoint related interrupt" "Disabled,Enabled" textline " " setclrfld.long 0x0C 1. 0x0C 1. 0x8C 1. " USB3_0_ENDPOINT ,USB3_0 Endpoint related interrupt" "Disabled,Enabled" setclrfld.long 0x0C 0. 0x0C 0. 0x8C 0. " USB3_0_ENDPOINT ,USB3_0 Endpoint related interrupt" "Disabled,Enabled" line.long 0x10 "GICD_SET/CLR_PENDR4,Interrupt Set/Clear Pending Register 4" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " APU_CPUMNT_0 ,VCPUMT[0]" "Disabled,Enabled" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " XMPU_FPD ,XMPU error interrupt for the FPD" "Disabled,Enabled" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " SATA ,SATA controller interrupt" "Disabled,Enabled" textline " " setclrfld.long 0x10 28. 0x10 28. 0x90 28. " GPU ,OR of all GPU interrupts" "Disabled,Enabled" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " FPD-DMA_7 ,Interrupts from the FPD-DMA 7" "Disabled,Enabled" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " FPD-DMA_6 ,Interrupts from the FPD-DMA 6" "Disabled,Enabled" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " FPD-DMA_5 ,Interrupts from the FPD-DMA 5" "Disabled,Enabled" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " FPD-DMA_4 ,Interrupts from the FPD-DMA 4" "Disabled,Enabled" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " FPD-DMA_3 ,Interrupts from the FPD-DMA 3" "Disabled,Enabled" textline " " setclrfld.long 0x10 22. 0x10 22. 0x90 22. " FPD-DMA_2 ,Interrupts from the FPD-DMA 2" "Disabled,Enabled" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " FPD-DMA_1 ,Interrupts from the FPD-DMA 1" "Disabled,Enabled" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " FPD-DMA_0 ,Interrupts from the FPD-DMA 0" "Disabled,Enabled" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " APM_FPD ,OR of all APMs for the FPD" "Disabled,Enabled" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " DPDMA_INT ,DisplayPort DMA interrupt" "Disabled,Enabled" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " FPD_ATB_ERROR ,ATB interrupt for the FPD" "Disabled,Enabled" textline " " setclrfld.long 0x10 16. 0x10 16. 0x90 16. " FPD_APB_INT ,OR of all APB interrupts from the LPD" "Disabled,Enabled" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " DPORT ,DisplayPort general-purpose interrupt" "Disabled,Enabled" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PCIE_MSC ,PCIe miscellaneous interrupts" "Disabled,Enabled" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PCIE_DMA ,PCIe bridge DMA interrupts" "Disabled,Enabled" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PCIE_LEGACY ,PCIe legacy (INTA/BC/D) interrupts" "Disabled,Enabled" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PCIE_MSI ,PCIe interrupt for MSI vectors 63 to 32" "Disabled,Enabled" textline " " setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PCIE_MSI ,PCIe interrupt for MSI vectors 31 to 0" "Disabled,Enabled" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " FP_WDT ,Top-level watchdog timer interrupt" "Disabled,Enabled" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " DDR_SS ,DDR controller subsystem interrupt" "Disabled,Enabled" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PL_PS_GRP1 ,PL_PS IRQ[15]" "Disabled,Enabled" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PL_PS_GRP1 ,PL_PS IRQ[14]" "Disabled,Enabled" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PL_PS_GRP1 ,PL_PS IRQ[13]" "Disabled,Enabled" textline " " setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PL_PS_GRP1 ,PL_PS IRQ[12]" "Disabled,Enabled" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PL_PS_GRP1 ,PL_PS IRQ[11]" "Disabled,Enabled" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PL_PS_GRP1 ,PL_PS IRQ[10]" "Disabled,Enabled" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PL_PS_GRP1 ,PL_PS IRQ[9]" "Disabled,Enabled" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PL_PS_GRP1 ,PL_PS IRQ[8]" "Disabled,Enabled" line.long 0x14 "GICD_SET/CLR_PENDR5,Interrupt Set/Clear Pending Register 5" setclrfld.long 0x14 19. 0x14 19. 0x94 19. " INTF_FPD_SMMU ,SMMU (from int_fpd)" "Disabled,Enabled" setclrfld.long 0x14 18. 0x14 18. 0x94 18. " INTF_PPD_CCI ,CCI (from int_fpd)" "Disabled,Enabled" setclrfld.long 0x14 17. 0x14 17. 0x94 17. " APU_REGS ,REGS" "Disabled,Enabled" textline " " setclrfld.long 0x14 16. 0x14 16. 0x94 16. " APU_EXTERR ,EXTERR" "Disabled,Enabled" setclrfld.long 0x14 15. 0x14 15. 0x94 15. " APU_L2ERR ,EXT error" "Disabled,Enabled" setclrfld.long 0x14 14. 0x14 14. 0x94 14. " APU_COMM_3 ,L2 error[3]" "Disabled,Enabled" textline " " setclrfld.long 0x14 13. 0x14 13. 0x94 13. " APU_COMM_2 ,L2 error[2]" "Disabled,Enabled" setclrfld.long 0x14 12. 0x14 12. 0x94 12. " APU_COMM_1 ,L2 error[1]" "Disabled,Enabled" setclrfld.long 0x14 11. 0x14 11. 0x94 11. " APU_COMM_0 ,L2 error[0]" "Disabled,Enabled" textline " " setclrfld.long 0x14 10. 0x14 10. 0x94 10. " APU_PMU_3 ,Performance monitor unit[3]" "Disabled,Enabled" setclrfld.long 0x14 9. 0x14 9. 0x94 9. " APU_PMU_2 ,Performance monitor unit[2]" "Disabled,Enabled" setclrfld.long 0x14 8. 0x14 8. 0x94 8. " APU_PMU_1 ,Performance monitor unit[1]" "Disabled,Enabled" textline " " setclrfld.long 0x14 7. 0x14 7. 0x94 7. " APU_PMU_0 ,Performance monitor unit[0]" "Disabled,Enabled" setclrfld.long 0x14 6. 0x14 6. 0x94 6. " APU_CTI_3 ,CTI[3]" "Disabled,Enabled" setclrfld.long 0x14 5. 0x14 5. 0x94 5. " APU_CTI_2 ,CTI[2]" "Disabled,Enabled" textline " " setclrfld.long 0x14 4. 0x14 4. 0x94 4. " APU_CTI_1 ,CTI[1]" "Disabled,Enabled" setclrfld.long 0x14 3. 0x14 3. 0x94 3. " APU_CTI_0 ,CTI[0]" "Disabled,Enabled" setclrfld.long 0x14 2. 0x14 2. 0x94 2. " APU_CPUMNT_3 ,VCPUMT[3]" "Disabled,Enabled" textline " " setclrfld.long 0x14 1. 0x14 1. 0x94 1. " APU_CPUMNT_2 ,VCPUMT[2]" "Disabled,Enabled" setclrfld.long 0x14 0. 0x14 0. 0x94 0. " APU_CPUMNT_1 ,VCPUMT[1]" "Disabled,Enabled" tree.end tree "Set/Clear Active Registers" group.long 0x10300++0x17 line.long 0x0 "GICD_SET/CLR_ACTIVER0,Interrupt Set/Clear Active Register 0" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PPI31 ,Legacy IRQ from programmable logic (PL)" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PPI30 ,Non-secure physical timer event" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PPI29 ,Secure physical timer event" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PPI28 ,Legacy nFIQ from programmable logic (PL)" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PPI27 ,Virtual timer event" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PPI26 ,Hypervisor timer event" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PPI25 ,Virtual maintenance interrupt" "Disabled,Enabled" textline " " setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SGI15 ,Software Generated Interrupt 15" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SGI14 ,Software Generated Interrupt 14" "Disabled,Enabled" setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SGI13 ,Software Generated Interrupt 13" "Disabled,Enabled" textline " " setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SGI12 ,Software Generated Interrupt 12" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SGI11 ,Software Generated Interrupt 11" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SGI10 ,Software Generated Interrupt 10" "Disabled,Enabled" textline " " setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SGI9 ,Software Generated Interrupt 9" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SGI8 ,Software Generated Interrupt 8" "Disabled,Enabled" setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SGI7 ,Software Generated Interrupt 7" "Disabled,Enabled" textline " " setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SGI6 ,Software Generated Interrupt 6" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SGI5 ,Software Generated Interrupt 5" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SGI4 ,Software Generated Interrupt 4" "Disabled,Enabled" textline " " setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SGI3 ,Software Generated Interrupt 3" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SGI2 ,Software Generated Interrupt 2" "Disabled,Enabled" setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SGI1 ,Software Generated Interrupt 1" "Disabled,Enabled" line.long 0x4 "GICD_SET/CLR_ACTIVER1,Interrupt Set/Clear Active Register 1" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PL_IPI3 ,OR of all IPIs targeted to the RPU PL3" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PL_IPI2 ,OR of all IPIs targeted to the RPU PL2" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PL_IPI1 ,OR of all IPIs targeted to the RPU PL1" "Disabled,Enabled" textline " " setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PL_IPI0 ,OR of all IPIs targeted to the RPU PL0" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " CLKMON ,Clock monitor coming from the CRL" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " RTC_SECONDS ,RTC seconds interrupt" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " RTC_ALARM ,RTC alarm interrupt" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " APM_LPD ,OR of all LPD APMs" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " CAN1 ,CAN1 interrupt." "Disabled,Enabled" textline " " setclrfld.long 0x04 22. 0x04 22. 0x84 22. " CAN0 ,CAN0 interrupt" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " UART1 ,UART1 interrupt" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " UART0 ,UART0 interrupt" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " SPI1 ,SPI1 interrupt" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " SPI0 ,SPI0 interrupt" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " I2C1 ,I2C1 interrupt" "Disabled,Enabled" textline " " setclrfld.long 0x04 16. 0x04 16. 0x84 16. " I2C0 ,I2C0 interrupt" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " GPIO ,GPIO interrupt" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " QSPI ,SPI interrupt" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " NAND ,NAND/NOR/SRAM static memory controller interrupt" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " RPU1_ECC ,RPU CPU1 ECC errors interrupt" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " RPU0_ECC ,RPU CPU0 ECC errors interrupt" "Disabled,Enabled" textline " " setclrfld.long 0x04 10. 0x04 10. 0x84 10. " LPD_APB_INT ,OR of all APB interrupts from the LPD" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " OCMINTR ,RPU interrupt (error)" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " RPU1_PERF_MON ,RPU performance monitor" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " RPU0_PERF_MON ,RPU performance monitor" "Disabled,Enabled" line.long 0x8 "GICD_SET/CLR_ACTIVER2,Interrupt Set/Clear Active Register 2" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " GIGABITETH3_WAKEUP ,Gigabit Ethernet3 wakeup interrupt" "Disabled,Enabled" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " GIGABITETH3 ,Gigabit Ethernet3 interrupt" "Disabled,Enabled" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " GIGABITETH2_WAKEUP ,Gigabit Ethernet2 wakeup interrupt" "Disabled,Enabled" textline " " setclrfld.long 0x08 28. 0x08 28. 0x88 28. " GIGABITETH2 ,Gigabit Ethernet2 interrupt" "Disabled,Enabled" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " GIGABITETH_WAKEUP1 ,Gigabit Ethernet1 wakeup interrupt" "Disabled,Enabled" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " GIGABITETH1 ,Gigabit Ethernet1 interrupt" "Disabled,Enabled" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " GIGABITETH_WAKE0 ,Ethernet0 wakeup interrupt" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " GIGABITETH0 ,Ethernet0 interrupt" "Disabled,Enabled" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " AMS ,AMS interrupt" "Disabled,Enabled" textline " " setclrfld.long 0x08 22. 0x08 22. 0x88 22. " AIB_AXI ,AIB AXI interrupt" "Disabled,Enabled" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ATB_ERR_LPD ,ATB interrupt" "Disabled,Enabled" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " CSUPMU_WDT ,WDT in the CSU PMU" "Disabled,Enabled" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " LP_WDT ,Watchdog timer (WDT) in the LPD (IOU)" "Disabled,Enabled" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " SDIO1_WAKE ,SDIO1 wake interrupt" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " SDIO0_WAKE ,SDIO0 wake interrupt" "Disabled,Enabled" textline " " setclrfld.long 0x08 16. 0x08 16. 0x88 16. " SDIO1 ,SDIO1 interrupt" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " SDIO0 ,SDIO0 interrupt" "Disabled,Enabled" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " TTC3 ,Triple-timer counter 3" "Disabled,Enabled" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " TTC3 ,Triple-timer counter 3" "Disabled,Enabled" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " TTC3 ,Triple-timer counter 3" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " TTC2 ,Triple-timer counter 2" "Disabled,Enabled" textline " " setclrfld.long 0x08 10. 0x08 10. 0x88 10. " TTC2 ,Triple-timer counter 2" "Disabled,Enabled" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " TTC2 ,Triple-timer counter 2" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " TTC1 ,Triple-timer counter 1" "Disabled,Enabled" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " TTC1 ,Triple-timer counter 1" "Disabled,Enabled" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " TTC1 ,Triple-timer counter 1" "Disabled,Enabled" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " TTC0 ,Triple-timer counter 0" "Disabled,Enabled" textline " " setclrfld.long 0x08 4. 0x08 4. 0x88 4. " TTC0 ,Triple-timer counter 0" "Disabled,Enabled" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " TTC0 ,Triple-timer counter 0" "Disabled,Enabled" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " APU_IPI0 ,OR of all IPIs targeted to the APU CPU" "Disabled,Enabled" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " RPU_IPI1 ,OR of all IPIs targeted to the RPU CPU1" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " RPU_IPI0 ,OR of all IPIs targeted to the RPU CPU0" "Disabled,Enabled" line.long 0xC "GICD_SET/CLR_ACTIVER3,Interrupt Set/Clear Active Register 3" setclrfld.long 0x0C 31. 0x0C 31. 0x8C 31. " PL_PS_GRP0_0 ,PL_PS IRQ[7]" "Disabled,Enabled" setclrfld.long 0x0C 30. 0x0C 30. 0x8C 30. " PL_PS_GRP0_0 ,PL_PS IRQ[6]" "Disabled,Enabled" setclrfld.long 0x0C 29. 0x0C 29. 0x8C 29. " PL_PS_GRP0_0 ,PL_PS IRQ[5]" "Disabled,Enabled" textline " " setclrfld.long 0x0C 28. 0x0C 28. 0x8C 28. " PL_PS_GRP0_0 ,PL_PS IRQ[4]" "Disabled,Enabled" setclrfld.long 0x0C 27. 0x0C 27. 0x8C 27. " PL_PS_GRP0_0 ,PL_PS IRQ[3]" "Disabled,Enabled" setclrfld.long 0x0C 26. 0x0C 26. 0x8C 26. " PL_PS_GRP0_0 ,PL_PS IRQ[2]" "Disabled,Enabled" textline " " setclrfld.long 0x0C 25. 0x0C 25. 0x8C 25. " PL_PS_GRP0_0 ,PL_PS IRQ[1]" "Disabled,Enabled" setclrfld.long 0x0C 24. 0x0C 24. 0x8C 24. " PL_PS_GRP0_0 ,PL_PS IRQ[0]" "Disabled,Enabled" setclrfld.long 0x0C 23. 0x0C 23. 0x8C 23. " XMPU_LPD ,XMPU error interrupt for the LPD" "Disabled,Enabled" textline " " setclrfld.long 0x0C 22. 0x0C 22. 0x8C 22. " EFUSE ,EFUSE interrupt" "Disabled,Enabled" setclrfld.long 0x0C 21. 0x0C 21. 0x8C 21. " CSU_DMA ,DMA for CSU interrupt" "Disabled,Enabled" setclrfld.long 0x0C 20. 0x0C 20. 0x8C 20. " CSU ,Device configuration module interrupt" "Disabled,Enabled" textline " " setclrfld.long 0x0C 19. 0x0C 19. 0x8C 19. " LPD-DMA_7 ,LPD-DMA channel 7" "Disabled,Enabled" setclrfld.long 0x0C 18. 0x0C 18. 0x8C 18. " LPD-DMA_6 ,LPD-DMA channel 6" "Disabled,Enabled" setclrfld.long 0x0C 17. 0x0C 17. 0x8C 17. " LPD-DMA_5 ,LPD-DMA channel 5" "Disabled,Enabled" textline " " setclrfld.long 0x0C 16. 0x0C 16. 0x8C 16. " LPD-DMA_4 ,LPD-DMA channel 4" "Disabled,Enabled" setclrfld.long 0x0C 15. 0x0C 15. 0x8C 15. " LPD-DMA_3 ,LPD-DMA channel 3" "Disabled,Enabled" setclrfld.long 0x0C 14. 0x0C 14. 0x8C 14. " LPD-DMA_2 ,LPD-DMA channel 2" "Disabled,Enabled" textline " " setclrfld.long 0x0C 13. 0x0C 13. 0x8C 13. " LPD-DMA_1 ,LPD-DMA channel 1" "Disabled,Enabled" setclrfld.long 0x0C 12. 0x0C 12. 0x8C 12. " LPD-DMA_0 ,LPD-DMA channel 0" "Disabled,Enabled" setclrfld.long 0x0C 11. 0x0C 11. 0x8C 11. " USB3_0_1_PMU_WKP ,Wakeup from USB3_1 to PMU" "Disabled,Enabled" textline " " setclrfld.long 0x0C 10. 0x0C 10. 0x8C 10. " USB3_0_1_PMU_WKP ,Wakeup from USB3_0 to PMU" "Disabled,Enabled" setclrfld.long 0x0C 9. 0x0C 9. 0x8C 9. " USB3_1_OTG ,USB3_1 OTG interrupt" "Disabled,Enabled" setclrfld.long 0x0C 8. 0x0C 8. 0x8C 8. " USB3_1_ENDPOINT ,USB3_1 Endpoint related interrupt" "Disabled,Enabled" textline " " setclrfld.long 0x0C 7. 0x0C 7. 0x8C 7. " USB3_1_ENDPOINT ,USB3_1 Endpoint related interrupt" "Disabled,Enabled" setclrfld.long 0x0C 6. 0x0C 6. 0x8C 6. " USB3_1_ENDPOINT ,USB3_1 Endpoint related interrupt" "Disabled,Enabled" setclrfld.long 0x0C 5. 0x0C 5. 0x8C 5. " USB3_1_ENDPOINT ,USB3_1 Endpoint related interrupt" "Disabled,Enabled" textline " " setclrfld.long 0x0C 4. 0x0C 4. 0x8C 4. " USB3_0_OTG ,USB3_0 OTG interrupt" "Disabled,Enabled" setclrfld.long 0x0C 3. 0x0C 3. 0x8C 3. " USB3_0_ENDPOINT ,USB3_0 Endpoint related interrupt" "Disabled,Enabled" setclrfld.long 0x0C 2. 0x0C 2. 0x8C 2. " USB3_0_ENDPOINT ,USB3_0 Endpoint related interrupt" "Disabled,Enabled" textline " " setclrfld.long 0x0C 1. 0x0C 1. 0x8C 1. " USB3_0_ENDPOINT ,USB3_0 Endpoint related interrupt" "Disabled,Enabled" setclrfld.long 0x0C 0. 0x0C 0. 0x8C 0. " USB3_0_ENDPOINT ,USB3_0 Endpoint related interrupt" "Disabled,Enabled" line.long 0x10 "GICD_SET/CLR_ACTIVER4,Interrupt Set/Clear Active Register 4" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " APU_CPUMNT_0 ,VCPUMT[0]" "Disabled,Enabled" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " XMPU_FPD ,XMPU error interrupt for the FPD" "Disabled,Enabled" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " SATA ,SATA controller interrupt" "Disabled,Enabled" textline " " setclrfld.long 0x10 28. 0x10 28. 0x90 28. " GPU ,OR of all GPU interrupts" "Disabled,Enabled" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " FPD-DMA_7 ,Interrupts from the FPD-DMA 7" "Disabled,Enabled" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " FPD-DMA_6 ,Interrupts from the FPD-DMA 6" "Disabled,Enabled" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " FPD-DMA_5 ,Interrupts from the FPD-DMA 5" "Disabled,Enabled" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " FPD-DMA_4 ,Interrupts from the FPD-DMA 4" "Disabled,Enabled" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " FPD-DMA_3 ,Interrupts from the FPD-DMA 3" "Disabled,Enabled" textline " " setclrfld.long 0x10 22. 0x10 22. 0x90 22. " FPD-DMA_2 ,Interrupts from the FPD-DMA 2" "Disabled,Enabled" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " FPD-DMA_1 ,Interrupts from the FPD-DMA 1" "Disabled,Enabled" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " FPD-DMA_0 ,Interrupts from the FPD-DMA 0" "Disabled,Enabled" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " APM_FPD ,OR of all APMs for the FPD" "Disabled,Enabled" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " DPDMA_INT ,DisplayPort DMA interrupt" "Disabled,Enabled" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " FPD_ATB_ERROR ,ATB interrupt for the FPD" "Disabled,Enabled" textline " " setclrfld.long 0x10 16. 0x10 16. 0x90 16. " FPD_APB_INT ,OR of all APB interrupts from the LPD" "Disabled,Enabled" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " DPORT ,DisplayPort general-purpose interrupt" "Disabled,Enabled" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PCIE_MSC ,PCIe miscellaneous interrupts" "Disabled,Enabled" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PCIE_DMA ,PCIe bridge DMA interrupts" "Disabled,Enabled" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PCIE_LEGACY ,PCIe legacy (INTA/BC/D) interrupts" "Disabled,Enabled" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PCIE_MSI ,PCIe interrupt for MSI vectors 63 to 32" "Disabled,Enabled" textline " " setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PCIE_MSI ,PCIe interrupt for MSI vectors 31 to 0" "Disabled,Enabled" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " FP_WDT ,Top-level watchdog timer interrupt" "Disabled,Enabled" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " DDR_SS ,DDR controller subsystem interrupt" "Disabled,Enabled" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PL_PS_GRP1 ,PL_PS IRQ[15]" "Disabled,Enabled" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PL_PS_GRP1 ,PL_PS IRQ[14]" "Disabled,Enabled" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PL_PS_GRP1 ,PL_PS IRQ[13]" "Disabled,Enabled" textline " " setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PL_PS_GRP1 ,PL_PS IRQ[12]" "Disabled,Enabled" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PL_PS_GRP1 ,PL_PS IRQ[11]" "Disabled,Enabled" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PL_PS_GRP1 ,PL_PS IRQ[10]" "Disabled,Enabled" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PL_PS_GRP1 ,PL_PS IRQ[9]" "Disabled,Enabled" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PL_PS_GRP1 ,PL_PS IRQ[8]" "Disabled,Enabled" line.long 0x14 "GICD_SET/CLR_ACTIVER5,Interrupt Set/Clear Active Register 5" setclrfld.long 0x14 19. 0x14 19. 0x94 19. " INTF_FPD_SMMU ,SMMU (from int_fpd)" "Disabled,Enabled" setclrfld.long 0x14 18. 0x14 18. 0x94 18. " INTF_PPD_CCI ,CCI (from int_fpd)" "Disabled,Enabled" setclrfld.long 0x14 17. 0x14 17. 0x94 17. " APU_REGS ,REGS" "Disabled,Enabled" textline " " setclrfld.long 0x14 16. 0x14 16. 0x94 16. " APU_EXTERR ,EXTERR" "Disabled,Enabled" setclrfld.long 0x14 15. 0x14 15. 0x94 15. " APU_L2ERR ,EXT error" "Disabled,Enabled" setclrfld.long 0x14 14. 0x14 14. 0x94 14. " APU_COMM_3 ,L2 error[3]" "Disabled,Enabled" textline " " setclrfld.long 0x14 13. 0x14 13. 0x94 13. " APU_COMM_2 ,L2 error[2]" "Disabled,Enabled" setclrfld.long 0x14 12. 0x14 12. 0x94 12. " APU_COMM_1 ,L2 error[1]" "Disabled,Enabled" setclrfld.long 0x14 11. 0x14 11. 0x94 11. " APU_COMM_0 ,L2 error[0]" "Disabled,Enabled" textline " " setclrfld.long 0x14 10. 0x14 10. 0x94 10. " APU_PMU_3 ,Performance monitor unit[3]" "Disabled,Enabled" setclrfld.long 0x14 9. 0x14 9. 0x94 9. " APU_PMU_2 ,Performance monitor unit[2]" "Disabled,Enabled" setclrfld.long 0x14 8. 0x14 8. 0x94 8. " APU_PMU_1 ,Performance monitor unit[1]" "Disabled,Enabled" textline " " setclrfld.long 0x14 7. 0x14 7. 0x94 7. " APU_PMU_0 ,Performance monitor unit[0]" "Disabled,Enabled" setclrfld.long 0x14 6. 0x14 6. 0x94 6. " APU_CTI_3 ,CTI[3]" "Disabled,Enabled" setclrfld.long 0x14 5. 0x14 5. 0x94 5. " APU_CTI_2 ,CTI[2]" "Disabled,Enabled" textline " " setclrfld.long 0x14 4. 0x14 4. 0x94 4. " APU_CTI_1 ,CTI[1]" "Disabled,Enabled" setclrfld.long 0x14 3. 0x14 3. 0x94 3. " APU_CTI_0 ,CTI[0]" "Disabled,Enabled" setclrfld.long 0x14 2. 0x14 2. 0x94 2. " APU_CPUMNT_3 ,VCPUMT[3]" "Disabled,Enabled" textline " " setclrfld.long 0x14 1. 0x14 1. 0x94 1. " APU_CPUMNT_2 ,VCPUMT[2]" "Disabled,Enabled" setclrfld.long 0x14 0. 0x14 0. 0x94 0. " APU_CPUMNT_1 ,VCPUMT[1]" "Disabled,Enabled" tree.end width 19. tree "Interrupt Priority Registers" group.long 0x10400++0x03 line.long 0x00 "GICD_IPRIORITYR0,Interrupt Priority Register 0" group.long 0x10404++0x03 line.long 0x00 "GICD_IPRIORITYR1,Interrupt Priority Register 1" group.long 0x10408++0x03 line.long 0x00 "GICD_IPRIORITYR2,Interrupt Priority Register 2" group.long 0x1040C++0x03 line.long 0x00 "GICD_IPRIORITYR3,Interrupt Priority Register 3" group.long 0x10410++0x03 line.long 0x00 "GICD_IPRIORITYR4,Interrupt Priority Register 4" group.long 0x10414++0x03 line.long 0x00 "GICD_IPRIORITYR5,Interrupt Priority Register 5" group.long 0x10418++0x03 line.long 0x00 "GICD_IPRIORITYR6,Interrupt Priority Register 6" group.long 0x1041C++0x03 line.long 0x00 "GICD_IPRIORITYR7,Interrupt Priority Register 7" group.long 0x10420++0x03 line.long 0x00 "GICD_IPRIORITYR8,Interrupt Priority Register 8" group.long 0x10424++0x03 line.long 0x00 "GICD_IPRIORITYR9,Interrupt Priority Register 9" group.long 0x10428++0x03 line.long 0x00 "GICD_IPRIORITYR10,Interrupt Priority Register 10" group.long 0x1042C++0x03 line.long 0x00 "GICD_IPRIORITYR11,Interrupt Priority Register 11" group.long 0x10430++0x03 line.long 0x00 "GICD_IPRIORITYR12,Interrupt Priority Register 12" group.long 0x10434++0x03 line.long 0x00 "GICD_IPRIORITYR13,Interrupt Priority Register 13" group.long 0x10438++0x03 line.long 0x00 "GICD_IPRIORITYR14,Interrupt Priority Register 14" group.long 0x1043C++0x03 line.long 0x00 "GICD_IPRIORITYR15,Interrupt Priority Register 15" group.long 0x10440++0x03 line.long 0x00 "GICD_IPRIORITYR16,Interrupt Priority Register 16" group.long 0x10444++0x03 line.long 0x00 "GICD_IPRIORITYR17,Interrupt Priority Register 17" group.long 0x10448++0x03 line.long 0x00 "GICD_IPRIORITYR18,Interrupt Priority Register 18" group.long 0x1044C++0x03 line.long 0x00 "GICD_IPRIORITYR19,Interrupt Priority Register 19" group.long 0x10450++0x03 line.long 0x00 "GICD_IPRIORITYR20,Interrupt Priority Register 20" group.long 0x10454++0x03 line.long 0x00 "GICD_IPRIORITYR21,Interrupt Priority Register 21" group.long 0x10458++0x03 line.long 0x00 "GICD_IPRIORITYR22,Interrupt Priority Register 22" group.long 0x1045C++0x03 line.long 0x00 "GICD_IPRIORITYR23,Interrupt Priority Register 23" group.long 0x10460++0x03 line.long 0x00 "GICD_IPRIORITYR24,Interrupt Priority Register 24" group.long 0x10464++0x03 line.long 0x00 "GICD_IPRIORITYR25,Interrupt Priority Register 25" group.long 0x10468++0x03 line.long 0x00 "GICD_IPRIORITYR26,Interrupt Priority Register 26" group.long 0x1046C++0x03 line.long 0x00 "GICD_IPRIORITYR27,Interrupt Priority Register 27" group.long 0x10470++0x03 line.long 0x00 "GICD_IPRIORITYR28,Interrupt Priority Register 28" group.long 0x10474++0x03 line.long 0x00 "GICD_IPRIORITYR29,Interrupt Priority Register 29" group.long 0x10478++0x03 line.long 0x00 "GICD_IPRIORITYR30,Interrupt Priority Register 30" group.long 0x1047C++0x03 line.long 0x00 "GICD_IPRIORITYR31,Interrupt Priority Register 31" group.long 0x10480++0x03 line.long 0x00 "GICD_IPRIORITYR32,Interrupt Priority Register 32" group.long 0x10484++0x03 line.long 0x00 "GICD_IPRIORITYR33,Interrupt Priority Register 33" group.long 0x10488++0x03 line.long 0x00 "GICD_IPRIORITYR34,Interrupt Priority Register 34" group.long 0x1048C++0x03 line.long 0x00 "GICD_IPRIORITYR35,Interrupt Priority Register 35" group.long 0x10490++0x03 line.long 0x00 "GICD_IPRIORITYR36,Interrupt Priority Register 36" group.long 0x10494++0x03 line.long 0x00 "GICD_IPRIORITYR37,Interrupt Priority Register 37" group.long 0x10498++0x03 line.long 0x00 "GICD_IPRIORITYR38,Interrupt Priority Register 38" group.long 0x1049C++0x03 line.long 0x00 "GICD_IPRIORITYR39,Interrupt Priority Register 39" group.long 0x104A0++0x03 line.long 0x00 "GICD_IPRIORITYR40,Interrupt Priority Register 40" group.long 0x104A4++0x03 line.long 0x00 "GICD_IPRIORITYR41,Interrupt Priority Register 41" group.long 0x104A8++0x03 line.long 0x00 "GICD_IPRIORITYR42,Interrupt Priority Register 42" group.long 0x104AC++0x03 line.long 0x00 "GICD_IPRIORITYR43,Interrupt Priority Register 43" group.long 0x104B0++0x03 line.long 0x00 "GICD_IPRIORITYR44,Interrupt Priority Register 44" group.long 0x104B4++0x03 line.long 0x00 "GICD_IPRIORITYR45,Interrupt Priority Register 45" group.long 0x104B8++0x03 line.long 0x00 "GICD_IPRIORITYR46,Interrupt Priority Register 46" group.long 0x104BC++0x03 line.long 0x00 "GICD_IPRIORITYR47,Interrupt Priority Register 47" tree.end tree "Interrupt Processor Targets Registers" rgroup.long 0x10800++0x03 line.long 0x00 "GICD_ITARGETSR0,Interrupt Processor Targets Register 0" rgroup.long 0x10804++0x03 line.long 0x00 "GICD_ITARGETSR1,Interrupt Processor Targets Register 1" rgroup.long 0x10808++0x03 line.long 0x00 "GICD_ITARGETSR2,Interrupt Processor Targets Register 2" rgroup.long 0x1080C++0x03 line.long 0x00 "GICD_ITARGETSR3,Interrupt Processor Targets Register 3" rgroup.long 0x10810++0x03 line.long 0x00 "GICD_ITARGETSR4,Interrupt Processor Targets Register 4" rgroup.long 0x10814++0x03 line.long 0x00 "GICD_ITARGETSR5,Interrupt Processor Targets Register 5" rgroup.long 0x10818++0x03 line.long 0x00 "GICD_ITARGETSR6,Interrupt Processor Targets Register 6" rgroup.long 0x1081C++0x03 line.long 0x00 "GICD_ITARGETSR7,Interrupt Processor Targets Register 7" group.long 0x10820++0x03 line.long 0x00 "GICD_ITARGETSR8,Interrupt Processor Targets Register 8" group.long 0x10824++0x03 line.long 0x00 "GICD_ITARGETSR9,Interrupt Processor Targets Register 9" group.long 0x10828++0x03 line.long 0x00 "GICD_ITARGETSR10,Interrupt Processor Targets Register 10" group.long 0x1082C++0x03 line.long 0x00 "GICD_ITARGETSR11,Interrupt Processor Targets Register 11" group.long 0x10830++0x03 line.long 0x00 "GICD_ITARGETSR12,Interrupt Processor Targets Register 12" group.long 0x10834++0x03 line.long 0x00 "GICD_ITARGETSR13,Interrupt Processor Targets Register 13" group.long 0x10838++0x03 line.long 0x00 "GICD_ITARGETSR14,Interrupt Processor Targets Register 14" group.long 0x1083C++0x03 line.long 0x00 "GICD_ITARGETSR15,Interrupt Processor Targets Register 15" group.long 0x10840++0x03 line.long 0x00 "GICD_ITARGETSR16,Interrupt Processor Targets Register 16" group.long 0x10844++0x03 line.long 0x00 "GICD_ITARGETSR17,Interrupt Processor Targets Register 17" group.long 0x10848++0x03 line.long 0x00 "GICD_ITARGETSR18,Interrupt Processor Targets Register 18" group.long 0x1084C++0x03 line.long 0x00 "GICD_ITARGETSR19,Interrupt Processor Targets Register 19" group.long 0x10850++0x03 line.long 0x00 "GICD_ITARGETSR20,Interrupt Processor Targets Register 20" group.long 0x10854++0x03 line.long 0x00 "GICD_ITARGETSR21,Interrupt Processor Targets Register 21" group.long 0x10858++0x03 line.long 0x00 "GICD_ITARGETSR22,Interrupt Processor Targets Register 22" group.long 0x1085C++0x03 line.long 0x00 "GICD_ITARGETSR23,Interrupt Processor Targets Register 23" group.long 0x10860++0x03 line.long 0x00 "GICD_ITARGETSR24,Interrupt Processor Targets Register 24" group.long 0x10864++0x03 line.long 0x00 "GICD_ITARGETSR25,Interrupt Processor Targets Register 25" group.long 0x10868++0x03 line.long 0x00 "GICD_ITARGETSR26,Interrupt Processor Targets Register 26" group.long 0x1086C++0x03 line.long 0x00 "GICD_ITARGETSR27,Interrupt Processor Targets Register 27" group.long 0x10870++0x03 line.long 0x00 "GICD_ITARGETSR28,Interrupt Processor Targets Register 28" group.long 0x10874++0x03 line.long 0x00 "GICD_ITARGETSR29,Interrupt Processor Targets Register 29" group.long 0x10878++0x03 line.long 0x00 "GICD_ITARGETSR30,Interrupt Processor Targets Register 30" group.long 0x1087C++0x03 line.long 0x00 "GICD_ITARGETSR31,Interrupt Processor Targets Register 31" group.long 0x10880++0x03 line.long 0x00 "GICD_ITARGETSR32,Interrupt Processor Targets Register 32" group.long 0x10884++0x03 line.long 0x00 "GICD_ITARGETSR33,Interrupt Processor Targets Register 33" group.long 0x10888++0x03 line.long 0x00 "GICD_ITARGETSR34,Interrupt Processor Targets Register 34" group.long 0x1088C++0x03 line.long 0x00 "GICD_ITARGETSR35,Interrupt Processor Targets Register 35" group.long 0x10890++0x03 line.long 0x00 "GICD_ITARGETSR36,Interrupt Processor Targets Register 36" group.long 0x10894++0x03 line.long 0x00 "GICD_ITARGETSR37,Interrupt Processor Targets Register 37" group.long 0x10898++0x03 line.long 0x00 "GICD_ITARGETSR38,Interrupt Processor Targets Register 38" group.long 0x1089C++0x03 line.long 0x00 "GICD_ITARGETSR39,Interrupt Processor Targets Register 39" group.long 0x108A0++0x03 line.long 0x00 "GICD_ITARGETSR40,Interrupt Processor Targets Register 40" group.long 0x108A4++0x03 line.long 0x00 "GICD_ITARGETSR41,Interrupt Processor Targets Register 41" group.long 0x108A8++0x03 line.long 0x00 "GICD_ITARGETSR42,Interrupt Processor Targets Register 42" group.long 0x108AC++0x03 line.long 0x00 "GICD_ITARGETSR43,Interrupt Processor Targets Register 43" group.long 0x108B0++0x03 line.long 0x00 "GICD_ITARGETSR44,Interrupt Processor Targets Register 44" group.long 0x108B4++0x03 line.long 0x00 "GICD_ITARGETSR45,Interrupt Processor Targets Register 45" group.long 0x108B8++0x03 line.long 0x00 "GICD_ITARGETSR46,Interrupt Processor Targets Register 46" group.long 0x108BC++0x03 line.long 0x00 "GICD_ITARGETSR47,Interrupt Processor Targets Register 47" tree.end tree "Interrupt Configuration Registers" rgroup.long 0x10C00++0x07 line.long 0x00 "GICD_ICFGR0,Interrupt Configuration Register 0" line.long 0x04 "GICD_ICFGR1,Interrupt Configuration Register 1" group.long 0x10C08++0x03 line.long 0x00 "GICD_ICFGR2,Interrupt Configuration Register 2" group.long 0x10C0C++0x03 line.long 0x00 "GICD_ICFGR3,Interrupt Configuration Register 3" group.long 0x10C10++0x03 line.long 0x00 "GICD_ICFGR4,Interrupt Configuration Register 4" group.long 0x10C14++0x03 line.long 0x00 "GICD_ICFGR5,Interrupt Configuration Register 5" group.long 0x10C18++0x03 line.long 0x00 "GICD_ICFGR6,Interrupt Configuration Register 6" group.long 0x10C1C++0x03 line.long 0x00 "GICD_ICFGR7,Interrupt Configuration Register 7" group.long 0x10C20++0x03 line.long 0x00 "GICD_ICFGR8,Interrupt Configuration Register 8" group.long 0x10C24++0x03 line.long 0x00 "GICD_ICFGR9,Interrupt Configuration Register 9" group.long 0x10C28++0x03 line.long 0x00 "GICD_ICFGR10,Interrupt Configuration Register 10" group.long 0x10C2C++0x03 line.long 0x00 "GICD_ICFGR11,Interrupt Configuration Register 11" tree.end width 23. tree "Peripheral Interrupt Status Registers" rgroup.long 0x10D00++0x17 line.long 0x00 "GICD_PPISR,Private Peripheral Interrupt Status Register" bitfld.long 0x00 15. " PPI3S ,nIRQ pin status" "No interrupt,Interrupt" bitfld.long 0x00 14. " PPI2S ,Non-secure Physical Timer event status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 13. " PPI1S ,Secure Physical Timer event status" "No interrupt,Interrupt" bitfld.long 0x00 12. " PPI0S ,nFIQ pin status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 11. " PPI4S ,Virtual Timer event status" "No interrupt,Interrupt" bitfld.long 0x00 10. " PPI5S ,Hypervisor Timer event status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 9. " PPI6S ,Virtual Maintenance Status" "No interrupt,Interrupt" line.long 0x04 "GICD_SPISR0,Shared Peripheral Interrupt Status Register 0" bitfld.long 0x04 31. " PL_IPI3 ,OR of all IPIs targeted to the RPU PL3" "Low,High" bitfld.long 0x04 30. " PL_IPI2 ,OR of all IPIs targeted to the RPU PL2" "Low,High" bitfld.long 0x04 29. " PL_IPI1 ,OR of all IPIs targeted to the RPU PL1" "Low,High" textline " " bitfld.long 0x04 28. " PL_IPI0 ,OR of all IPIs targeted to the RPU PL0" "Low,High" bitfld.long 0x04 27. " CLKMON ,Clock monitor coming from the CRL" "Low,High" bitfld.long 0x04 26. " RTC_SECONDS ,RTC seconds interrupt" "Low,High" textline " " bitfld.long 0x04 25. " RTC_ALARM ,RTC alarm interrupt" "Low,High" bitfld.long 0x04 24. " APM_LPD ,OR of all LPD APMs" "Low,High" bitfld.long 0x04 23. " CAN1 ,CAN1 interrupt." "Low,High" textline " " bitfld.long 0x04 22. " CAN0 ,CAN0 interrupt" "Low,High" bitfld.long 0x04 21. " UART1 ,UART1 interrupt" "Low,High" bitfld.long 0x04 20. " UART0 ,UART0 interrupt" "Low,High" textline " " bitfld.long 0x04 19. " SPI1 ,SPI1 interrupt" "Low,High" bitfld.long 0x04 18. " SPI0 ,SPI0 interrupt" "Low,High" bitfld.long 0x04 17. " I2C1 ,I2C1 interrupt" "Low,High" textline " " bitfld.long 0x04 16. " I2C0 ,I2C0 interrupt" "Low,High" bitfld.long 0x04 15. " GPIO ,GPIO interrupt" "Low,High" bitfld.long 0x04 14. " QSPI ,SPI interrupt" "Low,High" textline " " bitfld.long 0x04 13. " NAND ,NAND/NOR/SRAM static memory controller interrupt" "Low,High" bitfld.long 0x04 12. " RPU1_ECC ,RPU CPU1 ECC errors interrupt" "Low,High" bitfld.long 0x04 11. " RPU0_ECC ,RPU CPU0 ECC errors interrupt" "Low,High" textline " " bitfld.long 0x04 10. " LPD_APB_INT ,OR of all APB interrupts from the LPD" "Low,High" bitfld.long 0x04 9. " OCMINTR ,RPU interrupt (error)" "Low,High" bitfld.long 0x04 8. " RPU1_PERF_MON ,RPU performance monitor" "Low,High" textline " " bitfld.long 0x04 7. " RPU0_PERF_MON ,RPU performance monitor" "Low,High" line.long 0x08 "GICD_SPISR1,Shared Peripheral Interrupt Status Register 1" bitfld.long 0x08 31. " GIGABITETH3_WAKEUP ,Gigabit Ethernet3 wakeup interrupt" "Low,High" bitfld.long 0x08 30. " GIGABITETH3 ,Gigabit Ethernet3 interrupt" "Low,High" bitfld.long 0x08 29. " GIGABITETH2_WAKEUP ,Gigabit Ethernet2 wakeup interrupt" "Low,High" textline " " bitfld.long 0x08 28. " GIGABITETH2 ,Gigabit Ethernet2 interrupt" "Low,High" bitfld.long 0x08 27. " GIGABITETH_WAKEUP1 ,Gigabit Ethernet1 wakeup interrupt" "Low,High" bitfld.long 0x08 26. " GIGABITETH1 ,Gigabit Ethernet1 interrupt" "Low,High" textline " " bitfld.long 0x08 25. " GIGABITETH_WAKE0 ,Ethernet0 wakeup interrupt" "Low,High" bitfld.long 0x08 24. " GIGABITETH0 ,Ethernet0 interrupt" "Low,High" bitfld.long 0x08 23. " AMS ,AMS interrupt" "Low,High" textline " " bitfld.long 0x08 22. " AIB_AXI ,AIB AXI interrupt" "Low,High" bitfld.long 0x08 21. " ATB_ERR_LPD ,ATB interrupt" "Low,High" bitfld.long 0x08 20. " CSUPMU_WDT ,WDT in the CSU PMU" "Low,High" textline " " bitfld.long 0x08 19. " LP_WDT ,Watchdog timer (WDT) in the LPD (IOU)" "Low,High" bitfld.long 0x08 18. " SDIO1_WAKE ,SDIO1 wake interrupt" "Low,High" bitfld.long 0x08 17. " SDIO0_WAKE ,SDIO0 wake interrupt" "Low,High" textline " " bitfld.long 0x08 16. " SDIO1 ,SDIO1 interrupt" "Low,High" bitfld.long 0x08 15. " SDIO0 ,SDIO0 interrupt" "Low,High" bitfld.long 0x08 14. " TTC3 ,Triple-timer counter 3" "Low,High" textline " " bitfld.long 0x08 13. " TTC3 ,Triple-timer counter 3" "Low,High" bitfld.long 0x08 12. " TTC3 ,Triple-timer counter 3" "Low,High" bitfld.long 0x08 11. " TTC2 ,Triple-timer counter 2" "Low,High" textline " " bitfld.long 0x08 10. " TTC2 ,Triple-timer counter 2" "Low,High" bitfld.long 0x08 9. " TTC2 ,Triple-timer counter 2" "Low,High" bitfld.long 0x08 8. " TTC1 ,Triple-timer counter 1" "Low,High" textline " " bitfld.long 0x08 7. " TTC1 ,Triple-timer counter 1" "Low,High" bitfld.long 0x08 6. " TTC1 ,Triple-timer counter 1" "Low,High" bitfld.long 0x08 5. " TTC0 ,Triple-timer counter 0" "Low,High" textline " " bitfld.long 0x08 4. " TTC0 ,Triple-timer counter 0" "Low,High" bitfld.long 0x08 3. " TTC0 ,Triple-timer counter 0" "Low,High" bitfld.long 0x08 2. " APU_IPI0 ,OR of all IPIs targeted to the APU CPU" "Low,High" textline " " bitfld.long 0x08 1. " RPU_IPI1 ,OR of all IPIs targeted to the RPU CPU1" "Low,High" bitfld.long 0x08 0. " RPU_IPI0 ,OR of all IPIs targeted to the RPU CPU0" "Low,High" line.long 0x0C "GICD_SPISR2,Shared Peripheral Interrupt Status Register 2" bitfld.long 0x0C 31. " PL_PS_GRP0_0 ,PL_PS IRQ[7]" "Low,High" bitfld.long 0x0C 30. " PL_PS_GRP0_0 ,PL_PS IRQ[6]" "Low,High" bitfld.long 0x0C 29. " PL_PS_GRP0_0 ,PL_PS IRQ[5]" "Low,High" textline " " bitfld.long 0x0C 28. " PL_PS_GRP0_0 ,PL_PS IRQ[4]" "Low,High" bitfld.long 0x0C 27. " PL_PS_GRP0_0 ,PL_PS IRQ[3]" "Low,High" bitfld.long 0x0C 26. " PL_PS_GRP0_0 ,PL_PS IRQ[2]" "Low,High" textline " " bitfld.long 0x0C 25. " PL_PS_GRP0_0 ,PL_PS IRQ[1]" "Low,High" bitfld.long 0x0C 24. " PL_PS_GRP0_0 ,PL_PS IRQ[0]" "Low,High" bitfld.long 0x0C 23. " XMPU_LPD ,XMPU error interrupt for the LPD" "Low,High" textline " " bitfld.long 0x0C 22. " EFUSE ,EFUSE interrupt" "Low,High" bitfld.long 0x0C 21. " CSU_DMA ,DMA for CSU interrupt" "Low,High" bitfld.long 0x0C 20. " CSU ,Device configuration module interrupt" "Low,High" textline " " bitfld.long 0x0C 19. " LPD-DMA_7 ,LPD-DMA channel 7" "Low,High" bitfld.long 0x0C 18. " LPD-DMA_6 ,LPD-DMA channel 6" "Low,High" bitfld.long 0x0C 17. " LPD-DMA_5 ,LPD-DMA channel 5" "Low,High" textline " " bitfld.long 0x0C 16. " LPD-DMA_4 ,LPD-DMA channel 4" "Low,High" bitfld.long 0x0C 15. " LPD-DMA_3 ,LPD-DMA channel 3" "Low,High" bitfld.long 0x0C 14. " LPD-DMA_2 ,LPD-DMA channel 2" "Low,High" textline " " bitfld.long 0x0C 13. " LPD-DMA_1 ,LPD-DMA channel 1" "Low,High" bitfld.long 0x0C 12. " LPD-DMA_0 ,LPD-DMA channel 0" "Low,High" bitfld.long 0x0C 11. " USB3_0_1_PMU_WKP ,Wakeup from USB3_1 to PMU" "Low,High" textline " " bitfld.long 0x0C 10. " USB3_0_1_PMU_WKP ,Wakeup from USB3_0 to PMU" "Low,High" bitfld.long 0x0C 9. " USB3_1_OTG ,USB3_1 OTG interrupt" "Low,High" bitfld.long 0x0C 8. " USB3_1_ENDPOINT ,USB3_1 Endpoint related interrupt" "Low,High" textline " " bitfld.long 0x0C 7. " USB3_1_ENDPOINT ,USB3_1 Endpoint related interrupt" "Low,High" bitfld.long 0x0C 6. " USB3_1_ENDPOINT ,USB3_1 Endpoint related interrupt" "Low,High" bitfld.long 0x0C 5. " USB3_1_ENDPOINT ,USB3_1 Endpoint related interrupt" "Low,High" textline " " bitfld.long 0x0C 4. " USB3_0_OTG ,USB3_0 OTG interrupt" "Low,High" bitfld.long 0x0C 3. " USB3_0_ENDPOINT ,USB3_0 Endpoint related interrupt" "Low,High" bitfld.long 0x0C 2. " USB3_0_ENDPOINT ,USB3_0 Endpoint related interrupt" "Low,High" textline " " bitfld.long 0x0C 1. " USB3_0_ENDPOINT ,USB3_0 Endpoint related interrupt" "Low,High" bitfld.long 0x0C 0. " USB3_0_ENDPOINT ,USB3_0 Endpoint related interrupt" "Low,High" line.long 0x10 "GICD_SPISR3,Shared Peripheral Interrupt Status Register 3" bitfld.long 0x10 31. " APU_CPUMNT_0 ,VCPUMT[0]" "Low,High" bitfld.long 0x10 30. " XMPU_FPD ,XMPU error interrupt for the FPD" "Low,High" bitfld.long 0x10 29. " SATA ,SATA controller interrupt" "Low,High" textline " " bitfld.long 0x10 28. " GPU ,OR of all GPU interrupts" "Low,High" bitfld.long 0x10 27. " FPD-DMA_7 ,Interrupts from the FPD-DMA 7" "Low,High" bitfld.long 0x10 26. " FPD-DMA_6 ,Interrupts from the FPD-DMA 6" "Low,High" textline " " bitfld.long 0x10 25. " FPD-DMA_5 ,Interrupts from the FPD-DMA 5" "Low,High" bitfld.long 0x10 24. " FPD-DMA_4 ,Interrupts from the FPD-DMA 4" "Low,High" bitfld.long 0x10 23. " FPD-DMA_3 ,Interrupts from the FPD-DMA 3" "Low,High" textline " " bitfld.long 0x10 22. " FPD-DMA_2 ,Interrupts from the FPD-DMA 2" "Low,High" bitfld.long 0x10 21. " FPD-DMA_1 ,Interrupts from the FPD-DMA 1" "Low,High" bitfld.long 0x10 20. " FPD-DMA_0 ,Interrupts from the FPD-DMA 0" "Low,High" textline " " bitfld.long 0x10 19. " APM_FPD ,OR of all APMs for the FPD" "Low,High" bitfld.long 0x10 18. " DPDMA_INT ,DisplayPort DMA interrupt" "Low,High" bitfld.long 0x10 17. " FPD_ATB_ERROR ,ATB interrupt for the FPD" "Low,High" textline " " bitfld.long 0x10 16. " FPD_APB_INT ,OR of all APB interrupts from the LPD" "Low,High" bitfld.long 0x10 15. " DPORT ,DisplayPort general-purpose interrupt" "Low,High" bitfld.long 0x10 14. " PCIE_MSC ,PCIe miscellaneous interrupts" "Low,High" textline " " bitfld.long 0x10 13. " PCIE_DMA ,PCIe bridge DMA interrupts" "Low,High" bitfld.long 0x10 12. " PCIE_LEGACY ,PCIe legacy (INTA/BC/D) interrupts" "Low,High" bitfld.long 0x10 11. " PCIE_MSI ,PCIe interrupt for MSI vectors 63 to 32" "Low,High" textline " " bitfld.long 0x10 10. " PCIE_MSI ,PCIe interrupt for MSI vectors 31 to 0" "Low,High" bitfld.long 0x10 9. " FP_WDT ,Top-level watchdog timer interrupt" "Low,High" bitfld.long 0x10 8. " DDR_SS ,DDR controller subsystem interrupt" "Low,High" textline " " bitfld.long 0x10 7. " PL_PS_GRP1 ,PL_PS IRQ[15]" "Low,High" bitfld.long 0x10 6. " PL_PS_GRP1 ,PL_PS IRQ[14]" "Low,High" bitfld.long 0x10 5. " PL_PS_GRP1 ,PL_PS IRQ[13]" "Low,High" textline " " bitfld.long 0x10 4. " PL_PS_GRP1 ,PL_PS IRQ[12]" "Low,High" bitfld.long 0x10 3. " PL_PS_GRP1 ,PL_PS IRQ[11]" "Low,High" bitfld.long 0x10 2. " PL_PS_GRP1 ,PL_PS IRQ[10]" "Low,High" textline " " bitfld.long 0x10 1. " PL_PS_GRP1 ,PL_PS IRQ[9]" "Low,High" bitfld.long 0x10 0. " PL_PS_GRP1 ,PL_PS IRQ[8]" "Low,High" line.long 0x14 "GICD_SPISR4,Shared Peripheral Interrupt Status Register 4" bitfld.long 0x14 19. " INTF_FPD_SMMU ,SMMU (from int_fpd)" "Low,High" bitfld.long 0x14 18. " INTF_PPD_CCI ,CCI (from int_fpd)" "Low,High" bitfld.long 0x14 17. " APU_REGS ,REGS" "Low,High" textline " " bitfld.long 0x14 16. " APU_EXTERR ,EXTERR" "Low,High" bitfld.long 0x14 15. " APU_L2ERR ,EXT error" "Low,High" bitfld.long 0x14 14. " APU_COMM_3 ,L2 error[3]" "Low,High" textline " " bitfld.long 0x14 13. " APU_COMM_2 ,L2 error[2]" "Low,High" bitfld.long 0x14 12. " APU_COMM_1 ,L2 error[1]" "Low,High" bitfld.long 0x14 11. " APU_COMM_0 ,L2 error[0]" "Low,High" textline " " bitfld.long 0x14 10. " APU_PMU_3 ,Performance monitor unit[3]" "Low,High" bitfld.long 0x14 9. " APU_PMU_2 ,Performance monitor unit[2]" "Low,High" bitfld.long 0x14 8. " APU_PMU_1 ,Performance monitor unit[1]" "Low,High" textline " " bitfld.long 0x14 7. " APU_PMU_0 ,Performance monitor unit[0]" "Low,High" bitfld.long 0x14 6. " APU_CTI_3 ,CTI[3]" "Low,High" bitfld.long 0x14 5. " APU_CTI_2 ,CTI[2]" "Low,High" textline " " bitfld.long 0x14 4. " APU_CTI_1 ,CTI[1]" "Low,High" bitfld.long 0x14 3. " APU_CTI_0 ,CTI[0]" "Low,High" bitfld.long 0x14 2. " APU_CPUMNT_3 ,VCPUMT[3]" "Low,High" textline " " bitfld.long 0x14 1. " APU_CPUMNT_2 ,VCPUMT[2]" "Low,High" bitfld.long 0x14 0. " APU_CPUMNT_1 ,VCPUMT[1]" "Low,High" tree.end width 24. tree "Software Generated Interrupt" wgroup.long 0x10F00++0x03 line.long 0x00 "GICD_SGIR,Software Generated Interrupt Register" bitfld.long 0x00 24.--25. " TLF ,Target List Filter" "TargetList,All CPUs,Request CPU,?..." hexmask.long.byte 0x00 16.--23. 1. " CPUTL ,CPU Target List" textline " " bitfld.long 0x00 15. " NSATT ,NSATT" "Secure,Non-secure" bitfld.long 0x00 0.--3. " SGINTID ,SGI Interrupt ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x10F20++0x03 line.long 0x00 "GICD_SET/CLR_PENDSGIR0,SGI Set/Clear Pending Register 0" setclrfld.long 0x00 31. 0x00 31. -0x10 31. " SET/CLR_SGI0 ,SGI0 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. -0x10 30. " SET/CLR_SGI0 ,SGI0 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. -0x10 29. " SET/CLR_SGI0 ,SGI0 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. -0x10 28. " SET/CLR_SGI0 ,SGI0 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. -0x10 27. " SET/CLR_SGI0 ,SGI0 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. -0x10 26. " SET/CLR_SGI0 ,SGI0 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. -0x10 25. " SET/CLR_SGI0 ,SGI0 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. -0x10 24. " SET/CLR_SGI0 ,SGI0 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. -0x10 23. " SET/CLR_SGI1 ,SGI1 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. -0x10 22. " SET/CLR_SGI1 ,SGI1 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. -0x10 21. " SET/CLR_SGI1 ,SGI1 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. -0x10 20. " SET/CLR_SGI1 ,SGI1 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. -0x10 19. " SET/CLR_SGI1 ,SGI1 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. -0x10 18. " SET/CLR_SGI1 ,SGI1 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. -0x10 17. " SET/CLR_SGI1 ,SGI1 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. -0x10 16. " SET/CLR_SGI1 ,SGI1 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. -0x10 15. " SET/CLR_SGI2 ,SGI2 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. -0x10 14. " SET/CLR_SGI2 ,SGI2 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. -0x10 13. " SET/CLR_SGI2 ,SGI2 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. -0x10 12. " SET/CLR_SGI2 ,SGI2 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. -0x10 11. " SET/CLR_SGI2 ,SGI2 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. -0x10 10. " SET/CLR_SGI2 ,SGI2 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. -0x10 9. " SET/CLR_SGI2 ,SGI2 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. -0x10 8. " SET/CLR_SGI2 ,SGI2 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. -0x10 7. " SET/CLR_SGI3 ,SGI3 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. -0x10 6. " SET/CLR_SGI3 ,SGI3 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. -0x10 5. " SET/CLR_SGI3 ,SGI3 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. -0x10 4. " SET/CLR_SGI3 ,SGI3 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. -0x10 3. " SET/CLR_SGI3 ,SGI3 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. -0x10 2. " SET/CLR_SGI3 ,SGI3 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. -0x10 1. " SET/CLR_SGI3 ,SGI3 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. -0x10 0. " SET/CLR_SGI3 ,SGI3 Set/Clear Pending Bit" "Disabled,Enabled" group.long 0x10F24++0x03 line.long 0x00 "GICD_SET/CLR_PENDSGIR1,SGI Set/Clear Pending Register 1" setclrfld.long 0x00 31. 0x00 31. -0x10 31. " SET/CLR_SGI4 ,SGI4 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. -0x10 30. " SET/CLR_SGI4 ,SGI4 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. -0x10 29. " SET/CLR_SGI4 ,SGI4 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. -0x10 28. " SET/CLR_SGI4 ,SGI4 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. -0x10 27. " SET/CLR_SGI4 ,SGI4 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. -0x10 26. " SET/CLR_SGI4 ,SGI4 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. -0x10 25. " SET/CLR_SGI4 ,SGI4 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. -0x10 24. " SET/CLR_SGI4 ,SGI4 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. -0x10 23. " SET/CLR_SGI5 ,SGI5 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. -0x10 22. " SET/CLR_SGI5 ,SGI5 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. -0x10 21. " SET/CLR_SGI5 ,SGI5 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. -0x10 20. " SET/CLR_SGI5 ,SGI5 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. -0x10 19. " SET/CLR_SGI5 ,SGI5 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. -0x10 18. " SET/CLR_SGI5 ,SGI5 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. -0x10 17. " SET/CLR_SGI5 ,SGI5 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. -0x10 16. " SET/CLR_SGI5 ,SGI5 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. -0x10 15. " SET/CLR_SGI6 ,SGI6 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. -0x10 14. " SET/CLR_SGI6 ,SGI6 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. -0x10 13. " SET/CLR_SGI6 ,SGI6 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. -0x10 12. " SET/CLR_SGI6 ,SGI6 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. -0x10 11. " SET/CLR_SGI6 ,SGI6 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. -0x10 10. " SET/CLR_SGI6 ,SGI6 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. -0x10 9. " SET/CLR_SGI6 ,SGI6 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. -0x10 8. " SET/CLR_SGI6 ,SGI6 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. -0x10 7. " SET/CLR_SGI7 ,SGI7 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. -0x10 6. " SET/CLR_SGI7 ,SGI7 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. -0x10 5. " SET/CLR_SGI7 ,SGI7 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. -0x10 4. " SET/CLR_SGI7 ,SGI7 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. -0x10 3. " SET/CLR_SGI7 ,SGI7 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. -0x10 2. " SET/CLR_SGI7 ,SGI7 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. -0x10 1. " SET/CLR_SGI7 ,SGI7 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x04 0. -0x10 0. " SET/CLR_SGI7 ,SGI7 Set/Clear Pending Bit" "Disabled,Enabled" group.long 0x10F28++0x03 line.long 0x00 "GICD_SET/CLR_PENDSGIR2,SGI Set/Clear Pending Register 2" setclrfld.long 0x00 31. 0x00 31. -0x10 31. " SET/CLR_SGI8 ,SGI8 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. -0x10 30. " SET/CLR_SGI8 ,SGI8 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. -0x10 29. " SET/CLR_SGI8 ,SGI8 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. -0x10 28. " SET/CLR_SGI8 ,SGI8 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. -0x10 27. " SET/CLR_SGI8 ,SGI8 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. -0x10 26. " SET/CLR_SGI8 ,SGI8 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. -0x10 25. " SET/CLR_SGI8 ,SGI8 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. -0x10 24. " SET/CLR_SGI8 ,SGI8 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. -0x10 23. " SET/CLR_SGI9 ,SGI9 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. -0x10 22. " SET/CLR_SGI9 ,SGI9 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. -0x10 21. " SET/CLR_SGI9 ,SGI9 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. -0x10 20. " SET/CLR_SGI9 ,SGI9 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. -0x10 19. " SET/CLR_SGI9 ,SGI9 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. -0x10 18. " SET/CLR_SGI9 ,SGI9 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. -0x10 17. " SET/CLR_SGI9 ,SGI9 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. -0x10 16. " SET/CLR_SGI9 ,SGI9 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. -0x10 15. " SET/CLR_SGI10 ,SGI10 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. -0x10 14. " SET/CLR_SGI10 ,SGI10 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. -0x10 13. " SET/CLR_SGI10 ,SGI10 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. -0x10 12. " SET/CLR_SGI10 ,SGI10 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. -0x10 11. " SET/CLR_SGI10 ,SGI10 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. -0x10 10. " SET/CLR_SGI10 ,SGI10 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. -0x10 9. " SET/CLR_SGI10 ,SGI10 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. -0x10 8. " SET/CLR_SGI10 ,SGI10 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. -0x10 7. " SET/CLR_SGI11 ,SGI11 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. -0x10 6. " SET/CLR_SGI11 ,SGI11 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. -0x10 5. " SET/CLR_SGI11 ,SGI11 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. -0x10 4. " SET/CLR_SGI11 ,SGI11 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. -0x10 3. " SET/CLR_SGI11 ,SGI11 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. -0x10 2. " SET/CLR_SGI11 ,SGI11 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. -0x10 1. " SET/CLR_SGI11 ,SGI11 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. -0x10 0. " SET/CLR_SGI11 ,SGI11 Set/Clear Pending Bit" "Disabled,Enabled" group.long 0x10F2C++0x03 line.long 0x00 "GICD_SET/CLR_PENDSGIR3,SGI Set/Clear Pending Register 3" setclrfld.long 0x00 31. 0x00 31. -0x10 31. " SET/CLR_SGI12 ,SGI12 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. -0x10 30. " SET/CLR_SGI12 ,SGI12 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. -0x10 29. " SET/CLR_SGI12 ,SGI12 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. -0x10 28. " SET/CLR_SGI12 ,SGI12 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. -0x10 27. " SET/CLR_SGI12 ,SGI12 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. -0x10 26. " SET/CLR_SGI12 ,SGI12 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. -0x10 25. " SET/CLR_SGI12 ,SGI12 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. -0x10 24. " SET/CLR_SGI12 ,SGI12 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. -0x10 23. " SET/CLR_SGI13 ,SGI13 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. -0x10 22. " SET/CLR_SGI13 ,SGI13 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. -0x10 21. " SET/CLR_SGI13 ,SGI13 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. -0x10 20. " SET/CLR_SGI13 ,SGI13 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. -0x10 19. " SET/CLR_SGI13 ,SGI13 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. -0x10 18. " SET/CLR_SGI13 ,SGI13 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. -0x10 17. " SET/CLR_SGI13 ,SGI13 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. -0x10 16. " SET/CLR_SGI13 ,SGI13 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. -0x10 15. " SET/CLR_SGI14 ,SGI14 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. -0x10 14. " SET/CLR_SGI14 ,SGI14 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. -0x10 13. " SET/CLR_SGI14 ,SGI14 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. -0x10 12. " SET/CLR_SGI14 ,SGI14 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. -0x10 11. " SET/CLR_SGI14 ,SGI14 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. -0x10 10. " SET/CLR_SGI14 ,SGI14 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. -0x10 9. " SET/CLR_SGI14 ,SGI14 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. -0x10 8. " SET/CLR_SGI14 ,SGI14 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. -0x10 7. " SET/CLR_SGI15 ,SGI15 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. -0x10 6. " SET/CLR_SGI15 ,SGI15 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. -0x10 5. " SET/CLR_SGI15 ,SGI15 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. -0x10 4. " SET/CLR_SGI15 ,SGI15 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. -0x10 3. " SET/CLR_SGI15 ,SGI15 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. -0x10 2. " SET/CLR_SGI15 ,SGI15 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. -0x10 1. " SET/CLR_SGI15 ,SGI15 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. -0x10 0. " SET/CLR_SGI15 ,SGI15 Set/Clear Pending Bit" "Disabled,Enabled" tree.end textline " " rgroup.long 0x10FD0++0x03 line.long 0x00 "GICD_PIDR4,Peripheral ID4 Register" rgroup.long 0x10FD4++0x03 line.long 0x00 "GICD_PIDR5,Peripheral ID5 Register" rgroup.long 0x10FD8++0x03 line.long 0x00 "GICD_PIDR6,Peripheral ID6 Register" rgroup.long 0x10FDC++0x03 line.long 0x00 "GICD_PIDR7,Peripheral ID7 Register" rgroup.long 0x10FE0++0x03 line.long 0x00 "GICD_PIDR0,Peripheral ID0 Register" rgroup.long 0x10FE4++0x03 line.long 0x00 "GICD_PIDR1,Peripheral ID1 Register" rgroup.long 0x10FE8++0x03 line.long 0x00 "GICD_PIDR2,Peripheral ID2 Register" rgroup.long 0x10FEC++0x03 line.long 0x00 "GICD_PIDR3,Peripheral ID3 Register" rgroup.long 0x10FF0++0x03 line.long 0x00 "GICD_CIDR0,Component ID0 Register" rgroup.long 0x10FF4++0x03 line.long 0x00 "GICD_CIDR1,Component ID1 Register" rgroup.long 0x10FF8++0x03 line.long 0x00 "GICD_CIDR2,Component ID2 Register" rgroup.long 0x10FFC++0x03 line.long 0x00 "GICD_CIDR3,Component ID3 Register" tree.end width 17. tree "CPU Interface" group.long 0x20000++0x0B line.long 0x00 "GICC_CTLR,CPU Interface Control Register" bitfld.long 0x00 10. " EOIMODENS ,Controls the behavior of Non-secure accesses to the GICC_EOIR and GICC_DIR registers" "Priority drop/Deactivate,Priority drop" bitfld.long 0x00 9. " EOIMODES ,Controls the behavior of accesses to GICC_EOIR and GICC_DIR registers" "Priority drop/Deactivate,Priority drop" bitfld.long 0x00 8. " IRQBYPDISGRP1 ,When the signaling of IRQs by the CPU interface is disabled this bit partly controls whether the bypass IRQ signal is signaled to the processor" "Signaled,Not signaled" textline " " bitfld.long 0x00 7. " FIQBYPDISGRP1 ,When the signaling of FIQs by the CPU interface is disabled this bit partly controls whether the bypass FIQ signal is signaled to the processor" "Signaled,Not signaled" bitfld.long 0x00 6. " IRQBYPDISGRP0 ,When the signaling of FIQs by the CPU interface is disabled this bit partly controls whether the bypass FIQ signal is signaled to the processor" "Signaled,Not signaled" bitfld.long 0x00 5. " FIQBYPDISGRP0 ,When the signaling of FIQs by the CPU interface is disabled this bit partly controls whether the bypass FIQ signal is signaled to the processor" "Signaled,Not signaled" textline " " bitfld.long 0x00 4. " CBPR ,Controls whether the GICC_BPR provides common control to Group 0 and Group 1 interrupts" "Group 0,Group 1" bitfld.long 0x00 3. " FIQEN ,Controls whether the CPU interface signals Group 0 interrupts to a target processor using the FIQ or the IRQ signal" "IRQ,FIQ" bitfld.long 0x00 2. " ACKCTL ,Acknowledge Control" "ID 1022 interrupt,Corresponding interrupt" textline " " bitfld.long 0x00 1. " ENABLEGRP1 ,Enable for the signaling of Group 1 interrupts by the CPU interface to the connected processor" "Disabled,Enabled" bitfld.long 0x00 0. " ENABLEGRP0 ,Enable for the signaling of Group 0 interrupts by the CPU interface to the connected processor" "Disabled,Enabled" line.long 0x04 "GICC_PMR,Interrupt Priority Mask Register" hexmask.long.byte 0x04 0.--7. 1. " PRIORITY ,Priority mask level for CPU interface" line.long 0x08 "GICC_BPR,Binary Point Register" bitfld.long 0x08 0.--2. " BINARY_POINT ,The value of this field controls how the 8-bit interrupt priority field is split into a group priority field and subpriority field" "Reserved,Reserved,[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]" hgroup.long 0x2000C++0x03 hide.long 0x00 "GICC_IAR,Interrupt Acknowledge Register" in wgroup.long 0x20010++0x03 line.long 0x00 "GICC_EOIR,End of Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation if the write refers to an SGI this field contains the CPUID value from the corresponding GICC_IAR access" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " EOIINTID ,The Interrupt ID value from the corresponding GICC_IAR access" rgroup.long 0x20014++0x07 line.long 0x00 "GICC_RPR,Running Priority Register" hexmask.long.byte 0x00 0.--7. 1. " PRIORITY ,The current running priority on the CPU interface" line.long 0x04 "GICC_HPPIR,Highest Priority Pending Interrupt Register" bitfld.long 0x04 10.--12. " CPUID ,On a multiprocessor implementation if the PENDINTID field returns the ID of an SGI this field contains the CPUID value for that interrupt" "0,1,2,3,4,5,6,7" hexmask.long.word 0x04 0.--9. 1. " PENDINTID ,The interrupt ID of the highest priority pending interrupt" group.long 0x2001C++0x03 line.long 0x00 "GICC_ABPR,Aliased Binary Point Register" bitfld.long 0x00 0.--2. " BINARY_POINT ,The value of this field controls how the 8-bit interrupt priority field is split into a group priority field and subpriority field" "[7:1]/[0],[7:2]/[1:0],[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]" hgroup.long 0x20020++0x03 hide.long 0x00 "GICC_AIAR,Aliased Interrupt Acknowledge Register" in wgroup.long 0x20024++0x03 line.long 0x00 "GICC_AEOIR,Aliased End of Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation if the write refers to an SGI this field contains the CPUID value from the corresponding GICC_IAR access" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " EOIINTID ,The Interrupt ID value from the corresponding GICC_IAR access" rgroup.long 0x20028++0x03 line.long 0x00 "GICC_AHPPIR,Aliased Highest Priority Pending Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation if the PENDINTID field returns the ID of an SGI this field contains the CPUID value for that interrupt" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " PENDINTID ,The interrupt ID of the highest priority pending interrupt" group.long 0x200D0++0x03 line.long 0x00 "GICC_APR0,Active Priority Register" group.long 0x200E0++0x03 line.long 0x00 "GICC_NSAPR0,Non-Secure Active Priority Register" rgroup.long 0x200FC++0x03 line.long 0x00 "GICC_IIDR,CPU Interface Identification Register" hexmask.long.word 0x00 20.--31. 1. " PRODID ,Product ID" bitfld.long 0x00 16.--19. " ARCH_VER ,Identifies the architecture version of the GIC" ",GICv2,?..." textline " " bitfld.long 0x00 12.--15. " REV ,Revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 0.--11. 1. " IMP ,Implementer" wgroup.long 0x30000++0x03 line.long 0x00 "GICC_DIR,Deactivate Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation this field identifies the processor that requested the interrupt" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " INTID ,The interrupt ID" textline " " tree.end width 19. tree "Virtual Cpu Control Interface" group.long 0x40000++0x03 line.long 0x00 "GICH_HCR,Hypervisor Control Register" bitfld.long 0x00 27.--31. " EOICOUNT ,Counts the number of EOIs received that do not have a corresponding entry in the List registers" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 7. " VGRP1DIE ,VM Disable Group 1 Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 6. " VGRP1EIE ,VM Enable Group 1 Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " VGRP0DIE ,VM Disable Group 0 Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. " VGRP0EIE ,VM Disable Group 0 Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " NPIE ,No Pending Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " LRENPIE ,List Register Entry Not Present Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " UIE ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" rgroup.long 0x40004++0x03 line.long 0x00 "GICH_VTR,VGIC Type Register" bitfld.long 0x00 29.--31. " PRIBITS ,Number of priority bits" "Reserved,Reserved,Reserved,Reserved,5 bits 32 PRI levels,?..." textline " " bitfld.long 0x00 26.--28. " PREBITS ,Number of pre-emption bits" "Reserved,Reserved,Reserved,Reserved,5 bits 32 PRE levels,?..." textline " " bitfld.long 0x00 0.--5. " LISTREGS ,List regs number" "Reserved,Reserved,Reserved,4 lists,?..." group.long 0x40008++0x03 line.long 0x00 "GICH_VMCR,Virtual Machine Control Register" bitfld.long 0x00 27.--31. " VMPRIMASK ,Alias of GICV_PMR.Priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 21.--23. " VMBP ,Alias of GICV_BPR.Binary point" "0,1,2,3,4,5,6,7" bitfld.long 0x00 18.--20. " VMABP ,Alias of GICV_ABPR.Binary point" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 9. " VEM ,Alias of GICV_CTLR.EOImode" "0,1" bitfld.long 0x00 4. " VMCBPR ,Alias of GICV_CTLR.CBPR" "0,1" bitfld.long 0x00 3. " VMFIQEN ,Alias of GICV_CTLR.FIQEn" "0,1" textline " " bitfld.long 0x00 2. " VMACKCTL ,Alias of GICV_CTLR.AckCtl" "0,1" bitfld.long 0x00 1. " VMGRP1EN ,Alias of GICV_CTLR.EnableGrp1" "0,1" bitfld.long 0x00 0. " VMGRP0EN ,Alias of GICV_CTLR.EnableGrp0" "0,1" rgroup.long 0x40010++0x03 line.long 0x00 "GICH_MISR,Maintenance Interrupt Status Register" bitfld.long 0x00 7. " VGRP1D ,Disabled Group 1 maintenance interrupt" "No interrupt,Interrupt" bitfld.long 0x00 6. " VGRP1E ,Enabled Group 1 maintenance interrupt" "No interrupt,Interrupt" bitfld.long 0x00 5. " VGRP0D ,Disabled Group 0 maintenance interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 4. " VGRP0E ,Enabled Group 0 maintenance interrupt" "No interrupt,Interrupt" bitfld.long 0x00 3. " NP ,No Pending maintenance interrupt" "No interrupt,Interrupt" bitfld.long 0x00 2. " LRENP ,List Register Entry Not Present maintenance interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " U ,Underflow maintenance interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " EOI ,EOI maintenance interrupt" "No interrupt,Interrupt" rgroup.long 0x40020++0x03 line.long 0x00 "GICH_EISR0,End of Interrupt Status Register" bitfld.long 0x00 3. " STATUS3 ,EOI maintenance interrupt status for List register 3" "No interrupt,Interrupt" bitfld.long 0x00 2. " STATUS2 ,EOI maintenance interrupt status for List register 2" "No interrupt,Interrupt" bitfld.long 0x00 1. " STATUS1 ,EOI maintenance interrupt status for List register 1" "No interrupt,Interrupt" textline " " bitfld.long 0x00 0. " STATUS0 ,EOI maintenance interrupt status for List register 0" "No interrupt,Interrupt" rgroup.long 0x40030++0x03 line.long 0x00 "GICH_ELSR0,Empty List Register Status Register" bitfld.long 0x00 3. " STATUS3 ,Emptiness status bit for List register 3" "Not empty,Empty" bitfld.long 0x00 2. " STATUS2 ,Emptiness status bit for List register 2" "Not empty,Empty" bitfld.long 0x00 1. " STATUS1 ,Emptiness status bit for List register 1" "Not empty,Empty" textline " " bitfld.long 0x00 0. " STATUS0 ,Emptiness status bit for List register 0" "Not empty,Empty" group.long 0x400F0++0x03 line.long 0x00 "GICH_APR0,Active Priority Register" bitfld.long 0x00 31. " APB31 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 30. " APB30 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 29. " APB29 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 28. " APB28 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 27. " APB27 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 26. " APB26 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 25. " APB25 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 24. " APB24 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 23. " APB23 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 22. " APB22 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 21. " APB21 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 20. " APB20 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 19. " APB19 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 18. " APB18 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 17. " APB17 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 16. " APB16 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 15. " APB15 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 14. " APB14 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 13. " APB13 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 12. " APB12 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 11. " APB11 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 10. " APB10 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 9. " APB9 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 8. " APB8 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 7. " APB7 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 6. " APB6 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 5. " APB5 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 4. " APB4 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 3. " APB3 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 2. " APB2 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 1. " APB1 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 0. " APB0 ,Determines whether the corresponding preemption level is active" "Not active,Active" group.long 0x40100++0x0F line.long 0x00 "GICH_LR0,List Register 0" bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x00 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x00 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x00 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x00 10.--19. 1. " PHYSICALID ,Indicates the physical interrupt ID that the hypervisor forwards to the Distributor" hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" line.long 0x04 "GICH_LR1,List Register 1" bitfld.long 0x04 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x04 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x04 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x04 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x04 10.--19. 1. " PHYSICALID ,Indicates the physical interrupt ID that the hypervisor forwards to the Distributor" hexmask.long.word 0x04 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" line.long 0x08 "GICH_LR2,List Register 2" bitfld.long 0x08 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x08 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x08 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x08 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x08 10.--19. 1. " PHYSICALID ,Indicates the physical interrupt ID that the hypervisor forwards to the Distributor" hexmask.long.word 0x08 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" line.long 0x0C "GICH_LR3,List Register 3" bitfld.long 0x0C 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x0C 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x0C 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x0C 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x0C 10.--19. 1. " PHYSICALID ,Indicates the physical interrupt ID that the hypervisor forwards to the Distributor" hexmask.long.word 0x0C 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" group.long 0x50000++0x03 "Alias 0" line.long 0x00 "GICH_HCR_ALIAS0,Hypervisor Control Register" bitfld.long 0x00 27.--31. " EOICOUNT ,Counts the number of EOIs received that do not have a corresponding entry in the List registers" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 7. " VGRP1DIE ,VM Disable Group 1 Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 6. " VGRP1EIE ,VM Enable Group 1 Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " VGRP0DIE ,VM Disable Group 0 Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. " VGRP0EIE ,VM Disable Group 0 Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " NPIE ,No Pending Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " LRENPIE ,List Register Entry Not Present Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " UIE ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" rgroup.long (0x50000+0x04)++0x03 line.long 0x00 "GICH_VTR_ALIAS0,VGIC Type Register" bitfld.long 0x00 29.--31. " PRIBITS ,Number of priority bits" "Reserved,Reserved,Reserved,Reserved,5 bits 32 PRI levels,?..." textline " " bitfld.long 0x00 26.--28. " PREBITS ,Number of pre-emption bits" "Reserved,Reserved,Reserved,Reserved,5 bits 32 PRE levels,?..." textline " " bitfld.long 0x00 0.--5. " LISTREGS ,List regs number" "Reserved,Reserved,Reserved,4 lists,?..." group.long (0x50000+0x08)++0x03 line.long 0x00 "GICH_VMCR_ALIAS0,Virtual Machine Control Register" bitfld.long 0x00 27.--31. " VMPRIMASK ,Alias of GICV_PMR.Priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 21.--23. " VMBP ,Alias of GICV_BPR.Binary point" "0,1,2,3,4,5,6,7" bitfld.long 0x00 18.--20. " VMABP ,Alias of GICV_ABPR.Binary point" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 9. " VEM ,Alias of GICV_CTLR.EOImode" "0,1" bitfld.long 0x00 4. " VMCBPR ,Alias of GICV_CTLR.CBPR" "0,1" bitfld.long 0x00 3. " VMFIQEN ,Alias of GICV_CTLR.FIQEn" "0,1" textline " " bitfld.long 0x00 2. " VMACKCTL ,Alias of GICV_CTLR.AckCtl" "0,1" bitfld.long 0x00 1. " VMGRP1EN ,Alias of GICV_CTLR.EnableGrp1" "0,1" bitfld.long 0x00 0. " VMGRP0EN ,Alias of GICV_CTLR.EnableGrp0" "0,1" rgroup.long (0x50000+0x10)++0x03 line.long 0x00 "GICH_MISR_ALIAS0,Maintenance Interrupt Status Register" bitfld.long 0x00 7. " VGRP1D ,Disabled Group 1 maintenance interrupt" "No interrupt,Interrupt" bitfld.long 0x00 6. " VGRP1E ,Enabled Group 1 maintenance interrupt" "No interrupt,Interrupt" bitfld.long 0x00 5. " VGRP0D ,Disabled Group 0 maintenance interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 4. " VGRP0E ,Enabled Group 0 maintenance interrupt" "No interrupt,Interrupt" bitfld.long 0x00 3. " NP ,No Pending maintenance interrupt" "No interrupt,Interrupt" bitfld.long 0x00 2. " LRENP ,List Register Entry Not Present maintenance interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " U ,Underflow maintenance interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " EOI ,EOI maintenance interrupt" "No interrupt,Interrupt" rgroup.long (0x50000+0x20)++0x03 line.long 0x00 "GICH_EISR0_ALIAS0,End of Interrupt Status Register" bitfld.long 0x00 3. " STATUS3 ,EOI maintenance interrupt status for List register 3" "No interrupt,Interrupt" bitfld.long 0x00 2. " STATUS2 ,EOI maintenance interrupt status for List register 2" "No interrupt,Interrupt" bitfld.long 0x00 1. " STATUS1 ,EOI maintenance interrupt status for List register 1" "No interrupt,Interrupt" textline " " bitfld.long 0x00 0. " STATUS0 ,EOI maintenance interrupt status for List register 0" "No interrupt,Interrupt" rgroup.long (0x50000+0x30)++0x03 line.long 0x00 "GICH_ELSR0_ALIAS0,Empty List register Status Register" bitfld.long 0x00 3. " STATUS3 ,Emptiness status bit for List register 3" "Not empty,Empty" bitfld.long 0x00 2. " STATUS2 ,Emptiness status bit for List register 2" "Not empty,Empty" bitfld.long 0x00 1. " STATUS1 ,Emptiness status bit for List register 1" "Not empty,Empty" textline " " bitfld.long 0x00 0. " STATUS0 ,Emptiness status bit for List register 0" "Not empty,Empty" group.long (0x50000+0xF0)++0x03 line.long 0x00 "GICH_APR0_ALIAS0,Active Priority Register" bitfld.long 0x00 31. " APB31 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 30. " APB30 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 29. " APB29 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 28. " APB28 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 27. " APB27 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 26. " APB26 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 25. " APB25 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 24. " APB24 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 23. " APB23 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 22. " APB22 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 21. " APB21 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 20. " APB20 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 19. " APB19 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 18. " APB18 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 17. " APB17 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 16. " APB16 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 15. " APB15 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 14. " APB14 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 13. " APB13 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 12. " APB12 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 11. " APB11 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 10. " APB10 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 9. " APB9 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 8. " APB8 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 7. " APB7 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 6. " APB6 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 5. " APB5 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 4. " APB4 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 3. " APB3 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 2. " APB2 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 1. " APB1 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 0. " APB0 ,Determines whether the corresponding preemption level is active" "Not active,Active" group.long (0x50000+0x100)++0x0F line.long 0x00 "GICH_LR0_ALIAS0,List Register 0" bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x00 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x00 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x00 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x00 10.--19. 1. " PHYSICALID ,Indicates the physical interrupt ID that the hypervisor forwards to the Distributor" hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" line.long 0x04 "GICH_LR1_ALIAS0,List Register 1" bitfld.long 0x04 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x04 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x04 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x04 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x04 10.--19. 1. " PHYSICALID ,Indicates the physical interrupt ID that the hypervisor forwards to the Distributor" hexmask.long.word 0x04 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" line.long 0x08 "GICH_LR2_ALIAS0,List Register 2" bitfld.long 0x08 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x08 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x08 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x08 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x08 10.--19. 1. " PHYSICALID ,Indicates the physical interrupt ID that the hypervisor forwards to the Distributor" hexmask.long.word 0x08 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" line.long 0x0C "GICH_LR3_ALIAS0,List Register 3" bitfld.long 0x0C 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x0C 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x0C 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x0C 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x0C 10.--19. 1. " PHYSICALID ,Indicates the physical interrupt ID that the hypervisor forwards to the Distributor" hexmask.long.word 0x0C 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" group.long 0x50200++0x03 "Alias 1" line.long 0x00 "GICH_HCR_ALIAS1,Hypervisor Control Register" bitfld.long 0x00 27.--31. " EOICOUNT ,Counts the number of EOIs received that do not have a corresponding entry in the List registers" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 7. " VGRP1DIE ,VM Disable Group 1 Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 6. " VGRP1EIE ,VM Enable Group 1 Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " VGRP0DIE ,VM Disable Group 0 Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. " VGRP0EIE ,VM Disable Group 0 Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " NPIE ,No Pending Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " LRENPIE ,List Register Entry Not Present Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " UIE ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" rgroup.long (0x50200+0x04)++0x03 line.long 0x00 "GICH_VTR_ALIAS1,VGIC Type Register" bitfld.long 0x00 29.--31. " PRIBITS ,Number of priority bits" "Reserved,Reserved,Reserved,Reserved,5 bits 32 PRI levels,?..." textline " " bitfld.long 0x00 26.--28. " PREBITS ,Number of pre-emption bits" "Reserved,Reserved,Reserved,Reserved,5 bits 32 PRE levels,?..." textline " " bitfld.long 0x00 0.--5. " LISTREGS ,List regs number" "Reserved,Reserved,Reserved,4 lists,?..." group.long (0x50200+0x08)++0x03 line.long 0x00 "GICH_VMCR_ALIAS1,Virtual Machine Control Register" bitfld.long 0x00 27.--31. " VMPRIMASK ,Alias of GICV_PMR.Priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 21.--23. " VMBP ,Alias of GICV_BPR.Binary point" "0,1,2,3,4,5,6,7" bitfld.long 0x00 18.--20. " VMABP ,Alias of GICV_ABPR.Binary point" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 9. " VEM ,Alias of GICV_CTLR.EOImode" "0,1" bitfld.long 0x00 4. " VMCBPR ,Alias of GICV_CTLR.CBPR" "0,1" bitfld.long 0x00 3. " VMFIQEN ,Alias of GICV_CTLR.FIQEn" "0,1" textline " " bitfld.long 0x00 2. " VMACKCTL ,Alias of GICV_CTLR.AckCtl" "0,1" bitfld.long 0x00 1. " VMGRP1EN ,Alias of GICV_CTLR.EnableGrp1" "0,1" bitfld.long 0x00 0. " VMGRP0EN ,Alias of GICV_CTLR.EnableGrp0" "0,1" rgroup.long (0x50200+0x10)++0x03 line.long 0x00 "GICH_MISR_ALIAS1,Maintenance Interrupt Status Register" bitfld.long 0x00 7. " VGRP1D ,Disabled Group 1 maintenance interrupt" "No interrupt,Interrupt" bitfld.long 0x00 6. " VGRP1E ,Enabled Group 1 maintenance interrupt" "No interrupt,Interrupt" bitfld.long 0x00 5. " VGRP0D ,Disabled Group 0 maintenance interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 4. " VGRP0E ,Enabled Group 0 maintenance interrupt" "No interrupt,Interrupt" bitfld.long 0x00 3. " NP ,No Pending maintenance interrupt" "No interrupt,Interrupt" bitfld.long 0x00 2. " LRENP ,List Register Entry Not Present maintenance interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " U ,Underflow maintenance interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " EOI ,EOI maintenance interrupt" "No interrupt,Interrupt" rgroup.long (0x50200+0x20)++0x03 line.long 0x00 "GICH_EISR0_ALIAS1,End of Interrupt Status Register" bitfld.long 0x00 3. " STATUS3 ,EOI maintenance interrupt status for List register 3" "No interrupt,Interrupt" bitfld.long 0x00 2. " STATUS2 ,EOI maintenance interrupt status for List register 2" "No interrupt,Interrupt" bitfld.long 0x00 1. " STATUS1 ,EOI maintenance interrupt status for List register 1" "No interrupt,Interrupt" textline " " bitfld.long 0x00 0. " STATUS0 ,EOI maintenance interrupt status for List register 0" "No interrupt,Interrupt" rgroup.long (0x50200+0x30)++0x03 line.long 0x00 "GICH_ELSR0_ALIAS1,Empty List register Status Register" bitfld.long 0x00 3. " STATUS3 ,Emptiness status bit for List register 3" "Not empty,Empty" bitfld.long 0x00 2. " STATUS2 ,Emptiness status bit for List register 2" "Not empty,Empty" bitfld.long 0x00 1. " STATUS1 ,Emptiness status bit for List register 1" "Not empty,Empty" textline " " bitfld.long 0x00 0. " STATUS0 ,Emptiness status bit for List register 0" "Not empty,Empty" group.long (0x50200+0xF0)++0x03 line.long 0x00 "GICH_APR0_ALIAS1,Active Priority Register" bitfld.long 0x00 31. " APB31 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 30. " APB30 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 29. " APB29 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 28. " APB28 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 27. " APB27 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 26. " APB26 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 25. " APB25 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 24. " APB24 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 23. " APB23 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 22. " APB22 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 21. " APB21 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 20. " APB20 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 19. " APB19 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 18. " APB18 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 17. " APB17 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 16. " APB16 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 15. " APB15 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 14. " APB14 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 13. " APB13 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 12. " APB12 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 11. " APB11 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 10. " APB10 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 9. " APB9 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 8. " APB8 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 7. " APB7 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 6. " APB6 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 5. " APB5 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 4. " APB4 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 3. " APB3 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 2. " APB2 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 1. " APB1 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 0. " APB0 ,Determines whether the corresponding preemption level is active" "Not active,Active" group.long (0x50200+0x100)++0x0F line.long 0x00 "GICH_LR0_ALIAS1,List Register 0" bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x00 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x00 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x00 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x00 10.--19. 1. " PHYSICALID ,Indicates the physical interrupt ID that the hypervisor forwards to the Distributor" hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" line.long 0x04 "GICH_LR1_ALIAS1,List Register 1" bitfld.long 0x04 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x04 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x04 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x04 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x04 10.--19. 1. " PHYSICALID ,Indicates the physical interrupt ID that the hypervisor forwards to the Distributor" hexmask.long.word 0x04 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" line.long 0x08 "GICH_LR2_ALIAS1,List Register 2" bitfld.long 0x08 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x08 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x08 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x08 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x08 10.--19. 1. " PHYSICALID ,Indicates the physical interrupt ID that the hypervisor forwards to the Distributor" hexmask.long.word 0x08 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" line.long 0x0C "GICH_LR3_ALIAS1,List Register 3" bitfld.long 0x0C 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x0C 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x0C 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x0C 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x0C 10.--19. 1. " PHYSICALID ,Indicates the physical interrupt ID that the hypervisor forwards to the Distributor" hexmask.long.word 0x0C 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" group.long 0x50400++0x03 "Alias 2" line.long 0x00 "GICH_HCR_ALIAS2,Hypervisor Control Register" bitfld.long 0x00 27.--31. " EOICOUNT ,Counts the number of EOIs received that do not have a corresponding entry in the List registers" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 7. " VGRP1DIE ,VM Disable Group 1 Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 6. " VGRP1EIE ,VM Enable Group 1 Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " VGRP0DIE ,VM Disable Group 0 Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. " VGRP0EIE ,VM Disable Group 0 Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " NPIE ,No Pending Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " LRENPIE ,List Register Entry Not Present Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " UIE ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" rgroup.long (0x50400+0x04)++0x03 line.long 0x00 "GICH_VTR_ALIAS2,VGIC Type Register" bitfld.long 0x00 29.--31. " PRIBITS ,Number of priority bits" "Reserved,Reserved,Reserved,Reserved,5 bits 32 PRI levels,?..." textline " " bitfld.long 0x00 26.--28. " PREBITS ,Number of pre-emption bits" "Reserved,Reserved,Reserved,Reserved,5 bits 32 PRE levels,?..." textline " " bitfld.long 0x00 0.--5. " LISTREGS ,List regs number" "Reserved,Reserved,Reserved,4 lists,?..." group.long (0x50400+0x08)++0x03 line.long 0x00 "GICH_VMCR_ALIAS2,Virtual Machine Control Register" bitfld.long 0x00 27.--31. " VMPRIMASK ,Alias of GICV_PMR.Priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 21.--23. " VMBP ,Alias of GICV_BPR.Binary point" "0,1,2,3,4,5,6,7" bitfld.long 0x00 18.--20. " VMABP ,Alias of GICV_ABPR.Binary point" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 9. " VEM ,Alias of GICV_CTLR.EOImode" "0,1" bitfld.long 0x00 4. " VMCBPR ,Alias of GICV_CTLR.CBPR" "0,1" bitfld.long 0x00 3. " VMFIQEN ,Alias of GICV_CTLR.FIQEn" "0,1" textline " " bitfld.long 0x00 2. " VMACKCTL ,Alias of GICV_CTLR.AckCtl" "0,1" bitfld.long 0x00 1. " VMGRP1EN ,Alias of GICV_CTLR.EnableGrp1" "0,1" bitfld.long 0x00 0. " VMGRP0EN ,Alias of GICV_CTLR.EnableGrp0" "0,1" rgroup.long (0x50400+0x10)++0x03 line.long 0x00 "GICH_MISR_ALIAS2,Maintenance Interrupt Status Register" bitfld.long 0x00 7. " VGRP1D ,Disabled Group 1 maintenance interrupt" "No interrupt,Interrupt" bitfld.long 0x00 6. " VGRP1E ,Enabled Group 1 maintenance interrupt" "No interrupt,Interrupt" bitfld.long 0x00 5. " VGRP0D ,Disabled Group 0 maintenance interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 4. " VGRP0E ,Enabled Group 0 maintenance interrupt" "No interrupt,Interrupt" bitfld.long 0x00 3. " NP ,No Pending maintenance interrupt" "No interrupt,Interrupt" bitfld.long 0x00 2. " LRENP ,List Register Entry Not Present maintenance interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " U ,Underflow maintenance interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " EOI ,EOI maintenance interrupt" "No interrupt,Interrupt" rgroup.long (0x50400+0x20)++0x03 line.long 0x00 "GICH_EISR0_ALIAS2,End of Interrupt Status Register" bitfld.long 0x00 3. " STATUS3 ,EOI maintenance interrupt status for List register 3" "No interrupt,Interrupt" bitfld.long 0x00 2. " STATUS2 ,EOI maintenance interrupt status for List register 2" "No interrupt,Interrupt" bitfld.long 0x00 1. " STATUS1 ,EOI maintenance interrupt status for List register 1" "No interrupt,Interrupt" textline " " bitfld.long 0x00 0. " STATUS0 ,EOI maintenance interrupt status for List register 0" "No interrupt,Interrupt" rgroup.long (0x50400+0x30)++0x03 line.long 0x00 "GICH_ELSR0_ALIAS2,Empty List register Status Register" bitfld.long 0x00 3. " STATUS3 ,Emptiness status bit for List register 3" "Not empty,Empty" bitfld.long 0x00 2. " STATUS2 ,Emptiness status bit for List register 2" "Not empty,Empty" bitfld.long 0x00 1. " STATUS1 ,Emptiness status bit for List register 1" "Not empty,Empty" textline " " bitfld.long 0x00 0. " STATUS0 ,Emptiness status bit for List register 0" "Not empty,Empty" group.long (0x50400+0xF0)++0x03 line.long 0x00 "GICH_APR0_ALIAS2,Active Priority Register" bitfld.long 0x00 31. " APB31 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 30. " APB30 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 29. " APB29 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 28. " APB28 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 27. " APB27 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 26. " APB26 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 25. " APB25 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 24. " APB24 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 23. " APB23 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 22. " APB22 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 21. " APB21 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 20. " APB20 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 19. " APB19 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 18. " APB18 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 17. " APB17 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 16. " APB16 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 15. " APB15 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 14. " APB14 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 13. " APB13 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 12. " APB12 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 11. " APB11 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 10. " APB10 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 9. " APB9 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 8. " APB8 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 7. " APB7 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 6. " APB6 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 5. " APB5 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 4. " APB4 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 3. " APB3 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 2. " APB2 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 1. " APB1 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 0. " APB0 ,Determines whether the corresponding preemption level is active" "Not active,Active" group.long (0x50400+0x100)++0x0F line.long 0x00 "GICH_LR0_ALIAS2,List Register 0" bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x00 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x00 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x00 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x00 10.--19. 1. " PHYSICALID ,Indicates the physical interrupt ID that the hypervisor forwards to the Distributor" hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" line.long 0x04 "GICH_LR1_ALIAS2,List Register 1" bitfld.long 0x04 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x04 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x04 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x04 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x04 10.--19. 1. " PHYSICALID ,Indicates the physical interrupt ID that the hypervisor forwards to the Distributor" hexmask.long.word 0x04 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" line.long 0x08 "GICH_LR2_ALIAS2,List Register 2" bitfld.long 0x08 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x08 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x08 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x08 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x08 10.--19. 1. " PHYSICALID ,Indicates the physical interrupt ID that the hypervisor forwards to the Distributor" hexmask.long.word 0x08 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" line.long 0x0C "GICH_LR3_ALIAS2,List Register 3" bitfld.long 0x0C 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x0C 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x0C 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x0C 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x0C 10.--19. 1. " PHYSICALID ,Indicates the physical interrupt ID that the hypervisor forwards to the Distributor" hexmask.long.word 0x0C 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" group.long 0x50600++0x03 "Alias 3" line.long 0x00 "GICH_HCR_ALIAS3,Hypervisor Control Register" bitfld.long 0x00 27.--31. " EOICOUNT ,Counts the number of EOIs received that do not have a corresponding entry in the List registers" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 7. " VGRP1DIE ,VM Disable Group 1 Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 6. " VGRP1EIE ,VM Enable Group 1 Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " VGRP0DIE ,VM Disable Group 0 Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. " VGRP0EIE ,VM Disable Group 0 Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " NPIE ,No Pending Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " LRENPIE ,List Register Entry Not Present Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " UIE ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" rgroup.long (0x50600+0x04)++0x03 line.long 0x00 "GICH_VTR_ALIAS3,VGIC Type Register" bitfld.long 0x00 29.--31. " PRIBITS ,Number of priority bits" "Reserved,Reserved,Reserved,Reserved,5 bits 32 PRI levels,?..." textline " " bitfld.long 0x00 26.--28. " PREBITS ,Number of pre-emption bits" "Reserved,Reserved,Reserved,Reserved,5 bits 32 PRE levels,?..." textline " " bitfld.long 0x00 0.--5. " LISTREGS ,List regs number" "Reserved,Reserved,Reserved,4 lists,?..." group.long (0x50600+0x08)++0x03 line.long 0x00 "GICH_VMCR_ALIAS3,Virtual Machine Control Register" bitfld.long 0x00 27.--31. " VMPRIMASK ,Alias of GICV_PMR.Priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 21.--23. " VMBP ,Alias of GICV_BPR.Binary point" "0,1,2,3,4,5,6,7" bitfld.long 0x00 18.--20. " VMABP ,Alias of GICV_ABPR.Binary point" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 9. " VEM ,Alias of GICV_CTLR.EOImode" "0,1" bitfld.long 0x00 4. " VMCBPR ,Alias of GICV_CTLR.CBPR" "0,1" bitfld.long 0x00 3. " VMFIQEN ,Alias of GICV_CTLR.FIQEn" "0,1" textline " " bitfld.long 0x00 2. " VMACKCTL ,Alias of GICV_CTLR.AckCtl" "0,1" bitfld.long 0x00 1. " VMGRP1EN ,Alias of GICV_CTLR.EnableGrp1" "0,1" bitfld.long 0x00 0. " VMGRP0EN ,Alias of GICV_CTLR.EnableGrp0" "0,1" rgroup.long (0x50600+0x10)++0x03 line.long 0x00 "GICH_MISR_ALIAS3,Maintenance Interrupt Status Register" bitfld.long 0x00 7. " VGRP1D ,Disabled Group 1 maintenance interrupt" "No interrupt,Interrupt" bitfld.long 0x00 6. " VGRP1E ,Enabled Group 1 maintenance interrupt" "No interrupt,Interrupt" bitfld.long 0x00 5. " VGRP0D ,Disabled Group 0 maintenance interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 4. " VGRP0E ,Enabled Group 0 maintenance interrupt" "No interrupt,Interrupt" bitfld.long 0x00 3. " NP ,No Pending maintenance interrupt" "No interrupt,Interrupt" bitfld.long 0x00 2. " LRENP ,List Register Entry Not Present maintenance interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " U ,Underflow maintenance interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " EOI ,EOI maintenance interrupt" "No interrupt,Interrupt" rgroup.long (0x50600+0x20)++0x03 line.long 0x00 "GICH_EISR0_ALIAS3,End of Interrupt Status Register" bitfld.long 0x00 3. " STATUS3 ,EOI maintenance interrupt status for List register 3" "No interrupt,Interrupt" bitfld.long 0x00 2. " STATUS2 ,EOI maintenance interrupt status for List register 2" "No interrupt,Interrupt" bitfld.long 0x00 1. " STATUS1 ,EOI maintenance interrupt status for List register 1" "No interrupt,Interrupt" textline " " bitfld.long 0x00 0. " STATUS0 ,EOI maintenance interrupt status for List register 0" "No interrupt,Interrupt" rgroup.long (0x50600+0x30)++0x03 line.long 0x00 "GICH_ELSR0_ALIAS3,Empty List register Status Register" bitfld.long 0x00 3. " STATUS3 ,Emptiness status bit for List register 3" "Not empty,Empty" bitfld.long 0x00 2. " STATUS2 ,Emptiness status bit for List register 2" "Not empty,Empty" bitfld.long 0x00 1. " STATUS1 ,Emptiness status bit for List register 1" "Not empty,Empty" textline " " bitfld.long 0x00 0. " STATUS0 ,Emptiness status bit for List register 0" "Not empty,Empty" group.long (0x50600+0xF0)++0x03 line.long 0x00 "GICH_APR0_ALIAS3,Active Priority Register" bitfld.long 0x00 31. " APB31 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 30. " APB30 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 29. " APB29 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 28. " APB28 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 27. " APB27 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 26. " APB26 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 25. " APB25 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 24. " APB24 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 23. " APB23 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 22. " APB22 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 21. " APB21 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 20. " APB20 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 19. " APB19 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 18. " APB18 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 17. " APB17 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 16. " APB16 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 15. " APB15 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 14. " APB14 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 13. " APB13 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 12. " APB12 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 11. " APB11 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 10. " APB10 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 9. " APB9 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 8. " APB8 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 7. " APB7 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 6. " APB6 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 5. " APB5 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 4. " APB4 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 3. " APB3 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 2. " APB2 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 1. " APB1 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 0. " APB0 ,Determines whether the corresponding preemption level is active" "Not active,Active" group.long (0x50600+0x100)++0x0F line.long 0x00 "GICH_LR0_ALIAS3,List Register 0" bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x00 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x00 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x00 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x00 10.--19. 1. " PHYSICALID ,Indicates the physical interrupt ID that the hypervisor forwards to the Distributor" hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" line.long 0x04 "GICH_LR1_ALIAS3,List Register 1" bitfld.long 0x04 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x04 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x04 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x04 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x04 10.--19. 1. " PHYSICALID ,Indicates the physical interrupt ID that the hypervisor forwards to the Distributor" hexmask.long.word 0x04 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" line.long 0x08 "GICH_LR2_ALIAS3,List Register 2" bitfld.long 0x08 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x08 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x08 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x08 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x08 10.--19. 1. " PHYSICALID ,Indicates the physical interrupt ID that the hypervisor forwards to the Distributor" hexmask.long.word 0x08 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" line.long 0x0C "GICH_LR3_ALIAS3,List Register 3" bitfld.long 0x0C 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x0C 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x0C 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x0C 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x0C 10.--19. 1. " PHYSICALID ,Indicates the physical interrupt ID that the hypervisor forwards to the Distributor" hexmask.long.word 0x0C 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" group.long 0x50800++0x03 "Alias 4" line.long 0x00 "GICH_HCR_ALIAS4,Hypervisor Control Register" bitfld.long 0x00 27.--31. " EOICOUNT ,Counts the number of EOIs received that do not have a corresponding entry in the List registers" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 7. " VGRP1DIE ,VM Disable Group 1 Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 6. " VGRP1EIE ,VM Enable Group 1 Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " VGRP0DIE ,VM Disable Group 0 Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. " VGRP0EIE ,VM Disable Group 0 Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " NPIE ,No Pending Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " LRENPIE ,List Register Entry Not Present Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " UIE ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" rgroup.long (0x50800+0x04)++0x03 line.long 0x00 "GICH_VTR_ALIAS4,VGIC Type Register" bitfld.long 0x00 29.--31. " PRIBITS ,Number of priority bits" "Reserved,Reserved,Reserved,Reserved,5 bits 32 PRI levels,?..." textline " " bitfld.long 0x00 26.--28. " PREBITS ,Number of pre-emption bits" "Reserved,Reserved,Reserved,Reserved,5 bits 32 PRE levels,?..." textline " " bitfld.long 0x00 0.--5. " LISTREGS ,List regs number" "Reserved,Reserved,Reserved,4 lists,?..." group.long (0x50800+0x08)++0x03 line.long 0x00 "GICH_VMCR_ALIAS4,Virtual Machine Control Register" bitfld.long 0x00 27.--31. " VMPRIMASK ,Alias of GICV_PMR.Priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 21.--23. " VMBP ,Alias of GICV_BPR.Binary point" "0,1,2,3,4,5,6,7" bitfld.long 0x00 18.--20. " VMABP ,Alias of GICV_ABPR.Binary point" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 9. " VEM ,Alias of GICV_CTLR.EOImode" "0,1" bitfld.long 0x00 4. " VMCBPR ,Alias of GICV_CTLR.CBPR" "0,1" bitfld.long 0x00 3. " VMFIQEN ,Alias of GICV_CTLR.FIQEn" "0,1" textline " " bitfld.long 0x00 2. " VMACKCTL ,Alias of GICV_CTLR.AckCtl" "0,1" bitfld.long 0x00 1. " VMGRP1EN ,Alias of GICV_CTLR.EnableGrp1" "0,1" bitfld.long 0x00 0. " VMGRP0EN ,Alias of GICV_CTLR.EnableGrp0" "0,1" rgroup.long (0x50800+0x10)++0x03 line.long 0x00 "GICH_MISR_ALIAS4,Maintenance Interrupt Status Register" bitfld.long 0x00 7. " VGRP1D ,Disabled Group 1 maintenance interrupt" "No interrupt,Interrupt" bitfld.long 0x00 6. " VGRP1E ,Enabled Group 1 maintenance interrupt" "No interrupt,Interrupt" bitfld.long 0x00 5. " VGRP0D ,Disabled Group 0 maintenance interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 4. " VGRP0E ,Enabled Group 0 maintenance interrupt" "No interrupt,Interrupt" bitfld.long 0x00 3. " NP ,No Pending maintenance interrupt" "No interrupt,Interrupt" bitfld.long 0x00 2. " LRENP ,List Register Entry Not Present maintenance interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " U ,Underflow maintenance interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " EOI ,EOI maintenance interrupt" "No interrupt,Interrupt" rgroup.long (0x50800+0x20)++0x03 line.long 0x00 "GICH_EISR0_ALIAS4,End of Interrupt Status Register" bitfld.long 0x00 3. " STATUS3 ,EOI maintenance interrupt status for List register 3" "No interrupt,Interrupt" bitfld.long 0x00 2. " STATUS2 ,EOI maintenance interrupt status for List register 2" "No interrupt,Interrupt" bitfld.long 0x00 1. " STATUS1 ,EOI maintenance interrupt status for List register 1" "No interrupt,Interrupt" textline " " bitfld.long 0x00 0. " STATUS0 ,EOI maintenance interrupt status for List register 0" "No interrupt,Interrupt" rgroup.long (0x50800+0x30)++0x03 line.long 0x00 "GICH_ELSR0_ALIAS4,Empty List register Status Register" bitfld.long 0x00 3. " STATUS3 ,Emptiness status bit for List register 3" "Not empty,Empty" bitfld.long 0x00 2. " STATUS2 ,Emptiness status bit for List register 2" "Not empty,Empty" bitfld.long 0x00 1. " STATUS1 ,Emptiness status bit for List register 1" "Not empty,Empty" textline " " bitfld.long 0x00 0. " STATUS0 ,Emptiness status bit for List register 0" "Not empty,Empty" group.long (0x50800+0xF0)++0x03 line.long 0x00 "GICH_APR0_ALIAS4,Active Priority Register" bitfld.long 0x00 31. " APB31 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 30. " APB30 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 29. " APB29 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 28. " APB28 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 27. " APB27 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 26. " APB26 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 25. " APB25 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 24. " APB24 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 23. " APB23 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 22. " APB22 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 21. " APB21 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 20. " APB20 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 19. " APB19 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 18. " APB18 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 17. " APB17 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 16. " APB16 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 15. " APB15 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 14. " APB14 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 13. " APB13 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 12. " APB12 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 11. " APB11 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 10. " APB10 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 9. " APB9 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 8. " APB8 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 7. " APB7 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 6. " APB6 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 5. " APB5 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 4. " APB4 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 3. " APB3 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 2. " APB2 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 1. " APB1 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 0. " APB0 ,Determines whether the corresponding preemption level is active" "Not active,Active" group.long (0x50800+0x100)++0x0F line.long 0x00 "GICH_LR0_ALIAS4,List Register 0" bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x00 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x00 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x00 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x00 10.--19. 1. " PHYSICALID ,Indicates the physical interrupt ID that the hypervisor forwards to the Distributor" hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" line.long 0x04 "GICH_LR1_ALIAS4,List Register 1" bitfld.long 0x04 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x04 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x04 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x04 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x04 10.--19. 1. " PHYSICALID ,Indicates the physical interrupt ID that the hypervisor forwards to the Distributor" hexmask.long.word 0x04 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" line.long 0x08 "GICH_LR2_ALIAS4,List Register 2" bitfld.long 0x08 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x08 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x08 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x08 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x08 10.--19. 1. " PHYSICALID ,Indicates the physical interrupt ID that the hypervisor forwards to the Distributor" hexmask.long.word 0x08 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" line.long 0x0C "GICH_LR3_ALIAS4,List Register 3" bitfld.long 0x0C 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x0C 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x0C 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x0C 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x0C 10.--19. 1. " PHYSICALID ,Indicates the physical interrupt ID that the hypervisor forwards to the Distributor" hexmask.long.word 0x0C 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" group.long 0x50A00++0x03 "Alias 5" line.long 0x00 "GICH_HCR_ALIAS5,Hypervisor Control Register" bitfld.long 0x00 27.--31. " EOICOUNT ,Counts the number of EOIs received that do not have a corresponding entry in the List registers" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 7. " VGRP1DIE ,VM Disable Group 1 Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 6. " VGRP1EIE ,VM Enable Group 1 Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " VGRP0DIE ,VM Disable Group 0 Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. " VGRP0EIE ,VM Disable Group 0 Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " NPIE ,No Pending Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " LRENPIE ,List Register Entry Not Present Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " UIE ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" rgroup.long (0x50A00+0x04)++0x03 line.long 0x00 "GICH_VTR_ALIAS5,VGIC Type Register" bitfld.long 0x00 29.--31. " PRIBITS ,Number of priority bits" "Reserved,Reserved,Reserved,Reserved,5 bits 32 PRI levels,?..." textline " " bitfld.long 0x00 26.--28. " PREBITS ,Number of pre-emption bits" "Reserved,Reserved,Reserved,Reserved,5 bits 32 PRE levels,?..." textline " " bitfld.long 0x00 0.--5. " LISTREGS ,List regs number" "Reserved,Reserved,Reserved,4 lists,?..." group.long (0x50A00+0x08)++0x03 line.long 0x00 "GICH_VMCR_ALIAS5,Virtual Machine Control Register" bitfld.long 0x00 27.--31. " VMPRIMASK ,Alias of GICV_PMR.Priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 21.--23. " VMBP ,Alias of GICV_BPR.Binary point" "0,1,2,3,4,5,6,7" bitfld.long 0x00 18.--20. " VMABP ,Alias of GICV_ABPR.Binary point" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 9. " VEM ,Alias of GICV_CTLR.EOImode" "0,1" bitfld.long 0x00 4. " VMCBPR ,Alias of GICV_CTLR.CBPR" "0,1" bitfld.long 0x00 3. " VMFIQEN ,Alias of GICV_CTLR.FIQEn" "0,1" textline " " bitfld.long 0x00 2. " VMACKCTL ,Alias of GICV_CTLR.AckCtl" "0,1" bitfld.long 0x00 1. " VMGRP1EN ,Alias of GICV_CTLR.EnableGrp1" "0,1" bitfld.long 0x00 0. " VMGRP0EN ,Alias of GICV_CTLR.EnableGrp0" "0,1" rgroup.long (0x50A00+0x10)++0x03 line.long 0x00 "GICH_MISR_ALIAS5,Maintenance Interrupt Status Register" bitfld.long 0x00 7. " VGRP1D ,Disabled Group 1 maintenance interrupt" "No interrupt,Interrupt" bitfld.long 0x00 6. " VGRP1E ,Enabled Group 1 maintenance interrupt" "No interrupt,Interrupt" bitfld.long 0x00 5. " VGRP0D ,Disabled Group 0 maintenance interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 4. " VGRP0E ,Enabled Group 0 maintenance interrupt" "No interrupt,Interrupt" bitfld.long 0x00 3. " NP ,No Pending maintenance interrupt" "No interrupt,Interrupt" bitfld.long 0x00 2. " LRENP ,List Register Entry Not Present maintenance interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " U ,Underflow maintenance interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " EOI ,EOI maintenance interrupt" "No interrupt,Interrupt" rgroup.long (0x50A00+0x20)++0x03 line.long 0x00 "GICH_EISR0_ALIAS5,End of Interrupt Status Register" bitfld.long 0x00 3. " STATUS3 ,EOI maintenance interrupt status for List register 3" "No interrupt,Interrupt" bitfld.long 0x00 2. " STATUS2 ,EOI maintenance interrupt status for List register 2" "No interrupt,Interrupt" bitfld.long 0x00 1. " STATUS1 ,EOI maintenance interrupt status for List register 1" "No interrupt,Interrupt" textline " " bitfld.long 0x00 0. " STATUS0 ,EOI maintenance interrupt status for List register 0" "No interrupt,Interrupt" rgroup.long (0x50A00+0x30)++0x03 line.long 0x00 "GICH_ELSR0_ALIAS5,Empty List register Status Register" bitfld.long 0x00 3. " STATUS3 ,Emptiness status bit for List register 3" "Not empty,Empty" bitfld.long 0x00 2. " STATUS2 ,Emptiness status bit for List register 2" "Not empty,Empty" bitfld.long 0x00 1. " STATUS1 ,Emptiness status bit for List register 1" "Not empty,Empty" textline " " bitfld.long 0x00 0. " STATUS0 ,Emptiness status bit for List register 0" "Not empty,Empty" group.long (0x50A00+0xF0)++0x03 line.long 0x00 "GICH_APR0_ALIAS5,Active Priority Register" bitfld.long 0x00 31. " APB31 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 30. " APB30 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 29. " APB29 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 28. " APB28 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 27. " APB27 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 26. " APB26 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 25. " APB25 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 24. " APB24 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 23. " APB23 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 22. " APB22 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 21. " APB21 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 20. " APB20 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 19. " APB19 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 18. " APB18 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 17. " APB17 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 16. " APB16 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 15. " APB15 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 14. " APB14 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 13. " APB13 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 12. " APB12 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 11. " APB11 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 10. " APB10 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 9. " APB9 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 8. " APB8 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 7. " APB7 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 6. " APB6 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 5. " APB5 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 4. " APB4 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 3. " APB3 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 2. " APB2 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 1. " APB1 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 0. " APB0 ,Determines whether the corresponding preemption level is active" "Not active,Active" group.long (0x50A00+0x100)++0x0F line.long 0x00 "GICH_LR0_ALIAS5,List Register 0" bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x00 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x00 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x00 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x00 10.--19. 1. " PHYSICALID ,Indicates the physical interrupt ID that the hypervisor forwards to the Distributor" hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" line.long 0x04 "GICH_LR1_ALIAS5,List Register 1" bitfld.long 0x04 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x04 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x04 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x04 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x04 10.--19. 1. " PHYSICALID ,Indicates the physical interrupt ID that the hypervisor forwards to the Distributor" hexmask.long.word 0x04 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" line.long 0x08 "GICH_LR2_ALIAS5,List Register 2" bitfld.long 0x08 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x08 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x08 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x08 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x08 10.--19. 1. " PHYSICALID ,Indicates the physical interrupt ID that the hypervisor forwards to the Distributor" hexmask.long.word 0x08 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" line.long 0x0C "GICH_LR3_ALIAS5,List Register 3" bitfld.long 0x0C 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x0C 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x0C 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x0C 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x0C 10.--19. 1. " PHYSICALID ,Indicates the physical interrupt ID that the hypervisor forwards to the Distributor" hexmask.long.word 0x0C 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" group.long 0x50C00++0x03 "Alias 6" line.long 0x00 "GICH_HCR_ALIAS6,Hypervisor Control Register" bitfld.long 0x00 27.--31. " EOICOUNT ,Counts the number of EOIs received that do not have a corresponding entry in the List registers" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 7. " VGRP1DIE ,VM Disable Group 1 Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 6. " VGRP1EIE ,VM Enable Group 1 Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " VGRP0DIE ,VM Disable Group 0 Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. " VGRP0EIE ,VM Disable Group 0 Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " NPIE ,No Pending Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " LRENPIE ,List Register Entry Not Present Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " UIE ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" rgroup.long (0x50C00+0x04)++0x03 line.long 0x00 "GICH_VTR_ALIAS6,VGIC Type Register" bitfld.long 0x00 29.--31. " PRIBITS ,Number of priority bits" "Reserved,Reserved,Reserved,Reserved,5 bits 32 PRI levels,?..." textline " " bitfld.long 0x00 26.--28. " PREBITS ,Number of pre-emption bits" "Reserved,Reserved,Reserved,Reserved,5 bits 32 PRE levels,?..." textline " " bitfld.long 0x00 0.--5. " LISTREGS ,List regs number" "Reserved,Reserved,Reserved,4 lists,?..." group.long (0x50C00+0x08)++0x03 line.long 0x00 "GICH_VMCR_ALIAS6,Virtual Machine Control Register" bitfld.long 0x00 27.--31. " VMPRIMASK ,Alias of GICV_PMR.Priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 21.--23. " VMBP ,Alias of GICV_BPR.Binary point" "0,1,2,3,4,5,6,7" bitfld.long 0x00 18.--20. " VMABP ,Alias of GICV_ABPR.Binary point" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 9. " VEM ,Alias of GICV_CTLR.EOImode" "0,1" bitfld.long 0x00 4. " VMCBPR ,Alias of GICV_CTLR.CBPR" "0,1" bitfld.long 0x00 3. " VMFIQEN ,Alias of GICV_CTLR.FIQEn" "0,1" textline " " bitfld.long 0x00 2. " VMACKCTL ,Alias of GICV_CTLR.AckCtl" "0,1" bitfld.long 0x00 1. " VMGRP1EN ,Alias of GICV_CTLR.EnableGrp1" "0,1" bitfld.long 0x00 0. " VMGRP0EN ,Alias of GICV_CTLR.EnableGrp0" "0,1" rgroup.long (0x50C00+0x10)++0x03 line.long 0x00 "GICH_MISR_ALIAS6,Maintenance Interrupt Status Register" bitfld.long 0x00 7. " VGRP1D ,Disabled Group 1 maintenance interrupt" "No interrupt,Interrupt" bitfld.long 0x00 6. " VGRP1E ,Enabled Group 1 maintenance interrupt" "No interrupt,Interrupt" bitfld.long 0x00 5. " VGRP0D ,Disabled Group 0 maintenance interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 4. " VGRP0E ,Enabled Group 0 maintenance interrupt" "No interrupt,Interrupt" bitfld.long 0x00 3. " NP ,No Pending maintenance interrupt" "No interrupt,Interrupt" bitfld.long 0x00 2. " LRENP ,List Register Entry Not Present maintenance interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " U ,Underflow maintenance interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " EOI ,EOI maintenance interrupt" "No interrupt,Interrupt" rgroup.long (0x50C00+0x20)++0x03 line.long 0x00 "GICH_EISR0_ALIAS6,End of Interrupt Status Register" bitfld.long 0x00 3. " STATUS3 ,EOI maintenance interrupt status for List register 3" "No interrupt,Interrupt" bitfld.long 0x00 2. " STATUS2 ,EOI maintenance interrupt status for List register 2" "No interrupt,Interrupt" bitfld.long 0x00 1. " STATUS1 ,EOI maintenance interrupt status for List register 1" "No interrupt,Interrupt" textline " " bitfld.long 0x00 0. " STATUS0 ,EOI maintenance interrupt status for List register 0" "No interrupt,Interrupt" rgroup.long (0x50C00+0x30)++0x03 line.long 0x00 "GICH_ELSR0_ALIAS6,Empty List register Status Register" bitfld.long 0x00 3. " STATUS3 ,Emptiness status bit for List register 3" "Not empty,Empty" bitfld.long 0x00 2. " STATUS2 ,Emptiness status bit for List register 2" "Not empty,Empty" bitfld.long 0x00 1. " STATUS1 ,Emptiness status bit for List register 1" "Not empty,Empty" textline " " bitfld.long 0x00 0. " STATUS0 ,Emptiness status bit for List register 0" "Not empty,Empty" group.long (0x50C00+0xF0)++0x03 line.long 0x00 "GICH_APR0_ALIAS6,Active Priority Register" bitfld.long 0x00 31. " APB31 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 30. " APB30 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 29. " APB29 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 28. " APB28 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 27. " APB27 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 26. " APB26 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 25. " APB25 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 24. " APB24 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 23. " APB23 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 22. " APB22 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 21. " APB21 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 20. " APB20 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 19. " APB19 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 18. " APB18 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 17. " APB17 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 16. " APB16 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 15. " APB15 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 14. " APB14 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 13. " APB13 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 12. " APB12 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 11. " APB11 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 10. " APB10 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 9. " APB9 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 8. " APB8 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 7. " APB7 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 6. " APB6 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 5. " APB5 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 4. " APB4 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 3. " APB3 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 2. " APB2 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 1. " APB1 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 0. " APB0 ,Determines whether the corresponding preemption level is active" "Not active,Active" group.long (0x50C00+0x100)++0x0F line.long 0x00 "GICH_LR0_ALIAS6,List Register 0" bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x00 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x00 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x00 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x00 10.--19. 1. " PHYSICALID ,Indicates the physical interrupt ID that the hypervisor forwards to the Distributor" hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" line.long 0x04 "GICH_LR1_ALIAS6,List Register 1" bitfld.long 0x04 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x04 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x04 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x04 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x04 10.--19. 1. " PHYSICALID ,Indicates the physical interrupt ID that the hypervisor forwards to the Distributor" hexmask.long.word 0x04 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" line.long 0x08 "GICH_LR2_ALIAS6,List Register 2" bitfld.long 0x08 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x08 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x08 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x08 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x08 10.--19. 1. " PHYSICALID ,Indicates the physical interrupt ID that the hypervisor forwards to the Distributor" hexmask.long.word 0x08 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" line.long 0x0C "GICH_LR3_ALIAS6,List Register 3" bitfld.long 0x0C 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x0C 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x0C 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x0C 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x0C 10.--19. 1. " PHYSICALID ,Indicates the physical interrupt ID that the hypervisor forwards to the Distributor" hexmask.long.word 0x0C 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" group.long 0x50E00++0x03 "Alias 7" line.long 0x00 "GICH_HCR_ALIAS7,Hypervisor Control Register" bitfld.long 0x00 27.--31. " EOICOUNT ,Counts the number of EOIs received that do not have a corresponding entry in the List registers" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 7. " VGRP1DIE ,VM Disable Group 1 Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 6. " VGRP1EIE ,VM Enable Group 1 Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " VGRP0DIE ,VM Disable Group 0 Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. " VGRP0EIE ,VM Disable Group 0 Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " NPIE ,No Pending Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " LRENPIE ,List Register Entry Not Present Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " UIE ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" rgroup.long (0x50E00+0x04)++0x03 line.long 0x00 "GICH_VTR_ALIAS7,VGIC Type Register" bitfld.long 0x00 29.--31. " PRIBITS ,Number of priority bits" "Reserved,Reserved,Reserved,Reserved,5 bits 32 PRI levels,?..." textline " " bitfld.long 0x00 26.--28. " PREBITS ,Number of pre-emption bits" "Reserved,Reserved,Reserved,Reserved,5 bits 32 PRE levels,?..." textline " " bitfld.long 0x00 0.--5. " LISTREGS ,List regs number" "Reserved,Reserved,Reserved,4 lists,?..." group.long (0x50E00+0x08)++0x03 line.long 0x00 "GICH_VMCR_ALIAS7,Virtual Machine Control Register" bitfld.long 0x00 27.--31. " VMPRIMASK ,Alias of GICV_PMR.Priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 21.--23. " VMBP ,Alias of GICV_BPR.Binary point" "0,1,2,3,4,5,6,7" bitfld.long 0x00 18.--20. " VMABP ,Alias of GICV_ABPR.Binary point" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 9. " VEM ,Alias of GICV_CTLR.EOImode" "0,1" bitfld.long 0x00 4. " VMCBPR ,Alias of GICV_CTLR.CBPR" "0,1" bitfld.long 0x00 3. " VMFIQEN ,Alias of GICV_CTLR.FIQEn" "0,1" textline " " bitfld.long 0x00 2. " VMACKCTL ,Alias of GICV_CTLR.AckCtl" "0,1" bitfld.long 0x00 1. " VMGRP1EN ,Alias of GICV_CTLR.EnableGrp1" "0,1" bitfld.long 0x00 0. " VMGRP0EN ,Alias of GICV_CTLR.EnableGrp0" "0,1" rgroup.long (0x50E00+0x10)++0x03 line.long 0x00 "GICH_MISR_ALIAS7,Maintenance Interrupt Status Register" bitfld.long 0x00 7. " VGRP1D ,Disabled Group 1 maintenance interrupt" "No interrupt,Interrupt" bitfld.long 0x00 6. " VGRP1E ,Enabled Group 1 maintenance interrupt" "No interrupt,Interrupt" bitfld.long 0x00 5. " VGRP0D ,Disabled Group 0 maintenance interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 4. " VGRP0E ,Enabled Group 0 maintenance interrupt" "No interrupt,Interrupt" bitfld.long 0x00 3. " NP ,No Pending maintenance interrupt" "No interrupt,Interrupt" bitfld.long 0x00 2. " LRENP ,List Register Entry Not Present maintenance interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " U ,Underflow maintenance interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " EOI ,EOI maintenance interrupt" "No interrupt,Interrupt" rgroup.long (0x50E00+0x20)++0x03 line.long 0x00 "GICH_EISR0_ALIAS7,End of Interrupt Status Register" bitfld.long 0x00 3. " STATUS3 ,EOI maintenance interrupt status for List register 3" "No interrupt,Interrupt" bitfld.long 0x00 2. " STATUS2 ,EOI maintenance interrupt status for List register 2" "No interrupt,Interrupt" bitfld.long 0x00 1. " STATUS1 ,EOI maintenance interrupt status for List register 1" "No interrupt,Interrupt" textline " " bitfld.long 0x00 0. " STATUS0 ,EOI maintenance interrupt status for List register 0" "No interrupt,Interrupt" rgroup.long (0x50E00+0x30)++0x03 line.long 0x00 "GICH_ELSR0_ALIAS7,Empty List register Status Register" bitfld.long 0x00 3. " STATUS3 ,Emptiness status bit for List register 3" "Not empty,Empty" bitfld.long 0x00 2. " STATUS2 ,Emptiness status bit for List register 2" "Not empty,Empty" bitfld.long 0x00 1. " STATUS1 ,Emptiness status bit for List register 1" "Not empty,Empty" textline " " bitfld.long 0x00 0. " STATUS0 ,Emptiness status bit for List register 0" "Not empty,Empty" group.long (0x50E00+0xF0)++0x03 line.long 0x00 "GICH_APR0_ALIAS7,Active Priority Register" bitfld.long 0x00 31. " APB31 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 30. " APB30 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 29. " APB29 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 28. " APB28 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 27. " APB27 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 26. " APB26 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 25. " APB25 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 24. " APB24 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 23. " APB23 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 22. " APB22 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 21. " APB21 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 20. " APB20 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 19. " APB19 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 18. " APB18 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 17. " APB17 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 16. " APB16 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 15. " APB15 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 14. " APB14 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 13. " APB13 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 12. " APB12 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 11. " APB11 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 10. " APB10 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 9. " APB9 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 8. " APB8 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 7. " APB7 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 6. " APB6 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 5. " APB5 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 4. " APB4 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 3. " APB3 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 2. " APB2 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 1. " APB1 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 0. " APB0 ,Determines whether the corresponding preemption level is active" "Not active,Active" group.long (0x50E00+0x100)++0x0F line.long 0x00 "GICH_LR0_ALIAS7,List Register 0" bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x00 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x00 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x00 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x00 10.--19. 1. " PHYSICALID ,Indicates the physical interrupt ID that the hypervisor forwards to the Distributor" hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" line.long 0x04 "GICH_LR1_ALIAS7,List Register 1" bitfld.long 0x04 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x04 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x04 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x04 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x04 10.--19. 1. " PHYSICALID ,Indicates the physical interrupt ID that the hypervisor forwards to the Distributor" hexmask.long.word 0x04 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" line.long 0x08 "GICH_LR2_ALIAS7,List Register 2" bitfld.long 0x08 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x08 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x08 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x08 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x08 10.--19. 1. " PHYSICALID ,Indicates the physical interrupt ID that the hypervisor forwards to the Distributor" hexmask.long.word 0x08 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" line.long 0x0C "GICH_LR3_ALIAS7,List Register 3" bitfld.long 0x0C 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x0C 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x0C 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x0C 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x0C 10.--19. 1. " PHYSICALID ,Indicates the physical interrupt ID that the hypervisor forwards to the Distributor" hexmask.long.word 0x0C 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" tree.end width 13. tree "Virtual Cpu Interface" group.long 0x60000++0x0B line.long 0x00 "GICV_CTLR,Virtual Machine Control Register" bitfld.long 0x00 9. " EOIMODE ,Controls the behavior associated with the GICV_EOIR GICV_AEOIR and GICV_DIR registers" "Priority drop/Deactivate,Priority drop" bitfld.long 0x00 4. " CBPR ,Controls whether the GICV_BPR controls both Group 0 and Group 1 virtual interrupts" "Group 0,Group 1" bitfld.long 0x00 3. " FIQEN ,Controls whether interrupts marked as Group 0 are presented as virtual FIQs" "IRQs,FIQs" textline " " bitfld.long 0x00 2. " ACKCTL ,Acknowledge Control" "ID 1022 interrupt,Corresponding interrupt" bitfld.long 0x00 1. " ENABLEGRP1 ,Enables the signaling of Group 1 virtual interrupts by the virtual CPU interface to the virtual machine" "Disabled,Enabled" bitfld.long 0x00 0. " ENABLEGRP0 ,Enables the signaling of Group 0 virtual interrupts by the virtual CPU interface to the virtual machine" "Disabled,Enabled" line.long 0x04 "GICV_PMR,VM Priority Mask Register" bitfld.long 0x04 3.--7. " PRIORITY ,Priority mask level for CPU interface" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x08 "GICV_BPR,VM Binary Point Register" bitfld.long 0x08 0.--2. " BINARY_POINT ,The value of this field controls how the 8-bit interrupt priority field is split into a group priority field and subpriority field" "Reserved,Reserved,[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]" hgroup.long 0x6000C++0x03 hide.long 0x00 "GICV_IAR,VM Interrupt Acknowledge Register" in wgroup.long 0x60010++0x03 line.long 0x00 "GICV_EOIR,VM End of Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation if the write refers to an SGI this field contains the CPUID value from the corresponding GICC_IAR access" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " EOIINTID ,The Interrupt ID value from the corresponding GICC_IAR access" rgroup.long 0x60014++0x07 line.long 0x00 "GICV_RPR,VM Running Priority Register" hexmask.long.byte 0x00 0.--7. 1. " PRIORITY ,The current running priority on the Virtual CPU interface" line.long 0x04 "GICV_HPPIR,VM Highest Priority Pending Interrupt Register" bitfld.long 0x04 10.--12. " CPUID ,On a multiprocessor implementation if the PENDINTID field returns the ID of an SGI this field contains the CPUID value for that interrupt" "0,1,2,3,4,5,6,7" hexmask.long.word 0x04 0.--9. 1. " PENDINTID ,The interrupt ID of the highest priority pending interrupt" group.long 0x6001C++0x03 line.long 0x00 "GICV_ABPR,VM Aliased Binary Point Register" bitfld.long 0x00 0.--2. " BINARY_POINT ,The value of this field controls how the 8-bit interrupt priority field is split into a group priority field and subpriority field" "[7:1]/[0],[7:2]/[1:0],[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]" hgroup.long 0x60020++0x03 hide.long 0x00 "GICV_AIAR,VM Aliased Interrupt Acknowledge Register" in wgroup.long 0x60024++0x03 line.long 0x00 "GICV_AEOIR,VM Aliased End of Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation if the write refers to an SGI this field contains the CPUID value from the corresponding GICC_IAR access" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " EOIINTID ,The Interrupt ID value from the corresponding GICC_IAR access" rgroup.long 0x60028++0x03 line.long 0x00 "GICV_AHPPIR,VM Aliased Highest Priority Pending Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation if the PENDINTID field returns the ID of an SGI this field contains the CPUID value for that interrupt" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " PENDINTID ,The interrupt ID of the highest priority pending interrupt" group.long 0x600D0++0x03 line.long 0x00 "GICV_APR0,VM Active Priority Register" bitfld.long 0x00 31. " APB31 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 30. " APB30 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 29. " APB29 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 28. " APB28 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 27. " APB27 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 26. " APB26 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 25. " APB25 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 24. " APB24 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 23. " APB23 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 22. " APB22 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 21. " APB21 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 20. " APB20 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 19. " APB19 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 18. " APB18 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 17. " APB17 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 16. " APB16 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 15. " APB15 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 14. " APB14 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 13. " APB13 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 12. " APB12 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 11. " APB11 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 10. " APB10 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 9. " APB9 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 8. " APB8 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 7. " APB7 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 6. " APB6 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 5. " APB5 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 4. " APB4 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 3. " APB3 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 2. " APB2 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 1. " APB1 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 0. " APB0 ,Determines whether the corresponding preemption level is active" "Not active,Active" rgroup.long 0x600FC++0x03 line.long 0x00 "GICV_IIDR,VM CPU Interface Identification Register" hexmask.long.word 0x00 20.--31. 1. " PRODID ,Product ID" bitfld.long 0x00 16.--19. " ARCH_VER ,Identifies the architecture version of the GIC" ",GICv2,?..." textline " " bitfld.long 0x00 12.--15. " REV ,Revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 0.--11. 1. " IMP ,Implementer" wgroup.long 0x70000++0x03 line.long 0x00 "GICV_DIR,VM Deactivate Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation this field identifies the processor that requested the interrupt" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " INTID ,The interrupt ID" tree.end width 0xB tree.end tree ("ARMv8 SMMUv2") tree "SMMU_REG (SMMU Configuration and Event Registers)" base ad:0xFD5F0000 width 16. group.byte 0x00++0x00 line.byte 0x00 "MISC_CTRL,Register Block Control Register" bitfld.byte 0x00 0. " SLVERR_ENABLE ,SLVERR enable/disable" "Disabled,Enabled" group.long 0x10++0x07 line.long 0x00 "ISR_0,Interrupt Status Register" eventfld.long 0x00 31. " ADDR_DECODE_ERR ,Address decode error" "No error,Error" eventfld.long 0x00 4. " GBL_FLT_IRPT_NS ,non-secure global fault interrupt" "No interrupt,Interrupt" eventfld.long 0x00 3. " GBL_FLT_IRPT_S ,Secure global fault interrupt" "No interrupt,Interrupt" eventfld.long 0x00 2. " COMB_PERF_IRPT_TBU ,Combined Performance counter interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x00 1. " COMB_IRPT_S ,Secure combined interrupt" "No interrupt,Interrupt" eventfld.long 0x00 0. " COMB_IRPT_NS ,Non-secure combined interrupt" "No interrupt,Interrupt" line.long 0x04 "ISR_0,Interrupt Mask Register" setclrfld.long 0x04 31. 0x0C 31. 0x08 31. " ADDR_DECODE_ERR ,Address decode error interrupt mask" "Not masked,Masked" setclrfld.long 0x04 4. 0x0C 4. 0x08 4. " GBL_FLT_IRPT_NS ,non-secure global fault interrupt mask" "Not masked,Masked" setclrfld.long 0x04 3. 0x0C 3. 0x08 3. " GBL_FLT_IRPT_S ,Secure global fault interrupt mask" "Not masked,Masked" setclrfld.long 0x04 2. 0x0C 2. 0x08 2. " COMB_PERF_IRPT_TBU ,Combined Performance counter interrupt mask" "Not masked,Masked" textline " " setclrfld.long 0x04 1. 0x0C 1. 0x08 1. " COMB_IRPT_S ,Secure combined interrupt mask" "Not masked,Masked" setclrfld.long 0x04 0. 0x0C 0. 0x08 0. " COMB_IRPT_NS ,Non-secure combined interrupt mask" "Not masked,Masked" group.long 0x40++0x03 line.long 0x00 "QREQN,Low Power Signals for TBU Register" bitfld.long 0x00 14. " TBU_TBU5_5_CG ,Low power entry request signal for TBU TBU5_5" "Not requested,Requested" bitfld.long 0x00 13. " TBU_TBU5_5_PD ,Low power entry request signal for TBU TBU5_5" "Not requested,Requested" bitfld.long 0x00 12. " TBU_TBU4_4_CG ,Low power entry request signal for TBU TBU4_4" "Not requested,Requested" bitfld.long 0x00 11. " TBU_TBU4_4_PD ,Low power entry request signal for TBU TBU4_4" "Not requested,Requested" textline " " bitfld.long 0x00 10. " TBU_TBU3_3_CG ,Low power entry request signal for TBU TBU3_3" "Not requested,Requested" bitfld.long 0x00 9. " TBU_TBU3_3_PD ,Low power entry request signal for TBU TBU3_3" "Not requested,Requested" bitfld.long 0x00 8. " PD_MST_BR_TBU2_2 ,Power down request signal for TBU Bridge Master TBU2_2" "Not requested,Requested" bitfld.long 0x00 7. " PD_SLV_BR_TBU2_2 ,Power down request signal for TBU Bridge Slave TBU2_2" "Not requested,Requested" textline " " bitfld.long 0x00 6. " TBU_TBU2_2_CG ,Low power entry request signal for TBU TBU2_2" "Not requested,Requested" bitfld.long 0x00 5. " TBU_TBU2_2_PD ,Low power entry request signal for TBU TBU2_2" "Not requested,Requested" bitfld.long 0x00 4. " TBU_TBU1_1_CG ,Low power entry request signal for TBU TBU1_1" "Not requested,Requested" bitfld.long 0x00 3. " TBU_TBU1_1_PD ,Low power entry request signal for TBU TBU1_1" "Not requested,Requested" textline " " bitfld.long 0x00 2. " TBU_TBU0_0_CG ,Low power entry request signal for TBU TBU0_0" "Not requested,Requested" bitfld.long 0x00 1. " TBU_TBU0_0_PD ,Low power entry request signal for TBU TBU0_0" "Not requested,Requested" bitfld.long 0x00 0. " TCU ,Low power entry request signal for TCU" "Not requested,Requested" group.long 0x54++0x07 line.long 0x00 "QREQN,Low Power Signals for TBU Register" bitfld.long 0x00 12. " SPNIDEN ,Allow counting of secure events by performance monitors" "Disabled,Enabled" bitfld.long 0x00 7. " AWAKEUP_PROG ,Wakeup signal for Programming interface" "No wake-up,Wake-up" line.long 0x04 "CONFIG_SIGNALS,Miscellaneous Signals Register" bitfld.long 0x04 1. " CFG_NORMALIZE ,Cache attribute normalizing behavior" "Low,High" width 0x0B tree.end tree.end elif (CORENAME()=="CORTEXR5MPCORE") tree "Core Registers (Cortex-R5MPCore)" AUTOINDENT.PUSH AUTOINDENT.OFF width 0x8 ; -------------------------------------------------------------------------------- ; Identification registers ; -------------------------------------------------------------------------------- tree "ID Registers" rgroup.long c15:0x00++0x00 line.long 0x00 "MIDR,Main ID Register" hexmask.long.byte 0x0 24.--31. 0x1 " IMPL ,Implementer code" bitfld.long 0x0 20.--23. " VAR ,Variant" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 16.--19. " ARCH ,Architecture" "Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,ARMv7" textline " " hexmask.long.word 0x0 4.--15. 0x1 " PART ,Primary Part Number" bitfld.long 0x0 0.--3. " REV ,Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long c15:0x100++0x00 line.long 0x00 "CTR,Cache Type Register" bitfld.long 0x00 24.--27. " CWG ,Cache Write-back Granule" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 20.--23. " ERG ,Exclusives Reservation Granule" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 16.--19. " DMINLINE ,D-Cache Minimum Line Size" "1 word,2 words,4 words,8 words,16 words,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words,4096 words,8192 words,16384 words,32768 words" bitfld.long 0x0 14.--15. " L1POLICY ,L1 Instruction cache policy" "Reserved,ASID,Virtual,Physical" textline " " bitfld.long 0x0 0.--3. " IMINLINE ,I-Cache Minimum Line Size" "1 word,2 words,4 words,8 words,16 words,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words,4096 words,8192 words,16384 words,32768 words" rgroup.long c15:0x400--0x400 line.long 0x0 "MPUIR,MPU type register" hexmask.long.byte 0x00 8.--15. 1. " REGNUM ,Number of regions" bitfld.long 0x00 0. " TYPE ,Type of MPU regions" "Unified,Seperated" rgroup.long c15:0x500++0x00 line.long 0x0 "MPIDR,Multiprocessor Affinity Register" bitfld.long 0x00 30.--31. " MULT_EXT ,Multiprocessing extensions" "No extensions,Reserved,Reserved,Part of a uniprocessor system" textline " " hexmask.long.byte 0x00 16.--23. 1. " AFFL2 ,Affitnity Level 2" hexmask.long.byte 0x00 8.--15. 1. " AFFL1 ,Affitnity Level 1" hexmask.long.byte 0x00 0.--7. 1. " AFFL0 ,Affitnity Level 0" textline " " rgroup.long c15:0x0410++0x00 line.long 0x00 "MMFR0,Memory Model Feature Register 0" bitfld.long 0x00 28.--31. " IT ,Instruction Type Support" "Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 24.--27. " FCSE ,Fast Context Switch Memory Mappings Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 20.--23. " ACR ,Auxiliary Control Register Support" "Reserved,Supported,?..." bitfld.long 0x00 16.--19. " TCM ,TCM and Associated DMA Support" "Not supported,?..." textline " " bitfld.long 0x00 12.--15. " SL ,Number of Shareability levels implemented" "1,?..." bitfld.long 0x00 8.--11. " OS ,Outermost Shareability domain support" "Supported,?..." textline " " bitfld.long 0x00 4.--7. " PMSA ,Physical Memory System Architecture (PMSA) Support" "Not supported,?..." bitfld.long 0x00 0.--3. " VMSA ,Virtual Memory System Architecture (VMSA) Support" "Reserved,Reserved,Reserved,Supported,?..." rgroup.long c15:0x0510++0x00 line.long 0x00 "MMFR1,Memory Model Feature Register 1" bitfld.long 0x00 28.--31. " BTB ,Branch Target Buffer Support" "Reserved,Reserved,Not required,?..." bitfld.long 0x00 24.--27. " L1TCO ,Test and Clean Operations on Data Cache/Harvard/Unified Architecture Support" "Not supported,?..." textline " " bitfld.long 0x00 20.--23. " L1UCMO ,L1 Cache/All Maintenance Operations/Unified Architecture Support" "Not supported,?..." bitfld.long 0x00 16.--19. " L1HCMO ,L1 Cache/All Maintenance Operations/Harvard Architecture Support" "Supported,?..." textline " " bitfld.long 0x00 12.--15. " L1UCLMOSW ,L1 Cache Line Maintenance Operations by Set and Way/Unified Architecture Support" "Not supported,?..." bitfld.long 0x00 8.--11. " L1HCLMOSW ,L1 Cache Line Maintenance Operations by Set and Way/Harvard Architecture Support" "Supported,?..." textline " " bitfld.long 0x00 4.--7. " L1UCLMOMVA ,L1 Cache Line Maintenance Operations by MVA/Unified Architecture Support" "Not supported,?..." bitfld.long 0x00 0.--3. " L1HCLMOMVA ,L1 Cache Line Maintenance Operations by MVA/Harvard Architecture" "Supported,?..." rgroup.long c15:0x0610++0x00 line.long 0x00 "MMFR2,Memory Model Feature Register 2" bitfld.long 0x00 28.--31. " HAF ,Hardware Access Flag Support" "Not supported,?..." bitfld.long 0x00 24.--27. " WFI ,Wait for Interrupt Stalling Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 20.--23. " MBF ,Memory Barrier Operations Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 16.--19. " UTLBMO ,TLB Maintenance Operations/Unified Architecture Support" "Not supported,?..." textline " " bitfld.long 0x00 12.--15. " HTLBMO ,TLB Maintenance Operations/Harvard Architecture Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 8.--11. " HL1CMRO ,Cache Maintenance Range Operations/Harvard Architecture Support" "Not supported,?..." textline " " bitfld.long 0x00 4.--7. " HL1BPCRO ,Background Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,?..." bitfld.long 0x00 0.--3. " HL1FPCRO ,Foreground Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,?..." rgroup.long c15:0x0710++0x00 line.long 0x00 "MMFR3,Memory Model Feature Register 3" bitfld.long 0x00 28.--31. " SS ,Supersection support" "Supported,?..." bitfld.long 0x00 20.--23. " CW ,Coherent walk" "Supported,?..." textline " " bitfld.long 0x00 12.--15. " MB ,Invalidate broadcast Support" "Reserved,Reserved,Supported,?..." textline " " bitfld.long 0x00 4.--7. " HCMOSW ,Invalidate Cache by Set and Way/Clean by Set and Way/Invalidate and Clean by Set and Way Support" "Reserved,Supported,?..." bitfld.long 0x00 0.--3. " HCMOMVA ,Invalidate Cache by MVA/Clean by MVA/Invalidate and Clean by MVA/Invalidate All Support" "Reserved,Supported,?..." rgroup.long c15:0x020++0x00 line.long 0x00 "ISAR0,Instruction Set Attributes Register 0" bitfld.long 0x00 24.--27. " DIVI ,Divide Instructions Support" "Not supported,?..." bitfld.long 0x00 20.--23. " DEBI ,Debug Instructions Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 16.--19. " CI ,Coprocessor Instructions Support" "Not supported,?..." bitfld.long 0x00 12.--15. " CBI ,Combined Compare and Branch Instructions Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 8.--11. " BI ,Bitfield Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 4.--7. " BCI ,Bit Counting Instructions Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 0.--3. " SI ,Swap Instructions Support" "Reserved,Supported,?..." rgroup.long c15:0x120++0x00 line.long 0x00 "ISAR1,Instruction Set Attributes Register 1" bitfld.long 0x00 28.--31. " JI ,Jazelle Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 24.--27. " INTI ,Instructions That Branch Between ARM and Thumb Code Support" "Reserved,Reserved,Supported,?..." textline " " bitfld.long 0x00 20.--23. " IMMI ,Immediate Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 16.--19. " ITEI ,If Then Instructions Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 12.--15. " EXTI ,Sign or Zero Extend Instructions Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 8.--11. " E2I ,Exception 2 Instructions Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 4.--7. " E1I ,Exception 1 Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 0.--3. " ENDI ,Endianness Control Instructions Support" "Reserved,Supported,?..." rgroup.long c15:0x220++0x00 line.long 0x00 "ISAR2,Instruction Set Attributes Register 2" bitfld.long 0x00 28.--31. " RI ,Reversal Instructions Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 24.--27. " PSRI ,PSR Instructions Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 20.--23. " UMI ,Advanced Unsigned Multiply Instructions Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 16.--19. " SMI ,Advanced Signed Multiply Instructions Support" "Reserved,Reserved,Reserved,Supported,?..." textline " " bitfld.long 0x00 12.--15. " MI ,Multiply Instructions Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 8.--11. " II ,Multi-Access Interruptible Instructions Support" "Supported,?..." textline " " bitfld.long 0x00 4.--7. " MHI ,Memory Hint Instructions Support" "Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 0.--3. " LSI ,Load and Store Instructions Support" "Reserved,Supported,?..." rgroup.long c15:0x320++0x00 line.long 0x00 "ISAR3,Instruction Set Attributes Register 3" bitfld.long 0x00 28.--31. " T2E ,Thumb-2 Extensions Support" "Reserved,Supported,?..." bitfld.long 0x00 24.--27. " NOPI ,True NOP Instructions Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 20.--23. " TCI ,Thumb Copy Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 16.--19. " TBI ,Table Branch Instructions Support" "Reserved,Reserved,Supported,?..." textline " " bitfld.long 0x00 12.--15. " SPI ,Synchronization Primitive Instructions Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 8.--11. " SVCI ,SVC Instructions Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 4.--7. " SIMDI ,Single Instruction Multiple Data (SIMD) Instructions Support" "Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 0.--3. " SI ,Saturate Instructions Support" "Reserved,Supported,?..." rgroup.long c15:0x420++0x00 line.long 0x00 "ISAR4,Instruction Set Attributes Register 4" bitfld.long 0x00 28.--31. " SWP_FRAC ,SWAP_frac" "Supported,?..." bitfld.long 0x00 24.--27. " PSR_M_I ,PSR_M Instructions Support" "Not supported,?..." textline " " bitfld.long 0x00 20.--23. " EI ,Exclusive Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 16.--19. " BI ,Barrier Instructions Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 12.--15. " SMII ,SMI Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 8.--11. " WBI ,Write-Back Instructions Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 4.--7. " WSI ,With-Shift Instructions Support" "Reserved,Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 0.--3. " UI ,Unprivileged Instructions Support" "Reserved,Reserved,Supported,?..." rgroup.long c15:0x0520++0x00 line.long 0x00 "ISAR5,Instruction Set Attribute Registers 5 (Reserved)" rgroup.long c15:0x0620++0x00 line.long 0x00 "ISAR6,Instruction Set Attribute Registers 6 (Reserved)" rgroup.long c15:0x0720++0x00 line.long 0x00 "ISAR7,Instruction Set Attribute Registers 7 (Reserved)" rgroup.long c15:0x010++0x00 line.long 0x00 "ID_PFR0,Processor Feature Register 0" bitfld.long 0x00 12.--15. " STATE3 ,Thumb-2 Execution Environment (Thumb-2EE) Support" "Reserved,Supported,?..." bitfld.long 0x00 8.--11. " STATE2 ,Java Extension Interface Support" "Not supported,?..." bitfld.long 0x00 4.--7. " STATE1 ,Thumb Encoding Supported by the Processor Type" "Reserved,Reserved,Reserved,Supported,?..." textline " " bitfld.long 0x00 0.--3. " STATE0 ,ARM Instruction Set Support" "Reserved,Supported,?..." rgroup.long c15:0x110++0x00 line.long 0x00 "ID_PFR1,Processor Feature Register 1" bitfld.long 0x00 8.--11. " MPM ,Microcontroller Programmer's Model Support" "Supported,?..." bitfld.long 0x00 4.--7. " SE ,Security Extensions Architecture v1 Support" "Reserved,Supported,?..." bitfld.long 0x00 0.--3. " PM ,Standard ARMv4 Programmer's Model Support" "Reserved,Supported,?..." textline " " rgroup.long c15:0x210++0x00 line.long 0x00 "ID_DFR0,Debug Feature Register 0" bitfld.long 0x00 20.--23. " MDM_MM ,Microcontroller Debug Model Support" "Not supported,?..." bitfld.long 0x00 16.--19. " TDM_MM ,Trace Debug Model (Memory-Mapped) Support" "Reserved,Supported,?..." bitfld.long 0x00 12.--15. " TDM_CB ,Coprocessor-Based Trace Debug Model Support" "Not supported,?..." textline " " bitfld.long 0x00 8.--11. " CDM_MM ,Memory-Mapped Debug Model Support" "Reserved,Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 4.--7. " SDM_CB ,Secure Debug Model (Coprocessor) Support" "Not supported,?..." bitfld.long 0x00 0.--3. " CDM_CB ,Coprocessor Debug Model Support" "Not supported,?..." rgroup.long c15:0x310++0x00 line.long 0x00 "ID_AFR0,Auxiliary Feature Register 0" rgroup.long c15:0x02f++0x00 line.long 0x00 "BO1R,Build Options 1 Register" hexmask.long.long 0x00 12.--31. 0x1000 " TCM_HI_INIT_ADDR ,Default high address for the TCM" bitfld.long 0x00 1. " FLOAT_PRECISION ,Indicate whether double-precision floating point is implemented" "Not implemented,Implemented" textline " " bitfld.long 0x00 0. " PP_BUS_ECC ,Indicate whether bus-ECC is implemented" "Not implemented,Implemented" group.long c15:0x12f++0x00 line.long 0x00 "BO2R,Build Options 2 Register" bitfld.long 0x00 31. " NUM_CPU ,Number of CPUs" "1,2" bitfld.long 0x00 30. " LOCK_STEP ,Indicate whether the CPU has redundant logic running in lock step for checking purposes" "Not included,Included" textline " " bitfld.long 0x00 29. " NO_ICACHE ,Indicate whether the CPU contains instruction cache" "Yes,No" bitfld.long 0x00 28. " NO_DCACHE ,Indicate whether the CPU contains data cache" "Yes,No" textline " " bitfld.long 0x00 26.--27. " ATCM_ES ,Indicate whether an error scheme is implemented on the ATCM interface" "No error scheme,32 bit error detection,Reserved,64 bit error detection" bitfld.long 0x00 23.--25. " BTCM_ES ,Indicate whether an error scheme is implemented on the BTCM interface" "No error scheme,32 bit error detection,Reserved,64 bit error detection,?..." textline " " bitfld.long 0x00 23. " NO_IE ,Indicate whether the processor supports big-endian instructions" "Yes,No" bitfld.long 0x00 22. " NO_FPU ,Indicate whether the CPU contains a floating point unit" "Yes,No" textline " " bitfld.long 0x00 20.--21. " MPU_REGIONS ,Indicates the number of regions in the included CPU MPU" "No region,Reserved,12 regions,16 regions" bitfld.long 0x00 17.--19. " BREAK_POINTS ,Indicate the number of break points implemented in each CPU in the processor minus 1" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 14.--16. " WATCH_POINTS ,Indicate the number of watch points implemented in each CPU in the processor minus 1" "0,1,2,3,4,5,6,7" bitfld.long 0x00 13. " NO_A_TCM_INF ,Indicate whether the CPUs contain ATCM ports" "Yes,No" textline " " bitfld.long 0x00 12. " NO_B0_TCM_INF ,Indicate whether the CPUs contain B0TCM ports" "Yes,No" bitfld.long 0x00 11. " NO_B1_TCM_INF ,Indicate whether the CPUs contain B1TCM ports" "Yes,No" textline " " bitfld.long 0x00 10. " TCMBUSPARITY ,Indicate whether the processor contains TCM address bus parity logic" "No,Yes" bitfld.long 0x00 9. " NO_SLAVE ,Indicate whether the CPU contains an AXI slave port" "Yes,No" textline " " bitfld.long 0x00 7.--8. " ICACHE_ES ,Indicate whether an error scheme is implemented for the instruction cache" "No error scheme,8-bit parity,Reserved,64-bit ECC" bitfld.long 0x00 5.--6. " DCACHE_ES ,Indicate whether an error scheme is implemented for the data cache" "No error scheme,8-bit parity,32-bit ECC,?..." textline " " bitfld.long 0x00 4. " NO_HARD_ERROR_CACHE ,Indicate whether the processor contains cache for corrected TCM errors" "Yes,No" bitfld.long 0x00 3. " AXI_BUS_ECC ,Indicate whether the processor contains AXI bus ECC logic" "No,Yes" textline " " bitfld.long 0x00 2. " SL ,Indicate whether the processor has been built with split/lock logic" "No,Yes" bitfld.long 0x00 1. " AHB_PP ,Indicate whether the CPU contain AHB peripheral interfaces" "No,Yes" textline " " bitfld.long 0x00 0. " MICRO_SCU ,Indicate whether the processor contain an ACP interface" "No,Yes" group.long c15:0x72f++0x00 line.long 0x00 "POR,Pin Options Register" bitfld.long 0x00 4. " DBGNOCLKSTOP ,Value of the DBGNOCLKSTOP pin" "Low,High" bitfld.long 0x00 3. " INTSYNCEN ,Value of the INTSYNCEN pin" "Low,High" textline " " bitfld.long 0x00 2. " IRQADDRVSYNCEN ,Value of the IRQADDRVSYNCEN pin" "Low,High" bitfld.long 0x00 1. " SLBTCMSB ,Value of the SLBTCMSBm pin" "Low,High" textline " " bitfld.long 0x00 0. " PARITYLEVEL ,Value of the PARITYLEVEL pin" "Low,High" tree.end width 0x8 tree "System Control and Configuration" group.long c15:0x01++0x00 line.long 0x00 "SCTLR,Control Register" bitfld.long 0x0 31. " IE ,Instruction endianness" "Little,Big" bitfld.long 0x0 30. " TE ,Thumb exception enable" "ARM,Thumb" bitfld.long 0x0 29. " AFE ,Access Flag Enable" "Disable,Enable" bitfld.long 0x0 28. " TRE ,TEX remap enable" "Disable,Enable" bitfld.long 0x0 27. " NMFI ,Nonmaskable Fast Interrupt enable" "Disable,Enable" textline " " bitfld.long 0x0 25. " EE ,Exception endianess" "Little,Big" bitfld.long 0x0 24. " VE ,Vector Enable" "Disable,Vectored" bitfld.long 0x0 21. " FI ,Fast Interrupts enable" "Disable,Enable" textline " " bitfld.long 0x0 19. " DZ ,Divide by Zero exception bit" "Disable,Enable" bitfld.long 0x0 17. " BR ,MPU Background region enable" "Disable,Enable" bitfld.long 0x0 14. " RR ,Round-Robin bit" "Random,RRobin" bitfld.long 0x0 13. " V ,Base Location of Exception Registers" "0x00000000,0xFFFF0000" textline " " bitfld.long 0x0 12. " I ,Instruction Cache Enable" "Disable,Enable" bitfld.long 0x0 11. " Z ,Branch Prediction Enable" "Disable,Enable" bitfld.long 0x0 2. " C ,Enable data cache" "Disable,Enable" bitfld.long 0x0 1. " A ,Strict Alignment" "Disable,Enable" bitfld.long 0x0 0. " M ,MPU Enable" "Disable,Enable" textline " " group.long c15:0x101++0x00 line.long 0x0 "ACTLR,Auxiliary Control Register" bitfld.long 0x00 31. " DICDI ,Disable Case C dual issue control" "Enable,Disable" bitfld.long 0x00 30. " DIB2DI ,Disable Case B2 dual issue control" "Enable,Disable" bitfld.long 0x00 29. " DIB1DI ,Disable Case B1 dual issue control" "Enable,Disable" textline " " bitfld.long 0x00 28. " DIADI ,Disable Case A dual issue control" "Enable,Disable" bitfld.long 0x00 27. " B1TCMPCEN ,B1TCM parity or ECC check enable" "Disable,Enable" bitfld.long 0x00 26. " B0TCMPCEN ,B1TCM parity or ECC check enable" "Disable,Enable" textline " " bitfld.long 0x00 25. " ATCMPCEN ,B1TCM parity or ECC check enable" "Disable,Enable" bitfld.long 0x00 24. " AXISCEN ,AXI slave cache access enable" "Disable,Enable" bitfld.long 0x00 23. " AXISCUEN ,AXI slave cache User mode access enable" "Disable,Enable" textline " " bitfld.long 0x00 22. " DILSM ,Disable LIL on load/store multiples" "Enable,Disable" bitfld.long 0x00 21. " DEOLP ,Disable end of loop prediction" "Enable,Disable" bitfld.long 0x00 20. " DBHE ,Disable BH extension" "Enable,Disable" textline " " bitfld.long 0x00 19. " FRCDIS ,Fetch rate control disable" "Enable,Disable" bitfld.long 0x00 17. " RSDIS ,Return stack disable" "Enable,Disable" bitfld.long 0x00 15.--16. " BP ,Control of the branch prediction policy" "Normal,Taken,Not taken,?..." textline " " bitfld.long 0x00 14. " DBWR ,Disable write_burst on AXI master" "Enable,Disable" bitfld.long 0x00 13. " DLFO ,Disable linefill optimization in the AXI master" "Enable,Disable" bitfld.long 0x00 12. " ERPEG ,Enable random parity error generation" "Disable,Enable" textline " " bitfld.long 0x00 11. " DNCH ,Disable data forwarding for Non-cacheable accesses in the AXI master" "Enable,Disable" bitfld.long 0x00 10. " FORA ,Force outer read allocate (ORA) for outer write allocate (OWA) regions" "Not forced,Forced" bitfld.long 0x00 9. " FWT ,Force write-through (WT) for write-back (WB) regions" "Not forced,Forced" textline " " bitfld.long 0x00 8. " FDSnS ,Force D-side to not-shared when MPU is off" "Not forced,Forced" bitfld.long 0x00 7. " SMOV ,sMOV disabled" "Enabled,Disabled" bitfld.long 0x0 6. " DILS ,Disable low interrupt latency on all load/store instructions" "Enable,Disable" textline " " bitfld.long 0x00 3.--5. " CEC ,Cache error control for cache parity and ECC errors" "Generate abort,Generate abort,Generate abort,Reserved,Disabled parity checking,Not generate abort,Not generate abort,?..." textline " " bitfld.long 0x00 2. " B1TCMECEN ,B1TCM external error enable" "Disable,Enable" bitfld.long 0x00 1. " B0TCMECEN ,B0TCM external error enable" "Disable,Enable" bitfld.long 0x00 0. " ATCMECEN ,ATCM external error enable" "Disable,Enable" textline " " group.long c15:0x0f++0x00 line.long 0x00 "SACTLR,Secondary Auxiliary Control Register" bitfld.long 0x00 22. " DCHE ,Disable hard-error support in the caches" "Enable,Disable" bitfld.long 0x00 21. " DR2B ,Enable random 2-bit error genration in cache RAMs" "Disable,Enable" bitfld.long 0x00 20. " DF6DI ,F6 dual issue control" "Enable,Disable" textline " " bitfld.long 0x00 19. " DF2DI ,F2 dual issue control" "Enable,Disable" bitfld.long 0x00 18. " DDI ,F1/F3/F4 dual issue control" "Enable,Disable" bitfld.long 0x00 17. " DOODPFP ,Out-of-order Double Precision Floating-point control" "Enable,Disable" textline " " bitfld.long 0x00 16. " DOOFMACS ,Out-of-order FMACS control" "Enable,Disable" bitfld.long 0x00 13. " IXC ,Floating-point inexact exception output mask" "Mask,Propagate" bitfld.long 0x00 12. " OFC ,Floating-point overflow exception output mask" "Mask,Propagate" textline " " bitfld.long 0x00 11. " UFC ,Floating-point underflow exception output mask" "Mask,Propagate" bitfld.long 0x00 10. " IOC ,Floating-point invalid operation exception output mask" "Mask,Propagate" bitfld.long 0x00 9. " DZC ,Floating-point divide-by-zero exception output mask" "Mask,Propagate" textline " " bitfld.long 0x00 8. " IDC ,Floating-point input denormal exception output mask" "Mask,Propagate" bitfld.long 0x00 3. " BTCMECC ,Correction for internal ECC logic on BTCM ports" "Enable,Disable" bitfld.long 0x00 2. " ATCMECC ,Correction for internal ECC logic on ATCM port" "Enable,Disable" textline " " bitfld.long 0x00 1. " BTCMRMW ,Enable 64-bit stores on BTCMs" "Disable,Enable" bitfld.long 0x00 0. " ATCMRMW ,Enable 64-bit stores on ATCM" "Disable,Enable" textline " " group.long c15:0x201++0x00 line.long 0x0 "CPACR,Coprocessor Access Control Register" bitfld.long 0x0 31. " ASEDIS ,Disable Advanced SIMD Extension functionality" "No,Yes" bitfld.long 0x0 30. " D32DIS ,Disable use of D16-D31 of the VFP register file" "No,Yes" textline " " bitfld.long 0x0 26.--27. " CP13 ,Coprocesor access control" "Denied,Privileged,Reserved,Full" bitfld.long 0x0 24.--25. " CP12 ,Coprocesor access control" "Denied,Privileged,Reserved,Full" textline " " bitfld.long 0x0 22.--23. " CP11 ,Coprocesor access control" "Denied,Privileged,Reserved,Full" bitfld.long 0x0 20.--21. " CP10 ,Coprocesor access control" "Denied,Privileged,Reserved,Full" textline " " bitfld.long 0x0 18.--19. " CP9 ,Coprocesor access control" "Denied,Privileged,Reserved,Full" bitfld.long 0x0 16.--17. " CP8 ,Coprocesor access control" "Denied,Privileged,Reserved,Full" textline " " bitfld.long 0x0 14.--15. " CP7 ,Coprocesor access control" "Denied,Privileged,Reserved,Full" bitfld.long 0x0 12.--13. " CP6 ,Coprocesor access control" "Denied,Privileged,Reserved,Full" textline " " bitfld.long 0x0 10.--11. " CP5 ,Coprocesor access control" "Denied,Privileged,Reserved,Full" bitfld.long 0x0 8.--9. " CP4 ,Coprocesor access control" "Denied,Privileged,Reserved,Full" textline " " bitfld.long 0x0 6.--7. " CP3 ,Coprocesor access control" "Denied,Privileged,Reserved,Full" bitfld.long 0x0 4.--5. " CP2 ,Coprocesor access control" "Denied,Privileged,Reserved,Full" textline " " bitfld.long 0x0 2.--3. " CP1 ,Coprocesor access control" "Denied,Privileged,Reserved,Full" bitfld.long 0x0 0.--1. " CP0 ,Coprocesor access control" "Denied,Privileged,Reserved,Full" textline " " group.long c15:0x000b++0x00 line.long 0x00 "SPCR,Slave Port Control Register" bitfld.long 0x00 1. " PRIV ,Privilege access only" "User/Privilege,Privilege only" bitfld.long 0x00 0. " AXISLEN ,AXI slave port disable" "Enabled,Disabled" tree.end width 0x8 tree "MPU Control and Configuration" group.long c15:0x01++0x00 line.long 0x00 "SCTLR,Control Register" bitfld.long 0x0 31. " IE ,Instruction endianness" "Little,Big" bitfld.long 0x0 30. " TE ,Thumb exception enable" "ARM,Thumb" bitfld.long 0x0 29. " AFE ,Access Flag Enable" "Disable,Enable" bitfld.long 0x0 28. " TRE ,TEX remap enable" "Disable,Enable" bitfld.long 0x0 27. " NMFI ,Nonmaskable Fast Interrupt enable" "Disable,Enable" textline " " bitfld.long 0x0 25. " EE ,Exception endianess" "Little,Big" bitfld.long 0x0 24. " VE ,Vector Enable" "Disable,Vectored" bitfld.long 0x0 21. " FI ,Fast Interrupts enable" "Disable,Enable" textline " " bitfld.long 0x0 19. " DZ ,Divide by Zero exception bit" "Disable,Enable" bitfld.long 0x0 17. " BR ,MPU Background region enable" "Disable,Enable" bitfld.long 0x0 14. " RR ,Round-Robin bit" "Random,RRobin" bitfld.long 0x0 13. " V ,Base Location of Exception Registers" "0x00000000,0xFFFF0000" textline " " bitfld.long 0x0 12. " I ,Instruction Cache Enable" "Disable,Enable" bitfld.long 0x0 11. " Z ,Branch Prediction Enable" "Disable,Enable" bitfld.long 0x0 2. " C ,Enable data cache" "Disable,Enable" bitfld.long 0x0 1. " A ,Strict Alignment" "Disable,Enable" bitfld.long 0x0 0. " M ,MPU Enable" "Disable,Enable" textline " " group.long c15:0x05++0x00 line.long 0x00 "DFSR,Data Fault Status Register" bitfld.long 0x00 12. " EXT ,External Abort Qualifier" "DECERR,SLVERR" bitfld.long 0x00 11. " RW ,Access Caused an Abort Type" "Read,Write" textline " " bitfld.long 0x00 4.--7. " DOMAIN ,Domain Accessed When a Data Fault Occurs" "D0,D1,D2,D3,D4,D5,D6,D7,D8,D9,D10,D11,D12,D13,D14,D15" bitfld.long 0x00 0.--3. 10. " STATUS ,Generated Exception Type" "Reserved,Alignment,Debug,Access/section,Instruction,Translation/section,Access/page,Translation/page,Nontranslation/synchronous external,Domain/section,Reserved,Domain/page,L1/external,Permission/section,L2/external,Permission/page,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Asynchronous external,?..." group.long c15:0x15++0x00 line.long 0x00 "ADFSR,Auxiliary Data Fault Status Register" bitfld.long 0x00 24.--27. " CACHEWAY ,Cache way or ways in which the error occurred" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 22.--23. 20. " SIDE ,Source of the error" "Cache/AXIM,ATCM,BTCM,Reserved,Reserved,AXI,AHB,Reserved" textline " " bitfld.long 0x00 21. " REC_ERR ,Error recoverability indication" "Not recoverable,Recoverable" bitfld.long 0x00 20. " SIDE_EXT ,Source of the error" "Internal,External" textline " " hexmask.long.word 0x00 5.--13. 1. " INDEX ,Index Value for The Access Giving the Error Register" group.long c15:0x06++0x00 line.long 0x00 "DFAR,Data Fault Address Register" textline " " group.long c15:0x0105++0x00 line.long 0x00 "IFSR,Instruction Fault Status Register" bitfld.long 0x00 12. " EXT ,External Abort Qualifier" "DECERR,SLVERR" bitfld.long 0x00 0.--3. 10. " STATUS ,Generated Exception Type" "Reserved,Alignment,Debug,Access/section,Instruction,Translation/section,Access/page,Translation/page,Nontranslation/synchronous external,Domain/section,Reserved,Domain/page,L1/external,Permission/section,L2/external,Permission/page,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Asynchronous external,?..." group.long c15:0x115++0x00 line.long 0x00 "AIFSR,Auxiliary Instruction Fault Status Register" bitfld.long 0x00 24.--27. " CACHEWAY ,Cache way or ways in which the error occurred" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 22.--23. 20. " SIDE ,Source of the error" "Cache/AXIM,ATCM,BTCM,Reserved,Reserved,AXI,AHB,Reserved" textline " " bitfld.long 0x00 21. " REC_ERR ,Error recoverability indication" "Not recoverable,Recoverable" bitfld.long 0x00 20. " SIDE_EXT ,Source of the error" "Internal,External" textline " " hexmask.long.word 0x00 5.--13. 1. " INDEX ,Index Value for The Access Giving the Error Register" group.long c15:0x206++0x00 line.long 0x00 "IFAR,Instruction Fault Address Register" textline " " group.long c15:0x0016++0x00 line.long 0x00 "RBAR,Region Base Address Register" hexmask.long 0x00 5.--31. 0x20 " BA ,Base address" group.long c15:0x0216++0x00 line.long 0x00 "RSER,Region Size and Enable Register" bitfld.long 0x00 15. " SD ,Subregion 7 disable" "-,D" bitfld.long 0x00 14. " ,Subregion 6 disable" "-,D" bitfld.long 0x00 13. " ,Subregion 5 disable" "-,D" bitfld.long 0x00 12. " ,Subregion 4 disable" "-,D" bitfld.long 0x00 11. " ,Subregion 3 disable" "-,D" bitfld.long 0x00 10. " ,Subregion 2 disable" "-,D" bitfld.long 0x00 9. " ,Subregion 1 disable" "-,D" bitfld.long 0x00 8. " ,Subregion 0 disable" "-,D" bitfld.long 0x00 1.--5. " RS ,Region size" "Unpredictable,Unpredictable,Unpredictable,Unpredictable,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1KB,2KB,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" group.long c15:0x0416++0x00 line.long 0x00 "RACR,Region Access Control Register" bitfld.long 0x00 12. " XN ,Execute never" "-,NoExec" bitfld.long 0x00 2. " S ,Share" "No,Yes" bitfld.long 0x00 8.--10. " AP ,Access permission" "None,Privileged,User read-only,Full,Reserved,Privileged read,Read-only,Reserved" bitfld.long 0x00 0.--1. 3.--5. " TYPE ,Region type" "Strongly-ordered,Shareable Device,Outer and Inner write-through/no write-allocate,Outer and Inner write-back/no write-allocate,Outer and Inner Non-cacheable,00101,00110,Outer and Inner write-back/write-allocate,Non-shareable Device,01001,01010,01011,01100,01101,01110,01111,O:Non-cacheable I:Non-cacheable,O:Non-cacheable I:Write-back/write-allocate,O:Non-cacheable I:Write-through/no write-allocate,O:Non-cacheable I:Write-back/no write-allocate,O:Write-back/write-allocate I:Non-cacheable,O:Write-back/write-allocate I:Write-back/write-allocate,O:Write-back/write-allocate I:Write-through/no write-allocate,O:Write-back/write-allocate I:Write-back/no write-allocate,O:Write-through/no write-allocate I:Non-cacheable,O:Write-through/no write-allocate I:Write-back/write-allocate,O:Write-through/no write-allocate I:Write-through/no write-allocate,O:Write-through/no write-allocate I:Write-back/no write-allocate,O:Write-back/no write-allocate I:Non-cacheable,O:Write-back/no write-allocate I:Write-back/write-allocate,O:Write-back/no write-allocate I:Write-through/no write-allocate,O:Write-back/no write-allocate I:Write-back/no write-allocate" group.long c15:0x0026++0x00 line.long 0x00 "MRNR,Memory Region Number Register" bitfld.long 0x00 0.--3. " REGION ,Defines the group of registers to be accessed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " group.long c15:0x010d++0x00 line.long 0x00 "CIDR,Context ID Register" group.long c15:0x20d++0x00 line.long 0x00 "TIDRURW,User read/write Thread and Process ID Register" group.long c15:0x30d++0x00 line.long 0x00 "TIDRURO,User read only Thread and Process ID Register" group.long c15:0x40d++0x00 line.long 0x00 "TIDRPRW,Privileged Only Thread and Process ID Register" width 0x08 tree "MPU regions" group c15:0x0016++0x00 saveout c15:0x26 %l 0x0 line.long 0x00 "RBAR0,Region Base Address Register 0" hexmask.long 0x00 5.--31. 0x20 " BA ,Base address" group c15:0x0216++0x00 saveout c15:0x26 %l 0x0 line.long 0x00 "RSER0,Region Size and Enable Register 0" bitfld.long 0x00 15. " SD ,Subregion 7 disable" "-,D" bitfld.long 0x00 14. " ,Subregion 6 disable" "-,D" bitfld.long 0x00 13. " ,Subregion 5 disable" "-,D" bitfld.long 0x00 12. " ,Subregion 4 disable" "-,D" bitfld.long 0x00 11. " ,Subregion 3 disable" "-,D" bitfld.long 0x00 10. " ,Subregion 2 disable" "-,D" bitfld.long 0x00 9. " ,Subregion 1 disable" "-,D" bitfld.long 0x00 8. " ,Subregion 0 disable" "-,D" bitfld.long 0x00 1.--5. " RS ,Region size" "Unpredictable,Unpredictable,Unpredictable,Unpredictable,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1KB,2KB,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" group c15:0x0416++0x00 saveout c15:0x26 %l 0x0 line.long 0x00 "RACR0,Region Access Control Register 0" bitfld.long 0x00 12. " XN ,Execute never" "-,NoExec" bitfld.long 0x00 2. " S ,Share" "No,Yes" bitfld.long 0x00 8.--10. " AP ,Access permission" "None,Privileged,User read-only,Full,Reserved,Privileged read,Read-only,Reserved" bitfld.long 0x00 0.--1. 3.--5. " type ,Region type" "Strongly-ordered,Shareable Device,Outer and Inner write-through/no write-allocate,Outer and Inner write-back/no write-allocate,Outer and Inner Non-cacheable,00101,00110,Outer and Inner write-back/write-allocate,Non-shareable Device,01001,01010,01011,01100,01101,01110,01111,O:Non-cacheable I:Non-cacheable,O:Non-cacheable I:Write-back/write-allocate,O:Non-cacheable I:Write-through/no write-allocate,O:Non-cacheable I:Write-back/no write-allocate,O:Write-back/write-allocate I:Non-cacheable,O:Write-back/write-allocate I:Write-back/write-allocate,O:Write-back/write-allocate I:Write-through/no write-allocate,O:Write-back/write-allocate I:Write-back/no write-allocate,O:Write-through/no write-allocate I:Non-cacheable,O:Write-through/no write-allocate I:Write-back/write-allocate,O:Write-through/no write-allocate I:Write-through/no write-allocate,O:Write-through/no write-allocate I:Write-back/no write-allocate,O:Write-back/no write-allocate I:Non-cacheable,O:Write-back/no write-allocate I:Write-back/write-allocate,O:Write-back/no write-allocate I:Write-through/no write-allocate,O:Write-back/no write-allocate I:Write-back/no write-allocate" textline " " group c15:0x0016++0x00 saveout c15:0x26 %l 0x1 line.long 0x00 "RBAR1,Region Base Address Register 1" hexmask.long 0x00 5.--31. 0x20 " BA ,Base address" group c15:0x0216++0x00 saveout c15:0x26 %l 0x1 line.long 0x00 "RSER1,Region Size and Enable Register 1" bitfld.long 0x00 15. " SD ,Subregion 7 disable" "-,D" bitfld.long 0x00 14. " ,Subregion 6 disable" "-,D" bitfld.long 0x00 13. " ,Subregion 5 disable" "-,D" bitfld.long 0x00 12. " ,Subregion 4 disable" "-,D" bitfld.long 0x00 11. " ,Subregion 3 disable" "-,D" bitfld.long 0x00 10. " ,Subregion 2 disable" "-,D" bitfld.long 0x00 9. " ,Subregion 1 disable" "-,D" bitfld.long 0x00 8. " ,Subregion 0 disable" "-,D" bitfld.long 0x00 1.--5. " RS ,Region size" "Unpredictable,Unpredictable,Unpredictable,Unpredictable,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1KB,2KB,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" group c15:0x0416++0x00 saveout c15:0x26 %l 0x1 line.long 0x00 "RACR1,Region Access Control Register 1" bitfld.long 0x00 12. " XN ,Execute never" "-,NoExec" bitfld.long 0x00 2. " S ,Share" "No,Yes" bitfld.long 0x00 8.--10. " AP ,Access permission" "None,Privileged,User read-only,Full,Reserved,Privileged read,Read-only,Reserved" bitfld.long 0x00 0.--1. 3.--5. " type ,Region type" "Strongly-ordered,Shareable Device,Outer and Inner write-through/no write-allocate,Outer and Inner write-back/no write-allocate,Outer and Inner Non-cacheable,00101,00110,Outer and Inner write-back/write-allocate,Non-shareable Device,01001,01010,01011,01100,01101,01110,01111,O:Non-cacheable I:Non-cacheable,O:Non-cacheable I:Write-back/write-allocate,O:Non-cacheable I:Write-through/no write-allocate,O:Non-cacheable I:Write-back/no write-allocate,O:Write-back/write-allocate I:Non-cacheable,O:Write-back/write-allocate I:Write-back/write-allocate,O:Write-back/write-allocate I:Write-through/no write-allocate,O:Write-back/write-allocate I:Write-back/no write-allocate,O:Write-through/no write-allocate I:Non-cacheable,O:Write-through/no write-allocate I:Write-back/write-allocate,O:Write-through/no write-allocate I:Write-through/no write-allocate,O:Write-through/no write-allocate I:Write-back/no write-allocate,O:Write-back/no write-allocate I:Non-cacheable,O:Write-back/no write-allocate I:Write-back/write-allocate,O:Write-back/no write-allocate I:Write-through/no write-allocate,O:Write-back/no write-allocate I:Write-back/no write-allocate" textline " " group c15:0x0016++0x00 saveout c15:0x26 %l 0x2 line.long 0x00 "RBAR2,Region Base Address Register 2" hexmask.long 0x00 5.--31. 0x20 " BA ,Base address" group c15:0x0216++0x00 saveout c15:0x26 %l 0x2 line.long 0x00 "RSER2,Region Size and Enable Register 2" bitfld.long 0x00 15. " SD ,Subregion 7 disable" "-,D" bitfld.long 0x00 14. " ,Subregion 6 disable" "-,D" bitfld.long 0x00 13. " ,Subregion 5 disable" "-,D" bitfld.long 0x00 12. " ,Subregion 4 disable" "-,D" bitfld.long 0x00 11. " ,Subregion 3 disable" "-,D" bitfld.long 0x00 10. " ,Subregion 2 disable" "-,D" bitfld.long 0x00 9. " ,Subregion 1 disable" "-,D" bitfld.long 0x00 8. " ,Subregion 0 disable" "-,D" bitfld.long 0x00 1.--5. " RS ,Region size" "Unpredictable,Unpredictable,Unpredictable,Unpredictable,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1KB,2KB,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" group c15:0x0416++0x00 saveout c15:0x26 %l 0x2 line.long 0x00 "RACR2,Region Access Control Register 2" bitfld.long 0x00 12. " XN ,Execute never" "-,NoExec" bitfld.long 0x00 2. " S ,Share" "No,Yes" bitfld.long 0x00 8.--10. " AP ,Access permission" "None,Privileged,User read-only,Full,Reserved,Privileged read,Read-only,Reserved" bitfld.long 0x00 0.--1. 3.--5. " type ,Region type" "Strongly-ordered,Shareable Device,Outer and Inner write-through/no write-allocate,Outer and Inner write-back/no write-allocate,Outer and Inner Non-cacheable,00101,00110,Outer and Inner write-back/write-allocate,Non-shareable Device,01001,01010,01011,01100,01101,01110,01111,O:Non-cacheable I:Non-cacheable,O:Non-cacheable I:Write-back/write-allocate,O:Non-cacheable I:Write-through/no write-allocate,O:Non-cacheable I:Write-back/no write-allocate,O:Write-back/write-allocate I:Non-cacheable,O:Write-back/write-allocate I:Write-back/write-allocate,O:Write-back/write-allocate I:Write-through/no write-allocate,O:Write-back/write-allocate I:Write-back/no write-allocate,O:Write-through/no write-allocate I:Non-cacheable,O:Write-through/no write-allocate I:Write-back/write-allocate,O:Write-through/no write-allocate I:Write-through/no write-allocate,O:Write-through/no write-allocate I:Write-back/no write-allocate,O:Write-back/no write-allocate I:Non-cacheable,O:Write-back/no write-allocate I:Write-back/write-allocate,O:Write-back/no write-allocate I:Write-through/no write-allocate,O:Write-back/no write-allocate I:Write-back/no write-allocate" textline " " group c15:0x0016++0x00 saveout c15:0x26 %l 0x3 line.long 0x00 "RBAR3,Region Base Address Register 3" hexmask.long 0x00 5.--31. 0x20 " BA ,Base address" group c15:0x0216++0x00 saveout c15:0x26 %l 0x3 line.long 0x00 "RSER3,Region Size and Enable Register 3" bitfld.long 0x00 15. " SD ,Subregion 7 disable" "-,D" bitfld.long 0x00 14. " ,Subregion 6 disable" "-,D" bitfld.long 0x00 13. " ,Subregion 5 disable" "-,D" bitfld.long 0x00 12. " ,Subregion 4 disable" "-,D" bitfld.long 0x00 11. " ,Subregion 3 disable" "-,D" bitfld.long 0x00 10. " ,Subregion 2 disable" "-,D" bitfld.long 0x00 9. " ,Subregion 1 disable" "-,D" bitfld.long 0x00 8. " ,Subregion 0 disable" "-,D" bitfld.long 0x00 1.--5. " RS ,Region size" "Unpredictable,Unpredictable,Unpredictable,Unpredictable,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1KB,2KB,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" group c15:0x0416++0x00 saveout c15:0x26 %l 0x3 line.long 0x00 "RACR3,Region Access Control Register 3" bitfld.long 0x00 12. " XN ,Execute never" "-,NoExec" bitfld.long 0x00 2. " S ,Share" "No,Yes" bitfld.long 0x00 8.--10. " AP ,Access permission" "None,Privileged,User read-only,Full,Reserved,Privileged read,Read-only,Reserved" bitfld.long 0x00 0.--1. 3.--5. " type ,Region type" "Strongly-ordered,Shareable Device,Outer and Inner write-through/no write-allocate,Outer and Inner write-back/no write-allocate,Outer and Inner Non-cacheable,00101,00110,Outer and Inner write-back/write-allocate,Non-shareable Device,01001,01010,01011,01100,01101,01110,01111,O:Non-cacheable I:Non-cacheable,O:Non-cacheable I:Write-back/write-allocate,O:Non-cacheable I:Write-through/no write-allocate,O:Non-cacheable I:Write-back/no write-allocate,O:Write-back/write-allocate I:Non-cacheable,O:Write-back/write-allocate I:Write-back/write-allocate,O:Write-back/write-allocate I:Write-through/no write-allocate,O:Write-back/write-allocate I:Write-back/no write-allocate,O:Write-through/no write-allocate I:Non-cacheable,O:Write-through/no write-allocate I:Write-back/write-allocate,O:Write-through/no write-allocate I:Write-through/no write-allocate,O:Write-through/no write-allocate I:Write-back/no write-allocate,O:Write-back/no write-allocate I:Non-cacheable,O:Write-back/no write-allocate I:Write-back/write-allocate,O:Write-back/no write-allocate I:Write-through/no write-allocate,O:Write-back/no write-allocate I:Write-back/no write-allocate" textline " " group c15:0x0016++0x00 saveout c15:0x26 %l 0x4 line.long 0x00 "RBAR4,Region Base Address Register 4" hexmask.long 0x00 5.--31. 0x20 " BA ,Base address" group c15:0x0216++0x00 saveout c15:0x26 %l 0x4 line.long 0x00 "RSER4,Region Size and Enable Register 4" bitfld.long 0x00 15. " SD ,Subregion 7 disable" "-,D" bitfld.long 0x00 14. " ,Subregion 6 disable" "-,D" bitfld.long 0x00 13. " ,Subregion 5 disable" "-,D" bitfld.long 0x00 12. " ,Subregion 4 disable" "-,D" bitfld.long 0x00 11. " ,Subregion 3 disable" "-,D" bitfld.long 0x00 10. " ,Subregion 2 disable" "-,D" bitfld.long 0x00 9. " ,Subregion 1 disable" "-,D" bitfld.long 0x00 8. " ,Subregion 0 disable" "-,D" bitfld.long 0x00 1.--5. " RS ,Region size" "Unpredictable,Unpredictable,Unpredictable,Unpredictable,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1KB,2KB,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" group c15:0x0416++0x00 saveout c15:0x26 %l 0x4 line.long 0x00 "RACR4,Region Access Control Register 4" bitfld.long 0x00 12. " XN ,Execute never" "-,NoExec" bitfld.long 0x00 2. " S ,Share" "No,Yes" bitfld.long 0x00 8.--10. " AP ,Access permission" "None,Privileged,User read-only,Full,Reserved,Privileged read,Read-only,Reserved" bitfld.long 0x00 0.--1. 3.--5. " type ,Region type" "Strongly-ordered,Shareable Device,Outer and Inner write-through/no write-allocate,Outer and Inner write-back/no write-allocate,Outer and Inner Non-cacheable,00101,00110,Outer and Inner write-back/write-allocate,Non-shareable Device,01001,01010,01011,01100,01101,01110,01111,O:Non-cacheable I:Non-cacheable,O:Non-cacheable I:Write-back/write-allocate,O:Non-cacheable I:Write-through/no write-allocate,O:Non-cacheable I:Write-back/no write-allocate,O:Write-back/write-allocate I:Non-cacheable,O:Write-back/write-allocate I:Write-back/write-allocate,O:Write-back/write-allocate I:Write-through/no write-allocate,O:Write-back/write-allocate I:Write-back/no write-allocate,O:Write-through/no write-allocate I:Non-cacheable,O:Write-through/no write-allocate I:Write-back/write-allocate,O:Write-through/no write-allocate I:Write-through/no write-allocate,O:Write-through/no write-allocate I:Write-back/no write-allocate,O:Write-back/no write-allocate I:Non-cacheable,O:Write-back/no write-allocate I:Write-back/write-allocate,O:Write-back/no write-allocate I:Write-through/no write-allocate,O:Write-back/no write-allocate I:Write-back/no write-allocate" textline " " group c15:0x0016++0x00 saveout c15:0x26 %l 0x5 line.long 0x00 "RBAR5,Region Base Address Register 5" hexmask.long 0x00 5.--31. 0x20 " BA ,Base address" group c15:0x0216++0x00 saveout c15:0x26 %l 0x5 line.long 0x00 "RSER5,Region Size and Enable Register 5" bitfld.long 0x00 15. " SD ,Subregion 7 disable" "-,D" bitfld.long 0x00 14. " ,Subregion 6 disable" "-,D" bitfld.long 0x00 13. " ,Subregion 5 disable" "-,D" bitfld.long 0x00 12. " ,Subregion 4 disable" "-,D" bitfld.long 0x00 11. " ,Subregion 3 disable" "-,D" bitfld.long 0x00 10. " ,Subregion 2 disable" "-,D" bitfld.long 0x00 9. " ,Subregion 1 disable" "-,D" bitfld.long 0x00 8. " ,Subregion 0 disable" "-,D" bitfld.long 0x00 1.--5. " RS ,Region size" "Unpredictable,Unpredictable,Unpredictable,Unpredictable,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1KB,2KB,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" group c15:0x0416++0x00 saveout c15:0x26 %l 0x5 line.long 0x00 "RACR5,Region Access Control Register 5" bitfld.long 0x00 12. " XN ,Execute never" "-,NoExec" bitfld.long 0x00 2. " S ,Share" "No,Yes" bitfld.long 0x00 8.--10. " AP ,Access permission" "None,Privileged,User read-only,Full,Reserved,Privileged read,Read-only,Reserved" bitfld.long 0x00 0.--1. 3.--5. " type ,Region type" "Strongly-ordered,Shareable Device,Outer and Inner write-through/no write-allocate,Outer and Inner write-back/no write-allocate,Outer and Inner Non-cacheable,00101,00110,Outer and Inner write-back/write-allocate,Non-shareable Device,01001,01010,01011,01100,01101,01110,01111,O:Non-cacheable I:Non-cacheable,O:Non-cacheable I:Write-back/write-allocate,O:Non-cacheable I:Write-through/no write-allocate,O:Non-cacheable I:Write-back/no write-allocate,O:Write-back/write-allocate I:Non-cacheable,O:Write-back/write-allocate I:Write-back/write-allocate,O:Write-back/write-allocate I:Write-through/no write-allocate,O:Write-back/write-allocate I:Write-back/no write-allocate,O:Write-through/no write-allocate I:Non-cacheable,O:Write-through/no write-allocate I:Write-back/write-allocate,O:Write-through/no write-allocate I:Write-through/no write-allocate,O:Write-through/no write-allocate I:Write-back/no write-allocate,O:Write-back/no write-allocate I:Non-cacheable,O:Write-back/no write-allocate I:Write-back/write-allocate,O:Write-back/no write-allocate I:Write-through/no write-allocate,O:Write-back/no write-allocate I:Write-back/no write-allocate" textline " " group c15:0x0016++0x00 saveout c15:0x26 %l 0x6 line.long 0x00 "RBAR6,Region Base Address Register 6" hexmask.long 0x00 5.--31. 0x20 " BA ,Base address" group c15:0x0216++0x00 saveout c15:0x26 %l 0x6 line.long 0x00 "RSER6,Region Size and Enable Register 6" bitfld.long 0x00 15. " SD ,Subregion 7 disable" "-,D" bitfld.long 0x00 14. " ,Subregion 6 disable" "-,D" bitfld.long 0x00 13. " ,Subregion 5 disable" "-,D" bitfld.long 0x00 12. " ,Subregion 4 disable" "-,D" bitfld.long 0x00 11. " ,Subregion 3 disable" "-,D" bitfld.long 0x00 10. " ,Subregion 2 disable" "-,D" bitfld.long 0x00 9. " ,Subregion 1 disable" "-,D" bitfld.long 0x00 8. " ,Subregion 0 disable" "-,D" bitfld.long 0x00 1.--5. " RS ,Region size" "Unpredictable,Unpredictable,Unpredictable,Unpredictable,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1KB,2KB,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" group c15:0x0416++0x00 saveout c15:0x26 %l 0x6 line.long 0x00 "RACR6,Region Access Control Register 6" bitfld.long 0x00 12. " XN ,Execute never" "-,NoExec" bitfld.long 0x00 2. " S ,Share" "No,Yes" bitfld.long 0x00 8.--10. " AP ,Access permission" "None,Privileged,User read-only,Full,Reserved,Privileged read,Read-only,Reserved" bitfld.long 0x00 0.--1. 3.--5. " type ,Region type" "Strongly-ordered,Shareable Device,Outer and Inner write-through/no write-allocate,Outer and Inner write-back/no write-allocate,Outer and Inner Non-cacheable,00101,00110,Outer and Inner write-back/write-allocate,Non-shareable Device,01001,01010,01011,01100,01101,01110,01111,O:Non-cacheable I:Non-cacheable,O:Non-cacheable I:Write-back/write-allocate,O:Non-cacheable I:Write-through/no write-allocate,O:Non-cacheable I:Write-back/no write-allocate,O:Write-back/write-allocate I:Non-cacheable,O:Write-back/write-allocate I:Write-back/write-allocate,O:Write-back/write-allocate I:Write-through/no write-allocate,O:Write-back/write-allocate I:Write-back/no write-allocate,O:Write-through/no write-allocate I:Non-cacheable,O:Write-through/no write-allocate I:Write-back/write-allocate,O:Write-through/no write-allocate I:Write-through/no write-allocate,O:Write-through/no write-allocate I:Write-back/no write-allocate,O:Write-back/no write-allocate I:Non-cacheable,O:Write-back/no write-allocate I:Write-back/write-allocate,O:Write-back/no write-allocate I:Write-through/no write-allocate,O:Write-back/no write-allocate I:Write-back/no write-allocate" textline " " group c15:0x0016++0x00 saveout c15:0x26 %l 0x7 line.long 0x00 "RBAR7,Region Base Address Register 7" hexmask.long 0x00 5.--31. 0x20 " BA ,Base address" group c15:0x0216++0x00 saveout c15:0x26 %l 0x7 line.long 0x00 "RSER7,Region Size and Enable Register 7" bitfld.long 0x00 15. " SD ,Subregion 7 disable" "-,D" bitfld.long 0x00 14. " ,Subregion 6 disable" "-,D" bitfld.long 0x00 13. " ,Subregion 5 disable" "-,D" bitfld.long 0x00 12. " ,Subregion 4 disable" "-,D" bitfld.long 0x00 11. " ,Subregion 3 disable" "-,D" bitfld.long 0x00 10. " ,Subregion 2 disable" "-,D" bitfld.long 0x00 9. " ,Subregion 1 disable" "-,D" bitfld.long 0x00 8. " ,Subregion 0 disable" "-,D" bitfld.long 0x00 1.--5. " RS ,Region size" "Unpredictable,Unpredictable,Unpredictable,Unpredictable,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1KB,2KB,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" group c15:0x0416++0x00 saveout c15:0x26 %l 0x7 line.long 0x00 "RACR7,Region Access Control Register 7" bitfld.long 0x00 12. " XN ,Execute never" "-,NoExec" bitfld.long 0x00 2. " S ,Share" "No,Yes" bitfld.long 0x00 8.--10. " AP ,Access permission" "None,Privileged,User read-only,Full,Reserved,Privileged read,Read-only,Reserved" bitfld.long 0x00 0.--1. 3.--5. " type ,Region type" "Strongly-ordered,Shareable Device,Outer and Inner write-through/no write-allocate,Outer and Inner write-back/no write-allocate,Outer and Inner Non-cacheable,00101,00110,Outer and Inner write-back/write-allocate,Non-shareable Device,01001,01010,01011,01100,01101,01110,01111,O:Non-cacheable I:Non-cacheable,O:Non-cacheable I:Write-back/write-allocate,O:Non-cacheable I:Write-through/no write-allocate,O:Non-cacheable I:Write-back/no write-allocate,O:Write-back/write-allocate I:Non-cacheable,O:Write-back/write-allocate I:Write-back/write-allocate,O:Write-back/write-allocate I:Write-through/no write-allocate,O:Write-back/write-allocate I:Write-back/no write-allocate,O:Write-through/no write-allocate I:Non-cacheable,O:Write-through/no write-allocate I:Write-back/write-allocate,O:Write-through/no write-allocate I:Write-through/no write-allocate,O:Write-through/no write-allocate I:Write-back/no write-allocate,O:Write-back/no write-allocate I:Non-cacheable,O:Write-back/no write-allocate I:Write-back/write-allocate,O:Write-back/no write-allocate I:Write-through/no write-allocate,O:Write-back/no write-allocate I:Write-back/no write-allocate" textline " " group c15:0x0016++0x00 saveout c15:0x26 %l 0x8 line.long 0x00 "RBAR8,Region Base Address Register 8" hexmask.long 0x00 5.--31. 0x20 " BA ,Base address" group c15:0x0216++0x00 saveout c15:0x26 %l 0x8 line.long 0x00 "RSER8,Region Size and Enable Register 8" bitfld.long 0x00 15. " SD ,Subregion 7 disable" "-,D" bitfld.long 0x00 14. " ,Subregion 6 disable" "-,D" bitfld.long 0x00 13. " ,Subregion 5 disable" "-,D" bitfld.long 0x00 12. " ,Subregion 4 disable" "-,D" bitfld.long 0x00 11. " ,Subregion 3 disable" "-,D" bitfld.long 0x00 10. " ,Subregion 2 disable" "-,D" bitfld.long 0x00 9. " ,Subregion 1 disable" "-,D" bitfld.long 0x00 8. " ,Subregion 0 disable" "-,D" bitfld.long 0x00 1.--5. " RS ,Region size" "Unpredictable,Unpredictable,Unpredictable,Unpredictable,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1KB,2KB,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" group c15:0x0416++0x00 saveout c15:0x26 %l 0x8 line.long 0x00 "RACR8,Region Access Control Register 8" bitfld.long 0x00 12. " XN ,Execute never" "-,NoExec" bitfld.long 0x00 2. " S ,Share" "No,Yes" bitfld.long 0x00 8.--10. " AP ,Access permission" "None,Privileged,User read-only,Full,Reserved,Privileged read,Read-only,Reserved" bitfld.long 0x00 0.--1. 3.--5. " type ,Region type" "Strongly-ordered,Shareable Device,Outer and Inner write-through/no write-allocate,Outer and Inner write-back/no write-allocate,Outer and Inner Non-cacheable,00101,00110,Outer and Inner write-back/write-allocate,Non-shareable Device,01001,01010,01011,01100,01101,01110,01111,O:Non-cacheable I:Non-cacheable,O:Non-cacheable I:Write-back/write-allocate,O:Non-cacheable I:Write-through/no write-allocate,O:Non-cacheable I:Write-back/no write-allocate,O:Write-back/write-allocate I:Non-cacheable,O:Write-back/write-allocate I:Write-back/write-allocate,O:Write-back/write-allocate I:Write-through/no write-allocate,O:Write-back/write-allocate I:Write-back/no write-allocate,O:Write-through/no write-allocate I:Non-cacheable,O:Write-through/no write-allocate I:Write-back/write-allocate,O:Write-through/no write-allocate I:Write-through/no write-allocate,O:Write-through/no write-allocate I:Write-back/no write-allocate,O:Write-back/no write-allocate I:Non-cacheable,O:Write-back/no write-allocate I:Write-back/write-allocate,O:Write-back/no write-allocate I:Write-through/no write-allocate,O:Write-back/no write-allocate I:Write-back/no write-allocate" textline " " group c15:0x0016++0x00 saveout c15:0x26 %l 0x9 line.long 0x00 "RBAR9,Region Base Address Register 9" hexmask.long 0x00 5.--31. 0x20 " BA ,Base address" group c15:0x0216++0x00 saveout c15:0x26 %l 0x9 line.long 0x00 "RSER9,Region Size and Enable Register 9" bitfld.long 0x00 15. " SD ,Subregion 7 disable" "-,D" bitfld.long 0x00 14. " ,Subregion 6 disable" "-,D" bitfld.long 0x00 13. " ,Subregion 5 disable" "-,D" bitfld.long 0x00 12. " ,Subregion 4 disable" "-,D" bitfld.long 0x00 11. " ,Subregion 3 disable" "-,D" bitfld.long 0x00 10. " ,Subregion 2 disable" "-,D" bitfld.long 0x00 9. " ,Subregion 1 disable" "-,D" bitfld.long 0x00 8. " ,Subregion 0 disable" "-,D" bitfld.long 0x00 1.--5. " RS ,Region size" "Unpredictable,Unpredictable,Unpredictable,Unpredictable,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1KB,2KB,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" group c15:0x0416++0x00 saveout c15:0x26 %l 0x9 line.long 0x00 "RACR9,Region Access Control Register 9" bitfld.long 0x00 12. " XN ,Execute never" "-,NoExec" bitfld.long 0x00 2. " S ,Share" "No,Yes" bitfld.long 0x00 8.--10. " AP ,Access permission" "None,Privileged,User read-only,Full,Reserved,Privileged read,Read-only,Reserved" bitfld.long 0x00 0.--1. 3.--5. " type ,Region type" "Strongly-ordered,Shareable Device,Outer and Inner write-through/no write-allocate,Outer and Inner write-back/no write-allocate,Outer and Inner Non-cacheable,00101,00110,Outer and Inner write-back/write-allocate,Non-shareable Device,01001,01010,01011,01100,01101,01110,01111,O:Non-cacheable I:Non-cacheable,O:Non-cacheable I:Write-back/write-allocate,O:Non-cacheable I:Write-through/no write-allocate,O:Non-cacheable I:Write-back/no write-allocate,O:Write-back/write-allocate I:Non-cacheable,O:Write-back/write-allocate I:Write-back/write-allocate,O:Write-back/write-allocate I:Write-through/no write-allocate,O:Write-back/write-allocate I:Write-back/no write-allocate,O:Write-through/no write-allocate I:Non-cacheable,O:Write-through/no write-allocate I:Write-back/write-allocate,O:Write-through/no write-allocate I:Write-through/no write-allocate,O:Write-through/no write-allocate I:Write-back/no write-allocate,O:Write-back/no write-allocate I:Non-cacheable,O:Write-back/no write-allocate I:Write-back/write-allocate,O:Write-back/no write-allocate I:Write-through/no write-allocate,O:Write-back/no write-allocate I:Write-back/no write-allocate" textline " " group c15:0x0016++0x00 saveout c15:0x26 %l 0xA line.long 0x00 "RBAR10,Region Base Address Register 10" hexmask.long 0x00 5.--31. 0x20 " BA ,Base address" group c15:0x0216++0x00 saveout c15:0x26 %l 0xA line.long 0x00 "RSER10,Region Size and Enable Register 10" bitfld.long 0x00 15. " SD ,Subregion 7 disable" "-,D" bitfld.long 0x00 14. " ,Subregion 6 disable" "-,D" bitfld.long 0x00 13. " ,Subregion 5 disable" "-,D" bitfld.long 0x00 12. " ,Subregion 4 disable" "-,D" bitfld.long 0x00 11. " ,Subregion 3 disable" "-,D" bitfld.long 0x00 10. " ,Subregion 2 disable" "-,D" bitfld.long 0x00 9. " ,Subregion 1 disable" "-,D" bitfld.long 0x00 8. " ,Subregion 0 disable" "-,D" bitfld.long 0x00 1.--5. " RS ,Region size" "Unpredictable,Unpredictable,Unpredictable,Unpredictable,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1KB,2KB,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" group c15:0x0416++0x00 saveout c15:0x26 %l 0xA line.long 0x00 "RACR10,Region Access Control Register 10" bitfld.long 0x00 12. " XN ,Execute never" "-,NoExec" bitfld.long 0x00 2. " S ,Share" "No,Yes" bitfld.long 0x00 8.--10. " AP ,Access permission" "None,Privileged,User read-only,Full,Reserved,Privileged read,Read-only,Reserved" bitfld.long 0x00 0.--1. 3.--5. " type ,Region type" "Strongly-ordered,Shareable Device,Outer and Inner write-through/no write-allocate,Outer and Inner write-back/no write-allocate,Outer and Inner Non-cacheable,00101,00110,Outer and Inner write-back/write-allocate,Non-shareable Device,01001,01010,01011,01100,01101,01110,01111,O:Non-cacheable I:Non-cacheable,O:Non-cacheable I:Write-back/write-allocate,O:Non-cacheable I:Write-through/no write-allocate,O:Non-cacheable I:Write-back/no write-allocate,O:Write-back/write-allocate I:Non-cacheable,O:Write-back/write-allocate I:Write-back/write-allocate,O:Write-back/write-allocate I:Write-through/no write-allocate,O:Write-back/write-allocate I:Write-back/no write-allocate,O:Write-through/no write-allocate I:Non-cacheable,O:Write-through/no write-allocate I:Write-back/write-allocate,O:Write-through/no write-allocate I:Write-through/no write-allocate,O:Write-through/no write-allocate I:Write-back/no write-allocate,O:Write-back/no write-allocate I:Non-cacheable,O:Write-back/no write-allocate I:Write-back/write-allocate,O:Write-back/no write-allocate I:Write-through/no write-allocate,O:Write-back/no write-allocate I:Write-back/no write-allocate" textline " " group c15:0x0016++0x00 saveout c15:0x26 %l 0xB line.long 0x00 "RBAR11,Region Base Address Register 11" hexmask.long 0x00 5.--31. 0x20 " BA ,Base address" group c15:0x0216++0x00 saveout c15:0x26 %l 0xB line.long 0x00 "RSER11,Region Size and Enable Register 11" bitfld.long 0x00 15. " SD ,Subregion 7 disable" "-,D" bitfld.long 0x00 14. " ,Subregion 6 disable" "-,D" bitfld.long 0x00 13. " ,Subregion 5 disable" "-,D" bitfld.long 0x00 12. " ,Subregion 4 disable" "-,D" bitfld.long 0x00 11. " ,Subregion 3 disable" "-,D" bitfld.long 0x00 10. " ,Subregion 2 disable" "-,D" bitfld.long 0x00 9. " ,Subregion 1 disable" "-,D" bitfld.long 0x00 8. " ,Subregion 0 disable" "-,D" bitfld.long 0x00 1.--5. " RS ,Region size" "Unpredictable,Unpredictable,Unpredictable,Unpredictable,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1KB,2KB,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" group c15:0x0416++0x00 saveout c15:0x26 %l 0xB line.long 0x00 "RACR11,Region Access Control Register 11" bitfld.long 0x00 12. " XN ,Execute never" "-,NoExec" bitfld.long 0x00 2. " S ,Share" "No,Yes" bitfld.long 0x00 8.--10. " AP ,Access permission" "None,Privileged,User read-only,Full,Reserved,Privileged read,Read-only,Reserved" bitfld.long 0x00 0.--1. 3.--5. " type ,Region type" "Strongly-ordered,Shareable Device,Outer and Inner write-through/no write-allocate,Outer and Inner write-back/no write-allocate,Outer and Inner Non-cacheable,00101,00110,Outer and Inner write-back/write-allocate,Non-shareable Device,01001,01010,01011,01100,01101,01110,01111,O:Non-cacheable I:Non-cacheable,O:Non-cacheable I:Write-back/write-allocate,O:Non-cacheable I:Write-through/no write-allocate,O:Non-cacheable I:Write-back/no write-allocate,O:Write-back/write-allocate I:Non-cacheable,O:Write-back/write-allocate I:Write-back/write-allocate,O:Write-back/write-allocate I:Write-through/no write-allocate,O:Write-back/write-allocate I:Write-back/no write-allocate,O:Write-through/no write-allocate I:Non-cacheable,O:Write-through/no write-allocate I:Write-back/write-allocate,O:Write-through/no write-allocate I:Write-through/no write-allocate,O:Write-through/no write-allocate I:Write-back/no write-allocate,O:Write-back/no write-allocate I:Non-cacheable,O:Write-back/no write-allocate I:Write-back/write-allocate,O:Write-back/no write-allocate I:Write-through/no write-allocate,O:Write-back/no write-allocate I:Write-back/no write-allocate" textline " " group c15:0x0016++0x00 saveout c15:0x26 %l 0xC line.long 0x00 "RBAR12,Region Base Address Register 12" hexmask.long 0x00 5.--31. 0x20 " BA ,Base address" group c15:0x0216++0x00 saveout c15:0x26 %l 0xC line.long 0x00 "RSER12,Region Size and Enable Register 12" bitfld.long 0x00 15. " SD ,Subregion 7 disable" "-,D" bitfld.long 0x00 14. " ,Subregion 6 disable" "-,D" bitfld.long 0x00 13. " ,Subregion 5 disable" "-,D" bitfld.long 0x00 12. " ,Subregion 4 disable" "-,D" bitfld.long 0x00 11. " ,Subregion 3 disable" "-,D" bitfld.long 0x00 10. " ,Subregion 2 disable" "-,D" bitfld.long 0x00 9. " ,Subregion 1 disable" "-,D" bitfld.long 0x00 8. " ,Subregion 0 disable" "-,D" bitfld.long 0x00 1.--5. " RS ,Region size" "Unpredictable,Unpredictable,Unpredictable,Unpredictable,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1KB,2KB,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" group c15:0x0416++0x00 saveout c15:0x26 %l 0xC line.long 0x00 "RACR12,Region Access Control Register 12" bitfld.long 0x00 12. " XN ,Execute never" "-,NoExec" bitfld.long 0x00 2. " S ,Share" "No,Yes" bitfld.long 0x00 8.--10. " AP ,Access permission" "None,Privileged,User read-only,Full,Reserved,Privileged read,Read-only,Reserved" bitfld.long 0x00 0.--1. 3.--5. " type ,Region type" "Strongly-ordered,Shareable Device,Outer and Inner write-through/no write-allocate,Outer and Inner write-back/no write-allocate,Outer and Inner Non-cacheable,00101,00110,Outer and Inner write-back/write-allocate,Non-shareable Device,01001,01010,01011,01100,01101,01110,01111,O:Non-cacheable I:Non-cacheable,O:Non-cacheable I:Write-back/write-allocate,O:Non-cacheable I:Write-through/no write-allocate,O:Non-cacheable I:Write-back/no write-allocate,O:Write-back/write-allocate I:Non-cacheable,O:Write-back/write-allocate I:Write-back/write-allocate,O:Write-back/write-allocate I:Write-through/no write-allocate,O:Write-back/write-allocate I:Write-back/no write-allocate,O:Write-through/no write-allocate I:Non-cacheable,O:Write-through/no write-allocate I:Write-back/write-allocate,O:Write-through/no write-allocate I:Write-through/no write-allocate,O:Write-through/no write-allocate I:Write-back/no write-allocate,O:Write-back/no write-allocate I:Non-cacheable,O:Write-back/no write-allocate I:Write-back/write-allocate,O:Write-back/no write-allocate I:Write-through/no write-allocate,O:Write-back/no write-allocate I:Write-back/no write-allocate" textline " " group c15:0x0016++0x00 saveout c15:0x26 %l 0xD line.long 0x00 "RBAR13,Region Base Address Register 13" hexmask.long 0x00 5.--31. 0x20 " BA ,Base address" group c15:0x0216++0x00 saveout c15:0x26 %l 0xD line.long 0x00 "RSER13,Region Size and Enable Register 13" bitfld.long 0x00 15. " SD ,Subregion 7 disable" "-,D" bitfld.long 0x00 14. " ,Subregion 6 disable" "-,D" bitfld.long 0x00 13. " ,Subregion 5 disable" "-,D" bitfld.long 0x00 12. " ,Subregion 4 disable" "-,D" bitfld.long 0x00 11. " ,Subregion 3 disable" "-,D" bitfld.long 0x00 10. " ,Subregion 2 disable" "-,D" bitfld.long 0x00 9. " ,Subregion 1 disable" "-,D" bitfld.long 0x00 8. " ,Subregion 0 disable" "-,D" bitfld.long 0x00 1.--5. " RS ,Region size" "Unpredictable,Unpredictable,Unpredictable,Unpredictable,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1KB,2KB,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" group c15:0x0416++0x00 saveout c15:0x26 %l 0xD line.long 0x00 "RACR13,Region Access Control Register 13" bitfld.long 0x00 12. " XN ,Execute never" "-,NoExec" bitfld.long 0x00 2. " S ,Share" "No,Yes" bitfld.long 0x00 8.--10. " AP ,Access permission" "None,Privileged,User read-only,Full,Reserved,Privileged read,Read-only,Reserved" bitfld.long 0x00 0.--1. 3.--5. " type ,Region type" "Strongly-ordered,Shareable Device,Outer and Inner write-through/no write-allocate,Outer and Inner write-back/no write-allocate,Outer and Inner Non-cacheable,00101,00110,Outer and Inner write-back/write-allocate,Non-shareable Device,01001,01010,01011,01100,01101,01110,01111,O:Non-cacheable I:Non-cacheable,O:Non-cacheable I:Write-back/write-allocate,O:Non-cacheable I:Write-through/no write-allocate,O:Non-cacheable I:Write-back/no write-allocate,O:Write-back/write-allocate I:Non-cacheable,O:Write-back/write-allocate I:Write-back/write-allocate,O:Write-back/write-allocate I:Write-through/no write-allocate,O:Write-back/write-allocate I:Write-back/no write-allocate,O:Write-through/no write-allocate I:Non-cacheable,O:Write-through/no write-allocate I:Write-back/write-allocate,O:Write-through/no write-allocate I:Write-through/no write-allocate,O:Write-through/no write-allocate I:Write-back/no write-allocate,O:Write-back/no write-allocate I:Non-cacheable,O:Write-back/no write-allocate I:Write-back/write-allocate,O:Write-back/no write-allocate I:Write-through/no write-allocate,O:Write-back/no write-allocate I:Write-back/no write-allocate" textline " " group c15:0x0016++0x00 saveout c15:0x26 %l 0xE line.long 0x00 "RBAR14,Region Base Address Register 14" hexmask.long 0x00 5.--31. 0x20 " BA ,Base address" group c15:0x0216++0x00 saveout c15:0x26 %l 0xE line.long 0x00 "RSER14,Region Size and Enable Register 14" bitfld.long 0x00 15. " SD ,Subregion 7 disable" "-,D" bitfld.long 0x00 14. " ,Subregion 6 disable" "-,D" bitfld.long 0x00 13. " ,Subregion 5 disable" "-,D" bitfld.long 0x00 12. " ,Subregion 4 disable" "-,D" bitfld.long 0x00 11. " ,Subregion 3 disable" "-,D" bitfld.long 0x00 10. " ,Subregion 2 disable" "-,D" bitfld.long 0x00 9. " ,Subregion 1 disable" "-,D" bitfld.long 0x00 8. " ,Subregion 0 disable" "-,D" bitfld.long 0x00 1.--5. " RS ,Region size" "Unpredictable,Unpredictable,Unpredictable,Unpredictable,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1KB,2KB,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" group c15:0x0416++0x00 saveout c15:0x26 %l 0xE line.long 0x00 "RACR14,Region Access Control Register 14" bitfld.long 0x00 12. " XN ,Execute never" "-,NoExec" bitfld.long 0x00 2. " S ,Share" "No,Yes" bitfld.long 0x00 8.--10. " AP ,Access permission" "None,Privileged,User read-only,Full,Reserved,Privileged read,Read-only,Reserved" bitfld.long 0x00 0.--1. 3.--5. " type ,Region type" "Strongly-ordered,Shareable Device,Outer and Inner write-through/no write-allocate,Outer and Inner write-back/no write-allocate,Outer and Inner Non-cacheable,00101,00110,Outer and Inner write-back/write-allocate,Non-shareable Device,01001,01010,01011,01100,01101,01110,01111,O:Non-cacheable I:Non-cacheable,O:Non-cacheable I:Write-back/write-allocate,O:Non-cacheable I:Write-through/no write-allocate,O:Non-cacheable I:Write-back/no write-allocate,O:Write-back/write-allocate I:Non-cacheable,O:Write-back/write-allocate I:Write-back/write-allocate,O:Write-back/write-allocate I:Write-through/no write-allocate,O:Write-back/write-allocate I:Write-back/no write-allocate,O:Write-through/no write-allocate I:Non-cacheable,O:Write-through/no write-allocate I:Write-back/write-allocate,O:Write-through/no write-allocate I:Write-through/no write-allocate,O:Write-through/no write-allocate I:Write-back/no write-allocate,O:Write-back/no write-allocate I:Non-cacheable,O:Write-back/no write-allocate I:Write-back/write-allocate,O:Write-back/no write-allocate I:Write-through/no write-allocate,O:Write-back/no write-allocate I:Write-back/no write-allocate" textline " " group c15:0x0016++0x00 saveout c15:0x26 %l 0xF line.long 0x00 "RBAR15,Region Base Address Register 15" hexmask.long 0x00 5.--31. 0x20 " BA ,Base address" group c15:0x0216++0x00 saveout c15:0x26 %l 0xF line.long 0x00 "RSER15,Region Size and Enable Register 15" bitfld.long 0x00 15. " SD ,Subregion 7 disable" "-,D" bitfld.long 0x00 14. " ,Subregion 6 disable" "-,D" bitfld.long 0x00 13. " ,Subregion 5 disable" "-,D" bitfld.long 0x00 12. " ,Subregion 4 disable" "-,D" bitfld.long 0x00 11. " ,Subregion 3 disable" "-,D" bitfld.long 0x00 10. " ,Subregion 2 disable" "-,D" bitfld.long 0x00 9. " ,Subregion 1 disable" "-,D" bitfld.long 0x00 8. " ,Subregion 0 disable" "-,D" bitfld.long 0x00 1.--5. " RS ,Region size" "Unpredictable,Unpredictable,Unpredictable,Unpredictable,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1KB,2KB,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" group c15:0x0416++0x00 saveout c15:0x26 %l 0xF line.long 0x00 "RACR15,Region Access Control Register 15" bitfld.long 0x00 12. " XN ,Execute never" "-,NoExec" bitfld.long 0x00 2. " S ,Share" "No,Yes" bitfld.long 0x00 8.--10. " AP ,Access permission" "None,Privileged,User read-only,Full,Reserved,Privileged read,Read-only,Reserved" bitfld.long 0x00 0.--1. 3.--5. " type ,Region type" "Strongly-ordered,Shareable Device,Outer and Inner write-through/no write-allocate,Outer and Inner write-back/no write-allocate,Outer and Inner Non-cacheable,00101,00110,Outer and Inner write-back/write-allocate,Non-shareable Device,01001,01010,01011,01100,01101,01110,01111,O:Non-cacheable I:Non-cacheable,O:Non-cacheable I:Write-back/write-allocate,O:Non-cacheable I:Write-through/no write-allocate,O:Non-cacheable I:Write-back/no write-allocate,O:Write-back/write-allocate I:Non-cacheable,O:Write-back/write-allocate I:Write-back/write-allocate,O:Write-back/write-allocate I:Write-through/no write-allocate,O:Write-back/write-allocate I:Write-back/no write-allocate,O:Write-through/no write-allocate I:Non-cacheable,O:Write-through/no write-allocate I:Write-back/write-allocate,O:Write-through/no write-allocate I:Write-through/no write-allocate,O:Write-through/no write-allocate I:Write-back/no write-allocate,O:Write-back/no write-allocate I:Non-cacheable,O:Write-back/no write-allocate I:Write-back/write-allocate,O:Write-back/no write-allocate I:Write-through/no write-allocate,O:Write-back/no write-allocate I:Write-back/no write-allocate" textline " " tree.end tree.end width 0x9 tree "TCM Control and Configuration" rgroup.long c15:0x200++0x00 line.long 0x00 "TCMTR,TCM Type Register" bitfld.long 0x00 16.--18. " BTCM ,Number of BTCMs implemented" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " ATCM ,Number of ATCMs implemented" "0,1,2,3,4,5,6,7" group.long c15:0x019++0x00 line.long 0x00 "BTCMRR,BTCM Region Register" hexmask.long 0x00 12.--31. 0x1000 " BA ,Base address (physical address)" bitfld.long 0x00 2.--6. " SIZE ,Size of instruction TCM on reads" "None,Reserved,Reserved,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16M,32M,64M,128M,256M,512M,1G,2G,4G,?..." bitfld.long 0x00 0. " EN ,Enable instruction TCM" "Disabled,Enabled" group.long c15:0x119++0x00 line.long 0x00 "ATCMRR,ATCM Region Register" hexmask.long 0x00 12.--31. 0x1000 " BA ,Base address (physical address)" bitfld.long 0x00 2.--6. " SIZE ,Size of instruction TCM on reads" "None,Reserved,Reserved,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16M,32M,64M,128M,256M,512M,1G,2G,4G,?..." bitfld.long 0x00 0. " EN ,Enable instruction TCM" "Disabled,Enabled" rgroup.long c15:0x29++0x00 line.long 0x00 "TCMSEL,TCM Selection Register" textline " " group.long c15:0x10f++0x00 line.long 0x00 "NAXIPIRR,Normal AXI Peripheral Interface Region Register" hexmask.long 0x00 12.--31. 0x1000 " BA ,Base address of the interface" bitfld.long 0x00 2.--6. " SIZE ,Size of the interface configured during integration" "None,Reserved,Reserved,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16M,32M,64M,128M,256M,512M,1G,2G,4G,?..." bitfld.long 0x00 0. " EN ,Interface enable" "Disabled,Enabled" group.long c15:0x20f++0x00 line.long 0x00 "VAXIPIRR,Virtual AXI Peripheral Interface Region Register" hexmask.long 0x00 12.--31. 0x1000 " BA ,Base address of the interface" bitfld.long 0x00 2.--6. " SIZE ,Size of the interface configured during integration" "None,Reserved,Reserved,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16M,32M,64M,128M,256M,512M,1G,2G,4G,?..." bitfld.long 0x00 0. " EN ,Interface enable" "Disabled,Enabled" group.long c15:0x30f++0x00 line.long 0x00 "AHBPIRR,AHB Peripheral Interface Region Register" hexmask.long 0x00 12.--31. 0x1000 " BA ,Base address of the interface" bitfld.long 0x00 2.--6. " SIZE ,Size of the interface configured during integration" "None,Reserved,Reserved,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16M,32M,64M,128M,256M,512M,1G,2G,4G,?..." bitfld.long 0x00 0. " EN ,Interface enable" "Disabled,Enabled" tree.end width 0xC tree "Cache Control and Configuration" rgroup.long c15:0x1100++0x00 line.long 0x00 "CLIDR,Cache Level ID Register" bitfld.long 0x00 27.--29. " LOU ,Level of Unification" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--26. " LOC ,Level of Coherency" "Level 1,Level 2,Level 3,Level 4,Level 5,Level 6,Level 7,Level 8" textline " " bitfld.long 0x00 21.--23. " CL8 ,Cache Level (CL) 8" "0,1,2,3,4,5,6,7" bitfld.long 0x00 18.--20. " CL7 ,Cache Level (CL) 7" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 15.--17. " CL6 ,Cache Level (CL) 6" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. " CL5 ,Cache Level (CL) 5" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 9.--11. " CL4 ,Cache Level (CL) 4" "0,1,2,3,4,5,6,7" bitfld.long 0x00 6.--8. " CL3 ,Cache Level (CL) 3" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 3.--5. " CL2 ,Cache Level (CL) 2" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " CL1 ,Cache Level (CL) 1" "0,1,2,3,4,5,6,7" rgroup.long c15:0x1700++0x00 line.long 0x00 "AIDR,Auxiliary ID Register" rgroup.long c15:0x1000++0x00 line.long 0x00 "CCSIDR,Cache Size ID Register" bitfld.long 0x00 31. " WT ,Write-Through" "Not supported,Supported" bitfld.long 0x00 30. " WB ,Write-Back" "Not supported,Supported" textline " " bitfld.long 0x00 29. " RA ,Read-Allocate" "Not supported,Supported" bitfld.long 0x00 28. " WA ,Write-Allocate" "Not supported,Supported" textline " " hexmask.long.word 0x00 13.--27. 1. " NUMSETS ,Number of sets" hexmask.long.word 0x00 3.--12. 1. " ASSOCIATIVITY ,Associativity" textline " " bitfld.long 0x00 0.--2. " LINESIZE ,Number of words in each cache line" "0,1,2,3,4,5,6,7" group.long c15:0x2000++0x00 line.long 0x0 "CSSELR,Cache Size Selection Register" bitfld.long 0x00 1.--3. " LEVEL ,Cache level to select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " IND ,Instruction or data or unified cache to use" "Data/unified,Instruction" group.long c15:0x03f++0x00 line.long 0x00 "CFLR,Correctable Fault Location Register" bitfld.long 0x00 26.--29. " WAY ,Way of the error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--25. " SIDE ,Source of the error" "0,1,2,3" textline " " hexmask.long.word 0x00 5.--13. 1. " INDEX ,index of the location where the error occurred" bitfld.long 0x00 0.--1. " TYPE ,Type of access that caused the error" "Instruction cache,Data cache,Reserved,ACP" group.long c15:0x5f++0x00 line.long 0x00 "IADCR,Invalidate All Data Cache Register" bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3" hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean" group.long c15:0xef++0x00 line.long 0x00 "CSOR,Cache Size Override Register" bitfld.long 0x00 4.--7. " Dcache ,Validation data cache size" "4kB,8kB,Reserved,16kB,Reserved,Reserved,Reserved,32kB,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,64kB" bitfld.long 0x00 0.--3. " Icache ,Validation instruction cache size" "4kB,8kB,Reserved,16kB,Reserved,Reserved,Reserved,32kB,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,64kB" tree.end width 12. tree "System Performance Monitor" group.long c15:0xc9++0x00 line.long 0x00 "PMCR,Performance Monitor Control Register" hexmask.long.byte 0x00 24.--31. 1. " IMP ,Implementer code" hexmask.long.byte 0x00 16.--23. 1. " IDCODE ,Identification code" bitfld.long 0x00 11.--15. " N ,Number of counters implemented" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 5. " DP ,Disable PMCCNTR when prohibited" "No,Yes" textline " " bitfld.long 0x00 4. " X ,Export enable" "Disabled,Enabled" bitfld.long 0x00 3. " D ,Clock divider" "Every cycle,64th cycle" bitfld.long 0x00 2. " C ,Clock counter reset" "No action,Reset" bitfld.long 0x00 1. " P ,Event counter reset" "No action,Reset" textline " " bitfld.long 0x00 0. " E ,Enable" "Disabled,Enabled" group.long c15:0x1c9++0x00 line.long 0x00 "PMCNTENSET,Count Enable Set Register" eventfld.long 0x00 31. " C ,CCNT Enabled / Enable / Disable CCNT" "Disabled,Enabled" eventfld.long 0x00 2. " P2 ,PMN2 Enabled / Enable / Disable counter" "Disabled,Enabled" eventfld.long 0x00 1. " P1 ,PMN1 Enabled / Enable / Disable counter" "Disabled,Enabled" eventfld.long 0x00 0. " P0 ,PMN0 Enabled / Enable / Disable counter" "Disabled,Enabled" group.long c15:0x2c9++0x00 line.long 0x0 "PMCNTENCLR,Count Enable Clear Register" eventfld.long 0x00 31. " C ,CCNT Enabled / Enable / Disable CCNT" "Disabled,Enabled" eventfld.long 0x00 2. " P2 ,PMN2 Enabled / Enable / Disable counter" "Disabled,Enabled" eventfld.long 0x00 1. " P1 ,PMN1 Enabled / Enable / Disable counter" "Disabled,Enabled" eventfld.long 0x00 0. " P0 ,PMN0 Enabled / Enable / Disable counter" "Disabled,Enabled" group.long c15:0x3c9++0x00 line.long 0x0 "PMOVSR,Overflow Flag Status Register" eventfld.long 0x00 31. " C ,CCNT overflowed" "No overflow,Overflow" eventfld.long 0x00 2. " P2 ,PMN2 overflowed" "No overflow,Overflow" eventfld.long 0x00 1. " P1 ,PMN1 overflowed" "No overflow,Overflow" eventfld.long 0x00 0. " P0 ,PMN0 overflowed" "No overflow,Overflow" group.long c15:0x4c9++0x00 line.long 0x0 "PMSWINC,Software Increment Register" eventfld.long 0x00 2. " P2 ,Increment PMN2" "No action,Increment" eventfld.long 0x00 1. " P1 ,Increment PMN1" "No action,Increment" eventfld.long 0x00 0. " P0 ,Increment PMN0" "No action,Increment" group.long c15:0x01d9++0x00 line.long 0x00 "PMXEVTYPER,Event Type Selection Register" hexmask.long.byte 0x00 0.--7. 1. " SEL ,Event number selected" group.long c15:0x02d9++0x00 line.long 0x00 "PMXEVCNTR,Event Count Register" group.long c15:0x5c9++0x00 line.long 0x00 "PMSELR,Performance Counter Selection Register" bitfld.long 0x00 0.--4. " SEL ,Counter select" "0,1,2,?..." group.long c15:0xd9++0x00 line.long 0x00 "PMCCNTR,Cycle Count Register" group.long c15:0x01d9++0x00 saveout c15:0x5C9 %l 0x0 line.long 0x00 "ESR0,Event Selection Register 0" hexmask.long.byte 0x00 0.--7. 1. " SEL ,Event Selection" group.long c15:0x02d9++0x00 saveout c15:0x5C9 %l 0x0 line.long 0x00 "PMCR0,Performance Monitor Count Register 0" hexmask.long 0x00 0.--31. 1. " PMC ,Performance Monitor Count" group.long c15:0x01d9++0x00 saveout c15:0x5C9 %l 0x1 line.long 0x00 "ESR1,Event Selection Register 1" hexmask.long.byte 0x00 0.--7. 1. " SEL ,Event Selection" group.long c15:0x02d9++0x00 saveout c15:0x5C9 %l 0x1 line.long 0x00 "PMCR1,Performance Monitor Count Register 1" hexmask.long 0x00 0.--31. 1. " PMC ,Performance Monitor Count" group.long c15:0x01d9++0x00 saveout c15:0x5C9 %l 0x2 line.long 0x00 "ESR2,Event Selection Register 2" hexmask.long.byte 0x00 0.--7. 1. " SEL ,Event Selection" group.long c15:0x02d9++0x00 saveout c15:0x5C9 %l 0x2 line.long 0x00 "PMCR2,Performance Monitor Count Register 2" hexmask.long 0x00 0.--31. 1. " PMC ,Performance Monitor Count" group.long c15:0xe9++0x00 line.long 0x00 "PMUSERENR,User Enable Register" bitfld.long 0x00 0. " EN ,User mode access to performance monitor and validation registers" "Not allowed,Allowed" group.long c15:0x1e9++0x00 line.long 0x00 "PMINTENSET,Interrupt Enable Set Register" eventfld.long 0x00 31. " C ,Interrupt on CCNT Overflow Enabled / Enable / Disable Interrupt" "Disabled,Enabled" eventfld.long 0x00 2. " P2 ,Interrupt on PMN2 Overflow Enabled / Enable / Disable Interrupt" "Disabled,Enabled" eventfld.long 0x00 1. " P1 ,Interrupt on PMN1 Overflow Enabled / Enable / Disable Interrupt" "Disabled,Enabled" eventfld.long 0x00 0. " P0 ,Interrupt on PMN0 Overflow Enabled / Enable / Disable Interrupt" "Disabled,Enabled" group.long c15:0x2e9++0x00 line.long 0x00 "PMINTENCLR,Interrupt Enable Clear Register" eventfld.long 0x00 31. " C ,Interrupt on CCNT Overflow Enabled / Enable / Disable Interrupt" "Disabled,Enabled" eventfld.long 0x00 2. " P2 ,Interrupt on PMN2 Overflow Enabled / Enable / Disable Interrupt" "Disabled,Enabled" eventfld.long 0x00 1. " P1 ,Interrupt on PMN1 Overflow Enabled / Enable / Disable Interrupt" "Disabled,Enabled" eventfld.long 0x00 0. " P0 ,Interrupt on PMN0 Overflow Enabled / Enable / Disable Interrupt" "Disabled,Enabled" tree "Validation Registers" group.long c15:0x01f++0x00 line.long 0x00 "IRQESR,nVAL IRQ Enable Set Register" bitfld.long 0x00 31. " C ,CCNT overflow IRQ request" "Not requested,Requested" bitfld.long 0x00 2. " P2 ,PMXEVCNTR2 overflow IRQ request" "Not requested,Requested" bitfld.long 0x00 1. " P1 ,PMXEVCNTR1 overflow IRQ request" "Not requested,Requested" bitfld.long 0x00 0. " P0 ,PMXEVCNTR0 overflow IRQ request" "Not requested,Requested" group.long c15:0x11f++0x00 line.long 0x00 "FIQESR,nVAL FIQ Enable Set Register" bitfld.long 0x00 31. " C ,CCNT overflow FIQ request" "Not requested,Requested" bitfld.long 0x00 2. " P2 ,PMXEVCNTR2 overflow FIQ request" "Not requested,Requested" bitfld.long 0x00 1. " P1 ,PMXEVCNTR1 overflow FIQ request" "Not requested,Requested" bitfld.long 0x00 0. " P0 ,PMXEVCNTR0 overflow FIQ request" "Not requested,Requested" group.long c15:0x21f++0x00 line.long 0x00 "RESR,nVAL Reset Enable Set Register" bitfld.long 0x00 31. " C ,CCNT overflow reset request" "Not requested,Requested" bitfld.long 0x00 2. " P2 ,PMXEVCNTR2 overflow reset request" "Not requested,Requested" bitfld.long 0x00 1. " P1 ,PMXEVCNTR1 overflow reset request" "Not requested,Requested" bitfld.long 0x00 0. " P0 ,PMXEVCNTR0 overflow reset request" "Not requested,Requested" group.long c15:0x31f++0x00 line.long 0x00 "RESR,VAL Debug Request Enable Set Register" bitfld.long 0x00 31. " C ,CCNT overflow debug request" "Not requested,Requested" bitfld.long 0x00 2. " P2 ,PMXEVCNTR2 overflow debug request" "Not requested,Requested" bitfld.long 0x00 1. " P1 ,PMXEVCNTR1 overflow debug request" "Not requested,Requested" bitfld.long 0x00 0. " P0 ,PMXEVCNTR0 overflow debug request" "Not requested,Requested" group.long c15:0x41f++0x00 line.long 0x00 "IRQECR,VAL IRQ Enable Clear Register" eventfld.long 0x00 31. " C ,CCNT overflow IRQ request" "Not requested,Requested" eventfld.long 0x00 2. " P2 ,PMXEVCNTR2 overflow IRQ request" "Not requested,Requested" eventfld.long 0x00 1. " P1 ,PMXEVCNTR1 overflow IRQ request" "Not requested,Requested" eventfld.long 0x00 0. " P0 ,PMXEVCNTR0 overflow IRQ request" "Not requested,Requested" group.long c15:0x51f++0x00 line.long 0x00 "FIQECR,VAL FIQ Enable Clear Register" eventfld.long 0x00 31. " C ,CCNT overflow FIQ request" "Not requested,Requested" eventfld.long 0x00 2. " P2 ,PMXEVCNTR2 overflow FIQ request" "Not requested,Requested" eventfld.long 0x00 1. " P1 ,PMXEVCNTR1 overflow FIQ request" "Not requested,Requested" eventfld.long 0x00 0. " P0 ,PMXEVCNTR0 overflow FIQ request" "Not requested,Requested" group.long c15:0x61f++0x00 line.long 0x00 "RECR,nVAL Reset Enable Clear Register" eventfld.long 0x00 31. " C ,CCNT overflow reset request" "Not requested,Requested" eventfld.long 0x00 2. " P2 ,PMXEVCNTR2 overflow reset request" "Not requested,Requested" eventfld.long 0x00 1. " P1 ,PMXEVCNTR1 overflow reset request" "Not requested,Requested" eventfld.long 0x00 0. " P0 ,PMXEVCNTR0 overflow reset request" "Not requested,Requested" group.long c15:0x71f++0x00 line.long 0x00 "DRECR,VAL Debug Request Enable Clear Register" eventfld.long 0x00 31. " C ,CCNT overflow debug request" "Not requested,Requested" eventfld.long 0x00 2. " P2 ,PMXEVCNTR2 overflow debug request" "Not requested,Requested" eventfld.long 0x00 1. " P1 ,PMXEVCNTR1 overflow debug request" "Not requested,Requested" eventfld.long 0x00 0. " P0 ,PMXEVCNTR0 overflow debug request" "Not requested,Requested" tree.end tree.end width 11. width 18. tree "Debug Registers" tree "Processor Identifier Registers" rgroup.long c14:832.++0x00 line.long 0x00 "MIDR,Main ID Register" hexmask.long.byte 0x0 24.--31. 0x1 " IMPL ,Implementer code" hexmask.long.byte 0x0 20.--23. 0x1 " SPECREV ,Variant number" textline " " hexmask.long.byte 0x0 16.--19. 0x1 " ARCH ,Architecture" hexmask.long.word 0x0 4.--15. 0x1 " PARTNUM ,Part Number" textline " " hexmask.long.byte 0x0 0.--3. 0x1 " REV ,Layout Revision" rgroup.long c14:833.++0x00 line.long 0x00 "CACHETYPE,Cache Type Register" bitfld.long 0x00 16.--19. " DMINLINE ,Words of Smallest Line Length in L1 or L2 Data Cache Number" "Reserved,Reserved,Reserved,Reserved,16x32-bit words,?..." bitfld.long 0x00 14.--15. " L1_IPOLICY ,VIPT Instruction Cache Support" "Reserved,Reserved,Supported,?..." textline " " bitfld.long 0x00 0.--3. " IMINLINE ,Words of Smallest Line Length in L1 or L2 Instruction Cache Number" "Reserved,Reserved,Reserved,Reserved,16x32-bit words,?..." rgroup.long c14:834.++0x00 line.long 0x00 "TCMTR,TCM Type Register" group.long c14:835.++0x00 line.long 0x00 "AMIDR,Alias of MIDR" rgroup.long c14:836.++0x00 line.long 0x00 "MPUTR,MPU Type Register" rgroup.long c14:837.++0x00 line.long 0x00 "MPIDR,Multiprocessor Affinity Register" group.long c14:838.++0x00 line.long 0x00 "AMIDR0,Alias of MIDR" group.long c14:839.++0x00 line.long 0x00 "AMIDR1,Alias of MIDR" rgroup.long c14:840.++0x00 line.long 0x00 "ID_PFR0,Processor Feature Register 0" bitfld.long 0x00 12.--15. " STATE3 ,Thumb-2 Execution Environment (Thumb-2EE) Support" "Reserved,Supported,?..." bitfld.long 0x00 8.--11. " STATE2 ,Java Extension Interface Support" "Not supported,?..." textline " " bitfld.long 0x00 4.--7. " STATE1 ,Thumb Encoding Supported by the Processor Type" "Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 0.--3. " STATE0 ,ARM Instruction Set Support" "Reserved,Supported,?..." rgroup.long c14:841.++0x00 line.long 0x00 "ID_PFR1,Processor Feature Register 1" bitfld.long 0x00 8.--11. " MPM ,Microcontroller Programmer's Model Support" "Supported,?..." bitfld.long 0x00 4.--7. " SE ,Security Extensions Architecture v1 Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 0.--3. " PM ,Standard ARMv4 Programmer's Model Support" "Reserved,Supported,?..." rgroup.long c14:842.++0x00 line.long 0x00 "ID_DFR0,Debug Feature Register 0" bitfld.long 0x00 20.--23. " MDM_MM ,Microcontroller Debug Model Support" "Not supported,?..." bitfld.long 0x00 16.--19. " TDM_MM ,Trace Debug Model (Memory-Mapped) Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 12.--15. " TDM_CB ,Coprocessor-Based Trace Debug Model Support" "Not supported,?..." bitfld.long 0x00 8.--11. " CDM_MM ,Memory-Mapped Debug Model Support" "Reserved,Reserved,Reserved,Reserved,Supported,?..." textline " " bitfld.long 0x00 4.--7. " SDM_CB ,Secure Debug Model (Coprocessor) Support" "Not supported,?..." bitfld.long 0x00 0.--3. " CDM_CB ,Coprocessor Debug Model Support" "Not supported,?..." rgroup.long c14:843.++0x00 line.long 0x00 "ID_AFR0,Auxiliary Feature Register 0" rgroup.long c14:844.++0x00 line.long 0x00 "ID_MMFR0,Processor Feature Register 0" bitfld.long 0x00 28.--31. " IT ,Instruction Type Support" "Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 24.--27. " FCSE ,Fast Context Switch Memory Mappings Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 20.--23. " ACR ,Auxiliary Control Register Support" "Reserved,Supported,?..." bitfld.long 0x00 16.--19. " TCM ,TCM and Associated DMA Support" "Not supported,?..." textline " " bitfld.long 0x00 12.--15. " CC_PLEA ,Cache Coherency With PLE Agent/Shared Memory Support" "Not supported,?..." bitfld.long 0x00 8.--11. " CC_CPUA ,Cache Coherency Support With CPU Agent/Shared Memory Support" "Not supported,?..." textline " " bitfld.long 0x00 4.--7. " PMSA ,Physical Memory System Architecture (PMSA) Support" "Not supported,?..." bitfld.long 0x00 0.--3. " VMSA ,Virtual Memory System Architecture (VMSA) Support" "Reserved,Reserved,Reserved,Supported,?..." rgroup.long c14:845.++0x00 line.long 0x00 "ID_MMFR1,Processor Feature Register 1" bitfld.long 0x00 28.--31. " BTB ,Branch Target Buffer Support" "Reserved,Reserved,Not required,?..." bitfld.long 0x00 24.--27. " L1TCO ,Test and Clean Operations on Data Cache/Harvard/Unified Architecture Support" "Not supported,?..." textline " " bitfld.long 0x00 20.--23. " L1UCMO ,L1 Cache/All Maintenance Operations/Unified Architecture Support" "Not supported,?..." bitfld.long 0x00 16.--19. " L1HCMO ,L1 Cache/All Maintenance Operations/Harvard Architecture Support" "Supported,?..." textline " " bitfld.long 0x00 12.--15. " L1UCLMOSW ,L1 Cache Line Maintenance Operations by Set and Way/Unified Architecture Support" "Not supported,?..." bitfld.long 0x00 8.--11. " L1HCLMOSW ,L1 Cache Line Maintenance Operations by Set and Way/Harvard Architecture Support" "Supported,?..." textline " " bitfld.long 0x00 4.--7. " L1UCLMOMVA ,L1 Cache Line Maintenance Operations by MVA/Unified Architecture Support" "Not supported,?..." bitfld.long 0x00 0.--3. " L1HCLMOMVA ,L1 Cache Line Maintenance Operations by MVA/Harvard Architecture" "Supported,?..." rgroup.long c14:846.++0x00 line.long 0x00 "ID_MMFR2,Processor Feature Register 2" bitfld.long 0x00 28.--31. " HAF ,Hardware Access Flag Support" "Not supported,?..." bitfld.long 0x00 24.--27. " WFI ,Wait for Interrupt Stalling Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 20.--23. " MBF ,Memory Barrier Operations Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 16.--19. " UTLBMO ,TLB Maintenance Operations/Unified Architecture Support" "Not supported,?..." textline " " bitfld.long 0x00 12.--15. " HTLBMO ,TLB Maintenance Operations/Harvard Architecture Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 8.--11. " HL1CMRO ,Cache Maintenance Range Operations/Harvard Architecture Support" "Not supported,?..." textline " " bitfld.long 0x00 4.--7. " HL1BPCRO ,Background Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,?..." bitfld.long 0x00 0.--3. " HL1FPCRO ,Foreground Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,?..." rgroup.long c14:847.++0x00 line.long 0x00 "ID_MMFR3,Processor Feature Register 3" bitfld.long 0x00 4.--7. " HCMOSW ,Invalidate Cache by Set and Way/Clean by Set and Way/Invalidate and Clean by Set and Way Support" "Reserved,Supported,?..." bitfld.long 0x00 0.--3. " HCMOMVA ,Invalidate Cache by MVA/Clean by MVA/Invalidate and Clean by MVA/Invalidate All Support" "Reserved,Supported,?..." rgroup.long c14:848.++0x00 line.long 0x00 "ID_ISAR0,ISA Feature Register 0" bitfld.long 0x00 24.--27. " DIVI ,Divide Instructions Support" "Not supported,?..." bitfld.long 0x00 20.--23. " DEBI ,Debug Instructions Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 16.--19. " CI ,Coprocessor Instructions Support" "Not supported,?..." bitfld.long 0x00 12.--15. " CBI ,Combined Compare and Branch Instructions Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 8.--11. " BI ,Bitfield Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 4.--7. " BCI ,Bit Counting Instructions Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 0.--3. " AI ,Atomic Load and Store Instructions Support" "Reserved,Supported,?..." rgroup.long c14:849.++0x00 line.long 0x00 "ID_ISAR1,ISA Feature Register 1" bitfld.long 0x00 28.--31. " JI ,Jazelle Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 24.--27. " INTI ,Instructions That Branch Between ARM and Thumb Code Support" "Reserved,Reserved,Supported,?..." textline " " bitfld.long 0x00 20.--23. " IMMI ,Immediate Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 16.--19. " ITEI ,If Then Instructions Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 12.--15. " EXTI ,Sign or Zero Extend Instructions Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 8.--11. " E2I ,Exception 2 Instructions Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 4.--7. " E1I ,Exception 1 Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 0.--3. " ENDI ,Endianness Control Instructions Support" "Reserved,Supported,?..." rgroup.long c14:850.++0x00 line.long 0x00 "ID_ISAR2,ISA Feature Register 2" bitfld.long 0x00 28.--31. " RI ,Reversal Instructions Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 24.--27. " PSRI ,PSR Instructions Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 20.--23. " UMI ,Advanced Unsigned Multiply Instructions Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 16.--19. " SMI ,Advanced Signed Multiply Instructions Support" "Reserved,Reserved,Reserved,Supported,?..." textline " " bitfld.long 0x00 12.--15. " MI ,Multiply Instructions Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 8.--11. " II ,Multi-Access Interruptible Instructions Support" "Supported,?..." textline " " bitfld.long 0x00 4.--7. " MHI ,Memory Hint Instructions Support" "Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 0.--3. " LSI ,Load and Store Instructions Support" "Reserved,Supported,?..." rgroup.long c14:851.++0x00 line.long 0x00 "ID_ISAR3,ISA Feature Register 3" bitfld.long 0x00 28.--31. " T2E ,Thumb-2 Extensions Support" "Reserved,Supported,?..." bitfld.long 0x00 24.--27. " NOPI ,True NOP Instructions Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 20.--23. " TCI ,Thumb Copy Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 16.--19. " TBI ,Table Branch Instructions Support" "Reserved,Reserved,Supported,?..." textline " " bitfld.long 0x00 12.--15. " SPI ,Synchronization Primitive Instructions Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 8.--11. " SWII ,SWI Instructions Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 4.--7. " SIMDI ,Single Instruction Multiple Data (SIMD) Instructions Support" "Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 0.--3. " SI ,Saturate Instructions Support" "Reserved,Supported,?..." rgroup.long c14:852.++0x00 line.long 0x00 "ID_ISAR4,ISA Feature Register 4" bitfld.long 0x00 20.--23. " EI ,Exclusive Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 16.--19. " BI ,Barrier Instructions Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 12.--15. " SMII ,SMI Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 8.--11. " WBI ,Write-Back Instructions Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 4.--7. " WSI ,With-Shift Instructions Support" "Reserved,Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 0.--3. " UI ,Unprivileged Instructions Support" "Reserved,Reserved,Supported,?..." rgroup.long c14:853.++0x00 line.long 0x00 "ID_ISAR5,ISA Feature Register 5" tree.end width 15. tree "Coresight Management Registers" group.long c14:960.++0x00 line.long 0x00 "DBGITCTRL,Integration Mode Control Register" bitfld.long 0x00 0. " INTMODE ,Processor integration mode" "Normal,Integration" group.long c14:1000.++0x00 line.long 0x00 "DBGCLAIMSET,Claim Tag Set Register" hexmask.long.byte 0x00 0.--7. 1. " CTS ,Claim tag set" group.long c14:1001.++0x00 line.long 0x00 "DBGCLAIMCLR,Claim Tag Clear Register" hexmask.long.byte 0x00 0.--7. 1. " CTC ,Claim tag clear" wgroup.long c14:1004.++0x00 line.long 0x00 "DBGLAR,Lock Access Register" rgroup.long c14:1005.++0x00 line.long 0x00 "DBGLSR,Lock Status Register" bitfld.long 0x00 2. " 32BA ,Indicate that a 32-bit access is required to write the key to the DBGLAR" "No,Yes" textline " " bitfld.long 0x00 1. " LB ,Lock bit" "Not locked,Locked" bitfld.long 0x00 0. " LIB ,Lock implemented bit" "Not locked,Locked" rgroup.long c14:1006.++0x00 line.long 0x00 "DBGAUTHSTATUS,Authentication Status Register" bitfld.long 0x00 7. " SNDFI ,Secure non-invasive debug features implemented" "Not implemented,Implemented" bitfld.long 0x00 6. " SNDFE ,Secure non-invasive debug features enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " SIDFI ,Secure invasive debug features implemented" "Not implemented,Implemented" bitfld.long 0x00 4. " SIDFE ,Secure invasive debug features enabled" "Disabled,Enabled" rgroup.long c14:1011.++0x00 line.long 0x00 "DBGDEVTYPE,Device Type Register" hexmask.long.byte 0x00 4.--7. 1. " SUBTYPE ,Subtype" hexmask.long.byte 0x00 0.--3. 1. " MAIN_CLASS ,Main class" tree.end textline " " width 12. rgroup.long c14:0.++0x0 line.long 0x0 "DBGDIDR,Debug ID Register" bitfld.long 0x0 28.--31. " WRP ,Number of Watchpoint Register Pairs" "1,2,3,4,5,6,7,8,?..." bitfld.long 0x0 24.--27. " BRP ,Number of Breakpoint Register Pairs" "1,2,3,4,5,6,7,8,?..." textline " " bitfld.long 0x0 20.--23. " CTX_CMP ,Number of BRPs with Context ID Comparison Capability" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" hexmask.long.byte 0x0 16.--19. 1. " VERSION ,Debug Architecture Version" textline " " bitfld.long 0x0 15. " DEVID ,Debug Device ID" "Low,High" bitfld.long 0x0 14. " NSUHD ,Secure User halting debug-mode" "Low,High" textline " " bitfld.long 0x0 13. " PCSR ,PC Sample register implemented" "Low,High" bitfld.long 0x0 12. " SE ,Security Extensions implemented" "Low,High" textline " " hexmask.long.byte 0x0 4.--7. 1. " VARIANT ,Implementation-defined Variant Number" hexmask.long.byte 0x0 0.--3. 1. " REVISION ,Implementation-defined Revision Number" group.long c14:34.++0x0 line.long 0x00 "DBGDSCREXT,Debug Status and Control Register" bitfld.long 0x00 30. " RXFULL ,DBGDTRRX Register full" "Empty,Full" bitfld.long 0x00 29. " TXFULL ,DBGDTRTX Register full" "Empty,Full" textline " " bitfld.long 0x00 25. " PIPEADV ,PIPEADV Processor Idle flag" "Not idle,Idle" bitfld.long 0x00 24. " INSTRCOMPL_L ,Latched instruction complete" "Not completed,Completed" textline " " bitfld.long 0x00 20.--21. " EXTDCCMODE ,External DCC access mode field" "Non-blocking,Stall,Fast,?..." bitfld.long 0x00 19. " ADADISCARD ,Asynchronous Data Aborts Discarded bit" "Normal,Abort" bitfld.long 0x00 18. " NS ,Non-secure status bit" "Secure,Non-secure" textline " " bitfld.long 0x00 17. " SPNIDDIS ,Secure Privileged Non-Invasive Debug Disable" "No,Yes" bitfld.long 0x00 16. " SPIDDIS ,Secure Privileged Invasive Debug Disable" "No,Yes" bitfld.long 0x00 15. " MDBGEN ,Monitor debug-mode enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " HDBGEN ,Halting debug-mode" "Disabled,Enabled" bitfld.long 0x00 13. " ITREN ,Execute ARM instruction enable" "Disabled,Enabled" bitfld.long 0x00 12. " UDCCDIS ,User mode access to Communications Channel disable" "No,Yes" textline " " bitfld.long 0x00 11. " INTDIS ,Interrupt disable" "No,Yes" bitfld.long 0x00 10. " DBGACK ,Force debug acknowledge" "Normal,Forced" textline " " bitfld.long 0x00 8. " UND_L ,Sticky undefined bit" "Not occurred,Occurred" bitfld.long 0x00 7. " ADABORT ,Asynchronous data abort" "Not aborted,Aborted" bitfld.long 0x00 6. " SDABORT ,Synchronous data abort" "Not aborted,Aborted" textline " " bitfld.long 0x00 2.--5. " MOE ,Method of debug entry field" "Halt Request,Breakpoint,Reserved,BKPT Instruction,External Debug Request,Reserved,Reserved,Reserved,Reserved,Reserved,Synchronous Watchpoint,?..." bitfld.long 0x00 1. " RESTARTED ,Processor restarted" "Pending,Exited" bitfld.long 0x00 0. " HALTED ,Processor halted" "Non-debug,Debug" group.long c14:0x7++0x0 line.long 0x00 "DBGVCR,Debug Vector Catch register" bitfld.long 0x00 7. " FIQVCE_S ,FIQ vector catch in Secure state" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " IRQVCE_S ,IRQ vector catch in Secure state" "Disabled,Enabled" bitfld.long 0x00 4. " DAVCE_S ,Data Abort vector catch in Secure state" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " PAVCE_S ,Prefetch Abort vector catch in Secure state" "Disabled,Enabled" bitfld.long 0x00 2. " SVCVCE_S ,SVC vector catch in Secure state" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " UIVCE_S ,Undefined instruction vector catch in Secure state" "Disabled,Enabled" bitfld.long 0x00 0. " RVCE ,Reset vector catch enable" "Disabled,Enabled" hgroup.long c14:32.++0x0 hide.long 0x00 "DTRRX,Target -> Host Data Transfer Register" in group.long c14:35.++0x00 line.long 0x0 "DTRTX,Host -> Target Data Transfer Register" hexmask.long 0x00 0.--31. 1. " HTD ,Host -> target data" group.long c14:10.++0x0 line.long 0x00 "DBGDSCCR,Debug State Cache Control Register" bitfld.long 0x00 2. " NWT ,Write through disable" "No,Yes" bitfld.long 0x00 1. " NIL ,L1 instruction cache line-fills disable" "No,Yes" textline " " bitfld.long 0x00 0. " NDL ,L1 data cache line-fills disable" "No,Yes" wgroup.long c14:33.++0x0 line.long 0x00 "DBGITR,Instruction Transfer Register" wgroup.long c14:36.++0x0 line.long 0x00 "DBGDRCR,Debug Run Control Register" bitfld.long 0x00 4. " CMR ,Cancel memory requests" "Not cancel,Cancel" bitfld.long 0x00 3. " CSPA ,Clear Sticky Pipeline Advance bit" "No effect,Clear" textline " " bitfld.long 0x00 2. " CSE ,Clear Sticky Exceptions bits" "No effect,Clear" bitfld.long 0x00 1. " RR ,Restart request" "No effect,Restart" textline " " bitfld.long 0x00 0. " HR ,Halt request" "No effect,Halt" textline " " rgroup.long c14:193.++0x0 line.long 0x00 "DBGOSLSR,Operating System Lock Status Register" bitfld.long 0x00 1. " LOCK_IMP_BIT ,Indicate whether the OS lock functionality is implemented" "Not implemented,Implemented" group.long c14:196.++0x0 line.long 0x00 "DBGPRCR,Device Power-down and Reset Control Register" bitfld.long 0x00 2. " HCWR ,Hold core warm reset" "Not held,Held" textline " " bitfld.long 0x00 1. " CWRR ,Reset reguest" "Not requested,Requested" bitfld.long 0x00 0. " CORENPDRQ ,Core no powerdown request" "Power-down,Emulate" rgroup.long c14:197.++0x0 line.long 0x00 "DBGPRSR,Device Power-down and Reset Status Register" bitfld.long 0x00 3. " SR ,Sticky Reset Status" "Not reset,Reset" bitfld.long 0x00 2. " R ,Reset Status" "No reset,Reset" textline " " bitfld.long 0x00 1. " SPD ,Sticky Power-down Status" "Not reset,Reset" bitfld.long 0x00 0. " PU ,Power-up Status" "Powered down,Powered up" tree.end width 7. tree "Breakpoint Registers" group.long c14:64.++0x0 line.long 0x00 "BVR0,Breakpoint Value 0 Register" hexmask.long 0x00 0.--31. 1. " BV0 ,Breakpoint Value 0" group.long c14:80.++0x0 line.long 0x00 "BCR0,Breakpoint Control 0 Register" bitfld.long 0x00 24.--28. " BAM ,Breakpoint Address Mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x00 20.--22. " M ,BVR Meaning" "IVA match,Linked IVA match,Unlinked ID,Linked ID,IVA mismatch,Linked IVA mismatch,?..." bitfld.long 0x00 16.--19. " LBRP ,Linked BRP Number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" bitfld.long 0x00 14.--15. " SWAC ,Secure World Access Control" "Both,Nonsecure,Secure,?..." textline " " bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" bitfld.long 0x00 1.--2. " S ,Supervisor Access Control" "User/system/supervisor,Privileged,User,Any" bitfld.long 0x00 0. " B ,Breakpoint Enable" "Disabled,Enabled" group.long c14:65.++0x0 line.long 0x00 "BVR1,Breakpoint Value 1 Register" hexmask.long 0x00 0.--31. 1. " BV1 ,Breakpoint Value 1" group.long c14:81.++0x0 line.long 0x00 "BCR1,Breakpoint Control 1 Register" bitfld.long 0x00 24.--28. " BAM ,Breakpoint Address Mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x00 20.--22. " M ,BVR Meaning" "IVA match,Linked IVA match,Unlinked ID,Linked ID,IVA mismatch,Linked IVA mismatch,?..." bitfld.long 0x00 16.--19. " LBRP ,Linked BRP Number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" bitfld.long 0x00 14.--15. " SWAC ,Secure World Access Control" "Both,Nonsecure,Secure,?..." textline " " bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" bitfld.long 0x00 1.--2. " S ,Supervisor Access Control" "User/system/supervisor,Privileged,User,Any" bitfld.long 0x00 0. " B ,Breakpoint Enable" "Disabled,Enabled" group.long c14:66.++0x0 line.long 0x00 "BVR2,Breakpoint Value 2 Register" hexmask.long 0x00 0.--31. 1. " BV2 ,Breakpoint Value 2" group.long c14:82.++0x0 line.long 0x00 "BCR2,Breakpoint Control 2 Register" bitfld.long 0x00 24.--28. " BAM ,Breakpoint Address Mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x00 20.--22. " M ,BVR Meaning" "IVA match,Linked IVA match,Unlinked ID,Linked ID,IVA mismatch,Linked IVA mismatch,?..." bitfld.long 0x00 16.--19. " LBRP ,Linked BRP Number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" bitfld.long 0x00 14.--15. " SWAC ,Secure World Access Control" "Both,Nonsecure,Secure,?..." textline " " bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" bitfld.long 0x00 1.--2. " S ,Supervisor Access Control" "User/system/supervisor,Privileged,User,Any" bitfld.long 0x00 0. " B ,Breakpoint Enable" "Disabled,Enabled" group.long c14:67.++0x0 line.long 0x00 "BVR3,Breakpoint Value 3 Register" hexmask.long 0x00 0.--31. 1. " BV3 ,Breakpoint Value 3" group.long c14:83.++0x0 line.long 0x00 "BCR3,Breakpoint Control 3 Register" bitfld.long 0x00 24.--28. " BAM ,Breakpoint Address Mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x00 20.--22. " M ,BVR Meaning" "IVA match,Linked IVA match,Unlinked ID,Linked ID,IVA mismatch,Linked IVA mismatch,?..." bitfld.long 0x00 16.--19. " LBRP ,Linked BRP Number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" bitfld.long 0x00 14.--15. " SWAC ,Secure World Access Control" "Both,Nonsecure,Secure,?..." textline " " bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" bitfld.long 0x00 1.--2. " S ,Supervisor Access Control" "User/system/supervisor,Privileged,User,Any" bitfld.long 0x00 0. " B ,Breakpoint Enable" "Disabled,Enabled" group.long c14:68.++0x0 line.long 0x00 "BVR4,Breakpoint Value 4 Register" hexmask.long 0x00 0.--31. 1. " BV4 ,Breakpoint Value 4" group.long c14:84.++0x0 line.long 0x00 "BCR4,Breakpoint Control 4 Register" bitfld.long 0x00 24.--28. " BAM ,Breakpoint Address Mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x00 20.--22. " M ,BVR Meaning" "IVA match,Linked IVA match,Unlinked ID,Linked ID,IVA mismatch,Linked IVA mismatch,?..." bitfld.long 0x00 16.--19. " LBRP ,Linked BRP Number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" bitfld.long 0x00 14.--15. " SWAC ,Secure World Access Control" "Both,Nonsecure,Secure,?..." textline " " bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" bitfld.long 0x00 1.--2. " S ,Supervisor Access Control" "User/system/supervisor,Privileged,User,Any" bitfld.long 0x00 0. " B ,Breakpoint Enable" "Disabled,Enabled" group.long c14:69.++0x0 line.long 0x00 "BVR5,Breakpoint Value 5 Register" hexmask.long 0x00 0.--31. 1. " BV5 ,Breakpoint Value 5" group.long c14:85.++0x0 line.long 0x00 "BCR5,Breakpoint Control 5 Register" bitfld.long 0x00 24.--28. " BAM ,Breakpoint Address Mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x00 20.--22. " M ,BVR Meaning" "IVA match,Linked IVA match,Unlinked ID,Linked ID,IVA mismatch,Linked IVA mismatch,?..." bitfld.long 0x00 16.--19. " LBRP ,Linked BRP Number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" bitfld.long 0x00 14.--15. " SWAC ,Secure World Access Control" "Both,Nonsecure,Secure,?..." textline " " bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" bitfld.long 0x00 1.--2. " S ,Supervisor Access Control" "User/system/supervisor,Privileged,User,Any" bitfld.long 0x00 0. " B ,Breakpoint Enable" "Disabled,Enabled" group.long c14:70.++0x0 line.long 0x00 "BVR6,Breakpoint Value 6 Register" hexmask.long 0x00 0.--31. 1. " BV6 ,Breakpoint Value 6" group.long c14:86.++0x0 line.long 0x00 "BCR6,Breakpoint Control 6 Register" bitfld.long 0x00 24.--28. " BAM ,Breakpoint Address Mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x00 20.--22. " M ,BVR Meaning" "IVA match,Linked IVA match,Unlinked ID,Linked ID,IVA mismatch,Linked IVA mismatch,?..." bitfld.long 0x00 16.--19. " LBRP ,Linked BRP Number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" bitfld.long 0x00 14.--15. " SWAC ,Secure World Access Control" "Both,Nonsecure,Secure,?..." textline " " bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" bitfld.long 0x00 1.--2. " S ,Supervisor Access Control" "User/system/supervisor,Privileged,User,Any" bitfld.long 0x00 0. " B ,Breakpoint Enable" "Disabled,Enabled" group.long c14:71.++0x0 line.long 0x00 "BVR7,Breakpoint Value 7 Register" hexmask.long 0x00 0.--31. 1. " BV7 ,Breakpoint Value 7" group.long c14:87.++0x0 line.long 0x00 "BCR7,Breakpoint Control 7 Register" bitfld.long 0x00 24.--28. " BAM ,Breakpoint Address Mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x00 20.--22. " M ,BVR Meaning" "IVA match,Linked IVA match,Unlinked ID,Linked ID,IVA mismatch,Linked IVA mismatch,?..." bitfld.long 0x00 16.--19. " LBRP ,Linked BRP Number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" bitfld.long 0x00 14.--15. " SWAC ,Secure World Access Control" "Both,Nonsecure,Secure,?..." textline " " bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" bitfld.long 0x00 1.--2. " S ,Supervisor Access Control" "User/system/supervisor,Privileged,User,Any" bitfld.long 0x00 0. " B ,Breakpoint Enable" "Disabled,Enabled" tree.end tree "Watchpoint Control Registers" group.long c14:96.++0x0 line.long 0x00 "WVR0,Watchpoint Value 0 Register" hexmask.long 0x00 2.--31. 0x04 " WA0 ,Watchpoint Address 0" group.long c14:112.++0x0 line.long 0x00 "WCR0,Watchpoint Control 0 Register" bitfld.long 0x0 24.--28. " WAM ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x0 20. " EL ,Enable Linking" "Disabled,Enabled" textline " " bitfld.long 0x0 16.--19. " LBN ,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" bitfld.long 0x0 14.--15. " SWAC ,Secure world access control" "Non-secure & Secure,Non-secure,Secure,?..." textline " " bitfld.long 0x0 12. " BAS ,Byte 7 address select" "0,1" bitfld.long 0x0 11. ",Byte 6 address select" "0,1" bitfld.long 0x0 10. ",Byte 5 address select" "0,1" bitfld.long 0x0 9. ",Byte 4 address select" "0,1" bitfld.long 0x0 8. ",Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" textline " " bitfld.long 0x0 3.--4. " RD/WR ,Load/Store access control" "Reserved,Load,Store,Any" bitfld.long 0x0 1.--2. " PAC ,Privileged access control" "Reserved,Privileged,USR,Any" textline " " bitfld.long 0x0 0. " WE ,Watchpoint enable" "Disabled,Enabled" group.long c14:97.++0x0 line.long 0x00 "WVR1,Watchpoint Value 1 Register" hexmask.long 0x00 2.--31. 0x04 " WA0 ,Watchpoint Address 0" group.long c14:113.++0x0 line.long 0x00 "WCR1,Watchpoint Control 1 Register" bitfld.long 0x0 24.--28. " WAM ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x0 20. " EL ,Enable Linking" "Disabled,Enabled" textline " " bitfld.long 0x0 16.--19. " LBN ,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" bitfld.long 0x0 14.--15. " SWAC ,Secure world access control" "Non-secure & Secure,Non-secure,Secure,?..." textline " " bitfld.long 0x0 12. " BAS ,Byte 7 address select" "0,1" bitfld.long 0x0 11. ",Byte 6 address select" "0,1" bitfld.long 0x0 10. ",Byte 5 address select" "0,1" bitfld.long 0x0 9. ",Byte 4 address select" "0,1" bitfld.long 0x0 8. ",Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" textline " " bitfld.long 0x0 3.--4. " RD/WR ,Load/Store access control" "Reserved,Load,Store,Any" bitfld.long 0x0 1.--2. " PAC ,Privileged access control" "Reserved,Privileged,USR,Any" textline " " bitfld.long 0x0 0. " WE ,Watchpoint enable" "Disabled,Enabled" group.long c14:98.++0x0 line.long 0x00 "WVR2,Watchpoint Value 2 Register" hexmask.long 0x00 2.--31. 0x04 " WA0 ,Watchpoint Address 0" group.long c14:114.++0x0 line.long 0x00 "WCR2,Watchpoint Control 2 Register" bitfld.long 0x0 24.--28. " WAM ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x0 20. " EL ,Enable Linking" "Disabled,Enabled" textline " " bitfld.long 0x0 16.--19. " LBN ,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" bitfld.long 0x0 14.--15. " SWAC ,Secure world access control" "Non-secure & Secure,Non-secure,Secure,?..." textline " " bitfld.long 0x0 12. " BAS ,Byte 7 address select" "0,1" bitfld.long 0x0 11. ",Byte 6 address select" "0,1" bitfld.long 0x0 10. ",Byte 5 address select" "0,1" bitfld.long 0x0 9. ",Byte 4 address select" "0,1" bitfld.long 0x0 8. ",Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" textline " " bitfld.long 0x0 3.--4. " RD/WR ,Load/Store access control" "Reserved,Load,Store,Any" bitfld.long 0x0 1.--2. " PAC ,Privileged access control" "Reserved,Privileged,USR,Any" textline " " bitfld.long 0x0 0. " WE ,Watchpoint enable" "Disabled,Enabled" group.long c14:99.++0x0 line.long 0x00 "WVR3,Watchpoint Value 3 Register" hexmask.long 0x00 2.--31. 0x04 " WA0 ,Watchpoint Address 0" group.long c14:115.++0x0 line.long 0x00 "WCR3,Watchpoint Control 3 Register" bitfld.long 0x0 24.--28. " WAM ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x0 20. " EL ,Enable Linking" "Disabled,Enabled" textline " " bitfld.long 0x0 16.--19. " LBN ,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" bitfld.long 0x0 14.--15. " SWAC ,Secure world access control" "Non-secure & Secure,Non-secure,Secure,?..." textline " " bitfld.long 0x0 12. " BAS ,Byte 7 address select" "0,1" bitfld.long 0x0 11. ",Byte 6 address select" "0,1" bitfld.long 0x0 10. ",Byte 5 address select" "0,1" bitfld.long 0x0 9. ",Byte 4 address select" "0,1" bitfld.long 0x0 8. ",Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" textline " " bitfld.long 0x0 3.--4. " RD/WR ,Load/Store access control" "Reserved,Load,Store,Any" bitfld.long 0x0 1.--2. " PAC ,Privileged access control" "Reserved,Privileged,USR,Any" textline " " bitfld.long 0x0 0. " WE ,Watchpoint enable" "Disabled,Enabled" group.long c14:100.++0x0 line.long 0x00 "WVR4,Watchpoint Value 4 Register" hexmask.long 0x00 2.--31. 0x04 " WA0 ,Watchpoint Address 0" group.long c14:116.++0x0 line.long 0x00 "WCR4,Watchpoint Control 4 Register" bitfld.long 0x0 24.--28. " WAM ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x0 20. " EL ,Enable Linking" "Disabled,Enabled" textline " " bitfld.long 0x0 16.--19. " LBN ,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" bitfld.long 0x0 14.--15. " SWAC ,Secure world access control" "Non-secure & Secure,Non-secure,Secure,?..." textline " " bitfld.long 0x0 12. " BAS ,Byte 7 address select" "0,1" bitfld.long 0x0 11. ",Byte 6 address select" "0,1" bitfld.long 0x0 10. ",Byte 5 address select" "0,1" bitfld.long 0x0 9. ",Byte 4 address select" "0,1" bitfld.long 0x0 8. ",Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" textline " " bitfld.long 0x0 3.--4. " RD/WR ,Load/Store access control" "Reserved,Load,Store,Any" bitfld.long 0x0 1.--2. " PAC ,Privileged access control" "Reserved,Privileged,USR,Any" textline " " bitfld.long 0x0 0. " WE ,Watchpoint enable" "Disabled,Enabled" group.long c14:101.++0x0 line.long 0x00 "WVR5,Watchpoint Value 5 Register" hexmask.long 0x00 2.--31. 0x04 " WA0 ,Watchpoint Address 0" group.long c14:117.++0x0 line.long 0x00 "WCR5,Watchpoint Control 5 Register" bitfld.long 0x0 24.--28. " WAM ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x0 20. " EL ,Enable Linking" "Disabled,Enabled" textline " " bitfld.long 0x0 16.--19. " LBN ,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" bitfld.long 0x0 14.--15. " SWAC ,Secure world access control" "Non-secure & Secure,Non-secure,Secure,?..." textline " " bitfld.long 0x0 12. " BAS ,Byte 7 address select" "0,1" bitfld.long 0x0 11. ",Byte 6 address select" "0,1" bitfld.long 0x0 10. ",Byte 5 address select" "0,1" bitfld.long 0x0 9. ",Byte 4 address select" "0,1" bitfld.long 0x0 8. ",Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" textline " " bitfld.long 0x0 3.--4. " RD/WR ,Load/Store access control" "Reserved,Load,Store,Any" bitfld.long 0x0 1.--2. " PAC ,Privileged access control" "Reserved,Privileged,USR,Any" textline " " bitfld.long 0x0 0. " WE ,Watchpoint enable" "Disabled,Enabled" group.long c14:102.++0x0 line.long 0x00 "WVR6,Watchpoint Value 6 Register" hexmask.long 0x00 2.--31. 0x04 " WA0 ,Watchpoint Address 0" group.long c14:118.++0x0 line.long 0x00 "WCR6,Watchpoint Control 6 Register" bitfld.long 0x0 24.--28. " WAM ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x0 20. " EL ,Enable Linking" "Disabled,Enabled" textline " " bitfld.long 0x0 16.--19. " LBN ,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" bitfld.long 0x0 14.--15. " SWAC ,Secure world access control" "Non-secure & Secure,Non-secure,Secure,?..." textline " " bitfld.long 0x0 12. " BAS ,Byte 7 address select" "0,1" bitfld.long 0x0 11. ",Byte 6 address select" "0,1" bitfld.long 0x0 10. ",Byte 5 address select" "0,1" bitfld.long 0x0 9. ",Byte 4 address select" "0,1" bitfld.long 0x0 8. ",Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" textline " " bitfld.long 0x0 3.--4. " RD/WR ,Load/Store access control" "Reserved,Load,Store,Any" bitfld.long 0x0 1.--2. " PAC ,Privileged access control" "Reserved,Privileged,USR,Any" textline " " bitfld.long 0x0 0. " WE ,Watchpoint enable" "Disabled,Enabled" group.long c14:103.++0x0 line.long 0x00 "WVR7,Watchpoint Value 7 Register" hexmask.long 0x00 2.--31. 0x04 " WA0 ,Watchpoint Address 0" group.long c14:119.++0x0 line.long 0x00 "WCR7,Watchpoint Control 7 Register" bitfld.long 0x0 24.--28. " WAM ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x0 20. " EL ,Enable Linking" "Disabled,Enabled" textline " " bitfld.long 0x0 16.--19. " LBN ,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" bitfld.long 0x0 14.--15. " SWAC ,Secure world access control" "Non-secure & Secure,Non-secure,Secure,?..." textline " " bitfld.long 0x0 12. " BAS ,Byte 7 address select" "0,1" bitfld.long 0x0 11. ",Byte 6 address select" "0,1" bitfld.long 0x0 10. ",Byte 5 address select" "0,1" bitfld.long 0x0 9. ",Byte 4 address select" "0,1" bitfld.long 0x0 8. ",Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" textline " " bitfld.long 0x0 3.--4. " RD/WR ,Load/Store access control" "Reserved,Load,Store,Any" bitfld.long 0x0 1.--2. " PAC ,Privileged access control" "Reserved,Privileged,USR,Any" textline " " bitfld.long 0x0 0. " WE ,Watchpoint enable" "Disabled,Enabled" group.long c14:6.++0x0 line.long 0x00 "WFAR ,Watchpoint Fault Address Register" hexmask.long 0x00 1.--31. 0x2 " WFAR ,Address of the watchpointed instruction" tree.end width 11. AUTOINDENT.POP tree.open "Interrupt Controller (PL-390)" width 17. base AD:0xF9000000 tree "Distributor Interface" if (((per.l(AD:0xF9000000+0x04))&0x400)==0x400) if PER.ADDRESS.isSECUREEX(AD:0xF9000000) group.long 0x0000++0x03 line.long 0x00 "GICD_CTLR,Distributor Control Register (Secure access)" bitfld.long 0x00 1. " ENABLEGRP1 ,Global Interrupt Enable Group 1" "Disabled,Enabled" bitfld.long 0x00 0. " ENABLEGRP0 ,Global Interrupt Enable Group 1" "Disabled,Enabled" else group.long 0x0000++0x03 line.long 0x00 "GICD_CTLR,Distributor Control Register (Non-secure access)" bitfld.long 0x00 0. " ENABLE ,Global enable for forwarding pending interrupts from the Distributor to the CPU interfaces" "Disabled,Enabled" endif else group.long 0x0000++0x03 line.long 0x00 "GICD_CTLR,Distributor Control Register" bitfld.long 0x00 0. " ENABLE ,Global enable for forwarding pending interrupts from the Distributor to the CPU interfaces" "Disabled,Enabled" endif if (((per.l(AD:0xF9000000+0x04))&0x400)==0x400) rgroup.long 0x0004++0x03 line.long 0x00 "GICD_TYPER,Interrupt Controller Type Register" bitfld.long 0x00 11.--15. " LSPI ,Locable Shared Peripheral Interrupts" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 10. " SECURITYEXTN ,Indicate whether interrupt controller implements the security extensions" "Not implemented,Implemented" textline " " bitfld.long 0x00 5.--7. " CPUNUMBER ,Indicates the number of implemented CPU interfaces" "1,2,3,4,?..." bitfld.long 0x00 0.--4. " ITLN ,Indicates the number of interrupts that the interrupt controller supports" "Up to 32,Up to 64,Up to 96,Up to 128,Up to 160,Up to 192,Up to 224,Up to 256,Up to 288,Up to 320,Up to 352,Up to 384,Up to 416,Up to 448,Up to 480,Up to 512,Up to 544,Up to 576,Up to 608,Up to 640,Up to 672,Up to 704,Up to 736,Up to 768,Up to 800,Up to 832,Up to 864,Up to 896,Up to 928,Up to 960,Up to 992,Up to 1020" else rgroup.long 0x0004++0x03 line.long 0x00 "GICD_TYPER,Interrupt Controller Type Register" bitfld.long 0x00 10. " SECURITYEXTN ,Indicates whether interrupt controller implements the security extensions" "Not implemented,Implemented" textline " " bitfld.long 0x00 5.--7. " CPUNUMBER ,Indicates the number of implemented CPU interfaces" "1,2,3,4,?..." bitfld.long 0x00 0.--4. " ITLN ,Indicates the number of interrupts that the interrupt controller supports" "Up to 32,Up to 64,Up to 96,Up to 128,Up to 160,Up to 192,Up to 224,Up to 256,Up to 288,Up to 320,Up to 352,Up to 384,Up to 416,Up to 448,Up to 480,Up to 512,Up to 544,Up to 576,Up to 608,Up to 640,Up to 672,Up to 704,Up to 736,Up to 768,Up to 800,Up to 832,Up to 864,Up to 896,Up to 928,Up to 960,Up to 992,Up to 1020" endif rgroup.long 0x0008++0x03 line.long 0x00 "GICD_IIDR,Distributor Implementer Identification Register" bitfld.long 0x00 24.--31. " PRODID ,Indicates the product ID" "PL390,PL390,GIC400,GIC400,?..." hexmask.long.word 0x00 12.--23. 1. " REV_NUM ,Returns the revision number of the GIC" textline " " hexmask.long.word 0x00 0.--11. 1. " IMP ,Implementer" sif CPU.FEATURE(hypervisor)||CPU.FEATURE(secure) width 17. tree "Group/Security Registers" if PER.ADDRESS.isSECUREEX(AD:0xF9000000+0x0080) group.long 0x0080++0x03 line.long 0x0 "GICD_IGROUPR0,Interrupt Group Register 0 (Secure Access)" bitfld.long 0x00 31. " GSB31 ,Group Status Bit 31" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB30 ,Group Status Bit 30" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB29 ,Group Status Bit 29" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB28 ,Group Status Bit 28" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB27 ,Group Status Bit 27" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB26 ,Group Status Bit 26" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB25 ,Group Status Bit 25" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB24 ,Group Status Bit 24" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB23 ,Group Status Bit 23" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB22 ,Group Status Bit 22" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB21 ,Group Status Bit 21" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB20 ,Group Status Bit 20" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB19 ,Group Status Bit 19" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB18 ,Group Status Bit 18" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB17 ,Group Status Bit 17" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB16 ,Group Status Bit 16" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB15 ,Group Status Bit 15" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB14 ,Group Status Bit 14" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB13 ,Group Status Bit 13" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB12 ,Group Status Bit 12" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB11 ,Group Status Bit 11" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB10 ,Group Status Bit 10" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB9 ,Group Status Bit 9" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB8 ,Group Status Bit 8" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB7 ,Group Status Bit 7" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB6 ,Group Status Bit 6" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB5 ,Group Status Bit 5" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB4 ,Group Status Bit 4" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB3 ,Group Status Bit 3" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB2 ,Group Status Bit 2" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB1 ,Group Status Bit 1" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB0 ,Group Status Bit 0" "Group 0 (Secure),Group 1 (Non-secure)" else group.long 0x0080++0x03 line.long 0x0 "GICD_IGROUPR0,Interrupt Group Register 0 (Non-secure access)" bitfld.long 0x00 31. " GSB31 ,Group Status Bit 31" "Group 0,Group 1" bitfld.long 0x00 30. " GSB30 ,Group Status Bit 30" "Group 0,Group 1" bitfld.long 0x00 29. " GSB29 ,Group Status Bit 29" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB28 ,Group Status Bit 28" "Group 0,Group 1" bitfld.long 0x00 27. " GSB27 ,Group Status Bit 27" "Group 0,Group 1" bitfld.long 0x00 26. " GSB26 ,Group Status Bit 26" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB25 ,Group Status Bit 25" "Group 0,Group 1" bitfld.long 0x00 24. " GSB24 ,Group Status Bit 24" "Group 0,Group 1" bitfld.long 0x00 23. " GSB23 ,Group Status Bit 23" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB22 ,Group Status Bit 22" "Group 0,Group 1" bitfld.long 0x00 21. " GSB21 ,Group Status Bit 21" "Group 0,Group 1" bitfld.long 0x00 20. " GSB20 ,Group Status Bit 20" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB19 ,Group Status Bit 19" "Group 0,Group 1" bitfld.long 0x00 18. " GSB18 ,Group Status Bit 18" "Group 0,Group 1" bitfld.long 0x00 17. " GSB17 ,Group Status Bit 17" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB16 ,Group Status Bit 16" "Group 0,Group 1" bitfld.long 0x00 15. " GSB15 ,Group Status Bit 15" "Group 0,Group 1" bitfld.long 0x00 14. " GSB14 ,Group Status Bit 14" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB13 ,Group Status Bit 13" "Group 0,Group 1" bitfld.long 0x00 12. " GSB12 ,Group Status Bit 12" "Group 0,Group 1" bitfld.long 0x00 11. " GSB11 ,Group Status Bit 11" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB10 ,Group Status Bit 10" "Group 0,Group 1" bitfld.long 0x00 9. " GSB9 ,Group Status Bit 9" "Group 0,Group 1" bitfld.long 0x00 8. " GSB8 ,Group Status Bit 8" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB7 ,Group Status Bit 7" "Group 0,Group 1" bitfld.long 0x00 6. " GSB6 ,Group Status Bit 6" "Group 0,Group 1" bitfld.long 0x00 5. " GSB5 ,Group Status Bit 5" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB4 ,Group Status Bit 4" "Group 0,Group 1" bitfld.long 0x00 3. " GSB3 ,Group Status Bit 3" "Group 0,Group 1" bitfld.long 0x00 2. " GSB2 ,Group Status Bit 2" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB1 ,Group Status Bit 1" "Group 0,Group 1" bitfld.long 0x00 0. " GSB0 ,Group Status Bit 0" "Group 0,Group 1" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x01)&&(PER.ADDRESS.isSECUREEX(AD:0xF9000000+0x0084)) group.long 0x0084++0x03 line.long 0x0 "GICD_IGROUPR1,Interrupt Group Register 1 (Secure Access)" bitfld.long 0x00 31. " GSB63 ,Group Status Bit 63" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB62 ,Group Status Bit 62" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB61 ,Group Status Bit 61" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB60 ,Group Status Bit 60" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB59 ,Group Status Bit 59" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB58 ,Group Status Bit 58" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB57 ,Group Status Bit 57" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB56 ,Group Status Bit 56" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB55 ,Group Status Bit 55" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB54 ,Group Status Bit 54" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB53 ,Group Status Bit 53" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB52 ,Group Status Bit 52" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB51 ,Group Status Bit 51" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB50 ,Group Status Bit 50" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB49 ,Group Status Bit 49" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB48 ,Group Status Bit 48" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB47 ,Group Status Bit 47" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB46 ,Group Status Bit 46" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB45 ,Group Status Bit 45" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB44 ,Group Status Bit 44" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB43 ,Group Status Bit 43" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB42 ,Group Status Bit 42" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB41 ,Group Status Bit 41" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB40 ,Group Status Bit 40" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB39 ,Group Status Bit 39" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB38 ,Group Status Bit 38" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB37 ,Group Status Bit 37" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB36 ,Group Status Bit 36" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB35 ,Group Status Bit 35" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB34 ,Group Status Bit 34" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB33 ,Group Status Bit 33" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB32 ,Group Status Bit 32" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x01) group.long 0x0084++0x03 line.long 0x0 "GICD_IGROUPR1,Interrupt Group Register 1 (Non-secure access)" bitfld.long 0x00 31. " GSB63 ,Group Status Bit 63" "Group 0,Group 1" bitfld.long 0x00 30. " GSB62 ,Group Status Bit 62" "Group 0,Group 1" bitfld.long 0x00 29. " GSB61 ,Group Status Bit 61" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB60 ,Group Status Bit 60" "Group 0,Group 1" bitfld.long 0x00 27. " GSB59 ,Group Status Bit 59" "Group 0,Group 1" bitfld.long 0x00 26. " GSB58 ,Group Status Bit 58" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB57 ,Group Status Bit 57" "Group 0,Group 1" bitfld.long 0x00 24. " GSB56 ,Group Status Bit 56" "Group 0,Group 1" bitfld.long 0x00 23. " GSB55 ,Group Status Bit 55" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB54 ,Group Status Bit 54" "Group 0,Group 1" bitfld.long 0x00 21. " GSB53 ,Group Status Bit 53" "Group 0,Group 1" bitfld.long 0x00 20. " GSB52 ,Group Status Bit 52" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB51 ,Group Status Bit 51" "Group 0,Group 1" bitfld.long 0x00 18. " GSB50 ,Group Status Bit 50" "Group 0,Group 1" bitfld.long 0x00 17. " GSB49 ,Group Status Bit 49" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB48 ,Group Status Bit 48" "Group 0,Group 1" bitfld.long 0x00 15. " GSB47 ,Group Status Bit 47" "Group 0,Group 1" bitfld.long 0x00 14. " GSB46 ,Group Status Bit 46" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB45 ,Group Status Bit 45" "Group 0,Group 1" bitfld.long 0x00 12. " GSB44 ,Group Status Bit 44" "Group 0,Group 1" bitfld.long 0x00 11. " GSB43 ,Group Status Bit 43" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB42 ,Group Status Bit 42" "Group 0,Group 1" bitfld.long 0x00 9. " GSB41 ,Group Status Bit 41" "Group 0,Group 1" bitfld.long 0x00 8. " GSB40 ,Group Status Bit 40" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB39 ,Group Status Bit 39" "Group 0,Group 1" bitfld.long 0x00 6. " GSB38 ,Group Status Bit 38" "Group 0,Group 1" bitfld.long 0x00 5. " GSB37 ,Group Status Bit 37" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB36 ,Group Status Bit 36" "Group 0,Group 1" bitfld.long 0x00 3. " GSB35 ,Group Status Bit 35" "Group 0,Group 1" bitfld.long 0x00 2. " GSB34 ,Group Status Bit 34" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB33 ,Group Status Bit 33" "Group 0,Group 1" bitfld.long 0x00 0. " GSB32 ,Group Status Bit 32" "Group 0,Group 1" else hgroup.long 0x0084++0x03 hide.long 0x0 "GICD_IGROUPR1,Interrupt Group Register 1" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x02)&&(PER.ADDRESS.isSECUREEX(AD:0xF9000000+0x0088)) group.long 0x0088++0x03 line.long 0x0 "GICD_IGROUPR2,Interrupt Group Register 2 (Secure access)" bitfld.long 0x00 31. " GSB95 ,Group Status Bit 95" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB94 ,Group Status Bit 94" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB93 ,Group Status Bit 93" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB92 ,Group Status Bit 92" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB91 ,Group Status Bit 91" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB90 ,Group Status Bit 90" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB89 ,Group Status Bit 89" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB88 ,Group Status Bit 88" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB87 ,Group Status Bit 87" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB86 ,Group Status Bit 86" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB85 ,Group Status Bit 85" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB84 ,Group Status Bit 84" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB83 ,Group Status Bit 83" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB82 ,Group Status Bit 82" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB81 ,Group Status Bit 81" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB80 ,Group Status Bit 80" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB79 ,Group Status Bit 79" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB78 ,Group Status Bit 78" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB77 ,Group Status Bit 77" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB76 ,Group Status Bit 76" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB75 ,Group Status Bit 75" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB74 ,Group Status Bit 74" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB73 ,Group Status Bit 73" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB72 ,Group Status Bit 72" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB71 ,Group Status Bit 71" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB70 ,Group Status Bit 70" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB69 ,Group Status Bit 69" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB68 ,Group Status Bit 68" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB67 ,Group Status Bit 67" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB66 ,Group Status Bit 66" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB65 ,Group Status Bit 65" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB64 ,Group Status Bit 64" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x02) group.long 0x0088++0x03 line.long 0x0 "GICD_IGROUPR2,Interrupt Group Register 2 (Non-secure access)" bitfld.long 0x00 31. " GSB95 ,Group Status Bit 95" "Group 0,Group 1" bitfld.long 0x00 30. " GSB94 ,Group Status Bit 94" "Group 0,Group 1" bitfld.long 0x00 29. " GSB93 ,Group Status Bit 93" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB92 ,Group Status Bit 92" "Group 0,Group 1" bitfld.long 0x00 27. " GSB91 ,Group Status Bit 91" "Group 0,Group 1" bitfld.long 0x00 26. " GSB90 ,Group Status Bit 90" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB89 ,Group Status Bit 89" "Group 0,Group 1" bitfld.long 0x00 24. " GSB88 ,Group Status Bit 88" "Group 0,Group 1" bitfld.long 0x00 23. " GSB87 ,Group Status Bit 87" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB86 ,Group Status Bit 86" "Group 0,Group 1" bitfld.long 0x00 21. " GSB85 ,Group Status Bit 85" "Group 0,Group 1" bitfld.long 0x00 20. " GSB84 ,Group Status Bit 84" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB83 ,Group Status Bit 83" "Group 0,Group 1" bitfld.long 0x00 18. " GSB82 ,Group Status Bit 82" "Group 0,Group 1" bitfld.long 0x00 17. " GSB81 ,Group Status Bit 81" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB80 ,Group Status Bit 80" "Group 0,Group 1" bitfld.long 0x00 15. " GSB79 ,Group Status Bit 79" "Group 0,Group 1" bitfld.long 0x00 14. " GSB78 ,Group Status Bit 78" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB77 ,Group Status Bit 77" "Group 0,Group 1" bitfld.long 0x00 12. " GSB76 ,Group Status Bit 76" "Group 0,Group 1" bitfld.long 0x00 11. " GSB75 ,Group Status Bit 75" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB74 ,Group Status Bit 74" "Group 0,Group 1" bitfld.long 0x00 9. " GSB73 ,Group Status Bit 73" "Group 0,Group 1" bitfld.long 0x00 8. " GSB72 ,Group Status Bit 72" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB71 ,Group Status Bit 71" "Group 0,Group 1" bitfld.long 0x00 6. " GSB70 ,Group Status Bit 70" "Group 0,Group 1" bitfld.long 0x00 5. " GSB69 ,Group Status Bit 69" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB68 ,Group Status Bit 68" "Group 0,Group 1" bitfld.long 0x00 3. " GSB67 ,Group Status Bit 67" "Group 0,Group 1" bitfld.long 0x00 2. " GSB66 ,Group Status Bit 66" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB65 ,Group Status Bit 65" "Group 0,Group 1" bitfld.long 0x00 0. " GSB64 ,Group Status Bit 64" "Group 0,Group 1" else hgroup.long 0x0088++0x03 hide.long 0x0 "GICD_IGROUPR2,Interrupt Group Register 2" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x03)&&(PER.ADDRESS.isSECUREEX(AD:0xF9000000+0x008C)) group.long 0x008C++0x03 line.long 0x0 "GICD_IGROUPR3,Interrupt Group Register 3 (Secure access)" bitfld.long 0x00 31. " GSB127 ,Group Status Bit 127" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB126 ,Group Status Bit 126" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB125 ,Group Status Bit 125" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB124 ,Group Status Bit 124" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB123 ,Group Status Bit 123" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB122 ,Group Status Bit 122" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB121 ,Group Status Bit 121" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB120 ,Group Status Bit 120" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB119 ,Group Status Bit 119" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB118 ,Group Status Bit 118" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB117 ,Group Status Bit 117" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB116 ,Group Status Bit 116" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB115 ,Group Status Bit 115" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB114 ,Group Status Bit 114" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB113 ,Group Status Bit 113" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB112 ,Group Status Bit 112" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB111 ,Group Status Bit 111" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB110 ,Group Status Bit 110" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB109 ,Group Status Bit 109" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB108 ,Group Status Bit 108" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB107 ,Group Status Bit 107" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB106 ,Group Status Bit 106" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB105 ,Group Status Bit 105" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB104 ,Group Status Bit 104" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB103 ,Group Status Bit 103" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB102 ,Group Status Bit 102" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB101 ,Group Status Bit 101" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB100 ,Group Status Bit 100" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB99 ,Group Status Bit 99" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB98 ,Group Status Bit 98" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB97 ,Group Status Bit 97" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB96 ,Group Status Bit 96" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x03) group.long 0x008C++0x03 line.long 0x0 "GICD_IGROUPR3,Interrupt Group Register 3 (Non-secure access)" bitfld.long 0x00 31. " GSB127 ,Group Status Bit 127" "Group 0,Group 1" bitfld.long 0x00 30. " GSB126 ,Group Status Bit 126" "Group 0,Group 1" bitfld.long 0x00 29. " GSB125 ,Group Status Bit 125" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB124 ,Group Status Bit 124" "Group 0,Group 1" bitfld.long 0x00 27. " GSB123 ,Group Status Bit 123" "Group 0,Group 1" bitfld.long 0x00 26. " GSB122 ,Group Status Bit 122" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB121 ,Group Status Bit 121" "Group 0,Group 1" bitfld.long 0x00 24. " GSB120 ,Group Status Bit 120" "Group 0,Group 1" bitfld.long 0x00 23. " GSB119 ,Group Status Bit 119" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB118 ,Group Status Bit 118" "Group 0,Group 1" bitfld.long 0x00 21. " GSB117 ,Group Status Bit 117" "Group 0,Group 1" bitfld.long 0x00 20. " GSB116 ,Group Status Bit 116" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB115 ,Group Status Bit 115" "Group 0,Group 1" bitfld.long 0x00 18. " GSB114 ,Group Status Bit 114" "Group 0,Group 1" bitfld.long 0x00 17. " GSB113 ,Group Status Bit 113" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB112 ,Group Status Bit 112" "Group 0,Group 1" bitfld.long 0x00 15. " GSB111 ,Group Status Bit 111" "Group 0,Group 1" bitfld.long 0x00 14. " GSB110 ,Group Status Bit 110" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB109 ,Group Status Bit 109" "Group 0,Group 1" bitfld.long 0x00 12. " GSB108 ,Group Status Bit 108" "Group 0,Group 1" bitfld.long 0x00 11. " GSB107 ,Group Status Bit 107" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB106 ,Group Status Bit 106" "Group 0,Group 1" bitfld.long 0x00 9. " GSB105 ,Group Status Bit 105" "Group 0,Group 1" bitfld.long 0x00 8. " GSB104 ,Group Status Bit 104" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB103 ,Group Status Bit 103" "Group 0,Group 1" bitfld.long 0x00 6. " GSB102 ,Group Status Bit 102" "Group 0,Group 1" bitfld.long 0x00 5. " GSB101 ,Group Status Bit 101" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB100 ,Group Status Bit 100" "Group 0,Group 1" bitfld.long 0x00 3. " GSB99 ,Group Status Bit 99" "Group 0,Group 1" bitfld.long 0x00 2. " GSB98 ,Group Status Bit 98" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB97 ,Group Status Bit 97" "Group 0,Group 1" bitfld.long 0x00 0. " GSB96 ,Group Status Bit 96" "Group 0,Group 1" else hgroup.long 0x008C++0x03 hide.long 0x0 "GICD_IGROUPR3,Interrupt Group Register 3" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x04)&&(PER.ADDRESS.isSECUREEX(AD:0xF9000000+0x0090)) group.long 0x0090++0x03 line.long 0x0 "GICD_IGROUPR4,Interrupt Group Register 4 (Secure access)" bitfld.long 0x00 31. " GSB159 ,Group Status Bit 159" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB158 ,Group Status Bit 158" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB157 ,Group Status Bit 157" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB156 ,Group Status Bit 156" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB155 ,Group Status Bit 155" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB154 ,Group Status Bit 154" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB153 ,Group Status Bit 153" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB152 ,Group Status Bit 152" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB151 ,Group Status Bit 151" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB150 ,Group Status Bit 150" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB149 ,Group Status Bit 149" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB148 ,Group Status Bit 148" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB147 ,Group Status Bit 147" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB146 ,Group Status Bit 146" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB145 ,Group Status Bit 145" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB144 ,Group Status Bit 144" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB143 ,Group Status Bit 143" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB142 ,Group Status Bit 142" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB141 ,Group Status Bit 141" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB140 ,Group Status Bit 140" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB139 ,Group Status Bit 139" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB138 ,Group Status Bit 138" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB137 ,Group Status Bit 137" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB136 ,Group Status Bit 136" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB135 ,Group Status Bit 135" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB134 ,Group Status Bit 134" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB133 ,Group Status Bit 133" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB132 ,Group Status Bit 132" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB131 ,Group Status Bit 131" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB130 ,Group Status Bit 130" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB129 ,Group Status Bit 129" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB128 ,Group Status Bit 128" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x04) group.long 0x0090++0x03 line.long 0x0 "GICD_IGROUPR4,Interrupt Group Register 4 (Non-secure access)" bitfld.long 0x00 31. " GSB159 ,Group Status Bit 159" "Group 0,Group 1" bitfld.long 0x00 30. " GSB158 ,Group Status Bit 158" "Group 0,Group 1" bitfld.long 0x00 29. " GSB157 ,Group Status Bit 157" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB156 ,Group Status Bit 156" "Group 0,Group 1" bitfld.long 0x00 27. " GSB155 ,Group Status Bit 155" "Group 0,Group 1" bitfld.long 0x00 26. " GSB154 ,Group Status Bit 154" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB153 ,Group Status Bit 153" "Group 0,Group 1" bitfld.long 0x00 24. " GSB152 ,Group Status Bit 152" "Group 0,Group 1" bitfld.long 0x00 23. " GSB151 ,Group Status Bit 151" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB150 ,Group Status Bit 150" "Group 0,Group 1" bitfld.long 0x00 21. " GSB149 ,Group Status Bit 149" "Group 0,Group 1" bitfld.long 0x00 20. " GSB148 ,Group Status Bit 148" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB147 ,Group Status Bit 147" "Group 0,Group 1" bitfld.long 0x00 18. " GSB146 ,Group Status Bit 146" "Group 0,Group 1" bitfld.long 0x00 17. " GSB145 ,Group Status Bit 145" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB144 ,Group Status Bit 144" "Group 0,Group 1" bitfld.long 0x00 15. " GSB143 ,Group Status Bit 143" "Group 0,Group 1" bitfld.long 0x00 14. " GSB142 ,Group Status Bit 142" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB141 ,Group Status Bit 141" "Group 0,Group 1" bitfld.long 0x00 12. " GSB140 ,Group Status Bit 140" "Group 0,Group 1" bitfld.long 0x00 11. " GSB139 ,Group Status Bit 139" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB138 ,Group Status Bit 138" "Group 0,Group 1" bitfld.long 0x00 9. " GSB137 ,Group Status Bit 137" "Group 0,Group 1" bitfld.long 0x00 8. " GSB136 ,Group Status Bit 136" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB135 ,Group Status Bit 135" "Group 0,Group 1" bitfld.long 0x00 6. " GSB134 ,Group Status Bit 134" "Group 0,Group 1" bitfld.long 0x00 5. " GSB133 ,Group Status Bit 133" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB132 ,Group Status Bit 132" "Group 0,Group 1" bitfld.long 0x00 3. " GSB131 ,Group Status Bit 131" "Group 0,Group 1" bitfld.long 0x00 2. " GSB130 ,Group Status Bit 130" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB129 ,Group Status Bit 129" "Group 0,Group 1" bitfld.long 0x00 0. " GSB128 ,Group Status Bit 128" "Group 0,Group 1" else hgroup.long 0x0090++0x03 hide.long 0x0 "GICD_IGROUPR4,Interrupt Group Register 4" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x05)&&(PER.ADDRESS.isSECUREEX(AD:0xF9000000+0x0094)) group.long 0x0094++0x03 line.long 0x0 "GICD_IGROUPR5,Interrupt Group Register 5 (Secure access)" bitfld.long 0x00 31. " GSB191 ,Group Status Bit 191" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB190 ,Group Status Bit 190" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB189 ,Group Status Bit 189" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB188 ,Group Status Bit 188" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB187 ,Group Status Bit 187" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB186 ,Group Status Bit 186" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB185 ,Group Status Bit 185" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB184 ,Group Status Bit 184" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB183 ,Group Status Bit 183" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB182 ,Group Status Bit 182" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB181 ,Group Status Bit 181" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB180 ,Group Status Bit 180" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB179 ,Group Status Bit 179" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB178 ,Group Status Bit 178" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB177 ,Group Status Bit 177" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB176 ,Group Status Bit 176" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB175 ,Group Status Bit 175" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB174 ,Group Status Bit 174" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB173 ,Group Status Bit 173" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB172 ,Group Status Bit 172" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB171 ,Group Status Bit 171" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB170 ,Group Status Bit 170" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB169 ,Group Status Bit 169" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB168 ,Group Status Bit 168" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB167 ,Group Status Bit 167" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB166 ,Group Status Bit 166" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB165 ,Group Status Bit 165" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB164 ,Group Status Bit 164" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB163 ,Group Status Bit 163" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB162 ,Group Status Bit 162" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB161 ,Group Status Bit 161" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB160 ,Group Status Bit 160" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x05) group.long 0x0094++0x03 line.long 0x0 "GICD_IGROUPR5,Interrupt Group Register 5 (Non-secure access)" bitfld.long 0x00 31. " GSB191 ,Group Status Bit 191" "Group 0,Group 1" bitfld.long 0x00 30. " GSB190 ,Group Status Bit 190" "Group 0,Group 1" bitfld.long 0x00 29. " GSB189 ,Group Status Bit 189" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB188 ,Group Status Bit 188" "Group 0,Group 1" bitfld.long 0x00 27. " GSB187 ,Group Status Bit 187" "Group 0,Group 1" bitfld.long 0x00 26. " GSB186 ,Group Status Bit 186" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB185 ,Group Status Bit 185" "Group 0,Group 1" bitfld.long 0x00 24. " GSB184 ,Group Status Bit 184" "Group 0,Group 1" bitfld.long 0x00 23. " GSB183 ,Group Status Bit 183" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB182 ,Group Status Bit 182" "Group 0,Group 1" bitfld.long 0x00 21. " GSB181 ,Group Status Bit 181" "Group 0,Group 1" bitfld.long 0x00 20. " GSB180 ,Group Status Bit 180" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB179 ,Group Status Bit 179" "Group 0,Group 1" bitfld.long 0x00 18. " GSB178 ,Group Status Bit 178" "Group 0,Group 1" bitfld.long 0x00 17. " GSB177 ,Group Status Bit 177" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB176 ,Group Status Bit 176" "Group 0,Group 1" bitfld.long 0x00 15. " GSB175 ,Group Status Bit 175" "Group 0,Group 1" bitfld.long 0x00 14. " GSB174 ,Group Status Bit 174" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB173 ,Group Status Bit 173" "Group 0,Group 1" bitfld.long 0x00 12. " GSB172 ,Group Status Bit 172" "Group 0,Group 1" bitfld.long 0x00 11. " GSB171 ,Group Status Bit 171" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB170 ,Group Status Bit 170" "Group 0,Group 1" bitfld.long 0x00 9. " GSB169 ,Group Status Bit 169" "Group 0,Group 1" bitfld.long 0x00 8. " GSB168 ,Group Status Bit 168" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB167 ,Group Status Bit 167" "Group 0,Group 1" bitfld.long 0x00 6. " GSB166 ,Group Status Bit 166" "Group 0,Group 1" bitfld.long 0x00 5. " GSB165 ,Group Status Bit 165" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB164 ,Group Status Bit 164" "Group 0,Group 1" bitfld.long 0x00 3. " GSB163 ,Group Status Bit 163" "Group 0,Group 1" bitfld.long 0x00 2. " GSB162 ,Group Status Bit 162" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB161 ,Group Status Bit 161" "Group 0,Group 1" bitfld.long 0x00 0. " GSB160 ,Group Status Bit 160" "Group 0,Group 1" else hgroup.long 0x0094++0x03 hide.long 0x0 "GICD_IGROUPR5,Interrupt Group Register 5" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x06)&&(PER.ADDRESS.isSECUREEX(AD:0xF9000000+0x0098)) group.long 0x0098++0x03 line.long 0x0 "GICD_IGROUPR6,Interrupt Group Register 6 (Secure access)" bitfld.long 0x00 31. " GSB223 ,Group Status Bit 223" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB222 ,Group Status Bit 222" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB221 ,Group Status Bit 221" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB220 ,Group Status Bit 220" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB219 ,Group Status Bit 219" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB218 ,Group Status Bit 218" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB217 ,Group Status Bit 217" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB216 ,Group Status Bit 216" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB215 ,Group Status Bit 215" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB214 ,Group Status Bit 214" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB213 ,Group Status Bit 213" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB212 ,Group Status Bit 212" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB211 ,Group Status Bit 211" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB210 ,Group Status Bit 210" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB209 ,Group Status Bit 209" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB208 ,Group Status Bit 208" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB207 ,Group Status Bit 207" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB206 ,Group Status Bit 206" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB205 ,Group Status Bit 205" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB204 ,Group Status Bit 204" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB203 ,Group Status Bit 203" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB202 ,Group Status Bit 202" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB201 ,Group Status Bit 201" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB200 ,Group Status Bit 200" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB199 ,Group Status Bit 199" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB198 ,Group Status Bit 198" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB197 ,Group Status Bit 197" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB196 ,Group Status Bit 196" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB195 ,Group Status Bit 195" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB194 ,Group Status Bit 194" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB193 ,Group Status Bit 193" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB192 ,Group Status Bit 192" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x06) group.long 0x0098++0x03 line.long 0x0 "GICD_IGROUPR6,Interrupt Group Register 6 (Non-secure access)" bitfld.long 0x00 31. " GSB223 ,Group Status Bit 223" "Group 0,Group 1" bitfld.long 0x00 30. " GSB222 ,Group Status Bit 222" "Group 0,Group 1" bitfld.long 0x00 29. " GSB221 ,Group Status Bit 221" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB220 ,Group Status Bit 220" "Group 0,Group 1" bitfld.long 0x00 27. " GSB219 ,Group Status Bit 219" "Group 0,Group 1" bitfld.long 0x00 26. " GSB218 ,Group Status Bit 218" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB217 ,Group Status Bit 217" "Group 0,Group 1" bitfld.long 0x00 24. " GSB216 ,Group Status Bit 216" "Group 0,Group 1" bitfld.long 0x00 23. " GSB215 ,Group Status Bit 215" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB214 ,Group Status Bit 214" "Group 0,Group 1" bitfld.long 0x00 21. " GSB213 ,Group Status Bit 213" "Group 0,Group 1" bitfld.long 0x00 20. " GSB212 ,Group Status Bit 212" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB211 ,Group Status Bit 211" "Group 0,Group 1" bitfld.long 0x00 18. " GSB210 ,Group Status Bit 210" "Group 0,Group 1" bitfld.long 0x00 17. " GSB209 ,Group Status Bit 209" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB208 ,Group Status Bit 208" "Group 0,Group 1" bitfld.long 0x00 15. " GSB207 ,Group Status Bit 207" "Group 0,Group 1" bitfld.long 0x00 14. " GSB206 ,Group Status Bit 206" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB205 ,Group Status Bit 205" "Group 0,Group 1" bitfld.long 0x00 12. " GSB204 ,Group Status Bit 204" "Group 0,Group 1" bitfld.long 0x00 11. " GSB203 ,Group Status Bit 203" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB202 ,Group Status Bit 202" "Group 0,Group 1" bitfld.long 0x00 9. " GSB201 ,Group Status Bit 201" "Group 0,Group 1" bitfld.long 0x00 8. " GSB200 ,Group Status Bit 200" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB199 ,Group Status Bit 199" "Group 0,Group 1" bitfld.long 0x00 6. " GSB198 ,Group Status Bit 198" "Group 0,Group 1" bitfld.long 0x00 5. " GSB197 ,Group Status Bit 197" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB196 ,Group Status Bit 196" "Group 0,Group 1" bitfld.long 0x00 3. " GSB195 ,Group Status Bit 195" "Group 0,Group 1" bitfld.long 0x00 2. " GSB194 ,Group Status Bit 194" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB193 ,Group Status Bit 193" "Group 0,Group 1" bitfld.long 0x00 0. " GSB192 ,Group Status Bit 192" "Group 0,Group 1" else hgroup.long 0x0098++0x03 hide.long 0x0 "GICD_IGROUPR6,Interrupt Group Register 6" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x07)&&(PER.ADDRESS.isSECUREEX(AD:0xF9000000+0x009C)) group.long 0x009C++0x03 line.long 0x0 "GICD_IGROUPR7,Interrupt Group Register 7 (Secure access)" bitfld.long 0x00 31. " GSB255 ,Group Status Bit 255" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB254 ,Group Status Bit 254" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB253 ,Group Status Bit 253" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB252 ,Group Status Bit 252" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB251 ,Group Status Bit 251" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB250 ,Group Status Bit 250" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB249 ,Group Status Bit 249" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB248 ,Group Status Bit 248" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB247 ,Group Status Bit 247" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB246 ,Group Status Bit 246" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB245 ,Group Status Bit 245" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB244 ,Group Status Bit 244" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB243 ,Group Status Bit 243" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB242 ,Group Status Bit 242" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB241 ,Group Status Bit 241" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB240 ,Group Status Bit 240" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB239 ,Group Status Bit 239" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB238 ,Group Status Bit 238" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB237 ,Group Status Bit 237" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB236 ,Group Status Bit 236" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB235 ,Group Status Bit 235" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB234 ,Group Status Bit 234" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB233 ,Group Status Bit 233" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB232 ,Group Status Bit 232" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB231 ,Group Status Bit 231" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB230 ,Group Status Bit 230" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB229 ,Group Status Bit 229" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB228 ,Group Status Bit 228" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB227 ,Group Status Bit 227" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB226 ,Group Status Bit 226" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB225 ,Group Status Bit 225" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB224 ,Group Status Bit 224" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x07) group.long 0x009C++0x03 line.long 0x0 "GICD_IGROUPR7,Interrupt Group Register 7 (Non-secure access)" bitfld.long 0x00 31. " GSB255 ,Group Status Bit 255" "Group 0,Group 1" bitfld.long 0x00 30. " GSB254 ,Group Status Bit 254" "Group 0,Group 1" bitfld.long 0x00 29. " GSB253 ,Group Status Bit 253" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB252 ,Group Status Bit 252" "Group 0,Group 1" bitfld.long 0x00 27. " GSB251 ,Group Status Bit 251" "Group 0,Group 1" bitfld.long 0x00 26. " GSB250 ,Group Status Bit 250" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB249 ,Group Status Bit 249" "Group 0,Group 1" bitfld.long 0x00 24. " GSB248 ,Group Status Bit 248" "Group 0,Group 1" bitfld.long 0x00 23. " GSB247 ,Group Status Bit 247" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB246 ,Group Status Bit 246" "Group 0,Group 1" bitfld.long 0x00 21. " GSB245 ,Group Status Bit 245" "Group 0,Group 1" bitfld.long 0x00 20. " GSB244 ,Group Status Bit 244" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB243 ,Group Status Bit 243" "Group 0,Group 1" bitfld.long 0x00 18. " GSB242 ,Group Status Bit 242" "Group 0,Group 1" bitfld.long 0x00 17. " GSB241 ,Group Status Bit 241" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB240 ,Group Status Bit 240" "Group 0,Group 1" bitfld.long 0x00 15. " GSB239 ,Group Status Bit 239" "Group 0,Group 1" bitfld.long 0x00 14. " GSB238 ,Group Status Bit 238" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB237 ,Group Status Bit 237" "Group 0,Group 1" bitfld.long 0x00 12. " GSB236 ,Group Status Bit 236" "Group 0,Group 1" bitfld.long 0x00 11. " GSB235 ,Group Status Bit 235" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB234 ,Group Status Bit 234" "Group 0,Group 1" bitfld.long 0x00 9. " GSB233 ,Group Status Bit 233" "Group 0,Group 1" bitfld.long 0x00 8. " GSB232 ,Group Status Bit 232" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB231 ,Group Status Bit 231" "Group 0,Group 1" bitfld.long 0x00 6. " GSB230 ,Group Status Bit 230" "Group 0,Group 1" bitfld.long 0x00 5. " GSB229 ,Group Status Bit 229" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB228 ,Group Status Bit 228" "Group 0,Group 1" bitfld.long 0x00 3. " GSB227 ,Group Status Bit 227" "Group 0,Group 1" bitfld.long 0x00 2. " GSB226 ,Group Status Bit 226" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB225 ,Group Status Bit 225" "Group 0,Group 1" bitfld.long 0x00 0. " GSB224 ,Group Status Bit 224" "Group 0,Group 1" else hgroup.long 0x009C++0x03 hide.long 0x0 "GICD_IGROUPR7,Interrupt Group Register 7" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x08)&&(PER.ADDRESS.isSECUREEX(AD:0xF9000000+0x00A0)) group.long 0x00A0++0x03 line.long 0x0 "GICD_IGROUPR8,Interrupt Group Register 8 (Secure access)" bitfld.long 0x00 31. " GSB287 ,Group Status Bit 287" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB286 ,Group Status Bit 286" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB285 ,Group Status Bit 285" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB284 ,Group Status Bit 284" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB283 ,Group Status Bit 283" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB282 ,Group Status Bit 282" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB281 ,Group Status Bit 281" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB280 ,Group Status Bit 280" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB279 ,Group Status Bit 279" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB278 ,Group Status Bit 278" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB277 ,Group Status Bit 277" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB276 ,Group Status Bit 276" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB275 ,Group Status Bit 275" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB274 ,Group Status Bit 274" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB273 ,Group Status Bit 273" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB272 ,Group Status Bit 272" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB271 ,Group Status Bit 271" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB270 ,Group Status Bit 270" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB269 ,Group Status Bit 269" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB268 ,Group Status Bit 268" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB267 ,Group Status Bit 267" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB266 ,Group Status Bit 266" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB265 ,Group Status Bit 265" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB264 ,Group Status Bit 264" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB263 ,Group Status Bit 263" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB262 ,Group Status Bit 262" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB261 ,Group Status Bit 261" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB260 ,Group Status Bit 260" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB259 ,Group Status Bit 259" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB258 ,Group Status Bit 258" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB257 ,Group Status Bit 257" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB256 ,Group Status Bit 256" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x08) group.long 0x00A0++0x03 line.long 0x0 "GICD_IGROUPR8,Interrupt Group Register 8 (Non-secure access)" bitfld.long 0x00 31. " GSB287 ,Group Status Bit 287" "Group 0,Group 1" bitfld.long 0x00 30. " GSB286 ,Group Status Bit 286" "Group 0,Group 1" bitfld.long 0x00 29. " GSB285 ,Group Status Bit 285" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB284 ,Group Status Bit 284" "Group 0,Group 1" bitfld.long 0x00 27. " GSB283 ,Group Status Bit 283" "Group 0,Group 1" bitfld.long 0x00 26. " GSB282 ,Group Status Bit 282" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB281 ,Group Status Bit 281" "Group 0,Group 1" bitfld.long 0x00 24. " GSB280 ,Group Status Bit 280" "Group 0,Group 1" bitfld.long 0x00 23. " GSB279 ,Group Status Bit 279" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB278 ,Group Status Bit 278" "Group 0,Group 1" bitfld.long 0x00 21. " GSB277 ,Group Status Bit 277" "Group 0,Group 1" bitfld.long 0x00 20. " GSB276 ,Group Status Bit 276" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB275 ,Group Status Bit 275" "Group 0,Group 1" bitfld.long 0x00 18. " GSB274 ,Group Status Bit 274" "Group 0,Group 1" bitfld.long 0x00 17. " GSB273 ,Group Status Bit 273" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB272 ,Group Status Bit 272" "Group 0,Group 1" bitfld.long 0x00 15. " GSB271 ,Group Status Bit 271" "Group 0,Group 1" bitfld.long 0x00 14. " GSB270 ,Group Status Bit 270" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB269 ,Group Status Bit 269" "Group 0,Group 1" bitfld.long 0x00 12. " GSB268 ,Group Status Bit 268" "Group 0,Group 1" bitfld.long 0x00 11. " GSB267 ,Group Status Bit 267" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB266 ,Group Status Bit 266" "Group 0,Group 1" bitfld.long 0x00 9. " GSB265 ,Group Status Bit 265" "Group 0,Group 1" bitfld.long 0x00 8. " GSB264 ,Group Status Bit 264" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB263 ,Group Status Bit 263" "Group 0,Group 1" bitfld.long 0x00 6. " GSB262 ,Group Status Bit 262" "Group 0,Group 1" bitfld.long 0x00 5. " GSB261 ,Group Status Bit 261" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB260 ,Group Status Bit 260" "Group 0,Group 1" bitfld.long 0x00 3. " GSB259 ,Group Status Bit 259" "Group 0,Group 1" bitfld.long 0x00 2. " GSB258 ,Group Status Bit 258" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB257 ,Group Status Bit 257" "Group 0,Group 1" bitfld.long 0x00 0. " GSB256 ,Group Status Bit 256" "Group 0,Group 1" else hgroup.long 0x00A0++0x03 hide.long 0x0 "GICD_IGROUPR8,Interrupt Group Register 8" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x09)&&(PER.ADDRESS.isSECUREEX(AD:0xF9000000+0x00A4)) group.long 0x00A4++0x03 line.long 0x0 "GICD_IGROUPR9,Interrupt Group Register 9 (Secure access)" bitfld.long 0x00 31. " GSB319 ,Group Status Bit 319" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB318 ,Group Status Bit 318" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB317 ,Group Status Bit 317" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB316 ,Group Status Bit 316" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB315 ,Group Status Bit 315" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB314 ,Group Status Bit 314" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB313 ,Group Status Bit 313" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB312 ,Group Status Bit 312" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB311 ,Group Status Bit 311" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB310 ,Group Status Bit 310" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB309 ,Group Status Bit 309" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB308 ,Group Status Bit 308" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB307 ,Group Status Bit 307" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB306 ,Group Status Bit 306" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB305 ,Group Status Bit 305" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB304 ,Group Status Bit 304" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB303 ,Group Status Bit 303" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB302 ,Group Status Bit 302" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB301 ,Group Status Bit 301" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB300 ,Group Status Bit 300" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB299 ,Group Status Bit 299" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB298 ,Group Status Bit 298" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB297 ,Group Status Bit 297" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB296 ,Group Status Bit 296" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB295 ,Group Status Bit 295" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB294 ,Group Status Bit 294" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB293 ,Group Status Bit 293" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB292 ,Group Status Bit 292" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB291 ,Group Status Bit 291" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB290 ,Group Status Bit 290" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB289 ,Group Status Bit 289" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB288 ,Group Status Bit 288" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x09) group.long 0x00A4++0x03 line.long 0x0 "GICD_IGROUPR9,Interrupt Group Register 9 (Non-secure access)" bitfld.long 0x00 31. " GSB319 ,Group Status Bit 319" "Group 0,Group 1" bitfld.long 0x00 30. " GSB318 ,Group Status Bit 318" "Group 0,Group 1" bitfld.long 0x00 29. " GSB317 ,Group Status Bit 317" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB316 ,Group Status Bit 316" "Group 0,Group 1" bitfld.long 0x00 27. " GSB315 ,Group Status Bit 315" "Group 0,Group 1" bitfld.long 0x00 26. " GSB314 ,Group Status Bit 314" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB313 ,Group Status Bit 313" "Group 0,Group 1" bitfld.long 0x00 24. " GSB312 ,Group Status Bit 312" "Group 0,Group 1" bitfld.long 0x00 23. " GSB311 ,Group Status Bit 311" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB310 ,Group Status Bit 310" "Group 0,Group 1" bitfld.long 0x00 21. " GSB309 ,Group Status Bit 309" "Group 0,Group 1" bitfld.long 0x00 20. " GSB308 ,Group Status Bit 308" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB307 ,Group Status Bit 307" "Group 0,Group 1" bitfld.long 0x00 18. " GSB306 ,Group Status Bit 306" "Group 0,Group 1" bitfld.long 0x00 17. " GSB305 ,Group Status Bit 305" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB304 ,Group Status Bit 304" "Group 0,Group 1" bitfld.long 0x00 15. " GSB303 ,Group Status Bit 303" "Group 0,Group 1" bitfld.long 0x00 14. " GSB302 ,Group Status Bit 302" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB301 ,Group Status Bit 301" "Group 0,Group 1" bitfld.long 0x00 12. " GSB300 ,Group Status Bit 300" "Group 0,Group 1" bitfld.long 0x00 11. " GSB299 ,Group Status Bit 299" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB298 ,Group Status Bit 298" "Group 0,Group 1" bitfld.long 0x00 9. " GSB297 ,Group Status Bit 297" "Group 0,Group 1" bitfld.long 0x00 8. " GSB296 ,Group Status Bit 296" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB295 ,Group Status Bit 295" "Group 0,Group 1" bitfld.long 0x00 6. " GSB294 ,Group Status Bit 294" "Group 0,Group 1" bitfld.long 0x00 5. " GSB293 ,Group Status Bit 293" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB292 ,Group Status Bit 292" "Group 0,Group 1" bitfld.long 0x00 3. " GSB291 ,Group Status Bit 291" "Group 0,Group 1" bitfld.long 0x00 2. " GSB290 ,Group Status Bit 290" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB289 ,Group Status Bit 289" "Group 0,Group 1" bitfld.long 0x00 0. " GSB288 ,Group Status Bit 288" "Group 0,Group 1" else hgroup.long 0x00A4++0x03 hide.long 0x0 "GICD_IGROUPR9,Interrupt Group Register 9" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x0A)&&(PER.ADDRESS.isSECUREEX(AD:0xF9000000+0x00A8)) group.long 0x00A8++0x03 line.long 0x0 "GICD_IGROUPR10,Interrupt Group Register 10 (Secure access)" bitfld.long 0x00 31. " GSB351 ,Group Status Bit 351" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB350 ,Group Status Bit 350" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB349 ,Group Status Bit 349" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB348 ,Group Status Bit 348" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB347 ,Group Status Bit 347" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB346 ,Group Status Bit 346" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB345 ,Group Status Bit 345" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB344 ,Group Status Bit 344" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB343 ,Group Status Bit 343" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB342 ,Group Status Bit 342" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB341 ,Group Status Bit 341" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB340 ,Group Status Bit 340" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB339 ,Group Status Bit 339" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB338 ,Group Status Bit 338" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB337 ,Group Status Bit 337" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB336 ,Group Status Bit 336" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB335 ,Group Status Bit 335" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB334 ,Group Status Bit 334" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB333 ,Group Status Bit 333" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB332 ,Group Status Bit 332" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB331 ,Group Status Bit 331" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB330 ,Group Status Bit 330" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB329 ,Group Status Bit 329" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB328 ,Group Status Bit 328" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB327 ,Group Status Bit 327" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB326 ,Group Status Bit 326" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB325 ,Group Status Bit 325" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB324 ,Group Status Bit 324" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB323 ,Group Status Bit 323" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB322 ,Group Status Bit 322" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB321 ,Group Status Bit 321" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB320 ,Group Status Bit 320" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x0A) group.long 0x00A8++0x03 line.long 0x0 "GICD_IGROUPR10,Interrupt Group Register 10 (Non-secure access)" bitfld.long 0x00 31. " GSB351 ,Group Status Bit 351" "Group 0,Group 1" bitfld.long 0x00 30. " GSB350 ,Group Status Bit 350" "Group 0,Group 1" bitfld.long 0x00 29. " GSB349 ,Group Status Bit 349" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB348 ,Group Status Bit 348" "Group 0,Group 1" bitfld.long 0x00 27. " GSB347 ,Group Status Bit 347" "Group 0,Group 1" bitfld.long 0x00 26. " GSB346 ,Group Status Bit 346" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB345 ,Group Status Bit 345" "Group 0,Group 1" bitfld.long 0x00 24. " GSB344 ,Group Status Bit 344" "Group 0,Group 1" bitfld.long 0x00 23. " GSB343 ,Group Status Bit 343" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB342 ,Group Status Bit 342" "Group 0,Group 1" bitfld.long 0x00 21. " GSB341 ,Group Status Bit 341" "Group 0,Group 1" bitfld.long 0x00 20. " GSB340 ,Group Status Bit 340" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB339 ,Group Status Bit 339" "Group 0,Group 1" bitfld.long 0x00 18. " GSB338 ,Group Status Bit 338" "Group 0,Group 1" bitfld.long 0x00 17. " GSB337 ,Group Status Bit 337" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB336 ,Group Status Bit 336" "Group 0,Group 1" bitfld.long 0x00 15. " GSB335 ,Group Status Bit 335" "Group 0,Group 1" bitfld.long 0x00 14. " GSB334 ,Group Status Bit 334" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB333 ,Group Status Bit 333" "Group 0,Group 1" bitfld.long 0x00 12. " GSB332 ,Group Status Bit 332" "Group 0,Group 1" bitfld.long 0x00 11. " GSB331 ,Group Status Bit 331" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB330 ,Group Status Bit 330" "Group 0,Group 1" bitfld.long 0x00 9. " GSB329 ,Group Status Bit 329" "Group 0,Group 1" bitfld.long 0x00 8. " GSB328 ,Group Status Bit 328" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB327 ,Group Status Bit 327" "Group 0,Group 1" bitfld.long 0x00 6. " GSB326 ,Group Status Bit 326" "Group 0,Group 1" bitfld.long 0x00 5. " GSB325 ,Group Status Bit 325" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB324 ,Group Status Bit 324" "Group 0,Group 1" bitfld.long 0x00 3. " GSB323 ,Group Status Bit 323" "Group 0,Group 1" bitfld.long 0x00 2. " GSB322 ,Group Status Bit 322" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB321 ,Group Status Bit 321" "Group 0,Group 1" bitfld.long 0x00 0. " GSB320 ,Group Status Bit 320" "Group 0,Group 1" else hgroup.long 0x00A8++0x03 hide.long 0x0 "GICD_IGROUPR10,Interrupt Group Register 10" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x0B)&&(PER.ADDRESS.isSECUREEX(AD:0xF9000000+0x00AC)) group.long 0x00AC++0x03 line.long 0x0 "GICD_IGROUPR11,Interrupt Group Register 11 (Secure access)" bitfld.long 0x00 31. " GSB383 ,Group Status Bit 383" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB382 ,Group Status Bit 382" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB381 ,Group Status Bit 381" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB380 ,Group Status Bit 380" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB379 ,Group Status Bit 379" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB378 ,Group Status Bit 378" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB377 ,Group Status Bit 377" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB376 ,Group Status Bit 376" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB375 ,Group Status Bit 375" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB374 ,Group Status Bit 374" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB373 ,Group Status Bit 373" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB372 ,Group Status Bit 372" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB371 ,Group Status Bit 371" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB370 ,Group Status Bit 370" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB369 ,Group Status Bit 369" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB368 ,Group Status Bit 368" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB367 ,Group Status Bit 367" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB366 ,Group Status Bit 366" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB365 ,Group Status Bit 365" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB364 ,Group Status Bit 364" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB363 ,Group Status Bit 363" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB362 ,Group Status Bit 362" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB361 ,Group Status Bit 361" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB360 ,Group Status Bit 360" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB359 ,Group Status Bit 359" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB358 ,Group Status Bit 358" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB357 ,Group Status Bit 357" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB356 ,Group Status Bit 356" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB355 ,Group Status Bit 355" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB354 ,Group Status Bit 354" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB353 ,Group Status Bit 353" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB352 ,Group Status Bit 352" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x0B) group.long 0x00AC++0x03 line.long 0x0 "GICD_IGROUPR11,Interrupt Group Register 11 (Non-secure access)" bitfld.long 0x00 31. " GSB383 ,Group Status Bit 383" "Group 0,Group 1" bitfld.long 0x00 30. " GSB382 ,Group Status Bit 382" "Group 0,Group 1" bitfld.long 0x00 29. " GSB381 ,Group Status Bit 381" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB380 ,Group Status Bit 380" "Group 0,Group 1" bitfld.long 0x00 27. " GSB379 ,Group Status Bit 379" "Group 0,Group 1" bitfld.long 0x00 26. " GSB378 ,Group Status Bit 378" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB377 ,Group Status Bit 377" "Group 0,Group 1" bitfld.long 0x00 24. " GSB376 ,Group Status Bit 376" "Group 0,Group 1" bitfld.long 0x00 23. " GSB375 ,Group Status Bit 375" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB374 ,Group Status Bit 374" "Group 0,Group 1" bitfld.long 0x00 21. " GSB373 ,Group Status Bit 373" "Group 0,Group 1" bitfld.long 0x00 20. " GSB372 ,Group Status Bit 372" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB371 ,Group Status Bit 371" "Group 0,Group 1" bitfld.long 0x00 18. " GSB370 ,Group Status Bit 370" "Group 0,Group 1" bitfld.long 0x00 17. " GSB369 ,Group Status Bit 369" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB368 ,Group Status Bit 368" "Group 0,Group 1" bitfld.long 0x00 15. " GSB367 ,Group Status Bit 367" "Group 0,Group 1" bitfld.long 0x00 14. " GSB366 ,Group Status Bit 366" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB365 ,Group Status Bit 365" "Group 0,Group 1" bitfld.long 0x00 12. " GSB364 ,Group Status Bit 364" "Group 0,Group 1" bitfld.long 0x00 11. " GSB363 ,Group Status Bit 363" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB362 ,Group Status Bit 362" "Group 0,Group 1" bitfld.long 0x00 9. " GSB361 ,Group Status Bit 361" "Group 0,Group 1" bitfld.long 0x00 8. " GSB360 ,Group Status Bit 360" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB359 ,Group Status Bit 359" "Group 0,Group 1" bitfld.long 0x00 6. " GSB358 ,Group Status Bit 358" "Group 0,Group 1" bitfld.long 0x00 5. " GSB357 ,Group Status Bit 357" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB356 ,Group Status Bit 356" "Group 0,Group 1" bitfld.long 0x00 3. " GSB355 ,Group Status Bit 355" "Group 0,Group 1" bitfld.long 0x00 2. " GSB354 ,Group Status Bit 354" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB353 ,Group Status Bit 353" "Group 0,Group 1" bitfld.long 0x00 0. " GSB352 ,Group Status Bit 352" "Group 0,Group 1" else hgroup.long 0x00AC++0x03 hide.long 0x0 "GICD_IGROUPR11,Interrupt Group Register 11" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x0C)&&(PER.ADDRESS.isSECUREEX(AD:0xF9000000+0x00B0)) group.long 0x00B0++0x03 line.long 0x0 "GICD_IGROUPR12,Interrupt Group Register 12 (Secure access)" bitfld.long 0x00 31. " GSB415 ,Group Status Bit 415" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB414 ,Group Status Bit 414" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB413 ,Group Status Bit 413" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB412 ,Group Status Bit 412" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB411 ,Group Status Bit 411" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB410 ,Group Status Bit 410" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB409 ,Group Status Bit 409" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB408 ,Group Status Bit 408" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB407 ,Group Status Bit 407" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB406 ,Group Status Bit 406" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB405 ,Group Status Bit 405" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB404 ,Group Status Bit 404" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB403 ,Group Status Bit 403" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB402 ,Group Status Bit 402" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB401 ,Group Status Bit 401" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB400 ,Group Status Bit 400" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB399 ,Group Status Bit 399" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB398 ,Group Status Bit 398" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB397 ,Group Status Bit 397" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB396 ,Group Status Bit 396" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB395 ,Group Status Bit 395" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB394 ,Group Status Bit 394" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB393 ,Group Status Bit 393" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB392 ,Group Status Bit 392" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB391 ,Group Status Bit 391" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB390 ,Group Status Bit 390" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB389 ,Group Status Bit 389" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB388 ,Group Status Bit 388" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB387 ,Group Status Bit 387" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB386 ,Group Status Bit 386" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB385 ,Group Status Bit 385" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB384 ,Group Status Bit 384" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x0C) group.long 0x00B0++0x03 line.long 0x0 "GICD_IGROUPR12,Interrupt Group Register 12 (Non-secure access)" bitfld.long 0x00 31. " GSB415 ,Group Status Bit 415" "Group 0,Group 1" bitfld.long 0x00 30. " GSB414 ,Group Status Bit 414" "Group 0,Group 1" bitfld.long 0x00 29. " GSB413 ,Group Status Bit 413" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB412 ,Group Status Bit 412" "Group 0,Group 1" bitfld.long 0x00 27. " GSB411 ,Group Status Bit 411" "Group 0,Group 1" bitfld.long 0x00 26. " GSB410 ,Group Status Bit 410" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB409 ,Group Status Bit 409" "Group 0,Group 1" bitfld.long 0x00 24. " GSB408 ,Group Status Bit 408" "Group 0,Group 1" bitfld.long 0x00 23. " GSB407 ,Group Status Bit 407" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB406 ,Group Status Bit 406" "Group 0,Group 1" bitfld.long 0x00 21. " GSB405 ,Group Status Bit 405" "Group 0,Group 1" bitfld.long 0x00 20. " GSB404 ,Group Status Bit 404" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB403 ,Group Status Bit 403" "Group 0,Group 1" bitfld.long 0x00 18. " GSB402 ,Group Status Bit 402" "Group 0,Group 1" bitfld.long 0x00 17. " GSB401 ,Group Status Bit 401" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB400 ,Group Status Bit 400" "Group 0,Group 1" bitfld.long 0x00 15. " GSB399 ,Group Status Bit 399" "Group 0,Group 1" bitfld.long 0x00 14. " GSB398 ,Group Status Bit 398" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB397 ,Group Status Bit 397" "Group 0,Group 1" bitfld.long 0x00 12. " GSB396 ,Group Status Bit 396" "Group 0,Group 1" bitfld.long 0x00 11. " GSB395 ,Group Status Bit 395" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB394 ,Group Status Bit 394" "Group 0,Group 1" bitfld.long 0x00 9. " GSB393 ,Group Status Bit 393" "Group 0,Group 1" bitfld.long 0x00 8. " GSB392 ,Group Status Bit 392" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB391 ,Group Status Bit 391" "Group 0,Group 1" bitfld.long 0x00 6. " GSB390 ,Group Status Bit 390" "Group 0,Group 1" bitfld.long 0x00 5. " GSB389 ,Group Status Bit 389" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB388 ,Group Status Bit 388" "Group 0,Group 1" bitfld.long 0x00 3. " GSB387 ,Group Status Bit 387" "Group 0,Group 1" bitfld.long 0x00 2. " GSB386 ,Group Status Bit 386" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB385 ,Group Status Bit 385" "Group 0,Group 1" bitfld.long 0x00 0. " GSB384 ,Group Status Bit 384" "Group 0,Group 1" else hgroup.long 0x00B0++0x03 hide.long 0x0 "GICD_IGROUPR12,Interrupt Group Register 12" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x0D)&&(PER.ADDRESS.isSECUREEX(AD:0xF9000000+0x00B4)) group.long 0x00B4++0x03 line.long 0x0 "GICD_IGROUPR13,Interrupt Group Register 13 (Secure access)" bitfld.long 0x00 31. " GSB447 ,Group Status Bit 447" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB446 ,Group Status Bit 446" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB445 ,Group Status Bit 445" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB444 ,Group Status Bit 444" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB443 ,Group Status Bit 443" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB442 ,Group Status Bit 442" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB441 ,Group Status Bit 441" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB440 ,Group Status Bit 440" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB439 ,Group Status Bit 439" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB438 ,Group Status Bit 438" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB437 ,Group Status Bit 437" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB436 ,Group Status Bit 436" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB435 ,Group Status Bit 435" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB434 ,Group Status Bit 434" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB433 ,Group Status Bit 433" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB432 ,Group Status Bit 432" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB431 ,Group Status Bit 431" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB430 ,Group Status Bit 430" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB429 ,Group Status Bit 429" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB428 ,Group Status Bit 428" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB427 ,Group Status Bit 427" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB426 ,Group Status Bit 426" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB425 ,Group Status Bit 425" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB424 ,Group Status Bit 424" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB423 ,Group Status Bit 423" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB422 ,Group Status Bit 422" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB421 ,Group Status Bit 421" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB420 ,Group Status Bit 420" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB419 ,Group Status Bit 419" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB418 ,Group Status Bit 418" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB417 ,Group Status Bit 417" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB416 ,Group Status Bit 416" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x0D) group.long 0x00B4++0x03 line.long 0x0 "GICD_IGROUPR13,Interrupt Group Register 13 (Non-secure access)" bitfld.long 0x00 31. " GSB447 ,Group Status Bit 447" "Group 0,Group 1" bitfld.long 0x00 30. " GSB446 ,Group Status Bit 446" "Group 0,Group 1" bitfld.long 0x00 29. " GSB445 ,Group Status Bit 445" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB444 ,Group Status Bit 444" "Group 0,Group 1" bitfld.long 0x00 27. " GSB443 ,Group Status Bit 443" "Group 0,Group 1" bitfld.long 0x00 26. " GSB442 ,Group Status Bit 442" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB441 ,Group Status Bit 441" "Group 0,Group 1" bitfld.long 0x00 24. " GSB440 ,Group Status Bit 440" "Group 0,Group 1" bitfld.long 0x00 23. " GSB439 ,Group Status Bit 439" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB438 ,Group Status Bit 438" "Group 0,Group 1" bitfld.long 0x00 21. " GSB437 ,Group Status Bit 437" "Group 0,Group 1" bitfld.long 0x00 20. " GSB436 ,Group Status Bit 436" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB435 ,Group Status Bit 435" "Group 0,Group 1" bitfld.long 0x00 18. " GSB434 ,Group Status Bit 434" "Group 0,Group 1" bitfld.long 0x00 17. " GSB433 ,Group Status Bit 433" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB432 ,Group Status Bit 432" "Group 0,Group 1" bitfld.long 0x00 15. " GSB431 ,Group Status Bit 431" "Group 0,Group 1" bitfld.long 0x00 14. " GSB430 ,Group Status Bit 430" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB429 ,Group Status Bit 429" "Group 0,Group 1" bitfld.long 0x00 12. " GSB428 ,Group Status Bit 428" "Group 0,Group 1" bitfld.long 0x00 11. " GSB427 ,Group Status Bit 427" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB426 ,Group Status Bit 426" "Group 0,Group 1" bitfld.long 0x00 9. " GSB425 ,Group Status Bit 425" "Group 0,Group 1" bitfld.long 0x00 8. " GSB424 ,Group Status Bit 424" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB423 ,Group Status Bit 423" "Group 0,Group 1" bitfld.long 0x00 6. " GSB422 ,Group Status Bit 422" "Group 0,Group 1" bitfld.long 0x00 5. " GSB421 ,Group Status Bit 421" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB420 ,Group Status Bit 420" "Group 0,Group 1" bitfld.long 0x00 3. " GSB419 ,Group Status Bit 419" "Group 0,Group 1" bitfld.long 0x00 2. " GSB418 ,Group Status Bit 418" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB417 ,Group Status Bit 417" "Group 0,Group 1" bitfld.long 0x00 0. " GSB416 ,Group Status Bit 416" "Group 0,Group 1" else hgroup.long 0x00B4++0x03 hide.long 0x0 "GICD_IGROUPR13,Interrupt Group Register 13" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x0E)&&(PER.ADDRESS.isSECUREEX(AD:0xF9000000+0x00B8)) group.long 0x00B8++0x03 line.long 0x0 "GICD_IGROUPR14,Interrupt Group Register 14 (Secure access)" bitfld.long 0x00 31. " GSB479 ,Group Status Bit 479" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB478 ,Group Status Bit 478" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB477 ,Group Status Bit 477" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB476 ,Group Status Bit 476" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB475 ,Group Status Bit 475" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB474 ,Group Status Bit 474" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB473 ,Group Status Bit 473" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB472 ,Group Status Bit 472" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB471 ,Group Status Bit 471" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB470 ,Group Status Bit 470" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB469 ,Group Status Bit 469" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB468 ,Group Status Bit 468" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB467 ,Group Status Bit 467" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB466 ,Group Status Bit 466" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB465 ,Group Status Bit 465" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB464 ,Group Status Bit 464" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB463 ,Group Status Bit 463" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB462 ,Group Status Bit 462" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB461 ,Group Status Bit 461" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB460 ,Group Status Bit 460" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB459 ,Group Status Bit 459" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB458 ,Group Status Bit 458" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB457 ,Group Status Bit 457" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB456 ,Group Status Bit 456" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB455 ,Group Status Bit 455" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB454 ,Group Status Bit 454" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB453 ,Group Status Bit 453" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB452 ,Group Status Bit 452" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB451 ,Group Status Bit 451" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB450 ,Group Status Bit 450" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB449 ,Group Status Bit 449" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB448 ,Group Status Bit 448" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x0E) group.long 0x00B8++0x03 line.long 0x0 "GICD_IGROUPR14,Interrupt Group Register 14 (Non-secure access)" bitfld.long 0x00 31. " GSB479 ,Group Status Bit 479" "Group 0,Group 1" bitfld.long 0x00 30. " GSB478 ,Group Status Bit 478" "Group 0,Group 1" bitfld.long 0x00 29. " GSB477 ,Group Status Bit 477" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB476 ,Group Status Bit 476" "Group 0,Group 1" bitfld.long 0x00 27. " GSB475 ,Group Status Bit 475" "Group 0,Group 1" bitfld.long 0x00 26. " GSB474 ,Group Status Bit 474" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB473 ,Group Status Bit 473" "Group 0,Group 1" bitfld.long 0x00 24. " GSB472 ,Group Status Bit 472" "Group 0,Group 1" bitfld.long 0x00 23. " GSB471 ,Group Status Bit 471" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB470 ,Group Status Bit 470" "Group 0,Group 1" bitfld.long 0x00 21. " GSB469 ,Group Status Bit 469" "Group 0,Group 1" bitfld.long 0x00 20. " GSB468 ,Group Status Bit 468" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB467 ,Group Status Bit 467" "Group 0,Group 1" bitfld.long 0x00 18. " GSB466 ,Group Status Bit 466" "Group 0,Group 1" bitfld.long 0x00 17. " GSB465 ,Group Status Bit 465" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB464 ,Group Status Bit 464" "Group 0,Group 1" bitfld.long 0x00 15. " GSB463 ,Group Status Bit 463" "Group 0,Group 1" bitfld.long 0x00 14. " GSB462 ,Group Status Bit 462" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB461 ,Group Status Bit 461" "Group 0,Group 1" bitfld.long 0x00 12. " GSB460 ,Group Status Bit 460" "Group 0,Group 1" bitfld.long 0x00 11. " GSB459 ,Group Status Bit 459" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB458 ,Group Status Bit 458" "Group 0,Group 1" bitfld.long 0x00 9. " GSB457 ,Group Status Bit 457" "Group 0,Group 1" bitfld.long 0x00 8. " GSB456 ,Group Status Bit 456" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB455 ,Group Status Bit 455" "Group 0,Group 1" bitfld.long 0x00 6. " GSB454 ,Group Status Bit 454" "Group 0,Group 1" bitfld.long 0x00 5. " GSB453 ,Group Status Bit 453" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB452 ,Group Status Bit 452" "Group 0,Group 1" bitfld.long 0x00 3. " GSB451 ,Group Status Bit 451" "Group 0,Group 1" bitfld.long 0x00 2. " GSB450 ,Group Status Bit 450" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB449 ,Group Status Bit 449" "Group 0,Group 1" bitfld.long 0x00 0. " GSB448 ,Group Status Bit 448" "Group 0,Group 1" else hgroup.long 0x00B8++0x03 hide.long 0x0 "GICD_IGROUPR14,Interrupt Group Register 14" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x0F)&&(PER.ADDRESS.isSECUREEX(AD:0xF9000000+0x00BC)) group.long 0x00BC++0x03 line.long 0x0 "GICD_IGROUPR15,Interrupt Group Register 15 (Secure access)" bitfld.long 0x00 31. " GSB511 ,Group Status Bit 511" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB510 ,Group Status Bit 510" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB509 ,Group Status Bit 509" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB508 ,Group Status Bit 508" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB507 ,Group Status Bit 507" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB506 ,Group Status Bit 506" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB505 ,Group Status Bit 505" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB504 ,Group Status Bit 504" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB503 ,Group Status Bit 503" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB502 ,Group Status Bit 502" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB501 ,Group Status Bit 501" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB500 ,Group Status Bit 500" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB499 ,Group Status Bit 499" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB498 ,Group Status Bit 498" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB497 ,Group Status Bit 497" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB496 ,Group Status Bit 496" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB495 ,Group Status Bit 495" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB494 ,Group Status Bit 494" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB493 ,Group Status Bit 493" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB492 ,Group Status Bit 492" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB491 ,Group Status Bit 491" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB490 ,Group Status Bit 490" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB489 ,Group Status Bit 489" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB488 ,Group Status Bit 488" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB487 ,Group Status Bit 487" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB486 ,Group Status Bit 486" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB485 ,Group Status Bit 485" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB484 ,Group Status Bit 484" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB483 ,Group Status Bit 483" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB482 ,Group Status Bit 482" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB481 ,Group Status Bit 481" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB480 ,Group Status Bit 480" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x0F) group.long 0x00BC++0x03 line.long 0x0 "GICD_IGROUPR15,Interrupt Group Register 15 (Non-secure access)" bitfld.long 0x00 31. " GSB511 ,Group Status Bit 511" "Group 0,Group 1" bitfld.long 0x00 30. " GSB510 ,Group Status Bit 510" "Group 0,Group 1" bitfld.long 0x00 29. " GSB509 ,Group Status Bit 509" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB508 ,Group Status Bit 508" "Group 0,Group 1" bitfld.long 0x00 27. " GSB507 ,Group Status Bit 507" "Group 0,Group 1" bitfld.long 0x00 26. " GSB506 ,Group Status Bit 506" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB505 ,Group Status Bit 505" "Group 0,Group 1" bitfld.long 0x00 24. " GSB504 ,Group Status Bit 504" "Group 0,Group 1" bitfld.long 0x00 23. " GSB503 ,Group Status Bit 503" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB502 ,Group Status Bit 502" "Group 0,Group 1" bitfld.long 0x00 21. " GSB501 ,Group Status Bit 501" "Group 0,Group 1" bitfld.long 0x00 20. " GSB500 ,Group Status Bit 500" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB499 ,Group Status Bit 499" "Group 0,Group 1" bitfld.long 0x00 18. " GSB498 ,Group Status Bit 498" "Group 0,Group 1" bitfld.long 0x00 17. " GSB497 ,Group Status Bit 497" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB496 ,Group Status Bit 496" "Group 0,Group 1" bitfld.long 0x00 15. " GSB495 ,Group Status Bit 495" "Group 0,Group 1" bitfld.long 0x00 14. " GSB494 ,Group Status Bit 494" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB493 ,Group Status Bit 493" "Group 0,Group 1" bitfld.long 0x00 12. " GSB492 ,Group Status Bit 492" "Group 0,Group 1" bitfld.long 0x00 11. " GSB491 ,Group Status Bit 491" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB490 ,Group Status Bit 490" "Group 0,Group 1" bitfld.long 0x00 9. " GSB489 ,Group Status Bit 489" "Group 0,Group 1" bitfld.long 0x00 8. " GSB488 ,Group Status Bit 488" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB487 ,Group Status Bit 487" "Group 0,Group 1" bitfld.long 0x00 6. " GSB486 ,Group Status Bit 486" "Group 0,Group 1" bitfld.long 0x00 5. " GSB485 ,Group Status Bit 485" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB484 ,Group Status Bit 484" "Group 0,Group 1" bitfld.long 0x00 3. " GSB483 ,Group Status Bit 483" "Group 0,Group 1" bitfld.long 0x00 2. " GSB482 ,Group Status Bit 482" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB481 ,Group Status Bit 481" "Group 0,Group 1" bitfld.long 0x00 0. " GSB480 ,Group Status Bit 480" "Group 0,Group 1" else hgroup.long 0x00BC++0x03 hide.long 0x0 "GICD_IGROUPR15,Interrupt Group Register 15" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x10)&&(PER.ADDRESS.isSECUREEX(AD:0xF9000000+0x00C0)) group.long 0x00C0++0x03 line.long 0x0 "GICD_IGROUPR16,Interrupt Group Register 16 (Secure access)" bitfld.long 0x00 31. " GSB543 ,Group Status Bit 543" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB542 ,Group Status Bit 542" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB541 ,Group Status Bit 541" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB540 ,Group Status Bit 540" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB539 ,Group Status Bit 539" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB538 ,Group Status Bit 538" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB537 ,Group Status Bit 537" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB536 ,Group Status Bit 536" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB535 ,Group Status Bit 535" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB534 ,Group Status Bit 534" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB533 ,Group Status Bit 533" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB532 ,Group Status Bit 532" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB531 ,Group Status Bit 531" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB530 ,Group Status Bit 530" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB529 ,Group Status Bit 529" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB528 ,Group Status Bit 528" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB527 ,Group Status Bit 527" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB526 ,Group Status Bit 526" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB525 ,Group Status Bit 525" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB524 ,Group Status Bit 524" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB523 ,Group Status Bit 523" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB522 ,Group Status Bit 522" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB521 ,Group Status Bit 521" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB520 ,Group Status Bit 520" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB519 ,Group Status Bit 519" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB518 ,Group Status Bit 518" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB517 ,Group Status Bit 517" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB516 ,Group Status Bit 516" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB515 ,Group Status Bit 515" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB514 ,Group Status Bit 514" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB513 ,Group Status Bit 513" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB512 ,Group Status Bit 512" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x10) group.long 0x00C0++0x03 line.long 0x0 "GICD_IGROUPR16,Interrupt Group Register 16 (Non-secure access)" bitfld.long 0x00 31. " GSB543 ,Group Status Bit 543" "Group 0,Group 1" bitfld.long 0x00 30. " GSB542 ,Group Status Bit 542" "Group 0,Group 1" bitfld.long 0x00 29. " GSB541 ,Group Status Bit 541" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB540 ,Group Status Bit 540" "Group 0,Group 1" bitfld.long 0x00 27. " GSB539 ,Group Status Bit 539" "Group 0,Group 1" bitfld.long 0x00 26. " GSB538 ,Group Status Bit 538" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB537 ,Group Status Bit 537" "Group 0,Group 1" bitfld.long 0x00 24. " GSB536 ,Group Status Bit 536" "Group 0,Group 1" bitfld.long 0x00 23. " GSB535 ,Group Status Bit 535" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB534 ,Group Status Bit 534" "Group 0,Group 1" bitfld.long 0x00 21. " GSB533 ,Group Status Bit 533" "Group 0,Group 1" bitfld.long 0x00 20. " GSB532 ,Group Status Bit 532" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB531 ,Group Status Bit 531" "Group 0,Group 1" bitfld.long 0x00 18. " GSB530 ,Group Status Bit 530" "Group 0,Group 1" bitfld.long 0x00 17. " GSB529 ,Group Status Bit 529" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB528 ,Group Status Bit 528" "Group 0,Group 1" bitfld.long 0x00 15. " GSB527 ,Group Status Bit 527" "Group 0,Group 1" bitfld.long 0x00 14. " GSB526 ,Group Status Bit 526" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB525 ,Group Status Bit 525" "Group 0,Group 1" bitfld.long 0x00 12. " GSB524 ,Group Status Bit 524" "Group 0,Group 1" bitfld.long 0x00 11. " GSB523 ,Group Status Bit 523" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB522 ,Group Status Bit 522" "Group 0,Group 1" bitfld.long 0x00 9. " GSB521 ,Group Status Bit 521" "Group 0,Group 1" bitfld.long 0x00 8. " GSB520 ,Group Status Bit 520" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB519 ,Group Status Bit 519" "Group 0,Group 1" bitfld.long 0x00 6. " GSB518 ,Group Status Bit 518" "Group 0,Group 1" bitfld.long 0x00 5. " GSB517 ,Group Status Bit 517" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB516 ,Group Status Bit 516" "Group 0,Group 1" bitfld.long 0x00 3. " GSB515 ,Group Status Bit 515" "Group 0,Group 1" bitfld.long 0x00 2. " GSB514 ,Group Status Bit 514" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB513 ,Group Status Bit 513" "Group 0,Group 1" bitfld.long 0x00 0. " GSB512 ,Group Status Bit 512" "Group 0,Group 1" else hgroup.long 0x00C0++0x03 hide.long 0x0 "GICD_IGROUPR16,Interrupt Group Register 16" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x11)&&(PER.ADDRESS.isSECUREEX(AD:0xF9000000+0x00C4)) group.long 0x00C4++0x03 line.long 0x0 "GICD_IGROUPR17,Interrupt Group Register 17 (Secure access)" bitfld.long 0x00 31. " GSB575 ,Group Status Bit 575" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB574 ,Group Status Bit 574" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB573 ,Group Status Bit 573" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB572 ,Group Status Bit 572" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB571 ,Group Status Bit 571" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB570 ,Group Status Bit 570" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB569 ,Group Status Bit 569" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB568 ,Group Status Bit 568" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB567 ,Group Status Bit 567" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB566 ,Group Status Bit 566" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB565 ,Group Status Bit 565" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB564 ,Group Status Bit 564" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB563 ,Group Status Bit 563" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB562 ,Group Status Bit 562" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB561 ,Group Status Bit 561" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB560 ,Group Status Bit 560" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB559 ,Group Status Bit 559" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB558 ,Group Status Bit 558" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB557 ,Group Status Bit 557" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB556 ,Group Status Bit 556" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB555 ,Group Status Bit 555" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB554 ,Group Status Bit 554" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB553 ,Group Status Bit 553" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB552 ,Group Status Bit 552" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB551 ,Group Status Bit 551" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB550 ,Group Status Bit 550" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB549 ,Group Status Bit 549" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB548 ,Group Status Bit 548" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB547 ,Group Status Bit 547" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB546 ,Group Status Bit 546" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB545 ,Group Status Bit 545" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB544 ,Group Status Bit 544" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x11) group.long 0x00C4++0x03 line.long 0x0 "GICD_IGROUPR17,Interrupt Group Register 17 (Non-secure access)" bitfld.long 0x00 31. " GSB575 ,Group Status Bit 575" "Group 0,Group 1" bitfld.long 0x00 30. " GSB574 ,Group Status Bit 574" "Group 0,Group 1" bitfld.long 0x00 29. " GSB573 ,Group Status Bit 573" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB572 ,Group Status Bit 572" "Group 0,Group 1" bitfld.long 0x00 27. " GSB571 ,Group Status Bit 571" "Group 0,Group 1" bitfld.long 0x00 26. " GSB570 ,Group Status Bit 570" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB569 ,Group Status Bit 569" "Group 0,Group 1" bitfld.long 0x00 24. " GSB568 ,Group Status Bit 568" "Group 0,Group 1" bitfld.long 0x00 23. " GSB567 ,Group Status Bit 567" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB566 ,Group Status Bit 566" "Group 0,Group 1" bitfld.long 0x00 21. " GSB565 ,Group Status Bit 565" "Group 0,Group 1" bitfld.long 0x00 20. " GSB564 ,Group Status Bit 564" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB563 ,Group Status Bit 563" "Group 0,Group 1" bitfld.long 0x00 18. " GSB562 ,Group Status Bit 562" "Group 0,Group 1" bitfld.long 0x00 17. " GSB561 ,Group Status Bit 561" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB560 ,Group Status Bit 560" "Group 0,Group 1" bitfld.long 0x00 15. " GSB559 ,Group Status Bit 559" "Group 0,Group 1" bitfld.long 0x00 14. " GSB558 ,Group Status Bit 558" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB557 ,Group Status Bit 557" "Group 0,Group 1" bitfld.long 0x00 12. " GSB556 ,Group Status Bit 556" "Group 0,Group 1" bitfld.long 0x00 11. " GSB555 ,Group Status Bit 555" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB554 ,Group Status Bit 554" "Group 0,Group 1" bitfld.long 0x00 9. " GSB553 ,Group Status Bit 553" "Group 0,Group 1" bitfld.long 0x00 8. " GSB552 ,Group Status Bit 552" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB551 ,Group Status Bit 551" "Group 0,Group 1" bitfld.long 0x00 6. " GSB550 ,Group Status Bit 550" "Group 0,Group 1" bitfld.long 0x00 5. " GSB549 ,Group Status Bit 549" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB548 ,Group Status Bit 548" "Group 0,Group 1" bitfld.long 0x00 3. " GSB547 ,Group Status Bit 547" "Group 0,Group 1" bitfld.long 0x00 2. " GSB546 ,Group Status Bit 546" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB545 ,Group Status Bit 545" "Group 0,Group 1" bitfld.long 0x00 0. " GSB544 ,Group Status Bit 544" "Group 0,Group 1" else hgroup.long 0x00C4++0x03 hide.long 0x0 "GICD_IGROUPR17,Interrupt Group Register 17" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x12)&&(PER.ADDRESS.isSECUREEX(AD:0xF9000000+0x00C8)) group.long 0x00C8++0x03 line.long 0x0 "GICD_IGROUPR18,Interrupt Group Register 18 (Secure access)" bitfld.long 0x00 31. " GSB607 ,Group Status Bit 607" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB606 ,Group Status Bit 606" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB605 ,Group Status Bit 605" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB604 ,Group Status Bit 604" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB603 ,Group Status Bit 603" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB602 ,Group Status Bit 602" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB601 ,Group Status Bit 601" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB600 ,Group Status Bit 600" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB599 ,Group Status Bit 599" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB598 ,Group Status Bit 598" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB597 ,Group Status Bit 597" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB596 ,Group Status Bit 596" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB595 ,Group Status Bit 595" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB594 ,Group Status Bit 594" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB593 ,Group Status Bit 593" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB592 ,Group Status Bit 592" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB591 ,Group Status Bit 591" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB590 ,Group Status Bit 590" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB589 ,Group Status Bit 589" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB588 ,Group Status Bit 588" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB587 ,Group Status Bit 587" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB586 ,Group Status Bit 586" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB585 ,Group Status Bit 585" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB584 ,Group Status Bit 584" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB583 ,Group Status Bit 583" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB582 ,Group Status Bit 582" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB581 ,Group Status Bit 581" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB580 ,Group Status Bit 580" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB579 ,Group Status Bit 579" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB578 ,Group Status Bit 578" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB577 ,Group Status Bit 577" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB576 ,Group Status Bit 576" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x12) group.long 0x00C8++0x03 line.long 0x0 "GICD_IGROUPR18,Interrupt Group Register 18 (Non-secure access)" bitfld.long 0x00 31. " GSB607 ,Group Status Bit 607" "Group 0,Group 1" bitfld.long 0x00 30. " GSB606 ,Group Status Bit 606" "Group 0,Group 1" bitfld.long 0x00 29. " GSB605 ,Group Status Bit 605" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB604 ,Group Status Bit 604" "Group 0,Group 1" bitfld.long 0x00 27. " GSB603 ,Group Status Bit 603" "Group 0,Group 1" bitfld.long 0x00 26. " GSB602 ,Group Status Bit 602" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB601 ,Group Status Bit 601" "Group 0,Group 1" bitfld.long 0x00 24. " GSB600 ,Group Status Bit 600" "Group 0,Group 1" bitfld.long 0x00 23. " GSB599 ,Group Status Bit 599" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB598 ,Group Status Bit 598" "Group 0,Group 1" bitfld.long 0x00 21. " GSB597 ,Group Status Bit 597" "Group 0,Group 1" bitfld.long 0x00 20. " GSB596 ,Group Status Bit 596" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB595 ,Group Status Bit 595" "Group 0,Group 1" bitfld.long 0x00 18. " GSB594 ,Group Status Bit 594" "Group 0,Group 1" bitfld.long 0x00 17. " GSB593 ,Group Status Bit 593" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB592 ,Group Status Bit 592" "Group 0,Group 1" bitfld.long 0x00 15. " GSB591 ,Group Status Bit 591" "Group 0,Group 1" bitfld.long 0x00 14. " GSB590 ,Group Status Bit 590" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB589 ,Group Status Bit 589" "Group 0,Group 1" bitfld.long 0x00 12. " GSB588 ,Group Status Bit 588" "Group 0,Group 1" bitfld.long 0x00 11. " GSB587 ,Group Status Bit 587" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB586 ,Group Status Bit 586" "Group 0,Group 1" bitfld.long 0x00 9. " GSB585 ,Group Status Bit 585" "Group 0,Group 1" bitfld.long 0x00 8. " GSB584 ,Group Status Bit 584" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB583 ,Group Status Bit 583" "Group 0,Group 1" bitfld.long 0x00 6. " GSB582 ,Group Status Bit 582" "Group 0,Group 1" bitfld.long 0x00 5. " GSB581 ,Group Status Bit 581" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB580 ,Group Status Bit 580" "Group 0,Group 1" bitfld.long 0x00 3. " GSB579 ,Group Status Bit 579" "Group 0,Group 1" bitfld.long 0x00 2. " GSB578 ,Group Status Bit 578" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB577 ,Group Status Bit 577" "Group 0,Group 1" bitfld.long 0x00 0. " GSB576 ,Group Status Bit 576" "Group 0,Group 1" else hgroup.long 0x00C8++0x03 hide.long 0x0 "GICD_IGROUPR18,Interrupt Group Register 18" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x13)&&(PER.ADDRESS.isSECUREEX(AD:0xF9000000+0x00CC)) group.long 0x00CC++0x03 line.long 0x0 "GICD_IGROUPR19,Interrupt Group Register 19 (Secure access)" bitfld.long 0x00 31. " GSB639 ,Group Status Bit 639" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB638 ,Group Status Bit 638" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB637 ,Group Status Bit 637" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB636 ,Group Status Bit 636" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB635 ,Group Status Bit 635" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB634 ,Group Status Bit 634" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB633 ,Group Status Bit 633" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB632 ,Group Status Bit 632" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB631 ,Group Status Bit 631" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB630 ,Group Status Bit 630" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB629 ,Group Status Bit 629" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB628 ,Group Status Bit 628" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB627 ,Group Status Bit 627" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB626 ,Group Status Bit 626" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB625 ,Group Status Bit 625" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB624 ,Group Status Bit 624" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB623 ,Group Status Bit 623" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB622 ,Group Status Bit 622" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB621 ,Group Status Bit 621" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB620 ,Group Status Bit 620" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB619 ,Group Status Bit 619" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB618 ,Group Status Bit 618" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB617 ,Group Status Bit 617" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB616 ,Group Status Bit 616" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB615 ,Group Status Bit 615" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB614 ,Group Status Bit 614" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB613 ,Group Status Bit 613" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB612 ,Group Status Bit 612" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB611 ,Group Status Bit 611" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB610 ,Group Status Bit 610" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB609 ,Group Status Bit 609" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB608 ,Group Status Bit 608" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x13) group.long 0x00CC++0x03 line.long 0x0 "GICD_IGROUPR19,Interrupt Group Register 19 (Non-secure access)" bitfld.long 0x00 31. " GSB639 ,Group Status Bit 639" "Group 0,Group 1" bitfld.long 0x00 30. " GSB638 ,Group Status Bit 638" "Group 0,Group 1" bitfld.long 0x00 29. " GSB637 ,Group Status Bit 637" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB636 ,Group Status Bit 636" "Group 0,Group 1" bitfld.long 0x00 27. " GSB635 ,Group Status Bit 635" "Group 0,Group 1" bitfld.long 0x00 26. " GSB634 ,Group Status Bit 634" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB633 ,Group Status Bit 633" "Group 0,Group 1" bitfld.long 0x00 24. " GSB632 ,Group Status Bit 632" "Group 0,Group 1" bitfld.long 0x00 23. " GSB631 ,Group Status Bit 631" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB630 ,Group Status Bit 630" "Group 0,Group 1" bitfld.long 0x00 21. " GSB629 ,Group Status Bit 629" "Group 0,Group 1" bitfld.long 0x00 20. " GSB628 ,Group Status Bit 628" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB627 ,Group Status Bit 627" "Group 0,Group 1" bitfld.long 0x00 18. " GSB626 ,Group Status Bit 626" "Group 0,Group 1" bitfld.long 0x00 17. " GSB625 ,Group Status Bit 625" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB624 ,Group Status Bit 624" "Group 0,Group 1" bitfld.long 0x00 15. " GSB623 ,Group Status Bit 623" "Group 0,Group 1" bitfld.long 0x00 14. " GSB622 ,Group Status Bit 622" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB621 ,Group Status Bit 621" "Group 0,Group 1" bitfld.long 0x00 12. " GSB620 ,Group Status Bit 620" "Group 0,Group 1" bitfld.long 0x00 11. " GSB619 ,Group Status Bit 619" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB618 ,Group Status Bit 618" "Group 0,Group 1" bitfld.long 0x00 9. " GSB617 ,Group Status Bit 617" "Group 0,Group 1" bitfld.long 0x00 8. " GSB616 ,Group Status Bit 616" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB615 ,Group Status Bit 615" "Group 0,Group 1" bitfld.long 0x00 6. " GSB614 ,Group Status Bit 614" "Group 0,Group 1" bitfld.long 0x00 5. " GSB613 ,Group Status Bit 613" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB612 ,Group Status Bit 612" "Group 0,Group 1" bitfld.long 0x00 3. " GSB611 ,Group Status Bit 611" "Group 0,Group 1" bitfld.long 0x00 2. " GSB610 ,Group Status Bit 610" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB609 ,Group Status Bit 609" "Group 0,Group 1" bitfld.long 0x00 0. " GSB608 ,Group Status Bit 608" "Group 0,Group 1" else hgroup.long 0x00CC++0x03 hide.long 0x0 "GICD_IGROUPR19,Interrupt Group Register 19" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x14)&&(PER.ADDRESS.isSECUREEX(AD:0xF9000000+0x00D0)) group.long 0x00D0++0x03 line.long 0x0 "GICD_IGROUPR20,Interrupt Group Register 20 (Secure access)" bitfld.long 0x00 31. " GSB671 ,Group Status Bit 671" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB670 ,Group Status Bit 670" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB669 ,Group Status Bit 669" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB668 ,Group Status Bit 668" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB667 ,Group Status Bit 667" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB666 ,Group Status Bit 666" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB665 ,Group Status Bit 665" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB664 ,Group Status Bit 664" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB663 ,Group Status Bit 663" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB662 ,Group Status Bit 662" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB661 ,Group Status Bit 661" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB660 ,Group Status Bit 660" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB659 ,Group Status Bit 659" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB658 ,Group Status Bit 658" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB657 ,Group Status Bit 657" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB656 ,Group Status Bit 656" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB655 ,Group Status Bit 655" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB654 ,Group Status Bit 654" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB653 ,Group Status Bit 653" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB652 ,Group Status Bit 652" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB651 ,Group Status Bit 651" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB650 ,Group Status Bit 650" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB649 ,Group Status Bit 649" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB648 ,Group Status Bit 648" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB647 ,Group Status Bit 647" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB646 ,Group Status Bit 646" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB645 ,Group Status Bit 645" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB644 ,Group Status Bit 644" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB643 ,Group Status Bit 643" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB642 ,Group Status Bit 642" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB641 ,Group Status Bit 641" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB640 ,Group Status Bit 640" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x14) group.long 0x00D0++0x03 line.long 0x0 "GICD_IGROUPR20,Interrupt Group Register 20 (Non-secure access)" bitfld.long 0x00 31. " GSB671 ,Group Status Bit 671" "Group 0,Group 1" bitfld.long 0x00 30. " GSB670 ,Group Status Bit 670" "Group 0,Group 1" bitfld.long 0x00 29. " GSB669 ,Group Status Bit 669" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB668 ,Group Status Bit 668" "Group 0,Group 1" bitfld.long 0x00 27. " GSB667 ,Group Status Bit 667" "Group 0,Group 1" bitfld.long 0x00 26. " GSB666 ,Group Status Bit 666" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB665 ,Group Status Bit 665" "Group 0,Group 1" bitfld.long 0x00 24. " GSB664 ,Group Status Bit 664" "Group 0,Group 1" bitfld.long 0x00 23. " GSB663 ,Group Status Bit 663" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB662 ,Group Status Bit 662" "Group 0,Group 1" bitfld.long 0x00 21. " GSB661 ,Group Status Bit 661" "Group 0,Group 1" bitfld.long 0x00 20. " GSB660 ,Group Status Bit 660" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB659 ,Group Status Bit 659" "Group 0,Group 1" bitfld.long 0x00 18. " GSB658 ,Group Status Bit 658" "Group 0,Group 1" bitfld.long 0x00 17. " GSB657 ,Group Status Bit 657" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB656 ,Group Status Bit 656" "Group 0,Group 1" bitfld.long 0x00 15. " GSB655 ,Group Status Bit 655" "Group 0,Group 1" bitfld.long 0x00 14. " GSB654 ,Group Status Bit 654" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB653 ,Group Status Bit 653" "Group 0,Group 1" bitfld.long 0x00 12. " GSB652 ,Group Status Bit 652" "Group 0,Group 1" bitfld.long 0x00 11. " GSB651 ,Group Status Bit 651" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB650 ,Group Status Bit 650" "Group 0,Group 1" bitfld.long 0x00 9. " GSB649 ,Group Status Bit 649" "Group 0,Group 1" bitfld.long 0x00 8. " GSB648 ,Group Status Bit 648" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB647 ,Group Status Bit 647" "Group 0,Group 1" bitfld.long 0x00 6. " GSB646 ,Group Status Bit 646" "Group 0,Group 1" bitfld.long 0x00 5. " GSB645 ,Group Status Bit 645" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB644 ,Group Status Bit 644" "Group 0,Group 1" bitfld.long 0x00 3. " GSB643 ,Group Status Bit 643" "Group 0,Group 1" bitfld.long 0x00 2. " GSB642 ,Group Status Bit 642" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB641 ,Group Status Bit 641" "Group 0,Group 1" bitfld.long 0x00 0. " GSB640 ,Group Status Bit 640" "Group 0,Group 1" else hgroup.long 0x00D0++0x03 hide.long 0x0 "GICD_IGROUPR20,Interrupt Group Register 20" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x15)&&(PER.ADDRESS.isSECUREEX(AD:0xF9000000+0x00D4)) group.long 0x00D4++0x03 line.long 0x0 "GICD_IGROUPR21,Interrupt Group Register 21 (Secure access)" bitfld.long 0x00 31. " GSB703 ,Group Status Bit 703" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB702 ,Group Status Bit 702" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB701 ,Group Status Bit 701" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB700 ,Group Status Bit 700" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB699 ,Group Status Bit 699" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB698 ,Group Status Bit 698" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB697 ,Group Status Bit 697" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB696 ,Group Status Bit 696" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB695 ,Group Status Bit 695" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB694 ,Group Status Bit 694" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB693 ,Group Status Bit 693" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB692 ,Group Status Bit 692" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB691 ,Group Status Bit 691" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB690 ,Group Status Bit 690" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB689 ,Group Status Bit 689" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB688 ,Group Status Bit 688" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB687 ,Group Status Bit 687" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB686 ,Group Status Bit 686" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB685 ,Group Status Bit 685" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB684 ,Group Status Bit 684" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB683 ,Group Status Bit 683" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB682 ,Group Status Bit 682" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB681 ,Group Status Bit 681" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB680 ,Group Status Bit 680" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB679 ,Group Status Bit 679" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB678 ,Group Status Bit 678" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB677 ,Group Status Bit 677" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB676 ,Group Status Bit 676" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB675 ,Group Status Bit 675" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB674 ,Group Status Bit 674" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB673 ,Group Status Bit 673" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB672 ,Group Status Bit 672" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x15) group.long 0x00D4++0x03 line.long 0x0 "GICD_IGROUPR21,Interrupt Group Register 21 (Non-secure access)" bitfld.long 0x00 31. " GSB703 ,Group Status Bit 703" "Group 0,Group 1" bitfld.long 0x00 30. " GSB702 ,Group Status Bit 702" "Group 0,Group 1" bitfld.long 0x00 29. " GSB701 ,Group Status Bit 701" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB700 ,Group Status Bit 700" "Group 0,Group 1" bitfld.long 0x00 27. " GSB699 ,Group Status Bit 699" "Group 0,Group 1" bitfld.long 0x00 26. " GSB698 ,Group Status Bit 698" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB697 ,Group Status Bit 697" "Group 0,Group 1" bitfld.long 0x00 24. " GSB696 ,Group Status Bit 696" "Group 0,Group 1" bitfld.long 0x00 23. " GSB695 ,Group Status Bit 695" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB694 ,Group Status Bit 694" "Group 0,Group 1" bitfld.long 0x00 21. " GSB693 ,Group Status Bit 693" "Group 0,Group 1" bitfld.long 0x00 20. " GSB692 ,Group Status Bit 692" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB691 ,Group Status Bit 691" "Group 0,Group 1" bitfld.long 0x00 18. " GSB690 ,Group Status Bit 690" "Group 0,Group 1" bitfld.long 0x00 17. " GSB689 ,Group Status Bit 689" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB688 ,Group Status Bit 688" "Group 0,Group 1" bitfld.long 0x00 15. " GSB687 ,Group Status Bit 687" "Group 0,Group 1" bitfld.long 0x00 14. " GSB686 ,Group Status Bit 686" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB685 ,Group Status Bit 685" "Group 0,Group 1" bitfld.long 0x00 12. " GSB684 ,Group Status Bit 684" "Group 0,Group 1" bitfld.long 0x00 11. " GSB683 ,Group Status Bit 683" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB682 ,Group Status Bit 682" "Group 0,Group 1" bitfld.long 0x00 9. " GSB681 ,Group Status Bit 681" "Group 0,Group 1" bitfld.long 0x00 8. " GSB680 ,Group Status Bit 680" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB679 ,Group Status Bit 679" "Group 0,Group 1" bitfld.long 0x00 6. " GSB678 ,Group Status Bit 678" "Group 0,Group 1" bitfld.long 0x00 5. " GSB677 ,Group Status Bit 677" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB676 ,Group Status Bit 676" "Group 0,Group 1" bitfld.long 0x00 3. " GSB675 ,Group Status Bit 675" "Group 0,Group 1" bitfld.long 0x00 2. " GSB674 ,Group Status Bit 674" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB673 ,Group Status Bit 673" "Group 0,Group 1" bitfld.long 0x00 0. " GSB672 ,Group Status Bit 672" "Group 0,Group 1" else hgroup.long 0x00D4++0x03 hide.long 0x0 "GICD_IGROUPR21,Interrupt Group Register 21" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x16)&&(PER.ADDRESS.isSECUREEX(AD:0xF9000000+0x00D8)) group.long 0x00D8++0x03 line.long 0x0 "GICD_IGROUPR22,Interrupt Group Register 22 (Secure access)" bitfld.long 0x00 31. " GSB735 ,Group Status Bit 735" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB734 ,Group Status Bit 734" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB733 ,Group Status Bit 733" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB732 ,Group Status Bit 732" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB731 ,Group Status Bit 731" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB730 ,Group Status Bit 730" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB729 ,Group Status Bit 729" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB728 ,Group Status Bit 728" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB727 ,Group Status Bit 727" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB726 ,Group Status Bit 726" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB725 ,Group Status Bit 725" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB724 ,Group Status Bit 724" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB723 ,Group Status Bit 723" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB722 ,Group Status Bit 722" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB721 ,Group Status Bit 721" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB720 ,Group Status Bit 720" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB719 ,Group Status Bit 719" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB718 ,Group Status Bit 718" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB717 ,Group Status Bit 717" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB716 ,Group Status Bit 716" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB715 ,Group Status Bit 715" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB714 ,Group Status Bit 714" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB713 ,Group Status Bit 713" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB712 ,Group Status Bit 712" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB711 ,Group Status Bit 711" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB710 ,Group Status Bit 710" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB709 ,Group Status Bit 709" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB708 ,Group Status Bit 708" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB707 ,Group Status Bit 707" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB706 ,Group Status Bit 706" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB705 ,Group Status Bit 705" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB704 ,Group Status Bit 704" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x16) group.long 0x00D8++0x03 line.long 0x0 "GICD_IGROUPR22,Interrupt Group Register 22 (Non-secure access)" bitfld.long 0x00 31. " GSB735 ,Group Status Bit 735" "Group 0,Group 1" bitfld.long 0x00 30. " GSB734 ,Group Status Bit 734" "Group 0,Group 1" bitfld.long 0x00 29. " GSB733 ,Group Status Bit 733" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB732 ,Group Status Bit 732" "Group 0,Group 1" bitfld.long 0x00 27. " GSB731 ,Group Status Bit 731" "Group 0,Group 1" bitfld.long 0x00 26. " GSB730 ,Group Status Bit 730" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB729 ,Group Status Bit 729" "Group 0,Group 1" bitfld.long 0x00 24. " GSB728 ,Group Status Bit 728" "Group 0,Group 1" bitfld.long 0x00 23. " GSB727 ,Group Status Bit 727" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB726 ,Group Status Bit 726" "Group 0,Group 1" bitfld.long 0x00 21. " GSB725 ,Group Status Bit 725" "Group 0,Group 1" bitfld.long 0x00 20. " GSB724 ,Group Status Bit 724" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB723 ,Group Status Bit 723" "Group 0,Group 1" bitfld.long 0x00 18. " GSB722 ,Group Status Bit 722" "Group 0,Group 1" bitfld.long 0x00 17. " GSB721 ,Group Status Bit 721" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB720 ,Group Status Bit 720" "Group 0,Group 1" bitfld.long 0x00 15. " GSB719 ,Group Status Bit 719" "Group 0,Group 1" bitfld.long 0x00 14. " GSB718 ,Group Status Bit 718" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB717 ,Group Status Bit 717" "Group 0,Group 1" bitfld.long 0x00 12. " GSB716 ,Group Status Bit 716" "Group 0,Group 1" bitfld.long 0x00 11. " GSB715 ,Group Status Bit 715" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB714 ,Group Status Bit 714" "Group 0,Group 1" bitfld.long 0x00 9. " GSB713 ,Group Status Bit 713" "Group 0,Group 1" bitfld.long 0x00 8. " GSB712 ,Group Status Bit 712" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB711 ,Group Status Bit 711" "Group 0,Group 1" bitfld.long 0x00 6. " GSB710 ,Group Status Bit 710" "Group 0,Group 1" bitfld.long 0x00 5. " GSB709 ,Group Status Bit 709" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB708 ,Group Status Bit 708" "Group 0,Group 1" bitfld.long 0x00 3. " GSB707 ,Group Status Bit 707" "Group 0,Group 1" bitfld.long 0x00 2. " GSB706 ,Group Status Bit 706" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB705 ,Group Status Bit 705" "Group 0,Group 1" bitfld.long 0x00 0. " GSB704 ,Group Status Bit 704" "Group 0,Group 1" else hgroup.long 0x00D8++0x03 hide.long 0x0 "GICD_IGROUPR22,Interrupt Group Register 22" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x17)&&(PER.ADDRESS.isSECUREEX(AD:0xF9000000+0x00DC)) group.long 0x00DC++0x03 line.long 0x0 "GICD_IGROUPR23,Interrupt Group Register 23 (Secure access)" bitfld.long 0x00 31. " GSB767 ,Group Status Bit 767" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB766 ,Group Status Bit 766" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB765 ,Group Status Bit 765" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB764 ,Group Status Bit 764" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB763 ,Group Status Bit 763" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB762 ,Group Status Bit 762" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB761 ,Group Status Bit 761" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB760 ,Group Status Bit 760" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB759 ,Group Status Bit 759" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB758 ,Group Status Bit 758" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB757 ,Group Status Bit 757" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB756 ,Group Status Bit 756" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB755 ,Group Status Bit 755" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB754 ,Group Status Bit 754" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB753 ,Group Status Bit 753" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB752 ,Group Status Bit 752" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB751 ,Group Status Bit 751" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB750 ,Group Status Bit 750" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB749 ,Group Status Bit 749" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB748 ,Group Status Bit 748" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB747 ,Group Status Bit 747" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB746 ,Group Status Bit 746" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB745 ,Group Status Bit 745" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB744 ,Group Status Bit 744" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB743 ,Group Status Bit 743" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB742 ,Group Status Bit 742" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB741 ,Group Status Bit 741" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB740 ,Group Status Bit 740" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB739 ,Group Status Bit 739" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB738 ,Group Status Bit 738" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB737 ,Group Status Bit 737" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB736 ,Group Status Bit 736" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x17) group.long 0x00DC++0x03 line.long 0x0 "GICD_IGROUPR23,Interrupt Group Register 23 (Non-secure access)" bitfld.long 0x00 31. " GSB767 ,Group Status Bit 767" "Group 0,Group 1" bitfld.long 0x00 30. " GSB766 ,Group Status Bit 766" "Group 0,Group 1" bitfld.long 0x00 29. " GSB765 ,Group Status Bit 765" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB764 ,Group Status Bit 764" "Group 0,Group 1" bitfld.long 0x00 27. " GSB763 ,Group Status Bit 763" "Group 0,Group 1" bitfld.long 0x00 26. " GSB762 ,Group Status Bit 762" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB761 ,Group Status Bit 761" "Group 0,Group 1" bitfld.long 0x00 24. " GSB760 ,Group Status Bit 760" "Group 0,Group 1" bitfld.long 0x00 23. " GSB759 ,Group Status Bit 759" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB758 ,Group Status Bit 758" "Group 0,Group 1" bitfld.long 0x00 21. " GSB757 ,Group Status Bit 757" "Group 0,Group 1" bitfld.long 0x00 20. " GSB756 ,Group Status Bit 756" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB755 ,Group Status Bit 755" "Group 0,Group 1" bitfld.long 0x00 18. " GSB754 ,Group Status Bit 754" "Group 0,Group 1" bitfld.long 0x00 17. " GSB753 ,Group Status Bit 753" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB752 ,Group Status Bit 752" "Group 0,Group 1" bitfld.long 0x00 15. " GSB751 ,Group Status Bit 751" "Group 0,Group 1" bitfld.long 0x00 14. " GSB750 ,Group Status Bit 750" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB749 ,Group Status Bit 749" "Group 0,Group 1" bitfld.long 0x00 12. " GSB748 ,Group Status Bit 748" "Group 0,Group 1" bitfld.long 0x00 11. " GSB747 ,Group Status Bit 747" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB746 ,Group Status Bit 746" "Group 0,Group 1" bitfld.long 0x00 9. " GSB745 ,Group Status Bit 745" "Group 0,Group 1" bitfld.long 0x00 8. " GSB744 ,Group Status Bit 744" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB743 ,Group Status Bit 743" "Group 0,Group 1" bitfld.long 0x00 6. " GSB742 ,Group Status Bit 742" "Group 0,Group 1" bitfld.long 0x00 5. " GSB741 ,Group Status Bit 741" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB740 ,Group Status Bit 740" "Group 0,Group 1" bitfld.long 0x00 3. " GSB739 ,Group Status Bit 739" "Group 0,Group 1" bitfld.long 0x00 2. " GSB738 ,Group Status Bit 738" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB737 ,Group Status Bit 737" "Group 0,Group 1" bitfld.long 0x00 0. " GSB736 ,Group Status Bit 736" "Group 0,Group 1" else hgroup.long 0x00DC++0x03 hide.long 0x0 "GICD_IGROUPR23,Interrupt Group Register 23" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x18)&&(PER.ADDRESS.isSECUREEX(AD:0xF9000000+0x00E0)) group.long 0x00E0++0x03 line.long 0x0 "GICD_IGROUPR24,Interrupt Group Register 24 (Secure access)" bitfld.long 0x00 31. " GSB799 ,Group Status Bit 799" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB798 ,Group Status Bit 798" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB797 ,Group Status Bit 797" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB796 ,Group Status Bit 796" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB795 ,Group Status Bit 795" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB794 ,Group Status Bit 794" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB793 ,Group Status Bit 793" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB792 ,Group Status Bit 792" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB791 ,Group Status Bit 791" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB790 ,Group Status Bit 790" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB789 ,Group Status Bit 789" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB788 ,Group Status Bit 788" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB787 ,Group Status Bit 787" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB786 ,Group Status Bit 786" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB785 ,Group Status Bit 785" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB784 ,Group Status Bit 784" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB783 ,Group Status Bit 783" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB782 ,Group Status Bit 782" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB781 ,Group Status Bit 781" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB780 ,Group Status Bit 780" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB779 ,Group Status Bit 779" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB778 ,Group Status Bit 778" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB777 ,Group Status Bit 777" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB776 ,Group Status Bit 776" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB775 ,Group Status Bit 775" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB774 ,Group Status Bit 774" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB773 ,Group Status Bit 773" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB772 ,Group Status Bit 772" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB771 ,Group Status Bit 771" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB770 ,Group Status Bit 770" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB769 ,Group Status Bit 769" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB768 ,Group Status Bit 768" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x18) group.long 0x00E0++0x03 line.long 0x0 "GICD_IGROUPR24,Interrupt Group Register 24 (Non-secure access)" bitfld.long 0x00 31. " GSB799 ,Group Status Bit 799" "Group 0,Group 1" bitfld.long 0x00 30. " GSB798 ,Group Status Bit 798" "Group 0,Group 1" bitfld.long 0x00 29. " GSB797 ,Group Status Bit 797" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB796 ,Group Status Bit 796" "Group 0,Group 1" bitfld.long 0x00 27. " GSB795 ,Group Status Bit 795" "Group 0,Group 1" bitfld.long 0x00 26. " GSB794 ,Group Status Bit 794" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB793 ,Group Status Bit 793" "Group 0,Group 1" bitfld.long 0x00 24. " GSB792 ,Group Status Bit 792" "Group 0,Group 1" bitfld.long 0x00 23. " GSB791 ,Group Status Bit 791" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB790 ,Group Status Bit 790" "Group 0,Group 1" bitfld.long 0x00 21. " GSB789 ,Group Status Bit 789" "Group 0,Group 1" bitfld.long 0x00 20. " GSB788 ,Group Status Bit 788" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB787 ,Group Status Bit 787" "Group 0,Group 1" bitfld.long 0x00 18. " GSB786 ,Group Status Bit 786" "Group 0,Group 1" bitfld.long 0x00 17. " GSB785 ,Group Status Bit 785" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB784 ,Group Status Bit 784" "Group 0,Group 1" bitfld.long 0x00 15. " GSB783 ,Group Status Bit 783" "Group 0,Group 1" bitfld.long 0x00 14. " GSB782 ,Group Status Bit 782" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB781 ,Group Status Bit 781" "Group 0,Group 1" bitfld.long 0x00 12. " GSB780 ,Group Status Bit 780" "Group 0,Group 1" bitfld.long 0x00 11. " GSB779 ,Group Status Bit 779" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB778 ,Group Status Bit 778" "Group 0,Group 1" bitfld.long 0x00 9. " GSB777 ,Group Status Bit 777" "Group 0,Group 1" bitfld.long 0x00 8. " GSB776 ,Group Status Bit 776" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB775 ,Group Status Bit 775" "Group 0,Group 1" bitfld.long 0x00 6. " GSB774 ,Group Status Bit 774" "Group 0,Group 1" bitfld.long 0x00 5. " GSB773 ,Group Status Bit 773" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB772 ,Group Status Bit 772" "Group 0,Group 1" bitfld.long 0x00 3. " GSB771 ,Group Status Bit 771" "Group 0,Group 1" bitfld.long 0x00 2. " GSB770 ,Group Status Bit 770" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB769 ,Group Status Bit 769" "Group 0,Group 1" bitfld.long 0x00 0. " GSB768 ,Group Status Bit 768" "Group 0,Group 1" else hgroup.long 0x0E0++0x03 hide.long 0x0 "GICD_IGROUPR24,Interrupt Group Register 24" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x19)&&(PER.ADDRESS.isSECUREEX(AD:0xF9000000+0x00E4)) group.long 0x00E4++0x03 line.long 0x0 "GICD_IGROUPR25,Interrupt Group Register 25 (Secure access)" bitfld.long 0x00 31. " GSB831 ,Group Status Bit 831" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB830 ,Group Status Bit 830" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB829 ,Group Status Bit 829" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB828 ,Group Status Bit 828" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB827 ,Group Status Bit 827" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB826 ,Group Status Bit 826" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB825 ,Group Status Bit 825" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB824 ,Group Status Bit 824" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB823 ,Group Status Bit 823" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB822 ,Group Status Bit 822" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB821 ,Group Status Bit 821" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB820 ,Group Status Bit 820" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB819 ,Group Status Bit 819" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB818 ,Group Status Bit 818" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB817 ,Group Status Bit 817" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB816 ,Group Status Bit 816" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB815 ,Group Status Bit 815" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB814 ,Group Status Bit 814" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB813 ,Group Status Bit 813" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB812 ,Group Status Bit 812" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB811 ,Group Status Bit 811" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB810 ,Group Status Bit 810" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB809 ,Group Status Bit 809" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB808 ,Group Status Bit 808" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB807 ,Group Status Bit 807" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB806 ,Group Status Bit 806" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB805 ,Group Status Bit 805" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB804 ,Group Status Bit 804" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB803 ,Group Status Bit 803" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB802 ,Group Status Bit 802" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB801 ,Group Status Bit 801" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB800 ,Group Status Bit 800" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x19) group.long 0x00E4++0x03 line.long 0x0 "GICD_IGROUPR25,Interrupt Group Register 25 (Non-secure access)" bitfld.long 0x00 31. " GSB831 ,Group Status Bit 831" "Group 0,Group 1" bitfld.long 0x00 30. " GSB830 ,Group Status Bit 830" "Group 0,Group 1" bitfld.long 0x00 29. " GSB829 ,Group Status Bit 829" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB828 ,Group Status Bit 828" "Group 0,Group 1" bitfld.long 0x00 27. " GSB827 ,Group Status Bit 827" "Group 0,Group 1" bitfld.long 0x00 26. " GSB826 ,Group Status Bit 826" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB825 ,Group Status Bit 825" "Group 0,Group 1" bitfld.long 0x00 24. " GSB824 ,Group Status Bit 824" "Group 0,Group 1" bitfld.long 0x00 23. " GSB823 ,Group Status Bit 823" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB822 ,Group Status Bit 822" "Group 0,Group 1" bitfld.long 0x00 21. " GSB821 ,Group Status Bit 821" "Group 0,Group 1" bitfld.long 0x00 20. " GSB820 ,Group Status Bit 820" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB819 ,Group Status Bit 819" "Group 0,Group 1" bitfld.long 0x00 18. " GSB818 ,Group Status Bit 818" "Group 0,Group 1" bitfld.long 0x00 17. " GSB817 ,Group Status Bit 817" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB816 ,Group Status Bit 816" "Group 0,Group 1" bitfld.long 0x00 15. " GSB815 ,Group Status Bit 815" "Group 0,Group 1" bitfld.long 0x00 14. " GSB814 ,Group Status Bit 814" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB813 ,Group Status Bit 813" "Group 0,Group 1" bitfld.long 0x00 12. " GSB812 ,Group Status Bit 812" "Group 0,Group 1" bitfld.long 0x00 11. " GSB811 ,Group Status Bit 811" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB810 ,Group Status Bit 810" "Group 0,Group 1" bitfld.long 0x00 9. " GSB809 ,Group Status Bit 809" "Group 0,Group 1" bitfld.long 0x00 8. " GSB808 ,Group Status Bit 808" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB807 ,Group Status Bit 807" "Group 0,Group 1" bitfld.long 0x00 6. " GSB806 ,Group Status Bit 806" "Group 0,Group 1" bitfld.long 0x00 5. " GSB805 ,Group Status Bit 805" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB804 ,Group Status Bit 804" "Group 0,Group 1" bitfld.long 0x00 3. " GSB803 ,Group Status Bit 803" "Group 0,Group 1" bitfld.long 0x00 2. " GSB802 ,Group Status Bit 802" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB801 ,Group Status Bit 801" "Group 0,Group 1" bitfld.long 0x00 0. " GSB800 ,Group Status Bit 800" "Group 0,Group 1" else hgroup.long 0x00E4++0x03 hide.long 0x0 "GICD_IGROUPR25,Interrupt Group Register 25" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x1A)&&(PER.ADDRESS.isSECUREEX(AD:0xF9000000+0x00E8)) group.long 0x00E8++0x03 line.long 0x0 "GICD_IGROUPR26,Interrupt Group Register 26 (Secure access)" bitfld.long 0x00 31. " GSB863 ,Group Status Bit 863" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB862 ,Group Status Bit 862" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB861 ,Group Status Bit 861" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB860 ,Group Status Bit 860" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB859 ,Group Status Bit 859" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB858 ,Group Status Bit 858" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB857 ,Group Status Bit 857" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB856 ,Group Status Bit 856" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB855 ,Group Status Bit 855" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB854 ,Group Status Bit 854" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB853 ,Group Status Bit 853" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB852 ,Group Status Bit 852" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB851 ,Group Status Bit 851" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB850 ,Group Status Bit 850" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB849 ,Group Status Bit 849" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB848 ,Group Status Bit 848" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB847 ,Group Status Bit 847" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB846 ,Group Status Bit 846" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB845 ,Group Status Bit 845" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB844 ,Group Status Bit 844" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB843 ,Group Status Bit 843" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB842 ,Group Status Bit 842" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB841 ,Group Status Bit 841" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB840 ,Group Status Bit 840" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB839 ,Group Status Bit 839" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB838 ,Group Status Bit 838" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB837 ,Group Status Bit 837" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB836 ,Group Status Bit 836" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB835 ,Group Status Bit 835" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB834 ,Group Status Bit 834" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB833 ,Group Status Bit 833" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB832 ,Group Status Bit 832" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x1A) group.long 0x00E8++0x03 line.long 0x0 "GICD_IGROUPR26,Interrupt Group Register 26 (Non-secure access)" bitfld.long 0x00 31. " GSB863 ,Group Status Bit 863" "Group 0,Group 1" bitfld.long 0x00 30. " GSB862 ,Group Status Bit 862" "Group 0,Group 1" bitfld.long 0x00 29. " GSB861 ,Group Status Bit 861" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB860 ,Group Status Bit 860" "Group 0,Group 1" bitfld.long 0x00 27. " GSB859 ,Group Status Bit 859" "Group 0,Group 1" bitfld.long 0x00 26. " GSB858 ,Group Status Bit 858" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB857 ,Group Status Bit 857" "Group 0,Group 1" bitfld.long 0x00 24. " GSB856 ,Group Status Bit 856" "Group 0,Group 1" bitfld.long 0x00 23. " GSB855 ,Group Status Bit 855" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB854 ,Group Status Bit 854" "Group 0,Group 1" bitfld.long 0x00 21. " GSB853 ,Group Status Bit 853" "Group 0,Group 1" bitfld.long 0x00 20. " GSB852 ,Group Status Bit 852" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB851 ,Group Status Bit 851" "Group 0,Group 1" bitfld.long 0x00 18. " GSB850 ,Group Status Bit 850" "Group 0,Group 1" bitfld.long 0x00 17. " GSB849 ,Group Status Bit 849" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB848 ,Group Status Bit 848" "Group 0,Group 1" bitfld.long 0x00 15. " GSB847 ,Group Status Bit 847" "Group 0,Group 1" bitfld.long 0x00 14. " GSB846 ,Group Status Bit 846" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB845 ,Group Status Bit 845" "Group 0,Group 1" bitfld.long 0x00 12. " GSB844 ,Group Status Bit 844" "Group 0,Group 1" bitfld.long 0x00 11. " GSB843 ,Group Status Bit 843" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB842 ,Group Status Bit 842" "Group 0,Group 1" bitfld.long 0x00 9. " GSB841 ,Group Status Bit 841" "Group 0,Group 1" bitfld.long 0x00 8. " GSB840 ,Group Status Bit 840" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB839 ,Group Status Bit 839" "Group 0,Group 1" bitfld.long 0x00 6. " GSB838 ,Group Status Bit 838" "Group 0,Group 1" bitfld.long 0x00 5. " GSB837 ,Group Status Bit 837" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB836 ,Group Status Bit 836" "Group 0,Group 1" bitfld.long 0x00 3. " GSB835 ,Group Status Bit 835" "Group 0,Group 1" bitfld.long 0x00 2. " GSB834 ,Group Status Bit 834" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB833 ,Group Status Bit 833" "Group 0,Group 1" bitfld.long 0x00 0. " GSB832 ,Group Status Bit 832" "Group 0,Group 1" else hgroup.long 0x00E8++0x03 hide.long 0x0 "GICD_IGROUPR26,Interrupt Group Register 26" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x1B)&&(PER.ADDRESS.isSECUREEX(AD:0xF9000000+0x00EC)) group.long 0x00EC++0x03 line.long 0x0 "GICD_IGROUPR27,Interrupt Group Register 27 (Secure access)" bitfld.long 0x00 31. " GSB895 ,Group Status Bit 895" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB894 ,Group Status Bit 894" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB893 ,Group Status Bit 893" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB892 ,Group Status Bit 892" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB891 ,Group Status Bit 891" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB890 ,Group Status Bit 890" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB889 ,Group Status Bit 889" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB888 ,Group Status Bit 888" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB887 ,Group Status Bit 887" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB886 ,Group Status Bit 886" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB885 ,Group Status Bit 885" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB884 ,Group Status Bit 884" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB883 ,Group Status Bit 883" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB882 ,Group Status Bit 882" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB881 ,Group Status Bit 881" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB880 ,Group Status Bit 880" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB879 ,Group Status Bit 879" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB878 ,Group Status Bit 878" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB877 ,Group Status Bit 877" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB876 ,Group Status Bit 876" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB875 ,Group Status Bit 875" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB874 ,Group Status Bit 874" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB873 ,Group Status Bit 873" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB872 ,Group Status Bit 872" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB871 ,Group Status Bit 871" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB870 ,Group Status Bit 870" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB869 ,Group Status Bit 869" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB868 ,Group Status Bit 868" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB867 ,Group Status Bit 867" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB866 ,Group Status Bit 866" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB865 ,Group Status Bit 865" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB864 ,Group Status Bit 864" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x1B) group.long 0x00EC++0x03 line.long 0x0 "GICD_IGROUPR27,Interrupt Group Register 27 (Non-Secure access)" bitfld.long 0x00 31. " GSB895 ,Group Status Bit 895" "Group 0,Group 1" bitfld.long 0x00 30. " GSB894 ,Group Status Bit 894" "Group 0,Group 1" bitfld.long 0x00 29. " GSB893 ,Group Status Bit 893" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB892 ,Group Status Bit 892" "Group 0,Group 1" bitfld.long 0x00 27. " GSB891 ,Group Status Bit 891" "Group 0,Group 1" bitfld.long 0x00 26. " GSB890 ,Group Status Bit 890" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB889 ,Group Status Bit 889" "Group 0,Group 1" bitfld.long 0x00 24. " GSB888 ,Group Status Bit 888" "Group 0,Group 1" bitfld.long 0x00 23. " GSB887 ,Group Status Bit 887" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB886 ,Group Status Bit 886" "Group 0,Group 1" bitfld.long 0x00 21. " GSB885 ,Group Status Bit 885" "Group 0,Group 1" bitfld.long 0x00 20. " GSB884 ,Group Status Bit 884" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB883 ,Group Status Bit 883" "Group 0,Group 1" bitfld.long 0x00 18. " GSB882 ,Group Status Bit 882" "Group 0,Group 1" bitfld.long 0x00 17. " GSB881 ,Group Status Bit 881" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB880 ,Group Status Bit 880" "Group 0,Group 1" bitfld.long 0x00 15. " GSB879 ,Group Status Bit 879" "Group 0,Group 1" bitfld.long 0x00 14. " GSB878 ,Group Status Bit 878" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB877 ,Group Status Bit 877" "Group 0,Group 1" bitfld.long 0x00 12. " GSB876 ,Group Status Bit 876" "Group 0,Group 1" bitfld.long 0x00 11. " GSB875 ,Group Status Bit 875" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB874 ,Group Status Bit 874" "Group 0,Group 1" bitfld.long 0x00 9. " GSB873 ,Group Status Bit 873" "Group 0,Group 1" bitfld.long 0x00 8. " GSB872 ,Group Status Bit 872" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB871 ,Group Status Bit 871" "Group 0,Group 1" bitfld.long 0x00 6. " GSB870 ,Group Status Bit 870" "Group 0,Group 1" bitfld.long 0x00 5. " GSB869 ,Group Status Bit 869" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB868 ,Group Status Bit 868" "Group 0,Group 1" bitfld.long 0x00 3. " GSB867 ,Group Status Bit 867" "Group 0,Group 1" bitfld.long 0x00 2. " GSB866 ,Group Status Bit 866" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB865 ,Group Status Bit 865" "Group 0,Group 1" bitfld.long 0x00 0. " GSB864 ,Group Status Bit 864" "Group 0,Group 1" else hgroup.long 0x00EC++0x03 hide.long 0x0 "GICD_IGROUPR27,Interrupt Group Register 27" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x1C)&&(PER.ADDRESS.isSECUREEX(AD:0xF9000000+0x00F0)) group.long 0x00F0++0x03 line.long 0x0 "GICD_IGROUPR28,Interrupt Group Register 28 (Secure access)" bitfld.long 0x00 31. " GSB927 ,Group Status Bit 927" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB926 ,Group Status Bit 926" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB925 ,Group Status Bit 925" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB924 ,Group Status Bit 924" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB923 ,Group Status Bit 923" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB922 ,Group Status Bit 922" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB921 ,Group Status Bit 921" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB920 ,Group Status Bit 920" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB919 ,Group Status Bit 919" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB918 ,Group Status Bit 918" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB917 ,Group Status Bit 917" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB916 ,Group Status Bit 916" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB915 ,Group Status Bit 915" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB914 ,Group Status Bit 914" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB913 ,Group Status Bit 913" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB912 ,Group Status Bit 912" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB911 ,Group Status Bit 911" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB910 ,Group Status Bit 910" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB909 ,Group Status Bit 909" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB908 ,Group Status Bit 908" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB907 ,Group Status Bit 907" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB906 ,Group Status Bit 906" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB905 ,Group Status Bit 905" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB904 ,Group Status Bit 904" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB903 ,Group Status Bit 903" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB902 ,Group Status Bit 902" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB901 ,Group Status Bit 901" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB900 ,Group Status Bit 900" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB899 ,Group Status Bit 899" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB898 ,Group Status Bit 898" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB897 ,Group Status Bit 897" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB896 ,Group Status Bit 896" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x1C) group.long 0x00F0++0x03 line.long 0x0 "GICD_IGROUPR28,Interrupt Group Register 28 (Non-secure access)" bitfld.long 0x00 31. " GSB927 ,Group Status Bit 927" "Group 0,Group 1" bitfld.long 0x00 30. " GSB926 ,Group Status Bit 926" "Group 0,Group 1" bitfld.long 0x00 29. " GSB925 ,Group Status Bit 925" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB924 ,Group Status Bit 924" "Group 0,Group 1" bitfld.long 0x00 27. " GSB923 ,Group Status Bit 923" "Group 0,Group 1" bitfld.long 0x00 26. " GSB922 ,Group Status Bit 922" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB921 ,Group Status Bit 921" "Group 0,Group 1" bitfld.long 0x00 24. " GSB920 ,Group Status Bit 920" "Group 0,Group 1" bitfld.long 0x00 23. " GSB919 ,Group Status Bit 919" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB918 ,Group Status Bit 918" "Group 0,Group 1" bitfld.long 0x00 21. " GSB917 ,Group Status Bit 917" "Group 0,Group 1" bitfld.long 0x00 20. " GSB916 ,Group Status Bit 916" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB915 ,Group Status Bit 915" "Group 0,Group 1" bitfld.long 0x00 18. " GSB914 ,Group Status Bit 914" "Group 0,Group 1" bitfld.long 0x00 17. " GSB913 ,Group Status Bit 913" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB912 ,Group Status Bit 912" "Group 0,Group 1" bitfld.long 0x00 15. " GSB911 ,Group Status Bit 911" "Group 0,Group 1" bitfld.long 0x00 14. " GSB910 ,Group Status Bit 910" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB909 ,Group Status Bit 909" "Group 0,Group 1" bitfld.long 0x00 12. " GSB908 ,Group Status Bit 908" "Group 0,Group 1" bitfld.long 0x00 11. " GSB907 ,Group Status Bit 907" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB906 ,Group Status Bit 906" "Group 0,Group 1" bitfld.long 0x00 9. " GSB905 ,Group Status Bit 905" "Group 0,Group 1" bitfld.long 0x00 8. " GSB904 ,Group Status Bit 904" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB903 ,Group Status Bit 903" "Group 0,Group 1" bitfld.long 0x00 6. " GSB902 ,Group Status Bit 902" "Group 0,Group 1" bitfld.long 0x00 5. " GSB901 ,Group Status Bit 901" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB900 ,Group Status Bit 900" "Group 0,Group 1" bitfld.long 0x00 3. " GSB899 ,Group Status Bit 899" "Group 0,Group 1" bitfld.long 0x00 2. " GSB898 ,Group Status Bit 898" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB897 ,Group Status Bit 897" "Group 0,Group 1" bitfld.long 0x00 0. " GSB896 ,Group Status Bit 896" "Group 0,Group 1" else hgroup.long 0x0F0++0x03 hide.long 0x0 "GICD_IGROUPR28,Interrupt Group Register 28" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x1D)&&(PER.ADDRESS.isSECUREEX(AD:0xF9000000+0x00F4)) group.long 0x00F4++0x03 line.long 0x0 "GICD_IGROUPR29,Interrupt Group Register 29 (Secure access)" bitfld.long 0x00 31. " GSB959 ,Group Status Bit 959" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB958 ,Group Status Bit 958" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB957 ,Group Status Bit 957" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB956 ,Group Status Bit 956" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB955 ,Group Status Bit 955" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB954 ,Group Status Bit 954" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB953 ,Group Status Bit 953" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB952 ,Group Status Bit 952" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB951 ,Group Status Bit 951" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB950 ,Group Status Bit 950" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB949 ,Group Status Bit 949" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB948 ,Group Status Bit 948" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB947 ,Group Status Bit 947" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB946 ,Group Status Bit 946" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB945 ,Group Status Bit 945" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB944 ,Group Status Bit 944" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB943 ,Group Status Bit 943" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB942 ,Group Status Bit 942" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB941 ,Group Status Bit 941" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB940 ,Group Status Bit 940" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB939 ,Group Status Bit 939" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB938 ,Group Status Bit 938" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB937 ,Group Status Bit 937" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB936 ,Group Status Bit 936" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB935 ,Group Status Bit 935" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB934 ,Group Status Bit 934" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB933 ,Group Status Bit 933" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB932 ,Group Status Bit 932" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB931 ,Group Status Bit 931" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB930 ,Group Status Bit 930" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB929 ,Group Status Bit 929" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB928 ,Group Status Bit 928" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x1D) group.long 0x00F4++0x03 line.long 0x0 "GICD_IGROUPR29,Interrupt Group Register 29 (Non-secure access)" bitfld.long 0x00 31. " GSB959 ,Group Status Bit 959" "Group 0,Group 1" bitfld.long 0x00 30. " GSB958 ,Group Status Bit 958" "Group 0,Group 1" bitfld.long 0x00 29. " GSB957 ,Group Status Bit 957" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB956 ,Group Status Bit 956" "Group 0,Group 1" bitfld.long 0x00 27. " GSB955 ,Group Status Bit 955" "Group 0,Group 1" bitfld.long 0x00 26. " GSB954 ,Group Status Bit 954" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB953 ,Group Status Bit 953" "Group 0,Group 1" bitfld.long 0x00 24. " GSB952 ,Group Status Bit 952" "Group 0,Group 1" bitfld.long 0x00 23. " GSB951 ,Group Status Bit 951" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB950 ,Group Status Bit 950" "Group 0,Group 1" bitfld.long 0x00 21. " GSB949 ,Group Status Bit 949" "Group 0,Group 1" bitfld.long 0x00 20. " GSB948 ,Group Status Bit 948" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB947 ,Group Status Bit 947" "Group 0,Group 1" bitfld.long 0x00 18. " GSB946 ,Group Status Bit 946" "Group 0,Group 1" bitfld.long 0x00 17. " GSB945 ,Group Status Bit 945" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB944 ,Group Status Bit 944" "Group 0,Group 1" bitfld.long 0x00 15. " GSB943 ,Group Status Bit 943" "Group 0,Group 1" bitfld.long 0x00 14. " GSB942 ,Group Status Bit 942" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB941 ,Group Status Bit 941" "Group 0,Group 1" bitfld.long 0x00 12. " GSB940 ,Group Status Bit 940" "Group 0,Group 1" bitfld.long 0x00 11. " GSB939 ,Group Status Bit 939" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB938 ,Group Status Bit 938" "Group 0,Group 1" bitfld.long 0x00 9. " GSB937 ,Group Status Bit 937" "Group 0,Group 1" bitfld.long 0x00 8. " GSB936 ,Group Status Bit 936" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB935 ,Group Status Bit 935" "Group 0,Group 1" bitfld.long 0x00 6. " GSB934 ,Group Status Bit 934" "Group 0,Group 1" bitfld.long 0x00 5. " GSB933 ,Group Status Bit 933" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB932 ,Group Status Bit 932" "Group 0,Group 1" bitfld.long 0x00 3. " GSB931 ,Group Status Bit 931" "Group 0,Group 1" bitfld.long 0x00 2. " GSB930 ,Group Status Bit 930" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB929 ,Group Status Bit 929" "Group 0,Group 1" bitfld.long 0x00 0. " GSB928 ,Group Status Bit 928" "Group 0,Group 1" else hgroup.long 0x00F4++0x03 hide.long 0x0 "GICD_IGROUPR29,Interrupt Group Register 29" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x1E)&&(PER.ADDRESS.isSECUREEX(AD:0xF9000000+0x00F8)) group.long 0x00F8++0x03 line.long 0x0 "GICD_IGROUPR30,Interrupt Group Register 30 (Secure access)" bitfld.long 0x00 31. " GSB991 ,Group Status Bit 991" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB990 ,Group Status Bit 990" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB989 ,Group Status Bit 989" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB988 ,Group Status Bit 988" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB987 ,Group Status Bit 987" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB986 ,Group Status Bit 986" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB985 ,Group Status Bit 985" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB984 ,Group Status Bit 984" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB983 ,Group Status Bit 983" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB982 ,Group Status Bit 982" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB981 ,Group Status Bit 981" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB980 ,Group Status Bit 980" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB979 ,Group Status Bit 979" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB978 ,Group Status Bit 978" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB977 ,Group Status Bit 977" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB976 ,Group Status Bit 976" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB975 ,Group Status Bit 975" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB974 ,Group Status Bit 974" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB973 ,Group Status Bit 973" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB972 ,Group Status Bit 972" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB971 ,Group Status Bit 971" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB970 ,Group Status Bit 970" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB969 ,Group Status Bit 969" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB968 ,Group Status Bit 968" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB967 ,Group Status Bit 967" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB966 ,Group Status Bit 966" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB965 ,Group Status Bit 965" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB964 ,Group Status Bit 964" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB963 ,Group Status Bit 963" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB962 ,Group Status Bit 962" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB961 ,Group Status Bit 961" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB960 ,Group Status Bit 960" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x1E) group.long 0x00F8++0x03 line.long 0x0 "GICD_IGROUPR30,Interrupt Group Register 30 (Non-secure access)" bitfld.long 0x00 31. " GSB991 ,Group Status Bit 991" "Group 0,Group 1" bitfld.long 0x00 30. " GSB990 ,Group Status Bit 990" "Group 0,Group 1" bitfld.long 0x00 29. " GSB989 ,Group Status Bit 989" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB988 ,Group Status Bit 988" "Group 0,Group 1" bitfld.long 0x00 27. " GSB987 ,Group Status Bit 987" "Group 0,Group 1" bitfld.long 0x00 26. " GSB986 ,Group Status Bit 986" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB985 ,Group Status Bit 985" "Group 0,Group 1" bitfld.long 0x00 24. " GSB984 ,Group Status Bit 984" "Group 0,Group 1" bitfld.long 0x00 23. " GSB983 ,Group Status Bit 983" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB982 ,Group Status Bit 982" "Group 0,Group 1" bitfld.long 0x00 21. " GSB981 ,Group Status Bit 981" "Group 0,Group 1" bitfld.long 0x00 20. " GSB980 ,Group Status Bit 980" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB979 ,Group Status Bit 979" "Group 0,Group 1" bitfld.long 0x00 18. " GSB978 ,Group Status Bit 978" "Group 0,Group 1" bitfld.long 0x00 17. " GSB977 ,Group Status Bit 977" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB976 ,Group Status Bit 976" "Group 0,Group 1" bitfld.long 0x00 15. " GSB975 ,Group Status Bit 975" "Group 0,Group 1" bitfld.long 0x00 14. " GSB974 ,Group Status Bit 974" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB973 ,Group Status Bit 973" "Group 0,Group 1" bitfld.long 0x00 12. " GSB972 ,Group Status Bit 972" "Group 0,Group 1" bitfld.long 0x00 11. " GSB971 ,Group Status Bit 971" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB970 ,Group Status Bit 970" "Group 0,Group 1" bitfld.long 0x00 9. " GSB969 ,Group Status Bit 969" "Group 0,Group 1" bitfld.long 0x00 8. " GSB968 ,Group Status Bit 968" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB967 ,Group Status Bit 967" "Group 0,Group 1" bitfld.long 0x00 6. " GSB966 ,Group Status Bit 966" "Group 0,Group 1" bitfld.long 0x00 5. " GSB965 ,Group Status Bit 965" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB964 ,Group Status Bit 964" "Group 0,Group 1" bitfld.long 0x00 3. " GSB963 ,Group Status Bit 963" "Group 0,Group 1" bitfld.long 0x00 2. " GSB962 ,Group Status Bit 962" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB961 ,Group Status Bit 961" "Group 0,Group 1" bitfld.long 0x00 0. " GSB960 ,Group Status Bit 960" "Group 0,Group 1" else hgroup.long 0x00F8++0x03 hide.long 0x0 "GICD_IGROUPR30,Interrupt Group Register 30" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)==0x1F)&&(PER.ADDRESS.isSECUREEX(AD:0xF9000000+0x00FC)) group.long 0x00FC++0x03 line.long 0x0 "GICD_IGROUPR31,Interrupt Group Register 31 (Secure access)" bitfld.long 0x00 27. " GSB1019 ,Group Status Bit 1019" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB1018 ,Group Status Bit 1018" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB1017 ,Group Status Bit 1017" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB1016 ,Group Status Bit 1016" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB1015 ,Group Status Bit 1015" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB1014 ,Group Status Bit 1014" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB1013 ,Group Status Bit 1013" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB1012 ,Group Status Bit 1012" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB1011 ,Group Status Bit 1011" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB1010 ,Group Status Bit 1010" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB1009 ,Group Status Bit 1009" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB1008 ,Group Status Bit 1008" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB1007 ,Group Status Bit 1007" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB1006 ,Group Status Bit 1006" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB1005 ,Group Status Bit 1005" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB1004 ,Group Status Bit 1004" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB1003 ,Group Status Bit 1003" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB1002 ,Group Status Bit 1002" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB1001 ,Group Status Bit 1001" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB1000 ,Group Status Bit 1000" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB999 ,Group Status Bit 999" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB998 ,Group Status Bit 998" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB997 ,Group Status Bit 997" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB996 ,Group Status Bit 996" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB995 ,Group Status Bit 995" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB994 ,Group Status Bit 994" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB993 ,Group Status Bit 993" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB992 ,Group Status Bit 992" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(AD:0xF9000000+0x04))&0x0000001F)==0x1F) group.long 0x00FC++0x03 line.long 0x0 "GICD_IGROUPR31,Interrupt Group Register 31 (Non-secure access)" bitfld.long 0x00 27. " GSB1019 ,Group Status Bit 1019" "Group 0,Group 1" bitfld.long 0x00 26. " GSB1018 ,Group Status Bit 1018" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB1017 ,Group Status Bit 1017" "Group 0,Group 1" bitfld.long 0x00 24. " GSB1016 ,Group Status Bit 1016" "Group 0,Group 1" bitfld.long 0x00 23. " GSB1015 ,Group Status Bit 1015" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB1014 ,Group Status Bit 1014" "Group 0,Group 1" bitfld.long 0x00 21. " GSB1013 ,Group Status Bit 1013" "Group 0,Group 1" bitfld.long 0x00 20. " GSB1012 ,Group Status Bit 1012" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB1011 ,Group Status Bit 1011" "Group 0,Group 1" bitfld.long 0x00 18. " GSB1010 ,Group Status Bit 1010" "Group 0,Group 1" bitfld.long 0x00 17. " GSB1009 ,Group Status Bit 1009" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB1008 ,Group Status Bit 1008" "Group 0,Group 1" bitfld.long 0x00 15. " GSB1007 ,Group Status Bit 1007" "Group 0,Group 1" bitfld.long 0x00 14. " GSB1006 ,Group Status Bit 1006" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB1005 ,Group Status Bit 1005" "Group 0,Group 1" bitfld.long 0x00 12. " GSB1004 ,Group Status Bit 1004" "Group 0,Group 1" bitfld.long 0x00 11. " GSB1003 ,Group Status Bit 1003" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB1002 ,Group Status Bit 1002" "Group 0,Group 1" bitfld.long 0x00 9. " GSB1001 ,Group Status Bit 1001" "Group 0,Group 1" bitfld.long 0x00 8. " GSB1000 ,Group Status Bit 1000" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB999 ,Group Status Bit 999" "Group 0,Group 1" bitfld.long 0x00 6. " GSB998 ,Group Status Bit 998" "Group 0,Group 1" bitfld.long 0x00 5. " GSB997 ,Group Status Bit 997" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB996 ,Group Status Bit 996" "Group 0,Group 1" bitfld.long 0x00 3. " GSB995 ,Group Status Bit 995" "Group 0,Group 1" bitfld.long 0x00 2. " GSB994 ,Group Status Bit 994" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB993 ,Group Status Bit 993" "Group 0,Group 1" bitfld.long 0x00 0. " GSB992 ,Group Status Bit 992" "Group 0,Group 1" else hgroup.long 0x00FC++0x03 hide.long 0x0 "GICD_IGROUPR31,Interrupt Group Register 31" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif tree.end endif width 24. tree "Set/Clear Enable Registers" group.long 0x0100++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER0,Interrupt Set/Clear Enable Register 0" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB31 ,Set/Clear Enable Bit 31" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB30 ,Set/Clear Enable Bit 30" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB29 ,Set/Clear Enable Bit 29" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB28 ,Set/Clear Enable Bit 28" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB27 ,Set/Clear Enable Bit 27" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB26 ,Set/Clear Enable Bit 26" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB25 ,Set/Clear Enable Bit 25" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB24 ,Set/Clear Enable Bit 24" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB23 ,Set/Clear Enable Bit 23" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB22 ,Set/Clear Enable Bit 22" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB21 ,Set/Clear Enable Bit 21" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB20 ,Set/Clear Enable Bit 20" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB19 ,Set/Clear Enable Bit 19" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB18 ,Set/Clear Enable Bit 18" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB17 ,Set/Clear Enable Bit 17" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB16 ,Set/Clear Enable Bit 16" "Disabled,Enabled" if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x01) group.long 0x0104++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER1,Interrupt Set/Clear Enable Register 1" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB63 ,Set/Clear Enable Bit 63" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB62 ,Set/Clear Enable Bit 62" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB61 ,Set/Clear Enable Bit 61" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB60 ,Set/Clear Enable Bit 60" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB59 ,Set/Clear Enable Bit 59" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB58 ,Set/Clear Enable Bit 58" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB57 ,Set/Clear Enable Bit 57" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB56 ,Set/Clear Enable Bit 56" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB55 ,Set/Clear Enable Bit 55" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB54 ,Set/Clear Enable Bit 54" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB53 ,Set/Clear Enable Bit 53" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB52 ,Set/Clear Enable Bit 52" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB51 ,Set/Clear Enable Bit 51" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB50 ,Set/Clear Enable Bit 50" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB49 ,Set/Clear Enable Bit 49" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB48 ,Set/Clear Enable Bit 48" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB47 ,Set/Clear Enable Bit 47" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB46 ,Set/Clear Enable Bit 46" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB45 ,Set/Clear Enable Bit 45" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB44 ,Set/Clear Enable Bit 44" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB43 ,Set/Clear Enable Bit 43" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB42 ,Set/Clear Enable Bit 42" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB41 ,Set/Clear Enable Bit 41" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB40 ,Set/Clear Enable Bit 40" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB39 ,Set/Clear Enable Bit 39" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB38 ,Set/Clear Enable Bit 38" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB37 ,Set/Clear Enable Bit 37" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB36 ,Set/Clear Enable Bit 36" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB35 ,Set/Clear Enable Bit 35" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB34 ,Set/Clear Enable Bit 34" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB33 ,Set/Clear Enable Bit 33" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB32 ,Set/Clear Enable Bit 32" "Disabled,Enabled" else hgroup.long 0x0104++0x03 hide.long 0x0 "GICD_SET/CLR_ENABLER1,Interrupt Set/Clear Enable Register 1" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x02) group.long 0x0108++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER2,Interrupt Set/Clear Enable Register 2" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB95 ,Set/Clear Enable Bit 95" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB94 ,Set/Clear Enable Bit 94" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB93 ,Set/Clear Enable Bit 93" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB92 ,Set/Clear Enable Bit 92" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB91 ,Set/Clear Enable Bit 91" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB90 ,Set/Clear Enable Bit 90" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB89 ,Set/Clear Enable Bit 89" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB88 ,Set/Clear Enable Bit 88" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB87 ,Set/Clear Enable Bit 87" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB86 ,Set/Clear Enable Bit 86" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB85 ,Set/Clear Enable Bit 85" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB84 ,Set/Clear Enable Bit 84" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB83 ,Set/Clear Enable Bit 83" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB82 ,Set/Clear Enable Bit 82" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB81 ,Set/Clear Enable Bit 81" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB80 ,Set/Clear Enable Bit 80" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB79 ,Set/Clear Enable Bit 79" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB78 ,Set/Clear Enable Bit 78" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB77 ,Set/Clear Enable Bit 77" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB76 ,Set/Clear Enable Bit 76" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB75 ,Set/Clear Enable Bit 75" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB74 ,Set/Clear Enable Bit 74" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB73 ,Set/Clear Enable Bit 73" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB72 ,Set/Clear Enable Bit 72" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB71 ,Set/Clear Enable Bit 71" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB70 ,Set/Clear Enable Bit 70" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB69 ,Set/Clear Enable Bit 69" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB68 ,Set/Clear Enable Bit 68" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB67 ,Set/Clear Enable Bit 67" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB66 ,Set/Clear Enable Bit 66" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB65 ,Set/Clear Enable Bit 65" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB64 ,Set/Clear Enable Bit 64" "Disabled,Enabled" else hgroup.long 0x0108++0x03 hide.long 0x0 "GICD_SET/CLR_ENABLER2,Interrupt Set/Clear Enable Register 2" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x03) group.long 0x010C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER3,Interrupt Set/Clear Enable Register 3" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB127 ,Set/Clear Enable Bit 127" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB126 ,Set/Clear Enable Bit 126" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB125 ,Set/Clear Enable Bit 125" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB124 ,Set/Clear Enable Bit 124" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB123 ,Set/Clear Enable Bit 123" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB122 ,Set/Clear Enable Bit 122" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB121 ,Set/Clear Enable Bit 121" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB120 ,Set/Clear Enable Bit 120" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB119 ,Set/Clear Enable Bit 119" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB118 ,Set/Clear Enable Bit 118" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB117 ,Set/Clear Enable Bit 117" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB116 ,Set/Clear Enable Bit 116" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB115 ,Set/Clear Enable Bit 115" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB114 ,Set/Clear Enable Bit 114" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB113 ,Set/Clear Enable Bit 113" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB112 ,Set/Clear Enable Bit 112" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB111 ,Set/Clear Enable Bit 111" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB110 ,Set/Clear Enable Bit 110" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB109 ,Set/Clear Enable Bit 109" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB108 ,Set/Clear Enable Bit 108" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB107 ,Set/Clear Enable Bit 107" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB106 ,Set/Clear Enable Bit 106" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB105 ,Set/Clear Enable Bit 105" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB104 ,Set/Clear Enable Bit 104" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB103 ,Set/Clear Enable Bit 103" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB102 ,Set/Clear Enable Bit 102" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB101 ,Set/Clear Enable Bit 101" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB100 ,Set/Clear Enable Bit 100" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB99 ,Set/Clear Enable Bit 99" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB98 ,Set/Clear Enable Bit 98" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB97 ,Set/Clear Enable Bit 97" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB96 ,Set/Clear Enable Bit 96" "Disabled,Enabled" else hgroup.long 0x010C++0x03 hide.long 0x0 "GICD_SET/CLR_ENABLER3,Interrupt Set/Clear Enable Register 3" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x04) group.long 0x0110++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER4,Interrupt Set/Clear Enable Register 4" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB159 ,Set/Clear Enable Bit 159" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB158 ,Set/Clear Enable Bit 158" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB157 ,Set/Clear Enable Bit 157" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB156 ,Set/Clear Enable Bit 156" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB155 ,Set/Clear Enable Bit 155" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB154 ,Set/Clear Enable Bit 154" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB153 ,Set/Clear Enable Bit 153" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB152 ,Set/Clear Enable Bit 152" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB151 ,Set/Clear Enable Bit 151" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB150 ,Set/Clear Enable Bit 150" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB149 ,Set/Clear Enable Bit 149" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB148 ,Set/Clear Enable Bit 148" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB147 ,Set/Clear Enable Bit 147" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB146 ,Set/Clear Enable Bit 146" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB145 ,Set/Clear Enable Bit 145" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB144 ,Set/Clear Enable Bit 144" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB143 ,Set/Clear Enable Bit 143" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB142 ,Set/Clear Enable Bit 142" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB141 ,Set/Clear Enable Bit 141" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB140 ,Set/Clear Enable Bit 140" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB139 ,Set/Clear Enable Bit 139" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB138 ,Set/Clear Enable Bit 138" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB137 ,Set/Clear Enable Bit 137" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB136 ,Set/Clear Enable Bit 136" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB135 ,Set/Clear Enable Bit 135" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB134 ,Set/Clear Enable Bit 134" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB133 ,Set/Clear Enable Bit 133" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB132 ,Set/Clear Enable Bit 132" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB131 ,Set/Clear Enable Bit 131" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB130 ,Set/Clear Enable Bit 130" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB129 ,Set/Clear Enable Bit 129" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB128 ,Set/Clear Enable Bit 128" "Disabled,Enabled" else hgroup.long 0x0110++0x03 hide.long 0x0 "GICD_SET/CLR_ENABLER4,Interrupt Set/Clear Enable Register 4" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x05) group.long 0x0114++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER5,Interrupt Set/Clear Enable Register 5" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB191 ,Set/Clear Enable Bit 191" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB190 ,Set/Clear Enable Bit 190" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB189 ,Set/Clear Enable Bit 189" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB188 ,Set/Clear Enable Bit 188" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB187 ,Set/Clear Enable Bit 187" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB186 ,Set/Clear Enable Bit 186" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB185 ,Set/Clear Enable Bit 185" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB184 ,Set/Clear Enable Bit 184" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB183 ,Set/Clear Enable Bit 183" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB182 ,Set/Clear Enable Bit 182" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB181 ,Set/Clear Enable Bit 181" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB180 ,Set/Clear Enable Bit 180" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB179 ,Set/Clear Enable Bit 179" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB178 ,Set/Clear Enable Bit 178" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB177 ,Set/Clear Enable Bit 177" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB176 ,Set/Clear Enable Bit 176" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB175 ,Set/Clear Enable Bit 175" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB174 ,Set/Clear Enable Bit 174" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB173 ,Set/Clear Enable Bit 173" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB172 ,Set/Clear Enable Bit 172" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB171 ,Set/Clear Enable Bit 171" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB170 ,Set/Clear Enable Bit 170" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB169 ,Set/Clear Enable Bit 169" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB168 ,Set/Clear Enable Bit 168" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB167 ,Set/Clear Enable Bit 167" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB166 ,Set/Clear Enable Bit 166" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB165 ,Set/Clear Enable Bit 165" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB164 ,Set/Clear Enable Bit 164" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB163 ,Set/Clear Enable Bit 163" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB162 ,Set/Clear Enable Bit 162" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB161 ,Set/Clear Enable Bit 161" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB160 ,Set/Clear Enable Bit 160" "Disabled,Enabled" else hgroup.long 0x0114++0x03 hide.long 0x0 "GICD_SET/CLR_ENABLER5,Interrupt Set/Clear Enable Register 5" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x06) group.long 0x0118++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER6,Interrupt Set/Clear Enable Register 6" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB223 ,Set/Clear Enable Bit 223" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB222 ,Set/Clear Enable Bit 222" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB221 ,Set/Clear Enable Bit 221" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB220 ,Set/Clear Enable Bit 220" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB219 ,Set/Clear Enable Bit 219" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB218 ,Set/Clear Enable Bit 218" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB217 ,Set/Clear Enable Bit 217" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB216 ,Set/Clear Enable Bit 216" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB215 ,Set/Clear Enable Bit 215" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB214 ,Set/Clear Enable Bit 214" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB213 ,Set/Clear Enable Bit 213" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB212 ,Set/Clear Enable Bit 212" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB211 ,Set/Clear Enable Bit 211" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB210 ,Set/Clear Enable Bit 210" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB209 ,Set/Clear Enable Bit 209" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB208 ,Set/Clear Enable Bit 208" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB207 ,Set/Clear Enable Bit 207" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB206 ,Set/Clear Enable Bit 206" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB205 ,Set/Clear Enable Bit 205" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB204 ,Set/Clear Enable Bit 204" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB203 ,Set/Clear Enable Bit 203" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB202 ,Set/Clear Enable Bit 202" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB201 ,Set/Clear Enable Bit 201" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB200 ,Set/Clear Enable Bit 200" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB199 ,Set/Clear Enable Bit 199" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB198 ,Set/Clear Enable Bit 198" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB197 ,Set/Clear Enable Bit 197" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB196 ,Set/Clear Enable Bit 196" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB195 ,Set/Clear Enable Bit 195" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB194 ,Set/Clear Enable Bit 194" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB193 ,Set/Clear Enable Bit 193" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB192 ,Set/Clear Enable Bit 192" "Disabled,Enabled" else hgroup.long 0x0118++0x03 hide.long 0x0 "GICD_SET/CLR_ENABLER6,Interrupt Set/Clear Enable Register 6" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x07) group.long 0x011C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER7,Interrupt Set/Clear Enable Register 7" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB255 ,Set/Clear Enable Bit 255" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB254 ,Set/Clear Enable Bit 254" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB253 ,Set/Clear Enable Bit 253" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB252 ,Set/Clear Enable Bit 252" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB251 ,Set/Clear Enable Bit 251" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB250 ,Set/Clear Enable Bit 250" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB249 ,Set/Clear Enable Bit 249" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB248 ,Set/Clear Enable Bit 248" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB247 ,Set/Clear Enable Bit 247" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB246 ,Set/Clear Enable Bit 246" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB245 ,Set/Clear Enable Bit 245" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB244 ,Set/Clear Enable Bit 244" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB243 ,Set/Clear Enable Bit 243" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB242 ,Set/Clear Enable Bit 242" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB241 ,Set/Clear Enable Bit 241" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB240 ,Set/Clear Enable Bit 240" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB239 ,Set/Clear Enable Bit 239" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB238 ,Set/Clear Enable Bit 238" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB237 ,Set/Clear Enable Bit 237" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB236 ,Set/Clear Enable Bit 236" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB235 ,Set/Clear Enable Bit 235" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB234 ,Set/Clear Enable Bit 234" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB233 ,Set/Clear Enable Bit 233" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB232 ,Set/Clear Enable Bit 232" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB231 ,Set/Clear Enable Bit 231" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB230 ,Set/Clear Enable Bit 230" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB229 ,Set/Clear Enable Bit 229" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB228 ,Set/Clear Enable Bit 228" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB227 ,Set/Clear Enable Bit 227" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB226 ,Set/Clear Enable Bit 226" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB225 ,Set/Clear Enable Bit 225" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB224 ,Set/Clear Enable Bit 224" "Disabled,Enabled" else hgroup.long 0x011C++0x03 hide.long 0x0 "GICD_SET/CLR_ENABLER7,Interrupt Set/Clear Enable Register 7" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x08) group.long 0x0120++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER8,Interrupt Set/Clear Enable Register 8" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB287 ,Set/Clear Enable Bit 287" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB286 ,Set/Clear Enable Bit 286" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB285 ,Set/Clear Enable Bit 285" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB284 ,Set/Clear Enable Bit 284" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB283 ,Set/Clear Enable Bit 283" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB282 ,Set/Clear Enable Bit 282" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB281 ,Set/Clear Enable Bit 281" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB280 ,Set/Clear Enable Bit 280" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB279 ,Set/Clear Enable Bit 279" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB278 ,Set/Clear Enable Bit 278" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB277 ,Set/Clear Enable Bit 277" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB276 ,Set/Clear Enable Bit 276" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB275 ,Set/Clear Enable Bit 275" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB274 ,Set/Clear Enable Bit 274" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB273 ,Set/Clear Enable Bit 273" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB272 ,Set/Clear Enable Bit 272" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB271 ,Set/Clear Enable Bit 271" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB270 ,Set/Clear Enable Bit 270" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB269 ,Set/Clear Enable Bit 269" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB268 ,Set/Clear Enable Bit 268" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB267 ,Set/Clear Enable Bit 267" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB266 ,Set/Clear Enable Bit 266" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB265 ,Set/Clear Enable Bit 265" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB264 ,Set/Clear Enable Bit 264" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB263 ,Set/Clear Enable Bit 263" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB262 ,Set/Clear Enable Bit 262" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB261 ,Set/Clear Enable Bit 261" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB260 ,Set/Clear Enable Bit 260" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB259 ,Set/Clear Enable Bit 259" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB258 ,Set/Clear Enable Bit 258" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB257 ,Set/Clear Enable Bit 257" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB256 ,Set/Clear Enable Bit 256" "Disabled,Enabled" else hgroup.long 0x0120++0x03 hide.long 0x0 "GICD_SET/CLR_ENABLER8,Interrupt Set/Clear Enable Register 8" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x09) group.long 0x0124++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER9,Interrupt Set/Clear Enable Register 9" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB319 ,Set/Clear Enable Bit 319" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB318 ,Set/Clear Enable Bit 318" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB317 ,Set/Clear Enable Bit 317" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB316 ,Set/Clear Enable Bit 316" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB315 ,Set/Clear Enable Bit 315" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB314 ,Set/Clear Enable Bit 314" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB313 ,Set/Clear Enable Bit 313" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB312 ,Set/Clear Enable Bit 312" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB311 ,Set/Clear Enable Bit 311" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB310 ,Set/Clear Enable Bit 310" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB309 ,Set/Clear Enable Bit 309" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB308 ,Set/Clear Enable Bit 308" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB307 ,Set/Clear Enable Bit 307" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB306 ,Set/Clear Enable Bit 306" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB305 ,Set/Clear Enable Bit 305" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB304 ,Set/Clear Enable Bit 304" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB303 ,Set/Clear Enable Bit 303" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB302 ,Set/Clear Enable Bit 302" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB301 ,Set/Clear Enable Bit 301" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB300 ,Set/Clear Enable Bit 300" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB299 ,Set/Clear Enable Bit 299" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB298 ,Set/Clear Enable Bit 298" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB297 ,Set/Clear Enable Bit 297" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB296 ,Set/Clear Enable Bit 296" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB295 ,Set/Clear Enable Bit 295" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB294 ,Set/Clear Enable Bit 294" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB293 ,Set/Clear Enable Bit 293" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB292 ,Set/Clear Enable Bit 292" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB291 ,Set/Clear Enable Bit 291" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB290 ,Set/Clear Enable Bit 290" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB289 ,Set/Clear Enable Bit 289" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB288 ,Set/Clear Enable Bit 288" "Disabled,Enabled" else hgroup.long 0x0124++0x03 hide.long 0x0 "GICD_SET/CLR_ENABLER9,Interrupt Set/Clear Enable Register 9" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x0A) group.long 0x0128++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER10,Interrupt Set/Clear Enable Register 10" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB351 ,Set/Clear Enable Bit 351" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB350 ,Set/Clear Enable Bit 350" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB349 ,Set/Clear Enable Bit 349" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB348 ,Set/Clear Enable Bit 348" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB347 ,Set/Clear Enable Bit 347" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB346 ,Set/Clear Enable Bit 346" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB345 ,Set/Clear Enable Bit 345" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB344 ,Set/Clear Enable Bit 344" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB343 ,Set/Clear Enable Bit 343" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB342 ,Set/Clear Enable Bit 342" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB341 ,Set/Clear Enable Bit 341" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB340 ,Set/Clear Enable Bit 340" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB339 ,Set/Clear Enable Bit 339" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB338 ,Set/Clear Enable Bit 338" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB337 ,Set/Clear Enable Bit 337" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB336 ,Set/Clear Enable Bit 336" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB335 ,Set/Clear Enable Bit 335" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB334 ,Set/Clear Enable Bit 334" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB333 ,Set/Clear Enable Bit 333" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB332 ,Set/Clear Enable Bit 332" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB331 ,Set/Clear Enable Bit 331" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB330 ,Set/Clear Enable Bit 330" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB329 ,Set/Clear Enable Bit 329" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB328 ,Set/Clear Enable Bit 328" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB327 ,Set/Clear Enable Bit 327" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB326 ,Set/Clear Enable Bit 326" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB325 ,Set/Clear Enable Bit 325" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB324 ,Set/Clear Enable Bit 324" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB323 ,Set/Clear Enable Bit 323" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB322 ,Set/Clear Enable Bit 322" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB321 ,Set/Clear Enable Bit 321" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB320 ,Set/Clear Enable Bit 320" "Disabled,Enabled" else hgroup.long 0x0128++0x03 hide.long 0x0 "GICD_SET/CLR_ENABLER10,Interrupt Set/Clear Enable Register 10" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x0B) group.long 0x012C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER11,Interrupt Set/Clear Enable Register 11" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB383 ,Set/Clear Enable Bit 383" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB382 ,Set/Clear Enable Bit 382" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB381 ,Set/Clear Enable Bit 381" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB380 ,Set/Clear Enable Bit 380" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB379 ,Set/Clear Enable Bit 379" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB378 ,Set/Clear Enable Bit 378" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB377 ,Set/Clear Enable Bit 377" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB376 ,Set/Clear Enable Bit 376" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB375 ,Set/Clear Enable Bit 375" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB374 ,Set/Clear Enable Bit 374" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB373 ,Set/Clear Enable Bit 373" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB372 ,Set/Clear Enable Bit 372" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB371 ,Set/Clear Enable Bit 371" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB370 ,Set/Clear Enable Bit 370" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB369 ,Set/Clear Enable Bit 369" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB368 ,Set/Clear Enable Bit 368" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB367 ,Set/Clear Enable Bit 367" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB366 ,Set/Clear Enable Bit 366" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB365 ,Set/Clear Enable Bit 365" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB364 ,Set/Clear Enable Bit 364" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB363 ,Set/Clear Enable Bit 363" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB362 ,Set/Clear Enable Bit 362" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB361 ,Set/Clear Enable Bit 361" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB360 ,Set/Clear Enable Bit 360" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB359 ,Set/Clear Enable Bit 359" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB358 ,Set/Clear Enable Bit 358" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB357 ,Set/Clear Enable Bit 357" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB356 ,Set/Clear Enable Bit 356" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB355 ,Set/Clear Enable Bit 355" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB354 ,Set/Clear Enable Bit 354" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB353 ,Set/Clear Enable Bit 353" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB352 ,Set/Clear Enable Bit 352" "Disabled,Enabled" else hgroup.long 0x012C++0x03 hide.long 0x0 "GICD_SET/CLR_ENABLER11,Interrupt Set/Clear Enable Register 11" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x0C) group.long 0x0130++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER12,Interrupt Set/Clear Enable Register 12" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB415 ,Set/Clear Enable Bit 415" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB414 ,Set/Clear Enable Bit 414" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB413 ,Set/Clear Enable Bit 413" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB412 ,Set/Clear Enable Bit 412" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB411 ,Set/Clear Enable Bit 411" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB410 ,Set/Clear Enable Bit 410" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB409 ,Set/Clear Enable Bit 409" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB408 ,Set/Clear Enable Bit 408" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB407 ,Set/Clear Enable Bit 407" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB406 ,Set/Clear Enable Bit 406" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB405 ,Set/Clear Enable Bit 405" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB404 ,Set/Clear Enable Bit 404" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB403 ,Set/Clear Enable Bit 403" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB402 ,Set/Clear Enable Bit 402" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB401 ,Set/Clear Enable Bit 401" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB400 ,Set/Clear Enable Bit 400" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB399 ,Set/Clear Enable Bit 399" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB398 ,Set/Clear Enable Bit 398" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB397 ,Set/Clear Enable Bit 397" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB396 ,Set/Clear Enable Bit 396" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB395 ,Set/Clear Enable Bit 395" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB394 ,Set/Clear Enable Bit 394" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB393 ,Set/Clear Enable Bit 393" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB392 ,Set/Clear Enable Bit 392" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB391 ,Set/Clear Enable Bit 391" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB390 ,Set/Clear Enable Bit 390" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB389 ,Set/Clear Enable Bit 389" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB388 ,Set/Clear Enable Bit 388" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB387 ,Set/Clear Enable Bit 387" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB386 ,Set/Clear Enable Bit 386" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB385 ,Set/Clear Enable Bit 385" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB384 ,Set/Clear Enable Bit 384" "Disabled,Enabled" else hgroup.long 0x0130++0x03 hide.long 0x0 "GICD_SET/CLR_ENABLER12,Interrupt Set/Clear Enable Register 12" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x0D) group.long 0x0134++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER13,Interrupt Set/Clear Enable Register 13" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB447 ,Set/Clear Enable Bit 447" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB446 ,Set/Clear Enable Bit 446" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB445 ,Set/Clear Enable Bit 445" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB444 ,Set/Clear Enable Bit 444" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB443 ,Set/Clear Enable Bit 443" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB442 ,Set/Clear Enable Bit 442" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB441 ,Set/Clear Enable Bit 441" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB440 ,Set/Clear Enable Bit 440" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB439 ,Set/Clear Enable Bit 439" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB438 ,Set/Clear Enable Bit 438" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB437 ,Set/Clear Enable Bit 437" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB436 ,Set/Clear Enable Bit 436" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB435 ,Set/Clear Enable Bit 435" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB434 ,Set/Clear Enable Bit 434" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB433 ,Set/Clear Enable Bit 433" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB432 ,Set/Clear Enable Bit 432" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB431 ,Set/Clear Enable Bit 431" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB430 ,Set/Clear Enable Bit 430" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB429 ,Set/Clear Enable Bit 429" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB428 ,Set/Clear Enable Bit 428" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB427 ,Set/Clear Enable Bit 427" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB426 ,Set/Clear Enable Bit 426" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB425 ,Set/Clear Enable Bit 425" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB424 ,Set/Clear Enable Bit 424" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB423 ,Set/Clear Enable Bit 423" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB422 ,Set/Clear Enable Bit 422" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB421 ,Set/Clear Enable Bit 421" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB420 ,Set/Clear Enable Bit 420" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB419 ,Set/Clear Enable Bit 419" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB418 ,Set/Clear Enable Bit 418" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB417 ,Set/Clear Enable Bit 417" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB416 ,Set/Clear Enable Bit 416" "Disabled,Enabled" else hgroup.long 0x0134++0x03 hide.long 0x0 "GICD_SET/CLR_ENABLER13,Interrupt Set/Clear Enable Register 13" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x0E) group.long 0x0138++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER14,Interrupt Set/Clear Enable Register 14" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB479 ,Set/Clear Enable Bit 479" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB478 ,Set/Clear Enable Bit 478" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB477 ,Set/Clear Enable Bit 477" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB476 ,Set/Clear Enable Bit 476" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB475 ,Set/Clear Enable Bit 475" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB474 ,Set/Clear Enable Bit 474" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB473 ,Set/Clear Enable Bit 473" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB472 ,Set/Clear Enable Bit 472" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB471 ,Set/Clear Enable Bit 471" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB470 ,Set/Clear Enable Bit 470" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB469 ,Set/Clear Enable Bit 469" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB468 ,Set/Clear Enable Bit 468" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB467 ,Set/Clear Enable Bit 467" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB466 ,Set/Clear Enable Bit 466" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB465 ,Set/Clear Enable Bit 465" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB464 ,Set/Clear Enable Bit 464" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB463 ,Set/Clear Enable Bit 463" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB462 ,Set/Clear Enable Bit 462" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB461 ,Set/Clear Enable Bit 461" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB460 ,Set/Clear Enable Bit 460" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB459 ,Set/Clear Enable Bit 459" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB458 ,Set/Clear Enable Bit 458" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB457 ,Set/Clear Enable Bit 457" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB456 ,Set/Clear Enable Bit 456" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB455 ,Set/Clear Enable Bit 455" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB454 ,Set/Clear Enable Bit 454" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB453 ,Set/Clear Enable Bit 453" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB452 ,Set/Clear Enable Bit 452" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB451 ,Set/Clear Enable Bit 451" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB450 ,Set/Clear Enable Bit 450" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB449 ,Set/Clear Enable Bit 449" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB448 ,Set/Clear Enable Bit 448" "Disabled,Enabled" else hgroup.long 0x0138++0x03 hide.long 0x0 "GICD_SET/CLR_ENABLER14,Interrupt Set/Clear Enable Register 14" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x0F) group.long 0x013C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER15,Interrupt Set/Clear Enable Register 15" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB511 ,Set/Clear Enable Bit 511" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB510 ,Set/Clear Enable Bit 510" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB509 ,Set/Clear Enable Bit 509" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB508 ,Set/Clear Enable Bit 508" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB507 ,Set/Clear Enable Bit 507" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB506 ,Set/Clear Enable Bit 506" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB505 ,Set/Clear Enable Bit 505" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB504 ,Set/Clear Enable Bit 504" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB503 ,Set/Clear Enable Bit 503" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB502 ,Set/Clear Enable Bit 502" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB501 ,Set/Clear Enable Bit 501" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB500 ,Set/Clear Enable Bit 500" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB499 ,Set/Clear Enable Bit 499" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB498 ,Set/Clear Enable Bit 498" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB497 ,Set/Clear Enable Bit 497" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB496 ,Set/Clear Enable Bit 496" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB495 ,Set/Clear Enable Bit 495" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB494 ,Set/Clear Enable Bit 494" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB493 ,Set/Clear Enable Bit 493" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB492 ,Set/Clear Enable Bit 492" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB491 ,Set/Clear Enable Bit 491" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB490 ,Set/Clear Enable Bit 490" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB489 ,Set/Clear Enable Bit 489" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB488 ,Set/Clear Enable Bit 488" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB487 ,Set/Clear Enable Bit 487" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB486 ,Set/Clear Enable Bit 486" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB485 ,Set/Clear Enable Bit 485" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB484 ,Set/Clear Enable Bit 484" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB483 ,Set/Clear Enable Bit 483" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB482 ,Set/Clear Enable Bit 482" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB481 ,Set/Clear Enable Bit 481" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB480 ,Set/Clear Enable Bit 480" "Disabled,Enabled" else hgroup.long 0x013C++0x03 hide.long 0x0 "GICD_SET/CLR_ENABLER15,Interrupt Set/Clear Enable Register 15" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x10) group.long 0x0140++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER16,Interrupt Set/Clear Enable Register 16" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB543 ,Set/Clear Enable Bit 543" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB542 ,Set/Clear Enable Bit 542" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB541 ,Set/Clear Enable Bit 541" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB540 ,Set/Clear Enable Bit 540" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB539 ,Set/Clear Enable Bit 539" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB538 ,Set/Clear Enable Bit 538" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB537 ,Set/Clear Enable Bit 537" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB536 ,Set/Clear Enable Bit 536" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB535 ,Set/Clear Enable Bit 535" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB534 ,Set/Clear Enable Bit 534" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB533 ,Set/Clear Enable Bit 533" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB532 ,Set/Clear Enable Bit 532" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB531 ,Set/Clear Enable Bit 531" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB530 ,Set/Clear Enable Bit 530" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB529 ,Set/Clear Enable Bit 529" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB528 ,Set/Clear Enable Bit 528" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB527 ,Set/Clear Enable Bit 527" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB526 ,Set/Clear Enable Bit 526" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB525 ,Set/Clear Enable Bit 525" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB524 ,Set/Clear Enable Bit 524" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB523 ,Set/Clear Enable Bit 523" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB522 ,Set/Clear Enable Bit 522" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB521 ,Set/Clear Enable Bit 521" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB520 ,Set/Clear Enable Bit 520" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB519 ,Set/Clear Enable Bit 519" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB518 ,Set/Clear Enable Bit 518" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB517 ,Set/Clear Enable Bit 517" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB516 ,Set/Clear Enable Bit 516" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB515 ,Set/Clear Enable Bit 515" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB514 ,Set/Clear Enable Bit 514" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB513 ,Set/Clear Enable Bit 513" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB512 ,Set/Clear Enable Bit 512" "Disabled,Enabled" else hgroup.long 0x0140++0x03 hide.long 0x0 "GICD_SET/CLR_ENABLER16,Interrupt Set/Clear Enable Register 16" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x11) group.long 0x0144++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER17,Interrupt Set/Clear Enable Register 17" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB575 ,Set/Clear Enable Bit 575" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB574 ,Set/Clear Enable Bit 574" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB573 ,Set/Clear Enable Bit 573" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB572 ,Set/Clear Enable Bit 572" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB571 ,Set/Clear Enable Bit 571" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB570 ,Set/Clear Enable Bit 570" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB569 ,Set/Clear Enable Bit 569" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB568 ,Set/Clear Enable Bit 568" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB567 ,Set/Clear Enable Bit 567" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB566 ,Set/Clear Enable Bit 566" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB565 ,Set/Clear Enable Bit 565" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB564 ,Set/Clear Enable Bit 564" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB563 ,Set/Clear Enable Bit 563" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB562 ,Set/Clear Enable Bit 562" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB561 ,Set/Clear Enable Bit 561" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB560 ,Set/Clear Enable Bit 560" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB559 ,Set/Clear Enable Bit 559" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB558 ,Set/Clear Enable Bit 558" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB557 ,Set/Clear Enable Bit 557" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB556 ,Set/Clear Enable Bit 556" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB555 ,Set/Clear Enable Bit 555" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB554 ,Set/Clear Enable Bit 554" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB553 ,Set/Clear Enable Bit 553" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB552 ,Set/Clear Enable Bit 552" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB551 ,Set/Clear Enable Bit 551" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB550 ,Set/Clear Enable Bit 550" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB549 ,Set/Clear Enable Bit 549" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB548 ,Set/Clear Enable Bit 548" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB547 ,Set/Clear Enable Bit 547" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB546 ,Set/Clear Enable Bit 546" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB545 ,Set/Clear Enable Bit 545" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB544 ,Set/Clear Enable Bit 544" "Disabled,Enabled" else hgroup.long 0x0144++0x03 hide.long 0x0 "GICD_SET/CLR_ENABLER17,Interrupt Set/Clear Enable Register 17" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x12) group.long 0x0148++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER18,Interrupt Set/Clear Enable Register 18" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB607 ,Set/Clear Enable Bit 607" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB606 ,Set/Clear Enable Bit 606" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB605 ,Set/Clear Enable Bit 605" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB604 ,Set/Clear Enable Bit 604" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB603 ,Set/Clear Enable Bit 603" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB602 ,Set/Clear Enable Bit 602" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB601 ,Set/Clear Enable Bit 601" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB600 ,Set/Clear Enable Bit 600" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB599 ,Set/Clear Enable Bit 599" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB598 ,Set/Clear Enable Bit 598" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB597 ,Set/Clear Enable Bit 597" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB596 ,Set/Clear Enable Bit 596" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB595 ,Set/Clear Enable Bit 595" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB594 ,Set/Clear Enable Bit 594" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB593 ,Set/Clear Enable Bit 593" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB592 ,Set/Clear Enable Bit 592" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB591 ,Set/Clear Enable Bit 591" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB590 ,Set/Clear Enable Bit 590" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB589 ,Set/Clear Enable Bit 589" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB588 ,Set/Clear Enable Bit 588" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB587 ,Set/Clear Enable Bit 587" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB586 ,Set/Clear Enable Bit 586" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB585 ,Set/Clear Enable Bit 585" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB584 ,Set/Clear Enable Bit 584" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB583 ,Set/Clear Enable Bit 583" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB582 ,Set/Clear Enable Bit 582" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB581 ,Set/Clear Enable Bit 581" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB580 ,Set/Clear Enable Bit 580" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB579 ,Set/Clear Enable Bit 579" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB578 ,Set/Clear Enable Bit 578" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB577 ,Set/Clear Enable Bit 577" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB576 ,Set/Clear Enable Bit 576" "Disabled,Enabled" else hgroup.long 0x0148++0x03 hide.long 0x0 "GICD_SET/CLR_ENABLER18,Interrupt Set/Clear Enable Register 18" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x13) group.long 0x014C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER19,Interrupt Set/Clear Enable Register 19" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB639 ,Set/Clear Enable Bit 639" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB638 ,Set/Clear Enable Bit 638" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB637 ,Set/Clear Enable Bit 637" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB636 ,Set/Clear Enable Bit 636" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB635 ,Set/Clear Enable Bit 635" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB634 ,Set/Clear Enable Bit 634" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB633 ,Set/Clear Enable Bit 633" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB632 ,Set/Clear Enable Bit 632" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB631 ,Set/Clear Enable Bit 631" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB630 ,Set/Clear Enable Bit 630" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB629 ,Set/Clear Enable Bit 629" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB628 ,Set/Clear Enable Bit 628" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB627 ,Set/Clear Enable Bit 627" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB626 ,Set/Clear Enable Bit 626" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB625 ,Set/Clear Enable Bit 625" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB624 ,Set/Clear Enable Bit 624" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB623 ,Set/Clear Enable Bit 623" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB622 ,Set/Clear Enable Bit 622" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB621 ,Set/Clear Enable Bit 621" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB620 ,Set/Clear Enable Bit 620" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB619 ,Set/Clear Enable Bit 619" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB618 ,Set/Clear Enable Bit 618" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB617 ,Set/Clear Enable Bit 617" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB616 ,Set/Clear Enable Bit 616" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB615 ,Set/Clear Enable Bit 615" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB614 ,Set/Clear Enable Bit 614" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB613 ,Set/Clear Enable Bit 613" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB612 ,Set/Clear Enable Bit 612" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB611 ,Set/Clear Enable Bit 611" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB610 ,Set/Clear Enable Bit 610" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB609 ,Set/Clear Enable Bit 609" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB608 ,Set/Clear Enable Bit 608" "Disabled,Enabled" else hgroup.long 0x014C++0x03 hide.long 0x0 "GICD_SET/CLR_ENABLER19,Interrupt Set/Clear Enable Register 19" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x14) group.long 0x0150++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER20,Interrupt Set/Clear Enable Register 20" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB671 ,Set/Clear Enable Bit 671" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB670 ,Set/Clear Enable Bit 670" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB669 ,Set/Clear Enable Bit 669" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB668 ,Set/Clear Enable Bit 668" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB667 ,Set/Clear Enable Bit 667" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB666 ,Set/Clear Enable Bit 666" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB665 ,Set/Clear Enable Bit 665" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB664 ,Set/Clear Enable Bit 664" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB663 ,Set/Clear Enable Bit 663" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB662 ,Set/Clear Enable Bit 662" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB661 ,Set/Clear Enable Bit 661" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB660 ,Set/Clear Enable Bit 660" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB659 ,Set/Clear Enable Bit 659" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB658 ,Set/Clear Enable Bit 658" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB657 ,Set/Clear Enable Bit 657" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB656 ,Set/Clear Enable Bit 656" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB655 ,Set/Clear Enable Bit 655" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB654 ,Set/Clear Enable Bit 654" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB653 ,Set/Clear Enable Bit 653" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB652 ,Set/Clear Enable Bit 652" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB651 ,Set/Clear Enable Bit 651" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB650 ,Set/Clear Enable Bit 650" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB649 ,Set/Clear Enable Bit 649" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB648 ,Set/Clear Enable Bit 648" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB647 ,Set/Clear Enable Bit 647" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB646 ,Set/Clear Enable Bit 646" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB645 ,Set/Clear Enable Bit 645" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB644 ,Set/Clear Enable Bit 644" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB643 ,Set/Clear Enable Bit 643" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB642 ,Set/Clear Enable Bit 642" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB641 ,Set/Clear Enable Bit 641" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB640 ,Set/Clear Enable Bit 640" "Disabled,Enabled" else hgroup.long 0x0150++0x03 hide.long 0x0 "GICD_SET/CLR_ENABLER20,Interrupt Set/Clear Enable Register 20" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x15) group.long 0x0154++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER21,Interrupt Set/Clear Enable Register 21" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB703 ,Set/Clear Enable Bit 703" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB702 ,Set/Clear Enable Bit 702" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB701 ,Set/Clear Enable Bit 701" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB700 ,Set/Clear Enable Bit 700" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB699 ,Set/Clear Enable Bit 699" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB698 ,Set/Clear Enable Bit 698" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB697 ,Set/Clear Enable Bit 697" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB696 ,Set/Clear Enable Bit 696" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB695 ,Set/Clear Enable Bit 695" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB694 ,Set/Clear Enable Bit 694" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB693 ,Set/Clear Enable Bit 693" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB692 ,Set/Clear Enable Bit 692" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB691 ,Set/Clear Enable Bit 691" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB690 ,Set/Clear Enable Bit 690" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB689 ,Set/Clear Enable Bit 689" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB688 ,Set/Clear Enable Bit 688" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB687 ,Set/Clear Enable Bit 687" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB686 ,Set/Clear Enable Bit 686" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB685 ,Set/Clear Enable Bit 685" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB684 ,Set/Clear Enable Bit 684" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB683 ,Set/Clear Enable Bit 683" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB682 ,Set/Clear Enable Bit 682" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB681 ,Set/Clear Enable Bit 681" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB680 ,Set/Clear Enable Bit 680" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB679 ,Set/Clear Enable Bit 679" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB678 ,Set/Clear Enable Bit 678" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB677 ,Set/Clear Enable Bit 677" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB676 ,Set/Clear Enable Bit 676" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB675 ,Set/Clear Enable Bit 675" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB674 ,Set/Clear Enable Bit 674" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB673 ,Set/Clear Enable Bit 673" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB672 ,Set/Clear Enable Bit 672" "Disabled,Enabled" else hgroup.long 0x0154++0x03 hide.long 0x0 "GICD_SET/CLR_ENABLER21,Interrupt Set/Clear Enable Register 21" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x16) group.long 0x0158++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER22,Interrupt Set/Clear Enable Register 22" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB735 ,Set/Clear Enable Bit 735" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB734 ,Set/Clear Enable Bit 734" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB733 ,Set/Clear Enable Bit 733" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB732 ,Set/Clear Enable Bit 732" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB731 ,Set/Clear Enable Bit 731" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB730 ,Set/Clear Enable Bit 730" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB729 ,Set/Clear Enable Bit 729" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB728 ,Set/Clear Enable Bit 728" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB727 ,Set/Clear Enable Bit 727" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB726 ,Set/Clear Enable Bit 726" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB725 ,Set/Clear Enable Bit 725" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB724 ,Set/Clear Enable Bit 724" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB723 ,Set/Clear Enable Bit 723" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB722 ,Set/Clear Enable Bit 722" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB721 ,Set/Clear Enable Bit 721" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB720 ,Set/Clear Enable Bit 720" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB719 ,Set/Clear Enable Bit 719" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB718 ,Set/Clear Enable Bit 718" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB717 ,Set/Clear Enable Bit 717" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB716 ,Set/Clear Enable Bit 716" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB715 ,Set/Clear Enable Bit 715" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB714 ,Set/Clear Enable Bit 714" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB713 ,Set/Clear Enable Bit 713" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB712 ,Set/Clear Enable Bit 712" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB711 ,Set/Clear Enable Bit 711" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB710 ,Set/Clear Enable Bit 710" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB709 ,Set/Clear Enable Bit 709" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB708 ,Set/Clear Enable Bit 708" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB707 ,Set/Clear Enable Bit 707" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB706 ,Set/Clear Enable Bit 706" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB705 ,Set/Clear Enable Bit 705" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB704 ,Set/Clear Enable Bit 704" "Disabled,Enabled" else hgroup.long 0x0158++0x03 hide.long 0x0 "GICD_SET/CLR_ENABLER22,Interrupt Set/Clear Enable Register 22" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x17) group.long 0x015C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER23,Interrupt Set/Clear Enable Register 23" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB767 ,Set/Clear Enable Bit 767" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB766 ,Set/Clear Enable Bit 766" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB765 ,Set/Clear Enable Bit 765" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB764 ,Set/Clear Enable Bit 764" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB763 ,Set/Clear Enable Bit 763" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB762 ,Set/Clear Enable Bit 762" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB761 ,Set/Clear Enable Bit 761" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB760 ,Set/Clear Enable Bit 760" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB759 ,Set/Clear Enable Bit 759" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB758 ,Set/Clear Enable Bit 758" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB757 ,Set/Clear Enable Bit 757" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB756 ,Set/Clear Enable Bit 756" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB755 ,Set/Clear Enable Bit 755" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB754 ,Set/Clear Enable Bit 754" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB753 ,Set/Clear Enable Bit 753" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB752 ,Set/Clear Enable Bit 752" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB751 ,Set/Clear Enable Bit 751" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB750 ,Set/Clear Enable Bit 750" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB749 ,Set/Clear Enable Bit 749" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB748 ,Set/Clear Enable Bit 748" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB747 ,Set/Clear Enable Bit 747" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB746 ,Set/Clear Enable Bit 746" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB745 ,Set/Clear Enable Bit 745" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB744 ,Set/Clear Enable Bit 744" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB743 ,Set/Clear Enable Bit 743" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB742 ,Set/Clear Enable Bit 742" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB741 ,Set/Clear Enable Bit 741" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB740 ,Set/Clear Enable Bit 740" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB739 ,Set/Clear Enable Bit 739" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB738 ,Set/Clear Enable Bit 738" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB737 ,Set/Clear Enable Bit 737" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB736 ,Set/Clear Enable Bit 736" "Disabled,Enabled" else hgroup.long 0x015C++0x03 hide.long 0x0 "GICD_SET/CLR_ENABLER23,Interrupt Set/Clear Enable Register 23" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x18) group.long 0x0160++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER24,Interrupt Set/Clear Enable Register 24" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB799 ,Set/Clear Enable Bit 799" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB798 ,Set/Clear Enable Bit 798" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB797 ,Set/Clear Enable Bit 797" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB796 ,Set/Clear Enable Bit 796" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB795 ,Set/Clear Enable Bit 795" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB794 ,Set/Clear Enable Bit 794" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB793 ,Set/Clear Enable Bit 793" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB792 ,Set/Clear Enable Bit 792" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB791 ,Set/Clear Enable Bit 791" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB790 ,Set/Clear Enable Bit 790" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB789 ,Set/Clear Enable Bit 789" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB788 ,Set/Clear Enable Bit 788" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB787 ,Set/Clear Enable Bit 787" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB786 ,Set/Clear Enable Bit 786" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB785 ,Set/Clear Enable Bit 785" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB784 ,Set/Clear Enable Bit 784" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB783 ,Set/Clear Enable Bit 783" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB782 ,Set/Clear Enable Bit 782" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB781 ,Set/Clear Enable Bit 781" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB780 ,Set/Clear Enable Bit 780" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB779 ,Set/Clear Enable Bit 779" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB778 ,Set/Clear Enable Bit 778" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB777 ,Set/Clear Enable Bit 777" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB776 ,Set/Clear Enable Bit 776" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB775 ,Set/Clear Enable Bit 775" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB774 ,Set/Clear Enable Bit 774" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB773 ,Set/Clear Enable Bit 773" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB772 ,Set/Clear Enable Bit 772" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB771 ,Set/Clear Enable Bit 771" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB770 ,Set/Clear Enable Bit 770" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB769 ,Set/Clear Enable Bit 769" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB768 ,Set/Clear Enable Bit 768" "Disabled,Enabled" else hgroup.long 0x0160++0x03 hide.long 0x0 "GICD_SET/CLR_ENABLER24,Interrupt Set/Clear Enable Register 24" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x19) group.long 0x0164++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER25,Interrupt Set/Clear Enable Register 25" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB831 ,Set/Clear Enable Bit 831" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB830 ,Set/Clear Enable Bit 830" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB829 ,Set/Clear Enable Bit 829" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB828 ,Set/Clear Enable Bit 828" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB827 ,Set/Clear Enable Bit 827" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB826 ,Set/Clear Enable Bit 826" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB825 ,Set/Clear Enable Bit 825" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB824 ,Set/Clear Enable Bit 824" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB823 ,Set/Clear Enable Bit 823" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB822 ,Set/Clear Enable Bit 822" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB821 ,Set/Clear Enable Bit 821" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB820 ,Set/Clear Enable Bit 820" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB819 ,Set/Clear Enable Bit 819" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB818 ,Set/Clear Enable Bit 818" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB817 ,Set/Clear Enable Bit 817" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB816 ,Set/Clear Enable Bit 816" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB815 ,Set/Clear Enable Bit 815" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB814 ,Set/Clear Enable Bit 814" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB813 ,Set/Clear Enable Bit 813" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB812 ,Set/Clear Enable Bit 812" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB811 ,Set/Clear Enable Bit 811" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB810 ,Set/Clear Enable Bit 810" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB809 ,Set/Clear Enable Bit 809" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB808 ,Set/Clear Enable Bit 808" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB807 ,Set/Clear Enable Bit 807" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB806 ,Set/Clear Enable Bit 806" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB805 ,Set/Clear Enable Bit 805" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB804 ,Set/Clear Enable Bit 804" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB803 ,Set/Clear Enable Bit 803" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB802 ,Set/Clear Enable Bit 802" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB801 ,Set/Clear Enable Bit 801" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB800 ,Set/Clear Enable Bit 800" "Disabled,Enabled" else hgroup.long 0x0164++0x03 hide.long 0x0 "GICD_SET/CLR_ENABLER25,Interrupt Set/Clear Enable Register 25" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x1A) group.long 0x0168++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER26,Interrupt Set/Clear Enable Register 26" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB863 ,Set/Clear Enable Bit 863" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB862 ,Set/Clear Enable Bit 862" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB861 ,Set/Clear Enable Bit 861" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB860 ,Set/Clear Enable Bit 860" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB859 ,Set/Clear Enable Bit 859" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB858 ,Set/Clear Enable Bit 858" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB857 ,Set/Clear Enable Bit 857" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB856 ,Set/Clear Enable Bit 856" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB855 ,Set/Clear Enable Bit 855" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB854 ,Set/Clear Enable Bit 854" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB853 ,Set/Clear Enable Bit 853" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB852 ,Set/Clear Enable Bit 852" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB851 ,Set/Clear Enable Bit 851" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB850 ,Set/Clear Enable Bit 850" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB849 ,Set/Clear Enable Bit 849" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB848 ,Set/Clear Enable Bit 848" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB847 ,Set/Clear Enable Bit 847" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB846 ,Set/Clear Enable Bit 846" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB845 ,Set/Clear Enable Bit 845" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB844 ,Set/Clear Enable Bit 844" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB843 ,Set/Clear Enable Bit 843" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB842 ,Set/Clear Enable Bit 842" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB841 ,Set/Clear Enable Bit 841" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB840 ,Set/Clear Enable Bit 840" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB839 ,Set/Clear Enable Bit 839" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB838 ,Set/Clear Enable Bit 838" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB837 ,Set/Clear Enable Bit 837" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB836 ,Set/Clear Enable Bit 836" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB835 ,Set/Clear Enable Bit 835" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB834 ,Set/Clear Enable Bit 834" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB833 ,Set/Clear Enable Bit 833" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB832 ,Set/Clear Enable Bit 832" "Disabled,Enabled" else hgroup.long 0x0168++0x03 hide.long 0x0 "GICD_SET/CLR_ENABLER26,Interrupt Set/Clear Enable Register 26" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x1B) group.long 0x016C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER27,Interrupt Set/Clear Enable Register 27" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB895 ,Set/Clear Enable Bit 895" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB894 ,Set/Clear Enable Bit 894" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB893 ,Set/Clear Enable Bit 893" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB892 ,Set/Clear Enable Bit 892" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB891 ,Set/Clear Enable Bit 891" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB890 ,Set/Clear Enable Bit 890" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB889 ,Set/Clear Enable Bit 889" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB888 ,Set/Clear Enable Bit 888" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB887 ,Set/Clear Enable Bit 887" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB886 ,Set/Clear Enable Bit 886" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB885 ,Set/Clear Enable Bit 885" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB884 ,Set/Clear Enable Bit 884" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB883 ,Set/Clear Enable Bit 883" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB882 ,Set/Clear Enable Bit 882" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB881 ,Set/Clear Enable Bit 881" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB880 ,Set/Clear Enable Bit 880" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB879 ,Set/Clear Enable Bit 879" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB878 ,Set/Clear Enable Bit 878" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB877 ,Set/Clear Enable Bit 877" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB876 ,Set/Clear Enable Bit 876" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB875 ,Set/Clear Enable Bit 875" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB874 ,Set/Clear Enable Bit 874" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB873 ,Set/Clear Enable Bit 873" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB872 ,Set/Clear Enable Bit 872" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB871 ,Set/Clear Enable Bit 871" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB870 ,Set/Clear Enable Bit 870" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB869 ,Set/Clear Enable Bit 869" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB868 ,Set/Clear Enable Bit 868" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB867 ,Set/Clear Enable Bit 867" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB866 ,Set/Clear Enable Bit 866" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB865 ,Set/Clear Enable Bit 865" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB864 ,Set/Clear Enable Bit 864" "Disabled,Enabled" else hgroup.long 0x016C++0x03 hide.long 0x0 "GICD_SET/CLR_ENABLER27,Interrupt Set/Clear Enable Register 27" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x1C) group.long 0x0170++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER28,Interrupt Set/Clear Enable Register 28" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB927 ,Set/Clear Enable Bit 927" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB926 ,Set/Clear Enable Bit 926" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB925 ,Set/Clear Enable Bit 925" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB924 ,Set/Clear Enable Bit 924" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB923 ,Set/Clear Enable Bit 923" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB922 ,Set/Clear Enable Bit 922" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB921 ,Set/Clear Enable Bit 921" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB920 ,Set/Clear Enable Bit 920" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB919 ,Set/Clear Enable Bit 919" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB918 ,Set/Clear Enable Bit 918" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB917 ,Set/Clear Enable Bit 917" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB916 ,Set/Clear Enable Bit 916" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB915 ,Set/Clear Enable Bit 915" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB914 ,Set/Clear Enable Bit 914" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB913 ,Set/Clear Enable Bit 913" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB912 ,Set/Clear Enable Bit 912" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB911 ,Set/Clear Enable Bit 911" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB910 ,Set/Clear Enable Bit 910" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB909 ,Set/Clear Enable Bit 909" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB908 ,Set/Clear Enable Bit 908" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB907 ,Set/Clear Enable Bit 907" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB906 ,Set/Clear Enable Bit 906" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB905 ,Set/Clear Enable Bit 905" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB904 ,Set/Clear Enable Bit 904" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB903 ,Set/Clear Enable Bit 903" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB902 ,Set/Clear Enable Bit 902" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB901 ,Set/Clear Enable Bit 901" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB900 ,Set/Clear Enable Bit 900" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB899 ,Set/Clear Enable Bit 899" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB898 ,Set/Clear Enable Bit 898" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB897 ,Set/Clear Enable Bit 897" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB896 ,Set/Clear Enable Bit 896" "Disabled,Enabled" else hgroup.long 0x0170++0x03 hide.long 0x0 "GICD_SET/CLR_ENABLER28,Interrupt Set/Clear Enable Register 28" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x1D) group.long 0x0174++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER29,Interrupt Set/Clear Enable Register 29" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB959 ,Set/Clear Enable Bit 959" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB958 ,Set/Clear Enable Bit 958" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB957 ,Set/Clear Enable Bit 957" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB956 ,Set/Clear Enable Bit 956" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB955 ,Set/Clear Enable Bit 955" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB954 ,Set/Clear Enable Bit 954" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB953 ,Set/Clear Enable Bit 953" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB952 ,Set/Clear Enable Bit 952" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB951 ,Set/Clear Enable Bit 951" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB950 ,Set/Clear Enable Bit 950" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB949 ,Set/Clear Enable Bit 949" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB948 ,Set/Clear Enable Bit 948" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB947 ,Set/Clear Enable Bit 947" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB946 ,Set/Clear Enable Bit 946" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB945 ,Set/Clear Enable Bit 945" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB944 ,Set/Clear Enable Bit 944" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB943 ,Set/Clear Enable Bit 943" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB942 ,Set/Clear Enable Bit 942" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB941 ,Set/Clear Enable Bit 941" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB940 ,Set/Clear Enable Bit 940" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB939 ,Set/Clear Enable Bit 939" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB938 ,Set/Clear Enable Bit 938" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB937 ,Set/Clear Enable Bit 937" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB936 ,Set/Clear Enable Bit 936" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB935 ,Set/Clear Enable Bit 935" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB934 ,Set/Clear Enable Bit 934" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB933 ,Set/Clear Enable Bit 933" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB932 ,Set/Clear Enable Bit 932" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB931 ,Set/Clear Enable Bit 931" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB930 ,Set/Clear Enable Bit 930" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB929 ,Set/Clear Enable Bit 929" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB928 ,Set/Clear Enable Bit 928" "Disabled,Enabled" else hgroup.long 0x0174++0x03 hide.long 0x0 "GICD_SET/CLR_ENABLER29,Interrupt Set/Clear Enable Register 29" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x1E) group.long 0x0178++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER30,Interrupt Set/Clear Enable Register 30" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB991 ,Set/Clear Enable Bit 991" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB990 ,Set/Clear Enable Bit 990" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB989 ,Set/Clear Enable Bit 989" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB988 ,Set/Clear Enable Bit 988" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB987 ,Set/Clear Enable Bit 987" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB986 ,Set/Clear Enable Bit 986" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB985 ,Set/Clear Enable Bit 985" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB984 ,Set/Clear Enable Bit 984" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB983 ,Set/Clear Enable Bit 983" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB982 ,Set/Clear Enable Bit 982" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB981 ,Set/Clear Enable Bit 981" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB980 ,Set/Clear Enable Bit 980" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB979 ,Set/Clear Enable Bit 979" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB978 ,Set/Clear Enable Bit 978" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB977 ,Set/Clear Enable Bit 977" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB976 ,Set/Clear Enable Bit 976" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB975 ,Set/Clear Enable Bit 975" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB974 ,Set/Clear Enable Bit 974" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB973 ,Set/Clear Enable Bit 973" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB972 ,Set/Clear Enable Bit 972" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB971 ,Set/Clear Enable Bit 971" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB970 ,Set/Clear Enable Bit 970" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB969 ,Set/Clear Enable Bit 969" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB968 ,Set/Clear Enable Bit 968" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB967 ,Set/Clear Enable Bit 967" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB966 ,Set/Clear Enable Bit 966" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB965 ,Set/Clear Enable Bit 965" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB964 ,Set/Clear Enable Bit 964" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB963 ,Set/Clear Enable Bit 963" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB962 ,Set/Clear Enable Bit 962" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB961 ,Set/Clear Enable Bit 961" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB960 ,Set/Clear Enable Bit 960" "Disabled,Enabled" else hgroup.long 0x0178++0x03 hide.long 0x0 "GICD_SET/CLR_ENABLER30,Interrupt Set/Clear Enable Register 30" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)==0x1F) group.long 0x017C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER31,Interrupt Set/Clear Enable Register 31" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB1019 ,Set/Clear Enable Bit 1019" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB1018 ,Set/Clear Enable Bit 1018" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB1017 ,Set/Clear Enable Bit 1017" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB1016 ,Set/Clear Enable Bit 1016" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB1015 ,Set/Clear Enable Bit 1015" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB1014 ,Set/Clear Enable Bit 1014" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB1013 ,Set/Clear Enable Bit 1013" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB1012 ,Set/Clear Enable Bit 1012" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB1011 ,Set/Clear Enable Bit 1011" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB1010 ,Set/Clear Enable Bit 1010" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB1009 ,Set/Clear Enable Bit 1009" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB1008 ,Set/Clear Enable Bit 1008" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB1007 ,Set/Clear Enable Bit 1007" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB1006 ,Set/Clear Enable Bit 1006" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB1005 ,Set/Clear Enable Bit 1005" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB1004 ,Set/Clear Enable Bit 1004" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB1003 ,Set/Clear Enable Bit 1003" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB1002 ,Set/Clear Enable Bit 1002" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB1001 ,Set/Clear Enable Bit 1001" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB1000 ,Set/Clear Enable Bit 1000" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB999 ,Set/Clear Enable Bit 999" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB998 ,Set/Clear Enable Bit 998" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB997 ,Set/Clear Enable Bit 997" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB996 ,Set/Clear Enable Bit 996" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB995 ,Set/Clear Enable Bit 995" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB994 ,Set/Clear Enable Bit 994" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB993 ,Set/Clear Enable Bit 993" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB992 ,Set/Clear Enable Bit 992" "Disabled,Enabled" else hgroup.long 0x017C++0x03 hide.long 0x0 "GICD_SET/CLR_ENABLER31,Interrupt Set/Clear Enable Register 31" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif tree.end width 22. tree "Set/Clear Pending Registers" group.long 0x0200++0x03 line.long 0x0 "GICD_SET/CLR_PENDR0,Interrupt Set/Clear Pending Register 0" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND31 ,Set/Clear Pending Bit 31" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND30 ,Set/Clear Pending Bit 30" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND29 ,Set/Clear Pending Bit 29" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND28 ,Set/Clear Pending Bit 28" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND27 ,Set/Clear Pending Bit 27" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND26 ,Set/Clear Pending Bit 26" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND25 ,Set/Clear Pending Bit 25" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND24 ,Set/Clear Pending Bit 24" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND23 ,Set/Clear Pending Bit 23" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND22 ,Set/Clear Pending Bit 22" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND21 ,Set/Clear Pending Bit 21" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND20 ,Set/Clear Pending Bit 20" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND19 ,Set/Clear Pending Bit 19" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND18 ,Set/Clear Pending Bit 18" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND17 ,Set/Clear Pending Bit 17" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND16 ,Set/Clear Pending Bit 16" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND15 ,Set/Clear Pending Bit 15" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND14 ,Set/Clear Pending Bit 14" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND13 ,Set/Clear Pending Bit 13" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND12 ,Set/Clear Pending Bit 12" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND11 ,Set/Clear Pending Bit 11" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND10 ,Set/Clear Pending Bit 10" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND9 ,Set/Clear Pending Bit 9" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND8 ,Set/Clear Pending Bit 8" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND7 ,Set/Clear Pending Bit 7" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND6 ,Set/Clear Pending Bit 6" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND5 ,Set/Clear Pending Bit 5" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND4 ,Set/Clear Pending Bit 4" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND3 ,Set/Clear Pending Bit 3" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND2 ,Set/Clear Pending Bit 2" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND1 ,Set/Clear Pending Bit 1" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND0 ,Set/Clear Pending Bit 0" "Not pending,Pending" if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x01) group.long 0x0204++0x03 line.long 0x0 "GICD_SET/CLR_PENDR1,Interrupt Set/Clear Pending Register 1" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND63 ,Set/Clear Pending Bit 63" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND62 ,Set/Clear Pending Bit 62" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND61 ,Set/Clear Pending Bit 61" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND60 ,Set/Clear Pending Bit 60" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND59 ,Set/Clear Pending Bit 59" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND58 ,Set/Clear Pending Bit 58" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND57 ,Set/Clear Pending Bit 57" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND56 ,Set/Clear Pending Bit 56" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND55 ,Set/Clear Pending Bit 55" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND54 ,Set/Clear Pending Bit 54" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND53 ,Set/Clear Pending Bit 53" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND52 ,Set/Clear Pending Bit 52" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND51 ,Set/Clear Pending Bit 51" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND50 ,Set/Clear Pending Bit 50" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND49 ,Set/Clear Pending Bit 49" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND48 ,Set/Clear Pending Bit 48" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND47 ,Set/Clear Pending Bit 47" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND46 ,Set/Clear Pending Bit 46" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND45 ,Set/Clear Pending Bit 45" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND44 ,Set/Clear Pending Bit 44" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND43 ,Set/Clear Pending Bit 43" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND42 ,Set/Clear Pending Bit 42" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND41 ,Set/Clear Pending Bit 41" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND40 ,Set/Clear Pending Bit 40" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND39 ,Set/Clear Pending Bit 39" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND38 ,Set/Clear Pending Bit 38" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND37 ,Set/Clear Pending Bit 37" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND36 ,Set/Clear Pending Bit 36" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND35 ,Set/Clear Pending Bit 35" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND34 ,Set/Clear Pending Bit 34" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND33 ,Set/Clear Pending Bit 33" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND32 ,Set/Clear Pending Bit 32" "Not pending,Pending" else hgroup.long 0x0204++0x03 hide.long 0x0 "GICD_SET/CLR_PENDR1,Interrupt Set/Clear Pending Register 1" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x02) group.long 0x0208++0x03 line.long 0x0 "GICD_SET/CLR_PENDR2,Interrupt Set/Clear Pending Register 2" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND95 ,Set/Clear Pending Bit 95" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND94 ,Set/Clear Pending Bit 94" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND93 ,Set/Clear Pending Bit 93" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND92 ,Set/Clear Pending Bit 92" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND91 ,Set/Clear Pending Bit 91" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND90 ,Set/Clear Pending Bit 90" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND89 ,Set/Clear Pending Bit 89" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND88 ,Set/Clear Pending Bit 88" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND87 ,Set/Clear Pending Bit 87" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND86 ,Set/Clear Pending Bit 86" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND85 ,Set/Clear Pending Bit 85" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND84 ,Set/Clear Pending Bit 84" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND83 ,Set/Clear Pending Bit 83" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND82 ,Set/Clear Pending Bit 82" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND81 ,Set/Clear Pending Bit 81" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND80 ,Set/Clear Pending Bit 80" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND79 ,Set/Clear Pending Bit 79" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND78 ,Set/Clear Pending Bit 78" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND77 ,Set/Clear Pending Bit 77" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND76 ,Set/Clear Pending Bit 76" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND75 ,Set/Clear Pending Bit 75" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND74 ,Set/Clear Pending Bit 74" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND73 ,Set/Clear Pending Bit 73" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND72 ,Set/Clear Pending Bit 72" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND71 ,Set/Clear Pending Bit 71" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND70 ,Set/Clear Pending Bit 70" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND69 ,Set/Clear Pending Bit 69" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND68 ,Set/Clear Pending Bit 68" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND67 ,Set/Clear Pending Bit 67" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND66 ,Set/Clear Pending Bit 66" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND65 ,Set/Clear Pending Bit 65" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND64 ,Set/Clear Pending Bit 64" "Not pending,Pending" else hgroup.long 0x0208++0x03 hide.long 0x0 "GICD_SET/CLR_PENDR2,Interrupt Set/Clear Pending Register 2" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x03) group.long 0x020C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR3,Interrupt Set/Clear Pending Register 3" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND127 ,Set/Clear Pending Bit 127" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND126 ,Set/Clear Pending Bit 126" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND125 ,Set/Clear Pending Bit 125" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND124 ,Set/Clear Pending Bit 124" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND123 ,Set/Clear Pending Bit 123" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND122 ,Set/Clear Pending Bit 122" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND121 ,Set/Clear Pending Bit 121" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND120 ,Set/Clear Pending Bit 120" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND119 ,Set/Clear Pending Bit 119" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND118 ,Set/Clear Pending Bit 118" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND117 ,Set/Clear Pending Bit 117" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND116 ,Set/Clear Pending Bit 116" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND115 ,Set/Clear Pending Bit 115" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND114 ,Set/Clear Pending Bit 114" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND113 ,Set/Clear Pending Bit 113" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND112 ,Set/Clear Pending Bit 112" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND111 ,Set/Clear Pending Bit 111" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND110 ,Set/Clear Pending Bit 110" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND109 ,Set/Clear Pending Bit 109" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND108 ,Set/Clear Pending Bit 108" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND107 ,Set/Clear Pending Bit 107" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND106 ,Set/Clear Pending Bit 106" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND105 ,Set/Clear Pending Bit 105" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND104 ,Set/Clear Pending Bit 104" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND103 ,Set/Clear Pending Bit 103" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND102 ,Set/Clear Pending Bit 102" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND101 ,Set/Clear Pending Bit 101" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND100 ,Set/Clear Pending Bit 100" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND99 ,Set/Clear Pending Bit 99" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND98 ,Set/Clear Pending Bit 98" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND97 ,Set/Clear Pending Bit 97" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND96 ,Set/Clear Pending Bit 96" "Not pending,Pending" else hgroup.long 0x020C++0x03 hide.long 0x0 "GICD_SET/CLR_PENDR3,Interrupt Set/Clear Pending Register 3" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x04) group.long 0x0210++0x03 line.long 0x0 "GICD_SET/CLR_PENDR4,Interrupt Set/Clear Pending Register 4" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND159 ,Set/Clear Pending Bit 159" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND158 ,Set/Clear Pending Bit 158" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND157 ,Set/Clear Pending Bit 157" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND156 ,Set/Clear Pending Bit 156" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND155 ,Set/Clear Pending Bit 155" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND154 ,Set/Clear Pending Bit 154" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND153 ,Set/Clear Pending Bit 153" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND152 ,Set/Clear Pending Bit 152" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND151 ,Set/Clear Pending Bit 151" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND150 ,Set/Clear Pending Bit 150" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND149 ,Set/Clear Pending Bit 149" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND148 ,Set/Clear Pending Bit 148" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND147 ,Set/Clear Pending Bit 147" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND146 ,Set/Clear Pending Bit 146" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND145 ,Set/Clear Pending Bit 145" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND144 ,Set/Clear Pending Bit 144" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND143 ,Set/Clear Pending Bit 143" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND142 ,Set/Clear Pending Bit 142" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND141 ,Set/Clear Pending Bit 141" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND140 ,Set/Clear Pending Bit 140" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND139 ,Set/Clear Pending Bit 139" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND138 ,Set/Clear Pending Bit 138" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND137 ,Set/Clear Pending Bit 137" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND136 ,Set/Clear Pending Bit 136" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND135 ,Set/Clear Pending Bit 135" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND134 ,Set/Clear Pending Bit 134" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND133 ,Set/Clear Pending Bit 133" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND132 ,Set/Clear Pending Bit 132" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND131 ,Set/Clear Pending Bit 131" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND130 ,Set/Clear Pending Bit 130" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND129 ,Set/Clear Pending Bit 129" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND128 ,Set/Clear Pending Bit 128" "Not pending,Pending" else hgroup.long 0x0210++0x03 hide.long 0x0 "GICD_SET/CLR_PENDR4,Interrupt Set/Clear Pending Register 4" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x05) group.long 0x0214++0x03 line.long 0x0 "GICD_SET/CLR_PENDR5,Interrupt Set/Clear Pending Register 5" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND191 ,Set/Clear Pending Bit 191" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND190 ,Set/Clear Pending Bit 190" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND189 ,Set/Clear Pending Bit 189" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND188 ,Set/Clear Pending Bit 188" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND187 ,Set/Clear Pending Bit 187" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND186 ,Set/Clear Pending Bit 186" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND185 ,Set/Clear Pending Bit 185" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND184 ,Set/Clear Pending Bit 184" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND183 ,Set/Clear Pending Bit 183" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND182 ,Set/Clear Pending Bit 182" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND181 ,Set/Clear Pending Bit 181" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND180 ,Set/Clear Pending Bit 180" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND179 ,Set/Clear Pending Bit 179" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND178 ,Set/Clear Pending Bit 178" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND177 ,Set/Clear Pending Bit 177" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND176 ,Set/Clear Pending Bit 176" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND175 ,Set/Clear Pending Bit 175" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND174 ,Set/Clear Pending Bit 174" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND173 ,Set/Clear Pending Bit 173" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND172 ,Set/Clear Pending Bit 172" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND171 ,Set/Clear Pending Bit 171" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND170 ,Set/Clear Pending Bit 170" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND169 ,Set/Clear Pending Bit 169" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND168 ,Set/Clear Pending Bit 168" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND167 ,Set/Clear Pending Bit 167" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND166 ,Set/Clear Pending Bit 166" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND165 ,Set/Clear Pending Bit 165" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND164 ,Set/Clear Pending Bit 164" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND163 ,Set/Clear Pending Bit 163" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND162 ,Set/Clear Pending Bit 162" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND161 ,Set/Clear Pending Bit 161" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND160 ,Set/Clear Pending Bit 160" "Not pending,Pending" else hgroup.long 0x0214++0x03 hide.long 0x0 "GICD_SET/CLR_PENDR5,Interrupt Set/Clear Pending Register 5" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x06) group.long 0x0218++0x03 line.long 0x0 "GICD_SET/CLR_PENDR6,Interrupt Set/Clear Pending Register 6" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND223 ,Set/Clear Pending Bit 223" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND222 ,Set/Clear Pending Bit 222" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND221 ,Set/Clear Pending Bit 221" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND220 ,Set/Clear Pending Bit 220" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND219 ,Set/Clear Pending Bit 219" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND218 ,Set/Clear Pending Bit 218" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND217 ,Set/Clear Pending Bit 217" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND216 ,Set/Clear Pending Bit 216" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND215 ,Set/Clear Pending Bit 215" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND214 ,Set/Clear Pending Bit 214" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND213 ,Set/Clear Pending Bit 213" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND212 ,Set/Clear Pending Bit 212" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND211 ,Set/Clear Pending Bit 211" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND210 ,Set/Clear Pending Bit 210" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND209 ,Set/Clear Pending Bit 209" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND208 ,Set/Clear Pending Bit 208" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND207 ,Set/Clear Pending Bit 207" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND206 ,Set/Clear Pending Bit 206" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND205 ,Set/Clear Pending Bit 205" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND204 ,Set/Clear Pending Bit 204" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND203 ,Set/Clear Pending Bit 203" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND202 ,Set/Clear Pending Bit 202" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND201 ,Set/Clear Pending Bit 201" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND200 ,Set/Clear Pending Bit 200" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND199 ,Set/Clear Pending Bit 199" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND198 ,Set/Clear Pending Bit 198" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND197 ,Set/Clear Pending Bit 197" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND196 ,Set/Clear Pending Bit 196" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND195 ,Set/Clear Pending Bit 195" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND194 ,Set/Clear Pending Bit 194" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND193 ,Set/Clear Pending Bit 193" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND192 ,Set/Clear Pending Bit 192" "Not pending,Pending" else hgroup.long 0x0218++0x03 hide.long 0x0 "GICD_SET/CLR_PENDR6,Interrupt Set/Clear Pending Register 6" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x07) group.long 0x021C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR7,Interrupt Set/Clear Pending Register 7" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND255 ,Set/Clear Pending Bit 255" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND254 ,Set/Clear Pending Bit 254" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND253 ,Set/Clear Pending Bit 253" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND252 ,Set/Clear Pending Bit 252" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND251 ,Set/Clear Pending Bit 251" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND250 ,Set/Clear Pending Bit 250" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND249 ,Set/Clear Pending Bit 249" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND248 ,Set/Clear Pending Bit 248" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND247 ,Set/Clear Pending Bit 247" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND246 ,Set/Clear Pending Bit 246" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND245 ,Set/Clear Pending Bit 245" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND244 ,Set/Clear Pending Bit 244" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND243 ,Set/Clear Pending Bit 243" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND242 ,Set/Clear Pending Bit 242" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND241 ,Set/Clear Pending Bit 241" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND240 ,Set/Clear Pending Bit 240" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND239 ,Set/Clear Pending Bit 239" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND238 ,Set/Clear Pending Bit 238" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND237 ,Set/Clear Pending Bit 237" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND236 ,Set/Clear Pending Bit 236" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND235 ,Set/Clear Pending Bit 235" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND234 ,Set/Clear Pending Bit 234" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND233 ,Set/Clear Pending Bit 233" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND232 ,Set/Clear Pending Bit 232" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND231 ,Set/Clear Pending Bit 231" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND230 ,Set/Clear Pending Bit 230" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND229 ,Set/Clear Pending Bit 229" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND228 ,Set/Clear Pending Bit 228" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND227 ,Set/Clear Pending Bit 227" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND226 ,Set/Clear Pending Bit 226" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND225 ,Set/Clear Pending Bit 225" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND224 ,Set/Clear Pending Bit 224" "Not pending,Pending" else hgroup.long 0x021C++0x03 hide.long 0x0 "GICD_SET/CLR_PENDR7,Interrupt Set/Clear Pending Register 7" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x08) group.long 0x0220++0x03 line.long 0x0 "GICD_SET/CLR_PENDR8,Interrupt Set/Clear Pending Register 8" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND287 ,Set/Clear Pending Bit 287" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND286 ,Set/Clear Pending Bit 286" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND285 ,Set/Clear Pending Bit 285" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND284 ,Set/Clear Pending Bit 284" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND283 ,Set/Clear Pending Bit 283" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND282 ,Set/Clear Pending Bit 282" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND281 ,Set/Clear Pending Bit 281" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND280 ,Set/Clear Pending Bit 280" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND279 ,Set/Clear Pending Bit 279" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND278 ,Set/Clear Pending Bit 278" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND277 ,Set/Clear Pending Bit 277" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND276 ,Set/Clear Pending Bit 276" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND275 ,Set/Clear Pending Bit 275" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND274 ,Set/Clear Pending Bit 274" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND273 ,Set/Clear Pending Bit 273" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND272 ,Set/Clear Pending Bit 272" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND271 ,Set/Clear Pending Bit 271" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND270 ,Set/Clear Pending Bit 270" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND269 ,Set/Clear Pending Bit 269" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND268 ,Set/Clear Pending Bit 268" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND267 ,Set/Clear Pending Bit 267" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND266 ,Set/Clear Pending Bit 266" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND265 ,Set/Clear Pending Bit 265" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND264 ,Set/Clear Pending Bit 264" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND263 ,Set/Clear Pending Bit 263" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND262 ,Set/Clear Pending Bit 262" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND261 ,Set/Clear Pending Bit 261" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND260 ,Set/Clear Pending Bit 260" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND259 ,Set/Clear Pending Bit 259" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND258 ,Set/Clear Pending Bit 258" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND257 ,Set/Clear Pending Bit 257" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND256 ,Set/Clear Pending Bit 256" "Not pending,Pending" else hgroup.long 0x0220++0x03 hide.long 0x0 "GICD_SET/CLR_PENDR8,Interrupt Set/Clear Pending Register 8" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x09) group.long 0x0224++0x03 line.long 0x0 "GICD_SET/CLR_PENDR9,Interrupt Set/Clear Pending Register 9" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND319 ,Set/Clear Pending Bit 319" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND318 ,Set/Clear Pending Bit 318" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND317 ,Set/Clear Pending Bit 317" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND316 ,Set/Clear Pending Bit 316" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND315 ,Set/Clear Pending Bit 315" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND314 ,Set/Clear Pending Bit 314" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND313 ,Set/Clear Pending Bit 313" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND312 ,Set/Clear Pending Bit 312" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND311 ,Set/Clear Pending Bit 311" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND310 ,Set/Clear Pending Bit 310" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND309 ,Set/Clear Pending Bit 309" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND308 ,Set/Clear Pending Bit 308" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND307 ,Set/Clear Pending Bit 307" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND306 ,Set/Clear Pending Bit 306" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND305 ,Set/Clear Pending Bit 305" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND304 ,Set/Clear Pending Bit 304" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND303 ,Set/Clear Pending Bit 303" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND302 ,Set/Clear Pending Bit 302" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND301 ,Set/Clear Pending Bit 301" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND300 ,Set/Clear Pending Bit 300" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND299 ,Set/Clear Pending Bit 299" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND298 ,Set/Clear Pending Bit 298" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND297 ,Set/Clear Pending Bit 297" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND296 ,Set/Clear Pending Bit 296" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND295 ,Set/Clear Pending Bit 295" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND294 ,Set/Clear Pending Bit 294" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND293 ,Set/Clear Pending Bit 293" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND292 ,Set/Clear Pending Bit 292" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND291 ,Set/Clear Pending Bit 291" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND290 ,Set/Clear Pending Bit 290" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND289 ,Set/Clear Pending Bit 289" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND288 ,Set/Clear Pending Bit 288" "Not pending,Pending" else hgroup.long 0x0224++0x03 hide.long 0x0 "GICD_SET/CLR_PENDR9,Interrupt Set/Clear Pending Register 9" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x0A) group.long 0x0228++0x03 line.long 0x0 "GICD_SET/CLR_PENDR10,Interrupt Set/Clear Pending Register 10" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND351 ,Set/Clear Pending Bit 351" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND350 ,Set/Clear Pending Bit 350" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND349 ,Set/Clear Pending Bit 349" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND348 ,Set/Clear Pending Bit 348" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND347 ,Set/Clear Pending Bit 347" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND346 ,Set/Clear Pending Bit 346" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND345 ,Set/Clear Pending Bit 345" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND344 ,Set/Clear Pending Bit 344" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND343 ,Set/Clear Pending Bit 343" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND342 ,Set/Clear Pending Bit 342" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND341 ,Set/Clear Pending Bit 341" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND340 ,Set/Clear Pending Bit 340" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND339 ,Set/Clear Pending Bit 339" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND338 ,Set/Clear Pending Bit 338" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND337 ,Set/Clear Pending Bit 337" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND336 ,Set/Clear Pending Bit 336" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND335 ,Set/Clear Pending Bit 335" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND334 ,Set/Clear Pending Bit 334" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND333 ,Set/Clear Pending Bit 333" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND332 ,Set/Clear Pending Bit 332" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND331 ,Set/Clear Pending Bit 331" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND330 ,Set/Clear Pending Bit 330" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND329 ,Set/Clear Pending Bit 329" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND328 ,Set/Clear Pending Bit 328" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND327 ,Set/Clear Pending Bit 327" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND326 ,Set/Clear Pending Bit 326" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND325 ,Set/Clear Pending Bit 325" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND324 ,Set/Clear Pending Bit 324" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND323 ,Set/Clear Pending Bit 323" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND322 ,Set/Clear Pending Bit 322" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND321 ,Set/Clear Pending Bit 321" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND320 ,Set/Clear Pending Bit 320" "Not pending,Pending" else hgroup.long 0x0228++0x03 hide.long 0x0 "GICD_SET/CLR_PENDR10,Interrupt Set/Clear Pending Register 10" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x0B) group.long 0x022C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR11,Interrupt Set/Clear Pending Register 11" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND383 ,Set/Clear Pending Bit 383" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND382 ,Set/Clear Pending Bit 382" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND381 ,Set/Clear Pending Bit 381" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND380 ,Set/Clear Pending Bit 380" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND379 ,Set/Clear Pending Bit 379" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND378 ,Set/Clear Pending Bit 378" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND377 ,Set/Clear Pending Bit 377" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND376 ,Set/Clear Pending Bit 376" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND375 ,Set/Clear Pending Bit 375" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND374 ,Set/Clear Pending Bit 374" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND373 ,Set/Clear Pending Bit 373" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND372 ,Set/Clear Pending Bit 372" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND371 ,Set/Clear Pending Bit 371" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND370 ,Set/Clear Pending Bit 370" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND369 ,Set/Clear Pending Bit 369" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND368 ,Set/Clear Pending Bit 368" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND367 ,Set/Clear Pending Bit 367" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND366 ,Set/Clear Pending Bit 366" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND365 ,Set/Clear Pending Bit 365" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND364 ,Set/Clear Pending Bit 364" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND363 ,Set/Clear Pending Bit 363" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND362 ,Set/Clear Pending Bit 362" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND361 ,Set/Clear Pending Bit 361" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND360 ,Set/Clear Pending Bit 360" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND359 ,Set/Clear Pending Bit 359" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND358 ,Set/Clear Pending Bit 358" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND357 ,Set/Clear Pending Bit 357" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND356 ,Set/Clear Pending Bit 356" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND355 ,Set/Clear Pending Bit 355" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND354 ,Set/Clear Pending Bit 354" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND353 ,Set/Clear Pending Bit 353" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND352 ,Set/Clear Pending Bit 352" "Not pending,Pending" else hgroup.long 0x022C++0x03 hide.long 0x0 "GICD_SET/CLR_PENDR11,Interrupt Set/Clear Pending Register 11" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x0C) group.long 0x0230++0x03 line.long 0x0 "GICD_SET/CLR_PENDR12,Interrupt Set/Clear Pending Register 12" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND415 ,Set/Clear Pending Bit 415" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND414 ,Set/Clear Pending Bit 414" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND413 ,Set/Clear Pending Bit 413" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND412 ,Set/Clear Pending Bit 412" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND411 ,Set/Clear Pending Bit 411" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND410 ,Set/Clear Pending Bit 410" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND409 ,Set/Clear Pending Bit 409" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND408 ,Set/Clear Pending Bit 408" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND407 ,Set/Clear Pending Bit 407" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND406 ,Set/Clear Pending Bit 406" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND405 ,Set/Clear Pending Bit 405" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND404 ,Set/Clear Pending Bit 404" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND403 ,Set/Clear Pending Bit 403" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND402 ,Set/Clear Pending Bit 402" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND401 ,Set/Clear Pending Bit 401" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND400 ,Set/Clear Pending Bit 400" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND399 ,Set/Clear Pending Bit 399" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND398 ,Set/Clear Pending Bit 398" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND397 ,Set/Clear Pending Bit 397" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND396 ,Set/Clear Pending Bit 396" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND395 ,Set/Clear Pending Bit 395" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND394 ,Set/Clear Pending Bit 394" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND393 ,Set/Clear Pending Bit 393" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND392 ,Set/Clear Pending Bit 392" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND391 ,Set/Clear Pending Bit 391" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND390 ,Set/Clear Pending Bit 390" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND389 ,Set/Clear Pending Bit 389" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND388 ,Set/Clear Pending Bit 388" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND387 ,Set/Clear Pending Bit 387" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND386 ,Set/Clear Pending Bit 386" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND385 ,Set/Clear Pending Bit 385" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND384 ,Set/Clear Pending Bit 384" "Not pending,Pending" else hgroup.long 0x0230++0x03 hide.long 0x0 "GICD_SET/CLR_PENDR12,Interrupt Set/Clear Pending Register 12" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x0D) group.long 0x0234++0x03 line.long 0x0 "GICD_SET/CLR_PENDR13,Interrupt Set/Clear Pending Register 13" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND447 ,Set/Clear Pending Bit 447" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND446 ,Set/Clear Pending Bit 446" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND445 ,Set/Clear Pending Bit 445" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND444 ,Set/Clear Pending Bit 444" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND443 ,Set/Clear Pending Bit 443" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND442 ,Set/Clear Pending Bit 442" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND441 ,Set/Clear Pending Bit 441" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND440 ,Set/Clear Pending Bit 440" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND439 ,Set/Clear Pending Bit 439" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND438 ,Set/Clear Pending Bit 438" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND437 ,Set/Clear Pending Bit 437" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND436 ,Set/Clear Pending Bit 436" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND435 ,Set/Clear Pending Bit 435" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND434 ,Set/Clear Pending Bit 434" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND433 ,Set/Clear Pending Bit 433" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND432 ,Set/Clear Pending Bit 432" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND431 ,Set/Clear Pending Bit 431" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND430 ,Set/Clear Pending Bit 430" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND429 ,Set/Clear Pending Bit 429" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND428 ,Set/Clear Pending Bit 428" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND427 ,Set/Clear Pending Bit 427" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND426 ,Set/Clear Pending Bit 426" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND425 ,Set/Clear Pending Bit 425" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND424 ,Set/Clear Pending Bit 424" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND423 ,Set/Clear Pending Bit 423" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND422 ,Set/Clear Pending Bit 422" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND421 ,Set/Clear Pending Bit 421" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND420 ,Set/Clear Pending Bit 420" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND419 ,Set/Clear Pending Bit 419" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND418 ,Set/Clear Pending Bit 418" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND417 ,Set/Clear Pending Bit 417" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND416 ,Set/Clear Pending Bit 416" "Not pending,Pending" else hgroup.long 0x0234++0x03 hide.long 0x0 "GICD_SET/CLR_PENDR13,Interrupt Set/Clear Pending Register 13" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x0E) group.long 0x0238++0x03 line.long 0x0 "GICD_SET/CLR_PENDR14,Interrupt Set/Clear Pending Register 14" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND479 ,Set/Clear Pending Bit 479" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND478 ,Set/Clear Pending Bit 478" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND477 ,Set/Clear Pending Bit 477" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND476 ,Set/Clear Pending Bit 476" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND475 ,Set/Clear Pending Bit 475" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND474 ,Set/Clear Pending Bit 474" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND473 ,Set/Clear Pending Bit 473" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND472 ,Set/Clear Pending Bit 472" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND471 ,Set/Clear Pending Bit 471" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND470 ,Set/Clear Pending Bit 470" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND469 ,Set/Clear Pending Bit 469" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND468 ,Set/Clear Pending Bit 468" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND467 ,Set/Clear Pending Bit 467" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND466 ,Set/Clear Pending Bit 466" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND465 ,Set/Clear Pending Bit 465" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND464 ,Set/Clear Pending Bit 464" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND463 ,Set/Clear Pending Bit 463" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND462 ,Set/Clear Pending Bit 462" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND461 ,Set/Clear Pending Bit 461" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND460 ,Set/Clear Pending Bit 460" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND459 ,Set/Clear Pending Bit 459" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND458 ,Set/Clear Pending Bit 458" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND457 ,Set/Clear Pending Bit 457" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND456 ,Set/Clear Pending Bit 456" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND455 ,Set/Clear Pending Bit 455" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND454 ,Set/Clear Pending Bit 454" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND453 ,Set/Clear Pending Bit 453" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND452 ,Set/Clear Pending Bit 452" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND451 ,Set/Clear Pending Bit 451" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND450 ,Set/Clear Pending Bit 450" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND449 ,Set/Clear Pending Bit 449" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND448 ,Set/Clear Pending Bit 448" "Not pending,Pending" else hgroup.long 0x0238++0x03 hide.long 0x0 "GICD_SET/CLR_PENDR14,Interrupt Set/Clear Pending Register 14" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x0F) group.long 0x023C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR15,Interrupt Set/Clear Pending Register 15" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND511 ,Set/Clear Pending Bit 511" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND510 ,Set/Clear Pending Bit 510" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND509 ,Set/Clear Pending Bit 509" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND508 ,Set/Clear Pending Bit 508" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND507 ,Set/Clear Pending Bit 507" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND506 ,Set/Clear Pending Bit 506" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND505 ,Set/Clear Pending Bit 505" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND504 ,Set/Clear Pending Bit 504" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND503 ,Set/Clear Pending Bit 503" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND502 ,Set/Clear Pending Bit 502" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND501 ,Set/Clear Pending Bit 501" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND500 ,Set/Clear Pending Bit 500" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND499 ,Set/Clear Pending Bit 499" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND498 ,Set/Clear Pending Bit 498" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND497 ,Set/Clear Pending Bit 497" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND496 ,Set/Clear Pending Bit 496" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND495 ,Set/Clear Pending Bit 495" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND494 ,Set/Clear Pending Bit 494" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND493 ,Set/Clear Pending Bit 493" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND492 ,Set/Clear Pending Bit 492" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND491 ,Set/Clear Pending Bit 491" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND490 ,Set/Clear Pending Bit 490" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND489 ,Set/Clear Pending Bit 489" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND488 ,Set/Clear Pending Bit 488" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND487 ,Set/Clear Pending Bit 487" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND486 ,Set/Clear Pending Bit 486" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND485 ,Set/Clear Pending Bit 485" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND484 ,Set/Clear Pending Bit 484" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND483 ,Set/Clear Pending Bit 483" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND482 ,Set/Clear Pending Bit 482" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND481 ,Set/Clear Pending Bit 481" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND480 ,Set/Clear Pending Bit 480" "Not pending,Pending" else hgroup.long 0x023C++0x03 hide.long 0x0 "GICD_SET/CLR_PENDR15,Interrupt Set/Clear Pending Register 15" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x10) group.long 0x0240++0x03 line.long 0x0 "GICD_SET/CLR_PENDR16,Interrupt Set/Clear Pending Register 16" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND543 ,Set/Clear Pending Bit 543" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND542 ,Set/Clear Pending Bit 542" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND541 ,Set/Clear Pending Bit 541" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND540 ,Set/Clear Pending Bit 540" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND539 ,Set/Clear Pending Bit 539" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND538 ,Set/Clear Pending Bit 538" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND537 ,Set/Clear Pending Bit 537" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND536 ,Set/Clear Pending Bit 536" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND535 ,Set/Clear Pending Bit 535" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND534 ,Set/Clear Pending Bit 534" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND533 ,Set/Clear Pending Bit 533" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND532 ,Set/Clear Pending Bit 532" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND531 ,Set/Clear Pending Bit 531" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND530 ,Set/Clear Pending Bit 530" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND529 ,Set/Clear Pending Bit 529" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND528 ,Set/Clear Pending Bit 528" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND527 ,Set/Clear Pending Bit 527" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND526 ,Set/Clear Pending Bit 526" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND525 ,Set/Clear Pending Bit 525" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND524 ,Set/Clear Pending Bit 524" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND523 ,Set/Clear Pending Bit 523" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND522 ,Set/Clear Pending Bit 522" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND521 ,Set/Clear Pending Bit 521" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND520 ,Set/Clear Pending Bit 520" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND519 ,Set/Clear Pending Bit 519" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND518 ,Set/Clear Pending Bit 518" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND517 ,Set/Clear Pending Bit 517" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND516 ,Set/Clear Pending Bit 516" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND515 ,Set/Clear Pending Bit 515" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND514 ,Set/Clear Pending Bit 514" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND513 ,Set/Clear Pending Bit 513" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND512 ,Set/Clear Pending Bit 512" "Not pending,Pending" else hgroup.long 0x0240++0x03 hide.long 0x0 "GICD_SET/CLR_PENDR16,Interrupt Set/Clear Pending Register 16" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x11) group.long 0x0244++0x03 line.long 0x0 "GICD_SET/CLR_PENDR17,Interrupt Set/Clear Pending Register 17" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND575 ,Set/Clear Pending Bit 575" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND574 ,Set/Clear Pending Bit 574" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND573 ,Set/Clear Pending Bit 573" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND572 ,Set/Clear Pending Bit 572" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND571 ,Set/Clear Pending Bit 571" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND570 ,Set/Clear Pending Bit 570" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND569 ,Set/Clear Pending Bit 569" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND568 ,Set/Clear Pending Bit 568" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND567 ,Set/Clear Pending Bit 567" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND566 ,Set/Clear Pending Bit 566" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND565 ,Set/Clear Pending Bit 565" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND564 ,Set/Clear Pending Bit 564" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND563 ,Set/Clear Pending Bit 563" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND562 ,Set/Clear Pending Bit 562" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND561 ,Set/Clear Pending Bit 561" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND560 ,Set/Clear Pending Bit 560" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND559 ,Set/Clear Pending Bit 559" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND558 ,Set/Clear Pending Bit 558" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND557 ,Set/Clear Pending Bit 557" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND556 ,Set/Clear Pending Bit 556" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND555 ,Set/Clear Pending Bit 555" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND554 ,Set/Clear Pending Bit 554" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND553 ,Set/Clear Pending Bit 553" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND552 ,Set/Clear Pending Bit 552" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND551 ,Set/Clear Pending Bit 551" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND550 ,Set/Clear Pending Bit 550" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND549 ,Set/Clear Pending Bit 549" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND548 ,Set/Clear Pending Bit 548" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND547 ,Set/Clear Pending Bit 547" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND546 ,Set/Clear Pending Bit 546" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND545 ,Set/Clear Pending Bit 545" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND544 ,Set/Clear Pending Bit 544" "Not pending,Pending" else hgroup.long 0x0244++0x03 hide.long 0x0 "GICD_SET/CLR_PENDR17,Interrupt Set/Clear Pending Register 17" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x12) group.long 0x0248++0x03 line.long 0x0 "GICD_SET/CLR_PENDR18,Interrupt Set/Clear Pending Register 18" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND607 ,Set/Clear Pending Bit 607" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND606 ,Set/Clear Pending Bit 606" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND605 ,Set/Clear Pending Bit 605" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND604 ,Set/Clear Pending Bit 604" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND603 ,Set/Clear Pending Bit 603" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND602 ,Set/Clear Pending Bit 602" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND601 ,Set/Clear Pending Bit 601" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND600 ,Set/Clear Pending Bit 600" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND599 ,Set/Clear Pending Bit 599" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND598 ,Set/Clear Pending Bit 598" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND597 ,Set/Clear Pending Bit 597" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND596 ,Set/Clear Pending Bit 596" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND595 ,Set/Clear Pending Bit 595" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND594 ,Set/Clear Pending Bit 594" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND593 ,Set/Clear Pending Bit 593" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND592 ,Set/Clear Pending Bit 592" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND591 ,Set/Clear Pending Bit 591" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND590 ,Set/Clear Pending Bit 590" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND589 ,Set/Clear Pending Bit 589" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND588 ,Set/Clear Pending Bit 588" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND587 ,Set/Clear Pending Bit 587" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND586 ,Set/Clear Pending Bit 586" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND585 ,Set/Clear Pending Bit 585" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND584 ,Set/Clear Pending Bit 584" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND583 ,Set/Clear Pending Bit 583" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND582 ,Set/Clear Pending Bit 582" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND581 ,Set/Clear Pending Bit 581" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND580 ,Set/Clear Pending Bit 580" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND579 ,Set/Clear Pending Bit 579" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND578 ,Set/Clear Pending Bit 578" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND577 ,Set/Clear Pending Bit 577" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND576 ,Set/Clear Pending Bit 576" "Not pending,Pending" else hgroup.long 0x0248++0x03 hide.long 0x0 "GICD_SET/CLR_PENDR18,Interrupt Set/Clear Pending Register 18" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x13) group.long 0x024C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR19,Interrupt Set/Clear Pending Register 19" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND639 ,Set/Clear Pending Bit 639" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND638 ,Set/Clear Pending Bit 638" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND637 ,Set/Clear Pending Bit 637" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND636 ,Set/Clear Pending Bit 636" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND635 ,Set/Clear Pending Bit 635" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND634 ,Set/Clear Pending Bit 634" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND633 ,Set/Clear Pending Bit 633" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND632 ,Set/Clear Pending Bit 632" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND631 ,Set/Clear Pending Bit 631" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND630 ,Set/Clear Pending Bit 630" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND629 ,Set/Clear Pending Bit 629" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND628 ,Set/Clear Pending Bit 628" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND627 ,Set/Clear Pending Bit 627" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND626 ,Set/Clear Pending Bit 626" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND625 ,Set/Clear Pending Bit 625" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND624 ,Set/Clear Pending Bit 624" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND623 ,Set/Clear Pending Bit 623" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND622 ,Set/Clear Pending Bit 622" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND621 ,Set/Clear Pending Bit 621" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND620 ,Set/Clear Pending Bit 620" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND619 ,Set/Clear Pending Bit 619" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND618 ,Set/Clear Pending Bit 618" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND617 ,Set/Clear Pending Bit 617" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND616 ,Set/Clear Pending Bit 616" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND615 ,Set/Clear Pending Bit 615" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND614 ,Set/Clear Pending Bit 614" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND613 ,Set/Clear Pending Bit 613" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND612 ,Set/Clear Pending Bit 612" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND611 ,Set/Clear Pending Bit 611" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND610 ,Set/Clear Pending Bit 610" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND609 ,Set/Clear Pending Bit 609" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND608 ,Set/Clear Pending Bit 608" "Not pending,Pending" else hgroup.long 0x024C++0x03 hide.long 0x0 "GICD_SET/CLR_PENDR19,Interrupt Set/Clear Pending Register 19" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x14) group.long 0x0250++0x03 line.long 0x0 "GICD_SET/CLR_PENDR20,Interrupt Set/Clear Pending Register 20" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND671 ,Set/Clear Pending Bit 671" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND670 ,Set/Clear Pending Bit 670" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND669 ,Set/Clear Pending Bit 669" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND668 ,Set/Clear Pending Bit 668" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND667 ,Set/Clear Pending Bit 667" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND666 ,Set/Clear Pending Bit 666" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND665 ,Set/Clear Pending Bit 665" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND664 ,Set/Clear Pending Bit 664" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND663 ,Set/Clear Pending Bit 663" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND662 ,Set/Clear Pending Bit 662" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND661 ,Set/Clear Pending Bit 661" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND660 ,Set/Clear Pending Bit 660" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND659 ,Set/Clear Pending Bit 659" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND658 ,Set/Clear Pending Bit 658" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND657 ,Set/Clear Pending Bit 657" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND656 ,Set/Clear Pending Bit 656" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND655 ,Set/Clear Pending Bit 655" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND654 ,Set/Clear Pending Bit 654" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND653 ,Set/Clear Pending Bit 653" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND652 ,Set/Clear Pending Bit 652" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND651 ,Set/Clear Pending Bit 651" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND650 ,Set/Clear Pending Bit 650" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND649 ,Set/Clear Pending Bit 649" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND648 ,Set/Clear Pending Bit 648" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND647 ,Set/Clear Pending Bit 647" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND646 ,Set/Clear Pending Bit 646" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND645 ,Set/Clear Pending Bit 645" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND644 ,Set/Clear Pending Bit 644" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND643 ,Set/Clear Pending Bit 643" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND642 ,Set/Clear Pending Bit 642" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND641 ,Set/Clear Pending Bit 641" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND640 ,Set/Clear Pending Bit 640" "Not pending,Pending" else hgroup.long 0x0250++0x03 hide.long 0x0 "GICD_SET/CLR_PENDR20,Interrupt Set/Clear Pending Register 20" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x15) group.long 0x0254++0x03 line.long 0x0 "GICD_SET/CLR_PENDR21,Interrupt Set/Clear Pending Register 21" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND703 ,Set/Clear Pending Bit 703" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND702 ,Set/Clear Pending Bit 702" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND701 ,Set/Clear Pending Bit 701" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND700 ,Set/Clear Pending Bit 700" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND699 ,Set/Clear Pending Bit 699" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND698 ,Set/Clear Pending Bit 698" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND697 ,Set/Clear Pending Bit 697" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND696 ,Set/Clear Pending Bit 696" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND695 ,Set/Clear Pending Bit 695" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND694 ,Set/Clear Pending Bit 694" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND693 ,Set/Clear Pending Bit 693" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND692 ,Set/Clear Pending Bit 692" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND691 ,Set/Clear Pending Bit 691" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND690 ,Set/Clear Pending Bit 690" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND689 ,Set/Clear Pending Bit 689" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND688 ,Set/Clear Pending Bit 688" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND687 ,Set/Clear Pending Bit 687" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND686 ,Set/Clear Pending Bit 686" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND685 ,Set/Clear Pending Bit 685" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND684 ,Set/Clear Pending Bit 684" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND683 ,Set/Clear Pending Bit 683" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND682 ,Set/Clear Pending Bit 682" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND681 ,Set/Clear Pending Bit 681" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND680 ,Set/Clear Pending Bit 680" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND679 ,Set/Clear Pending Bit 679" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND678 ,Set/Clear Pending Bit 678" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND677 ,Set/Clear Pending Bit 677" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND676 ,Set/Clear Pending Bit 676" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND675 ,Set/Clear Pending Bit 675" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND674 ,Set/Clear Pending Bit 674" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND673 ,Set/Clear Pending Bit 673" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND672 ,Set/Clear Pending Bit 672" "Not pending,Pending" else hgroup.long 0x0254++0x03 hide.long 0x0 "GICD_SET/CLR_PENDR21,Interrupt Set/Clear Pending Register 21" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x16) group.long 0x0258++0x03 line.long 0x0 "GICD_SET/CLR_PENDR22,Interrupt Set/Clear Pending Register 22" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND735 ,Set/Clear Pending Bit 735" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND734 ,Set/Clear Pending Bit 734" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND733 ,Set/Clear Pending Bit 733" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND732 ,Set/Clear Pending Bit 732" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND731 ,Set/Clear Pending Bit 731" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND730 ,Set/Clear Pending Bit 730" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND729 ,Set/Clear Pending Bit 729" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND728 ,Set/Clear Pending Bit 728" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND727 ,Set/Clear Pending Bit 727" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND726 ,Set/Clear Pending Bit 726" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND725 ,Set/Clear Pending Bit 725" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND724 ,Set/Clear Pending Bit 724" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND723 ,Set/Clear Pending Bit 723" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND722 ,Set/Clear Pending Bit 722" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND721 ,Set/Clear Pending Bit 721" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND720 ,Set/Clear Pending Bit 720" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND719 ,Set/Clear Pending Bit 719" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND718 ,Set/Clear Pending Bit 718" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND717 ,Set/Clear Pending Bit 717" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND716 ,Set/Clear Pending Bit 716" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND715 ,Set/Clear Pending Bit 715" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND714 ,Set/Clear Pending Bit 714" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND713 ,Set/Clear Pending Bit 713" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND712 ,Set/Clear Pending Bit 712" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND711 ,Set/Clear Pending Bit 711" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND710 ,Set/Clear Pending Bit 710" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND709 ,Set/Clear Pending Bit 709" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND708 ,Set/Clear Pending Bit 708" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND707 ,Set/Clear Pending Bit 707" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND706 ,Set/Clear Pending Bit 706" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND705 ,Set/Clear Pending Bit 705" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND704 ,Set/Clear Pending Bit 704" "Not pending,Pending" else hgroup.long 0x0258++0x03 hide.long 0x0 "GICD_SET/CLR_PENDR22,Interrupt Set/Clear Pending Register 22" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x17) group.long 0x025C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR23,Interrupt Set/Clear Pending Register 23" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND767 ,Set/Clear Pending Bit 767" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND766 ,Set/Clear Pending Bit 766" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND765 ,Set/Clear Pending Bit 765" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND764 ,Set/Clear Pending Bit 764" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND763 ,Set/Clear Pending Bit 763" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND762 ,Set/Clear Pending Bit 762" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND761 ,Set/Clear Pending Bit 761" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND760 ,Set/Clear Pending Bit 760" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND759 ,Set/Clear Pending Bit 759" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND758 ,Set/Clear Pending Bit 758" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND757 ,Set/Clear Pending Bit 757" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND756 ,Set/Clear Pending Bit 756" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND755 ,Set/Clear Pending Bit 755" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND754 ,Set/Clear Pending Bit 754" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND753 ,Set/Clear Pending Bit 753" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND752 ,Set/Clear Pending Bit 752" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND751 ,Set/Clear Pending Bit 751" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND750 ,Set/Clear Pending Bit 750" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND749 ,Set/Clear Pending Bit 749" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND748 ,Set/Clear Pending Bit 748" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND747 ,Set/Clear Pending Bit 747" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND746 ,Set/Clear Pending Bit 746" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND745 ,Set/Clear Pending Bit 745" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND744 ,Set/Clear Pending Bit 744" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND743 ,Set/Clear Pending Bit 743" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND742 ,Set/Clear Pending Bit 742" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND741 ,Set/Clear Pending Bit 741" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND740 ,Set/Clear Pending Bit 740" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND739 ,Set/Clear Pending Bit 739" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND738 ,Set/Clear Pending Bit 738" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND737 ,Set/Clear Pending Bit 737" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND736 ,Set/Clear Pending Bit 736" "Not pending,Pending" else hgroup.long 0x025C++0x03 hide.long 0x0 "GICD_SET/CLR_PENDR23,Interrupt Set/Clear Pending Register 23" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x18) group.long 0x0260++0x03 line.long 0x0 "GICD_SET/CLR_PENDR24,Interrupt Set/Clear Pending Register 24" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND799 ,Set/Clear Pending Bit 799" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND798 ,Set/Clear Pending Bit 798" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND797 ,Set/Clear Pending Bit 797" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND796 ,Set/Clear Pending Bit 796" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND795 ,Set/Clear Pending Bit 795" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND794 ,Set/Clear Pending Bit 794" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND793 ,Set/Clear Pending Bit 793" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND792 ,Set/Clear Pending Bit 792" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND791 ,Set/Clear Pending Bit 791" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND790 ,Set/Clear Pending Bit 790" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND789 ,Set/Clear Pending Bit 789" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND788 ,Set/Clear Pending Bit 788" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND787 ,Set/Clear Pending Bit 787" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND786 ,Set/Clear Pending Bit 786" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND785 ,Set/Clear Pending Bit 785" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND784 ,Set/Clear Pending Bit 784" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND783 ,Set/Clear Pending Bit 783" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND782 ,Set/Clear Pending Bit 782" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND781 ,Set/Clear Pending Bit 781" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND780 ,Set/Clear Pending Bit 780" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND779 ,Set/Clear Pending Bit 779" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND778 ,Set/Clear Pending Bit 778" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND777 ,Set/Clear Pending Bit 777" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND776 ,Set/Clear Pending Bit 776" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND775 ,Set/Clear Pending Bit 775" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND774 ,Set/Clear Pending Bit 774" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND773 ,Set/Clear Pending Bit 773" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND772 ,Set/Clear Pending Bit 772" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND771 ,Set/Clear Pending Bit 771" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND770 ,Set/Clear Pending Bit 770" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND769 ,Set/Clear Pending Bit 769" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND768 ,Set/Clear Pending Bit 768" "Not pending,Pending" else hgroup.long 0x0260++0x03 hide.long 0x0 "GICD_SET/CLR_PENDR24,Interrupt Set/Clear Pending Register 24" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x19) group.long 0x0264++0x03 line.long 0x0 "GICD_SET/CLR_PENDR25,Interrupt Set/Clear Pending Register 25" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND831 ,Set/Clear Pending Bit 831" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND830 ,Set/Clear Pending Bit 830" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND829 ,Set/Clear Pending Bit 829" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND828 ,Set/Clear Pending Bit 828" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND827 ,Set/Clear Pending Bit 827" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND826 ,Set/Clear Pending Bit 826" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND825 ,Set/Clear Pending Bit 825" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND824 ,Set/Clear Pending Bit 824" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND823 ,Set/Clear Pending Bit 823" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND822 ,Set/Clear Pending Bit 822" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND821 ,Set/Clear Pending Bit 821" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND820 ,Set/Clear Pending Bit 820" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND819 ,Set/Clear Pending Bit 819" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND818 ,Set/Clear Pending Bit 818" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND817 ,Set/Clear Pending Bit 817" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND816 ,Set/Clear Pending Bit 816" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND815 ,Set/Clear Pending Bit 815" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND814 ,Set/Clear Pending Bit 814" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND813 ,Set/Clear Pending Bit 813" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND812 ,Set/Clear Pending Bit 812" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND811 ,Set/Clear Pending Bit 811" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND810 ,Set/Clear Pending Bit 810" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND809 ,Set/Clear Pending Bit 809" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND808 ,Set/Clear Pending Bit 808" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND807 ,Set/Clear Pending Bit 807" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND806 ,Set/Clear Pending Bit 806" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND805 ,Set/Clear Pending Bit 805" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND804 ,Set/Clear Pending Bit 804" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND803 ,Set/Clear Pending Bit 803" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND802 ,Set/Clear Pending Bit 802" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND801 ,Set/Clear Pending Bit 801" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND800 ,Set/Clear Pending Bit 800" "Not pending,Pending" else hgroup.long 0x0264++0x03 hide.long 0x0 "GICD_SET/CLR_PENDR25,Interrupt Set/Clear Pending Register 25" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x1A) group.long 0x0268++0x03 line.long 0x0 "GICD_SET/CLR_PENDR26,Interrupt Set/Clear Pending Register 26" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND863 ,Set/Clear Pending Bit 863" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND862 ,Set/Clear Pending Bit 862" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND861 ,Set/Clear Pending Bit 861" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND860 ,Set/Clear Pending Bit 860" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND859 ,Set/Clear Pending Bit 859" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND858 ,Set/Clear Pending Bit 858" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND857 ,Set/Clear Pending Bit 857" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND856 ,Set/Clear Pending Bit 856" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND855 ,Set/Clear Pending Bit 855" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND854 ,Set/Clear Pending Bit 854" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND853 ,Set/Clear Pending Bit 853" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND852 ,Set/Clear Pending Bit 852" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND851 ,Set/Clear Pending Bit 851" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND850 ,Set/Clear Pending Bit 850" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND849 ,Set/Clear Pending Bit 849" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND848 ,Set/Clear Pending Bit 848" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND847 ,Set/Clear Pending Bit 847" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND846 ,Set/Clear Pending Bit 846" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND845 ,Set/Clear Pending Bit 845" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND844 ,Set/Clear Pending Bit 844" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND843 ,Set/Clear Pending Bit 843" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND842 ,Set/Clear Pending Bit 842" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND841 ,Set/Clear Pending Bit 841" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND840 ,Set/Clear Pending Bit 840" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND839 ,Set/Clear Pending Bit 839" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND838 ,Set/Clear Pending Bit 838" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND837 ,Set/Clear Pending Bit 837" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND836 ,Set/Clear Pending Bit 836" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND835 ,Set/Clear Pending Bit 835" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND834 ,Set/Clear Pending Bit 834" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND833 ,Set/Clear Pending Bit 833" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND832 ,Set/Clear Pending Bit 832" "Not pending,Pending" else hgroup.long 0x0268++0x03 hide.long 0x0 "GICD_SET/CLR_PENDR26,Interrupt Set/Clear Pending Register 26" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x1B) group.long 0x026C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR27,Interrupt Set/Clear Pending Register 27" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND895 ,Set/Clear Pending Bit 895" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND894 ,Set/Clear Pending Bit 894" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND893 ,Set/Clear Pending Bit 893" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND892 ,Set/Clear Pending Bit 892" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND891 ,Set/Clear Pending Bit 891" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND890 ,Set/Clear Pending Bit 890" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND889 ,Set/Clear Pending Bit 889" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND888 ,Set/Clear Pending Bit 888" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND887 ,Set/Clear Pending Bit 887" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND886 ,Set/Clear Pending Bit 886" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND885 ,Set/Clear Pending Bit 885" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND884 ,Set/Clear Pending Bit 884" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND883 ,Set/Clear Pending Bit 883" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND882 ,Set/Clear Pending Bit 882" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND881 ,Set/Clear Pending Bit 881" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND880 ,Set/Clear Pending Bit 880" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND879 ,Set/Clear Pending Bit 879" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND878 ,Set/Clear Pending Bit 878" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND877 ,Set/Clear Pending Bit 877" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND876 ,Set/Clear Pending Bit 876" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND875 ,Set/Clear Pending Bit 875" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND874 ,Set/Clear Pending Bit 874" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND873 ,Set/Clear Pending Bit 873" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND872 ,Set/Clear Pending Bit 872" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND871 ,Set/Clear Pending Bit 871" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND870 ,Set/Clear Pending Bit 870" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND869 ,Set/Clear Pending Bit 869" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND868 ,Set/Clear Pending Bit 868" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND867 ,Set/Clear Pending Bit 867" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND866 ,Set/Clear Pending Bit 866" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND865 ,Set/Clear Pending Bit 865" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND864 ,Set/Clear Pending Bit 864" "Not pending,Pending" else hgroup.long 0x026C++0x03 hide.long 0x0 "GICD_SET/CLR_PENDR27,Interrupt Set/Clear Pending Register 27" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x1C) group.long 0x0270++0x03 line.long 0x0 "GICD_SET/CLR_PENDR28,Interrupt Set/Clear Pending Register 28" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND927 ,Set/Clear Pending Bit 927" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND926 ,Set/Clear Pending Bit 926" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND925 ,Set/Clear Pending Bit 925" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND924 ,Set/Clear Pending Bit 924" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND923 ,Set/Clear Pending Bit 923" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND922 ,Set/Clear Pending Bit 922" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND921 ,Set/Clear Pending Bit 921" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND920 ,Set/Clear Pending Bit 920" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND919 ,Set/Clear Pending Bit 919" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND918 ,Set/Clear Pending Bit 918" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND917 ,Set/Clear Pending Bit 917" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND916 ,Set/Clear Pending Bit 916" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND915 ,Set/Clear Pending Bit 915" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND914 ,Set/Clear Pending Bit 914" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND913 ,Set/Clear Pending Bit 913" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND912 ,Set/Clear Pending Bit 912" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND911 ,Set/Clear Pending Bit 911" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND910 ,Set/Clear Pending Bit 910" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND909 ,Set/Clear Pending Bit 909" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND908 ,Set/Clear Pending Bit 908" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND907 ,Set/Clear Pending Bit 907" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND906 ,Set/Clear Pending Bit 906" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND905 ,Set/Clear Pending Bit 905" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND904 ,Set/Clear Pending Bit 904" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND903 ,Set/Clear Pending Bit 903" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND902 ,Set/Clear Pending Bit 902" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND901 ,Set/Clear Pending Bit 901" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND900 ,Set/Clear Pending Bit 900" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND899 ,Set/Clear Pending Bit 899" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND898 ,Set/Clear Pending Bit 898" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND897 ,Set/Clear Pending Bit 897" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND896 ,Set/Clear Pending Bit 896" "Not pending,Pending" else hgroup.long 0x0270++0x03 hide.long 0x0 "GICD_SET/CLR_PENDR28,Interrupt Set/Clear Pending Register 28" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x1D) group.long 0x0274++0x03 line.long 0x0 "GICD_SET/CLR_PENDR29,Interrupt Set/Clear Pending Register 29" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND959 ,Set/Clear Pending Bit 959" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND958 ,Set/Clear Pending Bit 958" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND957 ,Set/Clear Pending Bit 957" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND956 ,Set/Clear Pending Bit 956" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND955 ,Set/Clear Pending Bit 955" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND954 ,Set/Clear Pending Bit 954" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND953 ,Set/Clear Pending Bit 953" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND952 ,Set/Clear Pending Bit 952" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND951 ,Set/Clear Pending Bit 951" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND950 ,Set/Clear Pending Bit 950" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND949 ,Set/Clear Pending Bit 949" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND948 ,Set/Clear Pending Bit 948" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND947 ,Set/Clear Pending Bit 947" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND946 ,Set/Clear Pending Bit 946" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND945 ,Set/Clear Pending Bit 945" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND944 ,Set/Clear Pending Bit 944" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND943 ,Set/Clear Pending Bit 943" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND942 ,Set/Clear Pending Bit 942" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND941 ,Set/Clear Pending Bit 941" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND940 ,Set/Clear Pending Bit 940" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND939 ,Set/Clear Pending Bit 939" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND938 ,Set/Clear Pending Bit 938" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND937 ,Set/Clear Pending Bit 937" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND936 ,Set/Clear Pending Bit 936" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND935 ,Set/Clear Pending Bit 935" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND934 ,Set/Clear Pending Bit 934" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND933 ,Set/Clear Pending Bit 933" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND932 ,Set/Clear Pending Bit 932" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND931 ,Set/Clear Pending Bit 931" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND930 ,Set/Clear Pending Bit 930" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND929 ,Set/Clear Pending Bit 929" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND928 ,Set/Clear Pending Bit 928" "Not pending,Pending" else hgroup.long 0x0274++0x03 hide.long 0x0 "GICD_SET/CLR_PENDR29,Interrupt Set/Clear Pending Register 29" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x1E) group.long 0x0278++0x03 line.long 0x0 "GICD_SET/CLR_PENDR30,Interrupt Set/Clear Pending Register 30" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND991 ,Set/Clear Pending Bit 991" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND990 ,Set/Clear Pending Bit 990" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND989 ,Set/Clear Pending Bit 989" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND988 ,Set/Clear Pending Bit 988" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND987 ,Set/Clear Pending Bit 987" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND986 ,Set/Clear Pending Bit 986" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND985 ,Set/Clear Pending Bit 985" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND984 ,Set/Clear Pending Bit 984" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND983 ,Set/Clear Pending Bit 983" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND982 ,Set/Clear Pending Bit 982" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND981 ,Set/Clear Pending Bit 981" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND980 ,Set/Clear Pending Bit 980" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND979 ,Set/Clear Pending Bit 979" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND978 ,Set/Clear Pending Bit 978" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND977 ,Set/Clear Pending Bit 977" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND976 ,Set/Clear Pending Bit 976" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND975 ,Set/Clear Pending Bit 975" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND974 ,Set/Clear Pending Bit 974" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND973 ,Set/Clear Pending Bit 973" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND972 ,Set/Clear Pending Bit 972" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND971 ,Set/Clear Pending Bit 971" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND970 ,Set/Clear Pending Bit 970" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND969 ,Set/Clear Pending Bit 969" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND968 ,Set/Clear Pending Bit 968" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND967 ,Set/Clear Pending Bit 967" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND966 ,Set/Clear Pending Bit 966" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND965 ,Set/Clear Pending Bit 965" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND964 ,Set/Clear Pending Bit 964" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND963 ,Set/Clear Pending Bit 963" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND962 ,Set/Clear Pending Bit 962" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND961 ,Set/Clear Pending Bit 961" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND960 ,Set/Clear Pending Bit 960" "Not pending,Pending" else hgroup.long 0x0278++0x03 hide.long 0x0 "GICD_SET/CLR_PENDR30,Interrupt Set/Clear Pending Register 30" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)==0x1F) group.long 0x027C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR31,Interrupt Set/Clear Pending Register 31" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND1019 ,Set/Clear Pending Bit 1019" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND1018 ,Set/Clear Pending Bit 1018" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND1017 ,Set/Clear Pending Bit 1017" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND1016 ,Set/Clear Pending Bit 1016" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND1015 ,Set/Clear Pending Bit 1015" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND1014 ,Set/Clear Pending Bit 1014" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND1013 ,Set/Clear Pending Bit 1013" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND1012 ,Set/Clear Pending Bit 1012" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND1011 ,Set/Clear Pending Bit 1011" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND1010 ,Set/Clear Pending Bit 1010" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND1009 ,Set/Clear Pending Bit 1009" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND1008 ,Set/Clear Pending Bit 1008" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND1007 ,Set/Clear Pending Bit 1007" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND1006 ,Set/Clear Pending Bit 1006" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND1005 ,Set/Clear Pending Bit 1005" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND1004 ,Set/Clear Pending Bit 1004" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND1003 ,Set/Clear Pending Bit 1003" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND1002 ,Set/Clear Pending Bit 1002" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND1001 ,Set/Clear Pending Bit 1001" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND1000 ,Set/Clear Pending Bit 1000" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND999 ,Set/Clear Pending Bit 999" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND998 ,Set/Clear Pending Bit 998" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND997 ,Set/Clear Pending Bit 997" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND996 ,Set/Clear Pending Bit 996" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND995 ,Set/Clear Pending Bit 995" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND994 ,Set/Clear Pending Bit 994" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND993 ,Set/Clear Pending Bit 993" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND992 ,Set/Clear Pending Bit 992" "Not pending,Pending" else hgroup.long 0x027C++0x03 hide.long 0x0 "GICD_SET/CLR_PENDR31,Interrupt Set/Clear Pending Register 31" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif tree.end width 24. tree "Set/Clear Active Registers" rgroup.long 0x0300++0x03 line.long 0x0 "GICD_ICDABR0,Active Status Register 0" bitfld.long 0x00 31. " ASB31 ,Active Status Bit 31" "Not active,Active" bitfld.long 0x00 30. " ASB30 ,Active Status Bit 30" "Not active,Active" bitfld.long 0x00 29. " ASB29 ,Active Status Bit 29" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB28 ,Active Status Bit 28" "Not active,Active" bitfld.long 0x00 27. " ASB27 ,Active Status Bit 27" "Not active,Active" bitfld.long 0x00 26. " ASB26 ,Active Status Bit 26" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB25 ,Active Status Bit 25" "Not active,Active" bitfld.long 0x00 24. " ASB24 ,Active Status Bit 24" "Not active,Active" bitfld.long 0x00 23. " ASB23 ,Active Status Bit 23" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB22 ,Active Status Bit 22" "Not active,Active" bitfld.long 0x00 21. " ASB21 ,Active Status Bit 21" "Not active,Active" bitfld.long 0x00 20. " ASB20 ,Active Status Bit 20" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB19 ,Active Status Bit 19" "Not active,Active" bitfld.long 0x00 18. " ASB18 ,Active Status Bit 18" "Not active,Active" bitfld.long 0x00 17. " ASB17 ,Active Status Bit 17" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB16 ,Active Status Bit 16" "Not active,Active" bitfld.long 0x00 15. " ASB15 ,Active Status Bit 15" "Not active,Active" bitfld.long 0x00 14. " ASB14 ,Active Status Bit 14" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB13 ,Active Status Bit 13" "Not active,Active" bitfld.long 0x00 12. " ASB12 ,Active Status Bit 12" "Not active,Active" bitfld.long 0x00 11. " ASB11 ,Active Status Bit 11" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB10 ,Active Status Bit 10" "Not active,Active" bitfld.long 0x00 9. " ASB9 ,Active Status Bit 9" "Not active,Active" bitfld.long 0x00 8. " ASB8 ,Active Status Bit 8" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB7 ,Active Status Bit 7" "Not active,Active" bitfld.long 0x00 6. " ASB6 ,Active Status Bit 6" "Not active,Active" bitfld.long 0x00 5. " ASB5 ,Active Status Bit 5" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB4 ,Active Status Bit 4" "Not active,Active" bitfld.long 0x00 3. " ASB3 ,Active Status Bit 3" "Not active,Active" bitfld.long 0x00 2. " ASB2 ,Active Status Bit 2" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB1 ,Active Status Bit 1" "Not active,Active" bitfld.long 0x00 0. " ASB0 ,Active Status Bit 0" "Not active,Active" if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x01) rgroup.long 0x0304++0x03 line.long 0x0 "GICD_ICDABR1,Active Status Register 1" bitfld.long 0x00 31. " ASB63 ,Active Status Bit 63" "Not active,Active" bitfld.long 0x00 30. " ASB62 ,Active Status Bit 62" "Not active,Active" bitfld.long 0x00 29. " ASB61 ,Active Status Bit 61" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB60 ,Active Status Bit 60" "Not active,Active" bitfld.long 0x00 27. " ASB59 ,Active Status Bit 59" "Not active,Active" bitfld.long 0x00 26. " ASB58 ,Active Status Bit 58" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB57 ,Active Status Bit 57" "Not active,Active" bitfld.long 0x00 24. " ASB56 ,Active Status Bit 56" "Not active,Active" bitfld.long 0x00 23. " ASB55 ,Active Status Bit 55" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB54 ,Active Status Bit 54" "Not active,Active" bitfld.long 0x00 21. " ASB53 ,Active Status Bit 53" "Not active,Active" bitfld.long 0x00 20. " ASB52 ,Active Status Bit 52" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB51 ,Active Status Bit 51" "Not active,Active" bitfld.long 0x00 18. " ASB50 ,Active Status Bit 50" "Not active,Active" bitfld.long 0x00 17. " ASB49 ,Active Status Bit 49" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB48 ,Active Status Bit 48" "Not active,Active" bitfld.long 0x00 15. " ASB47 ,Active Status Bit 47" "Not active,Active" bitfld.long 0x00 14. " ASB46 ,Active Status Bit 46" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB45 ,Active Status Bit 45" "Not active,Active" bitfld.long 0x00 12. " ASB44 ,Active Status Bit 44" "Not active,Active" bitfld.long 0x00 11. " ASB43 ,Active Status Bit 43" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB42 ,Active Status Bit 42" "Not active,Active" bitfld.long 0x00 9. " ASB41 ,Active Status Bit 41" "Not active,Active" bitfld.long 0x00 8. " ASB40 ,Active Status Bit 40" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB39 ,Active Status Bit 39" "Not active,Active" bitfld.long 0x00 6. " ASB38 ,Active Status Bit 38" "Not active,Active" bitfld.long 0x00 5. " ASB37 ,Active Status Bit 37" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB36 ,Active Status Bit 36" "Not active,Active" bitfld.long 0x00 3. " ASB35 ,Active Status Bit 35" "Not active,Active" bitfld.long 0x00 2. " ASB34 ,Active Status Bit 34" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB33 ,Active Status Bit 33" "Not active,Active" bitfld.long 0x00 0. " ASB32 ,Active Status Bit 32" "Not active,Active" else hgroup.long 0x0304++0x03 hide.long 0x0 "GICD_ICDABR1,Active Status Register 1" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x02) rgroup.long 0x0308++0x03 line.long 0x0 "GICD_ICDABR2,Active Status Register 2" bitfld.long 0x00 31. " ASB95 ,Active Status Bit 95" "Not active,Active" bitfld.long 0x00 30. " ASB94 ,Active Status Bit 94" "Not active,Active" bitfld.long 0x00 29. " ASB93 ,Active Status Bit 93" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB92 ,Active Status Bit 92" "Not active,Active" bitfld.long 0x00 27. " ASB91 ,Active Status Bit 91" "Not active,Active" bitfld.long 0x00 26. " ASB90 ,Active Status Bit 90" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB89 ,Active Status Bit 89" "Not active,Active" bitfld.long 0x00 24. " ASB88 ,Active Status Bit 88" "Not active,Active" bitfld.long 0x00 23. " ASB87 ,Active Status Bit 87" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB86 ,Active Status Bit 86" "Not active,Active" bitfld.long 0x00 21. " ASB85 ,Active Status Bit 85" "Not active,Active" bitfld.long 0x00 20. " ASB84 ,Active Status Bit 84" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB83 ,Active Status Bit 83" "Not active,Active" bitfld.long 0x00 18. " ASB82 ,Active Status Bit 82" "Not active,Active" bitfld.long 0x00 17. " ASB81 ,Active Status Bit 81" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB80 ,Active Status Bit 80" "Not active,Active" bitfld.long 0x00 15. " ASB79 ,Active Status Bit 79" "Not active,Active" bitfld.long 0x00 14. " ASB78 ,Active Status Bit 78" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB77 ,Active Status Bit 77" "Not active,Active" bitfld.long 0x00 12. " ASB76 ,Active Status Bit 76" "Not active,Active" bitfld.long 0x00 11. " ASB75 ,Active Status Bit 75" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB74 ,Active Status Bit 74" "Not active,Active" bitfld.long 0x00 9. " ASB73 ,Active Status Bit 73" "Not active,Active" bitfld.long 0x00 8. " ASB72 ,Active Status Bit 72" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB71 ,Active Status Bit 71" "Not active,Active" bitfld.long 0x00 6. " ASB70 ,Active Status Bit 70" "Not active,Active" bitfld.long 0x00 5. " ASB69 ,Active Status Bit 69" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB68 ,Active Status Bit 68" "Not active,Active" bitfld.long 0x00 3. " ASB67 ,Active Status Bit 67" "Not active,Active" bitfld.long 0x00 2. " ASB66 ,Active Status Bit 66" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB65 ,Active Status Bit 65" "Not active,Active" bitfld.long 0x00 0. " ASB64 ,Active Status Bit 64" "Not active,Active" else hgroup.long 0x0308++0x03 hide.long 0x0 "GICD_ICDABR2,Active Status Register 2" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x03) rgroup.long 0x030C++0x03 line.long 0x0 "GICD_ICDABR3,Active Status Register 3" bitfld.long 0x00 31. " ASB127 ,Active Status Bit 127" "Not active,Active" bitfld.long 0x00 30. " ASB126 ,Active Status Bit 126" "Not active,Active" bitfld.long 0x00 29. " ASB125 ,Active Status Bit 125" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB124 ,Active Status Bit 124" "Not active,Active" bitfld.long 0x00 27. " ASB123 ,Active Status Bit 123" "Not active,Active" bitfld.long 0x00 26. " ASB122 ,Active Status Bit 122" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB121 ,Active Status Bit 121" "Not active,Active" bitfld.long 0x00 24. " ASB120 ,Active Status Bit 120" "Not active,Active" bitfld.long 0x00 23. " ASB119 ,Active Status Bit 119" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB118 ,Active Status Bit 118" "Not active,Active" bitfld.long 0x00 21. " ASB117 ,Active Status Bit 117" "Not active,Active" bitfld.long 0x00 20. " ASB116 ,Active Status Bit 116" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB115 ,Active Status Bit 115" "Not active,Active" bitfld.long 0x00 18. " ASB114 ,Active Status Bit 114" "Not active,Active" bitfld.long 0x00 17. " ASB113 ,Active Status Bit 113" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB112 ,Active Status Bit 112" "Not active,Active" bitfld.long 0x00 15. " ASB111 ,Active Status Bit 111" "Not active,Active" bitfld.long 0x00 14. " ASB110 ,Active Status Bit 110" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB109 ,Active Status Bit 109" "Not active,Active" bitfld.long 0x00 12. " ASB108 ,Active Status Bit 108" "Not active,Active" bitfld.long 0x00 11. " ASB107 ,Active Status Bit 107" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB106 ,Active Status Bit 106" "Not active,Active" bitfld.long 0x00 9. " ASB105 ,Active Status Bit 105" "Not active,Active" bitfld.long 0x00 8. " ASB104 ,Active Status Bit 104" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB103 ,Active Status Bit 103" "Not active,Active" bitfld.long 0x00 6. " ASB102 ,Active Status Bit 102" "Not active,Active" bitfld.long 0x00 5. " ASB101 ,Active Status Bit 101" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB100 ,Active Status Bit 100" "Not active,Active" bitfld.long 0x00 3. " ASB99 ,Active Status Bit 99" "Not active,Active" bitfld.long 0x00 2. " ASB98 ,Active Status Bit 98" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB97 ,Active Status Bit 97" "Not active,Active" bitfld.long 0x00 0. " ASB96 ,Active Status Bit 96" "Not active,Active" else hgroup.long 0x030C++0x03 hide.long 0x0 "GICD_ICDABR3,Active Status Register 3" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x04) rgroup.long 0x0310++0x03 line.long 0x0 "GICD_ICDABR4,Active Status Register 4" bitfld.long 0x00 31. " ASB159 ,Active Status Bit 159" "Not active,Active" bitfld.long 0x00 30. " ASB158 ,Active Status Bit 158" "Not active,Active" bitfld.long 0x00 29. " ASB157 ,Active Status Bit 157" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB156 ,Active Status Bit 156" "Not active,Active" bitfld.long 0x00 27. " ASB155 ,Active Status Bit 155" "Not active,Active" bitfld.long 0x00 26. " ASB154 ,Active Status Bit 154" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB153 ,Active Status Bit 153" "Not active,Active" bitfld.long 0x00 24. " ASB152 ,Active Status Bit 152" "Not active,Active" bitfld.long 0x00 23. " ASB151 ,Active Status Bit 151" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB150 ,Active Status Bit 150" "Not active,Active" bitfld.long 0x00 21. " ASB149 ,Active Status Bit 149" "Not active,Active" bitfld.long 0x00 20. " ASB148 ,Active Status Bit 148" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB147 ,Active Status Bit 147" "Not active,Active" bitfld.long 0x00 18. " ASB146 ,Active Status Bit 146" "Not active,Active" bitfld.long 0x00 17. " ASB145 ,Active Status Bit 145" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB144 ,Active Status Bit 144" "Not active,Active" bitfld.long 0x00 15. " ASB143 ,Active Status Bit 143" "Not active,Active" bitfld.long 0x00 14. " ASB142 ,Active Status Bit 142" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB141 ,Active Status Bit 141" "Not active,Active" bitfld.long 0x00 12. " ASB140 ,Active Status Bit 140" "Not active,Active" bitfld.long 0x00 11. " ASB139 ,Active Status Bit 139" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB138 ,Active Status Bit 138" "Not active,Active" bitfld.long 0x00 9. " ASB137 ,Active Status Bit 137" "Not active,Active" bitfld.long 0x00 8. " ASB136 ,Active Status Bit 136" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB135 ,Active Status Bit 135" "Not active,Active" bitfld.long 0x00 6. " ASB134 ,Active Status Bit 134" "Not active,Active" bitfld.long 0x00 5. " ASB133 ,Active Status Bit 133" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB132 ,Active Status Bit 132" "Not active,Active" bitfld.long 0x00 3. " ASB131 ,Active Status Bit 131" "Not active,Active" bitfld.long 0x00 2. " ASB130 ,Active Status Bit 130" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB129 ,Active Status Bit 129" "Not active,Active" bitfld.long 0x00 0. " ASB128 ,Active Status Bit 128" "Not active,Active" else hgroup.long 0x0310++0x03 hide.long 0x0 "GICD_ICDABR4,Active Status Register 4" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x05) rgroup.long 0x0314++0x03 line.long 0x0 "GICD_ICDABR5,Active Status Register 5" bitfld.long 0x00 31. " ASB191 ,Active Status Bit 191" "Not active,Active" bitfld.long 0x00 30. " ASB190 ,Active Status Bit 190" "Not active,Active" bitfld.long 0x00 29. " ASB189 ,Active Status Bit 189" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB188 ,Active Status Bit 188" "Not active,Active" bitfld.long 0x00 27. " ASB187 ,Active Status Bit 187" "Not active,Active" bitfld.long 0x00 26. " ASB186 ,Active Status Bit 186" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB185 ,Active Status Bit 185" "Not active,Active" bitfld.long 0x00 24. " ASB184 ,Active Status Bit 184" "Not active,Active" bitfld.long 0x00 23. " ASB183 ,Active Status Bit 183" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB182 ,Active Status Bit 182" "Not active,Active" bitfld.long 0x00 21. " ASB181 ,Active Status Bit 181" "Not active,Active" bitfld.long 0x00 20. " ASB180 ,Active Status Bit 180" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB179 ,Active Status Bit 179" "Not active,Active" bitfld.long 0x00 18. " ASB178 ,Active Status Bit 178" "Not active,Active" bitfld.long 0x00 17. " ASB177 ,Active Status Bit 177" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB176 ,Active Status Bit 176" "Not active,Active" bitfld.long 0x00 15. " ASB175 ,Active Status Bit 175" "Not active,Active" bitfld.long 0x00 14. " ASB174 ,Active Status Bit 174" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB173 ,Active Status Bit 173" "Not active,Active" bitfld.long 0x00 12. " ASB172 ,Active Status Bit 172" "Not active,Active" bitfld.long 0x00 11. " ASB171 ,Active Status Bit 171" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB170 ,Active Status Bit 170" "Not active,Active" bitfld.long 0x00 9. " ASB169 ,Active Status Bit 169" "Not active,Active" bitfld.long 0x00 8. " ASB168 ,Active Status Bit 168" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB167 ,Active Status Bit 167" "Not active,Active" bitfld.long 0x00 6. " ASB166 ,Active Status Bit 166" "Not active,Active" bitfld.long 0x00 5. " ASB165 ,Active Status Bit 165" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB164 ,Active Status Bit 164" "Not active,Active" bitfld.long 0x00 3. " ASB163 ,Active Status Bit 163" "Not active,Active" bitfld.long 0x00 2. " ASB162 ,Active Status Bit 162" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB161 ,Active Status Bit 161" "Not active,Active" bitfld.long 0x00 0. " ASB160 ,Active Status Bit 160" "Not active,Active" else hgroup.long 0x0314++0x03 hide.long 0x0 "GICD_ICDABR5,Active Status Register 5" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x06) rgroup.long 0x0318++0x03 line.long 0x0 "GICD_ICDABR6,Active Status Register 6" bitfld.long 0x00 31. " ASB223 ,Active Status Bit 223" "Not active,Active" bitfld.long 0x00 30. " ASB222 ,Active Status Bit 222" "Not active,Active" bitfld.long 0x00 29. " ASB221 ,Active Status Bit 221" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB220 ,Active Status Bit 220" "Not active,Active" bitfld.long 0x00 27. " ASB219 ,Active Status Bit 219" "Not active,Active" bitfld.long 0x00 26. " ASB218 ,Active Status Bit 218" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB217 ,Active Status Bit 217" "Not active,Active" bitfld.long 0x00 24. " ASB216 ,Active Status Bit 216" "Not active,Active" bitfld.long 0x00 23. " ASB215 ,Active Status Bit 215" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB214 ,Active Status Bit 214" "Not active,Active" bitfld.long 0x00 21. " ASB213 ,Active Status Bit 213" "Not active,Active" bitfld.long 0x00 20. " ASB212 ,Active Status Bit 212" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB211 ,Active Status Bit 211" "Not active,Active" bitfld.long 0x00 18. " ASB210 ,Active Status Bit 210" "Not active,Active" bitfld.long 0x00 17. " ASB209 ,Active Status Bit 209" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB208 ,Active Status Bit 208" "Not active,Active" bitfld.long 0x00 15. " ASB207 ,Active Status Bit 207" "Not active,Active" bitfld.long 0x00 14. " ASB206 ,Active Status Bit 206" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB205 ,Active Status Bit 205" "Not active,Active" bitfld.long 0x00 12. " ASB204 ,Active Status Bit 204" "Not active,Active" bitfld.long 0x00 11. " ASB203 ,Active Status Bit 203" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB202 ,Active Status Bit 202" "Not active,Active" bitfld.long 0x00 9. " ASB201 ,Active Status Bit 201" "Not active,Active" bitfld.long 0x00 8. " ASB200 ,Active Status Bit 200" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB199 ,Active Status Bit 199" "Not active,Active" bitfld.long 0x00 6. " ASB198 ,Active Status Bit 198" "Not active,Active" bitfld.long 0x00 5. " ASB197 ,Active Status Bit 197" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB196 ,Active Status Bit 196" "Not active,Active" bitfld.long 0x00 3. " ASB195 ,Active Status Bit 195" "Not active,Active" bitfld.long 0x00 2. " ASB194 ,Active Status Bit 194" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB193 ,Active Status Bit 193" "Not active,Active" bitfld.long 0x00 0. " ASB192 ,Active Status Bit 192" "Not active,Active" else hgroup.long 0x0318++0x03 hide.long 0x0 "GICD_ICDABR6,Active Status Register 6" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x07) rgroup.long 0x031C++0x03 line.long 0x0 "GICD_ICDABR7,Active Status Register 7" bitfld.long 0x00 31. " ASB255 ,Active Status Bit 255" "Not active,Active" bitfld.long 0x00 30. " ASB254 ,Active Status Bit 254" "Not active,Active" bitfld.long 0x00 29. " ASB253 ,Active Status Bit 253" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB252 ,Active Status Bit 252" "Not active,Active" bitfld.long 0x00 27. " ASB251 ,Active Status Bit 251" "Not active,Active" bitfld.long 0x00 26. " ASB250 ,Active Status Bit 250" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB249 ,Active Status Bit 249" "Not active,Active" bitfld.long 0x00 24. " ASB248 ,Active Status Bit 248" "Not active,Active" bitfld.long 0x00 23. " ASB247 ,Active Status Bit 247" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB246 ,Active Status Bit 246" "Not active,Active" bitfld.long 0x00 21. " ASB245 ,Active Status Bit 245" "Not active,Active" bitfld.long 0x00 20. " ASB244 ,Active Status Bit 244" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB243 ,Active Status Bit 243" "Not active,Active" bitfld.long 0x00 18. " ASB242 ,Active Status Bit 242" "Not active,Active" bitfld.long 0x00 17. " ASB241 ,Active Status Bit 241" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB240 ,Active Status Bit 240" "Not active,Active" bitfld.long 0x00 15. " ASB239 ,Active Status Bit 239" "Not active,Active" bitfld.long 0x00 14. " ASB238 ,Active Status Bit 238" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB237 ,Active Status Bit 237" "Not active,Active" bitfld.long 0x00 12. " ASB236 ,Active Status Bit 236" "Not active,Active" bitfld.long 0x00 11. " ASB235 ,Active Status Bit 235" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB234 ,Active Status Bit 234" "Not active,Active" bitfld.long 0x00 9. " ASB233 ,Active Status Bit 233" "Not active,Active" bitfld.long 0x00 8. " ASB232 ,Active Status Bit 232" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB231 ,Active Status Bit 231" "Not active,Active" bitfld.long 0x00 6. " ASB230 ,Active Status Bit 230" "Not active,Active" bitfld.long 0x00 5. " ASB229 ,Active Status Bit 229" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB228 ,Active Status Bit 228" "Not active,Active" bitfld.long 0x00 3. " ASB227 ,Active Status Bit 227" "Not active,Active" bitfld.long 0x00 2. " ASB226 ,Active Status Bit 226" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB225 ,Active Status Bit 225" "Not active,Active" bitfld.long 0x00 0. " ASB224 ,Active Status Bit 224" "Not active,Active" else hgroup.long 0x031C++0x03 hide.long 0x0 "GICD_ICDABR7,Active Status Register 7" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x08) rgroup.long 0x0320++0x03 line.long 0x0 "GICD_ICDABR8,Active Status Register 8" bitfld.long 0x00 31. " ASB287 ,Active Status Bit 287" "Not active,Active" bitfld.long 0x00 30. " ASB286 ,Active Status Bit 286" "Not active,Active" bitfld.long 0x00 29. " ASB285 ,Active Status Bit 285" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB284 ,Active Status Bit 284" "Not active,Active" bitfld.long 0x00 27. " ASB283 ,Active Status Bit 283" "Not active,Active" bitfld.long 0x00 26. " ASB282 ,Active Status Bit 282" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB281 ,Active Status Bit 281" "Not active,Active" bitfld.long 0x00 24. " ASB280 ,Active Status Bit 280" "Not active,Active" bitfld.long 0x00 23. " ASB279 ,Active Status Bit 279" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB278 ,Active Status Bit 278" "Not active,Active" bitfld.long 0x00 21. " ASB277 ,Active Status Bit 277" "Not active,Active" bitfld.long 0x00 20. " ASB276 ,Active Status Bit 276" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB275 ,Active Status Bit 275" "Not active,Active" bitfld.long 0x00 18. " ASB274 ,Active Status Bit 274" "Not active,Active" bitfld.long 0x00 17. " ASB273 ,Active Status Bit 273" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB272 ,Active Status Bit 272" "Not active,Active" bitfld.long 0x00 15. " ASB271 ,Active Status Bit 271" "Not active,Active" bitfld.long 0x00 14. " ASB270 ,Active Status Bit 270" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB269 ,Active Status Bit 269" "Not active,Active" bitfld.long 0x00 12. " ASB268 ,Active Status Bit 268" "Not active,Active" bitfld.long 0x00 11. " ASB267 ,Active Status Bit 267" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB266 ,Active Status Bit 266" "Not active,Active" bitfld.long 0x00 9. " ASB265 ,Active Status Bit 265" "Not active,Active" bitfld.long 0x00 8. " ASB264 ,Active Status Bit 264" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB263 ,Active Status Bit 263" "Not active,Active" bitfld.long 0x00 6. " ASB262 ,Active Status Bit 262" "Not active,Active" bitfld.long 0x00 5. " ASB261 ,Active Status Bit 261" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB260 ,Active Status Bit 260" "Not active,Active" bitfld.long 0x00 3. " ASB259 ,Active Status Bit 259" "Not active,Active" bitfld.long 0x00 2. " ASB258 ,Active Status Bit 258" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB257 ,Active Status Bit 257" "Not active,Active" bitfld.long 0x00 0. " ASB256 ,Active Status Bit 256" "Not active,Active" else hgroup.long 0x0320++0x03 hide.long 0x0 "GICD_ICDABR8,Active Status Register 8" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x09) rgroup.long 0x0324++0x03 line.long 0x0 "GICD_ICDABR9,Active Status Register 9" bitfld.long 0x00 31. " ASB319 ,Active Status Bit 319" "Not active,Active" bitfld.long 0x00 30. " ASB318 ,Active Status Bit 318" "Not active,Active" bitfld.long 0x00 29. " ASB317 ,Active Status Bit 317" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB316 ,Active Status Bit 316" "Not active,Active" bitfld.long 0x00 27. " ASB315 ,Active Status Bit 315" "Not active,Active" bitfld.long 0x00 26. " ASB314 ,Active Status Bit 314" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB313 ,Active Status Bit 313" "Not active,Active" bitfld.long 0x00 24. " ASB312 ,Active Status Bit 312" "Not active,Active" bitfld.long 0x00 23. " ASB311 ,Active Status Bit 311" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB310 ,Active Status Bit 310" "Not active,Active" bitfld.long 0x00 21. " ASB309 ,Active Status Bit 309" "Not active,Active" bitfld.long 0x00 20. " ASB308 ,Active Status Bit 308" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB307 ,Active Status Bit 307" "Not active,Active" bitfld.long 0x00 18. " ASB306 ,Active Status Bit 306" "Not active,Active" bitfld.long 0x00 17. " ASB305 ,Active Status Bit 305" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB304 ,Active Status Bit 304" "Not active,Active" bitfld.long 0x00 15. " ASB303 ,Active Status Bit 303" "Not active,Active" bitfld.long 0x00 14. " ASB302 ,Active Status Bit 302" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB301 ,Active Status Bit 301" "Not active,Active" bitfld.long 0x00 12. " ASB300 ,Active Status Bit 300" "Not active,Active" bitfld.long 0x00 11. " ASB299 ,Active Status Bit 299" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB298 ,Active Status Bit 298" "Not active,Active" bitfld.long 0x00 9. " ASB297 ,Active Status Bit 297" "Not active,Active" bitfld.long 0x00 8. " ASB296 ,Active Status Bit 296" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB295 ,Active Status Bit 295" "Not active,Active" bitfld.long 0x00 6. " ASB294 ,Active Status Bit 294" "Not active,Active" bitfld.long 0x00 5. " ASB293 ,Active Status Bit 293" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB292 ,Active Status Bit 292" "Not active,Active" bitfld.long 0x00 3. " ASB291 ,Active Status Bit 291" "Not active,Active" bitfld.long 0x00 2. " ASB290 ,Active Status Bit 290" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB289 ,Active Status Bit 289" "Not active,Active" bitfld.long 0x00 0. " ASB288 ,Active Status Bit 288" "Not active,Active" else hgroup.long 0x0324++0x03 hide.long 0x0 "GICD_ICDABR9,Active Status Register 9" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x0A) rgroup.long 0x0328++0x03 line.long 0x0 "GICD_ICDABR10,Active Status Register 10" bitfld.long 0x00 31. " ASB351 ,Active Status Bit 351" "Not active,Active" bitfld.long 0x00 30. " ASB350 ,Active Status Bit 350" "Not active,Active" bitfld.long 0x00 29. " ASB349 ,Active Status Bit 349" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB348 ,Active Status Bit 348" "Not active,Active" bitfld.long 0x00 27. " ASB347 ,Active Status Bit 347" "Not active,Active" bitfld.long 0x00 26. " ASB346 ,Active Status Bit 346" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB345 ,Active Status Bit 345" "Not active,Active" bitfld.long 0x00 24. " ASB344 ,Active Status Bit 344" "Not active,Active" bitfld.long 0x00 23. " ASB343 ,Active Status Bit 343" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB342 ,Active Status Bit 342" "Not active,Active" bitfld.long 0x00 21. " ASB341 ,Active Status Bit 341" "Not active,Active" bitfld.long 0x00 20. " ASB340 ,Active Status Bit 340" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB339 ,Active Status Bit 339" "Not active,Active" bitfld.long 0x00 18. " ASB338 ,Active Status Bit 338" "Not active,Active" bitfld.long 0x00 17. " ASB337 ,Active Status Bit 337" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB336 ,Active Status Bit 336" "Not active,Active" bitfld.long 0x00 15. " ASB335 ,Active Status Bit 335" "Not active,Active" bitfld.long 0x00 14. " ASB334 ,Active Status Bit 334" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB333 ,Active Status Bit 333" "Not active,Active" bitfld.long 0x00 12. " ASB332 ,Active Status Bit 332" "Not active,Active" bitfld.long 0x00 11. " ASB331 ,Active Status Bit 331" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB330 ,Active Status Bit 330" "Not active,Active" bitfld.long 0x00 9. " ASB329 ,Active Status Bit 329" "Not active,Active" bitfld.long 0x00 8. " ASB328 ,Active Status Bit 328" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB327 ,Active Status Bit 327" "Not active,Active" bitfld.long 0x00 6. " ASB326 ,Active Status Bit 326" "Not active,Active" bitfld.long 0x00 5. " ASB325 ,Active Status Bit 325" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB324 ,Active Status Bit 324" "Not active,Active" bitfld.long 0x00 3. " ASB323 ,Active Status Bit 323" "Not active,Active" bitfld.long 0x00 2. " ASB322 ,Active Status Bit 322" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB321 ,Active Status Bit 321" "Not active,Active" bitfld.long 0x00 0. " ASB320 ,Active Status Bit 320" "Not active,Active" else hgroup.long 0x0328++0x03 hide.long 0x0 "GICD_ICDABR10,Active Status Register 10" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x0B) rgroup.long 0x032C++0x03 line.long 0x0 "GICD_ICDABR11,Active Status Register 11" bitfld.long 0x00 31. " ASB383 ,Active Status Bit 383" "Not active,Active" bitfld.long 0x00 30. " ASB382 ,Active Status Bit 382" "Not active,Active" bitfld.long 0x00 29. " ASB381 ,Active Status Bit 381" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB380 ,Active Status Bit 380" "Not active,Active" bitfld.long 0x00 27. " ASB379 ,Active Status Bit 379" "Not active,Active" bitfld.long 0x00 26. " ASB378 ,Active Status Bit 378" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB377 ,Active Status Bit 377" "Not active,Active" bitfld.long 0x00 24. " ASB376 ,Active Status Bit 376" "Not active,Active" bitfld.long 0x00 23. " ASB375 ,Active Status Bit 375" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB374 ,Active Status Bit 374" "Not active,Active" bitfld.long 0x00 21. " ASB373 ,Active Status Bit 373" "Not active,Active" bitfld.long 0x00 20. " ASB372 ,Active Status Bit 372" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB371 ,Active Status Bit 371" "Not active,Active" bitfld.long 0x00 18. " ASB370 ,Active Status Bit 370" "Not active,Active" bitfld.long 0x00 17. " ASB369 ,Active Status Bit 369" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB368 ,Active Status Bit 368" "Not active,Active" bitfld.long 0x00 15. " ASB367 ,Active Status Bit 367" "Not active,Active" bitfld.long 0x00 14. " ASB366 ,Active Status Bit 366" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB365 ,Active Status Bit 365" "Not active,Active" bitfld.long 0x00 12. " ASB364 ,Active Status Bit 364" "Not active,Active" bitfld.long 0x00 11. " ASB363 ,Active Status Bit 363" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB362 ,Active Status Bit 362" "Not active,Active" bitfld.long 0x00 9. " ASB361 ,Active Status Bit 361" "Not active,Active" bitfld.long 0x00 8. " ASB360 ,Active Status Bit 360" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB359 ,Active Status Bit 359" "Not active,Active" bitfld.long 0x00 6. " ASB358 ,Active Status Bit 358" "Not active,Active" bitfld.long 0x00 5. " ASB357 ,Active Status Bit 357" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB356 ,Active Status Bit 356" "Not active,Active" bitfld.long 0x00 3. " ASB355 ,Active Status Bit 355" "Not active,Active" bitfld.long 0x00 2. " ASB354 ,Active Status Bit 354" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB353 ,Active Status Bit 353" "Not active,Active" bitfld.long 0x00 0. " ASB352 ,Active Status Bit 352" "Not active,Active" else hgroup.long 0x032C++0x03 hide.long 0x0 "GICD_ICDABR11,Active Status Register 11" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x0C) rgroup.long 0x0330++0x03 line.long 0x0 "GICD_ICDABR12,Active Status Register 12" bitfld.long 0x00 31. " ASB415 ,Active Status Bit 415" "Not active,Active" bitfld.long 0x00 30. " ASB414 ,Active Status Bit 414" "Not active,Active" bitfld.long 0x00 29. " ASB413 ,Active Status Bit 413" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB412 ,Active Status Bit 412" "Not active,Active" bitfld.long 0x00 27. " ASB411 ,Active Status Bit 411" "Not active,Active" bitfld.long 0x00 26. " ASB410 ,Active Status Bit 410" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB409 ,Active Status Bit 409" "Not active,Active" bitfld.long 0x00 24. " ASB408 ,Active Status Bit 408" "Not active,Active" bitfld.long 0x00 23. " ASB407 ,Active Status Bit 407" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB406 ,Active Status Bit 406" "Not active,Active" bitfld.long 0x00 21. " ASB405 ,Active Status Bit 405" "Not active,Active" bitfld.long 0x00 20. " ASB404 ,Active Status Bit 404" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB403 ,Active Status Bit 403" "Not active,Active" bitfld.long 0x00 18. " ASB402 ,Active Status Bit 402" "Not active,Active" bitfld.long 0x00 17. " ASB401 ,Active Status Bit 401" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB400 ,Active Status Bit 400" "Not active,Active" bitfld.long 0x00 15. " ASB399 ,Active Status Bit 399" "Not active,Active" bitfld.long 0x00 14. " ASB398 ,Active Status Bit 398" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB397 ,Active Status Bit 397" "Not active,Active" bitfld.long 0x00 12. " ASB396 ,Active Status Bit 396" "Not active,Active" bitfld.long 0x00 11. " ASB395 ,Active Status Bit 395" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB394 ,Active Status Bit 394" "Not active,Active" bitfld.long 0x00 9. " ASB393 ,Active Status Bit 393" "Not active,Active" bitfld.long 0x00 8. " ASB392 ,Active Status Bit 392" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB391 ,Active Status Bit 391" "Not active,Active" bitfld.long 0x00 6. " ASB390 ,Active Status Bit 390" "Not active,Active" bitfld.long 0x00 5. " ASB389 ,Active Status Bit 389" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB388 ,Active Status Bit 388" "Not active,Active" bitfld.long 0x00 3. " ASB387 ,Active Status Bit 387" "Not active,Active" bitfld.long 0x00 2. " ASB386 ,Active Status Bit 386" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB385 ,Active Status Bit 385" "Not active,Active" bitfld.long 0x00 0. " ASB384 ,Active Status Bit 384" "Not active,Active" else hgroup.long 0x0330++0x03 hide.long 0x0 "GICD_ICDABR12,Active Status Register 12" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x0D) rgroup.long 0x0334++0x03 line.long 0x0 "GICD_ICDABR13,Active Status Register 13" bitfld.long 0x00 31. " ASB447 ,Active Status Bit 447" "Not active,Active" bitfld.long 0x00 30. " ASB446 ,Active Status Bit 446" "Not active,Active" bitfld.long 0x00 29. " ASB445 ,Active Status Bit 445" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB444 ,Active Status Bit 444" "Not active,Active" bitfld.long 0x00 27. " ASB443 ,Active Status Bit 443" "Not active,Active" bitfld.long 0x00 26. " ASB442 ,Active Status Bit 442" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB441 ,Active Status Bit 441" "Not active,Active" bitfld.long 0x00 24. " ASB440 ,Active Status Bit 440" "Not active,Active" bitfld.long 0x00 23. " ASB439 ,Active Status Bit 439" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB438 ,Active Status Bit 438" "Not active,Active" bitfld.long 0x00 21. " ASB437 ,Active Status Bit 437" "Not active,Active" bitfld.long 0x00 20. " ASB436 ,Active Status Bit 436" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB435 ,Active Status Bit 435" "Not active,Active" bitfld.long 0x00 18. " ASB434 ,Active Status Bit 434" "Not active,Active" bitfld.long 0x00 17. " ASB433 ,Active Status Bit 433" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB432 ,Active Status Bit 432" "Not active,Active" bitfld.long 0x00 15. " ASB431 ,Active Status Bit 431" "Not active,Active" bitfld.long 0x00 14. " ASB430 ,Active Status Bit 430" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB429 ,Active Status Bit 429" "Not active,Active" bitfld.long 0x00 12. " ASB428 ,Active Status Bit 428" "Not active,Active" bitfld.long 0x00 11. " ASB427 ,Active Status Bit 427" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB426 ,Active Status Bit 426" "Not active,Active" bitfld.long 0x00 9. " ASB425 ,Active Status Bit 425" "Not active,Active" bitfld.long 0x00 8. " ASB424 ,Active Status Bit 424" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB423 ,Active Status Bit 423" "Not active,Active" bitfld.long 0x00 6. " ASB422 ,Active Status Bit 422" "Not active,Active" bitfld.long 0x00 5. " ASB421 ,Active Status Bit 421" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB420 ,Active Status Bit 420" "Not active,Active" bitfld.long 0x00 3. " ASB419 ,Active Status Bit 419" "Not active,Active" bitfld.long 0x00 2. " ASB418 ,Active Status Bit 418" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB417 ,Active Status Bit 417" "Not active,Active" bitfld.long 0x00 0. " ASB416 ,Active Status Bit 416" "Not active,Active" else hgroup.long 0x0334++0x03 hide.long 0x0 "GICD_ICDABR13,Active Status Register 13" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x0E) rgroup.long 0x0338++0x03 line.long 0x0 "GICD_ICDABR14,Active Status Register 14" bitfld.long 0x00 31. " ASB479 ,Active Status Bit 479" "Not active,Active" bitfld.long 0x00 30. " ASB478 ,Active Status Bit 478" "Not active,Active" bitfld.long 0x00 29. " ASB477 ,Active Status Bit 477" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB476 ,Active Status Bit 476" "Not active,Active" bitfld.long 0x00 27. " ASB475 ,Active Status Bit 475" "Not active,Active" bitfld.long 0x00 26. " ASB474 ,Active Status Bit 474" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB473 ,Active Status Bit 473" "Not active,Active" bitfld.long 0x00 24. " ASB472 ,Active Status Bit 472" "Not active,Active" bitfld.long 0x00 23. " ASB471 ,Active Status Bit 471" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB470 ,Active Status Bit 470" "Not active,Active" bitfld.long 0x00 21. " ASB469 ,Active Status Bit 469" "Not active,Active" bitfld.long 0x00 20. " ASB468 ,Active Status Bit 468" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB467 ,Active Status Bit 467" "Not active,Active" bitfld.long 0x00 18. " ASB466 ,Active Status Bit 466" "Not active,Active" bitfld.long 0x00 17. " ASB465 ,Active Status Bit 465" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB464 ,Active Status Bit 464" "Not active,Active" bitfld.long 0x00 15. " ASB463 ,Active Status Bit 463" "Not active,Active" bitfld.long 0x00 14. " ASB462 ,Active Status Bit 462" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB461 ,Active Status Bit 461" "Not active,Active" bitfld.long 0x00 12. " ASB460 ,Active Status Bit 460" "Not active,Active" bitfld.long 0x00 11. " ASB459 ,Active Status Bit 459" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB458 ,Active Status Bit 458" "Not active,Active" bitfld.long 0x00 9. " ASB457 ,Active Status Bit 457" "Not active,Active" bitfld.long 0x00 8. " ASB456 ,Active Status Bit 456" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB455 ,Active Status Bit 455" "Not active,Active" bitfld.long 0x00 6. " ASB454 ,Active Status Bit 454" "Not active,Active" bitfld.long 0x00 5. " ASB453 ,Active Status Bit 453" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB452 ,Active Status Bit 452" "Not active,Active" bitfld.long 0x00 3. " ASB451 ,Active Status Bit 451" "Not active,Active" bitfld.long 0x00 2. " ASB450 ,Active Status Bit 450" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB449 ,Active Status Bit 449" "Not active,Active" bitfld.long 0x00 0. " ASB448 ,Active Status Bit 448" "Not active,Active" else hgroup.long 0x0338++0x03 hide.long 0x0 "GICD_ICDABR14,Active Status Register 14" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x0F) rgroup.long 0x033C++0x03 line.long 0x0 "GICD_ICDABR15,Active Status Register 15" bitfld.long 0x00 31. " ASB511 ,Active Status Bit 511" "Not active,Active" bitfld.long 0x00 30. " ASB510 ,Active Status Bit 510" "Not active,Active" bitfld.long 0x00 29. " ASB509 ,Active Status Bit 509" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB508 ,Active Status Bit 508" "Not active,Active" bitfld.long 0x00 27. " ASB507 ,Active Status Bit 507" "Not active,Active" bitfld.long 0x00 26. " ASB506 ,Active Status Bit 506" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB505 ,Active Status Bit 505" "Not active,Active" bitfld.long 0x00 24. " ASB504 ,Active Status Bit 504" "Not active,Active" bitfld.long 0x00 23. " ASB503 ,Active Status Bit 503" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB502 ,Active Status Bit 502" "Not active,Active" bitfld.long 0x00 21. " ASB501 ,Active Status Bit 501" "Not active,Active" bitfld.long 0x00 20. " ASB500 ,Active Status Bit 500" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB499 ,Active Status Bit 499" "Not active,Active" bitfld.long 0x00 18. " ASB498 ,Active Status Bit 498" "Not active,Active" bitfld.long 0x00 17. " ASB497 ,Active Status Bit 497" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB496 ,Active Status Bit 496" "Not active,Active" bitfld.long 0x00 15. " ASB495 ,Active Status Bit 495" "Not active,Active" bitfld.long 0x00 14. " ASB494 ,Active Status Bit 494" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB493 ,Active Status Bit 493" "Not active,Active" bitfld.long 0x00 12. " ASB492 ,Active Status Bit 492" "Not active,Active" bitfld.long 0x00 11. " ASB491 ,Active Status Bit 491" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB490 ,Active Status Bit 490" "Not active,Active" bitfld.long 0x00 9. " ASB489 ,Active Status Bit 489" "Not active,Active" bitfld.long 0x00 8. " ASB488 ,Active Status Bit 488" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB487 ,Active Status Bit 487" "Not active,Active" bitfld.long 0x00 6. " ASB486 ,Active Status Bit 486" "Not active,Active" bitfld.long 0x00 5. " ASB485 ,Active Status Bit 485" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB484 ,Active Status Bit 484" "Not active,Active" bitfld.long 0x00 3. " ASB483 ,Active Status Bit 483" "Not active,Active" bitfld.long 0x00 2. " ASB482 ,Active Status Bit 482" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB481 ,Active Status Bit 481" "Not active,Active" bitfld.long 0x00 0. " ASB480 ,Active Status Bit 480" "Not active,Active" else hgroup.long 0x033C++0x03 hide.long 0x0 "GICD_ICDABR15,Active Status Register 15" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x10) rgroup.long 0x0340++0x03 line.long 0x0 "GICD_ICDABR16,Active Status Register 16" bitfld.long 0x00 31. " ASB543 ,Active Status Bit 543" "Not active,Active" bitfld.long 0x00 30. " ASB542 ,Active Status Bit 542" "Not active,Active" bitfld.long 0x00 29. " ASB541 ,Active Status Bit 541" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB540 ,Active Status Bit 540" "Not active,Active" bitfld.long 0x00 27. " ASB539 ,Active Status Bit 539" "Not active,Active" bitfld.long 0x00 26. " ASB538 ,Active Status Bit 538" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB537 ,Active Status Bit 537" "Not active,Active" bitfld.long 0x00 24. " ASB536 ,Active Status Bit 536" "Not active,Active" bitfld.long 0x00 23. " ASB535 ,Active Status Bit 535" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB534 ,Active Status Bit 534" "Not active,Active" bitfld.long 0x00 21. " ASB533 ,Active Status Bit 533" "Not active,Active" bitfld.long 0x00 20. " ASB532 ,Active Status Bit 532" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB531 ,Active Status Bit 531" "Not active,Active" bitfld.long 0x00 18. " ASB530 ,Active Status Bit 530" "Not active,Active" bitfld.long 0x00 17. " ASB529 ,Active Status Bit 529" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB528 ,Active Status Bit 528" "Not active,Active" bitfld.long 0x00 15. " ASB527 ,Active Status Bit 527" "Not active,Active" bitfld.long 0x00 14. " ASB526 ,Active Status Bit 526" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB525 ,Active Status Bit 525" "Not active,Active" bitfld.long 0x00 12. " ASB524 ,Active Status Bit 524" "Not active,Active" bitfld.long 0x00 11. " ASB523 ,Active Status Bit 523" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB522 ,Active Status Bit 522" "Not active,Active" bitfld.long 0x00 9. " ASB521 ,Active Status Bit 521" "Not active,Active" bitfld.long 0x00 8. " ASB520 ,Active Status Bit 520" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB519 ,Active Status Bit 519" "Not active,Active" bitfld.long 0x00 6. " ASB518 ,Active Status Bit 518" "Not active,Active" bitfld.long 0x00 5. " ASB517 ,Active Status Bit 517" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB516 ,Active Status Bit 516" "Not active,Active" bitfld.long 0x00 3. " ASB515 ,Active Status Bit 515" "Not active,Active" bitfld.long 0x00 2. " ASB514 ,Active Status Bit 514" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB513 ,Active Status Bit 513" "Not active,Active" bitfld.long 0x00 0. " ASB512 ,Active Status Bit 512" "Not active,Active" else hgroup.long 0x0340++0x03 hide.long 0x0 "GICD_ICDABR16,Active Status Register 16" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x11) rgroup.long 0x0344++0x03 line.long 0x0 "GICD_ICDABR17,Active Status Register 17" bitfld.long 0x00 31. " ASB575 ,Active Status Bit 575" "Not active,Active" bitfld.long 0x00 30. " ASB574 ,Active Status Bit 574" "Not active,Active" bitfld.long 0x00 29. " ASB573 ,Active Status Bit 573" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB572 ,Active Status Bit 572" "Not active,Active" bitfld.long 0x00 27. " ASB571 ,Active Status Bit 571" "Not active,Active" bitfld.long 0x00 26. " ASB570 ,Active Status Bit 570" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB569 ,Active Status Bit 569" "Not active,Active" bitfld.long 0x00 24. " ASB568 ,Active Status Bit 568" "Not active,Active" bitfld.long 0x00 23. " ASB567 ,Active Status Bit 567" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB566 ,Active Status Bit 566" "Not active,Active" bitfld.long 0x00 21. " ASB565 ,Active Status Bit 565" "Not active,Active" bitfld.long 0x00 20. " ASB564 ,Active Status Bit 564" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB563 ,Active Status Bit 563" "Not active,Active" bitfld.long 0x00 18. " ASB562 ,Active Status Bit 562" "Not active,Active" bitfld.long 0x00 17. " ASB561 ,Active Status Bit 561" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB560 ,Active Status Bit 560" "Not active,Active" bitfld.long 0x00 15. " ASB559 ,Active Status Bit 559" "Not active,Active" bitfld.long 0x00 14. " ASB558 ,Active Status Bit 558" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB557 ,Active Status Bit 557" "Not active,Active" bitfld.long 0x00 12. " ASB556 ,Active Status Bit 556" "Not active,Active" bitfld.long 0x00 11. " ASB555 ,Active Status Bit 555" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB554 ,Active Status Bit 554" "Not active,Active" bitfld.long 0x00 9. " ASB553 ,Active Status Bit 553" "Not active,Active" bitfld.long 0x00 8. " ASB552 ,Active Status Bit 552" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB551 ,Active Status Bit 551" "Not active,Active" bitfld.long 0x00 6. " ASB550 ,Active Status Bit 550" "Not active,Active" bitfld.long 0x00 5. " ASB549 ,Active Status Bit 549" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB548 ,Active Status Bit 548" "Not active,Active" bitfld.long 0x00 3. " ASB547 ,Active Status Bit 547" "Not active,Active" bitfld.long 0x00 2. " ASB546 ,Active Status Bit 546" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB545 ,Active Status Bit 545" "Not active,Active" bitfld.long 0x00 0. " ASB544 ,Active Status Bit 544" "Not active,Active" else hgroup.long 0x0344++0x03 hide.long 0x0 "GICD_ICDABR17,Active Status Register 17" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x12) rgroup.long 0x0348++0x03 line.long 0x0 "GICD_ICDABR18,Active Status Register 18" bitfld.long 0x00 31. " ASB607 ,Active Status Bit 607" "Not active,Active" bitfld.long 0x00 30. " ASB606 ,Active Status Bit 606" "Not active,Active" bitfld.long 0x00 29. " ASB605 ,Active Status Bit 605" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB604 ,Active Status Bit 604" "Not active,Active" bitfld.long 0x00 27. " ASB603 ,Active Status Bit 603" "Not active,Active" bitfld.long 0x00 26. " ASB602 ,Active Status Bit 602" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB601 ,Active Status Bit 601" "Not active,Active" bitfld.long 0x00 24. " ASB600 ,Active Status Bit 600" "Not active,Active" bitfld.long 0x00 23. " ASB599 ,Active Status Bit 599" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB598 ,Active Status Bit 598" "Not active,Active" bitfld.long 0x00 21. " ASB597 ,Active Status Bit 597" "Not active,Active" bitfld.long 0x00 20. " ASB596 ,Active Status Bit 596" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB595 ,Active Status Bit 595" "Not active,Active" bitfld.long 0x00 18. " ASB594 ,Active Status Bit 594" "Not active,Active" bitfld.long 0x00 17. " ASB593 ,Active Status Bit 593" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB592 ,Active Status Bit 592" "Not active,Active" bitfld.long 0x00 15. " ASB591 ,Active Status Bit 591" "Not active,Active" bitfld.long 0x00 14. " ASB590 ,Active Status Bit 590" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB589 ,Active Status Bit 589" "Not active,Active" bitfld.long 0x00 12. " ASB588 ,Active Status Bit 588" "Not active,Active" bitfld.long 0x00 11. " ASB587 ,Active Status Bit 587" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB586 ,Active Status Bit 586" "Not active,Active" bitfld.long 0x00 9. " ASB585 ,Active Status Bit 585" "Not active,Active" bitfld.long 0x00 8. " ASB584 ,Active Status Bit 584" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB583 ,Active Status Bit 583" "Not active,Active" bitfld.long 0x00 6. " ASB582 ,Active Status Bit 582" "Not active,Active" bitfld.long 0x00 5. " ASB581 ,Active Status Bit 581" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB580 ,Active Status Bit 580" "Not active,Active" bitfld.long 0x00 3. " ASB579 ,Active Status Bit 579" "Not active,Active" bitfld.long 0x00 2. " ASB578 ,Active Status Bit 578" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB577 ,Active Status Bit 577" "Not active,Active" bitfld.long 0x00 0. " ASB576 ,Active Status Bit 576" "Not active,Active" else hgroup.long 0x0348++0x03 hide.long 0x0 "GICD_ICDABR18,Active Status Register 18" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x13) rgroup.long 0x034C++0x03 line.long 0x0 "GICD_ICDABR19,Active Status Register 19" bitfld.long 0x00 31. " ASB639 ,Active Status Bit 639" "Not active,Active" bitfld.long 0x00 30. " ASB638 ,Active Status Bit 638" "Not active,Active" bitfld.long 0x00 29. " ASB637 ,Active Status Bit 637" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB636 ,Active Status Bit 636" "Not active,Active" bitfld.long 0x00 27. " ASB635 ,Active Status Bit 635" "Not active,Active" bitfld.long 0x00 26. " ASB634 ,Active Status Bit 634" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB633 ,Active Status Bit 633" "Not active,Active" bitfld.long 0x00 24. " ASB632 ,Active Status Bit 632" "Not active,Active" bitfld.long 0x00 23. " ASB631 ,Active Status Bit 631" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB630 ,Active Status Bit 630" "Not active,Active" bitfld.long 0x00 21. " ASB629 ,Active Status Bit 629" "Not active,Active" bitfld.long 0x00 20. " ASB628 ,Active Status Bit 628" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB627 ,Active Status Bit 627" "Not active,Active" bitfld.long 0x00 18. " ASB626 ,Active Status Bit 626" "Not active,Active" bitfld.long 0x00 17. " ASB625 ,Active Status Bit 625" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB624 ,Active Status Bit 624" "Not active,Active" bitfld.long 0x00 15. " ASB623 ,Active Status Bit 623" "Not active,Active" bitfld.long 0x00 14. " ASB622 ,Active Status Bit 622" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB621 ,Active Status Bit 621" "Not active,Active" bitfld.long 0x00 12. " ASB620 ,Active Status Bit 620" "Not active,Active" bitfld.long 0x00 11. " ASB619 ,Active Status Bit 619" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB618 ,Active Status Bit 618" "Not active,Active" bitfld.long 0x00 9. " ASB617 ,Active Status Bit 617" "Not active,Active" bitfld.long 0x00 8. " ASB616 ,Active Status Bit 616" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB615 ,Active Status Bit 615" "Not active,Active" bitfld.long 0x00 6. " ASB614 ,Active Status Bit 614" "Not active,Active" bitfld.long 0x00 5. " ASB613 ,Active Status Bit 613" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB612 ,Active Status Bit 612" "Not active,Active" bitfld.long 0x00 3. " ASB611 ,Active Status Bit 611" "Not active,Active" bitfld.long 0x00 2. " ASB610 ,Active Status Bit 610" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB609 ,Active Status Bit 609" "Not active,Active" bitfld.long 0x00 0. " ASB608 ,Active Status Bit 608" "Not active,Active" else hgroup.long 0x034C++0x03 hide.long 0x0 "GICD_ICDABR19,Active Status Register 19" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x14) rgroup.long 0x0350++0x03 line.long 0x0 "GICD_ICDABR20,Active Status Register 20" bitfld.long 0x00 31. " ASB671 ,Active Status Bit 671" "Not active,Active" bitfld.long 0x00 30. " ASB670 ,Active Status Bit 670" "Not active,Active" bitfld.long 0x00 29. " ASB669 ,Active Status Bit 669" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB668 ,Active Status Bit 668" "Not active,Active" bitfld.long 0x00 27. " ASB667 ,Active Status Bit 667" "Not active,Active" bitfld.long 0x00 26. " ASB666 ,Active Status Bit 666" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB665 ,Active Status Bit 665" "Not active,Active" bitfld.long 0x00 24. " ASB664 ,Active Status Bit 664" "Not active,Active" bitfld.long 0x00 23. " ASB663 ,Active Status Bit 663" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB662 ,Active Status Bit 662" "Not active,Active" bitfld.long 0x00 21. " ASB661 ,Active Status Bit 661" "Not active,Active" bitfld.long 0x00 20. " ASB660 ,Active Status Bit 660" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB659 ,Active Status Bit 659" "Not active,Active" bitfld.long 0x00 18. " ASB658 ,Active Status Bit 658" "Not active,Active" bitfld.long 0x00 17. " ASB657 ,Active Status Bit 657" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB656 ,Active Status Bit 656" "Not active,Active" bitfld.long 0x00 15. " ASB655 ,Active Status Bit 655" "Not active,Active" bitfld.long 0x00 14. " ASB654 ,Active Status Bit 654" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB653 ,Active Status Bit 653" "Not active,Active" bitfld.long 0x00 12. " ASB652 ,Active Status Bit 652" "Not active,Active" bitfld.long 0x00 11. " ASB651 ,Active Status Bit 651" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB650 ,Active Status Bit 650" "Not active,Active" bitfld.long 0x00 9. " ASB649 ,Active Status Bit 649" "Not active,Active" bitfld.long 0x00 8. " ASB648 ,Active Status Bit 648" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB647 ,Active Status Bit 647" "Not active,Active" bitfld.long 0x00 6. " ASB646 ,Active Status Bit 646" "Not active,Active" bitfld.long 0x00 5. " ASB645 ,Active Status Bit 645" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB644 ,Active Status Bit 644" "Not active,Active" bitfld.long 0x00 3. " ASB643 ,Active Status Bit 643" "Not active,Active" bitfld.long 0x00 2. " ASB642 ,Active Status Bit 642" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB641 ,Active Status Bit 641" "Not active,Active" bitfld.long 0x00 0. " ASB640 ,Active Status Bit 640" "Not active,Active" else hgroup.long 0x0350++0x03 hide.long 0x0 "GICD_ICDABR20,Active Status Register 20" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x15) rgroup.long 0x0354++0x03 line.long 0x0 "GICD_ICDABR21,Active Status Register 21" bitfld.long 0x00 31. " ASB703 ,Active Status Bit 703" "Not active,Active" bitfld.long 0x00 30. " ASB702 ,Active Status Bit 702" "Not active,Active" bitfld.long 0x00 29. " ASB701 ,Active Status Bit 701" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB700 ,Active Status Bit 700" "Not active,Active" bitfld.long 0x00 27. " ASB699 ,Active Status Bit 699" "Not active,Active" bitfld.long 0x00 26. " ASB698 ,Active Status Bit 698" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB697 ,Active Status Bit 697" "Not active,Active" bitfld.long 0x00 24. " ASB696 ,Active Status Bit 696" "Not active,Active" bitfld.long 0x00 23. " ASB695 ,Active Status Bit 695" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB694 ,Active Status Bit 694" "Not active,Active" bitfld.long 0x00 21. " ASB693 ,Active Status Bit 693" "Not active,Active" bitfld.long 0x00 20. " ASB692 ,Active Status Bit 692" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB691 ,Active Status Bit 691" "Not active,Active" bitfld.long 0x00 18. " ASB690 ,Active Status Bit 690" "Not active,Active" bitfld.long 0x00 17. " ASB689 ,Active Status Bit 689" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB688 ,Active Status Bit 688" "Not active,Active" bitfld.long 0x00 15. " ASB687 ,Active Status Bit 687" "Not active,Active" bitfld.long 0x00 14. " ASB686 ,Active Status Bit 686" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB685 ,Active Status Bit 685" "Not active,Active" bitfld.long 0x00 12. " ASB684 ,Active Status Bit 684" "Not active,Active" bitfld.long 0x00 11. " ASB683 ,Active Status Bit 683" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB682 ,Active Status Bit 682" "Not active,Active" bitfld.long 0x00 9. " ASB681 ,Active Status Bit 681" "Not active,Active" bitfld.long 0x00 8. " ASB680 ,Active Status Bit 680" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB679 ,Active Status Bit 679" "Not active,Active" bitfld.long 0x00 6. " ASB678 ,Active Status Bit 678" "Not active,Active" bitfld.long 0x00 5. " ASB677 ,Active Status Bit 677" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB676 ,Active Status Bit 676" "Not active,Active" bitfld.long 0x00 3. " ASB675 ,Active Status Bit 675" "Not active,Active" bitfld.long 0x00 2. " ASB674 ,Active Status Bit 674" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB673 ,Active Status Bit 673" "Not active,Active" bitfld.long 0x00 0. " ASB672 ,Active Status Bit 672" "Not active,Active" else hgroup.long 0x0354++0x03 hide.long 0x0 "GICD_ICDABR21,Active Status Register 21" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x16) rgroup.long 0x0358++0x03 line.long 0x0 "GICD_ICDABR22,Active Status Register 22" bitfld.long 0x00 31. " ASB735 ,Active Status Bit 735" "Not active,Active" bitfld.long 0x00 30. " ASB734 ,Active Status Bit 734" "Not active,Active" bitfld.long 0x00 29. " ASB733 ,Active Status Bit 733" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB732 ,Active Status Bit 732" "Not active,Active" bitfld.long 0x00 27. " ASB731 ,Active Status Bit 731" "Not active,Active" bitfld.long 0x00 26. " ASB730 ,Active Status Bit 730" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB729 ,Active Status Bit 729" "Not active,Active" bitfld.long 0x00 24. " ASB728 ,Active Status Bit 728" "Not active,Active" bitfld.long 0x00 23. " ASB727 ,Active Status Bit 727" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB726 ,Active Status Bit 726" "Not active,Active" bitfld.long 0x00 21. " ASB725 ,Active Status Bit 725" "Not active,Active" bitfld.long 0x00 20. " ASB724 ,Active Status Bit 724" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB723 ,Active Status Bit 723" "Not active,Active" bitfld.long 0x00 18. " ASB722 ,Active Status Bit 722" "Not active,Active" bitfld.long 0x00 17. " ASB721 ,Active Status Bit 721" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB720 ,Active Status Bit 720" "Not active,Active" bitfld.long 0x00 15. " ASB719 ,Active Status Bit 719" "Not active,Active" bitfld.long 0x00 14. " ASB718 ,Active Status Bit 718" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB717 ,Active Status Bit 717" "Not active,Active" bitfld.long 0x00 12. " ASB716 ,Active Status Bit 716" "Not active,Active" bitfld.long 0x00 11. " ASB715 ,Active Status Bit 715" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB714 ,Active Status Bit 714" "Not active,Active" bitfld.long 0x00 9. " ASB713 ,Active Status Bit 713" "Not active,Active" bitfld.long 0x00 8. " ASB712 ,Active Status Bit 712" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB711 ,Active Status Bit 711" "Not active,Active" bitfld.long 0x00 6. " ASB710 ,Active Status Bit 710" "Not active,Active" bitfld.long 0x00 5. " ASB709 ,Active Status Bit 709" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB708 ,Active Status Bit 708" "Not active,Active" bitfld.long 0x00 3. " ASB707 ,Active Status Bit 707" "Not active,Active" bitfld.long 0x00 2. " ASB706 ,Active Status Bit 706" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB705 ,Active Status Bit 705" "Not active,Active" bitfld.long 0x00 0. " ASB704 ,Active Status Bit 704" "Not active,Active" else hgroup.long 0x0358++0x03 hide.long 0x0 "GICD_ICDABR22,Active Status Register 22" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x17) rgroup.long 0x035C++0x03 line.long 0x0 "GICD_ICDABR23,Active Status Register 23" bitfld.long 0x00 31. " ASB767 ,Active Status Bit 767" "Not active,Active" bitfld.long 0x00 30. " ASB766 ,Active Status Bit 766" "Not active,Active" bitfld.long 0x00 29. " ASB765 ,Active Status Bit 765" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB764 ,Active Status Bit 764" "Not active,Active" bitfld.long 0x00 27. " ASB763 ,Active Status Bit 763" "Not active,Active" bitfld.long 0x00 26. " ASB762 ,Active Status Bit 762" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB761 ,Active Status Bit 761" "Not active,Active" bitfld.long 0x00 24. " ASB760 ,Active Status Bit 760" "Not active,Active" bitfld.long 0x00 23. " ASB759 ,Active Status Bit 759" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB758 ,Active Status Bit 758" "Not active,Active" bitfld.long 0x00 21. " ASB757 ,Active Status Bit 757" "Not active,Active" bitfld.long 0x00 20. " ASB756 ,Active Status Bit 756" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB755 ,Active Status Bit 755" "Not active,Active" bitfld.long 0x00 18. " ASB754 ,Active Status Bit 754" "Not active,Active" bitfld.long 0x00 17. " ASB753 ,Active Status Bit 753" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB752 ,Active Status Bit 752" "Not active,Active" bitfld.long 0x00 15. " ASB751 ,Active Status Bit 751" "Not active,Active" bitfld.long 0x00 14. " ASB750 ,Active Status Bit 750" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB749 ,Active Status Bit 749" "Not active,Active" bitfld.long 0x00 12. " ASB748 ,Active Status Bit 748" "Not active,Active" bitfld.long 0x00 11. " ASB747 ,Active Status Bit 747" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB746 ,Active Status Bit 746" "Not active,Active" bitfld.long 0x00 9. " ASB745 ,Active Status Bit 745" "Not active,Active" bitfld.long 0x00 8. " ASB744 ,Active Status Bit 744" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB743 ,Active Status Bit 743" "Not active,Active" bitfld.long 0x00 6. " ASB742 ,Active Status Bit 742" "Not active,Active" bitfld.long 0x00 5. " ASB741 ,Active Status Bit 741" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB740 ,Active Status Bit 740" "Not active,Active" bitfld.long 0x00 3. " ASB739 ,Active Status Bit 739" "Not active,Active" bitfld.long 0x00 2. " ASB738 ,Active Status Bit 738" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB737 ,Active Status Bit 737" "Not active,Active" bitfld.long 0x00 0. " ASB736 ,Active Status Bit 736" "Not active,Active" else hgroup.long 0x035C++0x03 hide.long 0x0 "GICD_ICDABR23,Active Status Register 23" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x18) rgroup.long 0x0360++0x03 line.long 0x0 "GICD_ICDABR24,Active Status Register 24" bitfld.long 0x00 31. " ASB799 ,Active Status Bit 799" "Not active,Active" bitfld.long 0x00 30. " ASB798 ,Active Status Bit 798" "Not active,Active" bitfld.long 0x00 29. " ASB797 ,Active Status Bit 797" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB796 ,Active Status Bit 796" "Not active,Active" bitfld.long 0x00 27. " ASB795 ,Active Status Bit 795" "Not active,Active" bitfld.long 0x00 26. " ASB794 ,Active Status Bit 794" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB793 ,Active Status Bit 793" "Not active,Active" bitfld.long 0x00 24. " ASB792 ,Active Status Bit 792" "Not active,Active" bitfld.long 0x00 23. " ASB791 ,Active Status Bit 791" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB790 ,Active Status Bit 790" "Not active,Active" bitfld.long 0x00 21. " ASB789 ,Active Status Bit 789" "Not active,Active" bitfld.long 0x00 20. " ASB788 ,Active Status Bit 788" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB787 ,Active Status Bit 787" "Not active,Active" bitfld.long 0x00 18. " ASB786 ,Active Status Bit 786" "Not active,Active" bitfld.long 0x00 17. " ASB785 ,Active Status Bit 785" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB784 ,Active Status Bit 784" "Not active,Active" bitfld.long 0x00 15. " ASB783 ,Active Status Bit 783" "Not active,Active" bitfld.long 0x00 14. " ASB782 ,Active Status Bit 782" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB781 ,Active Status Bit 781" "Not active,Active" bitfld.long 0x00 12. " ASB780 ,Active Status Bit 780" "Not active,Active" bitfld.long 0x00 11. " ASB779 ,Active Status Bit 779" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB778 ,Active Status Bit 778" "Not active,Active" bitfld.long 0x00 9. " ASB777 ,Active Status Bit 777" "Not active,Active" bitfld.long 0x00 8. " ASB776 ,Active Status Bit 776" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB775 ,Active Status Bit 775" "Not active,Active" bitfld.long 0x00 6. " ASB774 ,Active Status Bit 774" "Not active,Active" bitfld.long 0x00 5. " ASB773 ,Active Status Bit 773" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB772 ,Active Status Bit 772" "Not active,Active" bitfld.long 0x00 3. " ASB771 ,Active Status Bit 771" "Not active,Active" bitfld.long 0x00 2. " ASB770 ,Active Status Bit 770" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB769 ,Active Status Bit 769" "Not active,Active" bitfld.long 0x00 0. " ASB768 ,Active Status Bit 768" "Not active,Active" else hgroup.long 0x0360++0x03 hide.long 0x0 "GICD_ICDABR24,Active Status Register 24" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x19) rgroup.long 0x0364++0x03 line.long 0x0 "GICD_ICDABR25,Active Status Register 25" bitfld.long 0x00 31. " ASB831 ,Active Status Bit 831" "Not active,Active" bitfld.long 0x00 30. " ASB830 ,Active Status Bit 830" "Not active,Active" bitfld.long 0x00 29. " ASB829 ,Active Status Bit 829" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB828 ,Active Status Bit 828" "Not active,Active" bitfld.long 0x00 27. " ASB827 ,Active Status Bit 827" "Not active,Active" bitfld.long 0x00 26. " ASB826 ,Active Status Bit 826" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB825 ,Active Status Bit 825" "Not active,Active" bitfld.long 0x00 24. " ASB824 ,Active Status Bit 824" "Not active,Active" bitfld.long 0x00 23. " ASB823 ,Active Status Bit 823" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB822 ,Active Status Bit 822" "Not active,Active" bitfld.long 0x00 21. " ASB821 ,Active Status Bit 821" "Not active,Active" bitfld.long 0x00 20. " ASB820 ,Active Status Bit 820" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB819 ,Active Status Bit 819" "Not active,Active" bitfld.long 0x00 18. " ASB818 ,Active Status Bit 818" "Not active,Active" bitfld.long 0x00 17. " ASB817 ,Active Status Bit 817" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB816 ,Active Status Bit 816" "Not active,Active" bitfld.long 0x00 15. " ASB815 ,Active Status Bit 815" "Not active,Active" bitfld.long 0x00 14. " ASB814 ,Active Status Bit 814" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB813 ,Active Status Bit 813" "Not active,Active" bitfld.long 0x00 12. " ASB812 ,Active Status Bit 812" "Not active,Active" bitfld.long 0x00 11. " ASB811 ,Active Status Bit 811" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB810 ,Active Status Bit 810" "Not active,Active" bitfld.long 0x00 9. " ASB809 ,Active Status Bit 809" "Not active,Active" bitfld.long 0x00 8. " ASB808 ,Active Status Bit 808" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB807 ,Active Status Bit 807" "Not active,Active" bitfld.long 0x00 6. " ASB806 ,Active Status Bit 806" "Not active,Active" bitfld.long 0x00 5. " ASB805 ,Active Status Bit 805" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB804 ,Active Status Bit 804" "Not active,Active" bitfld.long 0x00 3. " ASB803 ,Active Status Bit 803" "Not active,Active" bitfld.long 0x00 2. " ASB802 ,Active Status Bit 802" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB801 ,Active Status Bit 801" "Not active,Active" bitfld.long 0x00 0. " ASB800 ,Active Status Bit 800" "Not active,Active" else hgroup.long 0x0364++0x03 hide.long 0x0 "GICD_ICDABR25,Active Status Register 25" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x1A) rgroup.long 0x0368++0x03 line.long 0x0 "GICD_ICDABR26,Active Status Register 26" bitfld.long 0x00 31. " ASB863 ,Active Status Bit 863" "Not active,Active" bitfld.long 0x00 30. " ASB862 ,Active Status Bit 862" "Not active,Active" bitfld.long 0x00 29. " ASB861 ,Active Status Bit 861" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB860 ,Active Status Bit 860" "Not active,Active" bitfld.long 0x00 27. " ASB859 ,Active Status Bit 859" "Not active,Active" bitfld.long 0x00 26. " ASB858 ,Active Status Bit 858" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB857 ,Active Status Bit 857" "Not active,Active" bitfld.long 0x00 24. " ASB856 ,Active Status Bit 856" "Not active,Active" bitfld.long 0x00 23. " ASB855 ,Active Status Bit 855" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB854 ,Active Status Bit 854" "Not active,Active" bitfld.long 0x00 21. " ASB853 ,Active Status Bit 853" "Not active,Active" bitfld.long 0x00 20. " ASB852 ,Active Status Bit 852" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB851 ,Active Status Bit 851" "Not active,Active" bitfld.long 0x00 18. " ASB850 ,Active Status Bit 850" "Not active,Active" bitfld.long 0x00 17. " ASB849 ,Active Status Bit 849" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB848 ,Active Status Bit 848" "Not active,Active" bitfld.long 0x00 15. " ASB847 ,Active Status Bit 847" "Not active,Active" bitfld.long 0x00 14. " ASB846 ,Active Status Bit 846" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB845 ,Active Status Bit 845" "Not active,Active" bitfld.long 0x00 12. " ASB844 ,Active Status Bit 844" "Not active,Active" bitfld.long 0x00 11. " ASB843 ,Active Status Bit 843" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB842 ,Active Status Bit 842" "Not active,Active" bitfld.long 0x00 9. " ASB841 ,Active Status Bit 841" "Not active,Active" bitfld.long 0x00 8. " ASB840 ,Active Status Bit 840" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB839 ,Active Status Bit 839" "Not active,Active" bitfld.long 0x00 6. " ASB838 ,Active Status Bit 838" "Not active,Active" bitfld.long 0x00 5. " ASB837 ,Active Status Bit 837" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB836 ,Active Status Bit 836" "Not active,Active" bitfld.long 0x00 3. " ASB835 ,Active Status Bit 835" "Not active,Active" bitfld.long 0x00 2. " ASB834 ,Active Status Bit 834" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB833 ,Active Status Bit 833" "Not active,Active" bitfld.long 0x00 0. " ASB832 ,Active Status Bit 832" "Not active,Active" else hgroup.long 0x0368++0x03 hide.long 0x0 "GICD_ICDABR26,Active Status Register 26" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x1B) rgroup.long 0x036C++0x03 line.long 0x0 "GICD_ICDABR27,Active Status Register 27" bitfld.long 0x00 31. " ASB895 ,Active Status Bit 895" "Not active,Active" bitfld.long 0x00 30. " ASB894 ,Active Status Bit 894" "Not active,Active" bitfld.long 0x00 29. " ASB893 ,Active Status Bit 893" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB892 ,Active Status Bit 892" "Not active,Active" bitfld.long 0x00 27. " ASB891 ,Active Status Bit 891" "Not active,Active" bitfld.long 0x00 26. " ASB890 ,Active Status Bit 890" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB889 ,Active Status Bit 889" "Not active,Active" bitfld.long 0x00 24. " ASB888 ,Active Status Bit 888" "Not active,Active" bitfld.long 0x00 23. " ASB887 ,Active Status Bit 887" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB886 ,Active Status Bit 886" "Not active,Active" bitfld.long 0x00 21. " ASB885 ,Active Status Bit 885" "Not active,Active" bitfld.long 0x00 20. " ASB884 ,Active Status Bit 884" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB883 ,Active Status Bit 883" "Not active,Active" bitfld.long 0x00 18. " ASB882 ,Active Status Bit 882" "Not active,Active" bitfld.long 0x00 17. " ASB881 ,Active Status Bit 881" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB880 ,Active Status Bit 880" "Not active,Active" bitfld.long 0x00 15. " ASB879 ,Active Status Bit 879" "Not active,Active" bitfld.long 0x00 14. " ASB878 ,Active Status Bit 878" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB877 ,Active Status Bit 877" "Not active,Active" bitfld.long 0x00 12. " ASB876 ,Active Status Bit 876" "Not active,Active" bitfld.long 0x00 11. " ASB875 ,Active Status Bit 875" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB874 ,Active Status Bit 874" "Not active,Active" bitfld.long 0x00 9. " ASB873 ,Active Status Bit 873" "Not active,Active" bitfld.long 0x00 8. " ASB872 ,Active Status Bit 872" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB871 ,Active Status Bit 871" "Not active,Active" bitfld.long 0x00 6. " ASB870 ,Active Status Bit 870" "Not active,Active" bitfld.long 0x00 5. " ASB869 ,Active Status Bit 869" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB868 ,Active Status Bit 868" "Not active,Active" bitfld.long 0x00 3. " ASB867 ,Active Status Bit 867" "Not active,Active" bitfld.long 0x00 2. " ASB866 ,Active Status Bit 866" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB865 ,Active Status Bit 865" "Not active,Active" bitfld.long 0x00 0. " ASB864 ,Active Status Bit 864" "Not active,Active" else hgroup.long 0x036C++0x03 hide.long 0x0 "GICD_ICDABR27,Active Status Register 27" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x1C) rgroup.long 0x0370++0x03 line.long 0x0 "GICD_ICDABR28,Active Status Register 28" bitfld.long 0x00 31. " ASB927 ,Active Status Bit 927" "Not active,Active" bitfld.long 0x00 30. " ASB926 ,Active Status Bit 926" "Not active,Active" bitfld.long 0x00 29. " ASB925 ,Active Status Bit 925" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB924 ,Active Status Bit 924" "Not active,Active" bitfld.long 0x00 27. " ASB923 ,Active Status Bit 923" "Not active,Active" bitfld.long 0x00 26. " ASB922 ,Active Status Bit 922" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB921 ,Active Status Bit 921" "Not active,Active" bitfld.long 0x00 24. " ASB920 ,Active Status Bit 920" "Not active,Active" bitfld.long 0x00 23. " ASB919 ,Active Status Bit 919" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB918 ,Active Status Bit 918" "Not active,Active" bitfld.long 0x00 21. " ASB917 ,Active Status Bit 917" "Not active,Active" bitfld.long 0x00 20. " ASB916 ,Active Status Bit 916" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB915 ,Active Status Bit 915" "Not active,Active" bitfld.long 0x00 18. " ASB914 ,Active Status Bit 914" "Not active,Active" bitfld.long 0x00 17. " ASB913 ,Active Status Bit 913" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB912 ,Active Status Bit 912" "Not active,Active" bitfld.long 0x00 15. " ASB911 ,Active Status Bit 911" "Not active,Active" bitfld.long 0x00 14. " ASB910 ,Active Status Bit 910" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB909 ,Active Status Bit 909" "Not active,Active" bitfld.long 0x00 12. " ASB908 ,Active Status Bit 908" "Not active,Active" bitfld.long 0x00 11. " ASB907 ,Active Status Bit 907" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB906 ,Active Status Bit 906" "Not active,Active" bitfld.long 0x00 9. " ASB905 ,Active Status Bit 905" "Not active,Active" bitfld.long 0x00 8. " ASB904 ,Active Status Bit 904" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB903 ,Active Status Bit 903" "Not active,Active" bitfld.long 0x00 6. " ASB902 ,Active Status Bit 902" "Not active,Active" bitfld.long 0x00 5. " ASB901 ,Active Status Bit 901" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB900 ,Active Status Bit 900" "Not active,Active" bitfld.long 0x00 3. " ASB899 ,Active Status Bit 899" "Not active,Active" bitfld.long 0x00 2. " ASB898 ,Active Status Bit 898" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB897 ,Active Status Bit 897" "Not active,Active" bitfld.long 0x00 0. " ASB896 ,Active Status Bit 896" "Not active,Active" else hgroup.long 0x0370++0x03 hide.long 0x0 "GICD_ICDABR28,Active Status Register 28" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x1D) rgroup.long 0x0374++0x03 line.long 0x0 "GICD_ICDABR29,Active Status Register 29" bitfld.long 0x00 31. " ASB959 ,Active Status Bit 959" "Not active,Active" bitfld.long 0x00 30. " ASB958 ,Active Status Bit 958" "Not active,Active" bitfld.long 0x00 29. " ASB957 ,Active Status Bit 957" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB956 ,Active Status Bit 956" "Not active,Active" bitfld.long 0x00 27. " ASB955 ,Active Status Bit 955" "Not active,Active" bitfld.long 0x00 26. " ASB954 ,Active Status Bit 954" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB953 ,Active Status Bit 953" "Not active,Active" bitfld.long 0x00 24. " ASB952 ,Active Status Bit 952" "Not active,Active" bitfld.long 0x00 23. " ASB951 ,Active Status Bit 951" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB950 ,Active Status Bit 950" "Not active,Active" bitfld.long 0x00 21. " ASB949 ,Active Status Bit 949" "Not active,Active" bitfld.long 0x00 20. " ASB948 ,Active Status Bit 948" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB947 ,Active Status Bit 947" "Not active,Active" bitfld.long 0x00 18. " ASB946 ,Active Status Bit 946" "Not active,Active" bitfld.long 0x00 17. " ASB945 ,Active Status Bit 945" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB944 ,Active Status Bit 944" "Not active,Active" bitfld.long 0x00 15. " ASB943 ,Active Status Bit 943" "Not active,Active" bitfld.long 0x00 14. " ASB942 ,Active Status Bit 942" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB941 ,Active Status Bit 941" "Not active,Active" bitfld.long 0x00 12. " ASB940 ,Active Status Bit 940" "Not active,Active" bitfld.long 0x00 11. " ASB939 ,Active Status Bit 939" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB938 ,Active Status Bit 938" "Not active,Active" bitfld.long 0x00 9. " ASB937 ,Active Status Bit 937" "Not active,Active" bitfld.long 0x00 8. " ASB936 ,Active Status Bit 936" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB935 ,Active Status Bit 935" "Not active,Active" bitfld.long 0x00 6. " ASB934 ,Active Status Bit 934" "Not active,Active" bitfld.long 0x00 5. " ASB933 ,Active Status Bit 933" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB932 ,Active Status Bit 932" "Not active,Active" bitfld.long 0x00 3. " ASB931 ,Active Status Bit 931" "Not active,Active" bitfld.long 0x00 2. " ASB930 ,Active Status Bit 930" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB929 ,Active Status Bit 929" "Not active,Active" bitfld.long 0x00 0. " ASB928 ,Active Status Bit 928" "Not active,Active" else hgroup.long 0x0374++0x03 hide.long 0x0 "GICD_ICDABR29,Active Status Register 29" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x1E) rgroup.long 0x0378++0x03 line.long 0x0 "GICD_ICDABR30,Active Status Register 30" bitfld.long 0x00 31. " ASB991 ,Active Status Bit 991" "Not active,Active" bitfld.long 0x00 30. " ASB990 ,Active Status Bit 990" "Not active,Active" bitfld.long 0x00 29. " ASB989 ,Active Status Bit 989" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB988 ,Active Status Bit 988" "Not active,Active" bitfld.long 0x00 27. " ASB987 ,Active Status Bit 987" "Not active,Active" bitfld.long 0x00 26. " ASB986 ,Active Status Bit 986" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB985 ,Active Status Bit 985" "Not active,Active" bitfld.long 0x00 24. " ASB984 ,Active Status Bit 984" "Not active,Active" bitfld.long 0x00 23. " ASB983 ,Active Status Bit 983" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB982 ,Active Status Bit 982" "Not active,Active" bitfld.long 0x00 21. " ASB981 ,Active Status Bit 981" "Not active,Active" bitfld.long 0x00 20. " ASB980 ,Active Status Bit 980" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB979 ,Active Status Bit 979" "Not active,Active" bitfld.long 0x00 18. " ASB978 ,Active Status Bit 978" "Not active,Active" bitfld.long 0x00 17. " ASB977 ,Active Status Bit 977" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB976 ,Active Status Bit 976" "Not active,Active" bitfld.long 0x00 15. " ASB975 ,Active Status Bit 975" "Not active,Active" bitfld.long 0x00 14. " ASB974 ,Active Status Bit 974" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB973 ,Active Status Bit 973" "Not active,Active" bitfld.long 0x00 12. " ASB972 ,Active Status Bit 972" "Not active,Active" bitfld.long 0x00 11. " ASB971 ,Active Status Bit 971" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB970 ,Active Status Bit 970" "Not active,Active" bitfld.long 0x00 9. " ASB969 ,Active Status Bit 969" "Not active,Active" bitfld.long 0x00 8. " ASB968 ,Active Status Bit 968" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB967 ,Active Status Bit 967" "Not active,Active" bitfld.long 0x00 6. " ASB966 ,Active Status Bit 966" "Not active,Active" bitfld.long 0x00 5. " ASB965 ,Active Status Bit 965" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB964 ,Active Status Bit 964" "Not active,Active" bitfld.long 0x00 3. " ASB963 ,Active Status Bit 963" "Not active,Active" bitfld.long 0x00 2. " ASB962 ,Active Status Bit 962" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB961 ,Active Status Bit 961" "Not active,Active" bitfld.long 0x00 0. " ASB960 ,Active Status Bit 960" "Not active,Active" else hgroup.long 0x0378++0x03 hide.long 0x0 "GICD_ICDABR30,Active Status Register 30" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)==0x1F) rgroup.long 0x037C++0x03 line.long 0x0 "GICD_ICDABR31,Active Status Register 31" bitfld.long 0x00 27. " ASB1019 ,Active Status Bit 1019" "Not active,Active" bitfld.long 0x00 26. " ASB1018 ,Active Status Bit 1018" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB1017 ,Active Status Bit 1017" "Not active,Active" bitfld.long 0x00 24. " ASB1016 ,Active Status Bit 1016" "Not active,Active" bitfld.long 0x00 23. " ASB1015 ,Active Status Bit 1015" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB1014 ,Active Status Bit 1014" "Not active,Active" bitfld.long 0x00 21. " ASB1013 ,Active Status Bit 1013" "Not active,Active" bitfld.long 0x00 20. " ASB1012 ,Active Status Bit 1012" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB1011 ,Active Status Bit 1011" "Not active,Active" bitfld.long 0x00 18. " ASB1010 ,Active Status Bit 1010" "Not active,Active" bitfld.long 0x00 17. " ASB1009 ,Active Status Bit 1009" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB1008 ,Active Status Bit 1008" "Not active,Active" bitfld.long 0x00 15. " ASB1007 ,Active Status Bit 1007" "Not active,Active" bitfld.long 0x00 14. " ASB1006 ,Active Status Bit 1006" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB1005 ,Active Status Bit 1005" "Not active,Active" bitfld.long 0x00 12. " ASB1004 ,Active Status Bit 1004" "Not active,Active" bitfld.long 0x00 11. " ASB1003 ,Active Status Bit 1003" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB1002 ,Active Status Bit 1002" "Not active,Active" bitfld.long 0x00 9. " ASB1001 ,Active Status Bit 1001" "Not active,Active" bitfld.long 0x00 8. " ASB1000 ,Active Status Bit 1000" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB999 ,Active Status Bit 999" "Not active,Active" bitfld.long 0x00 6. " ASB998 ,Active Status Bit 998" "Not active,Active" bitfld.long 0x00 5. " ASB997 ,Active Status Bit 997" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB996 ,Active Status Bit 996" "Not active,Active" bitfld.long 0x00 3. " ASB995 ,Active Status Bit 995" "Not active,Active" bitfld.long 0x00 2. " ASB994 ,Active Status Bit 994" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB993 ,Active Status Bit 993" "Not active,Active" bitfld.long 0x00 0. " ASB992 ,Active Status Bit 992" "Not active,Active" else hgroup.long 0x037C++0x03 hide.long 0x0 "GICD_ICDABR31,Active Status Register 31" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif tree.end width 20. tree "Priority Registers" group.long 0x400++0x03 line.long 0x00 "GICD_IPRIORITYR0,Interrupt Priority Register 0" hexmask.long.byte 0x00 24.--31. 1. " INTID3 ,Interrupt ID3 Priority/Priority Byte Offset 3 " hexmask.long.byte 0x00 16.--23. 1. " INTID2 ,Interrupt ID2 Priority/Priority Byte Offset 2 " hexmask.long.byte 0x00 8.--15. 1. " INTID1 ,Interrupt ID1 Priority/Priority Byte Offset 1 " hexmask.long.byte 0x00 0.--7. 1. " INTID0 ,Interrupt ID0 Priority/Priority Byte Offset 0 " group.long 0x404++0x03 line.long 0x00 "GICD_IPRIORITYR1,Interrupt Priority Register 1" hexmask.long.byte 0x00 24.--31. 1. " INTID7 ,Interrupt ID7 Priority/Priority Byte Offset 7 " hexmask.long.byte 0x00 16.--23. 1. " INTID6 ,Interrupt ID6 Priority/Priority Byte Offset 6 " hexmask.long.byte 0x00 8.--15. 1. " INTID5 ,Interrupt ID5 Priority/Priority Byte Offset 5 " hexmask.long.byte 0x00 0.--7. 1. " INTID4 ,Interrupt ID4 Priority/Priority Byte Offset 4 " group.long 0x408++0x03 line.long 0x00 "GICD_IPRIORITYR2,Interrupt Priority Register 2" hexmask.long.byte 0x00 24.--31. 1. " INTID11 ,Interrupt ID11 Priority/Priority Byte Offset 11 " hexmask.long.byte 0x00 16.--23. 1. " INTID10 ,Interrupt ID10 Priority/Priority Byte Offset 10 " hexmask.long.byte 0x00 8.--15. 1. " INTID9 ,Interrupt ID9 Priority/Priority Byte Offset 9 " hexmask.long.byte 0x00 0.--7. 1. " INTID8 ,Interrupt ID8 Priority/Priority Byte Offset 8 " group.long 0x40C++0x03 line.long 0x00 "GICD_IPRIORITYR3,Interrupt Priority Register 3" hexmask.long.byte 0x00 24.--31. 1. " INTID15 ,Interrupt ID15 Priority/Priority Byte Offset 15 " hexmask.long.byte 0x00 16.--23. 1. " INTID14 ,Interrupt ID14 Priority/Priority Byte Offset 14 " hexmask.long.byte 0x00 8.--15. 1. " INTID13 ,Interrupt ID13 Priority/Priority Byte Offset 13 " hexmask.long.byte 0x00 0.--7. 1. " INTID12 ,Interrupt ID12 Priority/Priority Byte Offset 12 " group.long 0x410++0x03 line.long 0x00 "GICD_IPRIORITYR4,Interrupt Priority Register 4" hexmask.long.byte 0x00 24.--31. 1. " INTID19 ,Interrupt ID19 Priority/Priority Byte Offset 19 " hexmask.long.byte 0x00 16.--23. 1. " INTID18 ,Interrupt ID18 Priority/Priority Byte Offset 18 " hexmask.long.byte 0x00 8.--15. 1. " INTID17 ,Interrupt ID17 Priority/Priority Byte Offset 17 " hexmask.long.byte 0x00 0.--7. 1. " INTID16 ,Interrupt ID16 Priority/Priority Byte Offset 16 " group.long 0x414++0x03 line.long 0x00 "GICD_IPRIORITYR5,Interrupt Priority Register 5" hexmask.long.byte 0x00 24.--31. 1. " INTID23 ,Interrupt ID23 Priority/Priority Byte Offset 23 " hexmask.long.byte 0x00 16.--23. 1. " INTID22 ,Interrupt ID22 Priority/Priority Byte Offset 22 " hexmask.long.byte 0x00 8.--15. 1. " INTID21 ,Interrupt ID21 Priority/Priority Byte Offset 21 " hexmask.long.byte 0x00 0.--7. 1. " INTID20 ,Interrupt ID20 Priority/Priority Byte Offset 20 " group.long 0x418++0x03 line.long 0x00 "GICD_IPRIORITYR6,Interrupt Priority Register 6" hexmask.long.byte 0x00 24.--31. 1. " INTID27 ,Interrupt ID27 Priority/Priority Byte Offset 27 " hexmask.long.byte 0x00 16.--23. 1. " INTID26 ,Interrupt ID26 Priority/Priority Byte Offset 26 " hexmask.long.byte 0x00 8.--15. 1. " INTID25 ,Interrupt ID25 Priority/Priority Byte Offset 25 " hexmask.long.byte 0x00 0.--7. 1. " INTID24 ,Interrupt ID24 Priority/Priority Byte Offset 24 " group.long 0x41C++0x03 line.long 0x00 "GICD_IPRIORITYR7,Interrupt Priority Register 7" hexmask.long.byte 0x00 24.--31. 1. " INTID31 ,Interrupt ID31 Priority/Priority Byte Offset 31 " hexmask.long.byte 0x00 16.--23. 1. " INTID30 ,Interrupt ID30 Priority/Priority Byte Offset 30 " hexmask.long.byte 0x00 8.--15. 1. " INTID29 ,Interrupt ID29 Priority/Priority Byte Offset 29 " hexmask.long.byte 0x00 0.--7. 1. " INTID28 ,Interrupt ID28 Priority/Priority Byte Offset 28 " if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x01) group.long 0x420++0x03 line.long 0x00 "GICD_IPRIORITYR8,Interrupt Priority Register 8" hexmask.long.byte 0x00 24.--31. 1. " INTID35 ,Interrupt ID35 Priority/Priority Byte Offset 35 " hexmask.long.byte 0x00 16.--23. 1. " INTID34 ,Interrupt ID34 Priority/Priority Byte Offset 34 " hexmask.long.byte 0x00 8.--15. 1. " INTID33 ,Interrupt ID33 Priority/Priority Byte Offset 33 " hexmask.long.byte 0x00 0.--7. 1. " INTID32 ,Interrupt ID32 Priority/Priority Byte Offset 32 " group.long 0x424++0x03 line.long 0x00 "GICD_IPRIORITYR9,Interrupt Priority Register 9" hexmask.long.byte 0x00 24.--31. 1. " INTID39 ,Interrupt ID39 Priority/Priority Byte Offset 39 " hexmask.long.byte 0x00 16.--23. 1. " INTID38 ,Interrupt ID38 Priority/Priority Byte Offset 38 " hexmask.long.byte 0x00 8.--15. 1. " INTID37 ,Interrupt ID37 Priority/Priority Byte Offset 37 " hexmask.long.byte 0x00 0.--7. 1. " INTID36 ,Interrupt ID36 Priority/Priority Byte Offset 36 " group.long 0x428++0x03 line.long 0x00 "GICD_IPRIORITYR10,Interrupt Priority Register 10" hexmask.long.byte 0x00 24.--31. 1. " INTID43 ,Interrupt ID43 Priority/Priority Byte Offset 43 " hexmask.long.byte 0x00 16.--23. 1. " INTID42 ,Interrupt ID42 Priority/Priority Byte Offset 42 " hexmask.long.byte 0x00 8.--15. 1. " INTID41 ,Interrupt ID41 Priority/Priority Byte Offset 41 " hexmask.long.byte 0x00 0.--7. 1. " INTID40 ,Interrupt ID40 Priority/Priority Byte Offset 40 " group.long 0x42C++0x03 line.long 0x00 "GICD_IPRIORITYR11,Interrupt Priority Register 11" hexmask.long.byte 0x00 24.--31. 1. " INTID47 ,Interrupt ID47 Priority/Priority Byte Offset 47 " hexmask.long.byte 0x00 16.--23. 1. " INTID46 ,Interrupt ID46 Priority/Priority Byte Offset 46 " hexmask.long.byte 0x00 8.--15. 1. " INTID45 ,Interrupt ID45 Priority/Priority Byte Offset 45 " hexmask.long.byte 0x00 0.--7. 1. " INTID44 ,Interrupt ID44 Priority/Priority Byte Offset 44 " group.long 0x430++0x03 line.long 0x00 "GICD_IPRIORITYR12,Interrupt Priority Register 12" hexmask.long.byte 0x00 24.--31. 1. " INTID51 ,Interrupt ID51 Priority/Priority Byte Offset 51 " hexmask.long.byte 0x00 16.--23. 1. " INTID50 ,Interrupt ID50 Priority/Priority Byte Offset 50 " hexmask.long.byte 0x00 8.--15. 1. " INTID49 ,Interrupt ID49 Priority/Priority Byte Offset 49 " hexmask.long.byte 0x00 0.--7. 1. " INTID48 ,Interrupt ID48 Priority/Priority Byte Offset 48 " group.long 0x434++0x03 line.long 0x00 "GICD_IPRIORITYR13,Interrupt Priority Register 13" hexmask.long.byte 0x00 24.--31. 1. " INTID55 ,Interrupt ID55 Priority/Priority Byte Offset 55 " hexmask.long.byte 0x00 16.--23. 1. " INTID54 ,Interrupt ID54 Priority/Priority Byte Offset 54 " hexmask.long.byte 0x00 8.--15. 1. " INTID53 ,Interrupt ID53 Priority/Priority Byte Offset 53 " hexmask.long.byte 0x00 0.--7. 1. " INTID52 ,Interrupt ID52 Priority/Priority Byte Offset 52 " group.long 0x438++0x03 line.long 0x00 "GICD_IPRIORITYR14,Interrupt Priority Register 14" hexmask.long.byte 0x00 24.--31. 1. " INTID59 ,Interrupt ID59 Priority/Priority Byte Offset 59 " hexmask.long.byte 0x00 16.--23. 1. " INTID58 ,Interrupt ID58 Priority/Priority Byte Offset 58 " hexmask.long.byte 0x00 8.--15. 1. " INTID57 ,Interrupt ID57 Priority/Priority Byte Offset 57 " hexmask.long.byte 0x00 0.--7. 1. " INTID56 ,Interrupt ID56 Priority/Priority Byte Offset 56 " group.long 0x43C++0x03 line.long 0x00 "GICD_IPRIORITYR15,Interrupt Priority Register 15" hexmask.long.byte 0x00 24.--31. 1. " INTID63 ,Interrupt ID63 Priority/Priority Byte Offset 63 " hexmask.long.byte 0x00 16.--23. 1. " INTID62 ,Interrupt ID62 Priority/Priority Byte Offset 62 " hexmask.long.byte 0x00 8.--15. 1. " INTID61 ,Interrupt ID61 Priority/Priority Byte Offset 61 " hexmask.long.byte 0x00 0.--7. 1. " INTID60 ,Interrupt ID60 Priority/Priority Byte Offset 60 " else hgroup.long 0x420++0x03 hide.long 0x00 "GICD_IPRIORITYR8,Interrupt Priority Register 8" hgroup.long 0x424++0x03 hide.long 0x00 "GICD_IPRIORITYR9,Interrupt Priority Register 9" hgroup.long 0x428++0x03 hide.long 0x00 "GICD_IPRIORITYR10,Interrupt Priority Register 10" hgroup.long 0x42C++0x03 hide.long 0x00 "GICD_IPRIORITYR11,Interrupt Priority Register 11" hgroup.long 0x430++0x03 hide.long 0x00 "GICD_IPRIORITYR12,Interrupt Priority Register 12" hgroup.long 0x434++0x03 hide.long 0x00 "GICD_IPRIORITYR13,Interrupt Priority Register 13" hgroup.long 0x438++0x03 hide.long 0x00 "GICD_IPRIORITYR14,Interrupt Priority Register 14" hgroup.long 0x43C++0x03 hide.long 0x00 "GICD_IPRIORITYR15,Interrupt Priority Register 15" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x02) group.long 0x440++0x03 line.long 0x00 "GICD_IPRIORITYR16,Interrupt Priority Register 16" hexmask.long.byte 0x00 24.--31. 1. " INTID67 ,Interrupt ID67 Priority/Priority Byte Offset 67 " hexmask.long.byte 0x00 16.--23. 1. " INTID66 ,Interrupt ID66 Priority/Priority Byte Offset 66 " hexmask.long.byte 0x00 8.--15. 1. " INTID65 ,Interrupt ID65 Priority/Priority Byte Offset 65 " hexmask.long.byte 0x00 0.--7. 1. " INTID64 ,Interrupt ID64 Priority/Priority Byte Offset 64 " group.long 0x444++0x03 line.long 0x00 "GICD_IPRIORITYR17,Interrupt Priority Register 17" hexmask.long.byte 0x00 24.--31. 1. " INTID71 ,Interrupt ID71 Priority/Priority Byte Offset 71 " hexmask.long.byte 0x00 16.--23. 1. " INTID70 ,Interrupt ID70 Priority/Priority Byte Offset 70 " hexmask.long.byte 0x00 8.--15. 1. " INTID69 ,Interrupt ID69 Priority/Priority Byte Offset 69 " hexmask.long.byte 0x00 0.--7. 1. " INTID68 ,Interrupt ID68 Priority/Priority Byte Offset 68 " group.long 0x448++0x03 line.long 0x00 "GICD_IPRIORITYR18,Interrupt Priority Register 18" hexmask.long.byte 0x00 24.--31. 1. " INTID75 ,Interrupt ID75 Priority/Priority Byte Offset 75 " hexmask.long.byte 0x00 16.--23. 1. " INTID74 ,Interrupt ID74 Priority/Priority Byte Offset 74 " hexmask.long.byte 0x00 8.--15. 1. " INTID73 ,Interrupt ID73 Priority/Priority Byte Offset 73 " hexmask.long.byte 0x00 0.--7. 1. " INTID72 ,Interrupt ID72 Priority/Priority Byte Offset 72 " group.long 0x44C++0x03 line.long 0x00 "GICD_IPRIORITYR19,Interrupt Priority Register 19" hexmask.long.byte 0x00 24.--31. 1. " INTID79 ,Interrupt ID79 Priority/Priority Byte Offset 79 " hexmask.long.byte 0x00 16.--23. 1. " INTID78 ,Interrupt ID78 Priority/Priority Byte Offset 78 " hexmask.long.byte 0x00 8.--15. 1. " INTID77 ,Interrupt ID77 Priority/Priority Byte Offset 77 " hexmask.long.byte 0x00 0.--7. 1. " INTID76 ,Interrupt ID76 Priority/Priority Byte Offset 76 " group.long 0x450++0x03 line.long 0x00 "GICD_IPRIORITYR20,Interrupt Priority Register 20" hexmask.long.byte 0x00 24.--31. 1. " INTID83 ,Interrupt ID83 Priority/Priority Byte Offset 83 " hexmask.long.byte 0x00 16.--23. 1. " INTID82 ,Interrupt ID82 Priority/Priority Byte Offset 82 " hexmask.long.byte 0x00 8.--15. 1. " INTID81 ,Interrupt ID81 Priority/Priority Byte Offset 81 " hexmask.long.byte 0x00 0.--7. 1. " INTID80 ,Interrupt ID80 Priority/Priority Byte Offset 80 " group.long 0x454++0x03 line.long 0x00 "GICD_IPRIORITYR21,Interrupt Priority Register 21" hexmask.long.byte 0x00 24.--31. 1. " INTID87 ,Interrupt ID87 Priority/Priority Byte Offset 87 " hexmask.long.byte 0x00 16.--23. 1. " INTID86 ,Interrupt ID86 Priority/Priority Byte Offset 86 " hexmask.long.byte 0x00 8.--15. 1. " INTID85 ,Interrupt ID85 Priority/Priority Byte Offset 85 " hexmask.long.byte 0x00 0.--7. 1. " INTID84 ,Interrupt ID84 Priority/Priority Byte Offset 84 " group.long 0x458++0x03 line.long 0x00 "GICD_IPRIORITYR22,Interrupt Priority Register 22" hexmask.long.byte 0x00 24.--31. 1. " INTID91 ,Interrupt ID91 Priority/Priority Byte Offset 91 " hexmask.long.byte 0x00 16.--23. 1. " INTID90 ,Interrupt ID90 Priority/Priority Byte Offset 90 " hexmask.long.byte 0x00 8.--15. 1. " INTID89 ,Interrupt ID89 Priority/Priority Byte Offset 89 " hexmask.long.byte 0x00 0.--7. 1. " INTID88 ,Interrupt ID88 Priority/Priority Byte Offset 88 " group.long 0x45C++0x03 line.long 0x00 "GICD_IPRIORITYR23,Interrupt Priority Register 23" hexmask.long.byte 0x00 24.--31. 1. " INTID95 ,Interrupt ID95 Priority/Priority Byte Offset 95 " hexmask.long.byte 0x00 16.--23. 1. " INTID94 ,Interrupt ID94 Priority/Priority Byte Offset 94 " hexmask.long.byte 0x00 8.--15. 1. " INTID93 ,Interrupt ID93 Priority/Priority Byte Offset 93 " hexmask.long.byte 0x00 0.--7. 1. " INTID92 ,Interrupt ID92 Priority/Priority Byte Offset 92 " else hgroup.long 0x440++0x03 hide.long 0x00 "GICD_IPRIORITYR16,Interrupt Priority Register 16" hgroup.long 0x444++0x03 hide.long 0x00 "GICD_IPRIORITYR17,Interrupt Priority Register 17" hgroup.long 0x448++0x03 hide.long 0x00 "GICD_IPRIORITYR18,Interrupt Priority Register 18" hgroup.long 0x44C++0x03 hide.long 0x00 "GICD_IPRIORITYR19,Interrupt Priority Register 19" hgroup.long 0x450++0x03 hide.long 0x00 "GICD_IPRIORITYR20,Interrupt Priority Register 20" hgroup.long 0x454++0x03 hide.long 0x00 "GICD_IPRIORITYR21,Interrupt Priority Register 21" hgroup.long 0x458++0x03 hide.long 0x00 "GICD_IPRIORITYR22,Interrupt Priority Register 22" hgroup.long 0x45C++0x03 hide.long 0x00 "GICD_IPRIORITYR23,Interrupt Priority Register 23" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x03) group.long 0x460++0x03 line.long 0x00 "GICD_IPRIORITYR24,Interrupt Priority Register 24" hexmask.long.byte 0x00 24.--31. 1. " INTID99 ,Interrupt ID99 Priority/Priority Byte Offset 99 " hexmask.long.byte 0x00 16.--23. 1. " INTID98 ,Interrupt ID98 Priority/Priority Byte Offset 98 " hexmask.long.byte 0x00 8.--15. 1. " INTID97 ,Interrupt ID97 Priority/Priority Byte Offset 97 " hexmask.long.byte 0x00 0.--7. 1. " INTID96 ,Interrupt ID96 Priority/Priority Byte Offset 96 " group.long 0x464++0x03 line.long 0x00 "GICD_IPRIORITYR25,Interrupt Priority Register 25" hexmask.long.byte 0x00 24.--31. 1. " INTID103 ,Interrupt ID103 Priority/Priority Byte Offset 103 " hexmask.long.byte 0x00 16.--23. 1. " INTID102 ,Interrupt ID102 Priority/Priority Byte Offset 102 " hexmask.long.byte 0x00 8.--15. 1. " INTID101 ,Interrupt ID101 Priority/Priority Byte Offset 101 " hexmask.long.byte 0x00 0.--7. 1. " INTID100 ,Interrupt ID100 Priority/Priority Byte Offset 100 " group.long 0x468++0x03 line.long 0x00 "GICD_IPRIORITYR26,Interrupt Priority Register 26" hexmask.long.byte 0x00 24.--31. 1. " INTID107 ,Interrupt ID107 Priority/Priority Byte Offset 107 " hexmask.long.byte 0x00 16.--23. 1. " INTID106 ,Interrupt ID106 Priority/Priority Byte Offset 106 " hexmask.long.byte 0x00 8.--15. 1. " INTID105 ,Interrupt ID105 Priority/Priority Byte Offset 105 " hexmask.long.byte 0x00 0.--7. 1. " INTID104 ,Interrupt ID104 Priority/Priority Byte Offset 104 " group.long 0x46C++0x03 line.long 0x00 "GICD_IPRIORITYR27,Interrupt Priority Register 27" hexmask.long.byte 0x00 24.--31. 1. " INTID111 ,Interrupt ID111 Priority/Priority Byte Offset 111 " hexmask.long.byte 0x00 16.--23. 1. " INTID110 ,Interrupt ID110 Priority/Priority Byte Offset 110 " hexmask.long.byte 0x00 8.--15. 1. " INTID109 ,Interrupt ID109 Priority/Priority Byte Offset 109 " hexmask.long.byte 0x00 0.--7. 1. " INTID108 ,Interrupt ID108 Priority/Priority Byte Offset 108 " group.long 0x470++0x03 line.long 0x00 "GICD_IPRIORITYR28,Interrupt Priority Register 28" hexmask.long.byte 0x00 24.--31. 1. " INTID115 ,Interrupt ID115 Priority/Priority Byte Offset 115 " hexmask.long.byte 0x00 16.--23. 1. " INTID114 ,Interrupt ID114 Priority/Priority Byte Offset 114 " hexmask.long.byte 0x00 8.--15. 1. " INTID113 ,Interrupt ID113 Priority/Priority Byte Offset 113 " hexmask.long.byte 0x00 0.--7. 1. " INTID112 ,Interrupt ID112 Priority/Priority Byte Offset 112 " group.long 0x474++0x03 line.long 0x00 "GICD_IPRIORITYR29,Interrupt Priority Register 29" hexmask.long.byte 0x00 24.--31. 1. " INTID119 ,Interrupt ID119 Priority/Priority Byte Offset 119 " hexmask.long.byte 0x00 16.--23. 1. " INTID118 ,Interrupt ID118 Priority/Priority Byte Offset 118 " hexmask.long.byte 0x00 8.--15. 1. " INTID117 ,Interrupt ID117 Priority/Priority Byte Offset 117 " hexmask.long.byte 0x00 0.--7. 1. " INTID116 ,Interrupt ID116 Priority/Priority Byte Offset 116 " group.long 0x478++0x03 line.long 0x00 "GICD_IPRIORITYR30,Interrupt Priority Register 30" hexmask.long.byte 0x00 24.--31. 1. " INTID123 ,Interrupt ID123 Priority/Priority Byte Offset 123 " hexmask.long.byte 0x00 16.--23. 1. " INTID122 ,Interrupt ID122 Priority/Priority Byte Offset 122 " hexmask.long.byte 0x00 8.--15. 1. " INTID121 ,Interrupt ID121 Priority/Priority Byte Offset 121 " hexmask.long.byte 0x00 0.--7. 1. " INTID120 ,Interrupt ID120 Priority/Priority Byte Offset 120 " group.long 0x47C++0x03 line.long 0x00 "GICD_IPRIORITYR31,Interrupt Priority Register 31" hexmask.long.byte 0x00 24.--31. 1. " INTID127 ,Interrupt ID127 Priority/Priority Byte Offset 127 " hexmask.long.byte 0x00 16.--23. 1. " INTID126 ,Interrupt ID126 Priority/Priority Byte Offset 126 " hexmask.long.byte 0x00 8.--15. 1. " INTID125 ,Interrupt ID125 Priority/Priority Byte Offset 125 " hexmask.long.byte 0x00 0.--7. 1. " INTID124 ,Interrupt ID124 Priority/Priority Byte Offset 124 " else hgroup.long 0x460++0x03 hide.long 0x00 "GICD_IPRIORITYR24,Interrupt Priority Register 24" hgroup.long 0x464++0x03 hide.long 0x00 "GICD_IPRIORITYR25,Interrupt Priority Register 25" hgroup.long 0x468++0x03 hide.long 0x00 "GICD_IPRIORITYR26,Interrupt Priority Register 26" hgroup.long 0x46C++0x03 hide.long 0x00 "GICD_IPRIORITYR27,Interrupt Priority Register 27" hgroup.long 0x470++0x03 hide.long 0x00 "GICD_IPRIORITYR28,Interrupt Priority Register 28" hgroup.long 0x474++0x03 hide.long 0x00 "GICD_IPRIORITYR29,Interrupt Priority Register 29" hgroup.long 0x478++0x03 hide.long 0x00 "GICD_IPRIORITYR30,Interrupt Priority Register 30" hgroup.long 0x47C++0x03 hide.long 0x00 "GICD_IPRIORITYR31,Interrupt Priority Register 31" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x04) group.long 0x480++0x03 line.long 0x00 "GICD_IPRIORITYR32,Interrupt Priority Register 32" hexmask.long.byte 0x00 24.--31. 1. " INTID131 ,Interrupt ID131 Priority/Priority Byte Offset 131 " hexmask.long.byte 0x00 16.--23. 1. " INTID130 ,Interrupt ID130 Priority/Priority Byte Offset 130 " hexmask.long.byte 0x00 8.--15. 1. " INTID129 ,Interrupt ID129 Priority/Priority Byte Offset 129 " hexmask.long.byte 0x00 0.--7. 1. " INTID128 ,Interrupt ID128 Priority/Priority Byte Offset 128 " group.long 0x484++0x03 line.long 0x00 "GICD_IPRIORITYR33,Interrupt Priority Register 33" hexmask.long.byte 0x00 24.--31. 1. " INTID135 ,Interrupt ID135 Priority/Priority Byte Offset 135 " hexmask.long.byte 0x00 16.--23. 1. " INTID134 ,Interrupt ID134 Priority/Priority Byte Offset 134 " hexmask.long.byte 0x00 8.--15. 1. " INTID133 ,Interrupt ID133 Priority/Priority Byte Offset 133 " hexmask.long.byte 0x00 0.--7. 1. " INTID132 ,Interrupt ID132 Priority/Priority Byte Offset 132 " group.long 0x488++0x03 line.long 0x00 "GICD_IPRIORITYR34,Interrupt Priority Register 34" hexmask.long.byte 0x00 24.--31. 1. " INTID139 ,Interrupt ID139 Priority/Priority Byte Offset 139 " hexmask.long.byte 0x00 16.--23. 1. " INTID138 ,Interrupt ID138 Priority/Priority Byte Offset 138 " hexmask.long.byte 0x00 8.--15. 1. " INTID137 ,Interrupt ID137 Priority/Priority Byte Offset 137 " hexmask.long.byte 0x00 0.--7. 1. " INTID136 ,Interrupt ID136 Priority/Priority Byte Offset 136 " group.long 0x48C++0x03 line.long 0x00 "GICD_IPRIORITYR35,Interrupt Priority Register 35" hexmask.long.byte 0x00 24.--31. 1. " INTID143 ,Interrupt ID143 Priority/Priority Byte Offset 143 " hexmask.long.byte 0x00 16.--23. 1. " INTID142 ,Interrupt ID142 Priority/Priority Byte Offset 142 " hexmask.long.byte 0x00 8.--15. 1. " INTID141 ,Interrupt ID141 Priority/Priority Byte Offset 141 " hexmask.long.byte 0x00 0.--7. 1. " INTID140 ,Interrupt ID140 Priority/Priority Byte Offset 140 " group.long 0x490++0x03 line.long 0x00 "GICD_IPRIORITYR36,Interrupt Priority Register 36" hexmask.long.byte 0x00 24.--31. 1. " INTID147 ,Interrupt ID147 Priority/Priority Byte Offset 147 " hexmask.long.byte 0x00 16.--23. 1. " INTID146 ,Interrupt ID146 Priority/Priority Byte Offset 146 " hexmask.long.byte 0x00 8.--15. 1. " INTID145 ,Interrupt ID145 Priority/Priority Byte Offset 145 " hexmask.long.byte 0x00 0.--7. 1. " INTID144 ,Interrupt ID144 Priority/Priority Byte Offset 144 " group.long 0x494++0x03 line.long 0x00 "GICD_IPRIORITYR37,Interrupt Priority Register 37" hexmask.long.byte 0x00 24.--31. 1. " INTID151 ,Interrupt ID151 Priority/Priority Byte Offset 151 " hexmask.long.byte 0x00 16.--23. 1. " INTID150 ,Interrupt ID150 Priority/Priority Byte Offset 150 " hexmask.long.byte 0x00 8.--15. 1. " INTID149 ,Interrupt ID149 Priority/Priority Byte Offset 149 " hexmask.long.byte 0x00 0.--7. 1. " INTID148 ,Interrupt ID148 Priority/Priority Byte Offset 148 " group.long 0x498++0x03 line.long 0x00 "GICD_IPRIORITYR38,Interrupt Priority Register 38" hexmask.long.byte 0x00 24.--31. 1. " INTID155 ,Interrupt ID155 Priority/Priority Byte Offset 155 " hexmask.long.byte 0x00 16.--23. 1. " INTID154 ,Interrupt ID154 Priority/Priority Byte Offset 154 " hexmask.long.byte 0x00 8.--15. 1. " INTID153 ,Interrupt ID153 Priority/Priority Byte Offset 153 " hexmask.long.byte 0x00 0.--7. 1. " INTID152 ,Interrupt ID152 Priority/Priority Byte Offset 152 " group.long 0x49C++0x03 line.long 0x00 "GICD_IPRIORITYR39,Interrupt Priority Register 39" hexmask.long.byte 0x00 24.--31. 1. " INTID159 ,Interrupt ID159 Priority/Priority Byte Offset 159 " hexmask.long.byte 0x00 16.--23. 1. " INTID158 ,Interrupt ID158 Priority/Priority Byte Offset 158 " hexmask.long.byte 0x00 8.--15. 1. " INTID157 ,Interrupt ID157 Priority/Priority Byte Offset 157 " hexmask.long.byte 0x00 0.--7. 1. " INTID156 ,Interrupt ID156 Priority/Priority Byte Offset 156 " else hgroup.long 0x480++0x03 hide.long 0x00 "GICD_IPRIORITYR32,Interrupt Priority Register 32" hgroup.long 0x484++0x03 hide.long 0x00 "GICD_IPRIORITYR33,Interrupt Priority Register 33" hgroup.long 0x488++0x03 hide.long 0x00 "GICD_IPRIORITYR34,Interrupt Priority Register 34" hgroup.long 0x48C++0x03 hide.long 0x00 "GICD_IPRIORITYR35,Interrupt Priority Register 35" hgroup.long 0x490++0x03 hide.long 0x00 "GICD_IPRIORITYR36,Interrupt Priority Register 36" hgroup.long 0x494++0x03 hide.long 0x00 "GICD_IPRIORITYR37,Interrupt Priority Register 37" hgroup.long 0x498++0x03 hide.long 0x00 "GICD_IPRIORITYR38,Interrupt Priority Register 38" hgroup.long 0x49C++0x03 hide.long 0x00 "GICD_IPRIORITYR39,Interrupt Priority Register 39" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x05) group.long 0x4A0++0x03 line.long 0x00 "GICD_IPRIORITYR40,Interrupt Priority Register 40" hexmask.long.byte 0x00 24.--31. 1. " INTID163 ,Interrupt ID163 Priority/Priority Byte Offset 163 " hexmask.long.byte 0x00 16.--23. 1. " INTID162 ,Interrupt ID162 Priority/Priority Byte Offset 162 " hexmask.long.byte 0x00 8.--15. 1. " INTID161 ,Interrupt ID161 Priority/Priority Byte Offset 161 " hexmask.long.byte 0x00 0.--7. 1. " INTID160 ,Interrupt ID160 Priority/Priority Byte Offset 160 " group.long 0x4A4++0x03 line.long 0x00 "GICD_IPRIORITYR41,Interrupt Priority Register 41" hexmask.long.byte 0x00 24.--31. 1. " INTID167 ,Interrupt ID167 Priority/Priority Byte Offset 167 " hexmask.long.byte 0x00 16.--23. 1. " INTID166 ,Interrupt ID166 Priority/Priority Byte Offset 166 " hexmask.long.byte 0x00 8.--15. 1. " INTID165 ,Interrupt ID165 Priority/Priority Byte Offset 165 " hexmask.long.byte 0x00 0.--7. 1. " INTID164 ,Interrupt ID164 Priority/Priority Byte Offset 164 " group.long 0x4A8++0x03 line.long 0x00 "GICD_IPRIORITYR42,Interrupt Priority Register 42" hexmask.long.byte 0x00 24.--31. 1. " INTID171 ,Interrupt ID171 Priority/Priority Byte Offset 171 " hexmask.long.byte 0x00 16.--23. 1. " INTID170 ,Interrupt ID170 Priority/Priority Byte Offset 170 " hexmask.long.byte 0x00 8.--15. 1. " INTID169 ,Interrupt ID169 Priority/Priority Byte Offset 169 " hexmask.long.byte 0x00 0.--7. 1. " INTID168 ,Interrupt ID168 Priority/Priority Byte Offset 168 " group.long 0x4AC++0x03 line.long 0x00 "GICD_IPRIORITYR43,Interrupt Priority Register 43" hexmask.long.byte 0x00 24.--31. 1. " INTID175 ,Interrupt ID175 Priority/Priority Byte Offset 175 " hexmask.long.byte 0x00 16.--23. 1. " INTID174 ,Interrupt ID174 Priority/Priority Byte Offset 174 " hexmask.long.byte 0x00 8.--15. 1. " INTID173 ,Interrupt ID173 Priority/Priority Byte Offset 173 " hexmask.long.byte 0x00 0.--7. 1. " INTID172 ,Interrupt ID172 Priority/Priority Byte Offset 172 " group.long 0x4B0++0x03 line.long 0x00 "GICD_IPRIORITYR44,Interrupt Priority Register 44" hexmask.long.byte 0x00 24.--31. 1. " INTID179 ,Interrupt ID179 Priority/Priority Byte Offset 179 " hexmask.long.byte 0x00 16.--23. 1. " INTID178 ,Interrupt ID178 Priority/Priority Byte Offset 178 " hexmask.long.byte 0x00 8.--15. 1. " INTID177 ,Interrupt ID177 Priority/Priority Byte Offset 177 " hexmask.long.byte 0x00 0.--7. 1. " INTID176 ,Interrupt ID176 Priority/Priority Byte Offset 176 " group.long 0x4B4++0x03 line.long 0x00 "GICD_IPRIORITYR45,Interrupt Priority Register 45" hexmask.long.byte 0x00 24.--31. 1. " INTID183 ,Interrupt ID183 Priority/Priority Byte Offset 183 " hexmask.long.byte 0x00 16.--23. 1. " INTID182 ,Interrupt ID182 Priority/Priority Byte Offset 182 " hexmask.long.byte 0x00 8.--15. 1. " INTID181 ,Interrupt ID181 Priority/Priority Byte Offset 181 " hexmask.long.byte 0x00 0.--7. 1. " INTID180 ,Interrupt ID180 Priority/Priority Byte Offset 180 " group.long 0x4B8++0x03 line.long 0x00 "GICD_IPRIORITYR46,Interrupt Priority Register 46" hexmask.long.byte 0x00 24.--31. 1. " INTID187 ,Interrupt ID187 Priority/Priority Byte Offset 187 " hexmask.long.byte 0x00 16.--23. 1. " INTID186 ,Interrupt ID186 Priority/Priority Byte Offset 186 " hexmask.long.byte 0x00 8.--15. 1. " INTID185 ,Interrupt ID185 Priority/Priority Byte Offset 185 " hexmask.long.byte 0x00 0.--7. 1. " INTID184 ,Interrupt ID184 Priority/Priority Byte Offset 184 " group.long 0x4BC++0x03 line.long 0x00 "GICD_IPRIORITYR47,Interrupt Priority Register 47" hexmask.long.byte 0x00 24.--31. 1. " INTID191 ,Interrupt ID191 Priority/Priority Byte Offset 191 " hexmask.long.byte 0x00 16.--23. 1. " INTID190 ,Interrupt ID190 Priority/Priority Byte Offset 190 " hexmask.long.byte 0x00 8.--15. 1. " INTID189 ,Interrupt ID189 Priority/Priority Byte Offset 189 " hexmask.long.byte 0x00 0.--7. 1. " INTID188 ,Interrupt ID188 Priority/Priority Byte Offset 188 " else hgroup.long 0x4A0++0x03 hide.long 0x00 "GICD_IPRIORITYR40,Interrupt Priority Register 40" hgroup.long 0x4A4++0x03 hide.long 0x00 "GICD_IPRIORITYR41,Interrupt Priority Register 41" hgroup.long 0x4A8++0x03 hide.long 0x00 "GICD_IPRIORITYR42,Interrupt Priority Register 42" hgroup.long 0x4AC++0x03 hide.long 0x00 "GICD_IPRIORITYR43,Interrupt Priority Register 43" hgroup.long 0x4B0++0x03 hide.long 0x00 "GICD_IPRIORITYR44,Interrupt Priority Register 44" hgroup.long 0x4B4++0x03 hide.long 0x00 "GICD_IPRIORITYR45,Interrupt Priority Register 45" hgroup.long 0x4B8++0x03 hide.long 0x00 "GICD_IPRIORITYR46,Interrupt Priority Register 46" hgroup.long 0x4BC++0x03 hide.long 0x00 "GICD_IPRIORITYR47,Interrupt Priority Register 47" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x06) group.long 0x4C0++0x03 line.long 0x00 "GICD_IPRIORITYR48,Interrupt Priority Register 48" hexmask.long.byte 0x00 24.--31. 1. " INTID195 ,Interrupt ID195 Priority/Priority Byte Offset 195 " hexmask.long.byte 0x00 16.--23. 1. " INTID194 ,Interrupt ID194 Priority/Priority Byte Offset 194 " hexmask.long.byte 0x00 8.--15. 1. " INTID193 ,Interrupt ID193 Priority/Priority Byte Offset 193 " hexmask.long.byte 0x00 0.--7. 1. " INTID192 ,Interrupt ID192 Priority/Priority Byte Offset 192 " group.long 0x4C4++0x03 line.long 0x00 "GICD_IPRIORITYR49,Interrupt Priority Register 49" hexmask.long.byte 0x00 24.--31. 1. " INTID199 ,Interrupt ID199 Priority/Priority Byte Offset 199 " hexmask.long.byte 0x00 16.--23. 1. " INTID198 ,Interrupt ID198 Priority/Priority Byte Offset 198 " hexmask.long.byte 0x00 8.--15. 1. " INTID197 ,Interrupt ID197 Priority/Priority Byte Offset 197 " hexmask.long.byte 0x00 0.--7. 1. " INTID196 ,Interrupt ID196 Priority/Priority Byte Offset 196 " group.long 0x4C8++0x03 line.long 0x00 "GICD_IPRIORITYR50,Interrupt Priority Register 50" hexmask.long.byte 0x00 24.--31. 1. " INTID203 ,Interrupt ID203 Priority/Priority Byte Offset 203 " hexmask.long.byte 0x00 16.--23. 1. " INTID202 ,Interrupt ID202 Priority/Priority Byte Offset 202 " hexmask.long.byte 0x00 8.--15. 1. " INTID201 ,Interrupt ID201 Priority/Priority Byte Offset 201 " hexmask.long.byte 0x00 0.--7. 1. " INTID200 ,Interrupt ID200 Priority/Priority Byte Offset 200 " group.long 0x4CC++0x03 line.long 0x00 "GICD_IPRIORITYR51,Interrupt Priority Register 51" hexmask.long.byte 0x00 24.--31. 1. " INTID207 ,Interrupt ID207 Priority/Priority Byte Offset 207 " hexmask.long.byte 0x00 16.--23. 1. " INTID206 ,Interrupt ID206 Priority/Priority Byte Offset 206 " hexmask.long.byte 0x00 8.--15. 1. " INTID205 ,Interrupt ID205 Priority/Priority Byte Offset 205 " hexmask.long.byte 0x00 0.--7. 1. " INTID204 ,Interrupt ID204 Priority/Priority Byte Offset 204 " group.long 0x4D0++0x03 line.long 0x00 "GICD_IPRIORITYR52,Interrupt Priority Register 52" hexmask.long.byte 0x00 24.--31. 1. " INTID211 ,Interrupt ID211 Priority/Priority Byte Offset 211 " hexmask.long.byte 0x00 16.--23. 1. " INTID210 ,Interrupt ID210 Priority/Priority Byte Offset 210 " hexmask.long.byte 0x00 8.--15. 1. " INTID209 ,Interrupt ID209 Priority/Priority Byte Offset 209 " hexmask.long.byte 0x00 0.--7. 1. " INTID208 ,Interrupt ID208 Priority/Priority Byte Offset 208 " group.long 0x4D4++0x03 line.long 0x00 "GICD_IPRIORITYR53,Interrupt Priority Register 53" hexmask.long.byte 0x00 24.--31. 1. " INTID215 ,Interrupt ID215 Priority/Priority Byte Offset 215 " hexmask.long.byte 0x00 16.--23. 1. " INTID214 ,Interrupt ID214 Priority/Priority Byte Offset 214 " hexmask.long.byte 0x00 8.--15. 1. " INTID213 ,Interrupt ID213 Priority/Priority Byte Offset 213 " hexmask.long.byte 0x00 0.--7. 1. " INTID212 ,Interrupt ID212 Priority/Priority Byte Offset 212 " group.long 0x4D8++0x03 line.long 0x00 "GICD_IPRIORITYR54,Interrupt Priority Register 54" hexmask.long.byte 0x00 24.--31. 1. " INTID219 ,Interrupt ID219 Priority/Priority Byte Offset 219 " hexmask.long.byte 0x00 16.--23. 1. " INTID218 ,Interrupt ID218 Priority/Priority Byte Offset 218 " hexmask.long.byte 0x00 8.--15. 1. " INTID217 ,Interrupt ID217 Priority/Priority Byte Offset 217 " hexmask.long.byte 0x00 0.--7. 1. " INTID216 ,Interrupt ID216 Priority/Priority Byte Offset 216 " group.long 0x4DC++0x03 line.long 0x00 "GICD_IPRIORITYR55,Interrupt Priority Register 55" hexmask.long.byte 0x00 24.--31. 1. " INTID223 ,Interrupt ID223 Priority/Priority Byte Offset 223 " hexmask.long.byte 0x00 16.--23. 1. " INTID222 ,Interrupt ID222 Priority/Priority Byte Offset 222 " hexmask.long.byte 0x00 8.--15. 1. " INTID221 ,Interrupt ID221 Priority/Priority Byte Offset 221 " hexmask.long.byte 0x00 0.--7. 1. " INTID220 ,Interrupt ID220 Priority/Priority Byte Offset 220 " else hgroup.long 0x4C0++0x03 hide.long 0x00 "GICD_IPRIORITYR48,Interrupt Priority Register 48" hgroup.long 0x4C4++0x03 hide.long 0x00 "GICD_IPRIORITYR49,Interrupt Priority Register 49" hgroup.long 0x4C8++0x03 hide.long 0x00 "GICD_IPRIORITYR50,Interrupt Priority Register 50" hgroup.long 0x4CC++0x03 hide.long 0x00 "GICD_IPRIORITYR51,Interrupt Priority Register 51" hgroup.long 0x4D0++0x03 hide.long 0x00 "GICD_IPRIORITYR52,Interrupt Priority Register 52" hgroup.long 0x4D4++0x03 hide.long 0x00 "GICD_IPRIORITYR53,Interrupt Priority Register 53" hgroup.long 0x4D8++0x03 hide.long 0x00 "GICD_IPRIORITYR54,Interrupt Priority Register 54" hgroup.long 0x4DC++0x03 hide.long 0x00 "GICD_IPRIORITYR55,Interrupt Priority Register 55" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x07) group.long 0x4E0++0x03 line.long 0x00 "GICD_IPRIORITYR56,Interrupt Priority Register 56" hexmask.long.byte 0x00 24.--31. 1. " INTID227 ,Interrupt ID227 Priority/Priority Byte Offset 227 " hexmask.long.byte 0x00 16.--23. 1. " INTID226 ,Interrupt ID226 Priority/Priority Byte Offset 226 " hexmask.long.byte 0x00 8.--15. 1. " INTID225 ,Interrupt ID225 Priority/Priority Byte Offset 225 " hexmask.long.byte 0x00 0.--7. 1. " INTID224 ,Interrupt ID224 Priority/Priority Byte Offset 224 " group.long 0x4E4++0x03 line.long 0x00 "GICD_IPRIORITYR57,Interrupt Priority Register 57" hexmask.long.byte 0x00 24.--31. 1. " INTID231 ,Interrupt ID231 Priority/Priority Byte Offset 231 " hexmask.long.byte 0x00 16.--23. 1. " INTID230 ,Interrupt ID230 Priority/Priority Byte Offset 230 " hexmask.long.byte 0x00 8.--15. 1. " INTID229 ,Interrupt ID229 Priority/Priority Byte Offset 229 " hexmask.long.byte 0x00 0.--7. 1. " INTID228 ,Interrupt ID228 Priority/Priority Byte Offset 228 " group.long 0x4E8++0x03 line.long 0x00 "GICD_IPRIORITYR58,Interrupt Priority Register 58" hexmask.long.byte 0x00 24.--31. 1. " INTID235 ,Interrupt ID235 Priority/Priority Byte Offset 235 " hexmask.long.byte 0x00 16.--23. 1. " INTID234 ,Interrupt ID234 Priority/Priority Byte Offset 234 " hexmask.long.byte 0x00 8.--15. 1. " INTID233 ,Interrupt ID233 Priority/Priority Byte Offset 233 " hexmask.long.byte 0x00 0.--7. 1. " INTID232 ,Interrupt ID232 Priority/Priority Byte Offset 232 " group.long 0x4EC++0x03 line.long 0x00 "GICD_IPRIORITYR59,Interrupt Priority Register 59" hexmask.long.byte 0x00 24.--31. 1. " INTID239 ,Interrupt ID239 Priority/Priority Byte Offset 239 " hexmask.long.byte 0x00 16.--23. 1. " INTID238 ,Interrupt ID238 Priority/Priority Byte Offset 238 " hexmask.long.byte 0x00 8.--15. 1. " INTID237 ,Interrupt ID237 Priority/Priority Byte Offset 237 " hexmask.long.byte 0x00 0.--7. 1. " INTID236 ,Interrupt ID236 Priority/Priority Byte Offset 236 " group.long 0x4F0++0x03 line.long 0x00 "GICD_IPRIORITYR60,Interrupt Priority Register 60" hexmask.long.byte 0x00 24.--31. 1. " INTID243 ,Interrupt ID243 Priority/Priority Byte Offset 243 " hexmask.long.byte 0x00 16.--23. 1. " INTID242 ,Interrupt ID242 Priority/Priority Byte Offset 242 " hexmask.long.byte 0x00 8.--15. 1. " INTID241 ,Interrupt ID241 Priority/Priority Byte Offset 241 " hexmask.long.byte 0x00 0.--7. 1. " INTID240 ,Interrupt ID240 Priority/Priority Byte Offset 240 " group.long 0x4F4++0x03 line.long 0x00 "GICD_IPRIORITYR61,Interrupt Priority Register 61" hexmask.long.byte 0x00 24.--31. 1. " INTID247 ,Interrupt ID247 Priority/Priority Byte Offset 247 " hexmask.long.byte 0x00 16.--23. 1. " INTID246 ,Interrupt ID246 Priority/Priority Byte Offset 246 " hexmask.long.byte 0x00 8.--15. 1. " INTID245 ,Interrupt ID245 Priority/Priority Byte Offset 245 " hexmask.long.byte 0x00 0.--7. 1. " INTID244 ,Interrupt ID244 Priority/Priority Byte Offset 244 " group.long 0x4F8++0x03 line.long 0x00 "GICD_IPRIORITYR62,Interrupt Priority Register 62" hexmask.long.byte 0x00 24.--31. 1. " INTID251 ,Interrupt ID251 Priority/Priority Byte Offset 251 " hexmask.long.byte 0x00 16.--23. 1. " INTID250 ,Interrupt ID250 Priority/Priority Byte Offset 250 " hexmask.long.byte 0x00 8.--15. 1. " INTID249 ,Interrupt ID249 Priority/Priority Byte Offset 249 " hexmask.long.byte 0x00 0.--7. 1. " INTID248 ,Interrupt ID248 Priority/Priority Byte Offset 248 " group.long 0x4FC++0x03 line.long 0x00 "GICD_IPRIORITYR63,Interrupt Priority Register 63" hexmask.long.byte 0x00 24.--31. 1. " INTID255 ,Interrupt ID255 Priority/Priority Byte Offset 255 " hexmask.long.byte 0x00 16.--23. 1. " INTID254 ,Interrupt ID254 Priority/Priority Byte Offset 254 " hexmask.long.byte 0x00 8.--15. 1. " INTID253 ,Interrupt ID253 Priority/Priority Byte Offset 253 " hexmask.long.byte 0x00 0.--7. 1. " INTID252 ,Interrupt ID252 Priority/Priority Byte Offset 252 " else hgroup.long 0x4E0++0x03 hide.long 0x00 "GICD_IPRIORITYR56,Interrupt Priority Register 56" hgroup.long 0x4E4++0x03 hide.long 0x00 "GICD_IPRIORITYR57,Interrupt Priority Register 57" hgroup.long 0x4E8++0x03 hide.long 0x00 "GICD_IPRIORITYR58,Interrupt Priority Register 58" hgroup.long 0x4EC++0x03 hide.long 0x00 "GICD_IPRIORITYR59,Interrupt Priority Register 59" hgroup.long 0x4F0++0x03 hide.long 0x00 "GICD_IPRIORITYR60,Interrupt Priority Register 60" hgroup.long 0x4F4++0x03 hide.long 0x00 "GICD_IPRIORITYR61,Interrupt Priority Register 61" hgroup.long 0x4F8++0x03 hide.long 0x00 "GICD_IPRIORITYR62,Interrupt Priority Register 62" hgroup.long 0x4FC++0x03 hide.long 0x00 "GICD_IPRIORITYR63,Interrupt Priority Register 63" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x08) group.long 0x500++0x03 line.long 0x00 "GICD_IPRIORITYR64,Interrupt Priority Register 64" hexmask.long.byte 0x00 24.--31. 1. " INTID259 ,Interrupt ID259 Priority/Priority Byte Offset 259 " hexmask.long.byte 0x00 16.--23. 1. " INTID258 ,Interrupt ID258 Priority/Priority Byte Offset 258 " hexmask.long.byte 0x00 8.--15. 1. " INTID257 ,Interrupt ID257 Priority/Priority Byte Offset 257 " hexmask.long.byte 0x00 0.--7. 1. " INTID256 ,Interrupt ID256 Priority/Priority Byte Offset 256 " group.long 0x504++0x03 line.long 0x00 "GICD_IPRIORITYR65,Interrupt Priority Register 65" hexmask.long.byte 0x00 24.--31. 1. " INTID263 ,Interrupt ID263 Priority/Priority Byte Offset 263 " hexmask.long.byte 0x00 16.--23. 1. " INTID262 ,Interrupt ID262 Priority/Priority Byte Offset 262 " hexmask.long.byte 0x00 8.--15. 1. " INTID261 ,Interrupt ID261 Priority/Priority Byte Offset 261 " hexmask.long.byte 0x00 0.--7. 1. " INTID260 ,Interrupt ID260 Priority/Priority Byte Offset 260 " group.long 0x508++0x03 line.long 0x00 "GICD_IPRIORITYR66,Interrupt Priority Register 66" hexmask.long.byte 0x00 24.--31. 1. " INTID267 ,Interrupt ID267 Priority/Priority Byte Offset 267 " hexmask.long.byte 0x00 16.--23. 1. " INTID266 ,Interrupt ID266 Priority/Priority Byte Offset 266 " hexmask.long.byte 0x00 8.--15. 1. " INTID265 ,Interrupt ID265 Priority/Priority Byte Offset 265 " hexmask.long.byte 0x00 0.--7. 1. " INTID264 ,Interrupt ID264 Priority/Priority Byte Offset 264 " group.long 0x50C++0x03 line.long 0x00 "GICD_IPRIORITYR67,Interrupt Priority Register 67" hexmask.long.byte 0x00 24.--31. 1. " INTID271 ,Interrupt ID271 Priority/Priority Byte Offset 271 " hexmask.long.byte 0x00 16.--23. 1. " INTID270 ,Interrupt ID270 Priority/Priority Byte Offset 270 " hexmask.long.byte 0x00 8.--15. 1. " INTID269 ,Interrupt ID269 Priority/Priority Byte Offset 269 " hexmask.long.byte 0x00 0.--7. 1. " INTID268 ,Interrupt ID268 Priority/Priority Byte Offset 268 " group.long 0x510++0x03 line.long 0x00 "GICD_IPRIORITYR68,Interrupt Priority Register 68" hexmask.long.byte 0x00 24.--31. 1. " INTID275 ,Interrupt ID275 Priority/Priority Byte Offset 275 " hexmask.long.byte 0x00 16.--23. 1. " INTID274 ,Interrupt ID274 Priority/Priority Byte Offset 274 " hexmask.long.byte 0x00 8.--15. 1. " INTID273 ,Interrupt ID273 Priority/Priority Byte Offset 273 " hexmask.long.byte 0x00 0.--7. 1. " INTID272 ,Interrupt ID272 Priority/Priority Byte Offset 272 " group.long 0x514++0x03 line.long 0x00 "GICD_IPRIORITYR69,Interrupt Priority Register 69" hexmask.long.byte 0x00 24.--31. 1. " INTID279 ,Interrupt ID279 Priority/Priority Byte Offset 279 " hexmask.long.byte 0x00 16.--23. 1. " INTID278 ,Interrupt ID278 Priority/Priority Byte Offset 278 " hexmask.long.byte 0x00 8.--15. 1. " INTID277 ,Interrupt ID277 Priority/Priority Byte Offset 277 " hexmask.long.byte 0x00 0.--7. 1. " INTID276 ,Interrupt ID276 Priority/Priority Byte Offset 276 " group.long 0x518++0x03 line.long 0x00 "GICD_IPRIORITYR70,Interrupt Priority Register 70" hexmask.long.byte 0x00 24.--31. 1. " INTID283 ,Interrupt ID283 Priority/Priority Byte Offset 283 " hexmask.long.byte 0x00 16.--23. 1. " INTID282 ,Interrupt ID282 Priority/Priority Byte Offset 282 " hexmask.long.byte 0x00 8.--15. 1. " INTID281 ,Interrupt ID281 Priority/Priority Byte Offset 281 " hexmask.long.byte 0x00 0.--7. 1. " INTID280 ,Interrupt ID280 Priority/Priority Byte Offset 280 " group.long 0x51C++0x03 line.long 0x00 "GICD_IPRIORITYR71,Interrupt Priority Register 71" hexmask.long.byte 0x00 24.--31. 1. " INTID287 ,Interrupt ID287 Priority/Priority Byte Offset 287 " hexmask.long.byte 0x00 16.--23. 1. " INTID286 ,Interrupt ID286 Priority/Priority Byte Offset 286 " hexmask.long.byte 0x00 8.--15. 1. " INTID285 ,Interrupt ID285 Priority/Priority Byte Offset 285 " hexmask.long.byte 0x00 0.--7. 1. " INTID284 ,Interrupt ID284 Priority/Priority Byte Offset 284 " else hgroup.long 0x500++0x03 hide.long 0x00 "GICD_IPRIORITYR64,Interrupt Priority Register 64" hgroup.long 0x504++0x03 hide.long 0x00 "GICD_IPRIORITYR65,Interrupt Priority Register 65" hgroup.long 0x508++0x03 hide.long 0x00 "GICD_IPRIORITYR66,Interrupt Priority Register 66" hgroup.long 0x50C++0x03 hide.long 0x00 "GICD_IPRIORITYR67,Interrupt Priority Register 67" hgroup.long 0x510++0x03 hide.long 0x00 "GICD_IPRIORITYR68,Interrupt Priority Register 68" hgroup.long 0x514++0x03 hide.long 0x00 "GICD_IPRIORITYR69,Interrupt Priority Register 69" hgroup.long 0x518++0x03 hide.long 0x00 "GICD_IPRIORITYR70,Interrupt Priority Register 70" hgroup.long 0x51C++0x03 hide.long 0x00 "GICD_IPRIORITYR71,Interrupt Priority Register 71" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x09) group.long 0x520++0x03 line.long 0x00 "GICD_IPRIORITYR72,Interrupt Priority Register 72" hexmask.long.byte 0x00 24.--31. 1. " INTID291 ,Interrupt ID291 Priority/Priority Byte Offset 291 " hexmask.long.byte 0x00 16.--23. 1. " INTID290 ,Interrupt ID290 Priority/Priority Byte Offset 290 " hexmask.long.byte 0x00 8.--15. 1. " INTID289 ,Interrupt ID289 Priority/Priority Byte Offset 289 " hexmask.long.byte 0x00 0.--7. 1. " INTID288 ,Interrupt ID288 Priority/Priority Byte Offset 288 " group.long 0x524++0x03 line.long 0x00 "GICD_IPRIORITYR73,Interrupt Priority Register 73" hexmask.long.byte 0x00 24.--31. 1. " INTID295 ,Interrupt ID295 Priority/Priority Byte Offset 295 " hexmask.long.byte 0x00 16.--23. 1. " INTID294 ,Interrupt ID294 Priority/Priority Byte Offset 294 " hexmask.long.byte 0x00 8.--15. 1. " INTID293 ,Interrupt ID293 Priority/Priority Byte Offset 293 " hexmask.long.byte 0x00 0.--7. 1. " INTID292 ,Interrupt ID292 Priority/Priority Byte Offset 292 " group.long 0x528++0x03 line.long 0x00 "GICD_IPRIORITYR74,Interrupt Priority Register 74" hexmask.long.byte 0x00 24.--31. 1. " INTID299 ,Interrupt ID299 Priority/Priority Byte Offset 299 " hexmask.long.byte 0x00 16.--23. 1. " INTID298 ,Interrupt ID298 Priority/Priority Byte Offset 298 " hexmask.long.byte 0x00 8.--15. 1. " INTID297 ,Interrupt ID297 Priority/Priority Byte Offset 297 " hexmask.long.byte 0x00 0.--7. 1. " INTID296 ,Interrupt ID296 Priority/Priority Byte Offset 296 " group.long 0x52C++0x03 line.long 0x00 "GICD_IPRIORITYR75,Interrupt Priority Register 75" hexmask.long.byte 0x00 24.--31. 1. " INTID303 ,Interrupt ID303 Priority/Priority Byte Offset 303 " hexmask.long.byte 0x00 16.--23. 1. " INTID302 ,Interrupt ID302 Priority/Priority Byte Offset 302 " hexmask.long.byte 0x00 8.--15. 1. " INTID301 ,Interrupt ID301 Priority/Priority Byte Offset 301 " hexmask.long.byte 0x00 0.--7. 1. " INTID300 ,Interrupt ID300 Priority/Priority Byte Offset 300 " group.long 0x530++0x03 line.long 0x00 "GICD_IPRIORITYR76,Interrupt Priority Register 76" hexmask.long.byte 0x00 24.--31. 1. " INTID307 ,Interrupt ID307 Priority/Priority Byte Offset 307 " hexmask.long.byte 0x00 16.--23. 1. " INTID306 ,Interrupt ID306 Priority/Priority Byte Offset 306 " hexmask.long.byte 0x00 8.--15. 1. " INTID305 ,Interrupt ID305 Priority/Priority Byte Offset 305 " hexmask.long.byte 0x00 0.--7. 1. " INTID304 ,Interrupt ID304 Priority/Priority Byte Offset 304 " group.long 0x534++0x03 line.long 0x00 "GICD_IPRIORITYR77,Interrupt Priority Register 77" hexmask.long.byte 0x00 24.--31. 1. " INTID311 ,Interrupt ID311 Priority/Priority Byte Offset 311 " hexmask.long.byte 0x00 16.--23. 1. " INTID310 ,Interrupt ID310 Priority/Priority Byte Offset 310 " hexmask.long.byte 0x00 8.--15. 1. " INTID309 ,Interrupt ID309 Priority/Priority Byte Offset 309 " hexmask.long.byte 0x00 0.--7. 1. " INTID308 ,Interrupt ID308 Priority/Priority Byte Offset 308 " group.long 0x538++0x03 line.long 0x00 "GICD_IPRIORITYR78,Interrupt Priority Register 78" hexmask.long.byte 0x00 24.--31. 1. " INTID315 ,Interrupt ID315 Priority/Priority Byte Offset 315 " hexmask.long.byte 0x00 16.--23. 1. " INTID314 ,Interrupt ID314 Priority/Priority Byte Offset 314 " hexmask.long.byte 0x00 8.--15. 1. " INTID313 ,Interrupt ID313 Priority/Priority Byte Offset 313 " hexmask.long.byte 0x00 0.--7. 1. " INTID312 ,Interrupt ID312 Priority/Priority Byte Offset 312 " group.long 0x53C++0x03 line.long 0x00 "GICD_IPRIORITYR79,Interrupt Priority Register 79" hexmask.long.byte 0x00 24.--31. 1. " INTID319 ,Interrupt ID319 Priority/Priority Byte Offset 319 " hexmask.long.byte 0x00 16.--23. 1. " INTID318 ,Interrupt ID318 Priority/Priority Byte Offset 318 " hexmask.long.byte 0x00 8.--15. 1. " INTID317 ,Interrupt ID317 Priority/Priority Byte Offset 317 " hexmask.long.byte 0x00 0.--7. 1. " INTID316 ,Interrupt ID316 Priority/Priority Byte Offset 316 " else hgroup.long 0x520++0x03 hide.long 0x00 "GICD_IPRIORITYR72,Interrupt Priority Register 72" hgroup.long 0x524++0x03 hide.long 0x00 "GICD_IPRIORITYR73,Interrupt Priority Register 73" hgroup.long 0x528++0x03 hide.long 0x00 "GICD_IPRIORITYR74,Interrupt Priority Register 74" hgroup.long 0x52C++0x03 hide.long 0x00 "GICD_IPRIORITYR75,Interrupt Priority Register 75" hgroup.long 0x530++0x03 hide.long 0x00 "GICD_IPRIORITYR76,Interrupt Priority Register 76" hgroup.long 0x534++0x03 hide.long 0x00 "GICD_IPRIORITYR77,Interrupt Priority Register 77" hgroup.long 0x538++0x03 hide.long 0x00 "GICD_IPRIORITYR78,Interrupt Priority Register 78" hgroup.long 0x53C++0x03 hide.long 0x00 "GICD_IPRIORITYR79,Interrupt Priority Register 79" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x0A) group.long 0x540++0x03 line.long 0x00 "GICD_IPRIORITYR80,Interrupt Priority Register 80" hexmask.long.byte 0x00 24.--31. 1. " INTID323 ,Interrupt ID323 Priority/Priority Byte Offset 323 " hexmask.long.byte 0x00 16.--23. 1. " INTID322 ,Interrupt ID322 Priority/Priority Byte Offset 322 " hexmask.long.byte 0x00 8.--15. 1. " INTID321 ,Interrupt ID321 Priority/Priority Byte Offset 321 " hexmask.long.byte 0x00 0.--7. 1. " INTID320 ,Interrupt ID320 Priority/Priority Byte Offset 320 " group.long 0x544++0x03 line.long 0x00 "GICD_IPRIORITYR81,Interrupt Priority Register 81" hexmask.long.byte 0x00 24.--31. 1. " INTID327 ,Interrupt ID327 Priority/Priority Byte Offset 327 " hexmask.long.byte 0x00 16.--23. 1. " INTID326 ,Interrupt ID326 Priority/Priority Byte Offset 326 " hexmask.long.byte 0x00 8.--15. 1. " INTID325 ,Interrupt ID325 Priority/Priority Byte Offset 325 " hexmask.long.byte 0x00 0.--7. 1. " INTID324 ,Interrupt ID324 Priority/Priority Byte Offset 324 " group.long 0x548++0x03 line.long 0x00 "GICD_IPRIORITYR82,Interrupt Priority Register 82" hexmask.long.byte 0x00 24.--31. 1. " INTID331 ,Interrupt ID331 Priority/Priority Byte Offset 331 " hexmask.long.byte 0x00 16.--23. 1. " INTID330 ,Interrupt ID330 Priority/Priority Byte Offset 330 " hexmask.long.byte 0x00 8.--15. 1. " INTID329 ,Interrupt ID329 Priority/Priority Byte Offset 329 " hexmask.long.byte 0x00 0.--7. 1. " INTID328 ,Interrupt ID328 Priority/Priority Byte Offset 328 " group.long 0x54C++0x03 line.long 0x00 "GICD_IPRIORITYR83,Interrupt Priority Register 83" hexmask.long.byte 0x00 24.--31. 1. " INTID335 ,Interrupt ID335 Priority/Priority Byte Offset 335 " hexmask.long.byte 0x00 16.--23. 1. " INTID334 ,Interrupt ID334 Priority/Priority Byte Offset 334 " hexmask.long.byte 0x00 8.--15. 1. " INTID333 ,Interrupt ID333 Priority/Priority Byte Offset 333 " hexmask.long.byte 0x00 0.--7. 1. " INTID332 ,Interrupt ID332 Priority/Priority Byte Offset 332 " group.long 0x550++0x03 line.long 0x00 "GICD_IPRIORITYR84,Interrupt Priority Register 84" hexmask.long.byte 0x00 24.--31. 1. " INTID339 ,Interrupt ID339 Priority/Priority Byte Offset 339 " hexmask.long.byte 0x00 16.--23. 1. " INTID338 ,Interrupt ID338 Priority/Priority Byte Offset 338 " hexmask.long.byte 0x00 8.--15. 1. " INTID337 ,Interrupt ID337 Priority/Priority Byte Offset 337 " hexmask.long.byte 0x00 0.--7. 1. " INTID336 ,Interrupt ID336 Priority/Priority Byte Offset 336 " group.long 0x554++0x03 line.long 0x00 "GICD_IPRIORITYR85,Interrupt Priority Register 85" hexmask.long.byte 0x00 24.--31. 1. " INTID343 ,Interrupt ID343 Priority/Priority Byte Offset 343 " hexmask.long.byte 0x00 16.--23. 1. " INTID342 ,Interrupt ID342 Priority/Priority Byte Offset 342 " hexmask.long.byte 0x00 8.--15. 1. " INTID341 ,Interrupt ID341 Priority/Priority Byte Offset 341 " hexmask.long.byte 0x00 0.--7. 1. " INTID340 ,Interrupt ID340 Priority/Priority Byte Offset 340 " group.long 0x558++0x03 line.long 0x00 "GICD_IPRIORITYR86,Interrupt Priority Register 86" hexmask.long.byte 0x00 24.--31. 1. " INTID347 ,Interrupt ID347 Priority/Priority Byte Offset 347 " hexmask.long.byte 0x00 16.--23. 1. " INTID346 ,Interrupt ID346 Priority/Priority Byte Offset 346 " hexmask.long.byte 0x00 8.--15. 1. " INTID345 ,Interrupt ID345 Priority/Priority Byte Offset 345 " hexmask.long.byte 0x00 0.--7. 1. " INTID344 ,Interrupt ID344 Priority/Priority Byte Offset 344 " group.long 0x55C++0x03 line.long 0x00 "GICD_IPRIORITYR87,Interrupt Priority Register 87" hexmask.long.byte 0x00 24.--31. 1. " INTID351 ,Interrupt ID351 Priority/Priority Byte Offset 351 " hexmask.long.byte 0x00 16.--23. 1. " INTID350 ,Interrupt ID350 Priority/Priority Byte Offset 350 " hexmask.long.byte 0x00 8.--15. 1. " INTID349 ,Interrupt ID349 Priority/Priority Byte Offset 349 " hexmask.long.byte 0x00 0.--7. 1. " INTID348 ,Interrupt ID348 Priority/Priority Byte Offset 348 " else hgroup.long 0x540++0x03 hide.long 0x00 "GICD_IPRIORITYR80,Interrupt Priority Register 80" hgroup.long 0x544++0x03 hide.long 0x00 "GICD_IPRIORITYR81,Interrupt Priority Register 81" hgroup.long 0x548++0x03 hide.long 0x00 "GICD_IPRIORITYR82,Interrupt Priority Register 82" hgroup.long 0x54C++0x03 hide.long 0x00 "GICD_IPRIORITYR83,Interrupt Priority Register 83" hgroup.long 0x550++0x03 hide.long 0x00 "GICD_IPRIORITYR84,Interrupt Priority Register 84" hgroup.long 0x554++0x03 hide.long 0x00 "GICD_IPRIORITYR85,Interrupt Priority Register 85" hgroup.long 0x558++0x03 hide.long 0x00 "GICD_IPRIORITYR86,Interrupt Priority Register 86" hgroup.long 0x55C++0x03 hide.long 0x00 "GICD_IPRIORITYR87,Interrupt Priority Register 87" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x0B) group.long 0x560++0x03 line.long 0x00 "GICD_IPRIORITYR88,Interrupt Priority Register 88" hexmask.long.byte 0x00 24.--31. 1. " INTID355 ,Interrupt ID355 Priority/Priority Byte Offset 355 " hexmask.long.byte 0x00 16.--23. 1. " INTID354 ,Interrupt ID354 Priority/Priority Byte Offset 354 " hexmask.long.byte 0x00 8.--15. 1. " INTID353 ,Interrupt ID353 Priority/Priority Byte Offset 353 " hexmask.long.byte 0x00 0.--7. 1. " INTID352 ,Interrupt ID352 Priority/Priority Byte Offset 352 " group.long 0x564++0x03 line.long 0x00 "GICD_IPRIORITYR89,Interrupt Priority Register 89" hexmask.long.byte 0x00 24.--31. 1. " INTID359 ,Interrupt ID359 Priority/Priority Byte Offset 359 " hexmask.long.byte 0x00 16.--23. 1. " INTID358 ,Interrupt ID358 Priority/Priority Byte Offset 358 " hexmask.long.byte 0x00 8.--15. 1. " INTID357 ,Interrupt ID357 Priority/Priority Byte Offset 357 " hexmask.long.byte 0x00 0.--7. 1. " INTID356 ,Interrupt ID356 Priority/Priority Byte Offset 356 " group.long 0x568++0x03 line.long 0x00 "GICD_IPRIORITYR90,Interrupt Priority Register 90" hexmask.long.byte 0x00 24.--31. 1. " INTID363 ,Interrupt ID363 Priority/Priority Byte Offset 363 " hexmask.long.byte 0x00 16.--23. 1. " INTID362 ,Interrupt ID362 Priority/Priority Byte Offset 362 " hexmask.long.byte 0x00 8.--15. 1. " INTID361 ,Interrupt ID361 Priority/Priority Byte Offset 361 " hexmask.long.byte 0x00 0.--7. 1. " INTID360 ,Interrupt ID360 Priority/Priority Byte Offset 360 " group.long 0x56C++0x03 line.long 0x00 "GICD_IPRIORITYR91,Interrupt Priority Register 91" hexmask.long.byte 0x00 24.--31. 1. " INTID367 ,Interrupt ID367 Priority/Priority Byte Offset 367 " hexmask.long.byte 0x00 16.--23. 1. " INTID366 ,Interrupt ID366 Priority/Priority Byte Offset 366 " hexmask.long.byte 0x00 8.--15. 1. " INTID365 ,Interrupt ID365 Priority/Priority Byte Offset 365 " hexmask.long.byte 0x00 0.--7. 1. " INTID364 ,Interrupt ID364 Priority/Priority Byte Offset 364 " group.long 0x570++0x03 line.long 0x00 "GICD_IPRIORITYR92,Interrupt Priority Register 92" hexmask.long.byte 0x00 24.--31. 1. " INTID371 ,Interrupt ID371 Priority/Priority Byte Offset 371 " hexmask.long.byte 0x00 16.--23. 1. " INTID370 ,Interrupt ID370 Priority/Priority Byte Offset 370 " hexmask.long.byte 0x00 8.--15. 1. " INTID369 ,Interrupt ID369 Priority/Priority Byte Offset 369 " hexmask.long.byte 0x00 0.--7. 1. " INTID368 ,Interrupt ID368 Priority/Priority Byte Offset 368 " group.long 0x574++0x03 line.long 0x00 "GICD_IPRIORITYR93,Interrupt Priority Register 93" hexmask.long.byte 0x00 24.--31. 1. " INTID375 ,Interrupt ID375 Priority/Priority Byte Offset 375 " hexmask.long.byte 0x00 16.--23. 1. " INTID374 ,Interrupt ID374 Priority/Priority Byte Offset 374 " hexmask.long.byte 0x00 8.--15. 1. " INTID373 ,Interrupt ID373 Priority/Priority Byte Offset 373 " hexmask.long.byte 0x00 0.--7. 1. " INTID372 ,Interrupt ID372 Priority/Priority Byte Offset 372 " group.long 0x578++0x03 line.long 0x00 "GICD_IPRIORITYR94,Interrupt Priority Register 94" hexmask.long.byte 0x00 24.--31. 1. " INTID379 ,Interrupt ID379 Priority/Priority Byte Offset 379 " hexmask.long.byte 0x00 16.--23. 1. " INTID378 ,Interrupt ID378 Priority/Priority Byte Offset 378 " hexmask.long.byte 0x00 8.--15. 1. " INTID377 ,Interrupt ID377 Priority/Priority Byte Offset 377 " hexmask.long.byte 0x00 0.--7. 1. " INTID376 ,Interrupt ID376 Priority/Priority Byte Offset 376 " group.long 0x57C++0x03 line.long 0x00 "GICD_IPRIORITYR95,Interrupt Priority Register 95" hexmask.long.byte 0x00 24.--31. 1. " INTID383 ,Interrupt ID383 Priority/Priority Byte Offset 383 " hexmask.long.byte 0x00 16.--23. 1. " INTID382 ,Interrupt ID382 Priority/Priority Byte Offset 382 " hexmask.long.byte 0x00 8.--15. 1. " INTID381 ,Interrupt ID381 Priority/Priority Byte Offset 381 " hexmask.long.byte 0x00 0.--7. 1. " INTID380 ,Interrupt ID380 Priority/Priority Byte Offset 380 " else hgroup.long 0x560++0x03 hide.long 0x00 "GICD_IPRIORITYR88,Interrupt Priority Register 88" hgroup.long 0x564++0x03 hide.long 0x00 "GICD_IPRIORITYR89,Interrupt Priority Register 89" hgroup.long 0x568++0x03 hide.long 0x00 "GICD_IPRIORITYR90,Interrupt Priority Register 90" hgroup.long 0x56C++0x03 hide.long 0x00 "GICD_IPRIORITYR91,Interrupt Priority Register 91" hgroup.long 0x570++0x03 hide.long 0x00 "GICD_IPRIORITYR92,Interrupt Priority Register 92" hgroup.long 0x574++0x03 hide.long 0x00 "GICD_IPRIORITYR93,Interrupt Priority Register 93" hgroup.long 0x578++0x03 hide.long 0x00 "GICD_IPRIORITYR94,Interrupt Priority Register 94" hgroup.long 0x57C++0x03 hide.long 0x00 "GICD_IPRIORITYR95,Interrupt Priority Register 95" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x0C) group.long 0x580++0x03 line.long 0x00 "GICD_IPRIORITYR96,Interrupt Priority Register 96" hexmask.long.byte 0x00 24.--31. 1. " INTID387 ,Interrupt ID387 Priority/Priority Byte Offset 387 " hexmask.long.byte 0x00 16.--23. 1. " INTID386 ,Interrupt ID386 Priority/Priority Byte Offset 386 " hexmask.long.byte 0x00 8.--15. 1. " INTID385 ,Interrupt ID385 Priority/Priority Byte Offset 385 " hexmask.long.byte 0x00 0.--7. 1. " INTID384 ,Interrupt ID384 Priority/Priority Byte Offset 384 " group.long 0x584++0x03 line.long 0x00 "GICD_IPRIORITYR97,Interrupt Priority Register 97" hexmask.long.byte 0x00 24.--31. 1. " INTID391 ,Interrupt ID391 Priority/Priority Byte Offset 391 " hexmask.long.byte 0x00 16.--23. 1. " INTID390 ,Interrupt ID390 Priority/Priority Byte Offset 390 " hexmask.long.byte 0x00 8.--15. 1. " INTID389 ,Interrupt ID389 Priority/Priority Byte Offset 389 " hexmask.long.byte 0x00 0.--7. 1. " INTID388 ,Interrupt ID388 Priority/Priority Byte Offset 388 " group.long 0x588++0x03 line.long 0x00 "GICD_IPRIORITYR98,Interrupt Priority Register 98" hexmask.long.byte 0x00 24.--31. 1. " INTID395 ,Interrupt ID395 Priority/Priority Byte Offset 395 " hexmask.long.byte 0x00 16.--23. 1. " INTID394 ,Interrupt ID394 Priority/Priority Byte Offset 394 " hexmask.long.byte 0x00 8.--15. 1. " INTID393 ,Interrupt ID393 Priority/Priority Byte Offset 393 " hexmask.long.byte 0x00 0.--7. 1. " INTID392 ,Interrupt ID392 Priority/Priority Byte Offset 392 " group.long 0x58C++0x03 line.long 0x00 "GICD_IPRIORITYR99,Interrupt Priority Register 99" hexmask.long.byte 0x00 24.--31. 1. " INTID399 ,Interrupt ID399 Priority/Priority Byte Offset 399 " hexmask.long.byte 0x00 16.--23. 1. " INTID398 ,Interrupt ID398 Priority/Priority Byte Offset 398 " hexmask.long.byte 0x00 8.--15. 1. " INTID397 ,Interrupt ID397 Priority/Priority Byte Offset 397 " hexmask.long.byte 0x00 0.--7. 1. " INTID396 ,Interrupt ID396 Priority/Priority Byte Offset 396 " group.long 0x590++0x03 line.long 0x00 "GICD_IPRIORITYR100,Interrupt Priority Register 100" hexmask.long.byte 0x00 24.--31. 1. " INTID403 ,Interrupt ID403 Priority/Priority Byte Offset 403 " hexmask.long.byte 0x00 16.--23. 1. " INTID402 ,Interrupt ID402 Priority/Priority Byte Offset 402 " hexmask.long.byte 0x00 8.--15. 1. " INTID401 ,Interrupt ID401 Priority/Priority Byte Offset 401 " hexmask.long.byte 0x00 0.--7. 1. " INTID400 ,Interrupt ID400 Priority/Priority Byte Offset 400 " group.long 0x594++0x03 line.long 0x00 "GICD_IPRIORITYR101,Interrupt Priority Register 101" hexmask.long.byte 0x00 24.--31. 1. " INTID407 ,Interrupt ID407 Priority/Priority Byte Offset 407 " hexmask.long.byte 0x00 16.--23. 1. " INTID406 ,Interrupt ID406 Priority/Priority Byte Offset 406 " hexmask.long.byte 0x00 8.--15. 1. " INTID405 ,Interrupt ID405 Priority/Priority Byte Offset 405 " hexmask.long.byte 0x00 0.--7. 1. " INTID404 ,Interrupt ID404 Priority/Priority Byte Offset 404 " group.long 0x598++0x03 line.long 0x00 "GICD_IPRIORITYR102,Interrupt Priority Register 102" hexmask.long.byte 0x00 24.--31. 1. " INTID411 ,Interrupt ID411 Priority/Priority Byte Offset 411 " hexmask.long.byte 0x00 16.--23. 1. " INTID410 ,Interrupt ID410 Priority/Priority Byte Offset 410 " hexmask.long.byte 0x00 8.--15. 1. " INTID409 ,Interrupt ID409 Priority/Priority Byte Offset 409 " hexmask.long.byte 0x00 0.--7. 1. " INTID408 ,Interrupt ID408 Priority/Priority Byte Offset 408 " group.long 0x59C++0x03 line.long 0x00 "GICD_IPRIORITYR103,Interrupt Priority Register 103" hexmask.long.byte 0x00 24.--31. 1. " INTID415 ,Interrupt ID415 Priority/Priority Byte Offset 415 " hexmask.long.byte 0x00 16.--23. 1. " INTID414 ,Interrupt ID414 Priority/Priority Byte Offset 414 " hexmask.long.byte 0x00 8.--15. 1. " INTID413 ,Interrupt ID413 Priority/Priority Byte Offset 413 " hexmask.long.byte 0x00 0.--7. 1. " INTID412 ,Interrupt ID412 Priority/Priority Byte Offset 412 " else hgroup.long 0x580++0x03 hide.long 0x00 "GICD_IPRIORITYR96,Interrupt Priority Register 96" hgroup.long 0x584++0x03 hide.long 0x00 "GICD_IPRIORITYR97,Interrupt Priority Register 97" hgroup.long 0x588++0x03 hide.long 0x00 "GICD_IPRIORITYR98,Interrupt Priority Register 98" hgroup.long 0x58C++0x03 hide.long 0x00 "GICD_IPRIORITYR99,Interrupt Priority Register 99" hgroup.long 0x590++0x03 hide.long 0x00 "GICD_IPRIORITYR100,Interrupt Priority Register 100" hgroup.long 0x594++0x03 hide.long 0x00 "GICD_IPRIORITYR101,Interrupt Priority Register 101" hgroup.long 0x598++0x03 hide.long 0x00 "GICD_IPRIORITYR102,Interrupt Priority Register 102" hgroup.long 0x59C++0x03 hide.long 0x00 "GICD_IPRIORITYR103,Interrupt Priority Register 103" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x0D) group.long 0x5A0++0x03 line.long 0x00 "GICD_IPRIORITYR104,Interrupt Priority Register 104" hexmask.long.byte 0x00 24.--31. 1. " INTID419 ,Interrupt ID419 Priority/Priority Byte Offset 419 " hexmask.long.byte 0x00 16.--23. 1. " INTID418 ,Interrupt ID418 Priority/Priority Byte Offset 418 " hexmask.long.byte 0x00 8.--15. 1. " INTID417 ,Interrupt ID417 Priority/Priority Byte Offset 417 " hexmask.long.byte 0x00 0.--7. 1. " INTID416 ,Interrupt ID416 Priority/Priority Byte Offset 416 " group.long 0x5A4++0x03 line.long 0x00 "GICD_IPRIORITYR105,Interrupt Priority Register 105" hexmask.long.byte 0x00 24.--31. 1. " INTID423 ,Interrupt ID423 Priority/Priority Byte Offset 423 " hexmask.long.byte 0x00 16.--23. 1. " INTID422 ,Interrupt ID422 Priority/Priority Byte Offset 422 " hexmask.long.byte 0x00 8.--15. 1. " INTID421 ,Interrupt ID421 Priority/Priority Byte Offset 421 " hexmask.long.byte 0x00 0.--7. 1. " INTID420 ,Interrupt ID420 Priority/Priority Byte Offset 420 " group.long 0x5A8++0x03 line.long 0x00 "GICD_IPRIORITYR106,Interrupt Priority Register 106" hexmask.long.byte 0x00 24.--31. 1. " INTID427 ,Interrupt ID427 Priority/Priority Byte Offset 427 " hexmask.long.byte 0x00 16.--23. 1. " INTID426 ,Interrupt ID426 Priority/Priority Byte Offset 426 " hexmask.long.byte 0x00 8.--15. 1. " INTID425 ,Interrupt ID425 Priority/Priority Byte Offset 425 " hexmask.long.byte 0x00 0.--7. 1. " INTID424 ,Interrupt ID424 Priority/Priority Byte Offset 424 " group.long 0x5AC++0x03 line.long 0x00 "GICD_IPRIORITYR107,Interrupt Priority Register 107" hexmask.long.byte 0x00 24.--31. 1. " INTID431 ,Interrupt ID431 Priority/Priority Byte Offset 431 " hexmask.long.byte 0x00 16.--23. 1. " INTID430 ,Interrupt ID430 Priority/Priority Byte Offset 430 " hexmask.long.byte 0x00 8.--15. 1. " INTID429 ,Interrupt ID429 Priority/Priority Byte Offset 429 " hexmask.long.byte 0x00 0.--7. 1. " INTID428 ,Interrupt ID428 Priority/Priority Byte Offset 428 " group.long 0x5B0++0x03 line.long 0x00 "GICD_IPRIORITYR108,Interrupt Priority Register 108" hexmask.long.byte 0x00 24.--31. 1. " INTID435 ,Interrupt ID435 Priority/Priority Byte Offset 435 " hexmask.long.byte 0x00 16.--23. 1. " INTID434 ,Interrupt ID434 Priority/Priority Byte Offset 434 " hexmask.long.byte 0x00 8.--15. 1. " INTID433 ,Interrupt ID433 Priority/Priority Byte Offset 433 " hexmask.long.byte 0x00 0.--7. 1. " INTID432 ,Interrupt ID432 Priority/Priority Byte Offset 432 " group.long 0x5B4++0x03 line.long 0x00 "GICD_IPRIORITYR109,Interrupt Priority Register 109" hexmask.long.byte 0x00 24.--31. 1. " INTID439 ,Interrupt ID439 Priority/Priority Byte Offset 439 " hexmask.long.byte 0x00 16.--23. 1. " INTID438 ,Interrupt ID438 Priority/Priority Byte Offset 438 " hexmask.long.byte 0x00 8.--15. 1. " INTID437 ,Interrupt ID437 Priority/Priority Byte Offset 437 " hexmask.long.byte 0x00 0.--7. 1. " INTID436 ,Interrupt ID436 Priority/Priority Byte Offset 436 " group.long 0x5B8++0x03 line.long 0x00 "GICD_IPRIORITYR110,Interrupt Priority Register 110" hexmask.long.byte 0x00 24.--31. 1. " INTID443 ,Interrupt ID443 Priority/Priority Byte Offset 443 " hexmask.long.byte 0x00 16.--23. 1. " INTID442 ,Interrupt ID442 Priority/Priority Byte Offset 442 " hexmask.long.byte 0x00 8.--15. 1. " INTID441 ,Interrupt ID441 Priority/Priority Byte Offset 441 " hexmask.long.byte 0x00 0.--7. 1. " INTID440 ,Interrupt ID440 Priority/Priority Byte Offset 440 " group.long 0x5BC++0x03 line.long 0x00 "GICD_IPRIORITYR111,Interrupt Priority Register 111" hexmask.long.byte 0x00 24.--31. 1. " INTID447 ,Interrupt ID447 Priority/Priority Byte Offset 447 " hexmask.long.byte 0x00 16.--23. 1. " INTID446 ,Interrupt ID446 Priority/Priority Byte Offset 446 " hexmask.long.byte 0x00 8.--15. 1. " INTID445 ,Interrupt ID445 Priority/Priority Byte Offset 445 " hexmask.long.byte 0x00 0.--7. 1. " INTID444 ,Interrupt ID444 Priority/Priority Byte Offset 444 " else hgroup.long 0x5A0++0x03 hide.long 0x00 "GICD_IPRIORITYR104,Interrupt Priority Register 104" hgroup.long 0x5A4++0x03 hide.long 0x00 "GICD_IPRIORITYR105,Interrupt Priority Register 105" hgroup.long 0x5A8++0x03 hide.long 0x00 "GICD_IPRIORITYR106,Interrupt Priority Register 106" hgroup.long 0x5AC++0x03 hide.long 0x00 "GICD_IPRIORITYR107,Interrupt Priority Register 107" hgroup.long 0x5B0++0x03 hide.long 0x00 "GICD_IPRIORITYR108,Interrupt Priority Register 108" hgroup.long 0x5B4++0x03 hide.long 0x00 "GICD_IPRIORITYR109,Interrupt Priority Register 109" hgroup.long 0x5B8++0x03 hide.long 0x00 "GICD_IPRIORITYR110,Interrupt Priority Register 110" hgroup.long 0x5BC++0x03 hide.long 0x00 "GICD_IPRIORITYR111,Interrupt Priority Register 111" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x0E) group.long 0x5C0++0x03 line.long 0x00 "GICD_IPRIORITYR112,Interrupt Priority Register 112" hexmask.long.byte 0x00 24.--31. 1. " INTID451 ,Interrupt ID451 Priority/Priority Byte Offset 451 " hexmask.long.byte 0x00 16.--23. 1. " INTID450 ,Interrupt ID450 Priority/Priority Byte Offset 450 " hexmask.long.byte 0x00 8.--15. 1. " INTID449 ,Interrupt ID449 Priority/Priority Byte Offset 449 " hexmask.long.byte 0x00 0.--7. 1. " INTID448 ,Interrupt ID448 Priority/Priority Byte Offset 448 " group.long 0x5C4++0x03 line.long 0x00 "GICD_IPRIORITYR113,Interrupt Priority Register 113" hexmask.long.byte 0x00 24.--31. 1. " INTID455 ,Interrupt ID455 Priority/Priority Byte Offset 455 " hexmask.long.byte 0x00 16.--23. 1. " INTID454 ,Interrupt ID454 Priority/Priority Byte Offset 454 " hexmask.long.byte 0x00 8.--15. 1. " INTID453 ,Interrupt ID453 Priority/Priority Byte Offset 453 " hexmask.long.byte 0x00 0.--7. 1. " INTID452 ,Interrupt ID452 Priority/Priority Byte Offset 452 " group.long 0x5C8++0x03 line.long 0x00 "GICD_IPRIORITYR114,Interrupt Priority Register 114" hexmask.long.byte 0x00 24.--31. 1. " INTID459 ,Interrupt ID459 Priority/Priority Byte Offset 459 " hexmask.long.byte 0x00 16.--23. 1. " INTID458 ,Interrupt ID458 Priority/Priority Byte Offset 458 " hexmask.long.byte 0x00 8.--15. 1. " INTID457 ,Interrupt ID457 Priority/Priority Byte Offset 457 " hexmask.long.byte 0x00 0.--7. 1. " INTID456 ,Interrupt ID456 Priority/Priority Byte Offset 456 " group.long 0x5CC++0x03 line.long 0x00 "GICD_IPRIORITYR115,Interrupt Priority Register 115" hexmask.long.byte 0x00 24.--31. 1. " INTID463 ,Interrupt ID463 Priority/Priority Byte Offset 463 " hexmask.long.byte 0x00 16.--23. 1. " INTID462 ,Interrupt ID462 Priority/Priority Byte Offset 462 " hexmask.long.byte 0x00 8.--15. 1. " INTID461 ,Interrupt ID461 Priority/Priority Byte Offset 461 " hexmask.long.byte 0x00 0.--7. 1. " INTID460 ,Interrupt ID460 Priority/Priority Byte Offset 460 " group.long 0x5D0++0x03 line.long 0x00 "GICD_IPRIORITYR116,Interrupt Priority Register 116" hexmask.long.byte 0x00 24.--31. 1. " INTID467 ,Interrupt ID467 Priority/Priority Byte Offset 467 " hexmask.long.byte 0x00 16.--23. 1. " INTID466 ,Interrupt ID466 Priority/Priority Byte Offset 466 " hexmask.long.byte 0x00 8.--15. 1. " INTID465 ,Interrupt ID465 Priority/Priority Byte Offset 465 " hexmask.long.byte 0x00 0.--7. 1. " INTID464 ,Interrupt ID464 Priority/Priority Byte Offset 464 " group.long 0x5D4++0x03 line.long 0x00 "GICD_IPRIORITYR117,Interrupt Priority Register 117" hexmask.long.byte 0x00 24.--31. 1. " INTID471 ,Interrupt ID471 Priority/Priority Byte Offset 471 " hexmask.long.byte 0x00 16.--23. 1. " INTID470 ,Interrupt ID470 Priority/Priority Byte Offset 470 " hexmask.long.byte 0x00 8.--15. 1. " INTID469 ,Interrupt ID469 Priority/Priority Byte Offset 469 " hexmask.long.byte 0x00 0.--7. 1. " INTID468 ,Interrupt ID468 Priority/Priority Byte Offset 468 " group.long 0x5D8++0x03 line.long 0x00 "GICD_IPRIORITYR118,Interrupt Priority Register 118" hexmask.long.byte 0x00 24.--31. 1. " INTID475 ,Interrupt ID475 Priority/Priority Byte Offset 475 " hexmask.long.byte 0x00 16.--23. 1. " INTID474 ,Interrupt ID474 Priority/Priority Byte Offset 474 " hexmask.long.byte 0x00 8.--15. 1. " INTID473 ,Interrupt ID473 Priority/Priority Byte Offset 473 " hexmask.long.byte 0x00 0.--7. 1. " INTID472 ,Interrupt ID472 Priority/Priority Byte Offset 472 " group.long 0x5DC++0x03 line.long 0x00 "GICD_IPRIORITYR119,Interrupt Priority Register 119" hexmask.long.byte 0x00 24.--31. 1. " INTID479 ,Interrupt ID479 Priority/Priority Byte Offset 479 " hexmask.long.byte 0x00 16.--23. 1. " INTID478 ,Interrupt ID478 Priority/Priority Byte Offset 478 " hexmask.long.byte 0x00 8.--15. 1. " INTID477 ,Interrupt ID477 Priority/Priority Byte Offset 477 " hexmask.long.byte 0x00 0.--7. 1. " INTID476 ,Interrupt ID476 Priority/Priority Byte Offset 476 " else hgroup.long 0x5C0++0x03 hide.long 0x00 "GICD_IPRIORITYR112,Interrupt Priority Register 112" hgroup.long 0x5C4++0x03 hide.long 0x00 "GICD_IPRIORITYR113,Interrupt Priority Register 113" hgroup.long 0x5C8++0x03 hide.long 0x00 "GICD_IPRIORITYR114,Interrupt Priority Register 114" hgroup.long 0x5CC++0x03 hide.long 0x00 "GICD_IPRIORITYR115,Interrupt Priority Register 115" hgroup.long 0x5D0++0x03 hide.long 0x00 "GICD_IPRIORITYR116,Interrupt Priority Register 116" hgroup.long 0x5D4++0x03 hide.long 0x00 "GICD_IPRIORITYR117,Interrupt Priority Register 117" hgroup.long 0x5D8++0x03 hide.long 0x00 "GICD_IPRIORITYR118,Interrupt Priority Register 118" hgroup.long 0x5DC++0x03 hide.long 0x00 "GICD_IPRIORITYR119,Interrupt Priority Register 119" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x0F) group.long 0x5E0++0x03 line.long 0x00 "GICD_IPRIORITYR120,Interrupt Priority Register 120" hexmask.long.byte 0x00 24.--31. 1. " INTID483 ,Interrupt ID483 Priority/Priority Byte Offset 483 " hexmask.long.byte 0x00 16.--23. 1. " INTID482 ,Interrupt ID482 Priority/Priority Byte Offset 482 " hexmask.long.byte 0x00 8.--15. 1. " INTID481 ,Interrupt ID481 Priority/Priority Byte Offset 481 " hexmask.long.byte 0x00 0.--7. 1. " INTID480 ,Interrupt ID480 Priority/Priority Byte Offset 480 " group.long 0x5E4++0x03 line.long 0x00 "GICD_IPRIORITYR121,Interrupt Priority Register 121" hexmask.long.byte 0x00 24.--31. 1. " INTID487 ,Interrupt ID487 Priority/Priority Byte Offset 487 " hexmask.long.byte 0x00 16.--23. 1. " INTID486 ,Interrupt ID486 Priority/Priority Byte Offset 486 " hexmask.long.byte 0x00 8.--15. 1. " INTID485 ,Interrupt ID485 Priority/Priority Byte Offset 485 " hexmask.long.byte 0x00 0.--7. 1. " INTID484 ,Interrupt ID484 Priority/Priority Byte Offset 484 " group.long 0x5E8++0x03 line.long 0x00 "GICD_IPRIORITYR122,Interrupt Priority Register 122" hexmask.long.byte 0x00 24.--31. 1. " INTID491 ,Interrupt ID491 Priority/Priority Byte Offset 491 " hexmask.long.byte 0x00 16.--23. 1. " INTID490 ,Interrupt ID490 Priority/Priority Byte Offset 490 " hexmask.long.byte 0x00 8.--15. 1. " INTID489 ,Interrupt ID489 Priority/Priority Byte Offset 489 " hexmask.long.byte 0x00 0.--7. 1. " INTID488 ,Interrupt ID488 Priority/Priority Byte Offset 488 " group.long 0x5EC++0x03 line.long 0x00 "GICD_IPRIORITYR123,Interrupt Priority Register 123" hexmask.long.byte 0x00 24.--31. 1. " INTID495 ,Interrupt ID495 Priority/Priority Byte Offset 495 " hexmask.long.byte 0x00 16.--23. 1. " INTID494 ,Interrupt ID494 Priority/Priority Byte Offset 494 " hexmask.long.byte 0x00 8.--15. 1. " INTID493 ,Interrupt ID493 Priority/Priority Byte Offset 493 " hexmask.long.byte 0x00 0.--7. 1. " INTID492 ,Interrupt ID492 Priority/Priority Byte Offset 492 " group.long 0x5F0++0x03 line.long 0x00 "GICD_IPRIORITYR124,Interrupt Priority Register 124" hexmask.long.byte 0x00 24.--31. 1. " INTID499 ,Interrupt ID499 Priority/Priority Byte Offset 499 " hexmask.long.byte 0x00 16.--23. 1. " INTID498 ,Interrupt ID498 Priority/Priority Byte Offset 498 " hexmask.long.byte 0x00 8.--15. 1. " INTID497 ,Interrupt ID497 Priority/Priority Byte Offset 497 " hexmask.long.byte 0x00 0.--7. 1. " INTID496 ,Interrupt ID496 Priority/Priority Byte Offset 496 " group.long 0x5F4++0x03 line.long 0x00 "GICD_IPRIORITYR125,Interrupt Priority Register 125" hexmask.long.byte 0x00 24.--31. 1. " INTID503 ,Interrupt ID503 Priority/Priority Byte Offset 503 " hexmask.long.byte 0x00 16.--23. 1. " INTID502 ,Interrupt ID502 Priority/Priority Byte Offset 502 " hexmask.long.byte 0x00 8.--15. 1. " INTID501 ,Interrupt ID501 Priority/Priority Byte Offset 501 " hexmask.long.byte 0x00 0.--7. 1. " INTID500 ,Interrupt ID500 Priority/Priority Byte Offset 500 " group.long 0x5F8++0x03 line.long 0x00 "GICD_IPRIORITYR126,Interrupt Priority Register 126" hexmask.long.byte 0x00 24.--31. 1. " INTID507 ,Interrupt ID507 Priority/Priority Byte Offset 507 " hexmask.long.byte 0x00 16.--23. 1. " INTID506 ,Interrupt ID506 Priority/Priority Byte Offset 506 " hexmask.long.byte 0x00 8.--15. 1. " INTID505 ,Interrupt ID505 Priority/Priority Byte Offset 505 " hexmask.long.byte 0x00 0.--7. 1. " INTID504 ,Interrupt ID504 Priority/Priority Byte Offset 504 " group.long 0x5FC++0x03 line.long 0x00 "GICD_IPRIORITYR127,Interrupt Priority Register 127" hexmask.long.byte 0x00 24.--31. 1. " INTID511 ,Interrupt ID511 Priority/Priority Byte Offset 511 " hexmask.long.byte 0x00 16.--23. 1. " INTID510 ,Interrupt ID510 Priority/Priority Byte Offset 510 " hexmask.long.byte 0x00 8.--15. 1. " INTID509 ,Interrupt ID509 Priority/Priority Byte Offset 509 " hexmask.long.byte 0x00 0.--7. 1. " INTID508 ,Interrupt ID508 Priority/Priority Byte Offset 508 " else hgroup.long 0x5E0++0x03 hide.long 0x00 "GICD_IPRIORITYR120,Interrupt Priority Register 120" hgroup.long 0x5E4++0x03 hide.long 0x00 "GICD_IPRIORITYR121,Interrupt Priority Register 121" hgroup.long 0x5E8++0x03 hide.long 0x00 "GICD_IPRIORITYR122,Interrupt Priority Register 122" hgroup.long 0x5EC++0x03 hide.long 0x00 "GICD_IPRIORITYR123,Interrupt Priority Register 123" hgroup.long 0x5F0++0x03 hide.long 0x00 "GICD_IPRIORITYR124,Interrupt Priority Register 124" hgroup.long 0x5F4++0x03 hide.long 0x00 "GICD_IPRIORITYR125,Interrupt Priority Register 125" hgroup.long 0x5F8++0x03 hide.long 0x00 "GICD_IPRIORITYR126,Interrupt Priority Register 126" hgroup.long 0x5FC++0x03 hide.long 0x00 "GICD_IPRIORITYR127,Interrupt Priority Register 127" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x10) group.long 0x600++0x03 line.long 0x00 "GICD_IPRIORITYR128,Interrupt Priority Register 128" hexmask.long.byte 0x00 24.--31. 1. " INTID515 ,Interrupt ID515 Priority/Priority Byte Offset 515 " hexmask.long.byte 0x00 16.--23. 1. " INTID514 ,Interrupt ID514 Priority/Priority Byte Offset 514 " hexmask.long.byte 0x00 8.--15. 1. " INTID513 ,Interrupt ID513 Priority/Priority Byte Offset 513 " hexmask.long.byte 0x00 0.--7. 1. " INTID512 ,Interrupt ID512 Priority/Priority Byte Offset 512 " group.long 0x604++0x03 line.long 0x00 "GICD_IPRIORITYR129,Interrupt Priority Register 129" hexmask.long.byte 0x00 24.--31. 1. " INTID519 ,Interrupt ID519 Priority/Priority Byte Offset 519 " hexmask.long.byte 0x00 16.--23. 1. " INTID518 ,Interrupt ID518 Priority/Priority Byte Offset 518 " hexmask.long.byte 0x00 8.--15. 1. " INTID517 ,Interrupt ID517 Priority/Priority Byte Offset 517 " hexmask.long.byte 0x00 0.--7. 1. " INTID516 ,Interrupt ID516 Priority/Priority Byte Offset 516 " group.long 0x608++0x03 line.long 0x00 "GICD_IPRIORITYR130,Interrupt Priority Register 130" hexmask.long.byte 0x00 24.--31. 1. " INTID523 ,Interrupt ID523 Priority/Priority Byte Offset 523 " hexmask.long.byte 0x00 16.--23. 1. " INTID522 ,Interrupt ID522 Priority/Priority Byte Offset 522 " hexmask.long.byte 0x00 8.--15. 1. " INTID521 ,Interrupt ID521 Priority/Priority Byte Offset 521 " hexmask.long.byte 0x00 0.--7. 1. " INTID520 ,Interrupt ID520 Priority/Priority Byte Offset 520 " group.long 0x60C++0x03 line.long 0x00 "GICD_IPRIORITYR131,Interrupt Priority Register 131" hexmask.long.byte 0x00 24.--31. 1. " INTID527 ,Interrupt ID527 Priority/Priority Byte Offset 527 " hexmask.long.byte 0x00 16.--23. 1. " INTID526 ,Interrupt ID526 Priority/Priority Byte Offset 526 " hexmask.long.byte 0x00 8.--15. 1. " INTID525 ,Interrupt ID525 Priority/Priority Byte Offset 525 " hexmask.long.byte 0x00 0.--7. 1. " INTID524 ,Interrupt ID524 Priority/Priority Byte Offset 524 " group.long 0x610++0x03 line.long 0x00 "GICD_IPRIORITYR132,Interrupt Priority Register 132" hexmask.long.byte 0x00 24.--31. 1. " INTID531 ,Interrupt ID531 Priority/Priority Byte Offset 531 " hexmask.long.byte 0x00 16.--23. 1. " INTID530 ,Interrupt ID530 Priority/Priority Byte Offset 530 " hexmask.long.byte 0x00 8.--15. 1. " INTID529 ,Interrupt ID529 Priority/Priority Byte Offset 529 " hexmask.long.byte 0x00 0.--7. 1. " INTID528 ,Interrupt ID528 Priority/Priority Byte Offset 528 " group.long 0x614++0x03 line.long 0x00 "GICD_IPRIORITYR133,Interrupt Priority Register 133" hexmask.long.byte 0x00 24.--31. 1. " INTID535 ,Interrupt ID535 Priority/Priority Byte Offset 535 " hexmask.long.byte 0x00 16.--23. 1. " INTID534 ,Interrupt ID534 Priority/Priority Byte Offset 534 " hexmask.long.byte 0x00 8.--15. 1. " INTID533 ,Interrupt ID533 Priority/Priority Byte Offset 533 " hexmask.long.byte 0x00 0.--7. 1. " INTID532 ,Interrupt ID532 Priority/Priority Byte Offset 532 " group.long 0x618++0x03 line.long 0x00 "GICD_IPRIORITYR134,Interrupt Priority Register 134" hexmask.long.byte 0x00 24.--31. 1. " INTID539 ,Interrupt ID539 Priority/Priority Byte Offset 539 " hexmask.long.byte 0x00 16.--23. 1. " INTID538 ,Interrupt ID538 Priority/Priority Byte Offset 538 " hexmask.long.byte 0x00 8.--15. 1. " INTID537 ,Interrupt ID537 Priority/Priority Byte Offset 537 " hexmask.long.byte 0x00 0.--7. 1. " INTID536 ,Interrupt ID536 Priority/Priority Byte Offset 536 " group.long 0x61C++0x03 line.long 0x00 "GICD_IPRIORITYR135,Interrupt Priority Register 135" hexmask.long.byte 0x00 24.--31. 1. " INTID543 ,Interrupt ID543 Priority/Priority Byte Offset 543 " hexmask.long.byte 0x00 16.--23. 1. " INTID542 ,Interrupt ID542 Priority/Priority Byte Offset 542 " hexmask.long.byte 0x00 8.--15. 1. " INTID541 ,Interrupt ID541 Priority/Priority Byte Offset 541 " hexmask.long.byte 0x00 0.--7. 1. " INTID540 ,Interrupt ID540 Priority/Priority Byte Offset 540 " else hgroup.long 0x600++0x03 hide.long 0x00 "GICD_IPRIORITYR128,Interrupt Priority Register 128" hgroup.long 0x604++0x03 hide.long 0x00 "GICD_IPRIORITYR129,Interrupt Priority Register 129" hgroup.long 0x608++0x03 hide.long 0x00 "GICD_IPRIORITYR130,Interrupt Priority Register 130" hgroup.long 0x60C++0x03 hide.long 0x00 "GICD_IPRIORITYR131,Interrupt Priority Register 131" hgroup.long 0x610++0x03 hide.long 0x00 "GICD_IPRIORITYR132,Interrupt Priority Register 132" hgroup.long 0x614++0x03 hide.long 0x00 "GICD_IPRIORITYR133,Interrupt Priority Register 133" hgroup.long 0x618++0x03 hide.long 0x00 "GICD_IPRIORITYR134,Interrupt Priority Register 134" hgroup.long 0x61C++0x03 hide.long 0x00 "GICD_IPRIORITYR135,Interrupt Priority Register 135" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x11) group.long 0x620++0x03 line.long 0x00 "GICD_IPRIORITYR136,Interrupt Priority Register 136" hexmask.long.byte 0x00 24.--31. 1. " INTID547 ,Interrupt ID547 Priority/Priority Byte Offset 547 " hexmask.long.byte 0x00 16.--23. 1. " INTID546 ,Interrupt ID546 Priority/Priority Byte Offset 546 " hexmask.long.byte 0x00 8.--15. 1. " INTID545 ,Interrupt ID545 Priority/Priority Byte Offset 545 " hexmask.long.byte 0x00 0.--7. 1. " INTID544 ,Interrupt ID544 Priority/Priority Byte Offset 544 " group.long 0x624++0x03 line.long 0x00 "GICD_IPRIORITYR137,Interrupt Priority Register 137" hexmask.long.byte 0x00 24.--31. 1. " INTID551 ,Interrupt ID551 Priority/Priority Byte Offset 551 " hexmask.long.byte 0x00 16.--23. 1. " INTID550 ,Interrupt ID550 Priority/Priority Byte Offset 550 " hexmask.long.byte 0x00 8.--15. 1. " INTID549 ,Interrupt ID549 Priority/Priority Byte Offset 549 " hexmask.long.byte 0x00 0.--7. 1. " INTID548 ,Interrupt ID548 Priority/Priority Byte Offset 548 " group.long 0x628++0x03 line.long 0x00 "GICD_IPRIORITYR138,Interrupt Priority Register 138" hexmask.long.byte 0x00 24.--31. 1. " INTID555 ,Interrupt ID555 Priority/Priority Byte Offset 555 " hexmask.long.byte 0x00 16.--23. 1. " INTID554 ,Interrupt ID554 Priority/Priority Byte Offset 554 " hexmask.long.byte 0x00 8.--15. 1. " INTID553 ,Interrupt ID553 Priority/Priority Byte Offset 553 " hexmask.long.byte 0x00 0.--7. 1. " INTID552 ,Interrupt ID552 Priority/Priority Byte Offset 552 " group.long 0x62C++0x03 line.long 0x00 "GICD_IPRIORITYR139,Interrupt Priority Register 139" hexmask.long.byte 0x00 24.--31. 1. " INTID559 ,Interrupt ID559 Priority/Priority Byte Offset 559 " hexmask.long.byte 0x00 16.--23. 1. " INTID558 ,Interrupt ID558 Priority/Priority Byte Offset 558 " hexmask.long.byte 0x00 8.--15. 1. " INTID557 ,Interrupt ID557 Priority/Priority Byte Offset 557 " hexmask.long.byte 0x00 0.--7. 1. " INTID556 ,Interrupt ID556 Priority/Priority Byte Offset 556 " group.long 0x630++0x03 line.long 0x00 "GICD_IPRIORITYR140,Interrupt Priority Register 140" hexmask.long.byte 0x00 24.--31. 1. " INTID563 ,Interrupt ID563 Priority/Priority Byte Offset 563 " hexmask.long.byte 0x00 16.--23. 1. " INTID562 ,Interrupt ID562 Priority/Priority Byte Offset 562 " hexmask.long.byte 0x00 8.--15. 1. " INTID561 ,Interrupt ID561 Priority/Priority Byte Offset 561 " hexmask.long.byte 0x00 0.--7. 1. " INTID560 ,Interrupt ID560 Priority/Priority Byte Offset 560 " group.long 0x634++0x03 line.long 0x00 "GICD_IPRIORITYR141,Interrupt Priority Register 141" hexmask.long.byte 0x00 24.--31. 1. " INTID567 ,Interrupt ID567 Priority/Priority Byte Offset 567 " hexmask.long.byte 0x00 16.--23. 1. " INTID566 ,Interrupt ID566 Priority/Priority Byte Offset 566 " hexmask.long.byte 0x00 8.--15. 1. " INTID565 ,Interrupt ID565 Priority/Priority Byte Offset 565 " hexmask.long.byte 0x00 0.--7. 1. " INTID564 ,Interrupt ID564 Priority/Priority Byte Offset 564 " group.long 0x638++0x03 line.long 0x00 "GICD_IPRIORITYR142,Interrupt Priority Register 142" hexmask.long.byte 0x00 24.--31. 1. " INTID571 ,Interrupt ID571 Priority/Priority Byte Offset 571 " hexmask.long.byte 0x00 16.--23. 1. " INTID570 ,Interrupt ID570 Priority/Priority Byte Offset 570 " hexmask.long.byte 0x00 8.--15. 1. " INTID569 ,Interrupt ID569 Priority/Priority Byte Offset 569 " hexmask.long.byte 0x00 0.--7. 1. " INTID568 ,Interrupt ID568 Priority/Priority Byte Offset 568 " group.long 0x63C++0x03 line.long 0x00 "GICD_IPRIORITYR143,Interrupt Priority Register 143" hexmask.long.byte 0x00 24.--31. 1. " INTID575 ,Interrupt ID575 Priority/Priority Byte Offset 575 " hexmask.long.byte 0x00 16.--23. 1. " INTID574 ,Interrupt ID574 Priority/Priority Byte Offset 574 " hexmask.long.byte 0x00 8.--15. 1. " INTID573 ,Interrupt ID573 Priority/Priority Byte Offset 573 " hexmask.long.byte 0x00 0.--7. 1. " INTID572 ,Interrupt ID572 Priority/Priority Byte Offset 572 " else hgroup.long 0x620++0x03 hide.long 0x00 "GICD_IPRIORITYR136,Interrupt Priority Register 136" hgroup.long 0x624++0x03 hide.long 0x00 "GICD_IPRIORITYR137,Interrupt Priority Register 137" hgroup.long 0x628++0x03 hide.long 0x00 "GICD_IPRIORITYR138,Interrupt Priority Register 138" hgroup.long 0x62C++0x03 hide.long 0x00 "GICD_IPRIORITYR139,Interrupt Priority Register 139" hgroup.long 0x630++0x03 hide.long 0x00 "GICD_IPRIORITYR140,Interrupt Priority Register 140" hgroup.long 0x634++0x03 hide.long 0x00 "GICD_IPRIORITYR141,Interrupt Priority Register 141" hgroup.long 0x638++0x03 hide.long 0x00 "GICD_IPRIORITYR142,Interrupt Priority Register 142" hgroup.long 0x63C++0x03 hide.long 0x00 "GICD_IPRIORITYR143,Interrupt Priority Register 143" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x12) group.long 0x640++0x03 line.long 0x00 "GICD_IPRIORITYR144,Interrupt Priority Register 144" hexmask.long.byte 0x00 24.--31. 1. " INTID579 ,Interrupt ID579 Priority/Priority Byte Offset 579 " hexmask.long.byte 0x00 16.--23. 1. " INTID578 ,Interrupt ID578 Priority/Priority Byte Offset 578 " hexmask.long.byte 0x00 8.--15. 1. " INTID577 ,Interrupt ID577 Priority/Priority Byte Offset 577 " hexmask.long.byte 0x00 0.--7. 1. " INTID576 ,Interrupt ID576 Priority/Priority Byte Offset 576 " group.long 0x644++0x03 line.long 0x00 "GICD_IPRIORITYR145,Interrupt Priority Register 145" hexmask.long.byte 0x00 24.--31. 1. " INTID583 ,Interrupt ID583 Priority/Priority Byte Offset 583 " hexmask.long.byte 0x00 16.--23. 1. " INTID582 ,Interrupt ID582 Priority/Priority Byte Offset 582 " hexmask.long.byte 0x00 8.--15. 1. " INTID581 ,Interrupt ID581 Priority/Priority Byte Offset 581 " hexmask.long.byte 0x00 0.--7. 1. " INTID580 ,Interrupt ID580 Priority/Priority Byte Offset 580 " group.long 0x648++0x03 line.long 0x00 "GICD_IPRIORITYR146,Interrupt Priority Register 146" hexmask.long.byte 0x00 24.--31. 1. " INTID587 ,Interrupt ID587 Priority/Priority Byte Offset 587 " hexmask.long.byte 0x00 16.--23. 1. " INTID586 ,Interrupt ID586 Priority/Priority Byte Offset 586 " hexmask.long.byte 0x00 8.--15. 1. " INTID585 ,Interrupt ID585 Priority/Priority Byte Offset 585 " hexmask.long.byte 0x00 0.--7. 1. " INTID584 ,Interrupt ID584 Priority/Priority Byte Offset 584 " group.long 0x64C++0x03 line.long 0x00 "GICD_IPRIORITYR147,Interrupt Priority Register 147" hexmask.long.byte 0x00 24.--31. 1. " INTID591 ,Interrupt ID591 Priority/Priority Byte Offset 591 " hexmask.long.byte 0x00 16.--23. 1. " INTID590 ,Interrupt ID590 Priority/Priority Byte Offset 590 " hexmask.long.byte 0x00 8.--15. 1. " INTID589 ,Interrupt ID589 Priority/Priority Byte Offset 589 " hexmask.long.byte 0x00 0.--7. 1. " INTID588 ,Interrupt ID588 Priority/Priority Byte Offset 588 " group.long 0x650++0x03 line.long 0x00 "GICD_IPRIORITYR148,Interrupt Priority Register 148" hexmask.long.byte 0x00 24.--31. 1. " INTID595 ,Interrupt ID595 Priority/Priority Byte Offset 595 " hexmask.long.byte 0x00 16.--23. 1. " INTID594 ,Interrupt ID594 Priority/Priority Byte Offset 594 " hexmask.long.byte 0x00 8.--15. 1. " INTID593 ,Interrupt ID593 Priority/Priority Byte Offset 593 " hexmask.long.byte 0x00 0.--7. 1. " INTID592 ,Interrupt ID592 Priority/Priority Byte Offset 592 " group.long 0x654++0x03 line.long 0x00 "GICD_IPRIORITYR149,Interrupt Priority Register 149" hexmask.long.byte 0x00 24.--31. 1. " INTID599 ,Interrupt ID599 Priority/Priority Byte Offset 599 " hexmask.long.byte 0x00 16.--23. 1. " INTID598 ,Interrupt ID598 Priority/Priority Byte Offset 598 " hexmask.long.byte 0x00 8.--15. 1. " INTID597 ,Interrupt ID597 Priority/Priority Byte Offset 597 " hexmask.long.byte 0x00 0.--7. 1. " INTID596 ,Interrupt ID596 Priority/Priority Byte Offset 596 " group.long 0x658++0x03 line.long 0x00 "GICD_IPRIORITYR150,Interrupt Priority Register 150" hexmask.long.byte 0x00 24.--31. 1. " INTID603 ,Interrupt ID603 Priority/Priority Byte Offset 603 " hexmask.long.byte 0x00 16.--23. 1. " INTID602 ,Interrupt ID602 Priority/Priority Byte Offset 602 " hexmask.long.byte 0x00 8.--15. 1. " INTID601 ,Interrupt ID601 Priority/Priority Byte Offset 601 " hexmask.long.byte 0x00 0.--7. 1. " INTID600 ,Interrupt ID600 Priority/Priority Byte Offset 600 " group.long 0x65C++0x03 line.long 0x00 "GICD_IPRIORITYR151,Interrupt Priority Register 151" hexmask.long.byte 0x00 24.--31. 1. " INTID607 ,Interrupt ID607 Priority/Priority Byte Offset 607 " hexmask.long.byte 0x00 16.--23. 1. " INTID606 ,Interrupt ID606 Priority/Priority Byte Offset 606 " hexmask.long.byte 0x00 8.--15. 1. " INTID605 ,Interrupt ID605 Priority/Priority Byte Offset 605 " hexmask.long.byte 0x00 0.--7. 1. " INTID604 ,Interrupt ID604 Priority/Priority Byte Offset 604 " else hgroup.long 0x640++0x03 hide.long 0x00 "GICD_IPRIORITYR144,Interrupt Priority Register 144" hgroup.long 0x644++0x03 hide.long 0x00 "GICD_IPRIORITYR145,Interrupt Priority Register 145" hgroup.long 0x648++0x03 hide.long 0x00 "GICD_IPRIORITYR146,Interrupt Priority Register 146" hgroup.long 0x64C++0x03 hide.long 0x00 "GICD_IPRIORITYR147,Interrupt Priority Register 147" hgroup.long 0x650++0x03 hide.long 0x00 "GICD_IPRIORITYR148,Interrupt Priority Register 148" hgroup.long 0x654++0x03 hide.long 0x00 "GICD_IPRIORITYR149,Interrupt Priority Register 149" hgroup.long 0x658++0x03 hide.long 0x00 "GICD_IPRIORITYR150,Interrupt Priority Register 150" hgroup.long 0x65C++0x03 hide.long 0x00 "GICD_IPRIORITYR151,Interrupt Priority Register 151" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x13) group.long 0x660++0x03 line.long 0x00 "GICD_IPRIORITYR152,Interrupt Priority Register 152" hexmask.long.byte 0x00 24.--31. 1. " INTID611 ,Interrupt ID611 Priority/Priority Byte Offset 611 " hexmask.long.byte 0x00 16.--23. 1. " INTID610 ,Interrupt ID610 Priority/Priority Byte Offset 610 " hexmask.long.byte 0x00 8.--15. 1. " INTID609 ,Interrupt ID609 Priority/Priority Byte Offset 609 " hexmask.long.byte 0x00 0.--7. 1. " INTID608 ,Interrupt ID608 Priority/Priority Byte Offset 608 " group.long 0x664++0x03 line.long 0x00 "GICD_IPRIORITYR153,Interrupt Priority Register 153" hexmask.long.byte 0x00 24.--31. 1. " INTID615 ,Interrupt ID615 Priority/Priority Byte Offset 615 " hexmask.long.byte 0x00 16.--23. 1. " INTID614 ,Interrupt ID614 Priority/Priority Byte Offset 614 " hexmask.long.byte 0x00 8.--15. 1. " INTID613 ,Interrupt ID613 Priority/Priority Byte Offset 613 " hexmask.long.byte 0x00 0.--7. 1. " INTID612 ,Interrupt ID612 Priority/Priority Byte Offset 612 " group.long 0x668++0x03 line.long 0x00 "GICD_IPRIORITYR154,Interrupt Priority Register 154" hexmask.long.byte 0x00 24.--31. 1. " INTID619 ,Interrupt ID619 Priority/Priority Byte Offset 619 " hexmask.long.byte 0x00 16.--23. 1. " INTID618 ,Interrupt ID618 Priority/Priority Byte Offset 618 " hexmask.long.byte 0x00 8.--15. 1. " INTID617 ,Interrupt ID617 Priority/Priority Byte Offset 617 " hexmask.long.byte 0x00 0.--7. 1. " INTID616 ,Interrupt ID616 Priority/Priority Byte Offset 616 " group.long 0x66C++0x03 line.long 0x00 "GICD_IPRIORITYR155,Interrupt Priority Register 155" hexmask.long.byte 0x00 24.--31. 1. " INTID623 ,Interrupt ID623 Priority/Priority Byte Offset 623 " hexmask.long.byte 0x00 16.--23. 1. " INTID622 ,Interrupt ID622 Priority/Priority Byte Offset 622 " hexmask.long.byte 0x00 8.--15. 1. " INTID621 ,Interrupt ID621 Priority/Priority Byte Offset 621 " hexmask.long.byte 0x00 0.--7. 1. " INTID620 ,Interrupt ID620 Priority/Priority Byte Offset 620 " group.long 0x670++0x03 line.long 0x00 "GICD_IPRIORITYR156,Interrupt Priority Register 156" hexmask.long.byte 0x00 24.--31. 1. " INTID627 ,Interrupt ID627 Priority/Priority Byte Offset 627 " hexmask.long.byte 0x00 16.--23. 1. " INTID626 ,Interrupt ID626 Priority/Priority Byte Offset 626 " hexmask.long.byte 0x00 8.--15. 1. " INTID625 ,Interrupt ID625 Priority/Priority Byte Offset 625 " hexmask.long.byte 0x00 0.--7. 1. " INTID624 ,Interrupt ID624 Priority/Priority Byte Offset 624 " group.long 0x674++0x03 line.long 0x00 "GICD_IPRIORITYR157,Interrupt Priority Register 157" hexmask.long.byte 0x00 24.--31. 1. " INTID631 ,Interrupt ID631 Priority/Priority Byte Offset 631 " hexmask.long.byte 0x00 16.--23. 1. " INTID630 ,Interrupt ID630 Priority/Priority Byte Offset 630 " hexmask.long.byte 0x00 8.--15. 1. " INTID629 ,Interrupt ID629 Priority/Priority Byte Offset 629 " hexmask.long.byte 0x00 0.--7. 1. " INTID628 ,Interrupt ID628 Priority/Priority Byte Offset 628 " group.long 0x678++0x03 line.long 0x00 "GICD_IPRIORITYR158,Interrupt Priority Register 158" hexmask.long.byte 0x00 24.--31. 1. " INTID635 ,Interrupt ID635 Priority/Priority Byte Offset 635 " hexmask.long.byte 0x00 16.--23. 1. " INTID634 ,Interrupt ID634 Priority/Priority Byte Offset 634 " hexmask.long.byte 0x00 8.--15. 1. " INTID633 ,Interrupt ID633 Priority/Priority Byte Offset 633 " hexmask.long.byte 0x00 0.--7. 1. " INTID632 ,Interrupt ID632 Priority/Priority Byte Offset 632 " group.long 0x67C++0x03 line.long 0x00 "GICD_IPRIORITYR159,Interrupt Priority Register 159" hexmask.long.byte 0x00 24.--31. 1. " INTID639 ,Interrupt ID639 Priority/Priority Byte Offset 639 " hexmask.long.byte 0x00 16.--23. 1. " INTID638 ,Interrupt ID638 Priority/Priority Byte Offset 638 " hexmask.long.byte 0x00 8.--15. 1. " INTID637 ,Interrupt ID637 Priority/Priority Byte Offset 637 " hexmask.long.byte 0x00 0.--7. 1. " INTID636 ,Interrupt ID636 Priority/Priority Byte Offset 636 " else hgroup.long 0x660++0x03 hide.long 0x00 "GICD_IPRIORITYR152,Interrupt Priority Register 152" hgroup.long 0x664++0x03 hide.long 0x00 "GICD_IPRIORITYR153,Interrupt Priority Register 153" hgroup.long 0x668++0x03 hide.long 0x00 "GICD_IPRIORITYR154,Interrupt Priority Register 154" hgroup.long 0x66C++0x03 hide.long 0x00 "GICD_IPRIORITYR155,Interrupt Priority Register 155" hgroup.long 0x670++0x03 hide.long 0x00 "GICD_IPRIORITYR156,Interrupt Priority Register 156" hgroup.long 0x674++0x03 hide.long 0x00 "GICD_IPRIORITYR157,Interrupt Priority Register 157" hgroup.long 0x678++0x03 hide.long 0x00 "GICD_IPRIORITYR158,Interrupt Priority Register 158" hgroup.long 0x67C++0x03 hide.long 0x00 "GICD_IPRIORITYR159,Interrupt Priority Register 159" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x14) group.long 0x680++0x03 line.long 0x00 "GICD_IPRIORITYR160,Interrupt Priority Register 160" hexmask.long.byte 0x00 24.--31. 1. " INTID643 ,Interrupt ID643 Priority/Priority Byte Offset 643 " hexmask.long.byte 0x00 16.--23. 1. " INTID642 ,Interrupt ID642 Priority/Priority Byte Offset 642 " hexmask.long.byte 0x00 8.--15. 1. " INTID641 ,Interrupt ID641 Priority/Priority Byte Offset 641 " hexmask.long.byte 0x00 0.--7. 1. " INTID640 ,Interrupt ID640 Priority/Priority Byte Offset 640 " group.long 0x684++0x03 line.long 0x00 "GICD_IPRIORITYR161,Interrupt Priority Register 161" hexmask.long.byte 0x00 24.--31. 1. " INTID647 ,Interrupt ID647 Priority/Priority Byte Offset 647 " hexmask.long.byte 0x00 16.--23. 1. " INTID646 ,Interrupt ID646 Priority/Priority Byte Offset 646 " hexmask.long.byte 0x00 8.--15. 1. " INTID645 ,Interrupt ID645 Priority/Priority Byte Offset 645 " hexmask.long.byte 0x00 0.--7. 1. " INTID644 ,Interrupt ID644 Priority/Priority Byte Offset 644 " group.long 0x688++0x03 line.long 0x00 "GICD_IPRIORITYR162,Interrupt Priority Register 162" hexmask.long.byte 0x00 24.--31. 1. " INTID651 ,Interrupt ID651 Priority/Priority Byte Offset 651 " hexmask.long.byte 0x00 16.--23. 1. " INTID650 ,Interrupt ID650 Priority/Priority Byte Offset 650 " hexmask.long.byte 0x00 8.--15. 1. " INTID649 ,Interrupt ID649 Priority/Priority Byte Offset 649 " hexmask.long.byte 0x00 0.--7. 1. " INTID648 ,Interrupt ID648 Priority/Priority Byte Offset 648 " group.long 0x68C++0x03 line.long 0x00 "GICD_IPRIORITYR163,Interrupt Priority Register 163" hexmask.long.byte 0x00 24.--31. 1. " INTID655 ,Interrupt ID655 Priority/Priority Byte Offset 655 " hexmask.long.byte 0x00 16.--23. 1. " INTID654 ,Interrupt ID654 Priority/Priority Byte Offset 654 " hexmask.long.byte 0x00 8.--15. 1. " INTID653 ,Interrupt ID653 Priority/Priority Byte Offset 653 " hexmask.long.byte 0x00 0.--7. 1. " INTID652 ,Interrupt ID652 Priority/Priority Byte Offset 652 " group.long 0x690++0x03 line.long 0x00 "GICD_IPRIORITYR164,Interrupt Priority Register 164" hexmask.long.byte 0x00 24.--31. 1. " INTID659 ,Interrupt ID659 Priority/Priority Byte Offset 659 " hexmask.long.byte 0x00 16.--23. 1. " INTID658 ,Interrupt ID658 Priority/Priority Byte Offset 658 " hexmask.long.byte 0x00 8.--15. 1. " INTID657 ,Interrupt ID657 Priority/Priority Byte Offset 657 " hexmask.long.byte 0x00 0.--7. 1. " INTID656 ,Interrupt ID656 Priority/Priority Byte Offset 656 " group.long 0x694++0x03 line.long 0x00 "GICD_IPRIORITYR165,Interrupt Priority Register 165" hexmask.long.byte 0x00 24.--31. 1. " INTID663 ,Interrupt ID663 Priority/Priority Byte Offset 663 " hexmask.long.byte 0x00 16.--23. 1. " INTID662 ,Interrupt ID662 Priority/Priority Byte Offset 662 " hexmask.long.byte 0x00 8.--15. 1. " INTID661 ,Interrupt ID661 Priority/Priority Byte Offset 661 " hexmask.long.byte 0x00 0.--7. 1. " INTID660 ,Interrupt ID660 Priority/Priority Byte Offset 660 " group.long 0x698++0x03 line.long 0x00 "GICD_IPRIORITYR166,Interrupt Priority Register 166" hexmask.long.byte 0x00 24.--31. 1. " INTID667 ,Interrupt ID667 Priority/Priority Byte Offset 667 " hexmask.long.byte 0x00 16.--23. 1. " INTID666 ,Interrupt ID666 Priority/Priority Byte Offset 666 " hexmask.long.byte 0x00 8.--15. 1. " INTID665 ,Interrupt ID665 Priority/Priority Byte Offset 665 " hexmask.long.byte 0x00 0.--7. 1. " INTID664 ,Interrupt ID664 Priority/Priority Byte Offset 664 " group.long 0x69C++0x03 line.long 0x00 "GICD_IPRIORITYR167,Interrupt Priority Register 167" hexmask.long.byte 0x00 24.--31. 1. " INTID671 ,Interrupt ID671 Priority/Priority Byte Offset 671 " hexmask.long.byte 0x00 16.--23. 1. " INTID670 ,Interrupt ID670 Priority/Priority Byte Offset 670 " hexmask.long.byte 0x00 8.--15. 1. " INTID669 ,Interrupt ID669 Priority/Priority Byte Offset 669 " hexmask.long.byte 0x00 0.--7. 1. " INTID668 ,Interrupt ID668 Priority/Priority Byte Offset 668 " else hgroup.long 0x680++0x03 hide.long 0x00 "GICD_IPRIORITYR160,Interrupt Priority Register 160" hgroup.long 0x684++0x03 hide.long 0x00 "GICD_IPRIORITYR161,Interrupt Priority Register 161" hgroup.long 0x688++0x03 hide.long 0x00 "GICD_IPRIORITYR162,Interrupt Priority Register 162" hgroup.long 0x68C++0x03 hide.long 0x00 "GICD_IPRIORITYR163,Interrupt Priority Register 163" hgroup.long 0x690++0x03 hide.long 0x00 "GICD_IPRIORITYR164,Interrupt Priority Register 164" hgroup.long 0x694++0x03 hide.long 0x00 "GICD_IPRIORITYR165,Interrupt Priority Register 165" hgroup.long 0x698++0x03 hide.long 0x00 "GICD_IPRIORITYR166,Interrupt Priority Register 166" hgroup.long 0x69C++0x03 hide.long 0x00 "GICD_IPRIORITYR167,Interrupt Priority Register 167" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x15) group.long 0x6A0++0x03 line.long 0x00 "GICD_IPRIORITYR168,Interrupt Priority Register 168" hexmask.long.byte 0x00 24.--31. 1. " INTID675 ,Interrupt ID675 Priority/Priority Byte Offset 675 " hexmask.long.byte 0x00 16.--23. 1. " INTID674 ,Interrupt ID674 Priority/Priority Byte Offset 674 " hexmask.long.byte 0x00 8.--15. 1. " INTID673 ,Interrupt ID673 Priority/Priority Byte Offset 673 " hexmask.long.byte 0x00 0.--7. 1. " INTID672 ,Interrupt ID672 Priority/Priority Byte Offset 672 " group.long 0x6A4++0x03 line.long 0x00 "GICD_IPRIORITYR169,Interrupt Priority Register 169" hexmask.long.byte 0x00 24.--31. 1. " INTID679 ,Interrupt ID679 Priority/Priority Byte Offset 679 " hexmask.long.byte 0x00 16.--23. 1. " INTID678 ,Interrupt ID678 Priority/Priority Byte Offset 678 " hexmask.long.byte 0x00 8.--15. 1. " INTID677 ,Interrupt ID677 Priority/Priority Byte Offset 677 " hexmask.long.byte 0x00 0.--7. 1. " INTID676 ,Interrupt ID676 Priority/Priority Byte Offset 676 " group.long 0x6A8++0x03 line.long 0x00 "GICD_IPRIORITYR170,Interrupt Priority Register 170" hexmask.long.byte 0x00 24.--31. 1. " INTID683 ,Interrupt ID683 Priority/Priority Byte Offset 683 " hexmask.long.byte 0x00 16.--23. 1. " INTID682 ,Interrupt ID682 Priority/Priority Byte Offset 682 " hexmask.long.byte 0x00 8.--15. 1. " INTID681 ,Interrupt ID681 Priority/Priority Byte Offset 681 " hexmask.long.byte 0x00 0.--7. 1. " INTID680 ,Interrupt ID680 Priority/Priority Byte Offset 680 " group.long 0x6AC++0x03 line.long 0x00 "GICD_IPRIORITYR171,Interrupt Priority Register 171" hexmask.long.byte 0x00 24.--31. 1. " INTID687 ,Interrupt ID687 Priority/Priority Byte Offset 687 " hexmask.long.byte 0x00 16.--23. 1. " INTID686 ,Interrupt ID686 Priority/Priority Byte Offset 686 " hexmask.long.byte 0x00 8.--15. 1. " INTID685 ,Interrupt ID685 Priority/Priority Byte Offset 685 " hexmask.long.byte 0x00 0.--7. 1. " INTID684 ,Interrupt ID684 Priority/Priority Byte Offset 684 " group.long 0x6B0++0x03 line.long 0x00 "GICD_IPRIORITYR172,Interrupt Priority Register 172" hexmask.long.byte 0x00 24.--31. 1. " INTID691 ,Interrupt ID691 Priority/Priority Byte Offset 691 " hexmask.long.byte 0x00 16.--23. 1. " INTID690 ,Interrupt ID690 Priority/Priority Byte Offset 690 " hexmask.long.byte 0x00 8.--15. 1. " INTID689 ,Interrupt ID689 Priority/Priority Byte Offset 689 " hexmask.long.byte 0x00 0.--7. 1. " INTID688 ,Interrupt ID688 Priority/Priority Byte Offset 688 " group.long 0x6B4++0x03 line.long 0x00 "GICD_IPRIORITYR173,Interrupt Priority Register 173" hexmask.long.byte 0x00 24.--31. 1. " INTID695 ,Interrupt ID695 Priority/Priority Byte Offset 695 " hexmask.long.byte 0x00 16.--23. 1. " INTID694 ,Interrupt ID694 Priority/Priority Byte Offset 694 " hexmask.long.byte 0x00 8.--15. 1. " INTID693 ,Interrupt ID693 Priority/Priority Byte Offset 693 " hexmask.long.byte 0x00 0.--7. 1. " INTID692 ,Interrupt ID692 Priority/Priority Byte Offset 692 " group.long 0x6B8++0x03 line.long 0x00 "GICD_IPRIORITYR174,Interrupt Priority Register 174" hexmask.long.byte 0x00 24.--31. 1. " INTID699 ,Interrupt ID699 Priority/Priority Byte Offset 699 " hexmask.long.byte 0x00 16.--23. 1. " INTID698 ,Interrupt ID698 Priority/Priority Byte Offset 698 " hexmask.long.byte 0x00 8.--15. 1. " INTID697 ,Interrupt ID697 Priority/Priority Byte Offset 697 " hexmask.long.byte 0x00 0.--7. 1. " INTID696 ,Interrupt ID696 Priority/Priority Byte Offset 696 " group.long 0x6BC++0x03 line.long 0x00 "GICD_IPRIORITYR175,Interrupt Priority Register 175" hexmask.long.byte 0x00 24.--31. 1. " INTID703 ,Interrupt ID703 Priority/Priority Byte Offset 703 " hexmask.long.byte 0x00 16.--23. 1. " INTID702 ,Interrupt ID702 Priority/Priority Byte Offset 702 " hexmask.long.byte 0x00 8.--15. 1. " INTID701 ,Interrupt ID701 Priority/Priority Byte Offset 701 " hexmask.long.byte 0x00 0.--7. 1. " INTID700 ,Interrupt ID700 Priority/Priority Byte Offset 700 " else hgroup.long 0x6A0++0x03 hide.long 0x00 "GICD_IPRIORITYR168,Interrupt Priority Register 168" hgroup.long 0x6A4++0x03 hide.long 0x00 "GICD_IPRIORITYR169,Interrupt Priority Register 169" hgroup.long 0x6A8++0x03 hide.long 0x00 "GICD_IPRIORITYR170,Interrupt Priority Register 170" hgroup.long 0x6AC++0x03 hide.long 0x00 "GICD_IPRIORITYR171,Interrupt Priority Register 171" hgroup.long 0x6B0++0x03 hide.long 0x00 "GICD_IPRIORITYR172,Interrupt Priority Register 172" hgroup.long 0x6B4++0x03 hide.long 0x00 "GICD_IPRIORITYR173,Interrupt Priority Register 173" hgroup.long 0x6B8++0x03 hide.long 0x00 "GICD_IPRIORITYR174,Interrupt Priority Register 174" hgroup.long 0x6BC++0x03 hide.long 0x00 "GICD_IPRIORITYR175,Interrupt Priority Register 175" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x16) group.long 0x6C0++0x03 line.long 0x00 "GICD_IPRIORITYR176,Interrupt Priority Register 176" hexmask.long.byte 0x00 24.--31. 1. " INTID707 ,Interrupt ID707 Priority/Priority Byte Offset 707 " hexmask.long.byte 0x00 16.--23. 1. " INTID706 ,Interrupt ID706 Priority/Priority Byte Offset 706 " hexmask.long.byte 0x00 8.--15. 1. " INTID705 ,Interrupt ID705 Priority/Priority Byte Offset 705 " hexmask.long.byte 0x00 0.--7. 1. " INTID704 ,Interrupt ID704 Priority/Priority Byte Offset 704 " group.long 0x6C4++0x03 line.long 0x00 "GICD_IPRIORITYR177,Interrupt Priority Register 177" hexmask.long.byte 0x00 24.--31. 1. " INTID711 ,Interrupt ID711 Priority/Priority Byte Offset 711 " hexmask.long.byte 0x00 16.--23. 1. " INTID710 ,Interrupt ID710 Priority/Priority Byte Offset 710 " hexmask.long.byte 0x00 8.--15. 1. " INTID709 ,Interrupt ID709 Priority/Priority Byte Offset 709 " hexmask.long.byte 0x00 0.--7. 1. " INTID708 ,Interrupt ID708 Priority/Priority Byte Offset 708 " group.long 0x6C8++0x03 line.long 0x00 "GICD_IPRIORITYR178,Interrupt Priority Register 178" hexmask.long.byte 0x00 24.--31. 1. " INTID715 ,Interrupt ID715 Priority/Priority Byte Offset 715 " hexmask.long.byte 0x00 16.--23. 1. " INTID714 ,Interrupt ID714 Priority/Priority Byte Offset 714 " hexmask.long.byte 0x00 8.--15. 1. " INTID713 ,Interrupt ID713 Priority/Priority Byte Offset 713 " hexmask.long.byte 0x00 0.--7. 1. " INTID712 ,Interrupt ID712 Priority/Priority Byte Offset 712 " group.long 0x6CC++0x03 line.long 0x00 "GICD_IPRIORITYR179,Interrupt Priority Register 179" hexmask.long.byte 0x00 24.--31. 1. " INTID719 ,Interrupt ID719 Priority/Priority Byte Offset 719 " hexmask.long.byte 0x00 16.--23. 1. " INTID718 ,Interrupt ID718 Priority/Priority Byte Offset 718 " hexmask.long.byte 0x00 8.--15. 1. " INTID717 ,Interrupt ID717 Priority/Priority Byte Offset 717 " hexmask.long.byte 0x00 0.--7. 1. " INTID716 ,Interrupt ID716 Priority/Priority Byte Offset 716 " group.long 0x6D0++0x03 line.long 0x00 "GICD_IPRIORITYR180,Interrupt Priority Register 180" hexmask.long.byte 0x00 24.--31. 1. " INTID723 ,Interrupt ID723 Priority/Priority Byte Offset 723 " hexmask.long.byte 0x00 16.--23. 1. " INTID722 ,Interrupt ID722 Priority/Priority Byte Offset 722 " hexmask.long.byte 0x00 8.--15. 1. " INTID721 ,Interrupt ID721 Priority/Priority Byte Offset 721 " hexmask.long.byte 0x00 0.--7. 1. " INTID720 ,Interrupt ID720 Priority/Priority Byte Offset 720 " group.long 0x6D4++0x03 line.long 0x00 "GICD_IPRIORITYR181,Interrupt Priority Register 181" hexmask.long.byte 0x00 24.--31. 1. " INTID727 ,Interrupt ID727 Priority/Priority Byte Offset 727 " hexmask.long.byte 0x00 16.--23. 1. " INTID726 ,Interrupt ID726 Priority/Priority Byte Offset 726 " hexmask.long.byte 0x00 8.--15. 1. " INTID725 ,Interrupt ID725 Priority/Priority Byte Offset 725 " hexmask.long.byte 0x00 0.--7. 1. " INTID724 ,Interrupt ID724 Priority/Priority Byte Offset 724 " group.long 0x6D8++0x03 line.long 0x00 "GICD_IPRIORITYR182,Interrupt Priority Register 182" hexmask.long.byte 0x00 24.--31. 1. " INTID731 ,Interrupt ID731 Priority/Priority Byte Offset 731 " hexmask.long.byte 0x00 16.--23. 1. " INTID730 ,Interrupt ID730 Priority/Priority Byte Offset 730 " hexmask.long.byte 0x00 8.--15. 1. " INTID729 ,Interrupt ID729 Priority/Priority Byte Offset 729 " hexmask.long.byte 0x00 0.--7. 1. " INTID728 ,Interrupt ID728 Priority/Priority Byte Offset 728 " group.long 0x6DC++0x03 line.long 0x00 "GICD_IPRIORITYR183,Interrupt Priority Register 183" hexmask.long.byte 0x00 24.--31. 1. " INTID735 ,Interrupt ID735 Priority/Priority Byte Offset 735 " hexmask.long.byte 0x00 16.--23. 1. " INTID734 ,Interrupt ID734 Priority/Priority Byte Offset 734 " hexmask.long.byte 0x00 8.--15. 1. " INTID733 ,Interrupt ID733 Priority/Priority Byte Offset 733 " hexmask.long.byte 0x00 0.--7. 1. " INTID732 ,Interrupt ID732 Priority/Priority Byte Offset 732 " else hgroup.long 0x6C0++0x03 hide.long 0x00 "GICD_IPRIORITYR176,Interrupt Priority Register 176" hgroup.long 0x6C4++0x03 hide.long 0x00 "GICD_IPRIORITYR177,Interrupt Priority Register 177" hgroup.long 0x6C8++0x03 hide.long 0x00 "GICD_IPRIORITYR178,Interrupt Priority Register 178" hgroup.long 0x6CC++0x03 hide.long 0x00 "GICD_IPRIORITYR179,Interrupt Priority Register 179" hgroup.long 0x6D0++0x03 hide.long 0x00 "GICD_IPRIORITYR180,Interrupt Priority Register 180" hgroup.long 0x6D4++0x03 hide.long 0x00 "GICD_IPRIORITYR181,Interrupt Priority Register 181" hgroup.long 0x6D8++0x03 hide.long 0x00 "GICD_IPRIORITYR182,Interrupt Priority Register 182" hgroup.long 0x6DC++0x03 hide.long 0x00 "GICD_IPRIORITYR183,Interrupt Priority Register 183" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x17) group.long 0x6E0++0x03 line.long 0x00 "GICD_IPRIORITYR184,Interrupt Priority Register 184" hexmask.long.byte 0x00 24.--31. 1. " INTID739 ,Interrupt ID739 Priority/Priority Byte Offset 739 " hexmask.long.byte 0x00 16.--23. 1. " INTID738 ,Interrupt ID738 Priority/Priority Byte Offset 738 " hexmask.long.byte 0x00 8.--15. 1. " INTID737 ,Interrupt ID737 Priority/Priority Byte Offset 737 " hexmask.long.byte 0x00 0.--7. 1. " INTID736 ,Interrupt ID736 Priority/Priority Byte Offset 736 " group.long 0x6E4++0x03 line.long 0x00 "GICD_IPRIORITYR185,Interrupt Priority Register 185" hexmask.long.byte 0x00 24.--31. 1. " INTID743 ,Interrupt ID743 Priority/Priority Byte Offset 743 " hexmask.long.byte 0x00 16.--23. 1. " INTID742 ,Interrupt ID742 Priority/Priority Byte Offset 742 " hexmask.long.byte 0x00 8.--15. 1. " INTID741 ,Interrupt ID741 Priority/Priority Byte Offset 741 " hexmask.long.byte 0x00 0.--7. 1. " INTID740 ,Interrupt ID740 Priority/Priority Byte Offset 740 " group.long 0x6E8++0x03 line.long 0x00 "GICD_IPRIORITYR186,Interrupt Priority Register 186" hexmask.long.byte 0x00 24.--31. 1. " INTID747 ,Interrupt ID747 Priority/Priority Byte Offset 747 " hexmask.long.byte 0x00 16.--23. 1. " INTID746 ,Interrupt ID746 Priority/Priority Byte Offset 746 " hexmask.long.byte 0x00 8.--15. 1. " INTID745 ,Interrupt ID745 Priority/Priority Byte Offset 745 " hexmask.long.byte 0x00 0.--7. 1. " INTID744 ,Interrupt ID744 Priority/Priority Byte Offset 744 " group.long 0x6EC++0x03 line.long 0x00 "GICD_IPRIORITYR187,Interrupt Priority Register 187" hexmask.long.byte 0x00 24.--31. 1. " INTID751 ,Interrupt ID751 Priority/Priority Byte Offset 751 " hexmask.long.byte 0x00 16.--23. 1. " INTID750 ,Interrupt ID750 Priority/Priority Byte Offset 750 " hexmask.long.byte 0x00 8.--15. 1. " INTID749 ,Interrupt ID749 Priority/Priority Byte Offset 749 " hexmask.long.byte 0x00 0.--7. 1. " INTID748 ,Interrupt ID748 Priority/Priority Byte Offset 748 " group.long 0x6F0++0x03 line.long 0x00 "GICD_IPRIORITYR188,Interrupt Priority Register 188" hexmask.long.byte 0x00 24.--31. 1. " INTID755 ,Interrupt ID755 Priority/Priority Byte Offset 755 " hexmask.long.byte 0x00 16.--23. 1. " INTID754 ,Interrupt ID754 Priority/Priority Byte Offset 754 " hexmask.long.byte 0x00 8.--15. 1. " INTID753 ,Interrupt ID753 Priority/Priority Byte Offset 753 " hexmask.long.byte 0x00 0.--7. 1. " INTID752 ,Interrupt ID752 Priority/Priority Byte Offset 752 " group.long 0x6F4++0x03 line.long 0x00 "GICD_IPRIORITYR189,Interrupt Priority Register 189" hexmask.long.byte 0x00 24.--31. 1. " INTID759 ,Interrupt ID759 Priority/Priority Byte Offset 759 " hexmask.long.byte 0x00 16.--23. 1. " INTID758 ,Interrupt ID758 Priority/Priority Byte Offset 758 " hexmask.long.byte 0x00 8.--15. 1. " INTID757 ,Interrupt ID757 Priority/Priority Byte Offset 757 " hexmask.long.byte 0x00 0.--7. 1. " INTID756 ,Interrupt ID756 Priority/Priority Byte Offset 756 " group.long 0x6F8++0x03 line.long 0x00 "GICD_IPRIORITYR190,Interrupt Priority Register 190" hexmask.long.byte 0x00 24.--31. 1. " INTID763 ,Interrupt ID763 Priority/Priority Byte Offset 763 " hexmask.long.byte 0x00 16.--23. 1. " INTID762 ,Interrupt ID762 Priority/Priority Byte Offset 762 " hexmask.long.byte 0x00 8.--15. 1. " INTID761 ,Interrupt ID761 Priority/Priority Byte Offset 761 " hexmask.long.byte 0x00 0.--7. 1. " INTID760 ,Interrupt ID760 Priority/Priority Byte Offset 760 " group.long 0x6FC++0x03 line.long 0x00 "GICD_IPRIORITYR191,Interrupt Priority Register 191" hexmask.long.byte 0x00 24.--31. 1. " INTID767 ,Interrupt ID767 Priority/Priority Byte Offset 767 " hexmask.long.byte 0x00 16.--23. 1. " INTID766 ,Interrupt ID766 Priority/Priority Byte Offset 766 " hexmask.long.byte 0x00 8.--15. 1. " INTID765 ,Interrupt ID765 Priority/Priority Byte Offset 765 " hexmask.long.byte 0x00 0.--7. 1. " INTID764 ,Interrupt ID764 Priority/Priority Byte Offset 764 " else hgroup.long 0x6E0++0x03 hide.long 0x00 "GICD_IPRIORITYR184,Interrupt Priority Register 184" hgroup.long 0x6E4++0x03 hide.long 0x00 "GICD_IPRIORITYR185,Interrupt Priority Register 185" hgroup.long 0x6E8++0x03 hide.long 0x00 "GICD_IPRIORITYR186,Interrupt Priority Register 186" hgroup.long 0x6EC++0x03 hide.long 0x00 "GICD_IPRIORITYR187,Interrupt Priority Register 187" hgroup.long 0x6F0++0x03 hide.long 0x00 "GICD_IPRIORITYR188,Interrupt Priority Register 188" hgroup.long 0x6F4++0x03 hide.long 0x00 "GICD_IPRIORITYR189,Interrupt Priority Register 189" hgroup.long 0x6F8++0x03 hide.long 0x00 "GICD_IPRIORITYR190,Interrupt Priority Register 190" hgroup.long 0x6FC++0x03 hide.long 0x00 "GICD_IPRIORITYR191,Interrupt Priority Register 191" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x18) group.long 0x700++0x03 line.long 0x00 "GICD_IPRIORITYR192,Interrupt Priority Register 192" hexmask.long.byte 0x00 24.--31. 1. " INTID771 ,Interrupt ID771 Priority/Priority Byte Offset 771 " hexmask.long.byte 0x00 16.--23. 1. " INTID770 ,Interrupt ID770 Priority/Priority Byte Offset 770 " hexmask.long.byte 0x00 8.--15. 1. " INTID769 ,Interrupt ID769 Priority/Priority Byte Offset 769 " hexmask.long.byte 0x00 0.--7. 1. " INTID768 ,Interrupt ID768 Priority/Priority Byte Offset 768 " group.long 0x704++0x03 line.long 0x00 "GICD_IPRIORITYR193,Interrupt Priority Register 193" hexmask.long.byte 0x00 24.--31. 1. " INTID775 ,Interrupt ID775 Priority/Priority Byte Offset 775 " hexmask.long.byte 0x00 16.--23. 1. " INTID774 ,Interrupt ID774 Priority/Priority Byte Offset 774 " hexmask.long.byte 0x00 8.--15. 1. " INTID773 ,Interrupt ID773 Priority/Priority Byte Offset 773 " hexmask.long.byte 0x00 0.--7. 1. " INTID772 ,Interrupt ID772 Priority/Priority Byte Offset 772 " group.long 0x708++0x03 line.long 0x00 "GICD_IPRIORITYR194,Interrupt Priority Register 194" hexmask.long.byte 0x00 24.--31. 1. " INTID779 ,Interrupt ID779 Priority/Priority Byte Offset 779 " hexmask.long.byte 0x00 16.--23. 1. " INTID778 ,Interrupt ID778 Priority/Priority Byte Offset 778 " hexmask.long.byte 0x00 8.--15. 1. " INTID777 ,Interrupt ID777 Priority/Priority Byte Offset 777 " hexmask.long.byte 0x00 0.--7. 1. " INTID776 ,Interrupt ID776 Priority/Priority Byte Offset 776 " group.long 0x70C++0x03 line.long 0x00 "GICD_IPRIORITYR195,Interrupt Priority Register 195" hexmask.long.byte 0x00 24.--31. 1. " INTID783 ,Interrupt ID783 Priority/Priority Byte Offset 783 " hexmask.long.byte 0x00 16.--23. 1. " INTID782 ,Interrupt ID782 Priority/Priority Byte Offset 782 " hexmask.long.byte 0x00 8.--15. 1. " INTID781 ,Interrupt ID781 Priority/Priority Byte Offset 781 " hexmask.long.byte 0x00 0.--7. 1. " INTID780 ,Interrupt ID780 Priority/Priority Byte Offset 780 " group.long 0x710++0x03 line.long 0x00 "GICD_IPRIORITYR196,Interrupt Priority Register 196" hexmask.long.byte 0x00 24.--31. 1. " INTID787 ,Interrupt ID787 Priority/Priority Byte Offset 787 " hexmask.long.byte 0x00 16.--23. 1. " INTID786 ,Interrupt ID786 Priority/Priority Byte Offset 786 " hexmask.long.byte 0x00 8.--15. 1. " INTID785 ,Interrupt ID785 Priority/Priority Byte Offset 785 " hexmask.long.byte 0x00 0.--7. 1. " INTID784 ,Interrupt ID784 Priority/Priority Byte Offset 784 " group.long 0x714++0x03 line.long 0x00 "GICD_IPRIORITYR197,Interrupt Priority Register 197" hexmask.long.byte 0x00 24.--31. 1. " INTID791 ,Interrupt ID791 Priority/Priority Byte Offset 791 " hexmask.long.byte 0x00 16.--23. 1. " INTID790 ,Interrupt ID790 Priority/Priority Byte Offset 790 " hexmask.long.byte 0x00 8.--15. 1. " INTID789 ,Interrupt ID789 Priority/Priority Byte Offset 789 " hexmask.long.byte 0x00 0.--7. 1. " INTID788 ,Interrupt ID788 Priority/Priority Byte Offset 788 " group.long 0x718++0x03 line.long 0x00 "GICD_IPRIORITYR198,Interrupt Priority Register 198" hexmask.long.byte 0x00 24.--31. 1. " INTID795 ,Interrupt ID795 Priority/Priority Byte Offset 795 " hexmask.long.byte 0x00 16.--23. 1. " INTID794 ,Interrupt ID794 Priority/Priority Byte Offset 794 " hexmask.long.byte 0x00 8.--15. 1. " INTID793 ,Interrupt ID793 Priority/Priority Byte Offset 793 " hexmask.long.byte 0x00 0.--7. 1. " INTID792 ,Interrupt ID792 Priority/Priority Byte Offset 792 " group.long 0x71C++0x03 line.long 0x00 "GICD_IPRIORITYR199,Interrupt Priority Register 199" hexmask.long.byte 0x00 24.--31. 1. " INTID799 ,Interrupt ID799 Priority/Priority Byte Offset 799 " hexmask.long.byte 0x00 16.--23. 1. " INTID798 ,Interrupt ID798 Priority/Priority Byte Offset 798 " hexmask.long.byte 0x00 8.--15. 1. " INTID797 ,Interrupt ID797 Priority/Priority Byte Offset 797 " hexmask.long.byte 0x00 0.--7. 1. " INTID796 ,Interrupt ID796 Priority/Priority Byte Offset 796 " else hgroup.long 0x700++0x03 hide.long 0x00 "GICD_IPRIORITYR192,Interrupt Priority Register 192" hgroup.long 0x704++0x03 hide.long 0x00 "GICD_IPRIORITYR193,Interrupt Priority Register 193" hgroup.long 0x708++0x03 hide.long 0x00 "GICD_IPRIORITYR194,Interrupt Priority Register 194" hgroup.long 0x70C++0x03 hide.long 0x00 "GICD_IPRIORITYR195,Interrupt Priority Register 195" hgroup.long 0x710++0x03 hide.long 0x00 "GICD_IPRIORITYR196,Interrupt Priority Register 196" hgroup.long 0x714++0x03 hide.long 0x00 "GICD_IPRIORITYR197,Interrupt Priority Register 197" hgroup.long 0x718++0x03 hide.long 0x00 "GICD_IPRIORITYR198,Interrupt Priority Register 198" hgroup.long 0x71C++0x03 hide.long 0x00 "GICD_IPRIORITYR199,Interrupt Priority Register 199" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x19) group.long 0x720++0x03 line.long 0x00 "GICD_IPRIORITYR200,Interrupt Priority Register 200" hexmask.long.byte 0x00 24.--31. 1. " INTID803 ,Interrupt ID803 Priority/Priority Byte Offset 803 " hexmask.long.byte 0x00 16.--23. 1. " INTID802 ,Interrupt ID802 Priority/Priority Byte Offset 802 " hexmask.long.byte 0x00 8.--15. 1. " INTID801 ,Interrupt ID801 Priority/Priority Byte Offset 801 " hexmask.long.byte 0x00 0.--7. 1. " INTID800 ,Interrupt ID800 Priority/Priority Byte Offset 800 " group.long 0x724++0x03 line.long 0x00 "GICD_IPRIORITYR201,Interrupt Priority Register 201" hexmask.long.byte 0x00 24.--31. 1. " INTID807 ,Interrupt ID807 Priority/Priority Byte Offset 807 " hexmask.long.byte 0x00 16.--23. 1. " INTID806 ,Interrupt ID806 Priority/Priority Byte Offset 806 " hexmask.long.byte 0x00 8.--15. 1. " INTID805 ,Interrupt ID805 Priority/Priority Byte Offset 805 " hexmask.long.byte 0x00 0.--7. 1. " INTID804 ,Interrupt ID804 Priority/Priority Byte Offset 804 " group.long 0x728++0x03 line.long 0x00 "GICD_IPRIORITYR202,Interrupt Priority Register 202" hexmask.long.byte 0x00 24.--31. 1. " INTID811 ,Interrupt ID811 Priority/Priority Byte Offset 811 " hexmask.long.byte 0x00 16.--23. 1. " INTID810 ,Interrupt ID810 Priority/Priority Byte Offset 810 " hexmask.long.byte 0x00 8.--15. 1. " INTID809 ,Interrupt ID809 Priority/Priority Byte Offset 809 " hexmask.long.byte 0x00 0.--7. 1. " INTID808 ,Interrupt ID808 Priority/Priority Byte Offset 808 " group.long 0x72C++0x03 line.long 0x00 "GICD_IPRIORITYR203,Interrupt Priority Register 203" hexmask.long.byte 0x00 24.--31. 1. " INTID815 ,Interrupt ID815 Priority/Priority Byte Offset 815 " hexmask.long.byte 0x00 16.--23. 1. " INTID814 ,Interrupt ID814 Priority/Priority Byte Offset 814 " hexmask.long.byte 0x00 8.--15. 1. " INTID813 ,Interrupt ID813 Priority/Priority Byte Offset 813 " hexmask.long.byte 0x00 0.--7. 1. " INTID812 ,Interrupt ID812 Priority/Priority Byte Offset 812 " group.long 0x730++0x03 line.long 0x00 "GICD_IPRIORITYR204,Interrupt Priority Register 204" hexmask.long.byte 0x00 24.--31. 1. " INTID819 ,Interrupt ID819 Priority/Priority Byte Offset 819 " hexmask.long.byte 0x00 16.--23. 1. " INTID818 ,Interrupt ID818 Priority/Priority Byte Offset 818 " hexmask.long.byte 0x00 8.--15. 1. " INTID817 ,Interrupt ID817 Priority/Priority Byte Offset 817 " hexmask.long.byte 0x00 0.--7. 1. " INTID816 ,Interrupt ID816 Priority/Priority Byte Offset 816 " group.long 0x734++0x03 line.long 0x00 "GICD_IPRIORITYR205,Interrupt Priority Register 205" hexmask.long.byte 0x00 24.--31. 1. " INTID823 ,Interrupt ID823 Priority/Priority Byte Offset 823 " hexmask.long.byte 0x00 16.--23. 1. " INTID822 ,Interrupt ID822 Priority/Priority Byte Offset 822 " hexmask.long.byte 0x00 8.--15. 1. " INTID821 ,Interrupt ID821 Priority/Priority Byte Offset 821 " hexmask.long.byte 0x00 0.--7. 1. " INTID820 ,Interrupt ID820 Priority/Priority Byte Offset 820 " group.long 0x738++0x03 line.long 0x00 "GICD_IPRIORITYR206,Interrupt Priority Register 206" hexmask.long.byte 0x00 24.--31. 1. " INTID827 ,Interrupt ID827 Priority/Priority Byte Offset 827 " hexmask.long.byte 0x00 16.--23. 1. " INTID826 ,Interrupt ID826 Priority/Priority Byte Offset 826 " hexmask.long.byte 0x00 8.--15. 1. " INTID825 ,Interrupt ID825 Priority/Priority Byte Offset 825 " hexmask.long.byte 0x00 0.--7. 1. " INTID824 ,Interrupt ID824 Priority/Priority Byte Offset 824 " group.long 0x73C++0x03 line.long 0x00 "GICD_IPRIORITYR207,Interrupt Priority Register 207" hexmask.long.byte 0x00 24.--31. 1. " INTID831 ,Interrupt ID831 Priority/Priority Byte Offset 831 " hexmask.long.byte 0x00 16.--23. 1. " INTID830 ,Interrupt ID830 Priority/Priority Byte Offset 830 " hexmask.long.byte 0x00 8.--15. 1. " INTID829 ,Interrupt ID829 Priority/Priority Byte Offset 829 " hexmask.long.byte 0x00 0.--7. 1. " INTID828 ,Interrupt ID828 Priority/Priority Byte Offset 828 " else hgroup.long 0x720++0x03 hide.long 0x00 "GICD_IPRIORITYR200,Interrupt Priority Register 200" hgroup.long 0x724++0x03 hide.long 0x00 "GICD_IPRIORITYR201,Interrupt Priority Register 201" hgroup.long 0x728++0x03 hide.long 0x00 "GICD_IPRIORITYR202,Interrupt Priority Register 202" hgroup.long 0x72C++0x03 hide.long 0x00 "GICD_IPRIORITYR203,Interrupt Priority Register 203" hgroup.long 0x730++0x03 hide.long 0x00 "GICD_IPRIORITYR204,Interrupt Priority Register 204" hgroup.long 0x734++0x03 hide.long 0x00 "GICD_IPRIORITYR205,Interrupt Priority Register 205" hgroup.long 0x738++0x03 hide.long 0x00 "GICD_IPRIORITYR206,Interrupt Priority Register 206" hgroup.long 0x73C++0x03 hide.long 0x00 "GICD_IPRIORITYR207,Interrupt Priority Register 207" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x1A) group.long 0x740++0x03 line.long 0x00 "GICD_IPRIORITYR208,Interrupt Priority Register 208" hexmask.long.byte 0x00 24.--31. 1. " INTID835 ,Interrupt ID835 Priority/Priority Byte Offset 835 " hexmask.long.byte 0x00 16.--23. 1. " INTID834 ,Interrupt ID834 Priority/Priority Byte Offset 834 " hexmask.long.byte 0x00 8.--15. 1. " INTID833 ,Interrupt ID833 Priority/Priority Byte Offset 833 " hexmask.long.byte 0x00 0.--7. 1. " INTID832 ,Interrupt ID832 Priority/Priority Byte Offset 832 " group.long 0x744++0x03 line.long 0x00 "GICD_IPRIORITYR209,Interrupt Priority Register 209" hexmask.long.byte 0x00 24.--31. 1. " INTID839 ,Interrupt ID839 Priority/Priority Byte Offset 839 " hexmask.long.byte 0x00 16.--23. 1. " INTID838 ,Interrupt ID838 Priority/Priority Byte Offset 838 " hexmask.long.byte 0x00 8.--15. 1. " INTID837 ,Interrupt ID837 Priority/Priority Byte Offset 837 " hexmask.long.byte 0x00 0.--7. 1. " INTID836 ,Interrupt ID836 Priority/Priority Byte Offset 836 " group.long 0x748++0x03 line.long 0x00 "GICD_IPRIORITYR210,Interrupt Priority Register 210" hexmask.long.byte 0x00 24.--31. 1. " INTID843 ,Interrupt ID843 Priority/Priority Byte Offset 843 " hexmask.long.byte 0x00 16.--23. 1. " INTID842 ,Interrupt ID842 Priority/Priority Byte Offset 842 " hexmask.long.byte 0x00 8.--15. 1. " INTID841 ,Interrupt ID841 Priority/Priority Byte Offset 841 " hexmask.long.byte 0x00 0.--7. 1. " INTID840 ,Interrupt ID840 Priority/Priority Byte Offset 840 " group.long 0x74C++0x03 line.long 0x00 "GICD_IPRIORITYR211,Interrupt Priority Register 211" hexmask.long.byte 0x00 24.--31. 1. " INTID847 ,Interrupt ID847 Priority/Priority Byte Offset 847 " hexmask.long.byte 0x00 16.--23. 1. " INTID846 ,Interrupt ID846 Priority/Priority Byte Offset 846 " hexmask.long.byte 0x00 8.--15. 1. " INTID845 ,Interrupt ID845 Priority/Priority Byte Offset 845 " hexmask.long.byte 0x00 0.--7. 1. " INTID844 ,Interrupt ID844 Priority/Priority Byte Offset 844 " group.long 0x750++0x03 line.long 0x00 "GICD_IPRIORITYR212,Interrupt Priority Register 212" hexmask.long.byte 0x00 24.--31. 1. " INTID851 ,Interrupt ID851 Priority/Priority Byte Offset 851 " hexmask.long.byte 0x00 16.--23. 1. " INTID850 ,Interrupt ID850 Priority/Priority Byte Offset 850 " hexmask.long.byte 0x00 8.--15. 1. " INTID849 ,Interrupt ID849 Priority/Priority Byte Offset 849 " hexmask.long.byte 0x00 0.--7. 1. " INTID848 ,Interrupt ID848 Priority/Priority Byte Offset 848 " group.long 0x754++0x03 line.long 0x00 "GICD_IPRIORITYR213,Interrupt Priority Register 213" hexmask.long.byte 0x00 24.--31. 1. " INTID855 ,Interrupt ID855 Priority/Priority Byte Offset 855 " hexmask.long.byte 0x00 16.--23. 1. " INTID854 ,Interrupt ID854 Priority/Priority Byte Offset 854 " hexmask.long.byte 0x00 8.--15. 1. " INTID853 ,Interrupt ID853 Priority/Priority Byte Offset 853 " hexmask.long.byte 0x00 0.--7. 1. " INTID852 ,Interrupt ID852 Priority/Priority Byte Offset 852 " group.long 0x758++0x03 line.long 0x00 "GICD_IPRIORITYR214,Interrupt Priority Register 214" hexmask.long.byte 0x00 24.--31. 1. " INTID859 ,Interrupt ID859 Priority/Priority Byte Offset 859 " hexmask.long.byte 0x00 16.--23. 1. " INTID858 ,Interrupt ID858 Priority/Priority Byte Offset 858 " hexmask.long.byte 0x00 8.--15. 1. " INTID857 ,Interrupt ID857 Priority/Priority Byte Offset 857 " hexmask.long.byte 0x00 0.--7. 1. " INTID856 ,Interrupt ID856 Priority/Priority Byte Offset 856 " group.long 0x75C++0x03 line.long 0x00 "GICD_IPRIORITYR215,Interrupt Priority Register 215" hexmask.long.byte 0x00 24.--31. 1. " INTID863 ,Interrupt ID863 Priority/Priority Byte Offset 863 " hexmask.long.byte 0x00 16.--23. 1. " INTID862 ,Interrupt ID862 Priority/Priority Byte Offset 862 " hexmask.long.byte 0x00 8.--15. 1. " INTID861 ,Interrupt ID861 Priority/Priority Byte Offset 861 " hexmask.long.byte 0x00 0.--7. 1. " INTID860 ,Interrupt ID860 Priority/Priority Byte Offset 860 " else hgroup.long 0x740++0x03 hide.long 0x00 "GICD_IPRIORITYR208,Interrupt Priority Register 208" hgroup.long 0x744++0x03 hide.long 0x00 "GICD_IPRIORITYR209,Interrupt Priority Register 209" hgroup.long 0x748++0x03 hide.long 0x00 "GICD_IPRIORITYR210,Interrupt Priority Register 210" hgroup.long 0x74C++0x03 hide.long 0x00 "GICD_IPRIORITYR211,Interrupt Priority Register 211" hgroup.long 0x750++0x03 hide.long 0x00 "GICD_IPRIORITYR212,Interrupt Priority Register 212" hgroup.long 0x754++0x03 hide.long 0x00 "GICD_IPRIORITYR213,Interrupt Priority Register 213" hgroup.long 0x758++0x03 hide.long 0x00 "GICD_IPRIORITYR214,Interrupt Priority Register 214" hgroup.long 0x75C++0x03 hide.long 0x00 "GICD_IPRIORITYR215,Interrupt Priority Register 215" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x1B) group.long 0x760++0x03 line.long 0x00 "GICD_IPRIORITYR216,Interrupt Priority Register 216" hexmask.long.byte 0x00 24.--31. 1. " INTID867 ,Interrupt ID867 Priority/Priority Byte Offset 867 " hexmask.long.byte 0x00 16.--23. 1. " INTID866 ,Interrupt ID866 Priority/Priority Byte Offset 866 " hexmask.long.byte 0x00 8.--15. 1. " INTID865 ,Interrupt ID865 Priority/Priority Byte Offset 865 " hexmask.long.byte 0x00 0.--7. 1. " INTID864 ,Interrupt ID864 Priority/Priority Byte Offset 864 " group.long 0x764++0x03 line.long 0x00 "GICD_IPRIORITYR217,Interrupt Priority Register 217" hexmask.long.byte 0x00 24.--31. 1. " INTID871 ,Interrupt ID871 Priority/Priority Byte Offset 871 " hexmask.long.byte 0x00 16.--23. 1. " INTID870 ,Interrupt ID870 Priority/Priority Byte Offset 870 " hexmask.long.byte 0x00 8.--15. 1. " INTID869 ,Interrupt ID869 Priority/Priority Byte Offset 869 " hexmask.long.byte 0x00 0.--7. 1. " INTID868 ,Interrupt ID868 Priority/Priority Byte Offset 868 " group.long 0x768++0x03 line.long 0x00 "GICD_IPRIORITYR218,Interrupt Priority Register 218" hexmask.long.byte 0x00 24.--31. 1. " INTID875 ,Interrupt ID875 Priority/Priority Byte Offset 875 " hexmask.long.byte 0x00 16.--23. 1. " INTID874 ,Interrupt ID874 Priority/Priority Byte Offset 874 " hexmask.long.byte 0x00 8.--15. 1. " INTID873 ,Interrupt ID873 Priority/Priority Byte Offset 873 " hexmask.long.byte 0x00 0.--7. 1. " INTID872 ,Interrupt ID872 Priority/Priority Byte Offset 872 " group.long 0x76C++0x03 line.long 0x00 "GICD_IPRIORITYR219,Interrupt Priority Register 219" hexmask.long.byte 0x00 24.--31. 1. " INTID879 ,Interrupt ID879 Priority/Priority Byte Offset 879 " hexmask.long.byte 0x00 16.--23. 1. " INTID878 ,Interrupt ID878 Priority/Priority Byte Offset 878 " hexmask.long.byte 0x00 8.--15. 1. " INTID877 ,Interrupt ID877 Priority/Priority Byte Offset 877 " hexmask.long.byte 0x00 0.--7. 1. " INTID876 ,Interrupt ID876 Priority/Priority Byte Offset 876 " group.long 0x770++0x03 line.long 0x00 "GICD_IPRIORITYR220,Interrupt Priority Register 220" hexmask.long.byte 0x00 24.--31. 1. " INTID883 ,Interrupt ID883 Priority/Priority Byte Offset 883 " hexmask.long.byte 0x00 16.--23. 1. " INTID882 ,Interrupt ID882 Priority/Priority Byte Offset 882 " hexmask.long.byte 0x00 8.--15. 1. " INTID881 ,Interrupt ID881 Priority/Priority Byte Offset 881 " hexmask.long.byte 0x00 0.--7. 1. " INTID880 ,Interrupt ID880 Priority/Priority Byte Offset 880 " group.long 0x774++0x03 line.long 0x00 "GICD_IPRIORITYR221,Interrupt Priority Register 221" hexmask.long.byte 0x00 24.--31. 1. " INTID887 ,Interrupt ID887 Priority/Priority Byte Offset 887 " hexmask.long.byte 0x00 16.--23. 1. " INTID886 ,Interrupt ID886 Priority/Priority Byte Offset 886 " hexmask.long.byte 0x00 8.--15. 1. " INTID885 ,Interrupt ID885 Priority/Priority Byte Offset 885 " hexmask.long.byte 0x00 0.--7. 1. " INTID884 ,Interrupt ID884 Priority/Priority Byte Offset 884 " group.long 0x778++0x03 line.long 0x00 "GICD_IPRIORITYR222,Interrupt Priority Register 222" hexmask.long.byte 0x00 24.--31. 1. " INTID891 ,Interrupt ID891 Priority/Priority Byte Offset 891 " hexmask.long.byte 0x00 16.--23. 1. " INTID890 ,Interrupt ID890 Priority/Priority Byte Offset 890 " hexmask.long.byte 0x00 8.--15. 1. " INTID889 ,Interrupt ID889 Priority/Priority Byte Offset 889 " hexmask.long.byte 0x00 0.--7. 1. " INTID888 ,Interrupt ID888 Priority/Priority Byte Offset 888 " group.long 0x77C++0x03 line.long 0x00 "GICD_IPRIORITYR223,Interrupt Priority Register 223" hexmask.long.byte 0x00 24.--31. 1. " INTID895 ,Interrupt ID895 Priority/Priority Byte Offset 895 " hexmask.long.byte 0x00 16.--23. 1. " INTID894 ,Interrupt ID894 Priority/Priority Byte Offset 894 " hexmask.long.byte 0x00 8.--15. 1. " INTID893 ,Interrupt ID893 Priority/Priority Byte Offset 893 " hexmask.long.byte 0x00 0.--7. 1. " INTID892 ,Interrupt ID892 Priority/Priority Byte Offset 892 " else hgroup.long 0x760++0x03 hide.long 0x00 "GICD_IPRIORITYR216,Interrupt Priority Register 216" hgroup.long 0x764++0x03 hide.long 0x00 "GICD_IPRIORITYR217,Interrupt Priority Register 217" hgroup.long 0x768++0x03 hide.long 0x00 "GICD_IPRIORITYR218,Interrupt Priority Register 218" hgroup.long 0x76C++0x03 hide.long 0x00 "GICD_IPRIORITYR219,Interrupt Priority Register 219" hgroup.long 0x770++0x03 hide.long 0x00 "GICD_IPRIORITYR220,Interrupt Priority Register 220" hgroup.long 0x774++0x03 hide.long 0x00 "GICD_IPRIORITYR221,Interrupt Priority Register 221" hgroup.long 0x778++0x03 hide.long 0x00 "GICD_IPRIORITYR222,Interrupt Priority Register 222" hgroup.long 0x77C++0x03 hide.long 0x00 "GICD_IPRIORITYR223,Interrupt Priority Register 223" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x1C) group.long 0x780++0x03 line.long 0x00 "GICD_IPRIORITYR224,Interrupt Priority Register 224" hexmask.long.byte 0x00 24.--31. 1. " INTID899 ,Interrupt ID899 Priority/Priority Byte Offset 899 " hexmask.long.byte 0x00 16.--23. 1. " INTID898 ,Interrupt ID898 Priority/Priority Byte Offset 898 " hexmask.long.byte 0x00 8.--15. 1. " INTID897 ,Interrupt ID897 Priority/Priority Byte Offset 897 " hexmask.long.byte 0x00 0.--7. 1. " INTID896 ,Interrupt ID896 Priority/Priority Byte Offset 896 " group.long 0x784++0x03 line.long 0x00 "GICD_IPRIORITYR225,Interrupt Priority Register 225" hexmask.long.byte 0x00 24.--31. 1. " INTID903 ,Interrupt ID903 Priority/Priority Byte Offset 903 " hexmask.long.byte 0x00 16.--23. 1. " INTID902 ,Interrupt ID902 Priority/Priority Byte Offset 902 " hexmask.long.byte 0x00 8.--15. 1. " INTID901 ,Interrupt ID901 Priority/Priority Byte Offset 901 " hexmask.long.byte 0x00 0.--7. 1. " INTID900 ,Interrupt ID900 Priority/Priority Byte Offset 900 " group.long 0x788++0x03 line.long 0x00 "GICD_IPRIORITYR226,Interrupt Priority Register 226" hexmask.long.byte 0x00 24.--31. 1. " INTID907 ,Interrupt ID907 Priority/Priority Byte Offset 907 " hexmask.long.byte 0x00 16.--23. 1. " INTID906 ,Interrupt ID906 Priority/Priority Byte Offset 906 " hexmask.long.byte 0x00 8.--15. 1. " INTID905 ,Interrupt ID905 Priority/Priority Byte Offset 905 " hexmask.long.byte 0x00 0.--7. 1. " INTID904 ,Interrupt ID904 Priority/Priority Byte Offset 904 " group.long 0x78C++0x03 line.long 0x00 "GICD_IPRIORITYR227,Interrupt Priority Register 227" hexmask.long.byte 0x00 24.--31. 1. " INTID911 ,Interrupt ID911 Priority/Priority Byte Offset 911 " hexmask.long.byte 0x00 16.--23. 1. " INTID910 ,Interrupt ID910 Priority/Priority Byte Offset 910 " hexmask.long.byte 0x00 8.--15. 1. " INTID909 ,Interrupt ID909 Priority/Priority Byte Offset 909 " hexmask.long.byte 0x00 0.--7. 1. " INTID908 ,Interrupt ID908 Priority/Priority Byte Offset 908 " group.long 0x790++0x03 line.long 0x00 "GICD_IPRIORITYR228,Interrupt Priority Register 228" hexmask.long.byte 0x00 24.--31. 1. " INTID915 ,Interrupt ID915 Priority/Priority Byte Offset 915 " hexmask.long.byte 0x00 16.--23. 1. " INTID914 ,Interrupt ID914 Priority/Priority Byte Offset 914 " hexmask.long.byte 0x00 8.--15. 1. " INTID913 ,Interrupt ID913 Priority/Priority Byte Offset 913 " hexmask.long.byte 0x00 0.--7. 1. " INTID912 ,Interrupt ID912 Priority/Priority Byte Offset 912 " group.long 0x794++0x03 line.long 0x00 "GICD_IPRIORITYR229,Interrupt Priority Register 229" hexmask.long.byte 0x00 24.--31. 1. " INTID919 ,Interrupt ID919 Priority/Priority Byte Offset 919 " hexmask.long.byte 0x00 16.--23. 1. " INTID918 ,Interrupt ID918 Priority/Priority Byte Offset 918 " hexmask.long.byte 0x00 8.--15. 1. " INTID917 ,Interrupt ID917 Priority/Priority Byte Offset 917 " hexmask.long.byte 0x00 0.--7. 1. " INTID916 ,Interrupt ID916 Priority/Priority Byte Offset 916 " group.long 0x798++0x03 line.long 0x00 "GICD_IPRIORITYR230,Interrupt Priority Register 230" hexmask.long.byte 0x00 24.--31. 1. " INTID923 ,Interrupt ID923 Priority/Priority Byte Offset 923 " hexmask.long.byte 0x00 16.--23. 1. " INTID922 ,Interrupt ID922 Priority/Priority Byte Offset 922 " hexmask.long.byte 0x00 8.--15. 1. " INTID921 ,Interrupt ID921 Priority/Priority Byte Offset 921 " hexmask.long.byte 0x00 0.--7. 1. " INTID920 ,Interrupt ID920 Priority/Priority Byte Offset 920 " group.long 0x79C++0x03 line.long 0x00 "GICD_IPRIORITYR231,Interrupt Priority Register 231" hexmask.long.byte 0x00 24.--31. 1. " INTID927 ,Interrupt ID927 Priority/Priority Byte Offset 927 " hexmask.long.byte 0x00 16.--23. 1. " INTID926 ,Interrupt ID926 Priority/Priority Byte Offset 926 " hexmask.long.byte 0x00 8.--15. 1. " INTID925 ,Interrupt ID925 Priority/Priority Byte Offset 925 " hexmask.long.byte 0x00 0.--7. 1. " INTID924 ,Interrupt ID924 Priority/Priority Byte Offset 924 " else hgroup.long 0x780++0x03 hide.long 0x00 "GICD_IPRIORITYR224,Interrupt Priority Register 224" hgroup.long 0x784++0x03 hide.long 0x00 "GICD_IPRIORITYR225,Interrupt Priority Register 225" hgroup.long 0x788++0x03 hide.long 0x00 "GICD_IPRIORITYR226,Interrupt Priority Register 226" hgroup.long 0x78C++0x03 hide.long 0x00 "GICD_IPRIORITYR227,Interrupt Priority Register 227" hgroup.long 0x790++0x03 hide.long 0x00 "GICD_IPRIORITYR228,Interrupt Priority Register 228" hgroup.long 0x794++0x03 hide.long 0x00 "GICD_IPRIORITYR229,Interrupt Priority Register 229" hgroup.long 0x798++0x03 hide.long 0x00 "GICD_IPRIORITYR230,Interrupt Priority Register 230" hgroup.long 0x79C++0x03 hide.long 0x00 "GICD_IPRIORITYR231,Interrupt Priority Register 231" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x1D) group.long 0x7A0++0x03 line.long 0x00 "GICD_IPRIORITYR232,Interrupt Priority Register 232" hexmask.long.byte 0x00 24.--31. 1. " INTID931 ,Interrupt ID931 Priority/Priority Byte Offset 931 " hexmask.long.byte 0x00 16.--23. 1. " INTID930 ,Interrupt ID930 Priority/Priority Byte Offset 930 " hexmask.long.byte 0x00 8.--15. 1. " INTID929 ,Interrupt ID929 Priority/Priority Byte Offset 929 " hexmask.long.byte 0x00 0.--7. 1. " INTID928 ,Interrupt ID928 Priority/Priority Byte Offset 928 " group.long 0x7A4++0x03 line.long 0x00 "GICD_IPRIORITYR233,Interrupt Priority Register 233" hexmask.long.byte 0x00 24.--31. 1. " INTID935 ,Interrupt ID935 Priority/Priority Byte Offset 935 " hexmask.long.byte 0x00 16.--23. 1. " INTID934 ,Interrupt ID934 Priority/Priority Byte Offset 934 " hexmask.long.byte 0x00 8.--15. 1. " INTID933 ,Interrupt ID933 Priority/Priority Byte Offset 933 " hexmask.long.byte 0x00 0.--7. 1. " INTID932 ,Interrupt ID932 Priority/Priority Byte Offset 932 " group.long 0x7A8++0x03 line.long 0x00 "GICD_IPRIORITYR234,Interrupt Priority Register 234" hexmask.long.byte 0x00 24.--31. 1. " INTID939 ,Interrupt ID939 Priority/Priority Byte Offset 939 " hexmask.long.byte 0x00 16.--23. 1. " INTID938 ,Interrupt ID938 Priority/Priority Byte Offset 938 " hexmask.long.byte 0x00 8.--15. 1. " INTID937 ,Interrupt ID937 Priority/Priority Byte Offset 937 " hexmask.long.byte 0x00 0.--7. 1. " INTID936 ,Interrupt ID936 Priority/Priority Byte Offset 936 " group.long 0x7AC++0x03 line.long 0x00 "GICD_IPRIORITYR235,Interrupt Priority Register 235" hexmask.long.byte 0x00 24.--31. 1. " INTID943 ,Interrupt ID943 Priority/Priority Byte Offset 943 " hexmask.long.byte 0x00 16.--23. 1. " INTID942 ,Interrupt ID942 Priority/Priority Byte Offset 942 " hexmask.long.byte 0x00 8.--15. 1. " INTID941 ,Interrupt ID941 Priority/Priority Byte Offset 941 " hexmask.long.byte 0x00 0.--7. 1. " INTID940 ,Interrupt ID940 Priority/Priority Byte Offset 940 " group.long 0x7B0++0x03 line.long 0x00 "GICD_IPRIORITYR236,Interrupt Priority Register 236" hexmask.long.byte 0x00 24.--31. 1. " INTID947 ,Interrupt ID947 Priority/Priority Byte Offset 947 " hexmask.long.byte 0x00 16.--23. 1. " INTID946 ,Interrupt ID946 Priority/Priority Byte Offset 946 " hexmask.long.byte 0x00 8.--15. 1. " INTID945 ,Interrupt ID945 Priority/Priority Byte Offset 945 " hexmask.long.byte 0x00 0.--7. 1. " INTID944 ,Interrupt ID944 Priority/Priority Byte Offset 944 " group.long 0x7B4++0x03 line.long 0x00 "GICD_IPRIORITYR237,Interrupt Priority Register 237" hexmask.long.byte 0x00 24.--31. 1. " INTID951 ,Interrupt ID951 Priority/Priority Byte Offset 951 " hexmask.long.byte 0x00 16.--23. 1. " INTID950 ,Interrupt ID950 Priority/Priority Byte Offset 950 " hexmask.long.byte 0x00 8.--15. 1. " INTID949 ,Interrupt ID949 Priority/Priority Byte Offset 949 " hexmask.long.byte 0x00 0.--7. 1. " INTID948 ,Interrupt ID948 Priority/Priority Byte Offset 948 " group.long 0x7B8++0x03 line.long 0x00 "GICD_IPRIORITYR238,Interrupt Priority Register 238" hexmask.long.byte 0x00 24.--31. 1. " INTID955 ,Interrupt ID955 Priority/Priority Byte Offset 955 " hexmask.long.byte 0x00 16.--23. 1. " INTID954 ,Interrupt ID954 Priority/Priority Byte Offset 954 " hexmask.long.byte 0x00 8.--15. 1. " INTID953 ,Interrupt ID953 Priority/Priority Byte Offset 953 " hexmask.long.byte 0x00 0.--7. 1. " INTID952 ,Interrupt ID952 Priority/Priority Byte Offset 952 " group.long 0x7BC++0x03 line.long 0x00 "GICD_IPRIORITYR239,Interrupt Priority Register 239" hexmask.long.byte 0x00 24.--31. 1. " INTID959 ,Interrupt ID959 Priority/Priority Byte Offset 959 " hexmask.long.byte 0x00 16.--23. 1. " INTID958 ,Interrupt ID958 Priority/Priority Byte Offset 958 " hexmask.long.byte 0x00 8.--15. 1. " INTID957 ,Interrupt ID957 Priority/Priority Byte Offset 957 " hexmask.long.byte 0x00 0.--7. 1. " INTID956 ,Interrupt ID956 Priority/Priority Byte Offset 956 " else hgroup.long 0x7A0++0x03 hide.long 0x00 "GICD_IPRIORITYR232,Interrupt Priority Register 232" hgroup.long 0x7A4++0x03 hide.long 0x00 "GICD_IPRIORITYR233,Interrupt Priority Register 233" hgroup.long 0x7A8++0x03 hide.long 0x00 "GICD_IPRIORITYR234,Interrupt Priority Register 234" hgroup.long 0x7AC++0x03 hide.long 0x00 "GICD_IPRIORITYR235,Interrupt Priority Register 235" hgroup.long 0x7B0++0x03 hide.long 0x00 "GICD_IPRIORITYR236,Interrupt Priority Register 236" hgroup.long 0x7B4++0x03 hide.long 0x00 "GICD_IPRIORITYR237,Interrupt Priority Register 237" hgroup.long 0x7B8++0x03 hide.long 0x00 "GICD_IPRIORITYR238,Interrupt Priority Register 238" hgroup.long 0x7BC++0x03 hide.long 0x00 "GICD_IPRIORITYR239,Interrupt Priority Register 239" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x1E) group.long 0x7C0++0x03 line.long 0x00 "GICD_IPRIORITYR240,Interrupt Priority Register 240" hexmask.long.byte 0x00 24.--31. 1. " INTID963 ,Interrupt ID963 Priority/Priority Byte Offset 963 " hexmask.long.byte 0x00 16.--23. 1. " INTID962 ,Interrupt ID962 Priority/Priority Byte Offset 962 " hexmask.long.byte 0x00 8.--15. 1. " INTID961 ,Interrupt ID961 Priority/Priority Byte Offset 961 " hexmask.long.byte 0x00 0.--7. 1. " INTID960 ,Interrupt ID960 Priority/Priority Byte Offset 960 " group.long 0x7C4++0x03 line.long 0x00 "GICD_IPRIORITYR241,Interrupt Priority Register 241" hexmask.long.byte 0x00 24.--31. 1. " INTID967 ,Interrupt ID967 Priority/Priority Byte Offset 967 " hexmask.long.byte 0x00 16.--23. 1. " INTID966 ,Interrupt ID966 Priority/Priority Byte Offset 966 " hexmask.long.byte 0x00 8.--15. 1. " INTID965 ,Interrupt ID965 Priority/Priority Byte Offset 965 " hexmask.long.byte 0x00 0.--7. 1. " INTID964 ,Interrupt ID964 Priority/Priority Byte Offset 964 " group.long 0x7C8++0x03 line.long 0x00 "GICD_IPRIORITYR242,Interrupt Priority Register 242" hexmask.long.byte 0x00 24.--31. 1. " INTID971 ,Interrupt ID971 Priority/Priority Byte Offset 971 " hexmask.long.byte 0x00 16.--23. 1. " INTID970 ,Interrupt ID970 Priority/Priority Byte Offset 970 " hexmask.long.byte 0x00 8.--15. 1. " INTID969 ,Interrupt ID969 Priority/Priority Byte Offset 969 " hexmask.long.byte 0x00 0.--7. 1. " INTID968 ,Interrupt ID968 Priority/Priority Byte Offset 968 " group.long 0x7CC++0x03 line.long 0x00 "GICD_IPRIORITYR243,Interrupt Priority Register 243" hexmask.long.byte 0x00 24.--31. 1. " INTID975 ,Interrupt ID975 Priority/Priority Byte Offset 975 " hexmask.long.byte 0x00 16.--23. 1. " INTID974 ,Interrupt ID974 Priority/Priority Byte Offset 974 " hexmask.long.byte 0x00 8.--15. 1. " INTID973 ,Interrupt ID973 Priority/Priority Byte Offset 973 " hexmask.long.byte 0x00 0.--7. 1. " INTID972 ,Interrupt ID972 Priority/Priority Byte Offset 972 " group.long 0x7D0++0x03 line.long 0x00 "GICD_IPRIORITYR244,Interrupt Priority Register 244" hexmask.long.byte 0x00 24.--31. 1. " INTID979 ,Interrupt ID979 Priority/Priority Byte Offset 979 " hexmask.long.byte 0x00 16.--23. 1. " INTID978 ,Interrupt ID978 Priority/Priority Byte Offset 978 " hexmask.long.byte 0x00 8.--15. 1. " INTID977 ,Interrupt ID977 Priority/Priority Byte Offset 977 " hexmask.long.byte 0x00 0.--7. 1. " INTID976 ,Interrupt ID976 Priority/Priority Byte Offset 976 " group.long 0x7D4++0x03 line.long 0x00 "GICD_IPRIORITYR245,Interrupt Priority Register 245" hexmask.long.byte 0x00 24.--31. 1. " INTID983 ,Interrupt ID983 Priority/Priority Byte Offset 983 " hexmask.long.byte 0x00 16.--23. 1. " INTID982 ,Interrupt ID982 Priority/Priority Byte Offset 982 " hexmask.long.byte 0x00 8.--15. 1. " INTID981 ,Interrupt ID981 Priority/Priority Byte Offset 981 " hexmask.long.byte 0x00 0.--7. 1. " INTID980 ,Interrupt ID980 Priority/Priority Byte Offset 980 " group.long 0x7D8++0x03 line.long 0x00 "GICD_IPRIORITYR246,Interrupt Priority Register 246" hexmask.long.byte 0x00 24.--31. 1. " INTID987 ,Interrupt ID987 Priority/Priority Byte Offset 987 " hexmask.long.byte 0x00 16.--23. 1. " INTID986 ,Interrupt ID986 Priority/Priority Byte Offset 986 " hexmask.long.byte 0x00 8.--15. 1. " INTID985 ,Interrupt ID985 Priority/Priority Byte Offset 985 " hexmask.long.byte 0x00 0.--7. 1. " INTID984 ,Interrupt ID984 Priority/Priority Byte Offset 984 " group.long 0x7DC++0x03 line.long 0x00 "GICD_IPRIORITYR247,Interrupt Priority Register 247" hexmask.long.byte 0x00 24.--31. 1. " INTID991 ,Interrupt ID991 Priority/Priority Byte Offset 991 " hexmask.long.byte 0x00 16.--23. 1. " INTID990 ,Interrupt ID990 Priority/Priority Byte Offset 990 " hexmask.long.byte 0x00 8.--15. 1. " INTID989 ,Interrupt ID989 Priority/Priority Byte Offset 989 " hexmask.long.byte 0x00 0.--7. 1. " INTID988 ,Interrupt ID988 Priority/Priority Byte Offset 988 " else hgroup.long 0x7C0++0x03 hide.long 0x00 "GICD_IPRIORITYR240,Interrupt Priority Register 240" hgroup.long 0x7C4++0x03 hide.long 0x00 "GICD_IPRIORITYR241,Interrupt Priority Register 241" hgroup.long 0x7C8++0x03 hide.long 0x00 "GICD_IPRIORITYR242,Interrupt Priority Register 242" hgroup.long 0x7CC++0x03 hide.long 0x00 "GICD_IPRIORITYR243,Interrupt Priority Register 243" hgroup.long 0x7D0++0x03 hide.long 0x00 "GICD_IPRIORITYR244,Interrupt Priority Register 244" hgroup.long 0x7D4++0x03 hide.long 0x00 "GICD_IPRIORITYR245,Interrupt Priority Register 245" hgroup.long 0x7D8++0x03 hide.long 0x00 "GICD_IPRIORITYR246,Interrupt Priority Register 246" hgroup.long 0x7DC++0x03 hide.long 0x00 "GICD_IPRIORITYR247,Interrupt Priority Register 247" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x1F) group.long 0x7E0++0x03 line.long 0x00 "GICD_IPRIORITYR248,Interrupt Priority Register 248" hexmask.long.byte 0x00 24.--31. 1. " INTID995 ,Interrupt ID995 Priority/Priority Byte Offset 995 " hexmask.long.byte 0x00 16.--23. 1. " INTID994 ,Interrupt ID994 Priority/Priority Byte Offset 994 " hexmask.long.byte 0x00 8.--15. 1. " INTID993 ,Interrupt ID993 Priority/Priority Byte Offset 993 " hexmask.long.byte 0x00 0.--7. 1. " INTID992 ,Interrupt ID992 Priority/Priority Byte Offset 992 " group.long 0x7E4++0x03 line.long 0x00 "GICD_IPRIORITYR249,Interrupt Priority Register 249" hexmask.long.byte 0x00 24.--31. 1. " INTID999 ,Interrupt ID999 Priority/Priority Byte Offset 999 " hexmask.long.byte 0x00 16.--23. 1. " INTID998 ,Interrupt ID998 Priority/Priority Byte Offset 998 " hexmask.long.byte 0x00 8.--15. 1. " INTID997 ,Interrupt ID997 Priority/Priority Byte Offset 997 " hexmask.long.byte 0x00 0.--7. 1. " INTID996 ,Interrupt ID996 Priority/Priority Byte Offset 996 " group.long 0x7E8++0x03 line.long 0x00 "GICD_IPRIORITYR250,Interrupt Priority Register 250" hexmask.long.byte 0x00 24.--31. 1. " INTID1003 ,Interrupt ID1003 Priority/Priority Byte Offset 1003" hexmask.long.byte 0x00 16.--23. 1. " INTID1002 ,Interrupt ID1002 Priority/Priority Byte Offset 1002" hexmask.long.byte 0x00 8.--15. 1. " INTID1001 ,Interrupt ID1001 Priority/Priority Byte Offset 1001" hexmask.long.byte 0x00 0.--7. 1. " INTID1000 ,Interrupt ID1000 Priority/Priority Byte Offset 1000" group.long 0x7EC++0x03 line.long 0x00 "GICD_IPRIORITYR251,Interrupt Priority Register 251" hexmask.long.byte 0x00 24.--31. 1. " INTID1007 ,Interrupt ID1007 Priority/Priority Byte Offset 1007" hexmask.long.byte 0x00 16.--23. 1. " INTID1006 ,Interrupt ID1006 Priority/Priority Byte Offset 1006" hexmask.long.byte 0x00 8.--15. 1. " INTID1005 ,Interrupt ID1005 Priority/Priority Byte Offset 1005" hexmask.long.byte 0x00 0.--7. 1. " INTID1004 ,Interrupt ID1004 Priority/Priority Byte Offset 1004" group.long 0x7F0++0x03 line.long 0x00 "GICD_IPRIORITYR252,Interrupt Priority Register 252" hexmask.long.byte 0x00 24.--31. 1. " INTID1011 ,Interrupt ID1011 Priority/Priority Byte Offset 1011" hexmask.long.byte 0x00 16.--23. 1. " INTID1010 ,Interrupt ID1010 Priority/Priority Byte Offset 1010" hexmask.long.byte 0x00 8.--15. 1. " INTID1009 ,Interrupt ID1009 Priority/Priority Byte Offset 1009" hexmask.long.byte 0x00 0.--7. 1. " INTID1008 ,Interrupt ID1008 Priority/Priority Byte Offset 1008" group.long 0x7F4++0x03 line.long 0x00 "GICD_IPRIORITYR253,Interrupt Priority Register 253" hexmask.long.byte 0x00 24.--31. 1. " INTID1015 ,Interrupt ID1015 Priority/Priority Byte Offset 1015" hexmask.long.byte 0x00 16.--23. 1. " INTID1014 ,Interrupt ID1014 Priority/Priority Byte Offset 1014" hexmask.long.byte 0x00 8.--15. 1. " INTID1013 ,Interrupt ID1013 Priority/Priority Byte Offset 1013" hexmask.long.byte 0x00 0.--7. 1. " INTID1012 ,Interrupt ID1012 Priority/Priority Byte Offset 1012" group.long 0x7F8++0x03 line.long 0x00 "GICD_IPRIORITYR254,Interrupt Priority Register 254" hexmask.long.byte 0x00 24.--31. 1. " INTID1019 ,Interrupt ID1019 Priority/Priority Byte Offset 1019" hexmask.long.byte 0x00 16.--23. 1. " INTID1018 ,Interrupt ID1018 Priority/Priority Byte Offset 1018" hexmask.long.byte 0x00 8.--15. 1. " INTID1017 ,Interrupt ID1017 Priority/Priority Byte Offset 1017" hexmask.long.byte 0x00 0.--7. 1. " INTID1016 ,Interrupt ID1016 Priority/Priority Byte Offset 1016" else hgroup.long 0x7E0++0x03 hide.long 0x00 "GICD_IPRIORITYR248,Interrupt Priority Register 248" hgroup.long 0x7E4++0x03 hide.long 0x00 "GICD_IPRIORITYR249,Interrupt Priority Register 249" hgroup.long 0x7E8++0x03 hide.long 0x00 "GICD_IPRIORITYR250,Interrupt Priority Register 250" hgroup.long 0x7EC++0x03 hide.long 0x00 "GICD_IPRIORITYR251,Interrupt Priority Register 251" hgroup.long 0x7F0++0x03 hide.long 0x00 "GICD_IPRIORITYR252,Interrupt Priority Register 252" hgroup.long 0x7F4++0x03 hide.long 0x00 "GICD_IPRIORITYR253,Interrupt Priority Register 253" hgroup.long 0x7F8++0x03 hide.long 0x00 "GICD_IPRIORITYR254,Interrupt Priority Register 254" endif tree.end width 19. tree "Processor Targets Registers" if (((per.l(AD:0xF9000000+0x04))&0x000000E0)>0x1) rgroup.long 0x800++0x03 line.long 0x00 "GICD_ITARGETSR0,Interrupt Processor Targets Register 0" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0 " rgroup.long 0x804++0x03 line.long 0x00 "GICD_ITARGETSR1,Interrupt Processor Targets Register 1" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO7 ,CPU Targets Byte Offset 7 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO6 ,CPU Targets Byte Offset 6 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO5 ,CPU Targets Byte Offset 5 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO4 ,CPU Targets Byte Offset 4 " rgroup.long 0x808++0x03 line.long 0x00 "GICD_ITARGETSR2,Interrupt Processor Targets Register 2" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO11 ,CPU Targets Byte Offset 11 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO10 ,CPU Targets Byte Offset 10 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO9 ,CPU Targets Byte Offset 9 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO8 ,CPU Targets Byte Offset 8 " rgroup.long 0x80C++0x03 line.long 0x00 "GICD_ITARGETSR3,Interrupt Processor Targets Register 3" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO15 ,CPU Targets Byte Offset 15 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO14 ,CPU Targets Byte Offset 14 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO13 ,CPU Targets Byte Offset 13 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO12 ,CPU Targets Byte Offset 12 " rgroup.long 0x810++0x03 line.long 0x00 "GICD_ITARGETSR4,Interrupt Processor Targets Register 4" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO19 ,CPU Targets Byte Offset 19 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO18 ,CPU Targets Byte Offset 18 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO17 ,CPU Targets Byte Offset 17 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO16 ,CPU Targets Byte Offset 16 " rgroup.long 0x814++0x03 line.long 0x00 "GICD_ITARGETSR5,Interrupt Processor Targets Register 5" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO23 ,CPU Targets Byte Offset 23 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO22 ,CPU Targets Byte Offset 22 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO21 ,CPU Targets Byte Offset 21 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO20 ,CPU Targets Byte Offset 20 " rgroup.long 0x818++0x03 line.long 0x00 "GICD_ITARGETSR6,Interrupt Processor Targets Register 6" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO27 ,CPU Targets Byte Offset 27 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO26 ,CPU Targets Byte Offset 26 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO25 ,CPU Targets Byte Offset 25 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO24 ,CPU Targets Byte Offset 24 " rgroup.long 0x81C++0x03 line.long 0x00 "GICD_ITARGETSR7,Interrupt Processor Targets Register 7" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO31 ,CPU Targets Byte Offset 31 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO30 ,CPU Targets Byte Offset 30 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO29 ,CPU Targets Byte Offset 29 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO28 ,CPU Targets Byte Offset 28 " if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x01) group.long 0x820++0x03 line.long 0x00 "GICD_ITARGETSR8,Interrupt Processor Targets Register 8" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO35 ,CPU Targets Byte Offset 35 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO34 ,CPU Targets Byte Offset 34 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO33 ,CPU Targets Byte Offset 33 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO32 ,CPU Targets Byte Offset 32 " group.long 0x824++0x03 line.long 0x00 "GICD_ITARGETSR9,Interrupt Processor Targets Register 9" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO39 ,CPU Targets Byte Offset 39 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO38 ,CPU Targets Byte Offset 38 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO37 ,CPU Targets Byte Offset 37 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO36 ,CPU Targets Byte Offset 36 " group.long 0x828++0x03 line.long 0x00 "GICD_ITARGETSR10,Interrupt Processor Targets Register 10" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO43 ,CPU Targets Byte Offset 43 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO42 ,CPU Targets Byte Offset 42 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO41 ,CPU Targets Byte Offset 41 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO40 ,CPU Targets Byte Offset 40 " group.long 0x82C++0x03 line.long 0x00 "GICD_ITARGETSR11,Interrupt Processor Targets Register 11" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO47 ,CPU Targets Byte Offset 47 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO46 ,CPU Targets Byte Offset 46 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO45 ,CPU Targets Byte Offset 45 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO44 ,CPU Targets Byte Offset 44 " group.long 0x830++0x03 line.long 0x00 "GICD_ITARGETSR12,Interrupt Processor Targets Register 12" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO51 ,CPU Targets Byte Offset 51 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO50 ,CPU Targets Byte Offset 50 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO49 ,CPU Targets Byte Offset 49 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO48 ,CPU Targets Byte Offset 48 " group.long 0x834++0x03 line.long 0x00 "GICD_ITARGETSR13,Interrupt Processor Targets Register 13" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO55 ,CPU Targets Byte Offset 55 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO54 ,CPU Targets Byte Offset 54 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO53 ,CPU Targets Byte Offset 53 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO52 ,CPU Targets Byte Offset 52 " group.long 0x838++0x03 line.long 0x00 "GICD_ITARGETSR14,Interrupt Processor Targets Register 14" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO59 ,CPU Targets Byte Offset 59 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO58 ,CPU Targets Byte Offset 58 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO57 ,CPU Targets Byte Offset 57 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO56 ,CPU Targets Byte Offset 56 " group.long 0x83C++0x03 line.long 0x00 "GICD_ITARGETSR15,Interrupt Processor Targets Register 15" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO63 ,CPU Targets Byte Offset 63 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO62 ,CPU Targets Byte Offset 62 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO61 ,CPU Targets Byte Offset 61 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO60 ,CPU Targets Byte Offset 60 " else hgroup.long 0x820++0x03 hide.long 0x00 "GICD_ITARGETSR8,Interrupt Processor Targets Register 8" hgroup.long 0x824++0x03 hide.long 0x00 "GICD_ITARGETSR9,Interrupt Processor Targets Register 9" hgroup.long 0x828++0x03 hide.long 0x00 "GICD_ITARGETSR10,Interrupt Processor Targets Register 10" hgroup.long 0x82C++0x03 hide.long 0x00 "GICD_ITARGETSR11,Interrupt Processor Targets Register 11" hgroup.long 0x830++0x03 hide.long 0x00 "GICD_ITARGETSR12,Interrupt Processor Targets Register 12" hgroup.long 0x834++0x03 hide.long 0x00 "GICD_ITARGETSR13,Interrupt Processor Targets Register 13" hgroup.long 0x838++0x03 hide.long 0x00 "GICD_ITARGETSR14,Interrupt Processor Targets Register 14" hgroup.long 0x83C++0x03 hide.long 0x00 "GICD_ITARGETSR15,Interrupt Processor Targets Register 15" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x02) group.long 0x840++0x03 line.long 0x00 "GICD_ITARGETSR16,Interrupt Processor Targets Register 16" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO67 ,CPU Targets Byte Offset 67 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO66 ,CPU Targets Byte Offset 66 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO65 ,CPU Targets Byte Offset 65 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO64 ,CPU Targets Byte Offset 64 " group.long 0x844++0x03 line.long 0x00 "GICD_ITARGETSR17,Interrupt Processor Targets Register 17" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO71 ,CPU Targets Byte Offset 71 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO70 ,CPU Targets Byte Offset 70 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO69 ,CPU Targets Byte Offset 69 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO68 ,CPU Targets Byte Offset 68 " group.long 0x848++0x03 line.long 0x00 "GICD_ITARGETSR18,Interrupt Processor Targets Register 18" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO75 ,CPU Targets Byte Offset 75 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO74 ,CPU Targets Byte Offset 74 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO73 ,CPU Targets Byte Offset 73 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO72 ,CPU Targets Byte Offset 72 " group.long 0x84C++0x03 line.long 0x00 "GICD_ITARGETSR19,Interrupt Processor Targets Register 19" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO79 ,CPU Targets Byte Offset 79 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO78 ,CPU Targets Byte Offset 78 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO77 ,CPU Targets Byte Offset 77 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO76 ,CPU Targets Byte Offset 76 " group.long 0x850++0x03 line.long 0x00 "GICD_ITARGETSR20,Interrupt Processor Targets Register 20" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO83 ,CPU Targets Byte Offset 83 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO82 ,CPU Targets Byte Offset 82 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO81 ,CPU Targets Byte Offset 81 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO80 ,CPU Targets Byte Offset 80 " group.long 0x854++0x03 line.long 0x00 "GICD_ITARGETSR21,Interrupt Processor Targets Register 21" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO87 ,CPU Targets Byte Offset 87 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO86 ,CPU Targets Byte Offset 86 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO85 ,CPU Targets Byte Offset 85 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO84 ,CPU Targets Byte Offset 84 " group.long 0x858++0x03 line.long 0x00 "GICD_ITARGETSR22,Interrupt Processor Targets Register 22" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO91 ,CPU Targets Byte Offset 91 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO90 ,CPU Targets Byte Offset 90 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO89 ,CPU Targets Byte Offset 89 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO88 ,CPU Targets Byte Offset 88 " group.long 0x85C++0x03 line.long 0x00 "GICD_ITARGETSR23,Interrupt Processor Targets Register 23" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO95 ,CPU Targets Byte Offset 95 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO94 ,CPU Targets Byte Offset 94 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO93 ,CPU Targets Byte Offset 93 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO92 ,CPU Targets Byte Offset 92 " else hgroup.long 0x840++0x03 hide.long 0x00 "GICD_ITARGETSR16,Interrupt Processor Targets Register 16" hgroup.long 0x844++0x03 hide.long 0x00 "GICD_ITARGETSR17,Interrupt Processor Targets Register 17" hgroup.long 0x848++0x03 hide.long 0x00 "GICD_ITARGETSR18,Interrupt Processor Targets Register 18" hgroup.long 0x84C++0x03 hide.long 0x00 "GICD_ITARGETSR19,Interrupt Processor Targets Register 19" hgroup.long 0x850++0x03 hide.long 0x00 "GICD_ITARGETSR20,Interrupt Processor Targets Register 20" hgroup.long 0x854++0x03 hide.long 0x00 "GICD_ITARGETSR21,Interrupt Processor Targets Register 21" hgroup.long 0x858++0x03 hide.long 0x00 "GICD_ITARGETSR22,Interrupt Processor Targets Register 22" hgroup.long 0x85C++0x03 hide.long 0x00 "GICD_ITARGETSR23,Interrupt Processor Targets Register 23" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x03) group.long 0x860++0x03 line.long 0x00 "GICD_ITARGETSR24,Interrupt Processor Targets Register 24" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO99 ,CPU Targets Byte Offset 99 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO98 ,CPU Targets Byte Offset 98 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO97 ,CPU Targets Byte Offset 97 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO96 ,CPU Targets Byte Offset 96 " group.long 0x864++0x03 line.long 0x00 "GICD_ITARGETSR25,Interrupt Processor Targets Register 25" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO103 ,CPU Targets Byte Offset 103 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO102 ,CPU Targets Byte Offset 102 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO101 ,CPU Targets Byte Offset 101 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO100 ,CPU Targets Byte Offset 100 " group.long 0x868++0x03 line.long 0x00 "GICD_ITARGETSR26,Interrupt Processor Targets Register 26" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO107 ,CPU Targets Byte Offset 107 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO106 ,CPU Targets Byte Offset 106 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO105 ,CPU Targets Byte Offset 105 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO104 ,CPU Targets Byte Offset 104 " group.long 0x86C++0x03 line.long 0x00 "GICD_ITARGETSR27,Interrupt Processor Targets Register 27" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO111 ,CPU Targets Byte Offset 111 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO110 ,CPU Targets Byte Offset 110 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO109 ,CPU Targets Byte Offset 109 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO108 ,CPU Targets Byte Offset 108 " group.long 0x870++0x03 line.long 0x00 "GICD_ITARGETSR28,Interrupt Processor Targets Register 28" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO115 ,CPU Targets Byte Offset 115 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO114 ,CPU Targets Byte Offset 114 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO113 ,CPU Targets Byte Offset 113 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO112 ,CPU Targets Byte Offset 112 " group.long 0x874++0x03 line.long 0x00 "GICD_ITARGETSR29,Interrupt Processor Targets Register 29" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO119 ,CPU Targets Byte Offset 119 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO118 ,CPU Targets Byte Offset 118 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO117 ,CPU Targets Byte Offset 117 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO116 ,CPU Targets Byte Offset 116 " group.long 0x878++0x03 line.long 0x00 "GICD_ITARGETSR30,Interrupt Processor Targets Register 30" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO123 ,CPU Targets Byte Offset 123 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO122 ,CPU Targets Byte Offset 122 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO121 ,CPU Targets Byte Offset 121 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO120 ,CPU Targets Byte Offset 120 " group.long 0x87C++0x03 line.long 0x00 "GICD_ITARGETSR31,Interrupt Processor Targets Register 31" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO127 ,CPU Targets Byte Offset 127 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO126 ,CPU Targets Byte Offset 126 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO125 ,CPU Targets Byte Offset 125 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO124 ,CPU Targets Byte Offset 124 " else hgroup.long 0x860++0x03 hide.long 0x00 "GICD_ITARGETSR24,Interrupt Processor Targets Register 24" hgroup.long 0x864++0x03 hide.long 0x00 "GICD_ITARGETSR25,Interrupt Processor Targets Register 25" hgroup.long 0x868++0x03 hide.long 0x00 "GICD_ITARGETSR26,Interrupt Processor Targets Register 26" hgroup.long 0x86C++0x03 hide.long 0x00 "GICD_ITARGETSR27,Interrupt Processor Targets Register 27" hgroup.long 0x870++0x03 hide.long 0x00 "GICD_ITARGETSR28,Interrupt Processor Targets Register 28" hgroup.long 0x874++0x03 hide.long 0x00 "GICD_ITARGETSR29,Interrupt Processor Targets Register 29" hgroup.long 0x878++0x03 hide.long 0x00 "GICD_ITARGETSR30,Interrupt Processor Targets Register 30" hgroup.long 0x87C++0x03 hide.long 0x00 "GICD_ITARGETSR31,Interrupt Processor Targets Register 31" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x04) group.long 0x880++0x03 line.long 0x00 "GICD_ITARGETSR32,Interrupt Processor Targets Register 32" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO131 ,CPU Targets Byte Offset 131 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO130 ,CPU Targets Byte Offset 130 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO129 ,CPU Targets Byte Offset 129 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO128 ,CPU Targets Byte Offset 128 " group.long 0x884++0x03 line.long 0x00 "GICD_ITARGETSR33,Interrupt Processor Targets Register 33" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO135 ,CPU Targets Byte Offset 135 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO134 ,CPU Targets Byte Offset 134 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO133 ,CPU Targets Byte Offset 133 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO132 ,CPU Targets Byte Offset 132 " group.long 0x888++0x03 line.long 0x00 "GICD_ITARGETSR34,Interrupt Processor Targets Register 34" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO139 ,CPU Targets Byte Offset 139 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO138 ,CPU Targets Byte Offset 138 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO137 ,CPU Targets Byte Offset 137 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO136 ,CPU Targets Byte Offset 136 " group.long 0x88C++0x03 line.long 0x00 "GICD_ITARGETSR35,Interrupt Processor Targets Register 35" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO143 ,CPU Targets Byte Offset 143 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO142 ,CPU Targets Byte Offset 142 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO141 ,CPU Targets Byte Offset 141 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO140 ,CPU Targets Byte Offset 140 " group.long 0x890++0x03 line.long 0x00 "GICD_ITARGETSR36,Interrupt Processor Targets Register 36" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO147 ,CPU Targets Byte Offset 147 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO146 ,CPU Targets Byte Offset 146 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO145 ,CPU Targets Byte Offset 145 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO144 ,CPU Targets Byte Offset 144 " group.long 0x894++0x03 line.long 0x00 "GICD_ITARGETSR37,Interrupt Processor Targets Register 37" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO151 ,CPU Targets Byte Offset 151 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO150 ,CPU Targets Byte Offset 150 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO149 ,CPU Targets Byte Offset 149 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO148 ,CPU Targets Byte Offset 148 " group.long 0x898++0x03 line.long 0x00 "GICD_ITARGETSR38,Interrupt Processor Targets Register 38" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO155 ,CPU Targets Byte Offset 155 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO154 ,CPU Targets Byte Offset 154 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO153 ,CPU Targets Byte Offset 153 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO152 ,CPU Targets Byte Offset 152 " group.long 0x89C++0x03 line.long 0x00 "GICD_ITARGETSR39,Interrupt Processor Targets Register 39" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO159 ,CPU Targets Byte Offset 159 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO158 ,CPU Targets Byte Offset 158 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO157 ,CPU Targets Byte Offset 157 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO156 ,CPU Targets Byte Offset 156 " else hgroup.long 0x880++0x03 hide.long 0x00 "GICD_ITARGETSR32,Interrupt Processor Targets Register 32" hgroup.long 0x884++0x03 hide.long 0x00 "GICD_ITARGETSR33,Interrupt Processor Targets Register 33" hgroup.long 0x888++0x03 hide.long 0x00 "GICD_ITARGETSR34,Interrupt Processor Targets Register 34" hgroup.long 0x88C++0x03 hide.long 0x00 "GICD_ITARGETSR35,Interrupt Processor Targets Register 35" hgroup.long 0x890++0x03 hide.long 0x00 "GICD_ITARGETSR36,Interrupt Processor Targets Register 36" hgroup.long 0x894++0x03 hide.long 0x00 "GICD_ITARGETSR37,Interrupt Processor Targets Register 37" hgroup.long 0x898++0x03 hide.long 0x00 "GICD_ITARGETSR38,Interrupt Processor Targets Register 38" hgroup.long 0x89C++0x03 hide.long 0x00 "GICD_ITARGETSR39,Interrupt Processor Targets Register 39" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x05) group.long 0x8A0++0x03 line.long 0x00 "GICD_ITARGETSR40,Interrupt Processor Targets Register 40" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO163 ,CPU Targets Byte Offset 163 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO162 ,CPU Targets Byte Offset 162 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO161 ,CPU Targets Byte Offset 161 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO160 ,CPU Targets Byte Offset 160 " group.long 0x8A4++0x03 line.long 0x00 "GICD_ITARGETSR41,Interrupt Processor Targets Register 41" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO167 ,CPU Targets Byte Offset 167 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO166 ,CPU Targets Byte Offset 166 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO165 ,CPU Targets Byte Offset 165 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO164 ,CPU Targets Byte Offset 164 " group.long 0x8A8++0x03 line.long 0x00 "GICD_ITARGETSR42,Interrupt Processor Targets Register 42" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO171 ,CPU Targets Byte Offset 171 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO170 ,CPU Targets Byte Offset 170 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO169 ,CPU Targets Byte Offset 169 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO168 ,CPU Targets Byte Offset 168 " group.long 0x8AC++0x03 line.long 0x00 "GICD_ITARGETSR43,Interrupt Processor Targets Register 43" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO175 ,CPU Targets Byte Offset 175 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO174 ,CPU Targets Byte Offset 174 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO173 ,CPU Targets Byte Offset 173 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO172 ,CPU Targets Byte Offset 172 " group.long 0x8B0++0x03 line.long 0x00 "GICD_ITARGETSR44,Interrupt Processor Targets Register 44" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO179 ,CPU Targets Byte Offset 179 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO178 ,CPU Targets Byte Offset 178 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO177 ,CPU Targets Byte Offset 177 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO176 ,CPU Targets Byte Offset 176 " group.long 0x8B4++0x03 line.long 0x00 "GICD_ITARGETSR45,Interrupt Processor Targets Register 45" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO183 ,CPU Targets Byte Offset 183 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO182 ,CPU Targets Byte Offset 182 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO181 ,CPU Targets Byte Offset 181 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO180 ,CPU Targets Byte Offset 180 " group.long 0x8B8++0x03 line.long 0x00 "GICD_ITARGETSR46,Interrupt Processor Targets Register 46" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO187 ,CPU Targets Byte Offset 187 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO186 ,CPU Targets Byte Offset 186 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO185 ,CPU Targets Byte Offset 185 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO184 ,CPU Targets Byte Offset 184 " group.long 0x8BC++0x03 line.long 0x00 "GICD_ITARGETSR47,Interrupt Processor Targets Register 47" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO191 ,CPU Targets Byte Offset 191 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO190 ,CPU Targets Byte Offset 190 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO189 ,CPU Targets Byte Offset 189 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO188 ,CPU Targets Byte Offset 188 " else hgroup.long 0x8A0++0x03 hide.long 0x00 "GICD_ITARGETSR40,Interrupt Processor Targets Register 40" hgroup.long 0x8A4++0x03 hide.long 0x00 "GICD_ITARGETSR41,Interrupt Processor Targets Register 41" hgroup.long 0x8A8++0x03 hide.long 0x00 "GICD_ITARGETSR42,Interrupt Processor Targets Register 42" hgroup.long 0x8AC++0x03 hide.long 0x00 "GICD_ITARGETSR43,Interrupt Processor Targets Register 43" hgroup.long 0x8B0++0x03 hide.long 0x00 "GICD_ITARGETSR44,Interrupt Processor Targets Register 44" hgroup.long 0x8B4++0x03 hide.long 0x00 "GICD_ITARGETSR45,Interrupt Processor Targets Register 45" hgroup.long 0x8B8++0x03 hide.long 0x00 "GICD_ITARGETSR46,Interrupt Processor Targets Register 46" hgroup.long 0x8BC++0x03 hide.long 0x00 "GICD_ITARGETSR47,Interrupt Processor Targets Register 47" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x06) group.long 0x8C0++0x03 line.long 0x00 "GICD_ITARGETSR48,Interrupt Processor Targets Register 48" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO195 ,CPU Targets Byte Offset 195 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO194 ,CPU Targets Byte Offset 194 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO193 ,CPU Targets Byte Offset 193 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO192 ,CPU Targets Byte Offset 192 " group.long 0x8C4++0x03 line.long 0x00 "GICD_ITARGETSR49,Interrupt Processor Targets Register 49" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO199 ,CPU Targets Byte Offset 199 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO198 ,CPU Targets Byte Offset 198 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO197 ,CPU Targets Byte Offset 197 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO196 ,CPU Targets Byte Offset 196 " group.long 0x8C8++0x03 line.long 0x00 "GICD_ITARGETSR50,Interrupt Processor Targets Register 50" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO203 ,CPU Targets Byte Offset 203 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO202 ,CPU Targets Byte Offset 202 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO201 ,CPU Targets Byte Offset 201 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO200 ,CPU Targets Byte Offset 200 " group.long 0x8CC++0x03 line.long 0x00 "GICD_ITARGETSR51,Interrupt Processor Targets Register 51" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO207 ,CPU Targets Byte Offset 207 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO206 ,CPU Targets Byte Offset 206 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO205 ,CPU Targets Byte Offset 205 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO204 ,CPU Targets Byte Offset 204 " group.long 0x8D0++0x03 line.long 0x00 "GICD_ITARGETSR52,Interrupt Processor Targets Register 52" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO211 ,CPU Targets Byte Offset 211 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO210 ,CPU Targets Byte Offset 210 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO209 ,CPU Targets Byte Offset 209 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO208 ,CPU Targets Byte Offset 208 " group.long 0x8D4++0x03 line.long 0x00 "GICD_ITARGETSR53,Interrupt Processor Targets Register 53" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO215 ,CPU Targets Byte Offset 215 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO214 ,CPU Targets Byte Offset 214 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO213 ,CPU Targets Byte Offset 213 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO212 ,CPU Targets Byte Offset 212 " group.long 0x8D8++0x03 line.long 0x00 "GICD_ITARGETSR54,Interrupt Processor Targets Register 54" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO219 ,CPU Targets Byte Offset 219 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO218 ,CPU Targets Byte Offset 218 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO217 ,CPU Targets Byte Offset 217 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO216 ,CPU Targets Byte Offset 216 " group.long 0x8DC++0x03 line.long 0x00 "GICD_ITARGETSR55,Interrupt Processor Targets Register 55" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO223 ,CPU Targets Byte Offset 223 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO222 ,CPU Targets Byte Offset 222 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO221 ,CPU Targets Byte Offset 221 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO220 ,CPU Targets Byte Offset 220 " else hgroup.long 0x8C0++0x03 hide.long 0x00 "GICD_ITARGETSR48,Interrupt Processor Targets Register 48" hgroup.long 0x8C4++0x03 hide.long 0x00 "GICD_ITARGETSR49,Interrupt Processor Targets Register 49" hgroup.long 0x8C8++0x03 hide.long 0x00 "GICD_ITARGETSR50,Interrupt Processor Targets Register 50" hgroup.long 0x8CC++0x03 hide.long 0x00 "GICD_ITARGETSR51,Interrupt Processor Targets Register 51" hgroup.long 0x8D0++0x03 hide.long 0x00 "GICD_ITARGETSR52,Interrupt Processor Targets Register 52" hgroup.long 0x8D4++0x03 hide.long 0x00 "GICD_ITARGETSR53,Interrupt Processor Targets Register 53" hgroup.long 0x8D8++0x03 hide.long 0x00 "GICD_ITARGETSR54,Interrupt Processor Targets Register 54" hgroup.long 0x8DC++0x03 hide.long 0x00 "GICD_ITARGETSR55,Interrupt Processor Targets Register 55" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x07) group.long 0x8E0++0x03 line.long 0x00 "GICD_ITARGETSR56,Interrupt Processor Targets Register 56" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO227 ,CPU Targets Byte Offset 227 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO226 ,CPU Targets Byte Offset 226 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO225 ,CPU Targets Byte Offset 225 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO224 ,CPU Targets Byte Offset 224 " group.long 0x8E4++0x03 line.long 0x00 "GICD_ITARGETSR57,Interrupt Processor Targets Register 57" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO231 ,CPU Targets Byte Offset 231 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO230 ,CPU Targets Byte Offset 230 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO229 ,CPU Targets Byte Offset 229 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO228 ,CPU Targets Byte Offset 228 " group.long 0x8E8++0x03 line.long 0x00 "GICD_ITARGETSR58,Interrupt Processor Targets Register 58" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO235 ,CPU Targets Byte Offset 235 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO234 ,CPU Targets Byte Offset 234 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO233 ,CPU Targets Byte Offset 233 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO232 ,CPU Targets Byte Offset 232 " group.long 0x8EC++0x03 line.long 0x00 "GICD_ITARGETSR59,Interrupt Processor Targets Register 59" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO239 ,CPU Targets Byte Offset 239 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO238 ,CPU Targets Byte Offset 238 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO237 ,CPU Targets Byte Offset 237 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO236 ,CPU Targets Byte Offset 236 " group.long 0x8F0++0x03 line.long 0x00 "GICD_ITARGETSR60,Interrupt Processor Targets Register 60" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO243 ,CPU Targets Byte Offset 243 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO242 ,CPU Targets Byte Offset 242 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO241 ,CPU Targets Byte Offset 241 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO240 ,CPU Targets Byte Offset 240 " group.long 0x8F4++0x03 line.long 0x00 "GICD_ITARGETSR61,Interrupt Processor Targets Register 61" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO247 ,CPU Targets Byte Offset 247 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO246 ,CPU Targets Byte Offset 246 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO245 ,CPU Targets Byte Offset 245 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO244 ,CPU Targets Byte Offset 244 " group.long 0x8F8++0x03 line.long 0x00 "GICD_ITARGETSR62,Interrupt Processor Targets Register 62" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO251 ,CPU Targets Byte Offset 251 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO250 ,CPU Targets Byte Offset 250 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO249 ,CPU Targets Byte Offset 249 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO248 ,CPU Targets Byte Offset 248 " group.long 0x8FC++0x03 line.long 0x00 "GICD_ITARGETSR63,Interrupt Processor Targets Register 63" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO255 ,CPU Targets Byte Offset 255 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO254 ,CPU Targets Byte Offset 254 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO253 ,CPU Targets Byte Offset 253 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO252 ,CPU Targets Byte Offset 252 " else hgroup.long 0x8E0++0x03 hide.long 0x00 "GICD_ITARGETSR56,Interrupt Processor Targets Register 56" hgroup.long 0x8E4++0x03 hide.long 0x00 "GICD_ITARGETSR57,Interrupt Processor Targets Register 57" hgroup.long 0x8E8++0x03 hide.long 0x00 "GICD_ITARGETSR58,Interrupt Processor Targets Register 58" hgroup.long 0x8EC++0x03 hide.long 0x00 "GICD_ITARGETSR59,Interrupt Processor Targets Register 59" hgroup.long 0x8F0++0x03 hide.long 0x00 "GICD_ITARGETSR60,Interrupt Processor Targets Register 60" hgroup.long 0x8F4++0x03 hide.long 0x00 "GICD_ITARGETSR61,Interrupt Processor Targets Register 61" hgroup.long 0x8F8++0x03 hide.long 0x00 "GICD_ITARGETSR62,Interrupt Processor Targets Register 62" hgroup.long 0x8FC++0x03 hide.long 0x00 "GICD_ITARGETSR63,Interrupt Processor Targets Register 63" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x08) group.long 0x900++0x03 line.long 0x00 "GICD_ITARGETSR64,Interrupt Processor Targets Register 64" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO259 ,CPU Targets Byte Offset 259 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO258 ,CPU Targets Byte Offset 258 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO257 ,CPU Targets Byte Offset 257 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO256 ,CPU Targets Byte Offset 256 " group.long 0x904++0x03 line.long 0x00 "GICD_ITARGETSR65,Interrupt Processor Targets Register 65" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO263 ,CPU Targets Byte Offset 263 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO262 ,CPU Targets Byte Offset 262 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO261 ,CPU Targets Byte Offset 261 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO260 ,CPU Targets Byte Offset 260 " group.long 0x908++0x03 line.long 0x00 "GICD_ITARGETSR66,Interrupt Processor Targets Register 66" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO267 ,CPU Targets Byte Offset 267 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO266 ,CPU Targets Byte Offset 266 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO265 ,CPU Targets Byte Offset 265 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO264 ,CPU Targets Byte Offset 264 " group.long 0x90C++0x03 line.long 0x00 "GICD_ITARGETSR67,Interrupt Processor Targets Register 67" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO271 ,CPU Targets Byte Offset 271 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO270 ,CPU Targets Byte Offset 270 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO269 ,CPU Targets Byte Offset 269 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO268 ,CPU Targets Byte Offset 268 " group.long 0x910++0x03 line.long 0x00 "GICD_ITARGETSR68,Interrupt Processor Targets Register 68" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO275 ,CPU Targets Byte Offset 275 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO274 ,CPU Targets Byte Offset 274 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO273 ,CPU Targets Byte Offset 273 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO272 ,CPU Targets Byte Offset 272 " group.long 0x914++0x03 line.long 0x00 "GICD_ITARGETSR69,Interrupt Processor Targets Register 69" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO279 ,CPU Targets Byte Offset 279 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO278 ,CPU Targets Byte Offset 278 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO277 ,CPU Targets Byte Offset 277 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO276 ,CPU Targets Byte Offset 276 " group.long 0x918++0x03 line.long 0x00 "GICD_ITARGETSR70,Interrupt Processor Targets Register 70" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO283 ,CPU Targets Byte Offset 283 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO282 ,CPU Targets Byte Offset 282 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO281 ,CPU Targets Byte Offset 281 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO280 ,CPU Targets Byte Offset 280 " group.long 0x91C++0x03 line.long 0x00 "GICD_ITARGETSR71,Interrupt Processor Targets Register 71" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO287 ,CPU Targets Byte Offset 287 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO286 ,CPU Targets Byte Offset 286 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO285 ,CPU Targets Byte Offset 285 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO284 ,CPU Targets Byte Offset 284 " else hgroup.long 0x900++0x03 hide.long 0x00 "GICD_ITARGETSR64,Interrupt Processor Targets Register 64" hgroup.long 0x904++0x03 hide.long 0x00 "GICD_ITARGETSR65,Interrupt Processor Targets Register 65" hgroup.long 0x908++0x03 hide.long 0x00 "GICD_ITARGETSR66,Interrupt Processor Targets Register 66" hgroup.long 0x90C++0x03 hide.long 0x00 "GICD_ITARGETSR67,Interrupt Processor Targets Register 67" hgroup.long 0x910++0x03 hide.long 0x00 "GICD_ITARGETSR68,Interrupt Processor Targets Register 68" hgroup.long 0x914++0x03 hide.long 0x00 "GICD_ITARGETSR69,Interrupt Processor Targets Register 69" hgroup.long 0x918++0x03 hide.long 0x00 "GICD_ITARGETSR70,Interrupt Processor Targets Register 70" hgroup.long 0x91C++0x03 hide.long 0x00 "GICD_ITARGETSR71,Interrupt Processor Targets Register 71" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x09) group.long 0x920++0x03 line.long 0x00 "GICD_ITARGETSR72,Interrupt Processor Targets Register 72" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO291 ,CPU Targets Byte Offset 291 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO290 ,CPU Targets Byte Offset 290 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO289 ,CPU Targets Byte Offset 289 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO288 ,CPU Targets Byte Offset 288 " group.long 0x924++0x03 line.long 0x00 "GICD_ITARGETSR73,Interrupt Processor Targets Register 73" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO295 ,CPU Targets Byte Offset 295 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO294 ,CPU Targets Byte Offset 294 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO293 ,CPU Targets Byte Offset 293 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO292 ,CPU Targets Byte Offset 292 " group.long 0x928++0x03 line.long 0x00 "GICD_ITARGETSR74,Interrupt Processor Targets Register 74" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO299 ,CPU Targets Byte Offset 299 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO298 ,CPU Targets Byte Offset 298 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO297 ,CPU Targets Byte Offset 297 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO296 ,CPU Targets Byte Offset 296 " group.long 0x92C++0x03 line.long 0x00 "GICD_ITARGETSR75,Interrupt Processor Targets Register 75" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO303 ,CPU Targets Byte Offset 303 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO302 ,CPU Targets Byte Offset 302 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO301 ,CPU Targets Byte Offset 301 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO300 ,CPU Targets Byte Offset 300 " group.long 0x930++0x03 line.long 0x00 "GICD_ITARGETSR76,Interrupt Processor Targets Register 76" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO307 ,CPU Targets Byte Offset 307 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO306 ,CPU Targets Byte Offset 306 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO305 ,CPU Targets Byte Offset 305 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO304 ,CPU Targets Byte Offset 304 " group.long 0x934++0x03 line.long 0x00 "GICD_ITARGETSR77,Interrupt Processor Targets Register 77" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO311 ,CPU Targets Byte Offset 311 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO310 ,CPU Targets Byte Offset 310 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO309 ,CPU Targets Byte Offset 309 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO308 ,CPU Targets Byte Offset 308 " group.long 0x938++0x03 line.long 0x00 "GICD_ITARGETSR78,Interrupt Processor Targets Register 78" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO315 ,CPU Targets Byte Offset 315 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO314 ,CPU Targets Byte Offset 314 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO313 ,CPU Targets Byte Offset 313 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO312 ,CPU Targets Byte Offset 312 " group.long 0x93C++0x03 line.long 0x00 "GICD_ITARGETSR79,Interrupt Processor Targets Register 79" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO319 ,CPU Targets Byte Offset 319 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO318 ,CPU Targets Byte Offset 318 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO317 ,CPU Targets Byte Offset 317 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO316 ,CPU Targets Byte Offset 316 " else hgroup.long 0x920++0x03 hide.long 0x00 "GICD_ITARGETSR72,Interrupt Processor Targets Register 72" hgroup.long 0x924++0x03 hide.long 0x00 "GICD_ITARGETSR73,Interrupt Processor Targets Register 73" hgroup.long 0x928++0x03 hide.long 0x00 "GICD_ITARGETSR74,Interrupt Processor Targets Register 74" hgroup.long 0x92C++0x03 hide.long 0x00 "GICD_ITARGETSR75,Interrupt Processor Targets Register 75" hgroup.long 0x930++0x03 hide.long 0x00 "GICD_ITARGETSR76,Interrupt Processor Targets Register 76" hgroup.long 0x934++0x03 hide.long 0x00 "GICD_ITARGETSR77,Interrupt Processor Targets Register 77" hgroup.long 0x938++0x03 hide.long 0x00 "GICD_ITARGETSR78,Interrupt Processor Targets Register 78" hgroup.long 0x93C++0x03 hide.long 0x00 "GICD_ITARGETSR79,Interrupt Processor Targets Register 79" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x0A) group.long 0x940++0x03 line.long 0x00 "GICD_ITARGETSR80,Interrupt Processor Targets Register 80" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO323 ,CPU Targets Byte Offset 323 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO322 ,CPU Targets Byte Offset 322 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO321 ,CPU Targets Byte Offset 321 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO320 ,CPU Targets Byte Offset 320 " group.long 0x944++0x03 line.long 0x00 "GICD_ITARGETSR81,Interrupt Processor Targets Register 81" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO327 ,CPU Targets Byte Offset 327 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO326 ,CPU Targets Byte Offset 326 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO325 ,CPU Targets Byte Offset 325 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO324 ,CPU Targets Byte Offset 324 " group.long 0x948++0x03 line.long 0x00 "GICD_ITARGETSR82,Interrupt Processor Targets Register 82" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO331 ,CPU Targets Byte Offset 331 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO330 ,CPU Targets Byte Offset 330 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO329 ,CPU Targets Byte Offset 329 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO328 ,CPU Targets Byte Offset 328 " group.long 0x94C++0x03 line.long 0x00 "GICD_ITARGETSR83,Interrupt Processor Targets Register 83" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO335 ,CPU Targets Byte Offset 335 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO334 ,CPU Targets Byte Offset 334 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO333 ,CPU Targets Byte Offset 333 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO332 ,CPU Targets Byte Offset 332 " group.long 0x950++0x03 line.long 0x00 "GICD_ITARGETSR84,Interrupt Processor Targets Register 84" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO339 ,CPU Targets Byte Offset 339 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO338 ,CPU Targets Byte Offset 338 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO337 ,CPU Targets Byte Offset 337 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO336 ,CPU Targets Byte Offset 336 " group.long 0x954++0x03 line.long 0x00 "GICD_ITARGETSR85,Interrupt Processor Targets Register 85" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO343 ,CPU Targets Byte Offset 343 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO342 ,CPU Targets Byte Offset 342 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO341 ,CPU Targets Byte Offset 341 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO340 ,CPU Targets Byte Offset 340 " group.long 0x958++0x03 line.long 0x00 "GICD_ITARGETSR86,Interrupt Processor Targets Register 86" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO347 ,CPU Targets Byte Offset 347 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO346 ,CPU Targets Byte Offset 346 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO345 ,CPU Targets Byte Offset 345 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO344 ,CPU Targets Byte Offset 344 " group.long 0x95C++0x03 line.long 0x00 "GICD_ITARGETSR87,Interrupt Processor Targets Register 87" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO351 ,CPU Targets Byte Offset 351 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO350 ,CPU Targets Byte Offset 350 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO349 ,CPU Targets Byte Offset 349 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO348 ,CPU Targets Byte Offset 348 " else hgroup.long 0x940++0x03 hide.long 0x00 "GICD_ITARGETSR80,Interrupt Processor Targets Register 80" hgroup.long 0x944++0x03 hide.long 0x00 "GICD_ITARGETSR81,Interrupt Processor Targets Register 81" hgroup.long 0x948++0x03 hide.long 0x00 "GICD_ITARGETSR82,Interrupt Processor Targets Register 82" hgroup.long 0x94C++0x03 hide.long 0x00 "GICD_ITARGETSR83,Interrupt Processor Targets Register 83" hgroup.long 0x950++0x03 hide.long 0x00 "GICD_ITARGETSR84,Interrupt Processor Targets Register 84" hgroup.long 0x954++0x03 hide.long 0x00 "GICD_ITARGETSR85,Interrupt Processor Targets Register 85" hgroup.long 0x958++0x03 hide.long 0x00 "GICD_ITARGETSR86,Interrupt Processor Targets Register 86" hgroup.long 0x95C++0x03 hide.long 0x00 "GICD_ITARGETSR87,Interrupt Processor Targets Register 87" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x0B) group.long 0x960++0x03 line.long 0x00 "GICD_ITARGETSR88,Interrupt Processor Targets Register 88" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO355 ,CPU Targets Byte Offset 355 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO354 ,CPU Targets Byte Offset 354 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO353 ,CPU Targets Byte Offset 353 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO352 ,CPU Targets Byte Offset 352 " group.long 0x964++0x03 line.long 0x00 "GICD_ITARGETSR89,Interrupt Processor Targets Register 89" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO359 ,CPU Targets Byte Offset 359 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO358 ,CPU Targets Byte Offset 358 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO357 ,CPU Targets Byte Offset 357 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO356 ,CPU Targets Byte Offset 356 " group.long 0x968++0x03 line.long 0x00 "GICD_ITARGETSR90,Interrupt Processor Targets Register 90" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO363 ,CPU Targets Byte Offset 363 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO362 ,CPU Targets Byte Offset 362 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO361 ,CPU Targets Byte Offset 361 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO360 ,CPU Targets Byte Offset 360 " group.long 0x96C++0x03 line.long 0x00 "GICD_ITARGETSR91,Interrupt Processor Targets Register 91" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO367 ,CPU Targets Byte Offset 367 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO366 ,CPU Targets Byte Offset 366 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO365 ,CPU Targets Byte Offset 365 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO364 ,CPU Targets Byte Offset 364 " group.long 0x970++0x03 line.long 0x00 "GICD_ITARGETSR92,Interrupt Processor Targets Register 92" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO371 ,CPU Targets Byte Offset 371 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO370 ,CPU Targets Byte Offset 370 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO369 ,CPU Targets Byte Offset 369 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO368 ,CPU Targets Byte Offset 368 " group.long 0x974++0x03 line.long 0x00 "GICD_ITARGETSR93,Interrupt Processor Targets Register 93" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO375 ,CPU Targets Byte Offset 375 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO374 ,CPU Targets Byte Offset 374 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO373 ,CPU Targets Byte Offset 373 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO372 ,CPU Targets Byte Offset 372 " group.long 0x978++0x03 line.long 0x00 "GICD_ITARGETSR94,Interrupt Processor Targets Register 94" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO379 ,CPU Targets Byte Offset 379 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO378 ,CPU Targets Byte Offset 378 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO377 ,CPU Targets Byte Offset 377 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO376 ,CPU Targets Byte Offset 376 " group.long 0x97C++0x03 line.long 0x00 "GICD_ITARGETSR95,Interrupt Processor Targets Register 95" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO383 ,CPU Targets Byte Offset 383 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO382 ,CPU Targets Byte Offset 382 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO381 ,CPU Targets Byte Offset 381 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO380 ,CPU Targets Byte Offset 380 " else hgroup.long 0x960++0x03 hide.long 0x00 "GICD_ITARGETSR88,Interrupt Processor Targets Register 88" hgroup.long 0x964++0x03 hide.long 0x00 "GICD_ITARGETSR89,Interrupt Processor Targets Register 89" hgroup.long 0x968++0x03 hide.long 0x00 "GICD_ITARGETSR90,Interrupt Processor Targets Register 90" hgroup.long 0x96C++0x03 hide.long 0x00 "GICD_ITARGETSR91,Interrupt Processor Targets Register 91" hgroup.long 0x970++0x03 hide.long 0x00 "GICD_ITARGETSR92,Interrupt Processor Targets Register 92" hgroup.long 0x974++0x03 hide.long 0x00 "GICD_ITARGETSR93,Interrupt Processor Targets Register 93" hgroup.long 0x978++0x03 hide.long 0x00 "GICD_ITARGETSR94,Interrupt Processor Targets Register 94" hgroup.long 0x97C++0x03 hide.long 0x00 "GICD_ITARGETSR95,Interrupt Processor Targets Register 95" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x0C) group.long 0x980++0x03 line.long 0x00 "GICD_ITARGETSR96,Interrupt Processor Targets Register 96" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO387 ,CPU Targets Byte Offset 387 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO386 ,CPU Targets Byte Offset 386 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO385 ,CPU Targets Byte Offset 385 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO384 ,CPU Targets Byte Offset 384 " group.long 0x984++0x03 line.long 0x00 "GICD_ITARGETSR97,Interrupt Processor Targets Register 97" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO391 ,CPU Targets Byte Offset 391 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO390 ,CPU Targets Byte Offset 390 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO389 ,CPU Targets Byte Offset 389 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO388 ,CPU Targets Byte Offset 388 " group.long 0x988++0x03 line.long 0x00 "GICD_ITARGETSR98,Interrupt Processor Targets Register 98" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO395 ,CPU Targets Byte Offset 395 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO394 ,CPU Targets Byte Offset 394 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO393 ,CPU Targets Byte Offset 393 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO392 ,CPU Targets Byte Offset 392 " group.long 0x98C++0x03 line.long 0x00 "GICD_ITARGETSR99,Interrupt Processor Targets Register 99" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO399 ,CPU Targets Byte Offset 399 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO398 ,CPU Targets Byte Offset 398 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO397 ,CPU Targets Byte Offset 397 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO396 ,CPU Targets Byte Offset 396 " group.long 0x990++0x03 line.long 0x00 "GICD_ITARGETSR100,Interrupt Processor Targets Register 100" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO403 ,CPU Targets Byte Offset 403 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO402 ,CPU Targets Byte Offset 402 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO401 ,CPU Targets Byte Offset 401 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO400 ,CPU Targets Byte Offset 400 " group.long 0x994++0x03 line.long 0x00 "GICD_ITARGETSR101,Interrupt Processor Targets Register 101" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO407 ,CPU Targets Byte Offset 407 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO406 ,CPU Targets Byte Offset 406 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO405 ,CPU Targets Byte Offset 405 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO404 ,CPU Targets Byte Offset 404 " group.long 0x998++0x03 line.long 0x00 "GICD_ITARGETSR102,Interrupt Processor Targets Register 102" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO411 ,CPU Targets Byte Offset 411 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO410 ,CPU Targets Byte Offset 410 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO409 ,CPU Targets Byte Offset 409 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO408 ,CPU Targets Byte Offset 408 " group.long 0x99C++0x03 line.long 0x00 "GICD_ITARGETSR103,Interrupt Processor Targets Register 103" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO415 ,CPU Targets Byte Offset 415 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO414 ,CPU Targets Byte Offset 414 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO413 ,CPU Targets Byte Offset 413 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO412 ,CPU Targets Byte Offset 412 " else hgroup.long 0x980++0x03 hide.long 0x00 "GICD_ITARGETSR96,Interrupt Processor Targets Register 96" hgroup.long 0x984++0x03 hide.long 0x00 "GICD_ITARGETSR97,Interrupt Processor Targets Register 97" hgroup.long 0x988++0x03 hide.long 0x00 "GICD_ITARGETSR98,Interrupt Processor Targets Register 98" hgroup.long 0x98C++0x03 hide.long 0x00 "GICD_ITARGETSR99,Interrupt Processor Targets Register 99" hgroup.long 0x990++0x03 hide.long 0x00 "GICD_ITARGETSR100,Interrupt Processor Targets Register 100" hgroup.long 0x994++0x03 hide.long 0x00 "GICD_ITARGETSR101,Interrupt Processor Targets Register 101" hgroup.long 0x998++0x03 hide.long 0x00 "GICD_ITARGETSR102,Interrupt Processor Targets Register 102" hgroup.long 0x99C++0x03 hide.long 0x00 "GICD_ITARGETSR103,Interrupt Processor Targets Register 103" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x0D) group.long 0x9A0++0x03 line.long 0x00 "GICD_ITARGETSR104,Interrupt Processor Targets Register 104" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO419 ,CPU Targets Byte Offset 419 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO418 ,CPU Targets Byte Offset 418 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO417 ,CPU Targets Byte Offset 417 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO416 ,CPU Targets Byte Offset 416 " group.long 0x9A4++0x03 line.long 0x00 "GICD_ITARGETSR105,Interrupt Processor Targets Register 105" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO423 ,CPU Targets Byte Offset 423 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO422 ,CPU Targets Byte Offset 422 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO421 ,CPU Targets Byte Offset 421 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO420 ,CPU Targets Byte Offset 420 " group.long 0x9A8++0x03 line.long 0x00 "GICD_ITARGETSR106,Interrupt Processor Targets Register 106" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO427 ,CPU Targets Byte Offset 427 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO426 ,CPU Targets Byte Offset 426 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO425 ,CPU Targets Byte Offset 425 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO424 ,CPU Targets Byte Offset 424 " group.long 0x9AC++0x03 line.long 0x00 "GICD_ITARGETSR107,Interrupt Processor Targets Register 107" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO431 ,CPU Targets Byte Offset 431 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO430 ,CPU Targets Byte Offset 430 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO429 ,CPU Targets Byte Offset 429 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO428 ,CPU Targets Byte Offset 428 " group.long 0x9B0++0x03 line.long 0x00 "GICD_ITARGETSR108,Interrupt Processor Targets Register 108" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO435 ,CPU Targets Byte Offset 435 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO434 ,CPU Targets Byte Offset 434 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO433 ,CPU Targets Byte Offset 433 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO432 ,CPU Targets Byte Offset 432 " group.long 0x9B4++0x03 line.long 0x00 "GICD_ITARGETSR109,Interrupt Processor Targets Register 109" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO439 ,CPU Targets Byte Offset 439 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO438 ,CPU Targets Byte Offset 438 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO437 ,CPU Targets Byte Offset 437 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO436 ,CPU Targets Byte Offset 436 " group.long 0x9B8++0x03 line.long 0x00 "GICD_ITARGETSR110,Interrupt Processor Targets Register 110" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO443 ,CPU Targets Byte Offset 443 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO442 ,CPU Targets Byte Offset 442 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO441 ,CPU Targets Byte Offset 441 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO440 ,CPU Targets Byte Offset 440 " group.long 0x9BC++0x03 line.long 0x00 "GICD_ITARGETSR111,Interrupt Processor Targets Register 111" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO447 ,CPU Targets Byte Offset 447 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO446 ,CPU Targets Byte Offset 446 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO445 ,CPU Targets Byte Offset 445 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO444 ,CPU Targets Byte Offset 444 " else hgroup.long 0x9A0++0x03 hide.long 0x00 "GICD_ITARGETSR104,Interrupt Processor Targets Register 104" hgroup.long 0x9A4++0x03 hide.long 0x00 "GICD_ITARGETSR105,Interrupt Processor Targets Register 105" hgroup.long 0x9A8++0x03 hide.long 0x00 "GICD_ITARGETSR106,Interrupt Processor Targets Register 106" hgroup.long 0x9AC++0x03 hide.long 0x00 "GICD_ITARGETSR107,Interrupt Processor Targets Register 107" hgroup.long 0x9B0++0x03 hide.long 0x00 "GICD_ITARGETSR108,Interrupt Processor Targets Register 108" hgroup.long 0x9B4++0x03 hide.long 0x00 "GICD_ITARGETSR109,Interrupt Processor Targets Register 109" hgroup.long 0x9B8++0x03 hide.long 0x00 "GICD_ITARGETSR110,Interrupt Processor Targets Register 110" hgroup.long 0x9BC++0x03 hide.long 0x00 "GICD_ITARGETSR111,Interrupt Processor Targets Register 111" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x0E) group.long 0x9C0++0x03 line.long 0x00 "GICD_ITARGETSR112,Interrupt Processor Targets Register 112" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO451 ,CPU Targets Byte Offset 451 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO450 ,CPU Targets Byte Offset 450 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO449 ,CPU Targets Byte Offset 449 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO448 ,CPU Targets Byte Offset 448 " group.long 0x9C4++0x03 line.long 0x00 "GICD_ITARGETSR113,Interrupt Processor Targets Register 113" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO455 ,CPU Targets Byte Offset 455 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO454 ,CPU Targets Byte Offset 454 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO453 ,CPU Targets Byte Offset 453 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO452 ,CPU Targets Byte Offset 452 " group.long 0x9C8++0x03 line.long 0x00 "GICD_ITARGETSR114,Interrupt Processor Targets Register 114" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO459 ,CPU Targets Byte Offset 459 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO458 ,CPU Targets Byte Offset 458 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO457 ,CPU Targets Byte Offset 457 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO456 ,CPU Targets Byte Offset 456 " group.long 0x9CC++0x03 line.long 0x00 "GICD_ITARGETSR115,Interrupt Processor Targets Register 115" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO463 ,CPU Targets Byte Offset 463 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO462 ,CPU Targets Byte Offset 462 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO461 ,CPU Targets Byte Offset 461 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO460 ,CPU Targets Byte Offset 460 " group.long 0x9D0++0x03 line.long 0x00 "GICD_ITARGETSR116,Interrupt Processor Targets Register 116" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO467 ,CPU Targets Byte Offset 467 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO466 ,CPU Targets Byte Offset 466 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO465 ,CPU Targets Byte Offset 465 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO464 ,CPU Targets Byte Offset 464 " group.long 0x9D4++0x03 line.long 0x00 "GICD_ITARGETSR117,Interrupt Processor Targets Register 117" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO471 ,CPU Targets Byte Offset 471 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO470 ,CPU Targets Byte Offset 470 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO469 ,CPU Targets Byte Offset 469 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO468 ,CPU Targets Byte Offset 468 " group.long 0x9D8++0x03 line.long 0x00 "GICD_ITARGETSR118,Interrupt Processor Targets Register 118" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO475 ,CPU Targets Byte Offset 475 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO474 ,CPU Targets Byte Offset 474 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO473 ,CPU Targets Byte Offset 473 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO472 ,CPU Targets Byte Offset 472 " group.long 0x9DC++0x03 line.long 0x00 "GICD_ITARGETSR119,Interrupt Processor Targets Register 119" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO479 ,CPU Targets Byte Offset 479 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO478 ,CPU Targets Byte Offset 478 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO477 ,CPU Targets Byte Offset 477 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO476 ,CPU Targets Byte Offset 476 " else hgroup.long 0x9C0++0x03 hide.long 0x00 "GICD_ITARGETSR112,Interrupt Processor Targets Register 112" hgroup.long 0x9C4++0x03 hide.long 0x00 "GICD_ITARGETSR113,Interrupt Processor Targets Register 113" hgroup.long 0x9C8++0x03 hide.long 0x00 "GICD_ITARGETSR114,Interrupt Processor Targets Register 114" hgroup.long 0x9CC++0x03 hide.long 0x00 "GICD_ITARGETSR115,Interrupt Processor Targets Register 115" hgroup.long 0x9D0++0x03 hide.long 0x00 "GICD_ITARGETSR116,Interrupt Processor Targets Register 116" hgroup.long 0x9D4++0x03 hide.long 0x00 "GICD_ITARGETSR117,Interrupt Processor Targets Register 117" hgroup.long 0x9D8++0x03 hide.long 0x00 "GICD_ITARGETSR118,Interrupt Processor Targets Register 118" hgroup.long 0x9DC++0x03 hide.long 0x00 "GICD_ITARGETSR119,Interrupt Processor Targets Register 119" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x0F) group.long 0x9E0++0x03 line.long 0x00 "GICD_ITARGETSR120,Interrupt Processor Targets Register 120" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO483 ,CPU Targets Byte Offset 483 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO482 ,CPU Targets Byte Offset 482 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO481 ,CPU Targets Byte Offset 481 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO480 ,CPU Targets Byte Offset 480 " group.long 0x9E4++0x03 line.long 0x00 "GICD_ITARGETSR121,Interrupt Processor Targets Register 121" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO487 ,CPU Targets Byte Offset 487 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO486 ,CPU Targets Byte Offset 486 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO485 ,CPU Targets Byte Offset 485 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO484 ,CPU Targets Byte Offset 484 " group.long 0x9E8++0x03 line.long 0x00 "GICD_ITARGETSR122,Interrupt Processor Targets Register 122" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO491 ,CPU Targets Byte Offset 491 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO490 ,CPU Targets Byte Offset 490 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO489 ,CPU Targets Byte Offset 489 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO488 ,CPU Targets Byte Offset 488 " group.long 0x9EC++0x03 line.long 0x00 "GICD_ITARGETSR123,Interrupt Processor Targets Register 123" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO495 ,CPU Targets Byte Offset 495 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO494 ,CPU Targets Byte Offset 494 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO493 ,CPU Targets Byte Offset 493 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO492 ,CPU Targets Byte Offset 492 " group.long 0x9F0++0x03 line.long 0x00 "GICD_ITARGETSR124,Interrupt Processor Targets Register 124" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO499 ,CPU Targets Byte Offset 499 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO498 ,CPU Targets Byte Offset 498 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO497 ,CPU Targets Byte Offset 497 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO496 ,CPU Targets Byte Offset 496 " group.long 0x9F4++0x03 line.long 0x00 "GICD_ITARGETSR125,Interrupt Processor Targets Register 125" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO503 ,CPU Targets Byte Offset 503 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO502 ,CPU Targets Byte Offset 502 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO501 ,CPU Targets Byte Offset 501 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO500 ,CPU Targets Byte Offset 500 " group.long 0x9F8++0x03 line.long 0x00 "GICD_ITARGETSR126,Interrupt Processor Targets Register 126" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO507 ,CPU Targets Byte Offset 507 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO506 ,CPU Targets Byte Offset 506 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO505 ,CPU Targets Byte Offset 505 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO504 ,CPU Targets Byte Offset 504 " group.long 0x9FC++0x03 line.long 0x00 "GICD_ITARGETSR127,Interrupt Processor Targets Register 127" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO511 ,CPU Targets Byte Offset 511 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO510 ,CPU Targets Byte Offset 510 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO509 ,CPU Targets Byte Offset 509 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO508 ,CPU Targets Byte Offset 508 " else hgroup.long 0x9E0++0x03 hide.long 0x00 "GICD_ITARGETSR120,Interrupt Processor Targets Register 120" hgroup.long 0x9E4++0x03 hide.long 0x00 "GICD_ITARGETSR121,Interrupt Processor Targets Register 121" hgroup.long 0x9E8++0x03 hide.long 0x00 "GICD_ITARGETSR122,Interrupt Processor Targets Register 122" hgroup.long 0x9EC++0x03 hide.long 0x00 "GICD_ITARGETSR123,Interrupt Processor Targets Register 123" hgroup.long 0x9F0++0x03 hide.long 0x00 "GICD_ITARGETSR124,Interrupt Processor Targets Register 124" hgroup.long 0x9F4++0x03 hide.long 0x00 "GICD_ITARGETSR125,Interrupt Processor Targets Register 125" hgroup.long 0x9F8++0x03 hide.long 0x00 "GICD_ITARGETSR126,Interrupt Processor Targets Register 126" hgroup.long 0x9FC++0x03 hide.long 0x00 "GICD_ITARGETSR127,Interrupt Processor Targets Register 127" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x10) group.long 0xA00++0x03 line.long 0x00 "GICD_ITARGETSR128,Interrupt Processor Targets Register 128" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO515 ,CPU Targets Byte Offset 515 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO514 ,CPU Targets Byte Offset 514 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO513 ,CPU Targets Byte Offset 513 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO512 ,CPU Targets Byte Offset 512 " group.long 0xA04++0x03 line.long 0x00 "GICD_ITARGETSR129,Interrupt Processor Targets Register 129" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO519 ,CPU Targets Byte Offset 519 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO518 ,CPU Targets Byte Offset 518 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO517 ,CPU Targets Byte Offset 517 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO516 ,CPU Targets Byte Offset 516 " group.long 0xA08++0x03 line.long 0x00 "GICD_ITARGETSR130,Interrupt Processor Targets Register 130" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO523 ,CPU Targets Byte Offset 523 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO522 ,CPU Targets Byte Offset 522 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO521 ,CPU Targets Byte Offset 521 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO520 ,CPU Targets Byte Offset 520 " group.long 0xA0C++0x03 line.long 0x00 "GICD_ITARGETSR131,Interrupt Processor Targets Register 131" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO527 ,CPU Targets Byte Offset 527 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO526 ,CPU Targets Byte Offset 526 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO525 ,CPU Targets Byte Offset 525 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO524 ,CPU Targets Byte Offset 524 " group.long 0xA10++0x03 line.long 0x00 "GICD_ITARGETSR132,Interrupt Processor Targets Register 132" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO531 ,CPU Targets Byte Offset 531 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO530 ,CPU Targets Byte Offset 530 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO529 ,CPU Targets Byte Offset 529 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO528 ,CPU Targets Byte Offset 528 " group.long 0xA14++0x03 line.long 0x00 "GICD_ITARGETSR133,Interrupt Processor Targets Register 133" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO535 ,CPU Targets Byte Offset 535 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO534 ,CPU Targets Byte Offset 534 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO533 ,CPU Targets Byte Offset 533 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO532 ,CPU Targets Byte Offset 532 " group.long 0xA18++0x03 line.long 0x00 "GICD_ITARGETSR134,Interrupt Processor Targets Register 134" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO539 ,CPU Targets Byte Offset 539 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO538 ,CPU Targets Byte Offset 538 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO537 ,CPU Targets Byte Offset 537 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO536 ,CPU Targets Byte Offset 536 " group.long 0xA1C++0x03 line.long 0x00 "GICD_ITARGETSR135,Interrupt Processor Targets Register 135" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO543 ,CPU Targets Byte Offset 543 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO542 ,CPU Targets Byte Offset 542 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO541 ,CPU Targets Byte Offset 541 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO540 ,CPU Targets Byte Offset 540 " else hgroup.long 0xA00++0x03 hide.long 0x00 "GICD_ITARGETSR128,Interrupt Processor Targets Register 128" hgroup.long 0xA04++0x03 hide.long 0x00 "GICD_ITARGETSR129,Interrupt Processor Targets Register 129" hgroup.long 0xA08++0x03 hide.long 0x00 "GICD_ITARGETSR130,Interrupt Processor Targets Register 130" hgroup.long 0xA0C++0x03 hide.long 0x00 "GICD_ITARGETSR131,Interrupt Processor Targets Register 131" hgroup.long 0xA10++0x03 hide.long 0x00 "GICD_ITARGETSR132,Interrupt Processor Targets Register 132" hgroup.long 0xA14++0x03 hide.long 0x00 "GICD_ITARGETSR133,Interrupt Processor Targets Register 133" hgroup.long 0xA18++0x03 hide.long 0x00 "GICD_ITARGETSR134,Interrupt Processor Targets Register 134" hgroup.long 0xA1C++0x03 hide.long 0x00 "GICD_ITARGETSR135,Interrupt Processor Targets Register 135" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x11) group.long 0xA20++0x03 line.long 0x00 "GICD_ITARGETSR136,Interrupt Processor Targets Register 136" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO547 ,CPU Targets Byte Offset 547 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO546 ,CPU Targets Byte Offset 546 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO545 ,CPU Targets Byte Offset 545 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO544 ,CPU Targets Byte Offset 544 " group.long 0xA24++0x03 line.long 0x00 "GICD_ITARGETSR137,Interrupt Processor Targets Register 137" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO551 ,CPU Targets Byte Offset 551 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO550 ,CPU Targets Byte Offset 550 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO549 ,CPU Targets Byte Offset 549 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO548 ,CPU Targets Byte Offset 548 " group.long 0xA28++0x03 line.long 0x00 "GICD_ITARGETSR138,Interrupt Processor Targets Register 138" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO555 ,CPU Targets Byte Offset 555 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO554 ,CPU Targets Byte Offset 554 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO553 ,CPU Targets Byte Offset 553 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO552 ,CPU Targets Byte Offset 552 " group.long 0xA2C++0x03 line.long 0x00 "GICD_ITARGETSR139,Interrupt Processor Targets Register 139" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO559 ,CPU Targets Byte Offset 559 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO558 ,CPU Targets Byte Offset 558 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO557 ,CPU Targets Byte Offset 557 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO556 ,CPU Targets Byte Offset 556 " group.long 0xA30++0x03 line.long 0x00 "GICD_ITARGETSR140,Interrupt Processor Targets Register 140" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO563 ,CPU Targets Byte Offset 563 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO562 ,CPU Targets Byte Offset 562 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO561 ,CPU Targets Byte Offset 561 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO560 ,CPU Targets Byte Offset 560 " group.long 0xA34++0x03 line.long 0x00 "GICD_ITARGETSR141,Interrupt Processor Targets Register 141" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO567 ,CPU Targets Byte Offset 567 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO566 ,CPU Targets Byte Offset 566 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO565 ,CPU Targets Byte Offset 565 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO564 ,CPU Targets Byte Offset 564 " group.long 0xA38++0x03 line.long 0x00 "GICD_ITARGETSR142,Interrupt Processor Targets Register 142" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO571 ,CPU Targets Byte Offset 571 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO570 ,CPU Targets Byte Offset 570 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO569 ,CPU Targets Byte Offset 569 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO568 ,CPU Targets Byte Offset 568 " group.long 0xA3C++0x03 line.long 0x00 "GICD_ITARGETSR143,Interrupt Processor Targets Register 143" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO575 ,CPU Targets Byte Offset 575 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO574 ,CPU Targets Byte Offset 574 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO573 ,CPU Targets Byte Offset 573 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO572 ,CPU Targets Byte Offset 572 " else hgroup.long 0xA20++0x03 hide.long 0x00 "GICD_ITARGETSR136,Interrupt Processor Targets Register 136" hgroup.long 0xA24++0x03 hide.long 0x00 "GICD_ITARGETSR137,Interrupt Processor Targets Register 137" hgroup.long 0xA28++0x03 hide.long 0x00 "GICD_ITARGETSR138,Interrupt Processor Targets Register 138" hgroup.long 0xA2C++0x03 hide.long 0x00 "GICD_ITARGETSR139,Interrupt Processor Targets Register 139" hgroup.long 0xA30++0x03 hide.long 0x00 "GICD_ITARGETSR140,Interrupt Processor Targets Register 140" hgroup.long 0xA34++0x03 hide.long 0x00 "GICD_ITARGETSR141,Interrupt Processor Targets Register 141" hgroup.long 0xA38++0x03 hide.long 0x00 "GICD_ITARGETSR142,Interrupt Processor Targets Register 142" hgroup.long 0xA3C++0x03 hide.long 0x00 "GICD_ITARGETSR143,Interrupt Processor Targets Register 143" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x12) group.long 0xA40++0x03 line.long 0x00 "GICD_ITARGETSR144,Interrupt Processor Targets Register 144" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO579 ,CPU Targets Byte Offset 579 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO578 ,CPU Targets Byte Offset 578 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO577 ,CPU Targets Byte Offset 577 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO576 ,CPU Targets Byte Offset 576 " group.long 0xA44++0x03 line.long 0x00 "GICD_ITARGETSR145,Interrupt Processor Targets Register 145" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO583 ,CPU Targets Byte Offset 583 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO582 ,CPU Targets Byte Offset 582 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO581 ,CPU Targets Byte Offset 581 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO580 ,CPU Targets Byte Offset 580 " group.long 0xA48++0x03 line.long 0x00 "GICD_ITARGETSR146,Interrupt Processor Targets Register 146" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO587 ,CPU Targets Byte Offset 587 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO586 ,CPU Targets Byte Offset 586 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO585 ,CPU Targets Byte Offset 585 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO584 ,CPU Targets Byte Offset 584 " group.long 0xA4C++0x03 line.long 0x00 "GICD_ITARGETSR147,Interrupt Processor Targets Register 147" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO591 ,CPU Targets Byte Offset 591 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO590 ,CPU Targets Byte Offset 590 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO589 ,CPU Targets Byte Offset 589 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO588 ,CPU Targets Byte Offset 588 " group.long 0xA50++0x03 line.long 0x00 "GICD_ITARGETSR148,Interrupt Processor Targets Register 148" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO595 ,CPU Targets Byte Offset 595 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO594 ,CPU Targets Byte Offset 594 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO593 ,CPU Targets Byte Offset 593 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO592 ,CPU Targets Byte Offset 592 " group.long 0xA54++0x03 line.long 0x00 "GICD_ITARGETSR149,Interrupt Processor Targets Register 149" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO599 ,CPU Targets Byte Offset 599 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO598 ,CPU Targets Byte Offset 598 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO597 ,CPU Targets Byte Offset 597 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO596 ,CPU Targets Byte Offset 596 " group.long 0xA58++0x03 line.long 0x00 "GICD_ITARGETSR150,Interrupt Processor Targets Register 150" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO603 ,CPU Targets Byte Offset 603 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO602 ,CPU Targets Byte Offset 602 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO601 ,CPU Targets Byte Offset 601 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO600 ,CPU Targets Byte Offset 600 " group.long 0xA5C++0x03 line.long 0x00 "GICD_ITARGETSR151,Interrupt Processor Targets Register 151" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO607 ,CPU Targets Byte Offset 607 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO606 ,CPU Targets Byte Offset 606 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO605 ,CPU Targets Byte Offset 605 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO604 ,CPU Targets Byte Offset 604 " else hgroup.long 0xA40++0x03 hide.long 0x00 "GICD_ITARGETSR144,Interrupt Processor Targets Register 144" hgroup.long 0xA44++0x03 hide.long 0x00 "GICD_ITARGETSR145,Interrupt Processor Targets Register 145" hgroup.long 0xA48++0x03 hide.long 0x00 "GICD_ITARGETSR146,Interrupt Processor Targets Register 146" hgroup.long 0xA4C++0x03 hide.long 0x00 "GICD_ITARGETSR147,Interrupt Processor Targets Register 147" hgroup.long 0xA50++0x03 hide.long 0x00 "GICD_ITARGETSR148,Interrupt Processor Targets Register 148" hgroup.long 0xA54++0x03 hide.long 0x00 "GICD_ITARGETSR149,Interrupt Processor Targets Register 149" hgroup.long 0xA58++0x03 hide.long 0x00 "GICD_ITARGETSR150,Interrupt Processor Targets Register 150" hgroup.long 0xA5C++0x03 hide.long 0x00 "GICD_ITARGETSR151,Interrupt Processor Targets Register 151" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x13) group.long 0xA60++0x03 line.long 0x00 "GICD_ITARGETSR152,Interrupt Processor Targets Register 152" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO611 ,CPU Targets Byte Offset 611 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO610 ,CPU Targets Byte Offset 610 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO609 ,CPU Targets Byte Offset 609 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO608 ,CPU Targets Byte Offset 608 " group.long 0xA64++0x03 line.long 0x00 "GICD_ITARGETSR153,Interrupt Processor Targets Register 153" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO615 ,CPU Targets Byte Offset 615 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO614 ,CPU Targets Byte Offset 614 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO613 ,CPU Targets Byte Offset 613 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO612 ,CPU Targets Byte Offset 612 " group.long 0xA68++0x03 line.long 0x00 "GICD_ITARGETSR154,Interrupt Processor Targets Register 154" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO619 ,CPU Targets Byte Offset 619 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO618 ,CPU Targets Byte Offset 618 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO617 ,CPU Targets Byte Offset 617 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO616 ,CPU Targets Byte Offset 616 " group.long 0xA6C++0x03 line.long 0x00 "GICD_ITARGETSR155,Interrupt Processor Targets Register 155" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO623 ,CPU Targets Byte Offset 623 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO622 ,CPU Targets Byte Offset 622 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO621 ,CPU Targets Byte Offset 621 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO620 ,CPU Targets Byte Offset 620 " group.long 0xA70++0x03 line.long 0x00 "GICD_ITARGETSR156,Interrupt Processor Targets Register 156" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO627 ,CPU Targets Byte Offset 627 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO626 ,CPU Targets Byte Offset 626 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO625 ,CPU Targets Byte Offset 625 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO624 ,CPU Targets Byte Offset 624 " group.long 0xA74++0x03 line.long 0x00 "GICD_ITARGETSR157,Interrupt Processor Targets Register 157" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO631 ,CPU Targets Byte Offset 631 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO630 ,CPU Targets Byte Offset 630 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO629 ,CPU Targets Byte Offset 629 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO628 ,CPU Targets Byte Offset 628 " group.long 0xA78++0x03 line.long 0x00 "GICD_ITARGETSR158,Interrupt Processor Targets Register 158" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO635 ,CPU Targets Byte Offset 635 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO634 ,CPU Targets Byte Offset 634 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO633 ,CPU Targets Byte Offset 633 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO632 ,CPU Targets Byte Offset 632 " group.long 0xA7C++0x03 line.long 0x00 "GICD_ITARGETSR159,Interrupt Processor Targets Register 159" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO639 ,CPU Targets Byte Offset 639 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO638 ,CPU Targets Byte Offset 638 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO637 ,CPU Targets Byte Offset 637 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO636 ,CPU Targets Byte Offset 636 " else hgroup.long 0xA60++0x03 hide.long 0x00 "GICD_ITARGETSR152,Interrupt Processor Targets Register 152" hgroup.long 0xA64++0x03 hide.long 0x00 "GICD_ITARGETSR153,Interrupt Processor Targets Register 153" hgroup.long 0xA68++0x03 hide.long 0x00 "GICD_ITARGETSR154,Interrupt Processor Targets Register 154" hgroup.long 0xA6C++0x03 hide.long 0x00 "GICD_ITARGETSR155,Interrupt Processor Targets Register 155" hgroup.long 0xA70++0x03 hide.long 0x00 "GICD_ITARGETSR156,Interrupt Processor Targets Register 156" hgroup.long 0xA74++0x03 hide.long 0x00 "GICD_ITARGETSR157,Interrupt Processor Targets Register 157" hgroup.long 0xA78++0x03 hide.long 0x00 "GICD_ITARGETSR158,Interrupt Processor Targets Register 158" hgroup.long 0xA7C++0x03 hide.long 0x00 "GICD_ITARGETSR159,Interrupt Processor Targets Register 159" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x14) group.long 0xA80++0x03 line.long 0x00 "GICD_ITARGETSR160,Interrupt Processor Targets Register 160" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO643 ,CPU Targets Byte Offset 643 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO642 ,CPU Targets Byte Offset 642 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO641 ,CPU Targets Byte Offset 641 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO640 ,CPU Targets Byte Offset 640 " group.long 0xA84++0x03 line.long 0x00 "GICD_ITARGETSR161,Interrupt Processor Targets Register 161" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO647 ,CPU Targets Byte Offset 647 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO646 ,CPU Targets Byte Offset 646 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO645 ,CPU Targets Byte Offset 645 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO644 ,CPU Targets Byte Offset 644 " group.long 0xA88++0x03 line.long 0x00 "GICD_ITARGETSR162,Interrupt Processor Targets Register 162" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO651 ,CPU Targets Byte Offset 651 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO650 ,CPU Targets Byte Offset 650 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO649 ,CPU Targets Byte Offset 649 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO648 ,CPU Targets Byte Offset 648 " group.long 0xA8C++0x03 line.long 0x00 "GICD_ITARGETSR163,Interrupt Processor Targets Register 163" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO655 ,CPU Targets Byte Offset 655 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO654 ,CPU Targets Byte Offset 654 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO653 ,CPU Targets Byte Offset 653 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO652 ,CPU Targets Byte Offset 652 " group.long 0xA90++0x03 line.long 0x00 "GICD_ITARGETSR164,Interrupt Processor Targets Register 164" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO659 ,CPU Targets Byte Offset 659 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO658 ,CPU Targets Byte Offset 658 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO657 ,CPU Targets Byte Offset 657 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO656 ,CPU Targets Byte Offset 656 " group.long 0xA94++0x03 line.long 0x00 "GICD_ITARGETSR165,Interrupt Processor Targets Register 165" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO663 ,CPU Targets Byte Offset 663 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO662 ,CPU Targets Byte Offset 662 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO661 ,CPU Targets Byte Offset 661 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO660 ,CPU Targets Byte Offset 660 " group.long 0xA98++0x03 line.long 0x00 "GICD_ITARGETSR166,Interrupt Processor Targets Register 166" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO667 ,CPU Targets Byte Offset 667 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO666 ,CPU Targets Byte Offset 666 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO665 ,CPU Targets Byte Offset 665 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO664 ,CPU Targets Byte Offset 664 " group.long 0xA9C++0x03 line.long 0x00 "GICD_ITARGETSR167,Interrupt Processor Targets Register 167" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO671 ,CPU Targets Byte Offset 671 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO670 ,CPU Targets Byte Offset 670 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO669 ,CPU Targets Byte Offset 669 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO668 ,CPU Targets Byte Offset 668 " else hgroup.long 0xA80++0x03 hide.long 0x00 "GICD_ITARGETSR160,Interrupt Processor Targets Register 160" hgroup.long 0xA84++0x03 hide.long 0x00 "GICD_ITARGETSR161,Interrupt Processor Targets Register 161" hgroup.long 0xA88++0x03 hide.long 0x00 "GICD_ITARGETSR162,Interrupt Processor Targets Register 162" hgroup.long 0xA8C++0x03 hide.long 0x00 "GICD_ITARGETSR163,Interrupt Processor Targets Register 163" hgroup.long 0xA90++0x03 hide.long 0x00 "GICD_ITARGETSR164,Interrupt Processor Targets Register 164" hgroup.long 0xA94++0x03 hide.long 0x00 "GICD_ITARGETSR165,Interrupt Processor Targets Register 165" hgroup.long 0xA98++0x03 hide.long 0x00 "GICD_ITARGETSR166,Interrupt Processor Targets Register 166" hgroup.long 0xA9C++0x03 hide.long 0x00 "GICD_ITARGETSR167,Interrupt Processor Targets Register 167" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x15) group.long 0xAA0++0x03 line.long 0x00 "GICD_ITARGETSR168,Interrupt Processor Targets Register 168" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO675 ,CPU Targets Byte Offset 675 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO674 ,CPU Targets Byte Offset 674 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO673 ,CPU Targets Byte Offset 673 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO672 ,CPU Targets Byte Offset 672 " group.long 0xAA4++0x03 line.long 0x00 "GICD_ITARGETSR169,Interrupt Processor Targets Register 169" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO679 ,CPU Targets Byte Offset 679 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO678 ,CPU Targets Byte Offset 678 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO677 ,CPU Targets Byte Offset 677 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO676 ,CPU Targets Byte Offset 676 " group.long 0xAA8++0x03 line.long 0x00 "GICD_ITARGETSR170,Interrupt Processor Targets Register 170" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO683 ,CPU Targets Byte Offset 683 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO682 ,CPU Targets Byte Offset 682 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO681 ,CPU Targets Byte Offset 681 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO680 ,CPU Targets Byte Offset 680 " group.long 0xAAC++0x03 line.long 0x00 "GICD_ITARGETSR171,Interrupt Processor Targets Register 171" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO687 ,CPU Targets Byte Offset 687 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO686 ,CPU Targets Byte Offset 686 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO685 ,CPU Targets Byte Offset 685 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO684 ,CPU Targets Byte Offset 684 " group.long 0xAB0++0x03 line.long 0x00 "GICD_ITARGETSR172,Interrupt Processor Targets Register 172" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO691 ,CPU Targets Byte Offset 691 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO690 ,CPU Targets Byte Offset 690 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO689 ,CPU Targets Byte Offset 689 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO688 ,CPU Targets Byte Offset 688 " group.long 0xAB4++0x03 line.long 0x00 "GICD_ITARGETSR173,Interrupt Processor Targets Register 173" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO695 ,CPU Targets Byte Offset 695 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO694 ,CPU Targets Byte Offset 694 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO693 ,CPU Targets Byte Offset 693 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO692 ,CPU Targets Byte Offset 692 " group.long 0xAB8++0x03 line.long 0x00 "GICD_ITARGETSR174,Interrupt Processor Targets Register 174" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO699 ,CPU Targets Byte Offset 699 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO698 ,CPU Targets Byte Offset 698 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO697 ,CPU Targets Byte Offset 697 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO696 ,CPU Targets Byte Offset 696 " group.long 0xABC++0x03 line.long 0x00 "GICD_ITARGETSR175,Interrupt Processor Targets Register 175" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO703 ,CPU Targets Byte Offset 703 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO702 ,CPU Targets Byte Offset 702 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO701 ,CPU Targets Byte Offset 701 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO700 ,CPU Targets Byte Offset 700 " else hgroup.long 0xAA0++0x03 hide.long 0x00 "GICD_ITARGETSR168,Interrupt Processor Targets Register 168" hgroup.long 0xAA4++0x03 hide.long 0x00 "GICD_ITARGETSR169,Interrupt Processor Targets Register 169" hgroup.long 0xAA8++0x03 hide.long 0x00 "GICD_ITARGETSR170,Interrupt Processor Targets Register 170" hgroup.long 0xAAC++0x03 hide.long 0x00 "GICD_ITARGETSR171,Interrupt Processor Targets Register 171" hgroup.long 0xAB0++0x03 hide.long 0x00 "GICD_ITARGETSR172,Interrupt Processor Targets Register 172" hgroup.long 0xAB4++0x03 hide.long 0x00 "GICD_ITARGETSR173,Interrupt Processor Targets Register 173" hgroup.long 0xAB8++0x03 hide.long 0x00 "GICD_ITARGETSR174,Interrupt Processor Targets Register 174" hgroup.long 0xABC++0x03 hide.long 0x00 "GICD_ITARGETSR175,Interrupt Processor Targets Register 175" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x16) group.long 0xAC0++0x03 line.long 0x00 "GICD_ITARGETSR176,Interrupt Processor Targets Register 176" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO707 ,CPU Targets Byte Offset 707 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO706 ,CPU Targets Byte Offset 706 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO705 ,CPU Targets Byte Offset 705 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO704 ,CPU Targets Byte Offset 704 " group.long 0xAC4++0x03 line.long 0x00 "GICD_ITARGETSR177,Interrupt Processor Targets Register 177" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO711 ,CPU Targets Byte Offset 711 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO710 ,CPU Targets Byte Offset 710 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO709 ,CPU Targets Byte Offset 709 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO708 ,CPU Targets Byte Offset 708 " group.long 0xAC8++0x03 line.long 0x00 "GICD_ITARGETSR178,Interrupt Processor Targets Register 178" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO715 ,CPU Targets Byte Offset 715 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO714 ,CPU Targets Byte Offset 714 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO713 ,CPU Targets Byte Offset 713 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO712 ,CPU Targets Byte Offset 712 " group.long 0xACC++0x03 line.long 0x00 "GICD_ITARGETSR179,Interrupt Processor Targets Register 179" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO719 ,CPU Targets Byte Offset 719 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO718 ,CPU Targets Byte Offset 718 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO717 ,CPU Targets Byte Offset 717 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO716 ,CPU Targets Byte Offset 716 " group.long 0xAD0++0x03 line.long 0x00 "GICD_ITARGETSR180,Interrupt Processor Targets Register 180" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO723 ,CPU Targets Byte Offset 723 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO722 ,CPU Targets Byte Offset 722 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO721 ,CPU Targets Byte Offset 721 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO720 ,CPU Targets Byte Offset 720 " group.long 0xAD4++0x03 line.long 0x00 "GICD_ITARGETSR181,Interrupt Processor Targets Register 181" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO727 ,CPU Targets Byte Offset 727 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO726 ,CPU Targets Byte Offset 726 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO725 ,CPU Targets Byte Offset 725 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO724 ,CPU Targets Byte Offset 724 " group.long 0xAD8++0x03 line.long 0x00 "GICD_ITARGETSR182,Interrupt Processor Targets Register 182" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO731 ,CPU Targets Byte Offset 731 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO730 ,CPU Targets Byte Offset 730 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO729 ,CPU Targets Byte Offset 729 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO728 ,CPU Targets Byte Offset 728 " group.long 0xADC++0x03 line.long 0x00 "GICD_ITARGETSR183,Interrupt Processor Targets Register 183" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO735 ,CPU Targets Byte Offset 735 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO734 ,CPU Targets Byte Offset 734 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO733 ,CPU Targets Byte Offset 733 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO732 ,CPU Targets Byte Offset 732 " else hgroup.long 0xAC0++0x03 hide.long 0x00 "GICD_ITARGETSR176,Interrupt Processor Targets Register 176" hgroup.long 0xAC4++0x03 hide.long 0x00 "GICD_ITARGETSR177,Interrupt Processor Targets Register 177" hgroup.long 0xAC8++0x03 hide.long 0x00 "GICD_ITARGETSR178,Interrupt Processor Targets Register 178" hgroup.long 0xACC++0x03 hide.long 0x00 "GICD_ITARGETSR179,Interrupt Processor Targets Register 179" hgroup.long 0xAD0++0x03 hide.long 0x00 "GICD_ITARGETSR180,Interrupt Processor Targets Register 180" hgroup.long 0xAD4++0x03 hide.long 0x00 "GICD_ITARGETSR181,Interrupt Processor Targets Register 181" hgroup.long 0xAD8++0x03 hide.long 0x00 "GICD_ITARGETSR182,Interrupt Processor Targets Register 182" hgroup.long 0xADC++0x03 hide.long 0x00 "GICD_ITARGETSR183,Interrupt Processor Targets Register 183" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x17) group.long 0xAE0++0x03 line.long 0x00 "GICD_ITARGETSR184,Interrupt Processor Targets Register 184" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO739 ,CPU Targets Byte Offset 739 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO738 ,CPU Targets Byte Offset 738 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO737 ,CPU Targets Byte Offset 737 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO736 ,CPU Targets Byte Offset 736 " group.long 0xAE4++0x03 line.long 0x00 "GICD_ITARGETSR185,Interrupt Processor Targets Register 185" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO743 ,CPU Targets Byte Offset 743 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO742 ,CPU Targets Byte Offset 742 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO741 ,CPU Targets Byte Offset 741 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO740 ,CPU Targets Byte Offset 740 " group.long 0xAE8++0x03 line.long 0x00 "GICD_ITARGETSR186,Interrupt Processor Targets Register 186" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO747 ,CPU Targets Byte Offset 747 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO746 ,CPU Targets Byte Offset 746 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO745 ,CPU Targets Byte Offset 745 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO744 ,CPU Targets Byte Offset 744 " group.long 0xAEC++0x03 line.long 0x00 "GICD_ITARGETSR187,Interrupt Processor Targets Register 187" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO751 ,CPU Targets Byte Offset 751 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO750 ,CPU Targets Byte Offset 750 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO749 ,CPU Targets Byte Offset 749 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO748 ,CPU Targets Byte Offset 748 " group.long 0xAF0++0x03 line.long 0x00 "GICD_ITARGETSR188,Interrupt Processor Targets Register 188" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO755 ,CPU Targets Byte Offset 755 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO754 ,CPU Targets Byte Offset 754 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO753 ,CPU Targets Byte Offset 753 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO752 ,CPU Targets Byte Offset 752 " group.long 0xAF4++0x03 line.long 0x00 "GICD_ITARGETSR189,Interrupt Processor Targets Register 189" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO759 ,CPU Targets Byte Offset 759 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO758 ,CPU Targets Byte Offset 758 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO757 ,CPU Targets Byte Offset 757 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO756 ,CPU Targets Byte Offset 756 " group.long 0xAF8++0x03 line.long 0x00 "GICD_ITARGETSR190,Interrupt Processor Targets Register 190" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO763 ,CPU Targets Byte Offset 763 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO762 ,CPU Targets Byte Offset 762 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO761 ,CPU Targets Byte Offset 761 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO760 ,CPU Targets Byte Offset 760 " group.long 0xAFC++0x03 line.long 0x00 "GICD_ITARGETSR191,Interrupt Processor Targets Register 191" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO767 ,CPU Targets Byte Offset 767 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO766 ,CPU Targets Byte Offset 766 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO765 ,CPU Targets Byte Offset 765 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO764 ,CPU Targets Byte Offset 764 " else hgroup.long 0xAE0++0x03 hide.long 0x00 "GICD_ITARGETSR184,Interrupt Processor Targets Register 184" hgroup.long 0xAE4++0x03 hide.long 0x00 "GICD_ITARGETSR185,Interrupt Processor Targets Register 185" hgroup.long 0xAE8++0x03 hide.long 0x00 "GICD_ITARGETSR186,Interrupt Processor Targets Register 186" hgroup.long 0xAEC++0x03 hide.long 0x00 "GICD_ITARGETSR187,Interrupt Processor Targets Register 187" hgroup.long 0xAF0++0x03 hide.long 0x00 "GICD_ITARGETSR188,Interrupt Processor Targets Register 188" hgroup.long 0xAF4++0x03 hide.long 0x00 "GICD_ITARGETSR189,Interrupt Processor Targets Register 189" hgroup.long 0xAF8++0x03 hide.long 0x00 "GICD_ITARGETSR190,Interrupt Processor Targets Register 190" hgroup.long 0xAFC++0x03 hide.long 0x00 "GICD_ITARGETSR191,Interrupt Processor Targets Register 191" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x18) group.long 0xB00++0x03 line.long 0x00 "GICD_ITARGETSR192,Interrupt Processor Targets Register 192" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO771 ,CPU Targets Byte Offset 771 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO770 ,CPU Targets Byte Offset 770 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO769 ,CPU Targets Byte Offset 769 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO768 ,CPU Targets Byte Offset 768 " group.long 0xB04++0x03 line.long 0x00 "GICD_ITARGETSR193,Interrupt Processor Targets Register 193" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO775 ,CPU Targets Byte Offset 775 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO774 ,CPU Targets Byte Offset 774 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO773 ,CPU Targets Byte Offset 773 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO772 ,CPU Targets Byte Offset 772 " group.long 0xB08++0x03 line.long 0x00 "GICD_ITARGETSR194,Interrupt Processor Targets Register 194" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO779 ,CPU Targets Byte Offset 779 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO778 ,CPU Targets Byte Offset 778 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO777 ,CPU Targets Byte Offset 777 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO776 ,CPU Targets Byte Offset 776 " group.long 0xB0C++0x03 line.long 0x00 "GICD_ITARGETSR195,Interrupt Processor Targets Register 195" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO783 ,CPU Targets Byte Offset 783 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO782 ,CPU Targets Byte Offset 782 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO781 ,CPU Targets Byte Offset 781 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO780 ,CPU Targets Byte Offset 780 " group.long 0xB10++0x03 line.long 0x00 "GICD_ITARGETSR196,Interrupt Processor Targets Register 196" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO787 ,CPU Targets Byte Offset 787 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO786 ,CPU Targets Byte Offset 786 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO785 ,CPU Targets Byte Offset 785 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO784 ,CPU Targets Byte Offset 784 " group.long 0xB14++0x03 line.long 0x00 "GICD_ITARGETSR197,Interrupt Processor Targets Register 197" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO791 ,CPU Targets Byte Offset 791 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO790 ,CPU Targets Byte Offset 790 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO789 ,CPU Targets Byte Offset 789 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO788 ,CPU Targets Byte Offset 788 " group.long 0xB18++0x03 line.long 0x00 "GICD_ITARGETSR198,Interrupt Processor Targets Register 198" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO795 ,CPU Targets Byte Offset 795 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO794 ,CPU Targets Byte Offset 794 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO793 ,CPU Targets Byte Offset 793 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO792 ,CPU Targets Byte Offset 792 " group.long 0xB1C++0x03 line.long 0x00 "GICD_ITARGETSR199,Interrupt Processor Targets Register 199" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO799 ,CPU Targets Byte Offset 799 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO798 ,CPU Targets Byte Offset 798 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO797 ,CPU Targets Byte Offset 797 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO796 ,CPU Targets Byte Offset 796 " else hgroup.long 0xB00++0x03 hide.long 0x00 "GICD_ITARGETSR192,Interrupt Processor Targets Register 192" hgroup.long 0xB04++0x03 hide.long 0x00 "GICD_ITARGETSR193,Interrupt Processor Targets Register 193" hgroup.long 0xB08++0x03 hide.long 0x00 "GICD_ITARGETSR194,Interrupt Processor Targets Register 194" hgroup.long 0xB0C++0x03 hide.long 0x00 "GICD_ITARGETSR195,Interrupt Processor Targets Register 195" hgroup.long 0xB10++0x03 hide.long 0x00 "GICD_ITARGETSR196,Interrupt Processor Targets Register 196" hgroup.long 0xB14++0x03 hide.long 0x00 "GICD_ITARGETSR197,Interrupt Processor Targets Register 197" hgroup.long 0xB18++0x03 hide.long 0x00 "GICD_ITARGETSR198,Interrupt Processor Targets Register 198" hgroup.long 0xB1C++0x03 hide.long 0x00 "GICD_ITARGETSR199,Interrupt Processor Targets Register 199" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x19) group.long 0xB20++0x03 line.long 0x00 "GICD_ITARGETSR200,Interrupt Processor Targets Register 200" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO803 ,CPU Targets Byte Offset 803 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO802 ,CPU Targets Byte Offset 802 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO801 ,CPU Targets Byte Offset 801 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO800 ,CPU Targets Byte Offset 800 " group.long 0xB24++0x03 line.long 0x00 "GICD_ITARGETSR201,Interrupt Processor Targets Register 201" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO807 ,CPU Targets Byte Offset 807 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO806 ,CPU Targets Byte Offset 806 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO805 ,CPU Targets Byte Offset 805 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO804 ,CPU Targets Byte Offset 804 " group.long 0xB28++0x03 line.long 0x00 "GICD_ITARGETSR202,Interrupt Processor Targets Register 202" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO811 ,CPU Targets Byte Offset 811 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO810 ,CPU Targets Byte Offset 810 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO809 ,CPU Targets Byte Offset 809 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO808 ,CPU Targets Byte Offset 808 " group.long 0xB2C++0x03 line.long 0x00 "GICD_ITARGETSR203,Interrupt Processor Targets Register 203" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO815 ,CPU Targets Byte Offset 815 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO814 ,CPU Targets Byte Offset 814 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO813 ,CPU Targets Byte Offset 813 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO812 ,CPU Targets Byte Offset 812 " group.long 0xB30++0x03 line.long 0x00 "GICD_ITARGETSR204,Interrupt Processor Targets Register 204" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO819 ,CPU Targets Byte Offset 819 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO818 ,CPU Targets Byte Offset 818 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO817 ,CPU Targets Byte Offset 817 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO816 ,CPU Targets Byte Offset 816 " group.long 0xB34++0x03 line.long 0x00 "GICD_ITARGETSR205,Interrupt Processor Targets Register 205" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO823 ,CPU Targets Byte Offset 823 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO822 ,CPU Targets Byte Offset 822 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO821 ,CPU Targets Byte Offset 821 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO820 ,CPU Targets Byte Offset 820 " group.long 0xB38++0x03 line.long 0x00 "GICD_ITARGETSR206,Interrupt Processor Targets Register 206" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO827 ,CPU Targets Byte Offset 827 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO826 ,CPU Targets Byte Offset 826 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO825 ,CPU Targets Byte Offset 825 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO824 ,CPU Targets Byte Offset 824 " group.long 0xB3C++0x03 line.long 0x00 "GICD_ITARGETSR207,Interrupt Processor Targets Register 207" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO831 ,CPU Targets Byte Offset 831 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO830 ,CPU Targets Byte Offset 830 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO829 ,CPU Targets Byte Offset 829 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO828 ,CPU Targets Byte Offset 828 " else hgroup.long 0xB20++0x03 hide.long 0x00 "GICD_ITARGETSR200,Interrupt Processor Targets Register 200" hgroup.long 0xB24++0x03 hide.long 0x00 "GICD_ITARGETSR201,Interrupt Processor Targets Register 201" hgroup.long 0xB28++0x03 hide.long 0x00 "GICD_ITARGETSR202,Interrupt Processor Targets Register 202" hgroup.long 0xB2C++0x03 hide.long 0x00 "GICD_ITARGETSR203,Interrupt Processor Targets Register 203" hgroup.long 0xB30++0x03 hide.long 0x00 "GICD_ITARGETSR204,Interrupt Processor Targets Register 204" hgroup.long 0xB34++0x03 hide.long 0x00 "GICD_ITARGETSR205,Interrupt Processor Targets Register 205" hgroup.long 0xB38++0x03 hide.long 0x00 "GICD_ITARGETSR206,Interrupt Processor Targets Register 206" hgroup.long 0xB3C++0x03 hide.long 0x00 "GICD_ITARGETSR207,Interrupt Processor Targets Register 207" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x1A) group.long 0xB40++0x03 line.long 0x00 "GICD_ITARGETSR208,Interrupt Processor Targets Register 208" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO835 ,CPU Targets Byte Offset 835 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO834 ,CPU Targets Byte Offset 834 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO833 ,CPU Targets Byte Offset 833 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO832 ,CPU Targets Byte Offset 832 " group.long 0xB44++0x03 line.long 0x00 "GICD_ITARGETSR209,Interrupt Processor Targets Register 209" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO839 ,CPU Targets Byte Offset 839 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO838 ,CPU Targets Byte Offset 838 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO837 ,CPU Targets Byte Offset 837 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO836 ,CPU Targets Byte Offset 836 " group.long 0xB48++0x03 line.long 0x00 "GICD_ITARGETSR210,Interrupt Processor Targets Register 210" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO843 ,CPU Targets Byte Offset 843 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO842 ,CPU Targets Byte Offset 842 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO841 ,CPU Targets Byte Offset 841 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO840 ,CPU Targets Byte Offset 840 " group.long 0xB4C++0x03 line.long 0x00 "GICD_ITARGETSR211,Interrupt Processor Targets Register 211" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO847 ,CPU Targets Byte Offset 847 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO846 ,CPU Targets Byte Offset 846 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO845 ,CPU Targets Byte Offset 845 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO844 ,CPU Targets Byte Offset 844 " group.long 0xB50++0x03 line.long 0x00 "GICD_ITARGETSR212,Interrupt Processor Targets Register 212" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO851 ,CPU Targets Byte Offset 851 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO850 ,CPU Targets Byte Offset 850 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO849 ,CPU Targets Byte Offset 849 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO848 ,CPU Targets Byte Offset 848 " group.long 0xB54++0x03 line.long 0x00 "GICD_ITARGETSR213,Interrupt Processor Targets Register 213" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO855 ,CPU Targets Byte Offset 855 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO854 ,CPU Targets Byte Offset 854 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO853 ,CPU Targets Byte Offset 853 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO852 ,CPU Targets Byte Offset 852 " group.long 0xB58++0x03 line.long 0x00 "GICD_ITARGETSR214,Interrupt Processor Targets Register 214" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO859 ,CPU Targets Byte Offset 859 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO858 ,CPU Targets Byte Offset 858 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO857 ,CPU Targets Byte Offset 857 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO856 ,CPU Targets Byte Offset 856 " group.long 0xB5C++0x03 line.long 0x00 "GICD_ITARGETSR215,Interrupt Processor Targets Register 215" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO863 ,CPU Targets Byte Offset 863 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO862 ,CPU Targets Byte Offset 862 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO861 ,CPU Targets Byte Offset 861 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO860 ,CPU Targets Byte Offset 860 " else hgroup.long 0xB40++0x03 hide.long 0x00 "GICD_ITARGETSR208,Interrupt Processor Targets Register 208" hgroup.long 0xB44++0x03 hide.long 0x00 "GICD_ITARGETSR209,Interrupt Processor Targets Register 209" hgroup.long 0xB48++0x03 hide.long 0x00 "GICD_ITARGETSR210,Interrupt Processor Targets Register 210" hgroup.long 0xB4C++0x03 hide.long 0x00 "GICD_ITARGETSR211,Interrupt Processor Targets Register 211" hgroup.long 0xB50++0x03 hide.long 0x00 "GICD_ITARGETSR212,Interrupt Processor Targets Register 212" hgroup.long 0xB54++0x03 hide.long 0x00 "GICD_ITARGETSR213,Interrupt Processor Targets Register 213" hgroup.long 0xB58++0x03 hide.long 0x00 "GICD_ITARGETSR214,Interrupt Processor Targets Register 214" hgroup.long 0xB5C++0x03 hide.long 0x00 "GICD_ITARGETSR215,Interrupt Processor Targets Register 215" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x1B) group.long 0xB60++0x03 line.long 0x00 "GICD_ITARGETSR216,Interrupt Processor Targets Register 216" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO867 ,CPU Targets Byte Offset 867 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO866 ,CPU Targets Byte Offset 866 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO865 ,CPU Targets Byte Offset 865 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO864 ,CPU Targets Byte Offset 864 " group.long 0xB64++0x03 line.long 0x00 "GICD_ITARGETSR217,Interrupt Processor Targets Register 217" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO871 ,CPU Targets Byte Offset 871 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO870 ,CPU Targets Byte Offset 870 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO869 ,CPU Targets Byte Offset 869 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO868 ,CPU Targets Byte Offset 868 " group.long 0xB68++0x03 line.long 0x00 "GICD_ITARGETSR218,Interrupt Processor Targets Register 218" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO875 ,CPU Targets Byte Offset 875 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO874 ,CPU Targets Byte Offset 874 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO873 ,CPU Targets Byte Offset 873 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO872 ,CPU Targets Byte Offset 872 " group.long 0xB6C++0x03 line.long 0x00 "GICD_ITARGETSR219,Interrupt Processor Targets Register 219" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO879 ,CPU Targets Byte Offset 879 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO878 ,CPU Targets Byte Offset 878 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO877 ,CPU Targets Byte Offset 877 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO876 ,CPU Targets Byte Offset 876 " group.long 0xB70++0x03 line.long 0x00 "GICD_ITARGETSR220,Interrupt Processor Targets Register 220" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO883 ,CPU Targets Byte Offset 883 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO882 ,CPU Targets Byte Offset 882 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO881 ,CPU Targets Byte Offset 881 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO880 ,CPU Targets Byte Offset 880 " group.long 0xB74++0x03 line.long 0x00 "GICD_ITARGETSR221,Interrupt Processor Targets Register 221" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO887 ,CPU Targets Byte Offset 887 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO886 ,CPU Targets Byte Offset 886 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO885 ,CPU Targets Byte Offset 885 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO884 ,CPU Targets Byte Offset 884 " group.long 0xB78++0x03 line.long 0x00 "GICD_ITARGETSR222,Interrupt Processor Targets Register 222" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO891 ,CPU Targets Byte Offset 891 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO890 ,CPU Targets Byte Offset 890 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO889 ,CPU Targets Byte Offset 889 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO888 ,CPU Targets Byte Offset 888 " group.long 0xB7C++0x03 line.long 0x00 "GICD_ITARGETSR223,Interrupt Processor Targets Register 223" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO895 ,CPU Targets Byte Offset 895 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO894 ,CPU Targets Byte Offset 894 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO893 ,CPU Targets Byte Offset 893 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO892 ,CPU Targets Byte Offset 892 " else hgroup.long 0xB60++0x03 hide.long 0x00 "GICD_ITARGETSR216,Interrupt Processor Targets Register 216" hgroup.long 0xB64++0x03 hide.long 0x00 "GICD_ITARGETSR217,Interrupt Processor Targets Register 217" hgroup.long 0xB68++0x03 hide.long 0x00 "GICD_ITARGETSR218,Interrupt Processor Targets Register 218" hgroup.long 0xB6C++0x03 hide.long 0x00 "GICD_ITARGETSR219,Interrupt Processor Targets Register 219" hgroup.long 0xB70++0x03 hide.long 0x00 "GICD_ITARGETSR220,Interrupt Processor Targets Register 220" hgroup.long 0xB74++0x03 hide.long 0x00 "GICD_ITARGETSR221,Interrupt Processor Targets Register 221" hgroup.long 0xB78++0x03 hide.long 0x00 "GICD_ITARGETSR222,Interrupt Processor Targets Register 222" hgroup.long 0xB7C++0x03 hide.long 0x00 "GICD_ITARGETSR223,Interrupt Processor Targets Register 223" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x1C) group.long 0xB80++0x03 line.long 0x00 "GICD_ITARGETSR224,Interrupt Processor Targets Register 224" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO899 ,CPU Targets Byte Offset 899 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO898 ,CPU Targets Byte Offset 898 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO897 ,CPU Targets Byte Offset 897 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO896 ,CPU Targets Byte Offset 896 " group.long 0xB84++0x03 line.long 0x00 "GICD_ITARGETSR225,Interrupt Processor Targets Register 225" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO903 ,CPU Targets Byte Offset 903 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO902 ,CPU Targets Byte Offset 902 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO901 ,CPU Targets Byte Offset 901 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO900 ,CPU Targets Byte Offset 900 " group.long 0xB88++0x03 line.long 0x00 "GICD_ITARGETSR226,Interrupt Processor Targets Register 226" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO907 ,CPU Targets Byte Offset 907 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO906 ,CPU Targets Byte Offset 906 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO905 ,CPU Targets Byte Offset 905 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO904 ,CPU Targets Byte Offset 904 " group.long 0xB8C++0x03 line.long 0x00 "GICD_ITARGETSR227,Interrupt Processor Targets Register 227" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO911 ,CPU Targets Byte Offset 911 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO910 ,CPU Targets Byte Offset 910 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO909 ,CPU Targets Byte Offset 909 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO908 ,CPU Targets Byte Offset 908 " group.long 0xB90++0x03 line.long 0x00 "GICD_ITARGETSR228,Interrupt Processor Targets Register 228" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO915 ,CPU Targets Byte Offset 915 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO914 ,CPU Targets Byte Offset 914 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO913 ,CPU Targets Byte Offset 913 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO912 ,CPU Targets Byte Offset 912 " group.long 0xB94++0x03 line.long 0x00 "GICD_ITARGETSR229,Interrupt Processor Targets Register 229" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO919 ,CPU Targets Byte Offset 919 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO918 ,CPU Targets Byte Offset 918 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO917 ,CPU Targets Byte Offset 917 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO916 ,CPU Targets Byte Offset 916 " group.long 0xB98++0x03 line.long 0x00 "GICD_ITARGETSR230,Interrupt Processor Targets Register 230" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO923 ,CPU Targets Byte Offset 923 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO922 ,CPU Targets Byte Offset 922 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO921 ,CPU Targets Byte Offset 921 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO920 ,CPU Targets Byte Offset 920 " group.long 0xB9C++0x03 line.long 0x00 "GICD_ITARGETSR231,Interrupt Processor Targets Register 231" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO927 ,CPU Targets Byte Offset 927 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO926 ,CPU Targets Byte Offset 926 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO925 ,CPU Targets Byte Offset 925 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO924 ,CPU Targets Byte Offset 924 " else hgroup.long 0xB80++0x03 hide.long 0x00 "GICD_ITARGETSR224,Interrupt Processor Targets Register 224" hgroup.long 0xB84++0x03 hide.long 0x00 "GICD_ITARGETSR225,Interrupt Processor Targets Register 225" hgroup.long 0xB88++0x03 hide.long 0x00 "GICD_ITARGETSR226,Interrupt Processor Targets Register 226" hgroup.long 0xB8C++0x03 hide.long 0x00 "GICD_ITARGETSR227,Interrupt Processor Targets Register 227" hgroup.long 0xB90++0x03 hide.long 0x00 "GICD_ITARGETSR228,Interrupt Processor Targets Register 228" hgroup.long 0xB94++0x03 hide.long 0x00 "GICD_ITARGETSR229,Interrupt Processor Targets Register 229" hgroup.long 0xB98++0x03 hide.long 0x00 "GICD_ITARGETSR230,Interrupt Processor Targets Register 230" hgroup.long 0xB9C++0x03 hide.long 0x00 "GICD_ITARGETSR231,Interrupt Processor Targets Register 231" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x1D) group.long 0xBA0++0x03 line.long 0x00 "GICD_ITARGETSR232,Interrupt Processor Targets Register 232" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO931 ,CPU Targets Byte Offset 931 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO930 ,CPU Targets Byte Offset 930 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO929 ,CPU Targets Byte Offset 929 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO928 ,CPU Targets Byte Offset 928 " group.long 0xBA4++0x03 line.long 0x00 "GICD_ITARGETSR233,Interrupt Processor Targets Register 233" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO935 ,CPU Targets Byte Offset 935 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO934 ,CPU Targets Byte Offset 934 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO933 ,CPU Targets Byte Offset 933 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO932 ,CPU Targets Byte Offset 932 " group.long 0xBA8++0x03 line.long 0x00 "GICD_ITARGETSR234,Interrupt Processor Targets Register 234" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO939 ,CPU Targets Byte Offset 939 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO938 ,CPU Targets Byte Offset 938 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO937 ,CPU Targets Byte Offset 937 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO936 ,CPU Targets Byte Offset 936 " group.long 0xBAC++0x03 line.long 0x00 "GICD_ITARGETSR235,Interrupt Processor Targets Register 235" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO943 ,CPU Targets Byte Offset 943 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO942 ,CPU Targets Byte Offset 942 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO941 ,CPU Targets Byte Offset 941 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO940 ,CPU Targets Byte Offset 940 " group.long 0xBB0++0x03 line.long 0x00 "GICD_ITARGETSR236,Interrupt Processor Targets Register 236" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO947 ,CPU Targets Byte Offset 947 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO946 ,CPU Targets Byte Offset 946 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO945 ,CPU Targets Byte Offset 945 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO944 ,CPU Targets Byte Offset 944 " group.long 0xBB4++0x03 line.long 0x00 "GICD_ITARGETSR237,Interrupt Processor Targets Register 237" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO951 ,CPU Targets Byte Offset 951 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO950 ,CPU Targets Byte Offset 950 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO949 ,CPU Targets Byte Offset 949 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO948 ,CPU Targets Byte Offset 948 " group.long 0xBB8++0x03 line.long 0x00 "GICD_ITARGETSR238,Interrupt Processor Targets Register 238" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO955 ,CPU Targets Byte Offset 955 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO954 ,CPU Targets Byte Offset 954 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO953 ,CPU Targets Byte Offset 953 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO952 ,CPU Targets Byte Offset 952 " group.long 0xBBC++0x03 line.long 0x00 "GICD_ITARGETSR239,Interrupt Processor Targets Register 239" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO959 ,CPU Targets Byte Offset 959 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO958 ,CPU Targets Byte Offset 958 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO957 ,CPU Targets Byte Offset 957 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO956 ,CPU Targets Byte Offset 956 " else hgroup.long 0xBA0++0x03 hide.long 0x00 "GICD_ITARGETSR232,Interrupt Processor Targets Register 232" hgroup.long 0xBA4++0x03 hide.long 0x00 "GICD_ITARGETSR233,Interrupt Processor Targets Register 233" hgroup.long 0xBA8++0x03 hide.long 0x00 "GICD_ITARGETSR234,Interrupt Processor Targets Register 234" hgroup.long 0xBAC++0x03 hide.long 0x00 "GICD_ITARGETSR235,Interrupt Processor Targets Register 235" hgroup.long 0xBB0++0x03 hide.long 0x00 "GICD_ITARGETSR236,Interrupt Processor Targets Register 236" hgroup.long 0xBB4++0x03 hide.long 0x00 "GICD_ITARGETSR237,Interrupt Processor Targets Register 237" hgroup.long 0xBB8++0x03 hide.long 0x00 "GICD_ITARGETSR238,Interrupt Processor Targets Register 238" hgroup.long 0xBBC++0x03 hide.long 0x00 "GICD_ITARGETSR239,Interrupt Processor Targets Register 239" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x1E) group.long 0xBC0++0x03 line.long 0x00 "GICD_ITARGETSR240,Interrupt Processor Targets Register 240" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO963 ,CPU Targets Byte Offset 963 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO962 ,CPU Targets Byte Offset 962 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO961 ,CPU Targets Byte Offset 961 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO960 ,CPU Targets Byte Offset 960 " group.long 0xBC4++0x03 line.long 0x00 "GICD_ITARGETSR241,Interrupt Processor Targets Register 241" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO967 ,CPU Targets Byte Offset 967 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO966 ,CPU Targets Byte Offset 966 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO965 ,CPU Targets Byte Offset 965 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO964 ,CPU Targets Byte Offset 964 " group.long 0xBC8++0x03 line.long 0x00 "GICD_ITARGETSR242,Interrupt Processor Targets Register 242" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO971 ,CPU Targets Byte Offset 971 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO970 ,CPU Targets Byte Offset 970 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO969 ,CPU Targets Byte Offset 969 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO968 ,CPU Targets Byte Offset 968 " group.long 0xBCC++0x03 line.long 0x00 "GICD_ITARGETSR243,Interrupt Processor Targets Register 243" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO975 ,CPU Targets Byte Offset 975 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO974 ,CPU Targets Byte Offset 974 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO973 ,CPU Targets Byte Offset 973 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO972 ,CPU Targets Byte Offset 972 " group.long 0xBD0++0x03 line.long 0x00 "GICD_ITARGETSR244,Interrupt Processor Targets Register 244" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO979 ,CPU Targets Byte Offset 979 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO978 ,CPU Targets Byte Offset 978 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO977 ,CPU Targets Byte Offset 977 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO976 ,CPU Targets Byte Offset 976 " group.long 0xBD4++0x03 line.long 0x00 "GICD_ITARGETSR245,Interrupt Processor Targets Register 245" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO983 ,CPU Targets Byte Offset 983 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO982 ,CPU Targets Byte Offset 982 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO981 ,CPU Targets Byte Offset 981 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO980 ,CPU Targets Byte Offset 980 " group.long 0xBD8++0x03 line.long 0x00 "GICD_ITARGETSR246,Interrupt Processor Targets Register 246" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO987 ,CPU Targets Byte Offset 987 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO986 ,CPU Targets Byte Offset 986 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO985 ,CPU Targets Byte Offset 985 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO984 ,CPU Targets Byte Offset 984 " group.long 0xBDC++0x03 line.long 0x00 "GICD_ITARGETSR247,Interrupt Processor Targets Register 247" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO991 ,CPU Targets Byte Offset 991 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO990 ,CPU Targets Byte Offset 990 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO989 ,CPU Targets Byte Offset 989 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO988 ,CPU Targets Byte Offset 988 " else hgroup.long 0xBC0++0x03 hide.long 0x00 "GICD_ITARGETSR240,Interrupt Processor Targets Register 240" hgroup.long 0xBC4++0x03 hide.long 0x00 "GICD_ITARGETSR241,Interrupt Processor Targets Register 241" hgroup.long 0xBC8++0x03 hide.long 0x00 "GICD_ITARGETSR242,Interrupt Processor Targets Register 242" hgroup.long 0xBCC++0x03 hide.long 0x00 "GICD_ITARGETSR243,Interrupt Processor Targets Register 243" hgroup.long 0xBD0++0x03 hide.long 0x00 "GICD_ITARGETSR244,Interrupt Processor Targets Register 244" hgroup.long 0xBD4++0x03 hide.long 0x00 "GICD_ITARGETSR245,Interrupt Processor Targets Register 245" hgroup.long 0xBD8++0x03 hide.long 0x00 "GICD_ITARGETSR246,Interrupt Processor Targets Register 246" hgroup.long 0xBDC++0x03 hide.long 0x00 "GICD_ITARGETSR247,Interrupt Processor Targets Register 247" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x1F) group.long 0xBE0++0x03 line.long 0x00 "GICD_ITARGETSR248,Interrupt Processor Targets Register 248" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO995 ,CPU Targets Byte Offset 995 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO994 ,CPU Targets Byte Offset 994 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO993 ,CPU Targets Byte Offset 993 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO992 ,CPU Targets Byte Offset 992 " group.long 0xBE4++0x03 line.long 0x00 "GICD_ITARGETSR249,Interrupt Processor Targets Register 249" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO999 ,CPU Targets Byte Offset 999 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO998 ,CPU Targets Byte Offset 998 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO997 ,CPU Targets Byte Offset 997 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO996 ,CPU Targets Byte Offset 996 " group.long 0xBE8++0x03 line.long 0x00 "GICD_ITARGETSR250,Interrupt Processor Targets Register 250" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO1003 ,CPU Targets Byte Offset 1003" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO1002 ,CPU Targets Byte Offset 1002" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1001 ,CPU Targets Byte Offset 1001" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO1000 ,CPU Targets Byte Offset 1000" group.long 0xBEC++0x03 line.long 0x00 "GICD_ITARGETSR251,Interrupt Processor Targets Register 251" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO1007 ,CPU Targets Byte Offset 1007" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO1006 ,CPU Targets Byte Offset 1006" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1005 ,CPU Targets Byte Offset 1005" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO1004 ,CPU Targets Byte Offset 1004" group.long 0xBF0++0x03 line.long 0x00 "GICD_ITARGETSR252,Interrupt Processor Targets Register 252" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO1011 ,CPU Targets Byte Offset 1011" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO1010 ,CPU Targets Byte Offset 1010" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1009 ,CPU Targets Byte Offset 1009" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO1008 ,CPU Targets Byte Offset 1008" group.long 0xBF4++0x03 line.long 0x00 "GICD_ITARGETSR253,Interrupt Processor Targets Register 253" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO1015 ,CPU Targets Byte Offset 1015" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO1014 ,CPU Targets Byte Offset 1014" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1013 ,CPU Targets Byte Offset 1013" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO1012 ,CPU Targets Byte Offset 1012" group.long 0xBF8++0x03 line.long 0x00 "GICD_ITARGETSR254,Interrupt Processor Targets Register 254" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO1019 ,CPU Targets Byte Offset 1019" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO1018 ,CPU Targets Byte Offset 1018" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1017 ,CPU Targets Byte Offset 1017" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO1016 ,CPU Targets Byte Offset 1016" else hgroup.long 0xBE0++0x03 hide.long 0x00 "GICD_ITARGETSR248,Interrupt Processor Targets Register 248" hgroup.long 0xBE4++0x03 hide.long 0x00 "GICD_ITARGETSR249,Interrupt Processor Targets Register 249" hgroup.long 0xBE8++0x03 hide.long 0x00 "GICD_ITARGETSR250,Interrupt Processor Targets Register 250" hgroup.long 0xBEC++0x03 hide.long 0x00 "GICD_ITARGETSR251,Interrupt Processor Targets Register 251" hgroup.long 0xBF0++0x03 hide.long 0x00 "GICD_ITARGETSR252,Interrupt Processor Targets Register 252" hgroup.long 0xBF4++0x03 hide.long 0x00 "GICD_ITARGETSR253,Interrupt Processor Targets Register 253" hgroup.long 0xBF8++0x03 hide.long 0x00 "GICD_ITARGETSR254,Interrupt Processor Targets Register 254" endif else hgroup.long 0x800++0x03 hide.long 0x00 "GICD_ITARGETSR0 ,Interrupt Processor Targets Register 0 " hgroup.long 0x804++0x03 hide.long 0x00 "GICD_ITARGETSR1 ,Interrupt Processor Targets Register 1 " hgroup.long 0x808++0x03 hide.long 0x00 "GICD_ITARGETSR2 ,Interrupt Processor Targets Register 2 " hgroup.long 0x80C++0x03 hide.long 0x00 "GICD_ITARGETSR3 ,Interrupt Processor Targets Register 3 " hgroup.long 0x810++0x03 hide.long 0x00 "GICD_ITARGETSR4 ,Interrupt Processor Targets Register 4 " hgroup.long 0x814++0x03 hide.long 0x00 "GICD_ITARGETSR5 ,Interrupt Processor Targets Register 5 " hgroup.long 0x818++0x03 hide.long 0x00 "GICD_ITARGETSR6 ,Interrupt Processor Targets Register 6 " hgroup.long 0x81C++0x03 hide.long 0x00 "GICD_ITARGETSR7 ,Interrupt Processor Targets Register 7 " hgroup.long 0x820++0x03 hide.long 0x00 "GICD_ITARGETSR8 ,Interrupt Processor Targets Register 8 " hgroup.long 0x824++0x03 hide.long 0x00 "GICD_ITARGETSR9 ,Interrupt Processor Targets Register 9 " hgroup.long 0x828++0x03 hide.long 0x00 "GICD_ITARGETSR10 ,Interrupt Processor Targets Register 10 " hgroup.long 0x82C++0x03 hide.long 0x00 "GICD_ITARGETSR11 ,Interrupt Processor Targets Register 11 " hgroup.long 0x830++0x03 hide.long 0x00 "GICD_ITARGETSR12 ,Interrupt Processor Targets Register 12 " hgroup.long 0x834++0x03 hide.long 0x00 "GICD_ITARGETSR13 ,Interrupt Processor Targets Register 13 " hgroup.long 0x838++0x03 hide.long 0x00 "GICD_ITARGETSR14 ,Interrupt Processor Targets Register 14 " hgroup.long 0x83C++0x03 hide.long 0x00 "GICD_ITARGETSR15 ,Interrupt Processor Targets Register 15 " hgroup.long 0x840++0x03 hide.long 0x00 "GICD_ITARGETSR16 ,Interrupt Processor Targets Register 16 " hgroup.long 0x844++0x03 hide.long 0x00 "GICD_ITARGETSR17 ,Interrupt Processor Targets Register 17 " hgroup.long 0x848++0x03 hide.long 0x00 "GICD_ITARGETSR18 ,Interrupt Processor Targets Register 18 " hgroup.long 0x84C++0x03 hide.long 0x00 "GICD_ITARGETSR19 ,Interrupt Processor Targets Register 19 " hgroup.long 0x850++0x03 hide.long 0x00 "GICD_ITARGETSR20 ,Interrupt Processor Targets Register 20 " hgroup.long 0x854++0x03 hide.long 0x00 "GICD_ITARGETSR21 ,Interrupt Processor Targets Register 21 " hgroup.long 0x858++0x03 hide.long 0x00 "GICD_ITARGETSR22 ,Interrupt Processor Targets Register 22 " hgroup.long 0x85C++0x03 hide.long 0x00 "GICD_ITARGETSR23 ,Interrupt Processor Targets Register 23 " hgroup.long 0x860++0x03 hide.long 0x00 "GICD_ITARGETSR24 ,Interrupt Processor Targets Register 24 " hgroup.long 0x864++0x03 hide.long 0x00 "GICD_ITARGETSR25 ,Interrupt Processor Targets Register 25 " hgroup.long 0x868++0x03 hide.long 0x00 "GICD_ITARGETSR26 ,Interrupt Processor Targets Register 26 " hgroup.long 0x86C++0x03 hide.long 0x00 "GICD_ITARGETSR27 ,Interrupt Processor Targets Register 27 " hgroup.long 0x870++0x03 hide.long 0x00 "GICD_ITARGETSR28 ,Interrupt Processor Targets Register 28 " hgroup.long 0x874++0x03 hide.long 0x00 "GICD_ITARGETSR29 ,Interrupt Processor Targets Register 29 " hgroup.long 0x878++0x03 hide.long 0x00 "GICD_ITARGETSR30 ,Interrupt Processor Targets Register 30 " hgroup.long 0x87C++0x03 hide.long 0x00 "GICD_ITARGETSR31 ,Interrupt Processor Targets Register 31 " hgroup.long 0x880++0x03 hide.long 0x00 "GICD_ITARGETSR32 ,Interrupt Processor Targets Register 32 " hgroup.long 0x884++0x03 hide.long 0x00 "GICD_ITARGETSR33 ,Interrupt Processor Targets Register 33 " hgroup.long 0x888++0x03 hide.long 0x00 "GICD_ITARGETSR34 ,Interrupt Processor Targets Register 34 " hgroup.long 0x88C++0x03 hide.long 0x00 "GICD_ITARGETSR35 ,Interrupt Processor Targets Register 35 " hgroup.long 0x890++0x03 hide.long 0x00 "GICD_ITARGETSR36 ,Interrupt Processor Targets Register 36 " hgroup.long 0x894++0x03 hide.long 0x00 "GICD_ITARGETSR37 ,Interrupt Processor Targets Register 37 " hgroup.long 0x898++0x03 hide.long 0x00 "GICD_ITARGETSR38 ,Interrupt Processor Targets Register 38 " hgroup.long 0x89C++0x03 hide.long 0x00 "GICD_ITARGETSR39 ,Interrupt Processor Targets Register 39 " hgroup.long 0x8A0++0x03 hide.long 0x00 "GICD_ITARGETSR40 ,Interrupt Processor Targets Register 40 " hgroup.long 0x8A4++0x03 hide.long 0x00 "GICD_ITARGETSR41 ,Interrupt Processor Targets Register 41 " hgroup.long 0x8A8++0x03 hide.long 0x00 "GICD_ITARGETSR42 ,Interrupt Processor Targets Register 42 " hgroup.long 0x8AC++0x03 hide.long 0x00 "GICD_ITARGETSR43 ,Interrupt Processor Targets Register 43 " hgroup.long 0x8B0++0x03 hide.long 0x00 "GICD_ITARGETSR44 ,Interrupt Processor Targets Register 44 " hgroup.long 0x8B4++0x03 hide.long 0x00 "GICD_ITARGETSR45 ,Interrupt Processor Targets Register 45 " hgroup.long 0x8B8++0x03 hide.long 0x00 "GICD_ITARGETSR46 ,Interrupt Processor Targets Register 46 " hgroup.long 0x8BC++0x03 hide.long 0x00 "GICD_ITARGETSR47 ,Interrupt Processor Targets Register 47 " hgroup.long 0x8C0++0x03 hide.long 0x00 "GICD_ITARGETSR48 ,Interrupt Processor Targets Register 48 " hgroup.long 0x8C4++0x03 hide.long 0x00 "GICD_ITARGETSR49 ,Interrupt Processor Targets Register 49 " hgroup.long 0x8C8++0x03 hide.long 0x00 "GICD_ITARGETSR50 ,Interrupt Processor Targets Register 50 " hgroup.long 0x8CC++0x03 hide.long 0x00 "GICD_ITARGETSR51 ,Interrupt Processor Targets Register 51 " hgroup.long 0x8D0++0x03 hide.long 0x00 "GICD_ITARGETSR52 ,Interrupt Processor Targets Register 52 " hgroup.long 0x8D4++0x03 hide.long 0x00 "GICD_ITARGETSR53 ,Interrupt Processor Targets Register 53 " hgroup.long 0x8D8++0x03 hide.long 0x00 "GICD_ITARGETSR54 ,Interrupt Processor Targets Register 54 " hgroup.long 0x8DC++0x03 hide.long 0x00 "GICD_ITARGETSR55 ,Interrupt Processor Targets Register 55 " hgroup.long 0x8E0++0x03 hide.long 0x00 "GICD_ITARGETSR56 ,Interrupt Processor Targets Register 56 " hgroup.long 0x8E4++0x03 hide.long 0x00 "GICD_ITARGETSR57 ,Interrupt Processor Targets Register 57 " hgroup.long 0x8E8++0x03 hide.long 0x00 "GICD_ITARGETSR58 ,Interrupt Processor Targets Register 58 " hgroup.long 0x8EC++0x03 hide.long 0x00 "GICD_ITARGETSR59 ,Interrupt Processor Targets Register 59 " hgroup.long 0x8F0++0x03 hide.long 0x00 "GICD_ITARGETSR60 ,Interrupt Processor Targets Register 60 " hgroup.long 0x8F4++0x03 hide.long 0x00 "GICD_ITARGETSR61 ,Interrupt Processor Targets Register 61 " hgroup.long 0x8F8++0x03 hide.long 0x00 "GICD_ITARGETSR62 ,Interrupt Processor Targets Register 62 " hgroup.long 0x8FC++0x03 hide.long 0x00 "GICD_ITARGETSR63 ,Interrupt Processor Targets Register 63 " hgroup.long 0x900++0x03 hide.long 0x00 "GICD_ITARGETSR64 ,Interrupt Processor Targets Register 64 " hgroup.long 0x904++0x03 hide.long 0x00 "GICD_ITARGETSR65 ,Interrupt Processor Targets Register 65 " hgroup.long 0x908++0x03 hide.long 0x00 "GICD_ITARGETSR66 ,Interrupt Processor Targets Register 66 " hgroup.long 0x90C++0x03 hide.long 0x00 "GICD_ITARGETSR67 ,Interrupt Processor Targets Register 67 " hgroup.long 0x910++0x03 hide.long 0x00 "GICD_ITARGETSR68 ,Interrupt Processor Targets Register 68 " hgroup.long 0x914++0x03 hide.long 0x00 "GICD_ITARGETSR69 ,Interrupt Processor Targets Register 69 " hgroup.long 0x918++0x03 hide.long 0x00 "GICD_ITARGETSR70 ,Interrupt Processor Targets Register 70 " hgroup.long 0x91C++0x03 hide.long 0x00 "GICD_ITARGETSR71 ,Interrupt Processor Targets Register 71 " hgroup.long 0x920++0x03 hide.long 0x00 "GICD_ITARGETSR72 ,Interrupt Processor Targets Register 72 " hgroup.long 0x924++0x03 hide.long 0x00 "GICD_ITARGETSR73 ,Interrupt Processor Targets Register 73 " hgroup.long 0x928++0x03 hide.long 0x00 "GICD_ITARGETSR74 ,Interrupt Processor Targets Register 74 " hgroup.long 0x92C++0x03 hide.long 0x00 "GICD_ITARGETSR75 ,Interrupt Processor Targets Register 75 " hgroup.long 0x930++0x03 hide.long 0x00 "GICD_ITARGETSR76 ,Interrupt Processor Targets Register 76 " hgroup.long 0x934++0x03 hide.long 0x00 "GICD_ITARGETSR77 ,Interrupt Processor Targets Register 77 " hgroup.long 0x938++0x03 hide.long 0x00 "GICD_ITARGETSR78 ,Interrupt Processor Targets Register 78 " hgroup.long 0x93C++0x03 hide.long 0x00 "GICD_ITARGETSR79 ,Interrupt Processor Targets Register 79 " hgroup.long 0x940++0x03 hide.long 0x00 "GICD_ITARGETSR80 ,Interrupt Processor Targets Register 80 " hgroup.long 0x944++0x03 hide.long 0x00 "GICD_ITARGETSR81 ,Interrupt Processor Targets Register 81 " hgroup.long 0x948++0x03 hide.long 0x00 "GICD_ITARGETSR82 ,Interrupt Processor Targets Register 82 " hgroup.long 0x94C++0x03 hide.long 0x00 "GICD_ITARGETSR83 ,Interrupt Processor Targets Register 83 " hgroup.long 0x950++0x03 hide.long 0x00 "GICD_ITARGETSR84 ,Interrupt Processor Targets Register 84 " hgroup.long 0x954++0x03 hide.long 0x00 "GICD_ITARGETSR85 ,Interrupt Processor Targets Register 85 " hgroup.long 0x958++0x03 hide.long 0x00 "GICD_ITARGETSR86 ,Interrupt Processor Targets Register 86 " hgroup.long 0x95C++0x03 hide.long 0x00 "GICD_ITARGETSR87 ,Interrupt Processor Targets Register 87 " hgroup.long 0x960++0x03 hide.long 0x00 "GICD_ITARGETSR88 ,Interrupt Processor Targets Register 88 " hgroup.long 0x964++0x03 hide.long 0x00 "GICD_ITARGETSR89 ,Interrupt Processor Targets Register 89 " hgroup.long 0x968++0x03 hide.long 0x00 "GICD_ITARGETSR90 ,Interrupt Processor Targets Register 90 " hgroup.long 0x96C++0x03 hide.long 0x00 "GICD_ITARGETSR91 ,Interrupt Processor Targets Register 91 " hgroup.long 0x970++0x03 hide.long 0x00 "GICD_ITARGETSR92 ,Interrupt Processor Targets Register 92 " hgroup.long 0x974++0x03 hide.long 0x00 "GICD_ITARGETSR93 ,Interrupt Processor Targets Register 93 " hgroup.long 0x978++0x03 hide.long 0x00 "GICD_ITARGETSR94 ,Interrupt Processor Targets Register 94 " hgroup.long 0x97C++0x03 hide.long 0x00 "GICD_ITARGETSR95 ,Interrupt Processor Targets Register 95 " hgroup.long 0x980++0x03 hide.long 0x00 "GICD_ITARGETSR96 ,Interrupt Processor Targets Register 96 " hgroup.long 0x984++0x03 hide.long 0x00 "GICD_ITARGETSR97 ,Interrupt Processor Targets Register 97 " hgroup.long 0x988++0x03 hide.long 0x00 "GICD_ITARGETSR98 ,Interrupt Processor Targets Register 98 " hgroup.long 0x98C++0x03 hide.long 0x00 "GICD_ITARGETSR99 ,Interrupt Processor Targets Register 99 " hgroup.long 0x990++0x03 hide.long 0x00 "GICD_ITARGETSR100,Interrupt Processor Targets Register 100" hgroup.long 0x994++0x03 hide.long 0x00 "GICD_ITARGETSR101,Interrupt Processor Targets Register 101" hgroup.long 0x998++0x03 hide.long 0x00 "GICD_ITARGETSR102,Interrupt Processor Targets Register 102" hgroup.long 0x99C++0x03 hide.long 0x00 "GICD_ITARGETSR103,Interrupt Processor Targets Register 103" hgroup.long 0x9A0++0x03 hide.long 0x00 "GICD_ITARGETSR104,Interrupt Processor Targets Register 104" hgroup.long 0x9A4++0x03 hide.long 0x00 "GICD_ITARGETSR105,Interrupt Processor Targets Register 105" hgroup.long 0x9A8++0x03 hide.long 0x00 "GICD_ITARGETSR106,Interrupt Processor Targets Register 106" hgroup.long 0x9AC++0x03 hide.long 0x00 "GICD_ITARGETSR107,Interrupt Processor Targets Register 107" hgroup.long 0x9B0++0x03 hide.long 0x00 "GICD_ITARGETSR108,Interrupt Processor Targets Register 108" hgroup.long 0x9B4++0x03 hide.long 0x00 "GICD_ITARGETSR109,Interrupt Processor Targets Register 109" hgroup.long 0x9B8++0x03 hide.long 0x00 "GICD_ITARGETSR110,Interrupt Processor Targets Register 110" hgroup.long 0x9BC++0x03 hide.long 0x00 "GICD_ITARGETSR111,Interrupt Processor Targets Register 111" hgroup.long 0x9C0++0x03 hide.long 0x00 "GICD_ITARGETSR112,Interrupt Processor Targets Register 112" hgroup.long 0x9C4++0x03 hide.long 0x00 "GICD_ITARGETSR113,Interrupt Processor Targets Register 113" hgroup.long 0x9C8++0x03 hide.long 0x00 "GICD_ITARGETSR114,Interrupt Processor Targets Register 114" hgroup.long 0x9CC++0x03 hide.long 0x00 "GICD_ITARGETSR115,Interrupt Processor Targets Register 115" hgroup.long 0x9D0++0x03 hide.long 0x00 "GICD_ITARGETSR116,Interrupt Processor Targets Register 116" hgroup.long 0x9D4++0x03 hide.long 0x00 "GICD_ITARGETSR117,Interrupt Processor Targets Register 117" hgroup.long 0x9D8++0x03 hide.long 0x00 "GICD_ITARGETSR118,Interrupt Processor Targets Register 118" hgroup.long 0x9DC++0x03 hide.long 0x00 "GICD_ITARGETSR119,Interrupt Processor Targets Register 119" hgroup.long 0x9E0++0x03 hide.long 0x00 "GICD_ITARGETSR120,Interrupt Processor Targets Register 120" hgroup.long 0x9E4++0x03 hide.long 0x00 "GICD_ITARGETSR121,Interrupt Processor Targets Register 121" hgroup.long 0x9E8++0x03 hide.long 0x00 "GICD_ITARGETSR122,Interrupt Processor Targets Register 122" hgroup.long 0x9EC++0x03 hide.long 0x00 "GICD_ITARGETSR123,Interrupt Processor Targets Register 123" hgroup.long 0x9F0++0x03 hide.long 0x00 "GICD_ITARGETSR124,Interrupt Processor Targets Register 124" hgroup.long 0x9F4++0x03 hide.long 0x00 "GICD_ITARGETSR125,Interrupt Processor Targets Register 125" hgroup.long 0x9F8++0x03 hide.long 0x00 "GICD_ITARGETSR126,Interrupt Processor Targets Register 126" hgroup.long 0x9FC++0x03 hide.long 0x00 "GICD_ITARGETSR127,Interrupt Processor Targets Register 127" hgroup.long 0xA00++0x03 hide.long 0x00 "GICD_ITARGETSR128,Interrupt Processor Targets Register 128" hgroup.long 0xA04++0x03 hide.long 0x00 "GICD_ITARGETSR129,Interrupt Processor Targets Register 129" hgroup.long 0xA08++0x03 hide.long 0x00 "GICD_ITARGETSR130,Interrupt Processor Targets Register 130" hgroup.long 0xA0C++0x03 hide.long 0x00 "GICD_ITARGETSR131,Interrupt Processor Targets Register 131" hgroup.long 0xA10++0x03 hide.long 0x00 "GICD_ITARGETSR132,Interrupt Processor Targets Register 132" hgroup.long 0xA14++0x03 hide.long 0x00 "GICD_ITARGETSR133,Interrupt Processor Targets Register 133" hgroup.long 0xA18++0x03 hide.long 0x00 "GICD_ITARGETSR134,Interrupt Processor Targets Register 134" hgroup.long 0xA1C++0x03 hide.long 0x00 "GICD_ITARGETSR135,Interrupt Processor Targets Register 135" hgroup.long 0xA20++0x03 hide.long 0x00 "GICD_ITARGETSR136,Interrupt Processor Targets Register 136" hgroup.long 0xA24++0x03 hide.long 0x00 "GICD_ITARGETSR137,Interrupt Processor Targets Register 137" hgroup.long 0xA28++0x03 hide.long 0x00 "GICD_ITARGETSR138,Interrupt Processor Targets Register 138" hgroup.long 0xA2C++0x03 hide.long 0x00 "GICD_ITARGETSR139,Interrupt Processor Targets Register 139" hgroup.long 0xA30++0x03 hide.long 0x00 "GICD_ITARGETSR140,Interrupt Processor Targets Register 140" hgroup.long 0xA34++0x03 hide.long 0x00 "GICD_ITARGETSR141,Interrupt Processor Targets Register 141" hgroup.long 0xA38++0x03 hide.long 0x00 "GICD_ITARGETSR142,Interrupt Processor Targets Register 142" hgroup.long 0xA3C++0x03 hide.long 0x00 "GICD_ITARGETSR143,Interrupt Processor Targets Register 143" hgroup.long 0xA40++0x03 hide.long 0x00 "GICD_ITARGETSR144,Interrupt Processor Targets Register 144" hgroup.long 0xA44++0x03 hide.long 0x00 "GICD_ITARGETSR145,Interrupt Processor Targets Register 145" hgroup.long 0xA48++0x03 hide.long 0x00 "GICD_ITARGETSR146,Interrupt Processor Targets Register 146" hgroup.long 0xA4C++0x03 hide.long 0x00 "GICD_ITARGETSR147,Interrupt Processor Targets Register 147" hgroup.long 0xA50++0x03 hide.long 0x00 "GICD_ITARGETSR148,Interrupt Processor Targets Register 148" hgroup.long 0xA54++0x03 hide.long 0x00 "GICD_ITARGETSR149,Interrupt Processor Targets Register 149" hgroup.long 0xA58++0x03 hide.long 0x00 "GICD_ITARGETSR150,Interrupt Processor Targets Register 150" hgroup.long 0xA5C++0x03 hide.long 0x00 "GICD_ITARGETSR151,Interrupt Processor Targets Register 151" hgroup.long 0xA60++0x03 hide.long 0x00 "GICD_ITARGETSR152,Interrupt Processor Targets Register 152" hgroup.long 0xA64++0x03 hide.long 0x00 "GICD_ITARGETSR153,Interrupt Processor Targets Register 153" hgroup.long 0xA68++0x03 hide.long 0x00 "GICD_ITARGETSR154,Interrupt Processor Targets Register 154" hgroup.long 0xA6C++0x03 hide.long 0x00 "GICD_ITARGETSR155,Interrupt Processor Targets Register 155" hgroup.long 0xA70++0x03 hide.long 0x00 "GICD_ITARGETSR156,Interrupt Processor Targets Register 156" hgroup.long 0xA74++0x03 hide.long 0x00 "GICD_ITARGETSR157,Interrupt Processor Targets Register 157" hgroup.long 0xA78++0x03 hide.long 0x00 "GICD_ITARGETSR158,Interrupt Processor Targets Register 158" hgroup.long 0xA7C++0x03 hide.long 0x00 "GICD_ITARGETSR159,Interrupt Processor Targets Register 159" hgroup.long 0xA80++0x03 hide.long 0x00 "GICD_ITARGETSR160,Interrupt Processor Targets Register 160" hgroup.long 0xA84++0x03 hide.long 0x00 "GICD_ITARGETSR161,Interrupt Processor Targets Register 161" hgroup.long 0xA88++0x03 hide.long 0x00 "GICD_ITARGETSR162,Interrupt Processor Targets Register 162" hgroup.long 0xA8C++0x03 hide.long 0x00 "GICD_ITARGETSR163,Interrupt Processor Targets Register 163" hgroup.long 0xA90++0x03 hide.long 0x00 "GICD_ITARGETSR164,Interrupt Processor Targets Register 164" hgroup.long 0xA94++0x03 hide.long 0x00 "GICD_ITARGETSR165,Interrupt Processor Targets Register 165" hgroup.long 0xA98++0x03 hide.long 0x00 "GICD_ITARGETSR166,Interrupt Processor Targets Register 166" hgroup.long 0xA9C++0x03 hide.long 0x00 "GICD_ITARGETSR167,Interrupt Processor Targets Register 167" hgroup.long 0xAA0++0x03 hide.long 0x00 "GICD_ITARGETSR168,Interrupt Processor Targets Register 168" hgroup.long 0xAA4++0x03 hide.long 0x00 "GICD_ITARGETSR169,Interrupt Processor Targets Register 169" hgroup.long 0xAA8++0x03 hide.long 0x00 "GICD_ITARGETSR170,Interrupt Processor Targets Register 170" hgroup.long 0xAAC++0x03 hide.long 0x00 "GICD_ITARGETSR171,Interrupt Processor Targets Register 171" hgroup.long 0xAB0++0x03 hide.long 0x00 "GICD_ITARGETSR172,Interrupt Processor Targets Register 172" hgroup.long 0xAB4++0x03 hide.long 0x00 "GICD_ITARGETSR173,Interrupt Processor Targets Register 173" hgroup.long 0xAB8++0x03 hide.long 0x00 "GICD_ITARGETSR174,Interrupt Processor Targets Register 174" hgroup.long 0xABC++0x03 hide.long 0x00 "GICD_ITARGETSR175,Interrupt Processor Targets Register 175" hgroup.long 0xAC0++0x03 hide.long 0x00 "GICD_ITARGETSR176,Interrupt Processor Targets Register 176" hgroup.long 0xAC4++0x03 hide.long 0x00 "GICD_ITARGETSR177,Interrupt Processor Targets Register 177" hgroup.long 0xAC8++0x03 hide.long 0x00 "GICD_ITARGETSR178,Interrupt Processor Targets Register 178" hgroup.long 0xACC++0x03 hide.long 0x00 "GICD_ITARGETSR179,Interrupt Processor Targets Register 179" hgroup.long 0xAD0++0x03 hide.long 0x00 "GICD_ITARGETSR180,Interrupt Processor Targets Register 180" hgroup.long 0xAD4++0x03 hide.long 0x00 "GICD_ITARGETSR181,Interrupt Processor Targets Register 181" hgroup.long 0xAD8++0x03 hide.long 0x00 "GICD_ITARGETSR182,Interrupt Processor Targets Register 182" hgroup.long 0xADC++0x03 hide.long 0x00 "GICD_ITARGETSR183,Interrupt Processor Targets Register 183" hgroup.long 0xAE0++0x03 hide.long 0x00 "GICD_ITARGETSR184,Interrupt Processor Targets Register 184" hgroup.long 0xAE4++0x03 hide.long 0x00 "GICD_ITARGETSR185,Interrupt Processor Targets Register 185" hgroup.long 0xAE8++0x03 hide.long 0x00 "GICD_ITARGETSR186,Interrupt Processor Targets Register 186" hgroup.long 0xAEC++0x03 hide.long 0x00 "GICD_ITARGETSR187,Interrupt Processor Targets Register 187" hgroup.long 0xAF0++0x03 hide.long 0x00 "GICD_ITARGETSR188,Interrupt Processor Targets Register 188" hgroup.long 0xAF4++0x03 hide.long 0x00 "GICD_ITARGETSR189,Interrupt Processor Targets Register 189" hgroup.long 0xAF8++0x03 hide.long 0x00 "GICD_ITARGETSR190,Interrupt Processor Targets Register 190" hgroup.long 0xAFC++0x03 hide.long 0x00 "GICD_ITARGETSR191,Interrupt Processor Targets Register 191" hgroup.long 0xB00++0x03 hide.long 0x00 "GICD_ITARGETSR192,Interrupt Processor Targets Register 192" hgroup.long 0xB04++0x03 hide.long 0x00 "GICD_ITARGETSR193,Interrupt Processor Targets Register 193" hgroup.long 0xB08++0x03 hide.long 0x00 "GICD_ITARGETSR194,Interrupt Processor Targets Register 194" hgroup.long 0xB0C++0x03 hide.long 0x00 "GICD_ITARGETSR195,Interrupt Processor Targets Register 195" hgroup.long 0xB10++0x03 hide.long 0x00 "GICD_ITARGETSR196,Interrupt Processor Targets Register 196" hgroup.long 0xB14++0x03 hide.long 0x00 "GICD_ITARGETSR197,Interrupt Processor Targets Register 197" hgroup.long 0xB18++0x03 hide.long 0x00 "GICD_ITARGETSR198,Interrupt Processor Targets Register 198" hgroup.long 0xB1C++0x03 hide.long 0x00 "GICD_ITARGETSR199,Interrupt Processor Targets Register 199" hgroup.long 0xB20++0x03 hide.long 0x00 "GICD_ITARGETSR200,Interrupt Processor Targets Register 200" hgroup.long 0xB24++0x03 hide.long 0x00 "GICD_ITARGETSR201,Interrupt Processor Targets Register 201" hgroup.long 0xB28++0x03 hide.long 0x00 "GICD_ITARGETSR202,Interrupt Processor Targets Register 202" hgroup.long 0xB2C++0x03 hide.long 0x00 "GICD_ITARGETSR203,Interrupt Processor Targets Register 203" hgroup.long 0xB30++0x03 hide.long 0x00 "GICD_ITARGETSR204,Interrupt Processor Targets Register 204" hgroup.long 0xB34++0x03 hide.long 0x00 "GICD_ITARGETSR205,Interrupt Processor Targets Register 205" hgroup.long 0xB38++0x03 hide.long 0x00 "GICD_ITARGETSR206,Interrupt Processor Targets Register 206" hgroup.long 0xB3C++0x03 hide.long 0x00 "GICD_ITARGETSR207,Interrupt Processor Targets Register 207" hgroup.long 0xB40++0x03 hide.long 0x00 "GICD_ITARGETSR208,Interrupt Processor Targets Register 208" hgroup.long 0xB44++0x03 hide.long 0x00 "GICD_ITARGETSR209,Interrupt Processor Targets Register 209" hgroup.long 0xB48++0x03 hide.long 0x00 "GICD_ITARGETSR210,Interrupt Processor Targets Register 210" hgroup.long 0xB4C++0x03 hide.long 0x00 "GICD_ITARGETSR211,Interrupt Processor Targets Register 211" hgroup.long 0xB50++0x03 hide.long 0x00 "GICD_ITARGETSR212,Interrupt Processor Targets Register 212" hgroup.long 0xB54++0x03 hide.long 0x00 "GICD_ITARGETSR213,Interrupt Processor Targets Register 213" hgroup.long 0xB58++0x03 hide.long 0x00 "GICD_ITARGETSR214,Interrupt Processor Targets Register 214" hgroup.long 0xB5C++0x03 hide.long 0x00 "GICD_ITARGETSR215,Interrupt Processor Targets Register 215" hgroup.long 0xB60++0x03 hide.long 0x00 "GICD_ITARGETSR216,Interrupt Processor Targets Register 216" hgroup.long 0xB64++0x03 hide.long 0x00 "GICD_ITARGETSR217,Interrupt Processor Targets Register 217" hgroup.long 0xB68++0x03 hide.long 0x00 "GICD_ITARGETSR218,Interrupt Processor Targets Register 218" hgroup.long 0xB6C++0x03 hide.long 0x00 "GICD_ITARGETSR219,Interrupt Processor Targets Register 219" hgroup.long 0xB70++0x03 hide.long 0x00 "GICD_ITARGETSR220,Interrupt Processor Targets Register 220" hgroup.long 0xB74++0x03 hide.long 0x00 "GICD_ITARGETSR221,Interrupt Processor Targets Register 221" hgroup.long 0xB78++0x03 hide.long 0x00 "GICD_ITARGETSR222,Interrupt Processor Targets Register 222" hgroup.long 0xB7C++0x03 hide.long 0x00 "GICD_ITARGETSR223,Interrupt Processor Targets Register 223" hgroup.long 0xB80++0x03 hide.long 0x00 "GICD_ITARGETSR224,Interrupt Processor Targets Register 224" hgroup.long 0xB84++0x03 hide.long 0x00 "GICD_ITARGETSR225,Interrupt Processor Targets Register 225" hgroup.long 0xB88++0x03 hide.long 0x00 "GICD_ITARGETSR226,Interrupt Processor Targets Register 226" hgroup.long 0xB8C++0x03 hide.long 0x00 "GICD_ITARGETSR227,Interrupt Processor Targets Register 227" hgroup.long 0xB90++0x03 hide.long 0x00 "GICD_ITARGETSR228,Interrupt Processor Targets Register 228" hgroup.long 0xB94++0x03 hide.long 0x00 "GICD_ITARGETSR229,Interrupt Processor Targets Register 229" hgroup.long 0xB98++0x03 hide.long 0x00 "GICD_ITARGETSR230,Interrupt Processor Targets Register 230" hgroup.long 0xB9C++0x03 hide.long 0x00 "GICD_ITARGETSR231,Interrupt Processor Targets Register 231" hgroup.long 0xBA0++0x03 hide.long 0x00 "GICD_ITARGETSR232,Interrupt Processor Targets Register 232" hgroup.long 0xBA4++0x03 hide.long 0x00 "GICD_ITARGETSR233,Interrupt Processor Targets Register 233" hgroup.long 0xBA8++0x03 hide.long 0x00 "GICD_ITARGETSR234,Interrupt Processor Targets Register 234" hgroup.long 0xBAC++0x03 hide.long 0x00 "GICD_ITARGETSR235,Interrupt Processor Targets Register 235" hgroup.long 0xBB0++0x03 hide.long 0x00 "GICD_ITARGETSR236,Interrupt Processor Targets Register 236" hgroup.long 0xBB4++0x03 hide.long 0x00 "GICD_ITARGETSR237,Interrupt Processor Targets Register 237" hgroup.long 0xBB8++0x03 hide.long 0x00 "GICD_ITARGETSR238,Interrupt Processor Targets Register 238" hgroup.long 0xBBC++0x03 hide.long 0x00 "GICD_ITARGETSR239,Interrupt Processor Targets Register 239" hgroup.long 0xBC0++0x03 hide.long 0x00 "GICD_ITARGETSR240,Interrupt Processor Targets Register 240" hgroup.long 0xBC4++0x03 hide.long 0x00 "GICD_ITARGETSR241,Interrupt Processor Targets Register 241" hgroup.long 0xBC8++0x03 hide.long 0x00 "GICD_ITARGETSR242,Interrupt Processor Targets Register 242" hgroup.long 0xBCC++0x03 hide.long 0x00 "GICD_ITARGETSR243,Interrupt Processor Targets Register 243" hgroup.long 0xBD0++0x03 hide.long 0x00 "GICD_ITARGETSR244,Interrupt Processor Targets Register 244" hgroup.long 0xBD4++0x03 hide.long 0x00 "GICD_ITARGETSR245,Interrupt Processor Targets Register 245" hgroup.long 0xBD8++0x03 hide.long 0x00 "GICD_ITARGETSR246,Interrupt Processor Targets Register 246" hgroup.long 0xBDC++0x03 hide.long 0x00 "GICD_ITARGETSR247,Interrupt Processor Targets Register 247" hgroup.long 0xBE0++0x03 hide.long 0x00 "GICD_ITARGETSR248,Interrupt Processor Targets Register 248" hgroup.long 0xBE4++0x03 hide.long 0x00 "GICD_ITARGETSR249,Interrupt Processor Targets Register 249" hgroup.long 0xBE8++0x03 hide.long 0x00 "GICD_ITARGETSR250,Interrupt Processor Targets Register 250" hgroup.long 0xBEC++0x03 hide.long 0x00 "GICD_ITARGETSR251,Interrupt Processor Targets Register 251" hgroup.long 0xBF0++0x03 hide.long 0x00 "GICD_ITARGETSR252,Interrupt Processor Targets Register 252" hgroup.long 0xBF4++0x03 hide.long 0x00 "GICD_ITARGETSR253,Interrupt Processor Targets Register 253" hgroup.long 0xBF8++0x03 hide.long 0x00 "GICD_ITARGETSR254,Interrupt Processor Targets Register 254" endif tree.end width 14. tree "Configuration Registers" hgroup.long 0xC00++0x03 hide.long 0x00 "GICD_ICFGR0,Interrupt Configuration Register" textline " " rgroup.long 0xC04++0x03 line.long 0x00 "GICD_ICFGR1,Interrupt Configuration Register" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x1) group.long 0xC08++0x03 line.long 0x00 "GICD_ICFGR2,Interrupt Configuration Register 2" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC0C++0x03 line.long 0x00 "GICD_ICFGR3,Interrupt Configuration Register 3" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else hgroup.long 0xC08++0x03 hide.long 0x00 "GICD_ICFGR2,Interrupt Configuration Register 2" hgroup.long 0xC0C++0x03 hide.long 0x00 "GICD_ICFGR3,Interrupt Configuration Register 3" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x2) group.long 0xC10++0x03 line.long 0x00 "GICD_ICFGR4,Interrupt Configuration Register 4" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC14++0x03 line.long 0x00 "GICD_ICFGR5,Interrupt Configuration Register 5" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else hgroup.long 0xC10++0x03 hide.long 0x00 "GICD_ICFGR4,Interrupt Configuration Register 4" hgroup.long 0xC14++0x03 hide.long 0x00 "GICD_ICFGR5,Interrupt Configuration Register 5" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x3) group.long 0xC18++0x03 line.long 0x00 "GICD_ICFGR6,Interrupt Configuration Register 6" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC1C++0x03 line.long 0x00 "GICD_ICFGR7,Interrupt Configuration Register 7" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else hgroup.long 0xC18++0x03 hide.long 0x00 "GICD_ICFGR6,Interrupt Configuration Register 6" hgroup.long 0xC1C++0x03 hide.long 0x00 "GICD_ICFGR7,Interrupt Configuration Register 7" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x4) group.long 0xC20++0x03 line.long 0x00 "GICD_ICFGR8,Interrupt Configuration Register 8" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC24++0x03 line.long 0x00 "GICD_ICFGR9,Interrupt Configuration Register 9" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else hgroup.long 0xC20++0x03 hide.long 0x00 "GICD_ICFGR8,Interrupt Configuration Register 8" hgroup.long 0xC24++0x03 hide.long 0x00 "GICD_ICFGR9,Interrupt Configuration Register 9" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x5) group.long 0xC28++0x03 line.long 0x00 "GICD_ICFGR10,Interrupt Configuration Register 10" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC2C++0x03 line.long 0x00 "GICD_ICFGR11,Interrupt Configuration Register 11" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else hgroup.long 0xC28++0x03 hide.long 0x00 "GICD_ICFGR10,Interrupt Configuration Register 10" hgroup.long 0xC2C++0x03 hide.long 0x00 "GICD_ICFGR11,Interrupt Configuration Register 11" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x6) group.long 0xC30++0x03 line.long 0x00 "GICD_ICFGR12,Interrupt Configuration Register 12" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC34++0x03 line.long 0x00 "GICD_ICFGR13,Interrupt Configuration Register 13" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else hgroup.long 0xC30++0x03 hide.long 0x00 "GICD_ICFGR12,Interrupt Configuration Register 12" hgroup.long 0xC34++0x03 hide.long 0x00 "GICD_ICFGR13,Interrupt Configuration Register 13" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x7) group.long 0xC38++0x03 line.long 0x00 "GICD_ICFGR14,Interrupt Configuration Register 14" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC3C++0x03 line.long 0x00 "GICD_ICFGR15,Interrupt Configuration Register 15" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else hgroup.long 0xC38++0x03 hide.long 0x00 "GICD_ICFGR14,Interrupt Configuration Register 14" hgroup.long 0xC3C++0x03 hide.long 0x00 "GICD_ICFGR15,Interrupt Configuration Register 15" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x8) group.long 0xC40++0x03 line.long 0x00 "GICD_ICFGR16,Interrupt Configuration Register 16" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC44++0x03 line.long 0x00 "GICD_ICFGR17,Interrupt Configuration Register 17" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else hgroup.long 0xC40++0x03 hide.long 0x00 "GICD_ICFGR16,Interrupt Configuration Register 16" hgroup.long 0xC44++0x03 hide.long 0x00 "GICD_ICFGR17,Interrupt Configuration Register 17" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x9) group.long 0xC48++0x03 line.long 0x00 "GICD_ICFGR18,Interrupt Configuration Register 18" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC4C++0x03 line.long 0x00 "GICD_ICFGR19,Interrupt Configuration Register 19" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else hgroup.long 0xC48++0x03 hide.long 0x00 "GICD_ICFGR18,Interrupt Configuration Register 18" hgroup.long 0xC4C++0x03 hide.long 0x00 "GICD_ICFGR19,Interrupt Configuration Register 19" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0xA) group.long 0xC50++0x03 line.long 0x00 "GICD_ICFGR20,Interrupt Configuration Register 20" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC54++0x03 line.long 0x00 "GICD_ICFGR21,Interrupt Configuration Register 21" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else hgroup.long 0xC50++0x03 hide.long 0x00 "GICD_ICFGR20,Interrupt Configuration Register 20" hgroup.long 0xC54++0x03 hide.long 0x00 "GICD_ICFGR21,Interrupt Configuration Register 21" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0xB) group.long 0xC58++0x03 line.long 0x00 "GICD_ICFGR22,Interrupt Configuration Register 22" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC5C++0x03 line.long 0x00 "GICD_ICFGR23,Interrupt Configuration Register 23" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else hgroup.long 0xC58++0x03 hide.long 0x00 "GICD_ICFGR22,Interrupt Configuration Register 22" hgroup.long 0xC5C++0x03 hide.long 0x00 "GICD_ICFGR23,Interrupt Configuration Register 23" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0xC) group.long 0xC60++0x03 line.long 0x00 "GICD_ICFGR24,Interrupt Configuration Register 24" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC64++0x03 line.long 0x00 "GICD_ICFGR25,Interrupt Configuration Register 25" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else hgroup.long 0xC60++0x03 hide.long 0x00 "GICD_ICFGR24,Interrupt Configuration Register 24" hgroup.long 0xC64++0x03 hide.long 0x00 "GICD_ICFGR25,Interrupt Configuration Register 25" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0xD) group.long 0xC68++0x03 line.long 0x00 "GICD_ICFGR26,Interrupt Configuration Register 26" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC6C++0x03 line.long 0x00 "GICD_ICFGR27,Interrupt Configuration Register 27" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else hgroup.long 0xC68++0x03 hide.long 0x00 "GICD_ICFGR26,Interrupt Configuration Register 26" hgroup.long 0xC6C++0x03 hide.long 0x00 "GICD_ICFGR27,Interrupt Configuration Register 27" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0xE) group.long 0xC70++0x03 line.long 0x00 "GICD_ICFGR28,Interrupt Configuration Register 28" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC74++0x03 line.long 0x00 "GICD_ICFGR29,Interrupt Configuration Register 29" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else hgroup.long 0xC70++0x03 hide.long 0x00 "GICD_ICFGR28,Interrupt Configuration Register 28" hgroup.long 0xC74++0x03 hide.long 0x00 "GICD_ICFGR29,Interrupt Configuration Register 29" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0xF) group.long 0xC78++0x03 line.long 0x00 "GICD_ICFGR30,Interrupt Configuration Register 30" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC7C++0x03 line.long 0x00 "GICD_ICFGR31,Interrupt Configuration Register 31" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else hgroup.long 0xC78++0x03 hide.long 0x00 "GICD_ICFGR30,Interrupt Configuration Register 30" hgroup.long 0xC7C++0x03 hide.long 0x00 "GICD_ICFGR31,Interrupt Configuration Register 31" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x10) group.long 0xC80++0x03 line.long 0x00 "GICD_ICFGR32,Interrupt Configuration Register 32" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC84++0x03 line.long 0x00 "GICD_ICFGR33,Interrupt Configuration Register 33" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else hgroup.long 0xC80++0x03 hide.long 0x00 "GICD_ICFGR32,Interrupt Configuration Register 32" hgroup.long 0xC84++0x03 hide.long 0x00 "GICD_ICFGR33,Interrupt Configuration Register 33" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x11) group.long 0xC88++0x03 line.long 0x00 "GICD_ICFGR34,Interrupt Configuration Register 34" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC8C++0x03 line.long 0x00 "GICD_ICFGR35,Interrupt Configuration Register 35" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else hgroup.long 0xC88++0x03 hide.long 0x00 "GICD_ICFGR34,Interrupt Configuration Register 34" hgroup.long 0xC8C++0x03 hide.long 0x00 "GICD_ICFGR35,Interrupt Configuration Register 35" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x12) group.long 0xC90++0x03 line.long 0x00 "GICD_ICFGR36,Interrupt Configuration Register 36" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC94++0x03 line.long 0x00 "GICD_ICFGR37,Interrupt Configuration Register 37" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else hgroup.long 0xC90++0x03 hide.long 0x00 "GICD_ICFGR36,Interrupt Configuration Register 36" hgroup.long 0xC94++0x03 hide.long 0x00 "GICD_ICFGR37,Interrupt Configuration Register 37" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x13) group.long 0xC98++0x03 line.long 0x00 "GICD_ICFGR38,Interrupt Configuration Register 38" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC9C++0x03 line.long 0x00 "GICD_ICFGR39,Interrupt Configuration Register 39" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else hgroup.long 0xC98++0x03 hide.long 0x00 "GICD_ICFGR38,Interrupt Configuration Register 38" hgroup.long 0xC9C++0x03 hide.long 0x00 "GICD_ICFGR39,Interrupt Configuration Register 39" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x14) group.long 0xCA0++0x03 line.long 0x00 "GICD_ICFGR40,Interrupt Configuration Register 40" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCA4++0x03 line.long 0x00 "GICD_ICFGR41,Interrupt Configuration Register 41" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else hgroup.long 0xCA0++0x03 hide.long 0x00 "GICD_ICFGR40,Interrupt Configuration Register 40" hgroup.long 0xCA4++0x03 hide.long 0x00 "GICD_ICFGR41,Interrupt Configuration Register 41" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x15) group.long 0xCA8++0x03 line.long 0x00 "GICD_ICFGR42,Interrupt Configuration Register 42" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCAC++0x03 line.long 0x00 "GICD_ICFGR43,Interrupt Configuration Register 43" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else hgroup.long 0xCA8++0x03 hide.long 0x00 "GICD_ICFGR42,Interrupt Configuration Register 42" hgroup.long 0xCAC++0x03 hide.long 0x00 "GICD_ICFGR43,Interrupt Configuration Register 43" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x16) group.long 0xCB0++0x03 line.long 0x00 "GICD_ICFGR44,Interrupt Configuration Register 44" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCB4++0x03 line.long 0x00 "GICD_ICFGR45,Interrupt Configuration Register 45" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else hgroup.long 0xCB0++0x03 hide.long 0x00 "GICD_ICFGR44,Interrupt Configuration Register 44" hgroup.long 0xCB4++0x03 hide.long 0x00 "GICD_ICFGR45,Interrupt Configuration Register 45" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x17) group.long 0xCB8++0x03 line.long 0x00 "GICD_ICFGR46,Interrupt Configuration Register 46" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCBC++0x03 line.long 0x00 "GICD_ICFGR47,Interrupt Configuration Register 47" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else hgroup.long 0xCB8++0x03 hide.long 0x00 "GICD_ICFGR46,Interrupt Configuration Register 46" hgroup.long 0xCBC++0x03 hide.long 0x00 "GICD_ICFGR47,Interrupt Configuration Register 47" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x18) group.long 0xCC0++0x03 line.long 0x00 "GICD_ICFGR48,Interrupt Configuration Register 48" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCC4++0x03 line.long 0x00 "GICD_ICFGR49,Interrupt Configuration Register 49" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else hgroup.long 0xCC0++0x03 hide.long 0x00 "GICD_ICFGR48,Interrupt Configuration Register 48" hgroup.long 0xCC4++0x03 hide.long 0x00 "GICD_ICFGR49,Interrupt Configuration Register 49" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x19) group.long 0xCC8++0x03 line.long 0x00 "GICD_ICFGR50,Interrupt Configuration Register 50" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCCC++0x03 line.long 0x00 "GICD_ICFGR51,Interrupt Configuration Register 51" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else hgroup.long 0xCC8++0x03 hide.long 0x00 "GICD_ICFGR50,Interrupt Configuration Register 50" hgroup.long 0xCCC++0x03 hide.long 0x00 "GICD_ICFGR51,Interrupt Configuration Register 51" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x1A) group.long 0xCD0++0x03 line.long 0x00 "GICD_ICFGR52,Interrupt Configuration Register 52" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCD4++0x03 line.long 0x00 "GICD_ICFGR53,Interrupt Configuration Register 53" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else hgroup.long 0xCD0++0x03 hide.long 0x00 "GICD_ICFGR52,Interrupt Configuration Register 52" hgroup.long 0xCD4++0x03 hide.long 0x00 "GICD_ICFGR53,Interrupt Configuration Register 53" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x1B) group.long 0xCD8++0x03 line.long 0x00 "GICD_ICFGR54,Interrupt Configuration Register 54" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCDC++0x03 line.long 0x00 "GICD_ICFGR55,Interrupt Configuration Register 55" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else hgroup.long 0xCD8++0x03 hide.long 0x00 "GICD_ICFGR54,Interrupt Configuration Register 54" hgroup.long 0xCDC++0x03 hide.long 0x00 "GICD_ICFGR55,Interrupt Configuration Register 55" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x1C) group.long 0xCE0++0x03 line.long 0x00 "GICD_ICFGR56,Interrupt Configuration Register 56" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCE4++0x03 line.long 0x00 "GICD_ICFGR57,Interrupt Configuration Register 57" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else hgroup.long 0xCE0++0x03 hide.long 0x00 "GICD_ICFGR56,Interrupt Configuration Register 56" hgroup.long 0xCE4++0x03 hide.long 0x00 "GICD_ICFGR57,Interrupt Configuration Register 57" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x1D) group.long 0xCE8++0x03 line.long 0x00 "GICD_ICFGR58,Interrupt Configuration Register 58" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCEC++0x03 line.long 0x00 "GICD_ICFGR59,Interrupt Configuration Register 59" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else hgroup.long 0xCE8++0x03 hide.long 0x00 "GICD_ICFGR58,Interrupt Configuration Register 58" hgroup.long 0xCEC++0x03 hide.long 0x00 "GICD_ICFGR59,Interrupt Configuration Register 59" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x1E) group.long 0xCF0++0x03 line.long 0x00 "GICD_ICFGR60,Interrupt Configuration Register 60" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCF4++0x03 line.long 0x00 "GICD_ICFGR61,Interrupt Configuration Register 61" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else hgroup.long 0xCF0++0x03 hide.long 0x00 "GICD_ICFGR60,Interrupt Configuration Register 60" hgroup.long 0xCF4++0x03 hide.long 0x00 "GICD_ICFGR61,Interrupt Configuration Register 61" endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x1F) group.long 0xCF8++0x03 line.long 0x00 "GICD_ICFGR62,Interrupt Configuration Register 62" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCFC++0x03 line.long 0x00 "GICD_ICFGR63,Interrupt Configuration Register 63" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else hgroup.long 0xCF8++0x03 hide.long 0x00 "GICD_ICFGR62,Interrupt Configuration Register 62" hgroup.long 0xCFC++0x03 hide.long 0x00 "GICD_ICFGR63,Interrupt Configuration Register 63" endif tree.end width 12. tree "Peripheral Interrupt Status Registers" rgroup.long 0x0D00++0x03 line.long 0x00 "GICD_PPISR,Private Peripheral Interrupt Status Register" bitfld.long 0x00 15. " PPI_C[15] ,Returns the status of the ppi_c[15] inputs on the Distributor" "Low,High" bitfld.long 0x00 14. " PPI_C[14] ,Returns the status of the ppi_c[14] inputs on the Distributor" "Low,High" bitfld.long 0x00 13. " PPI_C[13] ,Returns the status of the ppi_c[13] inputs on the Distributor" "Low,High" bitfld.long 0x00 12. " PPI_C[12] ,Returns the status of the ppi_c[12] inputs on the Distributor" "Low,High" textline " " bitfld.long 0x00 11. " PPI_C[11] ,Returns the status of the ppi_c[11] inputs on the Distributor" "Low,High" bitfld.long 0x00 10. " PPI_C[10] ,Returns the status of the ppi_c[10] inputs on the Distributor" "Low,High" bitfld.long 0x00 9. " PPI_C[9] ,Returns the status of the ppi_c[9] inputs on the Distributor" "Low,High" bitfld.long 0x00 8. " PPI_C[8] ,Returns the status of the ppi_c[8] inputs on the Distributor" "Low,High" textline " " bitfld.long 0x00 7. " PPI_C[7] ,Returns the status of the ppi_c[7] inputs on the Distributor" "Low,High" bitfld.long 0x00 6. " PPI_C[6] ,Returns the status of the ppi_c[6] inputs on the Distributor" "Low,High" bitfld.long 0x00 5. " PPI_C[5] ,Returns the status of the ppi_c[5] inputs on the Distributor" "Low,High" bitfld.long 0x00 4. " PPI_C[4] ,Returns the status of the ppi_c[4] inputs on the Distributor" "Low,High" textline " " bitfld.long 0x00 3. " PPI_C[3] ,Returns the status of the ppi_c[3] inputs on the Distributor" "Low,High" bitfld.long 0x00 2. " PPI_C[2] ,Returns the status of the ppi_c[2] inputs on the Distributor" "Low,High" bitfld.long 0x00 1. " PPI_C[1] ,Returns the status of the ppi_c[1] inputs on the Distributor" "Low,High" bitfld.long 0x00 0. " PPI_C[0] ,Returns the status of the ppi_c[0] inputs on the Distributor" "Low,High" textline " " width 22. if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x01) rgroup.long 0x0D04++0x03 line.long 0x0 "GICD_SPISR0,Shared Peripheral Interrupt Status Register 0" bitfld.long 0x00 31. " IRQS31 ,IRQS Status Bit 31" "Low,High" bitfld.long 0x00 30. " IRQS30 ,IRQS Status Bit 30" "Low,High" bitfld.long 0x00 29. " IRQS29 ,IRQS Status Bit 29" "Low,High" textline " " bitfld.long 0x00 28. " IRQS28 ,IRQS Status Bit 28" "Low,High" bitfld.long 0x00 27. " IRQS27 ,IRQS Status Bit 27" "Low,High" bitfld.long 0x00 26. " IRQS26 ,IRQS Status Bit 26" "Low,High" textline " " bitfld.long 0x00 25. " IRQS25 ,IRQS Status Bit 25" "Low,High" bitfld.long 0x00 24. " IRQS24 ,IRQS Status Bit 24" "Low,High" bitfld.long 0x00 23. " IRQS23 ,IRQS Status Bit 23" "Low,High" textline " " bitfld.long 0x00 22. " IRQS22 ,IRQS Status Bit 22" "Low,High" bitfld.long 0x00 21. " IRQS21 ,IRQS Status Bit 21" "Low,High" bitfld.long 0x00 20. " IRQS20 ,IRQS Status Bit 20" "Low,High" textline " " bitfld.long 0x00 19. " IRQS19 ,IRQS Status Bit 19" "Low,High" bitfld.long 0x00 18. " IRQS18 ,IRQS Status Bit 18" "Low,High" bitfld.long 0x00 17. " IRQS17 ,IRQS Status Bit 17" "Low,High" textline " " bitfld.long 0x00 16. " IRQS16 ,IRQS Status Bit 16" "Low,High" bitfld.long 0x00 15. " IRQS15 ,IRQS Status Bit 15" "Low,High" bitfld.long 0x00 14. " IRQS14 ,IRQS Status Bit 14" "Low,High" textline " " bitfld.long 0x00 13. " IRQS13 ,IRQS Status Bit 13" "Low,High" bitfld.long 0x00 12. " IRQS12 ,IRQS Status Bit 12" "Low,High" bitfld.long 0x00 11. " IRQS11 ,IRQS Status Bit 11" "Low,High" textline " " bitfld.long 0x00 10. " IRQS10 ,IRQS Status Bit 10" "Low,High" bitfld.long 0x00 9. " IRQS9 ,IRQS Status Bit 9" "Low,High" bitfld.long 0x00 8. " IRQS8 ,IRQS Status Bit 8" "Low,High" textline " " bitfld.long 0x00 7. " IRQS7 ,IRQS Status Bit 7" "Low,High" bitfld.long 0x00 6. " IRQS6 ,IRQS Status Bit 6" "Low,High" bitfld.long 0x00 5. " IRQS5 ,IRQS Status Bit 5" "Low,High" textline " " bitfld.long 0x00 4. " IRQS4 ,IRQS Status Bit 4" "Low,High" bitfld.long 0x00 3. " IRQS3 ,IRQS Status Bit 3" "Low,High" bitfld.long 0x00 2. " IRQS2 ,IRQS Status Bit 2" "Low,High" textline " " bitfld.long 0x00 1. " IRQS1 ,IRQS Status Bit 1" "Low,High" bitfld.long 0x00 0. " IRQS0 ,IRQS Status Bit 0" "Low,High" else hgroup.long 0x0D04++0x03 hide.long 0x0 "GICD_SPISR0,Shared Peripheral Interrupt Status Register 1" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x02) rgroup.long 0x0D08++0x03 line.long 0x0 "GICD_SPISR1,Shared Peripheral Interrupt Status Register 1" bitfld.long 0x00 31. " IRQS63 ,IRQS Status Bit 63" "Low,High" bitfld.long 0x00 30. " IRQS62 ,IRQS Status Bit 62" "Low,High" bitfld.long 0x00 29. " IRQS61 ,IRQS Status Bit 61" "Low,High" textline " " bitfld.long 0x00 28. " IRQS60 ,IRQS Status Bit 60" "Low,High" bitfld.long 0x00 27. " IRQS59 ,IRQS Status Bit 59" "Low,High" bitfld.long 0x00 26. " IRQS58 ,IRQS Status Bit 58" "Low,High" textline " " bitfld.long 0x00 25. " IRQS57 ,IRQS Status Bit 57" "Low,High" bitfld.long 0x00 24. " IRQS56 ,IRQS Status Bit 56" "Low,High" bitfld.long 0x00 23. " IRQS55 ,IRQS Status Bit 55" "Low,High" textline " " bitfld.long 0x00 22. " IRQS54 ,IRQS Status Bit 54" "Low,High" bitfld.long 0x00 21. " IRQS53 ,IRQS Status Bit 53" "Low,High" bitfld.long 0x00 20. " IRQS52 ,IRQS Status Bit 52" "Low,High" textline " " bitfld.long 0x00 19. " IRQS51 ,IRQS Status Bit 51" "Low,High" bitfld.long 0x00 18. " IRQS50 ,IRQS Status Bit 50" "Low,High" bitfld.long 0x00 17. " IRQS49 ,IRQS Status Bit 49" "Low,High" textline " " bitfld.long 0x00 16. " IRQS48 ,IRQS Status Bit 48" "Low,High" bitfld.long 0x00 15. " IRQS47 ,IRQS Status Bit 47" "Low,High" bitfld.long 0x00 14. " IRQS46 ,IRQS Status Bit 46" "Low,High" textline " " bitfld.long 0x00 13. " IRQS45 ,IRQS Status Bit 45" "Low,High" bitfld.long 0x00 12. " IRQS44 ,IRQS Status Bit 44" "Low,High" bitfld.long 0x00 11. " IRQS43 ,IRQS Status Bit 43" "Low,High" textline " " bitfld.long 0x00 10. " IRQS42 ,IRQS Status Bit 42" "Low,High" bitfld.long 0x00 9. " IRQS41 ,IRQS Status Bit 41" "Low,High" bitfld.long 0x00 8. " IRQS40 ,IRQS Status Bit 40" "Low,High" textline " " bitfld.long 0x00 7. " IRQS39 ,IRQS Status Bit 39" "Low,High" bitfld.long 0x00 6. " IRQS38 ,IRQS Status Bit 38" "Low,High" bitfld.long 0x00 5. " IRQS37 ,IRQS Status Bit 37" "Low,High" textline " " bitfld.long 0x00 4. " IRQS36 ,IRQS Status Bit 36" "Low,High" bitfld.long 0x00 3. " IRQS35 ,IRQS Status Bit 35" "Low,High" bitfld.long 0x00 2. " IRQS34 ,IRQS Status Bit 34" "Low,High" textline " " bitfld.long 0x00 1. " IRQS33 ,IRQS Status Bit 33" "Low,High" bitfld.long 0x00 0. " IRQS32 ,IRQS Status Bit 32" "Low,High" else hgroup.long 0x0D08++0x03 hide.long 0x0 "GICD_SPISR1,Shared Peripheral Interrupt Status Register 1" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x03) rgroup.long 0x0D0C++0x03 line.long 0x0 "GICD_SPISR2,Shared Peripheral Interrupt Status Register 2" bitfld.long 0x00 31. " IRQS95 ,IRQS Status Bit 95" "Low,High" bitfld.long 0x00 30. " IRQS94 ,IRQS Status Bit 94" "Low,High" bitfld.long 0x00 29. " IRQS93 ,IRQS Status Bit 93" "Low,High" textline " " bitfld.long 0x00 28. " IRQS92 ,IRQS Status Bit 92" "Low,High" bitfld.long 0x00 27. " IRQS91 ,IRQS Status Bit 91" "Low,High" bitfld.long 0x00 26. " IRQS90 ,IRQS Status Bit 90" "Low,High" textline " " bitfld.long 0x00 25. " IRQS89 ,IRQS Status Bit 89" "Low,High" bitfld.long 0x00 24. " IRQS88 ,IRQS Status Bit 88" "Low,High" bitfld.long 0x00 23. " IRQS87 ,IRQS Status Bit 87" "Low,High" textline " " bitfld.long 0x00 22. " IRQS86 ,IRQS Status Bit 86" "Low,High" bitfld.long 0x00 21. " IRQS85 ,IRQS Status Bit 85" "Low,High" bitfld.long 0x00 20. " IRQS84 ,IRQS Status Bit 84" "Low,High" textline " " bitfld.long 0x00 19. " IRQS83 ,IRQS Status Bit 83" "Low,High" bitfld.long 0x00 18. " IRQS82 ,IRQS Status Bit 82" "Low,High" bitfld.long 0x00 17. " IRQS81 ,IRQS Status Bit 81" "Low,High" textline " " bitfld.long 0x00 16. " IRQS80 ,IRQS Status Bit 80" "Low,High" bitfld.long 0x00 15. " IRQS79 ,IRQS Status Bit 79" "Low,High" bitfld.long 0x00 14. " IRQS78 ,IRQS Status Bit 78" "Low,High" textline " " bitfld.long 0x00 13. " IRQS77 ,IRQS Status Bit 77" "Low,High" bitfld.long 0x00 12. " IRQS76 ,IRQS Status Bit 76" "Low,High" bitfld.long 0x00 11. " IRQS75 ,IRQS Status Bit 75" "Low,High" textline " " bitfld.long 0x00 10. " IRQS74 ,IRQS Status Bit 74" "Low,High" bitfld.long 0x00 9. " IRQS73 ,IRQS Status Bit 73" "Low,High" bitfld.long 0x00 8. " IRQS72 ,IRQS Status Bit 72" "Low,High" textline " " bitfld.long 0x00 7. " IRQS71 ,IRQS Status Bit 71" "Low,High" bitfld.long 0x00 6. " IRQS70 ,IRQS Status Bit 70" "Low,High" bitfld.long 0x00 5. " IRQS69 ,IRQS Status Bit 69" "Low,High" textline " " bitfld.long 0x00 4. " IRQS68 ,IRQS Status Bit 68" "Low,High" bitfld.long 0x00 3. " IRQS67 ,IRQS Status Bit 67" "Low,High" bitfld.long 0x00 2. " IRQS66 ,IRQS Status Bit 66" "Low,High" textline " " bitfld.long 0x00 1. " IRQS65 ,IRQS Status Bit 65" "Low,High" bitfld.long 0x00 0. " IRQS64 ,IRQS Status Bit 64" "Low,High" else hgroup.long 0x0D0C++0x03 hide.long 0x0 "GICD_SPISR2,Shared Peripheral Interrupt Status Register 2" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x04) rgroup.long 0x0D10++0x03 line.long 0x0 "GICD_SPISR3,Shared Peripheral Interrupt Status Register 3" bitfld.long 0x00 31. " IRQS127 ,IRQS Status Bit 127" "Low,High" bitfld.long 0x00 30. " IRQS126 ,IRQS Status Bit 126" "Low,High" bitfld.long 0x00 29. " IRQS125 ,IRQS Status Bit 125" "Low,High" textline " " bitfld.long 0x00 28. " IRQS124 ,IRQS Status Bit 124" "Low,High" bitfld.long 0x00 27. " IRQS123 ,IRQS Status Bit 123" "Low,High" bitfld.long 0x00 26. " IRQS122 ,IRQS Status Bit 122" "Low,High" textline " " bitfld.long 0x00 25. " IRQS121 ,IRQS Status Bit 121" "Low,High" bitfld.long 0x00 24. " IRQS120 ,IRQS Status Bit 120" "Low,High" bitfld.long 0x00 23. " IRQS119 ,IRQS Status Bit 119" "Low,High" textline " " bitfld.long 0x00 22. " IRQS118 ,IRQS Status Bit 118" "Low,High" bitfld.long 0x00 21. " IRQS117 ,IRQS Status Bit 117" "Low,High" bitfld.long 0x00 20. " IRQS116 ,IRQS Status Bit 116" "Low,High" textline " " bitfld.long 0x00 19. " IRQS115 ,IRQS Status Bit 115" "Low,High" bitfld.long 0x00 18. " IRQS114 ,IRQS Status Bit 114" "Low,High" bitfld.long 0x00 17. " IRQS113 ,IRQS Status Bit 113" "Low,High" textline " " bitfld.long 0x00 16. " IRQS112 ,IRQS Status Bit 112" "Low,High" bitfld.long 0x00 15. " IRQS111 ,IRQS Status Bit 111" "Low,High" bitfld.long 0x00 14. " IRQS110 ,IRQS Status Bit 110" "Low,High" textline " " bitfld.long 0x00 13. " IRQS109 ,IRQS Status Bit 109" "Low,High" bitfld.long 0x00 12. " IRQS108 ,IRQS Status Bit 108" "Low,High" bitfld.long 0x00 11. " IRQS107 ,IRQS Status Bit 107" "Low,High" textline " " bitfld.long 0x00 10. " IRQS106 ,IRQS Status Bit 106" "Low,High" bitfld.long 0x00 9. " IRQS105 ,IRQS Status Bit 105" "Low,High" bitfld.long 0x00 8. " IRQS104 ,IRQS Status Bit 104" "Low,High" textline " " bitfld.long 0x00 7. " IRQS103 ,IRQS Status Bit 103" "Low,High" bitfld.long 0x00 6. " IRQS102 ,IRQS Status Bit 102" "Low,High" bitfld.long 0x00 5. " IRQS101 ,IRQS Status Bit 101" "Low,High" textline " " bitfld.long 0x00 4. " IRQS100 ,IRQS Status Bit 100" "Low,High" bitfld.long 0x00 3. " IRQS99 ,IRQS Status Bit 99" "Low,High" bitfld.long 0x00 2. " IRQS98 ,IRQS Status Bit 98" "Low,High" textline " " bitfld.long 0x00 1. " IRQS97 ,IRQS Status Bit 97" "Low,High" bitfld.long 0x00 0. " IRQS96 ,IRQS Status Bit 96" "Low,High" else hgroup.long 0x0D10++0x03 hide.long 0x0 "GICD_SPISR3,Shared Peripheral Interrupt Status Register 3" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x05) rgroup.long 0x0D14++0x03 line.long 0x0 "GICD_SPISR4,Shared Peripheral Interrupt Status Register 4" bitfld.long 0x00 31. " IRQS159 ,IRQS Status Bit 159" "Low,High" bitfld.long 0x00 30. " IRQS158 ,IRQS Status Bit 158" "Low,High" bitfld.long 0x00 29. " IRQS157 ,IRQS Status Bit 157" "Low,High" textline " " bitfld.long 0x00 28. " IRQS156 ,IRQS Status Bit 156" "Low,High" bitfld.long 0x00 27. " IRQS155 ,IRQS Status Bit 155" "Low,High" bitfld.long 0x00 26. " IRQS154 ,IRQS Status Bit 154" "Low,High" textline " " bitfld.long 0x00 25. " IRQS153 ,IRQS Status Bit 153" "Low,High" bitfld.long 0x00 24. " IRQS152 ,IRQS Status Bit 152" "Low,High" bitfld.long 0x00 23. " IRQS151 ,IRQS Status Bit 151" "Low,High" textline " " bitfld.long 0x00 22. " IRQS150 ,IRQS Status Bit 150" "Low,High" bitfld.long 0x00 21. " IRQS149 ,IRQS Status Bit 149" "Low,High" bitfld.long 0x00 20. " IRQS148 ,IRQS Status Bit 148" "Low,High" textline " " bitfld.long 0x00 19. " IRQS147 ,IRQS Status Bit 147" "Low,High" bitfld.long 0x00 18. " IRQS146 ,IRQS Status Bit 146" "Low,High" bitfld.long 0x00 17. " IRQS145 ,IRQS Status Bit 145" "Low,High" textline " " bitfld.long 0x00 16. " IRQS144 ,IRQS Status Bit 144" "Low,High" bitfld.long 0x00 15. " IRQS143 ,IRQS Status Bit 143" "Low,High" bitfld.long 0x00 14. " IRQS142 ,IRQS Status Bit 142" "Low,High" textline " " bitfld.long 0x00 13. " IRQS141 ,IRQS Status Bit 141" "Low,High" bitfld.long 0x00 12. " IRQS140 ,IRQS Status Bit 140" "Low,High" bitfld.long 0x00 11. " IRQS139 ,IRQS Status Bit 139" "Low,High" textline " " bitfld.long 0x00 10. " IRQS138 ,IRQS Status Bit 138" "Low,High" bitfld.long 0x00 9. " IRQS137 ,IRQS Status Bit 137" "Low,High" bitfld.long 0x00 8. " IRQS136 ,IRQS Status Bit 136" "Low,High" textline " " bitfld.long 0x00 7. " IRQS135 ,IRQS Status Bit 135" "Low,High" bitfld.long 0x00 6. " IRQS134 ,IRQS Status Bit 134" "Low,High" bitfld.long 0x00 5. " IRQS133 ,IRQS Status Bit 133" "Low,High" textline " " bitfld.long 0x00 4. " IRQS132 ,IRQS Status Bit 132" "Low,High" bitfld.long 0x00 3. " IRQS131 ,IRQS Status Bit 131" "Low,High" bitfld.long 0x00 2. " IRQS130 ,IRQS Status Bit 130" "Low,High" textline " " bitfld.long 0x00 1. " IRQS129 ,IRQS Status Bit 129" "Low,High" bitfld.long 0x00 0. " IRQS128 ,IRQS Status Bit 128" "Low,High" else hgroup.long 0x0D14++0x03 hide.long 0x0 "GICD_SPISR4,Shared Peripheral Interrupt Status Register 4" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x06) rgroup.long 0x0D18++0x03 line.long 0x0 "GICD_SPISR5,Shared Peripheral Interrupt Status Register 5" bitfld.long 0x00 31. " IRQS191 ,IRQS Status Bit 191" "Low,High" bitfld.long 0x00 30. " IRQS190 ,IRQS Status Bit 190" "Low,High" bitfld.long 0x00 29. " IRQS189 ,IRQS Status Bit 189" "Low,High" textline " " bitfld.long 0x00 28. " IRQS188 ,IRQS Status Bit 188" "Low,High" bitfld.long 0x00 27. " IRQS187 ,IRQS Status Bit 187" "Low,High" bitfld.long 0x00 26. " IRQS186 ,IRQS Status Bit 186" "Low,High" textline " " bitfld.long 0x00 25. " IRQS185 ,IRQS Status Bit 185" "Low,High" bitfld.long 0x00 24. " IRQS184 ,IRQS Status Bit 184" "Low,High" bitfld.long 0x00 23. " IRQS183 ,IRQS Status Bit 183" "Low,High" textline " " bitfld.long 0x00 22. " IRQS182 ,IRQS Status Bit 182" "Low,High" bitfld.long 0x00 21. " IRQS181 ,IRQS Status Bit 181" "Low,High" bitfld.long 0x00 20. " IRQS180 ,IRQS Status Bit 180" "Low,High" textline " " bitfld.long 0x00 19. " IRQS179 ,IRQS Status Bit 179" "Low,High" bitfld.long 0x00 18. " IRQS178 ,IRQS Status Bit 178" "Low,High" bitfld.long 0x00 17. " IRQS177 ,IRQS Status Bit 177" "Low,High" textline " " bitfld.long 0x00 16. " IRQS176 ,IRQS Status Bit 176" "Low,High" bitfld.long 0x00 15. " IRQS175 ,IRQS Status Bit 175" "Low,High" bitfld.long 0x00 14. " IRQS174 ,IRQS Status Bit 174" "Low,High" textline " " bitfld.long 0x00 13. " IRQS173 ,IRQS Status Bit 173" "Low,High" bitfld.long 0x00 12. " IRQS172 ,IRQS Status Bit 172" "Low,High" bitfld.long 0x00 11. " IRQS171 ,IRQS Status Bit 171" "Low,High" textline " " bitfld.long 0x00 10. " IRQS170 ,IRQS Status Bit 170" "Low,High" bitfld.long 0x00 9. " IRQS169 ,IRQS Status Bit 169" "Low,High" bitfld.long 0x00 8. " IRQS168 ,IRQS Status Bit 168" "Low,High" textline " " bitfld.long 0x00 7. " IRQS167 ,IRQS Status Bit 167" "Low,High" bitfld.long 0x00 6. " IRQS166 ,IRQS Status Bit 166" "Low,High" bitfld.long 0x00 5. " IRQS165 ,IRQS Status Bit 165" "Low,High" textline " " bitfld.long 0x00 4. " IRQS164 ,IRQS Status Bit 164" "Low,High" bitfld.long 0x00 3. " IRQS163 ,IRQS Status Bit 163" "Low,High" bitfld.long 0x00 2. " IRQS162 ,IRQS Status Bit 162" "Low,High" textline " " bitfld.long 0x00 1. " IRQS161 ,IRQS Status Bit 161" "Low,High" bitfld.long 0x00 0. " IRQS160 ,IRQS Status Bit 160" "Low,High" else hgroup.long 0x0D18++0x03 hide.long 0x0 "GICD_SPISR5,Shared Peripheral Interrupt Status Register 5" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x07) rgroup.long 0x0D1C++0x03 line.long 0x0 "GICD_SPISR6,Shared Peripheral Interrupt Status Register 6" bitfld.long 0x00 31. " IRQS223 ,IRQS Status Bit 223" "Low,High" bitfld.long 0x00 30. " IRQS222 ,IRQS Status Bit 222" "Low,High" bitfld.long 0x00 29. " IRQS221 ,IRQS Status Bit 221" "Low,High" textline " " bitfld.long 0x00 28. " IRQS220 ,IRQS Status Bit 220" "Low,High" bitfld.long 0x00 27. " IRQS219 ,IRQS Status Bit 219" "Low,High" bitfld.long 0x00 26. " IRQS218 ,IRQS Status Bit 218" "Low,High" textline " " bitfld.long 0x00 25. " IRQS217 ,IRQS Status Bit 217" "Low,High" bitfld.long 0x00 24. " IRQS216 ,IRQS Status Bit 216" "Low,High" bitfld.long 0x00 23. " IRQS215 ,IRQS Status Bit 215" "Low,High" textline " " bitfld.long 0x00 22. " IRQS214 ,IRQS Status Bit 214" "Low,High" bitfld.long 0x00 21. " IRQS213 ,IRQS Status Bit 213" "Low,High" bitfld.long 0x00 20. " IRQS212 ,IRQS Status Bit 212" "Low,High" textline " " bitfld.long 0x00 19. " IRQS211 ,IRQS Status Bit 211" "Low,High" bitfld.long 0x00 18. " IRQS210 ,IRQS Status Bit 210" "Low,High" bitfld.long 0x00 17. " IRQS209 ,IRQS Status Bit 209" "Low,High" textline " " bitfld.long 0x00 16. " IRQS208 ,IRQS Status Bit 208" "Low,High" bitfld.long 0x00 15. " IRQS207 ,IRQS Status Bit 207" "Low,High" bitfld.long 0x00 14. " IRQS206 ,IRQS Status Bit 206" "Low,High" textline " " bitfld.long 0x00 13. " IRQS205 ,IRQS Status Bit 205" "Low,High" bitfld.long 0x00 12. " IRQS204 ,IRQS Status Bit 204" "Low,High" bitfld.long 0x00 11. " IRQS203 ,IRQS Status Bit 203" "Low,High" textline " " bitfld.long 0x00 10. " IRQS202 ,IRQS Status Bit 202" "Low,High" bitfld.long 0x00 9. " IRQS201 ,IRQS Status Bit 201" "Low,High" bitfld.long 0x00 8. " IRQS200 ,IRQS Status Bit 200" "Low,High" textline " " bitfld.long 0x00 7. " IRQS199 ,IRQS Status Bit 199" "Low,High" bitfld.long 0x00 6. " IRQS198 ,IRQS Status Bit 198" "Low,High" bitfld.long 0x00 5. " IRQS197 ,IRQS Status Bit 197" "Low,High" textline " " bitfld.long 0x00 4. " IRQS196 ,IRQS Status Bit 196" "Low,High" bitfld.long 0x00 3. " IRQS195 ,IRQS Status Bit 195" "Low,High" bitfld.long 0x00 2. " IRQS194 ,IRQS Status Bit 194" "Low,High" textline " " bitfld.long 0x00 1. " IRQS193 ,IRQS Status Bit 193" "Low,High" bitfld.long 0x00 0. " IRQS192 ,IRQS Status Bit 192" "Low,High" else hgroup.long 0x0D1C++0x03 hide.long 0x0 "GICD_SPISR6,Shared Peripheral Interrupt Status Register 6" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x08) rgroup.long 0x0D20++0x03 line.long 0x0 "GICD_SPISR7,Shared Peripheral Interrupt Status Register 7" bitfld.long 0x00 31. " IRQS255 ,IRQS Status Bit 255" "Low,High" bitfld.long 0x00 30. " IRQS254 ,IRQS Status Bit 254" "Low,High" bitfld.long 0x00 29. " IRQS253 ,IRQS Status Bit 253" "Low,High" textline " " bitfld.long 0x00 28. " IRQS252 ,IRQS Status Bit 252" "Low,High" bitfld.long 0x00 27. " IRQS251 ,IRQS Status Bit 251" "Low,High" bitfld.long 0x00 26. " IRQS250 ,IRQS Status Bit 250" "Low,High" textline " " bitfld.long 0x00 25. " IRQS249 ,IRQS Status Bit 249" "Low,High" bitfld.long 0x00 24. " IRQS248 ,IRQS Status Bit 248" "Low,High" bitfld.long 0x00 23. " IRQS247 ,IRQS Status Bit 247" "Low,High" textline " " bitfld.long 0x00 22. " IRQS246 ,IRQS Status Bit 246" "Low,High" bitfld.long 0x00 21. " IRQS245 ,IRQS Status Bit 245" "Low,High" bitfld.long 0x00 20. " IRQS244 ,IRQS Status Bit 244" "Low,High" textline " " bitfld.long 0x00 19. " IRQS243 ,IRQS Status Bit 243" "Low,High" bitfld.long 0x00 18. " IRQS242 ,IRQS Status Bit 242" "Low,High" bitfld.long 0x00 17. " IRQS241 ,IRQS Status Bit 241" "Low,High" textline " " bitfld.long 0x00 16. " IRQS240 ,IRQS Status Bit 240" "Low,High" bitfld.long 0x00 15. " IRQS239 ,IRQS Status Bit 239" "Low,High" bitfld.long 0x00 14. " IRQS238 ,IRQS Status Bit 238" "Low,High" textline " " bitfld.long 0x00 13. " IRQS237 ,IRQS Status Bit 237" "Low,High" bitfld.long 0x00 12. " IRQS236 ,IRQS Status Bit 236" "Low,High" bitfld.long 0x00 11. " IRQS235 ,IRQS Status Bit 235" "Low,High" textline " " bitfld.long 0x00 10. " IRQS234 ,IRQS Status Bit 234" "Low,High" bitfld.long 0x00 9. " IRQS233 ,IRQS Status Bit 233" "Low,High" bitfld.long 0x00 8. " IRQS232 ,IRQS Status Bit 232" "Low,High" textline " " bitfld.long 0x00 7. " IRQS231 ,IRQS Status Bit 231" "Low,High" bitfld.long 0x00 6. " IRQS230 ,IRQS Status Bit 230" "Low,High" bitfld.long 0x00 5. " IRQS229 ,IRQS Status Bit 229" "Low,High" textline " " bitfld.long 0x00 4. " IRQS228 ,IRQS Status Bit 228" "Low,High" bitfld.long 0x00 3. " IRQS227 ,IRQS Status Bit 227" "Low,High" bitfld.long 0x00 2. " IRQS226 ,IRQS Status Bit 226" "Low,High" textline " " bitfld.long 0x00 1. " IRQS225 ,IRQS Status Bit 225" "Low,High" bitfld.long 0x00 0. " IRQS224 ,IRQS Status Bit 224" "Low,High" else hgroup.long 0x0D20++0x03 hide.long 0x0 "GICD_SPISR7,Shared Peripheral Interrupt Status Register 7" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x09) rgroup.long 0x0D24++0x03 line.long 0x0 "GICD_SPISR8,Shared Peripheral Interrupt Status Register 8" bitfld.long 0x00 31. " IRQS287 ,IRQS Status Bit 287" "Low,High" bitfld.long 0x00 30. " IRQS286 ,IRQS Status Bit 286" "Low,High" bitfld.long 0x00 29. " IRQS285 ,IRQS Status Bit 285" "Low,High" textline " " bitfld.long 0x00 28. " IRQS284 ,IRQS Status Bit 284" "Low,High" bitfld.long 0x00 27. " IRQS283 ,IRQS Status Bit 283" "Low,High" bitfld.long 0x00 26. " IRQS282 ,IRQS Status Bit 282" "Low,High" textline " " bitfld.long 0x00 25. " IRQS281 ,IRQS Status Bit 281" "Low,High" bitfld.long 0x00 24. " IRQS280 ,IRQS Status Bit 280" "Low,High" bitfld.long 0x00 23. " IRQS279 ,IRQS Status Bit 279" "Low,High" textline " " bitfld.long 0x00 22. " IRQS278 ,IRQS Status Bit 278" "Low,High" bitfld.long 0x00 21. " IRQS277 ,IRQS Status Bit 277" "Low,High" bitfld.long 0x00 20. " IRQS276 ,IRQS Status Bit 276" "Low,High" textline " " bitfld.long 0x00 19. " IRQS275 ,IRQS Status Bit 275" "Low,High" bitfld.long 0x00 18. " IRQS274 ,IRQS Status Bit 274" "Low,High" bitfld.long 0x00 17. " IRQS273 ,IRQS Status Bit 273" "Low,High" textline " " bitfld.long 0x00 16. " IRQS272 ,IRQS Status Bit 272" "Low,High" bitfld.long 0x00 15. " IRQS271 ,IRQS Status Bit 271" "Low,High" bitfld.long 0x00 14. " IRQS270 ,IRQS Status Bit 270" "Low,High" textline " " bitfld.long 0x00 13. " IRQS269 ,IRQS Status Bit 269" "Low,High" bitfld.long 0x00 12. " IRQS268 ,IRQS Status Bit 268" "Low,High" bitfld.long 0x00 11. " IRQS267 ,IRQS Status Bit 267" "Low,High" textline " " bitfld.long 0x00 10. " IRQS266 ,IRQS Status Bit 266" "Low,High" bitfld.long 0x00 9. " IRQS265 ,IRQS Status Bit 265" "Low,High" bitfld.long 0x00 8. " IRQS264 ,IRQS Status Bit 264" "Low,High" textline " " bitfld.long 0x00 7. " IRQS263 ,IRQS Status Bit 263" "Low,High" bitfld.long 0x00 6. " IRQS262 ,IRQS Status Bit 262" "Low,High" bitfld.long 0x00 5. " IRQS261 ,IRQS Status Bit 261" "Low,High" textline " " bitfld.long 0x00 4. " IRQS260 ,IRQS Status Bit 260" "Low,High" bitfld.long 0x00 3. " IRQS259 ,IRQS Status Bit 259" "Low,High" bitfld.long 0x00 2. " IRQS258 ,IRQS Status Bit 258" "Low,High" textline " " bitfld.long 0x00 1. " IRQS257 ,IRQS Status Bit 257" "Low,High" bitfld.long 0x00 0. " IRQS256 ,IRQS Status Bit 256" "Low,High" else hgroup.long 0x0D24++0x03 hide.long 0x0 "GICD_SPISR8,Shared Peripheral Interrupt Status Register 8" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x0A) rgroup.long 0x0D28++0x03 line.long 0x0 "GICD_SPISR9,Shared Peripheral Interrupt Status Register 9" bitfld.long 0x00 31. " IRQS319 ,IRQS Status Bit 319" "Low,High" bitfld.long 0x00 30. " IRQS318 ,IRQS Status Bit 318" "Low,High" bitfld.long 0x00 29. " IRQS317 ,IRQS Status Bit 317" "Low,High" textline " " bitfld.long 0x00 28. " IRQS316 ,IRQS Status Bit 316" "Low,High" bitfld.long 0x00 27. " IRQS315 ,IRQS Status Bit 315" "Low,High" bitfld.long 0x00 26. " IRQS314 ,IRQS Status Bit 314" "Low,High" textline " " bitfld.long 0x00 25. " IRQS313 ,IRQS Status Bit 313" "Low,High" bitfld.long 0x00 24. " IRQS312 ,IRQS Status Bit 312" "Low,High" bitfld.long 0x00 23. " IRQS311 ,IRQS Status Bit 311" "Low,High" textline " " bitfld.long 0x00 22. " IRQS310 ,IRQS Status Bit 310" "Low,High" bitfld.long 0x00 21. " IRQS309 ,IRQS Status Bit 309" "Low,High" bitfld.long 0x00 20. " IRQS308 ,IRQS Status Bit 308" "Low,High" textline " " bitfld.long 0x00 19. " IRQS307 ,IRQS Status Bit 307" "Low,High" bitfld.long 0x00 18. " IRQS306 ,IRQS Status Bit 306" "Low,High" bitfld.long 0x00 17. " IRQS305 ,IRQS Status Bit 305" "Low,High" textline " " bitfld.long 0x00 16. " IRQS304 ,IRQS Status Bit 304" "Low,High" bitfld.long 0x00 15. " IRQS303 ,IRQS Status Bit 303" "Low,High" bitfld.long 0x00 14. " IRQS302 ,IRQS Status Bit 302" "Low,High" textline " " bitfld.long 0x00 13. " IRQS301 ,IRQS Status Bit 301" "Low,High" bitfld.long 0x00 12. " IRQS300 ,IRQS Status Bit 300" "Low,High" bitfld.long 0x00 11. " IRQS299 ,IRQS Status Bit 299" "Low,High" textline " " bitfld.long 0x00 10. " IRQS298 ,IRQS Status Bit 298" "Low,High" bitfld.long 0x00 9. " IRQS297 ,IRQS Status Bit 297" "Low,High" bitfld.long 0x00 8. " IRQS296 ,IRQS Status Bit 296" "Low,High" textline " " bitfld.long 0x00 7. " IRQS295 ,IRQS Status Bit 295" "Low,High" bitfld.long 0x00 6. " IRQS294 ,IRQS Status Bit 294" "Low,High" bitfld.long 0x00 5. " IRQS293 ,IRQS Status Bit 293" "Low,High" textline " " bitfld.long 0x00 4. " IRQS292 ,IRQS Status Bit 292" "Low,High" bitfld.long 0x00 3. " IRQS291 ,IRQS Status Bit 291" "Low,High" bitfld.long 0x00 2. " IRQS290 ,IRQS Status Bit 290" "Low,High" textline " " bitfld.long 0x00 1. " IRQS289 ,IRQS Status Bit 289" "Low,High" bitfld.long 0x00 0. " IRQS288 ,IRQS Status Bit 288" "Low,High" else hgroup.long 0x0D28++0x03 hide.long 0x0 "GICD_SPISR9,Shared Peripheral Interrupt Status Register 9" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x0B) rgroup.long 0x0D2C++0x03 line.long 0x0 "GICD_SPISR10,Shared Peripheral Interrupt Status Register 10" bitfld.long 0x00 31. " IRQS351 ,IRQS Status Bit 351" "Low,High" bitfld.long 0x00 30. " IRQS350 ,IRQS Status Bit 350" "Low,High" bitfld.long 0x00 29. " IRQS349 ,IRQS Status Bit 349" "Low,High" textline " " bitfld.long 0x00 28. " IRQS348 ,IRQS Status Bit 348" "Low,High" bitfld.long 0x00 27. " IRQS347 ,IRQS Status Bit 347" "Low,High" bitfld.long 0x00 26. " IRQS346 ,IRQS Status Bit 346" "Low,High" textline " " bitfld.long 0x00 25. " IRQS345 ,IRQS Status Bit 345" "Low,High" bitfld.long 0x00 24. " IRQS344 ,IRQS Status Bit 344" "Low,High" bitfld.long 0x00 23. " IRQS343 ,IRQS Status Bit 343" "Low,High" textline " " bitfld.long 0x00 22. " IRQS342 ,IRQS Status Bit 342" "Low,High" bitfld.long 0x00 21. " IRQS341 ,IRQS Status Bit 341" "Low,High" bitfld.long 0x00 20. " IRQS340 ,IRQS Status Bit 340" "Low,High" textline " " bitfld.long 0x00 19. " IRQS339 ,IRQS Status Bit 339" "Low,High" bitfld.long 0x00 18. " IRQS338 ,IRQS Status Bit 338" "Low,High" bitfld.long 0x00 17. " IRQS337 ,IRQS Status Bit 337" "Low,High" textline " " bitfld.long 0x00 16. " IRQS336 ,IRQS Status Bit 336" "Low,High" bitfld.long 0x00 15. " IRQS335 ,IRQS Status Bit 335" "Low,High" bitfld.long 0x00 14. " IRQS334 ,IRQS Status Bit 334" "Low,High" textline " " bitfld.long 0x00 13. " IRQS333 ,IRQS Status Bit 333" "Low,High" bitfld.long 0x00 12. " IRQS332 ,IRQS Status Bit 332" "Low,High" bitfld.long 0x00 11. " IRQS331 ,IRQS Status Bit 331" "Low,High" textline " " bitfld.long 0x00 10. " IRQS330 ,IRQS Status Bit 330" "Low,High" bitfld.long 0x00 9. " IRQS329 ,IRQS Status Bit 329" "Low,High" bitfld.long 0x00 8. " IRQS328 ,IRQS Status Bit 328" "Low,High" textline " " bitfld.long 0x00 7. " IRQS327 ,IRQS Status Bit 327" "Low,High" bitfld.long 0x00 6. " IRQS326 ,IRQS Status Bit 326" "Low,High" bitfld.long 0x00 5. " IRQS325 ,IRQS Status Bit 325" "Low,High" textline " " bitfld.long 0x00 4. " IRQS324 ,IRQS Status Bit 324" "Low,High" bitfld.long 0x00 3. " IRQS323 ,IRQS Status Bit 323" "Low,High" bitfld.long 0x00 2. " IRQS322 ,IRQS Status Bit 322" "Low,High" textline " " bitfld.long 0x00 1. " IRQS321 ,IRQS Status Bit 321" "Low,High" bitfld.long 0x00 0. " IRQS320 ,IRQS Status Bit 320" "Low,High" else hgroup.long 0x0D2C++0x03 hide.long 0x0 "GICD_SPISR10,Shared Peripheral Interrupt Status Register 10" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x0C) rgroup.long 0x0D30++0x03 line.long 0x0 "GICD_SPISR11,Shared Peripheral Interrupt Status Register 11" bitfld.long 0x00 31. " IRQS383 ,IRQS Status Bit 383" "Low,High" bitfld.long 0x00 30. " IRQS382 ,IRQS Status Bit 382" "Low,High" bitfld.long 0x00 29. " IRQS381 ,IRQS Status Bit 381" "Low,High" textline " " bitfld.long 0x00 28. " IRQS380 ,IRQS Status Bit 380" "Low,High" bitfld.long 0x00 27. " IRQS379 ,IRQS Status Bit 379" "Low,High" bitfld.long 0x00 26. " IRQS378 ,IRQS Status Bit 378" "Low,High" textline " " bitfld.long 0x00 25. " IRQS377 ,IRQS Status Bit 377" "Low,High" bitfld.long 0x00 24. " IRQS376 ,IRQS Status Bit 376" "Low,High" bitfld.long 0x00 23. " IRQS375 ,IRQS Status Bit 375" "Low,High" textline " " bitfld.long 0x00 22. " IRQS374 ,IRQS Status Bit 374" "Low,High" bitfld.long 0x00 21. " IRQS373 ,IRQS Status Bit 373" "Low,High" bitfld.long 0x00 20. " IRQS372 ,IRQS Status Bit 372" "Low,High" textline " " bitfld.long 0x00 19. " IRQS371 ,IRQS Status Bit 371" "Low,High" bitfld.long 0x00 18. " IRQS370 ,IRQS Status Bit 370" "Low,High" bitfld.long 0x00 17. " IRQS369 ,IRQS Status Bit 369" "Low,High" textline " " bitfld.long 0x00 16. " IRQS368 ,IRQS Status Bit 368" "Low,High" bitfld.long 0x00 15. " IRQS367 ,IRQS Status Bit 367" "Low,High" bitfld.long 0x00 14. " IRQS366 ,IRQS Status Bit 366" "Low,High" textline " " bitfld.long 0x00 13. " IRQS365 ,IRQS Status Bit 365" "Low,High" bitfld.long 0x00 12. " IRQS364 ,IRQS Status Bit 364" "Low,High" bitfld.long 0x00 11. " IRQS363 ,IRQS Status Bit 363" "Low,High" textline " " bitfld.long 0x00 10. " IRQS362 ,IRQS Status Bit 362" "Low,High" bitfld.long 0x00 9. " IRQS361 ,IRQS Status Bit 361" "Low,High" bitfld.long 0x00 8. " IRQS360 ,IRQS Status Bit 360" "Low,High" textline " " bitfld.long 0x00 7. " IRQS359 ,IRQS Status Bit 359" "Low,High" bitfld.long 0x00 6. " IRQS358 ,IRQS Status Bit 358" "Low,High" bitfld.long 0x00 5. " IRQS357 ,IRQS Status Bit 357" "Low,High" textline " " bitfld.long 0x00 4. " IRQS356 ,IRQS Status Bit 356" "Low,High" bitfld.long 0x00 3. " IRQS355 ,IRQS Status Bit 355" "Low,High" bitfld.long 0x00 2. " IRQS354 ,IRQS Status Bit 354" "Low,High" textline " " bitfld.long 0x00 1. " IRQS353 ,IRQS Status Bit 353" "Low,High" bitfld.long 0x00 0. " IRQS352 ,IRQS Status Bit 352" "Low,High" else hgroup.long 0x0D30++0x03 hide.long 0x0 "GICD_SPISR11,Shared Peripheral Interrupt Status Register 11" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x0D) rgroup.long 0x0D34++0x03 line.long 0x0 "GICD_SPISR12,Shared Peripheral Interrupt Status Register 12" bitfld.long 0x00 31. " IRQS415 ,IRQS Status Bit 415" "Low,High" bitfld.long 0x00 30. " IRQS414 ,IRQS Status Bit 414" "Low,High" bitfld.long 0x00 29. " IRQS413 ,IRQS Status Bit 413" "Low,High" textline " " bitfld.long 0x00 28. " IRQS412 ,IRQS Status Bit 412" "Low,High" bitfld.long 0x00 27. " IRQS411 ,IRQS Status Bit 411" "Low,High" bitfld.long 0x00 26. " IRQS410 ,IRQS Status Bit 410" "Low,High" textline " " bitfld.long 0x00 25. " IRQS409 ,IRQS Status Bit 409" "Low,High" bitfld.long 0x00 24. " IRQS408 ,IRQS Status Bit 408" "Low,High" bitfld.long 0x00 23. " IRQS407 ,IRQS Status Bit 407" "Low,High" textline " " bitfld.long 0x00 22. " IRQS406 ,IRQS Status Bit 406" "Low,High" bitfld.long 0x00 21. " IRQS405 ,IRQS Status Bit 405" "Low,High" bitfld.long 0x00 20. " IRQS404 ,IRQS Status Bit 404" "Low,High" textline " " bitfld.long 0x00 19. " IRQS403 ,IRQS Status Bit 403" "Low,High" bitfld.long 0x00 18. " IRQS402 ,IRQS Status Bit 402" "Low,High" bitfld.long 0x00 17. " IRQS401 ,IRQS Status Bit 401" "Low,High" textline " " bitfld.long 0x00 16. " IRQS400 ,IRQS Status Bit 400" "Low,High" bitfld.long 0x00 15. " IRQS399 ,IRQS Status Bit 399" "Low,High" bitfld.long 0x00 14. " IRQS398 ,IRQS Status Bit 398" "Low,High" textline " " bitfld.long 0x00 13. " IRQS397 ,IRQS Status Bit 397" "Low,High" bitfld.long 0x00 12. " IRQS396 ,IRQS Status Bit 396" "Low,High" bitfld.long 0x00 11. " IRQS395 ,IRQS Status Bit 395" "Low,High" textline " " bitfld.long 0x00 10. " IRQS394 ,IRQS Status Bit 394" "Low,High" bitfld.long 0x00 9. " IRQS393 ,IRQS Status Bit 393" "Low,High" bitfld.long 0x00 8. " IRQS392 ,IRQS Status Bit 392" "Low,High" textline " " bitfld.long 0x00 7. " IRQS391 ,IRQS Status Bit 391" "Low,High" bitfld.long 0x00 6. " IRQS390 ,IRQS Status Bit 390" "Low,High" bitfld.long 0x00 5. " IRQS389 ,IRQS Status Bit 389" "Low,High" textline " " bitfld.long 0x00 4. " IRQS388 ,IRQS Status Bit 388" "Low,High" bitfld.long 0x00 3. " IRQS387 ,IRQS Status Bit 387" "Low,High" bitfld.long 0x00 2. " IRQS386 ,IRQS Status Bit 386" "Low,High" textline " " bitfld.long 0x00 1. " IRQS385 ,IRQS Status Bit 385" "Low,High" bitfld.long 0x00 0. " IRQS384 ,IRQS Status Bit 384" "Low,High" else hgroup.long 0x0D34++0x03 hide.long 0x0 "GICD_SPISR12,Shared Peripheral Interrupt Status Register 12" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x0E) rgroup.long 0x0D38++0x03 line.long 0x0 "GICD_SPISR13,Shared Peripheral Interrupt Status Register 13" bitfld.long 0x00 31. " IRQS447 ,IRQS Status Bit 447" "Low,High" bitfld.long 0x00 30. " IRQS446 ,IRQS Status Bit 446" "Low,High" bitfld.long 0x00 29. " IRQS445 ,IRQS Status Bit 445" "Low,High" textline " " bitfld.long 0x00 28. " IRQS444 ,IRQS Status Bit 444" "Low,High" bitfld.long 0x00 27. " IRQS443 ,IRQS Status Bit 443" "Low,High" bitfld.long 0x00 26. " IRQS442 ,IRQS Status Bit 442" "Low,High" textline " " bitfld.long 0x00 25. " IRQS441 ,IRQS Status Bit 441" "Low,High" bitfld.long 0x00 24. " IRQS440 ,IRQS Status Bit 440" "Low,High" bitfld.long 0x00 23. " IRQS439 ,IRQS Status Bit 439" "Low,High" textline " " bitfld.long 0x00 22. " IRQS438 ,IRQS Status Bit 438" "Low,High" bitfld.long 0x00 21. " IRQS437 ,IRQS Status Bit 437" "Low,High" bitfld.long 0x00 20. " IRQS436 ,IRQS Status Bit 436" "Low,High" textline " " bitfld.long 0x00 19. " IRQS435 ,IRQS Status Bit 435" "Low,High" bitfld.long 0x00 18. " IRQS434 ,IRQS Status Bit 434" "Low,High" bitfld.long 0x00 17. " IRQS433 ,IRQS Status Bit 433" "Low,High" textline " " bitfld.long 0x00 16. " IRQS432 ,IRQS Status Bit 432" "Low,High" bitfld.long 0x00 15. " IRQS431 ,IRQS Status Bit 431" "Low,High" bitfld.long 0x00 14. " IRQS430 ,IRQS Status Bit 430" "Low,High" textline " " bitfld.long 0x00 13. " IRQS429 ,IRQS Status Bit 429" "Low,High" bitfld.long 0x00 12. " IRQS428 ,IRQS Status Bit 428" "Low,High" bitfld.long 0x00 11. " IRQS427 ,IRQS Status Bit 427" "Low,High" textline " " bitfld.long 0x00 10. " IRQS426 ,IRQS Status Bit 426" "Low,High" bitfld.long 0x00 9. " IRQS425 ,IRQS Status Bit 425" "Low,High" bitfld.long 0x00 8. " IRQS424 ,IRQS Status Bit 424" "Low,High" textline " " bitfld.long 0x00 7. " IRQS423 ,IRQS Status Bit 423" "Low,High" bitfld.long 0x00 6. " IRQS422 ,IRQS Status Bit 422" "Low,High" bitfld.long 0x00 5. " IRQS421 ,IRQS Status Bit 421" "Low,High" textline " " bitfld.long 0x00 4. " IRQS420 ,IRQS Status Bit 420" "Low,High" bitfld.long 0x00 3. " IRQS419 ,IRQS Status Bit 419" "Low,High" bitfld.long 0x00 2. " IRQS418 ,IRQS Status Bit 418" "Low,High" textline " " bitfld.long 0x00 1. " IRQS417 ,IRQS Status Bit 417" "Low,High" bitfld.long 0x00 0. " IRQS416 ,IRQS Status Bit 416" "Low,High" else hgroup.long 0x0D38++0x03 hide.long 0x0 "GICD_SPISR13,Shared Peripheral Interrupt Status Register 13" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x0F) rgroup.long 0x0D3C++0x03 line.long 0x0 "GICD_SPISR14,Shared Peripheral Interrupt Status Register 14" bitfld.long 0x00 31. " IRQS479 ,IRQS Status Bit 479" "Low,High" bitfld.long 0x00 30. " IRQS478 ,IRQS Status Bit 478" "Low,High" bitfld.long 0x00 29. " IRQS477 ,IRQS Status Bit 477" "Low,High" textline " " bitfld.long 0x00 28. " IRQS476 ,IRQS Status Bit 476" "Low,High" bitfld.long 0x00 27. " IRQS475 ,IRQS Status Bit 475" "Low,High" bitfld.long 0x00 26. " IRQS474 ,IRQS Status Bit 474" "Low,High" textline " " bitfld.long 0x00 25. " IRQS473 ,IRQS Status Bit 473" "Low,High" bitfld.long 0x00 24. " IRQS472 ,IRQS Status Bit 472" "Low,High" bitfld.long 0x00 23. " IRQS471 ,IRQS Status Bit 471" "Low,High" textline " " bitfld.long 0x00 22. " IRQS470 ,IRQS Status Bit 470" "Low,High" bitfld.long 0x00 21. " IRQS469 ,IRQS Status Bit 469" "Low,High" bitfld.long 0x00 20. " IRQS468 ,IRQS Status Bit 468" "Low,High" textline " " bitfld.long 0x00 19. " IRQS467 ,IRQS Status Bit 467" "Low,High" bitfld.long 0x00 18. " IRQS466 ,IRQS Status Bit 466" "Low,High" bitfld.long 0x00 17. " IRQS465 ,IRQS Status Bit 465" "Low,High" textline " " bitfld.long 0x00 16. " IRQS464 ,IRQS Status Bit 464" "Low,High" bitfld.long 0x00 15. " IRQS463 ,IRQS Status Bit 463" "Low,High" bitfld.long 0x00 14. " IRQS462 ,IRQS Status Bit 462" "Low,High" textline " " bitfld.long 0x00 13. " IRQS461 ,IRQS Status Bit 461" "Low,High" bitfld.long 0x00 12. " IRQS460 ,IRQS Status Bit 460" "Low,High" bitfld.long 0x00 11. " IRQS459 ,IRQS Status Bit 459" "Low,High" textline " " bitfld.long 0x00 10. " IRQS458 ,IRQS Status Bit 458" "Low,High" bitfld.long 0x00 9. " IRQS457 ,IRQS Status Bit 457" "Low,High" bitfld.long 0x00 8. " IRQS456 ,IRQS Status Bit 456" "Low,High" textline " " bitfld.long 0x00 7. " IRQS455 ,IRQS Status Bit 455" "Low,High" bitfld.long 0x00 6. " IRQS454 ,IRQS Status Bit 454" "Low,High" bitfld.long 0x00 5. " IRQS453 ,IRQS Status Bit 453" "Low,High" textline " " bitfld.long 0x00 4. " IRQS452 ,IRQS Status Bit 452" "Low,High" bitfld.long 0x00 3. " IRQS451 ,IRQS Status Bit 451" "Low,High" bitfld.long 0x00 2. " IRQS450 ,IRQS Status Bit 450" "Low,High" textline " " bitfld.long 0x00 1. " IRQS449 ,IRQS Status Bit 449" "Low,High" bitfld.long 0x00 0. " IRQS448 ,IRQS Status Bit 448" "Low,High" else hgroup.long 0x0D3C++0x03 hide.long 0x0 "GICD_SPISR14,Shared Peripheral Interrupt Status Register 14" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x10) rgroup.long 0x0D40++0x03 line.long 0x0 "GICD_SPISR15,Shared Peripheral Interrupt Status Register 15" bitfld.long 0x00 31. " IRQS511 ,IRQS Status Bit 511" "Low,High" bitfld.long 0x00 30. " IRQS510 ,IRQS Status Bit 510" "Low,High" bitfld.long 0x00 29. " IRQS509 ,IRQS Status Bit 509" "Low,High" textline " " bitfld.long 0x00 28. " IRQS508 ,IRQS Status Bit 508" "Low,High" bitfld.long 0x00 27. " IRQS507 ,IRQS Status Bit 507" "Low,High" bitfld.long 0x00 26. " IRQS506 ,IRQS Status Bit 506" "Low,High" textline " " bitfld.long 0x00 25. " IRQS505 ,IRQS Status Bit 505" "Low,High" bitfld.long 0x00 24. " IRQS504 ,IRQS Status Bit 504" "Low,High" bitfld.long 0x00 23. " IRQS503 ,IRQS Status Bit 503" "Low,High" textline " " bitfld.long 0x00 22. " IRQS502 ,IRQS Status Bit 502" "Low,High" bitfld.long 0x00 21. " IRQS501 ,IRQS Status Bit 501" "Low,High" bitfld.long 0x00 20. " IRQS500 ,IRQS Status Bit 500" "Low,High" textline " " bitfld.long 0x00 19. " IRQS499 ,IRQS Status Bit 499" "Low,High" bitfld.long 0x00 18. " IRQS498 ,IRQS Status Bit 498" "Low,High" bitfld.long 0x00 17. " IRQS497 ,IRQS Status Bit 497" "Low,High" textline " " bitfld.long 0x00 16. " IRQS496 ,IRQS Status Bit 496" "Low,High" bitfld.long 0x00 15. " IRQS495 ,IRQS Status Bit 495" "Low,High" bitfld.long 0x00 14. " IRQS494 ,IRQS Status Bit 494" "Low,High" textline " " bitfld.long 0x00 13. " IRQS493 ,IRQS Status Bit 493" "Low,High" bitfld.long 0x00 12. " IRQS492 ,IRQS Status Bit 492" "Low,High" bitfld.long 0x00 11. " IRQS491 ,IRQS Status Bit 491" "Low,High" textline " " bitfld.long 0x00 10. " IRQS490 ,IRQS Status Bit 490" "Low,High" bitfld.long 0x00 9. " IRQS489 ,IRQS Status Bit 489" "Low,High" bitfld.long 0x00 8. " IRQS488 ,IRQS Status Bit 488" "Low,High" textline " " bitfld.long 0x00 7. " IRQS487 ,IRQS Status Bit 487" "Low,High" bitfld.long 0x00 6. " IRQS486 ,IRQS Status Bit 486" "Low,High" bitfld.long 0x00 5. " IRQS485 ,IRQS Status Bit 485" "Low,High" textline " " bitfld.long 0x00 4. " IRQS484 ,IRQS Status Bit 484" "Low,High" bitfld.long 0x00 3. " IRQS483 ,IRQS Status Bit 483" "Low,High" bitfld.long 0x00 2. " IRQS482 ,IRQS Status Bit 482" "Low,High" textline " " bitfld.long 0x00 1. " IRQS481 ,IRQS Status Bit 481" "Low,High" bitfld.long 0x00 0. " IRQS480 ,IRQS Status Bit 480" "Low,High" else hgroup.long 0x0D40++0x03 hide.long 0x0 "GICD_SPISR15,Shared Peripheral Interrupt Status Register 15" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x11) rgroup.long 0x0D44++0x03 line.long 0x0 "GICD_SPISR16,Shared Peripheral Interrupt Status Register 16" bitfld.long 0x00 31. " IRQS543 ,IRQS Status Bit 543" "Low,High" bitfld.long 0x00 30. " IRQS542 ,IRQS Status Bit 542" "Low,High" bitfld.long 0x00 29. " IRQS541 ,IRQS Status Bit 541" "Low,High" textline " " bitfld.long 0x00 28. " IRQS540 ,IRQS Status Bit 540" "Low,High" bitfld.long 0x00 27. " IRQS539 ,IRQS Status Bit 539" "Low,High" bitfld.long 0x00 26. " IRQS538 ,IRQS Status Bit 538" "Low,High" textline " " bitfld.long 0x00 25. " IRQS537 ,IRQS Status Bit 537" "Low,High" bitfld.long 0x00 24. " IRQS536 ,IRQS Status Bit 536" "Low,High" bitfld.long 0x00 23. " IRQS535 ,IRQS Status Bit 535" "Low,High" textline " " bitfld.long 0x00 22. " IRQS534 ,IRQS Status Bit 534" "Low,High" bitfld.long 0x00 21. " IRQS533 ,IRQS Status Bit 533" "Low,High" bitfld.long 0x00 20. " IRQS532 ,IRQS Status Bit 532" "Low,High" textline " " bitfld.long 0x00 19. " IRQS531 ,IRQS Status Bit 531" "Low,High" bitfld.long 0x00 18. " IRQS530 ,IRQS Status Bit 530" "Low,High" bitfld.long 0x00 17. " IRQS529 ,IRQS Status Bit 529" "Low,High" textline " " bitfld.long 0x00 16. " IRQS528 ,IRQS Status Bit 528" "Low,High" bitfld.long 0x00 15. " IRQS527 ,IRQS Status Bit 527" "Low,High" bitfld.long 0x00 14. " IRQS526 ,IRQS Status Bit 526" "Low,High" textline " " bitfld.long 0x00 13. " IRQS525 ,IRQS Status Bit 525" "Low,High" bitfld.long 0x00 12. " IRQS524 ,IRQS Status Bit 524" "Low,High" bitfld.long 0x00 11. " IRQS523 ,IRQS Status Bit 523" "Low,High" textline " " bitfld.long 0x00 10. " IRQS522 ,IRQS Status Bit 522" "Low,High" bitfld.long 0x00 9. " IRQS521 ,IRQS Status Bit 521" "Low,High" bitfld.long 0x00 8. " IRQS520 ,IRQS Status Bit 520" "Low,High" textline " " bitfld.long 0x00 7. " IRQS519 ,IRQS Status Bit 519" "Low,High" bitfld.long 0x00 6. " IRQS518 ,IRQS Status Bit 518" "Low,High" bitfld.long 0x00 5. " IRQS517 ,IRQS Status Bit 517" "Low,High" textline " " bitfld.long 0x00 4. " IRQS516 ,IRQS Status Bit 516" "Low,High" bitfld.long 0x00 3. " IRQS515 ,IRQS Status Bit 515" "Low,High" bitfld.long 0x00 2. " IRQS514 ,IRQS Status Bit 514" "Low,High" textline " " bitfld.long 0x00 1. " IRQS513 ,IRQS Status Bit 513" "Low,High" bitfld.long 0x00 0. " IRQS512 ,IRQS Status Bit 512" "Low,High" else hgroup.long 0x0D44++0x03 hide.long 0x0 "GICD_SPISR16,Shared Peripheral Interrupt Status Register 16" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x12) rgroup.long 0x0D48++0x03 line.long 0x0 "GICD_SPISR17,Shared Peripheral Interrupt Status Register 17" bitfld.long 0x00 31. " IRQS575 ,IRQS Status Bit 575" "Low,High" bitfld.long 0x00 30. " IRQS574 ,IRQS Status Bit 574" "Low,High" bitfld.long 0x00 29. " IRQS573 ,IRQS Status Bit 573" "Low,High" textline " " bitfld.long 0x00 28. " IRQS572 ,IRQS Status Bit 572" "Low,High" bitfld.long 0x00 27. " IRQS571 ,IRQS Status Bit 571" "Low,High" bitfld.long 0x00 26. " IRQS570 ,IRQS Status Bit 570" "Low,High" textline " " bitfld.long 0x00 25. " IRQS569 ,IRQS Status Bit 569" "Low,High" bitfld.long 0x00 24. " IRQS568 ,IRQS Status Bit 568" "Low,High" bitfld.long 0x00 23. " IRQS567 ,IRQS Status Bit 567" "Low,High" textline " " bitfld.long 0x00 22. " IRQS566 ,IRQS Status Bit 566" "Low,High" bitfld.long 0x00 21. " IRQS565 ,IRQS Status Bit 565" "Low,High" bitfld.long 0x00 20. " IRQS564 ,IRQS Status Bit 564" "Low,High" textline " " bitfld.long 0x00 19. " IRQS563 ,IRQS Status Bit 563" "Low,High" bitfld.long 0x00 18. " IRQS562 ,IRQS Status Bit 562" "Low,High" bitfld.long 0x00 17. " IRQS561 ,IRQS Status Bit 561" "Low,High" textline " " bitfld.long 0x00 16. " IRQS560 ,IRQS Status Bit 560" "Low,High" bitfld.long 0x00 15. " IRQS559 ,IRQS Status Bit 559" "Low,High" bitfld.long 0x00 14. " IRQS558 ,IRQS Status Bit 558" "Low,High" textline " " bitfld.long 0x00 13. " IRQS557 ,IRQS Status Bit 557" "Low,High" bitfld.long 0x00 12. " IRQS556 ,IRQS Status Bit 556" "Low,High" bitfld.long 0x00 11. " IRQS555 ,IRQS Status Bit 555" "Low,High" textline " " bitfld.long 0x00 10. " IRQS554 ,IRQS Status Bit 554" "Low,High" bitfld.long 0x00 9. " IRQS553 ,IRQS Status Bit 553" "Low,High" bitfld.long 0x00 8. " IRQS552 ,IRQS Status Bit 552" "Low,High" textline " " bitfld.long 0x00 7. " IRQS551 ,IRQS Status Bit 551" "Low,High" bitfld.long 0x00 6. " IRQS550 ,IRQS Status Bit 550" "Low,High" bitfld.long 0x00 5. " IRQS549 ,IRQS Status Bit 549" "Low,High" textline " " bitfld.long 0x00 4. " IRQS548 ,IRQS Status Bit 548" "Low,High" bitfld.long 0x00 3. " IRQS547 ,IRQS Status Bit 547" "Low,High" bitfld.long 0x00 2. " IRQS546 ,IRQS Status Bit 546" "Low,High" textline " " bitfld.long 0x00 1. " IRQS545 ,IRQS Status Bit 545" "Low,High" bitfld.long 0x00 0. " IRQS544 ,IRQS Status Bit 544" "Low,High" else hgroup.long 0x0D48++0x03 hide.long 0x0 "GICD_SPISR17,Shared Peripheral Interrupt Status Register 17" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x13) rgroup.long 0x0D4C++0x03 line.long 0x0 "GICD_SPISR18,Shared Peripheral Interrupt Status Register 18" bitfld.long 0x00 31. " IRQS607 ,IRQS Status Bit 607" "Low,High" bitfld.long 0x00 30. " IRQS606 ,IRQS Status Bit 606" "Low,High" bitfld.long 0x00 29. " IRQS605 ,IRQS Status Bit 605" "Low,High" textline " " bitfld.long 0x00 28. " IRQS604 ,IRQS Status Bit 604" "Low,High" bitfld.long 0x00 27. " IRQS603 ,IRQS Status Bit 603" "Low,High" bitfld.long 0x00 26. " IRQS602 ,IRQS Status Bit 602" "Low,High" textline " " bitfld.long 0x00 25. " IRQS601 ,IRQS Status Bit 601" "Low,High" bitfld.long 0x00 24. " IRQS600 ,IRQS Status Bit 600" "Low,High" bitfld.long 0x00 23. " IRQS599 ,IRQS Status Bit 599" "Low,High" textline " " bitfld.long 0x00 22. " IRQS598 ,IRQS Status Bit 598" "Low,High" bitfld.long 0x00 21. " IRQS597 ,IRQS Status Bit 597" "Low,High" bitfld.long 0x00 20. " IRQS596 ,IRQS Status Bit 596" "Low,High" textline " " bitfld.long 0x00 19. " IRQS595 ,IRQS Status Bit 595" "Low,High" bitfld.long 0x00 18. " IRQS594 ,IRQS Status Bit 594" "Low,High" bitfld.long 0x00 17. " IRQS593 ,IRQS Status Bit 593" "Low,High" textline " " bitfld.long 0x00 16. " IRQS592 ,IRQS Status Bit 592" "Low,High" bitfld.long 0x00 15. " IRQS591 ,IRQS Status Bit 591" "Low,High" bitfld.long 0x00 14. " IRQS590 ,IRQS Status Bit 590" "Low,High" textline " " bitfld.long 0x00 13. " IRQS589 ,IRQS Status Bit 589" "Low,High" bitfld.long 0x00 12. " IRQS588 ,IRQS Status Bit 588" "Low,High" bitfld.long 0x00 11. " IRQS587 ,IRQS Status Bit 587" "Low,High" textline " " bitfld.long 0x00 10. " IRQS586 ,IRQS Status Bit 586" "Low,High" bitfld.long 0x00 9. " IRQS585 ,IRQS Status Bit 585" "Low,High" bitfld.long 0x00 8. " IRQS584 ,IRQS Status Bit 584" "Low,High" textline " " bitfld.long 0x00 7. " IRQS583 ,IRQS Status Bit 583" "Low,High" bitfld.long 0x00 6. " IRQS582 ,IRQS Status Bit 582" "Low,High" bitfld.long 0x00 5. " IRQS581 ,IRQS Status Bit 581" "Low,High" textline " " bitfld.long 0x00 4. " IRQS580 ,IRQS Status Bit 580" "Low,High" bitfld.long 0x00 3. " IRQS579 ,IRQS Status Bit 579" "Low,High" bitfld.long 0x00 2. " IRQS578 ,IRQS Status Bit 578" "Low,High" textline " " bitfld.long 0x00 1. " IRQS577 ,IRQS Status Bit 577" "Low,High" bitfld.long 0x00 0. " IRQS576 ,IRQS Status Bit 576" "Low,High" else hgroup.long 0x0D4C++0x03 hide.long 0x0 "GICD_SPISR18,Shared Peripheral Interrupt Status Register 18" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x14) rgroup.long 0x0D50++0x03 line.long 0x0 "GICD_SPISR19,Shared Peripheral Interrupt Status Register 19" bitfld.long 0x00 31. " IRQS639 ,IRQS Status Bit 639" "Low,High" bitfld.long 0x00 30. " IRQS638 ,IRQS Status Bit 638" "Low,High" bitfld.long 0x00 29. " IRQS637 ,IRQS Status Bit 637" "Low,High" textline " " bitfld.long 0x00 28. " IRQS636 ,IRQS Status Bit 636" "Low,High" bitfld.long 0x00 27. " IRQS635 ,IRQS Status Bit 635" "Low,High" bitfld.long 0x00 26. " IRQS634 ,IRQS Status Bit 634" "Low,High" textline " " bitfld.long 0x00 25. " IRQS633 ,IRQS Status Bit 633" "Low,High" bitfld.long 0x00 24. " IRQS632 ,IRQS Status Bit 632" "Low,High" bitfld.long 0x00 23. " IRQS631 ,IRQS Status Bit 631" "Low,High" textline " " bitfld.long 0x00 22. " IRQS630 ,IRQS Status Bit 630" "Low,High" bitfld.long 0x00 21. " IRQS629 ,IRQS Status Bit 629" "Low,High" bitfld.long 0x00 20. " IRQS628 ,IRQS Status Bit 628" "Low,High" textline " " bitfld.long 0x00 19. " IRQS627 ,IRQS Status Bit 627" "Low,High" bitfld.long 0x00 18. " IRQS626 ,IRQS Status Bit 626" "Low,High" bitfld.long 0x00 17. " IRQS625 ,IRQS Status Bit 625" "Low,High" textline " " bitfld.long 0x00 16. " IRQS624 ,IRQS Status Bit 624" "Low,High" bitfld.long 0x00 15. " IRQS623 ,IRQS Status Bit 623" "Low,High" bitfld.long 0x00 14. " IRQS622 ,IRQS Status Bit 622" "Low,High" textline " " bitfld.long 0x00 13. " IRQS621 ,IRQS Status Bit 621" "Low,High" bitfld.long 0x00 12. " IRQS620 ,IRQS Status Bit 620" "Low,High" bitfld.long 0x00 11. " IRQS619 ,IRQS Status Bit 619" "Low,High" textline " " bitfld.long 0x00 10. " IRQS618 ,IRQS Status Bit 618" "Low,High" bitfld.long 0x00 9. " IRQS617 ,IRQS Status Bit 617" "Low,High" bitfld.long 0x00 8. " IRQS616 ,IRQS Status Bit 616" "Low,High" textline " " bitfld.long 0x00 7. " IRQS615 ,IRQS Status Bit 615" "Low,High" bitfld.long 0x00 6. " IRQS614 ,IRQS Status Bit 614" "Low,High" bitfld.long 0x00 5. " IRQS613 ,IRQS Status Bit 613" "Low,High" textline " " bitfld.long 0x00 4. " IRQS612 ,IRQS Status Bit 612" "Low,High" bitfld.long 0x00 3. " IRQS611 ,IRQS Status Bit 611" "Low,High" bitfld.long 0x00 2. " IRQS610 ,IRQS Status Bit 610" "Low,High" textline " " bitfld.long 0x00 1. " IRQS609 ,IRQS Status Bit 609" "Low,High" bitfld.long 0x00 0. " IRQS608 ,IRQS Status Bit 608" "Low,High" else hgroup.long 0x0D50++0x03 hide.long 0x0 "GICD_SPISR19,Shared Peripheral Interrupt Status Register 19" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x15) rgroup.long 0x0D54++0x03 line.long 0x0 "GICD_SPISR20,Shared Peripheral Interrupt Status Register 20" bitfld.long 0x00 31. " IRQS671 ,IRQS Status Bit 671" "Low,High" bitfld.long 0x00 30. " IRQS670 ,IRQS Status Bit 670" "Low,High" bitfld.long 0x00 29. " IRQS669 ,IRQS Status Bit 669" "Low,High" textline " " bitfld.long 0x00 28. " IRQS668 ,IRQS Status Bit 668" "Low,High" bitfld.long 0x00 27. " IRQS667 ,IRQS Status Bit 667" "Low,High" bitfld.long 0x00 26. " IRQS666 ,IRQS Status Bit 666" "Low,High" textline " " bitfld.long 0x00 25. " IRQS665 ,IRQS Status Bit 665" "Low,High" bitfld.long 0x00 24. " IRQS664 ,IRQS Status Bit 664" "Low,High" bitfld.long 0x00 23. " IRQS663 ,IRQS Status Bit 663" "Low,High" textline " " bitfld.long 0x00 22. " IRQS662 ,IRQS Status Bit 662" "Low,High" bitfld.long 0x00 21. " IRQS661 ,IRQS Status Bit 661" "Low,High" bitfld.long 0x00 20. " IRQS660 ,IRQS Status Bit 660" "Low,High" textline " " bitfld.long 0x00 19. " IRQS659 ,IRQS Status Bit 659" "Low,High" bitfld.long 0x00 18. " IRQS658 ,IRQS Status Bit 658" "Low,High" bitfld.long 0x00 17. " IRQS657 ,IRQS Status Bit 657" "Low,High" textline " " bitfld.long 0x00 16. " IRQS656 ,IRQS Status Bit 656" "Low,High" bitfld.long 0x00 15. " IRQS655 ,IRQS Status Bit 655" "Low,High" bitfld.long 0x00 14. " IRQS654 ,IRQS Status Bit 654" "Low,High" textline " " bitfld.long 0x00 13. " IRQS653 ,IRQS Status Bit 653" "Low,High" bitfld.long 0x00 12. " IRQS652 ,IRQS Status Bit 652" "Low,High" bitfld.long 0x00 11. " IRQS651 ,IRQS Status Bit 651" "Low,High" textline " " bitfld.long 0x00 10. " IRQS650 ,IRQS Status Bit 650" "Low,High" bitfld.long 0x00 9. " IRQS649 ,IRQS Status Bit 649" "Low,High" bitfld.long 0x00 8. " IRQS648 ,IRQS Status Bit 648" "Low,High" textline " " bitfld.long 0x00 7. " IRQS647 ,IRQS Status Bit 647" "Low,High" bitfld.long 0x00 6. " IRQS646 ,IRQS Status Bit 646" "Low,High" bitfld.long 0x00 5. " IRQS645 ,IRQS Status Bit 645" "Low,High" textline " " bitfld.long 0x00 4. " IRQS644 ,IRQS Status Bit 644" "Low,High" bitfld.long 0x00 3. " IRQS643 ,IRQS Status Bit 643" "Low,High" bitfld.long 0x00 2. " IRQS642 ,IRQS Status Bit 642" "Low,High" textline " " bitfld.long 0x00 1. " IRQS641 ,IRQS Status Bit 641" "Low,High" bitfld.long 0x00 0. " IRQS640 ,IRQS Status Bit 640" "Low,High" else hgroup.long 0x0D54++0x03 hide.long 0x0 "GICD_SPISR20,Shared Peripheral Interrupt Status Register 20" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x16) rgroup.long 0x0D58++0x03 line.long 0x0 "GICD_SPISR21,Shared Peripheral Interrupt Status Register 21" bitfld.long 0x00 31. " IRQS703 ,IRQS Status Bit 703" "Low,High" bitfld.long 0x00 30. " IRQS702 ,IRQS Status Bit 702" "Low,High" bitfld.long 0x00 29. " IRQS701 ,IRQS Status Bit 701" "Low,High" textline " " bitfld.long 0x00 28. " IRQS700 ,IRQS Status Bit 700" "Low,High" bitfld.long 0x00 27. " IRQS699 ,IRQS Status Bit 699" "Low,High" bitfld.long 0x00 26. " IRQS698 ,IRQS Status Bit 698" "Low,High" textline " " bitfld.long 0x00 25. " IRQS697 ,IRQS Status Bit 697" "Low,High" bitfld.long 0x00 24. " IRQS696 ,IRQS Status Bit 696" "Low,High" bitfld.long 0x00 23. " IRQS695 ,IRQS Status Bit 695" "Low,High" textline " " bitfld.long 0x00 22. " IRQS694 ,IRQS Status Bit 694" "Low,High" bitfld.long 0x00 21. " IRQS693 ,IRQS Status Bit 693" "Low,High" bitfld.long 0x00 20. " IRQS692 ,IRQS Status Bit 692" "Low,High" textline " " bitfld.long 0x00 19. " IRQS691 ,IRQS Status Bit 691" "Low,High" bitfld.long 0x00 18. " IRQS690 ,IRQS Status Bit 690" "Low,High" bitfld.long 0x00 17. " IRQS689 ,IRQS Status Bit 689" "Low,High" textline " " bitfld.long 0x00 16. " IRQS688 ,IRQS Status Bit 688" "Low,High" bitfld.long 0x00 15. " IRQS687 ,IRQS Status Bit 687" "Low,High" bitfld.long 0x00 14. " IRQS686 ,IRQS Status Bit 686" "Low,High" textline " " bitfld.long 0x00 13. " IRQS685 ,IRQS Status Bit 685" "Low,High" bitfld.long 0x00 12. " IRQS684 ,IRQS Status Bit 684" "Low,High" bitfld.long 0x00 11. " IRQS683 ,IRQS Status Bit 683" "Low,High" textline " " bitfld.long 0x00 10. " IRQS682 ,IRQS Status Bit 682" "Low,High" bitfld.long 0x00 9. " IRQS681 ,IRQS Status Bit 681" "Low,High" bitfld.long 0x00 8. " IRQS680 ,IRQS Status Bit 680" "Low,High" textline " " bitfld.long 0x00 7. " IRQS679 ,IRQS Status Bit 679" "Low,High" bitfld.long 0x00 6. " IRQS678 ,IRQS Status Bit 678" "Low,High" bitfld.long 0x00 5. " IRQS677 ,IRQS Status Bit 677" "Low,High" textline " " bitfld.long 0x00 4. " IRQS676 ,IRQS Status Bit 676" "Low,High" bitfld.long 0x00 3. " IRQS675 ,IRQS Status Bit 675" "Low,High" bitfld.long 0x00 2. " IRQS674 ,IRQS Status Bit 674" "Low,High" textline " " bitfld.long 0x00 1. " IRQS673 ,IRQS Status Bit 673" "Low,High" bitfld.long 0x00 0. " IRQS672 ,IRQS Status Bit 672" "Low,High" else hgroup.long 0x0D58++0x03 hide.long 0x0 "GICD_SPISR21,Shared Peripheral Interrupt Status Register 21" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x17) rgroup.long 0x0D5C++0x03 line.long 0x0 "GICD_SPISR22,Shared Peripheral Interrupt Status Register 22" bitfld.long 0x00 31. " IRQS735 ,IRQS Status Bit 735" "Low,High" bitfld.long 0x00 30. " IRQS734 ,IRQS Status Bit 734" "Low,High" bitfld.long 0x00 29. " IRQS733 ,IRQS Status Bit 733" "Low,High" textline " " bitfld.long 0x00 28. " IRQS732 ,IRQS Status Bit 732" "Low,High" bitfld.long 0x00 27. " IRQS731 ,IRQS Status Bit 731" "Low,High" bitfld.long 0x00 26. " IRQS730 ,IRQS Status Bit 730" "Low,High" textline " " bitfld.long 0x00 25. " IRQS729 ,IRQS Status Bit 729" "Low,High" bitfld.long 0x00 24. " IRQS728 ,IRQS Status Bit 728" "Low,High" bitfld.long 0x00 23. " IRQS727 ,IRQS Status Bit 727" "Low,High" textline " " bitfld.long 0x00 22. " IRQS726 ,IRQS Status Bit 726" "Low,High" bitfld.long 0x00 21. " IRQS725 ,IRQS Status Bit 725" "Low,High" bitfld.long 0x00 20. " IRQS724 ,IRQS Status Bit 724" "Low,High" textline " " bitfld.long 0x00 19. " IRQS723 ,IRQS Status Bit 723" "Low,High" bitfld.long 0x00 18. " IRQS722 ,IRQS Status Bit 722" "Low,High" bitfld.long 0x00 17. " IRQS721 ,IRQS Status Bit 721" "Low,High" textline " " bitfld.long 0x00 16. " IRQS720 ,IRQS Status Bit 720" "Low,High" bitfld.long 0x00 15. " IRQS719 ,IRQS Status Bit 719" "Low,High" bitfld.long 0x00 14. " IRQS718 ,IRQS Status Bit 718" "Low,High" textline " " bitfld.long 0x00 13. " IRQS717 ,IRQS Status Bit 717" "Low,High" bitfld.long 0x00 12. " IRQS716 ,IRQS Status Bit 716" "Low,High" bitfld.long 0x00 11. " IRQS715 ,IRQS Status Bit 715" "Low,High" textline " " bitfld.long 0x00 10. " IRQS714 ,IRQS Status Bit 714" "Low,High" bitfld.long 0x00 9. " IRQS713 ,IRQS Status Bit 713" "Low,High" bitfld.long 0x00 8. " IRQS712 ,IRQS Status Bit 712" "Low,High" textline " " bitfld.long 0x00 7. " IRQS711 ,IRQS Status Bit 711" "Low,High" bitfld.long 0x00 6. " IRQS710 ,IRQS Status Bit 710" "Low,High" bitfld.long 0x00 5. " IRQS709 ,IRQS Status Bit 709" "Low,High" textline " " bitfld.long 0x00 4. " IRQS708 ,IRQS Status Bit 708" "Low,High" bitfld.long 0x00 3. " IRQS707 ,IRQS Status Bit 707" "Low,High" bitfld.long 0x00 2. " IRQS706 ,IRQS Status Bit 706" "Low,High" textline " " bitfld.long 0x00 1. " IRQS705 ,IRQS Status Bit 705" "Low,High" bitfld.long 0x00 0. " IRQS704 ,IRQS Status Bit 704" "Low,High" else hgroup.long 0x0D5C++0x03 hide.long 0x0 "GICD_SPISR22,Shared Peripheral Interrupt Status Register 22" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x18) rgroup.long 0x060++0x03 line.long 0x0 "GICD_SPISR23,Shared Peripheral Interrupt Status Register 23" bitfld.long 0x00 31. " IRQS767 ,IRQS Status Bit 767" "Low,High" bitfld.long 0x00 30. " IRQS766 ,IRQS Status Bit 766" "Low,High" bitfld.long 0x00 29. " IRQS765 ,IRQS Status Bit 765" "Low,High" textline " " bitfld.long 0x00 28. " IRQS764 ,IRQS Status Bit 764" "Low,High" bitfld.long 0x00 27. " IRQS763 ,IRQS Status Bit 763" "Low,High" bitfld.long 0x00 26. " IRQS762 ,IRQS Status Bit 762" "Low,High" textline " " bitfld.long 0x00 25. " IRQS761 ,IRQS Status Bit 761" "Low,High" bitfld.long 0x00 24. " IRQS760 ,IRQS Status Bit 760" "Low,High" bitfld.long 0x00 23. " IRQS759 ,IRQS Status Bit 759" "Low,High" textline " " bitfld.long 0x00 22. " IRQS758 ,IRQS Status Bit 758" "Low,High" bitfld.long 0x00 21. " IRQS757 ,IRQS Status Bit 757" "Low,High" bitfld.long 0x00 20. " IRQS756 ,IRQS Status Bit 756" "Low,High" textline " " bitfld.long 0x00 19. " IRQS755 ,IRQS Status Bit 755" "Low,High" bitfld.long 0x00 18. " IRQS754 ,IRQS Status Bit 754" "Low,High" bitfld.long 0x00 17. " IRQS753 ,IRQS Status Bit 753" "Low,High" textline " " bitfld.long 0x00 16. " IRQS752 ,IRQS Status Bit 752" "Low,High" bitfld.long 0x00 15. " IRQS751 ,IRQS Status Bit 751" "Low,High" bitfld.long 0x00 14. " IRQS750 ,IRQS Status Bit 750" "Low,High" textline " " bitfld.long 0x00 13. " IRQS749 ,IRQS Status Bit 749" "Low,High" bitfld.long 0x00 12. " IRQS748 ,IRQS Status Bit 748" "Low,High" bitfld.long 0x00 11. " IRQS747 ,IRQS Status Bit 747" "Low,High" textline " " bitfld.long 0x00 10. " IRQS746 ,IRQS Status Bit 746" "Low,High" bitfld.long 0x00 9. " IRQS745 ,IRQS Status Bit 745" "Low,High" bitfld.long 0x00 8. " IRQS744 ,IRQS Status Bit 744" "Low,High" textline " " bitfld.long 0x00 7. " IRQS743 ,IRQS Status Bit 743" "Low,High" bitfld.long 0x00 6. " IRQS742 ,IRQS Status Bit 742" "Low,High" bitfld.long 0x00 5. " IRQS741 ,IRQS Status Bit 741" "Low,High" textline " " bitfld.long 0x00 4. " IRQS740 ,IRQS Status Bit 740" "Low,High" bitfld.long 0x00 3. " IRQS739 ,IRQS Status Bit 739" "Low,High" bitfld.long 0x00 2. " IRQS738 ,IRQS Status Bit 738" "Low,High" textline " " bitfld.long 0x00 1. " IRQS737 ,IRQS Status Bit 737" "Low,High" bitfld.long 0x00 0. " IRQS736 ,IRQS Status Bit 736" "Low,High" else hgroup.long 0x0D60++0x03 hide.long 0x0 "GICD_SPISR23,Shared Peripheral Interrupt Status Register 23" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x19) rgroup.long 0x0D64++0x03 line.long 0x0 "GICD_SPISR24,Shared Peripheral Interrupt Status Register 24" bitfld.long 0x00 31. " IRQS799 ,IRQS Status Bit 799" "Low,High" bitfld.long 0x00 30. " IRQS798 ,IRQS Status Bit 798" "Low,High" bitfld.long 0x00 29. " IRQS797 ,IRQS Status Bit 797" "Low,High" textline " " bitfld.long 0x00 28. " IRQS796 ,IRQS Status Bit 796" "Low,High" bitfld.long 0x00 27. " IRQS795 ,IRQS Status Bit 795" "Low,High" bitfld.long 0x00 26. " IRQS794 ,IRQS Status Bit 794" "Low,High" textline " " bitfld.long 0x00 25. " IRQS793 ,IRQS Status Bit 793" "Low,High" bitfld.long 0x00 24. " IRQS792 ,IRQS Status Bit 792" "Low,High" bitfld.long 0x00 23. " IRQS791 ,IRQS Status Bit 791" "Low,High" textline " " bitfld.long 0x00 22. " IRQS790 ,IRQS Status Bit 790" "Low,High" bitfld.long 0x00 21. " IRQS789 ,IRQS Status Bit 789" "Low,High" bitfld.long 0x00 20. " IRQS788 ,IRQS Status Bit 788" "Low,High" textline " " bitfld.long 0x00 19. " IRQS787 ,IRQS Status Bit 787" "Low,High" bitfld.long 0x00 18. " IRQS786 ,IRQS Status Bit 786" "Low,High" bitfld.long 0x00 17. " IRQS785 ,IRQS Status Bit 785" "Low,High" textline " " bitfld.long 0x00 16. " IRQS784 ,IRQS Status Bit 784" "Low,High" bitfld.long 0x00 15. " IRQS783 ,IRQS Status Bit 783" "Low,High" bitfld.long 0x00 14. " IRQS782 ,IRQS Status Bit 782" "Low,High" textline " " bitfld.long 0x00 13. " IRQS781 ,IRQS Status Bit 781" "Low,High" bitfld.long 0x00 12. " IRQS780 ,IRQS Status Bit 780" "Low,High" bitfld.long 0x00 11. " IRQS779 ,IRQS Status Bit 779" "Low,High" textline " " bitfld.long 0x00 10. " IRQS778 ,IRQS Status Bit 778" "Low,High" bitfld.long 0x00 9. " IRQS777 ,IRQS Status Bit 777" "Low,High" bitfld.long 0x00 8. " IRQS776 ,IRQS Status Bit 776" "Low,High" textline " " bitfld.long 0x00 7. " IRQS775 ,IRQS Status Bit 775" "Low,High" bitfld.long 0x00 6. " IRQS774 ,IRQS Status Bit 774" "Low,High" bitfld.long 0x00 5. " IRQS773 ,IRQS Status Bit 773" "Low,High" textline " " bitfld.long 0x00 4. " IRQS772 ,IRQS Status Bit 772" "Low,High" bitfld.long 0x00 3. " IRQS771 ,IRQS Status Bit 771" "Low,High" bitfld.long 0x00 2. " IRQS770 ,IRQS Status Bit 770" "Low,High" textline " " bitfld.long 0x00 1. " IRQS769 ,IRQS Status Bit 769" "Low,High" bitfld.long 0x00 0. " IRQS768 ,IRQS Status Bit 768" "Low,High" else hgroup.long 0x0D64++0x03 hide.long 0x0 "GICD_SPISR24,Shared Peripheral Interrupt Status Register 24" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x1A) rgroup.long 0x0D68++0x03 line.long 0x0 "GICD_SPISR25,Shared Peripheral Interrupt Status Register 25" bitfld.long 0x00 31. " IRQS831 ,IRQS Status Bit 831" "Low,High" bitfld.long 0x00 30. " IRQS830 ,IRQS Status Bit 830" "Low,High" bitfld.long 0x00 29. " IRQS829 ,IRQS Status Bit 829" "Low,High" textline " " bitfld.long 0x00 28. " IRQS828 ,IRQS Status Bit 828" "Low,High" bitfld.long 0x00 27. " IRQS827 ,IRQS Status Bit 827" "Low,High" bitfld.long 0x00 26. " IRQS826 ,IRQS Status Bit 826" "Low,High" textline " " bitfld.long 0x00 25. " IRQS825 ,IRQS Status Bit 825" "Low,High" bitfld.long 0x00 24. " IRQS824 ,IRQS Status Bit 824" "Low,High" bitfld.long 0x00 23. " IRQS823 ,IRQS Status Bit 823" "Low,High" textline " " bitfld.long 0x00 22. " IRQS822 ,IRQS Status Bit 822" "Low,High" bitfld.long 0x00 21. " IRQS821 ,IRQS Status Bit 821" "Low,High" bitfld.long 0x00 20. " IRQS820 ,IRQS Status Bit 820" "Low,High" textline " " bitfld.long 0x00 19. " IRQS819 ,IRQS Status Bit 819" "Low,High" bitfld.long 0x00 18. " IRQS818 ,IRQS Status Bit 818" "Low,High" bitfld.long 0x00 17. " IRQS817 ,IRQS Status Bit 817" "Low,High" textline " " bitfld.long 0x00 16. " IRQS816 ,IRQS Status Bit 816" "Low,High" bitfld.long 0x00 15. " IRQS815 ,IRQS Status Bit 815" "Low,High" bitfld.long 0x00 14. " IRQS814 ,IRQS Status Bit 814" "Low,High" textline " " bitfld.long 0x00 13. " IRQS813 ,IRQS Status Bit 813" "Low,High" bitfld.long 0x00 12. " IRQS812 ,IRQS Status Bit 812" "Low,High" bitfld.long 0x00 11. " IRQS811 ,IRQS Status Bit 811" "Low,High" textline " " bitfld.long 0x00 10. " IRQS810 ,IRQS Status Bit 810" "Low,High" bitfld.long 0x00 9. " IRQS809 ,IRQS Status Bit 809" "Low,High" bitfld.long 0x00 8. " IRQS808 ,IRQS Status Bit 808" "Low,High" textline " " bitfld.long 0x00 7. " IRQS807 ,IRQS Status Bit 807" "Low,High" bitfld.long 0x00 6. " IRQS806 ,IRQS Status Bit 806" "Low,High" bitfld.long 0x00 5. " IRQS805 ,IRQS Status Bit 805" "Low,High" textline " " bitfld.long 0x00 4. " IRQS804 ,IRQS Status Bit 804" "Low,High" bitfld.long 0x00 3. " IRQS803 ,IRQS Status Bit 803" "Low,High" bitfld.long 0x00 2. " IRQS802 ,IRQS Status Bit 802" "Low,High" textline " " bitfld.long 0x00 1. " IRQS801 ,IRQS Status Bit 801" "Low,High" bitfld.long 0x00 0. " IRQS800 ,IRQS Status Bit 800" "Low,High" else hgroup.long 0x0D68++0x03 hide.long 0x0 "GICD_SPISR25,Shared Peripheral Interrupt Status Register 25" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x1B) rgroup.long 0x0D6C++0x03 line.long 0x0 "GICD_SPISR26,Shared Peripheral Interrupt Status Register 26" bitfld.long 0x00 31. " IRQS863 ,IRQS Status Bit 863" "Low,High" bitfld.long 0x00 30. " IRQS862 ,IRQS Status Bit 862" "Low,High" bitfld.long 0x00 29. " IRQS861 ,IRQS Status Bit 861" "Low,High" textline " " bitfld.long 0x00 28. " IRQS860 ,IRQS Status Bit 860" "Low,High" bitfld.long 0x00 27. " IRQS859 ,IRQS Status Bit 859" "Low,High" bitfld.long 0x00 26. " IRQS858 ,IRQS Status Bit 858" "Low,High" textline " " bitfld.long 0x00 25. " IRQS857 ,IRQS Status Bit 857" "Low,High" bitfld.long 0x00 24. " IRQS856 ,IRQS Status Bit 856" "Low,High" bitfld.long 0x00 23. " IRQS855 ,IRQS Status Bit 855" "Low,High" textline " " bitfld.long 0x00 22. " IRQS854 ,IRQS Status Bit 854" "Low,High" bitfld.long 0x00 21. " IRQS853 ,IRQS Status Bit 853" "Low,High" bitfld.long 0x00 20. " IRQS852 ,IRQS Status Bit 852" "Low,High" textline " " bitfld.long 0x00 19. " IRQS851 ,IRQS Status Bit 851" "Low,High" bitfld.long 0x00 18. " IRQS850 ,IRQS Status Bit 850" "Low,High" bitfld.long 0x00 17. " IRQS849 ,IRQS Status Bit 849" "Low,High" textline " " bitfld.long 0x00 16. " IRQS848 ,IRQS Status Bit 848" "Low,High" bitfld.long 0x00 15. " IRQS847 ,IRQS Status Bit 847" "Low,High" bitfld.long 0x00 14. " IRQS846 ,IRQS Status Bit 846" "Low,High" textline " " bitfld.long 0x00 13. " IRQS845 ,IRQS Status Bit 845" "Low,High" bitfld.long 0x00 12. " IRQS844 ,IRQS Status Bit 844" "Low,High" bitfld.long 0x00 11. " IRQS843 ,IRQS Status Bit 843" "Low,High" textline " " bitfld.long 0x00 10. " IRQS842 ,IRQS Status Bit 842" "Low,High" bitfld.long 0x00 9. " IRQS841 ,IRQS Status Bit 841" "Low,High" bitfld.long 0x00 8. " IRQS840 ,IRQS Status Bit 840" "Low,High" textline " " bitfld.long 0x00 7. " IRQS839 ,IRQS Status Bit 839" "Low,High" bitfld.long 0x00 6. " IRQS838 ,IRQS Status Bit 838" "Low,High" bitfld.long 0x00 5. " IRQS837 ,IRQS Status Bit 837" "Low,High" textline " " bitfld.long 0x00 4. " IRQS836 ,IRQS Status Bit 836" "Low,High" bitfld.long 0x00 3. " IRQS835 ,IRQS Status Bit 835" "Low,High" bitfld.long 0x00 2. " IRQS834 ,IRQS Status Bit 834" "Low,High" textline " " bitfld.long 0x00 1. " IRQS833 ,IRQS Status Bit 833" "Low,High" bitfld.long 0x00 0. " IRQS832 ,IRQS Status Bit 832" "Low,High" else hgroup.long 0x0D6C++0x03 hide.long 0x0 "GICD_SPISR26,Shared Peripheral Interrupt Status Register 26" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x1C) rgroup.long 0x0D70++0x03 line.long 0x0 "GICD_SPISR27,Shared Peripheral Interrupt Status Register 27" bitfld.long 0x00 31. " IRQS895 ,IRQS Status Bit 895" "Low,High" bitfld.long 0x00 30. " IRQS894 ,IRQS Status Bit 894" "Low,High" bitfld.long 0x00 29. " IRQS893 ,IRQS Status Bit 893" "Low,High" textline " " bitfld.long 0x00 28. " IRQS892 ,IRQS Status Bit 892" "Low,High" bitfld.long 0x00 27. " IRQS891 ,IRQS Status Bit 891" "Low,High" bitfld.long 0x00 26. " IRQS890 ,IRQS Status Bit 890" "Low,High" textline " " bitfld.long 0x00 25. " IRQS889 ,IRQS Status Bit 889" "Low,High" bitfld.long 0x00 24. " IRQS888 ,IRQS Status Bit 888" "Low,High" bitfld.long 0x00 23. " IRQS887 ,IRQS Status Bit 887" "Low,High" textline " " bitfld.long 0x00 22. " IRQS886 ,IRQS Status Bit 886" "Low,High" bitfld.long 0x00 21. " IRQS885 ,IRQS Status Bit 885" "Low,High" bitfld.long 0x00 20. " IRQS884 ,IRQS Status Bit 884" "Low,High" textline " " bitfld.long 0x00 19. " IRQS883 ,IRQS Status Bit 883" "Low,High" bitfld.long 0x00 18. " IRQS882 ,IRQS Status Bit 882" "Low,High" bitfld.long 0x00 17. " IRQS881 ,IRQS Status Bit 881" "Low,High" textline " " bitfld.long 0x00 16. " IRQS880 ,IRQS Status Bit 880" "Low,High" bitfld.long 0x00 15. " IRQS879 ,IRQS Status Bit 879" "Low,High" bitfld.long 0x00 14. " IRQS878 ,IRQS Status Bit 878" "Low,High" textline " " bitfld.long 0x00 13. " IRQS877 ,IRQS Status Bit 877" "Low,High" bitfld.long 0x00 12. " IRQS876 ,IRQS Status Bit 876" "Low,High" bitfld.long 0x00 11. " IRQS875 ,IRQS Status Bit 875" "Low,High" textline " " bitfld.long 0x00 10. " IRQS874 ,IRQS Status Bit 874" "Low,High" bitfld.long 0x00 9. " IRQS873 ,IRQS Status Bit 873" "Low,High" bitfld.long 0x00 8. " IRQS872 ,IRQS Status Bit 872" "Low,High" textline " " bitfld.long 0x00 7. " IRQS871 ,IRQS Status Bit 871" "Low,High" bitfld.long 0x00 6. " IRQS870 ,IRQS Status Bit 870" "Low,High" bitfld.long 0x00 5. " IRQS869 ,IRQS Status Bit 869" "Low,High" textline " " bitfld.long 0x00 4. " IRQS868 ,IRQS Status Bit 868" "Low,High" bitfld.long 0x00 3. " IRQS867 ,IRQS Status Bit 867" "Low,High" bitfld.long 0x00 2. " IRQS866 ,IRQS Status Bit 866" "Low,High" textline " " bitfld.long 0x00 1. " IRQS865 ,IRQS Status Bit 865" "Low,High" bitfld.long 0x00 0. " IRQS864 ,IRQS Status Bit 864" "Low,High" else hgroup.long 0x0D70++0x03 hide.long 0x0 "GICD_SPISR27,Shared Peripheral Interrupt Status Register 27" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x1D) rgroup.long 0x0D74++0x03 line.long 0x0 "GICD_SPISR28,Shared Peripheral Interrupt Status Register 28" bitfld.long 0x00 31. " IRQS927 ,IRQS Status Bit 927" "Low,High" bitfld.long 0x00 30. " IRQS926 ,IRQS Status Bit 926" "Low,High" bitfld.long 0x00 29. " IRQS925 ,IRQS Status Bit 925" "Low,High" textline " " bitfld.long 0x00 28. " IRQS924 ,IRQS Status Bit 924" "Low,High" bitfld.long 0x00 27. " IRQS923 ,IRQS Status Bit 923" "Low,High" bitfld.long 0x00 26. " IRQS922 ,IRQS Status Bit 922" "Low,High" textline " " bitfld.long 0x00 25. " IRQS921 ,IRQS Status Bit 921" "Low,High" bitfld.long 0x00 24. " IRQS920 ,IRQS Status Bit 920" "Low,High" bitfld.long 0x00 23. " IRQS919 ,IRQS Status Bit 919" "Low,High" textline " " bitfld.long 0x00 22. " IRQS918 ,IRQS Status Bit 918" "Low,High" bitfld.long 0x00 21. " IRQS917 ,IRQS Status Bit 917" "Low,High" bitfld.long 0x00 20. " IRQS916 ,IRQS Status Bit 916" "Low,High" textline " " bitfld.long 0x00 19. " IRQS915 ,IRQS Status Bit 915" "Low,High" bitfld.long 0x00 18. " IRQS914 ,IRQS Status Bit 914" "Low,High" bitfld.long 0x00 17. " IRQS913 ,IRQS Status Bit 913" "Low,High" textline " " bitfld.long 0x00 16. " IRQS912 ,IRQS Status Bit 912" "Low,High" bitfld.long 0x00 15. " IRQS911 ,IRQS Status Bit 911" "Low,High" bitfld.long 0x00 14. " IRQS910 ,IRQS Status Bit 910" "Low,High" textline " " bitfld.long 0x00 13. " IRQS909 ,IRQS Status Bit 909" "Low,High" bitfld.long 0x00 12. " IRQS908 ,IRQS Status Bit 908" "Low,High" bitfld.long 0x00 11. " IRQS907 ,IRQS Status Bit 907" "Low,High" textline " " bitfld.long 0x00 10. " IRQS906 ,IRQS Status Bit 906" "Low,High" bitfld.long 0x00 9. " IRQS905 ,IRQS Status Bit 905" "Low,High" bitfld.long 0x00 8. " IRQS904 ,IRQS Status Bit 904" "Low,High" textline " " bitfld.long 0x00 7. " IRQS903 ,IRQS Status Bit 903" "Low,High" bitfld.long 0x00 6. " IRQS902 ,IRQS Status Bit 902" "Low,High" bitfld.long 0x00 5. " IRQS901 ,IRQS Status Bit 901" "Low,High" textline " " bitfld.long 0x00 4. " IRQS900 ,IRQS Status Bit 900" "Low,High" bitfld.long 0x00 3. " IRQS899 ,IRQS Status Bit 899" "Low,High" bitfld.long 0x00 2. " IRQS898 ,IRQS Status Bit 898" "Low,High" textline " " bitfld.long 0x00 1. " IRQS897 ,IRQS Status Bit 897" "Low,High" bitfld.long 0x00 0. " IRQS896 ,IRQS Status Bit 896" "Low,High" else hgroup.long 0x0D74++0x03 hide.long 0x0 "GICD_SPISR28,Shared Peripheral Interrupt Status Register 28" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x1E) rgroup.long 0x0D78++0x03 line.long 0x0 "GICD_SPISR29,Shared Peripheral Interrupt Status Register 29" bitfld.long 0x00 31. " IRQS959 ,IRQS Status Bit 959" "Low,High" bitfld.long 0x00 30. " IRQS958 ,IRQS Status Bit 958" "Low,High" bitfld.long 0x00 29. " IRQS957 ,IRQS Status Bit 957" "Low,High" textline " " bitfld.long 0x00 28. " IRQS956 ,IRQS Status Bit 956" "Low,High" bitfld.long 0x00 27. " IRQS955 ,IRQS Status Bit 955" "Low,High" bitfld.long 0x00 26. " IRQS954 ,IRQS Status Bit 954" "Low,High" textline " " bitfld.long 0x00 25. " IRQS953 ,IRQS Status Bit 953" "Low,High" bitfld.long 0x00 24. " IRQS952 ,IRQS Status Bit 952" "Low,High" bitfld.long 0x00 23. " IRQS951 ,IRQS Status Bit 951" "Low,High" textline " " bitfld.long 0x00 22. " IRQS950 ,IRQS Status Bit 950" "Low,High" bitfld.long 0x00 21. " IRQS949 ,IRQS Status Bit 949" "Low,High" bitfld.long 0x00 20. " IRQS948 ,IRQS Status Bit 948" "Low,High" textline " " bitfld.long 0x00 19. " IRQS947 ,IRQS Status Bit 947" "Low,High" bitfld.long 0x00 18. " IRQS946 ,IRQS Status Bit 946" "Low,High" bitfld.long 0x00 17. " IRQS945 ,IRQS Status Bit 945" "Low,High" textline " " bitfld.long 0x00 16. " IRQS944 ,IRQS Status Bit 944" "Low,High" bitfld.long 0x00 15. " IRQS943 ,IRQS Status Bit 943" "Low,High" bitfld.long 0x00 14. " IRQS942 ,IRQS Status Bit 942" "Low,High" textline " " bitfld.long 0x00 13. " IRQS941 ,IRQS Status Bit 941" "Low,High" bitfld.long 0x00 12. " IRQS940 ,IRQS Status Bit 940" "Low,High" bitfld.long 0x00 11. " IRQS939 ,IRQS Status Bit 939" "Low,High" textline " " bitfld.long 0x00 10. " IRQS938 ,IRQS Status Bit 938" "Low,High" bitfld.long 0x00 9. " IRQS937 ,IRQS Status Bit 937" "Low,High" bitfld.long 0x00 8. " IRQS936 ,IRQS Status Bit 936" "Low,High" textline " " bitfld.long 0x00 7. " IRQS935 ,IRQS Status Bit 935" "Low,High" bitfld.long 0x00 6. " IRQS934 ,IRQS Status Bit 934" "Low,High" bitfld.long 0x00 5. " IRQS933 ,IRQS Status Bit 933" "Low,High" textline " " bitfld.long 0x00 4. " IRQS932 ,IRQS Status Bit 932" "Low,High" bitfld.long 0x00 3. " IRQS931 ,IRQS Status Bit 931" "Low,High" bitfld.long 0x00 2. " IRQS930 ,IRQS Status Bit 930" "Low,High" textline " " bitfld.long 0x00 1. " IRQS929 ,IRQS Status Bit 929" "Low,High" bitfld.long 0x00 0. " IRQS928 ,IRQS Status Bit 928" "Low,High" else hgroup.long 0x0D78++0x03 hide.long 0x0 "GICD_SPISR29,Shared Peripheral Interrupt Status Register 29" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(AD:0xF9000000+0x04))&0x0000001F)>=0x1F) rgroup.long 0x0D7C++0x03 line.long 0x0 "GICD_SPISR30,Shared Peripheral Interrupt Status Register 30" bitfld.long 0x00 27. " IRQS987 ,IRQS Status Bit 987" "Low,High" bitfld.long 0x00 26. " IRQS986 ,IRQS Status Bit 986" "Low,High" textline " " bitfld.long 0x00 25. " IRQS985 ,IRQS Status Bit 985" "Low,High" bitfld.long 0x00 24. " IRQS984 ,IRQS Status Bit 984" "Low,High" bitfld.long 0x00 23. " IRQS983 ,IRQS Status Bit 983" "Low,High" textline " " bitfld.long 0x00 22. " IRQS982 ,IRQS Status Bit 982" "Low,High" bitfld.long 0x00 21. " IRQS981 ,IRQS Status Bit 981" "Low,High" bitfld.long 0x00 20. " IRQS980 ,IRQS Status Bit 980" "Low,High" textline " " bitfld.long 0x00 19. " IRQS979 ,IRQS Status Bit 979" "Low,High" bitfld.long 0x00 18. " IRQS978 ,IRQS Status Bit 978" "Low,High" bitfld.long 0x00 17. " IRQS977 ,IRQS Status Bit 977" "Low,High" textline " " bitfld.long 0x00 16. " IRQS976 ,IRQS Status Bit 976" "Low,High" bitfld.long 0x00 15. " IRQS975 ,IRQS Status Bit 975" "Low,High" bitfld.long 0x00 14. " IRQS974 ,IRQS Status Bit 974" "Low,High" textline " " bitfld.long 0x00 13. " IRQS973 ,IRQS Status Bit 973" "Low,High" bitfld.long 0x00 12. " IRQS972 ,IRQS Status Bit 972" "Low,High" bitfld.long 0x00 11. " IRQS971 ,IRQS Status Bit 971" "Low,High" textline " " bitfld.long 0x00 10. " IRQS970 ,IRQS Status Bit 970" "Low,High" bitfld.long 0x00 9. " IRQS969 ,IRQS Status Bit 969" "Low,High" bitfld.long 0x00 8. " IRQS968 ,IRQS Status Bit 968" "Low,High" textline " " bitfld.long 0x00 7. " IRQS967 ,IRQS Status Bit 967" "Low,High" bitfld.long 0x00 6. " IRQS966 ,IRQS Status Bit 966" "Low,High" bitfld.long 0x00 5. " IRQS965 ,IRQS Status Bit 965" "Low,High" textline " " bitfld.long 0x00 4. " IRQS964 ,IRQS Status Bit 964" "Low,High" bitfld.long 0x00 3. " IRQS963 ,IRQS Status Bit 963" "Low,High" bitfld.long 0x00 2. " IRQS962 ,IRQS Status Bit 962" "Low,High" textline " " bitfld.long 0x00 1. " IRQS961 ,IRQS Status Bit 961" "Low,High" bitfld.long 0x00 0. " IRQS960 ,IRQS Status Bit 960" "Low,High" else hgroup.long 0x0D7C++0x03 hide.long 0x0 "GICD_SPISR30,Shared Peripheral Interrupt Status Register 30" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif tree.end width 25. tree "Software Generated Interrupt" if (((per.l(AD:0xF9000000+0x04))&0x400)==0x400) wgroup.long 0x0F00++0x03 line.long 0x00 "GICD_SGIR,Software Generated Interrupt Register" bitfld.long 0x00 24.--25. " TLF ,Target List Filter" "TargetList,All CPUs,Request CPU,?..." hexmask.long.byte 0x00 16.--23. 1. " CPUTL ,CPU Target List" textline " " bitfld.long 0x00 15. " NSATT ,NSATT" "Secure,Non-secure" bitfld.long 0x00 0.--3. " SGINTID ,SGI Interrupt ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else wgroup.long 0x0F00++0x03 line.long 0x00 "GICD_SGIR,Software Generated Interrupt Register" bitfld.long 0x00 24.--25. " TLF ,Target List Filter" "TargetList,All CPUs,Request CPU,?..." hexmask.long.byte 0x00 16.--23. 1. " CPUTL ,CPU Target List" textline " " bitfld.long 0x00 0.--3. " SGINTID ,SGI Interrupt ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif tree.end width 12. tree "Peripheral/Component ID Registers" rgroup.byte 0x0FE0++0x00 line.byte 0x00 "GICD_PIDR0,Peripheral ID0 Register" hexmask.byte 0x00 0.--7. 1. " PART_NUMBER_0 ,Returns 0x90" rgroup.byte 0x0FE4++0x00 line.byte 0x00 "GICD_PIDR1,Peripheral ID1 Register" bitfld.byte 0x00 4.--7. " JEP106_ID_3_0 ,JEP106 identity code [3:0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.byte 0x00 0.--3. " PART_NUMBER_1 ,Returns 0x3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.byte 0x0FE8++0x00 line.byte 0x00 "GICD_PIDR2,Peripheral ID2 Register" bitfld.byte 0x00 4.--7. " ARCHITECTURE ,Identifies the architecture version of the GIC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.byte 0x00 3. " JEDEC_USED ,This indicates that the GIC uses a manufacturers identity code that was allocated by JEDEC according to JEP106" "Low,High" bitfld.byte 0x00 0.--2. " JEP106_ID_CODE ,JEP106 identity code field" "0,1,2,3,4,5,6,7" rgroup.byte 0x0FEC++0x00 line.byte 0x00 "GICD_PIDR3,Peripheral ID3 Register" bitfld.byte 0x00 4.--7. " REVAND ,The top-level RTL provides four AND gates that are tied-off to provide an output value of 0x0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.byte 0x00 0.--3. " MOD_NUMBER ,The customer can update this field if they modify the RTL of the GIC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.byte 0x0FD0++0x00 line.byte 0x00 "GICD_PIDR4,Peripheral ID4 Register" bitfld.byte 0x00 4.--7. " 4KB_COUNT ,The number of 4KB address blocks you require to access the registers expressed in powers of 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.byte 0x00 0.--3. " JEP106_C_CODE ,The JEP106 continuation code value represents how many 0x7F continuation characters occur in the manufacturers identity code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.byte 0x0FD4++0x00 line.byte 0x00 "GICD_PIDR5,Peripheral ID5 Register" bitfld.byte 0x00 5.--7. " PPI_NUMBER_0 ,The LSBs of the number of PPIs that the GIC provides" "0,1,2,3,4,5,6,7" bitfld.byte 0x00 0.--4. " SGI_NUMBER ,The number of SGIs that the GIC provides" "None,INTID0,INTID[1:0],INTID[2:0],INTID[3:0],INTID[4:0],INTID[5:0],INTID[6:0],INTID[7:0],INTID[8:0],INTID[9:0],INTID[10:0],INTID[11:0],INTID[12:0],INTID[13:0],INTID[14:0],INTID[15:0],?..." rgroup.byte 0x0FD8++0x00 line.byte 0x00 "GICD_PIDR6,Peripheral ID6 Register" bitfld.byte 0x00 2.--7. " SPI_NUMBER_0 ,The LSBs of the number of SPIs that the GIC provides" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.byte 0x00 0.--1. " PPI_NUMBER_1 ,The MSBs of the number of PPIs that the GIC provides" "0,1,2,3" rgroup.byte 0x0FDC++0x00 line.byte 0x00 "GICD_PIDR7,Peripheral ID7 Register" bitfld.byte 0x00 7. " TZ ,Identifies the number of security states that the GIC supports" "S,NS&S" bitfld.byte 0x00 4.--6. " PRIORITY ,The number of priority levels that the GIC provides" "16,32,64,128,256,?..." bitfld.byte 0x00 0.--3. " SPI_NUMBER_1 ,The MSBs of the number of SPIs that the GIC provides" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.byte 0x0FC0++0x00 line.byte 0x00 "GICD_PIDR8,Peripheral ID8 Register" bitfld.byte 0x00 7. " IDENTIFIER ,Identifies the AMBA interface that this register belongs to" "Distributor,CPU Interface" bitfld.byte 0x00 5.--6. " IF_TYPE ,Identifies the AMBA protocol that the GIC supports" "AXI,AHB-Lite,?..." bitfld.byte 0x00 2.--4. " CPU_IF ,Identifies the number of CPU Interfaces that the GIC contains" "1,2,3,4,5,6,7,8" textline " " bitfld.byte 0x00 1. " FIQ_LEGACY ,Identifies if the GIC provides a legacy FIQ input signal for each CPU Interface" "Not supported,Supported" bitfld.byte 0x00 0. " IRQ_LEGACY ,Identifies if the GIC provides a legacy IRQ input signal for each CPU Interface" "Not supported,Supported" tree.end tree.end base AD:0xF9001000 width 17. tree "CPU Interface" if (((per.l(AD:0xF9000000+0x04))&0x400)==0x0) group.long 0x0000++0x03 line.long 0x00 "GICC_CTLR,CPU Interface Control Register" bitfld.long 0x00 0. " ENABLE ,Enable for the signaling of Group 1 interrupts by the CPU interface to the connected processor" "Disabled,Enabled" textline " " textline " " textline " " else if PER.ADDRESS.isSECUREEX(AD:0xF9001000) group.long 0x0000++0x03 line.long 0x00 "GICC_CTLR,CPU Interface Control Register (Secure access)" bitfld.long 0x00 4. " SBPR ,Controls whether the GICC_BPR provides common control to Group 0 and Group 1 interrupts" "Group 0,Group 1" bitfld.long 0x00 3. " FIQEN ,Controls whether the CPU interface signals Group 0 interrupts to a target processor using the FIQ or the IRQ signal" "IRQ,FIQ" bitfld.long 0x00 2. " ACKCTL ,Acknowledge Control" "ID 1022 interrupt,Corresponding interrupt" textline " " bitfld.long 0x00 1. " ENABLENS ,Enable for the signaling of Group 1 interrupts by the CPU interface to the connected processor" "Disabled,Enabled" bitfld.long 0x00 0. " ENABLES ,Enable for the signaling of Group 0 interrupts by the CPU interface to the connected processor" "Disabled,Enabled" textline " " textline " " else group.long 0x0000++0x03 line.long 0x00 "GICC_CTLR,CPU Interface Control Register (Non-secure access)" bitfld.long 0x00 0. " ENABLE ,Enable for the signaling of Group 1 interrupts by the CPU interface to the connected processor" "Disabled,Enabled" textline " " textline " " textline " " endif endif group.long 0x0004++0x03 line.long 0x00 "GICC_PMR,Interrupt Priority Mask Register" hexmask.long.byte 0x00 0.--7. 1. " PRIORITY ,Priority mask level for CPU interface" if (((per.l(AD:0xF9000000+0x04))&0x400)==0x400) if PER.ADDRESS.isSECUREEX(AD:0xF9001000+0x0008) group.long 0x0008++0x03 line.long 0x00 "GICC_BPR,Binary Point Register (Secure access)" bitfld.long 0x00 0.--2. " BINARY_POINT ,The value of this field controls how the 8-bit interrupt priority field is split into a group priority field and subpriority field" "Reserved,Reserved,[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]" else group.long 0x0008++0x03 line.long 0x00 "GICC_BPR,Binary Point Register (Non-secure access)" bitfld.long 0x00 0.--2. " BINARY_POINT ,The value of this field controls how the 8-bit interrupt priority field is split into a group priority field and subpriority field" "Reserved,Reserved,Reserved,[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]" endif else group.long 0x0008++0x03 line.long 0x00 "GICC_BPR,Binary Point Register" bitfld.long 0x00 0.--2. " BINARY_POINT ,The value of this field controls how the 8-bit interrupt priority field is split into a group priority field and subpriority field" "Reserved,Reserved,Reserved,[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]" endif hgroup.long 0x000C++0x03 hide.long 0x00 "GICC_IAR,Interrupt Acknowledge Register" in wgroup.long 0x0010++0x03 line.long 0x00 "GICC_EOIR,End Of Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation if the write refers to an SGI this field contains the CPUID value from the corresponding GICC_IAR access" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " EOIINTID ,The Interrupt ID value from the corresponding GICC_IAR access" rgroup.long 0x0014++0x03 line.long 0x00 "GICC_RPR,Running Priority Register" hexmask.long.byte 0x00 0.--7. 1. " PRIORITY ,The current running priority on the CPU interface" rgroup.long 0x0018++0x03 line.long 0x00 "GICC_HPIR,Highest Priority Pending Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation if the PENDINTID field returns the ID of an SGI this field contains the CPUID value for that interrupt" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " PENDINTID ,The interrupt ID of the highest priority pending interrupt" if (((per.l(AD:0xF9000000+0x04))&0x400)==0x400) group.long 0x001C++0x03 line.long 0x00 "GICC_ABPR,Aliased Binary Point Register" bitfld.long 0x00 0.--2. " BINARY_POINT ,The value of this field controls how the 8-bit interrupt priority field is split into a group priority field and subpriority field" "[7:1]/[0],[7:2]/[1:0],[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]" else hgroup.long 0x001C++0x03 hide.long 0x00 "GICC_ABPR,Aliased Binary Point Register" endif rgroup.long 0x00FC++0x03 line.long 0x00 "GICC_IIDR,CPU and Virtual CPU Interface Identification Register" hexmask.long.word 0x00 20.--31. 1. " PRODID ,Product ID" bitfld.long 0x00 16.--19. " ARCH_VER ,Identifies the architecture version of the GIC" "GICv1,GICv1,GICv2,GICv2,?..." textline " " bitfld.long 0x00 12.--15. " REV ,Revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 0.--11. 1. " IMP ,Implementer" tree.end width 0x0B tree.end tree.end endif tree "ZDMA (General Purpose DMA)" tree "ADMA_CH0" base ad:0xFFA80000 width 19. group.long 0x00++0x03 line.long 0x00 "ERR_CTRL,Error Response Control Register" bitfld.long 0x00 0. " APB_ERR_RES ,The resulting pslverr after APB (Register) access to an unimplemented space" "Low,High" group.long 0x100++0x03 line.long 0x00 "CH_ISR,Interrupt Status Register" eventfld.long 0x00 11. " DMA_PAUSE ,DMA channel in pause state interrupt" "No interrupt,Interrupt" eventfld.long 0x00 10. " DMA_DONE ,DMA channel done (With or withour error) interrupt" "No interrupt,Interrupt" eventfld.long 0x00 9. " AXI_WR_DATA ,AXI write error on write data channel interrupt" "No interrupt,Interrupt" eventfld.long 0x00 8. " AXI_RD_DATA ,AXI read error on read data channel interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x00 7. " AXI_RD_DST_DSCR ,AXI read error on DST DSCR fetch interrupt" "No interrupt,Interrupt" eventfld.long 0x00 6. " AXI_RD_SRC_DSCR ,AXI read error on SRC DSCR fetch interrupt" "No interrupt,Interrupt" eventfld.long 0x00 5. " IRQ_DST_ACCT_ERR ,DST interrupt account counter overflow interrupt" "No interrupt,Interrupt" eventfld.long 0x00 4. " IRQ_SRC_ACCT_ERR ,SRC interrupt account counter overflow interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x00 3. " BYTE_CNT_OVRFL ,Byte count counter overflow interrupt" "No interrupt,Interrupt" eventfld.long 0x00 2. " DST_DSCR_DONE ,Completion of DST descriptor element interrupt" "No interrupt,Interrupt" eventfld.long 0x00 1. " SRC_DSCR_DONE ,Completion of SRC descriptor interrupt" "No interrupt,Interrupt" eventfld.long 0x00 0. " INV_APB ,APB (Register) access to an unimplemented space interrupt" "No interrupt,Interrupt" group.long 0x104++0x03 line.long 0x00 "CH_IMR_SET/CLR,Interrupt Mask Register" setclrfld.long 0x00 11. 0x08 11. 0x04 11. " DMA_PAUSE ,DMA channel in pause state interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 10. 0x08 10. 0x04 10. " DMA_DONE ,DMA channel done (With or withour error) interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 9. 0x08 9. 0x04 9. " AXI_WR_DATA ,AXI write error on write data channel interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 8. 0x08 8. 0x04 8. " AXI_RD_DATA ,AXI read error on read data channel interrupt mask" "Unmasked,Masked" textline " " setclrfld.long 0x00 7. 0x08 7. 0x04 7. " AXI_RD_DST_DSCR ,AXI read error on DST DSCR fetch interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 6. 0x08 6. 0x04 6. " AXI_RD_SRC_DSCR ,AXI read error on SRC DSCR fetch interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 5. 0x08 5. 0x04 5. " IRQ_DST_ACCT_ERR ,DST interrupt account counter overflow interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 4. 0x08 4. 0x04 4. " IRQ_SRC_ACCT_ERR ,SRC interrupt account counter overflow interrupt mask" "Unmasked,Masked" textline " " setclrfld.long 0x00 3. 0x08 3. 0x04 3. " BYTE_CNT_OVRFL ,Byte count counter overflow interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 2. 0x08 2. 0x04 2. " DST_DSCR_DONE ,Completion of DST descriptor element interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 1. 0x08 1. 0x04 1. " SRC_DSCR_DONE ,Completion of SRC descriptor interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 0. 0x08 0. 0x04 0. " INV_APB ,APB (Register) access to an unimplemented space interrupt mask" "Unmasked,Masked" group.long 0x110++0x07 line.long 0x00 "CH_CTRL0,Channel Control Register 0" bitfld.long 0x00 7. " OVR_FETCH ,Allow DMA channel to over-fetch" "Not allowed,Allowed" bitfld.long 0x00 6. " POINT_TYPE ,Descriptor store place" "APB register,Memory" bitfld.long 0x00 4.--5. " MODE ,DMA memory access selector" "Read/write,Write,Read,?..." bitfld.long 0x00 3. " RATE_CTRL ,Enable rate control" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " CONT_ADDR ,Coming out of pause" "Continuous address,Start address register" bitfld.long 0x00 1. " CONT ,Unpause DMA" "No effect,Unpause" line.long 0x04 "CH_CTRL1,Channel Control Register 1" bitfld.long 0x04 0.--4. " SRC_ISSUE ,Outstanding transaction on SRC count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" if (((d.l(ad:0xFFA80000+0x118))&0x01)==0x01) group.long 0x118++0x03 line.long 0x00 "CH_FCI,Channel Control Register 1" bitfld.long 0x00 2.--3. " PROG_CELL_CNT ,Limit the common buffer usage of the flow controlled channel" "32 + AxLEN,64 + AxLEN,128 + AxLEN,256" bitfld.long 0x00 1. " SIDE ,Flow control interface attached side selector" "Read,Write" bitfld.long 0x00 0. " EN ,Flow control interface enable" "Disabled,Enabled" else group.long 0x118++0x03 line.long 0x00 "CH_FCI,Channel Control Register 1" textfld " " bitfld.long 0x00 1. " SIDE ,Flow control interface attached side selector" "Read,Write" bitfld.long 0x00 0. " EN ,Flow control interface enable" "Disabled,Enabled" endif textline " " rgroup.long 0x11C++0x03 line.long 0x00 "CH_STATUS,Channel Status Register" bitfld.long 0x00 0.--1. " STATE ,DMA channel status" "Done with no error,Pauseed with no error,DMA is busy transferring,DMA done with error" group.long 0x120++0x17 line.long 0x00 "CH_DATA_ATTR,Channel Data AXI Parameter Register" bitfld.long 0x00 26.--27. " ARBURST ,Burst type for SRC AXI transaction" "Fixed,Incremental,?..." bitfld.long 0x00 22.--25. " ARCACHE ,AXI cache bits for data read" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 18.--21. " ARQOS ,Configurable QoS bits for AXI data read" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--17. " ARLEN ,AXI length for data read" "1,2,4,8,16,16,16,16,16,16,16,16,16,16,16,16" textline " " bitfld.long 0x00 12.--13. " AWBURST ,Burst type for DST AXI transaction" "Fixed,Incremental,?..." bitfld.long 0x00 8.--11. " AWCACHE ,AXI cache bits for data write" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " AWQOS ,Configurable QoS bits for AXI data write" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " AWLEN ,AXI length for data write" "1,2,4,8,16,16,16,16,16,16,16,16,16,16,16,16" line.long 0x04 "CH_DSCR_ATTR,Channel DSCR AXI Parameter Register" bitfld.long 0x04 8. " AXCOHRNT ,AXI transactions generated for the descriptor read coherency" "Non-coherent,Coherent" bitfld.long 0x04 4.--7. " AXCACHE ,AXI cache bit used for DSCR fetch (Src and DST side)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. " AXQOS ,QoS bit used for DSCR fetch (Src and DST side)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "CH_SRC_DSCR_WORD0,SRC DSCR Word 0" line.long 0x0C "CH_SRC_DSCR_WORD1,SRC DSCR Word 1" hexmask.long.tbyte 0x0C 0.--16. 0x01 " MSB ,Upper 12-bits of address" line.long 0x10 "CH_SRC_DSCR_WORD2,SRC DSCR Word 2" hexmask.long 0x10 0.--29. 1. " SIZE ,Buffer size in bytes" line.long 0x14 "CH_SRC_DSCR_WORD3,SRC DSCR Word 3" bitfld.long 0x14 3.--4. " CMD ,Command executed after completing current descriptor" "Next descriptor is valid,Pause,Stop,?..." bitfld.long 0x14 2. " INTR ,Require completion interrupt" "Disabled,Enabled" bitfld.long 0x14 1. " TYPE ,Current descriptor size (Bits)" "128,256" bitfld.long 0x14 0. " COHRNT ,AXI transactions generated to process the descriptor payload coherency" "Non-coherent,Coherent" group.long 0x138++0x0F line.long 0x00 "CH_DST_DSCR_WORD0,DST DSCR Word 0" line.long 0x04 "CH_DST_DSCR_WORD1,DST DSCR Word 1" hexmask.long.tbyte 0x04 0.--16. 0x01 " MSB ,Upper 12-bits of address" line.long 0x08 "CH_DST_DSCR_WORD2,DST DSCR Word 2" hexmask.long 0x08 0.--29. 1. " SIZE ,Buffer size in bytes" line.long 0x0C "CH_DST_DSCR_WORD3,DST DSCR Word 3" bitfld.long 0x0C 2. " INTR ,Require completion interrupt" "Disabled,Enabled" bitfld.long 0x0C 0. " COHRNT ,AXI transactions generated to process the descriptor payload coherency" "Non-coherent,Coherent" group.long 0x148++0x1F line.long 0x00 "CH_WR_ONLY_WORD0,Write Only Data Word 0" line.long 0x04 "CH_WR_ONLY_WORD1,Write Only Data Word 1" line.long 0x08 "CH_WR_ONLY_WORD2,Write Only Data Word 2" line.long 0x0C "CH_WR_ONLY_WORD3,Write Only Data Word 3" line.long 0x10 "CH_SRC_START_LSB,SRC DSCR Start Address LSB Regiser" line.long 0x14 "CH_SRC_START_MSB,SRC DSCR Start Address MSB Regiser" hexmask.long.tbyte 0x14 0.--16. 1. " ADDR ,Start address MSB register for SRC descriptor fetch" line.long 0x18 "CH_DST_START_LSB,DST DSCR Start Address LSB Regiser" line.long 0x1C "CH_DST_START_MSB,SRC DSCR Start Address MSB Regiser" hexmask.long.tbyte 0x1C 0.--16. 1. " ADDR ,Start address MSB register for DST descriptor fetch" if (((d.l(ad:0xFFA80000+0x110))&0x08)==0x08) group.long 0x18C++0x03 line.long 0x00 "CH_RATE_CTRL,Rate Control Count Register" hexmask.long.word 0x00 0.--11. 1. " CNT ,Scheduling interval for SRC AXI transaction" else hgroup.long 0x18C++0x03 hide.long 0x00 "CH_RATE_CTRL,Rate Control Count Register" endif hgroup.long 0x190++0x03 hide.long 0x00 "CH_IRQ_SRC_ACCT,SRC Interrupt Account Count Register" in hgroup.long 0x194++0x03 hide.long 0x00 "CH_IRQ_DST_ACCT,DST Interrupt Account Count Register" in group.long 0x200++0x03 line.long 0x00 "CH_CTRL2,Control Register 2" bitfld.long 0x00 0. " EN ,DMA channel enable" "Disabled,Enabled" width 0x0B tree.end tree "ADMA_CH1" base ad:0xFFA90000 width 19. group.long 0x00++0x03 line.long 0x00 "ERR_CTRL,Error Response Control Register" bitfld.long 0x00 0. " APB_ERR_RES ,The resulting pslverr after APB (Register) access to an unimplemented space" "Low,High" group.long 0x100++0x03 line.long 0x00 "CH_ISR,Interrupt Status Register" eventfld.long 0x00 11. " DMA_PAUSE ,DMA channel in pause state interrupt" "No interrupt,Interrupt" eventfld.long 0x00 10. " DMA_DONE ,DMA channel done (With or withour error) interrupt" "No interrupt,Interrupt" eventfld.long 0x00 9. " AXI_WR_DATA ,AXI write error on write data channel interrupt" "No interrupt,Interrupt" eventfld.long 0x00 8. " AXI_RD_DATA ,AXI read error on read data channel interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x00 7. " AXI_RD_DST_DSCR ,AXI read error on DST DSCR fetch interrupt" "No interrupt,Interrupt" eventfld.long 0x00 6. " AXI_RD_SRC_DSCR ,AXI read error on SRC DSCR fetch interrupt" "No interrupt,Interrupt" eventfld.long 0x00 5. " IRQ_DST_ACCT_ERR ,DST interrupt account counter overflow interrupt" "No interrupt,Interrupt" eventfld.long 0x00 4. " IRQ_SRC_ACCT_ERR ,SRC interrupt account counter overflow interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x00 3. " BYTE_CNT_OVRFL ,Byte count counter overflow interrupt" "No interrupt,Interrupt" eventfld.long 0x00 2. " DST_DSCR_DONE ,Completion of DST descriptor element interrupt" "No interrupt,Interrupt" eventfld.long 0x00 1. " SRC_DSCR_DONE ,Completion of SRC descriptor interrupt" "No interrupt,Interrupt" eventfld.long 0x00 0. " INV_APB ,APB (Register) access to an unimplemented space interrupt" "No interrupt,Interrupt" group.long 0x104++0x03 line.long 0x00 "CH_IMR_SET/CLR,Interrupt Mask Register" setclrfld.long 0x00 11. 0x08 11. 0x04 11. " DMA_PAUSE ,DMA channel in pause state interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 10. 0x08 10. 0x04 10. " DMA_DONE ,DMA channel done (With or withour error) interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 9. 0x08 9. 0x04 9. " AXI_WR_DATA ,AXI write error on write data channel interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 8. 0x08 8. 0x04 8. " AXI_RD_DATA ,AXI read error on read data channel interrupt mask" "Unmasked,Masked" textline " " setclrfld.long 0x00 7. 0x08 7. 0x04 7. " AXI_RD_DST_DSCR ,AXI read error on DST DSCR fetch interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 6. 0x08 6. 0x04 6. " AXI_RD_SRC_DSCR ,AXI read error on SRC DSCR fetch interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 5. 0x08 5. 0x04 5. " IRQ_DST_ACCT_ERR ,DST interrupt account counter overflow interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 4. 0x08 4. 0x04 4. " IRQ_SRC_ACCT_ERR ,SRC interrupt account counter overflow interrupt mask" "Unmasked,Masked" textline " " setclrfld.long 0x00 3. 0x08 3. 0x04 3. " BYTE_CNT_OVRFL ,Byte count counter overflow interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 2. 0x08 2. 0x04 2. " DST_DSCR_DONE ,Completion of DST descriptor element interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 1. 0x08 1. 0x04 1. " SRC_DSCR_DONE ,Completion of SRC descriptor interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 0. 0x08 0. 0x04 0. " INV_APB ,APB (Register) access to an unimplemented space interrupt mask" "Unmasked,Masked" group.long 0x110++0x07 line.long 0x00 "CH_CTRL0,Channel Control Register 0" bitfld.long 0x00 7. " OVR_FETCH ,Allow DMA channel to over-fetch" "Not allowed,Allowed" bitfld.long 0x00 6. " POINT_TYPE ,Descriptor store place" "APB register,Memory" bitfld.long 0x00 4.--5. " MODE ,DMA memory access selector" "Read/write,Write,Read,?..." bitfld.long 0x00 3. " RATE_CTRL ,Enable rate control" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " CONT_ADDR ,Coming out of pause" "Continuous address,Start address register" bitfld.long 0x00 1. " CONT ,Unpause DMA" "No effect,Unpause" line.long 0x04 "CH_CTRL1,Channel Control Register 1" bitfld.long 0x04 0.--4. " SRC_ISSUE ,Outstanding transaction on SRC count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" if (((d.l(ad:0xFFA90000+0x118))&0x01)==0x01) group.long 0x118++0x03 line.long 0x00 "CH_FCI,Channel Control Register 1" bitfld.long 0x00 2.--3. " PROG_CELL_CNT ,Limit the common buffer usage of the flow controlled channel" "32 + AxLEN,64 + AxLEN,128 + AxLEN,256" bitfld.long 0x00 1. " SIDE ,Flow control interface attached side selector" "Read,Write" bitfld.long 0x00 0. " EN ,Flow control interface enable" "Disabled,Enabled" else group.long 0x118++0x03 line.long 0x00 "CH_FCI,Channel Control Register 1" textfld " " bitfld.long 0x00 1. " SIDE ,Flow control interface attached side selector" "Read,Write" bitfld.long 0x00 0. " EN ,Flow control interface enable" "Disabled,Enabled" endif textline " " rgroup.long 0x11C++0x03 line.long 0x00 "CH_STATUS,Channel Status Register" bitfld.long 0x00 0.--1. " STATE ,DMA channel status" "Done with no error,Pauseed with no error,DMA is busy transferring,DMA done with error" group.long 0x120++0x17 line.long 0x00 "CH_DATA_ATTR,Channel Data AXI Parameter Register" bitfld.long 0x00 26.--27. " ARBURST ,Burst type for SRC AXI transaction" "Fixed,Incremental,?..." bitfld.long 0x00 22.--25. " ARCACHE ,AXI cache bits for data read" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 18.--21. " ARQOS ,Configurable QoS bits for AXI data read" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--17. " ARLEN ,AXI length for data read" "1,2,4,8,16,16,16,16,16,16,16,16,16,16,16,16" textline " " bitfld.long 0x00 12.--13. " AWBURST ,Burst type for DST AXI transaction" "Fixed,Incremental,?..." bitfld.long 0x00 8.--11. " AWCACHE ,AXI cache bits for data write" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " AWQOS ,Configurable QoS bits for AXI data write" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " AWLEN ,AXI length for data write" "1,2,4,8,16,16,16,16,16,16,16,16,16,16,16,16" line.long 0x04 "CH_DSCR_ATTR,Channel DSCR AXI Parameter Register" bitfld.long 0x04 8. " AXCOHRNT ,AXI transactions generated for the descriptor read coherency" "Non-coherent,Coherent" bitfld.long 0x04 4.--7. " AXCACHE ,AXI cache bit used for DSCR fetch (Src and DST side)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. " AXQOS ,QoS bit used for DSCR fetch (Src and DST side)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "CH_SRC_DSCR_WORD0,SRC DSCR Word 0" line.long 0x0C "CH_SRC_DSCR_WORD1,SRC DSCR Word 1" hexmask.long.tbyte 0x0C 0.--16. 0x01 " MSB ,Upper 12-bits of address" line.long 0x10 "CH_SRC_DSCR_WORD2,SRC DSCR Word 2" hexmask.long 0x10 0.--29. 1. " SIZE ,Buffer size in bytes" line.long 0x14 "CH_SRC_DSCR_WORD3,SRC DSCR Word 3" bitfld.long 0x14 3.--4. " CMD ,Command executed after completing current descriptor" "Next descriptor is valid,Pause,Stop,?..." bitfld.long 0x14 2. " INTR ,Require completion interrupt" "Disabled,Enabled" bitfld.long 0x14 1. " TYPE ,Current descriptor size (Bits)" "128,256" bitfld.long 0x14 0. " COHRNT ,AXI transactions generated to process the descriptor payload coherency" "Non-coherent,Coherent" group.long 0x138++0x0F line.long 0x00 "CH_DST_DSCR_WORD0,DST DSCR Word 0" line.long 0x04 "CH_DST_DSCR_WORD1,DST DSCR Word 1" hexmask.long.tbyte 0x04 0.--16. 0x01 " MSB ,Upper 12-bits of address" line.long 0x08 "CH_DST_DSCR_WORD2,DST DSCR Word 2" hexmask.long 0x08 0.--29. 1. " SIZE ,Buffer size in bytes" line.long 0x0C "CH_DST_DSCR_WORD3,DST DSCR Word 3" bitfld.long 0x0C 2. " INTR ,Require completion interrupt" "Disabled,Enabled" bitfld.long 0x0C 0. " COHRNT ,AXI transactions generated to process the descriptor payload coherency" "Non-coherent,Coherent" group.long 0x148++0x1F line.long 0x00 "CH_WR_ONLY_WORD0,Write Only Data Word 0" line.long 0x04 "CH_WR_ONLY_WORD1,Write Only Data Word 1" line.long 0x08 "CH_WR_ONLY_WORD2,Write Only Data Word 2" line.long 0x0C "CH_WR_ONLY_WORD3,Write Only Data Word 3" line.long 0x10 "CH_SRC_START_LSB,SRC DSCR Start Address LSB Regiser" line.long 0x14 "CH_SRC_START_MSB,SRC DSCR Start Address MSB Regiser" hexmask.long.tbyte 0x14 0.--16. 1. " ADDR ,Start address MSB register for SRC descriptor fetch" line.long 0x18 "CH_DST_START_LSB,DST DSCR Start Address LSB Regiser" line.long 0x1C "CH_DST_START_MSB,SRC DSCR Start Address MSB Regiser" hexmask.long.tbyte 0x1C 0.--16. 1. " ADDR ,Start address MSB register for DST descriptor fetch" if (((d.l(ad:0xFFA90000+0x110))&0x08)==0x08) group.long 0x18C++0x03 line.long 0x00 "CH_RATE_CTRL,Rate Control Count Register" hexmask.long.word 0x00 0.--11. 1. " CNT ,Scheduling interval for SRC AXI transaction" else hgroup.long 0x18C++0x03 hide.long 0x00 "CH_RATE_CTRL,Rate Control Count Register" endif hgroup.long 0x190++0x03 hide.long 0x00 "CH_IRQ_SRC_ACCT,SRC Interrupt Account Count Register" in hgroup.long 0x194++0x03 hide.long 0x00 "CH_IRQ_DST_ACCT,DST Interrupt Account Count Register" in group.long 0x200++0x03 line.long 0x00 "CH_CTRL2,Control Register 2" bitfld.long 0x00 0. " EN ,DMA channel enable" "Disabled,Enabled" width 0x0B tree.end tree "ADMA_CH2" base ad:0xFFAA0000 width 19. group.long 0x00++0x03 line.long 0x00 "ERR_CTRL,Error Response Control Register" bitfld.long 0x00 0. " APB_ERR_RES ,The resulting pslverr after APB (Register) access to an unimplemented space" "Low,High" group.long 0x100++0x03 line.long 0x00 "CH_ISR,Interrupt Status Register" eventfld.long 0x00 11. " DMA_PAUSE ,DMA channel in pause state interrupt" "No interrupt,Interrupt" eventfld.long 0x00 10. " DMA_DONE ,DMA channel done (With or withour error) interrupt" "No interrupt,Interrupt" eventfld.long 0x00 9. " AXI_WR_DATA ,AXI write error on write data channel interrupt" "No interrupt,Interrupt" eventfld.long 0x00 8. " AXI_RD_DATA ,AXI read error on read data channel interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x00 7. " AXI_RD_DST_DSCR ,AXI read error on DST DSCR fetch interrupt" "No interrupt,Interrupt" eventfld.long 0x00 6. " AXI_RD_SRC_DSCR ,AXI read error on SRC DSCR fetch interrupt" "No interrupt,Interrupt" eventfld.long 0x00 5. " IRQ_DST_ACCT_ERR ,DST interrupt account counter overflow interrupt" "No interrupt,Interrupt" eventfld.long 0x00 4. " IRQ_SRC_ACCT_ERR ,SRC interrupt account counter overflow interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x00 3. " BYTE_CNT_OVRFL ,Byte count counter overflow interrupt" "No interrupt,Interrupt" eventfld.long 0x00 2. " DST_DSCR_DONE ,Completion of DST descriptor element interrupt" "No interrupt,Interrupt" eventfld.long 0x00 1. " SRC_DSCR_DONE ,Completion of SRC descriptor interrupt" "No interrupt,Interrupt" eventfld.long 0x00 0. " INV_APB ,APB (Register) access to an unimplemented space interrupt" "No interrupt,Interrupt" group.long 0x104++0x03 line.long 0x00 "CH_IMR_SET/CLR,Interrupt Mask Register" setclrfld.long 0x00 11. 0x08 11. 0x04 11. " DMA_PAUSE ,DMA channel in pause state interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 10. 0x08 10. 0x04 10. " DMA_DONE ,DMA channel done (With or withour error) interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 9. 0x08 9. 0x04 9. " AXI_WR_DATA ,AXI write error on write data channel interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 8. 0x08 8. 0x04 8. " AXI_RD_DATA ,AXI read error on read data channel interrupt mask" "Unmasked,Masked" textline " " setclrfld.long 0x00 7. 0x08 7. 0x04 7. " AXI_RD_DST_DSCR ,AXI read error on DST DSCR fetch interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 6. 0x08 6. 0x04 6. " AXI_RD_SRC_DSCR ,AXI read error on SRC DSCR fetch interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 5. 0x08 5. 0x04 5. " IRQ_DST_ACCT_ERR ,DST interrupt account counter overflow interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 4. 0x08 4. 0x04 4. " IRQ_SRC_ACCT_ERR ,SRC interrupt account counter overflow interrupt mask" "Unmasked,Masked" textline " " setclrfld.long 0x00 3. 0x08 3. 0x04 3. " BYTE_CNT_OVRFL ,Byte count counter overflow interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 2. 0x08 2. 0x04 2. " DST_DSCR_DONE ,Completion of DST descriptor element interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 1. 0x08 1. 0x04 1. " SRC_DSCR_DONE ,Completion of SRC descriptor interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 0. 0x08 0. 0x04 0. " INV_APB ,APB (Register) access to an unimplemented space interrupt mask" "Unmasked,Masked" group.long 0x110++0x07 line.long 0x00 "CH_CTRL0,Channel Control Register 0" bitfld.long 0x00 7. " OVR_FETCH ,Allow DMA channel to over-fetch" "Not allowed,Allowed" bitfld.long 0x00 6. " POINT_TYPE ,Descriptor store place" "APB register,Memory" bitfld.long 0x00 4.--5. " MODE ,DMA memory access selector" "Read/write,Write,Read,?..." bitfld.long 0x00 3. " RATE_CTRL ,Enable rate control" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " CONT_ADDR ,Coming out of pause" "Continuous address,Start address register" bitfld.long 0x00 1. " CONT ,Unpause DMA" "No effect,Unpause" line.long 0x04 "CH_CTRL1,Channel Control Register 1" bitfld.long 0x04 0.--4. " SRC_ISSUE ,Outstanding transaction on SRC count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" if (((d.l(ad:0xFFAA0000+0x118))&0x01)==0x01) group.long 0x118++0x03 line.long 0x00 "CH_FCI,Channel Control Register 1" bitfld.long 0x00 2.--3. " PROG_CELL_CNT ,Limit the common buffer usage of the flow controlled channel" "32 + AxLEN,64 + AxLEN,128 + AxLEN,256" bitfld.long 0x00 1. " SIDE ,Flow control interface attached side selector" "Read,Write" bitfld.long 0x00 0. " EN ,Flow control interface enable" "Disabled,Enabled" else group.long 0x118++0x03 line.long 0x00 "CH_FCI,Channel Control Register 1" textfld " " bitfld.long 0x00 1. " SIDE ,Flow control interface attached side selector" "Read,Write" bitfld.long 0x00 0. " EN ,Flow control interface enable" "Disabled,Enabled" endif textline " " rgroup.long 0x11C++0x03 line.long 0x00 "CH_STATUS,Channel Status Register" bitfld.long 0x00 0.--1. " STATE ,DMA channel status" "Done with no error,Pauseed with no error,DMA is busy transferring,DMA done with error" group.long 0x120++0x17 line.long 0x00 "CH_DATA_ATTR,Channel Data AXI Parameter Register" bitfld.long 0x00 26.--27. " ARBURST ,Burst type for SRC AXI transaction" "Fixed,Incremental,?..." bitfld.long 0x00 22.--25. " ARCACHE ,AXI cache bits for data read" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 18.--21. " ARQOS ,Configurable QoS bits for AXI data read" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--17. " ARLEN ,AXI length for data read" "1,2,4,8,16,16,16,16,16,16,16,16,16,16,16,16" textline " " bitfld.long 0x00 12.--13. " AWBURST ,Burst type for DST AXI transaction" "Fixed,Incremental,?..." bitfld.long 0x00 8.--11. " AWCACHE ,AXI cache bits for data write" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " AWQOS ,Configurable QoS bits for AXI data write" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " AWLEN ,AXI length for data write" "1,2,4,8,16,16,16,16,16,16,16,16,16,16,16,16" line.long 0x04 "CH_DSCR_ATTR,Channel DSCR AXI Parameter Register" bitfld.long 0x04 8. " AXCOHRNT ,AXI transactions generated for the descriptor read coherency" "Non-coherent,Coherent" bitfld.long 0x04 4.--7. " AXCACHE ,AXI cache bit used for DSCR fetch (Src and DST side)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. " AXQOS ,QoS bit used for DSCR fetch (Src and DST side)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "CH_SRC_DSCR_WORD0,SRC DSCR Word 0" line.long 0x0C "CH_SRC_DSCR_WORD1,SRC DSCR Word 1" hexmask.long.tbyte 0x0C 0.--16. 0x01 " MSB ,Upper 12-bits of address" line.long 0x10 "CH_SRC_DSCR_WORD2,SRC DSCR Word 2" hexmask.long 0x10 0.--29. 1. " SIZE ,Buffer size in bytes" line.long 0x14 "CH_SRC_DSCR_WORD3,SRC DSCR Word 3" bitfld.long 0x14 3.--4. " CMD ,Command executed after completing current descriptor" "Next descriptor is valid,Pause,Stop,?..." bitfld.long 0x14 2. " INTR ,Require completion interrupt" "Disabled,Enabled" bitfld.long 0x14 1. " TYPE ,Current descriptor size (Bits)" "128,256" bitfld.long 0x14 0. " COHRNT ,AXI transactions generated to process the descriptor payload coherency" "Non-coherent,Coherent" group.long 0x138++0x0F line.long 0x00 "CH_DST_DSCR_WORD0,DST DSCR Word 0" line.long 0x04 "CH_DST_DSCR_WORD1,DST DSCR Word 1" hexmask.long.tbyte 0x04 0.--16. 0x01 " MSB ,Upper 12-bits of address" line.long 0x08 "CH_DST_DSCR_WORD2,DST DSCR Word 2" hexmask.long 0x08 0.--29. 1. " SIZE ,Buffer size in bytes" line.long 0x0C "CH_DST_DSCR_WORD3,DST DSCR Word 3" bitfld.long 0x0C 2. " INTR ,Require completion interrupt" "Disabled,Enabled" bitfld.long 0x0C 0. " COHRNT ,AXI transactions generated to process the descriptor payload coherency" "Non-coherent,Coherent" group.long 0x148++0x1F line.long 0x00 "CH_WR_ONLY_WORD0,Write Only Data Word 0" line.long 0x04 "CH_WR_ONLY_WORD1,Write Only Data Word 1" line.long 0x08 "CH_WR_ONLY_WORD2,Write Only Data Word 2" line.long 0x0C "CH_WR_ONLY_WORD3,Write Only Data Word 3" line.long 0x10 "CH_SRC_START_LSB,SRC DSCR Start Address LSB Regiser" line.long 0x14 "CH_SRC_START_MSB,SRC DSCR Start Address MSB Regiser" hexmask.long.tbyte 0x14 0.--16. 1. " ADDR ,Start address MSB register for SRC descriptor fetch" line.long 0x18 "CH_DST_START_LSB,DST DSCR Start Address LSB Regiser" line.long 0x1C "CH_DST_START_MSB,SRC DSCR Start Address MSB Regiser" hexmask.long.tbyte 0x1C 0.--16. 1. " ADDR ,Start address MSB register for DST descriptor fetch" if (((d.l(ad:0xFFAA0000+0x110))&0x08)==0x08) group.long 0x18C++0x03 line.long 0x00 "CH_RATE_CTRL,Rate Control Count Register" hexmask.long.word 0x00 0.--11. 1. " CNT ,Scheduling interval for SRC AXI transaction" else hgroup.long 0x18C++0x03 hide.long 0x00 "CH_RATE_CTRL,Rate Control Count Register" endif hgroup.long 0x190++0x03 hide.long 0x00 "CH_IRQ_SRC_ACCT,SRC Interrupt Account Count Register" in hgroup.long 0x194++0x03 hide.long 0x00 "CH_IRQ_DST_ACCT,DST Interrupt Account Count Register" in group.long 0x200++0x03 line.long 0x00 "CH_CTRL2,Control Register 2" bitfld.long 0x00 0. " EN ,DMA channel enable" "Disabled,Enabled" width 0x0B tree.end tree "ADMA_CH3" base ad:0xFFAB0000 width 19. group.long 0x00++0x03 line.long 0x00 "ERR_CTRL,Error Response Control Register" bitfld.long 0x00 0. " APB_ERR_RES ,The resulting pslverr after APB (Register) access to an unimplemented space" "Low,High" group.long 0x100++0x03 line.long 0x00 "CH_ISR,Interrupt Status Register" eventfld.long 0x00 11. " DMA_PAUSE ,DMA channel in pause state interrupt" "No interrupt,Interrupt" eventfld.long 0x00 10. " DMA_DONE ,DMA channel done (With or withour error) interrupt" "No interrupt,Interrupt" eventfld.long 0x00 9. " AXI_WR_DATA ,AXI write error on write data channel interrupt" "No interrupt,Interrupt" eventfld.long 0x00 8. " AXI_RD_DATA ,AXI read error on read data channel interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x00 7. " AXI_RD_DST_DSCR ,AXI read error on DST DSCR fetch interrupt" "No interrupt,Interrupt" eventfld.long 0x00 6. " AXI_RD_SRC_DSCR ,AXI read error on SRC DSCR fetch interrupt" "No interrupt,Interrupt" eventfld.long 0x00 5. " IRQ_DST_ACCT_ERR ,DST interrupt account counter overflow interrupt" "No interrupt,Interrupt" eventfld.long 0x00 4. " IRQ_SRC_ACCT_ERR ,SRC interrupt account counter overflow interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x00 3. " BYTE_CNT_OVRFL ,Byte count counter overflow interrupt" "No interrupt,Interrupt" eventfld.long 0x00 2. " DST_DSCR_DONE ,Completion of DST descriptor element interrupt" "No interrupt,Interrupt" eventfld.long 0x00 1. " SRC_DSCR_DONE ,Completion of SRC descriptor interrupt" "No interrupt,Interrupt" eventfld.long 0x00 0. " INV_APB ,APB (Register) access to an unimplemented space interrupt" "No interrupt,Interrupt" group.long 0x104++0x03 line.long 0x00 "CH_IMR_SET/CLR,Interrupt Mask Register" setclrfld.long 0x00 11. 0x08 11. 0x04 11. " DMA_PAUSE ,DMA channel in pause state interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 10. 0x08 10. 0x04 10. " DMA_DONE ,DMA channel done (With or withour error) interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 9. 0x08 9. 0x04 9. " AXI_WR_DATA ,AXI write error on write data channel interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 8. 0x08 8. 0x04 8. " AXI_RD_DATA ,AXI read error on read data channel interrupt mask" "Unmasked,Masked" textline " " setclrfld.long 0x00 7. 0x08 7. 0x04 7. " AXI_RD_DST_DSCR ,AXI read error on DST DSCR fetch interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 6. 0x08 6. 0x04 6. " AXI_RD_SRC_DSCR ,AXI read error on SRC DSCR fetch interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 5. 0x08 5. 0x04 5. " IRQ_DST_ACCT_ERR ,DST interrupt account counter overflow interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 4. 0x08 4. 0x04 4. " IRQ_SRC_ACCT_ERR ,SRC interrupt account counter overflow interrupt mask" "Unmasked,Masked" textline " " setclrfld.long 0x00 3. 0x08 3. 0x04 3. " BYTE_CNT_OVRFL ,Byte count counter overflow interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 2. 0x08 2. 0x04 2. " DST_DSCR_DONE ,Completion of DST descriptor element interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 1. 0x08 1. 0x04 1. " SRC_DSCR_DONE ,Completion of SRC descriptor interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 0. 0x08 0. 0x04 0. " INV_APB ,APB (Register) access to an unimplemented space interrupt mask" "Unmasked,Masked" group.long 0x110++0x07 line.long 0x00 "CH_CTRL0,Channel Control Register 0" bitfld.long 0x00 7. " OVR_FETCH ,Allow DMA channel to over-fetch" "Not allowed,Allowed" bitfld.long 0x00 6. " POINT_TYPE ,Descriptor store place" "APB register,Memory" bitfld.long 0x00 4.--5. " MODE ,DMA memory access selector" "Read/write,Write,Read,?..." bitfld.long 0x00 3. " RATE_CTRL ,Enable rate control" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " CONT_ADDR ,Coming out of pause" "Continuous address,Start address register" bitfld.long 0x00 1. " CONT ,Unpause DMA" "No effect,Unpause" line.long 0x04 "CH_CTRL1,Channel Control Register 1" bitfld.long 0x04 0.--4. " SRC_ISSUE ,Outstanding transaction on SRC count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" if (((d.l(ad:0xFFAB0000+0x118))&0x01)==0x01) group.long 0x118++0x03 line.long 0x00 "CH_FCI,Channel Control Register 1" bitfld.long 0x00 2.--3. " PROG_CELL_CNT ,Limit the common buffer usage of the flow controlled channel" "32 + AxLEN,64 + AxLEN,128 + AxLEN,256" bitfld.long 0x00 1. " SIDE ,Flow control interface attached side selector" "Read,Write" bitfld.long 0x00 0. " EN ,Flow control interface enable" "Disabled,Enabled" else group.long 0x118++0x03 line.long 0x00 "CH_FCI,Channel Control Register 1" textfld " " bitfld.long 0x00 1. " SIDE ,Flow control interface attached side selector" "Read,Write" bitfld.long 0x00 0. " EN ,Flow control interface enable" "Disabled,Enabled" endif textline " " rgroup.long 0x11C++0x03 line.long 0x00 "CH_STATUS,Channel Status Register" bitfld.long 0x00 0.--1. " STATE ,DMA channel status" "Done with no error,Pauseed with no error,DMA is busy transferring,DMA done with error" group.long 0x120++0x17 line.long 0x00 "CH_DATA_ATTR,Channel Data AXI Parameter Register" bitfld.long 0x00 26.--27. " ARBURST ,Burst type for SRC AXI transaction" "Fixed,Incremental,?..." bitfld.long 0x00 22.--25. " ARCACHE ,AXI cache bits for data read" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 18.--21. " ARQOS ,Configurable QoS bits for AXI data read" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--17. " ARLEN ,AXI length for data read" "1,2,4,8,16,16,16,16,16,16,16,16,16,16,16,16" textline " " bitfld.long 0x00 12.--13. " AWBURST ,Burst type for DST AXI transaction" "Fixed,Incremental,?..." bitfld.long 0x00 8.--11. " AWCACHE ,AXI cache bits for data write" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " AWQOS ,Configurable QoS bits for AXI data write" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " AWLEN ,AXI length for data write" "1,2,4,8,16,16,16,16,16,16,16,16,16,16,16,16" line.long 0x04 "CH_DSCR_ATTR,Channel DSCR AXI Parameter Register" bitfld.long 0x04 8. " AXCOHRNT ,AXI transactions generated for the descriptor read coherency" "Non-coherent,Coherent" bitfld.long 0x04 4.--7. " AXCACHE ,AXI cache bit used for DSCR fetch (Src and DST side)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. " AXQOS ,QoS bit used for DSCR fetch (Src and DST side)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "CH_SRC_DSCR_WORD0,SRC DSCR Word 0" line.long 0x0C "CH_SRC_DSCR_WORD1,SRC DSCR Word 1" hexmask.long.tbyte 0x0C 0.--16. 0x01 " MSB ,Upper 12-bits of address" line.long 0x10 "CH_SRC_DSCR_WORD2,SRC DSCR Word 2" hexmask.long 0x10 0.--29. 1. " SIZE ,Buffer size in bytes" line.long 0x14 "CH_SRC_DSCR_WORD3,SRC DSCR Word 3" bitfld.long 0x14 3.--4. " CMD ,Command executed after completing current descriptor" "Next descriptor is valid,Pause,Stop,?..." bitfld.long 0x14 2. " INTR ,Require completion interrupt" "Disabled,Enabled" bitfld.long 0x14 1. " TYPE ,Current descriptor size (Bits)" "128,256" bitfld.long 0x14 0. " COHRNT ,AXI transactions generated to process the descriptor payload coherency" "Non-coherent,Coherent" group.long 0x138++0x0F line.long 0x00 "CH_DST_DSCR_WORD0,DST DSCR Word 0" line.long 0x04 "CH_DST_DSCR_WORD1,DST DSCR Word 1" hexmask.long.tbyte 0x04 0.--16. 0x01 " MSB ,Upper 12-bits of address" line.long 0x08 "CH_DST_DSCR_WORD2,DST DSCR Word 2" hexmask.long 0x08 0.--29. 1. " SIZE ,Buffer size in bytes" line.long 0x0C "CH_DST_DSCR_WORD3,DST DSCR Word 3" bitfld.long 0x0C 2. " INTR ,Require completion interrupt" "Disabled,Enabled" bitfld.long 0x0C 0. " COHRNT ,AXI transactions generated to process the descriptor payload coherency" "Non-coherent,Coherent" group.long 0x148++0x1F line.long 0x00 "CH_WR_ONLY_WORD0,Write Only Data Word 0" line.long 0x04 "CH_WR_ONLY_WORD1,Write Only Data Word 1" line.long 0x08 "CH_WR_ONLY_WORD2,Write Only Data Word 2" line.long 0x0C "CH_WR_ONLY_WORD3,Write Only Data Word 3" line.long 0x10 "CH_SRC_START_LSB,SRC DSCR Start Address LSB Regiser" line.long 0x14 "CH_SRC_START_MSB,SRC DSCR Start Address MSB Regiser" hexmask.long.tbyte 0x14 0.--16. 1. " ADDR ,Start address MSB register for SRC descriptor fetch" line.long 0x18 "CH_DST_START_LSB,DST DSCR Start Address LSB Regiser" line.long 0x1C "CH_DST_START_MSB,SRC DSCR Start Address MSB Regiser" hexmask.long.tbyte 0x1C 0.--16. 1. " ADDR ,Start address MSB register for DST descriptor fetch" if (((d.l(ad:0xFFAB0000+0x110))&0x08)==0x08) group.long 0x18C++0x03 line.long 0x00 "CH_RATE_CTRL,Rate Control Count Register" hexmask.long.word 0x00 0.--11. 1. " CNT ,Scheduling interval for SRC AXI transaction" else hgroup.long 0x18C++0x03 hide.long 0x00 "CH_RATE_CTRL,Rate Control Count Register" endif hgroup.long 0x190++0x03 hide.long 0x00 "CH_IRQ_SRC_ACCT,SRC Interrupt Account Count Register" in hgroup.long 0x194++0x03 hide.long 0x00 "CH_IRQ_DST_ACCT,DST Interrupt Account Count Register" in group.long 0x200++0x03 line.long 0x00 "CH_CTRL2,Control Register 2" bitfld.long 0x00 0. " EN ,DMA channel enable" "Disabled,Enabled" width 0x0B tree.end tree "ADMA_CH4" base ad:0xFFAC0000 width 19. group.long 0x00++0x03 line.long 0x00 "ERR_CTRL,Error Response Control Register" bitfld.long 0x00 0. " APB_ERR_RES ,The resulting pslverr after APB (Register) access to an unimplemented space" "Low,High" group.long 0x100++0x03 line.long 0x00 "CH_ISR,Interrupt Status Register" eventfld.long 0x00 11. " DMA_PAUSE ,DMA channel in pause state interrupt" "No interrupt,Interrupt" eventfld.long 0x00 10. " DMA_DONE ,DMA channel done (With or withour error) interrupt" "No interrupt,Interrupt" eventfld.long 0x00 9. " AXI_WR_DATA ,AXI write error on write data channel interrupt" "No interrupt,Interrupt" eventfld.long 0x00 8. " AXI_RD_DATA ,AXI read error on read data channel interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x00 7. " AXI_RD_DST_DSCR ,AXI read error on DST DSCR fetch interrupt" "No interrupt,Interrupt" eventfld.long 0x00 6. " AXI_RD_SRC_DSCR ,AXI read error on SRC DSCR fetch interrupt" "No interrupt,Interrupt" eventfld.long 0x00 5. " IRQ_DST_ACCT_ERR ,DST interrupt account counter overflow interrupt" "No interrupt,Interrupt" eventfld.long 0x00 4. " IRQ_SRC_ACCT_ERR ,SRC interrupt account counter overflow interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x00 3. " BYTE_CNT_OVRFL ,Byte count counter overflow interrupt" "No interrupt,Interrupt" eventfld.long 0x00 2. " DST_DSCR_DONE ,Completion of DST descriptor element interrupt" "No interrupt,Interrupt" eventfld.long 0x00 1. " SRC_DSCR_DONE ,Completion of SRC descriptor interrupt" "No interrupt,Interrupt" eventfld.long 0x00 0. " INV_APB ,APB (Register) access to an unimplemented space interrupt" "No interrupt,Interrupt" group.long 0x104++0x03 line.long 0x00 "CH_IMR_SET/CLR,Interrupt Mask Register" setclrfld.long 0x00 11. 0x08 11. 0x04 11. " DMA_PAUSE ,DMA channel in pause state interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 10. 0x08 10. 0x04 10. " DMA_DONE ,DMA channel done (With or withour error) interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 9. 0x08 9. 0x04 9. " AXI_WR_DATA ,AXI write error on write data channel interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 8. 0x08 8. 0x04 8. " AXI_RD_DATA ,AXI read error on read data channel interrupt mask" "Unmasked,Masked" textline " " setclrfld.long 0x00 7. 0x08 7. 0x04 7. " AXI_RD_DST_DSCR ,AXI read error on DST DSCR fetch interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 6. 0x08 6. 0x04 6. " AXI_RD_SRC_DSCR ,AXI read error on SRC DSCR fetch interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 5. 0x08 5. 0x04 5. " IRQ_DST_ACCT_ERR ,DST interrupt account counter overflow interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 4. 0x08 4. 0x04 4. " IRQ_SRC_ACCT_ERR ,SRC interrupt account counter overflow interrupt mask" "Unmasked,Masked" textline " " setclrfld.long 0x00 3. 0x08 3. 0x04 3. " BYTE_CNT_OVRFL ,Byte count counter overflow interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 2. 0x08 2. 0x04 2. " DST_DSCR_DONE ,Completion of DST descriptor element interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 1. 0x08 1. 0x04 1. " SRC_DSCR_DONE ,Completion of SRC descriptor interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 0. 0x08 0. 0x04 0. " INV_APB ,APB (Register) access to an unimplemented space interrupt mask" "Unmasked,Masked" group.long 0x110++0x07 line.long 0x00 "CH_CTRL0,Channel Control Register 0" bitfld.long 0x00 7. " OVR_FETCH ,Allow DMA channel to over-fetch" "Not allowed,Allowed" bitfld.long 0x00 6. " POINT_TYPE ,Descriptor store place" "APB register,Memory" bitfld.long 0x00 4.--5. " MODE ,DMA memory access selector" "Read/write,Write,Read,?..." bitfld.long 0x00 3. " RATE_CTRL ,Enable rate control" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " CONT_ADDR ,Coming out of pause" "Continuous address,Start address register" bitfld.long 0x00 1. " CONT ,Unpause DMA" "No effect,Unpause" line.long 0x04 "CH_CTRL1,Channel Control Register 1" bitfld.long 0x04 0.--4. " SRC_ISSUE ,Outstanding transaction on SRC count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" if (((d.l(ad:0xFFAC0000+0x118))&0x01)==0x01) group.long 0x118++0x03 line.long 0x00 "CH_FCI,Channel Control Register 1" bitfld.long 0x00 2.--3. " PROG_CELL_CNT ,Limit the common buffer usage of the flow controlled channel" "32 + AxLEN,64 + AxLEN,128 + AxLEN,256" bitfld.long 0x00 1. " SIDE ,Flow control interface attached side selector" "Read,Write" bitfld.long 0x00 0. " EN ,Flow control interface enable" "Disabled,Enabled" else group.long 0x118++0x03 line.long 0x00 "CH_FCI,Channel Control Register 1" textfld " " bitfld.long 0x00 1. " SIDE ,Flow control interface attached side selector" "Read,Write" bitfld.long 0x00 0. " EN ,Flow control interface enable" "Disabled,Enabled" endif textline " " rgroup.long 0x11C++0x03 line.long 0x00 "CH_STATUS,Channel Status Register" bitfld.long 0x00 0.--1. " STATE ,DMA channel status" "Done with no error,Pauseed with no error,DMA is busy transferring,DMA done with error" group.long 0x120++0x17 line.long 0x00 "CH_DATA_ATTR,Channel Data AXI Parameter Register" bitfld.long 0x00 26.--27. " ARBURST ,Burst type for SRC AXI transaction" "Fixed,Incremental,?..." bitfld.long 0x00 22.--25. " ARCACHE ,AXI cache bits for data read" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 18.--21. " ARQOS ,Configurable QoS bits for AXI data read" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--17. " ARLEN ,AXI length for data read" "1,2,4,8,16,16,16,16,16,16,16,16,16,16,16,16" textline " " bitfld.long 0x00 12.--13. " AWBURST ,Burst type for DST AXI transaction" "Fixed,Incremental,?..." bitfld.long 0x00 8.--11. " AWCACHE ,AXI cache bits for data write" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " AWQOS ,Configurable QoS bits for AXI data write" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " AWLEN ,AXI length for data write" "1,2,4,8,16,16,16,16,16,16,16,16,16,16,16,16" line.long 0x04 "CH_DSCR_ATTR,Channel DSCR AXI Parameter Register" bitfld.long 0x04 8. " AXCOHRNT ,AXI transactions generated for the descriptor read coherency" "Non-coherent,Coherent" bitfld.long 0x04 4.--7. " AXCACHE ,AXI cache bit used for DSCR fetch (Src and DST side)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. " AXQOS ,QoS bit used for DSCR fetch (Src and DST side)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "CH_SRC_DSCR_WORD0,SRC DSCR Word 0" line.long 0x0C "CH_SRC_DSCR_WORD1,SRC DSCR Word 1" hexmask.long.tbyte 0x0C 0.--16. 0x01 " MSB ,Upper 12-bits of address" line.long 0x10 "CH_SRC_DSCR_WORD2,SRC DSCR Word 2" hexmask.long 0x10 0.--29. 1. " SIZE ,Buffer size in bytes" line.long 0x14 "CH_SRC_DSCR_WORD3,SRC DSCR Word 3" bitfld.long 0x14 3.--4. " CMD ,Command executed after completing current descriptor" "Next descriptor is valid,Pause,Stop,?..." bitfld.long 0x14 2. " INTR ,Require completion interrupt" "Disabled,Enabled" bitfld.long 0x14 1. " TYPE ,Current descriptor size (Bits)" "128,256" bitfld.long 0x14 0. " COHRNT ,AXI transactions generated to process the descriptor payload coherency" "Non-coherent,Coherent" group.long 0x138++0x0F line.long 0x00 "CH_DST_DSCR_WORD0,DST DSCR Word 0" line.long 0x04 "CH_DST_DSCR_WORD1,DST DSCR Word 1" hexmask.long.tbyte 0x04 0.--16. 0x01 " MSB ,Upper 12-bits of address" line.long 0x08 "CH_DST_DSCR_WORD2,DST DSCR Word 2" hexmask.long 0x08 0.--29. 1. " SIZE ,Buffer size in bytes" line.long 0x0C "CH_DST_DSCR_WORD3,DST DSCR Word 3" bitfld.long 0x0C 2. " INTR ,Require completion interrupt" "Disabled,Enabled" bitfld.long 0x0C 0. " COHRNT ,AXI transactions generated to process the descriptor payload coherency" "Non-coherent,Coherent" group.long 0x148++0x1F line.long 0x00 "CH_WR_ONLY_WORD0,Write Only Data Word 0" line.long 0x04 "CH_WR_ONLY_WORD1,Write Only Data Word 1" line.long 0x08 "CH_WR_ONLY_WORD2,Write Only Data Word 2" line.long 0x0C "CH_WR_ONLY_WORD3,Write Only Data Word 3" line.long 0x10 "CH_SRC_START_LSB,SRC DSCR Start Address LSB Regiser" line.long 0x14 "CH_SRC_START_MSB,SRC DSCR Start Address MSB Regiser" hexmask.long.tbyte 0x14 0.--16. 1. " ADDR ,Start address MSB register for SRC descriptor fetch" line.long 0x18 "CH_DST_START_LSB,DST DSCR Start Address LSB Regiser" line.long 0x1C "CH_DST_START_MSB,SRC DSCR Start Address MSB Regiser" hexmask.long.tbyte 0x1C 0.--16. 1. " ADDR ,Start address MSB register for DST descriptor fetch" if (((d.l(ad:0xFFAC0000+0x110))&0x08)==0x08) group.long 0x18C++0x03 line.long 0x00 "CH_RATE_CTRL,Rate Control Count Register" hexmask.long.word 0x00 0.--11. 1. " CNT ,Scheduling interval for SRC AXI transaction" else hgroup.long 0x18C++0x03 hide.long 0x00 "CH_RATE_CTRL,Rate Control Count Register" endif hgroup.long 0x190++0x03 hide.long 0x00 "CH_IRQ_SRC_ACCT,SRC Interrupt Account Count Register" in hgroup.long 0x194++0x03 hide.long 0x00 "CH_IRQ_DST_ACCT,DST Interrupt Account Count Register" in group.long 0x200++0x03 line.long 0x00 "CH_CTRL2,Control Register 2" bitfld.long 0x00 0. " EN ,DMA channel enable" "Disabled,Enabled" width 0x0B tree.end tree "ADMA_CH5" base ad:0xFFAD0000 width 19. group.long 0x00++0x03 line.long 0x00 "ERR_CTRL,Error Response Control Register" bitfld.long 0x00 0. " APB_ERR_RES ,The resulting pslverr after APB (Register) access to an unimplemented space" "Low,High" group.long 0x100++0x03 line.long 0x00 "CH_ISR,Interrupt Status Register" eventfld.long 0x00 11. " DMA_PAUSE ,DMA channel in pause state interrupt" "No interrupt,Interrupt" eventfld.long 0x00 10. " DMA_DONE ,DMA channel done (With or withour error) interrupt" "No interrupt,Interrupt" eventfld.long 0x00 9. " AXI_WR_DATA ,AXI write error on write data channel interrupt" "No interrupt,Interrupt" eventfld.long 0x00 8. " AXI_RD_DATA ,AXI read error on read data channel interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x00 7. " AXI_RD_DST_DSCR ,AXI read error on DST DSCR fetch interrupt" "No interrupt,Interrupt" eventfld.long 0x00 6. " AXI_RD_SRC_DSCR ,AXI read error on SRC DSCR fetch interrupt" "No interrupt,Interrupt" eventfld.long 0x00 5. " IRQ_DST_ACCT_ERR ,DST interrupt account counter overflow interrupt" "No interrupt,Interrupt" eventfld.long 0x00 4. " IRQ_SRC_ACCT_ERR ,SRC interrupt account counter overflow interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x00 3. " BYTE_CNT_OVRFL ,Byte count counter overflow interrupt" "No interrupt,Interrupt" eventfld.long 0x00 2. " DST_DSCR_DONE ,Completion of DST descriptor element interrupt" "No interrupt,Interrupt" eventfld.long 0x00 1. " SRC_DSCR_DONE ,Completion of SRC descriptor interrupt" "No interrupt,Interrupt" eventfld.long 0x00 0. " INV_APB ,APB (Register) access to an unimplemented space interrupt" "No interrupt,Interrupt" group.long 0x104++0x03 line.long 0x00 "CH_IMR_SET/CLR,Interrupt Mask Register" setclrfld.long 0x00 11. 0x08 11. 0x04 11. " DMA_PAUSE ,DMA channel in pause state interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 10. 0x08 10. 0x04 10. " DMA_DONE ,DMA channel done (With or withour error) interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 9. 0x08 9. 0x04 9. " AXI_WR_DATA ,AXI write error on write data channel interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 8. 0x08 8. 0x04 8. " AXI_RD_DATA ,AXI read error on read data channel interrupt mask" "Unmasked,Masked" textline " " setclrfld.long 0x00 7. 0x08 7. 0x04 7. " AXI_RD_DST_DSCR ,AXI read error on DST DSCR fetch interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 6. 0x08 6. 0x04 6. " AXI_RD_SRC_DSCR ,AXI read error on SRC DSCR fetch interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 5. 0x08 5. 0x04 5. " IRQ_DST_ACCT_ERR ,DST interrupt account counter overflow interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 4. 0x08 4. 0x04 4. " IRQ_SRC_ACCT_ERR ,SRC interrupt account counter overflow interrupt mask" "Unmasked,Masked" textline " " setclrfld.long 0x00 3. 0x08 3. 0x04 3. " BYTE_CNT_OVRFL ,Byte count counter overflow interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 2. 0x08 2. 0x04 2. " DST_DSCR_DONE ,Completion of DST descriptor element interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 1. 0x08 1. 0x04 1. " SRC_DSCR_DONE ,Completion of SRC descriptor interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 0. 0x08 0. 0x04 0. " INV_APB ,APB (Register) access to an unimplemented space interrupt mask" "Unmasked,Masked" group.long 0x110++0x07 line.long 0x00 "CH_CTRL0,Channel Control Register 0" bitfld.long 0x00 7. " OVR_FETCH ,Allow DMA channel to over-fetch" "Not allowed,Allowed" bitfld.long 0x00 6. " POINT_TYPE ,Descriptor store place" "APB register,Memory" bitfld.long 0x00 4.--5. " MODE ,DMA memory access selector" "Read/write,Write,Read,?..." bitfld.long 0x00 3. " RATE_CTRL ,Enable rate control" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " CONT_ADDR ,Coming out of pause" "Continuous address,Start address register" bitfld.long 0x00 1. " CONT ,Unpause DMA" "No effect,Unpause" line.long 0x04 "CH_CTRL1,Channel Control Register 1" bitfld.long 0x04 0.--4. " SRC_ISSUE ,Outstanding transaction on SRC count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" if (((d.l(ad:0xFFAD0000+0x118))&0x01)==0x01) group.long 0x118++0x03 line.long 0x00 "CH_FCI,Channel Control Register 1" bitfld.long 0x00 2.--3. " PROG_CELL_CNT ,Limit the common buffer usage of the flow controlled channel" "32 + AxLEN,64 + AxLEN,128 + AxLEN,256" bitfld.long 0x00 1. " SIDE ,Flow control interface attached side selector" "Read,Write" bitfld.long 0x00 0. " EN ,Flow control interface enable" "Disabled,Enabled" else group.long 0x118++0x03 line.long 0x00 "CH_FCI,Channel Control Register 1" textfld " " bitfld.long 0x00 1. " SIDE ,Flow control interface attached side selector" "Read,Write" bitfld.long 0x00 0. " EN ,Flow control interface enable" "Disabled,Enabled" endif textline " " rgroup.long 0x11C++0x03 line.long 0x00 "CH_STATUS,Channel Status Register" bitfld.long 0x00 0.--1. " STATE ,DMA channel status" "Done with no error,Pauseed with no error,DMA is busy transferring,DMA done with error" group.long 0x120++0x17 line.long 0x00 "CH_DATA_ATTR,Channel Data AXI Parameter Register" bitfld.long 0x00 26.--27. " ARBURST ,Burst type for SRC AXI transaction" "Fixed,Incremental,?..." bitfld.long 0x00 22.--25. " ARCACHE ,AXI cache bits for data read" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 18.--21. " ARQOS ,Configurable QoS bits for AXI data read" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--17. " ARLEN ,AXI length for data read" "1,2,4,8,16,16,16,16,16,16,16,16,16,16,16,16" textline " " bitfld.long 0x00 12.--13. " AWBURST ,Burst type for DST AXI transaction" "Fixed,Incremental,?..." bitfld.long 0x00 8.--11. " AWCACHE ,AXI cache bits for data write" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " AWQOS ,Configurable QoS bits for AXI data write" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " AWLEN ,AXI length for data write" "1,2,4,8,16,16,16,16,16,16,16,16,16,16,16,16" line.long 0x04 "CH_DSCR_ATTR,Channel DSCR AXI Parameter Register" bitfld.long 0x04 8. " AXCOHRNT ,AXI transactions generated for the descriptor read coherency" "Non-coherent,Coherent" bitfld.long 0x04 4.--7. " AXCACHE ,AXI cache bit used for DSCR fetch (Src and DST side)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. " AXQOS ,QoS bit used for DSCR fetch (Src and DST side)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "CH_SRC_DSCR_WORD0,SRC DSCR Word 0" line.long 0x0C "CH_SRC_DSCR_WORD1,SRC DSCR Word 1" hexmask.long.tbyte 0x0C 0.--16. 0x01 " MSB ,Upper 12-bits of address" line.long 0x10 "CH_SRC_DSCR_WORD2,SRC DSCR Word 2" hexmask.long 0x10 0.--29. 1. " SIZE ,Buffer size in bytes" line.long 0x14 "CH_SRC_DSCR_WORD3,SRC DSCR Word 3" bitfld.long 0x14 3.--4. " CMD ,Command executed after completing current descriptor" "Next descriptor is valid,Pause,Stop,?..." bitfld.long 0x14 2. " INTR ,Require completion interrupt" "Disabled,Enabled" bitfld.long 0x14 1. " TYPE ,Current descriptor size (Bits)" "128,256" bitfld.long 0x14 0. " COHRNT ,AXI transactions generated to process the descriptor payload coherency" "Non-coherent,Coherent" group.long 0x138++0x0F line.long 0x00 "CH_DST_DSCR_WORD0,DST DSCR Word 0" line.long 0x04 "CH_DST_DSCR_WORD1,DST DSCR Word 1" hexmask.long.tbyte 0x04 0.--16. 0x01 " MSB ,Upper 12-bits of address" line.long 0x08 "CH_DST_DSCR_WORD2,DST DSCR Word 2" hexmask.long 0x08 0.--29. 1. " SIZE ,Buffer size in bytes" line.long 0x0C "CH_DST_DSCR_WORD3,DST DSCR Word 3" bitfld.long 0x0C 2. " INTR ,Require completion interrupt" "Disabled,Enabled" bitfld.long 0x0C 0. " COHRNT ,AXI transactions generated to process the descriptor payload coherency" "Non-coherent,Coherent" group.long 0x148++0x1F line.long 0x00 "CH_WR_ONLY_WORD0,Write Only Data Word 0" line.long 0x04 "CH_WR_ONLY_WORD1,Write Only Data Word 1" line.long 0x08 "CH_WR_ONLY_WORD2,Write Only Data Word 2" line.long 0x0C "CH_WR_ONLY_WORD3,Write Only Data Word 3" line.long 0x10 "CH_SRC_START_LSB,SRC DSCR Start Address LSB Regiser" line.long 0x14 "CH_SRC_START_MSB,SRC DSCR Start Address MSB Regiser" hexmask.long.tbyte 0x14 0.--16. 1. " ADDR ,Start address MSB register for SRC descriptor fetch" line.long 0x18 "CH_DST_START_LSB,DST DSCR Start Address LSB Regiser" line.long 0x1C "CH_DST_START_MSB,SRC DSCR Start Address MSB Regiser" hexmask.long.tbyte 0x1C 0.--16. 1. " ADDR ,Start address MSB register for DST descriptor fetch" if (((d.l(ad:0xFFAD0000+0x110))&0x08)==0x08) group.long 0x18C++0x03 line.long 0x00 "CH_RATE_CTRL,Rate Control Count Register" hexmask.long.word 0x00 0.--11. 1. " CNT ,Scheduling interval for SRC AXI transaction" else hgroup.long 0x18C++0x03 hide.long 0x00 "CH_RATE_CTRL,Rate Control Count Register" endif hgroup.long 0x190++0x03 hide.long 0x00 "CH_IRQ_SRC_ACCT,SRC Interrupt Account Count Register" in hgroup.long 0x194++0x03 hide.long 0x00 "CH_IRQ_DST_ACCT,DST Interrupt Account Count Register" in group.long 0x200++0x03 line.long 0x00 "CH_CTRL2,Control Register 2" bitfld.long 0x00 0. " EN ,DMA channel enable" "Disabled,Enabled" width 0x0B tree.end tree "ADMA_CH6" base ad:0xFFAE0000 width 19. group.long 0x00++0x03 line.long 0x00 "ERR_CTRL,Error Response Control Register" bitfld.long 0x00 0. " APB_ERR_RES ,The resulting pslverr after APB (Register) access to an unimplemented space" "Low,High" group.long 0x100++0x03 line.long 0x00 "CH_ISR,Interrupt Status Register" eventfld.long 0x00 11. " DMA_PAUSE ,DMA channel in pause state interrupt" "No interrupt,Interrupt" eventfld.long 0x00 10. " DMA_DONE ,DMA channel done (With or withour error) interrupt" "No interrupt,Interrupt" eventfld.long 0x00 9. " AXI_WR_DATA ,AXI write error on write data channel interrupt" "No interrupt,Interrupt" eventfld.long 0x00 8. " AXI_RD_DATA ,AXI read error on read data channel interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x00 7. " AXI_RD_DST_DSCR ,AXI read error on DST DSCR fetch interrupt" "No interrupt,Interrupt" eventfld.long 0x00 6. " AXI_RD_SRC_DSCR ,AXI read error on SRC DSCR fetch interrupt" "No interrupt,Interrupt" eventfld.long 0x00 5. " IRQ_DST_ACCT_ERR ,DST interrupt account counter overflow interrupt" "No interrupt,Interrupt" eventfld.long 0x00 4. " IRQ_SRC_ACCT_ERR ,SRC interrupt account counter overflow interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x00 3. " BYTE_CNT_OVRFL ,Byte count counter overflow interrupt" "No interrupt,Interrupt" eventfld.long 0x00 2. " DST_DSCR_DONE ,Completion of DST descriptor element interrupt" "No interrupt,Interrupt" eventfld.long 0x00 1. " SRC_DSCR_DONE ,Completion of SRC descriptor interrupt" "No interrupt,Interrupt" eventfld.long 0x00 0. " INV_APB ,APB (Register) access to an unimplemented space interrupt" "No interrupt,Interrupt" group.long 0x104++0x03 line.long 0x00 "CH_IMR_SET/CLR,Interrupt Mask Register" setclrfld.long 0x00 11. 0x08 11. 0x04 11. " DMA_PAUSE ,DMA channel in pause state interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 10. 0x08 10. 0x04 10. " DMA_DONE ,DMA channel done (With or withour error) interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 9. 0x08 9. 0x04 9. " AXI_WR_DATA ,AXI write error on write data channel interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 8. 0x08 8. 0x04 8. " AXI_RD_DATA ,AXI read error on read data channel interrupt mask" "Unmasked,Masked" textline " " setclrfld.long 0x00 7. 0x08 7. 0x04 7. " AXI_RD_DST_DSCR ,AXI read error on DST DSCR fetch interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 6. 0x08 6. 0x04 6. " AXI_RD_SRC_DSCR ,AXI read error on SRC DSCR fetch interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 5. 0x08 5. 0x04 5. " IRQ_DST_ACCT_ERR ,DST interrupt account counter overflow interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 4. 0x08 4. 0x04 4. " IRQ_SRC_ACCT_ERR ,SRC interrupt account counter overflow interrupt mask" "Unmasked,Masked" textline " " setclrfld.long 0x00 3. 0x08 3. 0x04 3. " BYTE_CNT_OVRFL ,Byte count counter overflow interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 2. 0x08 2. 0x04 2. " DST_DSCR_DONE ,Completion of DST descriptor element interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 1. 0x08 1. 0x04 1. " SRC_DSCR_DONE ,Completion of SRC descriptor interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 0. 0x08 0. 0x04 0. " INV_APB ,APB (Register) access to an unimplemented space interrupt mask" "Unmasked,Masked" group.long 0x110++0x07 line.long 0x00 "CH_CTRL0,Channel Control Register 0" bitfld.long 0x00 7. " OVR_FETCH ,Allow DMA channel to over-fetch" "Not allowed,Allowed" bitfld.long 0x00 6. " POINT_TYPE ,Descriptor store place" "APB register,Memory" bitfld.long 0x00 4.--5. " MODE ,DMA memory access selector" "Read/write,Write,Read,?..." bitfld.long 0x00 3. " RATE_CTRL ,Enable rate control" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " CONT_ADDR ,Coming out of pause" "Continuous address,Start address register" bitfld.long 0x00 1. " CONT ,Unpause DMA" "No effect,Unpause" line.long 0x04 "CH_CTRL1,Channel Control Register 1" bitfld.long 0x04 0.--4. " SRC_ISSUE ,Outstanding transaction on SRC count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" if (((d.l(ad:0xFFAE0000+0x118))&0x01)==0x01) group.long 0x118++0x03 line.long 0x00 "CH_FCI,Channel Control Register 1" bitfld.long 0x00 2.--3. " PROG_CELL_CNT ,Limit the common buffer usage of the flow controlled channel" "32 + AxLEN,64 + AxLEN,128 + AxLEN,256" bitfld.long 0x00 1. " SIDE ,Flow control interface attached side selector" "Read,Write" bitfld.long 0x00 0. " EN ,Flow control interface enable" "Disabled,Enabled" else group.long 0x118++0x03 line.long 0x00 "CH_FCI,Channel Control Register 1" textfld " " bitfld.long 0x00 1. " SIDE ,Flow control interface attached side selector" "Read,Write" bitfld.long 0x00 0. " EN ,Flow control interface enable" "Disabled,Enabled" endif textline " " rgroup.long 0x11C++0x03 line.long 0x00 "CH_STATUS,Channel Status Register" bitfld.long 0x00 0.--1. " STATE ,DMA channel status" "Done with no error,Pauseed with no error,DMA is busy transferring,DMA done with error" group.long 0x120++0x17 line.long 0x00 "CH_DATA_ATTR,Channel Data AXI Parameter Register" bitfld.long 0x00 26.--27. " ARBURST ,Burst type for SRC AXI transaction" "Fixed,Incremental,?..." bitfld.long 0x00 22.--25. " ARCACHE ,AXI cache bits for data read" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 18.--21. " ARQOS ,Configurable QoS bits for AXI data read" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--17. " ARLEN ,AXI length for data read" "1,2,4,8,16,16,16,16,16,16,16,16,16,16,16,16" textline " " bitfld.long 0x00 12.--13. " AWBURST ,Burst type for DST AXI transaction" "Fixed,Incremental,?..." bitfld.long 0x00 8.--11. " AWCACHE ,AXI cache bits for data write" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " AWQOS ,Configurable QoS bits for AXI data write" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " AWLEN ,AXI length for data write" "1,2,4,8,16,16,16,16,16,16,16,16,16,16,16,16" line.long 0x04 "CH_DSCR_ATTR,Channel DSCR AXI Parameter Register" bitfld.long 0x04 8. " AXCOHRNT ,AXI transactions generated for the descriptor read coherency" "Non-coherent,Coherent" bitfld.long 0x04 4.--7. " AXCACHE ,AXI cache bit used for DSCR fetch (Src and DST side)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. " AXQOS ,QoS bit used for DSCR fetch (Src and DST side)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "CH_SRC_DSCR_WORD0,SRC DSCR Word 0" line.long 0x0C "CH_SRC_DSCR_WORD1,SRC DSCR Word 1" hexmask.long.tbyte 0x0C 0.--16. 0x01 " MSB ,Upper 12-bits of address" line.long 0x10 "CH_SRC_DSCR_WORD2,SRC DSCR Word 2" hexmask.long 0x10 0.--29. 1. " SIZE ,Buffer size in bytes" line.long 0x14 "CH_SRC_DSCR_WORD3,SRC DSCR Word 3" bitfld.long 0x14 3.--4. " CMD ,Command executed after completing current descriptor" "Next descriptor is valid,Pause,Stop,?..." bitfld.long 0x14 2. " INTR ,Require completion interrupt" "Disabled,Enabled" bitfld.long 0x14 1. " TYPE ,Current descriptor size (Bits)" "128,256" bitfld.long 0x14 0. " COHRNT ,AXI transactions generated to process the descriptor payload coherency" "Non-coherent,Coherent" group.long 0x138++0x0F line.long 0x00 "CH_DST_DSCR_WORD0,DST DSCR Word 0" line.long 0x04 "CH_DST_DSCR_WORD1,DST DSCR Word 1" hexmask.long.tbyte 0x04 0.--16. 0x01 " MSB ,Upper 12-bits of address" line.long 0x08 "CH_DST_DSCR_WORD2,DST DSCR Word 2" hexmask.long 0x08 0.--29. 1. " SIZE ,Buffer size in bytes" line.long 0x0C "CH_DST_DSCR_WORD3,DST DSCR Word 3" bitfld.long 0x0C 2. " INTR ,Require completion interrupt" "Disabled,Enabled" bitfld.long 0x0C 0. " COHRNT ,AXI transactions generated to process the descriptor payload coherency" "Non-coherent,Coherent" group.long 0x148++0x1F line.long 0x00 "CH_WR_ONLY_WORD0,Write Only Data Word 0" line.long 0x04 "CH_WR_ONLY_WORD1,Write Only Data Word 1" line.long 0x08 "CH_WR_ONLY_WORD2,Write Only Data Word 2" line.long 0x0C "CH_WR_ONLY_WORD3,Write Only Data Word 3" line.long 0x10 "CH_SRC_START_LSB,SRC DSCR Start Address LSB Regiser" line.long 0x14 "CH_SRC_START_MSB,SRC DSCR Start Address MSB Regiser" hexmask.long.tbyte 0x14 0.--16. 1. " ADDR ,Start address MSB register for SRC descriptor fetch" line.long 0x18 "CH_DST_START_LSB,DST DSCR Start Address LSB Regiser" line.long 0x1C "CH_DST_START_MSB,SRC DSCR Start Address MSB Regiser" hexmask.long.tbyte 0x1C 0.--16. 1. " ADDR ,Start address MSB register for DST descriptor fetch" if (((d.l(ad:0xFFAE0000+0x110))&0x08)==0x08) group.long 0x18C++0x03 line.long 0x00 "CH_RATE_CTRL,Rate Control Count Register" hexmask.long.word 0x00 0.--11. 1. " CNT ,Scheduling interval for SRC AXI transaction" else hgroup.long 0x18C++0x03 hide.long 0x00 "CH_RATE_CTRL,Rate Control Count Register" endif hgroup.long 0x190++0x03 hide.long 0x00 "CH_IRQ_SRC_ACCT,SRC Interrupt Account Count Register" in hgroup.long 0x194++0x03 hide.long 0x00 "CH_IRQ_DST_ACCT,DST Interrupt Account Count Register" in group.long 0x200++0x03 line.long 0x00 "CH_CTRL2,Control Register 2" bitfld.long 0x00 0. " EN ,DMA channel enable" "Disabled,Enabled" width 0x0B tree.end tree "ADMA_CH7" base ad:0xFFAF0000 width 19. group.long 0x00++0x03 line.long 0x00 "ERR_CTRL,Error Response Control Register" bitfld.long 0x00 0. " APB_ERR_RES ,The resulting pslverr after APB (Register) access to an unimplemented space" "Low,High" group.long 0x100++0x03 line.long 0x00 "CH_ISR,Interrupt Status Register" eventfld.long 0x00 11. " DMA_PAUSE ,DMA channel in pause state interrupt" "No interrupt,Interrupt" eventfld.long 0x00 10. " DMA_DONE ,DMA channel done (With or withour error) interrupt" "No interrupt,Interrupt" eventfld.long 0x00 9. " AXI_WR_DATA ,AXI write error on write data channel interrupt" "No interrupt,Interrupt" eventfld.long 0x00 8. " AXI_RD_DATA ,AXI read error on read data channel interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x00 7. " AXI_RD_DST_DSCR ,AXI read error on DST DSCR fetch interrupt" "No interrupt,Interrupt" eventfld.long 0x00 6. " AXI_RD_SRC_DSCR ,AXI read error on SRC DSCR fetch interrupt" "No interrupt,Interrupt" eventfld.long 0x00 5. " IRQ_DST_ACCT_ERR ,DST interrupt account counter overflow interrupt" "No interrupt,Interrupt" eventfld.long 0x00 4. " IRQ_SRC_ACCT_ERR ,SRC interrupt account counter overflow interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x00 3. " BYTE_CNT_OVRFL ,Byte count counter overflow interrupt" "No interrupt,Interrupt" eventfld.long 0x00 2. " DST_DSCR_DONE ,Completion of DST descriptor element interrupt" "No interrupt,Interrupt" eventfld.long 0x00 1. " SRC_DSCR_DONE ,Completion of SRC descriptor interrupt" "No interrupt,Interrupt" eventfld.long 0x00 0. " INV_APB ,APB (Register) access to an unimplemented space interrupt" "No interrupt,Interrupt" group.long 0x104++0x03 line.long 0x00 "CH_IMR_SET/CLR,Interrupt Mask Register" setclrfld.long 0x00 11. 0x08 11. 0x04 11. " DMA_PAUSE ,DMA channel in pause state interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 10. 0x08 10. 0x04 10. " DMA_DONE ,DMA channel done (With or withour error) interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 9. 0x08 9. 0x04 9. " AXI_WR_DATA ,AXI write error on write data channel interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 8. 0x08 8. 0x04 8. " AXI_RD_DATA ,AXI read error on read data channel interrupt mask" "Unmasked,Masked" textline " " setclrfld.long 0x00 7. 0x08 7. 0x04 7. " AXI_RD_DST_DSCR ,AXI read error on DST DSCR fetch interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 6. 0x08 6. 0x04 6. " AXI_RD_SRC_DSCR ,AXI read error on SRC DSCR fetch interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 5. 0x08 5. 0x04 5. " IRQ_DST_ACCT_ERR ,DST interrupt account counter overflow interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 4. 0x08 4. 0x04 4. " IRQ_SRC_ACCT_ERR ,SRC interrupt account counter overflow interrupt mask" "Unmasked,Masked" textline " " setclrfld.long 0x00 3. 0x08 3. 0x04 3. " BYTE_CNT_OVRFL ,Byte count counter overflow interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 2. 0x08 2. 0x04 2. " DST_DSCR_DONE ,Completion of DST descriptor element interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 1. 0x08 1. 0x04 1. " SRC_DSCR_DONE ,Completion of SRC descriptor interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 0. 0x08 0. 0x04 0. " INV_APB ,APB (Register) access to an unimplemented space interrupt mask" "Unmasked,Masked" group.long 0x110++0x07 line.long 0x00 "CH_CTRL0,Channel Control Register 0" bitfld.long 0x00 7. " OVR_FETCH ,Allow DMA channel to over-fetch" "Not allowed,Allowed" bitfld.long 0x00 6. " POINT_TYPE ,Descriptor store place" "APB register,Memory" bitfld.long 0x00 4.--5. " MODE ,DMA memory access selector" "Read/write,Write,Read,?..." bitfld.long 0x00 3. " RATE_CTRL ,Enable rate control" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " CONT_ADDR ,Coming out of pause" "Continuous address,Start address register" bitfld.long 0x00 1. " CONT ,Unpause DMA" "No effect,Unpause" line.long 0x04 "CH_CTRL1,Channel Control Register 1" bitfld.long 0x04 0.--4. " SRC_ISSUE ,Outstanding transaction on SRC count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" if (((d.l(ad:0xFFAF0000+0x118))&0x01)==0x01) group.long 0x118++0x03 line.long 0x00 "CH_FCI,Channel Control Register 1" bitfld.long 0x00 2.--3. " PROG_CELL_CNT ,Limit the common buffer usage of the flow controlled channel" "32 + AxLEN,64 + AxLEN,128 + AxLEN,256" bitfld.long 0x00 1. " SIDE ,Flow control interface attached side selector" "Read,Write" bitfld.long 0x00 0. " EN ,Flow control interface enable" "Disabled,Enabled" else group.long 0x118++0x03 line.long 0x00 "CH_FCI,Channel Control Register 1" textfld " " bitfld.long 0x00 1. " SIDE ,Flow control interface attached side selector" "Read,Write" bitfld.long 0x00 0. " EN ,Flow control interface enable" "Disabled,Enabled" endif textline " " rgroup.long 0x11C++0x03 line.long 0x00 "CH_STATUS,Channel Status Register" bitfld.long 0x00 0.--1. " STATE ,DMA channel status" "Done with no error,Pauseed with no error,DMA is busy transferring,DMA done with error" group.long 0x120++0x17 line.long 0x00 "CH_DATA_ATTR,Channel Data AXI Parameter Register" bitfld.long 0x00 26.--27. " ARBURST ,Burst type for SRC AXI transaction" "Fixed,Incremental,?..." bitfld.long 0x00 22.--25. " ARCACHE ,AXI cache bits for data read" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 18.--21. " ARQOS ,Configurable QoS bits for AXI data read" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--17. " ARLEN ,AXI length for data read" "1,2,4,8,16,16,16,16,16,16,16,16,16,16,16,16" textline " " bitfld.long 0x00 12.--13. " AWBURST ,Burst type for DST AXI transaction" "Fixed,Incremental,?..." bitfld.long 0x00 8.--11. " AWCACHE ,AXI cache bits for data write" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " AWQOS ,Configurable QoS bits for AXI data write" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " AWLEN ,AXI length for data write" "1,2,4,8,16,16,16,16,16,16,16,16,16,16,16,16" line.long 0x04 "CH_DSCR_ATTR,Channel DSCR AXI Parameter Register" bitfld.long 0x04 8. " AXCOHRNT ,AXI transactions generated for the descriptor read coherency" "Non-coherent,Coherent" bitfld.long 0x04 4.--7. " AXCACHE ,AXI cache bit used for DSCR fetch (Src and DST side)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. " AXQOS ,QoS bit used for DSCR fetch (Src and DST side)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "CH_SRC_DSCR_WORD0,SRC DSCR Word 0" line.long 0x0C "CH_SRC_DSCR_WORD1,SRC DSCR Word 1" hexmask.long.tbyte 0x0C 0.--16. 0x01 " MSB ,Upper 12-bits of address" line.long 0x10 "CH_SRC_DSCR_WORD2,SRC DSCR Word 2" hexmask.long 0x10 0.--29. 1. " SIZE ,Buffer size in bytes" line.long 0x14 "CH_SRC_DSCR_WORD3,SRC DSCR Word 3" bitfld.long 0x14 3.--4. " CMD ,Command executed after completing current descriptor" "Next descriptor is valid,Pause,Stop,?..." bitfld.long 0x14 2. " INTR ,Require completion interrupt" "Disabled,Enabled" bitfld.long 0x14 1. " TYPE ,Current descriptor size (Bits)" "128,256" bitfld.long 0x14 0. " COHRNT ,AXI transactions generated to process the descriptor payload coherency" "Non-coherent,Coherent" group.long 0x138++0x0F line.long 0x00 "CH_DST_DSCR_WORD0,DST DSCR Word 0" line.long 0x04 "CH_DST_DSCR_WORD1,DST DSCR Word 1" hexmask.long.tbyte 0x04 0.--16. 0x01 " MSB ,Upper 12-bits of address" line.long 0x08 "CH_DST_DSCR_WORD2,DST DSCR Word 2" hexmask.long 0x08 0.--29. 1. " SIZE ,Buffer size in bytes" line.long 0x0C "CH_DST_DSCR_WORD3,DST DSCR Word 3" bitfld.long 0x0C 2. " INTR ,Require completion interrupt" "Disabled,Enabled" bitfld.long 0x0C 0. " COHRNT ,AXI transactions generated to process the descriptor payload coherency" "Non-coherent,Coherent" group.long 0x148++0x1F line.long 0x00 "CH_WR_ONLY_WORD0,Write Only Data Word 0" line.long 0x04 "CH_WR_ONLY_WORD1,Write Only Data Word 1" line.long 0x08 "CH_WR_ONLY_WORD2,Write Only Data Word 2" line.long 0x0C "CH_WR_ONLY_WORD3,Write Only Data Word 3" line.long 0x10 "CH_SRC_START_LSB,SRC DSCR Start Address LSB Regiser" line.long 0x14 "CH_SRC_START_MSB,SRC DSCR Start Address MSB Regiser" hexmask.long.tbyte 0x14 0.--16. 1. " ADDR ,Start address MSB register for SRC descriptor fetch" line.long 0x18 "CH_DST_START_LSB,DST DSCR Start Address LSB Regiser" line.long 0x1C "CH_DST_START_MSB,SRC DSCR Start Address MSB Regiser" hexmask.long.tbyte 0x1C 0.--16. 1. " ADDR ,Start address MSB register for DST descriptor fetch" if (((d.l(ad:0xFFAF0000+0x110))&0x08)==0x08) group.long 0x18C++0x03 line.long 0x00 "CH_RATE_CTRL,Rate Control Count Register" hexmask.long.word 0x00 0.--11. 1. " CNT ,Scheduling interval for SRC AXI transaction" else hgroup.long 0x18C++0x03 hide.long 0x00 "CH_RATE_CTRL,Rate Control Count Register" endif hgroup.long 0x190++0x03 hide.long 0x00 "CH_IRQ_SRC_ACCT,SRC Interrupt Account Count Register" in hgroup.long 0x194++0x03 hide.long 0x00 "CH_IRQ_DST_ACCT,DST Interrupt Account Count Register" in group.long 0x200++0x03 line.long 0x00 "CH_CTRL2,Control Register 2" bitfld.long 0x00 0. " EN ,DMA channel enable" "Disabled,Enabled" width 0x0B tree.end tree "GDMA_CH0" base ad:0xFD500000 width 19. group.long 0x00++0x03 line.long 0x00 "ERR_CTRL,Error Response Control Register" bitfld.long 0x00 0. " APB_ERR_RES ,The resulting pslverr after APB (Register) access to an unimplemented space" "Low,High" group.long 0x100++0x03 line.long 0x00 "CH_ISR,Interrupt Status Register" eventfld.long 0x00 11. " DMA_PAUSE ,DMA channel in pause state interrupt" "No interrupt,Interrupt" eventfld.long 0x00 10. " DMA_DONE ,DMA channel done (With or withour error) interrupt" "No interrupt,Interrupt" eventfld.long 0x00 9. " AXI_WR_DATA ,AXI write error on write data channel interrupt" "No interrupt,Interrupt" eventfld.long 0x00 8. " AXI_RD_DATA ,AXI read error on read data channel interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x00 7. " AXI_RD_DST_DSCR ,AXI read error on DST DSCR fetch interrupt" "No interrupt,Interrupt" eventfld.long 0x00 6. " AXI_RD_SRC_DSCR ,AXI read error on SRC DSCR fetch interrupt" "No interrupt,Interrupt" eventfld.long 0x00 5. " IRQ_DST_ACCT_ERR ,DST interrupt account counter overflow interrupt" "No interrupt,Interrupt" eventfld.long 0x00 4. " IRQ_SRC_ACCT_ERR ,SRC interrupt account counter overflow interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x00 3. " BYTE_CNT_OVRFL ,Byte count counter overflow interrupt" "No interrupt,Interrupt" eventfld.long 0x00 2. " DST_DSCR_DONE ,Completion of DST descriptor element interrupt" "No interrupt,Interrupt" eventfld.long 0x00 1. " SRC_DSCR_DONE ,Completion of SRC descriptor interrupt" "No interrupt,Interrupt" eventfld.long 0x00 0. " INV_APB ,APB (Register) access to an unimplemented space interrupt" "No interrupt,Interrupt" group.long 0x104++0x03 line.long 0x00 "CH_IMR_SET/CLR,Interrupt Mask Register" setclrfld.long 0x00 11. 0x08 11. 0x04 11. " DMA_PAUSE ,DMA channel in pause state interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 10. 0x08 10. 0x04 10. " DMA_DONE ,DMA channel done (With or withour error) interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 9. 0x08 9. 0x04 9. " AXI_WR_DATA ,AXI write error on write data channel interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 8. 0x08 8. 0x04 8. " AXI_RD_DATA ,AXI read error on read data channel interrupt mask" "Unmasked,Masked" textline " " setclrfld.long 0x00 7. 0x08 7. 0x04 7. " AXI_RD_DST_DSCR ,AXI read error on DST DSCR fetch interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 6. 0x08 6. 0x04 6. " AXI_RD_SRC_DSCR ,AXI read error on SRC DSCR fetch interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 5. 0x08 5. 0x04 5. " IRQ_DST_ACCT_ERR ,DST interrupt account counter overflow interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 4. 0x08 4. 0x04 4. " IRQ_SRC_ACCT_ERR ,SRC interrupt account counter overflow interrupt mask" "Unmasked,Masked" textline " " setclrfld.long 0x00 3. 0x08 3. 0x04 3. " BYTE_CNT_OVRFL ,Byte count counter overflow interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 2. 0x08 2. 0x04 2. " DST_DSCR_DONE ,Completion of DST descriptor element interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 1. 0x08 1. 0x04 1. " SRC_DSCR_DONE ,Completion of SRC descriptor interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 0. 0x08 0. 0x04 0. " INV_APB ,APB (Register) access to an unimplemented space interrupt mask" "Unmasked,Masked" group.long 0x110++0x07 line.long 0x00 "CH_CTRL0,Channel Control Register 0" bitfld.long 0x00 7. " OVR_FETCH ,Allow DMA channel to over-fetch" "Not allowed,Allowed" bitfld.long 0x00 6. " POINT_TYPE ,Descriptor store place" "APB register,Memory" bitfld.long 0x00 4.--5. " MODE ,DMA memory access selector" "Read/write,Write,Read,?..." bitfld.long 0x00 3. " RATE_CTRL ,Enable rate control" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " CONT_ADDR ,Coming out of pause" "Continuous address,Start address register" bitfld.long 0x00 1. " CONT ,Unpause DMA" "No effect,Unpause" line.long 0x04 "CH_CTRL1,Channel Control Register 1" bitfld.long 0x04 0.--4. " SRC_ISSUE ,Outstanding transaction on SRC count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" if (((d.l(ad:0xFD500000+0x118))&0x01)==0x01) group.long 0x118++0x03 line.long 0x00 "CH_FCI,Channel Control Register 1" bitfld.long 0x00 2.--3. " PROG_CELL_CNT ,Limit the common buffer usage of the flow controlled channel" "32 + AxLEN,64 + AxLEN,128 + AxLEN,256" bitfld.long 0x00 1. " SIDE ,Flow control interface attached side selector" "Read,Write" bitfld.long 0x00 0. " EN ,Flow control interface enable" "Disabled,Enabled" else group.long 0x118++0x03 line.long 0x00 "CH_FCI,Channel Control Register 1" textfld " " bitfld.long 0x00 1. " SIDE ,Flow control interface attached side selector" "Read,Write" bitfld.long 0x00 0. " EN ,Flow control interface enable" "Disabled,Enabled" endif textline " " rgroup.long 0x11C++0x03 line.long 0x00 "CH_STATUS,Channel Status Register" bitfld.long 0x00 0.--1. " STATE ,DMA channel status" "Done with no error,Pauseed with no error,DMA is busy transferring,DMA done with error" group.long 0x120++0x17 line.long 0x00 "CH_DATA_ATTR,Channel Data AXI Parameter Register" bitfld.long 0x00 26.--27. " ARBURST ,Burst type for SRC AXI transaction" "Fixed,Incremental,?..." bitfld.long 0x00 22.--25. " ARCACHE ,AXI cache bits for data read" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 18.--21. " ARQOS ,Configurable QoS bits for AXI data read" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--17. " ARLEN ,AXI length for data read" "1,2,4,8,16,16,16,16,16,16,16,16,16,16,16,16" textline " " bitfld.long 0x00 12.--13. " AWBURST ,Burst type for DST AXI transaction" "Fixed,Incremental,?..." bitfld.long 0x00 8.--11. " AWCACHE ,AXI cache bits for data write" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " AWQOS ,Configurable QoS bits for AXI data write" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " AWLEN ,AXI length for data write" "1,2,4,8,16,16,16,16,16,16,16,16,16,16,16,16" line.long 0x04 "CH_DSCR_ATTR,Channel DSCR AXI Parameter Register" bitfld.long 0x04 8. " AXCOHRNT ,AXI transactions generated for the descriptor read coherency" "Non-coherent,Coherent" bitfld.long 0x04 4.--7. " AXCACHE ,AXI cache bit used for DSCR fetch (Src and DST side)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. " AXQOS ,QoS bit used for DSCR fetch (Src and DST side)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "CH_SRC_DSCR_WORD0,SRC DSCR Word 0" line.long 0x0C "CH_SRC_DSCR_WORD1,SRC DSCR Word 1" hexmask.long.tbyte 0x0C 0.--16. 0x01 " MSB ,Upper 12-bits of address" line.long 0x10 "CH_SRC_DSCR_WORD2,SRC DSCR Word 2" hexmask.long 0x10 0.--29. 1. " SIZE ,Buffer size in bytes" line.long 0x14 "CH_SRC_DSCR_WORD3,SRC DSCR Word 3" bitfld.long 0x14 3.--4. " CMD ,Command executed after completing current descriptor" "Next descriptor is valid,Pause,Stop,?..." bitfld.long 0x14 2. " INTR ,Require completion interrupt" "Disabled,Enabled" bitfld.long 0x14 1. " TYPE ,Current descriptor size (Bits)" "128,256" bitfld.long 0x14 0. " COHRNT ,AXI transactions generated to process the descriptor payload coherency" "Non-coherent,Coherent" group.long 0x138++0x0F line.long 0x00 "CH_DST_DSCR_WORD0,DST DSCR Word 0" line.long 0x04 "CH_DST_DSCR_WORD1,DST DSCR Word 1" hexmask.long.tbyte 0x04 0.--16. 0x01 " MSB ,Upper 12-bits of address" line.long 0x08 "CH_DST_DSCR_WORD2,DST DSCR Word 2" hexmask.long 0x08 0.--29. 1. " SIZE ,Buffer size in bytes" line.long 0x0C "CH_DST_DSCR_WORD3,DST DSCR Word 3" bitfld.long 0x0C 2. " INTR ,Require completion interrupt" "Disabled,Enabled" bitfld.long 0x0C 0. " COHRNT ,AXI transactions generated to process the descriptor payload coherency" "Non-coherent,Coherent" group.long 0x148++0x1F line.long 0x00 "CH_WR_ONLY_WORD0,Write Only Data Word 0" line.long 0x04 "CH_WR_ONLY_WORD1,Write Only Data Word 1" line.long 0x08 "CH_WR_ONLY_WORD2,Write Only Data Word 2" line.long 0x0C "CH_WR_ONLY_WORD3,Write Only Data Word 3" line.long 0x10 "CH_SRC_START_LSB,SRC DSCR Start Address LSB Regiser" line.long 0x14 "CH_SRC_START_MSB,SRC DSCR Start Address MSB Regiser" hexmask.long.tbyte 0x14 0.--16. 1. " ADDR ,Start address MSB register for SRC descriptor fetch" line.long 0x18 "CH_DST_START_LSB,DST DSCR Start Address LSB Regiser" line.long 0x1C "CH_DST_START_MSB,SRC DSCR Start Address MSB Regiser" hexmask.long.tbyte 0x1C 0.--16. 1. " ADDR ,Start address MSB register for DST descriptor fetch" if (((d.l(ad:0xFD500000+0x110))&0x08)==0x08) group.long 0x18C++0x03 line.long 0x00 "CH_RATE_CTRL,Rate Control Count Register" hexmask.long.word 0x00 0.--11. 1. " CNT ,Scheduling interval for SRC AXI transaction" else hgroup.long 0x18C++0x03 hide.long 0x00 "CH_RATE_CTRL,Rate Control Count Register" endif hgroup.long 0x190++0x03 hide.long 0x00 "CH_IRQ_SRC_ACCT,SRC Interrupt Account Count Register" in hgroup.long 0x194++0x03 hide.long 0x00 "CH_IRQ_DST_ACCT,DST Interrupt Account Count Register" in group.long 0x200++0x03 line.long 0x00 "CH_CTRL2,Control Register 2" bitfld.long 0x00 0. " EN ,DMA channel enable" "Disabled,Enabled" width 0x0B tree.end tree "GDMA_CH1" base ad:0xFD510000 width 19. group.long 0x00++0x03 line.long 0x00 "ERR_CTRL,Error Response Control Register" bitfld.long 0x00 0. " APB_ERR_RES ,The resulting pslverr after APB (Register) access to an unimplemented space" "Low,High" group.long 0x100++0x03 line.long 0x00 "CH_ISR,Interrupt Status Register" eventfld.long 0x00 11. " DMA_PAUSE ,DMA channel in pause state interrupt" "No interrupt,Interrupt" eventfld.long 0x00 10. " DMA_DONE ,DMA channel done (With or withour error) interrupt" "No interrupt,Interrupt" eventfld.long 0x00 9. " AXI_WR_DATA ,AXI write error on write data channel interrupt" "No interrupt,Interrupt" eventfld.long 0x00 8. " AXI_RD_DATA ,AXI read error on read data channel interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x00 7. " AXI_RD_DST_DSCR ,AXI read error on DST DSCR fetch interrupt" "No interrupt,Interrupt" eventfld.long 0x00 6. " AXI_RD_SRC_DSCR ,AXI read error on SRC DSCR fetch interrupt" "No interrupt,Interrupt" eventfld.long 0x00 5. " IRQ_DST_ACCT_ERR ,DST interrupt account counter overflow interrupt" "No interrupt,Interrupt" eventfld.long 0x00 4. " IRQ_SRC_ACCT_ERR ,SRC interrupt account counter overflow interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x00 3. " BYTE_CNT_OVRFL ,Byte count counter overflow interrupt" "No interrupt,Interrupt" eventfld.long 0x00 2. " DST_DSCR_DONE ,Completion of DST descriptor element interrupt" "No interrupt,Interrupt" eventfld.long 0x00 1. " SRC_DSCR_DONE ,Completion of SRC descriptor interrupt" "No interrupt,Interrupt" eventfld.long 0x00 0. " INV_APB ,APB (Register) access to an unimplemented space interrupt" "No interrupt,Interrupt" group.long 0x104++0x03 line.long 0x00 "CH_IMR_SET/CLR,Interrupt Mask Register" setclrfld.long 0x00 11. 0x08 11. 0x04 11. " DMA_PAUSE ,DMA channel in pause state interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 10. 0x08 10. 0x04 10. " DMA_DONE ,DMA channel done (With or withour error) interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 9. 0x08 9. 0x04 9. " AXI_WR_DATA ,AXI write error on write data channel interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 8. 0x08 8. 0x04 8. " AXI_RD_DATA ,AXI read error on read data channel interrupt mask" "Unmasked,Masked" textline " " setclrfld.long 0x00 7. 0x08 7. 0x04 7. " AXI_RD_DST_DSCR ,AXI read error on DST DSCR fetch interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 6. 0x08 6. 0x04 6. " AXI_RD_SRC_DSCR ,AXI read error on SRC DSCR fetch interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 5. 0x08 5. 0x04 5. " IRQ_DST_ACCT_ERR ,DST interrupt account counter overflow interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 4. 0x08 4. 0x04 4. " IRQ_SRC_ACCT_ERR ,SRC interrupt account counter overflow interrupt mask" "Unmasked,Masked" textline " " setclrfld.long 0x00 3. 0x08 3. 0x04 3. " BYTE_CNT_OVRFL ,Byte count counter overflow interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 2. 0x08 2. 0x04 2. " DST_DSCR_DONE ,Completion of DST descriptor element interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 1. 0x08 1. 0x04 1. " SRC_DSCR_DONE ,Completion of SRC descriptor interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 0. 0x08 0. 0x04 0. " INV_APB ,APB (Register) access to an unimplemented space interrupt mask" "Unmasked,Masked" group.long 0x110++0x07 line.long 0x00 "CH_CTRL0,Channel Control Register 0" bitfld.long 0x00 7. " OVR_FETCH ,Allow DMA channel to over-fetch" "Not allowed,Allowed" bitfld.long 0x00 6. " POINT_TYPE ,Descriptor store place" "APB register,Memory" bitfld.long 0x00 4.--5. " MODE ,DMA memory access selector" "Read/write,Write,Read,?..." bitfld.long 0x00 3. " RATE_CTRL ,Enable rate control" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " CONT_ADDR ,Coming out of pause" "Continuous address,Start address register" bitfld.long 0x00 1. " CONT ,Unpause DMA" "No effect,Unpause" line.long 0x04 "CH_CTRL1,Channel Control Register 1" bitfld.long 0x04 0.--4. " SRC_ISSUE ,Outstanding transaction on SRC count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" if (((d.l(ad:0xFD510000+0x118))&0x01)==0x01) group.long 0x118++0x03 line.long 0x00 "CH_FCI,Channel Control Register 1" bitfld.long 0x00 2.--3. " PROG_CELL_CNT ,Limit the common buffer usage of the flow controlled channel" "32 + AxLEN,64 + AxLEN,128 + AxLEN,256" bitfld.long 0x00 1. " SIDE ,Flow control interface attached side selector" "Read,Write" bitfld.long 0x00 0. " EN ,Flow control interface enable" "Disabled,Enabled" else group.long 0x118++0x03 line.long 0x00 "CH_FCI,Channel Control Register 1" textfld " " bitfld.long 0x00 1. " SIDE ,Flow control interface attached side selector" "Read,Write" bitfld.long 0x00 0. " EN ,Flow control interface enable" "Disabled,Enabled" endif textline " " rgroup.long 0x11C++0x03 line.long 0x00 "CH_STATUS,Channel Status Register" bitfld.long 0x00 0.--1. " STATE ,DMA channel status" "Done with no error,Pauseed with no error,DMA is busy transferring,DMA done with error" group.long 0x120++0x17 line.long 0x00 "CH_DATA_ATTR,Channel Data AXI Parameter Register" bitfld.long 0x00 26.--27. " ARBURST ,Burst type for SRC AXI transaction" "Fixed,Incremental,?..." bitfld.long 0x00 22.--25. " ARCACHE ,AXI cache bits for data read" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 18.--21. " ARQOS ,Configurable QoS bits for AXI data read" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--17. " ARLEN ,AXI length for data read" "1,2,4,8,16,16,16,16,16,16,16,16,16,16,16,16" textline " " bitfld.long 0x00 12.--13. " AWBURST ,Burst type for DST AXI transaction" "Fixed,Incremental,?..." bitfld.long 0x00 8.--11. " AWCACHE ,AXI cache bits for data write" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " AWQOS ,Configurable QoS bits for AXI data write" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " AWLEN ,AXI length for data write" "1,2,4,8,16,16,16,16,16,16,16,16,16,16,16,16" line.long 0x04 "CH_DSCR_ATTR,Channel DSCR AXI Parameter Register" bitfld.long 0x04 8. " AXCOHRNT ,AXI transactions generated for the descriptor read coherency" "Non-coherent,Coherent" bitfld.long 0x04 4.--7. " AXCACHE ,AXI cache bit used for DSCR fetch (Src and DST side)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. " AXQOS ,QoS bit used for DSCR fetch (Src and DST side)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "CH_SRC_DSCR_WORD0,SRC DSCR Word 0" line.long 0x0C "CH_SRC_DSCR_WORD1,SRC DSCR Word 1" hexmask.long.tbyte 0x0C 0.--16. 0x01 " MSB ,Upper 12-bits of address" line.long 0x10 "CH_SRC_DSCR_WORD2,SRC DSCR Word 2" hexmask.long 0x10 0.--29. 1. " SIZE ,Buffer size in bytes" line.long 0x14 "CH_SRC_DSCR_WORD3,SRC DSCR Word 3" bitfld.long 0x14 3.--4. " CMD ,Command executed after completing current descriptor" "Next descriptor is valid,Pause,Stop,?..." bitfld.long 0x14 2. " INTR ,Require completion interrupt" "Disabled,Enabled" bitfld.long 0x14 1. " TYPE ,Current descriptor size (Bits)" "128,256" bitfld.long 0x14 0. " COHRNT ,AXI transactions generated to process the descriptor payload coherency" "Non-coherent,Coherent" group.long 0x138++0x0F line.long 0x00 "CH_DST_DSCR_WORD0,DST DSCR Word 0" line.long 0x04 "CH_DST_DSCR_WORD1,DST DSCR Word 1" hexmask.long.tbyte 0x04 0.--16. 0x01 " MSB ,Upper 12-bits of address" line.long 0x08 "CH_DST_DSCR_WORD2,DST DSCR Word 2" hexmask.long 0x08 0.--29. 1. " SIZE ,Buffer size in bytes" line.long 0x0C "CH_DST_DSCR_WORD3,DST DSCR Word 3" bitfld.long 0x0C 2. " INTR ,Require completion interrupt" "Disabled,Enabled" bitfld.long 0x0C 0. " COHRNT ,AXI transactions generated to process the descriptor payload coherency" "Non-coherent,Coherent" group.long 0x148++0x1F line.long 0x00 "CH_WR_ONLY_WORD0,Write Only Data Word 0" line.long 0x04 "CH_WR_ONLY_WORD1,Write Only Data Word 1" line.long 0x08 "CH_WR_ONLY_WORD2,Write Only Data Word 2" line.long 0x0C "CH_WR_ONLY_WORD3,Write Only Data Word 3" line.long 0x10 "CH_SRC_START_LSB,SRC DSCR Start Address LSB Regiser" line.long 0x14 "CH_SRC_START_MSB,SRC DSCR Start Address MSB Regiser" hexmask.long.tbyte 0x14 0.--16. 1. " ADDR ,Start address MSB register for SRC descriptor fetch" line.long 0x18 "CH_DST_START_LSB,DST DSCR Start Address LSB Regiser" line.long 0x1C "CH_DST_START_MSB,SRC DSCR Start Address MSB Regiser" hexmask.long.tbyte 0x1C 0.--16. 1. " ADDR ,Start address MSB register for DST descriptor fetch" if (((d.l(ad:0xFD510000+0x110))&0x08)==0x08) group.long 0x18C++0x03 line.long 0x00 "CH_RATE_CTRL,Rate Control Count Register" hexmask.long.word 0x00 0.--11. 1. " CNT ,Scheduling interval for SRC AXI transaction" else hgroup.long 0x18C++0x03 hide.long 0x00 "CH_RATE_CTRL,Rate Control Count Register" endif hgroup.long 0x190++0x03 hide.long 0x00 "CH_IRQ_SRC_ACCT,SRC Interrupt Account Count Register" in hgroup.long 0x194++0x03 hide.long 0x00 "CH_IRQ_DST_ACCT,DST Interrupt Account Count Register" in group.long 0x200++0x03 line.long 0x00 "CH_CTRL2,Control Register 2" bitfld.long 0x00 0. " EN ,DMA channel enable" "Disabled,Enabled" width 0x0B tree.end tree "GDMA_CH2" base ad:0xFD520000 width 19. group.long 0x00++0x03 line.long 0x00 "ERR_CTRL,Error Response Control Register" bitfld.long 0x00 0. " APB_ERR_RES ,The resulting pslverr after APB (Register) access to an unimplemented space" "Low,High" group.long 0x100++0x03 line.long 0x00 "CH_ISR,Interrupt Status Register" eventfld.long 0x00 11. " DMA_PAUSE ,DMA channel in pause state interrupt" "No interrupt,Interrupt" eventfld.long 0x00 10. " DMA_DONE ,DMA channel done (With or withour error) interrupt" "No interrupt,Interrupt" eventfld.long 0x00 9. " AXI_WR_DATA ,AXI write error on write data channel interrupt" "No interrupt,Interrupt" eventfld.long 0x00 8. " AXI_RD_DATA ,AXI read error on read data channel interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x00 7. " AXI_RD_DST_DSCR ,AXI read error on DST DSCR fetch interrupt" "No interrupt,Interrupt" eventfld.long 0x00 6. " AXI_RD_SRC_DSCR ,AXI read error on SRC DSCR fetch interrupt" "No interrupt,Interrupt" eventfld.long 0x00 5. " IRQ_DST_ACCT_ERR ,DST interrupt account counter overflow interrupt" "No interrupt,Interrupt" eventfld.long 0x00 4. " IRQ_SRC_ACCT_ERR ,SRC interrupt account counter overflow interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x00 3. " BYTE_CNT_OVRFL ,Byte count counter overflow interrupt" "No interrupt,Interrupt" eventfld.long 0x00 2. " DST_DSCR_DONE ,Completion of DST descriptor element interrupt" "No interrupt,Interrupt" eventfld.long 0x00 1. " SRC_DSCR_DONE ,Completion of SRC descriptor interrupt" "No interrupt,Interrupt" eventfld.long 0x00 0. " INV_APB ,APB (Register) access to an unimplemented space interrupt" "No interrupt,Interrupt" group.long 0x104++0x03 line.long 0x00 "CH_IMR_SET/CLR,Interrupt Mask Register" setclrfld.long 0x00 11. 0x08 11. 0x04 11. " DMA_PAUSE ,DMA channel in pause state interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 10. 0x08 10. 0x04 10. " DMA_DONE ,DMA channel done (With or withour error) interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 9. 0x08 9. 0x04 9. " AXI_WR_DATA ,AXI write error on write data channel interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 8. 0x08 8. 0x04 8. " AXI_RD_DATA ,AXI read error on read data channel interrupt mask" "Unmasked,Masked" textline " " setclrfld.long 0x00 7. 0x08 7. 0x04 7. " AXI_RD_DST_DSCR ,AXI read error on DST DSCR fetch interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 6. 0x08 6. 0x04 6. " AXI_RD_SRC_DSCR ,AXI read error on SRC DSCR fetch interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 5. 0x08 5. 0x04 5. " IRQ_DST_ACCT_ERR ,DST interrupt account counter overflow interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 4. 0x08 4. 0x04 4. " IRQ_SRC_ACCT_ERR ,SRC interrupt account counter overflow interrupt mask" "Unmasked,Masked" textline " " setclrfld.long 0x00 3. 0x08 3. 0x04 3. " BYTE_CNT_OVRFL ,Byte count counter overflow interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 2. 0x08 2. 0x04 2. " DST_DSCR_DONE ,Completion of DST descriptor element interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 1. 0x08 1. 0x04 1. " SRC_DSCR_DONE ,Completion of SRC descriptor interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 0. 0x08 0. 0x04 0. " INV_APB ,APB (Register) access to an unimplemented space interrupt mask" "Unmasked,Masked" group.long 0x110++0x07 line.long 0x00 "CH_CTRL0,Channel Control Register 0" bitfld.long 0x00 7. " OVR_FETCH ,Allow DMA channel to over-fetch" "Not allowed,Allowed" bitfld.long 0x00 6. " POINT_TYPE ,Descriptor store place" "APB register,Memory" bitfld.long 0x00 4.--5. " MODE ,DMA memory access selector" "Read/write,Write,Read,?..." bitfld.long 0x00 3. " RATE_CTRL ,Enable rate control" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " CONT_ADDR ,Coming out of pause" "Continuous address,Start address register" bitfld.long 0x00 1. " CONT ,Unpause DMA" "No effect,Unpause" line.long 0x04 "CH_CTRL1,Channel Control Register 1" bitfld.long 0x04 0.--4. " SRC_ISSUE ,Outstanding transaction on SRC count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" if (((d.l(ad:0xFD520000+0x118))&0x01)==0x01) group.long 0x118++0x03 line.long 0x00 "CH_FCI,Channel Control Register 1" bitfld.long 0x00 2.--3. " PROG_CELL_CNT ,Limit the common buffer usage of the flow controlled channel" "32 + AxLEN,64 + AxLEN,128 + AxLEN,256" bitfld.long 0x00 1. " SIDE ,Flow control interface attached side selector" "Read,Write" bitfld.long 0x00 0. " EN ,Flow control interface enable" "Disabled,Enabled" else group.long 0x118++0x03 line.long 0x00 "CH_FCI,Channel Control Register 1" textfld " " bitfld.long 0x00 1. " SIDE ,Flow control interface attached side selector" "Read,Write" bitfld.long 0x00 0. " EN ,Flow control interface enable" "Disabled,Enabled" endif textline " " rgroup.long 0x11C++0x03 line.long 0x00 "CH_STATUS,Channel Status Register" bitfld.long 0x00 0.--1. " STATE ,DMA channel status" "Done with no error,Pauseed with no error,DMA is busy transferring,DMA done with error" group.long 0x120++0x17 line.long 0x00 "CH_DATA_ATTR,Channel Data AXI Parameter Register" bitfld.long 0x00 26.--27. " ARBURST ,Burst type for SRC AXI transaction" "Fixed,Incremental,?..." bitfld.long 0x00 22.--25. " ARCACHE ,AXI cache bits for data read" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 18.--21. " ARQOS ,Configurable QoS bits for AXI data read" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--17. " ARLEN ,AXI length for data read" "1,2,4,8,16,16,16,16,16,16,16,16,16,16,16,16" textline " " bitfld.long 0x00 12.--13. " AWBURST ,Burst type for DST AXI transaction" "Fixed,Incremental,?..." bitfld.long 0x00 8.--11. " AWCACHE ,AXI cache bits for data write" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " AWQOS ,Configurable QoS bits for AXI data write" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " AWLEN ,AXI length for data write" "1,2,4,8,16,16,16,16,16,16,16,16,16,16,16,16" line.long 0x04 "CH_DSCR_ATTR,Channel DSCR AXI Parameter Register" bitfld.long 0x04 8. " AXCOHRNT ,AXI transactions generated for the descriptor read coherency" "Non-coherent,Coherent" bitfld.long 0x04 4.--7. " AXCACHE ,AXI cache bit used for DSCR fetch (Src and DST side)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. " AXQOS ,QoS bit used for DSCR fetch (Src and DST side)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "CH_SRC_DSCR_WORD0,SRC DSCR Word 0" line.long 0x0C "CH_SRC_DSCR_WORD1,SRC DSCR Word 1" hexmask.long.tbyte 0x0C 0.--16. 0x01 " MSB ,Upper 12-bits of address" line.long 0x10 "CH_SRC_DSCR_WORD2,SRC DSCR Word 2" hexmask.long 0x10 0.--29. 1. " SIZE ,Buffer size in bytes" line.long 0x14 "CH_SRC_DSCR_WORD3,SRC DSCR Word 3" bitfld.long 0x14 3.--4. " CMD ,Command executed after completing current descriptor" "Next descriptor is valid,Pause,Stop,?..." bitfld.long 0x14 2. " INTR ,Require completion interrupt" "Disabled,Enabled" bitfld.long 0x14 1. " TYPE ,Current descriptor size (Bits)" "128,256" bitfld.long 0x14 0. " COHRNT ,AXI transactions generated to process the descriptor payload coherency" "Non-coherent,Coherent" group.long 0x138++0x0F line.long 0x00 "CH_DST_DSCR_WORD0,DST DSCR Word 0" line.long 0x04 "CH_DST_DSCR_WORD1,DST DSCR Word 1" hexmask.long.tbyte 0x04 0.--16. 0x01 " MSB ,Upper 12-bits of address" line.long 0x08 "CH_DST_DSCR_WORD2,DST DSCR Word 2" hexmask.long 0x08 0.--29. 1. " SIZE ,Buffer size in bytes" line.long 0x0C "CH_DST_DSCR_WORD3,DST DSCR Word 3" bitfld.long 0x0C 2. " INTR ,Require completion interrupt" "Disabled,Enabled" bitfld.long 0x0C 0. " COHRNT ,AXI transactions generated to process the descriptor payload coherency" "Non-coherent,Coherent" group.long 0x148++0x1F line.long 0x00 "CH_WR_ONLY_WORD0,Write Only Data Word 0" line.long 0x04 "CH_WR_ONLY_WORD1,Write Only Data Word 1" line.long 0x08 "CH_WR_ONLY_WORD2,Write Only Data Word 2" line.long 0x0C "CH_WR_ONLY_WORD3,Write Only Data Word 3" line.long 0x10 "CH_SRC_START_LSB,SRC DSCR Start Address LSB Regiser" line.long 0x14 "CH_SRC_START_MSB,SRC DSCR Start Address MSB Regiser" hexmask.long.tbyte 0x14 0.--16. 1. " ADDR ,Start address MSB register for SRC descriptor fetch" line.long 0x18 "CH_DST_START_LSB,DST DSCR Start Address LSB Regiser" line.long 0x1C "CH_DST_START_MSB,SRC DSCR Start Address MSB Regiser" hexmask.long.tbyte 0x1C 0.--16. 1. " ADDR ,Start address MSB register for DST descriptor fetch" if (((d.l(ad:0xFD520000+0x110))&0x08)==0x08) group.long 0x18C++0x03 line.long 0x00 "CH_RATE_CTRL,Rate Control Count Register" hexmask.long.word 0x00 0.--11. 1. " CNT ,Scheduling interval for SRC AXI transaction" else hgroup.long 0x18C++0x03 hide.long 0x00 "CH_RATE_CTRL,Rate Control Count Register" endif hgroup.long 0x190++0x03 hide.long 0x00 "CH_IRQ_SRC_ACCT,SRC Interrupt Account Count Register" in hgroup.long 0x194++0x03 hide.long 0x00 "CH_IRQ_DST_ACCT,DST Interrupt Account Count Register" in group.long 0x200++0x03 line.long 0x00 "CH_CTRL2,Control Register 2" bitfld.long 0x00 0. " EN ,DMA channel enable" "Disabled,Enabled" width 0x0B tree.end tree "GDMA_CH3" base ad:0xFD530000 width 19. group.long 0x00++0x03 line.long 0x00 "ERR_CTRL,Error Response Control Register" bitfld.long 0x00 0. " APB_ERR_RES ,The resulting pslverr after APB (Register) access to an unimplemented space" "Low,High" group.long 0x100++0x03 line.long 0x00 "CH_ISR,Interrupt Status Register" eventfld.long 0x00 11. " DMA_PAUSE ,DMA channel in pause state interrupt" "No interrupt,Interrupt" eventfld.long 0x00 10. " DMA_DONE ,DMA channel done (With or withour error) interrupt" "No interrupt,Interrupt" eventfld.long 0x00 9. " AXI_WR_DATA ,AXI write error on write data channel interrupt" "No interrupt,Interrupt" eventfld.long 0x00 8. " AXI_RD_DATA ,AXI read error on read data channel interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x00 7. " AXI_RD_DST_DSCR ,AXI read error on DST DSCR fetch interrupt" "No interrupt,Interrupt" eventfld.long 0x00 6. " AXI_RD_SRC_DSCR ,AXI read error on SRC DSCR fetch interrupt" "No interrupt,Interrupt" eventfld.long 0x00 5. " IRQ_DST_ACCT_ERR ,DST interrupt account counter overflow interrupt" "No interrupt,Interrupt" eventfld.long 0x00 4. " IRQ_SRC_ACCT_ERR ,SRC interrupt account counter overflow interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x00 3. " BYTE_CNT_OVRFL ,Byte count counter overflow interrupt" "No interrupt,Interrupt" eventfld.long 0x00 2. " DST_DSCR_DONE ,Completion of DST descriptor element interrupt" "No interrupt,Interrupt" eventfld.long 0x00 1. " SRC_DSCR_DONE ,Completion of SRC descriptor interrupt" "No interrupt,Interrupt" eventfld.long 0x00 0. " INV_APB ,APB (Register) access to an unimplemented space interrupt" "No interrupt,Interrupt" group.long 0x104++0x03 line.long 0x00 "CH_IMR_SET/CLR,Interrupt Mask Register" setclrfld.long 0x00 11. 0x08 11. 0x04 11. " DMA_PAUSE ,DMA channel in pause state interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 10. 0x08 10. 0x04 10. " DMA_DONE ,DMA channel done (With or withour error) interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 9. 0x08 9. 0x04 9. " AXI_WR_DATA ,AXI write error on write data channel interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 8. 0x08 8. 0x04 8. " AXI_RD_DATA ,AXI read error on read data channel interrupt mask" "Unmasked,Masked" textline " " setclrfld.long 0x00 7. 0x08 7. 0x04 7. " AXI_RD_DST_DSCR ,AXI read error on DST DSCR fetch interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 6. 0x08 6. 0x04 6. " AXI_RD_SRC_DSCR ,AXI read error on SRC DSCR fetch interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 5. 0x08 5. 0x04 5. " IRQ_DST_ACCT_ERR ,DST interrupt account counter overflow interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 4. 0x08 4. 0x04 4. " IRQ_SRC_ACCT_ERR ,SRC interrupt account counter overflow interrupt mask" "Unmasked,Masked" textline " " setclrfld.long 0x00 3. 0x08 3. 0x04 3. " BYTE_CNT_OVRFL ,Byte count counter overflow interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 2. 0x08 2. 0x04 2. " DST_DSCR_DONE ,Completion of DST descriptor element interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 1. 0x08 1. 0x04 1. " SRC_DSCR_DONE ,Completion of SRC descriptor interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 0. 0x08 0. 0x04 0. " INV_APB ,APB (Register) access to an unimplemented space interrupt mask" "Unmasked,Masked" group.long 0x110++0x07 line.long 0x00 "CH_CTRL0,Channel Control Register 0" bitfld.long 0x00 7. " OVR_FETCH ,Allow DMA channel to over-fetch" "Not allowed,Allowed" bitfld.long 0x00 6. " POINT_TYPE ,Descriptor store place" "APB register,Memory" bitfld.long 0x00 4.--5. " MODE ,DMA memory access selector" "Read/write,Write,Read,?..." bitfld.long 0x00 3. " RATE_CTRL ,Enable rate control" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " CONT_ADDR ,Coming out of pause" "Continuous address,Start address register" bitfld.long 0x00 1. " CONT ,Unpause DMA" "No effect,Unpause" line.long 0x04 "CH_CTRL1,Channel Control Register 1" bitfld.long 0x04 0.--4. " SRC_ISSUE ,Outstanding transaction on SRC count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" if (((d.l(ad:0xFD530000+0x118))&0x01)==0x01) group.long 0x118++0x03 line.long 0x00 "CH_FCI,Channel Control Register 1" bitfld.long 0x00 2.--3. " PROG_CELL_CNT ,Limit the common buffer usage of the flow controlled channel" "32 + AxLEN,64 + AxLEN,128 + AxLEN,256" bitfld.long 0x00 1. " SIDE ,Flow control interface attached side selector" "Read,Write" bitfld.long 0x00 0. " EN ,Flow control interface enable" "Disabled,Enabled" else group.long 0x118++0x03 line.long 0x00 "CH_FCI,Channel Control Register 1" textfld " " bitfld.long 0x00 1. " SIDE ,Flow control interface attached side selector" "Read,Write" bitfld.long 0x00 0. " EN ,Flow control interface enable" "Disabled,Enabled" endif textline " " rgroup.long 0x11C++0x03 line.long 0x00 "CH_STATUS,Channel Status Register" bitfld.long 0x00 0.--1. " STATE ,DMA channel status" "Done with no error,Pauseed with no error,DMA is busy transferring,DMA done with error" group.long 0x120++0x17 line.long 0x00 "CH_DATA_ATTR,Channel Data AXI Parameter Register" bitfld.long 0x00 26.--27. " ARBURST ,Burst type for SRC AXI transaction" "Fixed,Incremental,?..." bitfld.long 0x00 22.--25. " ARCACHE ,AXI cache bits for data read" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 18.--21. " ARQOS ,Configurable QoS bits for AXI data read" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--17. " ARLEN ,AXI length for data read" "1,2,4,8,16,16,16,16,16,16,16,16,16,16,16,16" textline " " bitfld.long 0x00 12.--13. " AWBURST ,Burst type for DST AXI transaction" "Fixed,Incremental,?..." bitfld.long 0x00 8.--11. " AWCACHE ,AXI cache bits for data write" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " AWQOS ,Configurable QoS bits for AXI data write" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " AWLEN ,AXI length for data write" "1,2,4,8,16,16,16,16,16,16,16,16,16,16,16,16" line.long 0x04 "CH_DSCR_ATTR,Channel DSCR AXI Parameter Register" bitfld.long 0x04 8. " AXCOHRNT ,AXI transactions generated for the descriptor read coherency" "Non-coherent,Coherent" bitfld.long 0x04 4.--7. " AXCACHE ,AXI cache bit used for DSCR fetch (Src and DST side)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. " AXQOS ,QoS bit used for DSCR fetch (Src and DST side)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "CH_SRC_DSCR_WORD0,SRC DSCR Word 0" line.long 0x0C "CH_SRC_DSCR_WORD1,SRC DSCR Word 1" hexmask.long.tbyte 0x0C 0.--16. 0x01 " MSB ,Upper 12-bits of address" line.long 0x10 "CH_SRC_DSCR_WORD2,SRC DSCR Word 2" hexmask.long 0x10 0.--29. 1. " SIZE ,Buffer size in bytes" line.long 0x14 "CH_SRC_DSCR_WORD3,SRC DSCR Word 3" bitfld.long 0x14 3.--4. " CMD ,Command executed after completing current descriptor" "Next descriptor is valid,Pause,Stop,?..." bitfld.long 0x14 2. " INTR ,Require completion interrupt" "Disabled,Enabled" bitfld.long 0x14 1. " TYPE ,Current descriptor size (Bits)" "128,256" bitfld.long 0x14 0. " COHRNT ,AXI transactions generated to process the descriptor payload coherency" "Non-coherent,Coherent" group.long 0x138++0x0F line.long 0x00 "CH_DST_DSCR_WORD0,DST DSCR Word 0" line.long 0x04 "CH_DST_DSCR_WORD1,DST DSCR Word 1" hexmask.long.tbyte 0x04 0.--16. 0x01 " MSB ,Upper 12-bits of address" line.long 0x08 "CH_DST_DSCR_WORD2,DST DSCR Word 2" hexmask.long 0x08 0.--29. 1. " SIZE ,Buffer size in bytes" line.long 0x0C "CH_DST_DSCR_WORD3,DST DSCR Word 3" bitfld.long 0x0C 2. " INTR ,Require completion interrupt" "Disabled,Enabled" bitfld.long 0x0C 0. " COHRNT ,AXI transactions generated to process the descriptor payload coherency" "Non-coherent,Coherent" group.long 0x148++0x1F line.long 0x00 "CH_WR_ONLY_WORD0,Write Only Data Word 0" line.long 0x04 "CH_WR_ONLY_WORD1,Write Only Data Word 1" line.long 0x08 "CH_WR_ONLY_WORD2,Write Only Data Word 2" line.long 0x0C "CH_WR_ONLY_WORD3,Write Only Data Word 3" line.long 0x10 "CH_SRC_START_LSB,SRC DSCR Start Address LSB Regiser" line.long 0x14 "CH_SRC_START_MSB,SRC DSCR Start Address MSB Regiser" hexmask.long.tbyte 0x14 0.--16. 1. " ADDR ,Start address MSB register for SRC descriptor fetch" line.long 0x18 "CH_DST_START_LSB,DST DSCR Start Address LSB Regiser" line.long 0x1C "CH_DST_START_MSB,SRC DSCR Start Address MSB Regiser" hexmask.long.tbyte 0x1C 0.--16. 1. " ADDR ,Start address MSB register for DST descriptor fetch" if (((d.l(ad:0xFD530000+0x110))&0x08)==0x08) group.long 0x18C++0x03 line.long 0x00 "CH_RATE_CTRL,Rate Control Count Register" hexmask.long.word 0x00 0.--11. 1. " CNT ,Scheduling interval for SRC AXI transaction" else hgroup.long 0x18C++0x03 hide.long 0x00 "CH_RATE_CTRL,Rate Control Count Register" endif hgroup.long 0x190++0x03 hide.long 0x00 "CH_IRQ_SRC_ACCT,SRC Interrupt Account Count Register" in hgroup.long 0x194++0x03 hide.long 0x00 "CH_IRQ_DST_ACCT,DST Interrupt Account Count Register" in group.long 0x200++0x03 line.long 0x00 "CH_CTRL2,Control Register 2" bitfld.long 0x00 0. " EN ,DMA channel enable" "Disabled,Enabled" width 0x0B tree.end tree "GDMA_CH4" base ad:0xFD540000 width 19. group.long 0x00++0x03 line.long 0x00 "ERR_CTRL,Error Response Control Register" bitfld.long 0x00 0. " APB_ERR_RES ,The resulting pslverr after APB (Register) access to an unimplemented space" "Low,High" group.long 0x100++0x03 line.long 0x00 "CH_ISR,Interrupt Status Register" eventfld.long 0x00 11. " DMA_PAUSE ,DMA channel in pause state interrupt" "No interrupt,Interrupt" eventfld.long 0x00 10. " DMA_DONE ,DMA channel done (With or withour error) interrupt" "No interrupt,Interrupt" eventfld.long 0x00 9. " AXI_WR_DATA ,AXI write error on write data channel interrupt" "No interrupt,Interrupt" eventfld.long 0x00 8. " AXI_RD_DATA ,AXI read error on read data channel interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x00 7. " AXI_RD_DST_DSCR ,AXI read error on DST DSCR fetch interrupt" "No interrupt,Interrupt" eventfld.long 0x00 6. " AXI_RD_SRC_DSCR ,AXI read error on SRC DSCR fetch interrupt" "No interrupt,Interrupt" eventfld.long 0x00 5. " IRQ_DST_ACCT_ERR ,DST interrupt account counter overflow interrupt" "No interrupt,Interrupt" eventfld.long 0x00 4. " IRQ_SRC_ACCT_ERR ,SRC interrupt account counter overflow interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x00 3. " BYTE_CNT_OVRFL ,Byte count counter overflow interrupt" "No interrupt,Interrupt" eventfld.long 0x00 2. " DST_DSCR_DONE ,Completion of DST descriptor element interrupt" "No interrupt,Interrupt" eventfld.long 0x00 1. " SRC_DSCR_DONE ,Completion of SRC descriptor interrupt" "No interrupt,Interrupt" eventfld.long 0x00 0. " INV_APB ,APB (Register) access to an unimplemented space interrupt" "No interrupt,Interrupt" group.long 0x104++0x03 line.long 0x00 "CH_IMR_SET/CLR,Interrupt Mask Register" setclrfld.long 0x00 11. 0x08 11. 0x04 11. " DMA_PAUSE ,DMA channel in pause state interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 10. 0x08 10. 0x04 10. " DMA_DONE ,DMA channel done (With or withour error) interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 9. 0x08 9. 0x04 9. " AXI_WR_DATA ,AXI write error on write data channel interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 8. 0x08 8. 0x04 8. " AXI_RD_DATA ,AXI read error on read data channel interrupt mask" "Unmasked,Masked" textline " " setclrfld.long 0x00 7. 0x08 7. 0x04 7. " AXI_RD_DST_DSCR ,AXI read error on DST DSCR fetch interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 6. 0x08 6. 0x04 6. " AXI_RD_SRC_DSCR ,AXI read error on SRC DSCR fetch interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 5. 0x08 5. 0x04 5. " IRQ_DST_ACCT_ERR ,DST interrupt account counter overflow interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 4. 0x08 4. 0x04 4. " IRQ_SRC_ACCT_ERR ,SRC interrupt account counter overflow interrupt mask" "Unmasked,Masked" textline " " setclrfld.long 0x00 3. 0x08 3. 0x04 3. " BYTE_CNT_OVRFL ,Byte count counter overflow interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 2. 0x08 2. 0x04 2. " DST_DSCR_DONE ,Completion of DST descriptor element interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 1. 0x08 1. 0x04 1. " SRC_DSCR_DONE ,Completion of SRC descriptor interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 0. 0x08 0. 0x04 0. " INV_APB ,APB (Register) access to an unimplemented space interrupt mask" "Unmasked,Masked" group.long 0x110++0x07 line.long 0x00 "CH_CTRL0,Channel Control Register 0" bitfld.long 0x00 7. " OVR_FETCH ,Allow DMA channel to over-fetch" "Not allowed,Allowed" bitfld.long 0x00 6. " POINT_TYPE ,Descriptor store place" "APB register,Memory" bitfld.long 0x00 4.--5. " MODE ,DMA memory access selector" "Read/write,Write,Read,?..." bitfld.long 0x00 3. " RATE_CTRL ,Enable rate control" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " CONT_ADDR ,Coming out of pause" "Continuous address,Start address register" bitfld.long 0x00 1. " CONT ,Unpause DMA" "No effect,Unpause" line.long 0x04 "CH_CTRL1,Channel Control Register 1" bitfld.long 0x04 0.--4. " SRC_ISSUE ,Outstanding transaction on SRC count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" if (((d.l(ad:0xFD540000+0x118))&0x01)==0x01) group.long 0x118++0x03 line.long 0x00 "CH_FCI,Channel Control Register 1" bitfld.long 0x00 2.--3. " PROG_CELL_CNT ,Limit the common buffer usage of the flow controlled channel" "32 + AxLEN,64 + AxLEN,128 + AxLEN,256" bitfld.long 0x00 1. " SIDE ,Flow control interface attached side selector" "Read,Write" bitfld.long 0x00 0. " EN ,Flow control interface enable" "Disabled,Enabled" else group.long 0x118++0x03 line.long 0x00 "CH_FCI,Channel Control Register 1" textfld " " bitfld.long 0x00 1. " SIDE ,Flow control interface attached side selector" "Read,Write" bitfld.long 0x00 0. " EN ,Flow control interface enable" "Disabled,Enabled" endif textline " " rgroup.long 0x11C++0x03 line.long 0x00 "CH_STATUS,Channel Status Register" bitfld.long 0x00 0.--1. " STATE ,DMA channel status" "Done with no error,Pauseed with no error,DMA is busy transferring,DMA done with error" group.long 0x120++0x17 line.long 0x00 "CH_DATA_ATTR,Channel Data AXI Parameter Register" bitfld.long 0x00 26.--27. " ARBURST ,Burst type for SRC AXI transaction" "Fixed,Incremental,?..." bitfld.long 0x00 22.--25. " ARCACHE ,AXI cache bits for data read" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 18.--21. " ARQOS ,Configurable QoS bits for AXI data read" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--17. " ARLEN ,AXI length for data read" "1,2,4,8,16,16,16,16,16,16,16,16,16,16,16,16" textline " " bitfld.long 0x00 12.--13. " AWBURST ,Burst type for DST AXI transaction" "Fixed,Incremental,?..." bitfld.long 0x00 8.--11. " AWCACHE ,AXI cache bits for data write" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " AWQOS ,Configurable QoS bits for AXI data write" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " AWLEN ,AXI length for data write" "1,2,4,8,16,16,16,16,16,16,16,16,16,16,16,16" line.long 0x04 "CH_DSCR_ATTR,Channel DSCR AXI Parameter Register" bitfld.long 0x04 8. " AXCOHRNT ,AXI transactions generated for the descriptor read coherency" "Non-coherent,Coherent" bitfld.long 0x04 4.--7. " AXCACHE ,AXI cache bit used for DSCR fetch (Src and DST side)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. " AXQOS ,QoS bit used for DSCR fetch (Src and DST side)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "CH_SRC_DSCR_WORD0,SRC DSCR Word 0" line.long 0x0C "CH_SRC_DSCR_WORD1,SRC DSCR Word 1" hexmask.long.tbyte 0x0C 0.--16. 0x01 " MSB ,Upper 12-bits of address" line.long 0x10 "CH_SRC_DSCR_WORD2,SRC DSCR Word 2" hexmask.long 0x10 0.--29. 1. " SIZE ,Buffer size in bytes" line.long 0x14 "CH_SRC_DSCR_WORD3,SRC DSCR Word 3" bitfld.long 0x14 3.--4. " CMD ,Command executed after completing current descriptor" "Next descriptor is valid,Pause,Stop,?..." bitfld.long 0x14 2. " INTR ,Require completion interrupt" "Disabled,Enabled" bitfld.long 0x14 1. " TYPE ,Current descriptor size (Bits)" "128,256" bitfld.long 0x14 0. " COHRNT ,AXI transactions generated to process the descriptor payload coherency" "Non-coherent,Coherent" group.long 0x138++0x0F line.long 0x00 "CH_DST_DSCR_WORD0,DST DSCR Word 0" line.long 0x04 "CH_DST_DSCR_WORD1,DST DSCR Word 1" hexmask.long.tbyte 0x04 0.--16. 0x01 " MSB ,Upper 12-bits of address" line.long 0x08 "CH_DST_DSCR_WORD2,DST DSCR Word 2" hexmask.long 0x08 0.--29. 1. " SIZE ,Buffer size in bytes" line.long 0x0C "CH_DST_DSCR_WORD3,DST DSCR Word 3" bitfld.long 0x0C 2. " INTR ,Require completion interrupt" "Disabled,Enabled" bitfld.long 0x0C 0. " COHRNT ,AXI transactions generated to process the descriptor payload coherency" "Non-coherent,Coherent" group.long 0x148++0x1F line.long 0x00 "CH_WR_ONLY_WORD0,Write Only Data Word 0" line.long 0x04 "CH_WR_ONLY_WORD1,Write Only Data Word 1" line.long 0x08 "CH_WR_ONLY_WORD2,Write Only Data Word 2" line.long 0x0C "CH_WR_ONLY_WORD3,Write Only Data Word 3" line.long 0x10 "CH_SRC_START_LSB,SRC DSCR Start Address LSB Regiser" line.long 0x14 "CH_SRC_START_MSB,SRC DSCR Start Address MSB Regiser" hexmask.long.tbyte 0x14 0.--16. 1. " ADDR ,Start address MSB register for SRC descriptor fetch" line.long 0x18 "CH_DST_START_LSB,DST DSCR Start Address LSB Regiser" line.long 0x1C "CH_DST_START_MSB,SRC DSCR Start Address MSB Regiser" hexmask.long.tbyte 0x1C 0.--16. 1. " ADDR ,Start address MSB register for DST descriptor fetch" if (((d.l(ad:0xFD540000+0x110))&0x08)==0x08) group.long 0x18C++0x03 line.long 0x00 "CH_RATE_CTRL,Rate Control Count Register" hexmask.long.word 0x00 0.--11. 1. " CNT ,Scheduling interval for SRC AXI transaction" else hgroup.long 0x18C++0x03 hide.long 0x00 "CH_RATE_CTRL,Rate Control Count Register" endif hgroup.long 0x190++0x03 hide.long 0x00 "CH_IRQ_SRC_ACCT,SRC Interrupt Account Count Register" in hgroup.long 0x194++0x03 hide.long 0x00 "CH_IRQ_DST_ACCT,DST Interrupt Account Count Register" in group.long 0x200++0x03 line.long 0x00 "CH_CTRL2,Control Register 2" bitfld.long 0x00 0. " EN ,DMA channel enable" "Disabled,Enabled" width 0x0B tree.end tree "GDMA_CH5" base ad:0xFD550000 width 19. group.long 0x00++0x03 line.long 0x00 "ERR_CTRL,Error Response Control Register" bitfld.long 0x00 0. " APB_ERR_RES ,The resulting pslverr after APB (Register) access to an unimplemented space" "Low,High" group.long 0x100++0x03 line.long 0x00 "CH_ISR,Interrupt Status Register" eventfld.long 0x00 11. " DMA_PAUSE ,DMA channel in pause state interrupt" "No interrupt,Interrupt" eventfld.long 0x00 10. " DMA_DONE ,DMA channel done (With or withour error) interrupt" "No interrupt,Interrupt" eventfld.long 0x00 9. " AXI_WR_DATA ,AXI write error on write data channel interrupt" "No interrupt,Interrupt" eventfld.long 0x00 8. " AXI_RD_DATA ,AXI read error on read data channel interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x00 7. " AXI_RD_DST_DSCR ,AXI read error on DST DSCR fetch interrupt" "No interrupt,Interrupt" eventfld.long 0x00 6. " AXI_RD_SRC_DSCR ,AXI read error on SRC DSCR fetch interrupt" "No interrupt,Interrupt" eventfld.long 0x00 5. " IRQ_DST_ACCT_ERR ,DST interrupt account counter overflow interrupt" "No interrupt,Interrupt" eventfld.long 0x00 4. " IRQ_SRC_ACCT_ERR ,SRC interrupt account counter overflow interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x00 3. " BYTE_CNT_OVRFL ,Byte count counter overflow interrupt" "No interrupt,Interrupt" eventfld.long 0x00 2. " DST_DSCR_DONE ,Completion of DST descriptor element interrupt" "No interrupt,Interrupt" eventfld.long 0x00 1. " SRC_DSCR_DONE ,Completion of SRC descriptor interrupt" "No interrupt,Interrupt" eventfld.long 0x00 0. " INV_APB ,APB (Register) access to an unimplemented space interrupt" "No interrupt,Interrupt" group.long 0x104++0x03 line.long 0x00 "CH_IMR_SET/CLR,Interrupt Mask Register" setclrfld.long 0x00 11. 0x08 11. 0x04 11. " DMA_PAUSE ,DMA channel in pause state interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 10. 0x08 10. 0x04 10. " DMA_DONE ,DMA channel done (With or withour error) interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 9. 0x08 9. 0x04 9. " AXI_WR_DATA ,AXI write error on write data channel interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 8. 0x08 8. 0x04 8. " AXI_RD_DATA ,AXI read error on read data channel interrupt mask" "Unmasked,Masked" textline " " setclrfld.long 0x00 7. 0x08 7. 0x04 7. " AXI_RD_DST_DSCR ,AXI read error on DST DSCR fetch interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 6. 0x08 6. 0x04 6. " AXI_RD_SRC_DSCR ,AXI read error on SRC DSCR fetch interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 5. 0x08 5. 0x04 5. " IRQ_DST_ACCT_ERR ,DST interrupt account counter overflow interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 4. 0x08 4. 0x04 4. " IRQ_SRC_ACCT_ERR ,SRC interrupt account counter overflow interrupt mask" "Unmasked,Masked" textline " " setclrfld.long 0x00 3. 0x08 3. 0x04 3. " BYTE_CNT_OVRFL ,Byte count counter overflow interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 2. 0x08 2. 0x04 2. " DST_DSCR_DONE ,Completion of DST descriptor element interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 1. 0x08 1. 0x04 1. " SRC_DSCR_DONE ,Completion of SRC descriptor interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 0. 0x08 0. 0x04 0. " INV_APB ,APB (Register) access to an unimplemented space interrupt mask" "Unmasked,Masked" group.long 0x110++0x07 line.long 0x00 "CH_CTRL0,Channel Control Register 0" bitfld.long 0x00 7. " OVR_FETCH ,Allow DMA channel to over-fetch" "Not allowed,Allowed" bitfld.long 0x00 6. " POINT_TYPE ,Descriptor store place" "APB register,Memory" bitfld.long 0x00 4.--5. " MODE ,DMA memory access selector" "Read/write,Write,Read,?..." bitfld.long 0x00 3. " RATE_CTRL ,Enable rate control" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " CONT_ADDR ,Coming out of pause" "Continuous address,Start address register" bitfld.long 0x00 1. " CONT ,Unpause DMA" "No effect,Unpause" line.long 0x04 "CH_CTRL1,Channel Control Register 1" bitfld.long 0x04 0.--4. " SRC_ISSUE ,Outstanding transaction on SRC count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" if (((d.l(ad:0xFD550000+0x118))&0x01)==0x01) group.long 0x118++0x03 line.long 0x00 "CH_FCI,Channel Control Register 1" bitfld.long 0x00 2.--3. " PROG_CELL_CNT ,Limit the common buffer usage of the flow controlled channel" "32 + AxLEN,64 + AxLEN,128 + AxLEN,256" bitfld.long 0x00 1. " SIDE ,Flow control interface attached side selector" "Read,Write" bitfld.long 0x00 0. " EN ,Flow control interface enable" "Disabled,Enabled" else group.long 0x118++0x03 line.long 0x00 "CH_FCI,Channel Control Register 1" textfld " " bitfld.long 0x00 1. " SIDE ,Flow control interface attached side selector" "Read,Write" bitfld.long 0x00 0. " EN ,Flow control interface enable" "Disabled,Enabled" endif textline " " rgroup.long 0x11C++0x03 line.long 0x00 "CH_STATUS,Channel Status Register" bitfld.long 0x00 0.--1. " STATE ,DMA channel status" "Done with no error,Pauseed with no error,DMA is busy transferring,DMA done with error" group.long 0x120++0x17 line.long 0x00 "CH_DATA_ATTR,Channel Data AXI Parameter Register" bitfld.long 0x00 26.--27. " ARBURST ,Burst type for SRC AXI transaction" "Fixed,Incremental,?..." bitfld.long 0x00 22.--25. " ARCACHE ,AXI cache bits for data read" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 18.--21. " ARQOS ,Configurable QoS bits for AXI data read" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--17. " ARLEN ,AXI length for data read" "1,2,4,8,16,16,16,16,16,16,16,16,16,16,16,16" textline " " bitfld.long 0x00 12.--13. " AWBURST ,Burst type for DST AXI transaction" "Fixed,Incremental,?..." bitfld.long 0x00 8.--11. " AWCACHE ,AXI cache bits for data write" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " AWQOS ,Configurable QoS bits for AXI data write" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " AWLEN ,AXI length for data write" "1,2,4,8,16,16,16,16,16,16,16,16,16,16,16,16" line.long 0x04 "CH_DSCR_ATTR,Channel DSCR AXI Parameter Register" bitfld.long 0x04 8. " AXCOHRNT ,AXI transactions generated for the descriptor read coherency" "Non-coherent,Coherent" bitfld.long 0x04 4.--7. " AXCACHE ,AXI cache bit used for DSCR fetch (Src and DST side)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. " AXQOS ,QoS bit used for DSCR fetch (Src and DST side)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "CH_SRC_DSCR_WORD0,SRC DSCR Word 0" line.long 0x0C "CH_SRC_DSCR_WORD1,SRC DSCR Word 1" hexmask.long.tbyte 0x0C 0.--16. 0x01 " MSB ,Upper 12-bits of address" line.long 0x10 "CH_SRC_DSCR_WORD2,SRC DSCR Word 2" hexmask.long 0x10 0.--29. 1. " SIZE ,Buffer size in bytes" line.long 0x14 "CH_SRC_DSCR_WORD3,SRC DSCR Word 3" bitfld.long 0x14 3.--4. " CMD ,Command executed after completing current descriptor" "Next descriptor is valid,Pause,Stop,?..." bitfld.long 0x14 2. " INTR ,Require completion interrupt" "Disabled,Enabled" bitfld.long 0x14 1. " TYPE ,Current descriptor size (Bits)" "128,256" bitfld.long 0x14 0. " COHRNT ,AXI transactions generated to process the descriptor payload coherency" "Non-coherent,Coherent" group.long 0x138++0x0F line.long 0x00 "CH_DST_DSCR_WORD0,DST DSCR Word 0" line.long 0x04 "CH_DST_DSCR_WORD1,DST DSCR Word 1" hexmask.long.tbyte 0x04 0.--16. 0x01 " MSB ,Upper 12-bits of address" line.long 0x08 "CH_DST_DSCR_WORD2,DST DSCR Word 2" hexmask.long 0x08 0.--29. 1. " SIZE ,Buffer size in bytes" line.long 0x0C "CH_DST_DSCR_WORD3,DST DSCR Word 3" bitfld.long 0x0C 2. " INTR ,Require completion interrupt" "Disabled,Enabled" bitfld.long 0x0C 0. " COHRNT ,AXI transactions generated to process the descriptor payload coherency" "Non-coherent,Coherent" group.long 0x148++0x1F line.long 0x00 "CH_WR_ONLY_WORD0,Write Only Data Word 0" line.long 0x04 "CH_WR_ONLY_WORD1,Write Only Data Word 1" line.long 0x08 "CH_WR_ONLY_WORD2,Write Only Data Word 2" line.long 0x0C "CH_WR_ONLY_WORD3,Write Only Data Word 3" line.long 0x10 "CH_SRC_START_LSB,SRC DSCR Start Address LSB Regiser" line.long 0x14 "CH_SRC_START_MSB,SRC DSCR Start Address MSB Regiser" hexmask.long.tbyte 0x14 0.--16. 1. " ADDR ,Start address MSB register for SRC descriptor fetch" line.long 0x18 "CH_DST_START_LSB,DST DSCR Start Address LSB Regiser" line.long 0x1C "CH_DST_START_MSB,SRC DSCR Start Address MSB Regiser" hexmask.long.tbyte 0x1C 0.--16. 1. " ADDR ,Start address MSB register for DST descriptor fetch" if (((d.l(ad:0xFD550000+0x110))&0x08)==0x08) group.long 0x18C++0x03 line.long 0x00 "CH_RATE_CTRL,Rate Control Count Register" hexmask.long.word 0x00 0.--11. 1. " CNT ,Scheduling interval for SRC AXI transaction" else hgroup.long 0x18C++0x03 hide.long 0x00 "CH_RATE_CTRL,Rate Control Count Register" endif hgroup.long 0x190++0x03 hide.long 0x00 "CH_IRQ_SRC_ACCT,SRC Interrupt Account Count Register" in hgroup.long 0x194++0x03 hide.long 0x00 "CH_IRQ_DST_ACCT,DST Interrupt Account Count Register" in group.long 0x200++0x03 line.long 0x00 "CH_CTRL2,Control Register 2" bitfld.long 0x00 0. " EN ,DMA channel enable" "Disabled,Enabled" width 0x0B tree.end tree "GDMA_CH6" base ad:0xFD560000 width 19. group.long 0x00++0x03 line.long 0x00 "ERR_CTRL,Error Response Control Register" bitfld.long 0x00 0. " APB_ERR_RES ,The resulting pslverr after APB (Register) access to an unimplemented space" "Low,High" group.long 0x100++0x03 line.long 0x00 "CH_ISR,Interrupt Status Register" eventfld.long 0x00 11. " DMA_PAUSE ,DMA channel in pause state interrupt" "No interrupt,Interrupt" eventfld.long 0x00 10. " DMA_DONE ,DMA channel done (With or withour error) interrupt" "No interrupt,Interrupt" eventfld.long 0x00 9. " AXI_WR_DATA ,AXI write error on write data channel interrupt" "No interrupt,Interrupt" eventfld.long 0x00 8. " AXI_RD_DATA ,AXI read error on read data channel interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x00 7. " AXI_RD_DST_DSCR ,AXI read error on DST DSCR fetch interrupt" "No interrupt,Interrupt" eventfld.long 0x00 6. " AXI_RD_SRC_DSCR ,AXI read error on SRC DSCR fetch interrupt" "No interrupt,Interrupt" eventfld.long 0x00 5. " IRQ_DST_ACCT_ERR ,DST interrupt account counter overflow interrupt" "No interrupt,Interrupt" eventfld.long 0x00 4. " IRQ_SRC_ACCT_ERR ,SRC interrupt account counter overflow interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x00 3. " BYTE_CNT_OVRFL ,Byte count counter overflow interrupt" "No interrupt,Interrupt" eventfld.long 0x00 2. " DST_DSCR_DONE ,Completion of DST descriptor element interrupt" "No interrupt,Interrupt" eventfld.long 0x00 1. " SRC_DSCR_DONE ,Completion of SRC descriptor interrupt" "No interrupt,Interrupt" eventfld.long 0x00 0. " INV_APB ,APB (Register) access to an unimplemented space interrupt" "No interrupt,Interrupt" group.long 0x104++0x03 line.long 0x00 "CH_IMR_SET/CLR,Interrupt Mask Register" setclrfld.long 0x00 11. 0x08 11. 0x04 11. " DMA_PAUSE ,DMA channel in pause state interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 10. 0x08 10. 0x04 10. " DMA_DONE ,DMA channel done (With or withour error) interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 9. 0x08 9. 0x04 9. " AXI_WR_DATA ,AXI write error on write data channel interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 8. 0x08 8. 0x04 8. " AXI_RD_DATA ,AXI read error on read data channel interrupt mask" "Unmasked,Masked" textline " " setclrfld.long 0x00 7. 0x08 7. 0x04 7. " AXI_RD_DST_DSCR ,AXI read error on DST DSCR fetch interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 6. 0x08 6. 0x04 6. " AXI_RD_SRC_DSCR ,AXI read error on SRC DSCR fetch interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 5. 0x08 5. 0x04 5. " IRQ_DST_ACCT_ERR ,DST interrupt account counter overflow interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 4. 0x08 4. 0x04 4. " IRQ_SRC_ACCT_ERR ,SRC interrupt account counter overflow interrupt mask" "Unmasked,Masked" textline " " setclrfld.long 0x00 3. 0x08 3. 0x04 3. " BYTE_CNT_OVRFL ,Byte count counter overflow interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 2. 0x08 2. 0x04 2. " DST_DSCR_DONE ,Completion of DST descriptor element interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 1. 0x08 1. 0x04 1. " SRC_DSCR_DONE ,Completion of SRC descriptor interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 0. 0x08 0. 0x04 0. " INV_APB ,APB (Register) access to an unimplemented space interrupt mask" "Unmasked,Masked" group.long 0x110++0x07 line.long 0x00 "CH_CTRL0,Channel Control Register 0" bitfld.long 0x00 7. " OVR_FETCH ,Allow DMA channel to over-fetch" "Not allowed,Allowed" bitfld.long 0x00 6. " POINT_TYPE ,Descriptor store place" "APB register,Memory" bitfld.long 0x00 4.--5. " MODE ,DMA memory access selector" "Read/write,Write,Read,?..." bitfld.long 0x00 3. " RATE_CTRL ,Enable rate control" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " CONT_ADDR ,Coming out of pause" "Continuous address,Start address register" bitfld.long 0x00 1. " CONT ,Unpause DMA" "No effect,Unpause" line.long 0x04 "CH_CTRL1,Channel Control Register 1" bitfld.long 0x04 0.--4. " SRC_ISSUE ,Outstanding transaction on SRC count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" if (((d.l(ad:0xFD560000+0x118))&0x01)==0x01) group.long 0x118++0x03 line.long 0x00 "CH_FCI,Channel Control Register 1" bitfld.long 0x00 2.--3. " PROG_CELL_CNT ,Limit the common buffer usage of the flow controlled channel" "32 + AxLEN,64 + AxLEN,128 + AxLEN,256" bitfld.long 0x00 1. " SIDE ,Flow control interface attached side selector" "Read,Write" bitfld.long 0x00 0. " EN ,Flow control interface enable" "Disabled,Enabled" else group.long 0x118++0x03 line.long 0x00 "CH_FCI,Channel Control Register 1" textfld " " bitfld.long 0x00 1. " SIDE ,Flow control interface attached side selector" "Read,Write" bitfld.long 0x00 0. " EN ,Flow control interface enable" "Disabled,Enabled" endif textline " " rgroup.long 0x11C++0x03 line.long 0x00 "CH_STATUS,Channel Status Register" bitfld.long 0x00 0.--1. " STATE ,DMA channel status" "Done with no error,Pauseed with no error,DMA is busy transferring,DMA done with error" group.long 0x120++0x17 line.long 0x00 "CH_DATA_ATTR,Channel Data AXI Parameter Register" bitfld.long 0x00 26.--27. " ARBURST ,Burst type for SRC AXI transaction" "Fixed,Incremental,?..." bitfld.long 0x00 22.--25. " ARCACHE ,AXI cache bits for data read" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 18.--21. " ARQOS ,Configurable QoS bits for AXI data read" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--17. " ARLEN ,AXI length for data read" "1,2,4,8,16,16,16,16,16,16,16,16,16,16,16,16" textline " " bitfld.long 0x00 12.--13. " AWBURST ,Burst type for DST AXI transaction" "Fixed,Incremental,?..." bitfld.long 0x00 8.--11. " AWCACHE ,AXI cache bits for data write" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " AWQOS ,Configurable QoS bits for AXI data write" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " AWLEN ,AXI length for data write" "1,2,4,8,16,16,16,16,16,16,16,16,16,16,16,16" line.long 0x04 "CH_DSCR_ATTR,Channel DSCR AXI Parameter Register" bitfld.long 0x04 8. " AXCOHRNT ,AXI transactions generated for the descriptor read coherency" "Non-coherent,Coherent" bitfld.long 0x04 4.--7. " AXCACHE ,AXI cache bit used for DSCR fetch (Src and DST side)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. " AXQOS ,QoS bit used for DSCR fetch (Src and DST side)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "CH_SRC_DSCR_WORD0,SRC DSCR Word 0" line.long 0x0C "CH_SRC_DSCR_WORD1,SRC DSCR Word 1" hexmask.long.tbyte 0x0C 0.--16. 0x01 " MSB ,Upper 12-bits of address" line.long 0x10 "CH_SRC_DSCR_WORD2,SRC DSCR Word 2" hexmask.long 0x10 0.--29. 1. " SIZE ,Buffer size in bytes" line.long 0x14 "CH_SRC_DSCR_WORD3,SRC DSCR Word 3" bitfld.long 0x14 3.--4. " CMD ,Command executed after completing current descriptor" "Next descriptor is valid,Pause,Stop,?..." bitfld.long 0x14 2. " INTR ,Require completion interrupt" "Disabled,Enabled" bitfld.long 0x14 1. " TYPE ,Current descriptor size (Bits)" "128,256" bitfld.long 0x14 0. " COHRNT ,AXI transactions generated to process the descriptor payload coherency" "Non-coherent,Coherent" group.long 0x138++0x0F line.long 0x00 "CH_DST_DSCR_WORD0,DST DSCR Word 0" line.long 0x04 "CH_DST_DSCR_WORD1,DST DSCR Word 1" hexmask.long.tbyte 0x04 0.--16. 0x01 " MSB ,Upper 12-bits of address" line.long 0x08 "CH_DST_DSCR_WORD2,DST DSCR Word 2" hexmask.long 0x08 0.--29. 1. " SIZE ,Buffer size in bytes" line.long 0x0C "CH_DST_DSCR_WORD3,DST DSCR Word 3" bitfld.long 0x0C 2. " INTR ,Require completion interrupt" "Disabled,Enabled" bitfld.long 0x0C 0. " COHRNT ,AXI transactions generated to process the descriptor payload coherency" "Non-coherent,Coherent" group.long 0x148++0x1F line.long 0x00 "CH_WR_ONLY_WORD0,Write Only Data Word 0" line.long 0x04 "CH_WR_ONLY_WORD1,Write Only Data Word 1" line.long 0x08 "CH_WR_ONLY_WORD2,Write Only Data Word 2" line.long 0x0C "CH_WR_ONLY_WORD3,Write Only Data Word 3" line.long 0x10 "CH_SRC_START_LSB,SRC DSCR Start Address LSB Regiser" line.long 0x14 "CH_SRC_START_MSB,SRC DSCR Start Address MSB Regiser" hexmask.long.tbyte 0x14 0.--16. 1. " ADDR ,Start address MSB register for SRC descriptor fetch" line.long 0x18 "CH_DST_START_LSB,DST DSCR Start Address LSB Regiser" line.long 0x1C "CH_DST_START_MSB,SRC DSCR Start Address MSB Regiser" hexmask.long.tbyte 0x1C 0.--16. 1. " ADDR ,Start address MSB register for DST descriptor fetch" if (((d.l(ad:0xFD560000+0x110))&0x08)==0x08) group.long 0x18C++0x03 line.long 0x00 "CH_RATE_CTRL,Rate Control Count Register" hexmask.long.word 0x00 0.--11. 1. " CNT ,Scheduling interval for SRC AXI transaction" else hgroup.long 0x18C++0x03 hide.long 0x00 "CH_RATE_CTRL,Rate Control Count Register" endif hgroup.long 0x190++0x03 hide.long 0x00 "CH_IRQ_SRC_ACCT,SRC Interrupt Account Count Register" in hgroup.long 0x194++0x03 hide.long 0x00 "CH_IRQ_DST_ACCT,DST Interrupt Account Count Register" in group.long 0x200++0x03 line.long 0x00 "CH_CTRL2,Control Register 2" bitfld.long 0x00 0. " EN ,DMA channel enable" "Disabled,Enabled" width 0x0B tree.end tree "GDMA_CH7" base ad:0xFD570000 width 19. group.long 0x00++0x03 line.long 0x00 "ERR_CTRL,Error Response Control Register" bitfld.long 0x00 0. " APB_ERR_RES ,The resulting pslverr after APB (Register) access to an unimplemented space" "Low,High" group.long 0x100++0x03 line.long 0x00 "CH_ISR,Interrupt Status Register" eventfld.long 0x00 11. " DMA_PAUSE ,DMA channel in pause state interrupt" "No interrupt,Interrupt" eventfld.long 0x00 10. " DMA_DONE ,DMA channel done (With or withour error) interrupt" "No interrupt,Interrupt" eventfld.long 0x00 9. " AXI_WR_DATA ,AXI write error on write data channel interrupt" "No interrupt,Interrupt" eventfld.long 0x00 8. " AXI_RD_DATA ,AXI read error on read data channel interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x00 7. " AXI_RD_DST_DSCR ,AXI read error on DST DSCR fetch interrupt" "No interrupt,Interrupt" eventfld.long 0x00 6. " AXI_RD_SRC_DSCR ,AXI read error on SRC DSCR fetch interrupt" "No interrupt,Interrupt" eventfld.long 0x00 5. " IRQ_DST_ACCT_ERR ,DST interrupt account counter overflow interrupt" "No interrupt,Interrupt" eventfld.long 0x00 4. " IRQ_SRC_ACCT_ERR ,SRC interrupt account counter overflow interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x00 3. " BYTE_CNT_OVRFL ,Byte count counter overflow interrupt" "No interrupt,Interrupt" eventfld.long 0x00 2. " DST_DSCR_DONE ,Completion of DST descriptor element interrupt" "No interrupt,Interrupt" eventfld.long 0x00 1. " SRC_DSCR_DONE ,Completion of SRC descriptor interrupt" "No interrupt,Interrupt" eventfld.long 0x00 0. " INV_APB ,APB (Register) access to an unimplemented space interrupt" "No interrupt,Interrupt" group.long 0x104++0x03 line.long 0x00 "CH_IMR_SET/CLR,Interrupt Mask Register" setclrfld.long 0x00 11. 0x08 11. 0x04 11. " DMA_PAUSE ,DMA channel in pause state interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 10. 0x08 10. 0x04 10. " DMA_DONE ,DMA channel done (With or withour error) interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 9. 0x08 9. 0x04 9. " AXI_WR_DATA ,AXI write error on write data channel interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 8. 0x08 8. 0x04 8. " AXI_RD_DATA ,AXI read error on read data channel interrupt mask" "Unmasked,Masked" textline " " setclrfld.long 0x00 7. 0x08 7. 0x04 7. " AXI_RD_DST_DSCR ,AXI read error on DST DSCR fetch interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 6. 0x08 6. 0x04 6. " AXI_RD_SRC_DSCR ,AXI read error on SRC DSCR fetch interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 5. 0x08 5. 0x04 5. " IRQ_DST_ACCT_ERR ,DST interrupt account counter overflow interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 4. 0x08 4. 0x04 4. " IRQ_SRC_ACCT_ERR ,SRC interrupt account counter overflow interrupt mask" "Unmasked,Masked" textline " " setclrfld.long 0x00 3. 0x08 3. 0x04 3. " BYTE_CNT_OVRFL ,Byte count counter overflow interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 2. 0x08 2. 0x04 2. " DST_DSCR_DONE ,Completion of DST descriptor element interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 1. 0x08 1. 0x04 1. " SRC_DSCR_DONE ,Completion of SRC descriptor interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 0. 0x08 0. 0x04 0. " INV_APB ,APB (Register) access to an unimplemented space interrupt mask" "Unmasked,Masked" group.long 0x110++0x07 line.long 0x00 "CH_CTRL0,Channel Control Register 0" bitfld.long 0x00 7. " OVR_FETCH ,Allow DMA channel to over-fetch" "Not allowed,Allowed" bitfld.long 0x00 6. " POINT_TYPE ,Descriptor store place" "APB register,Memory" bitfld.long 0x00 4.--5. " MODE ,DMA memory access selector" "Read/write,Write,Read,?..." bitfld.long 0x00 3. " RATE_CTRL ,Enable rate control" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " CONT_ADDR ,Coming out of pause" "Continuous address,Start address register" bitfld.long 0x00 1. " CONT ,Unpause DMA" "No effect,Unpause" line.long 0x04 "CH_CTRL1,Channel Control Register 1" bitfld.long 0x04 0.--4. " SRC_ISSUE ,Outstanding transaction on SRC count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" if (((d.l(ad:0xFD570000+0x118))&0x01)==0x01) group.long 0x118++0x03 line.long 0x00 "CH_FCI,Channel Control Register 1" bitfld.long 0x00 2.--3. " PROG_CELL_CNT ,Limit the common buffer usage of the flow controlled channel" "32 + AxLEN,64 + AxLEN,128 + AxLEN,256" bitfld.long 0x00 1. " SIDE ,Flow control interface attached side selector" "Read,Write" bitfld.long 0x00 0. " EN ,Flow control interface enable" "Disabled,Enabled" else group.long 0x118++0x03 line.long 0x00 "CH_FCI,Channel Control Register 1" textfld " " bitfld.long 0x00 1. " SIDE ,Flow control interface attached side selector" "Read,Write" bitfld.long 0x00 0. " EN ,Flow control interface enable" "Disabled,Enabled" endif textline " " rgroup.long 0x11C++0x03 line.long 0x00 "CH_STATUS,Channel Status Register" bitfld.long 0x00 0.--1. " STATE ,DMA channel status" "Done with no error,Pauseed with no error,DMA is busy transferring,DMA done with error" group.long 0x120++0x17 line.long 0x00 "CH_DATA_ATTR,Channel Data AXI Parameter Register" bitfld.long 0x00 26.--27. " ARBURST ,Burst type for SRC AXI transaction" "Fixed,Incremental,?..." bitfld.long 0x00 22.--25. " ARCACHE ,AXI cache bits for data read" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 18.--21. " ARQOS ,Configurable QoS bits for AXI data read" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--17. " ARLEN ,AXI length for data read" "1,2,4,8,16,16,16,16,16,16,16,16,16,16,16,16" textline " " bitfld.long 0x00 12.--13. " AWBURST ,Burst type for DST AXI transaction" "Fixed,Incremental,?..." bitfld.long 0x00 8.--11. " AWCACHE ,AXI cache bits for data write" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " AWQOS ,Configurable QoS bits for AXI data write" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " AWLEN ,AXI length for data write" "1,2,4,8,16,16,16,16,16,16,16,16,16,16,16,16" line.long 0x04 "CH_DSCR_ATTR,Channel DSCR AXI Parameter Register" bitfld.long 0x04 8. " AXCOHRNT ,AXI transactions generated for the descriptor read coherency" "Non-coherent,Coherent" bitfld.long 0x04 4.--7. " AXCACHE ,AXI cache bit used for DSCR fetch (Src and DST side)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. " AXQOS ,QoS bit used for DSCR fetch (Src and DST side)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "CH_SRC_DSCR_WORD0,SRC DSCR Word 0" line.long 0x0C "CH_SRC_DSCR_WORD1,SRC DSCR Word 1" hexmask.long.tbyte 0x0C 0.--16. 0x01 " MSB ,Upper 12-bits of address" line.long 0x10 "CH_SRC_DSCR_WORD2,SRC DSCR Word 2" hexmask.long 0x10 0.--29. 1. " SIZE ,Buffer size in bytes" line.long 0x14 "CH_SRC_DSCR_WORD3,SRC DSCR Word 3" bitfld.long 0x14 3.--4. " CMD ,Command executed after completing current descriptor" "Next descriptor is valid,Pause,Stop,?..." bitfld.long 0x14 2. " INTR ,Require completion interrupt" "Disabled,Enabled" bitfld.long 0x14 1. " TYPE ,Current descriptor size (Bits)" "128,256" bitfld.long 0x14 0. " COHRNT ,AXI transactions generated to process the descriptor payload coherency" "Non-coherent,Coherent" group.long 0x138++0x0F line.long 0x00 "CH_DST_DSCR_WORD0,DST DSCR Word 0" line.long 0x04 "CH_DST_DSCR_WORD1,DST DSCR Word 1" hexmask.long.tbyte 0x04 0.--16. 0x01 " MSB ,Upper 12-bits of address" line.long 0x08 "CH_DST_DSCR_WORD2,DST DSCR Word 2" hexmask.long 0x08 0.--29. 1. " SIZE ,Buffer size in bytes" line.long 0x0C "CH_DST_DSCR_WORD3,DST DSCR Word 3" bitfld.long 0x0C 2. " INTR ,Require completion interrupt" "Disabled,Enabled" bitfld.long 0x0C 0. " COHRNT ,AXI transactions generated to process the descriptor payload coherency" "Non-coherent,Coherent" group.long 0x148++0x1F line.long 0x00 "CH_WR_ONLY_WORD0,Write Only Data Word 0" line.long 0x04 "CH_WR_ONLY_WORD1,Write Only Data Word 1" line.long 0x08 "CH_WR_ONLY_WORD2,Write Only Data Word 2" line.long 0x0C "CH_WR_ONLY_WORD3,Write Only Data Word 3" line.long 0x10 "CH_SRC_START_LSB,SRC DSCR Start Address LSB Regiser" line.long 0x14 "CH_SRC_START_MSB,SRC DSCR Start Address MSB Regiser" hexmask.long.tbyte 0x14 0.--16. 1. " ADDR ,Start address MSB register for SRC descriptor fetch" line.long 0x18 "CH_DST_START_LSB,DST DSCR Start Address LSB Regiser" line.long 0x1C "CH_DST_START_MSB,SRC DSCR Start Address MSB Regiser" hexmask.long.tbyte 0x1C 0.--16. 1. " ADDR ,Start address MSB register for DST descriptor fetch" if (((d.l(ad:0xFD570000+0x110))&0x08)==0x08) group.long 0x18C++0x03 line.long 0x00 "CH_RATE_CTRL,Rate Control Count Register" hexmask.long.word 0x00 0.--11. 1. " CNT ,Scheduling interval for SRC AXI transaction" else hgroup.long 0x18C++0x03 hide.long 0x00 "CH_RATE_CTRL,Rate Control Count Register" endif hgroup.long 0x190++0x03 hide.long 0x00 "CH_IRQ_SRC_ACCT,SRC Interrupt Account Count Register" in hgroup.long 0x194++0x03 hide.long 0x00 "CH_IRQ_DST_ACCT,DST Interrupt Account Count Register" in group.long 0x200++0x03 line.long 0x00 "CH_CTRL2,Control Register 2" bitfld.long 0x00 0. " EN ,DMA channel enable" "Disabled,Enabled" width 0x0B tree.end tree.end tree "AFIFM (AXI Fabric Master Interface and Configuration)" tree "AFIFM 0" base ad:0xFD360000 width 16. group.long 0x00++0x0B line.long 0x00 "RDCTRL,Read Channel Control Register" bitfld.long 0x00 3. " PAUSE ,Pause the issuing of new read commands to the PS-side" "Not paused,Paused" bitfld.long 0x00 2. " FABRIC_QOS_EN ,Enable control of QoS from the fabric" "Disabled,Enabled" bitfld.long 0x00 0.--1. " FABRIC_WIDTH ,Read channel fabric interface width" "128-bit,64-bit,32-bit,?..." line.long 0x04 "RDISSUE,Read Issuing Capability Register" bitfld.long 0x04 0.--3. " CAPABILITY ,Max number of outstanding read commands" "1 command,2 commands,3 commands,4 commands,5 commands,6 commands,7 commands,8 commands,9 commands,10 commands,11 commands,12 commands,13 commands,14 commands,15 commands,16 commands" line.long 0x08 "RDQOS,QoS Read Channel Register" bitfld.long 0x08 0.--3. " VALUE ,Level of the QoS field to be used for the read channel" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" rgroup.long 0x10++0x03 line.long 0x00 "RDDEBUG,Read Channel Debug Register" bitfld.long 0x00 30.--31. " AFI_VERSION ,Version of AFI_FM" "Zynq 7 series,Zynq 8 series,?..." group.long 0x14++0x0B line.long 0x00 "WRCTRL,Write Channel Control Register" bitfld.long 0x00 12. " WR_RELEASE_MODE ,Mode of write command release" "When enqueued,Immediately" textline " " bitfld.long 0x00 3. " PAUSE ,Pause the issuing of new write commands to the PS-side" "Not paused,Paused" bitfld.long 0x00 2. " FABRIC_QOS_EN ,Enable control of QoS from the fabric" "Disabled,Enabled" bitfld.long 0x00 0.--1. " FABRIC_WIDTH ,Write channel fabric interface width" "128-bit,64-bit,32-bit,?..." line.long 0x04 "WRISSUE,Write Issuing Capability Register" bitfld.long 0x04 0.--3. " CAPABILITY ,Max number of outstanding write commands" "1 command,2 commands,3 commands,4 commands,5 commands,6 commands,7 commands,8 commands,9 commands,10 commands,11 commands,12 commands,13 commands,14 commands,15 commands,16 commands" line.long 0x08 "WRQOS,QoS Write Channel Register" bitfld.long 0x08 0.--3. " VALUE ,Level of the QoS field to be used for the write channel" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.long 0xE00++0x03 line.long 0x00 "I_STS,Interrupt Status Register" eventfld.long 0x00 0. " INVALID_APB ,APB (Register) access has occured to an unimplemented space" "Not occurred,Occurred" group.long 0xE0C++0x03 line.long 0x00 "I_MASK_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 0. -0x04 0. -0x08 0. " INVALID_APB ,APB (Register) access has occured to an unimplemented space mask" "Not masked,Masked" group.long 0xF04++0x03 line.long 0x00 "CONTROL,General Control Register" bitfld.long 0x00 0. " APB_ERR_RESP ,PSLVERR value when APB (Register) access occurs to an unimplemented space selector" "Low,High" group.long 0xF0C++0x03 line.long 0x00 "SAFETY_CHK,Safety Endpoint Connectivity Check Register" width 0x0B tree.end tree "AFIFM 1" base ad:0xFD370000 width 16. group.long 0x00++0x0B line.long 0x00 "RDCTRL,Read Channel Control Register" bitfld.long 0x00 3. " PAUSE ,Pause the issuing of new read commands to the PS-side" "Not paused,Paused" bitfld.long 0x00 2. " FABRIC_QOS_EN ,Enable control of QoS from the fabric" "Disabled,Enabled" bitfld.long 0x00 0.--1. " FABRIC_WIDTH ,Read channel fabric interface width" "128-bit,64-bit,32-bit,?..." line.long 0x04 "RDISSUE,Read Issuing Capability Register" bitfld.long 0x04 0.--3. " CAPABILITY ,Max number of outstanding read commands" "1 command,2 commands,3 commands,4 commands,5 commands,6 commands,7 commands,8 commands,9 commands,10 commands,11 commands,12 commands,13 commands,14 commands,15 commands,16 commands" line.long 0x08 "RDQOS,QoS Read Channel Register" bitfld.long 0x08 0.--3. " VALUE ,Level of the QoS field to be used for the read channel" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" rgroup.long 0x10++0x03 line.long 0x00 "RDDEBUG,Read Channel Debug Register" bitfld.long 0x00 30.--31. " AFI_VERSION ,Version of AFI_FM" "Zynq 7 series,Zynq 8 series,?..." group.long 0x14++0x0B line.long 0x00 "WRCTRL,Write Channel Control Register" bitfld.long 0x00 12. " WR_RELEASE_MODE ,Mode of write command release" "When enqueued,Immediately" textline " " bitfld.long 0x00 3. " PAUSE ,Pause the issuing of new write commands to the PS-side" "Not paused,Paused" bitfld.long 0x00 2. " FABRIC_QOS_EN ,Enable control of QoS from the fabric" "Disabled,Enabled" bitfld.long 0x00 0.--1. " FABRIC_WIDTH ,Write channel fabric interface width" "128-bit,64-bit,32-bit,?..." line.long 0x04 "WRISSUE,Write Issuing Capability Register" bitfld.long 0x04 0.--3. " CAPABILITY ,Max number of outstanding write commands" "1 command,2 commands,3 commands,4 commands,5 commands,6 commands,7 commands,8 commands,9 commands,10 commands,11 commands,12 commands,13 commands,14 commands,15 commands,16 commands" line.long 0x08 "WRQOS,QoS Write Channel Register" bitfld.long 0x08 0.--3. " VALUE ,Level of the QoS field to be used for the write channel" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.long 0xE00++0x03 line.long 0x00 "I_STS,Interrupt Status Register" eventfld.long 0x00 0. " INVALID_APB ,APB (Register) access has occured to an unimplemented space" "Not occurred,Occurred" group.long 0xE0C++0x03 line.long 0x00 "I_MASK_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 0. -0x04 0. -0x08 0. " INVALID_APB ,APB (Register) access has occured to an unimplemented space mask" "Not masked,Masked" group.long 0xF04++0x03 line.long 0x00 "CONTROL,General Control Register" bitfld.long 0x00 0. " APB_ERR_RESP ,PSLVERR value when APB (Register) access occurs to an unimplemented space selector" "Low,High" group.long 0xF0C++0x03 line.long 0x00 "SAFETY_CHK,Safety Endpoint Connectivity Check Register" width 0x0B tree.end tree "AFIFM 2" base ad:0xFD380000 width 16. group.long 0x00++0x0B line.long 0x00 "RDCTRL,Read Channel Control Register" bitfld.long 0x00 3. " PAUSE ,Pause the issuing of new read commands to the PS-side" "Not paused,Paused" bitfld.long 0x00 2. " FABRIC_QOS_EN ,Enable control of QoS from the fabric" "Disabled,Enabled" bitfld.long 0x00 0.--1. " FABRIC_WIDTH ,Read channel fabric interface width" "128-bit,64-bit,32-bit,?..." line.long 0x04 "RDISSUE,Read Issuing Capability Register" bitfld.long 0x04 0.--3. " CAPABILITY ,Max number of outstanding read commands" "1 command,2 commands,3 commands,4 commands,5 commands,6 commands,7 commands,8 commands,9 commands,10 commands,11 commands,12 commands,13 commands,14 commands,15 commands,16 commands" line.long 0x08 "RDQOS,QoS Read Channel Register" bitfld.long 0x08 0.--3. " VALUE ,Level of the QoS field to be used for the read channel" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" rgroup.long 0x10++0x03 line.long 0x00 "RDDEBUG,Read Channel Debug Register" bitfld.long 0x00 30.--31. " AFI_VERSION ,Version of AFI_FM" "Zynq 7 series,Zynq 8 series,?..." group.long 0x14++0x0B line.long 0x00 "WRCTRL,Write Channel Control Register" bitfld.long 0x00 12. " WR_RELEASE_MODE ,Mode of write command release" "When enqueued,Immediately" textline " " bitfld.long 0x00 3. " PAUSE ,Pause the issuing of new write commands to the PS-side" "Not paused,Paused" bitfld.long 0x00 2. " FABRIC_QOS_EN ,Enable control of QoS from the fabric" "Disabled,Enabled" bitfld.long 0x00 0.--1. " FABRIC_WIDTH ,Write channel fabric interface width" "128-bit,64-bit,32-bit,?..." line.long 0x04 "WRISSUE,Write Issuing Capability Register" bitfld.long 0x04 0.--3. " CAPABILITY ,Max number of outstanding write commands" "1 command,2 commands,3 commands,4 commands,5 commands,6 commands,7 commands,8 commands,9 commands,10 commands,11 commands,12 commands,13 commands,14 commands,15 commands,16 commands" line.long 0x08 "WRQOS,QoS Write Channel Register" bitfld.long 0x08 0.--3. " VALUE ,Level of the QoS field to be used for the write channel" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.long 0xE00++0x03 line.long 0x00 "I_STS,Interrupt Status Register" eventfld.long 0x00 0. " INVALID_APB ,APB (Register) access has occured to an unimplemented space" "Not occurred,Occurred" group.long 0xE0C++0x03 line.long 0x00 "I_MASK_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 0. -0x04 0. -0x08 0. " INVALID_APB ,APB (Register) access has occured to an unimplemented space mask" "Not masked,Masked" group.long 0xF04++0x03 line.long 0x00 "CONTROL,General Control Register" bitfld.long 0x00 0. " APB_ERR_RESP ,PSLVERR value when APB (Register) access occurs to an unimplemented space selector" "Low,High" group.long 0xF0C++0x03 line.long 0x00 "SAFETY_CHK,Safety Endpoint Connectivity Check Register" width 0x0B tree.end tree "AFIFM 3" base ad:0xFD390000 width 16. group.long 0x00++0x0B line.long 0x00 "RDCTRL,Read Channel Control Register" bitfld.long 0x00 3. " PAUSE ,Pause the issuing of new read commands to the PS-side" "Not paused,Paused" bitfld.long 0x00 2. " FABRIC_QOS_EN ,Enable control of QoS from the fabric" "Disabled,Enabled" bitfld.long 0x00 0.--1. " FABRIC_WIDTH ,Read channel fabric interface width" "128-bit,64-bit,32-bit,?..." line.long 0x04 "RDISSUE,Read Issuing Capability Register" bitfld.long 0x04 0.--3. " CAPABILITY ,Max number of outstanding read commands" "1 command,2 commands,3 commands,4 commands,5 commands,6 commands,7 commands,8 commands,9 commands,10 commands,11 commands,12 commands,13 commands,14 commands,15 commands,16 commands" line.long 0x08 "RDQOS,QoS Read Channel Register" bitfld.long 0x08 0.--3. " VALUE ,Level of the QoS field to be used for the read channel" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" rgroup.long 0x10++0x03 line.long 0x00 "RDDEBUG,Read Channel Debug Register" bitfld.long 0x00 30.--31. " AFI_VERSION ,Version of AFI_FM" "Zynq 7 series,Zynq 8 series,?..." group.long 0x14++0x0B line.long 0x00 "WRCTRL,Write Channel Control Register" bitfld.long 0x00 12. " WR_RELEASE_MODE ,Mode of write command release" "When enqueued,Immediately" textline " " bitfld.long 0x00 3. " PAUSE ,Pause the issuing of new write commands to the PS-side" "Not paused,Paused" bitfld.long 0x00 2. " FABRIC_QOS_EN ,Enable control of QoS from the fabric" "Disabled,Enabled" bitfld.long 0x00 0.--1. " FABRIC_WIDTH ,Write channel fabric interface width" "128-bit,64-bit,32-bit,?..." line.long 0x04 "WRISSUE,Write Issuing Capability Register" bitfld.long 0x04 0.--3. " CAPABILITY ,Max number of outstanding write commands" "1 command,2 commands,3 commands,4 commands,5 commands,6 commands,7 commands,8 commands,9 commands,10 commands,11 commands,12 commands,13 commands,14 commands,15 commands,16 commands" line.long 0x08 "WRQOS,QoS Write Channel Register" bitfld.long 0x08 0.--3. " VALUE ,Level of the QoS field to be used for the write channel" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.long 0xE00++0x03 line.long 0x00 "I_STS,Interrupt Status Register" eventfld.long 0x00 0. " INVALID_APB ,APB (Register) access has occured to an unimplemented space" "Not occurred,Occurred" group.long 0xE0C++0x03 line.long 0x00 "I_MASK_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 0. -0x04 0. -0x08 0. " INVALID_APB ,APB (Register) access has occured to an unimplemented space mask" "Not masked,Masked" group.long 0xF04++0x03 line.long 0x00 "CONTROL,General Control Register" bitfld.long 0x00 0. " APB_ERR_RESP ,PSLVERR value when APB (Register) access occurs to an unimplemented space selector" "Low,High" group.long 0xF0C++0x03 line.long 0x00 "SAFETY_CHK,Safety Endpoint Connectivity Check Register" width 0x0B tree.end tree "AFIFM 4" base ad:0xFD3A0000 width 16. group.long 0x00++0x0B line.long 0x00 "RDCTRL,Read Channel Control Register" bitfld.long 0x00 3. " PAUSE ,Pause the issuing of new read commands to the PS-side" "Not paused,Paused" bitfld.long 0x00 2. " FABRIC_QOS_EN ,Enable control of QoS from the fabric" "Disabled,Enabled" bitfld.long 0x00 0.--1. " FABRIC_WIDTH ,Read channel fabric interface width" "128-bit,64-bit,32-bit,?..." line.long 0x04 "RDISSUE,Read Issuing Capability Register" bitfld.long 0x04 0.--3. " CAPABILITY ,Max number of outstanding read commands" "1 command,2 commands,3 commands,4 commands,5 commands,6 commands,7 commands,8 commands,9 commands,10 commands,11 commands,12 commands,13 commands,14 commands,15 commands,16 commands" line.long 0x08 "RDQOS,QoS Read Channel Register" bitfld.long 0x08 0.--3. " VALUE ,Level of the QoS field to be used for the read channel" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" rgroup.long 0x10++0x03 line.long 0x00 "RDDEBUG,Read Channel Debug Register" bitfld.long 0x00 30.--31. " AFI_VERSION ,Version of AFI_FM" "Zynq 7 series,Zynq 8 series,?..." group.long 0x14++0x0B line.long 0x00 "WRCTRL,Write Channel Control Register" bitfld.long 0x00 12. " WR_RELEASE_MODE ,Mode of write command release" "When enqueued,Immediately" textline " " bitfld.long 0x00 3. " PAUSE ,Pause the issuing of new write commands to the PS-side" "Not paused,Paused" bitfld.long 0x00 2. " FABRIC_QOS_EN ,Enable control of QoS from the fabric" "Disabled,Enabled" bitfld.long 0x00 0.--1. " FABRIC_WIDTH ,Write channel fabric interface width" "128-bit,64-bit,32-bit,?..." line.long 0x04 "WRISSUE,Write Issuing Capability Register" bitfld.long 0x04 0.--3. " CAPABILITY ,Max number of outstanding write commands" "1 command,2 commands,3 commands,4 commands,5 commands,6 commands,7 commands,8 commands,9 commands,10 commands,11 commands,12 commands,13 commands,14 commands,15 commands,16 commands" line.long 0x08 "WRQOS,QoS Write Channel Register" bitfld.long 0x08 0.--3. " VALUE ,Level of the QoS field to be used for the write channel" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.long 0xE00++0x03 line.long 0x00 "I_STS,Interrupt Status Register" eventfld.long 0x00 0. " INVALID_APB ,APB (Register) access has occured to an unimplemented space" "Not occurred,Occurred" group.long 0xE0C++0x03 line.long 0x00 "I_MASK_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 0. -0x04 0. -0x08 0. " INVALID_APB ,APB (Register) access has occured to an unimplemented space mask" "Not masked,Masked" group.long 0xF04++0x03 line.long 0x00 "CONTROL,General Control Register" bitfld.long 0x00 0. " APB_ERR_RESP ,PSLVERR value when APB (Register) access occurs to an unimplemented space selector" "Low,High" group.long 0xF0C++0x03 line.long 0x00 "SAFETY_CHK,Safety Endpoint Connectivity Check Register" width 0x0B tree.end tree "AFIFM 5" base ad:0xFD3B0000 width 16. group.long 0x00++0x0B line.long 0x00 "RDCTRL,Read Channel Control Register" bitfld.long 0x00 3. " PAUSE ,Pause the issuing of new read commands to the PS-side" "Not paused,Paused" bitfld.long 0x00 2. " FABRIC_QOS_EN ,Enable control of QoS from the fabric" "Disabled,Enabled" bitfld.long 0x00 0.--1. " FABRIC_WIDTH ,Read channel fabric interface width" "128-bit,64-bit,32-bit,?..." line.long 0x04 "RDISSUE,Read Issuing Capability Register" bitfld.long 0x04 0.--3. " CAPABILITY ,Max number of outstanding read commands" "1 command,2 commands,3 commands,4 commands,5 commands,6 commands,7 commands,8 commands,9 commands,10 commands,11 commands,12 commands,13 commands,14 commands,15 commands,16 commands" line.long 0x08 "RDQOS,QoS Read Channel Register" bitfld.long 0x08 0.--3. " VALUE ,Level of the QoS field to be used for the read channel" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" rgroup.long 0x10++0x03 line.long 0x00 "RDDEBUG,Read Channel Debug Register" bitfld.long 0x00 30.--31. " AFI_VERSION ,Version of AFI_FM" "Zynq 7 series,Zynq 8 series,?..." group.long 0x14++0x0B line.long 0x00 "WRCTRL,Write Channel Control Register" bitfld.long 0x00 12. " WR_RELEASE_MODE ,Mode of write command release" "When enqueued,Immediately" textline " " bitfld.long 0x00 3. " PAUSE ,Pause the issuing of new write commands to the PS-side" "Not paused,Paused" bitfld.long 0x00 2. " FABRIC_QOS_EN ,Enable control of QoS from the fabric" "Disabled,Enabled" bitfld.long 0x00 0.--1. " FABRIC_WIDTH ,Write channel fabric interface width" "128-bit,64-bit,32-bit,?..." line.long 0x04 "WRISSUE,Write Issuing Capability Register" bitfld.long 0x04 0.--3. " CAPABILITY ,Max number of outstanding write commands" "1 command,2 commands,3 commands,4 commands,5 commands,6 commands,7 commands,8 commands,9 commands,10 commands,11 commands,12 commands,13 commands,14 commands,15 commands,16 commands" line.long 0x08 "WRQOS,QoS Write Channel Register" bitfld.long 0x08 0.--3. " VALUE ,Level of the QoS field to be used for the write channel" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.long 0xE00++0x03 line.long 0x00 "I_STS,Interrupt Status Register" eventfld.long 0x00 0. " INVALID_APB ,APB (Register) access has occured to an unimplemented space" "Not occurred,Occurred" group.long 0xE0C++0x03 line.long 0x00 "I_MASK_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 0. -0x04 0. -0x08 0. " INVALID_APB ,APB (Register) access has occured to an unimplemented space mask" "Not masked,Masked" group.long 0xF04++0x03 line.long 0x00 "CONTROL,General Control Register" bitfld.long 0x00 0. " APB_ERR_RESP ,PSLVERR value when APB (Register) access occurs to an unimplemented space selector" "Low,High" group.long 0xF0C++0x03 line.long 0x00 "SAFETY_CHK,Safety Endpoint Connectivity Check Register" width 0x0B tree.end tree "AFIFM 6" base ad:0xFF9B0000 width 16. group.long 0x00++0x0B line.long 0x00 "RDCTRL,Read Channel Control Register" bitfld.long 0x00 3. " PAUSE ,Pause the issuing of new read commands to the PS-side" "Not paused,Paused" bitfld.long 0x00 2. " FABRIC_QOS_EN ,Enable control of QoS from the fabric" "Disabled,Enabled" bitfld.long 0x00 0.--1. " FABRIC_WIDTH ,Read channel fabric interface width" "128-bit,64-bit,32-bit,?..." line.long 0x04 "RDISSUE,Read Issuing Capability Register" bitfld.long 0x04 0.--3. " CAPABILITY ,Max number of outstanding read commands" "1 command,2 commands,3 commands,4 commands,5 commands,6 commands,7 commands,8 commands,9 commands,10 commands,11 commands,12 commands,13 commands,14 commands,15 commands,16 commands" line.long 0x08 "RDQOS,QoS Read Channel Register" bitfld.long 0x08 0.--3. " VALUE ,Level of the QoS field to be used for the read channel" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" rgroup.long 0x10++0x03 line.long 0x00 "RDDEBUG,Read Channel Debug Register" bitfld.long 0x00 30.--31. " AFI_VERSION ,Version of AFI_FM" "Zynq 7 series,Zynq 8 series,?..." group.long 0x14++0x0B line.long 0x00 "WRCTRL,Write Channel Control Register" bitfld.long 0x00 12. " WR_RELEASE_MODE ,Mode of write command release" "When enqueued,Immediately" textline " " bitfld.long 0x00 3. " PAUSE ,Pause the issuing of new write commands to the PS-side" "Not paused,Paused" bitfld.long 0x00 2. " FABRIC_QOS_EN ,Enable control of QoS from the fabric" "Disabled,Enabled" bitfld.long 0x00 0.--1. " FABRIC_WIDTH ,Write channel fabric interface width" "128-bit,64-bit,32-bit,?..." line.long 0x04 "WRISSUE,Write Issuing Capability Register" bitfld.long 0x04 0.--3. " CAPABILITY ,Max number of outstanding write commands" "1 command,2 commands,3 commands,4 commands,5 commands,6 commands,7 commands,8 commands,9 commands,10 commands,11 commands,12 commands,13 commands,14 commands,15 commands,16 commands" line.long 0x08 "WRQOS,QoS Write Channel Register" bitfld.long 0x08 0.--3. " VALUE ,Level of the QoS field to be used for the write channel" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.long 0xE00++0x03 line.long 0x00 "I_STS,Interrupt Status Register" eventfld.long 0x00 0. " INVALID_APB ,APB (Register) access has occured to an unimplemented space" "Not occurred,Occurred" group.long 0xE0C++0x03 line.long 0x00 "I_MASK_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 0. -0x04 0. -0x08 0. " INVALID_APB ,APB (Register) access has occured to an unimplemented space mask" "Not masked,Masked" group.long 0xF04++0x03 line.long 0x00 "CONTROL,General Control Register" bitfld.long 0x00 0. " APB_ERR_RESP ,PSLVERR value when APB (Register) access occurs to an unimplemented space selector" "Low,High" group.long 0xF0C++0x03 line.long 0x00 "SAFETY_CHK,Safety Endpoint Connectivity Check Register" width 0x0B tree.end tree.end tree "AMS (Analog Monitor System)" tree "Control" base ad:0xFFA50000 width 21. group.byte 0x00++0x00 line.byte 0x00 "MISC_CTRL,MISC_CTRL" bitfld.byte 0x00 1. " SLVERR_EN_DRP ,Enable slverr on invalid address requests" "Disabled,Enabled" bitfld.byte 0x00 0. " SLVERR_EN ,Enable slverr on invalid address requests" "Disabled,Enabled" group.long 0x10++0x03 line.long 0x00 "ISR_0,Interrupt Status Register 0" eventfld.long 0x00 31. " PL_ALM_15 ,OR of PL_ALM_* bits 13:0" "No interrupt,Interrupt" eventfld.long 0x00 29. " PL_ALM_13 ,Remote temp alarm from PL system monitor" "No interrupt,Interrupt" eventfld.long 0x00 28. " PL_ALM_12 ,VCCAMS voltage alarm from PL system monitor" "No interrupt,Interrupt" textline " " eventfld.long 0x00 27. " PL_ALM_11 ,VTT_PSGT voltage alarm from PL system monitor" "No interrupt,Interrupt" eventfld.long 0x00 26. " PL_ALM_10 ,VCC_PSGT voltage alarm from PL system monitor" "No interrupt,Interrupt" eventfld.long 0x00 25. " PL_ALM_9 ,VCC_PSIO_2 voltage alarm from PL system monitor" "No interrupt,Interrupt" eventfld.long 0x00 24. " PL_ALM_8 ,VCC_PSIO_1 voltage alarm from PL system monitor" "No interrupt,Interrupt" textline " " eventfld.long 0x00 23. " PL_ALM_7 ,OR of PL_ALM_* bits 6:0" "No interrupt,Interrupt" eventfld.long 0x00 22. " PL_ALM_6 ,VCC_PSIO_0 voltage alarm from PL system monitor" "No interrupt,Interrupt" eventfld.long 0x00 21. " PL_ALM_5 ,VCC_PSIO_3 voltage alarm from PL system monitor" "No interrupt,Interrupt" eventfld.long 0x00 20. " PL_ALM_4 ,VCC_PSDDR voltage alarm from PL system monitor" "No interrupt,Interrupt" textline " " eventfld.long 0x00 19. " PL_ALM_3 ,VCC_PSAUX voltage alarm from PL system monitor" "No interrupt,Interrupt" eventfld.long 0x00 18. " PL_ALM_2 ,VCC_PSINTFP voltage alarm from PL system monitor" "No interrupt,Interrupt" eventfld.long 0x00 17. " PL_ALM_1 ,VCC_PSINTLP voltage alarm from PL system monitor" "No interrupt,Interrupt" eventfld.long 0x00 16. " PL_ALM_0 ,Local temperature alarm from PL system monitor" "No interrupt,Interrupt" textline " " eventfld.long 0x00 15. " PS_ALM_15 ,OR of PS_ALM_* bits 13:0" "No interrupt,Interrupt" eventfld.long 0x00 13. " PS_ALM_13 ,Remote temp alarm from PS system monitor" "No interrupt,Interrupt" eventfld.long 0x00 12. " PS_ALM_12 ,VCCAMS voltage alarm from PS system monitor" "No interrupt,Interrupt" textline " " eventfld.long 0x00 11. " PS_ALM_11 ,VTT_PSGT voltage alarm from PS system monitor" "No interrupt,Interrupt" eventfld.long 0x00 10. " PS_ALM_10 ,VCC_PSGT voltage alarm from PS system monitor" "No interrupt,Interrupt" eventfld.long 0x00 9. " PS_ALM_9 ,VCC_PSIO_2 voltage alarm from PS system monitor" "No interrupt,Interrupt" eventfld.long 0x00 8. " PS_ALM_8 ,VCC_PSIO_1 voltage alarm from PS system monitor" "No interrupt,Interrupt" textline " " eventfld.long 0x00 7. " PS_ALM_7 ,OR of PS_ALM_* bits 6:0" "No interrupt,Interrupt" eventfld.long 0x00 6. " PS_ALM_6 ,VCC_PSIO_0 voltage alarm from PS system monitor" "No interrupt,Interrupt" eventfld.long 0x00 5. " PS_ALM_5 ,VCC_PSIO_3 voltage alarm from PS system monitor" "No interrupt,Interrupt" eventfld.long 0x00 4. " PS_ALM_4 ,VCC_PSDDR voltage alarm from PS system monitor" "No interrupt,Interrupt" textline " " eventfld.long 0x00 3. " PS_ALM_3 ,VCC_PSAUX voltage alarm from PS system monitor" "No interrupt,Interrupt" eventfld.long 0x00 2. " PS_ALM_2 ,VCC_PSINTFP voltage alarm from PS system monitor" "No interrupt,Interrupt" eventfld.long 0x00 1. " PS_ALM_1 ,VCC_PSINTLP voltage alarm from PS system monitor" "No interrupt,Interrupt" eventfld.long 0x00 0. " PS_ALM_0 ,Local temperature alarm from PS system monitor" "No interrupt,Interrupt" group.long 0x14++0x03 line.long 0x00 "ISR_1,Interrupt Status Register 1" eventfld.long 0x00 31. " ADDR_D_ERR ,Address decode error at the register block" "No interrupt,Interrupt" eventfld.long 0x00 30. " ADDR_D_ERR_PL_SYSMON ,Address decode error at the PL SysMon" "No interrupt,Interrupt" eventfld.long 0x00 29. " ADDR_D_ERR_PS_SYSMON ,Address decode error at the PS SysMon" "No interrupt,Interrupt" textline " " eventfld.long 0x00 4. " EOS ,PS system monitor end of sequence" "No interrupt,Interrupt" eventfld.long 0x00 3. " EOC ,PS system monitor end of conversion" "No interrupt,Interrupt" textline " " eventfld.long 0x00 2. " PL_OT ,Over temperature alarm from PL system monitor" "No interrupt,Interrupt" eventfld.long 0x00 1. " PS_LPD_OT ,Over temperature alarm from PS LPD system monitor" "No interrupt,Interrupt" eventfld.long 0x00 0. " PS_FPD_OT ,Over temperature alarm from PS FPD system monitor" "No interrupt,Interrupt" group.long 0x18++0x03 line.long 0x00 "IMR_0_SET/CLR,Interrupt Mask Register 0" setclrfld.long 0x00 31. 0x08 31. 0x10 31. " PL_ALM_15 ,OR of PL_ALM_* bits 13:0 mask" "Not masked,Masked" setclrfld.long 0x00 29. 0x08 29. 0x10 29. " PL_ALM_13 ,Remote temp alarm from PL system monitor mask" "Not masked,Masked" setclrfld.long 0x00 28. 0x08 28. 0x10 28. " PL_ALM_12 ,VCCAMS voltage alarm from PL system monitor mask" "Not masked,Masked" textline " " setclrfld.long 0x00 27. 0x08 27. 0x10 27. " PL_ALM_11 ,VTT_PSGT voltage alarm from PL system monitor mask" "Not masked,Masked" setclrfld.long 0x00 26. 0x08 26. 0x10 26. " PL_ALM_10 ,VCC_PSGT voltage alarm from PL system monitor mask" "Not masked,Masked" setclrfld.long 0x00 25. 0x08 25. 0x10 25. " PL_ALM_9 ,VCC_PSIO_2 voltage alarm from PL system monitor mask" "Not masked,Masked" setclrfld.long 0x00 24. 0x08 24. 0x10 24. " PL_ALM_8 ,VCC_PSIO_1 voltage alarm from PL system monitor mask" "Not masked,Masked" textline " " setclrfld.long 0x00 23. 0x08 23. 0x10 23. " PL_ALM_7 ,OR of PL_ALM_* bits 6:0 mask" "Not masked,Masked" setclrfld.long 0x00 22. 0x08 22. 0x10 22. " PL_ALM_6 ,VCC_PSIO_0 voltage alarm from PL system monitor mask" "Not masked,Masked" setclrfld.long 0x00 21. 0x08 21. 0x10 21. " PL_ALM_5 ,VCC_PSIO_3 voltage alarm from PL system monitor mask" "Not masked,Masked" setclrfld.long 0x00 20. 0x08 20. 0x10 20. " PL_ALM_4 ,VCC_PSDDR voltage alarm from PL system monitor mask" "Not masked,Masked" textline " " setclrfld.long 0x00 19. 0x08 19. 0x10 19. " PL_ALM_3 ,VCC_PSAUX voltage alarm from PL system monitor mask" "Not masked,Masked" setclrfld.long 0x00 18. 0x08 18. 0x10 18. " PL_ALM_2 ,VCC_PSINTFP voltage alarm from PL system monitor mask" "Not masked,Masked" setclrfld.long 0x00 17. 0x08 17. 0x10 17. " PL_ALM_1 ,VCC_PSINTLP voltage alarm from PL system monitor mask" "Not masked,Masked" setclrfld.long 0x00 16. 0x08 16. 0x10 16. " PL_ALM_0 ,Local temperature alarm from PL system monitor mask" "Not masked,Masked" textline " " setclrfld.long 0x00 15. 0x08 15. 0x10 15. " PS_ALM_15 ,OR of PS_ALM_* bits 13:0 mask" "Not masked,Masked" setclrfld.long 0x00 13. 0x08 13. 0x10 13. " PS_ALM_13 ,Remote temp alarm from PS system monitor mask" "Not masked,Masked" setclrfld.long 0x00 12. 0x08 12. 0x10 12. " PS_ALM_12 ,VCCAMS voltage alarm from PS system monitor mask" "Not masked,Masked" textline " " setclrfld.long 0x00 11. 0x08 11. 0x10 11. " PS_ALM_11 ,VTT_PSGT voltage alarm from PS system monitor mask" "Not masked,Masked" setclrfld.long 0x00 10. 0x08 10. 0x10 10. " PS_ALM_10 ,VCC_PSGT voltage alarm from PS system monitor mask" "Not masked,Masked" setclrfld.long 0x00 9. 0x08 9. 0x10 9. " PS_ALM_9 ,VCC_PSIO_2 voltage alarm from PS system monitor mask" "Not masked,Masked" setclrfld.long 0x00 8. 0x08 8. 0x10 8. " PS_ALM_8 ,VCC_PSIO_1 voltage alarm from PS system monitor mask" "Not masked,Masked" textline " " setclrfld.long 0x00 7. 0x08 7. 0x10 7. " PS_ALM_7 ,OR of PS_ALM_* bits 6:0 mask" "Not masked,Masked" setclrfld.long 0x00 6. 0x08 6. 0x10 6. " PS_ALM_6 ,VCC_PSIO_0 voltage alarm from PS system monitor mask" "Not masked,Masked" setclrfld.long 0x00 5. 0x08 5. 0x10 5. " PS_ALM_5 ,VCC_PSIO_3 voltage alarm from PS system monitor mask" "Not masked,Masked" setclrfld.long 0x00 4. 0x08 4. 0x10 4. " PS_ALM_4 ,VCC_PSDDR voltage alarm from PS system monitor mask" "Not masked,Masked" textline " " setclrfld.long 0x00 3. 0x08 3. 0x10 3. " PS_ALM_3 ,VCC_PSAUX voltage alarm from PS system monitor mask" "Not masked,Masked" setclrfld.long 0x00 2. 0x08 2. 0x10 2. " PS_ALM_2 ,VCC_PSINTFP voltage alarm from PS system monitor mask" "Not masked,Masked" setclrfld.long 0x00 1. 0x08 1. 0x10 1. " PS_ALM_1 ,VCC_PSINTLP voltage alarm from PS system monitor mask" "Not masked,Masked" setclrfld.long 0x00 0. 0x08 0. 0x10 0. " PS_ALM_0 ,Local temperature alarm from PS system monitor mask" "Not masked,Masked" group.long 0x1C++0x03 line.long 0x00 "IMR_1_SET/CLR,Interrupt Mask Register" setclrfld.long 0x00 31. 0x08 31. 0x10 31. " ADDR_D_ERR ,Address decode error at the register block mask" "Not masked,Masked" setclrfld.long 0x00 30. 0x08 30. 0x10 30. " ADDR_D_ERR_PL_SYSMON ,Address decode error at the PL SysMon mask" "Not masked,Masked" setclrfld.long 0x00 29. 0x08 29. 0x10 29. " ADDR_D_ERR_PS_SYSMON ,Address decode error at the PS SysMon mask" "Not masked,Masked" textline " " setclrfld.long 0x00 4. 0x08 4. 0x10 4. " EOS ,PS system monitor end of sequence mask" "Not masked,Masked" setclrfld.long 0x00 3. 0x08 3. 0x10 3. " EOC ,PS system monitor end of conversion mask" "Not masked,Masked" textline " " setclrfld.long 0x00 2. 0x08 2. 0x10 2. " PL_OT ,Over temperature alarm from PL system monitor mask" "Not masked,Masked" setclrfld.long 0x00 1. 0x08 1. 0x10 1. " PS_LPD_OT ,Over temperature alarm from PS LPD system monitor mask" "Not masked,Masked" setclrfld.long 0x00 0. 0x08 0. 0x10 0. " PS_FPD_OT ,Over temperature alarm from PS FPD system monitor mask" "Not masked,Masked" textline " " group.long 0x40++0x03 line.long 0x00 "PS_SYSMON_CTRL_STAT,PS Global Config Sequence Register" rbitfld.long 0x00 24.--27. " STARTUP_STATE ,State of the global config state machine" "Pre-trim settle,Wait,Memory cell reset,Wait for Efuse readout and oscillator settle,PreConfig wait,Memory cell initialization,PostConfig wait,Wait for JTAG_LOCKED=0,Idle/SysMon ready,?..." rbitfld.long 0x00 16. " STARTUP_DONE ,Global config sequence completed" "Not completed,Completed" textline " " bitfld.long 0x00 3. " AUTO_CONVST ,Start automatic conversion trigger" "Not started,Started" bitfld.long 0x00 2. " CONVST ,Trigger start of conversion" "No effect,Start" textline " " bitfld.long 0x00 1. " RESET_USER ,Reset the system monitor" "No reset,Reset" bitfld.long 0x00 0. " STARTUP_TRIGGER ,Kicks off the global config sequence" "Not kicked,Kicked" rgroup.long 0x44++0x03 line.long 0x00 "PL_SYSMON_CTRL_STAT,PL Global Config Sequence Register" bitfld.long 0x00 0. " ACCESSIBLE ,PS access PL SysMon status" "Not allowed,Allowed" rgroup.long 0x50++0x03 line.long 0x00 "MON_STATUS,Status Outputs Of SysMon Block Register" bitfld.long 0x00 23. " JTAG_LOCKED ,SysMon not available for use due to invalid clock configuration" "Available,Not available" bitfld.long 0x00 22. " BUSY ,ADC busy indication" "Not busy,Busy" textline " " bitfld.long 0x00 16.--21. " CHANNEL ,ADC current channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.word 0x00 0.--15. 1. " MON_DATA ,ADC output data for the channel number indicated by CHANNEL bits" textline " " rgroup.long 0x60++0x03 line.long 0x00 "VCC_PSPLL0,ADC Output For The VCC_PSPLL0 Channel Register" hexmask.long.word 0x00 0.--15. 1. " VALUE ,Conversion result" rgroup.long 0x64++0x03 line.long 0x00 "VCC_PSPLL1,ADC Output For The VCC_PSPLL1 Channel Register" hexmask.long.word 0x00 0.--15. 1. " VALUE ,Conversion result" rgroup.long 0x68++0x03 line.long 0x00 "VCC_PSPLL2,ADC Output For The VCC_PSPLL2 Channel Register" hexmask.long.word 0x00 0.--15. 1. " VALUE ,Conversion result" rgroup.long 0x6C++0x03 line.long 0x00 "VCC_PSPLL3,ADC Output For The VCC_PSPLL3 Channel Register" hexmask.long.word 0x00 0.--15. 1. " VALUE ,Conversion result" rgroup.long 0x70++0x03 line.long 0x00 "VCC_PSPLL4,ADC Output For The VCC_PSPLL4 Channel Register" hexmask.long.word 0x00 0.--15. 1. " VALUE ,Conversion result" rgroup.long 0x74++0x2B line.long 0x00 "VCC_PSBATT,ADC Output For The VCC_PSBATT Channel Register" hexmask.long.word 0x00 0.--15. 1. " VALUE ,Conversion result" line.long 0x04 "VCCINT,ADC Output For The VCCINT Channel Register" hexmask.long.word 0x04 0.--15. 1. " VALUE ,Conversion result" line.long 0x08 "VCCBRAM,ADC Output For The VCCBRAM Channel Register" hexmask.long.word 0x08 0.--15. 1. " VALUE ,Conversion result" line.long 0x0C "VCCAUX,ADC Output For The VCCAUX Channel Register" hexmask.long.word 0x0C 0.--15. 1. " VALUE ,Conversion result" line.long 0x10 "VCC_PSDDRPLL,ADC Output For The VCC_PSDDRPLL Channel Register" hexmask.long.word 0x10 0.--15. 1. " VALUE ,Conversion result" line.long 0x14 "DDRPHY_VREF,ADC Output For The DDRPHY_VREF Channel Register" hexmask.long.word 0x14 0.--15. 1. " VALUE ,Conversion result" line.long 0x18 "DDRPHY_ATO,ADC Output For The DDRPHY_ATO Channel Register" hexmask.long.word 0x18 0.--15. 1. " VALUE ,Conversion result" line.long 0x1C "PSGT_AT0,ADC Output For The PSGT_AT0 Channel Register" hexmask.long.word 0x1C 0.--15. 1. " VALUE ,Conversion result" line.long 0x20 "PSGT_AT1,ADC Output For The PSGT_AT1 Channel Register" hexmask.long.word 0x20 0.--15. 1. " VALUE ,Conversion result" line.long 0x24 "RESERVE0,ADC Output For The VCC_PSINTLP Channel Register" hexmask.long.word 0x24 0.--15. 1. " VALUE ,Conversion result" line.long 0x28 "RESERVE1,ADC Output For The VCC_PSINTFP_DDR Channel Register" hexmask.long.word 0x28 0.--15. 1. " VALUE ,Conversion result" width 0x0B tree.end tree "PL SYSMON" base ad:0xFFA50C00 width 22. rgroup.word 0x00++0x01 line.word 0x00 "TEMPERATURE,Temperature Measurement Register" rgroup.word 0x04++0x01 line.word 0x00 "SUPPLY1,VCCINT Supply Monitor Measurement Register" rgroup.word 0x08++0x01 line.word 0x00 "SUPPLY2,VCCBRAM Supply Monitor Measurement Register" rgroup.word 0x0C++0x01 line.word 0x00 "VP_VN,VP/VN Measurement Register" rgroup.word 0x10++0x01 line.word 0x00 "VREFP,VREFP Supply Monitor Measurement Register" rgroup.word 0x14++0x01 line.word 0x00 "VREFN,VREFN Supply Monitor Measurement Register" rgroup.word 0x18++0x01 line.word 0x00 "SUPPLY3,VCCAUX Supply Monitor Measurement Register" ; rgroup.long 0x20++0x01 ; line.word 0x00 "CAL_SUPPLY_OFFSET,Supply sensor offset register" ; rgroup.word 0x24++0x01 ; line.word 0x00 "CAL_ADC_BI_OFFSET,ADC bipolar sensor offset register" ; rgroup.word 0x28++0x01 ; line.word 0x00 "CAL_GAIN_ERROR,ADC gain error register" rgroup.word 0x34++0x01 line.word 0x00 "SUPPLY4,VCC_PSINTLP Supply Monitor Measurement Register" rgroup.word 0x38++0x01 line.word 0x00 "SUPPLY5,VCC_PSINTFP Supply Monitor Measurement Register" rgroup.word 0x3C++0x01 line.word 0x00 "SUPPLY6,VCC_PSAUX Supply Monitor Measurement Register" rgroup.word 0x40++0x01 line.word 0x00 "VAUX00,VAUX0 Voltage Measurement ADC 0 Register" rgroup.word 0x44++0x01 line.word 0x00 "VAUX01,VAUX1 Voltage Measurement ADC 0 Register" rgroup.word 0x48++0x01 line.word 0x00 "VAUX02,VAUX2 Voltage Measurement ADC 0 Register" rgroup.word 0x4C++0x01 line.word 0x00 "VAUX03,VAUX3 Voltage Measurement ADC 0 Register" rgroup.word 0x50++0x01 line.word 0x00 "VAUX04,VAUX4 Voltage Measurement ADC 0 Register" rgroup.word 0x54++0x01 line.word 0x00 "VAUX05,VAUX5 Voltage Measurement ADC 0 Register" rgroup.word 0x58++0x01 line.word 0x00 "VAUX06,VAUX6 Voltage Measurement ADC 0 Register" rgroup.word 0x5C++0x01 line.word 0x00 "VAUX07,VAUX7 Voltage Measurement ADC 0 Register" rgroup.word 0x60++0x01 line.word 0x00 "VAUX08,VAUX8 Voltage Measurement ADC 0 Register" rgroup.word 0x64++0x01 line.word 0x00 "VAUX09,VAUX9 Voltage Measurement ADC 0 Register" rgroup.word 0x68++0x01 line.word 0x00 "VAUX0A,VAUXA Voltage Measurement ADC 0 Register" rgroup.word 0x6C++0x01 line.word 0x00 "VAUX0B,VAUXB Voltage Measurement ADC 0 Register" rgroup.word 0x70++0x01 line.word 0x00 "VAUX0C,VAUXC Voltage Measurement ADC 0 Register" rgroup.word 0x74++0x01 line.word 0x00 "VAUX0D,VAUXD Voltage Measurement ADC 0 Register" rgroup.word 0x78++0x01 line.word 0x00 "VAUX0E,VAUXE Voltage Measurement ADC 0 Register" rgroup.word 0x7C++0x01 line.word 0x00 "VAUX0F,VAUXF Voltage Measurement ADC 0 Register" rgroup.word 0x80++0x01 line.word 0x00 "MAX_TEMPERATURE,Max Temperature Measurement Register" rgroup.word 0x84++0x01 line.word 0x00 "MAX_SUPPLY1,Max VCCINT Supply Monitor Measurement Register" rgroup.word 0x88++0x01 line.word 0x00 "MAX_SUPPLY2,Max VCCBRAM Supply Monitor Measurement Register" rgroup.word 0x8C++0x01 line.word 0x00 "MAX_SUPPLY3,Max VCCAUX Supply Monitor Measurement Register" rgroup.word 0x90++0x01 line.word 0x00 "MIN_TEMPERATURE,Min Temperature Measurement Register" rgroup.word 0x94++0x01 line.word 0x00 "MIN_SUPPLY1,Min VCCINT Supply Monitor Measurement Register" rgroup.word 0x98++0x01 line.word 0x00 "MIN_SUPPLY2,Min VCCBRAM Supply Monitor Measurement Register" rgroup.word 0x9C++0x01 line.word 0x00 "MIN_SUPPLY3,Min VCCAUX Supply Monitor Measurement Register" rgroup.word 0xA0++0x01 line.word 0x00 "MAX_SUPPLY4,Max VCC_PSINTLP Supply Monitor Measurement Register" rgroup.word 0xA4++0x01 line.word 0x00 "MAX_SUPPLY5,Max VCC_PSINTFP Supply Monitor Measurement Register" rgroup.word 0xA8++0x01 line.word 0x00 "MAX_SUPPLY6,Max VCC_PSAUX Supply Monitor Measurement Register" rgroup.word 0xB0++0x01 line.word 0x00 "MIN_SUPPLY4,Min VCC_PSINTLP Supply Monitor Measurement Register" rgroup.word 0xB4++0x01 line.word 0x00 "MIN_SUPPLY5,Min VCC_PSINTFP Supply Monitor Measurement Register" rgroup.word 0xB8++0x01 line.word 0x00 "MIN_SUPPLY6,Min VCC_PSAUX Supply Monitor Measurement Register" rgroup.word 0xF8++0x01 line.word 0x00 "STATUS_FLAG_1,Status Flag Register 1" bitfld.word 0x00 15. " ALM_VCCAMS ,Alarm 12 - VCCADC" "No alarm,Alarm" textline " " bitfld.word 0x00 5. " ALM_10 ,Alarm 10" "No alarm,Alarm" bitfld.word 0x00 4. " ALM_9 ,Alarm 9" "No alarm,Alarm" bitfld.word 0x00 3. " ALM_8 ,Alarm 8" "No alarm,Alarm" bitfld.word 0x00 2. " ALM_7 ,Alarm 7" "No alarm,Alarm" rgroup.word 0xFC++0x01 line.word 0x00 "STATUS_FLAG,Status Flag Register" bitfld.word 0x00 15. " CLK_OSC_USED ,Clock-oscialltor is used" "Not used,Used" bitfld.word 0x00 14. " BLOCK_IN_RESET ,Block held in reset" "Not held,Held" bitfld.word 0x00 11. " JTAG_DISABLED ,JTAG access is disabled" "No,Yes" bitfld.word 0x00 10. " JTAG_READ_ONLY ,JTAG access can only ready status registers" "Disabled,Enabled" textline " " bitfld.word 0x00 9. " INTERNAL_REF ,Internal reference is being used" "Not used,Used" bitfld.word 0x00 8. " DISABLED ,Block is disabled" "No,Yes" bitfld.word 0x00 7. " ALM_6 ,Alarm 6" "No alarm,Alarm" bitfld.word 0x00 6. " ALM_5 ,Alarm 5" "No alarm,Alarm" textline " " bitfld.word 0x00 5. " ALM_4 ,Alarm 4" "No alarm,Alarm" bitfld.word 0x00 4. " ALM_3 ,Alarm 3" "No alarm,Alarm" bitfld.word 0x00 3. " OT ,Over temperature alarm" "No alarm,Alarm" bitfld.word 0x00 2. " ALM_2 ,Alarm 2" "No alarm,Alarm" textline " " bitfld.word 0x00 1. " ALM_1 ,Alarm 1" "No alarm,Alarm" bitfld.word 0x00 0. " ALM_0 ,Alarm 0" "No alarm,Alarm" textline " " group.word 0x100++0x01 line.word 0x00 "CONFIG_REG0,Config Register 0" bitfld.word 0x00 12.--13. " AVERAGING ,Averaging depth" "Disabled,16 samples,64 samples,256 samples" bitfld.word 0x00 11. " EXTERNAL_MUX ,Enable external multiplexer mode" "Disabled,Enabled" bitfld.word 0x00 10. " BU ,Bipolar input in single channel mode" "Low,High" bitfld.word 0x00 9. " EC ,Enable event sampling mode" "Disabled,Enabled" textline " " bitfld.word 0x00 8. " ACQ ,Enable longer acquisition time in single channel continuous sampling mode" "Disabled,Enabled" bitfld.word 0x00 0.--5. " MUX_CHANNEL ,Channel in single-channel mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.word 0x104++0x01 line.word 0x00 "CONFIG_REG1,Config Register 1" bitfld.word 0x00 12.--15. " SEQUENCE_MODE ,Sequencer mode ADC" "Default,Single pass,Sequence,Single channel,,,Olympus,?..." bitfld.word 0x00 11. " ALARM_DISABLE6 ,Alarm disable for alarm 6" "No,Yes" bitfld.word 0x00 10. " ALARM_DISABLE5 ,Alarm disable for alarm 5" "No,Yes" bitfld.word 0x00 9. " ALARM_DISABLE4 ,Alarm disable for alarm 4" "No,Yes" textline " " bitfld.word 0x00 8. " ALARM_DISABLE3 ,Alarm disable for alarm 3" "No,Yes" bitfld.word 0x00 3. " ALARM_DISABLE2 ,Alarm disable for alarm 2" "No,Yes" bitfld.word 0x00 2. " ALARM_DISABLE1 ,Alarm disable for alarm 1" "No,Yes" bitfld.word 0x00 1. " ALARM_DISABLE0 ,Alarm disable for alarm 0" "No,Yes" textline " " bitfld.word 0x00 0. " OVER_TEMP_DIS ,Over temperature alarm disable" "No,Yes" group.word 0x108++0x01 line.word 0x00 "CONFIG_REG2,Config Register 2" hexmask.word.byte 0x00 8.--15. 1. " CLOCK_DIVIDER ,ADC clock divide ratio relative to DCLK" bitfld.word 0x00 4.--7. " PWR_DOWN ,Power down selector" "Full power,SysOsc only,Sleep,?..." bitfld.word 0x00 2. " TEST_CH_EN ,Enable test channel" "Disabled,Enabled" bitfld.word 0x00 0.--1. " TEST_MODE ,Enable test mode" "0,1,2,3" if (((d.w(ad:0xFFA50C00+0x104))&0xF000)==0x2000) group.word 0x110++0x01 line.word 0x00 "CONFIG_REG4,Config Register 4" bitfld.word 0x00 10.--11. " LOW_RATE_EOS ,EOS generation takes the low-rate sequencer into account" "0,1,2,3" bitfld.word 0x00 8.--9. " SEQUENCE_RATE ,Time until monitoring of next channel on the secondary sequencer" "Every sequence,Every 4th Sequence,Every 16th Sequence,Every 64th Sequence" textline " " bitfld.word 0x00 3. " VUSER_ENABLE_HRANGE[3] ,Enable high range measurement (0 to 6V) on the PMBus data formater - VUser3" "Disabled,Enabled" bitfld.word 0x00 2. " [2] ,Enable high range measurement (0 to 6V) on the PMBus data formater - VUser2" "Disabled,Enabled" bitfld.word 0x00 1. " [1] ,Enable high range measurement (0 to 6V) on the PMBus data formater - VUser1" "Disabled,Enabled" bitfld.word 0x00 0. " [0] ,Enable high range measurement (0 to 6V) on the PMBus data formater - VUser0" "Disabled,Enabled" else group.word 0x110++0x01 line.word 0x00 "CONFIG_REG4,Config Register 4" bitfld.word 0x00 10.--11. " LOW_RATE_EOS ,EOS generation takes the low-rate sequencer into account" "0,1,2,3" textline " " bitfld.word 0x00 3. " VUSER_ENABLE_HRANGE[3] ,Enable high range measurement (0 to 6V) on the PMBus data formater - VUser3" "Disabled,Enabled" bitfld.word 0x00 2. " [2] ,Enable high range measurement (0 to 6V) on the PMBus data formater - VUser2" "Disabled,Enabled" bitfld.word 0x00 1. " [1] ,Enable high range measurement (0 to 6V) on the PMBus data formater - VUser1" "Disabled,Enabled" bitfld.word 0x00 0. " [0] ,Enable high range measurement (0 to 6V) on the PMBus data formater - VUser0" "Disabled,Enabled" endif group.word 0x114++0x01 line.word 0x00 "ANALOG_BUS,Analog Bus Register" bitfld.word 0x00 12.--15. " CVUSER3 ,Selects the analog bus to monitor for VUser3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 8.--11. " CVUSER2 ,Selects the analog bus to monitor for VUser2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 4.--7. " CVUSER1 ,Selects the analog bus to monitor for VUser1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 0.--3. " CVUSER0 ,Selects the analog bus to monitor for VUser0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " group.word 0x118++0x01 line.word 0x00 "SEQ_CHANNEL2,Sequence Channel Register 2" bitfld.word 0x00 5. " TEMPERATURE_REMOTE ,TEMPERATURE_REMOTE sequence" "0,1" bitfld.word 0x00 4. " VCCAMS ,VCCAMS sequence" "0,1" bitfld.word 0x00 3. " SUPPLY10 ,SUPPLY10 sequence" "0,1" textline " " bitfld.word 0x00 2. " SUPPLY9 ,SUPPLY9 sequence" "0,1" bitfld.word 0x00 1. " SUPPLY8 ,SUPPLY8 sequence" "0,1" bitfld.word 0x00 0. " SUPPLY7 ,SUPPLY7 sequence" "0,1" group.word 0x11C++0x01 line.word 0x00 "SEQ_AVERAGE2,Sequence Average Register 2" group.word 0x120++0x01 line.word 0x00 "SEQ_CHANNEL0,Sequence Channel Register 0" bitfld.word 0x00 15. " CURRENT_MON ,CURRENT_MON sequence" "0,1" bitfld.word 0x00 14. " SUPPLY3 ,SUPPLY3 sequence" "0,1" bitfld.word 0x00 13. " VREFN ,VREFN sequence" "0,1" bitfld.word 0x00 12. " VREFP ,VREFP sequence" "0,1" textline " " bitfld.word 0x00 11. " VP_VN ,VP_VN sequence" "0,1" bitfld.word 0x00 10. " SUPPLY2 ,SUPPLY2 sequence" "0,1" bitfld.word 0x00 9. " SUPPLY1 ,SUPPLY1 sequence" "0,1" bitfld.word 0x00 8. " TEMP ,TEMPERATURE sequence" "0,1" textline " " bitfld.word 0x00 7. " SUPPLY6 ,SUPPLY6 sequence" "0,1" bitfld.word 0x00 6. " SUPPLY5 ,SUPPLY5 sequence" "0,1" bitfld.word 0x00 5. " SUPPLY4 ,SUPPLY4 sequence" "0,1" bitfld.word 0x00 3. " TEST_CH ,TEST_CHANNEL sequence" "0,1" textline " " bitfld.word 0x00 0. " CALIBRATION ,CALIBRATION sequence" "0,1" group.word 0x124++0x01 line.word 0x00 "SEQ_CHANNEL1,Sequence Channel Register 1" bitfld.word 0x00 15. " VAUX0F ,Enable the VAUX0F channel" "Disabled,Enabled" bitfld.word 0x00 14. " VAUX0E ,Enable the VAUX0E channel" "Disabled,Enabled" bitfld.word 0x00 13. " VAUX0D ,Enable the VAUX0D channel" "Disabled,Enabled" bitfld.word 0x00 12. " VAUX0C ,Enable the VAUX0C channel" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " VAUX0B ,Enable the VAUX0B channel" "Disabled,Enabled" bitfld.word 0x00 10. " VAUX0A ,Enable the VAUX0A channel" "Disabled,Enabled" bitfld.word 0x00 9. " VAUX09 ,Enable the VAUX09 channel" "Disabled,Enabled" bitfld.word 0x00 8. " VAUX08 ,Enable the VAUX08 channel" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " VAUX07 ,Enable the VAUX07 channel" "Disabled,Enabled" bitfld.word 0x00 6. " VAUX06 ,Enable the VAUX06 channel" "Disabled,Enabled" bitfld.word 0x00 5. " VAUX05 ,Enable the VAUX05 channel" "Disabled,Enabled" bitfld.word 0x00 4. " VAUX04 ,Enable the VAUX04 channel" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " VAUX03 ,Enable the VAUX03 channel" "Disabled,Enabled" bitfld.word 0x00 2. " VAUX02 ,Enable the VAUX02 channel" "Disabled,Enabled" bitfld.word 0x00 1. " VAUX01 ,Enable the VAUX01 channel" "Disabled,Enabled" bitfld.word 0x00 0. " VAUX00 ,Enable the VAUX00 channel" "Disabled,Enabled" group.word 0x128++0x01 line.word 0x00 "SEQ_AVERAGE0,Sequence Average Register 0" group.word 0x12C++0x01 line.word 0x00 "SEQ_AVERAGE1,Sequence Average Register 1" group.word 0x130++0x01 line.word 0x00 "SEQ_INPUT_MODE0,Sequence Input Mode Register 0" group.word 0x134++0x01 line.word 0x00 "SEQ_INPUT_MODE1,Sequence Input Mode Register 1" group.word 0x138++0x01 line.word 0x00 "SEQ_ACQ0,Sequence Acquisiton Length Register 0" group.word 0x13C++0x01 line.word 0x00 "SEQ_ACQ1,Sequence Acquisiton Length Register 1" group.word 0x140++0x01 line.word 0x00 "ALARM_TEMP_UP,Upper Temperature Alarm Threshold Register" group.word 0x144++0x01 line.word 0x00 "ALARM_SUP1_UP,Upper VCCINT Alarm Threshold Register" group.word 0x148++0x01 line.word 0x00 "ALARM_SUP2_UP,Upper VCCBRAM Alarm Threshold Register" group.word 0x14C++0x01 line.word 0x00 "ALARM_OT_UP,Upper over-temperature Alarm Threshold Register" group.word 0x150++0x01 line.word 0x00 "ALARM_TEMP_LO,Lower Temperature Alarm Threshold Register" hexmask.word 0x00 1.--15. 1. " TEMP_ALARM ,Temperature at which to clear the temperature alarm" bitfld.word 0x00 0. " THR_MODE ,Use hysteresis or direct threshold" "7-series hysteresis,Direct threshold" group.word 0x154++0x01 line.word 0x00 "ALARM_SUP1_LO,Lower VCCINT Alarm Threshold Register" group.word 0x158++0x01 line.word 0x00 "ALARM_SUP2_LO,Lower VCCBRAM Alarm Threshold Register" group.word 0x15C++0x01 line.word 0x00 "ALARM_OT_LO,Lower Over-temperature Alarm Threshold Register" hexmask.word 0x00 1.--15. 1. " TEMP_ALARM ,Temperature at which to clear the temperature alarm" bitfld.word 0x00 0. " THR_MODE ,Use hysteresis or direct threshold" "7-series hysteresis,Direct threshold" group.word 0x160++0x01 line.word 0x00 "ALARM_SUP3_UP,Upper VCCAUX Alarm Threshold Register" group.word 0x164++0x01 line.word 0x00 "ALARM_SUP4_UP,Upper VCC_PSINTLP Alarm Threshold Register" group.word 0x168++0x01 line.word 0x00 "ALARM_SUP5_UP,Upper VCC_PSINTFP Alarm Threshold Register" group.word 0x16C++0x01 line.word 0x00 "ALARM_SUP6_UP,Upper SUPPLY6 Alarm Threshold Register" group.word 0x170++0x01 line.word 0x00 "ALARM_SUP3_LO,Lower VCC_PSAUX Alarm Threshold Register" group.word 0x174++0x01 line.word 0x00 "ALARM_SUP4_LO,Lower VCC_PSINTLP Alarm Threshold Register" group.word 0x178++0x01 line.word 0x00 "ALARM_SUP5_LO,Lower VCC_PSINTFP Alarm Threshold Register" group.word 0x17C++0x01 line.word 0x00 "ALARM_SUP6_LO,Lower VCC_PSAUX Alarm Threshold Register" group.word 0x180++0x01 line.word 0x00 "ALARM_SUP7_UP,Upper VUSER1 Alarm Threshold Register" group.word 0x184++0x01 line.word 0x00 "ALARM_SUP8_UP,Upper VUSER2 Alarm Threshold Register" group.word 0x188++0x01 line.word 0x00 "ALARM_SUP9_UP,Upper VUSER3 Alarm Threshold Register" group.word 0x18C++0x01 line.word 0x00 "ALARM_SUP10_UP,Upper VUSER4 Alarm Threshold Register" group.word 0x190++0x01 line.word 0x00 "ALARM_VCCAMS_UP,Upper VCCAMS Alarm Threshold Register" group.word 0x1A0++0x01 line.word 0x00 "ALARM_SUP7_LO,Lower VUSER1 Alarm Threshold Register" group.word 0x1A4++0x01 line.word 0x00 "ALARM_SUP8_LO,Lower VUSER2 Alarm Threshold Register" group.word 0x1A8++0x01 line.word 0x00 "ALARM_SUP9_LO,Lower VUSER3 Alarm Threshold Register" group.word 0x1AC++0x01 line.word 0x00 "ALARM_SUP10_LO,Lower VUSER4 Alarm Threshold Register" group.word 0x1B0++0x01 line.word 0x00 "ALARM_VCCAMS_LO,Lower VCCAMS Alarm Threshold Register" group.word 0x1E0++0x01 line.word 0x00 "SEQ_INPUT_MODE2,Sequence Input Mode Register 2" group.word 0x1E4++0x01 line.word 0x00 "SEQ_ACQ2,Sequence Input Mode Register 2" group.word 0x1E8++0x01 line.word 0x00 "SEQ_LOW_RATE_CHANNEL0 ,Sequence Lowe Rate Channel 0 Register" group.word 0x1EC++0x01 line.word 0x00 "SEQ_LOW_RATE_CHANNEL1 ,Sequence Lowe Rate Channel 1 Register" group.word 0x1F0++0x01 line.word 0x00 "SEQ_LOW_RATE_CHANNEL2 ,Sequence Lowe Rate Channel 2 Register" group.word 0x200++0x01 line.word 0x00 "SUPPLY7,VUSER1 Supply Monitor Measurement Register" group.word 0x204++0x01 line.word 0x00 "SUPPLY8,VUSER2 Supply Monitor Measurement Register" group.word 0x208++0x01 line.word 0x00 "SUPPLY9,VUSER3 Supply Monitor Measurement Register" group.word 0x20C++0x01 line.word 0x00 "SUPPLY10,VUSER4 Supply Monitor Measurement Register" rgroup.word 0x210++0x01 line.word 0x00 "VCCAMS,VCCAMS Supply Monitor Measurement Register" rgroup.word 0x280++0x01 line.word 0x00 "MAX_SUPPLY7,Max VUSER1 Supply Monitor Measurement Register" rgroup.word 0x284++0x01 line.word 0x00 "MAX_SUPPLY8,Max VUSER2 Supply Monitor Measurement Register" rgroup.word 0x288++0x01 line.word 0x00 "MAX_SUPPLY9,Max VUSER3 Supply Monitor Measurement Register" rgroup.word 0x28C++0x01 line.word 0x00 "MAX_SUPPLY10,Max VUSER4 Supply Monitor Measurement Register" rgroup.word 0x290++0x01 line.word 0x00 "MAX_VCCAMS,Max VCCAMS Supply Monitor Measurement Register" rgroup.word 0x2A0++0x01 line.word 0x00 "MINSUPPLY7,Min VUSER1 Supply Monitor Measurement Register" rgroup.word 0x2A4++0x01 line.word 0x00 "MINSUPPLY8,Min VUSER2 Supply Monitor Measurement Register" rgroup.word 0x2A8++0x01 line.word 0x00 "MINSUPPLY9,Min VUSER3 Supply Monitor Measurement Register" rgroup.word 0x2AC++0x01 line.word 0x00 "MINSUPPLY10,Min VUSER4 Supply Monitor Measurement Register" rgroup.word 0x2B0++0x01 line.word 0x00 "MIN_VCCAMS,MIN VCCAMS Supply Monitor Measurement Register" width 0x0B tree.end tree "PS SYSMON" base ad:0xFFA50800 width 22. rgroup.word 0x00++0x01 line.word 0x00 "TEMPERATURE,Temperature Measurement Register" rgroup.word 0x04++0x01 line.word 0x00 "SUPPLY1,VCCINT Supply Monitor Measurement Register" rgroup.word 0x08++0x01 line.word 0x00 "SUPPLY2,VCC_PSINTFP Supply Monitor Measurement Register" rgroup.word 0x18++0x01 line.word 0x00 "SUPPLY3,VCC_PSAUX Supply Monitor Measurement Register" ; rgroup.long 0x20++0x01 ; line.word 0x00 "CAL_SUPPLY_OFFSET,Supply sensor offset register" ; rgroup.word 0x24++0x01 ; line.word 0x00 "CAL_ADC_BI_OFFSET,ADC bipolar sensor offset register" ; rgroup.word 0x28++0x01 ; line.word 0x00 "CAL_GAIN_ERROR,ADC gain error register" rgroup.word 0x34++0x01 line.word 0x00 "SUPPLY4,VCC_PSDDR_504 Supply Monitor Measurement Register" rgroup.word 0x38++0x01 line.word 0x00 "SUPPLY5,VCC_PSIO3_503 Supply Monitor Measurement Register" rgroup.word 0x3C++0x01 line.word 0x00 "SUPPLY6,VCC_PSIO0_500 Supply Monitor Measurement Register" rgroup.word 0x40++0x01 line.word 0x00 "VAUX00,VAUX0 Voltage Measurement ADC 0 Register" rgroup.word 0x44++0x01 line.word 0x00 "VAUX01,VAUX1 Voltage Measurement ADC 0 Register" rgroup.word 0x48++0x01 line.word 0x00 "VAUX02,VAUX2 Voltage Measurement ADC 0 Register" rgroup.word 0x4C++0x01 line.word 0x00 "VAUX03,VAUX3 Voltage Measurement ADC 0 Register" rgroup.word 0x50++0x01 line.word 0x00 "VAUX04,VAUX4 Voltage Measurement ADC 0 Register" rgroup.word 0x54++0x01 line.word 0x00 "VAUX05,VAUX5 Voltage Measurement ADC 0 Register" rgroup.word 0x58++0x01 line.word 0x00 "VAUX06,VAUX6 Voltage Measurement ADC 0 Register" rgroup.word 0x5C++0x01 line.word 0x00 "VAUX07,VAUX7 Voltage Measurement ADC 0 Register" rgroup.word 0x60++0x01 line.word 0x00 "VAUX08,VAUX8 Voltage Measurement ADC 0 Register" rgroup.word 0x64++0x01 line.word 0x00 "VAUX09,VAUX9 Voltage Measurement ADC 0 Register" rgroup.word 0x68++0x01 line.word 0x00 "VAUX0A,VAUXA Voltage Measurement ADC 0 Register" rgroup.word 0x6C++0x01 line.word 0x00 "VAUX0B,VAUXB Voltage Measurement ADC 0 Register" rgroup.word 0x70++0x01 line.word 0x00 "VAUX0C,VAUXC Voltage Measurement ADC 0 Register" rgroup.word 0x74++0x01 line.word 0x00 "VAUX0D,VAUXD Voltage Measurement ADC 0 Register" rgroup.word 0x78++0x01 line.word 0x00 "VAUX0E,VAUXE Voltage Measurement ADC 0 Register" rgroup.word 0x7C++0x01 line.word 0x00 "VAUX0F,VAUXF Voltage Measurement ADC 0 Register" rgroup.word 0x80++0x01 line.word 0x00 "MAX_TEMPERATURE,Max Temperature Measurement Register" rgroup.word 0x84++0x01 line.word 0x00 "MAX_SUPPLY1,Max VCC_PSINTLP Supply Monitor Measurement Register" rgroup.word 0x88++0x01 line.word 0x00 "MAX_SUPPLY2,Max VCC_PSINTFP Supply Monitor Measurement Register" rgroup.word 0x8C++0x01 line.word 0x00 "MAX_SUPPLY3,Max VCC_PSAUX Supply Monitor Measurement Register" rgroup.word 0x90++0x01 line.word 0x00 "MIN_TEMPERATURE,Min Temperature Measurement Register" rgroup.word 0x94++0x01 line.word 0x00 "MIN_SUPPLY1,Min VCC_PSINTLP Supply Monitor Measurement Register" rgroup.word 0x98++0x01 line.word 0x00 "MIN_SUPPLY2,Min VCC_PSINTFP Supply Monitor Measurement Register" rgroup.word 0x9C++0x01 line.word 0x00 "MIN_SUPPLY3,Min VCC_PSAUX Supply Monitor Measurement Register" rgroup.word 0xA0++0x01 line.word 0x00 "MAX_SUPPLY4,Max VCC_PSDDR_504 Supply Monitor Measurement Register" rgroup.word 0xA4++0x01 line.word 0x00 "MAX_SUPPLY5,Max VCC_PSIO3_503 Supply Monitor Measurement Register" rgroup.word 0xA8++0x01 line.word 0x00 "MAX_SUPPLY6,Max VCC_PSIO0_500 Supply Monitor Measurement Register" rgroup.word 0xB0++0x01 line.word 0x00 "MIN_SUPPLY4,Min VCC_PSDDR_504 Supply Monitor Measurement Register" rgroup.word 0xB4++0x01 line.word 0x00 "MIN_SUPPLY5,Min VCC_PSIO3_503 Supply Monitor Measurement Register" rgroup.word 0xB8++0x01 line.word 0x00 "MIN_SUPPLY6,Min VCC_PSIO0_500 Supply Monitor Measurement Register" rgroup.word 0xFC++0x01 line.word 0x00 "STATUS_FLAG,Status Flag Register" bitfld.word 0x00 15. " CLK_OSC_USED ,Clock-oscialltor is used" "Not used,Used" bitfld.word 0x00 14. " BLOCK_IN_RESET ,Block held in reset" "Not held,Held" bitfld.word 0x00 11. " JTAG_DISABLED ,JTAG access is disabled" "No,Yes" bitfld.word 0x00 10. " JTAG_READ_ONLY ,JTAG access can only ready status registers" "Disabled,Enabled" textline " " bitfld.word 0x00 9. " INTERNAL_REF ,Internal reference is being used" "Not used,Used" bitfld.word 0x00 8. " DISABLED ,Block is disabled" "No,Yes" bitfld.word 0x00 7. " ALM_6 ,Alarm 6" "No alarm,Alarm" bitfld.word 0x00 6. " ALM_5 ,Alarm 5" "No alarm,Alarm" textline " " bitfld.word 0x00 5. " ALM_4 ,Alarm 4" "No alarm,Alarm" bitfld.word 0x00 4. " ALM_3 ,Alarm 3" "No alarm,Alarm" bitfld.word 0x00 3. " OT ,Over temperature alarm" "No alarm,Alarm" bitfld.word 0x00 2. " ALM_2 ,Alarm 2" "No alarm,Alarm" textline " " bitfld.word 0x00 1. " ALM_1 ,Alarm 1" "No alarm,Alarm" bitfld.word 0x00 0. " ALM_0 ,Alarm 0" "No alarm,Alarm" textline " " group.word 0x100++0x01 line.word 0x00 "CONFIG_REG0,Config Register 0" bitfld.word 0x00 12.--13. " AVERAGING ,Averaging depth" "Disabled,16 samples,64 samples,256 samples" bitfld.word 0x00 11. " EXTERNAL_MUX ,Enable external multiplexer mode" "Disabled,Enabled" bitfld.word 0x00 10. " BU ,Bipolar input in single channel mode" "Low,High" bitfld.word 0x00 9. " EC ,Enable event sampling mode" "Disabled,Enabled" textline " " bitfld.word 0x00 8. " ACQ ,Enable longer acquisition time in single channel continuous sampling mode" "Disabled,Enabled" bitfld.word 0x00 0.--5. " MUX_CHANNEL ,Channel in single-channel mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.word 0x104++0x01 line.word 0x00 "CONFIG_REG1,Config Register 1" bitfld.word 0x00 12.--15. " SEQUENCE_MODE ,Sequencer mode ADC" "Default,Single pass,Sequence,Single channel,,,Olympus,?..." bitfld.word 0x00 11. " ALARM_DISABLE6 ,Alarm disable for alarm 6" "No,Yes" bitfld.word 0x00 10. " ALARM_DISABLE5 ,Alarm disable for alarm 5" "No,Yes" bitfld.word 0x00 9. " ALARM_DISABLE4 ,Alarm disable for alarm 4" "No,Yes" textline " " bitfld.word 0x00 8. " ALARM_DISABLE3 ,Alarm disable for alarm 3" "No,Yes" bitfld.word 0x00 3. " ALARM_DISABLE2 ,Alarm disable for alarm 2" "No,Yes" bitfld.word 0x00 2. " ALARM_DISABLE1 ,Alarm disable for alarm 1" "No,Yes" bitfld.word 0x00 1. " ALARM_DISABLE0 ,Alarm disable for alarm 0" "No,Yes" textline " " bitfld.word 0x00 0. " OVER_TEMP_DIS ,Over temperature alarm disable" "No,Yes" group.word 0x108++0x01 line.word 0x00 "CONFIG_REG2,Config Register 2" hexmask.word.byte 0x00 8.--15. 1. " CLOCK_DIVIDER ,ADC clock divide ratio relative to DCLK" bitfld.word 0x00 4.--7. " PWR_DOWN ,Power down selector" "Full power,SysOsc only,Sleep,?..." bitfld.word 0x00 2. " TEST_CH_EN ,Enable test channel" "Disabled,Enabled" bitfld.word 0x00 0.--1. " TEST_MODE ,Enable test mode" "0,1,2,3" group.word 0x10C++0x01 line.word 0x00 "CONFIG_REG3,Config Register 3" bitfld.word 0x00 5. " ALARM_DISABLE13 ,Alarm disable for alarm 13" "No,Yes" bitfld.word 0x00 4. " ALARM_DISABLE12 ,Alarm disable for alarm 12" "No,Yes" bitfld.word 0x00 3. " ALARM_DISABLE11 ,Alarm disable for alarm 11" "No,Yes" textline " " bitfld.word 0x00 2. " ALARM_DISABLE10 ,Alarm disable for alarm 10" "No,Yes" bitfld.word 0x00 1. " ALARM_DISABLE9 ,Alarm disable for alarm 9" "No,Yes" bitfld.word 0x00 0. " ALARM_DISABLE8 ,Alarm disable for alarm 8" "No,Yes" if (((d.w(ad:0xFFA50800+0x104))&0xF000)==0x2000) group.word 0x110++0x01 line.word 0x00 "CONFIG_REG4,Config Register 4" bitfld.word 0x00 10.--11. " LOW_RATE_EOS ,EOS generation takes the low-rate sequencer into account" "0,1,2,3" bitfld.word 0x00 8.--9. " SEQUENCE_RATE ,Time until monitoring of next channel on the secondary sequencer" "Every sequence,Every 4th Sequence,Every 16th Sequence,Every 64th Sequence" else group.word 0x110++0x01 line.word 0x00 "CONFIG_REG4,Config Register 4" bitfld.word 0x00 10.--11. " LOW_RATE_EOS ,EOS generation takes the low-rate sequencer into account" "0,1,2,3" endif textline " " group.word 0x118++0x01 line.word 0x00 "SEQ_CHANNEL2,Sequence Channel Register 2" bitfld.word 0x00 5. " TEMPERATURE_REMOTE ,TEMPERATURE_REMOTE sequence" "0,1" bitfld.word 0x00 4. " VCCAMS ,VCCAMS sequence" "0,1" bitfld.word 0x00 3. " SUPPLY10 ,SUPPLY10 sequence" "0,1" textline " " bitfld.word 0x00 2. " SUPPLY9 ,SUPPLY9 sequence" "0,1" bitfld.word 0x00 1. " SUPPLY8 ,SUPPLY8 sequence" "0,1" bitfld.word 0x00 0. " SUPPLY7 ,SUPPLY7 sequence" "0,1" group.word 0x11C++0x01 line.word 0x00 "SEQ_AVERAGE2,Sequence Average Register 2" group.word 0x120++0x01 line.word 0x00 "SEQ_CHANNEL0,Sequence Channel Register 0" bitfld.word 0x00 15. " CURRENT_MON ,CURRENT_MON sequence" "0,1" bitfld.word 0x00 14. " SUPPLY3 ,SUPPLY3 sequence" "0,1" bitfld.word 0x00 13. " VREFN ,VREFN sequence" "0,1" bitfld.word 0x00 12. " VREFP ,VREFP sequence" "0,1" textline " " bitfld.word 0x00 11. " VP_VN ,VP_VN sequence" "0,1" bitfld.word 0x00 10. " SUPPLY2 ,SUPPLY2 sequence" "0,1" bitfld.word 0x00 9. " SUPPLY1 ,SUPPLY1 sequence" "0,1" bitfld.word 0x00 8. " TEMP ,TEMPERATURE sequence" "0,1" textline " " bitfld.word 0x00 7. " SUPPLY6 ,SUPPLY6 sequence" "0,1" bitfld.word 0x00 6. " SUPPLY5 ,SUPPLY5 sequence" "0,1" bitfld.word 0x00 5. " SUPPLY4 ,SUPPLY4 sequence" "0,1" bitfld.word 0x00 3. " TEST_CH ,TEST_CHANNEL sequence" "0,1" textline " " bitfld.word 0x00 0. " CALIBRATION ,CALIBRATION sequence" "0,1" group.word 0x124++0x01 line.word 0x00 "SEQ_CHANNEL1,Sequence Channel Register 1" bitfld.word 0x00 15. " VAUX0F ,Enable the VAUX0F channel" "Disabled,Enabled" bitfld.word 0x00 14. " VAUX0E ,Enable the VAUX0E channel" "Disabled,Enabled" bitfld.word 0x00 13. " VAUX0D ,Enable the VAUX0D channel" "Disabled,Enabled" bitfld.word 0x00 12. " VAUX0C ,Enable the VAUX0C channel" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " VAUX0B ,Enable the VAUX0B channel" "Disabled,Enabled" bitfld.word 0x00 10. " VAUX0A ,Enable the VAUX0A channel" "Disabled,Enabled" bitfld.word 0x00 9. " VAUX09 ,Enable the VAUX09 channel" "Disabled,Enabled" bitfld.word 0x00 8. " VAUX08 ,Enable the VAUX08 channel" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " VAUX07 ,Enable the VAUX07 channel" "Disabled,Enabled" bitfld.word 0x00 6. " VAUX06 ,Enable the VAUX06 channel" "Disabled,Enabled" bitfld.word 0x00 5. " VAUX05 ,Enable the VAUX05 channel" "Disabled,Enabled" bitfld.word 0x00 4. " VAUX04 ,Enable the VAUX04 channel" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " VAUX03 ,Enable the VAUX03 channel" "Disabled,Enabled" bitfld.word 0x00 2. " VAUX02 ,Enable the VAUX02 channel" "Disabled,Enabled" bitfld.word 0x00 1. " VAUX01 ,Enable the VAUX01 channel" "Disabled,Enabled" bitfld.word 0x00 0. " VAUX00 ,Enable the VAUX00 channel" "Disabled,Enabled" group.word 0x128++0x01 line.word 0x00 "SEQ_AVERAGE0,Sequence Average Register 0" group.word 0x12C++0x01 line.word 0x00 "SEQ_AVERAGE1,Sequence Average Register 1" group.word 0x130++0x01 line.word 0x00 "SEQ_INPUT_MODE0,Sequence Input Mode Register 0" group.word 0x134++0x01 line.word 0x00 "SEQ_INPUT_MODE1,Sequence Input Mode Register 1" group.word 0x138++0x01 line.word 0x00 "SEQ_ACQ0,Sequence Acquisiton Length Register 0" group.word 0x13C++0x01 line.word 0x00 "SEQ_ACQ1,Sequence Acquisiton Length Register 1" group.word 0x140++0x01 line.word 0x00 "ALARM_TEMP_UP,Upper Temperature Alarm Threshold Register" group.word 0x144++0x01 line.word 0x00 "ALARM_SUP1_UP,Upper VCCINT Alarm Threshold Register" group.word 0x148++0x01 line.word 0x00 "ALARM_SUP2_UP,Upper VCCBRAM Alarm Threshold Register" group.word 0x14C++0x01 line.word 0x00 "ALARM_OT_UP,Upper over-temperature Alarm Threshold Register" group.word 0x150++0x01 line.word 0x00 "ALARM_TEMP_LO,Lower Temperature Alarm Threshold Register" hexmask.word 0x00 1.--15. 1. " TEMP_ALARM ,Temperature at which to clear the temperature alarm" bitfld.word 0x00 0. " THR_MODE ,Use hysteresis or direct threshold" "7-series hysteresis,Direct threshold" group.word 0x154++0x01 line.word 0x00 "ALARM_SUP1_LO,Lower VCCINT Alarm Threshold Register" group.word 0x158++0x01 line.word 0x00 "ALARM_SUP2_LO,Lower VCCBRAM Alarm Threshold Register" group.word 0x15C++0x01 line.word 0x00 "ALARM_OT_LO,Lower Over-temperature Alarm Threshold Register" hexmask.word 0x00 1.--15. 1. " TEMP_ALARM ,Temperature at which to clear the temperature alarm" bitfld.word 0x00 0. " THR_MODE ,Use hysteresis or direct threshold" "7-series hysteresis,Direct threshold" group.word 0x160++0x01 line.word 0x00 "ALARM_SUP3_UP,Upper VCC_PSAUX Alarm Threshold Register" group.word 0x164++0x01 line.word 0x00 "ALARM_SUP4_UP,Upper VCC_PSDDR_504 Alarm Threshold Register" group.word 0x168++0x01 line.word 0x00 "ALARM_SUP5_UP,Upper VCC_PSIO3_503 Alarm Threshold Register" group.word 0x16C++0x01 line.word 0x00 "ALARM_SUP6_UP,Upper VCC_PSIO0_500 Alarm Threshold Register" group.word 0x170++0x01 line.word 0x00 "ALARM_SUP3_LO,Lower VCC_PSAUX Alarm Threshold Register" group.word 0x174++0x01 line.word 0x00 "ALARM_SUP4_LO,Lower VCC_PSDDR_504 Alarm Threshold Register" group.word 0x178++0x01 line.word 0x00 "ALARM_SUP5_LO,Lower VCC_PSIO3_503 Alarm Threshold Register" group.word 0x17C++0x01 line.word 0x00 "ALARM_SUP6_LO,Lower VCC_PSIO0_500 Alarm Threshold Register" group.word 0x180++0x01 line.word 0x00 "ALARM_SUP7_UP,Upper VCC_PSIO1_501 Alarm Threshold Register" group.word 0x184++0x01 line.word 0x00 "ALARM_SUP8_UP,Upper VCC_PSIO2_502 Alarm Threshold Register" group.word 0x188++0x01 line.word 0x00 "ALARM_SUP9_UP,Upper PS_MGTRAVCC Alarm Threshold Register" group.word 0x18C++0x01 line.word 0x00 "ALARM_SUP10_UP,Upper PS_MGTRAVTT Alarm Threshold Register" group.word 0x190++0x01 line.word 0x00 "ALARM_VCCAMS_UP,Upper VCCAMS Alarm Threshold Register" group.word 0x194++0x01 line.word 0x00 "ALARM_TREMOTE_UP,Upper Remote TSENS Alarm Threshold Register" group.word 0x1A0++0x01 line.word 0x00 "ALARM_SUP7_LO,Lower VCC_PSIO1_501 Alarm Threshold Register" group.word 0x1A4++0x01 line.word 0x00 "ALARM_SUP8_LO,Lower VCC_PSIO2_502 Alarm Threshold Register" group.word 0x1A8++0x01 line.word 0x00 "ALARM_SUP9_LO,Lower PS_MGTRAVCC Alarm Threshold Register" group.word 0x1AC++0x01 line.word 0x00 "ALARM_SUP10_LO,Lower PS_MGTRAVTT Alarm Threshold Register" group.word 0x1B0++0x01 line.word 0x00 "ALARM_VCCAMS_LO,Lower VCCAMS Alarm Threshold Register" group.word 0x1B4++0x01 line.word 0x00 "ALARM_TREMOTE_LO,Lower Remote TSENS Alarm Threshold Register" hexmask.word 0x00 1.--15. 1. " TEMP_ALARM ,Temperature at which to clear the temperature alarm" bitfld.word 0x00 0. " THR_MODE ,Use hysteresis or direct threshold" "7-series hysteresis,Direct threshold" group.word 0x1E0++0x01 line.word 0x00 "SEQ_INPUT_MODE2,Sequence Input Mode Register 2" group.word 0x1E4++0x01 line.word 0x00 "SEQ_ACQ2,Sequence Input Mode Register 2" group.word 0x1E8++0x01 line.word 0x00 "SEQ_LOW_RATE_CHANNEL0 ,Sequence Lowe Rate Channel 0 Register" group.word 0x1F0++0x01 line.word 0x00 "SEQ_LOW_RATE_CHANNEL2 ,Sequence Lowe Rate Channel 2 Register" group.word 0x200++0x01 line.word 0x00 "SUPPLY7,VCC_PSIO1_501 Supply Monitor Measurement Register" group.word 0x204++0x01 line.word 0x00 "SUPPLY8,VCC_PSIO2_502 Supply Monitor Measurement Register" group.word 0x208++0x01 line.word 0x00 "SUPPLY9,PS_MGTRAVCC Supply Monitor Measurement Register" group.word 0x20C++0x01 line.word 0x00 "SUPPLY10,PS_MGTRAVTT Supply Monitor Measurement Register" rgroup.word 0x210++0x01 line.word 0x00 "VCCAMS,VCCAMS Supply Monitor Measurement Register" rgroup.word 0x214++0x01 line.word 0x00 "TEMP_REMOTE,Remote Temp Sensor Measurement Register" rgroup.word 0x280++0x01 line.word 0x00 "MAX_SUPPLY7,Max VCC_PSIO1_501 Supply Monitor Measurement Register" rgroup.word 0x284++0x01 line.word 0x00 "MAX_SUPPLY8,Max VCC_PSIO2_502 Supply Monitor Measurement Register" rgroup.word 0x288++0x01 line.word 0x00 "MAX_SUPPLY9,Max PS_MGTRAVCC Supply Monitor Measurement Register" rgroup.word 0x28C++0x01 line.word 0x00 "MAX_SUPPLY10,Max PS_MGTRAVTT Supply Monitor Measurement Register" rgroup.word 0x290++0x01 line.word 0x00 "MAX_VCCAMS,Max VCCAMS Supply Monitor Measurement Register" rgroup.word 0x294++0x01 line.word 0x00 "MAX_TEMP_REM,Max Remote Temperature Measurement Register" rgroup.word 0x2A0++0x01 line.word 0x00 "MINSUPPLY7,Min VCC_PSIO1_501 Supply Monitor Measurement Register" rgroup.word 0x2A4++0x01 line.word 0x00 "MINSUPPLY8,Min VCC_PSIO2_502 Supply Monitor Measurement Register" rgroup.word 0x2A8++0x01 line.word 0x00 "MINSUPPLY9,Min PS_MGTRAVCC Supply Monitor Measurement Register" rgroup.word 0x2AC++0x01 line.word 0x00 "MINSUPPLY10,Min PS_MGTRAVTT Supply Monitor Measurement Register" rgroup.word 0x2B0++0x01 line.word 0x00 "MIN_VCCAMS,MIN VCCAMS Supply Monitor Measurement Register" rgroup.word 0x2B4++0x01 line.word 0x00 "MIN_TEMP_REM,Min Remote Temperature Measurement Register" width 0x0B tree.end tree.end tree "APM (AXI Performance Monitor)" tree "APM_CCI_INTC" base ad:0xFD490000 width 9. rgroup.long 0x00++0x07 line.long 0x00 "GCCR_H,Global Clock Counter High Register" line.long 0x04 "GCCR_L,Global Clock Counter Low Register" group.long 0x24++0x07 line.long 0x00 "SIR,Sample Interval Time Configuration Register" line.long 0x04 "SICR,Sample Interval Control Register" bitfld.long 0x04 8. " MET_CNT_RST ,Reset metric counter" "No reset,Reset" bitfld.long 0x04 1. " LOAD ,Loads the sample interval register value into the sample interval counter" "Not loaded,Loaded" bitfld.long 0x04 0. " ENABLE ,Enable the down counter" "Disabled,Enabled" hgroup.long 0x2C++0x03 hide.long 0x00 "SISR,Sample Interval Sample Register" in group.long 0x30++0x03 line.long 0x00 "GIER,Global Interrupt Enable Register" bitfld.long 0x00 0. " GIE ,Master enable for the device interrupt output to the system interrupt controller" "Disabled,Enabled" group.long 0x34++0x07 line.long 0x00 "IER,Interrupt Enable Register" bitfld.long 0x00 12. " MET_CT9_OV_EN ,Metric counter 9 overflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 11. " MET_CT8_OV_EN ,Metric counter 8 overflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 10. " MET_CT7_OV_EN ,Metric counter 7 overflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 9. " MET_CT6_OV_EN ,Metric counter 6 overflow interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " MET_CT5_OV_EN ,Metric counter 5 overflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 7. " MET_CT4_OV_EN ,Metric counter 4 overflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 6. " MET_CT3_OV_EN ,Metric counter 3 overflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 5. " MET_CT2_OV_EN ,Metric counter 2 overflow interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " MET_CT1_OV_EN ,Metric counter 1 overflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 3. " MET_CT0_OV_EN ,Metric counter 0 overflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 2. " EV_LOG_FIFO_EN ,Event log FIFO overflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " SMPL_INTRVL_OV_EN ,Sample interval counter overflow interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " GLBCLKCNT_OV_EN ,Global clock counter overflow interrupt enable" "Disabled,Enabled" line.long 0x04 "ISR,Interrupt Status Register" bitfld.long 0x04 12. " MET_CT9_OV ,Metric counter 9 overflow interrupt active" "Not active,Active" bitfld.long 0x04 11. " MET_CT8_OV ,Metric counter 8 overflow interrupt active" "Not active,Active" bitfld.long 0x04 10. " MET_CT7_OV ,Metric counter 7 overflow interrupt active" "Not active,Active" bitfld.long 0x04 9. " MET_CT6_OV ,Metric counter 6 overflow interrupt active" "Not active,Active" textline " " bitfld.long 0x04 8. " MET_CT5_OV ,Metric counter 5 overflow interrupt active" "Not active,Active" bitfld.long 0x04 7. " MET_CT4_OV ,Metric counter 4 overflow interrupt active" "Not active,Active" bitfld.long 0x04 6. " MET_CT3_OV ,Metric counter 3 overflow interrupt active" "Not active,Active" bitfld.long 0x04 5. " MET_CT2_OV ,Metric counter 2 overflow interrupt active" "Not active,Active" textline " " bitfld.long 0x04 4. " MET_CT1_OV ,Metric counter 1 overflow interrupt active" "Not active,Active" bitfld.long 0x04 3. " MET_CT0_OV ,Metric counter 0 overflow interrupt active" "Not active,Active" bitfld.long 0x04 2. " EV_LOG_FIFO ,Event log FIFO overflow interrupt active" "Not active,Active" bitfld.long 0x04 1. " SMPL_INTRVL_OV ,Sample interval counter overflow interrupt active" "Not active,Active" textline " " bitfld.long 0x04 0. " GLBCLKCNT_OV ,Global clock counter overflow interrupt active" "Not active,Active" group.long 0x44++0x0B line.long 0x00 "MSR_0,Metric Selector Register 0" bitfld.long 0x00 29.--31. " MET_CT3_SLOT ,Selects the slot for the metric computed by counter 3" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " MET_CT3_SEL ,Selects the kind of metrics computed by counter 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 21.--23. " MET_CT2_SLOT ,Selects the slot for the metric computed by counter 2" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16.--20. " MET_CT2_SEL ,Selects the kind of metrics computed by counter 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 13.--15. " MET_CT1_SLOT ,Selects the slot for the metric computed by counter 1" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8.--12. " MET_CT1_SEL ,Selects the kind of metrics computed by counter 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 5.--7. " MET_CT0_SLOT ,Selects the slot for the metric computed by counter 0" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--4. " MET_CT0_SEL ,Selects the kind of metrics computed by counter 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x04 "MSR_1,Metric Selector Register 1" bitfld.long 0x04 29.--31. " MET_CT7_SLOT ,Selects the slot for the metric computed by counter 7" "0,1,2,3,4,5,6,7" bitfld.long 0x04 24.--28. " MET_CT7_SEL ,Selects the kind of metrics computed by counter 7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 21.--23. " MET_CT6_SLOT ,Selects the slot for the metric computed by counter 6" "0,1,2,3,4,5,6,7" bitfld.long 0x04 16.--20. " MET_CT6_SEL ,Selects the kind of metrics computed by counter 6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x04 13.--15. " MET_CT5_SLOT ,Selects the slot for the metric computed by counter 5" "0,1,2,3,4,5,6,7" bitfld.long 0x04 8.--12. " MET_CT5_SEL ,Selects the kind of metrics computed by counter 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 5.--7. " MET_CT4_SLOT ,Selects the slot for the metric computed by counter 4" "0,1,2,3,4,5,6,7" bitfld.long 0x04 0.--4. " MET_CT4_SEL ,Selects the kind of metrics computed by counter 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x08 "MSR_2,Metric Selector Register 2" bitfld.long 0x08 13.--15. " MET_CT9_SLOT ,Selects the slot for the metric computed by counter 9" "0,1,2,3,4,5,6,7" bitfld.long 0x08 8.--12. " MET_CT9_SEL ,Selects the kind of metrics computed by counter 9" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x08 5.--7. " MET_CT8_SLOT ,Selects the slot for the metric computed by counter 8" "0,1,2,3,4,5,6,7" bitfld.long 0x08 0.--4. " MET_CT8_SEL ,Selects the kind of metrics computed by counter 8" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x100++0x07 line.long 0x00 "MCR_0,Metric counter register 0" line.long 0x04 "IR_0,Incrementer Register 0" group.long (0x100+0x8)++0x07 line.long 0x00 "RR_0,Range Register 0" hexmask.long.word 0x00 16.--31. 1. " RANGE_HI ,Higher limit of a range" hexmask.long.word 0x00 0.--15. 1. " RANGE_LO ,Lower limit of a range" line.long 0x04 "MCLER_0,Metric Count Log Enable Register 0" rgroup.long (0x100+0x100)++0x07 line.long 0x00 "SMCR_0,Sampled Metric Counter Register 0" line.long 0x04 "SIR_0,Sampled Incrementer Register 0" rgroup.long 0x110++0x07 line.long 0x00 "MCR_1,Metric counter register 1" line.long 0x04 "IR_1,Incrementer Register 1" group.long (0x110+0x8)++0x07 line.long 0x00 "RR_1,Range Register 1" hexmask.long.word 0x00 16.--31. 1. " RANGE_HI ,Higher limit of a range" hexmask.long.word 0x00 0.--15. 1. " RANGE_LO ,Lower limit of a range" line.long 0x04 "MCLER_1,Metric Count Log Enable Register 1" rgroup.long (0x110+0x100)++0x07 line.long 0x00 "SMCR_1,Sampled Metric Counter Register 1" line.long 0x04 "SIR_1,Sampled Incrementer Register 1" rgroup.long 0x120++0x07 line.long 0x00 "MCR_2,Metric counter register 2" line.long 0x04 "IR_2,Incrementer Register 2" group.long (0x120+0x8)++0x07 line.long 0x00 "RR_2,Range Register 2" hexmask.long.word 0x00 16.--31. 1. " RANGE_HI ,Higher limit of a range" hexmask.long.word 0x00 0.--15. 1. " RANGE_LO ,Lower limit of a range" line.long 0x04 "MCLER_2,Metric Count Log Enable Register 2" rgroup.long (0x120+0x100)++0x07 line.long 0x00 "SMCR_2,Sampled Metric Counter Register 2" line.long 0x04 "SIR_2,Sampled Incrementer Register 2" rgroup.long 0x130++0x07 line.long 0x00 "MCR_3,Metric counter register 3" line.long 0x04 "IR_3,Incrementer Register 3" group.long (0x130+0x8)++0x07 line.long 0x00 "RR_3,Range Register 3" hexmask.long.word 0x00 16.--31. 1. " RANGE_HI ,Higher limit of a range" hexmask.long.word 0x00 0.--15. 1. " RANGE_LO ,Lower limit of a range" line.long 0x04 "MCLER_3,Metric Count Log Enable Register 3" rgroup.long (0x130+0x100)++0x07 line.long 0x00 "SMCR_3,Sampled Metric Counter Register 3" line.long 0x04 "SIR_3,Sampled Incrementer Register 3" rgroup.long 0x140++0x07 line.long 0x00 "MCR_4,Metric counter register 4" line.long 0x04 "IR_4,Incrementer Register 4" group.long (0x140+0x8)++0x07 line.long 0x00 "RR_4,Range Register 4" hexmask.long.word 0x00 16.--31. 1. " RANGE_HI ,Higher limit of a range" hexmask.long.word 0x00 0.--15. 1. " RANGE_LO ,Lower limit of a range" line.long 0x04 "MCLER_4,Metric Count Log Enable Register 4" rgroup.long (0x140+0x100)++0x07 line.long 0x00 "SMCR_4,Sampled Metric Counter Register 4" line.long 0x04 "SIR_4,Sampled Incrementer Register 4" rgroup.long 0x150++0x07 line.long 0x00 "MCR_5,Metric counter register 5" line.long 0x04 "IR_5,Incrementer Register 5" group.long (0x150+0x8)++0x07 line.long 0x00 "RR_5,Range Register 5" hexmask.long.word 0x00 16.--31. 1. " RANGE_HI ,Higher limit of a range" hexmask.long.word 0x00 0.--15. 1. " RANGE_LO ,Lower limit of a range" line.long 0x04 "MCLER_5,Metric Count Log Enable Register 5" rgroup.long (0x150+0x100)++0x07 line.long 0x00 "SMCR_5,Sampled Metric Counter Register 5" line.long 0x04 "SIR_5,Sampled Incrementer Register 5" rgroup.long 0x160++0x07 line.long 0x00 "MCR_6,Metric counter register 6" line.long 0x04 "IR_6,Incrementer Register 6" group.long (0x160+0x8)++0x07 line.long 0x00 "RR_6,Range Register 6" hexmask.long.word 0x00 16.--31. 1. " RANGE_HI ,Higher limit of a range" hexmask.long.word 0x00 0.--15. 1. " RANGE_LO ,Lower limit of a range" line.long 0x04 "MCLER_6,Metric Count Log Enable Register 6" rgroup.long (0x160+0x100)++0x07 line.long 0x00 "SMCR_6,Sampled Metric Counter Register 6" line.long 0x04 "SIR_6,Sampled Incrementer Register 6" rgroup.long 0x170++0x07 line.long 0x00 "MCR_7,Metric counter register 7" line.long 0x04 "IR_7,Incrementer Register 7" group.long (0x170+0x8)++0x07 line.long 0x00 "RR_7,Range Register 7" hexmask.long.word 0x00 16.--31. 1. " RANGE_HI ,Higher limit of a range" hexmask.long.word 0x00 0.--15. 1. " RANGE_LO ,Lower limit of a range" line.long 0x04 "MCLER_7,Metric Count Log Enable Register 7" rgroup.long (0x170+0x100)++0x07 line.long 0x00 "SMCR_7,Sampled Metric Counter Register 7" line.long 0x04 "SIR_7,Sampled Incrementer Register 7" group.long 0x300++0x13 line.long 0x00 "CR,Control Register" bitfld.long 0x00 25. " STR_FIFO_RST ,Reset the streaming FIFO" "No reset,Reset" bitfld.long 0x00 17. " GCCR_RST ,Reset the free-running global clock counter" "No reset,Reset" textline " " bitfld.long 0x00 16. " GCCR_EN ,Enable the free-running global clock counter" "Disabled,Enabled" bitfld.long 0x00 9. " EVNT_LOG_EXT_TRIG ,Use the external trigger to start the event log" "Not used,Used" textline " " bitfld.long 0x00 8. " EVNT_LOG_EN ,Enable event logging" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " LAT_RD_END ,Read latency end point" "Last read,First read" bitfld.long 0x00 6. " LAT_RD_START ,Read latency start point" "Address issuance by the master interface,Address acceptance by slave" textline " " bitfld.long 0x00 5. " LAT_WR_END ,Write latency end point" "Last write,First write" bitfld.long 0x00 4. " LAT_WR_START ,Write latency start point" "Address issuance by the master interface,Address acceptance by slave" textline " " bitfld.long 0x00 3. " ID_MASKING_EN ,Enable ID based filtering/masking" "Disabled,Enabled" bitfld.long 0x00 2. " MET_EXT_TRIG ,Use the external trigger to start the metric counters" "Not used,Used" textline " " bitfld.long 0x00 1. " MET_CNT_RST ,Resets all metric counters and sampled metric counters in the monitor" "No reset,Reset" bitfld.long 0x00 0. " MET_CNT_EN ,Enables all metric counters in the monitor" "Disabled,Enabled" line.long 0x04 "WIDR,Write ID Filtering Register" line.long 0x08 "WIDMR,Write ID Masking Register" line.long 0x0C "RIDR,Read ID Filtering Register" line.long 0x10 "RIDMR,Read ID Masking Register" group.long 0x400++0x07 line.long 0x00 "FECR,Flag Enable Register" bitfld.long 0x00 31. " MET_CT9_OV_EN ,Enable metric counter 9 flag" "Disabled,Enabled" bitfld.long 0x00 30. " MET_CT8_OV_EN ,Enable metric counter 8 flag" "Disabled,Enabled" bitfld.long 0x00 29. " MET_CT7_OV_EN ,Enable metric counter 7 flag" "Disabled,Enabled" bitfld.long 0x00 28. " MET_CT6_OV_EN ,Enable metric counter 6 flag" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " MET_CT5_OV_EN ,Enable metric counter 5 flag" "Disabled,Enabled" bitfld.long 0x00 26. " MET_CT4_OV_EN ,Enable metric counter 4 flag" "Disabled,Enabled" bitfld.long 0x00 25. " MET_CT3_OV_EN ,Enable metric counter 3 flag" "Disabled,Enabled" bitfld.long 0x00 24. " MET_CT2_OV_EN ,Enable metric counter 2 flag" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " MET_CT1_OV_EN ,Enable metric counter 1 flag" "Disabled,Enabled" bitfld.long 0x00 22. " MET_CT0_OV_EN ,Enable metric counter 0 flag" "Disabled,Enabled" bitfld.long 0x00 21. " SMP_CNT_LAPSE_FLG ,Enable sample counter lapse flag" "Disabled,Enabled" bitfld.long 0x00 20. " GCC_OFVL_FLG ,Enable global clock count overflow flag" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " EXT_EVNT_STRT_FLG ,Enable external event start flag" "Disabled,Enabled" bitfld.long 0x00 18. " EXT_EVNT_STOP_FLG ,Enable external event stop flag" "Disabled,Enabled" bitfld.long 0x00 17. " EXT_EVNT_FLG_EN ,Enable external event flag" "Disabled,Enabled" bitfld.long 0x00 16. " SFT_DATA_FLG_EN ,Enable software-written data flag" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " LAST_READ_FLG ,Enable last read flag" "Disabled,Enabled" bitfld.long 0x00 5. " FIRST_READ_FLG ,Enable first read flag" "Disabled,Enabled" bitfld.long 0x00 4. " READ_ADDR_FLG ,Enable read addr flag" "Disabled,Enabled" bitfld.long 0x00 3. " RESPONSE_FLG ,Enable responese flag" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " LAST_WRITE_FLG ,Enable last write flag" "Disabled,Enabled" bitfld.long 0x00 1. " FIRST_WRITE_FLG ,Enable first write flag" "Disabled,Enabled" bitfld.long 0x00 0. " WRITE_ADDR_FLG ,Enable write addr flag" "Disabled,Enabled" line.long 0x04 "SWDR,Software-written Data Register" width 0xB tree.end tree "APM_INTC_OCM" base ad:0xFFA00000 width 9. rgroup.long 0x00++0x07 line.long 0x00 "GCCR_H,Global Clock Counter High Register" line.long 0x04 "GCCR_L,Global Clock Counter Low Register" group.long 0x24++0x07 line.long 0x00 "SIR,Sample Interval Time Configuration Register" line.long 0x04 "SICR,Sample Interval Control Register" bitfld.long 0x04 8. " MET_CNT_RST ,Reset metric counter" "No reset,Reset" bitfld.long 0x04 1. " LOAD ,Loads the sample interval register value into the sample interval counter" "Not loaded,Loaded" bitfld.long 0x04 0. " ENABLE ,Enable the down counter" "Disabled,Enabled" hgroup.long 0x2C++0x03 hide.long 0x00 "SISR,Sample Interval Sample Register" in group.long 0x30++0x03 line.long 0x00 "GIER,Global Interrupt Enable Register" bitfld.long 0x00 0. " GIE ,Master enable for the device interrupt output to the system interrupt controller" "Disabled,Enabled" group.long 0x34++0x07 line.long 0x00 "IER,Interrupt Enable Register" bitfld.long 0x00 12. " MET_CT9_OV_EN ,Metric counter 9 overflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 11. " MET_CT8_OV_EN ,Metric counter 8 overflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 10. " MET_CT7_OV_EN ,Metric counter 7 overflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 9. " MET_CT6_OV_EN ,Metric counter 6 overflow interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " MET_CT5_OV_EN ,Metric counter 5 overflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 7. " MET_CT4_OV_EN ,Metric counter 4 overflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 6. " MET_CT3_OV_EN ,Metric counter 3 overflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 5. " MET_CT2_OV_EN ,Metric counter 2 overflow interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " MET_CT1_OV_EN ,Metric counter 1 overflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 3. " MET_CT0_OV_EN ,Metric counter 0 overflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 2. " EV_LOG_FIFO_EN ,Event log FIFO overflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " SMPL_INTRVL_OV_EN ,Sample interval counter overflow interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " GLBCLKCNT_OV_EN ,Global clock counter overflow interrupt enable" "Disabled,Enabled" line.long 0x04 "ISR,Interrupt Status Register" bitfld.long 0x04 12. " MET_CT9_OV ,Metric counter 9 overflow interrupt active" "Not active,Active" bitfld.long 0x04 11. " MET_CT8_OV ,Metric counter 8 overflow interrupt active" "Not active,Active" bitfld.long 0x04 10. " MET_CT7_OV ,Metric counter 7 overflow interrupt active" "Not active,Active" bitfld.long 0x04 9. " MET_CT6_OV ,Metric counter 6 overflow interrupt active" "Not active,Active" textline " " bitfld.long 0x04 8. " MET_CT5_OV ,Metric counter 5 overflow interrupt active" "Not active,Active" bitfld.long 0x04 7. " MET_CT4_OV ,Metric counter 4 overflow interrupt active" "Not active,Active" bitfld.long 0x04 6. " MET_CT3_OV ,Metric counter 3 overflow interrupt active" "Not active,Active" bitfld.long 0x04 5. " MET_CT2_OV ,Metric counter 2 overflow interrupt active" "Not active,Active" textline " " bitfld.long 0x04 4. " MET_CT1_OV ,Metric counter 1 overflow interrupt active" "Not active,Active" bitfld.long 0x04 3. " MET_CT0_OV ,Metric counter 0 overflow interrupt active" "Not active,Active" bitfld.long 0x04 2. " EV_LOG_FIFO ,Event log FIFO overflow interrupt active" "Not active,Active" bitfld.long 0x04 1. " SMPL_INTRVL_OV ,Sample interval counter overflow interrupt active" "Not active,Active" textline " " bitfld.long 0x04 0. " GLBCLKCNT_OV ,Global clock counter overflow interrupt active" "Not active,Active" group.long 0x44++0x0B line.long 0x00 "MSR_0,Metric Selector Register 0" bitfld.long 0x00 29.--31. " MET_CT3_SLOT ,Selects the slot for the metric computed by counter 3" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " MET_CT3_SEL ,Selects the kind of metrics computed by counter 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 21.--23. " MET_CT2_SLOT ,Selects the slot for the metric computed by counter 2" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16.--20. " MET_CT2_SEL ,Selects the kind of metrics computed by counter 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 13.--15. " MET_CT1_SLOT ,Selects the slot for the metric computed by counter 1" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8.--12. " MET_CT1_SEL ,Selects the kind of metrics computed by counter 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 5.--7. " MET_CT0_SLOT ,Selects the slot for the metric computed by counter 0" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--4. " MET_CT0_SEL ,Selects the kind of metrics computed by counter 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x04 "MSR_1,Metric Selector Register 1" bitfld.long 0x04 29.--31. " MET_CT7_SLOT ,Selects the slot for the metric computed by counter 7" "0,1,2,3,4,5,6,7" bitfld.long 0x04 24.--28. " MET_CT7_SEL ,Selects the kind of metrics computed by counter 7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 21.--23. " MET_CT6_SLOT ,Selects the slot for the metric computed by counter 6" "0,1,2,3,4,5,6,7" bitfld.long 0x04 16.--20. " MET_CT6_SEL ,Selects the kind of metrics computed by counter 6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x04 13.--15. " MET_CT5_SLOT ,Selects the slot for the metric computed by counter 5" "0,1,2,3,4,5,6,7" bitfld.long 0x04 8.--12. " MET_CT5_SEL ,Selects the kind of metrics computed by counter 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 5.--7. " MET_CT4_SLOT ,Selects the slot for the metric computed by counter 4" "0,1,2,3,4,5,6,7" bitfld.long 0x04 0.--4. " MET_CT4_SEL ,Selects the kind of metrics computed by counter 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x08 "MSR_2,Metric Selector Register 2" bitfld.long 0x08 13.--15. " MET_CT9_SLOT ,Selects the slot for the metric computed by counter 9" "0,1,2,3,4,5,6,7" bitfld.long 0x08 8.--12. " MET_CT9_SEL ,Selects the kind of metrics computed by counter 9" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x08 5.--7. " MET_CT8_SLOT ,Selects the slot for the metric computed by counter 8" "0,1,2,3,4,5,6,7" bitfld.long 0x08 0.--4. " MET_CT8_SEL ,Selects the kind of metrics computed by counter 8" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x100++0x07 line.long 0x00 "MCR_0,Metric counter register 0" line.long 0x04 "IR_0,Incrementer Register 0" group.long (0x100+0x8)++0x07 line.long 0x00 "RR_0,Range Register 0" hexmask.long.word 0x00 16.--31. 1. " RANGE_HI ,Higher limit of a range" hexmask.long.word 0x00 0.--15. 1. " RANGE_LO ,Lower limit of a range" line.long 0x04 "MCLER_0,Metric Count Log Enable Register 0" rgroup.long (0x100+0x100)++0x07 line.long 0x00 "SMCR_0,Sampled Metric Counter Register 0" line.long 0x04 "SIR_0,Sampled Incrementer Register 0" rgroup.long 0x110++0x07 line.long 0x00 "MCR_1,Metric counter register 1" line.long 0x04 "IR_1,Incrementer Register 1" group.long (0x110+0x8)++0x07 line.long 0x00 "RR_1,Range Register 1" hexmask.long.word 0x00 16.--31. 1. " RANGE_HI ,Higher limit of a range" hexmask.long.word 0x00 0.--15. 1. " RANGE_LO ,Lower limit of a range" line.long 0x04 "MCLER_1,Metric Count Log Enable Register 1" rgroup.long (0x110+0x100)++0x07 line.long 0x00 "SMCR_1,Sampled Metric Counter Register 1" line.long 0x04 "SIR_1,Sampled Incrementer Register 1" rgroup.long 0x120++0x07 line.long 0x00 "MCR_2,Metric counter register 2" line.long 0x04 "IR_2,Incrementer Register 2" group.long (0x120+0x8)++0x07 line.long 0x00 "RR_2,Range Register 2" hexmask.long.word 0x00 16.--31. 1. " RANGE_HI ,Higher limit of a range" hexmask.long.word 0x00 0.--15. 1. " RANGE_LO ,Lower limit of a range" line.long 0x04 "MCLER_2,Metric Count Log Enable Register 2" rgroup.long (0x120+0x100)++0x07 line.long 0x00 "SMCR_2,Sampled Metric Counter Register 2" line.long 0x04 "SIR_2,Sampled Incrementer Register 2" rgroup.long 0x130++0x07 line.long 0x00 "MCR_3,Metric counter register 3" line.long 0x04 "IR_3,Incrementer Register 3" group.long (0x130+0x8)++0x07 line.long 0x00 "RR_3,Range Register 3" hexmask.long.word 0x00 16.--31. 1. " RANGE_HI ,Higher limit of a range" hexmask.long.word 0x00 0.--15. 1. " RANGE_LO ,Lower limit of a range" line.long 0x04 "MCLER_3,Metric Count Log Enable Register 3" rgroup.long (0x130+0x100)++0x07 line.long 0x00 "SMCR_3,Sampled Metric Counter Register 3" line.long 0x04 "SIR_3,Sampled Incrementer Register 3" rgroup.long 0x140++0x07 line.long 0x00 "MCR_4,Metric counter register 4" line.long 0x04 "IR_4,Incrementer Register 4" group.long (0x140+0x8)++0x07 line.long 0x00 "RR_4,Range Register 4" hexmask.long.word 0x00 16.--31. 1. " RANGE_HI ,Higher limit of a range" hexmask.long.word 0x00 0.--15. 1. " RANGE_LO ,Lower limit of a range" line.long 0x04 "MCLER_4,Metric Count Log Enable Register 4" rgroup.long (0x140+0x100)++0x07 line.long 0x00 "SMCR_4,Sampled Metric Counter Register 4" line.long 0x04 "SIR_4,Sampled Incrementer Register 4" rgroup.long 0x150++0x07 line.long 0x00 "MCR_5,Metric counter register 5" line.long 0x04 "IR_5,Incrementer Register 5" group.long (0x150+0x8)++0x07 line.long 0x00 "RR_5,Range Register 5" hexmask.long.word 0x00 16.--31. 1. " RANGE_HI ,Higher limit of a range" hexmask.long.word 0x00 0.--15. 1. " RANGE_LO ,Lower limit of a range" line.long 0x04 "MCLER_5,Metric Count Log Enable Register 5" rgroup.long (0x150+0x100)++0x07 line.long 0x00 "SMCR_5,Sampled Metric Counter Register 5" line.long 0x04 "SIR_5,Sampled Incrementer Register 5" rgroup.long 0x160++0x07 line.long 0x00 "MCR_6,Metric counter register 6" line.long 0x04 "IR_6,Incrementer Register 6" group.long (0x160+0x8)++0x07 line.long 0x00 "RR_6,Range Register 6" hexmask.long.word 0x00 16.--31. 1. " RANGE_HI ,Higher limit of a range" hexmask.long.word 0x00 0.--15. 1. " RANGE_LO ,Lower limit of a range" line.long 0x04 "MCLER_6,Metric Count Log Enable Register 6" rgroup.long (0x160+0x100)++0x07 line.long 0x00 "SMCR_6,Sampled Metric Counter Register 6" line.long 0x04 "SIR_6,Sampled Incrementer Register 6" rgroup.long 0x170++0x07 line.long 0x00 "MCR_7,Metric counter register 7" line.long 0x04 "IR_7,Incrementer Register 7" group.long (0x170+0x8)++0x07 line.long 0x00 "RR_7,Range Register 7" hexmask.long.word 0x00 16.--31. 1. " RANGE_HI ,Higher limit of a range" hexmask.long.word 0x00 0.--15. 1. " RANGE_LO ,Lower limit of a range" line.long 0x04 "MCLER_7,Metric Count Log Enable Register 7" rgroup.long (0x170+0x100)++0x07 line.long 0x00 "SMCR_7,Sampled Metric Counter Register 7" line.long 0x04 "SIR_7,Sampled Incrementer Register 7" group.long 0x300++0x13 line.long 0x00 "CR,Control Register" bitfld.long 0x00 25. " STR_FIFO_RST ,Reset the streaming FIFO" "No reset,Reset" bitfld.long 0x00 17. " GCCR_RST ,Reset the free-running global clock counter" "No reset,Reset" textline " " bitfld.long 0x00 16. " GCCR_EN ,Enable the free-running global clock counter" "Disabled,Enabled" bitfld.long 0x00 9. " EVNT_LOG_EXT_TRIG ,Use the external trigger to start the event log" "Not used,Used" textline " " bitfld.long 0x00 8. " EVNT_LOG_EN ,Enable event logging" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " LAT_RD_END ,Read latency end point" "Last read,First read" bitfld.long 0x00 6. " LAT_RD_START ,Read latency start point" "Address issuance by the master interface,Address acceptance by slave" textline " " bitfld.long 0x00 5. " LAT_WR_END ,Write latency end point" "Last write,First write" bitfld.long 0x00 4. " LAT_WR_START ,Write latency start point" "Address issuance by the master interface,Address acceptance by slave" textline " " bitfld.long 0x00 3. " ID_MASKING_EN ,Enable ID based filtering/masking" "Disabled,Enabled" bitfld.long 0x00 2. " MET_EXT_TRIG ,Use the external trigger to start the metric counters" "Not used,Used" textline " " bitfld.long 0x00 1. " MET_CNT_RST ,Resets all metric counters and sampled metric counters in the monitor" "No reset,Reset" bitfld.long 0x00 0. " MET_CNT_EN ,Enables all metric counters in the monitor" "Disabled,Enabled" line.long 0x04 "WIDR,Write ID Filtering Register" line.long 0x08 "WIDMR,Write ID Masking Register" line.long 0x0C "RIDR,Read ID Filtering Register" line.long 0x10 "RIDMR,Read ID Masking Register" group.long 0x400++0x07 line.long 0x00 "FECR,Flag Enable Register" bitfld.long 0x00 31. " MET_CT9_OV_EN ,Enable metric counter 9 flag" "Disabled,Enabled" bitfld.long 0x00 30. " MET_CT8_OV_EN ,Enable metric counter 8 flag" "Disabled,Enabled" bitfld.long 0x00 29. " MET_CT7_OV_EN ,Enable metric counter 7 flag" "Disabled,Enabled" bitfld.long 0x00 28. " MET_CT6_OV_EN ,Enable metric counter 6 flag" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " MET_CT5_OV_EN ,Enable metric counter 5 flag" "Disabled,Enabled" bitfld.long 0x00 26. " MET_CT4_OV_EN ,Enable metric counter 4 flag" "Disabled,Enabled" bitfld.long 0x00 25. " MET_CT3_OV_EN ,Enable metric counter 3 flag" "Disabled,Enabled" bitfld.long 0x00 24. " MET_CT2_OV_EN ,Enable metric counter 2 flag" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " MET_CT1_OV_EN ,Enable metric counter 1 flag" "Disabled,Enabled" bitfld.long 0x00 22. " MET_CT0_OV_EN ,Enable metric counter 0 flag" "Disabled,Enabled" bitfld.long 0x00 21. " SMP_CNT_LAPSE_FLG ,Enable sample counter lapse flag" "Disabled,Enabled" bitfld.long 0x00 20. " GCC_OFVL_FLG ,Enable global clock count overflow flag" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " EXT_EVNT_STRT_FLG ,Enable external event start flag" "Disabled,Enabled" bitfld.long 0x00 18. " EXT_EVNT_STOP_FLG ,Enable external event stop flag" "Disabled,Enabled" bitfld.long 0x00 17. " EXT_EVNT_FLG_EN ,Enable external event flag" "Disabled,Enabled" bitfld.long 0x00 16. " SFT_DATA_FLG_EN ,Enable software-written data flag" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " LAST_READ_FLG ,Enable last read flag" "Disabled,Enabled" bitfld.long 0x00 5. " FIRST_READ_FLG ,Enable first read flag" "Disabled,Enabled" bitfld.long 0x00 4. " READ_ADDR_FLG ,Enable read addr flag" "Disabled,Enabled" bitfld.long 0x00 3. " RESPONSE_FLG ,Enable responese flag" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " LAST_WRITE_FLG ,Enable last write flag" "Disabled,Enabled" bitfld.long 0x00 1. " FIRST_WRITE_FLG ,Enable first write flag" "Disabled,Enabled" bitfld.long 0x00 0. " WRITE_ADDR_FLG ,Enable write addr flag" "Disabled,Enabled" line.long 0x04 "SWDR,Software-written Data Register" width 0xB tree.end tree "APM_LPD_FPD" base ad:0xFFA10000 width 9. rgroup.long 0x00++0x07 line.long 0x00 "GCCR_H,Global Clock Counter High Register" line.long 0x04 "GCCR_L,Global Clock Counter Low Register" group.long 0x24++0x07 line.long 0x00 "SIR,Sample Interval Time Configuration Register" line.long 0x04 "SICR,Sample Interval Control Register" bitfld.long 0x04 8. " MET_CNT_RST ,Reset metric counter" "No reset,Reset" bitfld.long 0x04 1. " LOAD ,Loads the sample interval register value into the sample interval counter" "Not loaded,Loaded" bitfld.long 0x04 0. " ENABLE ,Enable the down counter" "Disabled,Enabled" hgroup.long 0x2C++0x03 hide.long 0x00 "SISR,Sample Interval Sample Register" in group.long 0x30++0x03 line.long 0x00 "GIER,Global Interrupt Enable Register" bitfld.long 0x00 0. " GIE ,Master enable for the device interrupt output to the system interrupt controller" "Disabled,Enabled" group.long 0x34++0x07 line.long 0x00 "IER,Interrupt Enable Register" bitfld.long 0x00 12. " MET_CT9_OV_EN ,Metric counter 9 overflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 11. " MET_CT8_OV_EN ,Metric counter 8 overflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 10. " MET_CT7_OV_EN ,Metric counter 7 overflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 9. " MET_CT6_OV_EN ,Metric counter 6 overflow interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " MET_CT5_OV_EN ,Metric counter 5 overflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 7. " MET_CT4_OV_EN ,Metric counter 4 overflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 6. " MET_CT3_OV_EN ,Metric counter 3 overflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 5. " MET_CT2_OV_EN ,Metric counter 2 overflow interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " MET_CT1_OV_EN ,Metric counter 1 overflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 3. " MET_CT0_OV_EN ,Metric counter 0 overflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 2. " EV_LOG_FIFO_EN ,Event log FIFO overflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " SMPL_INTRVL_OV_EN ,Sample interval counter overflow interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " GLBCLKCNT_OV_EN ,Global clock counter overflow interrupt enable" "Disabled,Enabled" line.long 0x04 "ISR,Interrupt Status Register" bitfld.long 0x04 12. " MET_CT9_OV ,Metric counter 9 overflow interrupt active" "Not active,Active" bitfld.long 0x04 11. " MET_CT8_OV ,Metric counter 8 overflow interrupt active" "Not active,Active" bitfld.long 0x04 10. " MET_CT7_OV ,Metric counter 7 overflow interrupt active" "Not active,Active" bitfld.long 0x04 9. " MET_CT6_OV ,Metric counter 6 overflow interrupt active" "Not active,Active" textline " " bitfld.long 0x04 8. " MET_CT5_OV ,Metric counter 5 overflow interrupt active" "Not active,Active" bitfld.long 0x04 7. " MET_CT4_OV ,Metric counter 4 overflow interrupt active" "Not active,Active" bitfld.long 0x04 6. " MET_CT3_OV ,Metric counter 3 overflow interrupt active" "Not active,Active" bitfld.long 0x04 5. " MET_CT2_OV ,Metric counter 2 overflow interrupt active" "Not active,Active" textline " " bitfld.long 0x04 4. " MET_CT1_OV ,Metric counter 1 overflow interrupt active" "Not active,Active" bitfld.long 0x04 3. " MET_CT0_OV ,Metric counter 0 overflow interrupt active" "Not active,Active" bitfld.long 0x04 2. " EV_LOG_FIFO ,Event log FIFO overflow interrupt active" "Not active,Active" bitfld.long 0x04 1. " SMPL_INTRVL_OV ,Sample interval counter overflow interrupt active" "Not active,Active" textline " " bitfld.long 0x04 0. " GLBCLKCNT_OV ,Global clock counter overflow interrupt active" "Not active,Active" group.long 0x44++0x0B line.long 0x00 "MSR_0,Metric Selector Register 0" bitfld.long 0x00 29.--31. " MET_CT3_SLOT ,Selects the slot for the metric computed by counter 3" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " MET_CT3_SEL ,Selects the kind of metrics computed by counter 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 21.--23. " MET_CT2_SLOT ,Selects the slot for the metric computed by counter 2" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16.--20. " MET_CT2_SEL ,Selects the kind of metrics computed by counter 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 13.--15. " MET_CT1_SLOT ,Selects the slot for the metric computed by counter 1" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8.--12. " MET_CT1_SEL ,Selects the kind of metrics computed by counter 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 5.--7. " MET_CT0_SLOT ,Selects the slot for the metric computed by counter 0" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--4. " MET_CT0_SEL ,Selects the kind of metrics computed by counter 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x04 "MSR_1,Metric Selector Register 1" bitfld.long 0x04 29.--31. " MET_CT7_SLOT ,Selects the slot for the metric computed by counter 7" "0,1,2,3,4,5,6,7" bitfld.long 0x04 24.--28. " MET_CT7_SEL ,Selects the kind of metrics computed by counter 7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 21.--23. " MET_CT6_SLOT ,Selects the slot for the metric computed by counter 6" "0,1,2,3,4,5,6,7" bitfld.long 0x04 16.--20. " MET_CT6_SEL ,Selects the kind of metrics computed by counter 6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x04 13.--15. " MET_CT5_SLOT ,Selects the slot for the metric computed by counter 5" "0,1,2,3,4,5,6,7" bitfld.long 0x04 8.--12. " MET_CT5_SEL ,Selects the kind of metrics computed by counter 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 5.--7. " MET_CT4_SLOT ,Selects the slot for the metric computed by counter 4" "0,1,2,3,4,5,6,7" bitfld.long 0x04 0.--4. " MET_CT4_SEL ,Selects the kind of metrics computed by counter 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x08 "MSR_2,Metric Selector Register 2" bitfld.long 0x08 13.--15. " MET_CT9_SLOT ,Selects the slot for the metric computed by counter 9" "0,1,2,3,4,5,6,7" bitfld.long 0x08 8.--12. " MET_CT9_SEL ,Selects the kind of metrics computed by counter 9" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x08 5.--7. " MET_CT8_SLOT ,Selects the slot for the metric computed by counter 8" "0,1,2,3,4,5,6,7" bitfld.long 0x08 0.--4. " MET_CT8_SEL ,Selects the kind of metrics computed by counter 8" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x100++0x07 line.long 0x00 "MCR_0,Metric counter register 0" line.long 0x04 "IR_0,Incrementer Register 0" group.long (0x100+0x8)++0x07 line.long 0x00 "RR_0,Range Register 0" hexmask.long.word 0x00 16.--31. 1. " RANGE_HI ,Higher limit of a range" hexmask.long.word 0x00 0.--15. 1. " RANGE_LO ,Lower limit of a range" line.long 0x04 "MCLER_0,Metric Count Log Enable Register 0" rgroup.long (0x100+0x100)++0x07 line.long 0x00 "SMCR_0,Sampled Metric Counter Register 0" line.long 0x04 "SIR_0,Sampled Incrementer Register 0" rgroup.long 0x110++0x07 line.long 0x00 "MCR_1,Metric counter register 1" line.long 0x04 "IR_1,Incrementer Register 1" group.long (0x110+0x8)++0x07 line.long 0x00 "RR_1,Range Register 1" hexmask.long.word 0x00 16.--31. 1. " RANGE_HI ,Higher limit of a range" hexmask.long.word 0x00 0.--15. 1. " RANGE_LO ,Lower limit of a range" line.long 0x04 "MCLER_1,Metric Count Log Enable Register 1" rgroup.long (0x110+0x100)++0x07 line.long 0x00 "SMCR_1,Sampled Metric Counter Register 1" line.long 0x04 "SIR_1,Sampled Incrementer Register 1" rgroup.long 0x120++0x07 line.long 0x00 "MCR_2,Metric counter register 2" line.long 0x04 "IR_2,Incrementer Register 2" group.long (0x120+0x8)++0x07 line.long 0x00 "RR_2,Range Register 2" hexmask.long.word 0x00 16.--31. 1. " RANGE_HI ,Higher limit of a range" hexmask.long.word 0x00 0.--15. 1. " RANGE_LO ,Lower limit of a range" line.long 0x04 "MCLER_2,Metric Count Log Enable Register 2" rgroup.long (0x120+0x100)++0x07 line.long 0x00 "SMCR_2,Sampled Metric Counter Register 2" line.long 0x04 "SIR_2,Sampled Incrementer Register 2" rgroup.long 0x130++0x07 line.long 0x00 "MCR_3,Metric counter register 3" line.long 0x04 "IR_3,Incrementer Register 3" group.long (0x130+0x8)++0x07 line.long 0x00 "RR_3,Range Register 3" hexmask.long.word 0x00 16.--31. 1. " RANGE_HI ,Higher limit of a range" hexmask.long.word 0x00 0.--15. 1. " RANGE_LO ,Lower limit of a range" line.long 0x04 "MCLER_3,Metric Count Log Enable Register 3" rgroup.long (0x130+0x100)++0x07 line.long 0x00 "SMCR_3,Sampled Metric Counter Register 3" line.long 0x04 "SIR_3,Sampled Incrementer Register 3" rgroup.long 0x140++0x07 line.long 0x00 "MCR_4,Metric counter register 4" line.long 0x04 "IR_4,Incrementer Register 4" group.long (0x140+0x8)++0x07 line.long 0x00 "RR_4,Range Register 4" hexmask.long.word 0x00 16.--31. 1. " RANGE_HI ,Higher limit of a range" hexmask.long.word 0x00 0.--15. 1. " RANGE_LO ,Lower limit of a range" line.long 0x04 "MCLER_4,Metric Count Log Enable Register 4" rgroup.long (0x140+0x100)++0x07 line.long 0x00 "SMCR_4,Sampled Metric Counter Register 4" line.long 0x04 "SIR_4,Sampled Incrementer Register 4" rgroup.long 0x150++0x07 line.long 0x00 "MCR_5,Metric counter register 5" line.long 0x04 "IR_5,Incrementer Register 5" group.long (0x150+0x8)++0x07 line.long 0x00 "RR_5,Range Register 5" hexmask.long.word 0x00 16.--31. 1. " RANGE_HI ,Higher limit of a range" hexmask.long.word 0x00 0.--15. 1. " RANGE_LO ,Lower limit of a range" line.long 0x04 "MCLER_5,Metric Count Log Enable Register 5" rgroup.long (0x150+0x100)++0x07 line.long 0x00 "SMCR_5,Sampled Metric Counter Register 5" line.long 0x04 "SIR_5,Sampled Incrementer Register 5" rgroup.long 0x160++0x07 line.long 0x00 "MCR_6,Metric counter register 6" line.long 0x04 "IR_6,Incrementer Register 6" group.long (0x160+0x8)++0x07 line.long 0x00 "RR_6,Range Register 6" hexmask.long.word 0x00 16.--31. 1. " RANGE_HI ,Higher limit of a range" hexmask.long.word 0x00 0.--15. 1. " RANGE_LO ,Lower limit of a range" line.long 0x04 "MCLER_6,Metric Count Log Enable Register 6" rgroup.long (0x160+0x100)++0x07 line.long 0x00 "SMCR_6,Sampled Metric Counter Register 6" line.long 0x04 "SIR_6,Sampled Incrementer Register 6" rgroup.long 0x170++0x07 line.long 0x00 "MCR_7,Metric counter register 7" line.long 0x04 "IR_7,Incrementer Register 7" group.long (0x170+0x8)++0x07 line.long 0x00 "RR_7,Range Register 7" hexmask.long.word 0x00 16.--31. 1. " RANGE_HI ,Higher limit of a range" hexmask.long.word 0x00 0.--15. 1. " RANGE_LO ,Lower limit of a range" line.long 0x04 "MCLER_7,Metric Count Log Enable Register 7" rgroup.long (0x170+0x100)++0x07 line.long 0x00 "SMCR_7,Sampled Metric Counter Register 7" line.long 0x04 "SIR_7,Sampled Incrementer Register 7" group.long 0x300++0x13 line.long 0x00 "CR,Control Register" bitfld.long 0x00 25. " STR_FIFO_RST ,Reset the streaming FIFO" "No reset,Reset" bitfld.long 0x00 17. " GCCR_RST ,Reset the free-running global clock counter" "No reset,Reset" textline " " bitfld.long 0x00 16. " GCCR_EN ,Enable the free-running global clock counter" "Disabled,Enabled" bitfld.long 0x00 9. " EVNT_LOG_EXT_TRIG ,Use the external trigger to start the event log" "Not used,Used" textline " " bitfld.long 0x00 8. " EVNT_LOG_EN ,Enable event logging" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " LAT_RD_END ,Read latency end point" "Last read,First read" bitfld.long 0x00 6. " LAT_RD_START ,Read latency start point" "Address issuance by the master interface,Address acceptance by slave" textline " " bitfld.long 0x00 5. " LAT_WR_END ,Write latency end point" "Last write,First write" bitfld.long 0x00 4. " LAT_WR_START ,Write latency start point" "Address issuance by the master interface,Address acceptance by slave" textline " " bitfld.long 0x00 3. " ID_MASKING_EN ,Enable ID based filtering/masking" "Disabled,Enabled" bitfld.long 0x00 2. " MET_EXT_TRIG ,Use the external trigger to start the metric counters" "Not used,Used" textline " " bitfld.long 0x00 1. " MET_CNT_RST ,Resets all metric counters and sampled metric counters in the monitor" "No reset,Reset" bitfld.long 0x00 0. " MET_CNT_EN ,Enables all metric counters in the monitor" "Disabled,Enabled" line.long 0x04 "WIDR,Write ID Filtering Register" line.long 0x08 "WIDMR,Write ID Masking Register" line.long 0x0C "RIDR,Read ID Filtering Register" line.long 0x10 "RIDMR,Read ID Masking Register" group.long 0x400++0x07 line.long 0x00 "FECR,Flag Enable Register" bitfld.long 0x00 31. " MET_CT9_OV_EN ,Enable metric counter 9 flag" "Disabled,Enabled" bitfld.long 0x00 30. " MET_CT8_OV_EN ,Enable metric counter 8 flag" "Disabled,Enabled" bitfld.long 0x00 29. " MET_CT7_OV_EN ,Enable metric counter 7 flag" "Disabled,Enabled" bitfld.long 0x00 28. " MET_CT6_OV_EN ,Enable metric counter 6 flag" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " MET_CT5_OV_EN ,Enable metric counter 5 flag" "Disabled,Enabled" bitfld.long 0x00 26. " MET_CT4_OV_EN ,Enable metric counter 4 flag" "Disabled,Enabled" bitfld.long 0x00 25. " MET_CT3_OV_EN ,Enable metric counter 3 flag" "Disabled,Enabled" bitfld.long 0x00 24. " MET_CT2_OV_EN ,Enable metric counter 2 flag" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " MET_CT1_OV_EN ,Enable metric counter 1 flag" "Disabled,Enabled" bitfld.long 0x00 22. " MET_CT0_OV_EN ,Enable metric counter 0 flag" "Disabled,Enabled" bitfld.long 0x00 21. " SMP_CNT_LAPSE_FLG ,Enable sample counter lapse flag" "Disabled,Enabled" bitfld.long 0x00 20. " GCC_OFVL_FLG ,Enable global clock count overflow flag" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " EXT_EVNT_STRT_FLG ,Enable external event start flag" "Disabled,Enabled" bitfld.long 0x00 18. " EXT_EVNT_STOP_FLG ,Enable external event stop flag" "Disabled,Enabled" bitfld.long 0x00 17. " EXT_EVNT_FLG_EN ,Enable external event flag" "Disabled,Enabled" bitfld.long 0x00 16. " SFT_DATA_FLG_EN ,Enable software-written data flag" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " LAST_READ_FLG ,Enable last read flag" "Disabled,Enabled" bitfld.long 0x00 5. " FIRST_READ_FLG ,Enable first read flag" "Disabled,Enabled" bitfld.long 0x00 4. " READ_ADDR_FLG ,Enable read addr flag" "Disabled,Enabled" bitfld.long 0x00 3. " RESPONSE_FLG ,Enable responese flag" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " LAST_WRITE_FLG ,Enable last write flag" "Disabled,Enabled" bitfld.long 0x00 1. " FIRST_WRITE_FLG ,Enable first write flag" "Disabled,Enabled" bitfld.long 0x00 0. " WRITE_ADDR_FLG ,Enable write addr flag" "Disabled,Enabled" line.long 0x04 "SWDR,Software-written Data Register" width 0xB tree.end tree "APMDDR" base ad:0xFD0B0000 width 9. rgroup.long 0x00++0x07 line.long 0x00 "GCCR_H,Global Clock Counter High Register" line.long 0x04 "GCCR_L,Global Clock Counter Low Register" group.long 0x24++0x07 line.long 0x00 "SIR,Sample Interval Time Configuration Register" line.long 0x04 "SICR,Sample Interval Control Register" bitfld.long 0x04 8. " MET_CNT_RST ,Reset metric counter" "No reset,Reset" bitfld.long 0x04 1. " LOAD ,Loads the sample interval register value into the sample interval counter" "Not loaded,Loaded" bitfld.long 0x04 0. " ENABLE ,Enable the down counter" "Disabled,Enabled" hgroup.long 0x2C++0x03 hide.long 0x00 "SISR,Sample Interval Sample Register" in group.long 0x30++0x03 line.long 0x00 "GIER,Global Interrupt Enable Register" bitfld.long 0x00 0. " GIE ,Master enable for the device interrupt output to the system interrupt controller" "Disabled,Enabled" group.long 0x34++0x07 line.long 0x00 "IER,Interrupt Enable Register" bitfld.long 0x00 12. " MET_CT9_OV_EN ,Metric counter 9 overflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 11. " MET_CT8_OV_EN ,Metric counter 8 overflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 10. " MET_CT7_OV_EN ,Metric counter 7 overflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 9. " MET_CT6_OV_EN ,Metric counter 6 overflow interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " MET_CT5_OV_EN ,Metric counter 5 overflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 7. " MET_CT4_OV_EN ,Metric counter 4 overflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 6. " MET_CT3_OV_EN ,Metric counter 3 overflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 5. " MET_CT2_OV_EN ,Metric counter 2 overflow interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " MET_CT1_OV_EN ,Metric counter 1 overflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 3. " MET_CT0_OV_EN ,Metric counter 0 overflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 2. " EV_LOG_FIFO_EN ,Event log FIFO overflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " SMPL_INTRVL_OV_EN ,Sample interval counter overflow interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " GLBCLKCNT_OV_EN ,Global clock counter overflow interrupt enable" "Disabled,Enabled" line.long 0x04 "ISR,Interrupt Status Register" bitfld.long 0x04 12. " MET_CT9_OV ,Metric counter 9 overflow interrupt active" "Not active,Active" bitfld.long 0x04 11. " MET_CT8_OV ,Metric counter 8 overflow interrupt active" "Not active,Active" bitfld.long 0x04 10. " MET_CT7_OV ,Metric counter 7 overflow interrupt active" "Not active,Active" bitfld.long 0x04 9. " MET_CT6_OV ,Metric counter 6 overflow interrupt active" "Not active,Active" textline " " bitfld.long 0x04 8. " MET_CT5_OV ,Metric counter 5 overflow interrupt active" "Not active,Active" bitfld.long 0x04 7. " MET_CT4_OV ,Metric counter 4 overflow interrupt active" "Not active,Active" bitfld.long 0x04 6. " MET_CT3_OV ,Metric counter 3 overflow interrupt active" "Not active,Active" bitfld.long 0x04 5. " MET_CT2_OV ,Metric counter 2 overflow interrupt active" "Not active,Active" textline " " bitfld.long 0x04 4. " MET_CT1_OV ,Metric counter 1 overflow interrupt active" "Not active,Active" bitfld.long 0x04 3. " MET_CT0_OV ,Metric counter 0 overflow interrupt active" "Not active,Active" bitfld.long 0x04 2. " EV_LOG_FIFO ,Event log FIFO overflow interrupt active" "Not active,Active" bitfld.long 0x04 1. " SMPL_INTRVL_OV ,Sample interval counter overflow interrupt active" "Not active,Active" textline " " bitfld.long 0x04 0. " GLBCLKCNT_OV ,Global clock counter overflow interrupt active" "Not active,Active" group.long 0x44++0x0B line.long 0x00 "MSR_0,Metric Selector Register 0" bitfld.long 0x00 29.--31. " MET_CT3_SLOT ,Selects the slot for the metric computed by counter 3" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " MET_CT3_SEL ,Selects the kind of metrics computed by counter 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 21.--23. " MET_CT2_SLOT ,Selects the slot for the metric computed by counter 2" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16.--20. " MET_CT2_SEL ,Selects the kind of metrics computed by counter 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 13.--15. " MET_CT1_SLOT ,Selects the slot for the metric computed by counter 1" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8.--12. " MET_CT1_SEL ,Selects the kind of metrics computed by counter 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 5.--7. " MET_CT0_SLOT ,Selects the slot for the metric computed by counter 0" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--4. " MET_CT0_SEL ,Selects the kind of metrics computed by counter 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x04 "MSR_1,Metric Selector Register 1" bitfld.long 0x04 29.--31. " MET_CT7_SLOT ,Selects the slot for the metric computed by counter 7" "0,1,2,3,4,5,6,7" bitfld.long 0x04 24.--28. " MET_CT7_SEL ,Selects the kind of metrics computed by counter 7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 21.--23. " MET_CT6_SLOT ,Selects the slot for the metric computed by counter 6" "0,1,2,3,4,5,6,7" bitfld.long 0x04 16.--20. " MET_CT6_SEL ,Selects the kind of metrics computed by counter 6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x04 13.--15. " MET_CT5_SLOT ,Selects the slot for the metric computed by counter 5" "0,1,2,3,4,5,6,7" bitfld.long 0x04 8.--12. " MET_CT5_SEL ,Selects the kind of metrics computed by counter 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 5.--7. " MET_CT4_SLOT ,Selects the slot for the metric computed by counter 4" "0,1,2,3,4,5,6,7" bitfld.long 0x04 0.--4. " MET_CT4_SEL ,Selects the kind of metrics computed by counter 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x08 "MSR_2,Metric Selector Register 2" bitfld.long 0x08 13.--15. " MET_CT9_SLOT ,Selects the slot for the metric computed by counter 9" "0,1,2,3,4,5,6,7" bitfld.long 0x08 8.--12. " MET_CT9_SEL ,Selects the kind of metrics computed by counter 9" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x08 5.--7. " MET_CT8_SLOT ,Selects the slot for the metric computed by counter 8" "0,1,2,3,4,5,6,7" bitfld.long 0x08 0.--4. " MET_CT8_SEL ,Selects the kind of metrics computed by counter 8" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x100++0x07 line.long 0x00 "MCR_0,Metric counter register 0" line.long 0x04 "IR_0,Incrementer Register 0" group.long (0x100+0x8)++0x07 line.long 0x00 "RR_0,Range Register 0" hexmask.long.word 0x00 16.--31. 1. " RANGE_HI ,Higher limit of a range" hexmask.long.word 0x00 0.--15. 1. " RANGE_LO ,Lower limit of a range" line.long 0x04 "MCLER_0,Metric Count Log Enable Register 0" rgroup.long (0x100+0x100)++0x07 line.long 0x00 "SMCR_0,Sampled Metric Counter Register 0" line.long 0x04 "SIR_0,Sampled Incrementer Register 0" rgroup.long 0x110++0x07 line.long 0x00 "MCR_1,Metric counter register 1" line.long 0x04 "IR_1,Incrementer Register 1" group.long (0x110+0x8)++0x07 line.long 0x00 "RR_1,Range Register 1" hexmask.long.word 0x00 16.--31. 1. " RANGE_HI ,Higher limit of a range" hexmask.long.word 0x00 0.--15. 1. " RANGE_LO ,Lower limit of a range" line.long 0x04 "MCLER_1,Metric Count Log Enable Register 1" rgroup.long (0x110+0x100)++0x07 line.long 0x00 "SMCR_1,Sampled Metric Counter Register 1" line.long 0x04 "SIR_1,Sampled Incrementer Register 1" rgroup.long 0x120++0x07 line.long 0x00 "MCR_2,Metric counter register 2" line.long 0x04 "IR_2,Incrementer Register 2" group.long (0x120+0x8)++0x07 line.long 0x00 "RR_2,Range Register 2" hexmask.long.word 0x00 16.--31. 1. " RANGE_HI ,Higher limit of a range" hexmask.long.word 0x00 0.--15. 1. " RANGE_LO ,Lower limit of a range" line.long 0x04 "MCLER_2,Metric Count Log Enable Register 2" rgroup.long (0x120+0x100)++0x07 line.long 0x00 "SMCR_2,Sampled Metric Counter Register 2" line.long 0x04 "SIR_2,Sampled Incrementer Register 2" rgroup.long 0x130++0x07 line.long 0x00 "MCR_3,Metric counter register 3" line.long 0x04 "IR_3,Incrementer Register 3" group.long (0x130+0x8)++0x07 line.long 0x00 "RR_3,Range Register 3" hexmask.long.word 0x00 16.--31. 1. " RANGE_HI ,Higher limit of a range" hexmask.long.word 0x00 0.--15. 1. " RANGE_LO ,Lower limit of a range" line.long 0x04 "MCLER_3,Metric Count Log Enable Register 3" rgroup.long (0x130+0x100)++0x07 line.long 0x00 "SMCR_3,Sampled Metric Counter Register 3" line.long 0x04 "SIR_3,Sampled Incrementer Register 3" rgroup.long 0x140++0x07 line.long 0x00 "MCR_4,Metric counter register 4" line.long 0x04 "IR_4,Incrementer Register 4" group.long (0x140+0x8)++0x07 line.long 0x00 "RR_4,Range Register 4" hexmask.long.word 0x00 16.--31. 1. " RANGE_HI ,Higher limit of a range" hexmask.long.word 0x00 0.--15. 1. " RANGE_LO ,Lower limit of a range" line.long 0x04 "MCLER_4,Metric Count Log Enable Register 4" rgroup.long (0x140+0x100)++0x07 line.long 0x00 "SMCR_4,Sampled Metric Counter Register 4" line.long 0x04 "SIR_4,Sampled Incrementer Register 4" rgroup.long 0x150++0x07 line.long 0x00 "MCR_5,Metric counter register 5" line.long 0x04 "IR_5,Incrementer Register 5" group.long (0x150+0x8)++0x07 line.long 0x00 "RR_5,Range Register 5" hexmask.long.word 0x00 16.--31. 1. " RANGE_HI ,Higher limit of a range" hexmask.long.word 0x00 0.--15. 1. " RANGE_LO ,Lower limit of a range" line.long 0x04 "MCLER_5,Metric Count Log Enable Register 5" rgroup.long (0x150+0x100)++0x07 line.long 0x00 "SMCR_5,Sampled Metric Counter Register 5" line.long 0x04 "SIR_5,Sampled Incrementer Register 5" rgroup.long 0x160++0x07 line.long 0x00 "MCR_6,Metric counter register 6" line.long 0x04 "IR_6,Incrementer Register 6" group.long (0x160+0x8)++0x07 line.long 0x00 "RR_6,Range Register 6" hexmask.long.word 0x00 16.--31. 1. " RANGE_HI ,Higher limit of a range" hexmask.long.word 0x00 0.--15. 1. " RANGE_LO ,Lower limit of a range" line.long 0x04 "MCLER_6,Metric Count Log Enable Register 6" rgroup.long (0x160+0x100)++0x07 line.long 0x00 "SMCR_6,Sampled Metric Counter Register 6" line.long 0x04 "SIR_6,Sampled Incrementer Register 6" rgroup.long 0x170++0x07 line.long 0x00 "MCR_7,Metric counter register 7" line.long 0x04 "IR_7,Incrementer Register 7" group.long (0x170+0x8)++0x07 line.long 0x00 "RR_7,Range Register 7" hexmask.long.word 0x00 16.--31. 1. " RANGE_HI ,Higher limit of a range" hexmask.long.word 0x00 0.--15. 1. " RANGE_LO ,Lower limit of a range" line.long 0x04 "MCLER_7,Metric Count Log Enable Register 7" rgroup.long (0x170+0x100)++0x07 line.long 0x00 "SMCR_7,Sampled Metric Counter Register 7" line.long 0x04 "SIR_7,Sampled Incrementer Register 7" rgroup.long 0x180++0x07 line.long 0x00 "MCR_8,Metric counter register 8" line.long 0x04 "IR_8,Incrementer Register 8" group.long (0x180+0x8)++0x07 line.long 0x00 "RR_8,Range Register 8" hexmask.long.word 0x00 16.--31. 1. " RANGE_HI ,Higher limit of a range" hexmask.long.word 0x00 0.--15. 1. " RANGE_LO ,Lower limit of a range" line.long 0x04 "MCLER_8,Metric Count Log Enable Register 8" rgroup.long (0x180+0x100)++0x07 line.long 0x00 "SMCR_8,Sampled Metric Counter Register 8" line.long 0x04 "SIR_8,Sampled Incrementer Register 8" rgroup.long 0x190++0x07 line.long 0x00 "MCR_9,Metric counter register 9" line.long 0x04 "IR_9,Incrementer Register 9" group.long (0x190+0x8)++0x07 line.long 0x00 "RR_9,Range Register 9" hexmask.long.word 0x00 16.--31. 1. " RANGE_HI ,Higher limit of a range" hexmask.long.word 0x00 0.--15. 1. " RANGE_LO ,Lower limit of a range" line.long 0x04 "MCLER_9,Metric Count Log Enable Register 9" rgroup.long (0x190+0x100)++0x07 line.long 0x00 "SMCR_9,Sampled Metric Counter Register 9" line.long 0x04 "SIR_9,Sampled Incrementer Register 9" group.long 0x300++0x13 line.long 0x00 "CR,Control Register" bitfld.long 0x00 25. " STR_FIFO_RST ,Reset the streaming FIFO" "No reset,Reset" bitfld.long 0x00 17. " GCCR_RST ,Reset the free-running global clock counter" "No reset,Reset" textline " " bitfld.long 0x00 16. " GCCR_EN ,Enable the free-running global clock counter" "Disabled,Enabled" bitfld.long 0x00 9. " EVNT_LOG_EXT_TRIG ,Use the external trigger to start the event log" "Not used,Used" textline " " bitfld.long 0x00 8. " EVNT_LOG_EN ,Enable event logging" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " LAT_RD_END ,Read latency end point" "Last read,First read" bitfld.long 0x00 6. " LAT_RD_START ,Read latency start point" "Address issuance by the master interface,Address acceptance by slave" textline " " bitfld.long 0x00 5. " LAT_WR_END ,Write latency end point" "Last write,First write" bitfld.long 0x00 4. " LAT_WR_START ,Write latency start point" "Address issuance by the master interface,Address acceptance by slave" textline " " bitfld.long 0x00 3. " ID_MASKING_EN ,Enable ID based filtering/masking" "Disabled,Enabled" bitfld.long 0x00 2. " MET_EXT_TRIG ,Use the external trigger to start the metric counters" "Not used,Used" textline " " bitfld.long 0x00 1. " MET_CNT_RST ,Resets all metric counters and sampled metric counters in the monitor" "No reset,Reset" bitfld.long 0x00 0. " MET_CNT_EN ,Enables all metric counters in the monitor" "Disabled,Enabled" line.long 0x04 "WIDR,Write ID Filtering Register" line.long 0x08 "WIDMR,Write ID Masking Register" line.long 0x0C "RIDR,Read ID Filtering Register" line.long 0x10 "RIDMR,Read ID Masking Register" group.long 0x400++0x07 line.long 0x00 "FECR,Flag Enable Register" bitfld.long 0x00 31. " MET_CT9_OV_EN ,Enable metric counter 9 flag" "Disabled,Enabled" bitfld.long 0x00 30. " MET_CT8_OV_EN ,Enable metric counter 8 flag" "Disabled,Enabled" bitfld.long 0x00 29. " MET_CT7_OV_EN ,Enable metric counter 7 flag" "Disabled,Enabled" bitfld.long 0x00 28. " MET_CT6_OV_EN ,Enable metric counter 6 flag" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " MET_CT5_OV_EN ,Enable metric counter 5 flag" "Disabled,Enabled" bitfld.long 0x00 26. " MET_CT4_OV_EN ,Enable metric counter 4 flag" "Disabled,Enabled" bitfld.long 0x00 25. " MET_CT3_OV_EN ,Enable metric counter 3 flag" "Disabled,Enabled" bitfld.long 0x00 24. " MET_CT2_OV_EN ,Enable metric counter 2 flag" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " MET_CT1_OV_EN ,Enable metric counter 1 flag" "Disabled,Enabled" bitfld.long 0x00 22. " MET_CT0_OV_EN ,Enable metric counter 0 flag" "Disabled,Enabled" bitfld.long 0x00 21. " SMP_CNT_LAPSE_FLG ,Enable sample counter lapse flag" "Disabled,Enabled" bitfld.long 0x00 20. " GCC_OFVL_FLG ,Enable global clock count overflow flag" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " EXT_EVNT_STRT_FLG ,Enable external event start flag" "Disabled,Enabled" bitfld.long 0x00 18. " EXT_EVNT_STOP_FLG ,Enable external event stop flag" "Disabled,Enabled" bitfld.long 0x00 17. " EXT_EVNT_FLG_EN ,Enable external event flag" "Disabled,Enabled" bitfld.long 0x00 16. " SFT_DATA_FLG_EN ,Enable software-written data flag" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " LAST_READ_FLG ,Enable last read flag" "Disabled,Enabled" bitfld.long 0x00 5. " FIRST_READ_FLG ,Enable first read flag" "Disabled,Enabled" bitfld.long 0x00 4. " READ_ADDR_FLG ,Enable read addr flag" "Disabled,Enabled" bitfld.long 0x00 3. " RESPONSE_FLG ,Enable responese flag" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " LAST_WRITE_FLG ,Enable last write flag" "Disabled,Enabled" bitfld.long 0x00 1. " FIRST_WRITE_FLG ,Enable first write flag" "Disabled,Enabled" bitfld.long 0x00 0. " WRITE_ADDR_FLG ,Enable write addr flag" "Disabled,Enabled" line.long 0x04 "SWDR,Software-written Data Register" width 0xB tree.end tree.end tree "APU (Application Processing Unit)" base ad:0xFD5C0000 width 13. group.long 0x00++0x03 line.long 0x00 "ERR_CTRL,Control Register" bitfld.long 0x00 0. " PSLVERR ,Whether an APB access to an unimplemented register space causes PSLVERR" "Disabled,Enabled" group.long 0x10++0x03 line.long 0x00 "ISR,Interrupt Status Register" eventfld.long 0x00 0. " INV_APB ,APB (Register) access occurs to an unimplemented space" "Not occurred,Occurred" group.long 0x14++0x03 line.long 0x00 "IMR_SET/CLR,Interrupt Mask Register" setclrfld.long 0x00 0. 0x08 0. 0x04 0. " INV_APB ,Interrupt mask" "Not masked,Masked" group.long 0x20++0x07 line.long 0x00 "CONFIG_0,CPU Core Configuration Register" bitfld.long 0x00 24.--27. " CFGTE ,Set instruction set for exception handling" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " CFGEND ,Set data endiannes during exception handling" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " VINITHI ,Set exception vector locations" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 3. " AA643AA32 ,Set register width state at cold reset" "32,64" bitfld.long 0x00 2. " AA642AA32 ,Set register width state at cold reset" "32,64" bitfld.long 0x00 1. " AA641AA32 ,Set register width state at cold reset" "32,64" bitfld.long 0x00 0. " AA640AA32 ,Set register width state at cold reset" "32,64" line.long 0x04 "CONFIG_1,L2 Configuration Register" bitfld.long 0x04 29. " L2RSTDISABLE ,Set whether to disable L2 cache invalidation at reset" "No,Yes" bitfld.long 0x04 28. " L1RSTDISABLE ,Set whether to disable L1 cache invalidation at reset" "No,Yes" bitfld.long 0x04 0.--3. " CP15DISABLE ,Set whether to disable write access to certain system registers" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x40++0x1F line.long 0x00 "RVBARADDR0L,Reset Vector Base Address" hexmask.long 0x00 2.--31. 0x04 " ADDR ,Vector base address[2:31]" line.long 0x04 "RVBARADDR0H,Reset Vector Base Address" hexmask.long.byte 0x04 0.--7. 1. " ADDR ,Vector base address[32:39]" line.long 0x08 "RVBARADDR1L,Reset Vector Base Address" hexmask.long 0x08 2.--31. 0x04 " ADDR ,Vector base address[2:31]" line.long 0x0C "RVBARADDR1H,Reset Vector Base Address" hexmask.long.byte 0x0C 0.--7. 1. " ADDR ,Vector base address[32:39]" line.long 0x10 "RVBARADDR2L,Reset Vector Base Address" hexmask.long 0x10 2.--31. 0x04 " ADDR ,Vector base address[2:31]" line.long 0x14 "RVBARADDR2H,Reset Vector Base Address" hexmask.long.byte 0x14 0.--7. 1. " ADDR ,Vector base address[32:39]" line.long 0x18 "RVBARADDR3L,Reset Vector Base Address" hexmask.long 0x18 2.--31. 0x04 " ADDR ,Vector base address[2:31]" line.long 0x1C "RVBARADDR3H,Reset Vector Base Address" hexmask.long.byte 0x1C 0.--7. 1. " ADDR ,Vector base address[32:39]" group.long 0x60++0x03 line.long 0x00 "ACE_CTRL,ACE Control Register" bitfld.long 0x00 16.--19. " AWQOS ,Set ACE outgoing AWQOS value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " ARQOS ,Set ACE outgoing ARQOS value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x80++0x03 line.long 0x00 "SNOOP_CTRL,Power Status Register" bitfld.long 0x00 4. " ACE_INACT ,Set ACE master interface to idle after all snoop transactions have been sent on ACE" "No idle,Idle" bitfld.long 0x00 0. " ACP_INACT ,Set the ACP interface to idle" "No idle,Idle" group.long 0x90++0x03 line.long 0x00 "PWRCTL,Power Status Register" bitfld.long 0x00 17. " CLREXMONREQ ,Clear external global exclusive monitor request and sent WFE event to all cores" "No effect,Clear" bitfld.long 0x00 16. " L2FLUSHREQ ,L2 hardware flush request" "Not requested,Requested" textline " " bitfld.long 0x00 3. " CPUPWRDWNREQ[3] ,Request to power down CPU3 island" "Not requested,Requested" bitfld.long 0x00 2. " [2] ,Request to power down CPU2 island" "Not requested,Requested" bitfld.long 0x00 1. " [1] ,Request to power down CPU1 island" "Not requested,Requested" bitfld.long 0x00 0. " [0] ,Request to power down CPU0 island" "Not requested,Requested" rgroup.long 0x94++0x03 line.long 0x00 "PWRSTAT,Power Status Register" bitfld.long 0x00 17. " CLREXMONACK ,Acknowledge the receipt of CLREXMONREQ" "Not occurred,Occurred" bitfld.long 0x00 16. " L2FLUSHDONE ,L2 hardware flush is done" "Not requested,Requested" textline " " bitfld.long 0x00 3. " DBGNOPWRDWN[3] ,Indicate that power must not be removed from CPU3 island" "No,Yes" bitfld.long 0x00 2. " [2] ,Indicate that power must not be removed from CPU2 island" "No,Yes" bitfld.long 0x00 1. " [1] ,Indicate that power must not be removed from CPU1 island" "No,Yes" bitfld.long 0x00 0. " [0] ,Indicate that power must not be removed from CPU0 island" "No,Yes" ; group.long 0x600++0x0F ; line.long 0x00 "XPD_REG0,Path Delay Block Pre-Load Value" ; line.long 0x04 "XPD_REG1,Path Delay Block Pre-Load Value" ; line.long 0x08 "XPD_CTRL0,Path Delay Control Register 0" ; bitfld.long 0x08 25.--29. " DELAY_SPARE ,Spare bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" ; bitfld.long 0x08 24. " CMP_SEL ,Select comparison" "Lunch register,Expected register" ; bitfld.long 0x08 19.--23. " DELAY_CELL_TYPE ,Delay chain cell type selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" ; textline " " ; bitfld.long 0x08 17.--18. " DELAY_VT_TYPE ,Delay chain VT type selection" "0,1,2,3" ; hexmask.long.word 0x08 6.--16. 1. " DELAY_VALUE ,Programmable delay block selection" ; bitfld.long 0x08 0.--5. " PATH_SEL ,Data path selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" ; line.long 0x0C "XPD_CTRL1,Path Delay Control Register 1" ; bitfld.long 0x0C 12.--15. " CLK_SPARE ,Clock spare bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" ; bitfld.long 0x0C 10.--11. " CLK_PHASE_SEL ,Clock edge selection for launch/capture" "0,1,2,3" ; bitfld.long 0x0C 8.--9. " CLK_VT_TYPE ,Clock cell VT selection" "0,1,2,3" ; textline " " ; bitfld.long 0x0C 6.--7. " CLK_CELL_TYPE ,Clock cell type selection" "0,1,2,3" ; bitfld.long 0x0C 2.--5. " CLK_INSERT_DLY ,Clock path insertion delay selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" ; bitfld.long 0x0C 0.--1. " CLK_SEL ,Clock selection for path delay block" "Clock 0,Clock 1,Clock 2," ; group.long 0x614++0x0F ; line.long 0x00 "XPD_CTRL2,Path Delay Control Register 2" ; bitfld.long 0x00 1.--2. " CTRL_SPARE ,Control spare bits" "0,1,2,3" ; bitfld.long 0x00 0. " ENABLE ,Enable path delay block" "Disabled,Enabled" ; line.long 0x04 "XPD_CTRL3,Path Delay Control Register 3" ; hexmask.long.word 0x04 3.--14. 1. " DCYCLE_CNT_VALUE ,Indicate dutycycle counter value" ; bitfld.long 0x04 2. " DCYCLE_HIGH_LOW ,Select high/low clock pulse" "Low,High" ; bitfld.long 0x04 1. " DCYCLE_CNT_CLR ,Clear duty cycle counter" "Disabled,Enabled" ; textline " " ; bitfld.long 0x04 0. " DCYCLE_START ,Enable duty cycle check" "Disabled,Enabled" ; line.long 0x08 "XPD_SOFT_RST,Path Delay Software reset register" ; bitfld.long 0x08 2. " CLK2 ,Software reset for clock source 2" "No reset,Reset" ; bitfld.long 0x08 1. " CLK1 ,Software reset for clock source 1" "No reset,Reset" ; bitfld.long 0x08 0. " CLK0 ,Software reset for clock source 0" "No reset,Reset" ; line.long 0x0C "XPD_STAT,Path Delay Status" ; bitfld.long 0x0C 1. " CMP_RESULT ,Indicate comparison result 0" "Failed,Passed" ; bitfld.long 0x0C 1. " CMP_DONE ,Indicate comparison status" "Not done,Done" width 0x0B tree.end tree "AXIPCIE (AXI to PCIe Bridge)" tree "DMA0" base ad:0xFD0F0000 width 17. group.long 0x00++0x3F line.long 0x00 "SRC_Q_PTR_LO,Queue Base Address Low" hexmask.long 0x00 6.--31. 0x40 " START_ADDR_LO ,Queue base address[31:6]" bitfld.long 0x00 2.--5. " READ_ATTR ,Queue read attributes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 1. " QUEUE_ENABLE ,Queue enable" "Disabled,Enabled" bitfld.long 0x00 0. " QUEUE_LOCATION ,Queue location" "0,1" line.long 0x04 "SRC_Q_PTR_HI,Queue Base Address High" line.long 0x08 "SRC_Q_SIZE,Queue Size" line.long 0x0C "SRC_Q_LIMIT,Queue Limit Pointer" line.long 0x10 "DST_Q_PTR_LO,Queue Base Address Low" hexmask.long 0x10 6.--31. 0x40 " START_ADDR_LO ,Queue base address[31:6]" bitfld.long 0x10 2.--5. " READ_ATTR ,Queue read attributes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 1. " QUEUE_ENABLE ,Queue enable" "Disabled,Enabled" bitfld.long 0x10 0. " QUEUE_LOCATION ,Queue location" "0,1" line.long 0x14 "DST_Q_PTR_HI,Queue Base Address High" line.long 0x18 "DST_Q_SIZE,Queue Size" line.long 0x1C "DST_Q_LIMIT,Queue Limit Pointer" line.long 0x20 "STAS_Q_PTR_LO,Queue Base Address Low" hexmask.long 0x20 6.--31. 0x40 " START_ADDR_LO ,Queue base address[31:6]" bitfld.long 0x20 2.--5. " READ_ATTR ,Queue read attributes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x20 1. " QUEUE_ENABLE ,Queue enable" "Disabled,Enabled" bitfld.long 0x20 0. " QUEUE_LOCATION ,Queue location" "0,1" line.long 0x24 "STAS_Q_PTR_HI,Queue Base Address High" line.long 0x28 "STAS_Q_SIZE,Queue Size" line.long 0x2C "STAS_Q_LIMIT,Queue Limit Pointer" line.long 0x30 "STAD_Q_PTR_LO,Queue Base Address Low" hexmask.long 0x30 6.--31. 0x40 " START_ADDR_LO ,Queue base address[31:6]" bitfld.long 0x30 2.--5. " READ_ATTR ,Queue read attributes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x30 1. " QUEUE_ENABLE ,Queue enable" "Disabled,Enabled" bitfld.long 0x30 0. " QUEUE_LOCATION ,Queue location" "0,1" line.long 0x34 "STAD_Q_PTR_HI,Queue Base Address High" line.long 0x38 "STAD_Q_SIZE,Queue Size" line.long 0x3C "STAD_Q_LIMIT,Queue Limit Pointer" if (((d.l(ad:0xFD0F0000+0x78))&0x01)==0x00) group.long 0x40++0x0F line.long 0x00 "SRC_Q_NEXT,Queue Next Pointer" line.long 0x04 "DST_Q_NEXT,Queue Next Pointer" line.long 0x08 "STAS_Q_NEXT,Queue Next Pointer" line.long 0x0C "STAD_Q_NEXT,Queue Next Pointer (Write Only To Initialize DMA Channel)" else rgroup.long 0x40++0x0F line.long 0x00 "SRC_Q_NEXT,Queue Next Pointer" line.long 0x04 "DST_Q_NEXT,Queue Next Pointer" line.long 0x08 "STAS_Q_NEXT,Queue Next Pointer" line.long 0x0C "STAD_Q_NEXT,Queue Next Pointer (Write Only To Initialize DMA Channel)" endif group.long 0x50++0x1F line.long 0x00 "SCRATCH0,Scratchpad Register 0" line.long 0x04 "SCRATCH1,Scratchpad Register 1" line.long 0x08 "SCRATCH2,Scratchpad Register 2" line.long 0x0C "SCRATCH3,Scratchpad Register 3" line.long 0x10 "PCIE_INT_CTRL,PCI Express Interrupt Control" hexmask.long.byte 0x10 16.--23. 1. " COALESCE_COUNT ,PCIe DMA SGL interrupt coalesce count" bitfld.long 0x10 2. " SGL_INT_EN ,PCIe enable DMA SGL interrupt event" "Disabled,Enabled" bitfld.long 0x10 1. " DMA_ERR_INT_EN ,PCIe enable DMA error interrupt event" "Disabled,Enabled" bitfld.long 0x10 0. " INTERRUPT_MASK ,PCIe interrupt enable" "Disabled,Enabled" line.long 0x14 "PCIE_INT_STATUS,PCI Express Interrupt Status" eventfld.long 0x14 3. " SOFTWARE_INT ,PCIe software interrupt status" "No interrupt,Interrupt" eventfld.long 0x14 2. " DMA_SGL_INT ,PCIe DMA SGL interrupt status" "No interrupt,Interrupt" eventfld.long 0x14 1. " DMA_ERROR_INT ,PCIe DMA error interrupt status" "No interrupt,Interrupt" line.long 0x18 "AXI_INT_CTRL,PCI Express Interrupt Control" hexmask.long.byte 0x18 16.--23. 1. " COALESCE_COUNT ,AXI DMA SGL interrupt coalesce count" bitfld.long 0x18 2. " SGL_INT_EN ,AXI enable DMA SGL interrupt event" "Disabled,Enabled" bitfld.long 0x18 1. " DMA_ERR_INT_EN ,AXI enable DMA error interrupt event" "Disabled,Enabled" bitfld.long 0x18 0. " INTERRUPT_MASK ,AXI interrupt enable" "Disabled,Enabled" line.long 0x1C "AXI_INT_STATUS,AXI Interrupt Status" eventfld.long 0x1C 3. " SOFTWARE_INT ,AXI software interrupt status" "No interrupt,Interrupt" eventfld.long 0x1C 2. " DMA_SGL_INT ,AXI DMA SGL interrupt status" "No interrupt,Interrupt" eventfld.long 0x1C 1. " DMA_ERROR_INT ,AXI DMA error interrupt status" "No interrupt,Interrupt" rgroup.long 0x70++0x07 line.long 0x00 "PCIE_INT_ASSERT,PCI Express Interrupt Assertion" bitfld.long 0x00 3. " PCIE_SOFT_INT ,PCIe software interrupt" "Not generated,Generated" line.long 0x04 "AXI_INT_ASSERT,AXI Interrupt Assertion" bitfld.long 0x04 3. " AXI_SOFT_INT ,AXI software interrupt" "Not generated,Generated" group.long 0x78++0x03 line.long 0x00 "DMA_CONTROL,DMA Channel Control" bitfld.long 0x00 2. " CMPL_STAT_Q_E_SZ ,DMA channel completion status queue element size" "0,1" bitfld.long 0x00 1. " DMA_RESET ,DMA channel reset" "Not reset,Reset" bitfld.long 0x00 0. " DMA_ENABLE ,DMA channel enable" "Disabled,Enabled" rgroup.long 0x7C++0x03 line.long 0x00 "DMA_STATUS,DMA Channel Status" bitfld.long 0x00 15. " CHANNEL_PRESENT ,DMA channel present" "Not present,Present" hexmask.long.word 0x00 4.--13. 1. " CHANNEL_NUMBER ,DMA channel number[9:0]" bitfld.long 0x00 0. " DMA_RUNNING ,DMA running" "Not running,Running" width 0x0B tree.end tree "DMA1" base ad:0xFD0F0080 width 17. group.long 0x00++0x3F line.long 0x00 "SRC_Q_PTR_LO,Queue Base Address Low" hexmask.long 0x00 6.--31. 0x40 " START_ADDR_LO ,Queue base address[31:6]" bitfld.long 0x00 2.--5. " READ_ATTR ,Queue read attributes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 1. " QUEUE_ENABLE ,Queue enable" "Disabled,Enabled" bitfld.long 0x00 0. " QUEUE_LOCATION ,Queue location" "0,1" line.long 0x04 "SRC_Q_PTR_HI,Queue Base Address High" line.long 0x08 "SRC_Q_SIZE,Queue Size" line.long 0x0C "SRC_Q_LIMIT,Queue Limit Pointer" line.long 0x10 "DST_Q_PTR_LO,Queue Base Address Low" hexmask.long 0x10 6.--31. 0x40 " START_ADDR_LO ,Queue base address[31:6]" bitfld.long 0x10 2.--5. " READ_ATTR ,Queue read attributes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 1. " QUEUE_ENABLE ,Queue enable" "Disabled,Enabled" bitfld.long 0x10 0. " QUEUE_LOCATION ,Queue location" "0,1" line.long 0x14 "DST_Q_PTR_HI,Queue Base Address High" line.long 0x18 "DST_Q_SIZE,Queue Size" line.long 0x1C "DST_Q_LIMIT,Queue Limit Pointer" line.long 0x20 "STAS_Q_PTR_LO,Queue Base Address Low" hexmask.long 0x20 6.--31. 0x40 " START_ADDR_LO ,Queue base address[31:6]" bitfld.long 0x20 2.--5. " READ_ATTR ,Queue read attributes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x20 1. " QUEUE_ENABLE ,Queue enable" "Disabled,Enabled" bitfld.long 0x20 0. " QUEUE_LOCATION ,Queue location" "0,1" line.long 0x24 "STAS_Q_PTR_HI,Queue Base Address High" line.long 0x28 "STAS_Q_SIZE,Queue Size" line.long 0x2C "STAS_Q_LIMIT,Queue Limit Pointer" line.long 0x30 "STAD_Q_PTR_LO,Queue Base Address Low" hexmask.long 0x30 6.--31. 0x40 " START_ADDR_LO ,Queue base address[31:6]" bitfld.long 0x30 2.--5. " READ_ATTR ,Queue read attributes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x30 1. " QUEUE_ENABLE ,Queue enable" "Disabled,Enabled" bitfld.long 0x30 0. " QUEUE_LOCATION ,Queue location" "0,1" line.long 0x34 "STAD_Q_PTR_HI,Queue Base Address High" line.long 0x38 "STAD_Q_SIZE,Queue Size" line.long 0x3C "STAD_Q_LIMIT,Queue Limit Pointer" if (((d.l(ad:0xFD0F0080+0x78))&0x01)==0x00) group.long 0x40++0x0F line.long 0x00 "SRC_Q_NEXT,Queue Next Pointer" line.long 0x04 "DST_Q_NEXT,Queue Next Pointer" line.long 0x08 "STAS_Q_NEXT,Queue Next Pointer" line.long 0x0C "STAD_Q_NEXT,Queue Next Pointer (Write Only To Initialize DMA Channel)" else rgroup.long 0x40++0x0F line.long 0x00 "SRC_Q_NEXT,Queue Next Pointer" line.long 0x04 "DST_Q_NEXT,Queue Next Pointer" line.long 0x08 "STAS_Q_NEXT,Queue Next Pointer" line.long 0x0C "STAD_Q_NEXT,Queue Next Pointer (Write Only To Initialize DMA Channel)" endif group.long 0x50++0x1F line.long 0x00 "SCRATCH0,Scratchpad Register 0" line.long 0x04 "SCRATCH1,Scratchpad Register 1" line.long 0x08 "SCRATCH2,Scratchpad Register 2" line.long 0x0C "SCRATCH3,Scratchpad Register 3" line.long 0x10 "PCIE_INT_CTRL,PCI Express Interrupt Control" hexmask.long.byte 0x10 16.--23. 1. " COALESCE_COUNT ,PCIe DMA SGL interrupt coalesce count" bitfld.long 0x10 2. " SGL_INT_EN ,PCIe enable DMA SGL interrupt event" "Disabled,Enabled" bitfld.long 0x10 1. " DMA_ERR_INT_EN ,PCIe enable DMA error interrupt event" "Disabled,Enabled" bitfld.long 0x10 0. " INTERRUPT_MASK ,PCIe interrupt enable" "Disabled,Enabled" line.long 0x14 "PCIE_INT_STATUS,PCI Express Interrupt Status" eventfld.long 0x14 3. " SOFTWARE_INT ,PCIe software interrupt status" "No interrupt,Interrupt" eventfld.long 0x14 2. " DMA_SGL_INT ,PCIe DMA SGL interrupt status" "No interrupt,Interrupt" eventfld.long 0x14 1. " DMA_ERROR_INT ,PCIe DMA error interrupt status" "No interrupt,Interrupt" line.long 0x18 "AXI_INT_CTRL,PCI Express Interrupt Control" hexmask.long.byte 0x18 16.--23. 1. " COALESCE_COUNT ,AXI DMA SGL interrupt coalesce count" bitfld.long 0x18 2. " SGL_INT_EN ,AXI enable DMA SGL interrupt event" "Disabled,Enabled" bitfld.long 0x18 1. " DMA_ERR_INT_EN ,AXI enable DMA error interrupt event" "Disabled,Enabled" bitfld.long 0x18 0. " INTERRUPT_MASK ,AXI interrupt enable" "Disabled,Enabled" line.long 0x1C "AXI_INT_STATUS,AXI Interrupt Status" eventfld.long 0x1C 3. " SOFTWARE_INT ,AXI software interrupt status" "No interrupt,Interrupt" eventfld.long 0x1C 2. " DMA_SGL_INT ,AXI DMA SGL interrupt status" "No interrupt,Interrupt" eventfld.long 0x1C 1. " DMA_ERROR_INT ,AXI DMA error interrupt status" "No interrupt,Interrupt" rgroup.long 0x70++0x07 line.long 0x00 "PCIE_INT_ASSERT,PCI Express Interrupt Assertion" bitfld.long 0x00 3. " PCIE_SOFT_INT ,PCIe software interrupt" "Not generated,Generated" line.long 0x04 "AXI_INT_ASSERT,AXI Interrupt Assertion" bitfld.long 0x04 3. " AXI_SOFT_INT ,AXI software interrupt" "Not generated,Generated" group.long 0x78++0x03 line.long 0x00 "DMA_CONTROL,DMA Channel Control" bitfld.long 0x00 2. " CMPL_STAT_Q_E_SZ ,DMA channel completion status queue element size" "0,1" bitfld.long 0x00 1. " DMA_RESET ,DMA channel reset" "Not reset,Reset" bitfld.long 0x00 0. " DMA_ENABLE ,DMA channel enable" "Disabled,Enabled" rgroup.long 0x7C++0x03 line.long 0x00 "DMA_STATUS,DMA Channel Status" bitfld.long 0x00 15. " CHANNEL_PRESENT ,DMA channel present" "Not present,Present" hexmask.long.word 0x00 4.--13. 1. " CHANNEL_NUMBER ,DMA channel number[9:0]" bitfld.long 0x00 0. " DMA_RUNNING ,DMA running" "Not running,Running" width 0x0B tree.end tree "DMA2" base ad:0xFD0F0100 width 17. group.long 0x00++0x3F line.long 0x00 "SRC_Q_PTR_LO,Queue Base Address Low" hexmask.long 0x00 6.--31. 0x40 " START_ADDR_LO ,Queue base address[31:6]" bitfld.long 0x00 2.--5. " READ_ATTR ,Queue read attributes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 1. " QUEUE_ENABLE ,Queue enable" "Disabled,Enabled" bitfld.long 0x00 0. " QUEUE_LOCATION ,Queue location" "0,1" line.long 0x04 "SRC_Q_PTR_HI,Queue Base Address High" line.long 0x08 "SRC_Q_SIZE,Queue Size" line.long 0x0C "SRC_Q_LIMIT,Queue Limit Pointer" line.long 0x10 "DST_Q_PTR_LO,Queue Base Address Low" hexmask.long 0x10 6.--31. 0x40 " START_ADDR_LO ,Queue base address[31:6]" bitfld.long 0x10 2.--5. " READ_ATTR ,Queue read attributes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 1. " QUEUE_ENABLE ,Queue enable" "Disabled,Enabled" bitfld.long 0x10 0. " QUEUE_LOCATION ,Queue location" "0,1" line.long 0x14 "DST_Q_PTR_HI,Queue Base Address High" line.long 0x18 "DST_Q_SIZE,Queue Size" line.long 0x1C "DST_Q_LIMIT,Queue Limit Pointer" line.long 0x20 "STAS_Q_PTR_LO,Queue Base Address Low" hexmask.long 0x20 6.--31. 0x40 " START_ADDR_LO ,Queue base address[31:6]" bitfld.long 0x20 2.--5. " READ_ATTR ,Queue read attributes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x20 1. " QUEUE_ENABLE ,Queue enable" "Disabled,Enabled" bitfld.long 0x20 0. " QUEUE_LOCATION ,Queue location" "0,1" line.long 0x24 "STAS_Q_PTR_HI,Queue Base Address High" line.long 0x28 "STAS_Q_SIZE,Queue Size" line.long 0x2C "STAS_Q_LIMIT,Queue Limit Pointer" line.long 0x30 "STAD_Q_PTR_LO,Queue Base Address Low" hexmask.long 0x30 6.--31. 0x40 " START_ADDR_LO ,Queue base address[31:6]" bitfld.long 0x30 2.--5. " READ_ATTR ,Queue read attributes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x30 1. " QUEUE_ENABLE ,Queue enable" "Disabled,Enabled" bitfld.long 0x30 0. " QUEUE_LOCATION ,Queue location" "0,1" line.long 0x34 "STAD_Q_PTR_HI,Queue Base Address High" line.long 0x38 "STAD_Q_SIZE,Queue Size" line.long 0x3C "STAD_Q_LIMIT,Queue Limit Pointer" if (((d.l(ad:0xFD0F0100+0x78))&0x01)==0x00) group.long 0x40++0x0F line.long 0x00 "SRC_Q_NEXT,Queue Next Pointer" line.long 0x04 "DST_Q_NEXT,Queue Next Pointer" line.long 0x08 "STAS_Q_NEXT,Queue Next Pointer" line.long 0x0C "STAD_Q_NEXT,Queue Next Pointer (Write Only To Initialize DMA Channel)" else rgroup.long 0x40++0x0F line.long 0x00 "SRC_Q_NEXT,Queue Next Pointer" line.long 0x04 "DST_Q_NEXT,Queue Next Pointer" line.long 0x08 "STAS_Q_NEXT,Queue Next Pointer" line.long 0x0C "STAD_Q_NEXT,Queue Next Pointer (Write Only To Initialize DMA Channel)" endif group.long 0x50++0x1F line.long 0x00 "SCRATCH0,Scratchpad Register 0" line.long 0x04 "SCRATCH1,Scratchpad Register 1" line.long 0x08 "SCRATCH2,Scratchpad Register 2" line.long 0x0C "SCRATCH3,Scratchpad Register 3" line.long 0x10 "PCIE_INT_CTRL,PCI Express Interrupt Control" hexmask.long.byte 0x10 16.--23. 1. " COALESCE_COUNT ,PCIe DMA SGL interrupt coalesce count" bitfld.long 0x10 2. " SGL_INT_EN ,PCIe enable DMA SGL interrupt event" "Disabled,Enabled" bitfld.long 0x10 1. " DMA_ERR_INT_EN ,PCIe enable DMA error interrupt event" "Disabled,Enabled" bitfld.long 0x10 0. " INTERRUPT_MASK ,PCIe interrupt enable" "Disabled,Enabled" line.long 0x14 "PCIE_INT_STATUS,PCI Express Interrupt Status" eventfld.long 0x14 3. " SOFTWARE_INT ,PCIe software interrupt status" "No interrupt,Interrupt" eventfld.long 0x14 2. " DMA_SGL_INT ,PCIe DMA SGL interrupt status" "No interrupt,Interrupt" eventfld.long 0x14 1. " DMA_ERROR_INT ,PCIe DMA error interrupt status" "No interrupt,Interrupt" line.long 0x18 "AXI_INT_CTRL,PCI Express Interrupt Control" hexmask.long.byte 0x18 16.--23. 1. " COALESCE_COUNT ,AXI DMA SGL interrupt coalesce count" bitfld.long 0x18 2. " SGL_INT_EN ,AXI enable DMA SGL interrupt event" "Disabled,Enabled" bitfld.long 0x18 1. " DMA_ERR_INT_EN ,AXI enable DMA error interrupt event" "Disabled,Enabled" bitfld.long 0x18 0. " INTERRUPT_MASK ,AXI interrupt enable" "Disabled,Enabled" line.long 0x1C "AXI_INT_STATUS,AXI Interrupt Status" eventfld.long 0x1C 3. " SOFTWARE_INT ,AXI software interrupt status" "No interrupt,Interrupt" eventfld.long 0x1C 2. " DMA_SGL_INT ,AXI DMA SGL interrupt status" "No interrupt,Interrupt" eventfld.long 0x1C 1. " DMA_ERROR_INT ,AXI DMA error interrupt status" "No interrupt,Interrupt" rgroup.long 0x70++0x07 line.long 0x00 "PCIE_INT_ASSERT,PCI Express Interrupt Assertion" bitfld.long 0x00 3. " PCIE_SOFT_INT ,PCIe software interrupt" "Not generated,Generated" line.long 0x04 "AXI_INT_ASSERT,AXI Interrupt Assertion" bitfld.long 0x04 3. " AXI_SOFT_INT ,AXI software interrupt" "Not generated,Generated" group.long 0x78++0x03 line.long 0x00 "DMA_CONTROL,DMA Channel Control" bitfld.long 0x00 2. " CMPL_STAT_Q_E_SZ ,DMA channel completion status queue element size" "0,1" bitfld.long 0x00 1. " DMA_RESET ,DMA channel reset" "Not reset,Reset" bitfld.long 0x00 0. " DMA_ENABLE ,DMA channel enable" "Disabled,Enabled" rgroup.long 0x7C++0x03 line.long 0x00 "DMA_STATUS,DMA Channel Status" bitfld.long 0x00 15. " CHANNEL_PRESENT ,DMA channel present" "Not present,Present" hexmask.long.word 0x00 4.--13. 1. " CHANNEL_NUMBER ,DMA channel number[9:0]" bitfld.long 0x00 0. " DMA_RUNNING ,DMA running" "Not running,Running" width 0x0B tree.end tree "DMA3" base ad:0xFD0F0180 width 17. group.long 0x00++0x3F line.long 0x00 "SRC_Q_PTR_LO,Queue Base Address Low" hexmask.long 0x00 6.--31. 0x40 " START_ADDR_LO ,Queue base address[31:6]" bitfld.long 0x00 2.--5. " READ_ATTR ,Queue read attributes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 1. " QUEUE_ENABLE ,Queue enable" "Disabled,Enabled" bitfld.long 0x00 0. " QUEUE_LOCATION ,Queue location" "0,1" line.long 0x04 "SRC_Q_PTR_HI,Queue Base Address High" line.long 0x08 "SRC_Q_SIZE,Queue Size" line.long 0x0C "SRC_Q_LIMIT,Queue Limit Pointer" line.long 0x10 "DST_Q_PTR_LO,Queue Base Address Low" hexmask.long 0x10 6.--31. 0x40 " START_ADDR_LO ,Queue base address[31:6]" bitfld.long 0x10 2.--5. " READ_ATTR ,Queue read attributes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 1. " QUEUE_ENABLE ,Queue enable" "Disabled,Enabled" bitfld.long 0x10 0. " QUEUE_LOCATION ,Queue location" "0,1" line.long 0x14 "DST_Q_PTR_HI,Queue Base Address High" line.long 0x18 "DST_Q_SIZE,Queue Size" line.long 0x1C "DST_Q_LIMIT,Queue Limit Pointer" line.long 0x20 "STAS_Q_PTR_LO,Queue Base Address Low" hexmask.long 0x20 6.--31. 0x40 " START_ADDR_LO ,Queue base address[31:6]" bitfld.long 0x20 2.--5. " READ_ATTR ,Queue read attributes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x20 1. " QUEUE_ENABLE ,Queue enable" "Disabled,Enabled" bitfld.long 0x20 0. " QUEUE_LOCATION ,Queue location" "0,1" line.long 0x24 "STAS_Q_PTR_HI,Queue Base Address High" line.long 0x28 "STAS_Q_SIZE,Queue Size" line.long 0x2C "STAS_Q_LIMIT,Queue Limit Pointer" line.long 0x30 "STAD_Q_PTR_LO,Queue Base Address Low" hexmask.long 0x30 6.--31. 0x40 " START_ADDR_LO ,Queue base address[31:6]" bitfld.long 0x30 2.--5. " READ_ATTR ,Queue read attributes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x30 1. " QUEUE_ENABLE ,Queue enable" "Disabled,Enabled" bitfld.long 0x30 0. " QUEUE_LOCATION ,Queue location" "0,1" line.long 0x34 "STAD_Q_PTR_HI,Queue Base Address High" line.long 0x38 "STAD_Q_SIZE,Queue Size" line.long 0x3C "STAD_Q_LIMIT,Queue Limit Pointer" if (((d.l(ad:0xFD0F0180+0x78))&0x01)==0x00) group.long 0x40++0x0F line.long 0x00 "SRC_Q_NEXT,Queue Next Pointer" line.long 0x04 "DST_Q_NEXT,Queue Next Pointer" line.long 0x08 "STAS_Q_NEXT,Queue Next Pointer" line.long 0x0C "STAD_Q_NEXT,Queue Next Pointer (Write Only To Initialize DMA Channel)" else rgroup.long 0x40++0x0F line.long 0x00 "SRC_Q_NEXT,Queue Next Pointer" line.long 0x04 "DST_Q_NEXT,Queue Next Pointer" line.long 0x08 "STAS_Q_NEXT,Queue Next Pointer" line.long 0x0C "STAD_Q_NEXT,Queue Next Pointer (Write Only To Initialize DMA Channel)" endif group.long 0x50++0x1F line.long 0x00 "SCRATCH0,Scratchpad Register 0" line.long 0x04 "SCRATCH1,Scratchpad Register 1" line.long 0x08 "SCRATCH2,Scratchpad Register 2" line.long 0x0C "SCRATCH3,Scratchpad Register 3" line.long 0x10 "PCIE_INT_CTRL,PCI Express Interrupt Control" hexmask.long.byte 0x10 16.--23. 1. " COALESCE_COUNT ,PCIe DMA SGL interrupt coalesce count" bitfld.long 0x10 2. " SGL_INT_EN ,PCIe enable DMA SGL interrupt event" "Disabled,Enabled" bitfld.long 0x10 1. " DMA_ERR_INT_EN ,PCIe enable DMA error interrupt event" "Disabled,Enabled" bitfld.long 0x10 0. " INTERRUPT_MASK ,PCIe interrupt enable" "Disabled,Enabled" line.long 0x14 "PCIE_INT_STATUS,PCI Express Interrupt Status" eventfld.long 0x14 3. " SOFTWARE_INT ,PCIe software interrupt status" "No interrupt,Interrupt" eventfld.long 0x14 2. " DMA_SGL_INT ,PCIe DMA SGL interrupt status" "No interrupt,Interrupt" eventfld.long 0x14 1. " DMA_ERROR_INT ,PCIe DMA error interrupt status" "No interrupt,Interrupt" line.long 0x18 "AXI_INT_CTRL,PCI Express Interrupt Control" hexmask.long.byte 0x18 16.--23. 1. " COALESCE_COUNT ,AXI DMA SGL interrupt coalesce count" bitfld.long 0x18 2. " SGL_INT_EN ,AXI enable DMA SGL interrupt event" "Disabled,Enabled" bitfld.long 0x18 1. " DMA_ERR_INT_EN ,AXI enable DMA error interrupt event" "Disabled,Enabled" bitfld.long 0x18 0. " INTERRUPT_MASK ,AXI interrupt enable" "Disabled,Enabled" line.long 0x1C "AXI_INT_STATUS,AXI Interrupt Status" eventfld.long 0x1C 3. " SOFTWARE_INT ,AXI software interrupt status" "No interrupt,Interrupt" eventfld.long 0x1C 2. " DMA_SGL_INT ,AXI DMA SGL interrupt status" "No interrupt,Interrupt" eventfld.long 0x1C 1. " DMA_ERROR_INT ,AXI DMA error interrupt status" "No interrupt,Interrupt" rgroup.long 0x70++0x07 line.long 0x00 "PCIE_INT_ASSERT,PCI Express Interrupt Assertion" bitfld.long 0x00 3. " PCIE_SOFT_INT ,PCIe software interrupt" "Not generated,Generated" line.long 0x04 "AXI_INT_ASSERT,AXI Interrupt Assertion" bitfld.long 0x04 3. " AXI_SOFT_INT ,AXI software interrupt" "Not generated,Generated" group.long 0x78++0x03 line.long 0x00 "DMA_CONTROL,DMA Channel Control" bitfld.long 0x00 2. " CMPL_STAT_Q_E_SZ ,DMA channel completion status queue element size" "0,1" bitfld.long 0x00 1. " DMA_RESET ,DMA channel reset" "Not reset,Reset" bitfld.long 0x00 0. " DMA_ENABLE ,DMA channel enable" "Disabled,Enabled" rgroup.long 0x7C++0x03 line.long 0x00 "DMA_STATUS,DMA Channel Status" bitfld.long 0x00 15. " CHANNEL_PRESENT ,DMA channel present" "Not present,Present" hexmask.long.word 0x00 4.--13. 1. " CHANNEL_NUMBER ,DMA channel number[9:0]" bitfld.long 0x00 0. " DMA_RUNNING ,DMA running" "Not running,Running" width 0x0B tree.end tree "Egress Address Channel Control and Status 0" base ad:0xFD0E0C00 width 14. rgroup.long 0x00++0x07 line.long 0x00 "CAPABILITIES,Egress AXI Translation - Capabilities" hexmask.long.byte 0x00 24.--31. 0x01 " EGRESS_SIZE_MAX ,Egress maximum size" hexmask.long.byte 0x00 16.--23. 0x01 " EGRESS_SIZE_OFFSET ,Egress size offset" bitfld.long 0x00 0. " EGRESS_PRESENT ,Translation presence indicator" "Not present,Present" line.long 0x04 "STATUS,Egress AXI Translation - Status" hexmask.long.word 0x04 16.--24. 1. " WR_PENDING_CTR ,Number of write transactions outstanding for this translation" hexmask.long.word 0x04 0.--8. 1. " RD_PENDING_CTR ,Number of read transactions outstanding for this translation" group.long 0x08++0x03 line.long 0x00 "CONTROL,Egress AXI Translation - Control" bitfld.long 0x00 28.--31. " EGRESS_ATTR_W ,Egress write attribute override" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. " EGRESS_ATTR_R ,Egress read attribute override" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 23. " EGRESS_ATTR_ENABLE ,Egress write/read attribute override enable" "Disabled,Enabled" bitfld.long 0x00 16.--20. " EGRESS_SIZE ,Translation size" "2^EGRESS_SIZE_OFFSET,2^(EGRESS_SIZE_OFFSET+1),2^(EGRESS_SIZE_OFFSET+2),2^(EGRESS_SIZE_OFFSET+3),2^(EGRESS_SIZE_OFFSET+4),2^(EGRESS_SIZE_OFFSET+5),2^(EGRESS_SIZE_OFFSET+6),2^(EGRESS_SIZE_OFFSET+7),2^(EGRESS_SIZE_OFFSET+8),2^(EGRESS_SIZE_OFFSET+9),2^(EGRESS_SIZE_OFFSET+10),2^(EGRESS_SIZE_OFFSET+11),2^(EGRESS_SIZE_OFFSET+12),2^(EGRESS_SIZE_OFFSET+13),2^(EGRESS_SIZE_OFFSET+14),2^(EGRESS_SIZE_OFFSET+15),2^(EGRESS_SIZE_OFFSET+16),2^(EGRESS_SIZE_OFFSET+17),2^(EGRESS_SIZE_OFFSET+18),2^(EGRESS_SIZE_OFFSET+19),2^(EGRESS_SIZE_OFFSET+20),2^(EGRESS_SIZE_OFFSET+21),2^(EGRESS_SIZE_OFFSET+22),2^(EGRESS_SIZE_OFFSET+23),2^(EGRESS_SIZE_OFFSET+24),2^(EGRESS_SIZE_OFFSET+25),2^(EGRESS_SIZE_OFFSET+26),2^(EGRESS_SIZE_OFFSET+27),2^(EGRESS_SIZE_OFFSET+28),2^(EGRESS_SIZE_OFFSET+29),2^(EGRESS_SIZE_OFFSET+30),2^(EGRESS_SIZE_OFFSET+31)" textline " " bitfld.long 0x00 3. " EGRESS_INVALID ,Translation invalidate enable" "Disabled,Enabled" bitfld.long 0x00 2. " EGRESS_SECURITY_EN ,Translation security enable" "Disabled,Enabled" bitfld.long 0x00 0. " EGRESS_EN ,Translation enable" "Disabled,Enabled" group.long 0x10++0x0F line.long 0x00 "SRC_BASE_LO,Egress AXI Translation - Source Address Low" hexmask.long.tbyte 0x00 12.--31. 0x10 " EGRESS_SRC_BASE_LO ,EGRESS_SRC_BASE[31:12]" line.long 0x04 "SRC_BASE_HI,Egress AXI Translation - Source Address High" line.long 0x08 "DST_BASE_LO,Egress AXI Translation - Destination Address Low" hexmask.long.tbyte 0x08 12.--31. 0x10 " EGRESS_DST_BASE_LO ,EGRESS_DST_BASE[31:12]" line.long 0x0C "DST_BASE_HI,Egress AXI Translation - Destination Address High" width 0xB tree.end tree "Egress Address Channel Control and Status 1" base ad:0xFD0E0C20 width 14. rgroup.long 0x00++0x07 line.long 0x00 "CAPABILITIES,Egress AXI Translation - Capabilities" hexmask.long.byte 0x00 24.--31. 0x01 " EGRESS_SIZE_MAX ,Egress maximum size" hexmask.long.byte 0x00 16.--23. 0x01 " EGRESS_SIZE_OFFSET ,Egress size offset" bitfld.long 0x00 0. " EGRESS_PRESENT ,Translation presence indicator" "Not present,Present" line.long 0x04 "STATUS,Egress AXI Translation - Status" hexmask.long.word 0x04 16.--24. 1. " WR_PENDING_CTR ,Number of write transactions outstanding for this translation" hexmask.long.word 0x04 0.--8. 1. " RD_PENDING_CTR ,Number of read transactions outstanding for this translation" group.long 0x08++0x03 line.long 0x00 "CONTROL,Egress AXI Translation - Control" bitfld.long 0x00 28.--31. " EGRESS_ATTR_W ,Egress write attribute override" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. " EGRESS_ATTR_R ,Egress read attribute override" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 23. " EGRESS_ATTR_ENABLE ,Egress write/read attribute override enable" "Disabled,Enabled" bitfld.long 0x00 16.--20. " EGRESS_SIZE ,Translation size" "2^EGRESS_SIZE_OFFSET,2^(EGRESS_SIZE_OFFSET+1),2^(EGRESS_SIZE_OFFSET+2),2^(EGRESS_SIZE_OFFSET+3),2^(EGRESS_SIZE_OFFSET+4),2^(EGRESS_SIZE_OFFSET+5),2^(EGRESS_SIZE_OFFSET+6),2^(EGRESS_SIZE_OFFSET+7),2^(EGRESS_SIZE_OFFSET+8),2^(EGRESS_SIZE_OFFSET+9),2^(EGRESS_SIZE_OFFSET+10),2^(EGRESS_SIZE_OFFSET+11),2^(EGRESS_SIZE_OFFSET+12),2^(EGRESS_SIZE_OFFSET+13),2^(EGRESS_SIZE_OFFSET+14),2^(EGRESS_SIZE_OFFSET+15),2^(EGRESS_SIZE_OFFSET+16),2^(EGRESS_SIZE_OFFSET+17),2^(EGRESS_SIZE_OFFSET+18),2^(EGRESS_SIZE_OFFSET+19),2^(EGRESS_SIZE_OFFSET+20),2^(EGRESS_SIZE_OFFSET+21),2^(EGRESS_SIZE_OFFSET+22),2^(EGRESS_SIZE_OFFSET+23),2^(EGRESS_SIZE_OFFSET+24),2^(EGRESS_SIZE_OFFSET+25),2^(EGRESS_SIZE_OFFSET+26),2^(EGRESS_SIZE_OFFSET+27),2^(EGRESS_SIZE_OFFSET+28),2^(EGRESS_SIZE_OFFSET+29),2^(EGRESS_SIZE_OFFSET+30),2^(EGRESS_SIZE_OFFSET+31)" textline " " bitfld.long 0x00 3. " EGRESS_INVALID ,Translation invalidate enable" "Disabled,Enabled" bitfld.long 0x00 2. " EGRESS_SECURITY_EN ,Translation security enable" "Disabled,Enabled" bitfld.long 0x00 0. " EGRESS_EN ,Translation enable" "Disabled,Enabled" group.long 0x10++0x0F line.long 0x00 "SRC_BASE_LO,Egress AXI Translation - Source Address Low" hexmask.long.tbyte 0x00 12.--31. 0x10 " EGRESS_SRC_BASE_LO ,EGRESS_SRC_BASE[31:12]" line.long 0x04 "SRC_BASE_HI,Egress AXI Translation - Source Address High" line.long 0x08 "DST_BASE_LO,Egress AXI Translation - Destination Address Low" hexmask.long.tbyte 0x08 12.--31. 0x10 " EGRESS_DST_BASE_LO ,EGRESS_DST_BASE[31:12]" line.long 0x0C "DST_BASE_HI,Egress AXI Translation - Destination Address High" width 0xB tree.end tree "Egress Address Channel Control and Status 2" base ad:0xFD0E0C40 width 14. rgroup.long 0x00++0x07 line.long 0x00 "CAPABILITIES,Egress AXI Translation - Capabilities" hexmask.long.byte 0x00 24.--31. 0x01 " EGRESS_SIZE_MAX ,Egress maximum size" hexmask.long.byte 0x00 16.--23. 0x01 " EGRESS_SIZE_OFFSET ,Egress size offset" bitfld.long 0x00 0. " EGRESS_PRESENT ,Translation presence indicator" "Not present,Present" line.long 0x04 "STATUS,Egress AXI Translation - Status" hexmask.long.word 0x04 16.--24. 1. " WR_PENDING_CTR ,Number of write transactions outstanding for this translation" hexmask.long.word 0x04 0.--8. 1. " RD_PENDING_CTR ,Number of read transactions outstanding for this translation" group.long 0x08++0x03 line.long 0x00 "CONTROL,Egress AXI Translation - Control" bitfld.long 0x00 28.--31. " EGRESS_ATTR_W ,Egress write attribute override" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. " EGRESS_ATTR_R ,Egress read attribute override" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 23. " EGRESS_ATTR_ENABLE ,Egress write/read attribute override enable" "Disabled,Enabled" bitfld.long 0x00 16.--20. " EGRESS_SIZE ,Translation size" "2^EGRESS_SIZE_OFFSET,2^(EGRESS_SIZE_OFFSET+1),2^(EGRESS_SIZE_OFFSET+2),2^(EGRESS_SIZE_OFFSET+3),2^(EGRESS_SIZE_OFFSET+4),2^(EGRESS_SIZE_OFFSET+5),2^(EGRESS_SIZE_OFFSET+6),2^(EGRESS_SIZE_OFFSET+7),2^(EGRESS_SIZE_OFFSET+8),2^(EGRESS_SIZE_OFFSET+9),2^(EGRESS_SIZE_OFFSET+10),2^(EGRESS_SIZE_OFFSET+11),2^(EGRESS_SIZE_OFFSET+12),2^(EGRESS_SIZE_OFFSET+13),2^(EGRESS_SIZE_OFFSET+14),2^(EGRESS_SIZE_OFFSET+15),2^(EGRESS_SIZE_OFFSET+16),2^(EGRESS_SIZE_OFFSET+17),2^(EGRESS_SIZE_OFFSET+18),2^(EGRESS_SIZE_OFFSET+19),2^(EGRESS_SIZE_OFFSET+20),2^(EGRESS_SIZE_OFFSET+21),2^(EGRESS_SIZE_OFFSET+22),2^(EGRESS_SIZE_OFFSET+23),2^(EGRESS_SIZE_OFFSET+24),2^(EGRESS_SIZE_OFFSET+25),2^(EGRESS_SIZE_OFFSET+26),2^(EGRESS_SIZE_OFFSET+27),2^(EGRESS_SIZE_OFFSET+28),2^(EGRESS_SIZE_OFFSET+29),2^(EGRESS_SIZE_OFFSET+30),2^(EGRESS_SIZE_OFFSET+31)" textline " " bitfld.long 0x00 3. " EGRESS_INVALID ,Translation invalidate enable" "Disabled,Enabled" bitfld.long 0x00 2. " EGRESS_SECURITY_EN ,Translation security enable" "Disabled,Enabled" bitfld.long 0x00 0. " EGRESS_EN ,Translation enable" "Disabled,Enabled" group.long 0x10++0x0F line.long 0x00 "SRC_BASE_LO,Egress AXI Translation - Source Address Low" hexmask.long.tbyte 0x00 12.--31. 0x10 " EGRESS_SRC_BASE_LO ,EGRESS_SRC_BASE[31:12]" line.long 0x04 "SRC_BASE_HI,Egress AXI Translation - Source Address High" line.long 0x08 "DST_BASE_LO,Egress AXI Translation - Destination Address Low" hexmask.long.tbyte 0x08 12.--31. 0x10 " EGRESS_DST_BASE_LO ,EGRESS_DST_BASE[31:12]" line.long 0x0C "DST_BASE_HI,Egress AXI Translation - Destination Address High" width 0xB tree.end tree "Egress Address Channel Control and Status 3" base ad:0xFD0E0C60 width 14. rgroup.long 0x00++0x07 line.long 0x00 "CAPABILITIES,Egress AXI Translation - Capabilities" hexmask.long.byte 0x00 24.--31. 0x01 " EGRESS_SIZE_MAX ,Egress maximum size" hexmask.long.byte 0x00 16.--23. 0x01 " EGRESS_SIZE_OFFSET ,Egress size offset" bitfld.long 0x00 0. " EGRESS_PRESENT ,Translation presence indicator" "Not present,Present" line.long 0x04 "STATUS,Egress AXI Translation - Status" hexmask.long.word 0x04 16.--24. 1. " WR_PENDING_CTR ,Number of write transactions outstanding for this translation" hexmask.long.word 0x04 0.--8. 1. " RD_PENDING_CTR ,Number of read transactions outstanding for this translation" group.long 0x08++0x03 line.long 0x00 "CONTROL,Egress AXI Translation - Control" bitfld.long 0x00 28.--31. " EGRESS_ATTR_W ,Egress write attribute override" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. " EGRESS_ATTR_R ,Egress read attribute override" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 23. " EGRESS_ATTR_ENABLE ,Egress write/read attribute override enable" "Disabled,Enabled" bitfld.long 0x00 16.--20. " EGRESS_SIZE ,Translation size" "2^EGRESS_SIZE_OFFSET,2^(EGRESS_SIZE_OFFSET+1),2^(EGRESS_SIZE_OFFSET+2),2^(EGRESS_SIZE_OFFSET+3),2^(EGRESS_SIZE_OFFSET+4),2^(EGRESS_SIZE_OFFSET+5),2^(EGRESS_SIZE_OFFSET+6),2^(EGRESS_SIZE_OFFSET+7),2^(EGRESS_SIZE_OFFSET+8),2^(EGRESS_SIZE_OFFSET+9),2^(EGRESS_SIZE_OFFSET+10),2^(EGRESS_SIZE_OFFSET+11),2^(EGRESS_SIZE_OFFSET+12),2^(EGRESS_SIZE_OFFSET+13),2^(EGRESS_SIZE_OFFSET+14),2^(EGRESS_SIZE_OFFSET+15),2^(EGRESS_SIZE_OFFSET+16),2^(EGRESS_SIZE_OFFSET+17),2^(EGRESS_SIZE_OFFSET+18),2^(EGRESS_SIZE_OFFSET+19),2^(EGRESS_SIZE_OFFSET+20),2^(EGRESS_SIZE_OFFSET+21),2^(EGRESS_SIZE_OFFSET+22),2^(EGRESS_SIZE_OFFSET+23),2^(EGRESS_SIZE_OFFSET+24),2^(EGRESS_SIZE_OFFSET+25),2^(EGRESS_SIZE_OFFSET+26),2^(EGRESS_SIZE_OFFSET+27),2^(EGRESS_SIZE_OFFSET+28),2^(EGRESS_SIZE_OFFSET+29),2^(EGRESS_SIZE_OFFSET+30),2^(EGRESS_SIZE_OFFSET+31)" textline " " bitfld.long 0x00 3. " EGRESS_INVALID ,Translation invalidate enable" "Disabled,Enabled" bitfld.long 0x00 2. " EGRESS_SECURITY_EN ,Translation security enable" "Disabled,Enabled" bitfld.long 0x00 0. " EGRESS_EN ,Translation enable" "Disabled,Enabled" group.long 0x10++0x0F line.long 0x00 "SRC_BASE_LO,Egress AXI Translation - Source Address Low" hexmask.long.tbyte 0x00 12.--31. 0x10 " EGRESS_SRC_BASE_LO ,EGRESS_SRC_BASE[31:12]" line.long 0x04 "SRC_BASE_HI,Egress AXI Translation - Source Address High" line.long 0x08 "DST_BASE_LO,Egress AXI Translation - Destination Address Low" hexmask.long.tbyte 0x08 12.--31. 0x10 " EGRESS_DST_BASE_LO ,EGRESS_DST_BASE[31:12]" line.long 0x0C "DST_BASE_HI,Egress AXI Translation - Destination Address High" width 0xB tree.end tree "Egress Address Channel Control and Status 4" base ad:0xFD0E0C80 width 14. rgroup.long 0x00++0x07 line.long 0x00 "CAPABILITIES,Egress AXI Translation - Capabilities" hexmask.long.byte 0x00 24.--31. 0x01 " EGRESS_SIZE_MAX ,Egress maximum size" hexmask.long.byte 0x00 16.--23. 0x01 " EGRESS_SIZE_OFFSET ,Egress size offset" bitfld.long 0x00 0. " EGRESS_PRESENT ,Translation presence indicator" "Not present,Present" line.long 0x04 "STATUS,Egress AXI Translation - Status" hexmask.long.word 0x04 16.--24. 1. " WR_PENDING_CTR ,Number of write transactions outstanding for this translation" hexmask.long.word 0x04 0.--8. 1. " RD_PENDING_CTR ,Number of read transactions outstanding for this translation" group.long 0x08++0x03 line.long 0x00 "CONTROL,Egress AXI Translation - Control" bitfld.long 0x00 28.--31. " EGRESS_ATTR_W ,Egress write attribute override" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. " EGRESS_ATTR_R ,Egress read attribute override" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 23. " EGRESS_ATTR_ENABLE ,Egress write/read attribute override enable" "Disabled,Enabled" bitfld.long 0x00 16.--20. " EGRESS_SIZE ,Translation size" "2^EGRESS_SIZE_OFFSET,2^(EGRESS_SIZE_OFFSET+1),2^(EGRESS_SIZE_OFFSET+2),2^(EGRESS_SIZE_OFFSET+3),2^(EGRESS_SIZE_OFFSET+4),2^(EGRESS_SIZE_OFFSET+5),2^(EGRESS_SIZE_OFFSET+6),2^(EGRESS_SIZE_OFFSET+7),2^(EGRESS_SIZE_OFFSET+8),2^(EGRESS_SIZE_OFFSET+9),2^(EGRESS_SIZE_OFFSET+10),2^(EGRESS_SIZE_OFFSET+11),2^(EGRESS_SIZE_OFFSET+12),2^(EGRESS_SIZE_OFFSET+13),2^(EGRESS_SIZE_OFFSET+14),2^(EGRESS_SIZE_OFFSET+15),2^(EGRESS_SIZE_OFFSET+16),2^(EGRESS_SIZE_OFFSET+17),2^(EGRESS_SIZE_OFFSET+18),2^(EGRESS_SIZE_OFFSET+19),2^(EGRESS_SIZE_OFFSET+20),2^(EGRESS_SIZE_OFFSET+21),2^(EGRESS_SIZE_OFFSET+22),2^(EGRESS_SIZE_OFFSET+23),2^(EGRESS_SIZE_OFFSET+24),2^(EGRESS_SIZE_OFFSET+25),2^(EGRESS_SIZE_OFFSET+26),2^(EGRESS_SIZE_OFFSET+27),2^(EGRESS_SIZE_OFFSET+28),2^(EGRESS_SIZE_OFFSET+29),2^(EGRESS_SIZE_OFFSET+30),2^(EGRESS_SIZE_OFFSET+31)" textline " " bitfld.long 0x00 3. " EGRESS_INVALID ,Translation invalidate enable" "Disabled,Enabled" bitfld.long 0x00 2. " EGRESS_SECURITY_EN ,Translation security enable" "Disabled,Enabled" bitfld.long 0x00 0. " EGRESS_EN ,Translation enable" "Disabled,Enabled" group.long 0x10++0x0F line.long 0x00 "SRC_BASE_LO,Egress AXI Translation - Source Address Low" hexmask.long.tbyte 0x00 12.--31. 0x10 " EGRESS_SRC_BASE_LO ,EGRESS_SRC_BASE[31:12]" line.long 0x04 "SRC_BASE_HI,Egress AXI Translation - Source Address High" line.long 0x08 "DST_BASE_LO,Egress AXI Translation - Destination Address Low" hexmask.long.tbyte 0x08 12.--31. 0x10 " EGRESS_DST_BASE_LO ,EGRESS_DST_BASE[31:12]" line.long 0x0C "DST_BASE_HI,Egress AXI Translation - Destination Address High" width 0xB tree.end tree "Egress Address Channel Control and Status 5" base ad:0xFD0E0CA0 width 14. rgroup.long 0x00++0x07 line.long 0x00 "CAPABILITIES,Egress AXI Translation - Capabilities" hexmask.long.byte 0x00 24.--31. 0x01 " EGRESS_SIZE_MAX ,Egress maximum size" hexmask.long.byte 0x00 16.--23. 0x01 " EGRESS_SIZE_OFFSET ,Egress size offset" bitfld.long 0x00 0. " EGRESS_PRESENT ,Translation presence indicator" "Not present,Present" line.long 0x04 "STATUS,Egress AXI Translation - Status" hexmask.long.word 0x04 16.--24. 1. " WR_PENDING_CTR ,Number of write transactions outstanding for this translation" hexmask.long.word 0x04 0.--8. 1. " RD_PENDING_CTR ,Number of read transactions outstanding for this translation" group.long 0x08++0x03 line.long 0x00 "CONTROL,Egress AXI Translation - Control" bitfld.long 0x00 28.--31. " EGRESS_ATTR_W ,Egress write attribute override" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. " EGRESS_ATTR_R ,Egress read attribute override" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 23. " EGRESS_ATTR_ENABLE ,Egress write/read attribute override enable" "Disabled,Enabled" bitfld.long 0x00 16.--20. " EGRESS_SIZE ,Translation size" "2^EGRESS_SIZE_OFFSET,2^(EGRESS_SIZE_OFFSET+1),2^(EGRESS_SIZE_OFFSET+2),2^(EGRESS_SIZE_OFFSET+3),2^(EGRESS_SIZE_OFFSET+4),2^(EGRESS_SIZE_OFFSET+5),2^(EGRESS_SIZE_OFFSET+6),2^(EGRESS_SIZE_OFFSET+7),2^(EGRESS_SIZE_OFFSET+8),2^(EGRESS_SIZE_OFFSET+9),2^(EGRESS_SIZE_OFFSET+10),2^(EGRESS_SIZE_OFFSET+11),2^(EGRESS_SIZE_OFFSET+12),2^(EGRESS_SIZE_OFFSET+13),2^(EGRESS_SIZE_OFFSET+14),2^(EGRESS_SIZE_OFFSET+15),2^(EGRESS_SIZE_OFFSET+16),2^(EGRESS_SIZE_OFFSET+17),2^(EGRESS_SIZE_OFFSET+18),2^(EGRESS_SIZE_OFFSET+19),2^(EGRESS_SIZE_OFFSET+20),2^(EGRESS_SIZE_OFFSET+21),2^(EGRESS_SIZE_OFFSET+22),2^(EGRESS_SIZE_OFFSET+23),2^(EGRESS_SIZE_OFFSET+24),2^(EGRESS_SIZE_OFFSET+25),2^(EGRESS_SIZE_OFFSET+26),2^(EGRESS_SIZE_OFFSET+27),2^(EGRESS_SIZE_OFFSET+28),2^(EGRESS_SIZE_OFFSET+29),2^(EGRESS_SIZE_OFFSET+30),2^(EGRESS_SIZE_OFFSET+31)" textline " " bitfld.long 0x00 3. " EGRESS_INVALID ,Translation invalidate enable" "Disabled,Enabled" bitfld.long 0x00 2. " EGRESS_SECURITY_EN ,Translation security enable" "Disabled,Enabled" bitfld.long 0x00 0. " EGRESS_EN ,Translation enable" "Disabled,Enabled" group.long 0x10++0x0F line.long 0x00 "SRC_BASE_LO,Egress AXI Translation - Source Address Low" hexmask.long.tbyte 0x00 12.--31. 0x10 " EGRESS_SRC_BASE_LO ,EGRESS_SRC_BASE[31:12]" line.long 0x04 "SRC_BASE_HI,Egress AXI Translation - Source Address High" line.long 0x08 "DST_BASE_LO,Egress AXI Translation - Destination Address Low" hexmask.long.tbyte 0x08 12.--31. 0x10 " EGRESS_DST_BASE_LO ,EGRESS_DST_BASE[31:12]" line.long 0x0C "DST_BASE_HI,Egress AXI Translation - Destination Address High" width 0xB tree.end tree "Egress Address Channel Control and Status 6" base ad:0xFD0E0CC0 width 14. rgroup.long 0x00++0x07 line.long 0x00 "CAPABILITIES,Egress AXI Translation - Capabilities" hexmask.long.byte 0x00 24.--31. 0x01 " EGRESS_SIZE_MAX ,Egress maximum size" hexmask.long.byte 0x00 16.--23. 0x01 " EGRESS_SIZE_OFFSET ,Egress size offset" bitfld.long 0x00 0. " EGRESS_PRESENT ,Translation presence indicator" "Not present,Present" line.long 0x04 "STATUS,Egress AXI Translation - Status" hexmask.long.word 0x04 16.--24. 1. " WR_PENDING_CTR ,Number of write transactions outstanding for this translation" hexmask.long.word 0x04 0.--8. 1. " RD_PENDING_CTR ,Number of read transactions outstanding for this translation" group.long 0x08++0x03 line.long 0x00 "CONTROL,Egress AXI Translation - Control" bitfld.long 0x00 28.--31. " EGRESS_ATTR_W ,Egress write attribute override" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. " EGRESS_ATTR_R ,Egress read attribute override" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 23. " EGRESS_ATTR_ENABLE ,Egress write/read attribute override enable" "Disabled,Enabled" bitfld.long 0x00 16.--20. " EGRESS_SIZE ,Translation size" "2^EGRESS_SIZE_OFFSET,2^(EGRESS_SIZE_OFFSET+1),2^(EGRESS_SIZE_OFFSET+2),2^(EGRESS_SIZE_OFFSET+3),2^(EGRESS_SIZE_OFFSET+4),2^(EGRESS_SIZE_OFFSET+5),2^(EGRESS_SIZE_OFFSET+6),2^(EGRESS_SIZE_OFFSET+7),2^(EGRESS_SIZE_OFFSET+8),2^(EGRESS_SIZE_OFFSET+9),2^(EGRESS_SIZE_OFFSET+10),2^(EGRESS_SIZE_OFFSET+11),2^(EGRESS_SIZE_OFFSET+12),2^(EGRESS_SIZE_OFFSET+13),2^(EGRESS_SIZE_OFFSET+14),2^(EGRESS_SIZE_OFFSET+15),2^(EGRESS_SIZE_OFFSET+16),2^(EGRESS_SIZE_OFFSET+17),2^(EGRESS_SIZE_OFFSET+18),2^(EGRESS_SIZE_OFFSET+19),2^(EGRESS_SIZE_OFFSET+20),2^(EGRESS_SIZE_OFFSET+21),2^(EGRESS_SIZE_OFFSET+22),2^(EGRESS_SIZE_OFFSET+23),2^(EGRESS_SIZE_OFFSET+24),2^(EGRESS_SIZE_OFFSET+25),2^(EGRESS_SIZE_OFFSET+26),2^(EGRESS_SIZE_OFFSET+27),2^(EGRESS_SIZE_OFFSET+28),2^(EGRESS_SIZE_OFFSET+29),2^(EGRESS_SIZE_OFFSET+30),2^(EGRESS_SIZE_OFFSET+31)" textline " " bitfld.long 0x00 3. " EGRESS_INVALID ,Translation invalidate enable" "Disabled,Enabled" bitfld.long 0x00 2. " EGRESS_SECURITY_EN ,Translation security enable" "Disabled,Enabled" bitfld.long 0x00 0. " EGRESS_EN ,Translation enable" "Disabled,Enabled" group.long 0x10++0x0F line.long 0x00 "SRC_BASE_LO,Egress AXI Translation - Source Address Low" hexmask.long.tbyte 0x00 12.--31. 0x10 " EGRESS_SRC_BASE_LO ,EGRESS_SRC_BASE[31:12]" line.long 0x04 "SRC_BASE_HI,Egress AXI Translation - Source Address High" line.long 0x08 "DST_BASE_LO,Egress AXI Translation - Destination Address Low" hexmask.long.tbyte 0x08 12.--31. 0x10 " EGRESS_DST_BASE_LO ,EGRESS_DST_BASE[31:12]" line.long 0x0C "DST_BASE_HI,Egress AXI Translation - Destination Address High" width 0xB tree.end tree "Egress Address Channel Control and Status 7" base ad:0xFD0E0CE0 width 14. rgroup.long 0x00++0x07 line.long 0x00 "CAPABILITIES,Egress AXI Translation - Capabilities" hexmask.long.byte 0x00 24.--31. 0x01 " EGRESS_SIZE_MAX ,Egress maximum size" hexmask.long.byte 0x00 16.--23. 0x01 " EGRESS_SIZE_OFFSET ,Egress size offset" bitfld.long 0x00 0. " EGRESS_PRESENT ,Translation presence indicator" "Not present,Present" line.long 0x04 "STATUS,Egress AXI Translation - Status" hexmask.long.word 0x04 16.--24. 1. " WR_PENDING_CTR ,Number of write transactions outstanding for this translation" hexmask.long.word 0x04 0.--8. 1. " RD_PENDING_CTR ,Number of read transactions outstanding for this translation" group.long 0x08++0x03 line.long 0x00 "CONTROL,Egress AXI Translation - Control" bitfld.long 0x00 28.--31. " EGRESS_ATTR_W ,Egress write attribute override" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. " EGRESS_ATTR_R ,Egress read attribute override" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 23. " EGRESS_ATTR_ENABLE ,Egress write/read attribute override enable" "Disabled,Enabled" bitfld.long 0x00 16.--20. " EGRESS_SIZE ,Translation size" "2^EGRESS_SIZE_OFFSET,2^(EGRESS_SIZE_OFFSET+1),2^(EGRESS_SIZE_OFFSET+2),2^(EGRESS_SIZE_OFFSET+3),2^(EGRESS_SIZE_OFFSET+4),2^(EGRESS_SIZE_OFFSET+5),2^(EGRESS_SIZE_OFFSET+6),2^(EGRESS_SIZE_OFFSET+7),2^(EGRESS_SIZE_OFFSET+8),2^(EGRESS_SIZE_OFFSET+9),2^(EGRESS_SIZE_OFFSET+10),2^(EGRESS_SIZE_OFFSET+11),2^(EGRESS_SIZE_OFFSET+12),2^(EGRESS_SIZE_OFFSET+13),2^(EGRESS_SIZE_OFFSET+14),2^(EGRESS_SIZE_OFFSET+15),2^(EGRESS_SIZE_OFFSET+16),2^(EGRESS_SIZE_OFFSET+17),2^(EGRESS_SIZE_OFFSET+18),2^(EGRESS_SIZE_OFFSET+19),2^(EGRESS_SIZE_OFFSET+20),2^(EGRESS_SIZE_OFFSET+21),2^(EGRESS_SIZE_OFFSET+22),2^(EGRESS_SIZE_OFFSET+23),2^(EGRESS_SIZE_OFFSET+24),2^(EGRESS_SIZE_OFFSET+25),2^(EGRESS_SIZE_OFFSET+26),2^(EGRESS_SIZE_OFFSET+27),2^(EGRESS_SIZE_OFFSET+28),2^(EGRESS_SIZE_OFFSET+29),2^(EGRESS_SIZE_OFFSET+30),2^(EGRESS_SIZE_OFFSET+31)" textline " " bitfld.long 0x00 3. " EGRESS_INVALID ,Translation invalidate enable" "Disabled,Enabled" bitfld.long 0x00 2. " EGRESS_SECURITY_EN ,Translation security enable" "Disabled,Enabled" bitfld.long 0x00 0. " EGRESS_EN ,Translation enable" "Disabled,Enabled" group.long 0x10++0x0F line.long 0x00 "SRC_BASE_LO,Egress AXI Translation - Source Address Low" hexmask.long.tbyte 0x00 12.--31. 0x10 " EGRESS_SRC_BASE_LO ,EGRESS_SRC_BASE[31:12]" line.long 0x04 "SRC_BASE_HI,Egress AXI Translation - Source Address High" line.long 0x08 "DST_BASE_LO,Egress AXI Translation - Destination Address Low" hexmask.long.tbyte 0x08 12.--31. 0x10 " EGRESS_DST_BASE_LO ,EGRESS_DST_BASE[31:12]" line.long 0x0C "DST_BASE_HI,Egress AXI Translation - Destination Address High" width 0xB tree.end tree "Ingress Address Channel Control and Status 0" base ad:0xFD0E0800 width 14. rgroup.long 0x00++0x07 line.long 0x00 "CAPABILITIES,Ingress AXI Translation - Capabilities" hexmask.long.byte 0x00 24.--31. 0x01 " INGRESS_SIZE_MAX ,Ingress maximum size" hexmask.long.byte 0x00 16.--23. 0x01 " INGRESS_SIZE_OFFSET ,Ingress size offset" bitfld.long 0x00 0. " INGRESS_PRESENT ,Translation presence indicator" "Not present,Present" line.long 0x04 "STATUS,Ingress AXI Translation - Status" hexmask.long.word 0x04 16.--24. 1. " WR_PENDING_CTR ,Number of write transactions outstanding for this translation" hexmask.long.word 0x04 0.--8. 1. " RD_PENDING_CTR ,Number of read transactions outstanding for this translation" group.long 0x08++0x03 line.long 0x00 "CONTROL,Ingress AXI Translation - Control" bitfld.long 0x00 28.--31. " INGRESS_ATTR_W ,Ingress write attribute override" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. " INGRESS_ATTR_R ,Ingress read attribute override" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 23. " INGRESS_ATTR_ENABLE ,Ingress write/read attribute override enable" "Disabled,Enabled" bitfld.long 0x00 16.--20. " INGRESS_SIZE ,Translation size" "2^INGRESS_SIZE_OFFSET,2^(INGRESS_SIZE_OFFSET+1),2^(INGRESS_SIZE_OFFSET+2),2^(INGRESS_SIZE_OFFSET+3),2^(INGRESS_SIZE_OFFSET+4),2^(INGRESS_SIZE_OFFSET+5),2^(INGRESS_SIZE_OFFSET+6),2^(INGRESS_SIZE_OFFSET+7),2^(INGRESS_SIZE_OFFSET+8),2^(INGRESS_SIZE_OFFSET+9),2^(INGRESS_SIZE_OFFSET+10),2^(INGRESS_SIZE_OFFSET+11),2^(INGRESS_SIZE_OFFSET+12),2^(INGRESS_SIZE_OFFSET+13),2^(INGRESS_SIZE_OFFSET+14),2^(INGRESS_SIZE_OFFSET+15),2^(INGRESS_SIZE_OFFSET+16),2^(INGRESS_SIZE_OFFSET+17),2^(INGRESS_SIZE_OFFSET+18),2^(INGRESS_SIZE_OFFSET+19),2^(INGRESS_SIZE_OFFSET+20),2^(INGRESS_SIZE_OFFSET+21),2^(INGRESS_SIZE_OFFSET+22),2^(INGRESS_SIZE_OFFSET+23),2^(INGRESS_SIZE_OFFSET+24),2^(INGRESS_SIZE_OFFSET+25),2^(INGRESS_SIZE_OFFSET+26),2^(INGRESS_SIZE_OFFSET+27),2^(INGRESS_SIZE_OFFSET+28),2^(INGRESS_SIZE_OFFSET+29),2^(INGRESS_SIZE_OFFSET+30),2^(INGRESS_SIZE_OFFSET+31)" textline " " bitfld.long 0x00 3. " INGRESS_INVALID ,Translation invalidate enable" "Disabled,Enabled" bitfld.long 0x00 2. " INGRESS_SECURITY_EN ,Translation security enable" "Disabled,Enabled" bitfld.long 0x00 0. " INGRESS_EN ,Translation enable" "Disabled,Enabled" group.long 0x10++0x0F line.long 0x00 "SRC_BASE_LO,Ingress AXI Translation - Source Address Low" hexmask.long.tbyte 0x00 12.--31. 0x10 " INGRESS_SRC_BASE_LO ,INGRESS_SRC_BASE[31:12]" line.long 0x04 "SRC_BASE_HI,Ingress AXI Translation - Source Address High" line.long 0x08 "DST_BASE_LO,Ingress AXI Translation - Destination Address Low" hexmask.long.tbyte 0x08 12.--31. 0x10 " INGRESS_DST_BASE_LO ,INGRESS_DST_BASE[31:12]" line.long 0x0C "DST_BASE_HI,Ingress AXI Translation - Destination Address High" width 0xB tree.end tree "Ingress Address Channel Control and Status 1" base ad:0xFD0E0820 width 14. rgroup.long 0x00++0x07 line.long 0x00 "CAPABILITIES,Ingress AXI Translation - Capabilities" hexmask.long.byte 0x00 24.--31. 0x01 " INGRESS_SIZE_MAX ,Ingress maximum size" hexmask.long.byte 0x00 16.--23. 0x01 " INGRESS_SIZE_OFFSET ,Ingress size offset" bitfld.long 0x00 0. " INGRESS_PRESENT ,Translation presence indicator" "Not present,Present" line.long 0x04 "STATUS,Ingress AXI Translation - Status" hexmask.long.word 0x04 16.--24. 1. " WR_PENDING_CTR ,Number of write transactions outstanding for this translation" hexmask.long.word 0x04 0.--8. 1. " RD_PENDING_CTR ,Number of read transactions outstanding for this translation" group.long 0x08++0x03 line.long 0x00 "CONTROL,Ingress AXI Translation - Control" bitfld.long 0x00 28.--31. " INGRESS_ATTR_W ,Ingress write attribute override" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. " INGRESS_ATTR_R ,Ingress read attribute override" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 23. " INGRESS_ATTR_ENABLE ,Ingress write/read attribute override enable" "Disabled,Enabled" bitfld.long 0x00 16.--20. " INGRESS_SIZE ,Translation size" "2^INGRESS_SIZE_OFFSET,2^(INGRESS_SIZE_OFFSET+1),2^(INGRESS_SIZE_OFFSET+2),2^(INGRESS_SIZE_OFFSET+3),2^(INGRESS_SIZE_OFFSET+4),2^(INGRESS_SIZE_OFFSET+5),2^(INGRESS_SIZE_OFFSET+6),2^(INGRESS_SIZE_OFFSET+7),2^(INGRESS_SIZE_OFFSET+8),2^(INGRESS_SIZE_OFFSET+9),2^(INGRESS_SIZE_OFFSET+10),2^(INGRESS_SIZE_OFFSET+11),2^(INGRESS_SIZE_OFFSET+12),2^(INGRESS_SIZE_OFFSET+13),2^(INGRESS_SIZE_OFFSET+14),2^(INGRESS_SIZE_OFFSET+15),2^(INGRESS_SIZE_OFFSET+16),2^(INGRESS_SIZE_OFFSET+17),2^(INGRESS_SIZE_OFFSET+18),2^(INGRESS_SIZE_OFFSET+19),2^(INGRESS_SIZE_OFFSET+20),2^(INGRESS_SIZE_OFFSET+21),2^(INGRESS_SIZE_OFFSET+22),2^(INGRESS_SIZE_OFFSET+23),2^(INGRESS_SIZE_OFFSET+24),2^(INGRESS_SIZE_OFFSET+25),2^(INGRESS_SIZE_OFFSET+26),2^(INGRESS_SIZE_OFFSET+27),2^(INGRESS_SIZE_OFFSET+28),2^(INGRESS_SIZE_OFFSET+29),2^(INGRESS_SIZE_OFFSET+30),2^(INGRESS_SIZE_OFFSET+31)" textline " " bitfld.long 0x00 3. " INGRESS_INVALID ,Translation invalidate enable" "Disabled,Enabled" bitfld.long 0x00 2. " INGRESS_SECURITY_EN ,Translation security enable" "Disabled,Enabled" bitfld.long 0x00 0. " INGRESS_EN ,Translation enable" "Disabled,Enabled" group.long 0x10++0x0F line.long 0x00 "SRC_BASE_LO,Ingress AXI Translation - Source Address Low" hexmask.long.tbyte 0x00 12.--31. 0x10 " INGRESS_SRC_BASE_LO ,INGRESS_SRC_BASE[31:12]" line.long 0x04 "SRC_BASE_HI,Ingress AXI Translation - Source Address High" line.long 0x08 "DST_BASE_LO,Ingress AXI Translation - Destination Address Low" hexmask.long.tbyte 0x08 12.--31. 0x10 " INGRESS_DST_BASE_LO ,INGRESS_DST_BASE[31:12]" line.long 0x0C "DST_BASE_HI,Ingress AXI Translation - Destination Address High" width 0xB tree.end tree "Ingress Address Channel Control and Status 2" base ad:0xFD0E0840 width 14. rgroup.long 0x00++0x07 line.long 0x00 "CAPABILITIES,Ingress AXI Translation - Capabilities" hexmask.long.byte 0x00 24.--31. 0x01 " INGRESS_SIZE_MAX ,Ingress maximum size" hexmask.long.byte 0x00 16.--23. 0x01 " INGRESS_SIZE_OFFSET ,Ingress size offset" bitfld.long 0x00 0. " INGRESS_PRESENT ,Translation presence indicator" "Not present,Present" line.long 0x04 "STATUS,Ingress AXI Translation - Status" hexmask.long.word 0x04 16.--24. 1. " WR_PENDING_CTR ,Number of write transactions outstanding for this translation" hexmask.long.word 0x04 0.--8. 1. " RD_PENDING_CTR ,Number of read transactions outstanding for this translation" group.long 0x08++0x03 line.long 0x00 "CONTROL,Ingress AXI Translation - Control" bitfld.long 0x00 28.--31. " INGRESS_ATTR_W ,Ingress write attribute override" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. " INGRESS_ATTR_R ,Ingress read attribute override" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 23. " INGRESS_ATTR_ENABLE ,Ingress write/read attribute override enable" "Disabled,Enabled" bitfld.long 0x00 16.--20. " INGRESS_SIZE ,Translation size" "2^INGRESS_SIZE_OFFSET,2^(INGRESS_SIZE_OFFSET+1),2^(INGRESS_SIZE_OFFSET+2),2^(INGRESS_SIZE_OFFSET+3),2^(INGRESS_SIZE_OFFSET+4),2^(INGRESS_SIZE_OFFSET+5),2^(INGRESS_SIZE_OFFSET+6),2^(INGRESS_SIZE_OFFSET+7),2^(INGRESS_SIZE_OFFSET+8),2^(INGRESS_SIZE_OFFSET+9),2^(INGRESS_SIZE_OFFSET+10),2^(INGRESS_SIZE_OFFSET+11),2^(INGRESS_SIZE_OFFSET+12),2^(INGRESS_SIZE_OFFSET+13),2^(INGRESS_SIZE_OFFSET+14),2^(INGRESS_SIZE_OFFSET+15),2^(INGRESS_SIZE_OFFSET+16),2^(INGRESS_SIZE_OFFSET+17),2^(INGRESS_SIZE_OFFSET+18),2^(INGRESS_SIZE_OFFSET+19),2^(INGRESS_SIZE_OFFSET+20),2^(INGRESS_SIZE_OFFSET+21),2^(INGRESS_SIZE_OFFSET+22),2^(INGRESS_SIZE_OFFSET+23),2^(INGRESS_SIZE_OFFSET+24),2^(INGRESS_SIZE_OFFSET+25),2^(INGRESS_SIZE_OFFSET+26),2^(INGRESS_SIZE_OFFSET+27),2^(INGRESS_SIZE_OFFSET+28),2^(INGRESS_SIZE_OFFSET+29),2^(INGRESS_SIZE_OFFSET+30),2^(INGRESS_SIZE_OFFSET+31)" textline " " bitfld.long 0x00 3. " INGRESS_INVALID ,Translation invalidate enable" "Disabled,Enabled" bitfld.long 0x00 2. " INGRESS_SECURITY_EN ,Translation security enable" "Disabled,Enabled" bitfld.long 0x00 0. " INGRESS_EN ,Translation enable" "Disabled,Enabled" group.long 0x10++0x0F line.long 0x00 "SRC_BASE_LO,Ingress AXI Translation - Source Address Low" hexmask.long.tbyte 0x00 12.--31. 0x10 " INGRESS_SRC_BASE_LO ,INGRESS_SRC_BASE[31:12]" line.long 0x04 "SRC_BASE_HI,Ingress AXI Translation - Source Address High" line.long 0x08 "DST_BASE_LO,Ingress AXI Translation - Destination Address Low" hexmask.long.tbyte 0x08 12.--31. 0x10 " INGRESS_DST_BASE_LO ,INGRESS_DST_BASE[31:12]" line.long 0x0C "DST_BASE_HI,Ingress AXI Translation - Destination Address High" width 0xB tree.end tree "Ingress Address Channel Control and Status 3" base ad:0xFD0E0860 width 14. rgroup.long 0x00++0x07 line.long 0x00 "CAPABILITIES,Ingress AXI Translation - Capabilities" hexmask.long.byte 0x00 24.--31. 0x01 " INGRESS_SIZE_MAX ,Ingress maximum size" hexmask.long.byte 0x00 16.--23. 0x01 " INGRESS_SIZE_OFFSET ,Ingress size offset" bitfld.long 0x00 0. " INGRESS_PRESENT ,Translation presence indicator" "Not present,Present" line.long 0x04 "STATUS,Ingress AXI Translation - Status" hexmask.long.word 0x04 16.--24. 1. " WR_PENDING_CTR ,Number of write transactions outstanding for this translation" hexmask.long.word 0x04 0.--8. 1. " RD_PENDING_CTR ,Number of read transactions outstanding for this translation" group.long 0x08++0x03 line.long 0x00 "CONTROL,Ingress AXI Translation - Control" bitfld.long 0x00 28.--31. " INGRESS_ATTR_W ,Ingress write attribute override" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. " INGRESS_ATTR_R ,Ingress read attribute override" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 23. " INGRESS_ATTR_ENABLE ,Ingress write/read attribute override enable" "Disabled,Enabled" bitfld.long 0x00 16.--20. " INGRESS_SIZE ,Translation size" "2^INGRESS_SIZE_OFFSET,2^(INGRESS_SIZE_OFFSET+1),2^(INGRESS_SIZE_OFFSET+2),2^(INGRESS_SIZE_OFFSET+3),2^(INGRESS_SIZE_OFFSET+4),2^(INGRESS_SIZE_OFFSET+5),2^(INGRESS_SIZE_OFFSET+6),2^(INGRESS_SIZE_OFFSET+7),2^(INGRESS_SIZE_OFFSET+8),2^(INGRESS_SIZE_OFFSET+9),2^(INGRESS_SIZE_OFFSET+10),2^(INGRESS_SIZE_OFFSET+11),2^(INGRESS_SIZE_OFFSET+12),2^(INGRESS_SIZE_OFFSET+13),2^(INGRESS_SIZE_OFFSET+14),2^(INGRESS_SIZE_OFFSET+15),2^(INGRESS_SIZE_OFFSET+16),2^(INGRESS_SIZE_OFFSET+17),2^(INGRESS_SIZE_OFFSET+18),2^(INGRESS_SIZE_OFFSET+19),2^(INGRESS_SIZE_OFFSET+20),2^(INGRESS_SIZE_OFFSET+21),2^(INGRESS_SIZE_OFFSET+22),2^(INGRESS_SIZE_OFFSET+23),2^(INGRESS_SIZE_OFFSET+24),2^(INGRESS_SIZE_OFFSET+25),2^(INGRESS_SIZE_OFFSET+26),2^(INGRESS_SIZE_OFFSET+27),2^(INGRESS_SIZE_OFFSET+28),2^(INGRESS_SIZE_OFFSET+29),2^(INGRESS_SIZE_OFFSET+30),2^(INGRESS_SIZE_OFFSET+31)" textline " " bitfld.long 0x00 3. " INGRESS_INVALID ,Translation invalidate enable" "Disabled,Enabled" bitfld.long 0x00 2. " INGRESS_SECURITY_EN ,Translation security enable" "Disabled,Enabled" bitfld.long 0x00 0. " INGRESS_EN ,Translation enable" "Disabled,Enabled" group.long 0x10++0x0F line.long 0x00 "SRC_BASE_LO,Ingress AXI Translation - Source Address Low" hexmask.long.tbyte 0x00 12.--31. 0x10 " INGRESS_SRC_BASE_LO ,INGRESS_SRC_BASE[31:12]" line.long 0x04 "SRC_BASE_HI,Ingress AXI Translation - Source Address High" line.long 0x08 "DST_BASE_LO,Ingress AXI Translation - Destination Address Low" hexmask.long.tbyte 0x08 12.--31. 0x10 " INGRESS_DST_BASE_LO ,INGRESS_DST_BASE[31:12]" line.long 0x0C "DST_BASE_HI,Ingress AXI Translation - Destination Address High" width 0xB tree.end tree "Ingress Address Channel Control and Status 4" base ad:0xFD0E0880 width 14. rgroup.long 0x00++0x07 line.long 0x00 "CAPABILITIES,Ingress AXI Translation - Capabilities" hexmask.long.byte 0x00 24.--31. 0x01 " INGRESS_SIZE_MAX ,Ingress maximum size" hexmask.long.byte 0x00 16.--23. 0x01 " INGRESS_SIZE_OFFSET ,Ingress size offset" bitfld.long 0x00 0. " INGRESS_PRESENT ,Translation presence indicator" "Not present,Present" line.long 0x04 "STATUS,Ingress AXI Translation - Status" hexmask.long.word 0x04 16.--24. 1. " WR_PENDING_CTR ,Number of write transactions outstanding for this translation" hexmask.long.word 0x04 0.--8. 1. " RD_PENDING_CTR ,Number of read transactions outstanding for this translation" group.long 0x08++0x03 line.long 0x00 "CONTROL,Ingress AXI Translation - Control" bitfld.long 0x00 28.--31. " INGRESS_ATTR_W ,Ingress write attribute override" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. " INGRESS_ATTR_R ,Ingress read attribute override" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 23. " INGRESS_ATTR_ENABLE ,Ingress write/read attribute override enable" "Disabled,Enabled" bitfld.long 0x00 16.--20. " INGRESS_SIZE ,Translation size" "2^INGRESS_SIZE_OFFSET,2^(INGRESS_SIZE_OFFSET+1),2^(INGRESS_SIZE_OFFSET+2),2^(INGRESS_SIZE_OFFSET+3),2^(INGRESS_SIZE_OFFSET+4),2^(INGRESS_SIZE_OFFSET+5),2^(INGRESS_SIZE_OFFSET+6),2^(INGRESS_SIZE_OFFSET+7),2^(INGRESS_SIZE_OFFSET+8),2^(INGRESS_SIZE_OFFSET+9),2^(INGRESS_SIZE_OFFSET+10),2^(INGRESS_SIZE_OFFSET+11),2^(INGRESS_SIZE_OFFSET+12),2^(INGRESS_SIZE_OFFSET+13),2^(INGRESS_SIZE_OFFSET+14),2^(INGRESS_SIZE_OFFSET+15),2^(INGRESS_SIZE_OFFSET+16),2^(INGRESS_SIZE_OFFSET+17),2^(INGRESS_SIZE_OFFSET+18),2^(INGRESS_SIZE_OFFSET+19),2^(INGRESS_SIZE_OFFSET+20),2^(INGRESS_SIZE_OFFSET+21),2^(INGRESS_SIZE_OFFSET+22),2^(INGRESS_SIZE_OFFSET+23),2^(INGRESS_SIZE_OFFSET+24),2^(INGRESS_SIZE_OFFSET+25),2^(INGRESS_SIZE_OFFSET+26),2^(INGRESS_SIZE_OFFSET+27),2^(INGRESS_SIZE_OFFSET+28),2^(INGRESS_SIZE_OFFSET+29),2^(INGRESS_SIZE_OFFSET+30),2^(INGRESS_SIZE_OFFSET+31)" textline " " bitfld.long 0x00 3. " INGRESS_INVALID ,Translation invalidate enable" "Disabled,Enabled" bitfld.long 0x00 2. " INGRESS_SECURITY_EN ,Translation security enable" "Disabled,Enabled" bitfld.long 0x00 0. " INGRESS_EN ,Translation enable" "Disabled,Enabled" group.long 0x10++0x0F line.long 0x00 "SRC_BASE_LO,Ingress AXI Translation - Source Address Low" hexmask.long.tbyte 0x00 12.--31. 0x10 " INGRESS_SRC_BASE_LO ,INGRESS_SRC_BASE[31:12]" line.long 0x04 "SRC_BASE_HI,Ingress AXI Translation - Source Address High" line.long 0x08 "DST_BASE_LO,Ingress AXI Translation - Destination Address Low" hexmask.long.tbyte 0x08 12.--31. 0x10 " INGRESS_DST_BASE_LO ,INGRESS_DST_BASE[31:12]" line.long 0x0C "DST_BASE_HI,Ingress AXI Translation - Destination Address High" width 0xB tree.end tree "Ingress Address Channel Control and Status 5" base ad:0xFD0E08A0 width 14. rgroup.long 0x00++0x07 line.long 0x00 "CAPABILITIES,Ingress AXI Translation - Capabilities" hexmask.long.byte 0x00 24.--31. 0x01 " INGRESS_SIZE_MAX ,Ingress maximum size" hexmask.long.byte 0x00 16.--23. 0x01 " INGRESS_SIZE_OFFSET ,Ingress size offset" bitfld.long 0x00 0. " INGRESS_PRESENT ,Translation presence indicator" "Not present,Present" line.long 0x04 "STATUS,Ingress AXI Translation - Status" hexmask.long.word 0x04 16.--24. 1. " WR_PENDING_CTR ,Number of write transactions outstanding for this translation" hexmask.long.word 0x04 0.--8. 1. " RD_PENDING_CTR ,Number of read transactions outstanding for this translation" group.long 0x08++0x03 line.long 0x00 "CONTROL,Ingress AXI Translation - Control" bitfld.long 0x00 28.--31. " INGRESS_ATTR_W ,Ingress write attribute override" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. " INGRESS_ATTR_R ,Ingress read attribute override" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 23. " INGRESS_ATTR_ENABLE ,Ingress write/read attribute override enable" "Disabled,Enabled" bitfld.long 0x00 16.--20. " INGRESS_SIZE ,Translation size" "2^INGRESS_SIZE_OFFSET,2^(INGRESS_SIZE_OFFSET+1),2^(INGRESS_SIZE_OFFSET+2),2^(INGRESS_SIZE_OFFSET+3),2^(INGRESS_SIZE_OFFSET+4),2^(INGRESS_SIZE_OFFSET+5),2^(INGRESS_SIZE_OFFSET+6),2^(INGRESS_SIZE_OFFSET+7),2^(INGRESS_SIZE_OFFSET+8),2^(INGRESS_SIZE_OFFSET+9),2^(INGRESS_SIZE_OFFSET+10),2^(INGRESS_SIZE_OFFSET+11),2^(INGRESS_SIZE_OFFSET+12),2^(INGRESS_SIZE_OFFSET+13),2^(INGRESS_SIZE_OFFSET+14),2^(INGRESS_SIZE_OFFSET+15),2^(INGRESS_SIZE_OFFSET+16),2^(INGRESS_SIZE_OFFSET+17),2^(INGRESS_SIZE_OFFSET+18),2^(INGRESS_SIZE_OFFSET+19),2^(INGRESS_SIZE_OFFSET+20),2^(INGRESS_SIZE_OFFSET+21),2^(INGRESS_SIZE_OFFSET+22),2^(INGRESS_SIZE_OFFSET+23),2^(INGRESS_SIZE_OFFSET+24),2^(INGRESS_SIZE_OFFSET+25),2^(INGRESS_SIZE_OFFSET+26),2^(INGRESS_SIZE_OFFSET+27),2^(INGRESS_SIZE_OFFSET+28),2^(INGRESS_SIZE_OFFSET+29),2^(INGRESS_SIZE_OFFSET+30),2^(INGRESS_SIZE_OFFSET+31)" textline " " bitfld.long 0x00 3. " INGRESS_INVALID ,Translation invalidate enable" "Disabled,Enabled" bitfld.long 0x00 2. " INGRESS_SECURITY_EN ,Translation security enable" "Disabled,Enabled" bitfld.long 0x00 0. " INGRESS_EN ,Translation enable" "Disabled,Enabled" group.long 0x10++0x0F line.long 0x00 "SRC_BASE_LO,Ingress AXI Translation - Source Address Low" hexmask.long.tbyte 0x00 12.--31. 0x10 " INGRESS_SRC_BASE_LO ,INGRESS_SRC_BASE[31:12]" line.long 0x04 "SRC_BASE_HI,Ingress AXI Translation - Source Address High" line.long 0x08 "DST_BASE_LO,Ingress AXI Translation - Destination Address Low" hexmask.long.tbyte 0x08 12.--31. 0x10 " INGRESS_DST_BASE_LO ,INGRESS_DST_BASE[31:12]" line.long 0x0C "DST_BASE_HI,Ingress AXI Translation - Destination Address High" width 0xB tree.end tree "Ingress Address Channel Control and Status 6" base ad:0xFD0E08C0 width 14. rgroup.long 0x00++0x07 line.long 0x00 "CAPABILITIES,Ingress AXI Translation - Capabilities" hexmask.long.byte 0x00 24.--31. 0x01 " INGRESS_SIZE_MAX ,Ingress maximum size" hexmask.long.byte 0x00 16.--23. 0x01 " INGRESS_SIZE_OFFSET ,Ingress size offset" bitfld.long 0x00 0. " INGRESS_PRESENT ,Translation presence indicator" "Not present,Present" line.long 0x04 "STATUS,Ingress AXI Translation - Status" hexmask.long.word 0x04 16.--24. 1. " WR_PENDING_CTR ,Number of write transactions outstanding for this translation" hexmask.long.word 0x04 0.--8. 1. " RD_PENDING_CTR ,Number of read transactions outstanding for this translation" group.long 0x08++0x03 line.long 0x00 "CONTROL,Ingress AXI Translation - Control" bitfld.long 0x00 28.--31. " INGRESS_ATTR_W ,Ingress write attribute override" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. " INGRESS_ATTR_R ,Ingress read attribute override" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 23. " INGRESS_ATTR_ENABLE ,Ingress write/read attribute override enable" "Disabled,Enabled" bitfld.long 0x00 16.--20. " INGRESS_SIZE ,Translation size" "2^INGRESS_SIZE_OFFSET,2^(INGRESS_SIZE_OFFSET+1),2^(INGRESS_SIZE_OFFSET+2),2^(INGRESS_SIZE_OFFSET+3),2^(INGRESS_SIZE_OFFSET+4),2^(INGRESS_SIZE_OFFSET+5),2^(INGRESS_SIZE_OFFSET+6),2^(INGRESS_SIZE_OFFSET+7),2^(INGRESS_SIZE_OFFSET+8),2^(INGRESS_SIZE_OFFSET+9),2^(INGRESS_SIZE_OFFSET+10),2^(INGRESS_SIZE_OFFSET+11),2^(INGRESS_SIZE_OFFSET+12),2^(INGRESS_SIZE_OFFSET+13),2^(INGRESS_SIZE_OFFSET+14),2^(INGRESS_SIZE_OFFSET+15),2^(INGRESS_SIZE_OFFSET+16),2^(INGRESS_SIZE_OFFSET+17),2^(INGRESS_SIZE_OFFSET+18),2^(INGRESS_SIZE_OFFSET+19),2^(INGRESS_SIZE_OFFSET+20),2^(INGRESS_SIZE_OFFSET+21),2^(INGRESS_SIZE_OFFSET+22),2^(INGRESS_SIZE_OFFSET+23),2^(INGRESS_SIZE_OFFSET+24),2^(INGRESS_SIZE_OFFSET+25),2^(INGRESS_SIZE_OFFSET+26),2^(INGRESS_SIZE_OFFSET+27),2^(INGRESS_SIZE_OFFSET+28),2^(INGRESS_SIZE_OFFSET+29),2^(INGRESS_SIZE_OFFSET+30),2^(INGRESS_SIZE_OFFSET+31)" textline " " bitfld.long 0x00 3. " INGRESS_INVALID ,Translation invalidate enable" "Disabled,Enabled" bitfld.long 0x00 2. " INGRESS_SECURITY_EN ,Translation security enable" "Disabled,Enabled" bitfld.long 0x00 0. " INGRESS_EN ,Translation enable" "Disabled,Enabled" group.long 0x10++0x0F line.long 0x00 "SRC_BASE_LO,Ingress AXI Translation - Source Address Low" hexmask.long.tbyte 0x00 12.--31. 0x10 " INGRESS_SRC_BASE_LO ,INGRESS_SRC_BASE[31:12]" line.long 0x04 "SRC_BASE_HI,Ingress AXI Translation - Source Address High" line.long 0x08 "DST_BASE_LO,Ingress AXI Translation - Destination Address Low" hexmask.long.tbyte 0x08 12.--31. 0x10 " INGRESS_DST_BASE_LO ,INGRESS_DST_BASE[31:12]" line.long 0x0C "DST_BASE_HI,Ingress AXI Translation - Destination Address High" width 0xB tree.end tree "Ingress Address Channel Control and Status 7" base ad:0xFD0E08E0 width 14. rgroup.long 0x00++0x07 line.long 0x00 "CAPABILITIES,Ingress AXI Translation - Capabilities" hexmask.long.byte 0x00 24.--31. 0x01 " INGRESS_SIZE_MAX ,Ingress maximum size" hexmask.long.byte 0x00 16.--23. 0x01 " INGRESS_SIZE_OFFSET ,Ingress size offset" bitfld.long 0x00 0. " INGRESS_PRESENT ,Translation presence indicator" "Not present,Present" line.long 0x04 "STATUS,Ingress AXI Translation - Status" hexmask.long.word 0x04 16.--24. 1. " WR_PENDING_CTR ,Number of write transactions outstanding for this translation" hexmask.long.word 0x04 0.--8. 1. " RD_PENDING_CTR ,Number of read transactions outstanding for this translation" group.long 0x08++0x03 line.long 0x00 "CONTROL,Ingress AXI Translation - Control" bitfld.long 0x00 28.--31. " INGRESS_ATTR_W ,Ingress write attribute override" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. " INGRESS_ATTR_R ,Ingress read attribute override" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 23. " INGRESS_ATTR_ENABLE ,Ingress write/read attribute override enable" "Disabled,Enabled" bitfld.long 0x00 16.--20. " INGRESS_SIZE ,Translation size" "2^INGRESS_SIZE_OFFSET,2^(INGRESS_SIZE_OFFSET+1),2^(INGRESS_SIZE_OFFSET+2),2^(INGRESS_SIZE_OFFSET+3),2^(INGRESS_SIZE_OFFSET+4),2^(INGRESS_SIZE_OFFSET+5),2^(INGRESS_SIZE_OFFSET+6),2^(INGRESS_SIZE_OFFSET+7),2^(INGRESS_SIZE_OFFSET+8),2^(INGRESS_SIZE_OFFSET+9),2^(INGRESS_SIZE_OFFSET+10),2^(INGRESS_SIZE_OFFSET+11),2^(INGRESS_SIZE_OFFSET+12),2^(INGRESS_SIZE_OFFSET+13),2^(INGRESS_SIZE_OFFSET+14),2^(INGRESS_SIZE_OFFSET+15),2^(INGRESS_SIZE_OFFSET+16),2^(INGRESS_SIZE_OFFSET+17),2^(INGRESS_SIZE_OFFSET+18),2^(INGRESS_SIZE_OFFSET+19),2^(INGRESS_SIZE_OFFSET+20),2^(INGRESS_SIZE_OFFSET+21),2^(INGRESS_SIZE_OFFSET+22),2^(INGRESS_SIZE_OFFSET+23),2^(INGRESS_SIZE_OFFSET+24),2^(INGRESS_SIZE_OFFSET+25),2^(INGRESS_SIZE_OFFSET+26),2^(INGRESS_SIZE_OFFSET+27),2^(INGRESS_SIZE_OFFSET+28),2^(INGRESS_SIZE_OFFSET+29),2^(INGRESS_SIZE_OFFSET+30),2^(INGRESS_SIZE_OFFSET+31)" textline " " bitfld.long 0x00 3. " INGRESS_INVALID ,Translation invalidate enable" "Disabled,Enabled" bitfld.long 0x00 2. " INGRESS_SECURITY_EN ,Translation security enable" "Disabled,Enabled" bitfld.long 0x00 0. " INGRESS_EN ,Translation enable" "Disabled,Enabled" group.long 0x10++0x0F line.long 0x00 "SRC_BASE_LO,Ingress AXI Translation - Source Address Low" hexmask.long.tbyte 0x00 12.--31. 0x10 " INGRESS_SRC_BASE_LO ,INGRESS_SRC_BASE[31:12]" line.long 0x04 "SRC_BASE_HI,Ingress AXI Translation - Source Address High" line.long 0x08 "DST_BASE_LO,Ingress AXI Translation - Destination Address Low" hexmask.long.tbyte 0x08 12.--31. 0x10 " INGRESS_DST_BASE_LO ,INGRESS_DST_BASE[31:12]" line.long 0x0C "DST_BASE_HI,Ingress AXI Translation - Destination Address High" width 0xB tree.end tree "Main Control and Status" base ad:0xFD0E0000 width 20. group.long 0x00++0x37 "Bridge Core Registers" line.long 0x00 "PCIE_RX0,PCI Express Receive Access And BAR Configuration" bitfld.long 0x00 17. " DIS_PCIE_DMA_ACC ,Determines whether DMA registers are accessible from PCI express" "No,Yes" bitfld.long 0x00 16. " DIS_PCIE_BRIDGE_ACC ,Determines whether bridge registers are accessible from PCI express" "No,Yes" bitfld.long 0x00 0.--2. " MA_REG_BAR ,Determines which PCI express base address region (Bar) is used to access DMA and bridge registers from PCI express" "0,1,2,3,4,5,6,7" line.long 0x04 "PCIE_RX1,PCI Express Receive Transaction Attribute Handling" bitfld.long 0x04 8. " RD_URUR_OK1S_N ,AXI response for AXI slave interface-initiated PCI express configuration read/write transactions that are completed with unsupported request status" "0,1" bitfld.long 0x04 4.--7. " PCIE_RX_ARCACHE ,Value to use for the AXI master interface M_ARCACHE port for received PCI express memory read requests" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. " PCIE_RX_AWCACHE ,Value to use for the AXI master interface M_AWCACHE port for received PCI express memory write requests" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "AXI_MASTER,AXI Master Max Payload Size Configuration" bitfld.long 0x08 4.--6. " MAX_RD_REQ_SIZE ,Maximum read request size allowed for AXI master interface read transactions" "0,1,2,3,4,5,6,7" bitfld.long 0x08 0.--2. " MAX_WR_REQ_SIZE ,Maximum write request size allowed for AXI master interface write transactions" "0,1,2,3,4,5,6,7" line.long 0x0C "PCIE_TX,PCI Express Transmit Cut Through Configuration" bitfld.long 0x0C 0. " PCIE_TX_CUT_THR ,Enable cut-through routing for PCIe TLP transmissions" "Disabled,Enabled" line.long 0x10 "INTERRUPT,PCI Express Core Interrupt Routing Configuration" bitfld.long 0x10 0. " PCIE_INT_AXI_N ,Determine interrupt events generating device" "PCIe host,Local processor" textline " " line.long 0x14 "RAM_DISABLE0,ECC RAM 1-bit Error Correction Enable 1" bitfld.long 0x14 14. " RAM_DMA_SGL_DST_DIS_COR ,DMA channel destination SGL buffer (DMA only) error correction enable" "Disabled,Enabled" bitfld.long 0x14 13. " RAM_DMA_SGL_SRC_DIS_COR ,DMA channel source SGL buffer (DMA only) error correction enable" "Disabled,Enabled" bitfld.long 0x14 12. " RAM_DMA_CH_REG_DIS_COR ,DMA channel registers (DMA only) error correction enable" "Disabled,Enabled" textline " " bitfld.long 0x14 11. " RAM_DMA_MSIX_TAB_DIS_COR ,MSI-X table error correction enable" "Disabled,Enabled" bitfld.long 0x14 8. " RAM_DMA_AXI_S_W_DIS_COR ,AXI slave write data buffer error correction enable" "Disabled,Enabled" bitfld.long 0x14 6. " RAM_DMA_AXI_M_R_DIS_COR ,AXI master read reorder queue error correction enable" "Disabled,Enabled" textline " " bitfld.long 0x14 5. " RAM_DMA_PCIE_S_CD_DIS_COR ,PCIe slave read completion data buffer error correction enable" "Disabled,Enabled" bitfld.long 0x14 4. " RAM_DMA_PCIE_S_RA_DIS_COR ,PCIe slave read address buffer error correction enable" "Disabled,Enabled" bitfld.long 0x14 3. " RAM_DMA_PCIE_S_W_DIS_COR ,PCIe slave write data buffer error correction enable" "Disabled,Enabled" textline " " bitfld.long 0x14 2. " RAM_DMA_PCIE_S_WA_DIS_COR ,PCIe slave write address buffer error correction enable" "Disabled,Enabled" bitfld.long 0x14 1. " RAM_DMA_PCIE_TX_W_DIS_COR ,PCIe master TLP buffer error correction enable" "Disabled,Enabled" bitfld.long 0x14 0. " RAM_DMA_PCIE_M_R_DIS_COR ,PCIe master read reorder queue error correction enable" "Disabled,Enabled" line.long 0x18 "RAM_DISABLE1,ECC RAM 1-bit Error Correction Enable 2" bitfld.long 0x18 14. " RAM_DMA_SGL_DST_DIS_ERR ,DMA channel destination SGL buffer (DMA only) error handling enable" "Disabled,Enabled" bitfld.long 0x18 13. " RAM_DMA_SGL_SRC_DIS_ERR ,DMA channel source SGL buffer (DMA only) error handling enable" "Disabled,Enabled" bitfld.long 0x18 12. " RAM_DMA_CH_REG_DIS_ERR ,DMA channel registers (DMA only) error handling enable" "Disabled,Enabled" textline " " bitfld.long 0x18 11. " RAM_DMA_MSIX_TAB_DIS_ERR ,MSI-X table error handling enable" "Disabled,Enabled" bitfld.long 0x18 8. " RAM_DMA_AXI_S_W_DIS_ERR ,AXI slave write data buffer error handling enable" "Disabled,Enabled" bitfld.long 0x18 6. " RAM_DMA_AXI_M_R_DIS_ERR ,AXI master read reorder queue error handling enable" "Disabled,Enabled" textline " " bitfld.long 0x18 5. " RAM_DMA_PCIE_S_CD_DIS_ERR ,PCIe slave read completion data buffer error handling enable" "Disabled,Enabled" bitfld.long 0x18 4. " RAM_DMA_PCIE_S_RA_DIS_ERR ,PCIe slave read address buffer error handling enable" "Disabled,Enabled" bitfld.long 0x18 3. " RAM_DMA_PCIE_S_W_DIS_ERR ,PCIe slave write data buffer error handling enable" "Disabled,Enabled" textline " " bitfld.long 0x18 2. " RAM_DMA_PCIE_S_WA_DIS_ERR ,PCIe slave write address buffer error handling enable" "Disabled,Enabled" bitfld.long 0x18 1. " RAM_DMA_PCIE_TX_W_DIS_ERR ,PCIe master TLP buffer error handling enable" "Disabled,Enabled" bitfld.long 0x18 0. " RAM_DMA_PCIE_M_R_DIS_ERR ,PCIe master read reorder queue error handling enable" "Disabled,Enabled" textline " " line.long 0x1C "PCIE_RELAXED_ORDER,PCI Express Receive Completion Ordering Configuration" bitfld.long 0x1C 1. " EN_CFGIO_WR_RO ,Configuration write and I/O write received completion ordering configuration" "Compliant,Compliant" bitfld.long 0x1C 0. " EN_DMA_RO ,PCI express received DMA read completion ordering configuration" "Compliant,Not compliant" line.long 0x20 "PCIE_RX_MSG_FILTER,PCI Express Receive Message Filtering Configuration" hexmask.long.word 0x20 16.--31. 1. " DES_VEN_MSG_VEN_ID ,Vendor defined message type" bitfld.long 0x20 15. " DES_VEN_MSG_VEN_INV ,Selects how to apply vendor ID-specific filtering" "0,1" bitfld.long 0x20 14. " DES_VEN_MSG_EN ,Vendor ID-specific filtering enable" "Disabled,Enabled" textline " " bitfld.long 0x20 13. " EN_OTH_MSG_FWD ,Define action on receive not matching MSG_CODE[7:4] = 0x01||0x02||0x03||0x05||0x07" "Dropped,Forwarded" bitfld.long 0x20 7. " EN_VEN_MSG_FWD ,Define action on receive not matching MSG_CODE[7:4] = 0x01||0x02||0x03||0x05||0x07" "Dropped,Forwarded" bitfld.long 0x20 5. " EN_SLT_MSG_FWD ,Define action on receive not matching MSG_CODE[7:4] = 0x05" "Dropped,Forwarded" textline " " bitfld.long 0x20 3. " EN_ERR_MSG_FWD ,Define action on receive not matching MSG_CODE[7:4] = 0x03" "Dropped,Forwarded" bitfld.long 0x20 2. " EN_INT_MSG_FWD ,Define action on receive not matching MSG_CODE[7:4] = 0x02" "Dropped,Forwarded" bitfld.long 0x20 1. " EN_PM_MSG_FWD ,Define action on receive not matching MSG_CODE[7:4] = 0x01" "Dropped,Forwarded" line.long 0x24 "RQ_REQ_ORDER,PCI Express And AXI Read Reorder Queue Completion Ordering Configuration" bitfld.long 0x24 31. " PCIE_REQ_ORDER_STRICT ,Increase read completion latency when read completions are received out of order (For PCIe)" "Not increased,Increased" bitfld.long 0x24 30. " AXI_REQ_ORDER_STRICT ,Increase read completion latency when read completions are received out of order (For AXI)" "Not increased,Increased" bitfld.long 0x24 15. " AXI_REQ_ORDER_ID_MASK ,Determines which AXI slave interface S_ARID[SID-1:0] bits are considered (Bit 15)" "0,1" bitfld.long 0x24 14. ",Determines which AXI slave interface S_ARID[SID-1:0] bits are considered (Bit 14)" "0,1" bitfld.long 0x24 13. ",Determines which AXI slave interface S_ARID[SID-1:0] bits are considered (Bit 13)" "0,1" bitfld.long 0x24 12. ",Determines which AXI slave interface S_ARID[SID-1:0] bits are considered (Bit 12)" "0,1" bitfld.long 0x24 11. ",Determines which AXI slave interface S_ARID[SID-1:0] bits are considered (Bit 11)" "0,1" bitfld.long 0x24 10. ",Determines which AXI slave interface S_ARID[SID-1:0] bits are considered (Bit 10)" "0,1" bitfld.long 0x24 9. ",Determines which AXI slave interface S_ARID[SID-1:0] bits are considered (Bit 9)" "0,1" bitfld.long 0x24 8. ",Determines which AXI slave interface S_ARID[SID-1:0] bits are considered (Bit 8)" "0,1" bitfld.long 0x24 7. ",Determines which AXI slave interface S_ARID[SID-1:0] bits are considered (Bit 7)" "0,1" bitfld.long 0x24 6. ",Determines which AXI slave interface S_ARID[SID-1:0] bits are considered (Bit 6)" "0,1" bitfld.long 0x24 5. ",Determines which AXI slave interface S_ARID[SID-1:0] bits are considered (Bit 5)" "0,1" bitfld.long 0x24 4. ",Determines which AXI slave interface S_ARID[SID-1:0] bits are considered (Bit 4)" "0,1" bitfld.long 0x24 3. ",Determines which AXI slave interface S_ARID[SID-1:0] bits are considered (Bit 3)" "0,1" bitfld.long 0x24 2. ",Determines which AXI slave interface S_ARID[SID-1:0] bits are considered (Bit 2)" "0,1" bitfld.long 0x24 1. ",Determines which AXI slave interface S_ARID[SID-1:0] bits are considered (Bit 1)" "0,1" bitfld.long 0x24 0. ",Determines which AXI slave interface S_ARID[SID-1:0] bits are considered (Bit 0)" "0,1" line.long 0x28 "PCIE_CREDIT,PCI Express Transmit Completion Header And Data Credit Metering Configuration" bitfld.long 0x28 31. " PCIE_CREDIT_EN ,Limit outstanding PCIe read requests to stay within the receive buffer space (Ch & CD credits) allocated in the PCI express core receive buffer" "Not limited,Limited" bitfld.long 0x28 30. " PCIE_CREDIT_CH_INF ,CH credits infinite" "0,1" bitfld.long 0x28 29. " PCIE_CREDIT_CD_INF ,CD credits infinite" "0,1" textline " " hexmask.long.byte 0x28 16.--23. 1. " PCIE_CREDIT_CH_VAL ,Number of available CH credits" hexmask.long.word 0x28 0.--11. 1. " PCIE_CREDIT_CD_VAL ,Number of available CD credits" line.long 0x2C "AXI_M_W_TICK_COUNT,AXI Master Write Completion Timeout Configuration" hexmask.long.word 0x2C 0.--15. 1. " AXI_M_W_TICK_COUNT ,AXI master write request timeout period" line.long 0x30 "AXI_M_R_TICK_COUNT,AXI Master Read Completion Timeout Configuration" hexmask.long.word 0x30 0.--15. 1. " AXI_M_R_TICK_COUNT ,AXI master read request timeout period" line.long 0x34 "CRS_RPL_TICK_COUNT,PCIe Configuration Write/read Request CRS Replay Timeout Configuration" hexmask.long.word 0x34 0.--15. 1. " CRS_RPL_TICK_COUNT ,CRS replay timeout period" rgroup.long 0x200++0x07 "E_BREG Registers" line.long 0x00 "CAPABILITIES,Egress BREG Translation - Capabilities" hexmask.long.byte 0x00 24.--31. 1. " BREG_SIZE_MAX ,BREG maximal size" hexmask.long.byte 0x00 16.--23. 1. " BREG_SIZE_OFFSET ,BREG size offset" bitfld.long 0x00 0. " BREG_PRESENT ,Translation presence indicator" "Not present,Present" line.long 0x04 "STATUS,Egress BREG Translation - Status" hexmask.long.word 0x04 16.--24. 1. " WR_PENDING_CTR ,Number of write transactions outstanding for this translation" hexmask.long.word 0x04 0.--8. 1. " RD_PENDING_CTR ,Number of read transactions outstanding for this translation" group.long (0x200+0x08)++0x03 line.long 0x00 "CONTROL,Egress BREG Translation - Control" bitfld.long 0x00 16.--17. " BREG_SIZE ,Size of this translation window" "2^BREG_SIZE_OFFSET,2^(BREG_SIZE_OFFSET+1),2^(BREG_SIZE_OFFSET+2),2^(BREG_SIZE_OFFSET+3)" bitfld.long 0x00 2. " BREG_SECURITY_EN ,Translation security enable" "Disabled,Enabled" bitfld.long 0x00 1. " BREG_EN_FORCE ,Force all AXI slave interface transactions to be claimed by the egress bridge register translation" "Not forced,Forced" bitfld.long 0x00 0. " BREG_ENABLE ,Translation enable" "Disabled,Enabled" group.long (0x200+0x10)++0x07 line.long 0x00 "BASE_LO,Egress BREG Translation - Source Address Low" hexmask.long.tbyte 0x00 12.--31. 0x10 " BREG_BASE_LO ,BREG address low bytes" line.long 0x04 "BASE_HI,Egress BREG Translation - Source Address High" rgroup.long 0x220++0x07 "E_ECAM Registers" line.long 0x00 "CAPABILITIES,Egress ECAM Translation - Capabilities" hexmask.long.byte 0x00 24.--31. 1. " ECAM_SIZE_MAX ,ECAM maximal size" hexmask.long.byte 0x00 16.--23. 1. " ECAM_SIZE_OFFSET ,ECAM size offset" bitfld.long 0x00 0. " ECAM_PRESENT ,Translation presence indicator" "Not present,Present" line.long 0x04 "STATUS,Egress ECAM Translation - Status" hexmask.long.word 0x04 16.--24. 1. " WR_PENDING_CTR ,Number of write transactions outstanding for this translation" hexmask.long.word 0x04 0.--8. 1. " RD_PENDING_CTR ,Number of read transactions outstanding for this translation" group.long (0x220+0x08)++0x03 line.long 0x00 "CONTROL,Egress ECAM Translation - Control" bitfld.long 0x00 16.--17. " ECAM_SIZE ,Size of this translation window" "2^ECAM_SIZE_OFFSET,2^(ECAM_SIZE_OFFSET+1),2^(ECAM_SIZE_OFFSET+2),2^(ECAM_SIZE_OFFSET+3)" bitfld.long 0x00 2. " ECAM_SECURITY_EN ,Translation security enable" "Disabled,Enabled" bitfld.long 0x00 0. " ECAM_ENABLE ,Translation enable" "Disabled,Enabled" group.long (0x220+0x10)++0x07 line.long 0x00 "BASE_LO,Egress ECAM Translation - Source Address Low" hexmask.long.tbyte 0x00 12.--31. 0x10 " ECAM_BASE_LO ,ECAM address low bytes" line.long 0x04 "BASE_HI,Egress ECAM Translation - Source Address High" rgroup.long 0x240++0x07 "E_MSXT Registers" line.long 0x00 "CAPABILITIES,Egress MSXT Translation - Capabilities" hexmask.long.byte 0x00 24.--31. 1. " MSXT_SIZE_MAX ,MSXT maximal size" hexmask.long.byte 0x00 16.--23. 1. " MSXT_SIZE_OFFSET ,MSXT size offset" bitfld.long 0x00 0. " MSXT_PRESENT ,Translation presence indicator" "Not present,Present" line.long 0x04 "STATUS,Egress MSXT Translation - Status" hexmask.long.word 0x04 16.--24. 1. " WR_PENDING_CTR ,Number of write transactions outstanding for this translation" hexmask.long.word 0x04 0.--8. 1. " RD_PENDING_CTR ,Number of read transactions outstanding for this translation" group.long (0x240+0x08)++0x03 line.long 0x00 "CONTROL,Egress MSXT Translation - Control" bitfld.long 0x00 16.--17. " MSXT_SIZE ,Size of this translation window" "2^MSXT_SIZE_OFFSET,2^(MSXT_SIZE_OFFSET+1),2^(MSXT_SIZE_OFFSET+2),2^(MSXT_SIZE_OFFSET+3)" bitfld.long 0x00 2. " MSXT_SECURITY_EN ,Translation security enable" "Disabled,Enabled" bitfld.long 0x00 0. " MSXT_ENABLE ,Translation enable" "Disabled,Enabled" group.long (0x240+0x10)++0x07 line.long 0x00 "BASE_LO,Egress MSXT Translation - Source Address Low" hexmask.long.tbyte 0x00 12.--31. 0x10 " MSXT_BASE_LO ,MSXT address low bytes" line.long 0x04 "BASE_HI,Egress MSXT Translation - Source Address High" rgroup.long 0x260++0x07 "E_MSXP Registers" line.long 0x00 "CAPABILITIES,Egress MSXP Translation - Capabilities" hexmask.long.byte 0x00 24.--31. 1. " MSXP_SIZE_MAX ,MSXP maximal size" hexmask.long.byte 0x00 16.--23. 1. " MSXP_SIZE_OFFSET ,MSXP size offset" bitfld.long 0x00 0. " MSXP_PRESENT ,Translation presence indicator" "Not present,Present" line.long 0x04 "STATUS,Egress MSXP Translation - Status" hexmask.long.word 0x04 16.--24. 1. " WR_PENDING_CTR ,Number of write transactions outstanding for this translation" hexmask.long.word 0x04 0.--8. 1. " RD_PENDING_CTR ,Number of read transactions outstanding for this translation" group.long (0x260+0x08)++0x03 line.long 0x00 "CONTROL,Egress MSXP Translation - Control" bitfld.long 0x00 16.--17. " MSXP_SIZE ,Size of this translation window" "2^MSXP_SIZE_OFFSET,2^(MSXP_SIZE_OFFSET+1),2^(MSXP_SIZE_OFFSET+2),2^(MSXP_SIZE_OFFSET+3)" bitfld.long 0x00 2. " MSXP_SECURITY_EN ,Translation security enable" "Disabled,Enabled" bitfld.long 0x00 0. " MSXP_ENABLE ,Translation enable" "Disabled,Enabled" group.long (0x260+0x10)++0x07 line.long 0x00 "BASE_LO,Egress MSXP Translation - Source Address Low" hexmask.long.tbyte 0x00 12.--31. 0x10 " MSXP_BASE_LO ,MSXP address low bytes" line.long 0x04 "BASE_HI,Egress MSXP Translation - Source Address High" rgroup.long 0x280++0x07 "E_DREG Registers" line.long 0x00 "CAPABILITIES,Egress DREG Translation - Capabilities" hexmask.long.byte 0x00 24.--31. 1. " DREG_SIZE_MAX ,DREG maximal size" hexmask.long.byte 0x00 16.--23. 1. " DREG_SIZE_OFFSET ,DREG size offset" bitfld.long 0x00 0. " DREG_PRESENT ,Translation presence indicator" "Not present,Present" line.long 0x04 "STATUS,Egress DREG Translation - Status" hexmask.long.word 0x04 16.--24. 1. " WR_PENDING_CTR ,Number of write transactions outstanding for this translation" hexmask.long.word 0x04 0.--8. 1. " RD_PENDING_CTR ,Number of read transactions outstanding for this translation" group.long (0x280+0x08)++0x03 line.long 0x00 "CONTROL,Egress DREG Translation - Control" bitfld.long 0x00 16.--17. " DREG_SIZE ,Size of this translation window" "2^DREG_SIZE_OFFSET,2^(DREG_SIZE_OFFSET+1),2^(DREG_SIZE_OFFSET+2),2^(DREG_SIZE_OFFSET+3)" bitfld.long 0x00 2. " DREG_SECURITY_EN ,Translation security enable" "Disabled,Enabled" bitfld.long 0x00 0. " DREG_ENABLE ,Translation enable" "Disabled,Enabled" group.long (0x280+0x10)++0x07 line.long 0x00 "BASE_LO,Egress DREG Translation - Source Address Low" hexmask.long.tbyte 0x00 12.--31. 0x10 " DREG_BASE_LO ,DREG address low bytes" line.long 0x04 "BASE_HI,Egress DREG Translation - Source Address High" rgroup.long 0x2E0++0x07 "E_SUB Registers" line.long 0x00 "CAPABILITIES,Egress Subtractive Decode Translation - Capabilities" bitfld.long 0x00 0. " SUBT_DEC_PRESENT ,Translation presence indicator" "Not present,Present" line.long 0x04 "STATUS,Egress Subtractive Decode Translation - Status" hexmask.long.word 0x04 16.--24. 1. " WR_PENDING_CTR ,Number of write transactions outstanding for this translation" hexmask.long.word 0x04 0.--8. 1. " RD_PENDING_CTR ,Number of read transactions outstanding for this translation" group.long 0x2E8++0x03 line.long 0x00 "CONTROL,Egress Subtractive Decode Translation - Control" bitfld.long 0x00 0. " EGRESS_SUB_EN ,Subtractive decode enable" "Disabled,Enabled" rgroup.long 0x300++0x03 "I_MSII Registers" line.long 0x00 "CAPABILITIES,Ingress PCI Express Received MSI Interrupt Translation - Capabilities" hexmask.long.byte 0x00 24.--31. 1. " I_MSII_SIZE_MAX ,I_MSII maximal translation size" hexmask.long.byte 0x00 16.--23. 1. " I_MSII_SIZE_OFFSET ,I_MSII minimum translation size offset" bitfld.long 0x00 0. " I_MSII_PRESENT ,Translation presence indicator" "Not present,Present" group.long (0x300+0x08)++0x03 line.long 0x00 "CONTROL,Ingress PCI Express Received MSI Interrupt Translation - Control" bitfld.long 0x00 16.--20. " I_MSII_SIZE ,Size of this translation window" "2^MSII_SIZE_OFFSET,2^(MSII_SIZE_OFFSET+1),2^(MSII_SIZE_OFFSET+2),2^(MSII_SIZE_OFFSET+3),2^(MSII_SIZE_OFFSET+4),2^(MSII_SIZE_OFFSET+5),2^(MSII_SIZE_OFFSET+6),2^(MSII_SIZE_OFFSET+7),2^(MSII_SIZE_OFFSET+8),2^(MSII_SIZE_OFFSET+9),2^(MSII_SIZE_OFFSET+10),2^(MSII_SIZE_OFFSET+11),2^(MSII_SIZE_OFFSET+12),2^(MSII_SIZE_OFFSET+13),2^(MSII_SIZE_OFFSET+14),2^(MSII_SIZE_OFFSET+15),2^(MSII_SIZE_OFFSET+16),2^(MSII_SIZE_OFFSET+17),2^(MSII_SIZE_OFFSET+18),2^(MSII_SIZE_OFFSET+19),2^(MSII_SIZE_OFFSET+20),2^(MSII_SIZE_OFFSET+21),2^(MSII_SIZE_OFFSET+22),2^(MSII_SIZE_OFFSET+23),2^(MSII_SIZE_OFFSET+24),2^(MSII_SIZE_OFFSET+25),2^(MSII_SIZE_OFFSET+26),2^(MSII_SIZE_OFFSET+27),2^(MSII_SIZE_OFFSET+28),2^(MSII_SIZE_OFFSET+29),2^(MSII_SIZE_OFFSET+30),2^(MSII_SIZE_OFFSET+31)" bitfld.long 0x00 0. " I_MSII_ENABLE ,Translation enable" "Disabled,Enabled" group.long (0x300+0x10)++0x07 line.long 0x00 "BASE_LO,Ingress PCI Express Received MSI Interrupt Translation - Source Address Low" hexmask.long.tbyte 0x00 12.--31. 0x10 " MSII_BASE_LO ,MSII address low bytes" line.long 0x04 "BASE_HI,Ingress PCI Express Received MSI Interrupt Translation - Source Address High" rgroup.long 0x320++0x03 "I_MSIX Registers" line.long 0x00 "CAPABILITIES,Ingress PCI Express Received MSI-X Interrupt Translation - Capabilities" hexmask.long.byte 0x00 24.--31. 1. " I_MSIX_SIZE_MAX ,I_MSIX maximal translation size" hexmask.long.byte 0x00 16.--23. 1. " I_MSIX_SIZE_OFFSET ,I_MSIX minimum translation size offset" bitfld.long 0x00 0. " I_MSIX_PRESENT ,Translation presence indicator" "Not present,Present" group.long (0x320+0x08)++0x03 line.long 0x00 "CONTROL,Ingress PCI Express Received MSI-X Interrupt Translation - Control" bitfld.long 0x00 16.--20. " I_MSIX_SIZE ,Size of this translation window" "2^MSIX_SIZE_OFFSET,2^(MSIX_SIZE_OFFSET+1),2^(MSIX_SIZE_OFFSET+2),2^(MSIX_SIZE_OFFSET+3),2^(MSIX_SIZE_OFFSET+4),2^(MSIX_SIZE_OFFSET+5),2^(MSIX_SIZE_OFFSET+6),2^(MSIX_SIZE_OFFSET+7),2^(MSIX_SIZE_OFFSET+8),2^(MSIX_SIZE_OFFSET+9),2^(MSIX_SIZE_OFFSET+10),2^(MSIX_SIZE_OFFSET+11),2^(MSIX_SIZE_OFFSET+12),2^(MSIX_SIZE_OFFSET+13),2^(MSIX_SIZE_OFFSET+14),2^(MSIX_SIZE_OFFSET+15),2^(MSIX_SIZE_OFFSET+16),2^(MSIX_SIZE_OFFSET+17),2^(MSIX_SIZE_OFFSET+18),2^(MSIX_SIZE_OFFSET+19),2^(MSIX_SIZE_OFFSET+20),2^(MSIX_SIZE_OFFSET+21),2^(MSIX_SIZE_OFFSET+22),2^(MSIX_SIZE_OFFSET+23),2^(MSIX_SIZE_OFFSET+24),2^(MSIX_SIZE_OFFSET+25),2^(MSIX_SIZE_OFFSET+26),2^(MSIX_SIZE_OFFSET+27),2^(MSIX_SIZE_OFFSET+28),2^(MSIX_SIZE_OFFSET+29),2^(MSIX_SIZE_OFFSET+30),2^(MSIX_SIZE_OFFSET+31)" bitfld.long 0x00 0. " I_MSIX_ENABLE ,Translation enable" "Disabled,Enabled" group.long (0x320+0x10)++0x07 line.long 0x00 "BASE_LO,Ingress PCI Express Received MSI-X Interrupt Translation - Source Address Low" hexmask.long.tbyte 0x00 12.--31. 0x10 " MSIX_BASE_LO ,MSIX address low bytes" line.long 0x04 "BASE_HI,Ingress PCI Express Received MSI-X Interrupt Translation - Source Address High" rgroup.long 0x3E0++0x07 "I_SUB Registers" line.long 0x00 "CAPABILITIES,Ingress Subtractive Decode Translation - Capabilities" bitfld.long 0x00 0. " SUBT_DEC_PRESENT ,Translation presence indicator" "Not present,Present" line.long 0x04 "STATUS,Ingress Subtractive Decode Translation - Status" hexmask.long.word 0x04 16.--24. 1. " WR_PENDING_CTR ,Number of write transactions outstanding for this translation" hexmask.long.word 0x04 0.--8. 1. " RD_PENDING_CTR ,Number of read transactions outstanding for this translation" group.long 0x3E8++0x03 line.long 0x00 "CONTROL,Ingress Subtractive Decode Translation - Control" bitfld.long 0x00 0. " INGRESS_SUB_EN ,Subtractive decode enable" "Disabled,Enabled" group.long 0x400++0x07 "MSGF Registers" line.long 0x00 "MISC_STATUS,Miscellaneous Interrupt Status" eventfld.long 0x00 26. " PCIE_CORE_EVENT[10] ,Bandwidth management status" "No interrupt,Interrupt" eventfld.long 0x00 25. " [9] ,Link autonomous bandwidth management status" "No interrupt,Interrupt" eventfld.long 0x00 24. " [8] ,PCIe link down" "No interrupt,Interrupt" eventfld.long 0x00 23. " [7] ,Fatal error detected" "No interrupt,Interrupt" textline " " eventfld.long 0x00 22. " @@@@@@@@@@@@@@@[6] ,Non-fatal error detected" "No interrupt,Interrupt" eventfld.long 0x00 21. " [5] ,Correctable error detected" "No interrupt,Interrupt" eventfld.long 0x00 20. " [4] ,UR detected" "No interrupt,Interrupt" eventfld.long 0x00 19. " [3] ,TS1/2 with hot reset bit set received from link partner" "No interrupt,Interrupt" textline " " eventfld.long 0x00 18. " @@@@@@@@@@@@@@@[2] ,Correctable error logged in AER capability" "No interrupt,Interrupt" eventfld.long 0x00 17. " [1] ,Non-fatal error logged in AER capability" "No interrupt,Interrupt" eventfld.long 0x00 16. " [0] ,Fatal error logged in AER capability" "No interrupt,Interrupt" textline " " eventfld.long 0x00 7. " E_ADDR_TRANS_ERR ,Egress address translation security violation" "Not occurred,Occurred" eventfld.long 0x00 6. " I_ADDR_TRANS_ERR ,Ingress address translation security violation" "Not occurred,Occurred" eventfld.long 0x00 5. " MASTER_ERROR ,AXI master error" "No error,Error" eventfld.long 0x00 4. " SLAVE_ERROR ,AXI slave error" "No error,Error" textline " " eventfld.long 0x00 3. " UNCORR_WRITE_ERR ,Uncorrectable write hardware/software error" "No error,Error" eventfld.long 0x00 1. " RX_MSG_OVERFLOW ,Received message FIFO overflow" "No overflow,Overflow" eventfld.long 0x00 0. " RX_MSG_AVAIL ,Received message FIFO available" "Not available,Available" line.long 0x04 "MSGF_MISC_MASK,Miscellaneous Interrupt Status Mask" bitfld.long 0x04 26. " PCIE_CORE_EVENT_MSK[10] ,Bandwidth management interrupt mask" "Masked,Not masked" bitfld.long 0x04 25. " [9] ,Link autonomous bandwidth management interrupt mask" "Masked,Not masked" bitfld.long 0x04 24. " [8] ,PCIe link down interrupt mask" "Masked,Not masked" bitfld.long 0x04 23. " [7] ,Fatal error detected interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x04 22. " @@@@@@@@@@@@@@@@@@@[6] ,Non-fatal error detected interrupt mask" "Masked,Not masked" bitfld.long 0x04 21. " [5] ,Correctable error detected interrupt mask" "Masked,Not masked" bitfld.long 0x04 20. " [4] ,UR detected interrupt mask" "Masked,Not masked" bitfld.long 0x04 19. " [3] ,TS1/2 with hot reset bit set received from link partner interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x04 18. " @@@@@@@@@@@@@@@@@@@[2] ,Correctable error logged in AER capability interrupt mask" "Masked,Not masked" bitfld.long 0x04 17. " [1] ,Non-fatal error logged in AER capability interrupt mask" "Masked,Not masked" bitfld.long 0x04 16. " [0] ,Fatal error logged in AER capability interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x04 7. " E_ADDR_TRANS_ERR_MSK ,Egress address translation security violation interrupt mask" "Masked,Not masked" bitfld.long 0x04 6. " I_ADDR_TRANS_ERR_MSK ,Ingress address translation security violation interrupt mask" "Masked,Not masked" bitfld.long 0x04 5. " MASTER_ERROR_MSK ,AXI master error interrupt mask" "Masked,Not masked" bitfld.long 0x04 4. " SLAVE_ERROR_MSK ,AXI slave error interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x04 3. " UNCORR_WRITE_ERR_MSK ,Uncorrectable write hardware/software error interrupt mask" "Masked,Not masked" bitfld.long 0x04 1. " RX_MSG_OVERFLOW_MSK ,Received message FIFO overflow interrupt mask" "Masked,Not masked" bitfld.long 0x04 0. " RX_MSG_AVAIL_MSK ,Received message FIFO available interrupt mask" "Masked,Not masked" textline " " rgroup.long 0x408++0x0F line.long 0x00 "SLAVE_ID,Slave Error AXI ID" hexmask.long.byte 0x00 0.--7. 1. " SLAVE_ERROR_ID ,AXI ID of the first detected AXI slave interface SLVERR or DECERR error" line.long 0x04 "MASTER_ID,Master Error AXI ID" hexmask.long.byte 0x04 0.--7. 1. " MASTER_ERROR_ID ,AXI ID of the first detected AXI master interface interface error" line.long 0x08 "INGRESS_ID,Ingress Error AXI ID" hexmask.long.byte 0x08 0.--7. 1. " INGRESS_ERROR_ID ,AXI ID of the first detected AXI ingress address translation security violation" line.long 0x0C "INGRESS_ID,Ingress Error AXI ID" hexmask.long.byte 0x0C 0.--7. 1. " EGRESS_ERROR_ID ,AXI ID of the first detected egress address translation security violation" rgroup.long 0x420++0x03 line.long 0x00 "LEG_STATUS,Legacy Interrupt Status" bitfld.long 0x00 3. " LEG_STATUS_INTD ,Generated from received PCIe ASSERT_INTD and DEASSERT_INTD messages" "No interrupt,Interrupt" bitfld.long 0x00 2. " LEG_STATUS_INTC ,Generated from received PCIe ASSERT_INTC and DEASSERT_INTC messages" "No interrupt,Interrupt" bitfld.long 0x00 1. " LEG_STATUS_INTB ,Generated from received PCIe ASSERT_INTB and DEASSERT_INTB messages" "No interrupt,Interrupt" bitfld.long 0x00 0. " LEG_STATUS_INTA ,Generated from received PCIe ASSERT_INTA and DEASSERT_INTA messages" "No interrupt,Interrupt" group.long 0x424++0x03 line.long 0x00 "LEG_MASK,Legacy Interrupt Mask" bitfld.long 0x00 3. " LEG_MASK_INTD ,Legacy INTD interrupt mask" "Masked,Not masked" bitfld.long 0x00 2. " LEG_MASK_INTC ,Legacy INTC interrupt mask" "Masked,Not masked" bitfld.long 0x00 1. " LEG_MASK_INTB ,Legacy INTB interrupt mask" "Masked,Not masked" bitfld.long 0x00 0. " LEG_MASK_INTA ,Legacy INTA interrupt mask" "Masked,Not masked" textline " " group.long 0x440++0x0F line.long 0x00 "MSI_STATUS_LO,MSI Interrupt Status [31:0]" eventfld.long 0x00 31. " MSI_STATUS[31] ,MSI interrupt per vector 31 status" "Not received,Received" eventfld.long 0x00 30. " [30] ,MSI interrupt per vector 30 status" "Not received,Received" eventfld.long 0x00 29. " [29] ,MSI interrupt per vector 29 status" "Not received,Received" eventfld.long 0x00 28. " [28] ,MSI interrupt per vector 28 status" "Not received,Received" textline " " eventfld.long 0x00 27. " [27] ,MSI interrupt per vector 27 status" "Not received,Received" eventfld.long 0x00 26. " [26] ,MSI interrupt per vector 26 status" "Not received,Received" eventfld.long 0x00 25. " [25] ,MSI interrupt per vector 25 status" "Not received,Received" eventfld.long 0x00 24. " [24] ,MSI interrupt per vector 24 status" "Not received,Received" textline " " eventfld.long 0x00 23. " [23] ,MSI interrupt per vector 23 status" "Not received,Received" eventfld.long 0x00 22. " [22] ,MSI interrupt per vector 22 status" "Not received,Received" eventfld.long 0x00 21. " [21] ,MSI interrupt per vector 21 status" "Not received,Received" eventfld.long 0x00 20. " [20] ,MSI interrupt per vector 20 status" "Not received,Received" textline " " eventfld.long 0x00 19. " [19] ,MSI interrupt per vector 19 status" "Not received,Received" eventfld.long 0x00 18. " [18] ,MSI interrupt per vector 18 status" "Not received,Received" eventfld.long 0x00 17. " [17] ,MSI interrupt per vector 17 status" "Not received,Received" eventfld.long 0x00 16. " [16] ,MSI interrupt per vector 16 status" "Not received,Received" textline " " eventfld.long 0x00 15. " [15] ,MSI interrupt per vector 15 status" "Not received,Received" eventfld.long 0x00 14. " [14] ,MSI interrupt per vector 14 status" "Not received,Received" eventfld.long 0x00 13. " [13] ,MSI interrupt per vector 13 status" "Not received,Received" eventfld.long 0x00 12. " [12] ,MSI interrupt per vector 12 status" "Not received,Received" textline " " eventfld.long 0x00 11. " [11] ,MSI interrupt per vector 11 status" "Not received,Received" eventfld.long 0x00 10. " [10] ,MSI interrupt per vector 10 status" "Not received,Received" eventfld.long 0x00 9. " [9] ,MSI interrupt per vector 9 status" "Not received,Received" eventfld.long 0x00 8. " [8] ,MSI interrupt per vector 8 status" "Not received,Received" textline " " eventfld.long 0x00 7. " [7] ,MSI interrupt per vector 7 status" "Not received,Received" eventfld.long 0x00 6. " [6] ,MSI interrupt per vector 6 status" "Not received,Received" eventfld.long 0x00 5. " [5] ,MSI interrupt per vector 5 status" "Not received,Received" eventfld.long 0x00 4. " [4] ,MSI interrupt per vector 4 status" "Not received,Received" textline " " eventfld.long 0x00 3. " [3] ,MSI interrupt per vector 3 status" "Not received,Received" eventfld.long 0x00 2. " [2] ,MSI interrupt per vector 2 status" "Not received,Received" eventfld.long 0x00 1. " [1] ,MSI interrupt per vector 1 status" "Not received,Received" eventfld.long 0x00 0. " [0] ,MSI interrupt per vector 0 status" "Not received,Received" line.long 0x04 "MSI_STATUS_HI,MSI Interrupt Status [63:32]" eventfld.long 0x04 31. " MSI_STATUS[63] ,MSI interrupt per vector 63 status" "Not received,Received" eventfld.long 0x04 30. " [62] ,MSI interrupt per vector 62 status" "Not received,Received" eventfld.long 0x04 29. " [61] ,MSI interrupt per vector 61 status" "Not received,Received" eventfld.long 0x04 28. " [60] ,MSI interrupt per vector 60 status" "Not received,Received" textline " " eventfld.long 0x04 27. " [59] ,MSI interrupt per vector 59 status" "Not received,Received" eventfld.long 0x04 26. " [58] ,MSI interrupt per vector 58 status" "Not received,Received" eventfld.long 0x04 25. " [57] ,MSI interrupt per vector 57 status" "Not received,Received" eventfld.long 0x04 24. " [56] ,MSI interrupt per vector 56 status" "Not received,Received" textline " " eventfld.long 0x04 23. " [55] ,MSI interrupt per vector 55 status" "Not received,Received" eventfld.long 0x04 22. " [54] ,MSI interrupt per vector 54 status" "Not received,Received" eventfld.long 0x04 21. " [53] ,MSI interrupt per vector 53 status" "Not received,Received" eventfld.long 0x04 20. " [52] ,MSI interrupt per vector 52 status" "Not received,Received" textline " " eventfld.long 0x04 19. " [51] ,MSI interrupt per vector 51 status" "Not received,Received" eventfld.long 0x04 18. " [50] ,MSI interrupt per vector 50 status" "Not received,Received" eventfld.long 0x04 17. " [49] ,MSI interrupt per vector 49 status" "Not received,Received" eventfld.long 0x04 16. " [48] ,MSI interrupt per vector 48 status" "Not received,Received" textline " " eventfld.long 0x04 15. " [47] ,MSI interrupt per vector 47 status" "Not received,Received" eventfld.long 0x04 14. " [46] ,MSI interrupt per vector 46 status" "Not received,Received" eventfld.long 0x04 13. " [45] ,MSI interrupt per vector 45 status" "Not received,Received" eventfld.long 0x04 12. " [44] ,MSI interrupt per vector 44 status" "Not received,Received" textline " " eventfld.long 0x04 11. " [43] ,MSI interrupt per vector 43 status" "Not received,Received" eventfld.long 0x04 10. " [42] ,MSI interrupt per vector 42 status" "Not received,Received" eventfld.long 0x04 9. " [41] ,MSI interrupt per vector 41 status" "Not received,Received" eventfld.long 0x04 8. " [40] ,MSI interrupt per vector 40 status" "Not received,Received" textline " " eventfld.long 0x04 7. " [39] ,MSI interrupt per vector 39 status" "Not received,Received" eventfld.long 0x04 6. " [38] ,MSI interrupt per vector 38 status" "Not received,Received" eventfld.long 0x04 5. " [37] ,MSI interrupt per vector 37 status" "Not received,Received" eventfld.long 0x04 4. " [36] ,MSI interrupt per vector 36 status" "Not received,Received" textline " " eventfld.long 0x04 3. " [35] ,MSI interrupt per vector 35 status" "Not received,Received" eventfld.long 0x04 2. " [34] ,MSI interrupt per vector 34 status" "Not received,Received" eventfld.long 0x04 1. " [33] ,MSI interrupt per vector 33 status" "Not received,Received" eventfld.long 0x04 0. " [32] ,MSI interrupt per vector 32 status" "Not received,Received" line.long 0x08 "MSI_MASK_LO,MSI Interrupt Mask [31:0]" bitfld.long 0x08 31. " MSI_STATUS[31] ,MSI interrupt per vector 31 status" "Masked,Not masked" bitfld.long 0x08 30. " [30] ,MSI interrupt per vector 30 mask" "Masked,Not masked" bitfld.long 0x08 29. " [29] ,MSI interrupt per vector 29 mask" "Masked,Not masked" bitfld.long 0x08 28. " [28] ,MSI interrupt per vector 28 mask" "Masked,Not masked" textline " " bitfld.long 0x08 27. " [27] ,MSI interrupt per vector 27 mask" "Masked,Not masked" bitfld.long 0x08 26. " [26] ,MSI interrupt per vector 26 mask" "Masked,Not masked" bitfld.long 0x08 25. " [25] ,MSI interrupt per vector 25 mask" "Masked,Not masked" bitfld.long 0x08 24. " [24] ,MSI interrupt per vector 24 mask" "Masked,Not masked" textline " " bitfld.long 0x08 23. " [23] ,MSI interrupt per vector 23 mask" "Masked,Not masked" bitfld.long 0x08 22. " [22] ,MSI interrupt per vector 22 mask" "Masked,Not masked" bitfld.long 0x08 21. " [21] ,MSI interrupt per vector 21 mask" "Masked,Not masked" bitfld.long 0x08 20. " [20] ,MSI interrupt per vector 20 mask" "Masked,Not masked" textline " " bitfld.long 0x08 19. " [19] ,MSI interrupt per vector 19 mask" "Masked,Not masked" bitfld.long 0x08 18. " [18] ,MSI interrupt per vector 18 mask" "Masked,Not masked" bitfld.long 0x08 17. " [17] ,MSI interrupt per vector 17 mask" "Masked,Not masked" bitfld.long 0x08 16. " [16] ,MSI interrupt per vector 16 mask" "Masked,Not masked" textline " " bitfld.long 0x08 15. " [15] ,MSI interrupt per vector 15 mask" "Masked,Not masked" bitfld.long 0x08 14. " [14] ,MSI interrupt per vector 14 mask" "Masked,Not masked" bitfld.long 0x08 13. " [13] ,MSI interrupt per vector 13 mask" "Masked,Not masked" bitfld.long 0x08 12. " [12] ,MSI interrupt per vector 12 mask" "Masked,Not masked" textline " " bitfld.long 0x08 11. " [11] ,MSI interrupt per vector 11 mask" "Masked,Not masked" bitfld.long 0x08 10. " [10] ,MSI interrupt per vector 10 mask" "Masked,Not masked" bitfld.long 0x08 9. " [9] ,MSI interrupt per vector 9 mask" "Masked,Not masked" bitfld.long 0x08 8. " [8] ,MSI interrupt per vector 8 mask" "Masked,Not masked" textline " " bitfld.long 0x08 7. " [7] ,MSI interrupt per vector 7 mask" "Masked,Not masked" bitfld.long 0x08 6. " [6] ,MSI interrupt per vector 6 mask" "Masked,Not masked" bitfld.long 0x08 5. " [5] ,MSI interrupt per vector 5 mask" "Masked,Not masked" bitfld.long 0x08 4. " [4] ,MSI interrupt per vector 4 mask" "Masked,Not masked" textline " " bitfld.long 0x08 3. " [3] ,MSI interrupt per vector 3 mask" "Masked,Not masked" bitfld.long 0x08 2. " [2] ,MSI interrupt per vector 2 mask" "Masked,Not masked" bitfld.long 0x08 1. " [1] ,MSI interrupt per vector 1 mask" "Masked,Not masked" bitfld.long 0x08 0. " [0] ,MSI interrupt per vector 0 mask" "Masked,Not masked" line.long 0x0C "MSI_MASK_HI,MSI Interrupt Mask [63:32]" bitfld.long 0x0C 31. " MSI_STATUS[63] ,MSI interrupt per vector 63 mask" "Masked,Not masked" bitfld.long 0x0C 30. " [62] ,MSI interrupt per vector 62 mask" "Masked,Not masked" bitfld.long 0x0C 29. " [61] ,MSI interrupt per vector 61 mask" "Masked,Not masked" bitfld.long 0x0C 28. " [60] ,MSI interrupt per vector 60 mask" "Masked,Not masked" textline " " bitfld.long 0x0C 27. " [59] ,MSI interrupt per vector 59 mask" "Masked,Not masked" bitfld.long 0x0C 26. " [58] ,MSI interrupt per vector 58 mask" "Masked,Not masked" bitfld.long 0x0C 25. " [57] ,MSI interrupt per vector 57 mask" "Masked,Not masked" bitfld.long 0x0C 24. " [56] ,MSI interrupt per vector 56 mask" "Masked,Not masked" textline " " bitfld.long 0x0C 23. " [55] ,MSI interrupt per vector 55 mask" "Masked,Not masked" bitfld.long 0x0C 22. " [54] ,MSI interrupt per vector 54 mask" "Masked,Not masked" bitfld.long 0x0C 21. " [53] ,MSI interrupt per vector 53 mask" "Masked,Not masked" bitfld.long 0x0C 20. " [52] ,MSI interrupt per vector 52 mask" "Masked,Not masked" textline " " bitfld.long 0x0C 19. " [51] ,MSI interrupt per vector 51 mask" "Masked,Not masked" bitfld.long 0x0C 18. " [50] ,MSI interrupt per vector 50 mask" "Masked,Not masked" bitfld.long 0x0C 17. " [49] ,MSI interrupt per vector 49 mask" "Masked,Not masked" bitfld.long 0x0C 16. " [48] ,MSI interrupt per vector 48 mask" "Masked,Not masked" textline " " bitfld.long 0x0C 15. " [47] ,MSI interrupt per vector 47 mask" "Masked,Not masked" bitfld.long 0x0C 14. " [46] ,MSI interrupt per vector 46 mask" "Masked,Not masked" bitfld.long 0x0C 13. " [45] ,MSI interrupt per vector 45 mask" "Masked,Not masked" bitfld.long 0x0C 12. " [44] ,MSI interrupt per vector 44 mask" "Masked,Not masked" textline " " bitfld.long 0x0C 11. " [43] ,MSI interrupt per vector 43 mask" "Masked,Not masked" bitfld.long 0x0C 10. " [42] ,MSI interrupt per vector 42 mask" "Masked,Not masked" bitfld.long 0x0C 9. " [41] ,MSI interrupt per vector 41 mask" "Masked,Not masked" bitfld.long 0x0C 8. " [40] ,MSI interrupt per vector 40 mask" "Masked,Not masked" textline " " bitfld.long 0x0C 7. " [39] ,MSI interrupt per vector 39 mask" "Masked,Not masked" bitfld.long 0x0C 6. " [38] ,MSI interrupt per vector 38 mask" "Masked,Not masked" bitfld.long 0x0C 5. " [37] ,MSI interrupt per vector 37 mask" "Masked,Not masked" bitfld.long 0x0C 4. " [36] ,MSI interrupt per vector 36 mask" "Masked,Not masked" textline " " bitfld.long 0x0C 3. " [35] ,MSI interrupt per vector 35 mask" "Masked,Not masked" bitfld.long 0x0C 2. " [34] ,MSI interrupt per vector 34 mask" "Masked,Not masked" bitfld.long 0x0C 1. " [33] ,MSI interrupt per vector 33 mask" "Masked,Not masked" bitfld.long 0x0C 0. " [32] ,MSI interrupt per vector 32 mask" "Masked,Not masked" textline " " rgroup.long 0x460++0x03 line.long 0x00 "DMA_STATUS,DMA Interrupt Status" bitfld.long 0x00 0. " DMA_STATUS ,DMA interrupt status" "No interrupt,Interrupt" group.long 0x464++0x03 line.long 0x00 "DMA_MASK,DMA Interrupt Mask" bitfld.long 0x00 0. " DMA_MASK ,DMA interrupt mask" "Masked,Not masked" rgroup.long 0x480++0x1B line.long 0x00 "RX_FIFO_LEVEL,Received Interrupt And Message FIFO Level" hexmask.long.byte 0x00 0.--7. 1. " LEVEL ,Received interrupt and message FIFO level" line.long 0x04 "RX_FIFO_POP,Received Interrupt And Message FIFO Pop Element" bitfld.long 0x04 0. " POP ,Remove the top interrupt/message element from the FIFO" "Not removed,Removed" line.long 0x08 "RX_FIFO_TYPE,Received Interrupt And Message FIFO - Message/interrupt Type" hexmask.long.word 0x08 16.--31. 1. " REQUESTER_ID ,PCI express requester ID captured from the ingress PCIe TLP" bitfld.long 0x08 0.--1. " INTR_TYPE ,Interrupt/message type" "0,1,2,3" line.long 0x0C "RX_FIFO_MSG,Received Message Header" hexmask.long.byte 0x0C 16.--23. 1. " MESSAGE_TAG ,Tag of received message TLP" hexmask.long.byte 0x0C 8.--15. 1. " MESSAGE_CODE ,Message code of received message TLP" bitfld.long 0x0C 3. " MESSAGE_PAYL_PR ,Message data payload presence" "Not present,Present" bitfld.long 0x0C 0.--2. " MESSAGE_ROUTING ,Message routing of received message TLP" "0,1,2,3,4,5,6,7" line.long 0x10 "RX_FIFO_ADDRESS_LO,Received Message/interrupt Address[31:0]" line.long 0x14 "RX_FIFO_ADDRESS_HI,Received Message/interrupt Address[63:32]" line.long 0x18 "RX_FIFO_DATA,Received Message/interrupt Data Payload[31:0]" rgroup.long 0x620++0x03 "TX_PCIE Registers" line.long 0x00 "MSG_EXECUTE,PCIe Message Request Execution" bitfld.long 0x00 24.--25. " MSG_DONE_STATUS ,Message transaction done status" "0,1,2,3" bitfld.long 0x00 16. " MSG_DONE ,Message transaction done" "Not completed,Completed" bitfld.long 0x00 8. " MSG_BUSY ,Message transaction busy" "Not busy,Busy" bitfld.long 0x00 0. " MSG_EXECUTE ,Message transaction execute" "Not started,Started" group.long 0x624++0x0B line.long 0x00 "MSG_CONTROL,PCIe Message Request Execution Control" bitfld.long 0x00 24. " MSG_HAS_DATA ,Message payload presence" "Not present,Present" hexmask.long.byte 0x00 16.--23. 1. " MSG_TAG ,Message tag" hexmask.long.byte 0x00 8.--15. 1. " MSG_CODE ,Message code" hexmask.long.byte 0x00 0.--7. 1. " MSG_FMT_TYPE ,Message format and type" line.long 0x04 "MSG_SPECIFIC_LO,PCIe Message Request Execution Message Specific[31:0]" hexmask.long.byte 0x04 24.--31. 1. " MSG_TLP_HDR11 ,Byte 11 of message TLP header" hexmask.long.byte 0x04 16.--23. 1. " MSG_TLP_HDR10 ,Byte 10 of message TLP header" hexmask.long.byte 0x04 8.--15. 1. " MSG_TLP_HDR9 ,Byte 9 of message TLP header" hexmask.long.byte 0x04 0.--7. 1. " MSG_TLP_HDR8 ,Byte 8 of message TLP header" line.long 0x08 "MSG_SPECIFIC_HI,PCIe Message Request Execution Message Specific[63:32]" hexmask.long.byte 0x08 24.--31. 1. " MSG_TLP_HDR15 ,Byte 15 of message TLP header" hexmask.long.byte 0x08 16.--23. 1. " MSG_TLP_HDR14 ,Byte 14 of message TLP header" hexmask.long.byte 0x08 8.--15. 1. " MSG_TLP_HDR13 ,Byte 13 of message TLP header" hexmask.long.byte 0x08 0.--7. 1. " MSG_TLP_HDR12 ,Byte 12 of message TLP header" group.long 0x630++0x03 line.long 0x00 "MSG_DATA,PCIe Message Request Execution Message Data Payload" width 0x0B tree.end tree.end tree "BBRAM (Battery Backed RAM)" base ad:0xFFCD0000 width 19. if (((d.l(ad:0xFFCD0000))&0x100)==0x00) group.long 0x00++0x03 line.long 0x00 "BBRAM_STATUS,BBRAM Status" textfld " " bitfld.long 0x00 8. " AES_CRC_DONE ,AES key integrity check has finished" "Not finished,Finished" bitfld.long 0x00 4. " BBRAM_ZERO ,Zerization command has been successful" "Not successful,Successful" bitfld.long 0x00 0. " PGM_MODE ,BBRAM is in programming mode" "False,True" else group.long 0x00++0x03 line.long 0x00 "BBRAM_STATUS,BBRAM Status" bitfld.long 0x00 9. " AES_CRC_PASS ,AES key integrity check passed" "Not passed,Passed" bitfld.long 0x00 8. " AES_CRC_DONE ,AES key integrity check has finished" "Not finished,Finished" bitfld.long 0x00 4. " BBRAM_ZERO ,Zerization command has been successful" "Not successful,Successful" bitfld.long 0x00 0. " PGM_MODE ,BBRAM is in programming mode" "False,True" endif wgroup.long 0x04++0x03 line.long 0x00 "BBRAM_CTRL,BBRAM Control" bitfld.long 0x00 0. " ZEROIZE ,Zeroize the contents of the BBRAM" "No effect,Zeroize" group.long 0x08++0x03 line.long 0x00 "PGM_MODE,BBRAM Program Mode" wgroup.long 0x0C++0x03 line.long 0x00 "BBRAM_AES_CRC,BBRAM AES Key Integrity Check" if (((d.l(ad:0xFFCD0000))&0x01)==0x00) hgroup.long 0x10++0x03 hide.long 0x00 "BBRAM_0_RSVD,BBRAM Data 0(Reserved)" hgroup.long 0x14++0x03 hide.long 0x00 "BBRAM_1_RSVD,BBRAM Data 1(Reserved)" hgroup.long 0x18++0x03 hide.long 0x00 "BBRAM_2_RSVD,BBRAM Data 2(Reserved)" hgroup.long 0x1C++0x03 hide.long 0x00 "BBRAM_3_RSVD,BBRAM Data 3(Reserved)" hgroup.long 0x20++0x03 hide.long 0x00 "BBRAM_4_RSVD,BBRAM Data 4(Reserved)" hgroup.long 0x24++0x03 hide.long 0x00 "BBRAM_5_RSVD,BBRAM Data 5(Reserved)" hgroup.long 0x28++0x03 hide.long 0x00 "BBRAM_6_RSVD,BBRAM Data 6(Reserved)" hgroup.long 0x2C++0x03 hide.long 0x00 "BBRAM_7_RSVD,BBRAM Data 7(Reserved)" hgroup.long 0x30++0x03 hide.long 0x00 "BBRAM_8_RSVD,BBRAM Data 8(Reserved)" else wgroup.long 0x10++0x03 line.long 0x00 "BBRAM_0,BBRAM Data 0" wgroup.long 0x14++0x03 line.long 0x00 "BBRAM_1,BBRAM Data 1" wgroup.long 0x18++0x03 line.long 0x00 "BBRAM_2,BBRAM Data 2" wgroup.long 0x1C++0x03 line.long 0x00 "BBRAM_3,BBRAM Data 3" wgroup.long 0x20++0x03 line.long 0x00 "BBRAM_4,BBRAM Data 4" wgroup.long 0x24++0x03 line.long 0x00 "BBRAM_5,BBRAM Data 5" wgroup.long 0x28++0x03 line.long 0x00 "BBRAM_6,BBRAM Data 6" wgroup.long 0x2C++0x03 line.long 0x00 "BBRAM_7,BBRAM Data 7" wgroup.long 0x30++0x03 line.long 0x00 "BBRAM_8,BBRAM Data 8" endif group.long 0x34++0x07 line.long 0x00 "BBRAM_SLVERR,BBRAM Slave Error Control" bitfld.long 0x00 0. " ENABLE ,Invalid address requests cause a slverr to occur enable" "Disabled,Enabled" line.long 0x04 "BBRAM_ISR,BBRAM Interrupt Status" eventfld.long 0x04 0. " APB_SLVERR ,APB slave error" "No error,Error" group.long 0x3C++0x03 line.long 0x00 "BBRAM_IMR_SET/CLR,BBRAM Interrupt Mask" setclrfld.long 0x00 0. 0x08 0. 0x04 0. " APB_SLVERR ,APB slave error interrupt mask" "Not masked,Masked" width 0x0B tree.end tree "CAN (Controller Area Network)" tree "CAN0" base ad:0xFF060000 width 14. group.long 0x00++0x0F line.long 0x00 "SRR,Software Reset Register" bitfld.long 0x00 1. " CEN ,CAN enable" "Disabled,Enabled" bitfld.long 0x00 0. " SRST ,Reset for the CAN controller" "No reset,Reset" line.long 0x04 "MSR,Mode Select Register" bitfld.long 0x04 2. " SNOOP ,Snoop mode enable" "Disabled,Enabled" bitfld.long 0x04 1. " LBACK ,Loop back mode enable" "Disabled,Enabled" bitfld.long 0x04 0. " SLEEP ,Sleep mode enable" "Disabled,Enabled" line.long 0x08 "BRPR,Baud Rate Prescaler Register" hexmask.long.byte 0x08 0.--7. 1. " BRP ,Baud rate prescaler" line.long 0x0C "BTR,Bit Timing Register" bitfld.long 0x0C 7.--8. " SJW ,Synchronization jump width" "1,2,3,4" bitfld.long 0x0C 4.--6. " TS2 ,Time segment 2" "1,2,3,4,5,6,7,8" bitfld.long 0x0C 0.--3. " TS1 ,Time segment 1" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" rgroup.long 0x10++0x03 line.long 0x00 "ECR,Error Counter Register" hexmask.long.byte 0x00 8.--15. 1. " REC ,Receive error counter" hexmask.long.byte 0x00 0.--7. 1. " TEC ,Transmit error counter" group.long 0x14++0x03 line.long 0x00 "ESR,Error Status Register" eventfld.long 0x00 4. " ACKER ,Acknowledgment error occurred" "Not occurred,Occurred" eventfld.long 0x00 3. " BERR ,Received and transmit bit mismatch occurred" "Not occurred,Occurred" eventfld.long 0x00 2. " STER ,Stuff error occurred" "Not occurred,Occurred" textline " " eventfld.long 0x00 1. " FMER ,Form error occurred" "Not occurred,Occurred" eventfld.long 0x00 0. " CRCER ,CRC error occurred" "Not occurred,Occurred" rgroup.long 0x18++0x0B line.long 0x00 "SR,Status Register" bitfld.long 0x00 12. " SNOOP ,CAN controller is in snoop mode" "Disabled,Enabled" bitfld.long 0x00 11. " ACFBSY ,Acceptance filter busy indicator" "Writable,Not writable" bitfld.long 0x00 10. " TXFLL ,Transmit FIFO full" "Not full,Full" textline " " bitfld.long 0x00 9. " TXBFLL ,High priority transmit buffer full" "Not full,Full" textline " " bitfld.long 0x00 7.--8. " ESTAT ,Error status" "Configuration mode,Error active state,Error passive state,Bus off state" bitfld.long 0x00 6. " ERRWRN ,Error warning" "None >=96,One or more >=96" bitfld.long 0x00 5. " BBSY ,Bus busy indicates the CAN bus status" "Configuration mode/not busy,Busy" textline " " bitfld.long 0x00 4. " BIDLE ,Bus idle" "Configuration mode/not idle,Idle" bitfld.long 0x00 3. " NORMAL ,Normal mode" "Disabled,Enabled" bitfld.long 0x00 2. " SLEEP ,Sleep mode" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " LBACK ,Loop back mode" "Disabled,Enabled" bitfld.long 0x00 0. " CONFIG ,Configuration mode" "Disabled,Enabled" line.long 0x04 "ISR,Interrupt Status Register" bitfld.long 0x04 14. " TXFEMP ,Transmit FIFO empty interrupt" "No interrupt,Interrupt" bitfld.long 0x04 13. " TXFWMEMP ,Transmit FIFO watermark empty interrupt" "No interrupt,Interrupt" bitfld.long 0x04 12. " RXFWMFLL ,Receive FIFO watermark full interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 11. " WKUP ,Wake up interrupt" "No interrupt,Interrupt" bitfld.long 0x04 10. " SLP ,Sleep interrupt" "No interrupt,Interrupt" bitfld.long 0x04 9. " BSOFF ,Bus off interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 8. " ERROR ,Error interrupt" "No interrupt,Interrupt" bitfld.long 0x04 7. " RXNEMP ,Receive FIFO not empty interrupt" "No interrupt,Interrupt" bitfld.long 0x04 6. " RXOFLW ,RX FIFO overflow interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 5. " RXUFLW ,RX FIFO underflow interrupt" "No interrupt,Interrupt" bitfld.long 0x04 4. " RXOK ,New message received interrupt" "No interrupt,Interrupt" bitfld.long 0x04 3. " TXBFLL ,High priority transmit buffer full interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 2. " TXFLL ,Transmit FIFO full interrupt" "No interrupt,Interrupt" bitfld.long 0x04 1. " TXOK ,Transmission successful interrupt" "No interrupt,Interrupt" bitfld.long 0x04 0. " ARBLST ,Arbitration lost interrupt" "No interrupt,Interrupt" line.long 0x08 "IER,Interrupt Enable Register" bitfld.long 0x08 14. " ETXFEMP ,Transmit FIFO empty interrupt enable" "Disabled,Enabled" bitfld.long 0x08 13. " ETXFWMEMP ,Transmit FIFO watermark empty interrupt enable" "Disabled,Enabled" bitfld.long 0x08 12. " ERXFWMFLL ,Receive FIFO watermark full interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x08 11. " EWKUP ,Wake up interrupt enable" "Disabled,Enabled" bitfld.long 0x08 10. " ESLP ,Sleep interrupt enable" "Disabled,Enabled" bitfld.long 0x08 9. " EBSOFF ,Bus off interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x08 8. " EERROR ,Error interrupt enable" "Disabled,Enabled" bitfld.long 0x08 7. " ERXNEMP ,Receive FIFO not empty interrupt enable" "Disabled,Enabled" bitfld.long 0x08 6. " ERXOFLW ,RX FIFO overflow interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x08 5. " ERXUFLW ,RX FIFO underflow interrupt enable" "Disabled,Enabled" bitfld.long 0x08 4. " ERXOK ,New message received interrupt enable" "Disabled,Enabled" bitfld.long 0x08 3. " ETXBFLL ,High priority transmit buffer full interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x08 2. " ETXFLL ,Transmit FIFO full interrupt enable" "Disabled,Enabled" bitfld.long 0x08 1. " ETXOK ,Transmission successful interrupt enable" "Disabled,Enabled" bitfld.long 0x08 0. " EARBLST ,Arbitration lost interrupt enable" "Disabled,Enabled" wgroup.long 0x24++0x07 line.long 0x00 "ICR,Interrupt Clear Register" bitfld.long 0x00 14. " CTXFEMP ,Transmit FIFO empty interrupt clear" "No effect,Clear" bitfld.long 0x00 13. " CTXFWMEMP ,Transmit FIFO watermark empty interrupt clear" "No effect,Clear" bitfld.long 0x00 12. " CRXFWMFLL ,Receive FIFO watermark full interrupt clear" "No effect,Clear" textline " " bitfld.long 0x00 11. " CWKUP ,Wake up interrupt clear" "No effect,Clear" bitfld.long 0x00 10. " CSLP ,Sleep interrupt clear" "No effect,Clear" bitfld.long 0x00 9. " CBSOFF ,Bus off interrupt clear" "No effect,Clear" textline " " bitfld.long 0x00 8. " CERROR ,Error interrupt clear" "No effect,Clear" bitfld.long 0x00 7. " CRXNEMP ,Receive FIFO not empty interrupt clear" "No effect,Clear" bitfld.long 0x00 6. " CRXOFLW ,RX FIFO overflow interrupt clear" "No effect,Clear" textline " " bitfld.long 0x00 5. " CRXUFLW ,RX FIFO underflow interrupt clear" "No effect,Clear" bitfld.long 0x00 4. " CRXOK ,New message received interrupt clear" "No effect,Clear" bitfld.long 0x00 3. " CTXBFLL ,High priority transmit buffer full interrupt clear" "No effect,Clear" textline " " bitfld.long 0x00 2. " CTXFLL ,Transmit FIFO full interrupt clear" "No effect,Clear" bitfld.long 0x00 1. " CTXOK ,Transmission successful interrupt clear" "No effect,Clear" bitfld.long 0x00 0. " CARBLST ,Arbitration lost interrupt clear" "No effect,Clear" line.long 0x04 "TCR,Timestamp Control Register" bitfld.long 0x04 0. " CTS ,Clear timestamp" "No effect,Clear" if (((d.l(ad:0xFF060000))&0x02)==0x00) group.long 0x2C++0x03 line.long 0x00 "WIR,Watermark Interrupt Register" hexmask.long.byte 0x00 8.--15. 1. " EW ,TXFIFO empty watermark" hexmask.long.byte 0x00 0.--7. 1. " FW ,RXFIFO full watermark" else rgroup.long 0x2C++0x03 line.long 0x00 "WIR,Watermark Interrupt Register" hexmask.long.byte 0x00 8.--15. 1. " EW ,TXFIFO empty watermark" hexmask.long.byte 0x00 0.--7. 1. " FW ,RXFIFO full watermark" endif wgroup.long 0x30++0x03 line.long 0x00 "TXFIFO_ID,Transmit Message FIFO Message Identifier Register" hexmask.long.word 0x00 21.--31. 1. " IDH ,Standard message ID" bitfld.long 0x00 20. " SRRRTR ,Substitute remote transmission request" "Data frame,Remote frame" bitfld.long 0x00 19. " IDE ,Identifier extension" "Standard,Extended" textline " " hexmask.long.tbyte 0x00 1.--18. 1. " IDL ,Extended message ID" bitfld.long 0x00 0. " RTR ,Remote transmission request" "Data frames,Remote frames" group.long 0x34++0x03 line.long 0x00 "TXFIFO_DLC,Transmit Message FIFO Data Length Code Register" bitfld.long 0x00 28.--31. " DLC ,Data length code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hgroup.long 0x38++0x07 hide.long 0x00 "TXFIFO_DATA1,Transmit Message FIFO Data Word 1 Register" textfld " " in hide.long 0x04 "TXFIFO_DATA2,Transmit Message FIFO Data Word 2 Register" textfld " " in textline " " wgroup.long 0x40++0x03 line.long 0x00 "TXHPB_ID,Transmit High Priority Buffer Message Identifier Register" hexmask.long.word 0x00 21.--31. 1. " IDH ,Standard message ID" bitfld.long 0x00 20. " SRRRTR ,Substitute remote transmission request" "Data frame,Remote frame" bitfld.long 0x00 19. " IDE ,Identifier extension" "Standard,Extended" hexmask.long.tbyte 0x00 1.--18. 1. " IDL ,Extended message ID" textline " " bitfld.long 0x00 0. " RTR ,Remote transmission request" "Standard frames,Remote frame" group.long 0x44++0x03 line.long 0x00 "TXHPB_DLC,Transmit High Priority Buffer Data Length Code Register" bitfld.long 0x00 28.--31. " DLC ,Data length code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hgroup.long 0x48++0x07 hide.long 0x00 "TXHPB_DATA1,Transmit High Priority Buffer Data Word 1 Register" textfld " " in hide.long 0x04 "TXHPB_DATA2,Transmit High Priority Buffer Data Word 2 Register" textfld " " in textline " " rgroup.long 0x50++0x03 line.long 0x00 "RXFIFO_ID,Receive Message FIFO Mesage Identifier Register" hexmask.long.word 0x00 21.--31. 1. " IDH ,Standard message ID" bitfld.long 0x00 20. " SRRRTR ,Substitute remote transmission request" "Data frame,Remote frame" bitfld.long 0x00 19. " IDE ,Identifier extension" "Standard,Extended" hexmask.long.tbyte 0x00 1.--18. 1. " IDL ,Extended message ID" textline " " bitfld.long 0x00 0. " RTR ,Remote transmission request" "Standard frames,Remote frame" group.long 0x54++0x03 line.long 0x00 "RXFIFO_DLC,Receive Message FIFO Data Length Code Register" bitfld.long 0x00 28.--31. " DLC ,Data length code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 0.--15. 1. " RXT ,RX timestamp" textline " " hgroup.long 0x58++0x07 hide.long 0x00 "RXFIFO_DATA1,Receive Message FIFO Data Word 1 Register" textfld " " in hide.long 0x04 "RXFIFO_DATA2,Receive Message FIFO Data Word 2 Register" textfld " " in textline " " group.long 0x60++0x03 line.long 0x00 "AFR,Acceptance Filter Register" bitfld.long 0x00 3. " UAF4 ,Acceptance filter number 4 enable" "Disabled,Enabled" bitfld.long 0x00 2. " UAF3 ,Acceptance filter number 3 enable" "Disabled,Enabled" bitfld.long 0x00 1. " UAF2 ,Acceptance filter number 2 enable" "Disabled,Enabled" bitfld.long 0x00 0. " UAF1 ,Acceptance filter number 1 enable" "Disabled,Enabled" group.long 0x64++0x07 line.long 0x00 "AFMR1,Acceptance Filter Mask Register 1" bitfld.long 0x00 31. " AMIDH[10] ,Standard message ID mask bit 10" "Not used,Used" bitfld.long 0x00 30. " [9] ,Standard message ID mask bit 9" "Not used,Used" bitfld.long 0x00 29. " [8] ,Standard message ID mask bit 8" "Not used,Used" bitfld.long 0x00 28. " [7] ,Standard message ID mask bit 7" "Not used,Used" textline " " bitfld.long 0x00 27. " [6] ,Standard message ID mask bit 6" "Not used,Used" bitfld.long 0x00 26. " [5] ,Standard message ID mask bit 5" "Not used,Used" bitfld.long 0x00 25. " [4] ,Standard message ID mask bit 4" "Not used,Used" bitfld.long 0x00 24. " [3] ,Standard message ID mask bit 3" "Not used,Used" textline " " bitfld.long 0x00 23. " [2] ,Standard message ID mask bit 2" "Not used,Used" bitfld.long 0x00 22. " [1] ,Standard message ID mask bit 1" "Not used,Used" bitfld.long 0x00 21. " [0] ,Standard message ID mask bit 0" "Not used,Used" textline " " bitfld.long 0x00 20. " AMSRR ,Substitute remote transmission request mask" "Not used,Used" bitfld.long 0x00 19. " AMIDE ,Identifier extension mask" "Not used,Used" textline " " bitfld.long 0x00 18. " AMIDL[17] ,Extended message ID mask bit 17" "Not used,Used" bitfld.long 0x00 17. " [16] ,Extended message ID mask bit 16" "Not used,Used" bitfld.long 0x00 16. " [15] ,Extended message ID mask bit 15" "Not used,Used" bitfld.long 0x00 15. " [14] ,Extended message ID mask bit 14" "Not used,Used" textline " " bitfld.long 0x00 14. " [13] ,Extended message ID mask bit 13" "Not used,Used" bitfld.long 0x00 13. " [12] ,Extended message ID mask bit 12" "Not used,Used" bitfld.long 0x00 12. " [11] ,Extended message ID mask bit 11" "Not used,Used" bitfld.long 0x00 11. " [10] ,Extended message ID mask bit 10" "Not used,Used" textline " " bitfld.long 0x00 10. " [9] ,Extended message ID mask bit 9" "Not used,Used" bitfld.long 0x00 9. " [8] ,Extended message ID mask bit 8" "Not used,Used" bitfld.long 0x00 8. " [7] ,Extended message ID mask bit 7" "Not used,Used" bitfld.long 0x00 7. " [6] ,Extended message ID mask bit 6" "Not used,Used" textline " " bitfld.long 0x00 6. " [5] ,Extended message ID mask bit 5" "Not used,Used" bitfld.long 0x00 5. " [4] ,Extended message ID mask bit 4" "Not used,Used" bitfld.long 0x00 4. " [3] ,Extended message ID mask bit 3" "Not used,Used" bitfld.long 0x00 3. " [2] ,Extended message ID mask bit 2" "Not used,Used" textline " " bitfld.long 0x00 2. " [1] ,Extended message ID mask bit 1" "Not used,Used" bitfld.long 0x00 1. " [0] ,Extended message ID mask bit 0" "Not used,Used" textline " " bitfld.long 0x00 0. " AMRTR ,Remote transmission request mask" "Not used,Used" line.long 0x04 "AFIR1,Acceptance Filter ID Register 1" hexmask.long.word 0x04 21.--31. 1. " AIIDH ,Standard message ID standard identifier" bitfld.long 0x04 20. " AISRR ,Substitute remote transmission request" "Not requested,Requested" bitfld.long 0x04 19. " AIIDE ,Identifier extension differentiates between standard and extended frames" "0,1" hexmask.long.tbyte 0x04 1.--18. 1. " AIIDL ,Extended message ID mask extended identifier" textline " " bitfld.long 0x04 0. " AIRTR ,Remote transmission request mask RTR bit for extended frames" "Not requested,Requested" group.long 0x6C++0x07 line.long 0x00 "AFMR2,Acceptance Filter Mask Register 2" bitfld.long 0x00 31. " AMIDH[10] ,Standard message ID mask bit 10" "Not used,Used" bitfld.long 0x00 30. " [9] ,Standard message ID mask bit 9" "Not used,Used" bitfld.long 0x00 29. " [8] ,Standard message ID mask bit 8" "Not used,Used" bitfld.long 0x00 28. " [7] ,Standard message ID mask bit 7" "Not used,Used" textline " " bitfld.long 0x00 27. " [6] ,Standard message ID mask bit 6" "Not used,Used" bitfld.long 0x00 26. " [5] ,Standard message ID mask bit 5" "Not used,Used" bitfld.long 0x00 25. " [4] ,Standard message ID mask bit 4" "Not used,Used" bitfld.long 0x00 24. " [3] ,Standard message ID mask bit 3" "Not used,Used" textline " " bitfld.long 0x00 23. " [2] ,Standard message ID mask bit 2" "Not used,Used" bitfld.long 0x00 22. " [1] ,Standard message ID mask bit 1" "Not used,Used" bitfld.long 0x00 21. " [0] ,Standard message ID mask bit 0" "Not used,Used" textline " " bitfld.long 0x00 20. " AMSRR ,Substitute remote transmission request mask" "Not used,Used" bitfld.long 0x00 19. " AMIDE ,Identifier extension mask" "Not used,Used" textline " " bitfld.long 0x00 18. " AMIDL[17] ,Extended message ID mask bit 17" "Not used,Used" bitfld.long 0x00 17. " [16] ,Extended message ID mask bit 16" "Not used,Used" bitfld.long 0x00 16. " [15] ,Extended message ID mask bit 15" "Not used,Used" bitfld.long 0x00 15. " [14] ,Extended message ID mask bit 14" "Not used,Used" textline " " bitfld.long 0x00 14. " [13] ,Extended message ID mask bit 13" "Not used,Used" bitfld.long 0x00 13. " [12] ,Extended message ID mask bit 12" "Not used,Used" bitfld.long 0x00 12. " [11] ,Extended message ID mask bit 11" "Not used,Used" bitfld.long 0x00 11. " [10] ,Extended message ID mask bit 10" "Not used,Used" textline " " bitfld.long 0x00 10. " [9] ,Extended message ID mask bit 9" "Not used,Used" bitfld.long 0x00 9. " [8] ,Extended message ID mask bit 8" "Not used,Used" bitfld.long 0x00 8. " [7] ,Extended message ID mask bit 7" "Not used,Used" bitfld.long 0x00 7. " [6] ,Extended message ID mask bit 6" "Not used,Used" textline " " bitfld.long 0x00 6. " [5] ,Extended message ID mask bit 5" "Not used,Used" bitfld.long 0x00 5. " [4] ,Extended message ID mask bit 4" "Not used,Used" bitfld.long 0x00 4. " [3] ,Extended message ID mask bit 3" "Not used,Used" bitfld.long 0x00 3. " [2] ,Extended message ID mask bit 2" "Not used,Used" textline " " bitfld.long 0x00 2. " [1] ,Extended message ID mask bit 1" "Not used,Used" bitfld.long 0x00 1. " [0] ,Extended message ID mask bit 0" "Not used,Used" textline " " bitfld.long 0x00 0. " AMRTR ,Remote transmission request mask" "Not used,Used" line.long 0x04 "AFIR2,Acceptance Filter ID Register 2" hexmask.long.word 0x04 21.--31. 1. " AIIDH ,Standard message ID standard identifier" bitfld.long 0x04 20. " AISRR ,Substitute remote transmission request" "Not requested,Requested" bitfld.long 0x04 19. " AIIDE ,Identifier extension differentiates between standard and extended frames" "0,1" hexmask.long.tbyte 0x04 1.--18. 1. " AIIDL ,Extended message ID mask extended identifier" textline " " bitfld.long 0x04 0. " AIRTR ,Remote transmission request mask RTR bit for extended frames" "Not requested,Requested" group.long 0x74++0x07 line.long 0x00 "AFMR3,Acceptance Filter Mask Register 3" bitfld.long 0x00 31. " AMIDH[10] ,Standard message ID mask bit 10" "Not used,Used" bitfld.long 0x00 30. " [9] ,Standard message ID mask bit 9" "Not used,Used" bitfld.long 0x00 29. " [8] ,Standard message ID mask bit 8" "Not used,Used" bitfld.long 0x00 28. " [7] ,Standard message ID mask bit 7" "Not used,Used" textline " " bitfld.long 0x00 27. " [6] ,Standard message ID mask bit 6" "Not used,Used" bitfld.long 0x00 26. " [5] ,Standard message ID mask bit 5" "Not used,Used" bitfld.long 0x00 25. " [4] ,Standard message ID mask bit 4" "Not used,Used" bitfld.long 0x00 24. " [3] ,Standard message ID mask bit 3" "Not used,Used" textline " " bitfld.long 0x00 23. " [2] ,Standard message ID mask bit 2" "Not used,Used" bitfld.long 0x00 22. " [1] ,Standard message ID mask bit 1" "Not used,Used" bitfld.long 0x00 21. " [0] ,Standard message ID mask bit 0" "Not used,Used" textline " " bitfld.long 0x00 20. " AMSRR ,Substitute remote transmission request mask" "Not used,Used" bitfld.long 0x00 19. " AMIDE ,Identifier extension mask" "Not used,Used" textline " " bitfld.long 0x00 18. " AMIDL[17] ,Extended message ID mask bit 17" "Not used,Used" bitfld.long 0x00 17. " [16] ,Extended message ID mask bit 16" "Not used,Used" bitfld.long 0x00 16. " [15] ,Extended message ID mask bit 15" "Not used,Used" bitfld.long 0x00 15. " [14] ,Extended message ID mask bit 14" "Not used,Used" textline " " bitfld.long 0x00 14. " [13] ,Extended message ID mask bit 13" "Not used,Used" bitfld.long 0x00 13. " [12] ,Extended message ID mask bit 12" "Not used,Used" bitfld.long 0x00 12. " [11] ,Extended message ID mask bit 11" "Not used,Used" bitfld.long 0x00 11. " [10] ,Extended message ID mask bit 10" "Not used,Used" textline " " bitfld.long 0x00 10. " [9] ,Extended message ID mask bit 9" "Not used,Used" bitfld.long 0x00 9. " [8] ,Extended message ID mask bit 8" "Not used,Used" bitfld.long 0x00 8. " [7] ,Extended message ID mask bit 7" "Not used,Used" bitfld.long 0x00 7. " [6] ,Extended message ID mask bit 6" "Not used,Used" textline " " bitfld.long 0x00 6. " [5] ,Extended message ID mask bit 5" "Not used,Used" bitfld.long 0x00 5. " [4] ,Extended message ID mask bit 4" "Not used,Used" bitfld.long 0x00 4. " [3] ,Extended message ID mask bit 3" "Not used,Used" bitfld.long 0x00 3. " [2] ,Extended message ID mask bit 2" "Not used,Used" textline " " bitfld.long 0x00 2. " [1] ,Extended message ID mask bit 1" "Not used,Used" bitfld.long 0x00 1. " [0] ,Extended message ID mask bit 0" "Not used,Used" textline " " bitfld.long 0x00 0. " AMRTR ,Remote transmission request mask" "Not used,Used" line.long 0x04 "AFIR3,Acceptance Filter ID Register 3" hexmask.long.word 0x04 21.--31. 1. " AIIDH ,Standard message ID standard identifier" bitfld.long 0x04 20. " AISRR ,Substitute remote transmission request" "Not requested,Requested" bitfld.long 0x04 19. " AIIDE ,Identifier extension differentiates between standard and extended frames" "0,1" hexmask.long.tbyte 0x04 1.--18. 1. " AIIDL ,Extended message ID mask extended identifier" textline " " bitfld.long 0x04 0. " AIRTR ,Remote transmission request mask RTR bit for extended frames" "Not requested,Requested" group.long 0x7C++0x07 line.long 0x00 "AFMR4,Acceptance Filter Mask Register 4" bitfld.long 0x00 31. " AMIDH[10] ,Standard message ID mask bit 10" "Not used,Used" bitfld.long 0x00 30. " [9] ,Standard message ID mask bit 9" "Not used,Used" bitfld.long 0x00 29. " [8] ,Standard message ID mask bit 8" "Not used,Used" bitfld.long 0x00 28. " [7] ,Standard message ID mask bit 7" "Not used,Used" textline " " bitfld.long 0x00 27. " [6] ,Standard message ID mask bit 6" "Not used,Used" bitfld.long 0x00 26. " [5] ,Standard message ID mask bit 5" "Not used,Used" bitfld.long 0x00 25. " [4] ,Standard message ID mask bit 4" "Not used,Used" bitfld.long 0x00 24. " [3] ,Standard message ID mask bit 3" "Not used,Used" textline " " bitfld.long 0x00 23. " [2] ,Standard message ID mask bit 2" "Not used,Used" bitfld.long 0x00 22. " [1] ,Standard message ID mask bit 1" "Not used,Used" bitfld.long 0x00 21. " [0] ,Standard message ID mask bit 0" "Not used,Used" textline " " bitfld.long 0x00 20. " AMSRR ,Substitute remote transmission request mask" "Not used,Used" bitfld.long 0x00 19. " AMIDE ,Identifier extension mask" "Not used,Used" textline " " bitfld.long 0x00 18. " AMIDL[17] ,Extended message ID mask bit 17" "Not used,Used" bitfld.long 0x00 17. " [16] ,Extended message ID mask bit 16" "Not used,Used" bitfld.long 0x00 16. " [15] ,Extended message ID mask bit 15" "Not used,Used" bitfld.long 0x00 15. " [14] ,Extended message ID mask bit 14" "Not used,Used" textline " " bitfld.long 0x00 14. " [13] ,Extended message ID mask bit 13" "Not used,Used" bitfld.long 0x00 13. " [12] ,Extended message ID mask bit 12" "Not used,Used" bitfld.long 0x00 12. " [11] ,Extended message ID mask bit 11" "Not used,Used" bitfld.long 0x00 11. " [10] ,Extended message ID mask bit 10" "Not used,Used" textline " " bitfld.long 0x00 10. " [9] ,Extended message ID mask bit 9" "Not used,Used" bitfld.long 0x00 9. " [8] ,Extended message ID mask bit 8" "Not used,Used" bitfld.long 0x00 8. " [7] ,Extended message ID mask bit 7" "Not used,Used" bitfld.long 0x00 7. " [6] ,Extended message ID mask bit 6" "Not used,Used" textline " " bitfld.long 0x00 6. " [5] ,Extended message ID mask bit 5" "Not used,Used" bitfld.long 0x00 5. " [4] ,Extended message ID mask bit 4" "Not used,Used" bitfld.long 0x00 4. " [3] ,Extended message ID mask bit 3" "Not used,Used" bitfld.long 0x00 3. " [2] ,Extended message ID mask bit 2" "Not used,Used" textline " " bitfld.long 0x00 2. " [1] ,Extended message ID mask bit 1" "Not used,Used" bitfld.long 0x00 1. " [0] ,Extended message ID mask bit 0" "Not used,Used" textline " " bitfld.long 0x00 0. " AMRTR ,Remote transmission request mask" "Not used,Used" line.long 0x04 "AFIR4,Acceptance Filter ID Register 4" hexmask.long.word 0x04 21.--31. 1. " AIIDH ,Standard message ID standard identifier" bitfld.long 0x04 20. " AISRR ,Substitute remote transmission request" "Not requested,Requested" bitfld.long 0x04 19. " AIIDE ,Identifier extension differentiates between standard and extended frames" "0,1" hexmask.long.tbyte 0x04 1.--18. 1. " AIIDL ,Extended message ID mask extended identifier" textline " " bitfld.long 0x04 0. " AIRTR ,Remote transmission request mask RTR bit for extended frames" "Not requested,Requested" width 0x0B tree.end tree "CAN1" base ad:0xFF070000 width 14. group.long 0x00++0x0F line.long 0x00 "SRR,Software Reset Register" bitfld.long 0x00 1. " CEN ,CAN enable" "Disabled,Enabled" bitfld.long 0x00 0. " SRST ,Reset for the CAN controller" "No reset,Reset" line.long 0x04 "MSR,Mode Select Register" bitfld.long 0x04 2. " SNOOP ,Snoop mode enable" "Disabled,Enabled" bitfld.long 0x04 1. " LBACK ,Loop back mode enable" "Disabled,Enabled" bitfld.long 0x04 0. " SLEEP ,Sleep mode enable" "Disabled,Enabled" line.long 0x08 "BRPR,Baud Rate Prescaler Register" hexmask.long.byte 0x08 0.--7. 1. " BRP ,Baud rate prescaler" line.long 0x0C "BTR,Bit Timing Register" bitfld.long 0x0C 7.--8. " SJW ,Synchronization jump width" "1,2,3,4" bitfld.long 0x0C 4.--6. " TS2 ,Time segment 2" "1,2,3,4,5,6,7,8" bitfld.long 0x0C 0.--3. " TS1 ,Time segment 1" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" rgroup.long 0x10++0x03 line.long 0x00 "ECR,Error Counter Register" hexmask.long.byte 0x00 8.--15. 1. " REC ,Receive error counter" hexmask.long.byte 0x00 0.--7. 1. " TEC ,Transmit error counter" group.long 0x14++0x03 line.long 0x00 "ESR,Error Status Register" eventfld.long 0x00 4. " ACKER ,Acknowledgment error occurred" "Not occurred,Occurred" eventfld.long 0x00 3. " BERR ,Received and transmit bit mismatch occurred" "Not occurred,Occurred" eventfld.long 0x00 2. " STER ,Stuff error occurred" "Not occurred,Occurred" textline " " eventfld.long 0x00 1. " FMER ,Form error occurred" "Not occurred,Occurred" eventfld.long 0x00 0. " CRCER ,CRC error occurred" "Not occurred,Occurred" rgroup.long 0x18++0x0B line.long 0x00 "SR,Status Register" bitfld.long 0x00 12. " SNOOP ,CAN controller is in snoop mode" "Disabled,Enabled" bitfld.long 0x00 11. " ACFBSY ,Acceptance filter busy indicator" "Writable,Not writable" bitfld.long 0x00 10. " TXFLL ,Transmit FIFO full" "Not full,Full" textline " " bitfld.long 0x00 9. " TXBFLL ,High priority transmit buffer full" "Not full,Full" textline " " bitfld.long 0x00 7.--8. " ESTAT ,Error status" "Configuration mode,Error active state,Error passive state,Bus off state" bitfld.long 0x00 6. " ERRWRN ,Error warning" "None >=96,One or more >=96" bitfld.long 0x00 5. " BBSY ,Bus busy indicates the CAN bus status" "Configuration mode/not busy,Busy" textline " " bitfld.long 0x00 4. " BIDLE ,Bus idle" "Configuration mode/not idle,Idle" bitfld.long 0x00 3. " NORMAL ,Normal mode" "Disabled,Enabled" bitfld.long 0x00 2. " SLEEP ,Sleep mode" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " LBACK ,Loop back mode" "Disabled,Enabled" bitfld.long 0x00 0. " CONFIG ,Configuration mode" "Disabled,Enabled" line.long 0x04 "ISR,Interrupt Status Register" bitfld.long 0x04 14. " TXFEMP ,Transmit FIFO empty interrupt" "No interrupt,Interrupt" bitfld.long 0x04 13. " TXFWMEMP ,Transmit FIFO watermark empty interrupt" "No interrupt,Interrupt" bitfld.long 0x04 12. " RXFWMFLL ,Receive FIFO watermark full interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 11. " WKUP ,Wake up interrupt" "No interrupt,Interrupt" bitfld.long 0x04 10. " SLP ,Sleep interrupt" "No interrupt,Interrupt" bitfld.long 0x04 9. " BSOFF ,Bus off interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 8. " ERROR ,Error interrupt" "No interrupt,Interrupt" bitfld.long 0x04 7. " RXNEMP ,Receive FIFO not empty interrupt" "No interrupt,Interrupt" bitfld.long 0x04 6. " RXOFLW ,RX FIFO overflow interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 5. " RXUFLW ,RX FIFO underflow interrupt" "No interrupt,Interrupt" bitfld.long 0x04 4. " RXOK ,New message received interrupt" "No interrupt,Interrupt" bitfld.long 0x04 3. " TXBFLL ,High priority transmit buffer full interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 2. " TXFLL ,Transmit FIFO full interrupt" "No interrupt,Interrupt" bitfld.long 0x04 1. " TXOK ,Transmission successful interrupt" "No interrupt,Interrupt" bitfld.long 0x04 0. " ARBLST ,Arbitration lost interrupt" "No interrupt,Interrupt" line.long 0x08 "IER,Interrupt Enable Register" bitfld.long 0x08 14. " ETXFEMP ,Transmit FIFO empty interrupt enable" "Disabled,Enabled" bitfld.long 0x08 13. " ETXFWMEMP ,Transmit FIFO watermark empty interrupt enable" "Disabled,Enabled" bitfld.long 0x08 12. " ERXFWMFLL ,Receive FIFO watermark full interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x08 11. " EWKUP ,Wake up interrupt enable" "Disabled,Enabled" bitfld.long 0x08 10. " ESLP ,Sleep interrupt enable" "Disabled,Enabled" bitfld.long 0x08 9. " EBSOFF ,Bus off interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x08 8. " EERROR ,Error interrupt enable" "Disabled,Enabled" bitfld.long 0x08 7. " ERXNEMP ,Receive FIFO not empty interrupt enable" "Disabled,Enabled" bitfld.long 0x08 6. " ERXOFLW ,RX FIFO overflow interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x08 5. " ERXUFLW ,RX FIFO underflow interrupt enable" "Disabled,Enabled" bitfld.long 0x08 4. " ERXOK ,New message received interrupt enable" "Disabled,Enabled" bitfld.long 0x08 3. " ETXBFLL ,High priority transmit buffer full interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x08 2. " ETXFLL ,Transmit FIFO full interrupt enable" "Disabled,Enabled" bitfld.long 0x08 1. " ETXOK ,Transmission successful interrupt enable" "Disabled,Enabled" bitfld.long 0x08 0. " EARBLST ,Arbitration lost interrupt enable" "Disabled,Enabled" wgroup.long 0x24++0x07 line.long 0x00 "ICR,Interrupt Clear Register" bitfld.long 0x00 14. " CTXFEMP ,Transmit FIFO empty interrupt clear" "No effect,Clear" bitfld.long 0x00 13. " CTXFWMEMP ,Transmit FIFO watermark empty interrupt clear" "No effect,Clear" bitfld.long 0x00 12. " CRXFWMFLL ,Receive FIFO watermark full interrupt clear" "No effect,Clear" textline " " bitfld.long 0x00 11. " CWKUP ,Wake up interrupt clear" "No effect,Clear" bitfld.long 0x00 10. " CSLP ,Sleep interrupt clear" "No effect,Clear" bitfld.long 0x00 9. " CBSOFF ,Bus off interrupt clear" "No effect,Clear" textline " " bitfld.long 0x00 8. " CERROR ,Error interrupt clear" "No effect,Clear" bitfld.long 0x00 7. " CRXNEMP ,Receive FIFO not empty interrupt clear" "No effect,Clear" bitfld.long 0x00 6. " CRXOFLW ,RX FIFO overflow interrupt clear" "No effect,Clear" textline " " bitfld.long 0x00 5. " CRXUFLW ,RX FIFO underflow interrupt clear" "No effect,Clear" bitfld.long 0x00 4. " CRXOK ,New message received interrupt clear" "No effect,Clear" bitfld.long 0x00 3. " CTXBFLL ,High priority transmit buffer full interrupt clear" "No effect,Clear" textline " " bitfld.long 0x00 2. " CTXFLL ,Transmit FIFO full interrupt clear" "No effect,Clear" bitfld.long 0x00 1. " CTXOK ,Transmission successful interrupt clear" "No effect,Clear" bitfld.long 0x00 0. " CARBLST ,Arbitration lost interrupt clear" "No effect,Clear" line.long 0x04 "TCR,Timestamp Control Register" bitfld.long 0x04 0. " CTS ,Clear timestamp" "No effect,Clear" if (((d.l(ad:0xFF070000))&0x02)==0x00) group.long 0x2C++0x03 line.long 0x00 "WIR,Watermark Interrupt Register" hexmask.long.byte 0x00 8.--15. 1. " EW ,TXFIFO empty watermark" hexmask.long.byte 0x00 0.--7. 1. " FW ,RXFIFO full watermark" else rgroup.long 0x2C++0x03 line.long 0x00 "WIR,Watermark Interrupt Register" hexmask.long.byte 0x00 8.--15. 1. " EW ,TXFIFO empty watermark" hexmask.long.byte 0x00 0.--7. 1. " FW ,RXFIFO full watermark" endif wgroup.long 0x30++0x03 line.long 0x00 "TXFIFO_ID,Transmit Message FIFO Message Identifier Register" hexmask.long.word 0x00 21.--31. 1. " IDH ,Standard message ID" bitfld.long 0x00 20. " SRRRTR ,Substitute remote transmission request" "Data frame,Remote frame" bitfld.long 0x00 19. " IDE ,Identifier extension" "Standard,Extended" textline " " hexmask.long.tbyte 0x00 1.--18. 1. " IDL ,Extended message ID" bitfld.long 0x00 0. " RTR ,Remote transmission request" "Data frames,Remote frames" group.long 0x34++0x03 line.long 0x00 "TXFIFO_DLC,Transmit Message FIFO Data Length Code Register" bitfld.long 0x00 28.--31. " DLC ,Data length code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hgroup.long 0x38++0x07 hide.long 0x00 "TXFIFO_DATA1,Transmit Message FIFO Data Word 1 Register" textfld " " in hide.long 0x04 "TXFIFO_DATA2,Transmit Message FIFO Data Word 2 Register" textfld " " in textline " " wgroup.long 0x40++0x03 line.long 0x00 "TXHPB_ID,Transmit High Priority Buffer Message Identifier Register" hexmask.long.word 0x00 21.--31. 1. " IDH ,Standard message ID" bitfld.long 0x00 20. " SRRRTR ,Substitute remote transmission request" "Data frame,Remote frame" bitfld.long 0x00 19. " IDE ,Identifier extension" "Standard,Extended" hexmask.long.tbyte 0x00 1.--18. 1. " IDL ,Extended message ID" textline " " bitfld.long 0x00 0. " RTR ,Remote transmission request" "Standard frames,Remote frame" group.long 0x44++0x03 line.long 0x00 "TXHPB_DLC,Transmit High Priority Buffer Data Length Code Register" bitfld.long 0x00 28.--31. " DLC ,Data length code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hgroup.long 0x48++0x07 hide.long 0x00 "TXHPB_DATA1,Transmit High Priority Buffer Data Word 1 Register" textfld " " in hide.long 0x04 "TXHPB_DATA2,Transmit High Priority Buffer Data Word 2 Register" textfld " " in textline " " rgroup.long 0x50++0x03 line.long 0x00 "RXFIFO_ID,Receive Message FIFO Mesage Identifier Register" hexmask.long.word 0x00 21.--31. 1. " IDH ,Standard message ID" bitfld.long 0x00 20. " SRRRTR ,Substitute remote transmission request" "Data frame,Remote frame" bitfld.long 0x00 19. " IDE ,Identifier extension" "Standard,Extended" hexmask.long.tbyte 0x00 1.--18. 1. " IDL ,Extended message ID" textline " " bitfld.long 0x00 0. " RTR ,Remote transmission request" "Standard frames,Remote frame" group.long 0x54++0x03 line.long 0x00 "RXFIFO_DLC,Receive Message FIFO Data Length Code Register" bitfld.long 0x00 28.--31. " DLC ,Data length code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 0.--15. 1. " RXT ,RX timestamp" textline " " hgroup.long 0x58++0x07 hide.long 0x00 "RXFIFO_DATA1,Receive Message FIFO Data Word 1 Register" textfld " " in hide.long 0x04 "RXFIFO_DATA2,Receive Message FIFO Data Word 2 Register" textfld " " in textline " " group.long 0x60++0x03 line.long 0x00 "AFR,Acceptance Filter Register" bitfld.long 0x00 3. " UAF4 ,Acceptance filter number 4 enable" "Disabled,Enabled" bitfld.long 0x00 2. " UAF3 ,Acceptance filter number 3 enable" "Disabled,Enabled" bitfld.long 0x00 1. " UAF2 ,Acceptance filter number 2 enable" "Disabled,Enabled" bitfld.long 0x00 0. " UAF1 ,Acceptance filter number 1 enable" "Disabled,Enabled" group.long 0x64++0x07 line.long 0x00 "AFMR1,Acceptance Filter Mask Register 1" bitfld.long 0x00 31. " AMIDH[10] ,Standard message ID mask bit 10" "Not used,Used" bitfld.long 0x00 30. " [9] ,Standard message ID mask bit 9" "Not used,Used" bitfld.long 0x00 29. " [8] ,Standard message ID mask bit 8" "Not used,Used" bitfld.long 0x00 28. " [7] ,Standard message ID mask bit 7" "Not used,Used" textline " " bitfld.long 0x00 27. " [6] ,Standard message ID mask bit 6" "Not used,Used" bitfld.long 0x00 26. " [5] ,Standard message ID mask bit 5" "Not used,Used" bitfld.long 0x00 25. " [4] ,Standard message ID mask bit 4" "Not used,Used" bitfld.long 0x00 24. " [3] ,Standard message ID mask bit 3" "Not used,Used" textline " " bitfld.long 0x00 23. " [2] ,Standard message ID mask bit 2" "Not used,Used" bitfld.long 0x00 22. " [1] ,Standard message ID mask bit 1" "Not used,Used" bitfld.long 0x00 21. " [0] ,Standard message ID mask bit 0" "Not used,Used" textline " " bitfld.long 0x00 20. " AMSRR ,Substitute remote transmission request mask" "Not used,Used" bitfld.long 0x00 19. " AMIDE ,Identifier extension mask" "Not used,Used" textline " " bitfld.long 0x00 18. " AMIDL[17] ,Extended message ID mask bit 17" "Not used,Used" bitfld.long 0x00 17. " [16] ,Extended message ID mask bit 16" "Not used,Used" bitfld.long 0x00 16. " [15] ,Extended message ID mask bit 15" "Not used,Used" bitfld.long 0x00 15. " [14] ,Extended message ID mask bit 14" "Not used,Used" textline " " bitfld.long 0x00 14. " [13] ,Extended message ID mask bit 13" "Not used,Used" bitfld.long 0x00 13. " [12] ,Extended message ID mask bit 12" "Not used,Used" bitfld.long 0x00 12. " [11] ,Extended message ID mask bit 11" "Not used,Used" bitfld.long 0x00 11. " [10] ,Extended message ID mask bit 10" "Not used,Used" textline " " bitfld.long 0x00 10. " [9] ,Extended message ID mask bit 9" "Not used,Used" bitfld.long 0x00 9. " [8] ,Extended message ID mask bit 8" "Not used,Used" bitfld.long 0x00 8. " [7] ,Extended message ID mask bit 7" "Not used,Used" bitfld.long 0x00 7. " [6] ,Extended message ID mask bit 6" "Not used,Used" textline " " bitfld.long 0x00 6. " [5] ,Extended message ID mask bit 5" "Not used,Used" bitfld.long 0x00 5. " [4] ,Extended message ID mask bit 4" "Not used,Used" bitfld.long 0x00 4. " [3] ,Extended message ID mask bit 3" "Not used,Used" bitfld.long 0x00 3. " [2] ,Extended message ID mask bit 2" "Not used,Used" textline " " bitfld.long 0x00 2. " [1] ,Extended message ID mask bit 1" "Not used,Used" bitfld.long 0x00 1. " [0] ,Extended message ID mask bit 0" "Not used,Used" textline " " bitfld.long 0x00 0. " AMRTR ,Remote transmission request mask" "Not used,Used" line.long 0x04 "AFIR1,Acceptance Filter ID Register 1" hexmask.long.word 0x04 21.--31. 1. " AIIDH ,Standard message ID standard identifier" bitfld.long 0x04 20. " AISRR ,Substitute remote transmission request" "Not requested,Requested" bitfld.long 0x04 19. " AIIDE ,Identifier extension differentiates between standard and extended frames" "0,1" hexmask.long.tbyte 0x04 1.--18. 1. " AIIDL ,Extended message ID mask extended identifier" textline " " bitfld.long 0x04 0. " AIRTR ,Remote transmission request mask RTR bit for extended frames" "Not requested,Requested" group.long 0x6C++0x07 line.long 0x00 "AFMR2,Acceptance Filter Mask Register 2" bitfld.long 0x00 31. " AMIDH[10] ,Standard message ID mask bit 10" "Not used,Used" bitfld.long 0x00 30. " [9] ,Standard message ID mask bit 9" "Not used,Used" bitfld.long 0x00 29. " [8] ,Standard message ID mask bit 8" "Not used,Used" bitfld.long 0x00 28. " [7] ,Standard message ID mask bit 7" "Not used,Used" textline " " bitfld.long 0x00 27. " [6] ,Standard message ID mask bit 6" "Not used,Used" bitfld.long 0x00 26. " [5] ,Standard message ID mask bit 5" "Not used,Used" bitfld.long 0x00 25. " [4] ,Standard message ID mask bit 4" "Not used,Used" bitfld.long 0x00 24. " [3] ,Standard message ID mask bit 3" "Not used,Used" textline " " bitfld.long 0x00 23. " [2] ,Standard message ID mask bit 2" "Not used,Used" bitfld.long 0x00 22. " [1] ,Standard message ID mask bit 1" "Not used,Used" bitfld.long 0x00 21. " [0] ,Standard message ID mask bit 0" "Not used,Used" textline " " bitfld.long 0x00 20. " AMSRR ,Substitute remote transmission request mask" "Not used,Used" bitfld.long 0x00 19. " AMIDE ,Identifier extension mask" "Not used,Used" textline " " bitfld.long 0x00 18. " AMIDL[17] ,Extended message ID mask bit 17" "Not used,Used" bitfld.long 0x00 17. " [16] ,Extended message ID mask bit 16" "Not used,Used" bitfld.long 0x00 16. " [15] ,Extended message ID mask bit 15" "Not used,Used" bitfld.long 0x00 15. " [14] ,Extended message ID mask bit 14" "Not used,Used" textline " " bitfld.long 0x00 14. " [13] ,Extended message ID mask bit 13" "Not used,Used" bitfld.long 0x00 13. " [12] ,Extended message ID mask bit 12" "Not used,Used" bitfld.long 0x00 12. " [11] ,Extended message ID mask bit 11" "Not used,Used" bitfld.long 0x00 11. " [10] ,Extended message ID mask bit 10" "Not used,Used" textline " " bitfld.long 0x00 10. " [9] ,Extended message ID mask bit 9" "Not used,Used" bitfld.long 0x00 9. " [8] ,Extended message ID mask bit 8" "Not used,Used" bitfld.long 0x00 8. " [7] ,Extended message ID mask bit 7" "Not used,Used" bitfld.long 0x00 7. " [6] ,Extended message ID mask bit 6" "Not used,Used" textline " " bitfld.long 0x00 6. " [5] ,Extended message ID mask bit 5" "Not used,Used" bitfld.long 0x00 5. " [4] ,Extended message ID mask bit 4" "Not used,Used" bitfld.long 0x00 4. " [3] ,Extended message ID mask bit 3" "Not used,Used" bitfld.long 0x00 3. " [2] ,Extended message ID mask bit 2" "Not used,Used" textline " " bitfld.long 0x00 2. " [1] ,Extended message ID mask bit 1" "Not used,Used" bitfld.long 0x00 1. " [0] ,Extended message ID mask bit 0" "Not used,Used" textline " " bitfld.long 0x00 0. " AMRTR ,Remote transmission request mask" "Not used,Used" line.long 0x04 "AFIR2,Acceptance Filter ID Register 2" hexmask.long.word 0x04 21.--31. 1. " AIIDH ,Standard message ID standard identifier" bitfld.long 0x04 20. " AISRR ,Substitute remote transmission request" "Not requested,Requested" bitfld.long 0x04 19. " AIIDE ,Identifier extension differentiates between standard and extended frames" "0,1" hexmask.long.tbyte 0x04 1.--18. 1. " AIIDL ,Extended message ID mask extended identifier" textline " " bitfld.long 0x04 0. " AIRTR ,Remote transmission request mask RTR bit for extended frames" "Not requested,Requested" group.long 0x74++0x07 line.long 0x00 "AFMR3,Acceptance Filter Mask Register 3" bitfld.long 0x00 31. " AMIDH[10] ,Standard message ID mask bit 10" "Not used,Used" bitfld.long 0x00 30. " [9] ,Standard message ID mask bit 9" "Not used,Used" bitfld.long 0x00 29. " [8] ,Standard message ID mask bit 8" "Not used,Used" bitfld.long 0x00 28. " [7] ,Standard message ID mask bit 7" "Not used,Used" textline " " bitfld.long 0x00 27. " [6] ,Standard message ID mask bit 6" "Not used,Used" bitfld.long 0x00 26. " [5] ,Standard message ID mask bit 5" "Not used,Used" bitfld.long 0x00 25. " [4] ,Standard message ID mask bit 4" "Not used,Used" bitfld.long 0x00 24. " [3] ,Standard message ID mask bit 3" "Not used,Used" textline " " bitfld.long 0x00 23. " [2] ,Standard message ID mask bit 2" "Not used,Used" bitfld.long 0x00 22. " [1] ,Standard message ID mask bit 1" "Not used,Used" bitfld.long 0x00 21. " [0] ,Standard message ID mask bit 0" "Not used,Used" textline " " bitfld.long 0x00 20. " AMSRR ,Substitute remote transmission request mask" "Not used,Used" bitfld.long 0x00 19. " AMIDE ,Identifier extension mask" "Not used,Used" textline " " bitfld.long 0x00 18. " AMIDL[17] ,Extended message ID mask bit 17" "Not used,Used" bitfld.long 0x00 17. " [16] ,Extended message ID mask bit 16" "Not used,Used" bitfld.long 0x00 16. " [15] ,Extended message ID mask bit 15" "Not used,Used" bitfld.long 0x00 15. " [14] ,Extended message ID mask bit 14" "Not used,Used" textline " " bitfld.long 0x00 14. " [13] ,Extended message ID mask bit 13" "Not used,Used" bitfld.long 0x00 13. " [12] ,Extended message ID mask bit 12" "Not used,Used" bitfld.long 0x00 12. " [11] ,Extended message ID mask bit 11" "Not used,Used" bitfld.long 0x00 11. " [10] ,Extended message ID mask bit 10" "Not used,Used" textline " " bitfld.long 0x00 10. " [9] ,Extended message ID mask bit 9" "Not used,Used" bitfld.long 0x00 9. " [8] ,Extended message ID mask bit 8" "Not used,Used" bitfld.long 0x00 8. " [7] ,Extended message ID mask bit 7" "Not used,Used" bitfld.long 0x00 7. " [6] ,Extended message ID mask bit 6" "Not used,Used" textline " " bitfld.long 0x00 6. " [5] ,Extended message ID mask bit 5" "Not used,Used" bitfld.long 0x00 5. " [4] ,Extended message ID mask bit 4" "Not used,Used" bitfld.long 0x00 4. " [3] ,Extended message ID mask bit 3" "Not used,Used" bitfld.long 0x00 3. " [2] ,Extended message ID mask bit 2" "Not used,Used" textline " " bitfld.long 0x00 2. " [1] ,Extended message ID mask bit 1" "Not used,Used" bitfld.long 0x00 1. " [0] ,Extended message ID mask bit 0" "Not used,Used" textline " " bitfld.long 0x00 0. " AMRTR ,Remote transmission request mask" "Not used,Used" line.long 0x04 "AFIR3,Acceptance Filter ID Register 3" hexmask.long.word 0x04 21.--31. 1. " AIIDH ,Standard message ID standard identifier" bitfld.long 0x04 20. " AISRR ,Substitute remote transmission request" "Not requested,Requested" bitfld.long 0x04 19. " AIIDE ,Identifier extension differentiates between standard and extended frames" "0,1" hexmask.long.tbyte 0x04 1.--18. 1. " AIIDL ,Extended message ID mask extended identifier" textline " " bitfld.long 0x04 0. " AIRTR ,Remote transmission request mask RTR bit for extended frames" "Not requested,Requested" group.long 0x7C++0x07 line.long 0x00 "AFMR4,Acceptance Filter Mask Register 4" bitfld.long 0x00 31. " AMIDH[10] ,Standard message ID mask bit 10" "Not used,Used" bitfld.long 0x00 30. " [9] ,Standard message ID mask bit 9" "Not used,Used" bitfld.long 0x00 29. " [8] ,Standard message ID mask bit 8" "Not used,Used" bitfld.long 0x00 28. " [7] ,Standard message ID mask bit 7" "Not used,Used" textline " " bitfld.long 0x00 27. " [6] ,Standard message ID mask bit 6" "Not used,Used" bitfld.long 0x00 26. " [5] ,Standard message ID mask bit 5" "Not used,Used" bitfld.long 0x00 25. " [4] ,Standard message ID mask bit 4" "Not used,Used" bitfld.long 0x00 24. " [3] ,Standard message ID mask bit 3" "Not used,Used" textline " " bitfld.long 0x00 23. " [2] ,Standard message ID mask bit 2" "Not used,Used" bitfld.long 0x00 22. " [1] ,Standard message ID mask bit 1" "Not used,Used" bitfld.long 0x00 21. " [0] ,Standard message ID mask bit 0" "Not used,Used" textline " " bitfld.long 0x00 20. " AMSRR ,Substitute remote transmission request mask" "Not used,Used" bitfld.long 0x00 19. " AMIDE ,Identifier extension mask" "Not used,Used" textline " " bitfld.long 0x00 18. " AMIDL[17] ,Extended message ID mask bit 17" "Not used,Used" bitfld.long 0x00 17. " [16] ,Extended message ID mask bit 16" "Not used,Used" bitfld.long 0x00 16. " [15] ,Extended message ID mask bit 15" "Not used,Used" bitfld.long 0x00 15. " [14] ,Extended message ID mask bit 14" "Not used,Used" textline " " bitfld.long 0x00 14. " [13] ,Extended message ID mask bit 13" "Not used,Used" bitfld.long 0x00 13. " [12] ,Extended message ID mask bit 12" "Not used,Used" bitfld.long 0x00 12. " [11] ,Extended message ID mask bit 11" "Not used,Used" bitfld.long 0x00 11. " [10] ,Extended message ID mask bit 10" "Not used,Used" textline " " bitfld.long 0x00 10. " [9] ,Extended message ID mask bit 9" "Not used,Used" bitfld.long 0x00 9. " [8] ,Extended message ID mask bit 8" "Not used,Used" bitfld.long 0x00 8. " [7] ,Extended message ID mask bit 7" "Not used,Used" bitfld.long 0x00 7. " [6] ,Extended message ID mask bit 6" "Not used,Used" textline " " bitfld.long 0x00 6. " [5] ,Extended message ID mask bit 5" "Not used,Used" bitfld.long 0x00 5. " [4] ,Extended message ID mask bit 4" "Not used,Used" bitfld.long 0x00 4. " [3] ,Extended message ID mask bit 3" "Not used,Used" bitfld.long 0x00 3. " [2] ,Extended message ID mask bit 2" "Not used,Used" textline " " bitfld.long 0x00 2. " [1] ,Extended message ID mask bit 1" "Not used,Used" bitfld.long 0x00 1. " [0] ,Extended message ID mask bit 0" "Not used,Used" textline " " bitfld.long 0x00 0. " AMRTR ,Remote transmission request mask" "Not used,Used" line.long 0x04 "AFIR4,Acceptance Filter ID Register 4" hexmask.long.word 0x04 21.--31. 1. " AIIDH ,Standard message ID standard identifier" bitfld.long 0x04 20. " AISRR ,Substitute remote transmission request" "Not requested,Requested" bitfld.long 0x04 19. " AIIDE ,Identifier extension differentiates between standard and extended frames" "0,1" hexmask.long.tbyte 0x04 1.--18. 1. " AIIDL ,Extended message ID mask extended identifier" textline " " bitfld.long 0x04 0. " AIRTR ,Remote transmission request mask RTR bit for extended frames" "Not requested,Requested" width 0x0B tree.end tree.end tree "CCI400 (Cache Coherent Interconnect)" base ad:0xFD6E0000 width 16. group.long 0x00++0x0B "CCI400" line.long 0x00 "CTRL_OV,Control Override Register" bitfld.long 0x00 5. " DIS_RRB ,Disable the retry reduction buffers in all master interfaces" "No,Yes" bitfld.long 0x00 4. " DIS_PP ,Disable ARQOSARBS inputs" "No,Yes" bitfld.long 0x00 3. " TERM_B ,All master interfaces terminate barriers" "Not terminated,Terminated" bitfld.long 0x00 2. " DIS_SF ,Disable speculative fetches from all master interfaces" "No,Yes" textline " " bitfld.long 0x00 1. " DVM_M_DIS ,Disable propagation of all DVM messages" "No,Yes" bitfld.long 0x00 0. " SNOOP_DIS ,Disable all snoops" "No,Yes" line.long 0x04 "SPEC_CTRL,Speculation Control Register" bitfld.long 0x04 20. " DIS_SPEC_F_S4 ,Disable speculative fetches from slave interface S4" "No,Yes" bitfld.long 0x04 19. " DIS_SPEC_F_S3 ,Disable speculative fetches from slave interface S3" "No,Yes" bitfld.long 0x04 18. " DIS_SPEC_F_S2 ,Disable speculative fetches from slave interface S2" "No,Yes" bitfld.long 0x04 17. " DIS_SPEC_F_S1 ,Disable speculative fetches from slave interface S1" "No,Yes" textline " " bitfld.long 0x04 16. " DIS_SPEC_F_S0 ,Disable speculative fetches from slave interface S0" "No,Yes" bitfld.long 0x04 2. " DIS_S_F_M2 ,Disable speculative fetches from master interface M2" "No,Yes" bitfld.long 0x04 1. " DIS_S_F_M1 ,Disable speculative fetches from master interface M1" "No,Yes" bitfld.long 0x04 0. " DIS_S_F_M0 ,Disable speculative fetches from master interface M0" "No,Yes" line.long 0x08 "SEC_ACC,Secure Access Register" bitfld.long 0x08 0. " SEC_ACC_CTRL ,Enable non-secure access to CCI-400 registers" "Disabled,Enabled" rgroup.long 0x0C++0x03 line.long 0x00 "STAT,Status Register" bitfld.long 0x00 0. " CCI_STATUS ,Any changes to the snoop or DVM enables is pending in the CCI-400" "Not pending,Pending" group.long 0x10++0x03 line.long 0x00 "IMPR_ERR,Imprecise Error Register" eventfld.long 0x00 20. " IMP_ERR_S4 ,Imprecise error indicator for slave interface S4" "No error,Error" eventfld.long 0x00 19. " IMP_ERR_S3 ,Imprecise error indicator for slave interface S3" "No error,Error" eventfld.long 0x00 18. " IMP_ERR_S2 ,Imprecise error indicator for slave interface S2" "No error,Error" eventfld.long 0x00 17. " IMP_ERR_S1 ,Imprecise error indicator for slave interface S1" "No error,Error" textline " " eventfld.long 0x00 16. " IMP_ERR_S0 ,Imprecise error indicator for slave interface S0" "No error,Error" eventfld.long 0x00 2. " IMP_ERR_M2 ,Imprecise error indicator for master interface M2" "No error,Error" eventfld.long 0x00 1. " IMP_ERR_M1 ,Imprecise error indicator for master interface M1" "No error,Error" eventfld.long 0x00 0. " IMP_ERR_M0 ,Imprecise error indicator for master interface M0" "No error,Error" group.long 0x100++0x03 line.long 0x00 "PMON_CTRL,Performance Monitor Control Register" rbitfld.long 0x00 11.--15. " PMU_C_NUM ,Number of PMU counters available" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 5. " DP ,Disables cycle counter" "No,Yes" bitfld.long 0x00 4. " EX ,Enable export of the events to the event bus" "Disabled,Enabled" bitfld.long 0x00 3. " CCD ,Cycle count divider" "0,1" textline " " bitfld.long 0x00 2. " CCR ,Reset cycle counter" "No effect,Reset" bitfld.long 0x00 1. " RST ,Reset all performance counters (Not including CCNT)" "No effect,Reset" bitfld.long 0x00 0. " CEN ,Enable all counters" "Disabled,Enabled" textline " " rgroup.long 0xFD0++0x03 line.long 0x00 "PER_ID4,Peripheral ID4 Register" hexmask.long.byte 0x00 0.--7. 1. " PER_ID4 ,Peripheral ID4" rgroup.long 0xFD4++0x03 line.long 0x00 "PER_ID5,Peripheral ID5 Register" hexmask.long.byte 0x00 0.--7. 1. " PER_ID5 ,Peripheral ID5" rgroup.long 0xFD8++0x03 line.long 0x00 "PER_ID6,Peripheral ID6 Register" hexmask.long.byte 0x00 0.--7. 1. " PER_ID6 ,Peripheral ID6" rgroup.long 0xFDC++0x03 line.long 0x00 "PER_ID7,Peripheral ID7 Register" hexmask.long.byte 0x00 0.--7. 1. " PER_ID7 ,Peripheral ID7" rgroup.long 0xFE0++0x03 line.long 0x00 "PER_ID0,Peripheral ID0 Register" hexmask.long.byte 0x00 0.--7. 1. " PER_ID0 ,Peripheral ID0" rgroup.long 0xFE4++0x03 line.long 0x00 "PER_ID1,Peripheral ID1 Register" hexmask.long.byte 0x00 0.--7. 1. " PER_ID1 ,Peripheral ID1" rgroup.long 0xFE8++0x03 line.long 0x00 "PER_ID2,Peripheral ID2 Register" hexmask.long.byte 0x00 0.--7. 1. " PER_ID2 ,Peripheral ID2" rgroup.long 0xFEC++0x03 line.long 0x00 "PER_ID3,Peripheral ID3 Register" hexmask.long.byte 0x00 0.--7. 1. " PER_ID3 ,Peripheral ID3" rgroup.long 0xFF0++0x03 line.long 0x00 "COMP_ID0,Component ID0 Register" hexmask.long.byte 0x00 0.--7. 1. " COMP_ID0 ,Component ID0" rgroup.long 0xFF4++0x03 line.long 0x00 "COMP_ID1,Component ID1 Register" hexmask.long.byte 0x00 0.--7. 1. " COMP_ID1 ,Component ID1" rgroup.long 0xFF8++0x03 line.long 0x00 "COMP_ID2,Component ID2 Register" hexmask.long.byte 0x00 0.--7. 1. " COMP_ID2 ,Component ID2" rgroup.long 0xFFC++0x03 line.long 0x00 "COMP_ID3,Component ID3 Register" hexmask.long.byte 0x00 0.--7. 1. " COMP_ID3 ,Component ID3" textline " " group.long 0x1000++0x03 line.long 0x00 "SNP_CTRL_S0,Snoop Control Register S0" rbitfld.long 0x00 31. " SUPP_DVMS ,Slave interface supports DVM messages" "Not supported,Supported" rbitfld.long 0x00 30. " SUPP_SNPS ,Slave interface supports snoops" "Not supported,Supported" bitfld.long 0x00 1. " EN_DVMS ,Enable issuing of DVM message requests from slave interface S0" "Disabled,Enabled" group.long (0x1000+0x04)++0x03 line.long 0x00 "SHR_OVR_S0,Shareable Override Register S0" bitfld.long 0x00 0.--1. " AXDOM_OVR ,Axdomain override for slave interface S0" "0,1,2,3" group.long (0x1000+0x100)++0x07 line.long 0x00 "RD_QOS_OVR_S0,Read QOS Override Register S0" rbitfld.long 0x00 8.--11. " ARQOS_OVR_RDBCK ,Reads the ARQOS override value of slave interface S0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " ARQOS_VAL ,ARQOS value override for slave interface S0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "WR_QOS_OVR_S0,Write QOS Override Register S0" rbitfld.long 0x04 8.--11. " AWQOS_OVR_RDBCK ,Reads the AWQOS override value of slave interface S0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. " AWQOS_VAL ,AWQOS value override for slave interface S0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long (0x1000+0x10C)++0x03 line.long 0x00 "QOS_CTRL_0,QoS Control Register S0" rbitfld.long 0x00 31. " QOS_REG_DIS ,QoS regulation is disabled in slave interface S0" "No,Yes" bitfld.long 0x00 21. " BAND_REG_MODE ,Normal or quiesce high mode of bandwidth regulation for slave interface S0" "Normal,Quiesce high" bitfld.long 0x00 20. " ARQOS_REG_MODE ,Bandwidth or latency mode of ARQOS regulation for slave interface S0" "Latency,Bandwidth" bitfld.long 0x00 16. " AWQOS_REG_MODE ,Bandwidth or latency mode of AWQOS regulation for slave interface S0" "Latency,Bandwidth" textline " " bitfld.long 0x00 3. " AR_OT_REG ,Enable regulation of outstanding read transactions for slave interface S0" "Disabled,Enabled" bitfld.long 0x00 2. " AW_OT_REG ,Enable regulation of outstanding write transactions for slave interface S0" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " ARQOS_REG ,Enable QoS value regulation on reads for slave interface S0" "Disabled,Enabled" bitfld.long 0x00 0. " AWQOS_REG ,Enable QoS value regulation on writes for slave interface S0" "Disabled,Enabled" group.long (0x1000+0x110)++0x03 line.long 0x00 "MAX_OT_S0,Max OT Register S0" bitfld.long 0x00 24.--29. " INT_OT_AR ,Integer part of the maximum outstanding AR addresses S0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x00 16.--23. 1. " FRAC_OT_AR ,Fractional part of the maximum outstanding AR addresses S0" bitfld.long 0x00 8.--13. " INT_OT_AW ,Integer part of the maximum outstanding AW addresses S0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x00 0.--7. 1. " FRAC_OT_AW ,Fractional part of the maximum outstanding AW addresses S0" group.long (0x1000+0x130)++0x0B line.long 0x00 "TRG_LAT_S0,Target Latency Register S0" hexmask.long.word 0x00 16.--27. 1. " AR_LAT ,AR channel target latency S0" hexmask.long.word 0x00 0.--11. 1. " AW_LAT ,AW channel target latency S0" line.long 0x04 "LAT_REG_0,Latency Regulation Register S0" bitfld.long 0x04 8.--10. " AR_SCALE_FACT ,ARQOS read scale factor for S0" "1,2,4,8,16,32,64,128" bitfld.long 0x04 0.--2. " AW_SCALE_FACT ,ARQOS write scale factor for S0" "1,2,4,8,16,32,64,128" line.long 0x08 "QOS_RNGE_S0,QOS Range Register S0" bitfld.long 0x08 24.--27. " MAX_ARQOS ,Maximum ARQOS value S0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 16.--19. " MIN_ARQOS ,Minimum ARQOS value S0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 8.--11. " MAX_AWQOS ,Maximum AWQOS value S0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--3. " MIN_AWQOS ,Minimum AWQOS value S0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " group.long 0x2000++0x03 line.long 0x00 "SNP_CTRL_S1,Snoop Control Register S1" rbitfld.long 0x00 31. " SUPP_DVMS ,Slave interface supports DVM messages" "Not supported,Supported" rbitfld.long 0x00 30. " SUPP_SNPS ,Slave interface supports snoops" "Not supported,Supported" bitfld.long 0x00 1. " EN_DVMS ,Enable issuing of DVM message requests from slave interface S1" "Disabled,Enabled" group.long (0x2000+0x04)++0x03 line.long 0x00 "SHR_OVR_S1,Shareable Override Register S1" bitfld.long 0x00 0.--1. " AXDOM_OVR ,Axdomain override for slave interface S1" "0,1,2,3" group.long (0x2000+0x100)++0x07 line.long 0x00 "RD_QOS_OVR_S1,Read QOS Override Register S1" rbitfld.long 0x00 8.--11. " ARQOS_OVR_RDBCK ,Reads the ARQOS override value of slave interface S1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " ARQOS_VAL ,ARQOS value override for slave interface S1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "WR_QOS_OVR_S1,Write QOS Override Register S1" rbitfld.long 0x04 8.--11. " AWQOS_OVR_RDBCK ,Reads the AWQOS override value of slave interface S1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. " AWQOS_VAL ,AWQOS value override for slave interface S1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long (0x2000+0x10C)++0x03 line.long 0x00 "QOS_CTRL_1,QoS Control Register S1" rbitfld.long 0x00 31. " QOS_REG_DIS ,QoS regulation is disabled in slave interface S1" "No,Yes" bitfld.long 0x00 21. " BAND_REG_MODE ,Normal or quiesce high mode of bandwidth regulation for slave interface S1" "Normal,Quiesce high" bitfld.long 0x00 20. " ARQOS_REG_MODE ,Bandwidth or latency mode of ARQOS regulation for slave interface S1" "Latency,Bandwidth" bitfld.long 0x00 16. " AWQOS_REG_MODE ,Bandwidth or latency mode of AWQOS regulation for slave interface S1" "Latency,Bandwidth" textline " " bitfld.long 0x00 3. " AR_OT_REG ,Enable regulation of outstanding read transactions for slave interface S1" "Disabled,Enabled" bitfld.long 0x00 2. " AW_OT_REG ,Enable regulation of outstanding write transactions for slave interface S1" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " ARQOS_REG ,Enable QoS value regulation on reads for slave interface S1" "Disabled,Enabled" bitfld.long 0x00 0. " AWQOS_REG ,Enable QoS value regulation on writes for slave interface S1" "Disabled,Enabled" group.long (0x2000+0x110)++0x03 line.long 0x00 "MAX_OT_S1,Max OT Register S1" bitfld.long 0x00 24.--29. " INT_OT_AR ,Integer part of the maximum outstanding AR addresses S1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x00 16.--23. 1. " FRAC_OT_AR ,Fractional part of the maximum outstanding AR addresses S1" bitfld.long 0x00 8.--13. " INT_OT_AW ,Integer part of the maximum outstanding AW addresses S1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x00 0.--7. 1. " FRAC_OT_AW ,Fractional part of the maximum outstanding AW addresses S1" group.long (0x2000+0x130)++0x0B line.long 0x00 "TRG_LAT_S1,Target Latency Register S1" hexmask.long.word 0x00 16.--27. 1. " AR_LAT ,AR channel target latency S1" hexmask.long.word 0x00 0.--11. 1. " AW_LAT ,AW channel target latency S1" line.long 0x04 "LAT_REG_1,Latency Regulation Register S1" bitfld.long 0x04 8.--10. " AR_SCALE_FACT ,ARQOS read scale factor for S1" "1,2,4,8,16,32,64,128" bitfld.long 0x04 0.--2. " AW_SCALE_FACT ,ARQOS write scale factor for S1" "1,2,4,8,16,32,64,128" line.long 0x08 "QOS_RNGE_S1,QOS Range Register S1" bitfld.long 0x08 24.--27. " MAX_ARQOS ,Maximum ARQOS value S1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 16.--19. " MIN_ARQOS ,Minimum ARQOS value S1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 8.--11. " MAX_AWQOS ,Maximum AWQOS value S1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--3. " MIN_AWQOS ,Minimum AWQOS value S1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " group.long 0x3000++0x03 line.long 0x00 "SNP_CTRL_S2,Snoop Control Register S2" rbitfld.long 0x00 31. " SUPP_DVMS ,Slave interface supports DVM messages" "Not supported,Supported" rbitfld.long 0x00 30. " SUPP_SNPS ,Slave interface supports snoops" "Not supported,Supported" bitfld.long 0x00 1. " EN_DVMS ,Enable issuing of DVM message requests from slave interface S2" "Disabled,Enabled" group.long (0x3000+0x04)++0x03 line.long 0x00 "SHR_OVR_S2,Shareable Override Register S2" bitfld.long 0x00 0.--1. " AXDOM_OVR ,Axdomain override for slave interface S2" "0,1,2,3" group.long (0x3000+0x100)++0x07 line.long 0x00 "RD_QOS_OVR_S2,Read QOS Override Register S2" rbitfld.long 0x00 8.--11. " ARQOS_OVR_RDBCK ,Reads the ARQOS override value of slave interface S2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " ARQOS_VAL ,ARQOS value override for slave interface S2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "WR_QOS_OVR_S2,Write QOS Override Register S2" rbitfld.long 0x04 8.--11. " AWQOS_OVR_RDBCK ,Reads the AWQOS override value of slave interface S2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. " AWQOS_VAL ,AWQOS value override for slave interface S2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long (0x3000+0x10C)++0x03 line.long 0x00 "QOS_CTRL_2,QoS Control Register S2" rbitfld.long 0x00 31. " QOS_REG_DIS ,QoS regulation is disabled in slave interface S2" "No,Yes" bitfld.long 0x00 21. " BAND_REG_MODE ,Normal or quiesce high mode of bandwidth regulation for slave interface S2" "Normal,Quiesce high" bitfld.long 0x00 20. " ARQOS_REG_MODE ,Bandwidth or latency mode of ARQOS regulation for slave interface S2" "Latency,Bandwidth" bitfld.long 0x00 16. " AWQOS_REG_MODE ,Bandwidth or latency mode of AWQOS regulation for slave interface S2" "Latency,Bandwidth" textline " " bitfld.long 0x00 3. " AR_OT_REG ,Enable regulation of outstanding read transactions for slave interface S2" "Disabled,Enabled" bitfld.long 0x00 2. " AW_OT_REG ,Enable regulation of outstanding write transactions for slave interface S2" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " ARQOS_REG ,Enable QoS value regulation on reads for slave interface S2" "Disabled,Enabled" bitfld.long 0x00 0. " AWQOS_REG ,Enable QoS value regulation on writes for slave interface S2" "Disabled,Enabled" group.long (0x3000+0x110)++0x03 line.long 0x00 "MAX_OT_S2,Max OT Register S2" bitfld.long 0x00 24.--29. " INT_OT_AR ,Integer part of the maximum outstanding AR addresses S2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x00 16.--23. 1. " FRAC_OT_AR ,Fractional part of the maximum outstanding AR addresses S2" bitfld.long 0x00 8.--13. " INT_OT_AW ,Integer part of the maximum outstanding AW addresses S2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x00 0.--7. 1. " FRAC_OT_AW ,Fractional part of the maximum outstanding AW addresses S2" group.long (0x3000+0x130)++0x0B line.long 0x00 "TRG_LAT_S2,Target Latency Register S2" hexmask.long.word 0x00 16.--27. 1. " AR_LAT ,AR channel target latency S2" hexmask.long.word 0x00 0.--11. 1. " AW_LAT ,AW channel target latency S2" line.long 0x04 "LAT_REG_2,Latency Regulation Register S2" bitfld.long 0x04 8.--10. " AR_SCALE_FACT ,ARQOS read scale factor for S2" "1,2,4,8,16,32,64,128" bitfld.long 0x04 0.--2. " AW_SCALE_FACT ,ARQOS write scale factor for S2" "1,2,4,8,16,32,64,128" line.long 0x08 "QOS_RNGE_S2,QOS Range Register S2" bitfld.long 0x08 24.--27. " MAX_ARQOS ,Maximum ARQOS value S2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 16.--19. " MIN_ARQOS ,Minimum ARQOS value S2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 8.--11. " MAX_AWQOS ,Maximum AWQOS value S2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--3. " MIN_AWQOS ,Minimum AWQOS value S2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " group.long 0x4000++0x03 line.long 0x00 "SNP_CTRL_S3,Snoop Control Register S3" rbitfld.long 0x00 31. " SUPP_DVMS ,Slave interface supports DVM messages" "Not supported,Supported" rbitfld.long 0x00 30. " SUPP_SNPS ,Slave interface supports snoops" "Not supported,Supported" bitfld.long 0x00 1. " EN_DVMS ,Enable issuing of DVM message requests from slave interface S3" "Disabled,Enabled" bitfld.long 0x00 0. " EN_SNPS ,Enable issuing of snoop requests from slave interface S3" "Disabled,Enabled" group.long (0x4000+0x100)++0x07 line.long 0x00 "RD_QOS_OVR_S3,Read QOS Override Register S3" rbitfld.long 0x00 8.--11. " ARQOS_OVR_RDBCK ,Reads the ARQOS override value of slave interface S3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " ARQOS_VAL ,ARQOS value override for slave interface S3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "WR_QOS_OVR_S3,Write QOS Override Register S3" rbitfld.long 0x04 8.--11. " AWQOS_OVR_RDBCK ,Reads the AWQOS override value of slave interface S3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. " AWQOS_VAL ,AWQOS value override for slave interface S3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long (0x4000+0x10C)++0x03 line.long 0x00 "QOS_CTRL_3,QoS Control Register S3" rbitfld.long 0x00 31. " QOS_REG_DIS ,QoS regulation is disabled in slave interface S3" "No,Yes" bitfld.long 0x00 21. " BAND_REG_MODE ,Normal or quiesce high mode of bandwidth regulation for slave interface S3" "Normal,Quiesce high" bitfld.long 0x00 20. " ARQOS_REG_MODE ,Bandwidth or latency mode of ARQOS regulation for slave interface S3" "Latency,Bandwidth" bitfld.long 0x00 16. " AWQOS_REG_MODE ,Bandwidth or latency mode of AWQOS regulation for slave interface S3" "Latency,Bandwidth" textline " " bitfld.long 0x00 1. " ARQOS_REG ,Enable QoS value regulation on reads for slave interface S3" "Disabled,Enabled" bitfld.long 0x00 0. " AWQOS_REG ,Enable QoS value regulation on writes for slave interface S3" "Disabled,Enabled" group.long (0x4000+0x130)++0x0B line.long 0x00 "TRG_LAT_S3,Target Latency Register S3" hexmask.long.word 0x00 16.--27. 1. " AR_LAT ,AR channel target latency S3" hexmask.long.word 0x00 0.--11. 1. " AW_LAT ,AW channel target latency S3" line.long 0x04 "LAT_REG_3,Latency Regulation Register S3" bitfld.long 0x04 8.--10. " AR_SCALE_FACT ,ARQOS read scale factor for S3" "1,2,4,8,16,32,64,128" bitfld.long 0x04 0.--2. " AW_SCALE_FACT ,ARQOS write scale factor for S3" "1,2,4,8,16,32,64,128" line.long 0x08 "QOS_RNGE_S3,QOS Range Register S3" bitfld.long 0x08 24.--27. " MAX_ARQOS ,Maximum ARQOS value S3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 16.--19. " MIN_ARQOS ,Minimum ARQOS value S3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 8.--11. " MAX_AWQOS ,Maximum AWQOS value S3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--3. " MIN_AWQOS ,Minimum AWQOS value S3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " group.long 0x5000++0x03 line.long 0x00 "SNP_CTRL_S4,Snoop Control Register S4" rbitfld.long 0x00 31. " SUPP_DVMS ,Slave interface supports DVM messages" "Not supported,Supported" rbitfld.long 0x00 30. " SUPP_SNPS ,Slave interface supports snoops" "Not supported,Supported" bitfld.long 0x00 1. " EN_DVMS ,Enable issuing of DVM message requests from slave interface S4" "Disabled,Enabled" bitfld.long 0x00 0. " EN_SNPS ,Enable issuing of snoop requests from slave interface S4" "Disabled,Enabled" group.long (0x5000+0x100)++0x07 line.long 0x00 "RD_QOS_OVR_S4,Read QOS Override Register S4" rbitfld.long 0x00 8.--11. " ARQOS_OVR_RDBCK ,Reads the ARQOS override value of slave interface S4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " ARQOS_VAL ,ARQOS value override for slave interface S4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "WR_QOS_OVR_S4,Write QOS Override Register S4" rbitfld.long 0x04 8.--11. " AWQOS_OVR_RDBCK ,Reads the AWQOS override value of slave interface S4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. " AWQOS_VAL ,AWQOS value override for slave interface S4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long (0x5000+0x10C)++0x03 line.long 0x00 "QOS_CTRL_4,QoS Control Register S4" rbitfld.long 0x00 31. " QOS_REG_DIS ,QoS regulation is disabled in slave interface S4" "No,Yes" bitfld.long 0x00 21. " BAND_REG_MODE ,Normal or quiesce high mode of bandwidth regulation for slave interface S4" "Normal,Quiesce high" bitfld.long 0x00 20. " ARQOS_REG_MODE ,Bandwidth or latency mode of ARQOS regulation for slave interface S4" "Latency,Bandwidth" bitfld.long 0x00 16. " AWQOS_REG_MODE ,Bandwidth or latency mode of AWQOS regulation for slave interface S4" "Latency,Bandwidth" textline " " bitfld.long 0x00 1. " ARQOS_REG ,Enable QoS value regulation on reads for slave interface S4" "Disabled,Enabled" bitfld.long 0x00 0. " AWQOS_REG ,Enable QoS value regulation on writes for slave interface S4" "Disabled,Enabled" group.long (0x5000+0x130)++0x0B line.long 0x00 "TRG_LAT_S4,Target Latency Register S4" hexmask.long.word 0x00 16.--27. 1. " AR_LAT ,AR channel target latency S4" hexmask.long.word 0x00 0.--11. 1. " AW_LAT ,AW channel target latency S4" line.long 0x04 "LAT_REG_4,Latency Regulation Register S4" bitfld.long 0x04 8.--10. " AR_SCALE_FACT ,ARQOS read scale factor for S4" "1,2,4,8,16,32,64,128" bitfld.long 0x04 0.--2. " AW_SCALE_FACT ,ARQOS write scale factor for S4" "1,2,4,8,16,32,64,128" line.long 0x08 "QOS_RNGE_S4,QOS Range Register S4" bitfld.long 0x08 24.--27. " MAX_ARQOS ,Maximum ARQOS value S4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 16.--19. " MIN_ARQOS ,Minimum ARQOS value S4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 8.--11. " MAX_AWQOS ,Maximum AWQOS value S4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--3. " MIN_AWQOS ,Minimum AWQOS value S4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " group.long 0x9004++0x0B line.long 0x00 "CYCLE_CNT,Cycle Counter Register" line.long 0x04 "CYCLE_CNT_CTRL,Cycle Counter Control Register" bitfld.long 0x04 0. " CCNT_EN ,Enable clock cycle counter" "Disabled,Enabled" line.long 0x08 "CYCLE_CNT_OVRF,Cycle Count Overflow Register" eventfld.long 0x08 0. " CCNT_OVRF ,Clock cycle counter overflow flag" "No overflow,Overflow" group.long 0xA000++0x0F line.long 0x00 "ESR0,ESR0" bitfld.long 0x00 5.--7. " EVT_IF0 ,Event interface number for counter 0" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--4. " EVT_CNT0 ,Event number for counter 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x04 "EV_CNT0,Event Counter Register 0" line.long 0x08 "EV_CNT0_CTRL,Event Counter0 Control Register" bitfld.long 0x08 0. " CNT0_EN ,Enable event counter 0" "Disabled,Enabled" line.long 0x0C "EV_CNT0_OVRF,Event Counter0 Overflow Register" eventfld.long 0x0C 0. " CNT0_OVRF ,Event counter 0 overflow flag" "No overflow,Overflow" group.long 0xB000++0x0F line.long 0x00 "ESR1,ESR1" bitfld.long 0x00 5.--7. " EVT_IF1 ,Event interface number for counter 1" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--4. " EVT_CNT1 ,Event number for counter 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x04 "EV_CNT1,Event Counter Register 1" line.long 0x08 "EV_CNT1_CTRL,Event Counter1 Control Register" bitfld.long 0x08 0. " CNT1_EN ,Enable event counter 1" "Disabled,Enabled" line.long 0x0C "EV_CNT1_OVRF,Event Counter1 Overflow Register" eventfld.long 0x0C 0. " CNT1_OVRF ,Event counter 1 overflow flag" "No overflow,Overflow" group.long 0xC000++0x0F line.long 0x00 "ESR2,ESR2" bitfld.long 0x00 5.--7. " EVT_IF2 ,Event interface number for counter 2" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--4. " EVT_CNT2 ,Event number for counter 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x04 "EV_CNT2,Event Counter Register 2" line.long 0x08 "EV_CNT2_CTRL,Event Counter2 Control Register" bitfld.long 0x08 0. " CNT2_EN ,Enable event counter 2" "Disabled,Enabled" line.long 0x0C "EV_CNT2_OVRF,Event Counter2 Overflow Register" eventfld.long 0x0C 0. " CNT2_OVRF ,Event counter 2 overflow flag" "No overflow,Overflow" group.long 0xD000++0x0F line.long 0x00 "ESR3,ESR3" bitfld.long 0x00 5.--7. " EVT_IF3 ,Event interface number for counter 3" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--4. " EVT_CNT3 ,Event number for counter 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x04 "EV_CNT3,Event Counter Register 3" line.long 0x08 "EV_CNT3_CTRL,Event Counter3 Control Register" bitfld.long 0x08 0. " CNT3_EN ,Enable event counter 3" "Disabled,Enabled" line.long 0x0C "EV_CNT3_OVRF,Event Counter3 Overflow Register" eventfld.long 0x0C 0. " CNT3_OVRF ,Event counter 3 overflow flag" "No overflow,Overflow" base ad:0xFD5E0000 group.long 0x00++0x03 "CCI Configuration Registers" line.long 0x00 "MISC_CTRL,Controls For The Register Block" bitfld.long 0x00 0. " SLVERR_ENABLE ,Enable SLVERR during address decode failure" "Disabled,Enabled" group.long 0x10++0x03 line.long 0x00 "ISR_0,Interrupt Status Register" eventfld.long 0x00 31. " ADDR_DECODE_ERR ,Address decode error" "No error,Error" eventfld.long 0x00 5. " CCNT_OFLW ,Cycle counter overflow" "No overflow,Overflow" eventfld.long 0x00 4. " EC3_OFLW ,Event counter 3 overflow" "No overflow,Overflow" eventfld.long 0x00 3. " EC2_OFLW ,Event counter 2 overflow" "No overflow,Overflow" textline " " eventfld.long 0x00 2. " EC1_OFLW ,Event counter 1 overflow" "No overflow,Overflow" eventfld.long 0x00 1. " EC0_OFLW ,Event counter 0 overflow" "No overflow,Overflow" eventfld.long 0x00 0. " ERRORIRQ ,Error response (DECERR or SLVERR) has been received on the RREST or BRESP inputs" "Not received,Received" group.long 0x14++0x03 line.long 0x00 "IMR_0_SET/CLR,Interrupt Mask Register" setclrfld.long 0x00 31. 0x08 31. 0x04 31. " ADDR_DECODE_ERR ,Address decode error interrupt mask" "Not masked,Masked" setclrfld.long 0x00 5. 0x08 5. 0x04 5. " CCNT_OFLW ,Cycle counter overflow interrupt mask" "Not masked,Masked" setclrfld.long 0x00 4. 0x08 4. 0x04 4. " EC3_OFLW ,Event counter 3 overflow interrupt mask" "Not masked,Masked" setclrfld.long 0x00 3. 0x08 3. 0x04 3. " EC2_OFLW ,Event counter 2 overflow interrupt mask" "Not masked,Masked" textline " " setclrfld.long 0x00 2. 0x08 2. 0x08 2. " EC1_OFLW ,Event counter 1 overflow interrupt mask" "Not masked,Masked" setclrfld.long 0x00 1. 0x08 1. 0x04 1. " EC0_OFLW ,Event counter 0 overflow interrupt mask" "Not masked,Masked" setclrfld.long 0x00 0. 0x08 0. 0x04 0. " ERRORIRQ ,Error response (DECERR or SLVERR) has been received on the RREST or BRESP inputs interrupt mask" "Not masked,Masked" group.long 0x40++0x03 line.long 0x00 "CCI_MISC_CTRL,Misc Control Register" bitfld.long 0x00 1. " NIDEN ,Non invasive debug enable" "Disabled,Enabled" bitfld.long 0x00 0. " SPINDEN ,Secure privileged invasive debug enable" "Disabled,Enabled" width 0x0B tree.end tree "CRF_APB (Clock Controller Full Power Domain)" base ad:0xFD1A0000 width 19. group.long 0x00++0x07 line.long 0x00 "ERR_CTRL,Error Control Register" bitfld.long 0x00 0. " SLVERR_ENABLE ,Enable SLVERR during address decode failure" "No reset,Reset" line.long 0x04 "IR_STATUS,Interrupt Status Register" eventfld.long 0x04 0. " ADDR_DECODE_ERR ,Status for an address decode error interrupt" "No interrupt,Interrupt" group.long 0x08++0x03 line.long 0x00 "IR_MASK_SET/CLR,Interrupt Mask Register" setclrfld.long 0x00 0. 0x08 0. 0x04 0. " ADDR_DECODE_ERR ,Mask for an address decode error interrupt" "Not masked,Masked" group.long 0x1C++0x03 line.long 0x00 "CRF_WPROT,CRF SLCR Write Protection Register" bitfld.long 0x00 0. " ACTIVE ,CRF SLCR write protection enable" "Disabled,Enabled" textline " " group.long 0x20++0x0B line.long 0x00 "APLL_CTRL,PLL Basic Control" bitfld.long 0x00 24.--26. " POST_SRC ,Mux select for determining which clock is bypassed when in bypass mode" "PSS_REF_CLK,PSS_REF_CLK,PSS_REF_CLK,PSS_REF_CLK,VIDEO_CLK,PSS_ALT_REF_CLK,AUX_REFCLK[X],GT_CRX_REF_CLK" bitfld.long 0x00 20.--22. " PRE_SRC ,Mux select for determining which clock feeds this PLL" "PSS_REF_CLK,PSS_REF_CLK,PSS_REF_CLK,PSS_REF_CLK,VIDEO_CLK,PSS_ALT_REF_CLK,AUX_REFCLK[X],GT_CRX_REF_CLK" bitfld.long 0x00 17. " CLKOUTDIV ,Used to change the output divider of the PLL" "0,1" textline " " bitfld.long 0x00 16. " DIV2 ,Turns on the divide by 2 that is inside of the PLL" "Disabled,Enabled" hexmask.long.byte 0x00 8.--14. 1. " FBDIV ,The integer portion of the feedback divider to the PLL" bitfld.long 0x00 3. " BYPASS ,Bypasses the PLL clock" "No bypass,Bypass" textline " " bitfld.long 0x00 0. " RESET ,Asserts reset to the PLL" "No reset,Reset" line.long 0x04 "APLL_CFG,Helper Data" hexmask.long.byte 0x04 25.--31. 1. " LOCK_DLY ,Lock circuit configuration settings for lock windowsize" hexmask.long.word 0x04 13.--22. 1. " LOCK_CNT ,Lock circuit counter setting" bitfld.long 0x04 10.--11. " LFHF ,PLL loop filter high frequency capacitor control" "0,1,2,3" textline " " bitfld.long 0x04 5.--8. " CP ,PLL charge pump control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. " RES ,PLL loop filter resistor control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "APLL_FRAC_CFG,Fractional Control For The PLL" bitfld.long 0x08 31. " ENABLED ,Fractional SDM bypass control" "Integer,Fractional" bitfld.long 0x08 22.--24. " SEED ,Input seed to SDM depending on order" "0,1,2,3,4,5,6,7" bitfld.long 0x08 19. " ALGRTHM ,Fractional algorithm" "0,1" textline " " bitfld.long 0x08 18. " ORDER ,SDM order" "1st,2nd" hexmask.long.word 0x08 0.--15. 1. " DATA ,Fractional value for the feedback value" group.long 0x2C++0x0B line.long 0x00 "DPLL_CTRL,PLL Basic Control" bitfld.long 0x00 24.--26. " POST_SRC ,Mux select for determining which clock is bypassed when in bypass mode" "PSS_REF_CLK,PSS_REF_CLK,PSS_REF_CLK,PSS_REF_CLK,VIDEO_CLK,PSS_ALT_REF_CLK,AUX_REFCLK[X],GT_CRX_REF_CLK" bitfld.long 0x00 20.--22. " PRE_SRC ,Mux select for determining which clock feeds this PLL" "PSS_REF_CLK,PSS_REF_CLK,PSS_REF_CLK,PSS_REF_CLK,VIDEO_CLK,PSS_ALT_REF_CLK,AUX_REFCLK[X],GT_CRX_REF_CLK" bitfld.long 0x00 17. " CLKOUTDIV ,Used to change the output divider of the PLL" "0,1" textline " " bitfld.long 0x00 16. " DIV2 ,Turns on the divide by 2 that is inside of the PLL" "Disabled,Enabled" hexmask.long.byte 0x00 8.--14. 1. " FBDIV ,The integer portion of the feedback divider to the PLL" bitfld.long 0x00 3. " BYPASS ,Bypasses the PLL clock" "No bypass,Bypass" textline " " bitfld.long 0x00 0. " RESET ,Asserts reset to the PLL" "No reset,Reset" line.long 0x04 "DPLL_CFG,Helper Data" hexmask.long.byte 0x04 25.--31. 1. " LOCK_DLY ,Lock circuit configuration settings for lock windowsize" hexmask.long.word 0x04 13.--22. 1. " LOCK_CNT ,Lock circuit counter setting" bitfld.long 0x04 10.--11. " LFHF ,PLL loop filter high frequency capacitor control" "0,1,2,3" textline " " bitfld.long 0x04 5.--8. " CP ,PLL charge pump control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. " RES ,PLL loop filter resistor control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "DPLL_FRAC_CFG,Fractional Control For The PLL" bitfld.long 0x08 31. " ENABLED ,Fractional SDM bypass control" "Integer,Fractional" bitfld.long 0x08 22.--24. " SEED ,Input seed to SDM depending on order" "0,1,2,3,4,5,6,7" bitfld.long 0x08 19. " ALGRTHM ,Fractional algorithm" "0,1" textline " " bitfld.long 0x08 18. " ORDER ,SDM order" "1st,2nd" hexmask.long.word 0x08 0.--15. 1. " DATA ,Fractional value for the feedback value" group.long 0x38++0x0B line.long 0x00 "VPLL_CTRL,PLL Basic Control" bitfld.long 0x00 24.--26. " POST_SRC ,Mux select for determining which clock is bypassed when in bypass mode" "PSS_REF_CLK,PSS_REF_CLK,PSS_REF_CLK,PSS_REF_CLK,VIDEO_CLK,PSS_ALT_REF_CLK,AUX_REFCLK[X],GT_CRX_REF_CLK" bitfld.long 0x00 20.--22. " PRE_SRC ,Mux select for determining which clock feeds this PLL" "PSS_REF_CLK,PSS_REF_CLK,PSS_REF_CLK,PSS_REF_CLK,VIDEO_CLK,PSS_ALT_REF_CLK,AUX_REFCLK[X],GT_CRX_REF_CLK" bitfld.long 0x00 17. " CLKOUTDIV ,Used to change the output divider of the PLL" "0,1" textline " " bitfld.long 0x00 16. " DIV2 ,Turns on the divide by 2 that is inside of the PLL" "Disabled,Enabled" hexmask.long.byte 0x00 8.--14. 1. " FBDIV ,The integer portion of the feedback divider to the PLL" bitfld.long 0x00 3. " BYPASS ,Bypasses the PLL clock" "No bypass,Bypass" textline " " bitfld.long 0x00 0. " RESET ,Asserts reset to the PLL" "No reset,Reset" line.long 0x04 "VPLL_CFG,Helper Data" hexmask.long.byte 0x04 25.--31. 1. " LOCK_DLY ,Lock circuit configuration settings for lock windowsize" hexmask.long.word 0x04 13.--22. 1. " LOCK_CNT ,Lock circuit counter setting" bitfld.long 0x04 10.--11. " LFHF ,PLL loop filter high frequency capacitor control" "0,1,2,3" textline " " bitfld.long 0x04 5.--8. " CP ,PLL charge pump control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. " RES ,PLL loop filter resistor control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "VPLL_FRAC_CFG,Fractional Control For The PLL" bitfld.long 0x08 31. " ENABLED ,Fractional SDM bypass control" "Integer,Fractional" bitfld.long 0x08 22.--24. " SEED ,Input seed to SDM depending on order" "0,1,2,3,4,5,6,7" bitfld.long 0x08 19. " ALGRTHM ,Fractional algorithm" "0,1" textline " " bitfld.long 0x08 18. " ORDER ,SDM order" "1st,2nd" hexmask.long.word 0x08 0.--15. 1. " DATA ,Fractional value for the feedback value" rgroup.long 0x44++0x03 line.long 0x00 "PLL_STATUS,PLL Status Register" bitfld.long 0x00 5. " VPLL_STABLE ,VPLL is stable" "Not stable,Stable" bitfld.long 0x00 4. " DPLL_STABLE ,DPLL is stable" "Not stable,Stable" bitfld.long 0x00 3. " APLL_STABLE ,APLL is stable" "Not stable,Stable" textline " " bitfld.long 0x00 2. " VPLL_LOCKED ,VPLL is locked" "Not locked,Locked" bitfld.long 0x00 1. " DPLL_LOCKED ,DPLL is locked" "Not locked,Locked" bitfld.long 0x00 0. " APLL_LOCKED ,APLL is locked" "Not locked,Locked" group.long 0x48++0x0B line.long 0x00 "APLL_TO_LPD_CTRL,Control For A Clock That Will Be Generated In The FPD" bitfld.long 0x00 8.--13. " DIVISOR0 ,Divisor value for this clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "DPLL_TO_LPD_CTRL,Control For A Clock That Will Be Generated In The FPD" bitfld.long 0x04 8.--13. " DIVISOR0 ,Divisor value for this clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x08 "VPLL_TO_LPD_CTRL,Control For A Clock That Will Be Generated In The FPD" bitfld.long 0x08 8.--13. " DIVISOR0 ,Divisor value for this clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x60++0x0B line.long 0x00 "ACPU_CTRL,Reference Clock Control Register" bitfld.long 0x00 25. " CLKACT_HALF ,Half speed APU clock active signal" "Not active,Active" bitfld.long 0x00 24. " CLKACT_FULL ,Full speed APU clock active signal" "Not active,Active" bitfld.long 0x00 8.--13. " DIVISOR0 ,6 bit divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x00 0.--2. " SRCSEL ,Source select" "APLL,,DPLL,VPLL,?..." line.long 0x04 "DBG_TRACE_CTRL,Reference Clock Control Register" bitfld.long 0x04 24. " CLKACT ,Clock active signal" "Not active,Active" bitfld.long 0x04 8.--13. " DIVISOR0 ,6 bit divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 0.--2. " SRCSEL ,Source select" "IOPLL_TO_FPD,,DPLL,VPLL,?..." line.long 0x08 "DBG_FPD_CTRL,Reference Clock Control Register" bitfld.long 0x08 24. " CLKACT ,Clock active signal" "Not active,Active" bitfld.long 0x08 8.--13. " DIVISOR0 ,6 bit divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x08 0.--2. " SRCSEL ,Source select" "IOPLL_TO_FPD,,DPLL,VPLL,?..." group.long 0x70++0x07 line.long 0x00 "DP_VIDEO_REF_CTRL,Reference Clock Control Register" bitfld.long 0x00 24. " CLKACT ,Clock active signal" "Not active,Active" bitfld.long 0x00 16.--21. " DIVISOR1 ,6 bit divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 8.--13. " DIVISOR0 ,6 bit divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x00 0.--2. " SRCSEL ,Source select" "VPLL,,DPLL,RPLL_TO_FPD,?..." line.long 0x04 "DP_AUDIO_REF_CTRL,Reference Clock Control Register" bitfld.long 0x04 24. " CLKACT ,Clock active signal" "Not active,Active" bitfld.long 0x04 16.--21. " DIVISOR1 ,6 bit divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 8.--13. " DIVISOR0 ,6 bit divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x04 0.--2. " SRCSEL ,Source select" "VPLL,,DPLL,RPLL_TO_FPD,?..." group.long 0x7C++0x0B line.long 0x00 "DP_STC_REF_CTRL,Reference Clock Control Register" bitfld.long 0x00 24. " CLKACT ,Clock active signal" "Not active,Active" bitfld.long 0x00 16.--21. " DIVISOR1 ,6 bit divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 8.--13. " DIVISOR0 ,6 bit divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x00 0.--2. " SRCSEL ,Source select" "VPLL,,DPLL,RPLL_TO_FPD,?..." line.long 0x04 "DDR_CTRL,Reference Clock Control Register" bitfld.long 0x04 8.--13. " DIVISOR0 ,6 bit divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 0.--2. " SRCSEL ,Source select" "DPLL,VPLL,?..." line.long 0x08 "GPU_REF_CTRL,Reference Clock Control Register" bitfld.long 0x08 26. " PP1_CLKACT ,Clock active signal for pixel processor 1" "Not active,Active" bitfld.long 0x08 25. " PP0_CLKACT ,Clock active signal for pixel processor 0" "Not active,Active" bitfld.long 0x08 24. " CLKACT ,Clock active signal" "Not active,Active" textline " " bitfld.long 0x08 8.--13. " DIVISOR0 ,6 bit divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x08 0.--2. " SRCSEL ,Source select" "IOPLL_TO_FPD,,VPLL,DPLL,?..." group.long 0xA0++0x03 line.long 0x00 "SATA_REF_CTRL,Reference Clock Control Register" bitfld.long 0x00 24. " CLKACT ,Clock active signal" "Not active,Active" bitfld.long 0x00 8.--13. " DIVISOR0 ,6 bit divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--2. " SRCSEL ,Source select" "IOPLL_TO_FPD,,APLL,DPLL,?..." group.long 0xB4++0x17 line.long 0x00 "PCIE_REF_CTR,Reference Clock Control Register" bitfld.long 0x00 24. " CLKACT ,Clock active signal" "Not active,Active" bitfld.long 0x00 8.--13. " DIVISOR0 ,6 bit divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--2. " SRCSEL ,Source select" "IOPLL_TO_FPD,,RPLL_TO_FPD,DPLL,?..." line.long 0x04 "GDMA_REF_CTRL,Reference Clock Control Register" bitfld.long 0x04 24. " CLKACT ,Clock active signal" "Not active,Active" bitfld.long 0x04 8.--13. " DIVISOR0 ,6 bit divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 0.--2. " SRCSEL ,Source select" "APLL,,VPLL,DPLL,?..." line.long 0x08 "DPDMA_REF_CTRL,Reference Clock Control Register" bitfld.long 0x08 24. " CLKACT ,Clock active signal" "Not active,Active" bitfld.long 0x08 8.--13. " DIVISOR0 ,6 bit divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x08 0.--2. " SRCSEL ,Source select" "APLL,,VPLL,DPLL,?..." line.long 0x0C "TOPSW_MAIN_CTRL,Reference Clock Control Register" bitfld.long 0x0C 24. " CLKACT ,Clock active signal" "Not active,Active" bitfld.long 0x0C 8.--13. " DIVISOR0 ,6 bit divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x0C 0.--2. " SRCSEL ,Source select" "APLL,,VPLL,DPLL,?..." line.long 0x10 "TOPSW_LSBUS_CTRL,Reference Clock Control Register" bitfld.long 0x10 24. " CLKACT ,Clock active signal" "Not active,Active" bitfld.long 0x10 8.--13. " DIVISOR0 ,6 bit divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x10 0.--2. " SRCSEL ,Source select" "APLL,,IOPLL_TO_FPD,DPLL,?..." line.long 0x14 "GTGREF0_REF_CTRL,Reference Clock Control Register" bitfld.long 0x14 24. " CLKACT ,Clock active signal" "Not active,Active" bitfld.long 0x14 8.--13. " DIVISOR0 ,6 bit divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x14 0.--2. " SRCSEL ,Source select" "IOPLL_TO_FPD,,APLL,DPLL,?..." group.long 0xF8++0x03 line.long 0x00 "DBG_TSTMP_CTRL,Reference Clock Control Register" bitfld.long 0x00 8.--13. " DIVISOR0 ,6 bit divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--2. " SRCSEL ,Source select" "IOPLL_TO_FPD,,DPLL,APLL,?..." textline " " group.long 0x100++0x07 line.long 0x00 "RST_FPD_TOP,FPD Block Level Software Controlled Reset" bitfld.long 0x00 19. " PCIE_CFG_RESET ,PCIE config reset" "No reset,Reset" bitfld.long 0x00 18. " PCIE_BRIDGE_RESET ,PCIE bridge block level reset (Axi interface)" "No reset,Reset" bitfld.long 0x00 17. " PCIE_CTRL_RESET ,PCIE control block level reset" "No reset,Reset" textline " " bitfld.long 0x00 16. " DP_RESET ,Display port block level reset (Includes DPDMA)" "No reset,Reset" bitfld.long 0x00 15. " SWDT_RESET ,FPD WDT reset" "No reset,Reset" bitfld.long 0x00 12. " AFI_FM5_RESET ,AF_FM5 block level reset" "No reset,Reset" textline " " bitfld.long 0x00 11. " AFI_FM4_RESET ,AF_FM4 block level reset" "No reset,Reset" bitfld.long 0x00 10. " AFI_FM3_RESET ,AF_FM3 block level reset" "No reset,Reset" bitfld.long 0x00 9. " AFI_FM2_RESET ,AF_FM2 block level reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " AFI_FM1_RESET ,AF_FM1 block level reset" "No reset,Reset" bitfld.long 0x00 7. " AFI_FM0_RESET ,AF_FM0 block level reset" "No reset,Reset" bitfld.long 0x00 6. " GDMA_RESET ,GDMA block level reset" "No reset,Reset" textline " " bitfld.long 0x00 5. " GPU_PP1_RESET ,Pixel processor (Submodule of GPU) block level reset" "No reset,Reset" bitfld.long 0x00 4. " GPU_PP0_RESET ,Pixel processor (Submodule of GPU) block level reset" "No reset,Reset" bitfld.long 0x00 3. " GPU_RESET ,GPU block level reset" "No reset,Reset" textline " " bitfld.long 0x00 2. " GT_RESET ,GT block level reset" "No reset,Reset" bitfld.long 0x00 1. " SATA_RESET ,Sata block level reset" "No reset,Reset" line.long 0x04 "RST_FPD_APU,APU Block Level Software Controlled Resets" bitfld.long 0x04 13. " ACPU3_PWRON_RESET ,ACPU3 power on reset" "No reset,Reset" bitfld.long 0x04 12. " ACPU2_PWRON_RESET ,ACPU2 power on reset" "No reset,Reset" bitfld.long 0x04 11. " ACPU1_PWRON_RESET ,ACPU1 power on reset" "No reset,Reset" textline " " bitfld.long 0x04 10. " ACPU0_PWRON_RESET ,ACPU0 power on reset" "No reset,Reset" bitfld.long 0x04 8. " APU_L2_RESET ,APU L2 reset" "No reset,Reset" bitfld.long 0x04 3. " ACPU3_RESET ,ACPU3 reset" "No reset,Reset" textline " " bitfld.long 0x04 2. " ACPU2_RESET ,ACPU2 reset" "No reset,Reset" bitfld.long 0x04 1. " ACPU1_RESET ,ACPU1 reset" "No reset,Reset" bitfld.long 0x04 0. " ACPU0_RESET ,ACPU0 reset" "No reset,Reset" group.byte 0x108++0x00 line.byte 0x00 "RST_DDR_SS,DDR Sub System Block Level Reset" bitfld.byte 0x00 3. " DDR_RESET ,DDR block level reset inside of the DDR sub system" "No reset,Reset" bitfld.byte 0x00 2. " APM_RESET ,APM block level reset inside of the DDR sub system" "No reset,Reset" width 0x0B tree.end tree "CRL_APB (Clock Controller Low Power Domain)" base ad:0xFF5E0000 width 20. group.long 0x00++0x07 line.long 0x00 "ERR_CTRL,Error Control Register" bitfld.long 0x00 0. " SLVERR_ENABLE ,Enable SLVERR during address decode failure" "No reset,Reset" line.long 0x04 "IR_STATUS,Interrupt Status Register" eventfld.long 0x04 0. " ADDR_DECODE_ERR ,Status for an address decode error interrupt" "No interrupt,Interrupt" group.long 0x08++0x03 line.long 0x00 "IR_MASK_SET/CLR,Interrupt Mask Register" setclrfld.long 0x00 0. 0x08 0. 0x04 0. " ADDR_DECODE_ERR ,Mask for an address decode error interrupt" "Not masked,Masked" group.long 0x1C++0x03 line.long 0x00 "CRL_WPROT,CRL SLCR Write Protection Register" bitfld.long 0x00 0. " ACTIVE ,CRL SLCR write protection enable" "Disabled,Enabled" textline " " group.long 0x20++0x0B line.long 0x00 "IOPLL_CTRL,PLL Basic Control" bitfld.long 0x00 24.--26. " POST_SRC ,Mux select for determining which clock is bypassed when in bypass mode" "PSS_REF_CLK,PSS_REF_CLK,PSS_REF_CLK,PSS_REF_CLK,VIDEO_CLK,PSS_ALT_REF_CLK,AUX_REFCLK[X],GT_CRX_REF_CLK" bitfld.long 0x00 20.--22. " PRE_SRC ,Mux select for determining which clock feeds this PLL" "PSS_REF_CLK,PSS_REF_CLK,PSS_REF_CLK,PSS_REF_CLK,VIDEO_CLK,PSS_ALT_REF_CLK,AUX_REFCLK[X],GT_CRX_REF_CLK" textline " " bitfld.long 0x00 16. " DIV2 ,Turns on the divide by 2 that is inside of the PLL" "Disabled,Enabled" hexmask.long.byte 0x00 8.--14. 1. " FBDIV ,The integer portion of the feedback divider to the PLL" bitfld.long 0x00 3. " BYPASS ,Bypasses the PLL clock" "No bypass,Bypass" textline " " bitfld.long 0x00 0. " RESET ,Asserts reset to the PLL" "No reset,Reset" line.long 0x04 "IOPLL_CFG,Helper Data" hexmask.long.byte 0x04 25.--31. 1. " LOCK_DLY ,Lock circuit configuration settings for lock windowsize" hexmask.long.word 0x04 13.--22. 1. " LOCK_CNT ,Lock circuit counter setting" bitfld.long 0x04 10.--11. " LFHF ,PLL loop filter high frequency capacitor control" "0,1,2,3" textline " " bitfld.long 0x04 5.--8. " CP ,PLL charge pump control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. " RES ,PLL loop filter resistor control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "IOPLL_FRAC_CFG,Fractional Control For The PLL" bitfld.long 0x08 31. " ENABLED ,Fractional SDM bypass control" "Integer,Fractional" bitfld.long 0x08 22.--24. " SEED ,Input seed to SDM depending on order" "0,1,2,3,4,5,6,7" bitfld.long 0x08 19. " ALGRTHM ,Fractional algorithm" "0,1" textline " " bitfld.long 0x08 18. " ORDER ,SDM order" "1st,2nd" hexmask.long.word 0x08 0.--15. 1. " DATA ,Fractional value for the feedback value" group.long 0x30++0x0B line.long 0x00 "RPLL_CTRL,PLL Basic Control" bitfld.long 0x00 24.--26. " POST_SRC ,Mux select for determining which clock is bypassed when in bypass mode" "PSS_REF_CLK,PSS_REF_CLK,PSS_REF_CLK,PSS_REF_CLK,VIDEO_CLK,PSS_ALT_REF_CLK,AUX_REFCLK[X],GT_CRX_REF_CLK" bitfld.long 0x00 20.--22. " PRE_SRC ,Mux select for determining which clock feeds this PLL" "PSS_REF_CLK,PSS_REF_CLK,PSS_REF_CLK,PSS_REF_CLK,VIDEO_CLK,PSS_ALT_REF_CLK,AUX_REFCLK[X],GT_CRX_REF_CLK" textline " " bitfld.long 0x00 16. " DIV2 ,Turns on the divide by 2 that is inside of the PLL" "Disabled,Enabled" hexmask.long.byte 0x00 8.--14. 1. " FBDIV ,The integer portion of the feedback divider to the PLL" bitfld.long 0x00 3. " BYPASS ,Bypasses the PLL clock" "No bypass,Bypass" textline " " bitfld.long 0x00 0. " RESET ,Asserts reset to the PLL" "No reset,Reset" line.long 0x04 "RPLL_CFG,Helper Data" hexmask.long.byte 0x04 25.--31. 1. " LOCK_DLY ,Lock circuit configuration settings for lock windowsize" hexmask.long.word 0x04 13.--22. 1. " LOCK_CNT ,Lock circuit counter setting" bitfld.long 0x04 10.--11. " LFHF ,PLL loop filter high frequency capacitor control" "0,1,2,3" textline " " bitfld.long 0x04 5.--8. " CP ,PLL charge pump control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. " RES ,PLL loop filter resistor control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "RPLL_FRAC_CFG,Fractional Control For The PLL" bitfld.long 0x08 31. " ENABLED ,Fractional SDM bypass control" "Integer,Fractional" bitfld.long 0x08 22.--24. " SEED ,Input seed to SDM depending on order" "0,1,2,3,4,5,6,7" bitfld.long 0x08 19. " ALGRTHM ,Fractional algorithm" "0,1" textline " " bitfld.long 0x08 18. " ORDER ,SDM order" "1st,2nd" hexmask.long.word 0x08 0.--15. 1. " DATA ,Fractional value for the feedback value" rgroup.long 0x40++0x03 line.long 0x00 "PLL_STATUS,PLL Status Register" bitfld.long 0x00 4. " RPLL_STABLE ,RPLL is stable" "Not stable,Stable" bitfld.long 0x00 3. " IOPLL_STABLE ,IOPLL is stable" "Not stable,Stable" bitfld.long 0x00 1. " RPLL_LOCKED ,RPLL is locked" "Not locked,Locked" bitfld.long 0x00 0. " IOPLL_LOCKED ,IOPLL is locked" "Not locked,Locked" group.long 0x44++0x47 line.long 0x00 "IOPLL_TO_FPD_CTRL,Control For A Clock That Will Be Generated In The LPD" bitfld.long 0x00 8.--13. " DIVISOR0 ,Divisor value for this clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "RPLL_TO_FPD_CTRL,Control For A Clock That Will Be Generated In The LPD" bitfld.long 0x04 8.--13. " DIVISOR0 ,Divisor value for this clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " line.long 0x08 "USB3_DUAL_REF_CTRL,Reference Clock Control Register" bitfld.long 0x08 25. " CLKACT ,Clock active signal" "Not active,Active" bitfld.long 0x08 16.--21. " DIVISOR1 ,6 bit divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x08 8.--13. " DIVISOR0 ,6 bit divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x08 0.--2. " SRCSEL ,Source select" "IOPLL,,RPLL,DPLL,?..." line.long 0x0C "GEM0_REF_CTRL,Reference Clock Control Register" bitfld.long 0x0C 26. " RX_CLKACT ,Clock active for the RX channel" "Not active,Active" bitfld.long 0x0C 25. " CLKACT ,Clock active signal" "Not active,Active" bitfld.long 0x0C 16.--21. " DIVISOR1 ,6 bit divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x0C 8.--13. " DIVISOR0 ,6 bit divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x0C 0.--2. " SRCSEL ,Source select" "IOPLL,,RPLL,DPLL,?..." line.long 0x10 "GEM1_REF_CTRL,Reference Clock Control Register" bitfld.long 0x10 26. " RX_CLKACT ,Clock active for the RX channel" "Not active,Active" bitfld.long 0x10 25. " CLKACT ,Clock active signal" "Not active,Active" bitfld.long 0x10 16.--21. " DIVISOR1 ,6 bit divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x10 8.--13. " DIVISOR0 ,6 bit divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x10 0.--2. " SRCSEL ,Source select" "IOPLL,,RPLL,DPLL,?..." line.long 0x14 "GEM2_REF_CTRL,Reference Clock Control Register" bitfld.long 0x14 26. " RX_CLKACT ,Clock active for the RX channel" "Not active,Active" bitfld.long 0x14 25. " CLKACT ,Clock active signal" "Not active,Active" bitfld.long 0x14 16.--21. " DIVISOR1 ,6 bit divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x14 8.--13. " DIVISOR0 ,6 bit divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x14 0.--2. " SRCSEL ,Source select" "IOPLL,,RPLL,DPLL,?..." line.long 0x18 "GEM3_REF_CTRL,Reference Clock Control Register" bitfld.long 0x18 26. " RX_CLKACT ,Clock active for the RX channel" "Not active,Active" bitfld.long 0x18 25. " CLKACT ,Clock active signal" "Not active,Active" bitfld.long 0x18 16.--21. " DIVISOR1 ,6 bit divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x18 8.--13. " DIVISOR0 ,6 bit divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x18 0.--2. " SRCSEL ,Source select" "IOPLL,,RPLL,DPLL,?..." line.long 0x1C "USB0_BUS_REF_CTRL,Reference Clock Control Register" bitfld.long 0x1C 25. " CLKACT ,Clock active signal" "Not active,Active" bitfld.long 0x1C 16.--21. " DIVISOR1 ,6 bit divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x1C 8.--13. " DIVISOR0 ,6 bit divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x1C 0.--2. " SRCSEL ,Source select" "IOPLL,,RPLL,DPLL,?..." line.long 0x20 "USB1_BUS_REF_CTRL,Reference Clock Control Register" bitfld.long 0x20 25. " CLKACT ,Clock active signal" "Not active,Active" bitfld.long 0x20 16.--21. " DIVISOR1 ,6 bit divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x20 8.--13. " DIVISOR0 ,6 bit divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x20 0.--2. " SRCSEL ,Source select" "IOPLL,,RPLL,DPLL,?..." line.long 0x24 "QSPI_REF_CTRL,Reference Clock Control Register" bitfld.long 0x24 24. " CLKACT ,Clock active signal" "Not active,Active" bitfld.long 0x24 16.--21. " DIVISOR1 ,6 bit divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x24 8.--13. " DIVISOR0 ,6 bit divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x24 0.--2. " SRCSEL ,Source select" "IOPLL,,RPLL,DPLL,?..." line.long 0x28 "SDIO0_REF_CTRL,Reference Clock Control Register" bitfld.long 0x28 24. " CLKACT ,Clock active signal" "Not active,Active" bitfld.long 0x28 16.--21. " DIVISOR1 ,6 bit divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x28 8.--13. " DIVISOR0 ,6 bit divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x28 0.--2. " SRCSEL ,Source select" "IOPLL,,RPLL,VPLL,?..." line.long 0x2C "SDIO1_REF_CTRL,Reference Clock Control Register" bitfld.long 0x2C 24. " CLKACT ,Clock active signal" "Not active,Active" bitfld.long 0x2C 16.--21. " DIVISOR1 ,6 bit divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x2C 8.--13. " DIVISOR0 ,6 bit divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x2C 0.--2. " SRCSEL ,Source select" "IOPLL,,RPLL,VPLL,?..." line.long 0x30 "UART0_REF_CTRL,Reference Clock Control Register" bitfld.long 0x30 24. " CLKACT ,Clock active signal" "Not active,Active" bitfld.long 0x30 16.--21. " DIVISOR1 ,6 bit divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x30 8.--13. " DIVISOR0 ,6 bit divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x30 0.--2. " SRCSEL ,Source select" "IOPLL,,RPLL,DPLL,?..." line.long 0x34 "UART1_REF_CTRL,Reference Clock Control Register" bitfld.long 0x34 24. " CLKACT ,Clock active signal" "Not active,Active" bitfld.long 0x34 16.--21. " DIVISOR1 ,6 bit divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x34 8.--13. " DIVISOR0 ,6 bit divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x34 0.--2. " SRCSEL ,Source select" "IOPLL,,RPLL,DPLL,?..." line.long 0x38 "SPI0_REF_CTRL,Reference Clock Control Register" bitfld.long 0x38 24. " CLKACT ,Clock active signal" "Not active,Active" bitfld.long 0x38 16.--21. " DIVISOR1 ,6 bit divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x38 8.--13. " DIVISOR0 ,6 bit divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x38 0.--2. " SRCSEL ,Source select" "IOPLL,,RPLL,DPLL,?..." line.long 0x3C "SPI1_REF_CTRL,Reference Clock Control Register" bitfld.long 0x3C 24. " CLKACT ,Clock active signal" "Not active,Active" bitfld.long 0x3C 16.--21. " DIVISOR1 ,6 bit divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x3C 8.--13. " DIVISOR0 ,6 bit divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x3C 0.--2. " SRCSEL ,Source select" "IOPLL,,RPLL,DPLL,?..." line.long 0x40 "CAN0_REF_CTRL,Reference Clock Control Register" bitfld.long 0x40 24. " CLKACT ,Clock active signal" "Not active,Active" bitfld.long 0x40 16.--21. " DIVISOR1 ,6 bit divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x40 8.--13. " DIVISOR0 ,6 bit divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x40 0.--2. " SRCSEL ,Source select" "IOPLL,,RPLL,DPLL,?..." line.long 0x44 "CAN1_REF_CTRL,Reference Clock Control Register" bitfld.long 0x44 24. " CLKACT ,Clock active signal" "Not active,Active" bitfld.long 0x44 16.--21. " DIVISOR1 ,6 bit divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x44 8.--13. " DIVISOR0 ,6 bit divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x44 0.--2. " SRCSEL ,Source select" "IOPLL,,RPLL,DPLL,?..." group.long 0x90++0x03 line.long 0x00 "CPU_R5_CTRL,Reference Clock Control Register" bitfld.long 0x00 25. " CLKACT_CORE ,Clock active for just the R5 power island" "Not active,Active" bitfld.long 0x00 24. " CLKACT ,Clock active signal" "Not active,Active" bitfld.long 0x00 8.--13. " DIVISOR0 ,6 bit divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x00 0.--2. " SRCSEL ,Source select" "RPLL,,IOPLL,DPLL,?..." group.long 0x9C++0x1F line.long 0x00 "IOU_SWITCH_CTRL,Reference Clock Control Register" bitfld.long 0x00 24. " CLKACT ,Clock active signal" "Not active,Active" bitfld.long 0x00 8.--13. " DIVISOR0 ,6 bit divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--2. " SRCSEL ,Source select" "RPLL,,IOPLL,DPLL,?..." line.long 0x04 "CSU_PLL_CTRL,Reference Clock Control Register" bitfld.long 0x04 24. " CLKACT ,Clock active signal" "Not active,Active" bitfld.long 0x04 8.--13. " DIVISOR0 ,6 bit divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 0.--2. " SRCSEL ,Source select" "IOPLL,,RPLL,DPLL,?..." line.long 0x08 "PCAP_CTRL,Reference Clock Control Register" bitfld.long 0x08 24. " CLKACT ,Clock active signal" "Not active,Active" bitfld.long 0x08 8.--13. " DIVISOR0 ,6 bit divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x08 0.--2. " SRCSEL ,Source select" "IOPLL,,RPLL,DPLL,?..." line.long 0x0C "LPD_SWITCH_CTRL,Reference Clock Control Register" bitfld.long 0x0C 24. " CLKACT ,Clock active signal" "Not active,Active" bitfld.long 0x0C 8.--13. " DIVISOR0 ,6 bit divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x0C 0.--2. " SRCSEL ,Source select" "RPLL,,IOPLL,DPLL,?..." line.long 0x10 "LPD_LSBUS_CTRL,Reference Clock Control Register" bitfld.long 0x10 24. " CLKACT ,Clock active signal" "Not active,Active" bitfld.long 0x10 8.--13. " DIVISOR0 ,6 bit divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x10 0.--2. " SRCSEL ,Source select" "RPLL,,IOPLL,DPLL,?..." line.long 0x14 "DBG_LPD_CTRL,Reference Clock Control Register" bitfld.long 0x14 24. " CLKACT ,Clock active signal" "Not active,Active" bitfld.long 0x14 8.--13. " DIVISOR0 ,6 bit divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x14 0.--2. " SRCSEL ,Source select" "RPLL,,IOPLL,DPLL,?..." line.long 0x18 "NAND_REF_CTRL,Reference Clock Control Register" bitfld.long 0x18 24. " CLKACT ,Clock active signal" "Not active,Active" bitfld.long 0x18 16.--21. " DIVISOR1 ,6 bit divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x18 8.--13. " DIVISOR0 ,6 bit divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x18 0.--2. " SRCSEL ,Source select" "IOPLL,,RPLL,DPLL,?..." line.long 0x1C "ADMA_REF_CTRL,Reference Clock Control Register" bitfld.long 0x1C 24. " CLKACT ,Clock active signal" "Not active,Active" bitfld.long 0x1C 8.--13. " DIVISOR0 ,6 bit divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x1C 0.--2. " SRCSEL ,Source select" "RPLL,,IOPLL,DPLL,?..." group.long 0xC0++0x3B line.long 0x00 "PL0_REF_CTRL,Reference Clock Control Register" bitfld.long 0x00 24. " CLKACT ,Clock active signal" "Not active,Active" bitfld.long 0x00 16.--21. " DIVISOR1 ,6 bit divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 8.--13. " DIVISOR0 ,6 bit divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x00 0.--2. " SRCSEL ,Source select" "IOPLL,,RPLL,DPLL,?..." line.long 0x04 "PL1_REF_CTRL,Reference Clock Control Register" bitfld.long 0x04 24. " CLKACT ,Clock active signal" "Not active,Active" bitfld.long 0x04 16.--21. " DIVISOR1 ,6 bit divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 8.--13. " DIVISOR0 ,6 bit divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x04 0.--2. " SRCSEL ,Source select" "IOPLL,,RPLL,DPLL,?..." line.long 0x08 "PL2_REF_CTRL,Reference Clock Control Register" bitfld.long 0x08 24. " CLKACT ,Clock active signal" "Not active,Active" bitfld.long 0x08 16.--21. " DIVISOR1 ,6 bit divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x08 8.--13. " DIVISOR0 ,6 bit divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x08 0.--2. " SRCSEL ,Source select" "IOPLL,,RPLL,DPLL,?..." line.long 0x0C "PL3_REF_CTRL,Reference Clock Control Register" bitfld.long 0x0C 24. " CLKACT ,Clock active signal" "Not active,Active" bitfld.long 0x0C 16.--21. " DIVISOR1 ,6 bit divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x0C 8.--13. " DIVISOR0 ,6 bit divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x0C 0.--2. " SRCSEL ,Source select" "IOPLL,,RPLL,DPLL,?..." line.long 0x10 "PL0_THR_CTRL,PL Fabric Clock Threshold Control And Status" hexmask.long.word 0x10 16.--31. 1. " CURR_VAL ,How many clocks are left in the counter before the clock stops" rbitfld.long 0x10 15. " SRCSEL ,Clock run status" "Not running,Running" bitfld.long 0x10 1. " CPU_START ,Will start the count" "No effect,Start" bitfld.long 0x10 0. " CNT_RST ,Reset internal counter" "No effect,Reset" line.long 0x14 "PL0_THR_CNT,PL Fabric Clock Threshold Count Value" hexmask.long.word 0x14 16.--31. 1. " LAST_CNT ,The number of clocks after receiving a trigger that the clocks should stop" line.long 0x18 "PL1_THR_CTRL,PL Fabric Clock Threshold Control And Status" hexmask.long.word 0x18 16.--31. 1. " CURR_VAL ,How many clocks are left in the counter before the clock stops" rbitfld.long 0x18 15. " SRCSEL ,Clock run status" "Not running,Running" bitfld.long 0x18 1. " CPU_START ,Will start the count" "No effect,Start" bitfld.long 0x18 0. " CNT_RST ,Reset internal counter" "No effect,Reset" line.long 0x1C "PL1_THR_CNT,PL Fabric Clock Threshold Count Value" hexmask.long.word 0x1C 16.--31. 1. " LAST_CNT ,The number of clocks after receiving a trigger that the clocks should stop" line.long 0x20 "PL2_THR_CTRL,PL Fabric Clock Threshold Control And Status" hexmask.long.word 0x20 16.--31. 1. " CURR_VAL ,How many clocks are left in the counter before the clock stops" rbitfld.long 0x20 15. " SRCSEL ,Clock run status" "Not running,Running" bitfld.long 0x20 1. " CPU_START ,Will start the count" "No effect,Start" bitfld.long 0x20 0. " CNT_RST ,Reset internal counter" "No effect,Reset" line.long 0x24 "PL2_THR_CNT,PL Fabric Clock Threshold Count Value" hexmask.long.word 0x24 16.--31. 1. " LAST_CNT ,The number of clocks after receiving a trigger that the clocks should stop" line.long 0x28 "PL3_THR_CTRL,PL Fabric Clock Threshold Control And Status" hexmask.long.word 0x28 16.--31. 1. " CURR_VAL ,How many clocks are left in the counter before the clock stops" rbitfld.long 0x28 15. " SRCSEL ,Clock run status" "Not running,Running" bitfld.long 0x28 1. " CPU_START ,Will start the count" "No effect,Start" bitfld.long 0x28 0. " CNT_RST ,Reset internal counter" "No effect,Reset" line.long 0x2C "PL3_THR_CNT,PL Fabric Clock Threshold Count Value" hexmask.long.word 0x2C 16.--31. 1. " LAST_CNT ,The number of clocks after receiving a trigger that the clocks should stop" line.long 0x30 "GEM_TSU_REF_CTRL,Reference Clock Control Register" bitfld.long 0x30 24. " CLKACT ,Clock active signal" "Not active,Active" bitfld.long 0x30 16.--21. " DIVISOR1 ,6 bit divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x30 8.--13. " DIVISOR0 ,6 bit divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x30 0.--2. " SRCSEL ,Source select" "IOPLL,,RPLL,DPLL,?..." line.long 0x34 "DLL_REF_CTRL,Reference Clock Control Register" bitfld.long 0x34 0.--2. " SRCSEL ,Source select" "IOPLL,RPLL,?..." line.long 0x38 "AMS_REF_CTRL,Reference Clock Control Register" bitfld.long 0x38 24. " CLKACT ,Clock active signal" "Not active,Active" bitfld.long 0x38 16.--21. " DIVISOR1 ,6 bit divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x38 8.--13. " DIVISOR0 ,6 bit divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x38 0.--2. " SRCSEL ,Source select" "RPLL,,IOPLL,DPLL,?..." group.long 0x120++0x0B line.long 0x00 "I2C0_REF_CTRL,Reference Clock Control Register" bitfld.long 0x00 24. " CLKACT ,Clock active signal" "Not active,Active" bitfld.long 0x00 16.--21. " DIVISOR1 ,6 bit divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 8.--13. " DIVISOR0 ,6 bit divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x00 0.--2. " SRCSEL ,Source select" "IOPLL,,RPLL,DPLL,?..." line.long 0x04 "I2C1_REF_CTRL,Reference Clock Control Register" bitfld.long 0x04 24. " CLKACT ,Clock active signal" "Not active,Active" bitfld.long 0x04 16.--21. " DIVISOR1 ,6 bit divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 8.--13. " DIVISOR0 ,6 bit divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x04 0.--2. " SRCSEL ,Source select" "IOPLL,,RPLL,DPLL,?..." line.long 0x08 "TIMESTAMP_REF_CTRL,Reference Clock Control Register" bitfld.long 0x08 24. " CLKACT ,Clock active signal" "Not active,Active" bitfld.long 0x08 8.--13. " DIVISOR0 ,6 bit divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x08 0.--2. " SRCSEL ,Source select" "RPLL,,IOPLL,DPLL,Pss_ref_clk,Pss_ref_clk,Pss_ref_clk,Pss_ref_clk" group.long 0x130++0x03 line.long 0x00 "SAFETY_CHK,Safety Endpoint Connectivity Check Register" textline " " group.word 0x140++0x01 line.word 0x00 "CLKMON_STATUS,Interrupt Status Register" eventfld.word 0x00 15. " CNTA7_OVER_ERR ,Overflow for counter that is clocked by clock A" "No overflow,Overflow" eventfld.word 0x00 14. " MON7_ERR ,CLK7 was not within the acceptable range" "No interrupt,Interrupt" eventfld.word 0x00 13. " CNTA6_OVER_ERR ,Overflow for counter that is clocked by clock A" "No overflow,Overflow" eventfld.word 0x00 12. " MON6_ERR ,CLK6 was not within the acceptable range" "No interrupt,Interrupt" textline " " eventfld.word 0x00 11. " CNTA5_OVER_ERR ,Overflow for counter that is clocked by clock A" "No overflow,Overflow" eventfld.word 0x00 10. " MON5_ERR ,CLK5 was not within the acceptable range" "No interrupt,Interrupt" eventfld.word 0x00 9. " CNTA4_OVER_ERR ,Overflow for counter that is clocked by clock A" "No overflow,Overflow" eventfld.word 0x00 8. " MON4_ERR ,CLK4 was not within the acceptable range" "No interrupt,Interrupt" textline " " eventfld.word 0x00 7. " CNTA3_OVER_ERR ,Overflow for counter that is clocked by clock A" "No overflow,Overflow" eventfld.word 0x00 6. " MON3_ERR ,CLK3 was not within the acceptable range" "No interrupt,Interrupt" eventfld.word 0x00 5. " CNTA2_OVER_ERR ,Overflow for counter that is clocked by clock A" "No overflow,Overflow" eventfld.word 0x00 4. " MON2_ERR ,CLK2 was not within the acceptable range" "No interrupt,Interrupt" textline " " eventfld.word 0x00 3. " CNTA1_OVER_ERR ,Overflow for counter that is clocked by clock A" "No overflow,Overflow" eventfld.word 0x00 2. " MON1_ERR ,CLK1 was not within the acceptable range" "No interrupt,Interrupt" eventfld.word 0x00 1. " CNTA0_OVER_ERR ,Overflow for counter that is clocked by clock A" "No overflow,Overflow" eventfld.word 0x00 0. " MON0_ERR ,CLK0 was not within the acceptable range" "No interrupt,Interrupt" group.word 0x144++0x01 line.word 0x00 "CLKMON_MASK,Interrupt Mask Register" setclrfld.word 0x00 15. 0x08 15. 0x04 15. " CNTA7_OVER_ERR ,Overflow for counter that is clocked by clock A" "Unmasked,Masked" setclrfld.word 0x00 14. 0x08 14. 0x04 14. " MON7_ERR ,CLK7 was not within the acceptable range" "Unmasked,Masked" setclrfld.word 0x00 13. 0x08 13. 0x04 13. " CNTA6_OVER_ERR ,Overflow for counter that is clocked by clock A" "Unmasked,Masked" setclrfld.word 0x00 12. 0x08 12. 0x04 12. " MON6_ERR ,CLK6 was not within the acceptable range" "Unmasked,Masked" textline " " setclrfld.word 0x00 11. 0x08 11. 0x04 11. " CNTA5_OVER_ERR ,Overflow for counter that is clocked by clock A" "Unmasked,Masked" setclrfld.word 0x00 10. 0x08 10. 0x04 10. " MON5_ERR ,CLK5 was not within the acceptable range" "Unmasked,Masked" setclrfld.word 0x00 9. 0x08 9. 0x04 9. " CNTA4_OVER_ERR ,Overflow for counter that is clocked by clock A" "Unmasked,Masked" setclrfld.word 0x00 8. 0x08 8. 0x04 8. " MON4_ERR ,CLK4 was not within the acceptable range" "Unmasked,Masked" textline " " setclrfld.word 0x00 7. 0x08 7. 0x04 7. " CNTA3_OVER_ERR ,Overflow for counter that is clocked by clock A" "Unmasked,Masked" setclrfld.word 0x00 6. 0x08 6. 0x04 6. " MON3_ERR ,CLK3 was not within the acceptable range" "Unmasked,Masked" setclrfld.word 0x00 5. 0x08 5. 0x04 5. " CNTA2_OVER_ERR ,Overflow for counter that is clocked by clock A" "Unmasked,Masked" setclrfld.word 0x00 4. 0x08 4. 0x04 4. " MON2_ERR ,CLK2 was not within the acceptable range" "Unmasked,Masked" textline " " setclrfld.word 0x00 3. 0x08 3. 0x04 3. " CNTA1_OVER_ERR ,Overflow for counter that is clocked by clock A" "Unmasked,Masked" setclrfld.word 0x00 2. 0x08 2. 0x04 2. " MON1_ERR ,CLK1 was not within the acceptable range" "Unmasked,Masked" setclrfld.word 0x00 1. 0x08 1. 0x04 1. " CNTA0_OVER_ERR ,Overflow for counter that is clocked by clock A" "Unmasked,Masked" setclrfld.word 0x00 0. 0x08 0. 0x04 0. " MON0_ERR ,CLK0 was not within the acceptable range" "Unmasked,Masked" wgroup.word 0x150++0x01 line.word 0x00 "CLKMON_TRIGGER,Interrupt Trigger Register" bitfld.word 0x00 15. " CNTA7_OVER_ERR ,Trigger for error on CLK monitor" "No effect,Trigger" bitfld.word 0x00 14. " MON7_ERR ,Trigger for error on CLK monitor" "No effect,Trigger" bitfld.word 0x00 13. " CNTA6_OVER_ERR ,Trigger for error on CLK monitor" "No effect,Trigger" bitfld.word 0x00 12. " MON6_ERR ,Trigger for error on CLK monitor" "No effect,Trigger" textline " " bitfld.word 0x00 11. " CNTA5_OVER_ERR ,Trigger for error on CLK monitor" "No effect,Trigger" bitfld.word 0x00 10. " MON5_ERR ,Trigger for error on CLK monitor" "No effect,Trigger" bitfld.word 0x00 9. " CNTA4_OVER_ERR ,Trigger for error on CLK monitor" "No effect,Trigger" bitfld.word 0x00 8. " MON4_ERR ,Trigger for error on CLK monitor" "No effect,Trigger" textline " " bitfld.word 0x00 7. " CNTA3_OVER_ERR ,Trigger for error on CLK monitor" "No effect,Trigger" bitfld.word 0x00 6. " MON3_ERR ,Trigger for error on CLK monitor" "No effect,Trigger" bitfld.word 0x00 5. " CNTA2_OVER_ERR ,Trigger for error on CLK monitor" "No effect,Trigger" bitfld.word 0x00 4. " MON2_ERR ,Trigger for error on CLK monitor" "No effect,Trigger" textline " " bitfld.word 0x00 3. " CNTA1_OVER_ERR ,Trigger for error on CLK monitor" "No effect,Trigger" bitfld.word 0x00 2. " MON1_ERR ,Trigger for error on CLK monitor" "No effect,Trigger" bitfld.word 0x00 1. " CNTA0_OVER_ERR ,Trigger for error on CLK monitor" "No effect,Trigger" bitfld.word 0x00 0. " MON0_ERR ,Trigger for error on CLK monitor" "No effect,Trigger" textline " " group.long 0x160++0x0F line.long 0x00 "CHKR0_CLKA_UPPER,Upper Comparison Register" line.long 0x04 "CHKR0_CLKA_LOWER,Lower Comparison Register" line.long 0x08 "CHKR0_CLKB_CNT,CLK B Counting Value" line.long 0x0C "CHKR0_CTRL,CLK B Counting Value" bitfld.long 0x0C 8. " START_SINGLE ,Start checking mechanism once" "No effect,Start" bitfld.long 0x0C 7. " START_CONTINUOUS ,Start checking mechanism and keep checking until bit is set back to zero" "Stop,Start" bitfld.long 0x0C 5. " CLKB_MUX_CTRL ,Clock B mux control" "PSS_REF_CLK,XOSC" bitfld.long 0x0C 1.--3. " CLKB_MUX_CTRL ,Clock A mux control" "CPU_R5_CLK,OCM_R5_CLK,LPD_SWITCH_CLK,LPD_LSBUS_CLK,PMU_CLK,CSU_PLL_CLK,IRO_CLK,PSS_REF_CLK" textline " " bitfld.long 0x0C 0. " ENABLE ,Enables the checker, but does not start it" "Disabled,Enabled" group.long 0x170++0x0F line.long 0x00 "CHKR1_CLKA_UPPER,Upper Comparison Register" line.long 0x04 "CHKR1_CLKA_LOWER,Lower Comparison Register" line.long 0x08 "CHKR1_CLKB_CNT,CLK B Counting Value" line.long 0x0C "CHKR1_CTRL,CLK B Counting Value" bitfld.long 0x0C 8. " START_SINGLE ,Start checking mechanism once" "No effect,Start" bitfld.long 0x0C 7. " START_CONTINUOUS ,Start checking mechanism and keep checking until bit is set back to zero" "Stop,Start" bitfld.long 0x0C 5. " CLKB_MUX_CTRL ,Clock B mux control" "PSS_REF_CLK,XOSC" bitfld.long 0x0C 1.--3. " CLKB_MUX_CTRL ,Clock A mux control" "CPU_R5_CLK,OCM_R5_CLK,LPD_SWITCH_CLK,LPD_LSBUS_CLK,PMU_CLK,CSU_PLL_CLK,IRO_CLK,PSS_REF_CLK" textline " " bitfld.long 0x0C 0. " ENABLE ,Enables the checker, but does not start it" "Disabled,Enabled" group.long 0x180++0x0F line.long 0x00 "CHKR2_CLKA_UPPER,Upper Comparison Register" line.long 0x04 "CHKR2_CLKA_LOWER,Lower Comparison Register" line.long 0x08 "CHKR2_CLKB_CNT,CLK B Counting Value" line.long 0x0C "CHKR2_CTRL,CLK B Counting Value" bitfld.long 0x0C 8. " START_SINGLE ,Start checking mechanism once" "No effect,Start" bitfld.long 0x0C 7. " START_CONTINUOUS ,Start checking mechanism and keep checking until bit is set back to zero" "Stop,Start" bitfld.long 0x0C 5. " CLKB_MUX_CTRL ,Clock B mux control" "PSS_REF_CLK,XOSC" bitfld.long 0x0C 1.--3. " CLKB_MUX_CTRL ,Clock A mux control" "CPU_R5_CLK,OCM_R5_CLK,LPD_SWITCH_CLK,LPD_LSBUS_CLK,PMU_CLK,CSU_PLL_CLK,IRO_CLK,PSS_REF_CLK" textline " " bitfld.long 0x0C 0. " ENABLE ,Enables the checker, but does not start it" "Disabled,Enabled" group.long 0x190++0x0F line.long 0x00 "CHKR3_CLKA_UPPER,Upper Comparison Register" line.long 0x04 "CHKR3_CLKA_LOWER,Lower Comparison Register" line.long 0x08 "CHKR3_CLKB_CNT,CLK B Counting Value" line.long 0x0C "CHKR3_CTRL,CLK B Counting Value" bitfld.long 0x0C 8. " START_SINGLE ,Start checking mechanism once" "No effect,Start" bitfld.long 0x0C 7. " START_CONTINUOUS ,Start checking mechanism and keep checking until bit is set back to zero" "Stop,Start" bitfld.long 0x0C 5. " CLKB_MUX_CTRL ,Clock B mux control" "PSS_REF_CLK,XOSC" bitfld.long 0x0C 1.--3. " CLKB_MUX_CTRL ,Clock A mux control" "CPU_R5_CLK,OCM_R5_CLK,LPD_SWITCH_CLK,LPD_LSBUS_CLK,PMU_CLK,CSU_PLL_CLK,IRO_CLK,PSS_REF_CLK" textline " " bitfld.long 0x0C 0. " ENABLE ,Enables the checker, but does not start it" "Disabled,Enabled" group.long 0x1A0++0x0F line.long 0x00 "CHKR4_CLKA_UPPER,Upper Comparison Register" line.long 0x04 "CHKR4_CLKA_LOWER,Lower Comparison Register" line.long 0x08 "CHKR4_CLKB_CNT,CLK B Counting Value" line.long 0x0C "CHKR4_CTRL,CLK B Counting Value" bitfld.long 0x0C 8. " START_SINGLE ,Start checking mechanism once" "No effect,Start" bitfld.long 0x0C 7. " START_CONTINUOUS ,Start checking mechanism and keep checking until bit is set back to zero" "Stop,Start" bitfld.long 0x0C 5. " CLKB_MUX_CTRL ,Clock B mux control" "PSS_REF_CLK,XOSC" bitfld.long 0x0C 1.--3. " CLKB_MUX_CTRL ,Clock A mux control" "CPU_R5_CLK,OCM_R5_CLK,LPD_SWITCH_CLK,LPD_LSBUS_CLK,PMU_CLK,CSU_PLL_CLK,IRO_CLK,PSS_REF_CLK" textline " " bitfld.long 0x0C 0. " ENABLE ,Enables the checker, but does not start it" "Disabled,Enabled" group.long 0x1B0++0x0F line.long 0x00 "CHKR5_CLKA_UPPER,Upper Comparison Register" line.long 0x04 "CHKR5_CLKA_LOWER,Lower Comparison Register" line.long 0x08 "CHKR5_CLKB_CNT,CLK B Counting Value" line.long 0x0C "CHKR5_CTRL,CLK B Counting Value" bitfld.long 0x0C 8. " START_SINGLE ,Start checking mechanism once" "No effect,Start" bitfld.long 0x0C 7. " START_CONTINUOUS ,Start checking mechanism and keep checking until bit is set back to zero" "Stop,Start" bitfld.long 0x0C 5. " CLKB_MUX_CTRL ,Clock B mux control" "PSS_REF_CLK,XOSC" bitfld.long 0x0C 1.--3. " CLKB_MUX_CTRL ,Clock A mux control" "CPU_R5_CLK,OCM_R5_CLK,LPD_SWITCH_CLK,LPD_LSBUS_CLK,PMU_CLK,CSU_PLL_CLK,IRO_CLK,PSS_REF_CLK" textline " " bitfld.long 0x0C 0. " ENABLE ,Enables the checker, but does not start it" "Disabled,Enabled" group.long 0x1C0++0x0F line.long 0x00 "CHKR6_CLKA_UPPER,Upper Comparison Register" line.long 0x04 "CHKR6_CLKA_LOWER,Lower Comparison Register" line.long 0x08 "CHKR6_CLKB_CNT,CLK B Counting Value" line.long 0x0C "CHKR6_CTRL,CLK B Counting Value" bitfld.long 0x0C 8. " START_SINGLE ,Start checking mechanism once" "No effect,Start" bitfld.long 0x0C 7. " START_CONTINUOUS ,Start checking mechanism and keep checking until bit is set back to zero" "Stop,Start" bitfld.long 0x0C 5. " CLKB_MUX_CTRL ,Clock B mux control" "PSS_REF_CLK,XOSC" bitfld.long 0x0C 1.--3. " CLKB_MUX_CTRL ,Clock A mux control" "CPU_R5_CLK,OCM_R5_CLK,LPD_SWITCH_CLK,LPD_LSBUS_CLK,PMU_CLK,CSU_PLL_CLK,IRO_CLK,PSS_REF_CLK" textline " " bitfld.long 0x0C 0. " ENABLE ,Enables the checker, but does not start it" "Disabled,Enabled" group.long 0x1D0++0x0F line.long 0x00 "CHKR7_CLKA_UPPER,Upper Comparison Register" line.long 0x04 "CHKR7_CLKA_LOWER,Lower Comparison Register" line.long 0x08 "CHKR7_CLKB_CNT,CLK B Counting Value" line.long 0x0C "CHKR7_CTRL,CLK B Counting Value" bitfld.long 0x0C 8. " START_SINGLE ,Start checking mechanism once" "No effect,Start" bitfld.long 0x0C 7. " START_CONTINUOUS ,Start checking mechanism and keep checking until bit is set back to zero" "Stop,Start" bitfld.long 0x0C 5. " CLKB_MUX_CTRL ,Clock B mux control" "PSS_REF_CLK,XOSC" bitfld.long 0x0C 1.--3. " CLKB_MUX_CTRL ,Clock A mux control" "CPU_R5_CLK,OCM_R5_CLK,LPD_SWITCH_CLK,LPD_LSBUS_CLK,PMU_CLK,CSU_PLL_CLK,IRO_CLK,PSS_REF_CLK" textline " " bitfld.long 0x0C 0. " ENABLE ,Enables the checker, but does not start it" "Disabled,Enabled" textline " " group.long 0x200++0x03 line.long 0x00 "BOOT_MODE_USER,Software Controlled Boot Mode Register" bitfld.long 0x00 12.--15. " ALT_BOOT_MODE ,Alternative boot_mode value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8. " USE_ALT ,Which value is in the boot_mode field" "POR value,Software value" rbitfld.long 0x00 0.--3. " BOOT_MODE ,The boot_mode values from the mode pins captured at pore" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.word 0x204++0x01 line.word 0x00 "BOOT_MODE_POR,Hardware Controlled Boot Mode Register" bitfld.word 0x00 8.--11. " BOOT_MODE2 ,Set 3 - captured value of boot mode pins after POR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 4.--7. " BOOT_MODE1 ,Set 2 - captured value of boot mode pins after POR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 0.--3. " BOOT_MODE0 ,Set 1 - captured value of boot mode pins after POR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.byte 0x218++0x00 line.byte 0x00 "RESET_CTRL,Reset Control Register" bitfld.byte 0x00 4. " SOFT_RESET ,Software reset" "No reset,Reset" bitfld.byte 0x00 0. " SRST_DIS ,SRST_B functionality disable" "No,Yes" group.byte 0x21C++0x00 line.byte 0x00 "BLOCKONLY_RST,Records The Reason For The Block Only Reset" eventfld.byte 0x00 0. " DEBUG_ONLY ,Only SOC debug will be reset" "No reset,Reset" group.word 0x220++0x01 line.word 0x00 "RESET_REASON,Records The Reason For The Reset" eventfld.word 0x00 6. " DEBUG_SYS ,DAP initiated system reset" "Not occurred,Occurred" eventfld.word 0x00 5. " SOFT ,Software initiated reset" "Not occurred,Occurred" eventfld.word 0x00 4. " SRST ,External pin SRST_B" "Not occurred,Occurred" textline " " eventfld.word 0x00 3. " PSONLY_RESET_REQ ,The PMU caused a PS only reset" "Not occurred,Occurred" eventfld.word 0x00 2. " PMU_SYS_RESET ,The PMU caused a system reset" "Not occurred,Occurred" eventfld.word 0x00 0. " EXTERNAL_POR ,The POR button was pressed outside of the system" "Not occurred,Occurred" group.word 0x230++0x01 line.word 0x00 "RST_LPD_IOU0,Software Controlled Reset For The Gems" bitfld.word 0x00 3. " GEM3_RESET ,GEM 3 reset" "No reset,Reset" bitfld.word 0x00 2. " GEM2_RESET ,GEM 2 reset" "No reset,Reset" textline " " bitfld.word 0x00 1. " GEM1_RESET ,GEM 1 reset" "No reset,Reset" bitfld.word 0x00 0. " GEM0_RESET ,GEM 0 reset" "No reset,Reset" group.long 0x238++0x03 line.long 0x00 "RST_LPD_IOU2,Software Control Register For The IOU Block" bitfld.long 0x00 20. " TIMESTAMP_RESET ,TIMESTAMP_RESET" "No reset,Reset" bitfld.long 0x00 19. " IOU_CC_RESET ,IOU_CC reset" "No reset,Reset" bitfld.long 0x00 18. " GPIO_RESET ,GPIO reset" "No reset,Reset" textline " " bitfld.long 0x00 17. " ADMA_RESET ,ADMA reset" "No reset,Reset" bitfld.long 0x00 16. " NAND_RESET ,NAND reset" "No reset,Reset" bitfld.long 0x00 15. " SWDT_RESET ,SWDT reset" "No reset,Reset" textline " " bitfld.long 0x00 14. " TTC3_RESET ,TTC3 reset" "No reset,Reset" bitfld.long 0x00 13. " TTC2_RESET ,TTC2 reset" "No reset,Reset" bitfld.long 0x00 12. " TTC1_RESET ,TTC1 reset" "No reset,Reset" textline " " bitfld.long 0x00 11. " TTC0_RESET ,TTC0 reset" "No reset,Reset" bitfld.long 0x00 10. " I2C1_RESET ,I2C1 reset" "No reset,Reset" bitfld.long 0x00 9. " I2C0_RESET ,I2C0 reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " CAN1_RESET ,CAN1 reset" "No reset,Reset" bitfld.long 0x00 7. " CAN0_RESET ,CAN0 reset" "No reset,Reset" bitfld.long 0x00 6. " SDIO1_RESET ,SDIO1 reset" "No reset,Reset" textline " " bitfld.long 0x00 5. " SDIO0_RESET ,SDIO0 reset" "No reset,Reset" bitfld.long 0x00 4. " SPI1_RESET ,SPI1 reset" "No reset,Reset" bitfld.long 0x00 3. " SPI0_RESET ,SPI0 reset" "No reset,Reset" textline " " bitfld.long 0x00 2. " UART1_RESET ,UART1 reset" "No reset,Reset" bitfld.long 0x00 1. " UART0_RESET ,UART0 reset" "No reset,Reset" bitfld.long 0x00 0. " QSPI_RESET ,QSPI reset" "No reset,Reset" group.long 0x23C++0x03 line.long 0x00 "RST_LPD_TOP,Software Control Register For The LPD Block" bitfld.long 0x00 23. " FPD_RESET ,Reset entire full power domain" "No reset,Reset" bitfld.long 0x00 20. " LPD_SWDT_RESET ,LPD SWDT" "No reset,Reset" bitfld.long 0x00 19. " AFI_FM6_RESET ,AFI FM 6" "No reset,Reset" textline " " bitfld.long 0x00 17. " SYSMON_RESET ,SYS monitor reset" "No reset,Reset" bitfld.long 0x00 16. " RTC_RESET ,Real time clock reset" "No reset,Reset" bitfld.long 0x00 15. " APM_RESET ,APM reset" "No reset,Reset" textline " " bitfld.long 0x00 14. " IPI_RESET ,IPI reset" "No reset,Reset" bitfld.long 0x00 11. " USB1_APB_RESET ,USB 1 reset for control registers" "No reset,Reset" bitfld.long 0x00 10. " USB0_APB_RESET ,USB 0 reset for control registers" "No reset,Reset" textline " " bitfld.long 0x00 9. " USB1_HIBERRESET ,USB 1 sleep circuit reset" "No reset,Reset" bitfld.long 0x00 8. " USB0_HIBERRESET ,USB 0 sleep circuit reset" "No reset,Reset" bitfld.long 0x00 7. " USB1_CORERESET ,USB 1 reset" "No reset,Reset" textline " " bitfld.long 0x00 6. " USB0_CORERESET ,USB 0 reset" "No reset,Reset" bitfld.long 0x00 4. " RPU_PGE_RESET ,Reset entire RPU power island" "No reset,Reset" bitfld.long 0x00 3. " OCM_RESET ,Reset ocm" "No reset,Reset" textline " " bitfld.long 0x00 2. " RPU_AMBA_RESET ,R5 misc reset" "No reset,Reset" bitfld.long 0x00 1. " RPU_R51_RESET ,Reset R5 CPU-1" "No reset,Reset" bitfld.long 0x00 0. " RPU_R50_RESET ,Reset R5 CPU-0" "No reset,Reset" group.word 0x240++0x01 line.word 0x00 "RST_LPD_DBG,Debug Register For Both The LPD And FPD" bitfld.word 0x00 15. " DBG_ACK ,ACK signal to the debug reset request from DAP" "Low,High" bitfld.word 0x00 5. " RPU_DBG1_RESET ,Debug reset for R5_1" "No reset,Reset" bitfld.word 0x00 4. " RPU_DBG0_RESET ,Debug reset for R5_0" "No reset,Reset" textline " " bitfld.word 0x00 1. " DBG_LPD_RESET ,Debug reset that is used within the LPG" "No reset,Reset" bitfld.word 0x00 0. " DBG_FPD_RESET ,Debug reset that goes to the FPG to reset part of the SOC debug logic" "No reset,Reset" textline " " group.word 0x270++0x01 line.word 0x00 "BANK3_CTRL0,Drive0 Control To DIO Bank 3" bitfld.word 0x00 9. " DRIVE0[9] ,Drive0" "Low,High" bitfld.word 0x00 8. " [8] ,Drive0" "Low,High" bitfld.word 0x00 7. " [7] ,Drive0" "Low,High" bitfld.word 0x00 6. " [6] ,Drive0" "Low,High" textline " " bitfld.word 0x00 5. " [5] ,Drive0" "Low,High" bitfld.word 0x00 4. " [4] ,Drive0" "Low,High" bitfld.word 0x00 3. " [3] ,Drive0" "Low,High" bitfld.word 0x00 2. " [2] ,Drive0" "Low,High" textline " " bitfld.word 0x00 1. " [1] ,Drive0" "Low,High" bitfld.word 0x00 0. " [0] ,Drive0" "Low,High" group.word 0x274++0x01 line.word 0x00 "BANK3_CTRL1,Drive1 Control To DIO Bank 3" bitfld.word 0x00 9. " DRIVE1[9] ,Drive1" "Low,High" bitfld.word 0x00 8. " [8] ,Drive1" "Low,High" bitfld.word 0x00 7. " [7] ,Drive1" "Low,High" bitfld.word 0x00 6. " [6] ,Drive1" "Low,High" textline " " bitfld.word 0x00 5. " [5] ,Drive1" "Low,High" bitfld.word 0x00 4. " [4] ,Drive1" "Low,High" bitfld.word 0x00 3. " [3] ,Drive1" "Low,High" bitfld.word 0x00 2. " [2] ,Drive1" "Low,High" textline " " bitfld.word 0x00 1. " [1] ,Drive1" "Low,High" bitfld.word 0x00 0. " [0] ,Drive1" "Low,High" group.word 0x278++0x01 line.word 0x00 "BANK3_CTRL2,Schmitt Or CMOS Input Select For DIO Bank 3" bitfld.word 0x00 9. " SCHMITT_CMOS[9] ,Input select for DIO bank 3" "CMOS,Schmitt" bitfld.word 0x00 8. " [8] ,Input select for DIO bank 3" "CMOS,Schmitt" bitfld.word 0x00 7. " [7] ,Input select for DIO bank 3" "CMOS,Schmitt" bitfld.word 0x00 6. " [6] ,Input select for DIO bank 3" "CMOS,Schmitt" textline " " bitfld.word 0x00 5. " [5] ,Input select for DIO bank 3" "CMOS,Schmitt" bitfld.word 0x00 4. " [4] ,Input select for DIO bank 3" "CMOS,Schmitt" bitfld.word 0x00 3. " [3] ,Input select for DIO bank 3" "CMOS,Schmitt" bitfld.word 0x00 2. " [2] ,Input select for DIO bank 3" "CMOS,Schmitt" textline " " bitfld.word 0x00 1. " [1] ,Input select for DIO bank 3" "CMOS,Schmitt" bitfld.word 0x00 0. " [0] ,Input select for DIO bank 3" "CMOS,Schmitt" group.word 0x27C++0x01 line.word 0x00 "BANK3_CTRL3,Pull Up Or Pull Down Select For DIO Bank 3" bitfld.word 0x00 9. " PULL_HIGH_LOW[9] ,Pull up or down select for DIO bank 3" "Pull down,Pull up" bitfld.word 0x00 8. " [8] ,Pull up or down select for DIO bank 3" "Pull down,Pull up" bitfld.word 0x00 7. " [7] ,Pull up or down select for DIO bank 3" "Pull down,Pull up" bitfld.word 0x00 6. " [6] ,Pull up or down select for DIO bank 3" "Pull down,Pull up" textline " " bitfld.word 0x00 5. " [5] ,Pull up or down select for DIO bank 3" "Pull down,Pull up" bitfld.word 0x00 4. " [4] ,Pull up or down select for DIO bank 3" "Pull down,Pull up" bitfld.word 0x00 3. " [3] ,Pull up or down select for DIO bank 3" "Pull down,Pull up" bitfld.word 0x00 2. " [2] ,Pull up or down select for DIO bank 3" "Pull down,Pull up" textline " " bitfld.word 0x00 1. " [1] ,Pull up or down select for DIO bank 3" "Pull down,Pull up" bitfld.word 0x00 0. " [0] ,Pull up or down select for DIO bank 3" "Pull down,Pull up" group.word 0x280++0x01 line.word 0x00 "BANK3_CTRL4,Pull Up Or Pull Down Selection Enable For DIO Bank 3" bitfld.word 0x00 9. " PULL_ENABLE[9] ,Enable pull-ups" "Disabled,Enabled" bitfld.word 0x00 8. " [8] ,Enable pull-ups" "Disabled,Enabled" bitfld.word 0x00 7. " [7] ,Enable pull-ups" "Disabled,Enabled" bitfld.word 0x00 6. " [6] ,Enable pull-ups" "Disabled,Enabled" textline " " bitfld.word 0x00 5. " [5] ,Enable pull-ups" "Disabled,Enabled" bitfld.word 0x00 4. " [4] ,Enable pull-ups" "Disabled,Enabled" bitfld.word 0x00 3. " [3] ,Enable pull-ups" "Disabled,Enabled" bitfld.word 0x00 2. " [2] ,Enable pull-ups" "Disabled,Enabled" textline " " bitfld.word 0x00 1. " [1] ,Enable pull-ups" "Disabled,Enabled" bitfld.word 0x00 0. " [0] ,Enable pull-ups" "Disabled,Enabled" group.word 0x284++0x01 line.word 0x00 "BANK3_CTRL5,Slew Rate Control To DIO Bank 3" bitfld.word 0x00 9. " SLOW_FAST_SLEW[9] ,Slew rate control to DIO bank 3" "Fast,Slow" bitfld.word 0x00 8. " [8] ,Slew rate control to DIO bank 3" "Fast,Slow" bitfld.word 0x00 7. " [7] ,Slew rate control to DIO bank 3" "Fast,Slow" bitfld.word 0x00 6. " [6] ,Slew rate control to DIO bank 3" "Fast,Slow" textline " " bitfld.word 0x00 5. " [5] ,Slew rate control to DIO bank 3" "Fast,Slow" bitfld.word 0x00 4. " [4] ,Slew rate control to DIO bank 3" "Fast,Slow" bitfld.word 0x00 3. " [3] ,Slew rate control to DIO bank 3" "Fast,Slow" bitfld.word 0x00 2. " [2] ,Slew rate control to DIO bank 3" "Fast,Slow" textline " " bitfld.word 0x00 1. " [1] ,Slew rate control to DIO bank 3" "Fast,Slow" bitfld.word 0x00 0. " [0] ,Slew rate control to DIO bank 3" "Fast,Slow" group.word 0x288++0x01 line.word 0x00 "BANK3_STATUS,Voltage Mode Status For DIO Bank 3" bitfld.word 0x00 0. " VMODE_1P8_3P3 ,Voltage mode status" "2.5/3.3v,1.8v" width 0x0B tree.end tree "CSU (Configuration Security Unit)" tree "CSU" base ad:0xFFCA0000 width 19. rgroup.long 0x00++0x03 line.long 0x00 "CSU_STATUS,CSU Status Register" bitfld.long 0x00 1. " BOOT_ENC ,Indicates that the FSBL was encrypted" "Not encrypted,Encrypted" bitfld.long 0x00 0. " BOOT_AUTH ,Indicates that the FSBL was authenticated" "Not authenticated,Authenticated" group.long 0x04++0x0F line.long 0x00 "CSU_CTRL,CSU Control Register" bitfld.long 0x00 4. " SLVERR_ENABLE ,Enable/disable SLVERR during address decode failure" "Disabled,Enabled" bitfld.long 0x00 0. " CSU_CLK_SEL ,Clock source for the CSU clock" "SYSOSC,PLL/PSTP" line.long 0x04 "CSU_SSS_CFG,CSU Secure Stream Switch Configuration" bitfld.long 0x04 12.--15. " SHA_SSS ,SHA data source" "CSU ROM,None,None,None,None,DMA,None,None,None,None,None,None,None,None,None,None" bitfld.long 0x04 8.--11. " AES_SSS ,AES data source" "None,None,None,None,None,DMA,None,None,None,None,None,None,None,None,None,None" bitfld.long 0x04 4.--7. " DMA_SSS ,DMA data source" "None,None,None,PCAP,None,DMA,None,None,None,None,AES,None,PSTP,None,None,None" bitfld.long 0x04 0.--3. " PCAP_SSS ,PCAP data source" "None,None,None,None,None,DMA,None,None,None,None,AES,None,PSTP,None,None,None" line.long 0x08 "CSU_CTRL,CSU Control Register" bitfld.long 0x08 0. " RESET ,Asserts reset to the CSU DMA" "No reset,Reset" line.long 0x0C "CSU_MULTI_BOOT,Multi-boot Address Register" wgroup.long 0x14++0x03 line.long 0x00 "CSU_TAMPER_TRIG,CSU Secure Lockdown Register" bitfld.long 0x00 0. " TAMPER ,Trigger the CSU secure processor to execute the associated tamper response" "No effect,Trigger" rgroup.long 0x18++0x03 line.long 0x00 "CSU_FT_STATUS,CSU Secure Processor Fault Tolerant Status Register" bitfld.long 0x00 31. " R_UE ,Uncorrectable error from RAM ECC" "No error,Error" bitfld.long 0x00 30. " R_VOTER_ERROR ,Self-checking voter error" "No error,Error" bitfld.long 0x00 29. " R_COMP_ERR_23 ,Self-checking error for comparator between processor #2 and #3" "No error,Error" bitfld.long 0x00 28. " R_COMP_ERR_13 ,Self-checking error for comparator between processor #1 and #3" "No error,Error" textline " " bitfld.long 0x00 27. " R_COMP_ERR_12 ,Self-checking error for comparator between processor #1 and #2" "No error,Error" bitfld.long 0x00 26. " R_MISMATCH_23_A ,Lockstep mismatch between processor #2 and #3" "No error,Error" bitfld.long 0x00 25. " R_MISMATCH_13_A ,Lockstep mismatch between processor #1 and #3" "No error,Error" bitfld.long 0x00 24. " R_MISMATCH_12_A ,Lockstep mismatch between processor #1 and #2" "No error,Error" textline " " bitfld.long 0x00 23. " R_FT_ST_MISMATCH ,The two FT state machines have different states" "No error,Error" bitfld.long 0x00 22. " R_CPU_ID_MISMATCH ,The two FT state machines have different failing CPUs" "No error,Error" bitfld.long 0x00 19. " R_SLEEP_RESET ,Reset was commanded by SW in secure processor through SLEEP instruction" "No error,Error" bitfld.long 0x00 18. " R_MISMATCH_23_B ,Lockstep mismatch between processor #2 and #3" "No error,Error" textline " " bitfld.long 0x00 17. " R_MISMATCH_13_B ,Lockstep mismatch between processor #1 and #3" "No error,Error" bitfld.long 0x00 16. " R_MISMATCH_12_B ,Lockstep mismatch between processor #1 and #2" "No error,Error" bitfld.long 0x00 15. " N_UE ,Uncorrectable error from RAM ECC" "No error,Error" bitfld.long 0x00 14. " N_VOTER_ERROR ,Self-checking voter error" "No error,Error" textline " " bitfld.long 0x00 13. " N_COMP_ERR_23 ,Self-checking error for comparator between processor #2 and #3" "No error,Error" bitfld.long 0x00 12. " N_COMP_ERR_13 ,Self-checking error for comparator between processor #1 and #3" "No error,Error" bitfld.long 0x00 11. " N_COMP_ERR_12 ,Self-checking error for comparator between processor #1 and #2" "No error,Error" bitfld.long 0x00 10. " N_MISMATCH_23_A ,Lockstep mismatch between processor #2 and #3" "No error,Error" textline " " bitfld.long 0x00 9. " N_MISMATCH_13_A ,Lockstep mismatch between processor #1 and #3" "No error,Error" bitfld.long 0x00 8. " N_MISMATCH_12_A ,Lockstep mismatch between processor #1 and #2" "No error,Error" bitfld.long 0x00 7. " N_FT_ST_MISMATCH ,The two FT state machines have different states" "No error,Error" bitfld.long 0x00 6. " N_CPU_ID_MISMATCH ,The two FT state machines have different failing CPUs" "No error,Error" textline " " bitfld.long 0x00 3. " N_SLEEP_RESET ,Reset was commanded by SW in secure processor through SLEEP instruction" "No error,Error" bitfld.long 0x00 2. " N_MISMATCH_23_B ,Lockstep mismatch between processor #2 and #3" "No error,Error" bitfld.long 0x00 1. " N_MISMATCH_13_B ,Lockstep mismatch between processor #1 and #3" "No error,Error" bitfld.long 0x00 0. " N_MISMATCH_12_B ,Lockstep mismatch between processor #1 and #2" "No error,Error" group.long 0x20++0x03 line.long 0x00 "CSU_FT_STATUS,CSU Interrupt Status Register" eventfld.long 0x00 15. " CSU_PL_ISO ,Indicates that the CSU has enabled the isolation for the PS / PL" "No interrupt,Interrupt" eventfld.long 0x00 14. " CSU_RAM_ECC_ERROR ,Uncorrectable ECC error encountered on CSU RAM" "No interrupt,Interrupt" eventfld.long 0x00 13. " TAMPER ,Tamper response interrupt" "No interrupt,Interrupt" eventfld.long 0x00 11. " APB_SLVERR ,APB slave error" "No interrupt,Interrupt" textline " " eventfld.long 0x00 10. " TMR_FATAL ,CSU SPB has encountered a fatal error in the triple-redundant implementation and will reset" "No interrupt,Interrupt" eventfld.long 0x00 9. " PL_SEU_ERROR ,PL SEU error" "No interrupt,Interrupt" eventfld.long 0x00 8. " AES_ERROR ,AES decryption error" "No interrupt,Interrupt" eventfld.long 0x00 7. " PCAP_WR_OVERFLOW ,PCAP write FIFO overflow" "No interrupt,Interrupt" textline " " eventfld.long 0x00 6. " PCAP_RD_OVERFLOW ,PCAP read FIFO overflow" "No interrupt,Interrupt" eventfld.long 0x00 5. " PL_POR_B ,Indicates the PL is powered up" "No interrupt,Interrupt" eventfld.long 0x00 4. " PL_INIT ,PL initialization complete" "No interrupt,Interrupt" eventfld.long 0x00 3. " PL_DONE ,PL done" "No interrupt,Interrupt" textline " " eventfld.long 0x00 2. " SHA_DONE ,SHA done" "No interrupt,Interrupt" eventfld.long 0x00 1. " RSA_DONE ,RSA done" "No interrupt,Interrupt" eventfld.long 0x00 0. " AES_DONE ,AES done" "No interrupt,Interrupt" group.long 0x24++0x03 line.long 0x00 "CSU_IMR_SET/CLR,CSU Interrupt Mask Register" setclrfld.long 0x00 15. 0x08 15. 0x04 15. " CSU_PL_ISO ,CSU PL isolation interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 14. 0x08 14. 0x04 14. " CSU_RAM_ECC_ERROR ,CSU RAM ECC interrupt error mask" "Unmasked,Masked" setclrfld.long 0x00 13. 0x08 13. 0x04 13. " TAMPER ,Tamper interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 11. 0x08 11. 0x04 11. " APB_SLVERR ,APB slave error interrupt mask" "Unmasked,Masked" textline " " setclrfld.long 0x00 10. 0x08 10. 0x04 10. " TMR_FATAL ,Tmr_fatal interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 9. 0x08 9. 0x04 9. " PL_SEU_ERROR ,Pl_seu_error interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 8. 0x08 8. 0x04 8. " AES_ERROR ,Aes_error interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 7. 0x08 7. 0x04 7. " PCAP_WR_OVERFLOW ,Pcap_wr_overflow interrupt mask" "Unmasked,Masked" textline " " setclrfld.long 0x00 6. 0x08 6. 0x04 6. " PCAP_RD_OVERFLOW ,Pcap_rd_overflow interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 5. 0x08 5. 0x04 5. " PL_POR_B ,Pl_por_b interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 4. 0x08 4. 0x04 4. " PL_INIT ,Pl_init interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 3. 0x08 3. 0x04 3. " PL_DONE ,Pl_done interrupt mask" "Unmasked,Masked" textline " " setclrfld.long 0x00 2. 0x08 2. 0x04 2. " SHA_DONE ,SHA done interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 1. 0x08 1. 0x04 1. " RSA_DONE ,RSA done interrupt mask" "Unmasked,Masked" setclrfld.long 0x00 0. 0x08 0. 0x04 0. " AES_DONE ,AES done interrupt mask" "Unmasked,Masked" textline " " hgroup.long 0x30++0x03 hide.long 0x00 "JTAG_CHAIN_CFG,JTAG Chain Configuration Register" rgroup.long 0x34++0x03 line.long 0x00 "JTAG_CHAIN_STATUS,JTAG Chain Configuration Status Register" bitfld.long 0x00 1. " ARM_DAP ,ARM DAP is included in the JTAG chain" "Not included,Included" bitfld.long 0x00 0. " PL_TAP ,PL TAP is included in the JTAG chain" "Not included,Included" group.long 0x38++0x07 line.long 0x00 "JTAG_SEC,JTAG Security Register" bitfld.long 0x00 6.--8. " PMU_SEC ,PMU MDM security gate disable" "No,No,No,No,No,No,No,Yes" bitfld.long 0x00 3.--5. " PLTAP_SEC ,PLTAP security gate disable" "No,No,No,No,No,No,No,Yes" bitfld.long 0x00 0.--2. " DAP_SEC ,JTAG security gate disable" "No,No,No,No,No,No,No,Yes" line.long 0x04 "JTAG_DAP_CFG,DAP Configuration Register" bitfld.long 0x04 5. " RPU_NIDEN ,RPU non-invasive debug enable" "Disabled,Enabled" bitfld.long 0x04 4. " RPU_DBGEN ,RPU invasive debug enable" "Disabled,Enabled" bitfld.long 0x04 3. " APU_SPNIDEN ,APU secure non-invasive debug enable" "Disabled,Enabled" bitfld.long 0x04 2. " APU_SPIDEN ,APU secure invasive debug enable" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " APU_NIDEN ,APU non-invasive debug enable" "Disabled,Enabled" bitfld.long 0x04 0. " APU_DBGEN ,APU invasive debug enable" "Disabled,Enabled" rgroup.long 0x40++0x07 line.long 0x00 "IDCODE,Device IDCODE Register" bitfld.long 0x00 28.--31. " REVISION ,Revision code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x00 21.--27. 1. " FAMILY ,Family code" bitfld.long 0x00 17.--20. " SUBFAMILY ,Sub-Family code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--16. " DEVICE ,Device code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " hexmask.long.word 0x00 1.--11. 1. " MANUFACTURER ,Xilinx manufacturer ID" line.long 0x04 "VERSION,PS Version Register" bitfld.long 0x04 0.--3. " PS_VERSION ,PS version" "XCZU9EG ES1,XCZU15EG/XCZU3EG ES1,XCZU9EG ES2,?..." rgroup.long 0x50++0x03 line.long 0x00 "CSU_ROM_DIGEST_0,CSU ROM SHA-3 Digest 0 Register" rgroup.long 0x54++0x03 line.long 0x00 "CSU_ROM_DIGEST_1,CSU ROM SHA-3 Digest 1 Register" rgroup.long 0x58++0x03 line.long 0x00 "CSU_ROM_DIGEST_2,CSU ROM SHA-3 Digest 2 Register" rgroup.long 0x5C++0x03 line.long 0x00 "CSU_ROM_DIGEST_3,CSU ROM SHA-3 Digest 3 Register" rgroup.long 0x60++0x03 line.long 0x00 "CSU_ROM_DIGEST_4,CSU ROM SHA-3 Digest 4 Register" rgroup.long 0x64++0x03 line.long 0x00 "CSU_ROM_DIGEST_5,CSU ROM SHA-3 Digest 5 Register" rgroup.long 0x68++0x03 line.long 0x00 "CSU_ROM_DIGEST_6,CSU ROM SHA-3 Digest 6 Register" rgroup.long 0x6C++0x03 line.long 0x00 "CSU_ROM_DIGEST_7,CSU ROM SHA-3 Digest 7 Register" rgroup.long 0x70++0x03 line.long 0x00 "CSU_ROM_DIGEST_8,CSU ROM SHA-3 Digest 8 Register" rgroup.long 0x74++0x03 line.long 0x00 "CSU_ROM_DIGEST_9,CSU ROM SHA-3 Digest 9 Register" rgroup.long 0x78++0x03 line.long 0x00 "CSU_ROM_DIGEST_10,CSU ROM SHA-3 Digest 10 Register" rgroup.long 0x7C++0x03 line.long 0x00 "CSU_ROM_DIGEST_11,CSU ROM SHA-3 Digest 11 Register" rgroup.long 0x1000++0x03 line.long 0x00 "AES_STATUS,AES Status Register" bitfld.long 0x00 11. " OKR_ZEROED ,Indicates that the OPERATIONAL key has been zeroed" "Not zeroed,Zeroed" bitfld.long 0x00 10. " BOOT_ZEROED ,Indicates that the BOOT key has been zeroed" "Not zeroed,Zeroed" bitfld.long 0x00 9. " KUP_ZEROED ,Indicates that the KUP key has been zeroed" "Not zeroed,Zeroed" bitfld.long 0x00 8. " AES_KEY_ZEROED ,Indicates that the AES key has been zeroed" "Not zeroed,Zeroed" textline " " bitfld.long 0x00 4. " KEY_INIT_DONE ,Indicates that the key has been initialized in the AES" "Not initialized,Initialized" bitfld.long 0x00 3. " GCM_TAG_PASS ,Indicates the GCM tag passed" "Not passed,Passed" bitfld.long 0x00 2. " DONE ,Indicates the AES is done with the current operation" "Not done,Done" bitfld.long 0x00 1. " READY ,Indicates the AES is ready to receive data" "Not ready,Ready" textline " " bitfld.long 0x00 0. " BUSY ,Indicates the AES is busy, key loading and start message is ignored" "Not busy,Busy" group.long 0x1004++0x13 line.long 0x00 "AES_KEY_SRC,AES Key Source Register" bitfld.long 0x00 0.--3. " KEY_SRC ,AES key source selection" "KUP,Device key,?..." line.long 0x04 "AES_KEY_LOAD,AES Key Load Register" bitfld.long 0x04 0. " KEY_LOAD ,Load the key selected by AES_KEY_SRC into the AES" "No effect,Loaded" line.long 0x08 "AES_START_MSG,AES Start Message Register" bitfld.long 0x08 0. " START_MSG ,Starts the decryption process" "No effect,Start" line.long 0x0C "AES_RESET,AES Reset Register" bitfld.long 0x0C 0. " RESET ,Setting this bit resets the AES" "No reset,Reset" line.long 0x10 "AES_KEY_CLEAR,AES Key Clear Register" bitfld.long 0x10 1. " AES_KUP_ZERO ,Setting this bit zeroes the KUP register" "No effect,Clear" bitfld.long 0x10 0. " AES_KEY_ZERO ,Setting this bit zeroes the expanded key from the AES" "No effect,Clear" group.long 0x101C++0x03 line.long 0x00 "AES_KUP_WR,AES KUP Write Control Register" bitfld.long 0x00 1. " IV_WRITE ,Write the IV register with the output of the AES" "Not written,Written" bitfld.long 0x00 0. " KUP_WRITE ,Write the output of the AES into the KUP" "Not written,Written" wgroup.long 0x1020++0x03 line.long 0x00 "AES_KUP_0,AES Key Update 0 Register" wgroup.long 0x1024++0x03 line.long 0x00 "AES_KUP_1,AES Key Update 1 Register" wgroup.long 0x1028++0x03 line.long 0x00 "AES_KUP_2,AES Key Update 2 Register" wgroup.long 0x102C++0x03 line.long 0x00 "AES_KUP_3,AES Key Update 3 Register" wgroup.long 0x1030++0x03 line.long 0x00 "AES_KUP_4,AES Key Update 4 Register" wgroup.long 0x1034++0x03 line.long 0x00 "AES_KUP_5,AES Key Update 5 Register" wgroup.long 0x1038++0x03 line.long 0x00 "AES_KUP_6,AES Key Update 6 Register" wgroup.long 0x103C++0x03 line.long 0x00 "AES_KUP_7,AES Key Update 7 Register" rgroup.long 0x1040++0x03 line.long 0x00 "AES_IV_0,AES IV 0 Register" rgroup.long 0x1044++0x03 line.long 0x00 "AES_IV_1,AES IV 0 Register" rgroup.long 0x1048++0x03 line.long 0x00 "AES_IV_2,AES IV 0 Register" rgroup.long 0x104C++0x03 line.long 0x00 "AES_IV_3,AES IV 3 Register" wgroup.long 0x2000++0x03 line.long 0x00 "SHA_START,SHA Start Message Register" bitfld.long 0x00 0. " START_MSG ,Start a new SHA-3 calculation" "Not started,Started" group.long 0x2004++0x03 line.long 0x00 "SHA_RESET,SHA Reset Register" bitfld.long 0x00 0. " RESET ,Reset the SHA-3/384" "No reset,Reset" rgroup.long 0x2008++0x03 line.long 0x00 "SHA_RESET,SHA Reset Register" bitfld.long 0x00 0. " SHA_DONE ,SHA done, digest is valid" "Not done,Done" rgroup.long 0x2010++0x03 line.long 0x00 "SHA_DIGEST_0,SHA Digest 0 Register" rgroup.long 0x2014++0x03 line.long 0x00 "SHA_DIGEST_1,SHA Digest 1 Register" rgroup.long 0x2018++0x03 line.long 0x00 "SHA_DIGEST_2,SHA Digest 2 Register" rgroup.long 0x201C++0x03 line.long 0x00 "SHA_DIGEST_3,SHA Digest 3 Register" rgroup.long 0x2020++0x03 line.long 0x00 "SHA_DIGEST_4,SHA Digest 4 Register" rgroup.long 0x2024++0x03 line.long 0x00 "SHA_DIGEST_5,SHA Digest 5 Register" rgroup.long 0x2028++0x03 line.long 0x00 "SHA_DIGEST_6,SHA Digest 6 Register" rgroup.long 0x202C++0x03 line.long 0x00 "SHA_DIGEST_7,SHA Digest 7 Register" rgroup.long 0x2030++0x03 line.long 0x00 "SHA_DIGEST_8,SHA Digest 8 Register" rgroup.long 0x2034++0x03 line.long 0x00 "SHA_DIGEST_9,SHA Digest 9 Register" rgroup.long 0x2038++0x03 line.long 0x00 "SHA_DIGEST_10,SHA Digest 10 Register" rgroup.long 0x203C++0x03 line.long 0x00 "SHA_DIGEST_11,SHA Digest 11 Register" textline " " group.long 0x3000++0x0F line.long 0x00 "PCAP_PROG,PCAP PROG Register" bitfld.long 0x00 0. " PCFG_PROG_B ,PROG control to the PL" "Reset,No reset" line.long 0x04 "PCAP_RDWR,PCAP Read Write Control Register" bitfld.long 0x04 0. " PCAP_RDWR_B ,Read/write direction control of the PCAP" "Write,Read" line.long 0x08 "PCAP_CTRL,PCAP Control Register" bitfld.long 0x08 3. " PCFG_GSR ,PL global set reset" "No reset,Reset" bitfld.long 0x08 2. " PCFG_GTS ,PL global tri-state enable" "Disabled,Enabled" bitfld.long 0x08 1. " PCFG_POR_CNT_4K ,Reduce the internal PL POR counter and shorten the POR time of the PL" "Not reduced,Reduced" bitfld.long 0x08 0. " PCAP_PR ,Controls the method for PL partial reconfiguraiton" "ICAP/MCAP,PCAP" line.long 0x0C "PCAP_RESET,PCAP Reset Register" bitfld.long 0x0C 0. " RESET ,Reset for the PCAP, including the RD/WR FIFO" "No reset,Reset" rgroup.long 0x3010++0x03 line.long 0x00 "PCAP_STATUS,PCAP Status Register" bitfld.long 0x00 13. " PCFG_GWE ,PL global write enable" "Disabled,Enabled" bitfld.long 0x00 12. " PCFG_MCAP_MODE ,Indicates that the MCAP is active on the PL CFG" "Not active,Active" bitfld.long 0x00 11. " PL_GTS_USR_B ,Indicates that the PL IO are globally tri-stated under user control" "False,True" bitfld.long 0x00 10. " PL_GTS_CFG_B ,Indicates that the PL IO are globally tri-stated under cfg control" "False,True" textline " " bitfld.long 0x00 9. " PL_GPWRDWN_B ,Indicates that the PL is in a power down state" "False,True" bitfld.long 0x00 8. " PL_GHIGH_B ,Indicates that the PL interconnect is being held high" "False,True" bitfld.long 0x00 7. " PL_FST_CFG ,Indicates that the PL has completed its first configuration" "Not completed,Completed" bitfld.long 0x00 6. " PL_CFG_RESET_B ,Indicates that the PL is under reset" "No reset,Reset" textline " " bitfld.long 0x00 5. " PL_SEU_ERROR ,Indicates that the PL has encouted and SEU error" "No error,Error" bitfld.long 0x00 4. " PL_EOS ,Indicates that the PL has reached the end of startup" "Not reached,Reached" bitfld.long 0x00 3. " PL_DONE ,Indicates that the PL configuration is done" "Not done,Done" bitfld.long 0x00 2. " PL_INIT ,Indicates that the PL has completed its init sequence" "Not completed,Completed" textline " " bitfld.long 0x00 1. " PCAP_RD_IDLE ,Indicates that all reads from the PL have completed" "Not completed,Completed" bitfld.long 0x00 0. " PCAP_WR_IDLE ,Indicates that all writes to the PL have completed" "Not completed,Completed" group.long 0x5000++0x03 line.long 0x00 "TAMPER_STATUS,Tamper Response Status Register" eventfld.long 0x00 12. " TAMPER_12 ,AMS voltaage alarm for GT" "Not occurred,Occurred" eventfld.long 0x00 11. " TAMPER_11 ,AMS voltage alarm for PSIO bank 3 dedicated pins" "Not occurred,Occurred" eventfld.long 0x00 10. " TAMPER_10 ,AMS voltage alarm for PSIO bank 0/1/2" "Not occurred,Occurred" eventfld.long 0x00 9. " TAMPER_9 ,AMS voltage alarm for DDRPHY" "Not occurred,Occurred" textline " " eventfld.long 0x00 8. " TAMPER_8 ,AMS voltage alarm for VCCPAUX" "Not occurred,Occurred" eventfld.long 0x00 7. " TAMPER_7 ,AMS voltage alarm for VCCPINT_LPD" "Not occurred,Occurred" eventfld.long 0x00 6. " TAMPER_6 ,AMS voltage alarm for VCCPINT_FPD" "Not occurred,Occurred" eventfld.long 0x00 5. " TAMPER_5 ,AMS over temperature alarm for APU" "Not occurred,Occurred" textline " " eventfld.long 0x00 4. " TAMPER_4 ,AMS over temperature alarm for LPD" "Not occurred,Occurred" eventfld.long 0x00 3. " TAMPER_3 ,PL SEU error" "No error,Error" eventfld.long 0x00 2. " TAMPER_2 ,JTAG toggle detect" "Not detected,Detected" eventfld.long 0x00 1. " TAMPER_1 ,External MIO" "False,True" textline " " eventfld.long 0x00 0. " TAMPER_0 ,CSU register" "False,True" textline " " rgroup.long 0x5004++0x03 line.long 0x00 "CSU_TAMPER_0,CSU Tamper Response 0 Register" bitfld.long 0x00 5. " BBRAM_ERASE ,Zeroize Non-volatile BBRAM key in addtion to the tamper resposne specified" "No effect,Clear" bitfld.long 0x00 3. " SEC_LOCKDOWN_1 ,Causes the CSU ROM to issue a secure lockdown and all GPIOB to be tri-stated when the tamper event occurs" "Disabled,Enabled" bitfld.long 0x00 2. " SEC_LOCKDOWN_0 ,Causes the CSU ROM to issue a secure lockdown when the tamper event occurs" "Disabled,Enabled" bitfld.long 0x00 1. " SYS_RESET ,Causes the CSU ROM to issue a system reset when the tamper event occurs" "Disabled,Enabled" bitfld.long 0x00 0. " SYS_INTERRUPT ,Causes the CSU ROM to issue a system interrupt when the tamper event occurs" "Disabled,Enabled" rgroup.long 0x5008++0x03 line.long 0x00 "CSU_TAMPER_1,CSU Tamper Response 1 Register" bitfld.long 0x00 4. " BBRAM_ERASE ,Zeroize Non-volatile BBRAM key in addtion to the tamper resposne specified" "No effect,Clear" bitfld.long 0x00 3. " SEC_LOCKDOWN_1 ,Causes the CSU ROM to issue a secure lockdown and all GPIOB to be tri-stated when the tamper event occurs" "Disabled,Enabled" bitfld.long 0x00 2. " SEC_LOCKDOWN_0 ,Causes the CSU ROM to issue a secure lockdown when the tamper event occurs" "Disabled,Enabled" bitfld.long 0x00 1. " SYS_RESET ,Causes the CSU ROM to issue a system reset when the tamper event occurs" "Disabled,Enabled" bitfld.long 0x00 0. " SYS_INTERRUPT ,Causes the CSU ROM to issue a system interrupt when the tamper event occurs" "Disabled,Enabled" rgroup.long 0x500C++0x03 line.long 0x00 "CSU_TAMPER_2,CSU Tamper Response 2 Register" bitfld.long 0x00 4. " BBRAM_ERASE ,Zeroize Non-volatile BBRAM key in addtion to the tamper resposne specified" "No effect,Clear" bitfld.long 0x00 3. " SEC_LOCKDOWN_1 ,Causes the CSU ROM to issue a secure lockdown and all GPIOB to be tri-stated when the tamper event occurs" "Disabled,Enabled" bitfld.long 0x00 2. " SEC_LOCKDOWN_0 ,Causes the CSU ROM to issue a secure lockdown when the tamper event occurs" "Disabled,Enabled" bitfld.long 0x00 1. " SYS_RESET ,Causes the CSU ROM to issue a system reset when the tamper event occurs" "Disabled,Enabled" bitfld.long 0x00 0. " SYS_INTERRUPT ,Causes the CSU ROM to issue a system interrupt when the tamper event occurs" "Disabled,Enabled" rgroup.long 0x5010++0x03 line.long 0x00 "CSU_TAMPER_3,CSU Tamper Response 3 Register" bitfld.long 0x00 4. " BBRAM_ERASE ,Zeroize Non-volatile BBRAM key in addtion to the tamper resposne specified" "No effect,Clear" bitfld.long 0x00 3. " SEC_LOCKDOWN_1 ,Causes the CSU ROM to issue a secure lockdown and all GPIOB to be tri-stated when the tamper event occurs" "Disabled,Enabled" bitfld.long 0x00 2. " SEC_LOCKDOWN_0 ,Causes the CSU ROM to issue a secure lockdown when the tamper event occurs" "Disabled,Enabled" bitfld.long 0x00 1. " SYS_RESET ,Causes the CSU ROM to issue a system reset when the tamper event occurs" "Disabled,Enabled" bitfld.long 0x00 0. " SYS_INTERRUPT ,Causes the CSU ROM to issue a system interrupt when the tamper event occurs" "Disabled,Enabled" rgroup.long 0x5014++0x03 line.long 0x00 "CSU_TAMPER_4,CSU Tamper Response 4 Register" bitfld.long 0x00 4. " BBRAM_ERASE ,Zeroize Non-volatile BBRAM key in addtion to the tamper resposne specified" "No effect,Clear" bitfld.long 0x00 3. " SEC_LOCKDOWN_1 ,Causes the CSU ROM to issue a secure lockdown and all GPIOB to be tri-stated when the tamper event occurs" "Disabled,Enabled" bitfld.long 0x00 2. " SEC_LOCKDOWN_0 ,Causes the CSU ROM to issue a secure lockdown when the tamper event occurs" "Disabled,Enabled" bitfld.long 0x00 1. " SYS_RESET ,Causes the CSU ROM to issue a system reset when the tamper event occurs" "Disabled,Enabled" bitfld.long 0x00 0. " SYS_INTERRUPT ,Causes the CSU ROM to issue a system interrupt when the tamper event occurs" "Disabled,Enabled" rgroup.long 0x5018++0x03 line.long 0x00 "CSU_TAMPER_5,CSU Tamper Response 5 Register" bitfld.long 0x00 4. " BBRAM_ERASE ,Zeroize Non-volatile BBRAM key in addtion to the tamper resposne specified" "No effect,Clear" bitfld.long 0x00 3. " SEC_LOCKDOWN_1 ,Causes the CSU ROM to issue a secure lockdown and all GPIOB to be tri-stated when the tamper event occurs" "Disabled,Enabled" bitfld.long 0x00 2. " SEC_LOCKDOWN_0 ,Causes the CSU ROM to issue a secure lockdown when the tamper event occurs" "Disabled,Enabled" bitfld.long 0x00 1. " SYS_RESET ,Causes the CSU ROM to issue a system reset when the tamper event occurs" "Disabled,Enabled" bitfld.long 0x00 0. " SYS_INTERRUPT ,Causes the CSU ROM to issue a system interrupt when the tamper event occurs" "Disabled,Enabled" rgroup.long 0x501C++0x03 line.long 0x00 "CSU_TAMPER_6,CSU Tamper Response 6 Register" bitfld.long 0x00 4. " BBRAM_ERASE ,Zeroize Non-volatile BBRAM key in addtion to the tamper resposne specified" "No effect,Clear" bitfld.long 0x00 3. " SEC_LOCKDOWN_1 ,Causes the CSU ROM to issue a secure lockdown and all GPIOB to be tri-stated when the tamper event occurs" "Disabled,Enabled" bitfld.long 0x00 2. " SEC_LOCKDOWN_0 ,Causes the CSU ROM to issue a secure lockdown when the tamper event occurs" "Disabled,Enabled" bitfld.long 0x00 1. " SYS_RESET ,Causes the CSU ROM to issue a system reset when the tamper event occurs" "Disabled,Enabled" bitfld.long 0x00 0. " SYS_INTERRUPT ,Causes the CSU ROM to issue a system interrupt when the tamper event occurs" "Disabled,Enabled" rgroup.long 0x5020++0x03 line.long 0x00 "CSU_TAMPER_7,CSU Tamper Response 7 Register" bitfld.long 0x00 4. " BBRAM_ERASE ,Zeroize Non-volatile BBRAM key in addtion to the tamper resposne specified" "No effect,Clear" bitfld.long 0x00 3. " SEC_LOCKDOWN_1 ,Causes the CSU ROM to issue a secure lockdown and all GPIOB to be tri-stated when the tamper event occurs" "Disabled,Enabled" bitfld.long 0x00 2. " SEC_LOCKDOWN_0 ,Causes the CSU ROM to issue a secure lockdown when the tamper event occurs" "Disabled,Enabled" bitfld.long 0x00 1. " SYS_RESET ,Causes the CSU ROM to issue a system reset when the tamper event occurs" "Disabled,Enabled" bitfld.long 0x00 0. " SYS_INTERRUPT ,Causes the CSU ROM to issue a system interrupt when the tamper event occurs" "Disabled,Enabled" rgroup.long 0x5024++0x03 line.long 0x00 "CSU_TAMPER_8,CSU Tamper Response 8 Register" bitfld.long 0x00 4. " BBRAM_ERASE ,Zeroize Non-volatile BBRAM key in addtion to the tamper resposne specified" "No effect,Clear" bitfld.long 0x00 3. " SEC_LOCKDOWN_1 ,Causes the CSU ROM to issue a secure lockdown and all GPIOB to be tri-stated when the tamper event occurs" "Disabled,Enabled" bitfld.long 0x00 2. " SEC_LOCKDOWN_0 ,Causes the CSU ROM to issue a secure lockdown when the tamper event occurs" "Disabled,Enabled" bitfld.long 0x00 1. " SYS_RESET ,Causes the CSU ROM to issue a system reset when the tamper event occurs" "Disabled,Enabled" bitfld.long 0x00 0. " SYS_INTERRUPT ,Causes the CSU ROM to issue a system interrupt when the tamper event occurs" "Disabled,Enabled" rgroup.long 0x5028++0x03 line.long 0x00 "CSU_TAMPER_9,CSU Tamper Response 9 Register" bitfld.long 0x00 4. " BBRAM_ERASE ,Zeroize Non-volatile BBRAM key in addtion to the tamper resposne specified" "No effect,Clear" bitfld.long 0x00 3. " SEC_LOCKDOWN_1 ,Causes the CSU ROM to issue a secure lockdown and all GPIOB to be tri-stated when the tamper event occurs" "Disabled,Enabled" bitfld.long 0x00 2. " SEC_LOCKDOWN_0 ,Causes the CSU ROM to issue a secure lockdown when the tamper event occurs" "Disabled,Enabled" bitfld.long 0x00 1. " SYS_RESET ,Causes the CSU ROM to issue a system reset when the tamper event occurs" "Disabled,Enabled" bitfld.long 0x00 0. " SYS_INTERRUPT ,Causes the CSU ROM to issue a system interrupt when the tamper event occurs" "Disabled,Enabled" rgroup.long 0x502C++0x03 line.long 0x00 "CSU_TAMPER_10,CSU Tamper Response 10 Register" bitfld.long 0x00 4. " BBRAM_ERASE ,Zeroize Non-volatile BBRAM key in addtion to the tamper resposne specified" "No effect,Clear" bitfld.long 0x00 3. " SEC_LOCKDOWN_1 ,Causes the CSU ROM to issue a secure lockdown and all GPIOB to be tri-stated when the tamper event occurs" "Disabled,Enabled" bitfld.long 0x00 2. " SEC_LOCKDOWN_0 ,Causes the CSU ROM to issue a secure lockdown when the tamper event occurs" "Disabled,Enabled" bitfld.long 0x00 1. " SYS_RESET ,Causes the CSU ROM to issue a system reset when the tamper event occurs" "Disabled,Enabled" bitfld.long 0x00 0. " SYS_INTERRUPT ,Causes the CSU ROM to issue a system interrupt when the tamper event occurs" "Disabled,Enabled" rgroup.long 0x5030++0x03 line.long 0x00 "CSU_TAMPER_11,CSU Tamper Response 11 Register" bitfld.long 0x00 4. " BBRAM_ERASE ,Zeroize Non-volatile BBRAM key in addtion to the tamper resposne specified" "No effect,Clear" bitfld.long 0x00 3. " SEC_LOCKDOWN_1 ,Causes the CSU ROM to issue a secure lockdown and all GPIOB to be tri-stated when the tamper event occurs" "Disabled,Enabled" bitfld.long 0x00 2. " SEC_LOCKDOWN_0 ,Causes the CSU ROM to issue a secure lockdown when the tamper event occurs" "Disabled,Enabled" bitfld.long 0x00 1. " SYS_RESET ,Causes the CSU ROM to issue a system reset when the tamper event occurs" "Disabled,Enabled" bitfld.long 0x00 0. " SYS_INTERRUPT ,Causes the CSU ROM to issue a system interrupt when the tamper event occurs" "Disabled,Enabled" width 0x0B tree.end tree "CSUDMA" base ad:0xFFC80000 width 20. group.long 0x00++0x17 line.long 0x00 "SRC_ADDR,Source Mem Address (LSBS) Register" hexmask.long 0x00 2.--31. 0x04 " ADDR ,Source memory address LSBS for DMA memory to stream data transfer" line.long 0x04 "SRC_SIZE,DMA Transfer Payload For DMA memory-stream Data Transfer Register" hexmask.long 0x04 2.--28. 1. " SIZE ,Number of 4-byte words the DMA will transfer from memory to stream" bitfld.long 0x04 0. " LAST_WORD ,Assert the data_inp_last on the stream interface when the current DMA command is completed" "Disabled,Enabled" line.long 0x08 "SRC_STS,General SRC DMA Status Register" bitfld.long 0x08 13.--15. " DONE_CNT ,Number of completed SRC DMA transfers that have not been acknowledged by software" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x08 5.--12. 1. " SRC_FIFO_LEVEL ,Indicates the current SRC FIFO level in 32-bit words" rbitfld.long 0x08 1.--4. " RD_OUTSTANDING ,Indicates how many memory read commands are currently outstanding in the system" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x08 0. " BUSY ,DMA busy status" "Not busy,Busy" line.long 0x0C "SRC_CTRL,General SRC DMA Control Register 1" bitfld.long 0x0C 24. " APB_ERR_RESP ,Pslverr value after access on unimplemented space" "0,1" bitfld.long 0x0C 23. " ENDIANNESS ,Flip the incoming AXI byte ordering" "Not flipped,Flipped" bitfld.long 0x0C 22. " AXI_BRST_TYPE ,Burst type" "INCR,AXI FIXED" hexmask.long.word 0x0C 10.--21. 1. " TIMEOUT_VAL ,Timeout value for SRC DMA" textline " " hexmask.long.byte 0x0C 2.--9. 1. " FIFO_THRESH ,SRC_FIFO programmed watermark value" bitfld.long 0x0C 1. " PAUSE_STRM ,Stop the transfer of data from the internal SRC data FIFO to the stream interface" "Not stopped,Stopped" bitfld.long 0x0C 0. " PAUSE_MEM ,Stop the issuing of new write commands to memory" "Not stopped,Stopped" line.long 0x10 "SRC_CRC,SRC DMA Pseudo CRC Register" line.long 0x14 "SRC_I_STS,SRC DMA Interrupt Status Register" eventfld.long 0x14 6. " INVALID_APB ,APB (Register) access to an unimplemented space" "Not occurred,Occurred" eventfld.long 0x14 5. " THRESH_HIT ,Watermark value reached by SRC_FIFO" "Not reached,Reached" eventfld.long 0x14 4. " TIMEOUT_MEM ,Timeout counter#2 expired" "Not expired,Expired" eventfld.long 0x14 3. " TIMEOUT_STRM ,Timeout counter#1 expired" "Not expired,Expired" textline " " eventfld.long 0x14 2. " AXI_RDERR ,Memory read command produced a RRESP=DECERR/SLVERR on the AXI bus" "Not occurred,Occurred" eventfld.long 0x14 1. " DONE ,DMA command completed" "Not completed,Completed" eventfld.long 0x14 0. " MEM_DONE ,DMA AXI memory command completed" "Not completed,Completed" group.long 0x20++0x0B line.long 0x00 "SRC_I_MASK_SET/CLR,SRC DMA Interrupt Mask Register" setclrfld.long 0x00 6. -0x04 6. -0x08 6. " INVALID_APB ,APB (Register) access to an unimplemented space interrupt mask" "Not masked,Masked" setclrfld.long 0x00 5. -0x04 5. -0x08 5. " THRESH_HIT ,Watermark value reached by SRC_FIFO interrupt mask" "Not masked,Masked" setclrfld.long 0x00 4. -0x04 4. -0x08 4. " TIMEOUT_MEM ,Timeout counter#2 expired interrupt mask" "Not masked,Masked" setclrfld.long 0x00 3. -0x04 3. -0x08 3. " TIMEOUT_STRM ,Timeout counter#1 expired interrupt mask" "Not masked,Masked" textline " " setclrfld.long 0x00 2. -0x04 2. -0x08 2. " AXI_RDERR ,Memory read command produced a RRESP=DECERR/SLVERR on the AXI bus interrupt mask" "Not masked,Masked" setclrfld.long 0x00 1. -0x04 1. -0x08 1. " DONE ,DMA command completed interrupt mask" "Not masked,Masked" setclrfld.long 0x00 0. -0x04 0. -0x08 0. " MEM_DONE ,DMA AXI memory command completed interrupt mask" "Not masked,Masked" line.long 0x04 "SRC_CTRL2,General SRC DMA Control Register 2" bitfld.long 0x04 26. " ARCACHE[2] ,Sets the ARCACHE bit 2 on the AXI read channel" "Low,High" bitfld.long 0x04 25. " ARCACHE[1] ,Sets the ARCACHE bit 1 on the AXI read channel" "Low,High" bitfld.long 0x04 24. " ARCACHE[0] ,Sets the ARCACHE bit 0 on the AXI read channel" "Low,High" bitfld.long 0x04 23. " ROUTE_BIT ,Route the command to apu's cache controller" "Disabled,Enabled" textline " " bitfld.long 0x04 22. " TIMEOUT_EN ,Timeout counters enable" "Disabled,Enabled" hexmask.long.word 0x04 4.--15. 1. " TIMEOUT_PRE ,Prescaler value for the timeout in clk 2.5ns cycles" bitfld.long 0x04 0.--3. " MAX_OUTS_CMDS ,Maximum number of outstanding AXI read commands issued" "1,2,3,4,5,6,7,8,9,?..." line.long 0x08 "SRC_ADDR_MSB,Source Mem Address (Msbs) Register" hexmask.long.tbyte 0x08 0.--16. 1. " ADDR_MSB ,Source memory address msbs for DMA memory-stream data transfer" group.long 0x800++0x0F line.long 0x00 "DST_ADDR,Destination Mem Address (Lsbs) Register" hexmask.long 0x00 2.--31. 0x04 " ADDR ,Destination memory address lsbs for DMA stream to memory data transfer" line.long 0x04 "DST_SIZE,DMA Transfer Payload For DMA stream-memory Data Transfer Register" hexmask.long 0x04 2.--28. 1. " SIZE ,Number of 4-byte words the DMA will transfer from stream to memory" line.long 0x08 "DST_STS,General DST DMA Status Register" bitfld.long 0x08 13.--15. " DONE_CNT ,Number of completed DST DMA transfers that have not been acknowledged by software" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x08 5.--12. 1. " DST_FIFO_LEVEL ,Indicates the current DST FIFO level in 32-bit words" rbitfld.long 0x08 1.--4. " RD_OUTSTANDING ,Indicates how many memory read commands are currently outstanding in the system" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x08 0. " BUSY ,DMA busy status" "Not busy,Busy" line.long 0x0C "DST_CTRL,General DST DMA Control Register 1" hexmask.long.byte 0x0C 25.--31. 1. " FIFOTHRESH ,Data_out_fifo_level_hit assertion threshold" bitfld.long 0x0C 24. " APB_ERR_RESP ,Pslverr vslue after access on unimplemented space" "0,1" bitfld.long 0x0C 23. " ENDIANNESS ,Flip the outgoing AXI byte ordering" "Not flipped,Flipped" bitfld.long 0x0C 22. " AXI_BRST_TYPE ,Burst type" "INCR,AXI FIXED" textline " " hexmask.long.word 0x0C 10.--21. 1. " TIMEOUT_VAL ,Timeout value for DST DMA" hexmask.long.byte 0x0C 2.--9. 1. " FIFO_THRESH ,DST_FIFO programmed watermark value" bitfld.long 0x0C 1. " PAUSE_STRM ,Stop the transfer of data to the internal DST data FIFO from the stream interface" "Not stopped,Stopped" bitfld.long 0x0C 0. " PAUSE_MEM ,Stop the issuing of new write commands to memory" "Not stopped,Stopped" group.long 0x814++0x03 line.long 0x00 "DST_I_STS,DST DMA Interrupt Status Register" eventfld.long 0x00 7. " FIFO_OVERFLOW ,DST_FIFO overflow" "No overflow,Overflow" eventfld.long 0x00 6. " INVALID_APB ,APB (Register) access to an unimplemented space" "Not occurred,Occurred" eventfld.long 0x00 5. " THRESH_HIT ,Watermark value reached by DST_FIFO" "Not reached,Reached" eventfld.long 0x00 4. " TIMEOUT_MEM ,Timeout counter#1 expired" "Not expired,Expired" textline " " eventfld.long 0x00 3. " TIMEOUT_STRM ,Timeout counter#2 expired" "Not expired,Expired" eventfld.long 0x00 2. " AXI_BRESP_ERR ,Memory write command produced a BRESP=DECERR/SLVERR on the AXI bus" "Not occurred,Occurred" eventfld.long 0x00 1. " DONE ,DMA command completed" "Not completed,Completed" group.long 0x820++0x0B line.long 0x00 "DST_I_MASK,DST DMA Interrupt Mask Register" setclrfld.long 0x00 7. -0x04 7. -0x08 7. " FIFO_OVERFLOW ,DST_FIFO overflow interrupt mask" "Not masked,Masked" setclrfld.long 0x00 6. -0x04 6. -0x08 6. " INVALID_APB ,APB (Register) access to an unimplemented space interrupt mask" "Not masked,Masked" setclrfld.long 0x00 5. -0x04 5. -0x08 5. " THRESH_HIT ,Watermark value reached by DST_FIFO interrupt mask" "Not masked,Masked" setclrfld.long 0x00 4. -0x04 4. -0x08 4. " TIMEOUT_MEM ,Timeout counter#1 expired interrupt mask" "Not masked,Masked" textline " " setclrfld.long 0x00 3. -0x04 3. -0x08 3. " TIMEOUT_STRM ,Timeout counter#2 expired interrupt mask" "Not masked,Masked" setclrfld.long 0x00 2. -0x04 2. -0x08 2. " AXI_BRESP_ERR ,Memory write command produced a BRESP=DECERR/SLVERR on the AXI bus interrupt mask" "Not masked,Masked" setclrfld.long 0x00 1. -0x04 1. -0x08 1. " DONE ,DMA command completed interrupt mask" "Not masked,Masked" line.long 0x04 "DST_CTRL2,General DST DMA Control Register 2" bitfld.long 0x04 26. " AWCACHE[2] ,Sets the AWCACHE bit 2 on the AXI write channel" "Low,High" bitfld.long 0x04 25. " AWCACHE[1] ,Sets the AWCACHE bit 1 on the AXI write channel" "Low,High" bitfld.long 0x04 24. " AWCACHE[0] ,Sets the AWCACHE bit 0 on the AXI write channel" "Low,High" bitfld.long 0x04 23. " ROUTE_BIT ,Route the command to apu's cache controller" "Disabled,Enabled" textline " " bitfld.long 0x04 22. " TIMEOUT_EN ,Timeout counters enable" "Disabled,Enabled" hexmask.long.word 0x04 4.--15. 1. " TIMEOUT_PRE ,Prescaler value for the timeout in clk 2.5ns cycles" bitfld.long 0x04 0.--3. " MAX_OUTS_CMDS ,Maximum number of outstanding AXI write commands issued" "1,2,3,4,5,6,7,8,9,?..." line.long 0x08 "DST_ADDR_MSB,Destination Mem Address (Msbs) Register" hexmask.long.tbyte 0x08 0.--16. 1. " ADDR_MSB ,Destination memory address (Msbs) for DMA stream to memory data transfer" group.long 0xFF8++0x03 line.long 0x00 "SAFETY_CHK,Safety Endpoint Connectivity Check Register" width 0x0B tree.end tree.end tree "SWDT (System Watchdog Timer)" tree "CSU_WDT" base ad:0xFFCB0000 width 9. group.long 0x00++0x07 line.long 0x00 "MODE,WD Zero Mode Register" hexmask.long.word 0x00 12.--23. 1. " ZKEY ,Zero access key" bitfld.long 0x00 7.--8. " IRQLN ,Interrupt request length" "4,8,16,32" bitfld.long 0x00 4.--6. " RSTLN ,Reset length" "2,4,8,16,32,64,128,256" bitfld.long 0x00 2. " IRQEN ,Interrupt request enable" "Disabled,Enabled" bitfld.long 0x00 1. " RSTEN ,Reset enable" "Disabled,Enabled" bitfld.long 0x00 0. " WDEN ,Watchdog enable" "Disabled,Enabled" line.long 0x04 "CONTROL,Counter Control Register" hexmask.long.word 0x04 14.--25. 1. " CKEY ,Counter access key" hexmask.long.word 0x04 2.--13. 1. " CRV ,Counter restart value" bitfld.long 0x04 0.--1. " CLKSEL ,Counter clock prescale" "PCLK/8,PCLK/64,PCLK/256,PCLK/4096" wgroup.word 0x08++0x01 line.word 0x00 "RESTART,Restart Key Register" rgroup.byte 0x0C++0x00 line.byte 0x00 "STATUS,Status Register" bitfld.byte 0x00 0. " WDZ ,Watchdog count status" "Non-zero,Zero" width 0x0B tree.end tree "SWDT" base ad:0xFF150000 width 9. group.long 0x00++0x07 line.long 0x00 "MODE,WD Zero Mode Register" hexmask.long.word 0x00 12.--23. 1. " ZKEY ,Zero access key" bitfld.long 0x00 7.--8. " IRQLN ,Interrupt request length" "4,8,16,32" bitfld.long 0x00 4.--6. " RSTLN ,Reset length" "2,4,8,16,32,64,128,256" bitfld.long 0x00 2. " IRQEN ,Interrupt request enable" "Disabled,Enabled" bitfld.long 0x00 1. " RSTEN ,Reset enable" "Disabled,Enabled" bitfld.long 0x00 0. " WDEN ,Watchdog enable" "Disabled,Enabled" line.long 0x04 "CONTROL,Counter Control Register" hexmask.long.word 0x04 14.--25. 1. " CKEY ,Counter access key" hexmask.long.word 0x04 2.--13. 1. " CRV ,Counter restart value" bitfld.long 0x04 0.--1. " CLKSEL ,Counter clock prescale" "PCLK/8,PCLK/64,PCLK/256,PCLK/4096" wgroup.word 0x08++0x01 line.word 0x00 "RESTART,Restart Key Register" rgroup.byte 0x0C++0x00 line.byte 0x00 "STATUS,Status Register" bitfld.byte 0x00 0. " WDZ ,Watchdog count status" "Non-zero,Zero" width 0x0B tree.end tree "WDT" base ad:0xFD4D0000 width 9. group.long 0x00++0x07 line.long 0x00 "MODE,WD Zero Mode Register" hexmask.long.word 0x00 12.--23. 1. " ZKEY ,Zero access key" bitfld.long 0x00 7.--8. " IRQLN ,Interrupt request length" "4,8,16,32" bitfld.long 0x00 4.--6. " RSTLN ,Reset length" "2,4,8,16,32,64,128,256" bitfld.long 0x00 2. " IRQEN ,Interrupt request enable" "Disabled,Enabled" bitfld.long 0x00 1. " RSTEN ,Reset enable" "Disabled,Enabled" bitfld.long 0x00 0. " WDEN ,Watchdog enable" "Disabled,Enabled" line.long 0x04 "CONTROL,Counter Control Register" hexmask.long.word 0x04 14.--25. 1. " CKEY ,Counter access key" hexmask.long.word 0x04 2.--13. 1. " CRV ,Counter restart value" bitfld.long 0x04 0.--1. " CLKSEL ,Counter clock prescale" "PCLK/8,PCLK/64,PCLK/256,PCLK/4096" wgroup.word 0x08++0x01 line.word 0x00 "RESTART,Restart Key Register" rgroup.byte 0x0C++0x00 line.byte 0x00 "STATUS,Status Register" bitfld.byte 0x00 0. " WDZ ,Watchdog count status" "Non-zero,Zero" width 0x0B tree.end tree.end tree "DDRC (DDR Controller)" base ad:0xFD070000 width 18. group.long 0x00++0x03 line.long 0x00 "MSTR,Master Register" bitfld.long 0x00 30.--31. " DEVICE_CONFIG ,Device configuration" "X4 device,X8 device,X16 device,X32 device" bitfld.long 0x00 29. " FREQUENCY_MODE ,Choose which registers are used" "Original,Shadow" bitfld.long 0x00 24.--25. " ACTIVE_RANKS ,Active ranks" ",1,,2" textline " " bitfld.long 0x00 16.--19. " BURST_RDWR ,SDRAM burst length" ",2,4,8,16,?..." bitfld.long 0x00 15. " DLL_OFF_MODE ,Enable the umctl2 and DRAM to be put in DLL-off mode for low frequency operation" "Disabled,Enabled" bitfld.long 0x00 12.--13. " DATA_BUS_WIDTH ,Proportion of DQ bus width that is used by the SDRAM" "Full,Half,Quarter,?..." textline " " bitfld.long 0x00 11. " GEARDOWN_MODE ,Geardown mode enable" "Disabled,Enabled" bitfld.long 0x00 10. " EN_2T_TIMING_MODE ,Umctl2 timing mode" "1T,2T" bitfld.long 0x00 9. " BURSTCHOP ,Enable burst-chop in DDR3/DDR4" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " LPDDR4 ,LPDDR4 SDRAM enable" "Disabled,Enabled" bitfld.long 0x00 4. " DDR4 ,DDR4 SDRAM enable" "Disabled,Enabled" bitfld.long 0x00 3. " LPDDR3 ,LPDDR3 SDRAM enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " LPDDR2 ,LPDDR2 SDRAM enable" "Disabled,Enabled" bitfld.long 0x00 0. " DDR3 ,DDR3 SDRAM enable" "Disabled,Enabled" rgroup.long 0x04++0x03 line.long 0x00 "STAT,Operating Mode Status Register" bitfld.long 0x00 8.--9. " SELFREF_STATE ,Self refresh state" "Not in self refresh,Self refresh,Self refresh power down,Self refresh" bitfld.long 0x00 4.--5. " SELFREF_TYPE ,Flags if self refresh is entered and if it was under automatic self refresh (ASR) control only" "Not entered,,Entered,Entered/ASR" bitfld.long 0x00 0.--2. " OPER_MODE ,Operating mode" "Init,Normal,Power-down,Self refresh,Deep power-down,Deep power-down,Deep power-down,Deep power-down" group.long 0x10++0x07 line.long 0x00 "MRCTRL0,Mode Register Read/write Control Register 0" bitfld.long 0x00 31. " MR_WR ,Trigger a mode register read or write operation" "No trigger,Trigger" bitfld.long 0x00 12.--15. " MR_ADDR ,Address of the mode register that is to be written to" "MR0,MR1,MR2,MR3,MR4,MR5,MR6,MR7,?..." bitfld.long 0x00 4.--5. " MR_RANK ,Control which rank is accessed by MRCTRL0.MR_WR" ",Rank 0,Rank 1,Ranks 0-1" textline " " bitfld.long 0x00 3. " SW_INIT_INT ,Software intervention is allowed via MRCTRL0/MRCTRL1" "Not allowed,Allowed" bitfld.long 0x00 2. " PDA_EN ,Indicates whether the mode register operation is MRS in PDA mode" "MRS,MRS in PDA" bitfld.long 0x00 1. " MPR_EN ,Indicates whether the mode register operation is MRS or WR/RD for MPR" "MRS,WR/RD for MPR" textline " " bitfld.long 0x00 0. " MR_TYPE ,Indicates whether the mode register operation is read or write" "Write,Read" line.long 0x04 "MRCTRL1,Mode Register Read/write Control Register 1" hexmask.long.tbyte 0x04 0.--17. 1. " MR_DATA ,Mode register write data" group.long 0x18++0x0F line.long 0x00 "MRSTAT,Mode Register Read/write Status Register" bitfld.long 0x00 8. " PDA_DONE ,Mode register write operation related to PDA has competed" "Not completed,Completed" bitfld.long 0x00 0. " MR_WR_BUSY ,Mode register write operation is in progress" "Not busy,Busy" textline " " line.long 0x04 "MRCTRL2,Mode Register Read/write Control Register 2" bitfld.long 0x04 31. " HEE[31] ,Device 31 enable" "Disabled,Enabled" bitfld.long 0x04 30. " [30] ,Device 30 enable" "Disabled,Enabled" bitfld.long 0x04 29. " [29] ,Device 29 enable" "Disabled,Enabled" textline " " bitfld.long 0x04 28. " [28] ,Device 28 enable" "Disabled,Enabled" bitfld.long 0x04 27. " [27] ,Device 27 enable" "Disabled,Enabled" bitfld.long 0x04 26. " [26] ,Device 26 enable" "Disabled,Enabled" textline " " bitfld.long 0x04 25. " [25] ,Device 25 enable" "Disabled,Enabled" bitfld.long 0x04 24. " [24] ,Device 24 enable" "Disabled,Enabled" bitfld.long 0x04 23. " [23] ,Device 23 enable" "Disabled,Enabled" textline " " bitfld.long 0x04 22. " [22] ,Device 22 enable" "Disabled,Enabled" bitfld.long 0x04 21. " [21] ,Device 21 enable" "Disabled,Enabled" bitfld.long 0x04 20. " [20] ,Device 20 enable" "Disabled,Enabled" textline " " bitfld.long 0x04 19. " [19] ,Device 19 enable" "Disabled,Enabled" bitfld.long 0x04 18. " [18] ,Device 18 enable" "Disabled,Enabled" bitfld.long 0x04 17. " [17] ,Device 17 enable" "Disabled,Enabled" textline " " bitfld.long 0x04 16. " [16] ,Device 16 enable" "Disabled,Enabled" bitfld.long 0x04 15. " [15] ,Device 15 enable" "Disabled,Enabled" bitfld.long 0x04 14. " [14] ,Device 14 enable" "Disabled,Enabled" textline " " bitfld.long 0x04 13. " [13] ,Device 13 enable" "Disabled,Enabled" bitfld.long 0x04 12. " [12] ,Device 12 enable" "Disabled,Enabled" bitfld.long 0x04 11. " [11] ,Device 11 enable" "Disabled,Enabled" textline " " bitfld.long 0x04 10. " [10] ,Device 10 enable" "Disabled,Enabled" bitfld.long 0x04 9. " [9] ,Device 9 enable" "Disabled,Enabled" bitfld.long 0x04 8. " [8] ,Device 8 enable" "Disabled,Enabled" textline " " bitfld.long 0x04 7. " [7] ,Device 7 enable" "Disabled,Enabled" bitfld.long 0x04 6. " [6] ,Device 6 enable" "Disabled,Enabled" bitfld.long 0x04 5. " [5] ,Device 5 enable" "Disabled,Enabled" textline " " bitfld.long 0x04 4. " [4] ,Device 4 enable" "Disabled,Enabled" bitfld.long 0x04 3. " [3] ,Device 3 enable" "Disabled,Enabled" bitfld.long 0x04 2. " [2] ,Device 2 enable" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " [1] ,Device 1 enable" "Disabled,Enabled" bitfld.long 0x04 0. " [0] ,Device 0 enable" "Disabled,Enabled" line.long 0x08 "DERATEEN,Temperature Derate Enable Register" bitfld.long 0x08 8.--9. " RC_DERATE_VAL ,Derate value of trc for LPDDR4" "1,2,3,4" bitfld.long 0x08 4.--7. " DERATE_BYTE ,Indicates which byte of the MRR data is used for derating" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 1. " DERATE_VAL ,Derate value" "1,2" textline " " bitfld.long 0x08 0. " DERATE_EN ,Enables derating" "Disabled,Enabled" line.long 0x0C "DERATEINT,Temperature Derate Interval Register" group.long 0x30++0x0B line.long 0x00 "PWRCTL,Low Power Control Register" bitfld.long 0x00 6. " STAY_IN_SELFREF ,Transition from self refresh state" "Allowed,Not allowed" bitfld.long 0x00 5. " SELFREF_SW ,Software entry/exit to self refresh" "Exited,Entered" bitfld.long 0x00 4. " MPSM_EN ,Maximum power saving mode enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " EN_DFI_DRAM_CLK_DIS ,Enable the assertion of dfi_dram_clk_dis" "Disabled,Enabled" bitfld.long 0x00 2. " DEEPPWRDOWN_EN ,Deep power-down enable" "Disabled,Enabled" bitfld.long 0x00 1. " POWERDOWN_EN ,Power-down enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " SELFREF_EN ,Self refresh enable" "Disabled,Enabled" line.long 0x04 "PWRTMG,Low Power Timing Register" hexmask.long.byte 0x04 16.--23. 1. " SELFREF_TO_X32 ,After this many clocks of NOP or deselect the umctl2 automatically puts the SDRAM into self refresh" hexmask.long.byte 0x04 8.--15. 1. " T_DPD_X4096 ,Minimum deep power-down time." bitfld.long 0x04 0.--4. " POWERDOWN_TO_X32 ,After this many clocks of NOP or deselect the umctl2 automatically puts the SDRAM into power-down" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x08 "HWLPCTL,Hardware Low Power Control Register" hexmask.long.word 0x08 16.--27. 1. " HW_LP_IDLE_X32 ,Hardware idle period" bitfld.long 0x08 1. " HW_LP_EXIT_IDLE_EN ,Enable the use of cactive_in_ddrc pin" "Disabled,Enabled" bitfld.long 0x08 0. " HW_LP_EN ,Enable for hardware low power interface" "Disabled,Enabled" textline " " group.long 0x50++0x07 line.long 0x00 "RFSHCTL0,Refresh Control Register 0" bitfld.long 0x00 20.--23. " REF_MARGIN ,Threshold value in number of clock cycles before the critical refresh or page timer expires" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--16. " REF_TO_X32 ,Period of time the SDRAM bus is idle to perform a speculative refresh" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 4.--8. " REF_BURST ,Number of refresh timeouts before traffic is blocked and the refreshes are forced to execute" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 2. " PER_BANK_REFRESH ,Per bank refresh enable" "Disabled,Enabled" line.long 0x04 "RFSHCTL1,Refresh Control Register 1" hexmask.long.word 0x04 16.--27. 1. " REF_TIMER1_START_VAL_X32 ,Refresh timer start for rank 1" hexmask.long.word 0x04 0.--11. 1. " REF_TIMER0_START_VAL_X32 ,Refresh timer start for rank 0" group.long 0x60++0x07 line.long 0x00 "RFSHCTL3,Refresh Control Register 3" bitfld.long 0x00 4.--6. " REF_MODE ,Fine granularity refresh mode" "Fixed 1x,Fixed 2x,Fixed 4x,?..." bitfld.long 0x00 1. " REF_UPDATE_LEVEL ,Refresh register update signal" "0,1" bitfld.long 0x00 0. " DIS_AUTO_REFRESH ,Disable auto-refresh generated by the umctl2" "No,Yes" line.long 0x04 "RFSHTMG,Refresh Timing Register" hexmask.long.word 0x04 16.--27. 1. " T_RFC_NOM_X32 ,Average time interval between refreshes per rank" bitfld.long 0x04 15. " LPDDR3_TREFBW_EN ,Specifies whether to use the trefbw parameter" "Disabled,Enabled" hexmask.long.word 0x04 0.--9. 1. " T_RFC_MIN ,Minimum time from refresh to refresh or activate" if (((d.l(ad:0xFD070000+0x70))&0x07)==0x04) group.long 0x70++0x03 line.long 0x00 "ECCCFG0,ECC Configuration Register 0" bitfld.long 0x00 4. " DIS_SCRUB ,Disable ECC scrubs" "No,Yes" bitfld.long 0x00 0.--2. " ECC_MODE ,ECC mode indicator" "Disabled,,,,Enabled,?..." else group.long 0x70++0x03 line.long 0x00 "ECCCFG0,ECC Configuration Register 0" bitfld.long 0x00 0.--2. " ECC_MODE ,ECC mode indicator" "Disabled,,,,Enabled,?..." endif group.long 0x74++0x03 line.long 0x00 "ECCCFG1,ECC Configuration Register 1" bitfld.long 0x00 1. " DATA_POISON_BIT ,Number of bits to poison" "2,1" bitfld.long 0x00 0. " DATA_POISON_EN ,Enable ECC data poisoning" "Disabled,Enabled" rgroup.long 0x78++0x03 line.long 0x00 "ECCSTAT,ECC Status Register" bitfld.long 0x00 17. " ECC_UNCORR_ERR[1] ,Double-bit error on ECC lane 1" "No error,Error" bitfld.long 0x00 16. " [0] ,Double-bit error on ECC lane 0" "No error,Error" textline " " bitfld.long 0x00 9. " ECC_CORR_ERR[1] ,Single-bit error on ECC lane 1" "No error,Error" bitfld.long 0x00 8. " [0] ,Single-bit error on ECC lane 0" "No error,Error" textline " " hexmask.long.byte 0x00 0.--6. 1. " ECC_CORR_BIT_NUM ,Bit number corrected by single-bit ECC error" group.long 0x7C++0x03 line.long 0x00 "ECCCLR,ECC Clear Register" eventfld.long 0x00 3. " ECC_CLR_UNCORR_ERR_CNT ,Clear the currently stored uncorrected ECC error count" "No effect,Clear" eventfld.long 0x00 2. " ECC_CLR_CORR_ERR_CNT ,Clear the currently stored corrected ECC error count" "No effect,Clear" eventfld.long 0x00 1. " ECC_CLR_UNCORR_ERR ,Clear the currently stored uncorrected ECC error" "No effect,Clear" textline " " eventfld.long 0x00 0. " ECC_CLR_CORR_ERR ,Clear the currently stored corrected ECC error" "No effect,Clear" rgroup.long 0x80++0x37 line.long 0x00 "ECCERRCNT,ECC Error Counter Register" hexmask.long.word 0x00 16.--31. 1. " ECC_UNCORR_ERR_CNT ,Number of uncorrectable ECC errors detected" hexmask.long.word 0x00 0.--15. 1. " ECC_CORR_ERR_CNT ,Number of correctable ECC errors detected" line.long 0x04 "ECCCADDR0,ECC Corrected Error Address Register 0" bitfld.long 0x04 24. " ECC_CORR_RANK ,Rank number of a read resulting in a corrected ECC error" "0,1" hexmask.long.tbyte 0x04 0.--17. 1. " ECC_CORR_ROW ,Page/row number of a read resulting in a corrected ECC error" line.long 0x08 "ECCCADDR0,ECC Corrected Error Address Register 0" bitfld.long 0x08 24.--25. " ECC_CORR_BG ,Bank group number of a read resulting in a corrected ECC error" "0,1,2,3" bitfld.long 0x08 16.--18. " ECC_CORR_BANK ,Bank number of a read resulting in a corrected ECC error" "0,1,2,3,4,5,6,7" hexmask.long.word 0x08 0.--11. 1. " ECC_CORR_COL ,Block number of a read resulting in a corrected ECC error" line.long 0x0C "ECCCSYN0,ECC Corrected Syndrome Register 0" line.long 0x10 "ECCCSYN1,ECC Corrected Syndrome Register 1" line.long 0x14 "ECCCSYN2,ECC Corrected Syndrome Register 2" hexmask.long.byte 0x14 0.--7. 1. " ECC_CORR_SYND71_64 ,Data pattern that resulted in a corrected error" line.long 0x18 "ECCBITMASK0,ECC Corrected Data Bit Mask Register 0" line.long 0x1C "ECCBITMASK1,ECC Corrected Data Bit Mask Register 1" line.long 0x20 "ECCBITMASK2,ECC Corrected Data Bit Mask Register 2" hexmask.long.byte 0x20 0.--7. 1. " ECC_CORR_MASK_71_64 ,Mask for the corrected data portion" line.long 0x24 "ECCUADDR0,ECC Uncorrected Error Address Register 0" bitfld.long 0x24 24. " ECC_UNCORR_RANK ,Rank number of a read resulting in an uncorrected ECC error" "0,1" hexmask.long.tbyte 0x24 0.--17. 1. " ECC_UNCORR_ROW ,Page/row number of a read resulting in an uncorrected ECC error" line.long 0x28 "ECCUADDR1,ECC Uncorrected Error Address Register 1" bitfld.long 0x28 24.--25. " ECC_UNCORR_BG ,Bank group number of a read resulting in an uncorrected ECC error" "0,1,2,3" bitfld.long 0x28 16.--18. " ECC_UNCORR_BANK ,Bank number of a read resulting in an uncorrected ECC error" "0,1,2,3,4,5,6,7" hexmask.long.word 0x28 0.--11. 1. " ECC_UNCORR_COL ,Block number of a read resulting in an uncorrected ECC error" line.long 0x2C "ECCUSYN0,ECC Uncorrected Syndrome Register 0" line.long 0x30 "ECCUSYN1,ECC Uncorrected Syndrome Register 1" line.long 0x34 "ECCUSYN2,ECC Uncorrected Syndrome Register 2" hexmask.long.byte 0x34 0.--7. 1. " ECC_UNCORR_SYND71_64 ,Data pattern that resulted in an uncorrected error" group.long 0xB8++0x13 line.long 0x00 "ECCPOISONADDR0,ECC Data Poisoning Address Register 0" bitfld.long 0x00 24. " ECC_POISON_RANK ,Rank address for ECC poisoning" "0,1" hexmask.long.word 0x00 0.--11. 1. " ECC_POISON_COL ,Column address for ECC poisoning" line.long 0x04 "ECCPOISONADDR1,ECC Data Poisoning Address Register 1" bitfld.long 0x04 28.--29. " ECC_POISON_BG ,Bank group address for ECC poisoning" "0,1,2,3" bitfld.long 0x04 24.--26. " ECC_POISON_BANK ,Bank address for ECC poisoning" "0,1,2,3,4,5,6,7" hexmask.long.tbyte 0x04 0.--17. 1. " ECC_POISON_ROW ,Row address for ECC poisoning" line.long 0x08 "CRCPARCTL0,CRC Parity Control Register0" bitfld.long 0x08 15. " RETRY_CTRLUPD_EN ,Dfi_ctrlupd_req enable for retry" "Disabled,Enabled" eventfld.long 0x08 8. " DFI_ALERT_ERR_MAXR_INTCLR ,Interrupt clear bit for DFI alert counter saturation" "No effect,Clear" eventfld.long 0x08 4. " DFI_ALERT_ERR_FATL_INTCLR ,Interrupt clear bit for dfi_alert_err_fatl_int" "No effect,Clear" textline " " eventfld.long 0x08 2. " DFI_ALERT_ERR_CNT_CLR ,DFI alert error count clear" "No effect,Clear" eventfld.long 0x08 1. " DFI_ALERT_ERR_INTCLR ,Interrupt clear bit for DFI alert error" "No effect,Clear" bitfld.long 0x08 0. " DFI_ALERT_ERR_INT_EN ,Interrupt enable bit for DFI alert error" "Disabled,Enabled" line.long 0x0C "CRCPARCTL1,CRC Parity Control Register1" bitfld.long 0x0C 24.--29. " DFI_T_PHY_RDLAT ,The maximum number of cycles allowed from the assertion of the dfi_rddata_en to the assertion of dfi_rddata_valid" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x0C 9. " ALERT_WAIT_FOR_SW ,Wait for software to read/write the mode registers before hardware begins the retry" "Disabled,Enabled" bitfld.long 0x0C 8. " CRC_PARITY_RETRY_EN ,Enable command retry mechanism in case of C/A parity or CRC error" "Disabled,Enabled" textline " " bitfld.long 0x0C 7. " CRC_INC_DM ,CRC includes DM signal" "Not included,Included" bitfld.long 0x0C 4. " CRC_EN ,CRC enable" "Disabled,Enabled" bitfld.long 0x0C 0. " PARITY_EN ,C/A parity enable" "Disabled,Enabled" line.long 0x10 "CRCPARCTL2,CRC Parity Control Register2" hexmask.long.word 0x10 16.--24. 1. " T_PAR_ALERT_PW_MAX ,Maximum width of the dfi_alert_n pulse when a parity error occurs" bitfld.long 0x10 8.--12. " T_CRC_ALERT_PW_MAX ,Maximum width of the dfi_alert_n pulse when a CRC error occurs" ",,,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x10 0.--5. " RETRY_FIFO_MAX_HOLD_TIMER_X4 ,Mximum duration in number of DRAM clock cycles for which a command should be held in the command retry FIFO before it is popped out" ",,,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" rgroup.long 0xCC++0x03 line.long 0x00 "CRCPARSTAT,CRC Parity Status Register" bitfld.long 0x00 29. " CMD_IN_ERR_WINDOW ,Indicate if commands are present in the parity/crc error window" "Not present,Present" bitfld.long 0x00 28. " RETRY_OPER_MODE ,Operating mode of retry" "Normal,Crc/parity error" bitfld.long 0x00 22. " DFI_ALERT_ERR_FATL_CODE[2] ,Reason of dfi_alert_err_fatl_int assertion - MPSMX caused parity error" "No error,Error" textline " " bitfld.long 0x00 21. " [1] ,Reason of dfi_alert_err_fatl_int assertion - parity error happens again during software intervention time" "No error,Error" bitfld.long 0x00 20. " [0] ,Reason of dfi_alert_err_fatl_int assertion - MRS was in retry_fifo_max_hold_timer_x4 window" "No error,Error" bitfld.long 0x00 19. " DFI_ALERT_ERR_NO_SW ,Perform MRS/MPR/PDA during software intervention time" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " DFI_ALERT_ERR_MAXR_INT ,DFI alert error counter max reached interrupt" "No interrupt,Interrupt" bitfld.long 0x00 17. " DFI_ALERT_ERR_FATL_INT ,Fatal parity error interrupt" "No interrupt,Interrupt" bitfld.long 0x00 16. " DFI_ALERT_ERR_INT ,DFI alert error interrupt" "No interrupt,Interrupt" textline " " hexmask.long.word 0x00 0.--15. 1. " DFI_ALERT_ERR_CNT ,DFI alert error count" textline " " group.long 0xD0++0x27 line.long 0x00 "INIT0,SDRAM Initialization Register 0" bitfld.long 0x00 30.--31. " SKIP_DRAM_INIT ,Skip the SDRAM initialization routine/state the controller starts up in when reset is removed" "Not skipped,Skipped/normal,Not skipped,Skipped/self-refresh" hexmask.long.word 0x00 16.--25. 1. " POST_CKE_X1024 ,Cycles to wait after driving CKE high to start the SDRAM initialization sequence" hexmask.long.word 0x00 0.--11. 1. " PRE_CKE_X1024 ,Cycles to wait after reset before driving CKE high to start the SDRAM initialization sequence" line.long 0x04 "INIT1,SDRAM Initialization Register 1" hexmask.long.word 0x04 16.--24. 1. " DRAM_RSTN_X1024 ,Number of cycles to assert SDRAM reset signal during init sequence" hexmask.long.byte 0x04 8.--14. 1. " FINAL_WAIT_X32 ,Cycles to wait after completing the SDRAM initialization sequence before starting the dynamic scheduler" bitfld.long 0x04 0.--3. " PRE_OCD_X32 ,Wait period before driving the OCD complete command to SDRAM" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "INIT2,SDRAM Initialization Register 2" hexmask.long.byte 0x08 8.--15. 1. " IDLE_AFTER_RESET_X32 ,Idle time after the reset command, tinit4" bitfld.long 0x08 0.--3. " MIN_STABLE_CLOCK_X1 ,Time to wait after the first CKE high, tinit2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x0C "INIT3,SDRAM Initialization Register 3" hexmask.long.word 0x0C 16.--31. 1. " MR ,Value to write to MR register" hexmask.long.word 0x0C 0.--15. 1. " EMR ,Value to write to EMR register" line.long 0x10 "INIT4,SDRAM Initialization Register 4" hexmask.long.word 0x10 16.--31. 1. " EMR2 ,Value to write to EMR2 register" hexmask.long.word 0x10 0.--15. 1. " EMR3 ,Value to write to EMR3 register" line.long 0x14 "INIT5,SDRAM Initialization Register 5" hexmask.long.byte 0x14 16.--23. 1. " DEV_ZQINIT_X32 ,ZQ initial calibration, tzqinit" hexmask.long.word 0x14 0.--9. 1. " MAX_AUTO_INIT_X1024 ,Maximum duration of the auto initialization, tinit5" line.long 0x18 "INIT6,SDRAM Initialization Register 6" hexmask.long.word 0x18 16.--31. 1. " MR4 ,Value to be loaded into SDRAM MR4 registers" hexmask.long.word 0x18 0.--15. 1. " MR5 ,Value to be loaded into SDRAM MR5 registers" line.long 0x1C "INIT7,SDRAM Initialization Register 7" hexmask.long.word 0x1C 16.--31. 1. " MR6 ,Value to be loaded into SDRAM MR6 registers" textline " " line.long 0x20 "DIMMCTL,DIMM Control Register" bitfld.long 0x20 5. " DIMM_DIS_BG_MIRRORING ,Disable address mirroring for BG bits" "No,Yes" bitfld.long 0x20 4. " MRS_BG1_EN ,Enable for BG1 bit of MRS command" "Disabled,Enabled" bitfld.long 0x20 3. " MRS_A17_EN ,Enable for A17 bit of MRS command" "Disabled,Enabled" textline " " bitfld.long 0x20 2. " DIMM_OUTPUT_INV_EN ,Output inversion enable" "Disabled,Enabled" bitfld.long 0x20 1. " DIMM_ADDR_MIRR_EN ,Address mirroring enable" "Disabled,Enabled" bitfld.long 0x20 0. " DIMM_STAGGER_CS_EN ,Staggering enable for multi-rank accesses for multi-rank UDIMM and RDIMM implementations only" "Disabled,Enabled" line.long 0x24 "RANKCTL,Rank Control Register" bitfld.long 0x24 8.--11. " DIFF_RANK_WR_GAP ,Number of clocks of gap in data responses when performing consecutive writes to different ranks" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x24 4.--7. " DIFF_RANK_RD_GAP ,Number of clocks of gap in data responses when performing consecutive reads to different ranks" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x24 0.--3. " MAX_RANK_RD ,Maximum number of reads that can be scheduled consecutively to the same rank." "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x100++0x3B line.long 0x00 "DRAMTMG0,SDRAM Timing Register 0" hexmask.long.byte 0x00 24.--30. 1. " WR2PRE ,Minimum time between write and precharge to same bank" bitfld.long 0x00 16.--21. " T_FAW ,Tfaw" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x00 8.--14. 1. " T_RAS_MAX ,Maximum time between activate and precharge to same bank" textline " " bitfld.long 0x00 0.--5. " T_RAS_MIN ,Minimum time between activate and precharge to the same bank" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "DRAMTMG1,SDRAM Timing Register 1" bitfld.long 0x04 16.--20. " T_XP ,Minimum time after power-down exit to any operation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 8.--12. " RD2PRE ,Minimum time from read to precharge of same bank" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x04 0.--6. 1. " T_RC ,Minimum time between activates to same bank" line.long 0x08 "DRAMTMG2,SDRAM Timing Register 2" bitfld.long 0x08 24.--29. " WRITE_LATENCY ,Write latency" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x08 16.--21. " READ_LATENCY ,Read latency" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x08 8.--13. " RD2WR ,Minimum time from read command to write command" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x08 0.--5. " WR2RD ,Minimum time from write command to read command" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x0C "DRAMTMG3,SDRAM Timing Register 3" hexmask.long.word 0x0C 20.--29. 1. " T_MRW ,Time to wait after a mode register write or read MRW or MRR." bitfld.long 0x0C 12.--17. " T_MRD ,Cycles to wait after a mode register write or read" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.word 0x0C 0.--9. 1. " T_MOD ,Cycles between load mode command and following non-load mode command" line.long 0x10 "DRAMTMG4,SDRAM Timing Register 4" bitfld.long 0x10 24.--28. " T_RCD ,Minimum time from activate to read or write command to same bank" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x10 16.--19. " T_CCD ,Minimum time between two reads or two writes for same bank group." "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 8.--11. " T_RRD ,Minimum time between activates from bank a to bank b for same bank group" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x10 0.--4. " T_RP ,Minimum time from precharge to activate of same bank" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x14 "DRAMTMG5,SDRAM Timing Register 5" bitfld.long 0x14 24.--27. " T_CKSRX ,Specifies the clock stable time before SRX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x14 16.--19. " T_CKSRE ,Specifies the clock disable delay after SRE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x14 8.--13. " T_CKESR ,Minimum CKE low width for self refresh or self refresh power down entry to exit timing in memory clock cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x14 0.--4. " T_CKE ,Minimum number of cycles of CKE HIGH/LOW during power-down and self refresh" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x18 "DRAMTMG6,SDRAM Timing Register 6" bitfld.long 0x18 24.--27. " T_CKDPDE ,Specifies the clock disable delay after DPDE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 16.--19. " T_CKDPDX ,Specifies the clock stable time before DPDX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 0.--3. " T_CKCSX ,Specifies the clock stable time before next command after clock stop exit" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1C "DRAMTMG7,SDRAM Timing Register 7" bitfld.long 0x1C 8.--11. " T_CKPDE ,Specifies the clock disable delay after PDE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C 0.--3. " T_CKPDX ,Specifies the clock stable time before PDX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x20 "DRAMTMG8,SDRAM Timing Register 8" hexmask.long.byte 0x20 24.--30. 1. " T_XS_FAST_X32 ,Txs_fast: exit self refresh to ZQCL, ZQCS and MRS only CL, WR, RTP and geardown mode" hexmask.long.byte 0x20 16.--22. 1. " T_XS_ABORT_X32 ,Txs_abort: exit self refresh to commands not requiring a locked DLL in self refresh abort" hexmask.long.byte 0x20 8.--14. 1. " T_XS_DLL_X32 ,Txsdll: exit self refresh to commands requiring a locked DLL" textline " " hexmask.long.byte 0x20 0.--6. 1. " T_XS_X32 ,Txs: exit self refresh to commands not requiring a locked DLL" line.long 0x24 "DRAMTMG9,SDRAM Timing Register 9" bitfld.long 0x24 30. " DDR4_WR_PREAMBLE ,DDR4 write preamble mode" "1tck,2tck" bitfld.long 0x24 16.--18. " T_CCD_S ,Minimum time between two reads or two writes for different bank group" "0,1,2,3,4,5,6,7" bitfld.long 0x24 8.--11. " T_RRD_S ,Minimum time between activates from bank a to bank b for different bank group" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x24 0.--5. " WR2RD_S ,Minimum time from write command to read command for different bank group. Includes time for bus turnaround, recovery times, and all per-bank, per-rank, and global constraints" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x28 "DRAMTMG10,SDRAM Timing Register 10" bitfld.long 0x28 16.--20. " T_SYNC_GEAR ,Time between MRS command and the sync pulse time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x28 8.--12. " T_CMD_GEAR ,Sync pulse to first valid command" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x28 2.--3. " T_GEAR_SETUP ,Geardown setup time" ",1,2,3" textline " " bitfld.long 0x28 0.--1. " T_GEAR_HOLD ,Geardown hold time" ",1,2,3" line.long 0x2C "DRAMTMG11,SDRAM Timing Register 11" hexmask.long.byte 0x2C 24.--30. 1. " POST_MPSM_GAP_X32 ,Minimum exit MPSM to commands requiring a locked DLL" bitfld.long 0x2C 16.--20. " T_MPX_LH ,Minimum cs_n low hold time to CKE rising edge" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x2C 8.--9. " T_MPX_S ,Minimum time CS setup time to CKE" "0,1,2,3" textline " " bitfld.long 0x2C 0.--4. " T_CKMPE ,Minimum valid clock requirement after MPSM entry" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x30 "DRAMTMG12,SDRAM Timing Register 12" bitfld.long 0x30 16.--17. " T_CMDCKE ,Delay from valid command to CKE input LOW" "0,1,2,3" bitfld.long 0x30 8.--11. " T_CKEHCMD ,Valid command requirement after CKE input HIGH" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x30 0.--4. " T_MRD_PDA ,Mode register set command cycle time in PDA mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x34 "DRAMTMG13,SDRAM Timing Register 13" hexmask.long.byte 0x34 24.--30. 1. " ODTLOFF ,Latency from CAS-2 command to todtoff reference" bitfld.long 0x34 16.--21. " T_CCD_MW ,Minimum time from write or masked write to masked write command for same bank" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x34 0.--2. " T_PPD ,Minimum time from precharge to precharge command" "0,1,2,3,4,5,6,7" line.long 0x38 "DRAMTMG14,SDRAM Timing Register 14" hexmask.long.word 0x38 0.--11. 1. " T_XSR ,Exit self refresh to any command" group.long 0x180++0x0B line.long 0x00 "ZQCTL0,ZQ Control Register 0" bitfld.long 0x00 31. " DIS_AUTO_ZQ ,Disable umctl2 generation of ZQCS/MPC command" "No,Yes" bitfld.long 0x00 30. " DIS_SRX_ZQCL ,Disable issuing of ZQCL/MPC command at Self-Refresh/SR-Powerdown exit" "No,Yes" bitfld.long 0x00 29. " ZQ_RESISTOR_SHARED ,Denotes that ZQ resistor is shared between ranks" "Not shared,Shared" textline " " bitfld.long 0x00 28. " DIS_MPSMX_ZQCL ,Disable issuing of ZQCL command at maximum power saving mode exit" "No,Yes" hexmask.long.word 0x00 16.--26. 1. " T_ZQ_LONG_NOP ,Number of cycles of NOP required after a ZQCL/MPC command is issued to SDRAM" hexmask.long.word 0x00 0.--9. 1. " T_ZQ_SHORT_NOP ,Number of cycles of NOP required after a ZQCS/MPC command is issued to SDRAM" line.long 0x04 "ZQCTL1,ZQ Control Register 1" hexmask.long.word 0x04 20.--29. 1. " T_ZQ_RESET_NOP ,Number of cycles of NOP required after a zqreset ZQ calibration reset command is issued to SDRAM" hexmask.long.tbyte 0x04 0.--19. 1. " T_ZQ_SHORT_IRV_X1024 ,Average interval to wait between automatically issuing ZQCS ZQ calibration short/mpczq calibration commands" line.long 0x08 "ZQCTL2,ZQ Control Register 2" bitfld.long 0x08 0. " ZQ_RESET ,Trigger a ZQ reset operation" "No effect,Trigger" rgroup.long 0x18C++0x03 line.long 0x00 "ZQSTAT,ZQ Status Register" bitfld.long 0x00 0. " ZQ_RESET_BUSY ,ZQ reset operation is in progress" "Not busy,Busy" group.long 0x190++0x1B line.long 0x00 "DFITMG0,DFI Timing Register 0" bitfld.long 0x00 24.--28. " DFI_T_CTRL_DELAY ,Number of DFI clock cycles after an assertion/de-assertion of the DFI control signals that the control signals at the PHY-DRAM interface reflect the assertion/de-assertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 23. " DFI_RDDATA_USE_SDR ,Defines whether dfi_rddata_en/dfi_rddata/dfi_rddata_valid is generated using HDR or SDR values" "HDR,SDR" bitfld.long 0x00 16.--21. " DFI_T_RDDATA_EN ,Time from the assertion of a read command on the DFI interface to the assertion of the dfi_rddata_en signal" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x00 15. " DFI_WRDATA_USE_SDR ,Defines whether dfi_wrdata_en/dfi_wrdata/dfi_wrdata_mask is generated using HDR or SDR values" "HDR,SDR" bitfld.long 0x00 8.--13. " DFI_TPHY_WRDATA ,Number of clock cycles between when dfi_wrdata_en is asserted to when the write data is driven on the dfi_wrdata signal" "0,1,2,3,4,5,6,7,8,?..." bitfld.long 0x00 0.--5. " DFI_TPHY_WRLAT ,Write latency" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "DFITMG1,DFI Timing Register 1" bitfld.long 0x04 28.--31. " DFI_T_CMD_LAT ,Number of DFI PHY clocks between when the dfi_cs signal is asserted and when the associated command is driven" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 24.--25. " DFI_T_PARIN_LAT ,Number of DFI PHY clocks between when the dfi_cs signal is asserted and when the associated dfi_parity_in signal is driven" "0,1,2,3" bitfld.long 0x04 16.--20. " DFI_T_WRDATA_DELAY ,Number of DFI clocks between when the assertion of dfi_wrdata_en and data transfer completion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x04 8.--11. " DFI_T_DRAM_CLK_DIS ,Number of DFI clock cycles from the assertion of the dfi_dram_clk_dis until the clock to the DRAM memory devices maintains a low value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. " DFI_T_DRAM_CLK_EN ,Number of DFI clock cycles from the de-assertion of the dfi_dram_clk_dis until the first valid rising edge of the clock to the DRAM memory devices" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "DFILPCFG0,DFI Low Power Configuration Register 0" bitfld.long 0x08 24.--27. " DFI_TLP_RESP ,Setting for dfi's tlp_resp time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 20.--23. " DFI_LP_WAKEUP_DPD ,Value to drive on dfi_lp_wakeup signal when deep power down mode is entered" "16 cycles,32 cycles,64 cycles,128 cycles,256 cycles,512 cycles,1024 cycles,2048 cycles,4096 cycles,8192 cycles,16384 cycles,32768 cycles,65536 cycles,131072 cycles,262144 cycles,Unlimited" bitfld.long 0x08 16. " DFI_LP_EN_DPD ,DFI low power interface handshaking during deep power down entry/exit" "Disabled,Enabled" textline " " bitfld.long 0x08 12.--15. " DFI_LP_WAKEUP_SR ,Value to drive on dfi_lp_wakeup signal when self refresh mode is entered" "16 cycles,32 cycles,64 cycles,128 cycles,256 cycles,512 cycles,1024 cycles,2048 cycles,4096 cycles,8192 cycles,16384 cycles,32768 cycles,65536 cycles,131072 cycles,262144 cycles,Unlimited" bitfld.long 0x08 8. " DFI_LP_EN_SR ,DFI low power interface handshaking during self refresh entry/exit" "Disabled,Enabled" bitfld.long 0x08 4.--7. " DFI_LP_WAKEUP_PD ,Value to drive on dfi_lp_wakeup signal when power down mode is entered" "16 cycles,32 cycles,64 cycles,128 cycles,256 cycles,512 cycles,1024 cycles,2048 cycles,4096 cycles,8192 cycles,16384 cycles,32768 cycles,65536 cycles,131072 cycles,262144 cycles,Unlimited" textline " " bitfld.long 0x08 0. " DFI_LP_EN_PD ,Enables DFI low power interface handshaking during power down entry/exit" "Disabled,Enabled" line.long 0x0C "DFILPCFG1,DFI Low Power Configuration Register 1" bitfld.long 0x0C 4.--7. " DFI_LP_WAKEUP_MPSM ,Value to drive on dfi_lp_wakeup signal when maximum power saving mode is entered" "16 cycles,32 cycles,64 cycles,128 cycles,256 cycles,512 cycles,1024 cycles,2048 cycles,4096 cycles,8192 cycles,16384 cycles,32768 cycles,65536 cycles,131072 cycles,262144 cycles,Unlimited" bitfld.long 0x0C 0. " DFI_LP_EN_MPSM ,Enables DFI low power interface handshaking during maximum power saving mode entry/exit" "Disabled,Enabled" textline " " line.long 0x10 "DFIUPD0,DFI Update Register 0" bitfld.long 0x10 31. " DIS_AUTO_CTRLUPD ,Disable the automatic dfi_ctrlupd_req generation by the umctl2" "No,Yes" bitfld.long 0x10 30. " DIS_AUTO_CTRLUPD_SRX ,Disable the automatic dfi_ctrlupd_req generation by the umctl2 following a self-refresh exit" "No,Yes" hexmask.long.word 0x10 16.--25. 1. " DFI_T_CTRLUP_MAX ,Maximum number of clock cycles that the dfi_ctrlupd_req signal can assert" textline " " hexmask.long.word 0x10 0.--9. 1. " DFI_T_CTRLUP_MIN ,Minimum number of clock cycles that the dfi_ctrlupd_req signal must be asserted" line.long 0x14 "DFIUPD1,DFI Update Register 1" hexmask.long.byte 0x14 16.--23. 1. " DFI_T_CTRLUPD_IRV_MIN_X1024 ,Minimum amount of time between umctl2 initiated DFI update requests which is executed whenever the umctl2 is idle" hexmask.long.byte 0x14 0.--7. 1. " DFI_T_CTRLUPD_IRV_MAX_X1024 ,Maximum amount of time between umctl2 initiated DFI update requests" line.long 0x18 "DFIUPD2,DFI Update Register 2" bitfld.long 0x18 31. " DFI_PHYUPD_EN ,Enables the support for acknowledging PHY-initiated updates" "Disabled,Enabled" group.long 0x1B0++0x07 line.long 0x00 "DFIMISC,DFI Miscellaneous Control Register" bitfld.long 0x00 2. " DFI_DATA_CS_POLARITY ,Polarity of dfi_wrdata_cs and dfi_rddata_cs signals" "Active low,Active high" bitfld.long 0x00 1. " PHY_DBI_MODE ,DBI implemented in DDRC or PHY" "DDRC,PHY" bitfld.long 0x00 0. " DFI_INIT_COMPLETE_EN ,PHY initialization complete enable signal" "Disabled,Enabled" line.long 0x04 "DFITMG2,DFI Timing Register 2" bitfld.long 0x04 8.--13. " DFI_TPHY_RDCSLAT ,Number of clocks between when a read command is sent on the DFI and when the associated dfi_rddata_cs signal is asserted" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 0.--5. " DFI_TPHY_WRCSLAT ,Number of clocks between when a write command is sent on the DFI and when the associated dfi_wrdata_cs signal is asserted" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x1C0++0x03 line.long 0x00 "DBICTL,DM/DBI Control Register" bitfld.long 0x00 2. " RD_DBI_EN ,Read DBI enable signal in DDRC" "Disabled,Enabled" bitfld.long 0x00 1. " WR_DBI_EN ,Write DBI enable signal in DDRC" "Disabled,Enabled" bitfld.long 0x00 0. " DM_EN ,DM enable signal in DDRC" "Disabled,Enabled" textline " " group.long 0x200++0x07 line.long 0x00 "ADDRMAP0,Address Map Register 0" bitfld.long 0x00 0.--4. " ADDRMAP_CS_BIT0 ,Selects the HIF address bit used as rank address bit 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,,,,0" line.long 0x04 "ADDRMAP1,Address Map Register 1" bitfld.long 0x04 16.--20. " ADDRMAP_BANK_B2 ,Selects the HIF address bit used as bank address bit 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,,0" bitfld.long 0x04 8.--12. " ADDRMAP_BANK_B1 ,Selects the HIF address bits used as bank address bit 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,?..." bitfld.long 0x04 0.--4. " ADDRMAP_BANK_B0 ,Selects the HIF address bits used as bank address bit 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,?..." if (((d.l(ad:0xFD070000))&0x3000)==0x00) group.long 0x208++0x03 line.long 0x00 "ADDRMAP2,Address Map Register 2" bitfld.long 0x00 24.--27. " ADDRMAP_COL_B5 ,HIF address bit used as column address bit 5" "0,1,2,3,4,5,6,7,,,,,,,,0" bitfld.long 0x00 16.--19. " ADDRMAP_COL_B4 ,HIF address bit used as column address bit 4" "0,1,2,3,4,5,6,7,,,,,,,,0" bitfld.long 0x00 8.--11. " ADDRMAP_COL_B3 ,HIF address bit used as column address bit 3" "0,1,2,3,4,5,6,7,?..." textline " " bitfld.long 0x00 0.--3. " ADDRMAP_COL_B2 ,HIF address bit used as column address bit 2" "0,1,2,3,4,5,6,7,?..." elif (((d.l(ad:0xFD070000))&0x3000)==0x1000) group.long 0x208++0x03 line.long 0x00 "ADDRMAP2,Address Map Register 2" bitfld.long 0x00 24.--27. " ADDRMAP_COL_B5 ,HIF address bit used as column address bit 6" "0,1,2,3,4,5,6,7,,,,,,,,0" bitfld.long 0x00 16.--19. " ADDRMAP_COL_B4 ,HIF address bit used as column address bit 5" "0,1,2,3,4,5,6,7,,,,,,,,0" bitfld.long 0x00 8.--11. " ADDRMAP_COL_B3 ,HIF address bit used as column address bit 4" "0,1,2,3,4,5,6,7,?..." textline " " bitfld.long 0x00 0.--3. " ADDRMAP_COL_B2 ,HIF address bit used as column address bit 3" "0,1,2,3,4,5,6,7,?..." else group.long 0x208++0x03 line.long 0x00 "ADDRMAP2,Address Map Register 2" bitfld.long 0x00 24.--27. " ADDRMAP_COL_B5 ,HIF address bit used as column address bit 7" "0,1,2,3,4,5,6,7,,,,,,,,0" bitfld.long 0x00 16.--19. " ADDRMAP_COL_B4 ,HIF address bit used as column address bit 6" "0,1,2,3,4,5,6,7,,,,,,,,0" bitfld.long 0x00 8.--11. " ADDRMAP_COL_B3 ,HIF address bit used as column address bit 5" "0,1,2,3,4,5,6,7,?..." textline " " bitfld.long 0x00 0.--3. " ADDRMAP_COL_B2 ,HIF address bit used as column address bit 4" "0,1,2,3,4,5,6,7,?..." endif if (((d.l(ad:0xFD070000))&0x3000)==0x00) group.long 0x20C++0x03 line.long 0x00 "ADDRMAP3,Address Map Register 3" bitfld.long 0x00 24.--27. " ADDRMAP_COL_B9 ,HIF address bit used as column address bit 9" "0,1,2,3,4,5,6,7,,,,,,,,0" bitfld.long 0x00 16.--19. " ADDRMAP_COL_B8 ,HIF address bit used as column address bit 8" "0,1,2,3,4,5,6,7,,,,,,,,0" bitfld.long 0x00 8.--11. " ADDRMAP_COL_B7 ,HIF address bit used as column address bit 7" "0,1,2,3,4,5,6,7,,,,,,,,0" textline " " bitfld.long 0x00 0.--3. " ADDRMAP_COL_B6 ,HIF address bit used as column address bit 6" "0,1,2,3,4,5,6,7,,,,,,,,0" elif (((d.l(ad:0xFD070000))&0x3000)==0x1000) group.long 0x20C++0x03 line.long 0x00 "ADDRMAP3,Address Map Register 3" bitfld.long 0x00 24.--27. " ADDRMAP_COL_B9 ,HIF address bit used as column address bit 11" "0,1,2,3,4,5,6,7,,,,,,,,0" bitfld.long 0x00 16.--19. " ADDRMAP_COL_B8 ,HIF address bit used as column address bit 9" "0,1,2,3,4,5,6,7,,,,,,,,0" bitfld.long 0x00 8.--11. " ADDRMAP_COL_B7 ,HIF address bit used as column address bit 8" "0,1,2,3,4,5,6,7,,,,,,,,0" textline " " bitfld.long 0x00 0.--3. " ADDRMAP_COL_B6 ,HIF address bit used as column address bit 7" "0,1,2,3,4,5,6,7,,,,,,,,0" else group.long 0x20C++0x03 line.long 0x00 "ADDRMAP3,Address Map Register 3" bitfld.long 0x00 24.--27. " ADDRMAP_COL_B9 ,HIF address bit used as column address bit 13" "0,1,2,3,4,5,6,7,,,,,,,,0" bitfld.long 0x00 16.--19. " ADDRMAP_COL_B8 ,HIF address bit used as column address bit 11" "0,1,2,3,4,5,6,7,,,,,,,,0" bitfld.long 0x00 8.--11. " ADDRMAP_COL_B7 ,HIF address bit used as column address bit 9" "0,1,2,3,4,5,6,7,,,,,,,,0" textline " " bitfld.long 0x00 0.--3. " ADDRMAP_COL_B6 ,HIF address bit used as column address bit 8" "0,1,2,3,4,5,6,7,,,,,,,,0" endif if (((d.l(ad:0xFD070000))&0x3000)==0x00) group.long 0x210++0x03 line.long 0x00 "ADDRMAP4,Address Map Register 4" bitfld.long 0x00 8.--11. " ADDRMAP_COL_B11 ,HIF address bit used as column address bit 13" "0,1,2,3,4,5,6,7,,,,,,,,0" bitfld.long 0x00 0.--3. " ADDRMAP_COL_B10 ,HIF address bit used as column address bit 11" "0,1,2,3,4,5,6,7,,,,,,,,0" elif (((d.l(ad:0xFD070000))&0x3000)==0x1000) group.long 0x210++0x03 line.long 0x00 "ADDRMAP4,Address Map Register 4" bitfld.long 0x00 0.--3. " ADDRMAP_COL_B10 ,HIF address bit used as column address bit 13" "0,1,2,3,4,5,6,7,,,,,,,,0" else hgroup.long 0x210++0x03 hide.long 0x00 "ADDRMAP4,Address Map Register 4" endif group.long 0x214++0x1B line.long 0x00 "ADDRMAP5,Address Map Register 5" bitfld.long 0x00 24.--27. " ADDRMAP_ROW_B11 ,HIF address bit used as row address bit 11" "0,1,2,3,4,5,6,7,8,9,10,11,,,,0" bitfld.long 0x00 16.--19. " ADDRMAP_ROW_B2_10 ,HIF address bits used as row address bits 2 to 10" "0,1,2,3,4,5,6,7,8,9,10,11,,,,15" bitfld.long 0x00 8.--11. " ADDRMAP_ROW_B1 ,HIF address bits used as row address bit 1" "0,1,2,3,4,5,6,7,8,9,10,11,?..." textline " " bitfld.long 0x00 0.--3. " ADDRMAP_ROW_B0 ,HIF address bits used as row address bit 0" "0,1,2,3,4,5,6,7,8,9,10,11,?..." line.long 0x04 "ADDRMAP6,Address Map Register 6" bitfld.long 0x04 31. " LPDDR3_6GB_12GB ,LPDDR3 SDRAM 6gb or 12gb device in use" "Unused,In use" bitfld.long 0x04 24.--27. " ADDRMAP_ROW_B15 ,HIF address bit used as row address bit 15" "0,1,2,3,4,5,6,7,8,9,10,11,,,,0" bitfld.long 0x04 16.--19. " ADDRMAP_ROW_B14 ,HIF address bit used as row address bit 14" "0,1,2,3,4,5,6,7,8,9,10,11,,,,0" textline " " bitfld.long 0x04 8.--11. " ADDRMAP_ROW_B13 ,HIF address bit used as row address bit 13" "0,1,2,3,4,5,6,7,8,9,10,11,,,,0" bitfld.long 0x04 0.--3. " ADDRMAP_ROW_B12 ,HIF address bit used as row address bit 12" "0,1,2,3,4,5,6,7,8,9,10,11,,,,0" line.long 0x08 "ADDRMAP7,Address Map Register 7" bitfld.long 0x08 8.--11. " ADDRMAP_ROW_B17 ,HIF address bit used as row address bit 17" "0,1,2,3,4,5,6,7,8,9,10,11,,,,0" bitfld.long 0x08 0.--3. " ADDRMAP_ROW_B16 ,HIF address bit used as row address bit 16" "0,1,2,3,4,5,6,7,8,9,10,11,,,,0" line.long 0x0C "ADDRMAP8,Address Map Register 8" bitfld.long 0x0C 8.--12. " ADDRMAP_BG_B1 ,HIF address bits used as bank group address bit 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,0" bitfld.long 0x0C 0.--4. " ADDRMAP_BG_B0 ,HIF address bits used as bank group address bit 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,?..." line.long 0x10 "ADDRMAP9,Address Map Register 9" bitfld.long 0x10 24.--27. " ADDRMAP_ROW_B5 ,HIF address bits used as row address bit 5" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x10 16.--19. " ADDRMAP_ROW_B4 ,HIF address bits used as row address bit 4" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x10 8.--11. " ADDRMAP_ROW_B3 ,HIF address bits used as row address bit 3" "0,1,2,3,4,5,6,7,8,9,10,11,?..." textline " " bitfld.long 0x10 0.--3. " ADDRMAP_ROW_B2 ,HIF address bits used as row address bit 2" "0,1,2,3,4,5,6,7,8,9,10,11,?..." line.long 0x14 "ADDRMAP10,Address Map Register 10" bitfld.long 0x14 24.--27. " ADDRMAP_ROW_B9 ,HIF address bits used as row address bit 9" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x14 16.--19. " ADDRMAP_ROW_B8 ,HIF address bits used as row address bit 8" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x14 8.--11. " ADDRMAP_ROW_B7 ,HIF address bits used as row address bit 7" "0,1,2,3,4,5,6,7,8,9,10,11,?..." textline " " bitfld.long 0x14 0.--3. " ADDRMAP_ROW_B6 ,HIF address bits used as row address bit 6" "0,1,2,3,4,5,6,7,8,9,10,11,?..." line.long 0x18 "ADDRMAP11,Address Map Register 11" bitfld.long 0x18 0.--3. " ADDRMAP_ROW_B10 ,Selects the HIF address bits used as row address bit 10" "0,1,2,3,4,5,6,7,8,9,10,11,?..." group.long 0x240++0x07 line.long 0x00 "ODTCFG,ODT Configuration Register" bitfld.long 0x00 24.--27. " WR_ODT_HOLD ,Cycles to hold ODT for a write command" ",,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--20. " WR_ODT_DELAY ,The delay from issuing a write command to setting ODT values associated with that command" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--11. " RD_ODT_HOLD ,Cycles to hold ODT for a read command" ",,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 2.--6. " RD_ODT_DELAY ,The delay from issuing a read command to setting ODT values associated with that command" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x04 "ODTMAP,Odt/rank Map Register" bitfld.long 0x04 12.--13. " RANK1_RD_ODT ,Which remote odts must be turned on during a read from rank 1" "0,1,2,3" bitfld.long 0x04 8.--9. " RANK1_WR_ODT ,Which remote odts must be turned on during a write to rank 1" "0,1,2,3" bitfld.long 0x04 4.--5. " RANK0_RD_ODT ,Which remote odts must be turned on during a read from rank 0" "0,1,2,3" textline " " bitfld.long 0x04 0.--1. " RANK0_WR_ODT ,Which remote odts must be turned on during a write to rank 0" "0,1,2,3" group.long 0x250++0x07 line.long 0x00 "SCHED,Scheduler Control Register" hexmask.long.byte 0x00 24.--30. 1. " RDWR_IDLE_GAP ,Read write idle gap" bitfld.long 0x00 8.--13. " LPR_NUM_ENTRIES ,Number of entries in the low priority transaction store" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64" bitfld.long 0x00 2. " PAGECLOSE ,Bank is kept open only while there are page hit transactions available in the CAM to that bank" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " PREFER_WRITE ,Prefer writes over reads" "Disabled,Enabled" bitfld.long 0x00 0. " FORCE_LOW_PRI_N ,Force all incoming transactions are to low priority" "Enabled,Disabled" line.long 0x04 "SCHED1,Scheduler Control Register 1" hexmask.long.byte 0x04 0.--7. 1. " PAGECLOSE_TIMER ,Pageclose timer" group.long 0x25C++0x03 line.long 0x00 "PERFHPR1,High Priority Read CAM Register 1" hexmask.long.byte 0x00 24.--31. 1. " HPR_XACT_RUN_LENGTH ,Number of transactions that are serviced once the HPR queue goes critical" hexmask.long.word 0x00 0.--15. 1. " HPR_MAX_STARVE ,Number of clocks that the HPR queue can be starved before it goes critical" group.long 0x264++0x03 line.long 0x00 "PERFLPR1,Low Priority Read CAM Register 1" hexmask.long.byte 0x00 24.--31. 1. " LPR_XACT_RUN_LENGTH ,Number of transactions that are serviced once the LPR queue goes critical" hexmask.long.word 0x00 0.--15. 1. " LPR_MAX_STARVE ,Number of clocks that the LPR queue can be starved before it goes critical" group.long 0x26C++0x03 line.long 0x00 "PERFWR1,Write CAM Register 1" hexmask.long.byte 0x00 24.--31. 1. " W_XACT_RUN_LENGTH ,Number of transactions that are serviced once the WR queue goes critical" hexmask.long.word 0x00 0.--15. 1. " W_MAX_STARVE ,Number of clocks that the WR queue can be starved before it goes critical" group.long 0x274++0x07 line.long 0x00 "PERFVPR1,Variable Priority Read CAM Register 1" hexmask.long.word 0x00 0.--10. 1. " VPR_TIMEOUT_RANGE ,Indicates the range of the timeout value that is used for grouping the expired VPR commands in the CAM in DDRC" line.long 0x04 "PERFVPW1,Variable Priority Write CAM Register 1" hexmask.long.word 0x04 0.--10. 1. " VPW_TIMEOUT_RANGE ,Indicates the range of the timeout value that is used for grouping the expired VPW commands in the CAM in DDRC" textline " " group.long 0x280++0x17 line.long 0x00 "DQMAP0,DQ Map Register 0" hexmask.long.byte 0x00 24.--31. 1. " DQ_NIBBLE_MAP_12_15 ,DQ nibble map for DQ bits [12-15]" hexmask.long.byte 0x00 16.--23. 1. " DQ_NIBBLE_MAP_8_11 ,DQ nibble map for DQ bits [8-11]" hexmask.long.byte 0x00 8.--15. 1. " DQ_NIBBLE_MAP_4_7 ,DQ nibble map for DQ bits [4-7]" textline " " hexmask.long.byte 0x00 0.--7. 1. " DQ_NIBBLE_MAP_0_3 ,DQ nibble map for DQ bits [0-3]" line.long 0x04 "DQMAP1,DQ Map Register 1" hexmask.long.byte 0x04 24.--31. 1. " DQ_NIBBLE_MAP_28_31 ,DQ nibble map for DQ bits [28-31]" hexmask.long.byte 0x04 16.--23. 1. " DQ_NIBBLE_MAP_24_27 ,DQ nibble map for DQ bits [24-27]" hexmask.long.byte 0x04 8.--15. 1. " DQ_NIBBLE_MAP_20_23 ,DQ nibble map for DQ bits [20-23]" textline " " hexmask.long.byte 0x04 0.--7. 1. " DQ_NIBBLE_MAP_16_19 ,DQ nibble map for DQ bits [16-19]" line.long 0x08 "DQMAP2,DQ Map Register 2" hexmask.long.byte 0x08 24.--31. 1. " DQ_NIBBLE_MAP_44_47 ,DQ nibble map for DQ bits [44-47]" hexmask.long.byte 0x08 16.--23. 1. " DQ_NIBBLE_MAP_40_43 ,DQ nibble map for DQ bits [40-43]" hexmask.long.byte 0x08 8.--15. 1. " DQ_NIBBLE_MAP_36_39 ,DQ nibble map for DQ bits [36-39]" textline " " hexmask.long.byte 0x08 0.--7. 1. " DQ_NIBBLE_MAP_32_35 ,DQ nibble map for DQ bits [32-35]" line.long 0x0C "DQMAP3,DQ Map Register 3" hexmask.long.byte 0x0C 24.--31. 1. " DQ_NIBBLE_MAP_60_63 ,DQ nibble map for DQ bits [60-63]" hexmask.long.byte 0x0C 16.--23. 1. " DQ_NIBBLE_MAP_56_59 ,DQ nibble map for DQ bits [56-59]" hexmask.long.byte 0x0C 8.--15. 1. " DQ_NIBBLE_MAP_52_55 ,DQ nibble map for DQ bits [52-55]" textline " " hexmask.long.byte 0x0C 0.--7. 1. " DQ_NIBBLE_MAP_48_51 ,DQ nibble map for DQ bits [48-51]" line.long 0x10 "DQMAP4,DQ Map Register 4" hexmask.long.byte 0x10 8.--15. 1. " DQ_NIBBLE_MAP_CB_4_7 ,DQ nibble map for DIMM ECC check bits [4-7]" hexmask.long.byte 0x10 0.--7. 1. " DQ_NIBBLE_MAP_CB_0_3 ,DQ nibble map for DIMM ECC check bits [0-3]" line.long 0x14 "DQMAP5,DQ Map Register 5" bitfld.long 0x14 0. " DIS_DQ_RANK_SWAP ,Disable rank based DQ swapping" "No,Yes" group.long 0x300++0x07 line.long 0x00 "DBG0,Debug Register 0" bitfld.long 0x00 4. " DIS_COLLISION_PAGE_OPT ,Disable auto-precharge for the flushed command in a collision case" "No,Yes" bitfld.long 0x00 0. " DIS_WC ,Disable write combine" "No,Yes" line.long 0x04 "DBG1,Debug Register 1" bitfld.long 0x04 1. " DIS_HIF ,Assert the HIF command signal hif_cmd_stall" "No,Yes" bitfld.long 0x04 0. " DIS_DQ ,CAM transactions de-queue disable" "No,Yes" rgroup.long 0x308++0x03 line.long 0x00 "DBGCAM,CAM Debug Register" bitfld.long 0x00 31. " DBG_STALL_RD ,Stall for read channel" "No stall,Stall" bitfld.long 0x00 30. " DBG_STALL_WR ,Stall for write channel" "No stall,Stall" bitfld.long 0x00 29. " WR_DATA_PIPELINE_EMPTY ,Write data pipeline on the DFI interface is empty" "Not empty,Empty" textline " " bitfld.long 0x00 28. " RD_DATA_PIPELINE_EMPTY ,Read data pipeline on the DFI interface is empty" "Not empty,Empty" bitfld.long 0x00 26. " DBG_WR_Q_EMPTY ,All the write command queues and write data buffers inside DDRC are empty" "Not empty,Empty" bitfld.long 0x00 25. " DBG_RD_Q_EMPTY ,All the read command queues and read data buffers inside DDRC are empty" "Not empty,Empty" textline " " bitfld.long 0x00 24. " DBG_STALL ,Stall" "No stall,Stall" hexmask.long.byte 0x00 16.--22. 1. " DBG_W_Q_DEPTH ,Write queue depth" hexmask.long.byte 0x00 8.--14. 1. " DBG_LPR_Q_DEPTH ,Low priority read queue depth" textline " " hexmask.long.byte 0x00 0.--6. 1. " DBG_HPR_Q_DEPTH ,High priority read queue depth" group.long 0x30C++0x03 line.long 0x00 "DBGCMD,Command Debug Register" bitfld.long 0x00 31. " HW_REF_ZQ_EN ,Allows refresh and ZQCS commands to be triggered from hardware via the ios ext_*" "Software,Hardware" bitfld.long 0x00 5. " CTRLUPD ,Indicates to the umctl2 to issue a dfi_ctrlupd_req to the PHY" "No effect,Issued" bitfld.long 0x00 4. " ZQ_CALIB_SHORT ,Indicates to the umctl2 to issue a ZQCS ZQ calibration short/mpczq calibration command to the SDRAM" "No effect,Issued" textline " " bitfld.long 0x00 1. " RANK1_REFRESH ,Indicates to the umctl2 to issue a refresh to rank 1" "No effect,Issued" bitfld.long 0x00 0. " RANK0_REFRESH ,Indicates to the umctl2 to issue a refresh to rank 0" "No effect,Issued" rgroup.long 0x310++0x03 line.long 0x00 "DBGSTAT,Status Debug Register" bitfld.long 0x00 5. " CTRLUPD_BUSY ,Ctrlupd busy signal" "Not busy,Busy" bitfld.long 0x00 4. " ZQ_CALIB_SHORT_BUSY ,ZQCS busy signal" "Not busy,Busy" bitfld.long 0x00 1. " RANK1_REF_BUSY ,Rank1_refresh busy signal" "Not busy,Busy" textline " " bitfld.long 0x00 0. " RANK0_REF_BUSY ,Rank0_refresh busy signal" "Not busy,Busy" group.long 0x320++0x07 line.long 0x00 "SWCTL,Software Register Programming Control Enable" bitfld.long 0x00 0. " SW_DONE ,Enable quasi-dynamic register programming outside reset" "Disabled,Enabled" line.long 0x04 "SWSTAT,Software Register Programming Control Status" bitfld.long 0x04 0. " SW_DONE_ACK ,Register programming done" "Not done,Done" group.long 0x36C++0x03 line.long 0x00 "POISONCFG,AXI Poison Configuration Register" eventfld.long 0x00 24. " RD_POISON_INTR_CLR ,Interrupt clear for read transaction poisoning" "No effect,Clear" bitfld.long 0x00 20. " RD_POISON_INTR_EN ,Enable interrupts for read transaction poisoning" "Disabled,Enabled" bitfld.long 0x00 16. " RD_POISON_SLVERR_EN ,Enable SLVERR response for read transaction poisoning" "Disabled,Enabled" textline " " eventfld.long 0x00 8. " WR_POISON_INTR_CLR ,Interrupt clear for write transaction poisoning" "No effect,Clear" bitfld.long 0x00 4. " WR_POISON_INTR_EN ,Enable interrupts for write transaction poisoning" "Disabled,Enabled" bitfld.long 0x00 0. " WR_POISON_SLVERR_EN ,Enable SLVERR response for write transaction poisoning" "Disabled,Enabled" rgroup.long 0x370++0x03 line.long 0x00 "POISONSTAT,AXI Poison Status Register" bitfld.long 0x00 21. " RD_POISON_INTR_5 ,Read transaction poisoning error interrupt on input for port 5" "No interrupt,Interrupt" bitfld.long 0x00 20. " RD_POISON_INTR_4 ,Read transaction poisoning error interrupt on input for port 4" "No interrupt,Interrupt" bitfld.long 0x00 19. " RD_POISON_INTR_3 ,Read transaction poisoning error interrupt on input for port 3" "No interrupt,Interrupt" textline " " bitfld.long 0x00 18. " RD_POISON_INTR_2 ,Read transaction poisoning error interrupt on input for port 2" "No interrupt,Interrupt" bitfld.long 0x00 17. " RD_POISON_INTR_1 ,Read transaction poisoning error interrupt on input for port 1" "No interrupt,Interrupt" bitfld.long 0x00 16. " RD_POISON_INTR_0 ,Read transaction poisoning error interrupt on input for port 0" "No interrupt,Interrupt" textline " " bitfld.long 0x00 5. " WR_POISON_INTR_5 ,Write transaction poisoning error interrupt on input for port 5" "No interrupt,Interrupt" bitfld.long 0x00 4. " WR_POISON_INTR_4 ,Write transaction poisoning error interrupt on input for port 4" "No interrupt,Interrupt" bitfld.long 0x00 3. " WR_POISON_INTR_3 ,Write transaction poisoning error interrupt on input for port 3" "No interrupt,Interrupt" textline " " bitfld.long 0x00 2. " WR_POISON_INTR_2 ,Write transaction poisoning error interrupt on input for port 2" "No interrupt,Interrupt" bitfld.long 0x00 1. " WR_POISON_INTR_1 ,Write transaction poisoning error interrupt on input for port 1" "No interrupt,Interrupt" bitfld.long 0x00 0. " WR_POISON_INTR_0 ,Write transaction poisoning error interrupt on input for port 0" "No interrupt,Interrupt" rgroup.long 0x3FC++0x03 line.long 0x00 "PSTAT,Port Status Register" bitfld.long 0x00 21. " WR_PORT_BUSY_5 ,Indicates if there are outstanding writes for port 5" "Not busy,Busy" bitfld.long 0x00 20. " WR_PORT_BUSY_4 ,Indicates if there are outstanding writes for port 4" "Not busy,Busy" bitfld.long 0x00 19. " WR_PORT_BUSY_3 ,Indicates if there are outstanding writes for port 3" "Not busy,Busy" textline " " bitfld.long 0x00 18. " WR_PORT_BUSY_2 ,Indicates if there are outstanding writes for port 2" "Not busy,Busy" bitfld.long 0x00 17. " WR_PORT_BUSY_1 ,Indicates if there are outstanding writes for port 1" "Not busy,Busy" bitfld.long 0x00 16. " WR_PORT_BUSY_0 ,Indicates if there are outstanding writes for port 0" "Not busy,Busy" textline " " bitfld.long 0x00 5. " RD_PORT_BUSY_5 ,Indicates if there are outstanding reads for port 5" "Not busy,Busy" bitfld.long 0x00 4. " RD_PORT_BUSY_4 ,Indicates if there are outstanding reads for port 4" "Not busy,Busy" bitfld.long 0x00 3. " RD_PORT_BUSY_3 ,Indicates if there are outstanding reads for port 3" "Not busy,Busy" textline " " bitfld.long 0x00 2. " RD_PORT_BUSY_2 ,Indicates if there are outstanding reads for port 2" "Not busy,Busy" bitfld.long 0x00 1. " RD_PORT_BUSY_1 ,Indicates if there are outstanding reads for port 1" "Not busy,Busy" bitfld.long 0x00 0. " RD_PORT_BUSY_0 ,Indicates if there are outstanding reads for port 0" "Not busy,Busy" group.long 0x400++0x03 line.long 0x00 "PCCFG,Port Common Configuration Register" bitfld.long 0x00 8. " BL_EXP_MODE ,Burst length expansion mode" "Full,Half" bitfld.long 0x00 4. " PAGEMATCH_LIMIT ,Page match four limit" "Disabled,Enabled" bitfld.long 0x00 0. " GO2CRITICAL_EN ,Co_gs_go2critical_wr and co_gs_go2critical_lpr/co_gs_go2critical_hpr signals value" "Disabled,Enabled" group.long 0x404++0x07 "Port 0" line.long 0x00 "PCFGR_0,Port 0 Configuration Read Register" bitfld.long 0x00 14. " RD_PORT_PAGEMATCH_EN ,Page match enable" "Disabled,Enabled" bitfld.long 0x00 13. " RD_PORT_URGENT_EN ,AXI urgent sideband signal arurgent enable" "Disabled,Enabled" bitfld.long 0x00 12. " RD_PORT_AGING_EN ,Aging function for the read channel of the port enable" "Disabled,Enabled" textline " " hexmask.long.word 0x00 0.--9. 1. " RD_PORT_PRIORITY ,Initial load value of read aging counters" line.long 0x04 "PCFGW_0,Port 0 Configuration Write Register" bitfld.long 0x04 14. " WR_PORT_PAGEMATCH_EN ,Page match enable" "Disabled,Enabled" bitfld.long 0x04 13. " WR_PORT_URGENT_EN ,AXI urgent sideband signal awurgent enable" "Disabled,Enabled" bitfld.long 0x04 12. " WR_PORT_AGING_EN ,Aging function for the write channel of the port enable" "Disabled,Enabled" textline " " hexmask.long.word 0x04 0.--9. 1. " WR_PORT_PRIORITY ,Initial load value of write aging counters" group.long (0x404+0x8C)++0x13 line.long 0x00 "PCFGW_0,Port 0 Control Register" bitfld.long 0x00 0. " PORT_EN ,Port 0 enable" "Disabled,Enabled" line.long 0x04 "PCFGQOS0_0,Port 0 Read Qos Configuration Register 0" bitfld.long 0x04 20.--21. " RQOS_MAP_REGION1 ,Traffic class of region 1" "LPR,VPR,HPR,?..." bitfld.long 0x04 16.--17. " RQOS_MAP_REGION0 ,Traffic class of region 0" "LPR,VPR,HPR,?..." bitfld.long 0x04 0.--3. " RQOS_MAP_LEVEL1 ,Separation level1 indicating the end of region0 mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,?..." line.long 0x08 "PCFGQOS1_0,Port 0 Read Qos Configuration Register 1" hexmask.long.word 0x08 16.--26. 1. " RQOS_MAP_TIMEOUTR ,Timeout value for transactions mapped to the red address queue" hexmask.long.word 0x08 0.--10. 1. " RQOS_MAP_TIMEOUTB ,Timeout value for transactions mapped to the blue address queue" line.long 0x0C "PCFGWQOS0_0,Port 0 Write Qos Configuration Register 0" bitfld.long 0x0C 20.--21. " WQOS_MAP_REGION1 ,Traffic class of region 1" "NPW,VPW,?..." bitfld.long 0x0C 16.--17. " WQOS_MAP_REGION0 ,Traffic class of region 0" "NPW,VPW,?..." bitfld.long 0x0C 0.--3. " WQOS_MAP_LEVEL ,Separation level indicating the end of region0 mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,?..." line.long 0x10 "PCFGWQOS1_0,Port 0 Write Qos Configuration Register 1" hexmask.long.word 0x10 0.--10. 1. " WQOS_MAP_TIMEOUT ,Specifies the timeout value for write transactions" group.long 0x4B4++0x07 "Port 1" line.long 0x00 "PCFGR_1,Port 1 Configuration Read Register" bitfld.long 0x00 14. " RD_PORT_PAGEMATCH_EN ,Page match enable" "Disabled,Enabled" bitfld.long 0x00 13. " RD_PORT_URGENT_EN ,AXI urgent sideband signal arurgent enable" "Disabled,Enabled" bitfld.long 0x00 12. " RD_PORT_AGING_EN ,Aging function for the read channel of the port enable" "Disabled,Enabled" textline " " hexmask.long.word 0x00 0.--9. 1. " RD_PORT_PRIORITY ,Initial load value of read aging counters" line.long 0x04 "PCFGW_1,Port 1 Configuration Write Register" bitfld.long 0x04 14. " WR_PORT_PAGEMATCH_EN ,Page match enable" "Disabled,Enabled" bitfld.long 0x04 13. " WR_PORT_URGENT_EN ,AXI urgent sideband signal awurgent enable" "Disabled,Enabled" bitfld.long 0x04 12. " WR_PORT_AGING_EN ,Aging function for the write channel of the port enable" "Disabled,Enabled" textline " " hexmask.long.word 0x04 0.--9. 1. " WR_PORT_PRIORITY ,Initial load value of write aging counters" group.long (0x4B4+0x8C)++0x13 line.long 0x00 "PCFGW_1,Port 1 Control Register" bitfld.long 0x00 0. " PORT_EN ,Port 1 enable" "Disabled,Enabled" line.long 0x04 "PCFGQOS0_1,Port 1 Read Qos Configuration Register 0" bitfld.long 0x04 24.--25. " RQOS_MAP_REGION2 ,Traffic class of region 1" "LPR,HPR,?..." bitfld.long 0x04 20.--21. " RQOS_MAP_REGION1 ,Traffic class of region 1" "LPR,VPR,HPR,?..." bitfld.long 0x04 16.--17. " RQOS_MAP_REGION0 ,Traffic class of region 0" "LPR,VPR,HPR,?..." textline " " bitfld.long 0x04 8.--11. " RQOS_MAP_LEVEL2 ,Separation level2 indicating the end of region1 mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,?..." bitfld.long 0x04 0.--3. " RQOS_MAP_LEVEL1 ,Separation level1 indicating the end of region0 mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,?..." line.long 0x08 "PCFGQOS1_1,Port 1 Read Qos Configuration Register 1" hexmask.long.word 0x08 16.--26. 1. " RQOS_MAP_TIMEOUTR ,Timeout value for transactions mapped to the red address queue" hexmask.long.word 0x08 0.--10. 1. " RQOS_MAP_TIMEOUTB ,Timeout value for transactions mapped to the blue address queue" line.long 0x0C "PCFGWQOS0_1,Port 1 Write Qos Configuration Register 0" bitfld.long 0x0C 20.--21. " WQOS_MAP_REGION1 ,Traffic class of region 1" "NPW,VPW,?..." bitfld.long 0x0C 16.--17. " WQOS_MAP_REGION0 ,Traffic class of region 0" "NPW,VPW,?..." bitfld.long 0x0C 0.--3. " WQOS_MAP_LEVEL ,Separation level indicating the end of region0 mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,?..." line.long 0x10 "PCFGWQOS1_1,Port 1 Write Qos Configuration Register 1" hexmask.long.word 0x10 0.--10. 1. " WQOS_MAP_TIMEOUT ,Specifies the timeout value for write transactions" group.long 0x564++0x07 "Port 2" line.long 0x00 "PCFGR_2,Port 2 Configuration Read Register" bitfld.long 0x00 14. " RD_PORT_PAGEMATCH_EN ,Page match enable" "Disabled,Enabled" bitfld.long 0x00 13. " RD_PORT_URGENT_EN ,AXI urgent sideband signal arurgent enable" "Disabled,Enabled" bitfld.long 0x00 12. " RD_PORT_AGING_EN ,Aging function for the read channel of the port enable" "Disabled,Enabled" textline " " hexmask.long.word 0x00 0.--9. 1. " RD_PORT_PRIORITY ,Initial load value of read aging counters" line.long 0x04 "PCFGW_2,Port 2 Configuration Write Register" bitfld.long 0x04 14. " WR_PORT_PAGEMATCH_EN ,Page match enable" "Disabled,Enabled" bitfld.long 0x04 13. " WR_PORT_URGENT_EN ,AXI urgent sideband signal awurgent enable" "Disabled,Enabled" bitfld.long 0x04 12. " WR_PORT_AGING_EN ,Aging function for the write channel of the port enable" "Disabled,Enabled" textline " " hexmask.long.word 0x04 0.--9. 1. " WR_PORT_PRIORITY ,Initial load value of write aging counters" group.long (0x564+0x8C)++0x13 line.long 0x00 "PCFGW_2,Port 2 Control Register" bitfld.long 0x00 0. " PORT_EN ,Port 2 enable" "Disabled,Enabled" line.long 0x04 "PCFGQOS0_2,Port 2 Read Qos Configuration Register 0" bitfld.long 0x04 24.--25. " RQOS_MAP_REGION2 ,Traffic class of region 1" "LPR,HPR,?..." bitfld.long 0x04 20.--21. " RQOS_MAP_REGION1 ,Traffic class of region 1" "LPR,VPR,HPR,?..." bitfld.long 0x04 16.--17. " RQOS_MAP_REGION0 ,Traffic class of region 0" "LPR,VPR,HPR,?..." textline " " bitfld.long 0x04 8.--11. " RQOS_MAP_LEVEL2 ,Separation level2 indicating the end of region1 mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,?..." bitfld.long 0x04 0.--3. " RQOS_MAP_LEVEL1 ,Separation level1 indicating the end of region0 mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,?..." line.long 0x08 "PCFGQOS1_2,Port 2 Read Qos Configuration Register 1" hexmask.long.word 0x08 16.--26. 1. " RQOS_MAP_TIMEOUTR ,Timeout value for transactions mapped to the red address queue" hexmask.long.word 0x08 0.--10. 1. " RQOS_MAP_TIMEOUTB ,Timeout value for transactions mapped to the blue address queue" line.long 0x0C "PCFGWQOS0_2,Port 2 Write Qos Configuration Register 0" bitfld.long 0x0C 20.--21. " WQOS_MAP_REGION1 ,Traffic class of region 1" "NPW,VPW,?..." bitfld.long 0x0C 16.--17. " WQOS_MAP_REGION0 ,Traffic class of region 0" "NPW,VPW,?..." bitfld.long 0x0C 0.--3. " WQOS_MAP_LEVEL ,Separation level indicating the end of region0 mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,?..." line.long 0x10 "PCFGWQOS1_2,Port 2 Write Qos Configuration Register 1" hexmask.long.word 0x10 0.--10. 1. " WQOS_MAP_TIMEOUT ,Specifies the timeout value for write transactions" group.long 0x614++0x07 "Port 3" line.long 0x00 "PCFGR_3,Port 3 Configuration Read Register" bitfld.long 0x00 14. " RD_PORT_PAGEMATCH_EN ,Page match enable" "Disabled,Enabled" bitfld.long 0x00 13. " RD_PORT_URGENT_EN ,AXI urgent sideband signal arurgent enable" "Disabled,Enabled" bitfld.long 0x00 12. " RD_PORT_AGING_EN ,Aging function for the read channel of the port enable" "Disabled,Enabled" textline " " hexmask.long.word 0x00 0.--9. 1. " RD_PORT_PRIORITY ,Initial load value of read aging counters" line.long 0x04 "PCFGW_3,Port 3 Configuration Write Register" bitfld.long 0x04 14. " WR_PORT_PAGEMATCH_EN ,Page match enable" "Disabled,Enabled" bitfld.long 0x04 13. " WR_PORT_URGENT_EN ,AXI urgent sideband signal awurgent enable" "Disabled,Enabled" bitfld.long 0x04 12. " WR_PORT_AGING_EN ,Aging function for the write channel of the port enable" "Disabled,Enabled" textline " " hexmask.long.word 0x04 0.--9. 1. " WR_PORT_PRIORITY ,Initial load value of write aging counters" group.long (0x614+0x8C)++0x13 line.long 0x00 "PCFGW_3,Port 3 Control Register" bitfld.long 0x00 0. " PORT_EN ,Port 3 enable" "Disabled,Enabled" line.long 0x04 "PCFGQOS0_3,Port 3 Read Qos Configuration Register 0" bitfld.long 0x04 20.--21. " RQOS_MAP_REGION1 ,Traffic class of region 1" "LPR,VPR,HPR,?..." bitfld.long 0x04 16.--17. " RQOS_MAP_REGION0 ,Traffic class of region 0" "LPR,VPR,HPR,?..." bitfld.long 0x04 0.--3. " RQOS_MAP_LEVEL1 ,Separation level1 indicating the end of region0 mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,?..." line.long 0x08 "PCFGQOS1_3,Port 3 Read Qos Configuration Register 1" hexmask.long.word 0x08 16.--26. 1. " RQOS_MAP_TIMEOUTR ,Timeout value for transactions mapped to the red address queue" hexmask.long.word 0x08 0.--10. 1. " RQOS_MAP_TIMEOUTB ,Timeout value for transactions mapped to the blue address queue" line.long 0x0C "PCFGWQOS0_3,Port 3 Write Qos Configuration Register 0" bitfld.long 0x0C 20.--21. " WQOS_MAP_REGION1 ,Traffic class of region 1" "NPW,VPW,?..." bitfld.long 0x0C 16.--17. " WQOS_MAP_REGION0 ,Traffic class of region 0" "NPW,VPW,?..." bitfld.long 0x0C 0.--3. " WQOS_MAP_LEVEL ,Separation level indicating the end of region0 mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,?..." line.long 0x10 "PCFGWQOS1_3,Port 3 Write Qos Configuration Register 1" hexmask.long.word 0x10 0.--10. 1. " WQOS_MAP_TIMEOUT ,Specifies the timeout value for write transactions" group.long 0x6C4++0x07 "Port 4" line.long 0x00 "PCFGR_4,Port 4 Configuration Read Register" bitfld.long 0x00 14. " RD_PORT_PAGEMATCH_EN ,Page match enable" "Disabled,Enabled" bitfld.long 0x00 13. " RD_PORT_URGENT_EN ,AXI urgent sideband signal arurgent enable" "Disabled,Enabled" bitfld.long 0x00 12. " RD_PORT_AGING_EN ,Aging function for the read channel of the port enable" "Disabled,Enabled" textline " " hexmask.long.word 0x00 0.--9. 1. " RD_PORT_PRIORITY ,Initial load value of read aging counters" line.long 0x04 "PCFGW_4,Port 4 Configuration Write Register" bitfld.long 0x04 14. " WR_PORT_PAGEMATCH_EN ,Page match enable" "Disabled,Enabled" bitfld.long 0x04 13. " WR_PORT_URGENT_EN ,AXI urgent sideband signal awurgent enable" "Disabled,Enabled" bitfld.long 0x04 12. " WR_PORT_AGING_EN ,Aging function for the write channel of the port enable" "Disabled,Enabled" textline " " hexmask.long.word 0x04 0.--9. 1. " WR_PORT_PRIORITY ,Initial load value of write aging counters" group.long (0x6C4+0x8C)++0x13 line.long 0x00 "PCFGW_4,Port 4 Control Register" bitfld.long 0x00 0. " PORT_EN ,Port 4 enable" "Disabled,Enabled" line.long 0x04 "PCFGQOS0_4,Port 4 Read Qos Configuration Register 0" bitfld.long 0x04 20.--21. " RQOS_MAP_REGION1 ,Traffic class of region 1" "LPR,VPR,HPR,?..." bitfld.long 0x04 16.--17. " RQOS_MAP_REGION0 ,Traffic class of region 0" "LPR,VPR,HPR,?..." bitfld.long 0x04 0.--3. " RQOS_MAP_LEVEL1 ,Separation level1 indicating the end of region0 mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,?..." line.long 0x08 "PCFGQOS1_4,Port 4 Read Qos Configuration Register 1" hexmask.long.word 0x08 16.--26. 1. " RQOS_MAP_TIMEOUTR ,Timeout value for transactions mapped to the red address queue" hexmask.long.word 0x08 0.--10. 1. " RQOS_MAP_TIMEOUTB ,Timeout value for transactions mapped to the blue address queue" line.long 0x0C "PCFGWQOS0_4,Port 4 Write Qos Configuration Register 0" bitfld.long 0x0C 20.--21. " WQOS_MAP_REGION1 ,Traffic class of region 1" "NPW,VPW,?..." bitfld.long 0x0C 16.--17. " WQOS_MAP_REGION0 ,Traffic class of region 0" "NPW,VPW,?..." bitfld.long 0x0C 0.--3. " WQOS_MAP_LEVEL ,Separation level indicating the end of region0 mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,?..." line.long 0x10 "PCFGWQOS1_4,Port 4 Write Qos Configuration Register 1" hexmask.long.word 0x10 0.--10. 1. " WQOS_MAP_TIMEOUT ,Specifies the timeout value for write transactions" group.long 0x774++0x07 "Port 5" line.long 0x00 "PCFGR_5,Port 5 Configuration Read Register" bitfld.long 0x00 14. " RD_PORT_PAGEMATCH_EN ,Page match enable" "Disabled,Enabled" bitfld.long 0x00 13. " RD_PORT_URGENT_EN ,AXI urgent sideband signal arurgent enable" "Disabled,Enabled" bitfld.long 0x00 12. " RD_PORT_AGING_EN ,Aging function for the read channel of the port enable" "Disabled,Enabled" textline " " hexmask.long.word 0x00 0.--9. 1. " RD_PORT_PRIORITY ,Initial load value of read aging counters" line.long 0x04 "PCFGW_5,Port 5 Configuration Write Register" bitfld.long 0x04 14. " WR_PORT_PAGEMATCH_EN ,Page match enable" "Disabled,Enabled" bitfld.long 0x04 13. " WR_PORT_URGENT_EN ,AXI urgent sideband signal awurgent enable" "Disabled,Enabled" bitfld.long 0x04 12. " WR_PORT_AGING_EN ,Aging function for the write channel of the port enable" "Disabled,Enabled" textline " " hexmask.long.word 0x04 0.--9. 1. " WR_PORT_PRIORITY ,Initial load value of write aging counters" group.long (0x774+0x8C)++0x13 line.long 0x00 "PCFGW_5,Port 5 Control Register" bitfld.long 0x00 0. " PORT_EN ,Port 5 enable" "Disabled,Enabled" line.long 0x04 "PCFGQOS0_5,Port 5 Read Qos Configuration Register 0" bitfld.long 0x04 20.--21. " RQOS_MAP_REGION1 ,Traffic class of region 1" "LPR,VPR,HPR,?..." bitfld.long 0x04 16.--17. " RQOS_MAP_REGION0 ,Traffic class of region 0" "LPR,VPR,HPR,?..." bitfld.long 0x04 0.--3. " RQOS_MAP_LEVEL1 ,Separation level1 indicating the end of region0 mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,?..." line.long 0x08 "PCFGQOS1_5,Port 5 Read Qos Configuration Register 1" hexmask.long.word 0x08 16.--26. 1. " RQOS_MAP_TIMEOUTR ,Timeout value for transactions mapped to the red address queue" hexmask.long.word 0x08 0.--10. 1. " RQOS_MAP_TIMEOUTB ,Timeout value for transactions mapped to the blue address queue" line.long 0x0C "PCFGWQOS0_5,Port 5 Write Qos Configuration Register 0" bitfld.long 0x0C 20.--21. " WQOS_MAP_REGION1 ,Traffic class of region 1" "NPW,VPW,?..." bitfld.long 0x0C 16.--17. " WQOS_MAP_REGION0 ,Traffic class of region 0" "NPW,VPW,?..." bitfld.long 0x0C 0.--3. " WQOS_MAP_LEVEL ,Separation level indicating the end of region0 mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,?..." line.long 0x10 "PCFGWQOS1_5,Port 5 Write Qos Configuration Register 1" hexmask.long.word 0x10 0.--10. 1. " WQOS_MAP_TIMEOUT ,Specifies the timeout value for write transactions" group.long 0xF04++0x0F line.long 0x00 "SARBASE0,SAR Base Address Register 0" hexmask.long.word 0x00 0.--8. 1. " BASE_ADDR ,Base address for address region 0" line.long 0x04 "SARSIZE0,SAR Size Register 0" hexmask.long.byte 0x04 0.--7. 1. " NBLOCKS ,Number of blocks for address region 0" line.long 0x08 "SARBASE1,SAR Base Address Register 1" hexmask.long.word 0x08 0.--8. 1. " BASE_ADDR ,Base address for address region 1" line.long 0x0C "SARSIZE0,SAR Size Register 1" hexmask.long.byte 0x0C 0.--7. 1. " NBLOCKS ,Number of blocks for address region 1" textline " " group.long 0x2024++0x03 line.long 0x00 "DERATEINT_SHADOW,Temperature Derate Interval Shadow Register" group.long 0x2050++0x03 line.long 0x00 "RFSHCTL0_SHADOW,Refresh Control Shadow Register 0" bitfld.long 0x00 20.--23. " REF_MARGIN ,Threshold value in number of clock cycles before the critical refresh or page timer expires" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--16. " REF_TO_X32 ,Period of time the SDRAM bus is idle to perform a speculative refresh" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 4.--8. " REF_BURST ,Number of refresh timeouts before traffic is blocked and the refreshes are forced to execute" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 2. " PER_BANK_REFRESH ,Per bank refresh enable" "Disabled,Enabled" group.long 0x2064++0x03 line.long 0x00 "RFSHTMG_SHADOW,Refresh Timing Shadow Register" hexmask.long.word 0x00 16.--27. 1. " T_RFC_NOM_X32 ,Average time interval between refreshes per rank" bitfld.long 0x00 15. " LPDDR3_TREFBW_EN ,Specifies whether to use the trefbw parameter" "Disabled,Enabled" hexmask.long.word 0x00 0.--9. 1. " T_RFC_MIN ,Minimum time from refresh to refresh or activate" group.long 0x20DC++0x07 line.long 0x00 "INIT3_SHADOW,SDRAM Initialization Shadow Register 3" hexmask.long.word 0x00 16.--31. 1. " MR ,Value to write to MR register" hexmask.long.word 0x00 0.--15. 1. " EMR ,Value to write to EMR register" line.long 0x04 "INIT4_SHADOW,SDRAM Initialization Shadow Register 4" hexmask.long.word 0x04 16.--31. 1. " EMR2 ,Value to write to EMR2 register" hexmask.long.word 0x04 0.--15. 1. " EMR3 ,Value to write to EMR3 register" group.long 0x20E8++0x07 line.long 0x00 "INIT6_SHADOW,SDRAM Initialization Shadow Register 6" hexmask.long.word 0x00 16.--31. 1. " MR4 ,Value to be loaded into SDRAM MR4 registers" hexmask.long.word 0x00 0.--15. 1. " MR5 ,Value to be loaded into SDRAM MR5 registers" line.long 0x04 "INIT7_SHADOW,SDRAM Initialization Shadow Register 7" hexmask.long.word 0x04 16.--31. 1. " MR6 ,Value to be loaded into SDRAM MR6 registers" group.long 0x2100++0x3B line.long 0x00 "DRAMTMG0_SHADOW,SDRAM Timing Shadow Register 0" hexmask.long.byte 0x00 24.--30. 1. " WR2PRE ,Minimum time between write and precharge to same bank" bitfld.long 0x00 16.--21. " T_FAW ,Tfaw" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x00 8.--14. 1. " T_RAS_MAX ,Maximum time between activate and precharge to same bank" textline " " bitfld.long 0x00 0.--5. " T_RAS_MIN ,Minimum time between activate and precharge to the same bank" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "DRAMTMG1_SHADOW,SDRAM Timing Shadow Register 1" bitfld.long 0x04 16.--20. " T_XP ,Minimum time after power-down exit to any operation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 8.--12. " RD2PRE ,Minimum time from read to precharge of same bank" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x04 0.--6. 1. " T_RC ,Minimum time between activates to same bank" line.long 0x08 "DRAMTMG2_SHADOW,SDRAM Timing Shadow Register 2" bitfld.long 0x08 24.--29. " WRITE_LATENCY ,Write latency" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x08 16.--21. " READ_LATENCY ,Read latency" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x08 8.--13. " RD2WR ,Minimum time from read command to write command" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x08 0.--5. " WR2RD ,Minimum time from write command to read command" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x0C "DRAMTMG3_SHADOW,SDRAM Timing Shadow Register 3" hexmask.long.word 0x0C 20.--29. 1. " T_MRW ,Time to wait after a mode register write or read MRW or MRR." bitfld.long 0x0C 12.--17. " T_MRD ,Cycles to wait after a mode register write or read" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.word 0x0C 0.--9. 1. " T_MOD ,Cycles between load mode command and following non-load mode command" line.long 0x10 "DRAMTMG4_SHADOW,SDRAM Timing Shadow Register 4" bitfld.long 0x10 24.--28. " T_RCD ,Minimum time from activate to read or write command to same bank" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x10 16.--19. " T_CCD ,Minimum time between two reads or two writes for same bank group." "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 8.--11. " T_RRD ,Minimum time between activates from bank a to bank b for same bank group" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x10 0.--4. " T_RP ,Minimum time from precharge to activate of same bank" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x14 "DRAMTMG5_SHADOW,SDRAM Timing Shadow Register 5" bitfld.long 0x14 24.--27. " T_CKSRX ,Specifies the clock stable time before SRX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x14 16.--19. " T_CKSRE ,Specifies the clock disable delay after SRE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x14 8.--13. " T_CKESR ,Minimum CKE low width for self refresh or self refresh power down entry to exit timing in memory clock cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x14 0.--4. " T_CKE ,Minimum number of cycles of CKE HIGH/LOW during power-down and self refresh" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x18 "DRAMTMG6_SHADOW,SDRAM Timing Shadow Register 6" bitfld.long 0x18 24.--27. " T_CKDPDE ,Specifies the clock disable delay after DPDE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 16.--19. " T_CKDPDX ,Specifies the clock stable time before DPDX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 0.--3. " T_CKCSX ,Specifies the clock stable time before next command after clock stop exit" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1C "DRAMTMG7_SHADOW,SDRAM Timing Shadow Register 7" bitfld.long 0x1C 8.--11. " T_CKPDE ,Specifies the clock disable delay after PDE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C 0.--3. " T_CKPDX ,Specifies the clock stable time before PDX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x20 "DRAMTMG8_SHADOW,SDRAM Timing Shadow Register 8" hexmask.long.byte 0x20 24.--30. 1. " T_XS_FAST_X32 ,Txs_fast: exit self refresh to ZQCL, ZQCS and MRS only CL, WR, RTP and geardown mode" hexmask.long.byte 0x20 16.--22. 1. " T_XS_ABORT_X32 ,Txs_abort: exit self refresh to commands not requiring a locked DLL in self refresh abort" hexmask.long.byte 0x20 8.--14. 1. " T_XS_DLL_X32 ,Txsdll: exit self refresh to commands requiring a locked DLL" textline " " hexmask.long.byte 0x20 0.--6. 1. " T_XS_X32 ,Txs: exit self refresh to commands not requiring a locked DLL" line.long 0x24 "DRAMTMG9_SHADOW,SDRAM Timing Shadow Register 9" bitfld.long 0x24 30. " DDR4_WR_PREAMBLE ,DDR4 write preamble mode" "1tck,2tck" bitfld.long 0x24 16.--18. " T_CCD_S ,Minimum time between two reads or two writes for different bank group" "0,1,2,3,4,5,6,7" bitfld.long 0x24 8.--11. " T_RRD_S ,Minimum time between activates from bank a to bank b for different bank group" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x24 0.--5. " WR2RD_S ,Minimum time from write command to read command for different bank group. Includes time for bus turnaround, recovery times, and all per-bank, per-rank, and global constraints" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x28 "DRAMTMG10_SHADOW,SDRAM Timing Shadow Register 10" bitfld.long 0x28 16.--20. " T_SYNC_GEAR ,Time between MRS command and the sync pulse time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x28 8.--12. " T_CMD_GEAR ,Sync pulse to first valid command" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x28 2.--3. " T_GEAR_SETUP ,Geardown setup time" ",1,2,3" textline " " bitfld.long 0x28 0.--1. " T_GEAR_HOLD ,Geardown hold time" ",1,2,3" line.long 0x2C "DRAMTMG11_SHADOW,SDRAM Timing Shadow Register 11" hexmask.long.byte 0x2C 24.--30. 1. " POST_MPSM_GAP_X32 ,Minimum exit MPSM to commands requiring a locked DLL" bitfld.long 0x2C 16.--20. " T_MPX_LH ,Minimum cs_n low hold time to CKE rising edge" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x2C 8.--9. " T_MPX_S ,Minimum time CS setup time to CKE" "0,1,2,3" textline " " bitfld.long 0x2C 0.--4. " T_CKMPE ,Minimum valid clock requirement after MPSM entry" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x30 "DRAMTMG12_SHADOW,SDRAM Timing Shadow Register 12" bitfld.long 0x30 16.--17. " T_CMDCKE ,Delay from valid command to CKE input LOW" "0,1,2,3" bitfld.long 0x30 8.--11. " T_CKEHCMD ,Valid command requirement after CKE input HIGH" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x30 0.--4. " T_MRD_PDA ,Mode register set command cycle time in PDA mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x34 "DRAMTMG13_SHADOW,SDRAM Timing Shadow Register 13" hexmask.long.byte 0x34 24.--30. 1. " ODTLOFF ,Latency from CAS-2 command to todtoff reference" bitfld.long 0x34 16.--21. " T_CCD_MW ,Minimum time from write or masked write to masked write command for same bank" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x34 0.--2. " T_PPD ,Minimum time from precharge to precharge command" "0,1,2,3,4,5,6,7" line.long 0x38 "DRAMTMG14_SHADOW,SDRAM Timing Shadow Register 14" hexmask.long.word 0x38 0.--11. 1. " T_XSR ,Exit self refresh to any command" group.long 0x2180++0x03 line.long 0x00 "ZQCTL0_SHADOW,ZQ Control Shadow Register 0" bitfld.long 0x00 31. " DIS_AUTO_ZQ ,Disable umctl2 generation of ZQCS/MPC command" "No,Yes" bitfld.long 0x00 30. " DIS_SRX_ZQCL ,Disable issuing of ZQCL/MPC command at Self-Refresh/SR-Powerdown exit" "No,Yes" bitfld.long 0x00 29. " ZQ_RESISTOR_SHARED ,Denotes that ZQ resistor is shared between ranks" "Not shared,Shared" textline " " bitfld.long 0x00 28. " DIS_MPSMX_ZQCL ,Disable issuing of ZQCL command at maximum power saving mode exit" "No,Yes" hexmask.long.word 0x00 16.--26. 1. " T_ZQ_LONG_NOP ,Number of cycles of NOP required after a ZQCL/MPC command is issued to SDRAM" hexmask.long.word 0x00 0.--9. 1. " T_ZQ_SHORT_NOP ,Number of cycles of NOP required after a ZQCS/MPC command is issued to SDRAM" group.long 0x2190++0x07 line.long 0x00 "DFITMG0_SHADOW,DFI Timing Shadow Register 0" bitfld.long 0x00 24.--28. " DFI_T_CTRL_DELAY ,Number of DFI clock cycles after an assertion/de-assertion of the DFI control signals that the control signals at the PHY-DRAM interface reflect the assertion/de-assertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 23. " DFI_RDDATA_USE_SDR ,Defines whether dfi_rddata_en/dfi_rddata/dfi_rddata_valid is generated using HDR or SDR values" "HDR,SDR" bitfld.long 0x00 16.--21. " DFI_T_RDDATA_EN ,Time from the assertion of a read command on the DFI interface to the assertion of the dfi_rddata_en signal" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x00 15. " DFI_WRDATA_USE_SDR ,Defines whether dfi_wrdata_en/dfi_wrdata/dfi_wrdata_mask is generated using HDR or SDR values" "HDR,SDR" bitfld.long 0x00 8.--13. " DFI_TPHY_WRDATA ,Number of clock cycles between when dfi_wrdata_en is asserted to when the write data is driven on the dfi_wrdata signal" "0,1,2,3,4,5,6,7,8,?..." bitfld.long 0x00 0.--5. " DFI_TPHY_WRLAT ,Write latency" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "DFITMG1_SHADOW,DFI Timing Shadow Register 1" bitfld.long 0x04 28.--31. " DFI_T_CMD_LAT ,Number of DFI PHY clocks between when the dfi_cs signal is asserted and when the associated command is driven" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 24.--25. " DFI_T_PARIN_LAT ,Number of DFI PHY clocks between when the dfi_cs signal is asserted and when the associated dfi_parity_in signal is driven" "0,1,2,3" bitfld.long 0x04 16.--20. " DFI_T_WRDATA_DELAY ,Number of DFI clocks between when the assertion of dfi_wrdata_en and data transfer completion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x04 8.--11. " DFI_T_DRAM_CLK_DIS ,Number of DFI clock cycles from the assertion of the dfi_dram_clk_dis until the clock to the DRAM memory devices maintains a low value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. " DFI_T_DRAM_CLK_EN ,Number of DFI clock cycles from the de-assertion of the dfi_dram_clk_dis until the first valid rising edge of the clock to the DRAM memory devices" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x21B4++0x03 line.long 0x00 "DFITMG2_SHADOW,DFI Timing Shadow Register 2" bitfld.long 0x00 8.--13. " DFI_TPHY_RDCSLAT ,Number of clocks between when a read command is sent on the DFI and when the associated dfi_rddata_cs signal is asserted" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " DFI_TPHY_WRCSLAT ,Number of clocks between when a write command is sent on the DFI and when the associated dfi_wrdata_cs signal is asserted" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2240++0x03 line.long 0x00 "ODTCFG_SHADOW,ODT Configuration Shadow Register" bitfld.long 0x00 24.--27. " WR_ODT_HOLD ,Cycles to hold ODT for a write command" ",,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--20. " WR_ODT_DELAY ,The delay from issuing a write command to setting ODT values associated with that command" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--11. " RD_ODT_HOLD ,Cycles to hold ODT for a read command" ",,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 2.--6. " RD_ODT_DELAY ,The delay from issuing a read command to setting ODT values associated with that command" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" width 0x0B tree.end tree "DDR_PHY (DDR_PHY Module)" base ad:0xFD080000 width 14. rgroup.long 0x00++0x03 line.long 0x00 "RIDR,Revision Identification Register" hexmask.long.byte 0x00 24.--31. 1. " UDRID ,User-Defined revision ID" bitfld.long 0x00 20.--23. " PHYMJR ,PHY major revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " PHYMDR ,PHY moderate revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " PHYMNR ,PHY minor revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8.--11. " PUBMJR ,PUB major revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " PUBMDR ,PUB moderate revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " PUBMNR ,PUB minor revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x04++0x03 line.long 0x00 "PIR,PHY Initialization Register" eventfld.long 0x00 30. " ZCALBYP ,Impedance calibration bypass" "No bypass,Bypass" eventfld.long 0x00 29. " DCALPSE ,Digital delay line DDL calibration pause" "No pause,Pause" bitfld.long 0x00 20. " DQS2DQ ,Write DQS2DQ training" "Disabled,Enabled" bitfld.long 0x00 19. " RDIMMINIT ,RDIMM initialization" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " CTLDINIT ,Controller DRAM initialization" "Disabled,Enabled" bitfld.long 0x00 17. " VREF ,VREF training" "Disabled,Enabled" bitfld.long 0x00 16. " SRD ,Static read training" "Disabled,Enabled" bitfld.long 0x00 15. " WREYE ,Write data eye training" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " RDEYE ,Read data eye training" "Disabled,Enabled" bitfld.long 0x00 13. " WRDSKW ,Write data bit deskew" "Disabled,Enabled" bitfld.long 0x00 12. " RDDSKW ,Read data bit deskew" "Disabled,Enabled" bitfld.long 0x00 11. " WLADJ ,Write leveling adjust" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " QSGATE ,Read DQS gate training" "Disabled,Enabled" bitfld.long 0x00 9. " WL ,Write leveling" "Disabled,Enabled" bitfld.long 0x00 8. " DRAMINIT ,DRAM initialization" "Disabled,Enabled" bitfld.long 0x00 7. " DRAMRST ,DRAM reset" "No reset,Reset" textline " " bitfld.long 0x00 6. " PHYRST ,PHY reset" "No reset,Reset" bitfld.long 0x00 5. " DCAL ,Digital delay line DDL calibration" "Disabled,Enabled" bitfld.long 0x00 4. " PLLINIT ,PLL initialization" "Disabled,Enabled" bitfld.long 0x00 2. " CA ,CA training" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " ZCAL ,Impedance calibration" "Disabled,Enabled" eventfld.long 0x00 0. " INIT ,Initialization trigger" "No trigger,Trigger" group.long 0x10++0x1F line.long 0x00 "PGCR0,PHY General Configuration Register 0" bitfld.long 0x00 31. " ADCP ,Address copy" "Disabled,Enabled" bitfld.long 0x00 26. " PHYFRST ,PHY FIFO reset" "No reset,Reset" bitfld.long 0x00 24.--25. " OSCACDL ,Oscillator mode address/command delay line select" "0,1,2,3" bitfld.long 0x00 14.--18. " DTOSEL ,Digital test output select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 9.--12. " OSCDIV ,Oscillator mode division" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8. " OSCEN ,Oscillator enable" "Disabled,Enabled" line.long 0x04 "PGCR1,PHY General Configuration Register 1" bitfld.long 0x04 31. " LBMODE ,Loopback mode" "Disabled,Enabled" eventfld.long 0x04 28. " LBGSDQS ,Load GSDQS LCDL with 2x the calibrated GSDQSPRD value equivalent to one CK period" "Not loaded,Loaded" bitfld.long 0x04 27. " DLTST ,Delay line test start" "Not started,Started" bitfld.long 0x04 26. " DLTMODE ,Delay line test mode" "Disabled,Enabled" textline " " bitfld.long 0x04 25. " PHYHRST ,PHY High-Speed reset" "No reset,Reset" bitfld.long 0x04 24. " ACVLDTRN ,AC loopback valid train" "0,1" bitfld.long 0x04 21.--23. " ACVLDDLY ,AC loopback valid delay" "0,1,2,3,4,5,6,7" bitfld.long 0x04 20. " LRDIMMST ,LRDIMM software training" "Disabled,Enabled" textline " " bitfld.long 0x04 18. " UPDMSTRC0 ,DFI update master channel 0" "Not updated,Updated" bitfld.long 0x04 17. " DISDIC ,Enable/disable control for DFI_INIT_COMPLETE" "Disabled,Enabled" bitfld.long 0x04 16. " ACPDDC ,AC Power-Down with dual channels" "Disabled,Enabled" bitfld.long 0x04 15. " DUALCHN ,Dual channel configuration" "Disabled,Enabled" textline " " bitfld.long 0x04 13.--14. " FDEPTH ,Filter depth" "0,1,2,3" bitfld.long 0x04 11.--12. " LPFDEPTH ,Low-Pass filter depth" "0,1,2,3" bitfld.long 0x04 10. " LPFEN ,Low-Pass filter enable" "Disabled,Enabled" bitfld.long 0x04 9. " MDLEN ,Master delay line enable" "Disabled,Enabled" textline " " bitfld.long 0x04 6. " PUBMODE ,Enable the PUB to control the interface to the PHY and SDRAM" "Disabled,Enabled" bitfld.long 0x04 5. " CAST ,CA software training" "Disabled,Enabled" bitfld.long 0x04 4. " DX_DQSOUT_DIFF ,Select PDIFF cell for DQS generation" "0,1" bitfld.long 0x04 3. " AC_CKOUT_DIFF ,Select PDIFF cell for CK generation" "0,1" textline " " bitfld.long 0x04 2. " WLSTEP ,Write leveling step" "0,1" bitfld.long 0x04 1. " WLMODE ,Write leveling software mode" "Disabled,Enabled" bitfld.long 0x04 0. " DTOMODE ,Digital test output mode" "Disabled,Enabled" line.long 0x08 "PGCR2,PHY General Configuration Register 2" eventfld.long 0x08 31. " CLRTSTAT ,Clear training status registers" "No effect,Clear" eventfld.long 0x08 30. " CLRZCAL ,Clear impedance calibration" "No effect,Clear" eventfld.long 0x08 29. " CLRPERR ,Clear parity error" "No effect,Clear" bitfld.long 0x08 28. " ICPC ,Initialization complete pin configuration" "0,1" textline " " hexmask.long.byte 0x08 20.--27. 1. " DTPMXTMR ,Data training PUB mode exit timer" bitfld.long 0x08 19. " INITFSMBYP ,Initialization bypass" "No bypass,Bypass" bitfld.long 0x08 18. " PLLFSMBYP ,PLL FSM bypass" "No bypass,Bypass" hexmask.long.tbyte 0x08 0.--17. 1. " TREFPRD ,Refresh period" line.long 0x0C "PGCR3,PHY General Configuration Register 3" hexmask.long.byte 0x0C 24.--31. 1. " CKNEN ,CKN enable" hexmask.long.byte 0x0C 16.--23. 1. " CKEN ,CK enable" bitfld.long 0x0C 13.--14. " GATEACRDCLK ,Enable clock gating for AC [0] CTL_RD_CLK" "0,1,2,3" bitfld.long 0x0C 11.--12. " GATEACDDRCLK ,Enable clock gating for AC [0] DDR_CLK" "0,1,2,3" textline " " bitfld.long 0x0C 9.--10. " GATEACCTLCLK ,Enable clock gating for AC [0] CTL_CLK" "0,1,2,3" bitfld.long 0x0C 6.--7. " DDLBYPMODE ,Controls DDL bypass modes" "0,1,2,3" bitfld.long 0x0C 5. " IOLB ,IO Loop-Back select" "0,1" bitfld.long 0x0C 3.--4. " RDMODE ,AC receive FIFO read mode" "0,1,2,3" textline " " bitfld.long 0x0C 2. " DISRST ,Read FIFO reset disable" "No,Yes" bitfld.long 0x0C 0.--1. " CLKLEVEL ,Clock level when clock gating" "0,1,2,3" line.long 0x10 "PGCR4,PHY General Configuration Register 4" bitfld.long 0x10 29. " ACDDLLD ,AC DDL delay select dymainc load" "Disabled,Enabled" bitfld.long 0x10 24.--28. " ACDDLBYP ,AC DDL bypass" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x10 23. " OEDDLBYP ,AC OE DDL bypass" "No bypass,Bypass" bitfld.long 0x10 22. " TEDDLBYP ,AC ODT DDL bypass" "No bypass,Bypass" textline " " bitfld.long 0x10 21. " PDRDDLBYP ,AC PDR DDL bypass" "No bypass,Bypass" bitfld.long 0x10 20. " RRRMODE ,AC macro read path Rise-to-Rise mode" "Disabled,Enabled" bitfld.long 0x10 19. " WRRMODE ,AC macro write path Rise-to-Rise mode" "Disabled,Enabled" bitfld.long 0x10 4.--7. " LPWAKEUP_THRSH ,AC low power wakeup threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x10 1. " LPPLLPD ,AC low power PLL power down" "Disabled,Enabled" bitfld.long 0x10 0. " LPIOPD ,AC low power IO power down" "Disabled,Enabled" line.long 0x14 "PGCR5,PHY General Configuration Register 5" hexmask.long.byte 0x14 24.--31. 1. " FRQBT ,Frequency B ratio term" hexmask.long.byte 0x14 16.--23. 1. " FRQAT ,Frequency A ratio term" hexmask.long.byte 0x14 8.--15. 1. " DISCNPERIOD ,DFI disconnect time period" bitfld.long 0x14 4.--7. " VREF_RBCTRL ,Receiver bias core side control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x14 2. " DXREFISELRANGE ,Internal VREF generator REFSEL ragne select" "0,1" bitfld.long 0x14 1. " DDLPGACT ,DDL page read write select" "Read,Write" bitfld.long 0x14 0. " DDLPGRW ,DDL page read write select" "Read,Write" line.long 0x18 "PGCR6,PHY General Configuration Register 6" hexmask.long.byte 0x18 16.--23. 1. " DLDLMT ,Delay line VT drift limit" bitfld.long 0x18 13. " ACDLVT ,AC address/command delay LCDL VT compensation" "Disabled,Enabled" bitfld.long 0x18 12. " ACBVT ,Address/command bit delay VT compensation" "Disabled,Enabled" bitfld.long 0x18 11. " ODTBVT ,ODT bit delay VT compensation" "Disabled,Enabled" textline " " bitfld.long 0x18 10. " CKEBVT ,CKE bit delay VT compensation" "Disabled,Enabled" bitfld.long 0x18 9. " CSNBVT ,CSN bit delay VT compensation" "Disabled,Enabled" bitfld.long 0x18 8. " CKBVT ,CK bit delay VT compensation" "Disabled,Enabled" bitfld.long 0x18 1. " FVT ,Forced VT compensation trigger" "No trigger,Trigger" textline " " bitfld.long 0x18 0. " INHVT ,VT calculation inhibit" "Disabled,Enabled" line.long 0x1C "PGCR7,PHY General Configuration Register 7" bitfld.long 0x1C 5. " ACCALCLK ,AC calibration clock select" "0,1" bitfld.long 0x1C 4. " ACRCLKMD ,AC read clock mode" "Disabled,Enabled" bitfld.long 0x1C 3. " ACDLDT ,AC DDL load type" "0,1" bitfld.long 0x1C 1. " ACDTOSEL ,AC digital test output select" "0,1" textline " " bitfld.long 0x1C 0. " ACTMODE ,AC test mode" "Disabled,Enabled" rgroup.long 0x30++0x0B line.long 0x00 "PGSR0,PHY General Status Register 0" bitfld.long 0x00 31. " APLOCK ,AC PLL lock" "Not locked,Locked" bitfld.long 0x00 30. " SRDERR ,Static read error" "No error,Error" bitfld.long 0x00 29. " CAWRN ,CA training warning" "Not occurred,Occurred" bitfld.long 0x00 28. " CAERR ,CA training error" "No error,Error" textline " " bitfld.long 0x00 27. " WEERR ,Write eye training error" "No error,Error" bitfld.long 0x00 26. " REERR ,Read eye training error" "No error,Error" bitfld.long 0x00 25. " WDERR ,Write bit deskew error" "No error,Error" bitfld.long 0x00 24. " RDERR ,Read bit deskew error" "No error,Error" textline " " bitfld.long 0x00 23. " WLAERR ,Write leveling adjustment error" "No error,Error" bitfld.long 0x00 22. " QSGERR ,DQS gate training error" "No error,Error" bitfld.long 0x00 21. " WLERR ,Write leveling error" "No error,Error" bitfld.long 0x00 20. " ZCERR ,Impedance calibration error" "No error,Error" textline " " bitfld.long 0x00 19. " VERR ,VREF training error" "No error,Error" bitfld.long 0x00 18. " DQS2DQERR ,Write DQS2DQ training error" "No error,Error" bitfld.long 0x00 15. " DQS2DQDONE ,Write DQS2DQ training done" "Not done,Done" bitfld.long 0x00 14. " VDONE ,VREF training done" "Not done,Done" textline " " bitfld.long 0x00 13. " SRDDONE ,Static read done" "Not done,Done" bitfld.long 0x00 12. " CADONE ,CA training done" "Not done,Done" bitfld.long 0x00 11. " WEDONE ,Write eye training done" "Not done,Done" bitfld.long 0x00 10. " REDONE ,Read eye training done" "Not done,Done" textline " " bitfld.long 0x00 9. " WDDONE ,Write bit deskew done" "Not done,Done" bitfld.long 0x00 8. " RDDONE ,Read bit deskew done" "Not done,Done" bitfld.long 0x00 7. " WLADONE ,Write leveling adjustment done" "Not done,Done" bitfld.long 0x00 6. " QSGDONE ,DQS gate training done" "Not done,Done" textline " " bitfld.long 0x00 5. " WLDONE ,Write leveling done" "Not done,Done" bitfld.long 0x00 4. " DIDONE ,DRAM initialization done" "Not done,Done" bitfld.long 0x00 3. " ZCDONE ,Impedance calibration done" "Not done,Done" bitfld.long 0x00 2. " DCDONE ,Digital delay line DDL calibration done" "Not done,Done" textline " " bitfld.long 0x00 1. " PLDONE ,PLL lock done" "Not done,Done" bitfld.long 0x00 0. " IDONE ,Initialization done" "Not done,Done" line.long 0x04 "PGSR1,PHY General Status Register 1" bitfld.long 0x04 31. " PARERR ,RDIMM parity error" "No error,Error" bitfld.long 0x04 30. " VTSTOP ,VT stop" "Not stopped,Stopped" hexmask.long.tbyte 0x04 1.--24. 1. " DLTCODE ,Delay line test code for AC macro 0" bitfld.long 0x04 0. " DLTDONE ,Delay line test done for AC macro 0" "Not done,Done" line.long 0x08 "PGSR2,PHY General Status Register 2" hexmask.long.tbyte 0x08 1.--24. 1. " DLTCODE ,Delay line test code for AC macro 1" bitfld.long 0x08 0. " DLTDONE ,Delay line test done for AC macro 1" "0,1" textline " " group.long 0x40++0x1B line.long 0x00 "PTR0,PHY Timing Register 0" hexmask.long.word 0x00 21.--31. 1. " TPLLPD ,PLL Power-Down time" hexmask.long.word 0x00 6.--20. 1. " TPLLGS ,PLL gear shift time" bitfld.long 0x00 0.--5. " TPHYRST ,PHY reset time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "PTR1,PHY Timing Register 1" hexmask.long.word 0x04 16.--31. 1. " TPLLLOCK ,PLL lock time" hexmask.long.word 0x04 0.--12. 1. " TPLLRST ,PLL reset time" line.long 0x08 "PTR2,PHY Timing Register 2" bitfld.long 0x08 15.--19. " TWLDLYS ,Write leveling delay settling time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x08 10.--14. " TCALH ,Calibration hold time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x08 5.--9. " TCALS ,Calibration setup time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x08 0.--4. " TCALON ,Calibration on time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x0C "PTR3,PHY Timing Register 3" hexmask.long.tbyte 0x0C 0.--22. 1. " TDINIT0 ,DRAM initialization time 0" line.long 0x10 "PTR4,PHY Timing Register 4" hexmask.long.word 0x10 0.--12. 1. " TDINIT1 ,DRAM initialization time 1" line.long 0x14 "PTR5,PHY Timing Register 5" hexmask.long.tbyte 0x14 0.--18. 1. " TDINIT2 ,DRAM initialization time 2" line.long 0x18 "PTR6,PHY Timing Register 6" hexmask.long.byte 0x18 20.--26. 1. " TDINIT4 ,DRAM initialization time 4" hexmask.long.word 0x18 0.--11. 1. " TDINIT3 ,DRAM initialization time 3" group.long 0x68++0x17 line.long 0x00 "PLLCR0,PLL Control Register 0" bitfld.long 0x00 31. " PLLBYP ,PLL bypass" "No bypass,Bypass" bitfld.long 0x00 30. " PLLRST ,PLL reset" "No reset,Reset" bitfld.long 0x00 29. " PLLPD ,PLL power down" "No,Yes" bitfld.long 0x00 28. " RSTOPM ,Reference stop mode" "Disabled,Enabled" textline " " bitfld.long 0x00 24.--27. " FRQSEL ,PLL frequency select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 23. " RLOCKM ,Relock mode" "Disabled,Enabled" bitfld.long 0x00 17.--22. " CPPC ,Charge pump proportional current control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 13.--16. " CPIC ,Charge pump integrating current control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 12. " GSHIFT ,Gear shift" "Disabled,Enabled" bitfld.long 0x00 8. " ATOEN ,Analog test enable" "Disabled,Enabled" bitfld.long 0x00 4.--7. " ATC ,Analog test control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " DTC ,Digital test control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "PLLCR1,PLL Control Register 1" hexmask.long.word 0x04 16.--31. 1. " PLLPROG ,Connects to the PLL PLL_PROG bus" bitfld.long 0x04 5. " BYPVREGCP ,Bypass PLL VREG_CP" "No bypass,Bypass" bitfld.long 0x04 4. " BYPVREGDIG ,Bypass PLL VREG_DIG" "No bypass,Bypass" bitfld.long 0x04 3. " BYPVDD ,PLL VDD voltage level control" "0,1" textline " " bitfld.long 0x04 2. " LOCKPS ,Lock detector phase select" "0,1" bitfld.long 0x04 1. " LOCKCS ,Lock detector counter select" "0,1" bitfld.long 0x04 0. " LOCKDS ,Lock detector select" "0,1" line.long 0x08 "PLLCR2,PLL Control Register 2" line.long 0x0C "PLLCR3,PLL Control Register 3" line.long 0x10 "PLLCR4,PLL Control Register 4" line.long 0x14 "PLLCR5,PLL Control Register 5" hexmask.long.byte 0x14 0.--7. 1. " PLLCTRL_103_96 ,Connectes to bits [103:96] of the PLL generatl control bus PLL_CTRL" group.long 0x88++0x03 line.long 0x00 "DXCCR,DATX8 Common Configuration Register" bitfld.long 0x00 29. " RKLOOP ,Rank looping per-rank eye centering enable" "Disabled,Enabled" bitfld.long 0x00 3.--6. " DQS2DQMPER ,Write DQS2DQ training measurement period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x90++0x03 line.long 0x00 "DSGCR,DDR System General Configuration Register" bitfld.long 0x00 27. " RDBICLSEL ,Select RDBI CL calculation" "Default,RDBICL" bitfld.long 0x00 24.--26. " RDBICL ,RDBI CL adjust value" "0,1,2,3,4,5,6,7" bitfld.long 0x00 23. " PHYZUEN ,PHY impedance update enable" "Disabled,Enabled" bitfld.long 0x00 21. " RSTOE ,SDRAM reset output enable" "Disabled,Enabled" textline " " bitfld.long 0x00 19.--20. " SDRMODE ,Single data rate mode" "0,1,2,3" bitfld.long 0x00 17. " ATOAE ,ATO analog test enable" "Disabled,Enabled" bitfld.long 0x00 16. " DTOOE ,DTO output enable" "Disabled,Enabled" bitfld.long 0x00 15. " DTOIOM ,DTO I/O mode" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " DTOPDR ,DTO power down receiver" "Disabled,Enabled" bitfld.long 0x00 12. " DTOODT ,DTO On-Die termination" "Disabled,Enabled" bitfld.long 0x00 6.--11. " PUAD ,PHY update acknowledge delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 5. " CUAEN ,Controller update acknowledge enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " CTLZUEN ,Controller impedance update enable" "Disabled,Enabled" bitfld.long 0x00 0. " PUREN ,PHY update request enable" "Disabled,Enabled" group.long 0x98++0x03 line.long 0x00 "ODTCR,ODT Configuration Register" bitfld.long 0x00 16.--17. " WRODT ,Write ODT" "0,1,2,3" bitfld.long 0x00 0.--1. " RDODT ,Read ODT" "0,1,2,3" group.long 0xA0++0x03 line.long 0x00 "AACR,Anti-Aging Control Register" bitfld.long 0x00 31. " AAOENC ,Anti-Aging PAD output enable control" "Disabled,Enabled" bitfld.long 0x00 30. " AAENC ,Anti-Aging enable control" "Disabled,Enabled" hexmask.long 0x00 0.--29. 1. " AATR ,Anti-Aging toggle rate" group.long 0xC0++0x07 line.long 0x00 "GPR0,General Purpose Register 0" line.long 0x04 "GPR1,General Purpose Register 1" group.long 0x100++0x03 line.long 0x00 "DCR,DRAM Configuration Register" bitfld.long 0x00 31. " GEARDN ,DDR4 gear down timing" "0,1" bitfld.long 0x00 30. " UBG ,Un-used bank group" "0,1" bitfld.long 0x00 29. " UDIMM ,Un-buffered DIMM address mirroring" "Disabled,Enabled" bitfld.long 0x00 28. " DDR2T ,DDR 2T timing" "0,1" textline " " bitfld.long 0x00 27. " NOSRA ,No simultaneous rank access" "No,Yes" hexmask.long.byte 0x00 10.--17. 1. " BYTEMASK ,Byte mask" bitfld.long 0x00 8.--9. " DDRTYPE ,DDR type" "0,1,2,3" bitfld.long 0x00 7. " MPRDQ ,Multi-Purpose register" "0,1" textline " " bitfld.long 0x00 4.--6. " PDQ ,Primary DQ" "0,1,2,3,4,5,6,7" bitfld.long 0x00 3. " DDR8BNK ,DDR 8-Bank" "Disabled,Enabled" bitfld.long 0x00 0.--2. " DDRMD ,DDR mode" "0,1,2,3,4,5,6,7" group.long 0x110++0x1B line.long 0x00 "DTPR0,DRAM Timing Parameters Register 0" bitfld.long 0x00 24.--28. " TRRD ,Activate to activate command delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--22. 1. " TRAS ,Activate to precharge command delay" hexmask.long.byte 0x00 8.--14. 1. " TRP ,Precharge command period" bitfld.long 0x00 0.--4. " TRTP ,Internal read to precharge command delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x04 "DTPR1,DRAM Timing Parameters Register 1" hexmask.long.byte 0x04 24.--30. 1. " TWLMRD ,Minimum delay from when write leveling mode is programmed to the first DQS/DQS# rising edge" hexmask.long.byte 0x04 16.--22. 1. " TFAW ,4-bank activate period" bitfld.long 0x04 8.--10. " TMOD ,Load mode update delay" "0,1,2,3,4,5,6,7" bitfld.long 0x04 0.--4. " TMRD ,Load mode cycle time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x08 "DTPR2,DRAM Timing Parameters Register 2" bitfld.long 0x08 28. " TRTW ,Read to write command delay" "0,1" bitfld.long 0x08 24. " TRTODT ,Read to ODT delay" "0,1" bitfld.long 0x08 16.--19. " TCKE ,CKE minimum pulse width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x08 0.--9. 1. " TXS ,Self refresh exit delay" line.long 0x0C "DTPR3,DRAM Timing Parameters Register 3" bitfld.long 0x0C 29.--31. " TOFDX ,ODT turn-off delay extension" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 26.--28. " TCCD ,Read to read and write to write command delay" "0,1,2,3,4,5,6,7" hexmask.long.word 0x0C 16.--25. 1. " TDLLK ,DLL locking time" bitfld.long 0x0C 8.--11. " TDQSCKMAX ,Maximum DQS output access time from CK/CK#" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x0C 0.--2. " TDQSCK ,DQS output access time from CK/CK#" "0,1,2,3,4,5,6,7" line.long 0x10 "DTPR4,DRAM Timing Parameters Register 4" bitfld.long 0x10 28.--29. " TAOND_TAOFD ,ODT turn-on/turn-off delays" "0,1,2,3" hexmask.long.word 0x10 16.--25. 1. " TRFC ,Refresh-to-refresh" bitfld.long 0x10 8.--13. " TWLO ,Write leveling output delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x10 0.--4. " TXP ,Power down exit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x14 "DTPR5,DRAM Timing Parameters Register 5" hexmask.long.byte 0x14 16.--23. 1. " TRC ,Activate to activate command delay same bank" hexmask.long.byte 0x14 8.--14. 1. " TRCD ,Activate to read or write delay" bitfld.long 0x14 0.--4. " TWTR ,Internal write to read command delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x18 "DTPR6,DRAM Timing Parameters Register 6" bitfld.long 0x18 31. " PUBWLEN ,PUB write latency enable" "Disabled,Enabled" bitfld.long 0x18 30. " PUBRLEN ,PUB read latency enable" "Disabled,Enabled" bitfld.long 0x18 8.--13. " PUBWL ,Write latency" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x18 0.--5. " PUBRL ,Read latency" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x140++0x0B line.long 0x00 "RDIMMGCR0,RDIMM General Configuration Register 0" bitfld.long 0x00 30. " QCSEN ,RDMIMM quad CS enable" "Disabled,Enabled" bitfld.long 0x00 27. " RDIMMIOM ,RDIMM outputs I/O mode" "Disabled,Enabled" bitfld.long 0x00 23. " ERROUTOE ,ERROUT# output enable" "Disabled,Enabled" bitfld.long 0x00 22. " ERROUTIOM ,ERROUT# I/O mode" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ERROUTPDR ,ERROUT# power down receiver" "No,Yes" bitfld.long 0x00 19. " ERROUTODT ,ERROUT# On-Die termination" "Disabled,Enabled" bitfld.long 0x00 18. " LRDIMM ,Load reduced DIMM" "Disabled,Enabled" bitfld.long 0x00 17. " PARINIOM ,PAR_IN I/O mode" "Disabled,Enabled" textline " " bitfld.long 0x00 4.--5. " RNKMRREN ,Rank mirror enable" "0,1,2,3" bitfld.long 0x00 2. " SOPERR ,Stop on parity error" "Disabled,Enabled" bitfld.long 0x00 1. " ERRNOREG ,Parity error no registering" "No,Yes" bitfld.long 0x00 0. " RDIMM ,Registered DIMM" "Not registered,Registered" line.long 0x04 "RDIMMGCR1,RDIMM General Configuration Register 1" bitfld.long 0x04 28. " A17BID ,Address [17] B-side inversion disable" "No,Yes" bitfld.long 0x04 24.--26. " TBCMRD_L2 ,Command word to command word programming delay" "0,1,2,3,4,5,6,7" bitfld.long 0x04 20.--22. " TBCMRD_L ,Command word to command word programming delay" "0,1,2,3,4,5,6,7" bitfld.long 0x04 16.--18. " TBCMRD ,Command word to command word programming delay" "0,1,2,3,4,5,6,7" textline " " hexmask.long.word 0x04 0.--13. 1. " TBCSTAB ,Stabilization time" line.long 0x08 "RDIMMGCR2,RDIMM General Configuration Register 2" group.long 0x150++0x13 line.long 0x00 "RDIMMCR0,RDIMM Control Register 0" bitfld.long 0x00 28.--31. " RC7 ,DDR4/DDR3 control word 7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. " RC6 ,DDR4 control word 6 comman space control word" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. " RC5 ,DDR4/DDR3 control word 5 CK driver characteristics control word" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " RC4 ,DDR4 control word 4 ODT and CKE signals driver characteristics control word / DDR3 control word 4 control signals driver characteristics control word" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 12.--15. " RC3 ,DDR4 control word 3 CA and CS signals driver characteristics control word / DDR3 control word 3 command/address signals driver characteristrics control word" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " RC2 ,DDR4 control word 2 timing and IBT control word / DDR3 control word 2 timing control word" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " RC1 ,DDR4/DDR3 control word 1 clock driver enable control word" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " RC0 ,DDR4/DDR3 control word 0 global features control word" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "RDIMMCR1,RDIMM Control Register 1" bitfld.long 0x04 28.--31. " RC15 ,Control word 15" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 24.--27. " RC14 ,DDR4 control word 14 parity control word" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 20.--23. " RC13 ,DDR4 control word 13 DIMM configuration control word" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 16.--19. " RC12 ,DDR4 control word 12 training control word" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 12.--15. " RC11 ,DDR4 control word 11 operating voltage VDD and VREFCA source control word / DDR3 control word 11 operation voltage VDD control word" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 8.--11. " RC10 ,DDR4/DDR3 control word 10 RDIMM operating speed control word" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 4.--7. " RC9 ,DDR4/DDR3 control word 9 power saving settings control word" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. " RC8 ,DDR4 control word 8 input/output configuration control word / DDR3 control word 8 additional input bus termination setting control word" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "RDIMMCR2,RDIMM Control Register 2" hexmask.long.byte 0x08 24.--31. 1. " RC4X ,Control word RC4X" hexmask.long.byte 0x08 16.--23. 1. " RC3X ,Control word RC3X" hexmask.long.byte 0x08 8.--15. 1. " RC2X ,Control word RC2X" hexmask.long.byte 0x08 0.--7. 1. " RC1X ,Control word RC1X" line.long 0x0C "RDIMMCR3,RDIMM Control Register 3" hexmask.long.byte 0x0C 24.--31. 1. " RC8X ,Control word RC8X" hexmask.long.byte 0x0C 16.--23. 1. " RC7X ,Control word RC7X" hexmask.long.byte 0x0C 8.--15. 1. " RC6X ,Control word RC6X" hexmask.long.byte 0x0C 0.--7. 1. " RC5X ,Control word RC5X" line.long 0x10 "RDIMMCR4,RDIMM Control Register 4" hexmask.long.byte 0x10 16.--23. 1. " RCBX ,Control word RC11X" hexmask.long.byte 0x10 8.--15. 1. " RCAX ,Control word RC10X" hexmask.long.byte 0x10 0.--7. 1. " RC9X ,Control word RC9X" group.long 0x168++0x07 line.long 0x00 "SCHCR0,Scheduler Command Register 0" hexmask.long.word 0x00 16.--24. 1. " SCHDQV ,Scheduler command DQ value" bitfld.long 0x00 8.--11. " SP_CMD ,Special command codes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " CMD ,Specifies the command to be issued" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" eventfld.long 0x00 0.--3. " SCHTRIG ,Mode register command trigger" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "SCHCR1,Scheduler Command Register 1" bitfld.long 0x04 28.--31. " SCRNK ,Scheduler rank address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.tbyte 0x04 8.--27. 1. " SCADDR ,Scheduler command address specifies the value to be driven on the address bus" bitfld.long 0x04 6.--7. " SCBG ,Scheduler command bank group" "0,1,2,3" bitfld.long 0x04 4.--5. " SCBK ,Scheduler command bank address" "0,1,2,3" textline " " bitfld.long 0x04 2. " ALLRANK ,All ranks enabled" "Disabled,Enabled" group.long 0x180++0x0F line.long 0x00 "MR0,LPDDR4 Mode Register 0" bitfld.long 0x00 7. " CATR ,CA terminating rank" "0,1" bitfld.long 0x00 3.--4. " RZQI ,Built-in Self-Test for RZQ" "0,1,2,3" line.long 0x04 "MR1,LPDDR4 Mode Register 1" bitfld.long 0x04 7. " RDPST ,Read postamble length" "0,1" bitfld.long 0x04 4.--6. " NWR ,Write-recovery for auto-precharge command" "0,1,2,3,4,5,6,7" bitfld.long 0x04 3. " RDPRE ,Read preamble length" "0,1" bitfld.long 0x04 2. " WRPRE ,Write preamble length" "0,1" textline " " bitfld.long 0x04 0.--1. " BL ,Burst length" "0,1,2,3" line.long 0x08 "MR2,LPDDR4 Mode Register 2" bitfld.long 0x08 7. " WRL ,Write leveling" "Disabled,Enabled" bitfld.long 0x08 6. " WLS ,Write latency set" "0,1" bitfld.long 0x08 3.--5. " WL ,Write latency" "0,1,2,3,4,5,6,7" bitfld.long 0x08 0.--2. " RL ,Read latency" "0,1,2,3,4,5,6,7" line.long 0x0C "MR3,LPDDR4 Mode Register 3" bitfld.long 0x0C 7. " DBIWR ,DBI-Write enable" "Disabled,Enabled" bitfld.long 0x0C 6. " DBIRD ,DBI-Read enable" "Disabled,Enabled" bitfld.long 0x0C 3.--5. " PDDS ,Pull-down drive strength" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 1. " WRPST ,Write postamble length" "0,1" textline " " bitfld.long 0x0C 0. " PUCAL ,Pull-up calibration point" "0,1" group.long 0x1AC++0x0F line.long 0x00 "MR11,LPDDR4 Mode Register 11" bitfld.long 0x00 4.--6. " CAODT ,CA bus receiver On-Die-Termination" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " DQODT ,DQ bus receiver On-Die-Termination" "0,1,2,3,4,5,6,7" line.long 0x04 "MR12,LPDDR4 Mode Register 12" bitfld.long 0x04 6. " VR_CA ,VREF_CA range select" "0,1" bitfld.long 0x04 0.--5. " VREF_CA ,Controls the vrefca levels for Frequency-Set-Point[1:0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x08 "MR13,LPDDR4 Mode Register 13" bitfld.long 0x08 7. " FSPOP ,Frequency set point operation mode" "0,1" bitfld.long 0x08 6. " FSPWR ,Frequency set point write enable" "Disabled,Enabled" bitfld.long 0x08 5. " DMD ,Data mask enable" "Disabled,Enabled" bitfld.long 0x08 4. " RRO ,Refresh rate option" "0,1" textline " " bitfld.long 0x08 3. " VRCG ,VREF current generator" "0,1" bitfld.long 0x08 2. " VRO ,VREF output" "0,1" bitfld.long 0x08 1. " RPT ,Read preamble training mode" "Disabled,Enabled" bitfld.long 0x08 0. " CBT ,Command bus training" "Disabled,Enabled" line.long 0x0C "MR14,LPDDR4 Mode Register 14" bitfld.long 0x0C 6. " VR_DQ ,VREFDQ range selects" "0,1" group.long 0x1D8++0x03 line.long 0x00 "MR22,LPDDR4 Mode Register 22" bitfld.long 0x00 5. " ODTD_CA ,CA ODT termination disable" "No,Yes" bitfld.long 0x00 4. " ODTE_CS ,ODT CS override" "No override,Override" bitfld.long 0x00 3. " ODTE_CK ,ODT CK override" "No override,Override" bitfld.long 0x00 0.--2. " CODT ,Controller ODT value for VOH calibration" "0,1,2,3,4,5,6,7" group.long 0x200++0x13 line.long 0x00 "DTCR0,Data Training Configuration Register 0" bitfld.long 0x00 28.--31. " RFSHDT ,Refresh during training" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--25. " DTDRS ,Data training debug rank select" "0,1,2,3" bitfld.long 0x00 23. " DTEXG ,Data training with early/extended gate" "Disabled,Enabled" bitfld.long 0x00 22. " DTEXD ,Data training extended write DQS" "Disabled,Enabled" textline " " eventfld.long 0x00 21. " DTDSTP ,Data training debug step" "0,1" bitfld.long 0x00 20. " DTDEN ,Data training debug enable" "Disabled,Enabled" bitfld.long 0x00 16.--19. " DTDBS ,Data training debug byte select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. " DTRDBITR ,Data training read DBI deskewing configuration" "0,1,2,3" textline " " bitfld.long 0x00 12. " DTWBDDM ,Data training write bit deskew data mask" "Not masked,Masked" bitfld.long 0x00 8.--11. " RFSHEN ,Refreshes issued during entry to training" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 7. " DTCMPD ,Data training compare data" "0,1" bitfld.long 0x00 6. " DTMPR ,Data training using MPR" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " INCWEYE ,WEYE training using MPC FIFO commands" "0,1" bitfld.long 0x00 0.--3. " DTRPTN ,Data training repeat number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "DTCR1,Data Training Configuration Register 1" bitfld.long 0x04 16.--17. " RANKEN ,Rank enable" "0,1,2,3" bitfld.long 0x04 12.--13. " DTRANK ,Data training rank" "0,1,2,3" bitfld.long 0x04 8.--10. " RDLVLGDIFF ,Read leveling gate sampling difference" "0,1,2,3,4,5,6,7" bitfld.long 0x04 4.--6. " RDLVLGS ,Read leveling gate shift" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x04 2. " RDPRMVL_TRN ,Read preamble training enable" "Disabled,Enabled" bitfld.long 0x04 1. " RDLVLEN ,Read leveling enable" "Disabled,Enabled" bitfld.long 0x04 0. " BSTEN ,Basic gate training enable" "Disabled,Enabled" line.long 0x08 "DTAR0,Data Training Address Register 0" bitfld.long 0x08 28.--29. " MPRLOC ,Multi-Purpose register MPR location" "0,1,2,3" bitfld.long 0x08 24.--27. " DTBGBK1 ,Data training bank group and bank address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 20.--23. " DTBGBK0 ,Data training bank group and bank address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.tbyte 0x08 0.--17. 1. " DTROW ,Data training row address" line.long 0x0C "DTAR1,Data Training Address Register 1" hexmask.long.word 0x0C 16.--24. 1. " DTCOL1 ,Data training column address" hexmask.long.word 0x0C 0.--8. 1. " DTCOL0 ,Data training column address" line.long 0x10 "DTAR2,Data Training Address Register 2" hexmask.long.word 0x10 16.--24. 1. " DTCOL3 ,Data training column address" hexmask.long.word 0x10 0.--8. 1. " DTCOL2 ,Data training column address" group.long 0x218++0x07 line.long 0x00 "DTDR0,Data Training Data Register 0" hexmask.long.byte 0x00 24.--31. 1. " DTBYTE3 ,Data training data" hexmask.long.byte 0x00 16.--23. 1. " DTBYTE2 ,Data training data" hexmask.long.byte 0x00 8.--15. 1. " DTBYTE1 ,Data training data" hexmask.long.byte 0x00 0.--7. 1. " DTBYTE0 ,Data training data" line.long 0x04 "DTDR1,Data Training Data Register 1" hexmask.long.byte 0x04 24.--31. 1. " DTBYTE7 ,Data training data" hexmask.long.byte 0x04 16.--23. 1. " DTBYTE6 ,Data training data" hexmask.long.byte 0x04 8.--15. 1. " DTBYTE5 ,Data training data" hexmask.long.byte 0x04 0.--7. 1. " DTBYTE4 ,Data training data" rgroup.long 0x230++0x0F line.long 0x00 "DTEDR0,Data Training Eye Data Register 0" hexmask.long.byte 0x00 24.--31. 1. " DTWBMX ,Data training write BDL shift maximum" bitfld.long 0x00 18.--23. " DTWBMN ,Data training write BDL shift minimum" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "DTEDR1,Data Training Eye Data Register 1" hexmask.long.byte 0x04 24.--31. 1. " DTRBMX ,Data training read BDL shift maximum" bitfld.long 0x04 18.--23. " DTRBMN ,Data training read BDL shift minimum" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.word 0x04 9.--17. 1. " DTRLMX ,Data training RDQS LCDL maximum" hexmask.long.word 0x04 0.--8. 1. " DTRLMN ,Data training RDQS LCDL minimum" line.long 0x08 "DTEDR2,Data Training Eye Data Register 2" hexmask.long.byte 0x08 24.--31. 1. " DTRBMX ,Data training read BDL shift maximum" bitfld.long 0x08 18.--23. " DTRBMN ,Data training read BDL shift minimum" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.word 0x08 9.--17. 1. " DTRLMX ,Data training RDQSN LCDL maximum" hexmask.long.word 0x08 0.--8. 1. " DTRLMN ,Data training RDQSN LCDL minimum" line.long 0x0C "VTDR,VREF Training Data Register" hexmask.long.byte 0x0C 24.--30. 1. " HVREFMX ,DRAM DQ VREF maximum" hexmask.long.byte 0x0C 16.--22. 1. " HVREFMN ,DRAM DQ VREF minimum" bitfld.long 0x0C 8.--13. " DVREFMX ,DRAM DQ VREF maximum" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x0C 0.--5. " DVREFMN ,DRAM DQ VREF minimum" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x240++0x07 line.long 0x00 "CATR0,CA Training Register 0" bitfld.long 0x00 16.--20. " CACD ,Minimum time between two consectuve CA calibration command" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--12. " CAADR ,Minimum wait time before sampling the CA response after calibration command has been sent to the memory" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 4.--7. " CA1BYTE1 ,CA_1 response byte lane 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " CA1BYTE0 ,CA_1 response byte lane 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "CATR1,CA Training Register 1" bitfld.long 0x04 24.--27. " CA0BYTE1 ,CA_0 response byte lane 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 20.--23. " CA0BYTE0 ,CA_0 response byte lane 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 16.--19. " CAMRZ ,Minimum time for DRAM DQ going tristate after MRW CA exit calibration command" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 12.--15. " CACKEH ,Minimum time for CKE high after last CA calibration response is driven by memory" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 8.--11. " CACKEL ,Minimum time for CKE going low after CA calibration mode is programmed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 4.--7. " CAEXT ,Minimum time for CA calibration exit command after CKE is high" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. " CAENT ,Minimum time for first CA calibration command after CKE is low" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x250++0x0F line.long 0x00 "DQSDR0,DQS Drift Register 0" bitfld.long 0x00 28.--31. " DFTDLY ,Number of delay taps by which the DQS gate LCDL will be updated when DQS drift is detected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 27. " DFTZQUP ,Drift impedance update" "Not updated,Updated" bitfld.long 0x00 26. " DFTDDLUP ,Drift DDL update" "Not updated,Updated" bitfld.long 0x00 20.--21. " DFTRDSPC ,Drift read spacing" "0,1,2,3" textline " " bitfld.long 0x00 16.--19. " DFTB2BRD ,Drift Back-to-Back reads" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DFTIDLRD ,Drift idle reads" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " DFTGPULSE ,Gate pulse enable" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 2.--3. " DFTUPMODE ,DQS drift update mode" "0,1,2,3" textline " " bitfld.long 0x00 1. " DFTDTMODE ,DQS drift detection mode" "0,1" bitfld.long 0x00 0. " DFTDTEN ,DQS drift detection enable" "Disabled,Enabled" line.long 0x04 "DQSDR1,DQS Drift Register 1" bitfld.long 0x04 29.--31. " DFTUPDACKF ,Drift DFU update request ACK to DQS drift FSM issuing IDLE read cycles factor" "0,1,2,3,4,5,6,7" bitfld.long 0x04 24.--28. " DFTUPDACKC ,Drift DFI update request ACK to DQS drift FSM issuing IDLE read cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 20.--23. " DFTRDB2BF ,Drift Back-to-Back read cycles factor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 16.--19. " DFTRDIDLF ,Drift idle read cycles factor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.byte 0x04 8.--15. 1. " DFTRDB2BC ,Drift Back-to-Back read cycles" hexmask.long.byte 0x04 0.--7. 1. " DFTRDIDLC ,Drift idle read cycles" line.long 0x08 "DQSDR2,DQS Drift Register 2" hexmask.long.byte 0x08 16.--23. 1. " DFTTHRSH ,Drift threshold" hexmask.long.word 0x08 0.--15. 1. " DFTMNTPRD ,Drift monitor period" line.long 0x0C "DTEDR3,Data Training Eye Data Register 3" bitfld.long 0x0C 18.--23. " WDQLMX ,Data training WDQ LCDL maximum" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.word 0x0C 0.--8. 1. " WDQLMN ,Data training WDQD LCDL minimum" group.long 0x300++0x17 line.long 0x00 "DCUAR,DCU Address Register" bitfld.long 0x00 16.--19. " CSADDR_R ,Cache slice address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " CWADDR_R ,Cache word address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. " ATYPE ,Access type" "0,1" bitfld.long 0x00 10. " INCA ,Increment address" "0,1" textline " " bitfld.long 0x00 8.--9. " CSEL ,Cache select" "0,1,2,3" bitfld.long 0x00 4.--7. " CSADDR_W ,Cache slice address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " CWADDR_W ,Cache word address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "DCUDR,DCU Data Register" line.long 0x08 "DCURR,DCU Run Register" bitfld.long 0x08 23. " XCEN ,Expected compare enable" "Disabled,Enabled" bitfld.long 0x08 22. " RCEN ,Read capture enable" "Disabled,Enabled" bitfld.long 0x08 21. " SCOF ,Stop capture on full" "0,1" bitfld.long 0x08 20. " SONF ,Stop on nth fail" "0,1" textline " " hexmask.long.byte 0x08 12.--19. 1. " NFAIL ,Number of failures" bitfld.long 0x08 8.--11. " EADDR ,End address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 4.--7. " SADDR ,Start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--3. " DINST ,DCU instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x0C "DCULR,DCU Loop Register" bitfld.long 0x0C 28.--31. " XLEADDR ,Expected data loop end address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 17. " IDA ,Increment DRAM address" "0,1" bitfld.long 0x0C 16. " LINF ,Loop infinite" "0,1" hexmask.long.byte 0x0C 8.--15. 1. " LCNT ,Loop count" textline " " bitfld.long 0x0C 4.--7. " LEADDR ,Loop end address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 0.--3. " LSADDR ,Loop start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x10 "DCUGCR,DCU General Configuration Register" hexmask.long.word 0x10 0.--15. 1. " RCSW ,Read capture start word" line.long 0x14 "DCUTPR,DCU Timing Parameters Register" hexmask.long.word 0x14 16.--31. 1. " TDCUT2 ,DCU generic timing parameter 2" hexmask.long.byte 0x14 8.--15. 1. " TDCUT1 ,DCU generic timing parameter 1" hexmask.long.byte 0x14 0.--7. 1. " TDCUT0 ,DCU generic timing parameter 0" rgroup.long 0x318++0x07 line.long 0x00 "DCUSR0,DCU Status Register 0" bitfld.long 0x00 2. " CFULL ,Capture full" "Not full,Full" bitfld.long 0x00 1. " CFAIL ,Capture fail" "Not failed,Failed" bitfld.long 0x00 0. " RDONE ,Run done" "Not done,Done" line.long 0x04 "DCUSR1,DCU Status Register 1" hexmask.long.byte 0x04 24.--31. 1. " LPCNT ,Loop count" hexmask.long.byte 0x04 16.--23. 1. " FLCNT ,Fail count" hexmask.long.word 0x04 0.--15. 1. " RDCNT ,Read count" group.long 0x400++0x2F line.long 0x00 "BISTRR,BIST Run Register" bitfld.long 0x00 29. " BPRBST ,BIST PRBS type" "0,1" bitfld.long 0x00 28. " BSOMA ,BIST stop on maximum address" "Disabled,Enabled" bitfld.long 0x00 26.--27. " BACDPAT ,BIST AC data pattern" "0,1,2,3" bitfld.long 0x00 25. " BCCSEL ,BIST clock cycle select" "0,1" textline " " bitfld.long 0x00 23.--24. " BCKSEL ,BIST CK select" "0,1,2,3" bitfld.long 0x00 19.--22. " BDXSEL ,BIST DATX8 select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 17.--18. " BDXDPAT ,BIST data pattern" "0,1,2,3" bitfld.long 0x00 16. " BDMEN ,BIST data mask enable" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " BACEN ,BIST AC enable" "Disabled,Enabled" bitfld.long 0x00 14. " BDXEN ,BIST DATX8 enable" "Disabled,Enabled" bitfld.long 0x00 13. " BSONF ,BIST stop on nth fail" "Disabled,Enabled" hexmask.long.byte 0x00 5.--12. 1. " NFAIL ,Number of failures" textline " " bitfld.long 0x00 4. " BINF ,BIST infinite run" "0,1" bitfld.long 0x00 3. " BMODE ,BIST mode" "0,1" bitfld.long 0x00 0.--2. " BINST ,BIST instruction" "0,1,2,3,4,5,6,7" line.long 0x04 "BISTWCR,BIST Word Count Register" hexmask.long.word 0x04 16.--31. 1. " BACWCNT ,BIST AC word count" hexmask.long.word 0x04 0.--15. 1. " BDXWCNT ,BIST DX word count" textline " " line.long 0x08 "BISTMSKR0,BIST Mask Register 0" bitfld.long 0x08 21. " CSMSK[1:0] ,Mask bit for CS_N bit 1" "0,1" bitfld.long 0x08 20. ",Mask bit for CS_N bit 0" "0,1" bitfld.long 0x08 19. " ACTMSK ,Mask bit for the RAS" "0,1" hexmask.long.tbyte 0x08 0.--17. 1. " AMSK ,Mask bit for address bits" line.long 0x0C "BISTMSKR1,BIST Mask Register 1" bitfld.long 0x0C 31. " DMMSK[3:0] ,Mask bit for the data mask DM bit 3" "0,1" bitfld.long 0x0C 30. ",Mask bit for the data mask DM bit 2" "0,1" bitfld.long 0x0C 29. ",Mask bit for the data mask DM bit 1" "0,1" bitfld.long 0x0C 28. ",Mask bit for the data mask DM bit 0" "0,1" bitfld.long 0x0C 27. " PARINMSK ,Mask bit for the PAR_IN" "0,1" bitfld.long 0x0C 24. " CIDMSK ,Mask bits for chip IP bits" "0,1" bitfld.long 0x0C 17. " ODTMSK[1:0] ,Mask bit for ODT bit 1" "0,1" bitfld.long 0x0C 16. ",Mask bit for ODT bit 0" "0,1" textline " " bitfld.long 0x0C 9. " CKEMSK[1:0] ,Mask bit for CKE bit 1" "0,1" bitfld.long 0x0C 8. ",Mask bit for CKE bit 0" "0,1" bitfld.long 0x0C 7. " BAMSK[3:0] ,Mask bit for bank address bit 3" "0,1" bitfld.long 0x0C 6. ",Mask bit for bank address bit 2" "0,1" bitfld.long 0x0C 5. ",Mask bit for bank address bit 1" "0,1" bitfld.long 0x0C 4. ",Mask bit for bank address bit 0" "0,1" line.long 0x10 "BISTMSKR2,BIST Mask Register 2" textline " " line.long 0x14 "BISTLSR,BIST LFSR Seed Register" line.long 0x18 "BISTAR0,BIST Address Register 0" bitfld.long 0x18 28.--31. " BBANK ,BIST bank address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x18 0.--11. 1. " BCOL ,BIST column address" line.long 0x1C "BISTAR1,BIST Address Register 1" bitfld.long 0x1C 16.--19. " BMRANK ,BIST maximum rank" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x1C 4.--15. 1. " BAINC ,BIST address increment" bitfld.long 0x1C 0.--3. " BRANK ,BIST rank" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x20 "BISTAR2,BIST Address Register 2" bitfld.long 0x20 28.--31. " BMBANK ,BIST maximum bank address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x20 0.--11. 1. " BMCOL ,BIST maximum column address" line.long 0x24 "BISTAR3,BIST Address Register 3" hexmask.long.tbyte 0x24 0.--17. 1. " BROW ,BIST row address" line.long 0x28 "BISTAR4,BIST Address Register 4" hexmask.long.tbyte 0x28 0.--17. 1. " BMROW ,BIST maximum row address" line.long 0x2C "BISTUDPR,BIST User Data Pattern Register" hexmask.long.word 0x2C 16.--31. 1. " BUDP1 ,BIST user data pattern 1" hexmask.long.word 0x2C 0.--15. 1. " BUDP0 ,BIST user data pattern 0" rgroup.long 0x430++0x33 line.long 0x00 "BISTGSR,BIST General Status Register" bitfld.long 0x00 28.--29. " RASBER ,Ras_n/act_n bit error" "0,1,2,3" hexmask.long.byte 0x00 20.--27. 1. " DMBER ,DM bit error" hexmask.long.word 0x00 2.--10. 1. " BDXERR ,BIST data error" bitfld.long 0x00 1. " BACERR ,BIST address/command error" "No error,Error" textline " " bitfld.long 0x00 0. " BDONE ,BIST done" "Not done,Done" line.long 0x04 "BISTWER0,BIST Word Error Register 0" hexmask.long.tbyte 0x04 0.--17. 1. " ACWER ,Address/command word error" line.long 0x08 "BISTWER1,BIST Word Error Register 1" hexmask.long.word 0x08 0.--15. 1. " DXWER ,Byte word error" line.long 0x0C "BISTBER0,BIST Bit Error Register 0" line.long 0x10 "BISTBER1,BIST Bit Error Register 1" bitfld.long 0x10 8.--11. " CSBER ,CS_N bit error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x10 0.--7. 1. " BABER ,Bank address bit error" line.long 0x14 "BISTBER2,BIST Bit Error Register 2" line.long 0x18 "BISTBER3,BIST Bit Error Register 3" line.long 0x1C "BISTBER4,BIST Bit Error Register 4" bitfld.long 0x1C 8.--9. " CIDBER ,Chip ID bit error" "0,1,2,3" bitfld.long 0x1C 0.--3. " ABER ,Address bit error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x20 "BISTWCSR,BIST Word Count Status Register" hexmask.long.word 0x20 16.--31. 1. " DXWCNT ,Byte word count" hexmask.long.word 0x20 0.--15. 1. " ACWCNT ,Address/command word count" line.long 0x24 "BISTFWR0,BIST Fail Word Register 0" bitfld.long 0x24 21. " CSWEBS[1] ,Bit status during a word error for CS# bit 1" "No error,Error" bitfld.long 0x24 20. " [0] ,Bit status during a word error for CS# bit 0" "No error,Error" bitfld.long 0x24 18. " ACTWEBS ,Bit status during a word error for the RAS" "No error,Error" hexmask.long.tbyte 0x24 0.--17. 1. " AWEBS ,Bit status during a word error for address bits" line.long 0x28 "BISTFWR1,BIST Fail Word Register 1" bitfld.long 0x28 31. " DMWEBS[3] ,Bit status during a word error for the data mask DM bit 3" "No error,Error" bitfld.long 0x28 30. " [2] ,Bit status during a word error for the data mask DM bit 2" "No error,Error" bitfld.long 0x28 29. " [1] ,Bit status during a word error for the data mask DM bit 1" "No error,Error" bitfld.long 0x28 28. " [0] ,Bit status during a word error for the data mask DM bit 0" "No error,Error" textline " " bitfld.long 0x28 20. " CIDWEBS ,Bit status during a word error for chip ID bits" "No error,Error" bitfld.long 0x28 19. " BAWEBS[3] ,Bit status during a word error for the bank address bit 3" "No error,Error" bitfld.long 0x28 18. " [2] ,Bit status during a word error for the bank address bit 2" "No error,Error" bitfld.long 0x28 17. " [1] ,Bit status during a word error for the bank address bit 1" "No error,Error" textline " " bitfld.long 0x28 16. " [0] ,Bit status during a word error for the bank address bit 0" "No error,Error" bitfld.long 0x28 9. " ODTWEBS[1] ,Bit status during a word error for the ODT bit 1" "No error,Error" bitfld.long 0x28 8. " [0] ,Bit status during a word error for the ODT bit 0" "No error,Error" bitfld.long 0x28 1. " CKEWEBS[1] ,Bit status during a word error for the CKE bit 1" "No error,Error" textline " " bitfld.long 0x28 0. " [0] ,Bit status during a word error for the CKE bit 0" "No error,Error" line.long 0x2C "BISTFWR2,BIST Fail Word Register 2" line.long 0x30 "BISTBER5,BIST Bit Error Register 5" bitfld.long 0x30 16.--19. " ODTBER ,ODT bit error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x30 0.--3. " CKEBER ,CKE bit error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x4DC++0x03 line.long 0x00 "RANKIDR,Rank ID Register" bitfld.long 0x00 16.--19. " RANKRID ,Rank read ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " RANKWID ,Rank write ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x4E8++0x03 line.long 0x00 "RIOCR2,Rank I/O Configuration Register 2" bitfld.long 0x00 24.--25. " COEMODE ,SDRAM C output enable OE mode selection" "0,1,2,3" bitfld.long 0x00 0.--3. " CSOEMODE ,SDRAM cs_n output enable OE mode selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x4F0++0x07 line.long 0x00 "RIOCR4,Rank I/O Configuration Register 4" bitfld.long 0x00 0.--3. " CKEOEMODE ,SDRAM CKE output enable OE mode selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "RIOCR5,Rank I/O Configuration Register 5" bitfld.long 0x04 0.--3. " ODTOEMODE ,SDRAM On-die termination output enable OE mode selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " group.long 0x500++0x17 line.long 0x00 "ACIOCR0,AC I/O Configuration Register 0" bitfld.long 0x00 30.--31. " ACSR ,Address/command slew rate D3F I/O only" "0,1,2,3" bitfld.long 0x00 29. " RSTIOM ,SDRAM reset I/O mode" "0,1" bitfld.long 0x00 28. " RSTPDR ,SDRAM reset power down receiver" "0,1" bitfld.long 0x00 26. " RSTODT ,SDRAM reset On-Die termination" "0,1" textline " " bitfld.long 0x00 6.--9. " CKDCC ,CK duty cycle correction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--5. " ACPDRMODE ,AC power down receiver mode" "0,1,2,3" bitfld.long 0x00 2.--3. " ACODTMODE ,AC On-die termination mode" "0,1,2,3" bitfld.long 0x00 0. " ACRANKCLKSEL ,Control delayed or non-delayed clock to CS_N/ODT?CKE AC slices" "0,1" line.long 0x04 "ACIOCR1,AC I/O Configuration Register 1" line.long 0x08 "ACIOCR2,AC I/O Configuration Register 2" bitfld.long 0x08 31. " CLKGENCLKGATE ,Clock gating for glue logic inside CLKGEN and glue logic inside CONTROL slice" "No gating,Gating" bitfld.long 0x08 30. " ACOECLKGATE0 ,Clock gating for output enable D slices [0]" "No gating,Gating" bitfld.long 0x08 29. " ACPDRCLKGATE0 ,Clock gating for power down receiver D slices [0]" "No gating,Gating" bitfld.long 0x08 28. " ACTECLKGATE0 ,Clock gating for termination enable D slices [0]" "No gating,Gating" textline " " bitfld.long 0x08 26.--27. " CKNCLKGATE0 ,Clock gating for CK# D slices [1:0]" "0,1,2,3" bitfld.long 0x08 24.--25. " CKCLKGATE0 ,Clock gating for CK D slices [1:0]" "0,1,2,3" hexmask.long.tbyte 0x08 0.--23. 1. " ACCLKGATE0 ,Clock gating for AC D slices [23:0]" line.long 0x0C "ACIOCR3,AC I/O Configuration Register 3" bitfld.long 0x0C 30.--31. " PAROEMODE ,SDRAM parity output enable OE mode selection" "0,1,2,3" bitfld.long 0x0C 26.--29. " BGOEMODE ,SDRAM bank group output enable OE mode selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 22.--25. " BAOEMODE ,SDRAM bank address output enable OE mode selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 20.--21. " A17OEMODE ,SDRAM A[17] output enable OE mode selection" "0,1,2,3" textline " " bitfld.long 0x0C 18.--19. " A16OEMODE ,SDRAM A[16] / RAS_N output enable OE mode selection" "0,1,2,3" bitfld.long 0x0C 16.--17. " ACTOEMODE ,SDRAM ACT_N output enable OE mode selection" "0,1,2,3" bitfld.long 0x0C 0.--3. " CKOEMODE ,SDRAM CK output enable OE mode selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x10 "ACIOCR4,AC I/O Configuration Register 4" bitfld.long 0x10 31. " LBCLKGATE ,Clock gating for AC LB slices and loopback read valid slices" "No gating,Gating" bitfld.long 0x10 30. " ACOECLKGATE1 ,Clock gating for output enable D slices [1]" "No gating,Gating" bitfld.long 0x10 29. " ACPDRCLKGATE1 ,Clock gating for power down receiver D slices [1]" "No gating,Gating" bitfld.long 0x10 28. " ACTECLKGATE1 ,Clock gating for termination enable D slices [1]" "No gating,Gating" textline " " bitfld.long 0x10 26.--27. " CKNCLKGATE1 ,Clock gating for CK# D slices [3:2]" "0,1,2,3" bitfld.long 0x10 24.--25. " CKCLKGATE1 ,Clock gating for CK D slices [3:2]" "0,1,2,3" hexmask.long.tbyte 0x10 0.--23. 1. " ACCLKGATE1 ,Clock gating for AC D slices [47:24]" line.long 0x14 "ACIOCR5,AC I/O Configuration Register 5" bitfld.long 0x14 25.--27. " ACVREFIOM ,IOM bits for PVREF and PVREFE cells in AC IO ring" "0,1,2,3,4,5,6,7" bitfld.long 0x14 22.--24. " ACXIOM ,AC IO mode" "0,1,2,3,4,5,6,7" hexmask.long.word 0x14 11.--21. 1. " ACTXM ,AC IO transmitter mode" hexmask.long.word 0x14 0.--10. 1. " ACRXM ,AC IO receiver mode" group.long 0x520++0x03 line.long 0x00 "IOVCR0,IO VREF Control Register 0" bitfld.long 0x00 28. " ACREFPEN ,Address/command lane VREF pad enable" "Disabled,Enabled" bitfld.long 0x00 26.--27. " ACREFEEN ,Address/command lane internal VREF enable" "0,1,2,3" bitfld.long 0x00 25. " ACREFSEN ,Address/command lane Single-End VREF enable" "Disabled,Enabled" bitfld.long 0x00 24. " ACREFIEN ,Address/command lane internal VREF enable" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " ACREFESELRANGE ,External VREF generato REFSEL range select" "0,1" hexmask.long.byte 0x00 16.--22. 1. " ACREFESEL ,Address/command lane external VREF select" bitfld.long 0x00 15. " ACREFSSELRANGE ,Single ended VREF generator REFSEL range select" "0,1" hexmask.long.byte 0x00 8.--14. 1. " ACREFSSEL ,Address/command lane Single-End VREF select" textline " " bitfld.long 0x00 7. " ACVREFISELRANGE ,Internal VREF generator REFSEL ragne select" "0,1" hexmask.long.byte 0x00 0.--6. 1. " ACVREFISEL ,REFSEL control for internal AC ios" group.long 0x528++0x07 line.long 0x00 "VTCR0,VREF Training Control Register 0" bitfld.long 0x00 29.--31. " TVREF ,Number of CTL_CLK required to meet > 150ns timing requirements during DRAM DQ VREF training" "0,1,2,3,4,5,6,7" bitfld.long 0x00 28. " DVEN ,DRM DQ VREF training enable" "Disabled,Enabled" bitfld.long 0x00 27. " PDAEN ,Per device addressability enable" "Disabled,Enabled" bitfld.long 0x00 22.--25. " VWCR ,VREF word count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 18.--21. " DVSS ,DRAM DQ VREF step size used during DRAM VREF training" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--17. " DVMAX ,Maximum VREF limit value used during DRAM VREF training" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 6.--11. " DVMIN ,Minimum VREF limit value used during DRAM VREF training" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " DVINIT ,Initial DRAM DQ VREF value used during DRAM VREF training" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "VTCR1,VREF Training Control Register 1" bitfld.long 0x04 28.--31. " HVSS ,Host VREF step size used during VREF training" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x04 20.--26. 1. " HVMAX ,Maximum VREF limit value used during DRAM VREF training" hexmask.long.byte 0x04 12.--18. 1. " HVMIN ,Minimum VREF limit value used during DRAM VREF training" bitfld.long 0x04 9.--10. " SHRNK ,Static host VREF rank value" "0,1,2,3" textline " " bitfld.long 0x04 8. " SHREN ,Static host VREF rank enable" "Disabled,Enabled" bitfld.long 0x04 5.--7. " TVREFIO ,Number of CTL_CLK required to meet > 200ns VREF settling timing requirements during host IO VREF training" "0,1,2,3,4,5,6,7" bitfld.long 0x04 3.--4. " EOFF ,Eye LCDL offset value for VREF training" "0,1,2,3" bitfld.long 0x04 2. " ENUM ,Number of LCDL eye points for which VREF training is repeated" "0,1" textline " " bitfld.long 0x04 1. " HVEN ,HOST IO internal VREF training enable" "Disabled,Enabled" bitfld.long 0x04 0. " HVIO ,Host IO type control" "0,1" textline " " group.long 0x540++0x47 line.long 0x00 "ACBDLR0,AC Bit Delay Line Register 0" bitfld.long 0x00 24.--29. " CK3BD ,CK3 bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 16.--21. " CK2BD ,CK2 bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 8.--13. " CK1BD ,CK1 bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " CK0BD ,CK0 bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "ACBDLR1,AC Bit Delay Line Register 1" bitfld.long 0x04 24.--29. " PARBD ,Delay select for the BDL on parity" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 16.--21. " A16BD ,Delay select for the BDL on address A[16]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 8.--13. " A17BD ,Delay select for the BDL on address A[17]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 0.--5. " ACTBD ,Delay select for the BDL on ACTN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x08 "ACBDLR2,AC Bit Delay Line Register 2" bitfld.long 0x08 24.--29. " BG1BD ,Delay select for the BDL on BG[1]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x08 16.--21. " BG0BD ,Delay select for the BDL on BG[0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x08 8.--13. " BA1BD ,Delay select for the BDL on BA[1]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x08 0.--5. " BA0BD ,Delay select for the BDL on BA[0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x0C "ACBDLR3,AC Bit Delay Line Register 3" bitfld.long 0x0C 24.--29. " CS3BD ,Delay select for the BDL on CS[3]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x0C 16.--21. " CS2BD ,Delay select for the BDL on CS[2]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x0C 8.--13. " CS1BD ,Delay select for the BDL on CS[1]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x0C 0.--5. " CS0BD ,Delay select for the BDL on CS[0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x10 "ACBDLR4,AC Bit Delay Line Register 4" bitfld.long 0x10 24.--29. " ODT3BD ,Delay select for the BDL on ODT[3]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x10 16.--21. " ODT2BD ,Delay select for the BDL on ODT[2]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x10 8.--13. " ODT1BD ,Delay select for the BDL on ODT[1]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x10 0.--5. " ODT0BD ,Delay select for the BDL on ODT[0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x14 "ACBDLR5,AC Bit Delay Line Register 5" bitfld.long 0x14 24.--29. " CKE3BD ,Delay select for the BDL on CKE[3]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x14 16.--21. " CKE2BD ,Delay select for the BDL on CKE[2]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x14 8.--13. " CKE1BD ,Delay select for the BDL on CKE[1]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x14 0.--5. " CKE0BD ,Delay select for the BDL on CKE[0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x18 "ACBDLR6,AC Bit Delay Line Register 6" bitfld.long 0x18 24.--29. " A03BD ,Delay select for the BDL on address A[3]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x18 16.--21. " A02BD ,Delay select for the BDL on address A[2]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x18 8.--13. " A01BD ,Delay select for the BDL on address A[1]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x18 0.--5. " A00BD ,Delay select for the BDL on address A[0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x1C "ACBDLR7,AC Bit Delay Line Register 7" bitfld.long 0x1C 24.--29. " A07BD ,Delay select for the BDL on address A[7]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x1C 16.--21. " A06BD ,Delay select for the BDL on address A[6]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x1C 8.--13. " A05BD ,Delay select for the BDL on address A[5]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x1C 0.--5. " A04BD ,Delay select for the BDL on address A[4]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x20 "ACBDLR8,AC Bit Delay Line Register 8" bitfld.long 0x20 24.--29. " A11BD ,Delay select for the BDL on address A[11]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x20 16.--21. " A10BD ,Delay select for the BDL on address A[10]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x20 8.--13. " A09BD ,Delay select for the BDL on address A[9]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x20 0.--5. " A08BD ,Delay select for the BDL on address A[8]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x24 "ACBDLR9,AC Bit Delay Line Register 9" bitfld.long 0x24 24.--29. " A15BD ,Delay select for the BDL on address A[15]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x24 16.--21. " A14BD ,Delay select for the BDL on address A[14]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x24 8.--13. " A13BD ,Delay select for the BDL on address A[13]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x24 0.--5. " A12BD ,Delay select for the BDL on address A[12]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x28 "ACBDLR10,AC Bit Delay Line Register 10" bitfld.long 0x28 24.--29. " CID2BD ,Delay select for the BDL on chip ID CID[2]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x28 16.--21. " CID1BD ,Delay select for the BDL on chip ID CID[1]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x28 8.--13. " CID0BD ,Delay select for the BDL on chip ID CID[0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x2C "ACBDLR11,AC Bit Delay Line Register 11" bitfld.long 0x2C 24.--29. " CS7BD ,Delay select for the BDL on CS[7]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x2C 16.--21. " CS6BD ,Delay select for the BDL on CS[6]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x2C 8.--13. " CS5BD ,Delay select for the BDL on CS[5]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x2C 0.--5. " CS4BD ,Delay select for the BDL on CS[4]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x30 "ACBDLR12,AC Bit Delay Line Register 12" bitfld.long 0x30 24.--29. " CS11BD ,Delay select for the BDL on CS[11]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x30 16.--21. " CS10BD ,Delay select for the BDL on CS[10]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x30 8.--13. " CS9BD ,Delay select for the BDL on CS[9]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x30 0.--5. " CS8BD ,Delay select for the BDL on CS[8]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x34 "ACBDLR13,AC Bit Delay Line Register 13" bitfld.long 0x34 24.--29. " ODT7BD ,Delay select for the BDL on ODT[7]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x34 16.--21. " ODT6BD ,Delay select for the BDL on ODT[6]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x34 8.--13. " ODT5BD ,Delay select for the BDL on ODT[5]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x34 0.--5. " ODT4BD ,Delay select for the BDL on ODT[4]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x38 "ACBDLR14,AC Bit Delay Line Register 14" bitfld.long 0x38 24.--29. " CKE7BD ,Delay select for the BDL on CKE[7]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x38 16.--21. " CKE6BD ,Delay select for the BDL on CKE[6]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x38 8.--13. " CKE5BD ,Delay select for the BDL on CKE[5]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x38 0.--5. " CKE4BD ,Delay select for the BDL on CKE[4]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x3C "ACBDLR15,AC Bit Delay Line Register 15" bitfld.long 0x3C 16.--21. " OEBD ,Delay select for the BDL on OE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x3C 8.--13. " TEBD ,Delay select for the BDL on TE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x3C 0.--5. " PDRBD ,Delay select for the BDL on PDR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x40 "ACBDLR16,AC Bit Delay Line Register 16" bitfld.long 0x40 24.--29. " CKN3BD ,Delay select for the BDL on CKN[3]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x40 16.--21. " CKN2BD ,Delay select for the BDL on CKN[2]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x40 8.--13. " CKN1BD ,Delay select for the BDL on CKN[1]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x40 0.--5. " CKN0BD ,Delay select for the BDL on CKN[0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x44 "ACLCDLR,AC Local Calibrated Delay Line Register" hexmask.long.word 0x44 16.--24. 1. " ACD1 ,Address/command delay for AC macro 1" hexmask.long.word 0x44 0.--8. 1. " ACD ,Address/command delay for AC macro 0" group.long 0x5A0++0x07 line.long 0x00 "ACMDLR0,AC Master Delay Line Register 0" hexmask.long.word 0x00 16.--24. 1. " TPRD ,Target period" hexmask.long.word 0x00 0.--8. 1. " IPRD ,Initial period" line.long 0x04 "ACMDLR1,AC Master Delay Line Register 1" hexmask.long.word 0x04 16.--24. 1. " MDLD1 ,MDL delay for AC macro 1" hexmask.long.word 0x04 0.--8. 1. " MDLD ,MDL delay for AC macro 0" textline " " group.long 0x680++0x03 line.long 0x00 "ZQCR,ZQ Impedance Control Register" bitfld.long 0x00 25. " ZQREFISELRANGE ,ZQ VREF range" "0,1" bitfld.long 0x00 19.--24. " PGWAIT_FRQB ,Programmable wait for frequency B" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 13.--18. " PGWAIT_FRQA ,Programmable wait for frequency A" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 12. " ZQREFPEN ,ZQ VREF pad enable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " ZQREFIEN ,ZQ internal VREF enable" "Disabled,Enabled" bitfld.long 0x00 9.--10. " ODT_MODE ,Choice of termination mode" "0,1,2,3" bitfld.long 0x00 8. " FORCE_ZCAL_VT_UPDATE ,Force ZCAL VT update" "0,1" bitfld.long 0x00 5.--7. " IODLMT ,IO VT drift limit" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 4. " AVGEN ,Averaging algorithm enable" "Disabled,Enabled" bitfld.long 0x00 2.--3. " AVGMAX ,Maximum number of averaging rounds to be used by averaging algorithm" "0,1,2,3" bitfld.long 0x00 1. " ZCALT ,ZQ calibration type" "0,1" bitfld.long 0x00 0. " ZQPD ,ZQ power down" "No,Yes" group.long 0x684++0x07 line.long 0x00 "ZQ0PR0,ZQ 0 Impedance Control Program Register 0" bitfld.long 0x00 31. " PD_DRV_ZDEN ,Pull-down drive strength ZCTRL over-ride enable" "Disabled,Enabled" bitfld.long 0x00 30. " PU_DRV_ZDEN ,Pull-up drive strength ZCTRL over-ride enable" "Disabled,Enabled" bitfld.long 0x00 29. " PD_ODT_ZDEN ,Pull-down termination ZCTRL over-ride enable" "Disabled,Enabled" bitfld.long 0x00 28. " PU_ODT_ZDEN ,Pull-up termination ZCTRL over-ride enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " ZSEGBYP ,Calibration segment bypass" "No bypass,Bypass" bitfld.long 0x00 25.--26. " ZLE_MODE ,VREF latch mode" "0,1,2,3" bitfld.long 0x00 22.--24. " ODT_ADJUST ,Termination adjustment" "0,1,2,3,4,5,6,7" bitfld.long 0x00 19.--21. " PD_DRV_ADJUST ,Pulldown drive strength adjustment" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 16.--18. " PU_DRV_ADJUST ,Pullup drive strength adjustment" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--15. " ZPROG_DRAM_ODT ,DRAM impedance divide ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " ZPROG_HOST_ODT ,HOST impedance divide ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " ZPROG_ASYM_DRV_PD ,Impedance divide ratio pulldown drive calibration during asymmetric drive strength calibration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 0.--3. " ZPROG_ASYM_DRV_PU ,Impedance divide ratio pullup drive calibration during asymmetric drive strength calibration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "ZQ0PR1,ZQ 0 Impedance Control Program Register 1" hexmask.long.byte 0x04 8.--14. 1. " PU_REFSEL ,Pull-up REFSEL for PZCTRL cell" hexmask.long.byte 0x04 0.--6. 1. " PD_REFSEL ,Pull-down REFSEL for PZCTRL cell" rgroup.long (0x684+0x08)++0x07 line.long 0x00 "ZQ0DR0,ZQ 0 Impedance Control Data Register 0" hexmask.long.word 0x00 16.--25. 1. " ZDATA_PU_DRV_RESULT ,Pull-up drive strength calibration code result" hexmask.long.word 0x00 0.--9. 1. " ZDATA_PD_DRV_RESULT ,Pull-down drive strength calibration code result" line.long 0x04 "ZQ0DR1,ZQ 0 Impedance Control Data Register 1" hexmask.long.word 0x04 16.--25. 1. " ZDATA_PU_ODT_RESULT ,Pull-up termination calibration code result" hexmask.long.word 0x04 0.--9. 1. " ZDATA_PD_ODT_RESULT ,Pull-down termination calibration code result" group.long (0x684+0x10)++0x07 line.long 0x00 "ZQ0R0,ZQ 0 Impedance Control Override Data Register 0" hexmask.long.word 0x00 16.--25. 1. " ZDATA_PU_DRV_OVRD ,Override value for the pull-up output impedance" hexmask.long.word 0x00 0.--9. 1. " ZDATA_PD_DRV_OVRD ,Override value for the pull-down output impedance" line.long 0x04 "ZQ0R1,ZQ 0 Impedance Control Override Data Register 1" hexmask.long.word 0x04 16.--25. 1. " ZDATA_PU_ODT_OVRD ,Override value for the pull-up termination" hexmask.long.word 0x04 0.--9. 1. " ZDATA_PD_ODT_OVRD ,Override value for the pull-down termination" rgroup.long (0x684+0x18)++0x03 line.long 0x00 "ZQ0SR,ZQ 0 Impedance Control Status Register" bitfld.long 0x00 13. " PD_ODT_SAT ,Pulldown drive strength code saturated due to termination strength adjustment setting in ZQ0PR" "Not saturated,Saturated" bitfld.long 0x00 12. " PU_ODT_SAT ,Pullup drive strength code saturated due to termination strength adjustment setting in ZQ0PR" "Not saturated,Saturated" bitfld.long 0x00 11. " PD_DRV_SAT ,Pulldown drive strength code saturated due to drive strength adjustment setting in ZQ0PR" "Not saturated,Saturated" bitfld.long 0x00 10. " PU_DRV_SAT ,Pullup drive strength code saturated due to drive strength adjustment setting in ZQ0PR" "Not saturated,Saturated" textline " " bitfld.long 0x00 9. " ZDONE ,Impedance calibration done" "Not done,Done" bitfld.long 0x00 8. " ZERR ,Impedance calibration error" "No error,Error" bitfld.long 0x00 6.--7. " OPU ,On-die termination ODT pull-up calibration status" "0,1,2,3" bitfld.long 0x00 4.--5. " OPD ,On-die termination ODT pull-down calibration status" "0,1,2,3" textline " " bitfld.long 0x00 2.--3. " ZPU ,Output impedance pull-up calibration status" "0,1,2,3" bitfld.long 0x00 0.--1. " ZPD ,Output impedance pull-down calibration status" "0,1,2,3" group.long 0x6A4++0x07 line.long 0x00 "ZQ1PR0,ZQ 1 Impedance Control Program Register 0" bitfld.long 0x00 31. " PD_DRV_ZDEN ,Pull-down drive strength ZCTRL over-ride enable" "Disabled,Enabled" bitfld.long 0x00 30. " PU_DRV_ZDEN ,Pull-up drive strength ZCTRL over-ride enable" "Disabled,Enabled" bitfld.long 0x00 29. " PD_ODT_ZDEN ,Pull-down termination ZCTRL over-ride enable" "Disabled,Enabled" bitfld.long 0x00 28. " PU_ODT_ZDEN ,Pull-up termination ZCTRL over-ride enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " ZSEGBYP ,Calibration segment bypass" "No bypass,Bypass" bitfld.long 0x00 25.--26. " ZLE_MODE ,VREF latch mode" "0,1,2,3" bitfld.long 0x00 22.--24. " ODT_ADJUST ,Termination adjustment" "0,1,2,3,4,5,6,7" bitfld.long 0x00 19.--21. " PD_DRV_ADJUST ,Pulldown drive strength adjustment" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 16.--18. " PU_DRV_ADJUST ,Pullup drive strength adjustment" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--15. " ZPROG_DRAM_ODT ,DRAM impedance divide ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " ZPROG_HOST_ODT ,HOST impedance divide ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " ZPROG_ASYM_DRV_PD ,Impedance divide ratio pulldown drive calibration during asymmetric drive strength calibration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 0.--3. " ZPROG_ASYM_DRV_PU ,Impedance divide ratio pullup drive calibration during asymmetric drive strength calibration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "ZQ1PR1,ZQ 1 Impedance Control Program Register 1" hexmask.long.byte 0x04 8.--14. 1. " PU_REFSEL ,Pull-up REFSEL for PZCTRL cell" hexmask.long.byte 0x04 0.--6. 1. " PD_REFSEL ,Pull-down REFSEL for PZCTRL cell" rgroup.long (0x6A4+0x08)++0x07 line.long 0x00 "ZQ1DR0,ZQ 1 Impedance Control Data Register 0" hexmask.long.word 0x00 16.--25. 1. " ZDATA_PU_DRV_RESULT ,Pull-up drive strength calibration code result" hexmask.long.word 0x00 0.--9. 1. " ZDATA_PD_DRV_RESULT ,Pull-down drive strength calibration code result" line.long 0x04 "ZQ1DR1,ZQ 1 Impedance Control Data Register 1" hexmask.long.word 0x04 16.--25. 1. " ZDATA_PU_ODT_RESULT ,Pull-up termination calibration code result" hexmask.long.word 0x04 0.--9. 1. " ZDATA_PD_ODT_RESULT ,Pull-down termination calibration code result" group.long (0x6A4+0x10)++0x07 line.long 0x00 "ZQ1R0,ZQ 1 Impedance Control Override Data Register 0" hexmask.long.word 0x00 16.--25. 1. " ZDATA_PU_DRV_OVRD ,Override value for the pull-up output impedance" hexmask.long.word 0x00 0.--9. 1. " ZDATA_PD_DRV_OVRD ,Override value for the pull-down output impedance" line.long 0x04 "ZQ1R1,ZQ 1 Impedance Control Override Data Register 1" hexmask.long.word 0x04 16.--25. 1. " ZDATA_PU_ODT_OVRD ,Override value for the pull-up termination" hexmask.long.word 0x04 0.--9. 1. " ZDATA_PD_ODT_OVRD ,Override value for the pull-down termination" rgroup.long (0x6A4+0x18)++0x03 line.long 0x00 "ZQ1SR,ZQ 1 Impedance Control Status Register" bitfld.long 0x00 13. " PD_ODT_SAT ,Pulldown drive strength code saturated due to termination strength adjustment setting in ZQ1PR" "Not saturated,Saturated" bitfld.long 0x00 12. " PU_ODT_SAT ,Pullup drive strength code saturated due to termination strength adjustment setting in ZQ1PR" "Not saturated,Saturated" bitfld.long 0x00 11. " PD_DRV_SAT ,Pulldown drive strength code saturated due to drive strength adjustment setting in ZQ1PR" "Not saturated,Saturated" bitfld.long 0x00 10. " PU_DRV_SAT ,Pullup drive strength code saturated due to drive strength adjustment setting in ZQ1PR" "Not saturated,Saturated" textline " " bitfld.long 0x00 9. " ZDONE ,Impedance calibration done" "Not done,Done" bitfld.long 0x00 8. " ZERR ,Impedance calibration error" "No error,Error" bitfld.long 0x00 6.--7. " OPU ,On-die termination ODT pull-up calibration status" "0,1,2,3" bitfld.long 0x00 4.--5. " OPD ,On-die termination ODT pull-down calibration status" "0,1,2,3" textline " " bitfld.long 0x00 2.--3. " ZPU ,Output impedance pull-up calibration status" "0,1,2,3" bitfld.long 0x00 0.--1. " ZPD ,Output impedance pull-down calibration status" "0,1,2,3" group.long 0x6C4++0x07 line.long 0x00 "ZQ2PR0,ZQ 2 Impedance Control Program Register 0" bitfld.long 0x00 31. " PD_DRV_ZDEN ,Pull-down drive strength ZCTRL over-ride enable" "Disabled,Enabled" bitfld.long 0x00 30. " PU_DRV_ZDEN ,Pull-up drive strength ZCTRL over-ride enable" "Disabled,Enabled" bitfld.long 0x00 29. " PD_ODT_ZDEN ,Pull-down termination ZCTRL over-ride enable" "Disabled,Enabled" bitfld.long 0x00 28. " PU_ODT_ZDEN ,Pull-up termination ZCTRL over-ride enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " ZSEGBYP ,Calibration segment bypass" "No bypass,Bypass" bitfld.long 0x00 25.--26. " ZLE_MODE ,VREF latch mode" "0,1,2,3" bitfld.long 0x00 22.--24. " ODT_ADJUST ,Termination adjustment" "0,1,2,3,4,5,6,7" bitfld.long 0x00 19.--21. " PD_DRV_ADJUST ,Pulldown drive strength adjustment" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 16.--18. " PU_DRV_ADJUST ,Pullup drive strength adjustment" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--15. " ZPROG_DRAM_ODT ,DRAM impedance divide ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " ZPROG_HOST_ODT ,HOST impedance divide ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " ZPROG_ASYM_DRV_PD ,Impedance divide ratio pulldown drive calibration during asymmetric drive strength calibration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 0.--3. " ZPROG_ASYM_DRV_PU ,Impedance divide ratio pullup drive calibration during asymmetric drive strength calibration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "ZQ2PR1,ZQ 2 Impedance Control Program Register 1" hexmask.long.byte 0x04 8.--14. 1. " PU_REFSEL ,Pull-up REFSEL for PZCTRL cell" hexmask.long.byte 0x04 0.--6. 1. " PD_REFSEL ,Pull-down REFSEL for PZCTRL cell" rgroup.long (0x6C4+0x08)++0x07 line.long 0x00 "ZQ2DR0,ZQ 2 Impedance Control Data Register 0" hexmask.long.word 0x00 16.--25. 1. " ZDATA_PU_DRV_RESULT ,Pull-up drive strength calibration code result" hexmask.long.word 0x00 0.--9. 1. " ZDATA_PD_DRV_RESULT ,Pull-down drive strength calibration code result" line.long 0x04 "ZQ2DR1,ZQ 2 Impedance Control Data Register 1" hexmask.long.word 0x04 16.--25. 1. " ZDATA_PU_ODT_RESULT ,Pull-up termination calibration code result" hexmask.long.word 0x04 0.--9. 1. " ZDATA_PD_ODT_RESULT ,Pull-down termination calibration code result" group.long (0x6C4+0x10)++0x07 line.long 0x00 "ZQ2R0,ZQ 2 Impedance Control Override Data Register 0" hexmask.long.word 0x00 16.--25. 1. " ZDATA_PU_DRV_OVRD ,Override value for the pull-up output impedance" hexmask.long.word 0x00 0.--9. 1. " ZDATA_PD_DRV_OVRD ,Override value for the pull-down output impedance" line.long 0x04 "ZQ2R1,ZQ 2 Impedance Control Override Data Register 1" hexmask.long.word 0x04 16.--25. 1. " ZDATA_PU_ODT_OVRD ,Override value for the pull-up termination" hexmask.long.word 0x04 0.--9. 1. " ZDATA_PD_ODT_OVRD ,Override value for the pull-down termination" rgroup.long (0x6C4+0x18)++0x03 line.long 0x00 "ZQ2SR,ZQ 2 Impedance Control Status Register" bitfld.long 0x00 13. " PD_ODT_SAT ,Pulldown drive strength code saturated due to termination strength adjustment setting in ZQ2PR" "Not saturated,Saturated" bitfld.long 0x00 12. " PU_ODT_SAT ,Pullup drive strength code saturated due to termination strength adjustment setting in ZQ2PR" "Not saturated,Saturated" bitfld.long 0x00 11. " PD_DRV_SAT ,Pulldown drive strength code saturated due to drive strength adjustment setting in ZQ2PR" "Not saturated,Saturated" bitfld.long 0x00 10. " PU_DRV_SAT ,Pullup drive strength code saturated due to drive strength adjustment setting in ZQ2PR" "Not saturated,Saturated" textline " " bitfld.long 0x00 9. " ZDONE ,Impedance calibration done" "Not done,Done" bitfld.long 0x00 8. " ZERR ,Impedance calibration error" "No error,Error" bitfld.long 0x00 6.--7. " OPU ,On-die termination ODT pull-up calibration status" "0,1,2,3" bitfld.long 0x00 4.--5. " OPD ,On-die termination ODT pull-down calibration status" "0,1,2,3" textline " " bitfld.long 0x00 2.--3. " ZPU ,Output impedance pull-up calibration status" "0,1,2,3" bitfld.long 0x00 0.--1. " ZPD ,Output impedance pull-down calibration status" "0,1,2,3" group.long 0x6E4++0x07 line.long 0x00 "ZQ3PR0,ZQ 3 Impedance Control Program Register 0" bitfld.long 0x00 31. " PD_DRV_ZDEN ,Pull-down drive strength ZCTRL over-ride enable" "Disabled,Enabled" bitfld.long 0x00 30. " PU_DRV_ZDEN ,Pull-up drive strength ZCTRL over-ride enable" "Disabled,Enabled" bitfld.long 0x00 29. " PD_ODT_ZDEN ,Pull-down termination ZCTRL over-ride enable" "Disabled,Enabled" bitfld.long 0x00 28. " PU_ODT_ZDEN ,Pull-up termination ZCTRL over-ride enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " ZSEGBYP ,Calibration segment bypass" "No bypass,Bypass" bitfld.long 0x00 25.--26. " ZLE_MODE ,VREF latch mode" "0,1,2,3" bitfld.long 0x00 22.--24. " ODT_ADJUST ,Termination adjustment" "0,1,2,3,4,5,6,7" bitfld.long 0x00 19.--21. " PD_DRV_ADJUST ,Pulldown drive strength adjustment" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 16.--18. " PU_DRV_ADJUST ,Pullup drive strength adjustment" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--15. " ZPROG_DRAM_ODT ,DRAM impedance divide ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " ZPROG_HOST_ODT ,HOST impedance divide ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " ZPROG_ASYM_DRV_PD ,Impedance divide ratio pulldown drive calibration during asymmetric drive strength calibration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 0.--3. " ZPROG_ASYM_DRV_PU ,Impedance divide ratio pullup drive calibration during asymmetric drive strength calibration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "ZQ3PR1,ZQ 3 Impedance Control Program Register 1" hexmask.long.byte 0x04 8.--14. 1. " PU_REFSEL ,Pull-up REFSEL for PZCTRL cell" hexmask.long.byte 0x04 0.--6. 1. " PD_REFSEL ,Pull-down REFSEL for PZCTRL cell" rgroup.long (0x6E4+0x08)++0x07 line.long 0x00 "ZQ3DR0,ZQ 3 Impedance Control Data Register 0" hexmask.long.word 0x00 16.--25. 1. " ZDATA_PU_DRV_RESULT ,Pull-up drive strength calibration code result" hexmask.long.word 0x00 0.--9. 1. " ZDATA_PD_DRV_RESULT ,Pull-down drive strength calibration code result" line.long 0x04 "ZQ3DR1,ZQ 3 Impedance Control Data Register 1" hexmask.long.word 0x04 16.--25. 1. " ZDATA_PU_ODT_RESULT ,Pull-up termination calibration code result" hexmask.long.word 0x04 0.--9. 1. " ZDATA_PD_ODT_RESULT ,Pull-down termination calibration code result" group.long (0x6E4+0x10)++0x07 line.long 0x00 "ZQ3R0,ZQ 3 Impedance Control Override Data Register 0" hexmask.long.word 0x00 16.--25. 1. " ZDATA_PU_DRV_OVRD ,Override value for the pull-up output impedance" hexmask.long.word 0x00 0.--9. 1. " ZDATA_PD_DRV_OVRD ,Override value for the pull-down output impedance" line.long 0x04 "ZQ3R1,ZQ 3 Impedance Control Override Data Register 1" hexmask.long.word 0x04 16.--25. 1. " ZDATA_PU_ODT_OVRD ,Override value for the pull-up termination" hexmask.long.word 0x04 0.--9. 1. " ZDATA_PD_ODT_OVRD ,Override value for the pull-down termination" rgroup.long (0x6E4+0x18)++0x03 line.long 0x00 "ZQ3SR,ZQ 3 Impedance Control Status Register" bitfld.long 0x00 13. " PD_ODT_SAT ,Pulldown drive strength code saturated due to termination strength adjustment setting in ZQ3PR" "Not saturated,Saturated" bitfld.long 0x00 12. " PU_ODT_SAT ,Pullup drive strength code saturated due to termination strength adjustment setting in ZQ3PR" "Not saturated,Saturated" bitfld.long 0x00 11. " PD_DRV_SAT ,Pulldown drive strength code saturated due to drive strength adjustment setting in ZQ3PR" "Not saturated,Saturated" bitfld.long 0x00 10. " PU_DRV_SAT ,Pullup drive strength code saturated due to drive strength adjustment setting in ZQ3PR" "Not saturated,Saturated" textline " " bitfld.long 0x00 9. " ZDONE ,Impedance calibration done" "Not done,Done" bitfld.long 0x00 8. " ZERR ,Impedance calibration error" "No error,Error" bitfld.long 0x00 6.--7. " OPU ,On-die termination ODT pull-up calibration status" "0,1,2,3" bitfld.long 0x00 4.--5. " OPD ,On-die termination ODT pull-down calibration status" "0,1,2,3" textline " " bitfld.long 0x00 2.--3. " ZPU ,Output impedance pull-up calibration status" "0,1,2,3" bitfld.long 0x00 0.--1. " ZPD ,Output impedance pull-down calibration status" "0,1,2,3" textline " " group.long 0x700++0x1B line.long 0x00 "DX0GCR0,DATX8 0 General Configuration Register 0" bitfld.long 0x00 31. " CALBYP ,Calibration bypass" "No bypass,Bypass" bitfld.long 0x00 30. " MDLEN ,Master delay line enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " CODTSHFT ,Configurable ODTTE phase shift" "0,1,2,3" bitfld.long 0x00 24.--27. " DQSDCC ,DQS duty cycle correction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 20.--23. " RDDLY ,Number of cycles to generate CTL_DX_GET_STATIC_RD input" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 13. " DQSNSEPDR ,DQSNSE power down receiver" "No,Yes" bitfld.long 0x00 12. " DQSSEPDR ,DQSSE power down receiver" "No,Yes" bitfld.long 0x00 11. " RTTOAL ,RTT on additive latency" "Disabled,Enabled" textline " " bitfld.long 0x00 9.--10. " RTTOH ,RTT output hold" "0,1,2,3" bitfld.long 0x00 7.--8. " CPDRSHFT ,Configurable PDR phase shift" "0,1,2,3" bitfld.long 0x00 6. " DQSRPD ,DQSR power down" "No,Yes" bitfld.long 0x00 5. " DQSGPDR ,DQSG power down receiver" "No,Yes" textline " " bitfld.long 0x00 3. " DQSGODT ,DQSG On-Die termination" "Disabled,Enabled" bitfld.long 0x00 2. " DQSGOE ,DQSG output enable" "Disabled,Enabled" line.long 0x04 "DX0GCR1,DATX8 0 General Configuration Register 1" bitfld.long 0x04 30.--31. " DXPDRMODE[15:14] ,Enable the PDR mode for DQ7" "0,1,2,3" bitfld.long 0x04 28.--29. " [13:12] ,Enable the PDR mode for DQ6" "0,1,2,3" bitfld.long 0x04 26.--27. " [11:10] ,Enable the PDR mode for DQ5" "0,1,2,3" bitfld.long 0x04 24.--25. " [9:8] ,Enable the PDR mode for DQ4" "0,1,2,3" textline " " bitfld.long 0x04 22.--23. " [7:6] ,Enable the PDR mode for DQ3" "0,1,2,3" bitfld.long 0x04 20.--21. " [5:4] ,Enable the PDR mode for DQ2" "0,1,2,3" bitfld.long 0x04 18.--19. " [3:2] ,Enable the PDR mode for DQ1" "0,1,2,3" bitfld.long 0x04 16.--17. " [1:0] ,Enable the PDR mode for DQ0" "0,1,2,3" textline " " bitfld.long 0x04 14. " QSNSEL ,Select the delayed or non-delayed read data strobe #" "Disabled,Enabled" bitfld.long 0x04 13. " QSSEL ,Select the delayed or non-delayed read data strobe" "Disabled,Enabled" bitfld.long 0x04 12. " OEEN ,Enables read data strobe in a byte lane" "Disabled,Enabled" bitfld.long 0x04 11. " PDREN ,Enables PDR in a byte lane" "Disabled,Enabled" textline " " bitfld.long 0x04 10. " TEEN ,Enables ODT/TE in a byte lane" "Disabled,Enabled" bitfld.long 0x04 9. " DSEN ,Enables write data strobe in a byte lane" "Disabled,Enabled" bitfld.long 0x04 8. " DMEN ,Enables DM pin in a byte lane" "Disabled,Enabled" bitfld.long 0x04 7. " DQEN[7] ,DQ7 enable" "Disabled,Enabled" textline " " bitfld.long 0x04 6. " [6] ,DQ6 enable" "Disabled,Enabled" bitfld.long 0x04 5. " [5] ,DQ5 enable" "Disabled,Enabled" bitfld.long 0x04 4. " [4] ,DQ4 enable" "Disabled,Enabled" bitfld.long 0x04 3. " [3] ,DQ3 enable" "Disabled,Enabled" textline " " bitfld.long 0x04 2. " [2] ,DQ2 enable" "Disabled,Enabled" bitfld.long 0x04 1. " [1] ,DQ1 enable" "Disabled,Enabled" bitfld.long 0x04 0. " [0] ,DQ0 enable" "Disabled,Enabled" line.long 0x08 "DX0GCR2,DATX8 0 General Configuration Register 2" bitfld.long 0x08 30.--31. " DXOEMODE[15:14] ,Enable the OE mode for DQ7" "0,1,2,3" bitfld.long 0x08 28.--29. " [13:12] ,Enable the OE mode for DQ6" "0,1,2,3" bitfld.long 0x08 26.--27. " [11:10] ,Enable the OE mode for DQ5" "0,1,2,3" bitfld.long 0x08 24.--25. " [9:8] ,Enable the OE mode for DQ4" "0,1,2,3" textline " " bitfld.long 0x08 22.--23. " [7:6] ,Enable the OE mode for DQ3" "0,1,2,3" bitfld.long 0x08 20.--21. " [5:4] ,Enable the OE mode for DQ2" "0,1,2,3" bitfld.long 0x08 18.--19. " [3:2] ,Enable the OE mode for DQ1" "0,1,2,3" bitfld.long 0x08 16.--17. " [1:0] ,Enable the OE mode for DQ0" "0,1,2,3" textline " " bitfld.long 0x08 14.--15. " DXTEMODE[15:14] ,Enable the TE mode for DQ7" "0,1,2,3" bitfld.long 0x08 12.--13. " [13:12] ,Enable the TE mode for DQ6" "0,1,2,3" bitfld.long 0x08 10.--11. " [11:10] ,Enable the TE mode for DQ5" "0,1,2,3" bitfld.long 0x08 8.--9. " [9:8] ,Enable the TE mode for DQ4" "0,1,2,3" textline " " bitfld.long 0x08 6.--7. " [7:6] ,Enable the TE mode for DQ3" "0,1,2,3" bitfld.long 0x08 4.--5. " [5:4] ,Enable the TE mode for DQ2" "0,1,2,3" bitfld.long 0x08 2.--3. " [3:2] ,Enable the TE mode for DQ1" "0,1,2,3" bitfld.long 0x08 0.--1. " [1:0] ,Enable the TE mode for DQ0" "0,1,2,3" line.long 0x0C "DX0GCR3,DATX8 0 General Configuration Register 3" bitfld.long 0x0C 29. " RDBVT ,Read data BDL VT compensation" "Disabled,Enabled" bitfld.long 0x0C 28. " WDBVT ,Write data BDL VT compensation" "Disabled,Enabled" bitfld.long 0x0C 27. " RGLVT ,Read DQS gating LCDL delay VT compensation" "Disabled,Enabled" bitfld.long 0x0C 26. " RDLVT ,Read DQS LCDL delay VT compensation" "Disabled,Enabled" textline " " bitfld.long 0x0C 25. " WDLVT ,Write DQ LCDL delay VT compensation" "Disabled,Enabled" bitfld.long 0x0C 24. " WLLVT ,Write leveling LCDL delay VT compensation" "Disabled,Enabled" bitfld.long 0x0C 20.--21. " DSNOEMODE ,Enables the OE mode for DQS" "0,1,2,3" bitfld.long 0x0C 18.--19. " DSNTEMODE ,Enables the TE mode for DQS" "0,1,2,3" textline " " bitfld.long 0x0C 16.--17. " DSNPDRMODE ,Enables the PDR mode for DQS" "0,1,2,3" bitfld.long 0x0C 14.--15. " DMOEMODE ,Enables the OE mode values for DM" "0,1,2,3" bitfld.long 0x0C 12.--13. " DMTEMODE ,Enables the TE mode values for DM" "0,1,2,3" bitfld.long 0x0C 10.--11. " DMPDRMODE ,Enables the PDR mode values for DM" "0,1,2,3" textline " " bitfld.long 0x0C 6.--7. " DSOEMODE ,Enables the OE mode values for DQS" "0,1,2,3" bitfld.long 0x0C 4.--5. " DSTEMODE ,Enables the TE mode values for DQS" "0,1,2,3" bitfld.long 0x0C 2.--3. " DSPDRMODE ,Enables the PDR mode values for DQS" "0,1,2,3" line.long 0x10 "DX0GCR4,DATX8 0 General Configuration Register 4" bitfld.long 0x10 28. " DXREFPEN ,Byte lane VREF pad enable" "Disabled,Enabled" bitfld.long 0x10 26.--27. " DXREFEEN ,Byte lane internal VREF enable" "0,1,2,3" bitfld.long 0x10 25. " DXREFSEN ,Byte lane Single-End VREF enable" "Disabled,Enabled" bitfld.long 0x10 23. " DXREFESELRANGE ,External VREF generator REFSEL range select" "0,1" textline " " hexmask.long.byte 0x10 16.--22. 1. " DXREFESEL ,Byte lane external VREF select" bitfld.long 0x10 15. " DXREFSSELRANGE ,Single ended VREF generator REFSEL range select" "0,1" hexmask.long.byte 0x10 8.--14. 1. " DXREFSSEL ,Byte lane Single-End VREF select" bitfld.long 0x10 2.--5. " DXREFIEN ,VREF enable control for DQ IO single ended buffers of a byte lane" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x10 0.--1. " DXREFIMON ,VRMON control for DQ IO single ended buffers of a byte lane" "0,1,2,3" line.long 0x14 "DX0GCR5,DATX8 0 General Configuration Register 5" hexmask.long.byte 0x14 24.--30. 1. " DXREFISELR3 ,Byte lane internal VREF select for rank 3" hexmask.long.byte 0x14 16.--22. 1. " DXREFISELR2 ,Byte lane internal VREF select for rank 2" hexmask.long.byte 0x14 8.--14. 1. " DXREFISELR1 ,Byte lane internal VREF select for rank 1" hexmask.long.byte 0x14 0.--6. 1. " DXREFISELR0 ,Byte lane internal VREF select for rank 0" line.long 0x18 "DX0GCR6,DATX8 0 General Configuration Register 6" bitfld.long 0x18 24.--29. " DXDQVREFR3 ,DRAM DQ VREF select for rank3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x18 16.--21. " DXDQVREFR2 ,DRAM DQ VREF select for rank2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x18 8.--13. " DXDQVREFR1 ,DRAM DQ VREF select for rank1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x18 0.--5. " DXDQVREFR0 ,DRAM DQ VREF select for rank0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long (0x700+0x40)++0x0B line.long 0x00 "DX0BDLR0,DATX8 0 Bit Delay Line Register 0" bitfld.long 0x00 24.--29. " DQ3WBD ,DQ3 write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 16.--21. " DQ2WBD ,DQ2 write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 8.--13. " DQ1WBD ,DQ1 write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " DQ0WBD ,DQ0 write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "DX0BDLR1,DATX8 0 Bit Delay Line Register 1" bitfld.long 0x04 24.--29. " DQ7WBD ,DQ7 write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 16.--21. " DQ6WBD ,DQ6 write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 8.--13. " DQ5WBD ,DQ5 write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 0.--5. " DQ4WBD ,DQ4 write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x08 "DX0BDLR2,DATX8 0 Bit Delay Line Register 2" bitfld.long 0x08 24.--29. " DSNWBD ,DQSN write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x08 16.--21. " DSOEBD ,DQS/DM/DQ output enable bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x08 8.--13. " DSWBD ,DQS write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x08 0.--5. " DMWBD ,DM write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long (0x700+0x50)++0x0B line.long 0x00 "DX0BDLR3,DATX8 0 Bit Delay Line Register 3" bitfld.long 0x00 24.--29. " DQ3RBD ,DQ3 read bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 16.--21. " DQ2RBD ,DQ2 read bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 8.--13. " DQ1RBD ,DQ1 read bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " DQ0RBD ,DQ0 read bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "DX0BDLR4,DATX8 0 Bit Delay Line Register 4" bitfld.long 0x04 24.--29. " DQ7RBD ,DQ7 read bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 16.--21. " DQ6RBD ,DQ6 read bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 8.--13. " DQ5RBD ,DQ5 read bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 0.--5. " DQ4RBD ,DQ4 read bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x08 "DX0BDLR5,DATX8 0 Bit Delay Line Register 5" bitfld.long 0x08 0.--5. " DMRBD ,DM read bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long (0x700+0x60)++0x03 line.long 0x00 "DX0BDLR6,DATX8 0 Bit Delay Line Register 6" bitfld.long 0x00 16.--21. " TERBD ,Termination enable bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 8.--13. " PDRBD ,Power down receiver bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long (0x700+0x80)++0x17 line.long 0x00 "DX0LCDLR0,DATX8 0 Local Calibrated Delay Line Register 0" hexmask.long.word 0x00 0.--8. 1. " WLD ,Write leveling delay" line.long 0x04 "DX0LCDLR1,DATX8 0 Local Calibrated Delay Line Register 1" hexmask.long.word 0x04 0.--8. 1. " WDQD ,Write data delay" line.long 0x08 "DX0LCDLR2,DATX8 0 Local Calibrated Delay Line Register 2" hexmask.long.word 0x08 0.--8. 1. " DQSGD ,Read DQS gating delay" line.long 0x0C "DX0LCDLR3,DATX8 0 Local Calibrated Delay Line Register 3" hexmask.long.word 0x0C 0.--8. 1. " RDQSD ,Read DQS delay" line.long 0x10 "DX0LCDLR4,DATX8 0 Local Calibrated Delay Line Register 4" hexmask.long.word 0x10 0.--8. 1. " RDQSND ,Read DQSN delay" line.long 0x14 "DX0LCDLR5,DATX8 0 Local Calibrated Delay Line Register 5" hexmask.long.word 0x14 0.--8. 1. " DQSGSD ,DQS gating status delay" group.long (0x700+0xA0)++0x07 line.long 0x00 "DX0MDLR0,DATX8 0 Master Delay Line Register 0" hexmask.long.word 0x00 16.--24. 1. " TPRD ,Target period" hexmask.long.word 0x00 0.--8. 1. " IPRD ,Initial period" line.long 0x04 "DX0MDLR1,DATX8 0 Master Delay Line Register 1" hexmask.long.word 0x04 0.--8. 1. " MDLD ,MDL delay" group.long (0x700+0xC0)++0x03 line.long 0x00 "DX0GTR0,DATX8 0 General Timing Register 0" bitfld.long 0x00 24.--26. " WDQSL ,DQ write path latency pipeline" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16.--19. " WLSL ,Write leveling system latency" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--4. " DGSL ,DQS gating system latency" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long (0x700+0xD0)++0x1F line.long 0x00 "DX0RSR0,DATX8 0 Rank Status Register 0" hexmask.long.word 0x00 0.--15. 1. " QSGERR ,DQS gate training error" line.long 0x04 "DX0RSR1,DATX8 0 Rank Status Register 1" hexmask.long.word 0x04 0.--15. 1. " RDLVLERR ,Read leveling error" line.long 0x08 "DX0RSR2,DATX8 0 Rank Status Register 2" hexmask.long.word 0x08 0.--15. 1. " WLAWN ,Write latency adjustment warning" line.long 0x0C "DX0RSR3,DATX8 0 Rank Status Register 3" hexmask.long.word 0x0C 0.--15. 1. " WLAERR ,Write leveling adjustment error" line.long 0x10 "DX0GSR0,DATX8 0 General Status Register 0" bitfld.long 0x10 30. " WLDQ ,Write leveling DQ status" "0,1" hexmask.long.word 0x10 17.--25. 1. " GDQSPRD ,Read DQS gating period" bitfld.long 0x10 16. " DPLOCK ,DATX8 PLL lock" "Not locked,Locked" hexmask.long.word 0x10 7.--15. 1. " WLPRD ,Write leveling period" textline " " bitfld.long 0x10 6. " WLERR ,Write leveling error" "No error,Error" bitfld.long 0x10 5. " WLDONE ,Write leveling done" "Not done,Done" bitfld.long 0x10 4. " WLCAL ,Write leveling calibration" "Not done,Done" bitfld.long 0x10 3. " GDQSCAL ,Read DQS gating calibration" "Not done,Done" textline " " bitfld.long 0x10 2. " RDQSNCAL ,Read DQS# calibration" "Not done,Done" bitfld.long 0x10 1. " RDQSCAL ,Read DQS calibration" "Not done,Done" bitfld.long 0x10 0. " WDQCAL ,Write DQ calibration" "Not done,Done" line.long 0x14 "DX0GSR1,DATX8 0 General Status Register 1" hexmask.long.tbyte 0x14 1.--24. 1. " DLTCODE ,Delay line test code" bitfld.long 0x14 0. " DLTDONE ,Delay line test done" "Not done,Done" line.long 0x18 "DX0GSR2,DATX8 0 General Status Register 2" hexmask.long.word 0x18 23.--31. 1. " GSDQSPRD ,Read DQS gating status period" bitfld.long 0x18 22. " GSDQSCAL ,Read DQS gating status calibration" "Not done,Done" bitfld.long 0x18 20. " SRDERR ,Static read error" "No error,Error" hexmask.long.byte 0x18 12.--19. 1. " DQS2DQERR ,Write DQS2DQ training error" textline " " bitfld.long 0x18 8.--11. " ESTAT ,Error status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 7. " WEWN ,Write eye centering warning" "Not occurred,Occurred" bitfld.long 0x18 6. " WEERR ,Write eye centering error" "No error,Error" bitfld.long 0x18 5. " REWN ,Read eye centering warning" "Not occurred,Occurred" textline " " bitfld.long 0x18 4. " REERR ,Read eye centering error" "No error,Error" bitfld.long 0x18 3. " WDWN ,Write bit deskew warning" "Not occurred,Occurred" bitfld.long 0x18 2. " WDERR ,Write bit deskew error" "No error,Error" bitfld.long 0x18 1. " RDWN ,Read bit deskew warning" "Not occurred,Occurred" textline " " bitfld.long 0x18 0. " RDERR ,Read bit deskew error" "No error,Error" line.long 0x1C "DX0GSR3,DATX8 0 General Status Register 3" bitfld.long 0x1C 24.--26. " ESTAT ,VREF training error status code" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 20.--23. " DVWRN ,DRAM VREF training warning" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C 16.--19. " DVERR ,DRAM VREF training error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C 12.--15. " HVWRN ,Host VREF training warning" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x1C 8.--11. " HVERR ,Host VREF training error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C 0.--1. " SRDPC ,Static read delay pass count" "0,1,2,3" group.long 0x800++0x1B line.long 0x00 "DX1GCR0,DATX8 1 General Configuration Register 0" bitfld.long 0x00 31. " CALBYP ,Calibration bypass" "No bypass,Bypass" bitfld.long 0x00 30. " MDLEN ,Master delay line enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " CODTSHFT ,Configurable ODTTE phase shift" "0,1,2,3" bitfld.long 0x00 24.--27. " DQSDCC ,DQS duty cycle correction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 20.--23. " RDDLY ,Number of cycles to generate CTL_DX_GET_STATIC_RD input" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 13. " DQSNSEPDR ,DQSNSE power down receiver" "No,Yes" bitfld.long 0x00 12. " DQSSEPDR ,DQSSE power down receiver" "No,Yes" bitfld.long 0x00 11. " RTTOAL ,RTT on additive latency" "Disabled,Enabled" textline " " bitfld.long 0x00 9.--10. " RTTOH ,RTT output hold" "0,1,2,3" bitfld.long 0x00 7.--8. " CPDRSHFT ,Configurable PDR phase shift" "0,1,2,3" bitfld.long 0x00 6. " DQSRPD ,DQSR power down" "No,Yes" bitfld.long 0x00 5. " DQSGPDR ,DQSG power down receiver" "No,Yes" textline " " bitfld.long 0x00 3. " DQSGODT ,DQSG On-Die termination" "Disabled,Enabled" bitfld.long 0x00 2. " DQSGOE ,DQSG output enable" "Disabled,Enabled" line.long 0x04 "DX1GCR1,DATX8 1 General Configuration Register 1" bitfld.long 0x04 30.--31. " DXPDRMODE[15:14] ,Enable the PDR mode for DQ7" "0,1,2,3" bitfld.long 0x04 28.--29. " [13:12] ,Enable the PDR mode for DQ6" "0,1,2,3" bitfld.long 0x04 26.--27. " [11:10] ,Enable the PDR mode for DQ5" "0,1,2,3" bitfld.long 0x04 24.--25. " [9:8] ,Enable the PDR mode for DQ4" "0,1,2,3" textline " " bitfld.long 0x04 22.--23. " [7:6] ,Enable the PDR mode for DQ3" "0,1,2,3" bitfld.long 0x04 20.--21. " [5:4] ,Enable the PDR mode for DQ2" "0,1,2,3" bitfld.long 0x04 18.--19. " [3:2] ,Enable the PDR mode for DQ1" "0,1,2,3" bitfld.long 0x04 16.--17. " [1:0] ,Enable the PDR mode for DQ0" "0,1,2,3" textline " " bitfld.long 0x04 14. " QSNSEL ,Select the delayed or non-delayed read data strobe #" "Disabled,Enabled" bitfld.long 0x04 13. " QSSEL ,Select the delayed or non-delayed read data strobe" "Disabled,Enabled" bitfld.long 0x04 12. " OEEN ,Enables read data strobe in a byte lane" "Disabled,Enabled" bitfld.long 0x04 11. " PDREN ,Enables PDR in a byte lane" "Disabled,Enabled" textline " " bitfld.long 0x04 10. " TEEN ,Enables ODT/TE in a byte lane" "Disabled,Enabled" bitfld.long 0x04 9. " DSEN ,Enables write data strobe in a byte lane" "Disabled,Enabled" bitfld.long 0x04 8. " DMEN ,Enables DM pin in a byte lane" "Disabled,Enabled" bitfld.long 0x04 7. " DQEN[7] ,DQ7 enable" "Disabled,Enabled" textline " " bitfld.long 0x04 6. " [6] ,DQ6 enable" "Disabled,Enabled" bitfld.long 0x04 5. " [5] ,DQ5 enable" "Disabled,Enabled" bitfld.long 0x04 4. " [4] ,DQ4 enable" "Disabled,Enabled" bitfld.long 0x04 3. " [3] ,DQ3 enable" "Disabled,Enabled" textline " " bitfld.long 0x04 2. " [2] ,DQ2 enable" "Disabled,Enabled" bitfld.long 0x04 1. " [1] ,DQ1 enable" "Disabled,Enabled" bitfld.long 0x04 0. " [0] ,DQ0 enable" "Disabled,Enabled" line.long 0x08 "DX1GCR2,DATX8 1 General Configuration Register 2" bitfld.long 0x08 30.--31. " DXOEMODE[15:14] ,Enable the OE mode for DQ7" "0,1,2,3" bitfld.long 0x08 28.--29. " [13:12] ,Enable the OE mode for DQ6" "0,1,2,3" bitfld.long 0x08 26.--27. " [11:10] ,Enable the OE mode for DQ5" "0,1,2,3" bitfld.long 0x08 24.--25. " [9:8] ,Enable the OE mode for DQ4" "0,1,2,3" textline " " bitfld.long 0x08 22.--23. " [7:6] ,Enable the OE mode for DQ3" "0,1,2,3" bitfld.long 0x08 20.--21. " [5:4] ,Enable the OE mode for DQ2" "0,1,2,3" bitfld.long 0x08 18.--19. " [3:2] ,Enable the OE mode for DQ1" "0,1,2,3" bitfld.long 0x08 16.--17. " [1:0] ,Enable the OE mode for DQ0" "0,1,2,3" textline " " bitfld.long 0x08 14.--15. " DXTEMODE[15:14] ,Enable the TE mode for DQ7" "0,1,2,3" bitfld.long 0x08 12.--13. " [13:12] ,Enable the TE mode for DQ6" "0,1,2,3" bitfld.long 0x08 10.--11. " [11:10] ,Enable the TE mode for DQ5" "0,1,2,3" bitfld.long 0x08 8.--9. " [9:8] ,Enable the TE mode for DQ4" "0,1,2,3" textline " " bitfld.long 0x08 6.--7. " [7:6] ,Enable the TE mode for DQ3" "0,1,2,3" bitfld.long 0x08 4.--5. " [5:4] ,Enable the TE mode for DQ2" "0,1,2,3" bitfld.long 0x08 2.--3. " [3:2] ,Enable the TE mode for DQ1" "0,1,2,3" bitfld.long 0x08 0.--1. " [1:0] ,Enable the TE mode for DQ0" "0,1,2,3" line.long 0x0C "DX1GCR3,DATX8 1 General Configuration Register 3" bitfld.long 0x0C 29. " RDBVT ,Read data BDL VT compensation" "Disabled,Enabled" bitfld.long 0x0C 28. " WDBVT ,Write data BDL VT compensation" "Disabled,Enabled" bitfld.long 0x0C 27. " RGLVT ,Read DQS gating LCDL delay VT compensation" "Disabled,Enabled" bitfld.long 0x0C 26. " RDLVT ,Read DQS LCDL delay VT compensation" "Disabled,Enabled" textline " " bitfld.long 0x0C 25. " WDLVT ,Write DQ LCDL delay VT compensation" "Disabled,Enabled" bitfld.long 0x0C 24. " WLLVT ,Write leveling LCDL delay VT compensation" "Disabled,Enabled" bitfld.long 0x0C 20.--21. " DSNOEMODE ,Enables the OE mode for DQS" "0,1,2,3" bitfld.long 0x0C 18.--19. " DSNTEMODE ,Enables the TE mode for DQS" "0,1,2,3" textline " " bitfld.long 0x0C 16.--17. " DSNPDRMODE ,Enables the PDR mode for DQS" "0,1,2,3" bitfld.long 0x0C 14.--15. " DMOEMODE ,Enables the OE mode values for DM" "0,1,2,3" bitfld.long 0x0C 12.--13. " DMTEMODE ,Enables the TE mode values for DM" "0,1,2,3" bitfld.long 0x0C 10.--11. " DMPDRMODE ,Enables the PDR mode values for DM" "0,1,2,3" textline " " bitfld.long 0x0C 6.--7. " DSOEMODE ,Enables the OE mode values for DQS" "0,1,2,3" bitfld.long 0x0C 4.--5. " DSTEMODE ,Enables the TE mode values for DQS" "0,1,2,3" bitfld.long 0x0C 2.--3. " DSPDRMODE ,Enables the PDR mode values for DQS" "0,1,2,3" line.long 0x10 "DX1GCR4,DATX8 1 General Configuration Register 4" bitfld.long 0x10 28. " DXREFPEN ,Byte lane VREF pad enable" "Disabled,Enabled" bitfld.long 0x10 26.--27. " DXREFEEN ,Byte lane internal VREF enable" "0,1,2,3" bitfld.long 0x10 25. " DXREFSEN ,Byte lane Single-End VREF enable" "Disabled,Enabled" bitfld.long 0x10 23. " DXREFESELRANGE ,External VREF generator REFSEL range select" "0,1" textline " " hexmask.long.byte 0x10 16.--22. 1. " DXREFESEL ,Byte lane external VREF select" bitfld.long 0x10 15. " DXREFSSELRANGE ,Single ended VREF generator REFSEL range select" "0,1" hexmask.long.byte 0x10 8.--14. 1. " DXREFSSEL ,Byte lane Single-End VREF select" bitfld.long 0x10 2.--5. " DXREFIEN ,VREF enable control for DQ IO single ended buffers of a byte lane" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x10 0.--1. " DXREFIMON ,VRMON control for DQ IO single ended buffers of a byte lane" "0,1,2,3" line.long 0x14 "DX1GCR5,DATX8 1 General Configuration Register 5" hexmask.long.byte 0x14 24.--30. 1. " DXREFISELR3 ,Byte lane internal VREF select for rank 3" hexmask.long.byte 0x14 16.--22. 1. " DXREFISELR2 ,Byte lane internal VREF select for rank 2" hexmask.long.byte 0x14 8.--14. 1. " DXREFISELR1 ,Byte lane internal VREF select for rank 1" hexmask.long.byte 0x14 0.--6. 1. " DXREFISELR0 ,Byte lane internal VREF select for rank 0" line.long 0x18 "DX1GCR6,DATX8 1 General Configuration Register 6" bitfld.long 0x18 24.--29. " DXDQVREFR3 ,DRAM DQ VREF select for rank3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x18 16.--21. " DXDQVREFR2 ,DRAM DQ VREF select for rank2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x18 8.--13. " DXDQVREFR1 ,DRAM DQ VREF select for rank1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x18 0.--5. " DXDQVREFR0 ,DRAM DQ VREF select for rank0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long (0x800+0x40)++0x0B line.long 0x00 "DX1BDLR0,DATX8 1 Bit Delay Line Register 0" bitfld.long 0x00 24.--29. " DQ3WBD ,DQ3 write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 16.--21. " DQ2WBD ,DQ2 write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 8.--13. " DQ1WBD ,DQ1 write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " DQ0WBD ,DQ0 write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "DX1BDLR1,DATX8 1 Bit Delay Line Register 1" bitfld.long 0x04 24.--29. " DQ7WBD ,DQ7 write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 16.--21. " DQ6WBD ,DQ6 write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 8.--13. " DQ5WBD ,DQ5 write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 0.--5. " DQ4WBD ,DQ4 write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x08 "DX1BDLR2,DATX8 1 Bit Delay Line Register 2" bitfld.long 0x08 24.--29. " DSNWBD ,DQSN write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x08 16.--21. " DSOEBD ,DQS/DM/DQ output enable bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x08 8.--13. " DSWBD ,DQS write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x08 0.--5. " DMWBD ,DM write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long (0x800+0x50)++0x0B line.long 0x00 "DX1BDLR3,DATX8 1 Bit Delay Line Register 3" bitfld.long 0x00 24.--29. " DQ3RBD ,DQ3 read bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 16.--21. " DQ2RBD ,DQ2 read bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 8.--13. " DQ1RBD ,DQ1 read bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " DQ0RBD ,DQ0 read bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "DX1BDLR4,DATX8 1 Bit Delay Line Register 4" bitfld.long 0x04 24.--29. " DQ7RBD ,DQ7 read bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 16.--21. " DQ6RBD ,DQ6 read bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 8.--13. " DQ5RBD ,DQ5 read bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 0.--5. " DQ4RBD ,DQ4 read bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x08 "DX1BDLR5,DATX8 1 Bit Delay Line Register 5" bitfld.long 0x08 0.--5. " DMRBD ,DM read bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long (0x800+0x60)++0x03 line.long 0x00 "DX1BDLR6,DATX8 1 Bit Delay Line Register 6" bitfld.long 0x00 16.--21. " TERBD ,Termination enable bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 8.--13. " PDRBD ,Power down receiver bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long (0x800+0x80)++0x17 line.long 0x00 "DX1LCDLR0,DATX8 1 Local Calibrated Delay Line Register 0" hexmask.long.word 0x00 0.--8. 1. " WLD ,Write leveling delay" line.long 0x04 "DX1LCDLR1,DATX8 1 Local Calibrated Delay Line Register 1" hexmask.long.word 0x04 0.--8. 1. " WDQD ,Write data delay" line.long 0x08 "DX1LCDLR2,DATX8 1 Local Calibrated Delay Line Register 2" hexmask.long.word 0x08 0.--8. 1. " DQSGD ,Read DQS gating delay" line.long 0x0C "DX1LCDLR3,DATX8 1 Local Calibrated Delay Line Register 3" hexmask.long.word 0x0C 0.--8. 1. " RDQSD ,Read DQS delay" line.long 0x10 "DX1LCDLR4,DATX8 1 Local Calibrated Delay Line Register 4" hexmask.long.word 0x10 0.--8. 1. " RDQSND ,Read DQSN delay" line.long 0x14 "DX1LCDLR5,DATX8 1 Local Calibrated Delay Line Register 5" hexmask.long.word 0x14 0.--8. 1. " DQSGSD ,DQS gating status delay" group.long (0x800+0xA0)++0x07 line.long 0x00 "DX1MDLR0,DATX8 1 Master Delay Line Register 0" hexmask.long.word 0x00 16.--24. 1. " TPRD ,Target period" hexmask.long.word 0x00 0.--8. 1. " IPRD ,Initial period" line.long 0x04 "DX1MDLR1,DATX8 1 Master Delay Line Register 1" hexmask.long.word 0x04 0.--8. 1. " MDLD ,MDL delay" group.long (0x800+0xC0)++0x03 line.long 0x00 "DX1GTR0,DATX8 1 General Timing Register 0" bitfld.long 0x00 24.--26. " WDQSL ,DQ write path latency pipeline" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16.--19. " WLSL ,Write leveling system latency" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--4. " DGSL ,DQS gating system latency" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long (0x800+0xD0)++0x1F line.long 0x00 "DX1RSR0,DATX8 1 Rank Status Register 0" hexmask.long.word 0x00 0.--15. 1. " QSGERR ,DQS gate training error" line.long 0x04 "DX1RSR1,DATX8 1 Rank Status Register 1" hexmask.long.word 0x04 0.--15. 1. " RDLVLERR ,Read leveling error" line.long 0x08 "DX1RSR2,DATX8 1 Rank Status Register 2" hexmask.long.word 0x08 0.--15. 1. " WLAWN ,Write latency adjustment warning" line.long 0x0C "DX1RSR3,DATX8 1 Rank Status Register 3" hexmask.long.word 0x0C 0.--15. 1. " WLAERR ,Write leveling adjustment error" line.long 0x10 "DX1GSR0,DATX8 1 General Status Register 0" bitfld.long 0x10 30. " WLDQ ,Write leveling DQ status" "0,1" hexmask.long.word 0x10 17.--25. 1. " GDQSPRD ,Read DQS gating period" bitfld.long 0x10 16. " DPLOCK ,DATX8 PLL lock" "Not locked,Locked" hexmask.long.word 0x10 7.--15. 1. " WLPRD ,Write leveling period" textline " " bitfld.long 0x10 6. " WLERR ,Write leveling error" "No error,Error" bitfld.long 0x10 5. " WLDONE ,Write leveling done" "Not done,Done" bitfld.long 0x10 4. " WLCAL ,Write leveling calibration" "Not done,Done" bitfld.long 0x10 3. " GDQSCAL ,Read DQS gating calibration" "Not done,Done" textline " " bitfld.long 0x10 2. " RDQSNCAL ,Read DQS# calibration" "Not done,Done" bitfld.long 0x10 1. " RDQSCAL ,Read DQS calibration" "Not done,Done" bitfld.long 0x10 0. " WDQCAL ,Write DQ calibration" "Not done,Done" line.long 0x14 "DX1GSR1,DATX8 1 General Status Register 1" hexmask.long.tbyte 0x14 1.--24. 1. " DLTCODE ,Delay line test code" bitfld.long 0x14 0. " DLTDONE ,Delay line test done" "Not done,Done" line.long 0x18 "DX1GSR2,DATX8 1 General Status Register 2" hexmask.long.word 0x18 23.--31. 1. " GSDQSPRD ,Read DQS gating status period" bitfld.long 0x18 22. " GSDQSCAL ,Read DQS gating status calibration" "Not done,Done" bitfld.long 0x18 20. " SRDERR ,Static read error" "No error,Error" hexmask.long.byte 0x18 12.--19. 1. " DQS2DQERR ,Write DQS2DQ training error" textline " " bitfld.long 0x18 8.--11. " ESTAT ,Error status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 7. " WEWN ,Write eye centering warning" "Not occurred,Occurred" bitfld.long 0x18 6. " WEERR ,Write eye centering error" "No error,Error" bitfld.long 0x18 5. " REWN ,Read eye centering warning" "Not occurred,Occurred" textline " " bitfld.long 0x18 4. " REERR ,Read eye centering error" "No error,Error" bitfld.long 0x18 3. " WDWN ,Write bit deskew warning" "Not occurred,Occurred" bitfld.long 0x18 2. " WDERR ,Write bit deskew error" "No error,Error" bitfld.long 0x18 1. " RDWN ,Read bit deskew warning" "Not occurred,Occurred" textline " " bitfld.long 0x18 0. " RDERR ,Read bit deskew error" "No error,Error" line.long 0x1C "DX1GSR3,DATX8 1 General Status Register 3" bitfld.long 0x1C 24.--26. " ESTAT ,VREF training error status code" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 20.--23. " DVWRN ,DRAM VREF training warning" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C 16.--19. " DVERR ,DRAM VREF training error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C 12.--15. " HVWRN ,Host VREF training warning" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x1C 8.--11. " HVERR ,Host VREF training error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C 0.--1. " SRDPC ,Static read delay pass count" "0,1,2,3" group.long 0x900++0x1B line.long 0x00 "DX2GCR0,DATX8 2 General Configuration Register 0" bitfld.long 0x00 31. " CALBYP ,Calibration bypass" "No bypass,Bypass" bitfld.long 0x00 30. " MDLEN ,Master delay line enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " CODTSHFT ,Configurable ODTTE phase shift" "0,1,2,3" bitfld.long 0x00 24.--27. " DQSDCC ,DQS duty cycle correction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 20.--23. " RDDLY ,Number of cycles to generate CTL_DX_GET_STATIC_RD input" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 13. " DQSNSEPDR ,DQSNSE power down receiver" "No,Yes" bitfld.long 0x00 12. " DQSSEPDR ,DQSSE power down receiver" "No,Yes" bitfld.long 0x00 11. " RTTOAL ,RTT on additive latency" "Disabled,Enabled" textline " " bitfld.long 0x00 9.--10. " RTTOH ,RTT output hold" "0,1,2,3" bitfld.long 0x00 7.--8. " CPDRSHFT ,Configurable PDR phase shift" "0,1,2,3" bitfld.long 0x00 6. " DQSRPD ,DQSR power down" "No,Yes" bitfld.long 0x00 5. " DQSGPDR ,DQSG power down receiver" "No,Yes" textline " " bitfld.long 0x00 3. " DQSGODT ,DQSG On-Die termination" "Disabled,Enabled" bitfld.long 0x00 2. " DQSGOE ,DQSG output enable" "Disabled,Enabled" line.long 0x04 "DX2GCR1,DATX8 2 General Configuration Register 1" bitfld.long 0x04 30.--31. " DXPDRMODE[15:14] ,Enable the PDR mode for DQ7" "0,1,2,3" bitfld.long 0x04 28.--29. " [13:12] ,Enable the PDR mode for DQ6" "0,1,2,3" bitfld.long 0x04 26.--27. " [11:10] ,Enable the PDR mode for DQ5" "0,1,2,3" bitfld.long 0x04 24.--25. " [9:8] ,Enable the PDR mode for DQ4" "0,1,2,3" textline " " bitfld.long 0x04 22.--23. " [7:6] ,Enable the PDR mode for DQ3" "0,1,2,3" bitfld.long 0x04 20.--21. " [5:4] ,Enable the PDR mode for DQ2" "0,1,2,3" bitfld.long 0x04 18.--19. " [3:2] ,Enable the PDR mode for DQ1" "0,1,2,3" bitfld.long 0x04 16.--17. " [1:0] ,Enable the PDR mode for DQ0" "0,1,2,3" textline " " bitfld.long 0x04 14. " QSNSEL ,Select the delayed or non-delayed read data strobe #" "Disabled,Enabled" bitfld.long 0x04 13. " QSSEL ,Select the delayed or non-delayed read data strobe" "Disabled,Enabled" bitfld.long 0x04 12. " OEEN ,Enables read data strobe in a byte lane" "Disabled,Enabled" bitfld.long 0x04 11. " PDREN ,Enables PDR in a byte lane" "Disabled,Enabled" textline " " bitfld.long 0x04 10. " TEEN ,Enables ODT/TE in a byte lane" "Disabled,Enabled" bitfld.long 0x04 9. " DSEN ,Enables write data strobe in a byte lane" "Disabled,Enabled" bitfld.long 0x04 8. " DMEN ,Enables DM pin in a byte lane" "Disabled,Enabled" bitfld.long 0x04 7. " DQEN[7] ,DQ7 enable" "Disabled,Enabled" textline " " bitfld.long 0x04 6. " [6] ,DQ6 enable" "Disabled,Enabled" bitfld.long 0x04 5. " [5] ,DQ5 enable" "Disabled,Enabled" bitfld.long 0x04 4. " [4] ,DQ4 enable" "Disabled,Enabled" bitfld.long 0x04 3. " [3] ,DQ3 enable" "Disabled,Enabled" textline " " bitfld.long 0x04 2. " [2] ,DQ2 enable" "Disabled,Enabled" bitfld.long 0x04 1. " [1] ,DQ1 enable" "Disabled,Enabled" bitfld.long 0x04 0. " [0] ,DQ0 enable" "Disabled,Enabled" line.long 0x08 "DX2GCR2,DATX8 2 General Configuration Register 2" bitfld.long 0x08 30.--31. " DXOEMODE[15:14] ,Enable the OE mode for DQ7" "0,1,2,3" bitfld.long 0x08 28.--29. " [13:12] ,Enable the OE mode for DQ6" "0,1,2,3" bitfld.long 0x08 26.--27. " [11:10] ,Enable the OE mode for DQ5" "0,1,2,3" bitfld.long 0x08 24.--25. " [9:8] ,Enable the OE mode for DQ4" "0,1,2,3" textline " " bitfld.long 0x08 22.--23. " [7:6] ,Enable the OE mode for DQ3" "0,1,2,3" bitfld.long 0x08 20.--21. " [5:4] ,Enable the OE mode for DQ2" "0,1,2,3" bitfld.long 0x08 18.--19. " [3:2] ,Enable the OE mode for DQ1" "0,1,2,3" bitfld.long 0x08 16.--17. " [1:0] ,Enable the OE mode for DQ0" "0,1,2,3" textline " " bitfld.long 0x08 14.--15. " DXTEMODE[15:14] ,Enable the TE mode for DQ7" "0,1,2,3" bitfld.long 0x08 12.--13. " [13:12] ,Enable the TE mode for DQ6" "0,1,2,3" bitfld.long 0x08 10.--11. " [11:10] ,Enable the TE mode for DQ5" "0,1,2,3" bitfld.long 0x08 8.--9. " [9:8] ,Enable the TE mode for DQ4" "0,1,2,3" textline " " bitfld.long 0x08 6.--7. " [7:6] ,Enable the TE mode for DQ3" "0,1,2,3" bitfld.long 0x08 4.--5. " [5:4] ,Enable the TE mode for DQ2" "0,1,2,3" bitfld.long 0x08 2.--3. " [3:2] ,Enable the TE mode for DQ1" "0,1,2,3" bitfld.long 0x08 0.--1. " [1:0] ,Enable the TE mode for DQ0" "0,1,2,3" line.long 0x0C "DX2GCR3,DATX8 2 General Configuration Register 3" bitfld.long 0x0C 29. " RDBVT ,Read data BDL VT compensation" "Disabled,Enabled" bitfld.long 0x0C 28. " WDBVT ,Write data BDL VT compensation" "Disabled,Enabled" bitfld.long 0x0C 27. " RGLVT ,Read DQS gating LCDL delay VT compensation" "Disabled,Enabled" bitfld.long 0x0C 26. " RDLVT ,Read DQS LCDL delay VT compensation" "Disabled,Enabled" textline " " bitfld.long 0x0C 25. " WDLVT ,Write DQ LCDL delay VT compensation" "Disabled,Enabled" bitfld.long 0x0C 24. " WLLVT ,Write leveling LCDL delay VT compensation" "Disabled,Enabled" bitfld.long 0x0C 20.--21. " DSNOEMODE ,Enables the OE mode for DQS" "0,1,2,3" bitfld.long 0x0C 18.--19. " DSNTEMODE ,Enables the TE mode for DQS" "0,1,2,3" textline " " bitfld.long 0x0C 16.--17. " DSNPDRMODE ,Enables the PDR mode for DQS" "0,1,2,3" bitfld.long 0x0C 14.--15. " DMOEMODE ,Enables the OE mode values for DM" "0,1,2,3" bitfld.long 0x0C 12.--13. " DMTEMODE ,Enables the TE mode values for DM" "0,1,2,3" bitfld.long 0x0C 10.--11. " DMPDRMODE ,Enables the PDR mode values for DM" "0,1,2,3" textline " " bitfld.long 0x0C 6.--7. " DSOEMODE ,Enables the OE mode values for DQS" "0,1,2,3" bitfld.long 0x0C 4.--5. " DSTEMODE ,Enables the TE mode values for DQS" "0,1,2,3" bitfld.long 0x0C 2.--3. " DSPDRMODE ,Enables the PDR mode values for DQS" "0,1,2,3" line.long 0x10 "DX2GCR4,DATX8 2 General Configuration Register 4" bitfld.long 0x10 28. " DXREFPEN ,Byte lane VREF pad enable" "Disabled,Enabled" bitfld.long 0x10 26.--27. " DXREFEEN ,Byte lane internal VREF enable" "0,1,2,3" bitfld.long 0x10 25. " DXREFSEN ,Byte lane Single-End VREF enable" "Disabled,Enabled" bitfld.long 0x10 23. " DXREFESELRANGE ,External VREF generator REFSEL range select" "0,1" textline " " hexmask.long.byte 0x10 16.--22. 1. " DXREFESEL ,Byte lane external VREF select" bitfld.long 0x10 15. " DXREFSSELRANGE ,Single ended VREF generator REFSEL range select" "0,1" hexmask.long.byte 0x10 8.--14. 1. " DXREFSSEL ,Byte lane Single-End VREF select" bitfld.long 0x10 2.--5. " DXREFIEN ,VREF enable control for DQ IO single ended buffers of a byte lane" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x10 0.--1. " DXREFIMON ,VRMON control for DQ IO single ended buffers of a byte lane" "0,1,2,3" line.long 0x14 "DX2GCR5,DATX8 2 General Configuration Register 5" hexmask.long.byte 0x14 24.--30. 1. " DXREFISELR3 ,Byte lane internal VREF select for rank 3" hexmask.long.byte 0x14 16.--22. 1. " DXREFISELR2 ,Byte lane internal VREF select for rank 2" hexmask.long.byte 0x14 8.--14. 1. " DXREFISELR1 ,Byte lane internal VREF select for rank 1" hexmask.long.byte 0x14 0.--6. 1. " DXREFISELR0 ,Byte lane internal VREF select for rank 0" line.long 0x18 "DX2GCR6,DATX8 2 General Configuration Register 6" bitfld.long 0x18 24.--29. " DXDQVREFR3 ,DRAM DQ VREF select for rank3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x18 16.--21. " DXDQVREFR2 ,DRAM DQ VREF select for rank2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x18 8.--13. " DXDQVREFR1 ,DRAM DQ VREF select for rank1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x18 0.--5. " DXDQVREFR0 ,DRAM DQ VREF select for rank0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long (0x900+0x40)++0x0B line.long 0x00 "DX2BDLR0,DATX8 2 Bit Delay Line Register 0" bitfld.long 0x00 24.--29. " DQ3WBD ,DQ3 write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 16.--21. " DQ2WBD ,DQ2 write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 8.--13. " DQ1WBD ,DQ1 write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " DQ0WBD ,DQ0 write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "DX2BDLR1,DATX8 2 Bit Delay Line Register 1" bitfld.long 0x04 24.--29. " DQ7WBD ,DQ7 write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 16.--21. " DQ6WBD ,DQ6 write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 8.--13. " DQ5WBD ,DQ5 write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 0.--5. " DQ4WBD ,DQ4 write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x08 "DX2BDLR2,DATX8 2 Bit Delay Line Register 2" bitfld.long 0x08 24.--29. " DSNWBD ,DQSN write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x08 16.--21. " DSOEBD ,DQS/DM/DQ output enable bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x08 8.--13. " DSWBD ,DQS write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x08 0.--5. " DMWBD ,DM write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long (0x900+0x50)++0x0B line.long 0x00 "DX2BDLR3,DATX8 2 Bit Delay Line Register 3" bitfld.long 0x00 24.--29. " DQ3RBD ,DQ3 read bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 16.--21. " DQ2RBD ,DQ2 read bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 8.--13. " DQ1RBD ,DQ1 read bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " DQ0RBD ,DQ0 read bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "DX2BDLR4,DATX8 2 Bit Delay Line Register 4" bitfld.long 0x04 24.--29. " DQ7RBD ,DQ7 read bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 16.--21. " DQ6RBD ,DQ6 read bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 8.--13. " DQ5RBD ,DQ5 read bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 0.--5. " DQ4RBD ,DQ4 read bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x08 "DX2BDLR5,DATX8 2 Bit Delay Line Register 5" bitfld.long 0x08 0.--5. " DMRBD ,DM read bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long (0x900+0x60)++0x03 line.long 0x00 "DX2BDLR6,DATX8 2 Bit Delay Line Register 6" bitfld.long 0x00 16.--21. " TERBD ,Termination enable bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 8.--13. " PDRBD ,Power down receiver bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long (0x900+0x80)++0x17 line.long 0x00 "DX2LCDLR0,DATX8 2 Local Calibrated Delay Line Register 0" hexmask.long.word 0x00 0.--8. 1. " WLD ,Write leveling delay" line.long 0x04 "DX2LCDLR1,DATX8 2 Local Calibrated Delay Line Register 1" hexmask.long.word 0x04 0.--8. 1. " WDQD ,Write data delay" line.long 0x08 "DX2LCDLR2,DATX8 2 Local Calibrated Delay Line Register 2" hexmask.long.word 0x08 0.--8. 1. " DQSGD ,Read DQS gating delay" line.long 0x0C "DX2LCDLR3,DATX8 2 Local Calibrated Delay Line Register 3" hexmask.long.word 0x0C 0.--8. 1. " RDQSD ,Read DQS delay" line.long 0x10 "DX2LCDLR4,DATX8 2 Local Calibrated Delay Line Register 4" hexmask.long.word 0x10 0.--8. 1. " RDQSND ,Read DQSN delay" line.long 0x14 "DX2LCDLR5,DATX8 2 Local Calibrated Delay Line Register 5" hexmask.long.word 0x14 0.--8. 1. " DQSGSD ,DQS gating status delay" group.long (0x900+0xA0)++0x07 line.long 0x00 "DX2MDLR0,DATX8 2 Master Delay Line Register 0" hexmask.long.word 0x00 16.--24. 1. " TPRD ,Target period" hexmask.long.word 0x00 0.--8. 1. " IPRD ,Initial period" line.long 0x04 "DX2MDLR1,DATX8 2 Master Delay Line Register 1" hexmask.long.word 0x04 0.--8. 1. " MDLD ,MDL delay" group.long (0x900+0xC0)++0x03 line.long 0x00 "DX2GTR0,DATX8 2 General Timing Register 0" bitfld.long 0x00 24.--26. " WDQSL ,DQ write path latency pipeline" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16.--19. " WLSL ,Write leveling system latency" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--4. " DGSL ,DQS gating system latency" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long (0x900+0xD0)++0x1F line.long 0x00 "DX2RSR0,DATX8 2 Rank Status Register 0" hexmask.long.word 0x00 0.--15. 1. " QSGERR ,DQS gate training error" line.long 0x04 "DX2RSR1,DATX8 2 Rank Status Register 1" hexmask.long.word 0x04 0.--15. 1. " RDLVLERR ,Read leveling error" line.long 0x08 "DX2RSR2,DATX8 2 Rank Status Register 2" hexmask.long.word 0x08 0.--15. 1. " WLAWN ,Write latency adjustment warning" line.long 0x0C "DX2RSR3,DATX8 2 Rank Status Register 3" hexmask.long.word 0x0C 0.--15. 1. " WLAERR ,Write leveling adjustment error" line.long 0x10 "DX2GSR0,DATX8 2 General Status Register 0" bitfld.long 0x10 30. " WLDQ ,Write leveling DQ status" "0,1" hexmask.long.word 0x10 17.--25. 1. " GDQSPRD ,Read DQS gating period" bitfld.long 0x10 16. " DPLOCK ,DATX8 PLL lock" "Not locked,Locked" hexmask.long.word 0x10 7.--15. 1. " WLPRD ,Write leveling period" textline " " bitfld.long 0x10 6. " WLERR ,Write leveling error" "No error,Error" bitfld.long 0x10 5. " WLDONE ,Write leveling done" "Not done,Done" bitfld.long 0x10 4. " WLCAL ,Write leveling calibration" "Not done,Done" bitfld.long 0x10 3. " GDQSCAL ,Read DQS gating calibration" "Not done,Done" textline " " bitfld.long 0x10 2. " RDQSNCAL ,Read DQS# calibration" "Not done,Done" bitfld.long 0x10 1. " RDQSCAL ,Read DQS calibration" "Not done,Done" bitfld.long 0x10 0. " WDQCAL ,Write DQ calibration" "Not done,Done" line.long 0x14 "DX2GSR1,DATX8 2 General Status Register 1" hexmask.long.tbyte 0x14 1.--24. 1. " DLTCODE ,Delay line test code" bitfld.long 0x14 0. " DLTDONE ,Delay line test done" "Not done,Done" line.long 0x18 "DX2GSR2,DATX8 2 General Status Register 2" hexmask.long.word 0x18 23.--31. 1. " GSDQSPRD ,Read DQS gating status period" bitfld.long 0x18 22. " GSDQSCAL ,Read DQS gating status calibration" "Not done,Done" bitfld.long 0x18 20. " SRDERR ,Static read error" "No error,Error" hexmask.long.byte 0x18 12.--19. 1. " DQS2DQERR ,Write DQS2DQ training error" textline " " bitfld.long 0x18 8.--11. " ESTAT ,Error status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 7. " WEWN ,Write eye centering warning" "Not occurred,Occurred" bitfld.long 0x18 6. " WEERR ,Write eye centering error" "No error,Error" bitfld.long 0x18 5. " REWN ,Read eye centering warning" "Not occurred,Occurred" textline " " bitfld.long 0x18 4. " REERR ,Read eye centering error" "No error,Error" bitfld.long 0x18 3. " WDWN ,Write bit deskew warning" "Not occurred,Occurred" bitfld.long 0x18 2. " WDERR ,Write bit deskew error" "No error,Error" bitfld.long 0x18 1. " RDWN ,Read bit deskew warning" "Not occurred,Occurred" textline " " bitfld.long 0x18 0. " RDERR ,Read bit deskew error" "No error,Error" line.long 0x1C "DX2GSR3,DATX8 2 General Status Register 3" bitfld.long 0x1C 24.--26. " ESTAT ,VREF training error status code" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 20.--23. " DVWRN ,DRAM VREF training warning" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C 16.--19. " DVERR ,DRAM VREF training error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C 12.--15. " HVWRN ,Host VREF training warning" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x1C 8.--11. " HVERR ,Host VREF training error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C 0.--1. " SRDPC ,Static read delay pass count" "0,1,2,3" group.long 0xA00++0x1B line.long 0x00 "DX3GCR0,DATX8 3 General Configuration Register 0" bitfld.long 0x00 31. " CALBYP ,Calibration bypass" "No bypass,Bypass" bitfld.long 0x00 30. " MDLEN ,Master delay line enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " CODTSHFT ,Configurable ODTTE phase shift" "0,1,2,3" bitfld.long 0x00 24.--27. " DQSDCC ,DQS duty cycle correction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 20.--23. " RDDLY ,Number of cycles to generate CTL_DX_GET_STATIC_RD input" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 13. " DQSNSEPDR ,DQSNSE power down receiver" "No,Yes" bitfld.long 0x00 12. " DQSSEPDR ,DQSSE power down receiver" "No,Yes" bitfld.long 0x00 11. " RTTOAL ,RTT on additive latency" "Disabled,Enabled" textline " " bitfld.long 0x00 9.--10. " RTTOH ,RTT output hold" "0,1,2,3" bitfld.long 0x00 7.--8. " CPDRSHFT ,Configurable PDR phase shift" "0,1,2,3" bitfld.long 0x00 6. " DQSRPD ,DQSR power down" "No,Yes" bitfld.long 0x00 5. " DQSGPDR ,DQSG power down receiver" "No,Yes" textline " " bitfld.long 0x00 3. " DQSGODT ,DQSG On-Die termination" "Disabled,Enabled" bitfld.long 0x00 2. " DQSGOE ,DQSG output enable" "Disabled,Enabled" line.long 0x04 "DX3GCR1,DATX8 3 General Configuration Register 1" bitfld.long 0x04 30.--31. " DXPDRMODE[15:14] ,Enable the PDR mode for DQ7" "0,1,2,3" bitfld.long 0x04 28.--29. " [13:12] ,Enable the PDR mode for DQ6" "0,1,2,3" bitfld.long 0x04 26.--27. " [11:10] ,Enable the PDR mode for DQ5" "0,1,2,3" bitfld.long 0x04 24.--25. " [9:8] ,Enable the PDR mode for DQ4" "0,1,2,3" textline " " bitfld.long 0x04 22.--23. " [7:6] ,Enable the PDR mode for DQ3" "0,1,2,3" bitfld.long 0x04 20.--21. " [5:4] ,Enable the PDR mode for DQ2" "0,1,2,3" bitfld.long 0x04 18.--19. " [3:2] ,Enable the PDR mode for DQ1" "0,1,2,3" bitfld.long 0x04 16.--17. " [1:0] ,Enable the PDR mode for DQ0" "0,1,2,3" textline " " bitfld.long 0x04 14. " QSNSEL ,Select the delayed or non-delayed read data strobe #" "Disabled,Enabled" bitfld.long 0x04 13. " QSSEL ,Select the delayed or non-delayed read data strobe" "Disabled,Enabled" bitfld.long 0x04 12. " OEEN ,Enables read data strobe in a byte lane" "Disabled,Enabled" bitfld.long 0x04 11. " PDREN ,Enables PDR in a byte lane" "Disabled,Enabled" textline " " bitfld.long 0x04 10. " TEEN ,Enables ODT/TE in a byte lane" "Disabled,Enabled" bitfld.long 0x04 9. " DSEN ,Enables write data strobe in a byte lane" "Disabled,Enabled" bitfld.long 0x04 8. " DMEN ,Enables DM pin in a byte lane" "Disabled,Enabled" bitfld.long 0x04 7. " DQEN[7] ,DQ7 enable" "Disabled,Enabled" textline " " bitfld.long 0x04 6. " [6] ,DQ6 enable" "Disabled,Enabled" bitfld.long 0x04 5. " [5] ,DQ5 enable" "Disabled,Enabled" bitfld.long 0x04 4. " [4] ,DQ4 enable" "Disabled,Enabled" bitfld.long 0x04 3. " [3] ,DQ3 enable" "Disabled,Enabled" textline " " bitfld.long 0x04 2. " [2] ,DQ2 enable" "Disabled,Enabled" bitfld.long 0x04 1. " [1] ,DQ1 enable" "Disabled,Enabled" bitfld.long 0x04 0. " [0] ,DQ0 enable" "Disabled,Enabled" line.long 0x08 "DX3GCR2,DATX8 3 General Configuration Register 2" bitfld.long 0x08 30.--31. " DXOEMODE[15:14] ,Enable the OE mode for DQ7" "0,1,2,3" bitfld.long 0x08 28.--29. " [13:12] ,Enable the OE mode for DQ6" "0,1,2,3" bitfld.long 0x08 26.--27. " [11:10] ,Enable the OE mode for DQ5" "0,1,2,3" bitfld.long 0x08 24.--25. " [9:8] ,Enable the OE mode for DQ4" "0,1,2,3" textline " " bitfld.long 0x08 22.--23. " [7:6] ,Enable the OE mode for DQ3" "0,1,2,3" bitfld.long 0x08 20.--21. " [5:4] ,Enable the OE mode for DQ2" "0,1,2,3" bitfld.long 0x08 18.--19. " [3:2] ,Enable the OE mode for DQ1" "0,1,2,3" bitfld.long 0x08 16.--17. " [1:0] ,Enable the OE mode for DQ0" "0,1,2,3" textline " " bitfld.long 0x08 14.--15. " DXTEMODE[15:14] ,Enable the TE mode for DQ7" "0,1,2,3" bitfld.long 0x08 12.--13. " [13:12] ,Enable the TE mode for DQ6" "0,1,2,3" bitfld.long 0x08 10.--11. " [11:10] ,Enable the TE mode for DQ5" "0,1,2,3" bitfld.long 0x08 8.--9. " [9:8] ,Enable the TE mode for DQ4" "0,1,2,3" textline " " bitfld.long 0x08 6.--7. " [7:6] ,Enable the TE mode for DQ3" "0,1,2,3" bitfld.long 0x08 4.--5. " [5:4] ,Enable the TE mode for DQ2" "0,1,2,3" bitfld.long 0x08 2.--3. " [3:2] ,Enable the TE mode for DQ1" "0,1,2,3" bitfld.long 0x08 0.--1. " [1:0] ,Enable the TE mode for DQ0" "0,1,2,3" line.long 0x0C "DX3GCR3,DATX8 3 General Configuration Register 3" bitfld.long 0x0C 29. " RDBVT ,Read data BDL VT compensation" "Disabled,Enabled" bitfld.long 0x0C 28. " WDBVT ,Write data BDL VT compensation" "Disabled,Enabled" bitfld.long 0x0C 27. " RGLVT ,Read DQS gating LCDL delay VT compensation" "Disabled,Enabled" bitfld.long 0x0C 26. " RDLVT ,Read DQS LCDL delay VT compensation" "Disabled,Enabled" textline " " bitfld.long 0x0C 25. " WDLVT ,Write DQ LCDL delay VT compensation" "Disabled,Enabled" bitfld.long 0x0C 24. " WLLVT ,Write leveling LCDL delay VT compensation" "Disabled,Enabled" bitfld.long 0x0C 20.--21. " DSNOEMODE ,Enables the OE mode for DQS" "0,1,2,3" bitfld.long 0x0C 18.--19. " DSNTEMODE ,Enables the TE mode for DQS" "0,1,2,3" textline " " bitfld.long 0x0C 16.--17. " DSNPDRMODE ,Enables the PDR mode for DQS" "0,1,2,3" bitfld.long 0x0C 14.--15. " DMOEMODE ,Enables the OE mode values for DM" "0,1,2,3" bitfld.long 0x0C 12.--13. " DMTEMODE ,Enables the TE mode values for DM" "0,1,2,3" bitfld.long 0x0C 10.--11. " DMPDRMODE ,Enables the PDR mode values for DM" "0,1,2,3" textline " " bitfld.long 0x0C 6.--7. " DSOEMODE ,Enables the OE mode values for DQS" "0,1,2,3" bitfld.long 0x0C 4.--5. " DSTEMODE ,Enables the TE mode values for DQS" "0,1,2,3" bitfld.long 0x0C 2.--3. " DSPDRMODE ,Enables the PDR mode values for DQS" "0,1,2,3" line.long 0x10 "DX3GCR4,DATX8 3 General Configuration Register 4" bitfld.long 0x10 28. " DXREFPEN ,Byte lane VREF pad enable" "Disabled,Enabled" bitfld.long 0x10 26.--27. " DXREFEEN ,Byte lane internal VREF enable" "0,1,2,3" bitfld.long 0x10 25. " DXREFSEN ,Byte lane Single-End VREF enable" "Disabled,Enabled" bitfld.long 0x10 23. " DXREFESELRANGE ,External VREF generator REFSEL range select" "0,1" textline " " hexmask.long.byte 0x10 16.--22. 1. " DXREFESEL ,Byte lane external VREF select" bitfld.long 0x10 15. " DXREFSSELRANGE ,Single ended VREF generator REFSEL range select" "0,1" hexmask.long.byte 0x10 8.--14. 1. " DXREFSSEL ,Byte lane Single-End VREF select" bitfld.long 0x10 2.--5. " DXREFIEN ,VREF enable control for DQ IO single ended buffers of a byte lane" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x10 0.--1. " DXREFIMON ,VRMON control for DQ IO single ended buffers of a byte lane" "0,1,2,3" line.long 0x14 "DX3GCR5,DATX8 3 General Configuration Register 5" hexmask.long.byte 0x14 24.--30. 1. " DXREFISELR3 ,Byte lane internal VREF select for rank 3" hexmask.long.byte 0x14 16.--22. 1. " DXREFISELR2 ,Byte lane internal VREF select for rank 2" hexmask.long.byte 0x14 8.--14. 1. " DXREFISELR1 ,Byte lane internal VREF select for rank 1" hexmask.long.byte 0x14 0.--6. 1. " DXREFISELR0 ,Byte lane internal VREF select for rank 0" line.long 0x18 "DX3GCR6,DATX8 3 General Configuration Register 6" bitfld.long 0x18 24.--29. " DXDQVREFR3 ,DRAM DQ VREF select for rank3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x18 16.--21. " DXDQVREFR2 ,DRAM DQ VREF select for rank2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x18 8.--13. " DXDQVREFR1 ,DRAM DQ VREF select for rank1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x18 0.--5. " DXDQVREFR0 ,DRAM DQ VREF select for rank0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long (0xA00+0x40)++0x0B line.long 0x00 "DX3BDLR0,DATX8 3 Bit Delay Line Register 0" bitfld.long 0x00 24.--29. " DQ3WBD ,DQ3 write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 16.--21. " DQ2WBD ,DQ2 write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 8.--13. " DQ1WBD ,DQ1 write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " DQ0WBD ,DQ0 write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "DX3BDLR1,DATX8 3 Bit Delay Line Register 1" bitfld.long 0x04 24.--29. " DQ7WBD ,DQ7 write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 16.--21. " DQ6WBD ,DQ6 write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 8.--13. " DQ5WBD ,DQ5 write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 0.--5. " DQ4WBD ,DQ4 write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x08 "DX3BDLR2,DATX8 3 Bit Delay Line Register 2" bitfld.long 0x08 24.--29. " DSNWBD ,DQSN write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x08 16.--21. " DSOEBD ,DQS/DM/DQ output enable bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x08 8.--13. " DSWBD ,DQS write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x08 0.--5. " DMWBD ,DM write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long (0xA00+0x50)++0x0B line.long 0x00 "DX3BDLR3,DATX8 3 Bit Delay Line Register 3" bitfld.long 0x00 24.--29. " DQ3RBD ,DQ3 read bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 16.--21. " DQ2RBD ,DQ2 read bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 8.--13. " DQ1RBD ,DQ1 read bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " DQ0RBD ,DQ0 read bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "DX3BDLR4,DATX8 3 Bit Delay Line Register 4" bitfld.long 0x04 24.--29. " DQ7RBD ,DQ7 read bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 16.--21. " DQ6RBD ,DQ6 read bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 8.--13. " DQ5RBD ,DQ5 read bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 0.--5. " DQ4RBD ,DQ4 read bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x08 "DX3BDLR5,DATX8 3 Bit Delay Line Register 5" bitfld.long 0x08 0.--5. " DMRBD ,DM read bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long (0xA00+0x60)++0x03 line.long 0x00 "DX3BDLR6,DATX8 3 Bit Delay Line Register 6" bitfld.long 0x00 16.--21. " TERBD ,Termination enable bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 8.--13. " PDRBD ,Power down receiver bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long (0xA00+0x80)++0x17 line.long 0x00 "DX3LCDLR0,DATX8 3 Local Calibrated Delay Line Register 0" hexmask.long.word 0x00 0.--8. 1. " WLD ,Write leveling delay" line.long 0x04 "DX3LCDLR1,DATX8 3 Local Calibrated Delay Line Register 1" hexmask.long.word 0x04 0.--8. 1. " WDQD ,Write data delay" line.long 0x08 "DX3LCDLR2,DATX8 3 Local Calibrated Delay Line Register 2" hexmask.long.word 0x08 0.--8. 1. " DQSGD ,Read DQS gating delay" line.long 0x0C "DX3LCDLR3,DATX8 3 Local Calibrated Delay Line Register 3" hexmask.long.word 0x0C 0.--8. 1. " RDQSD ,Read DQS delay" line.long 0x10 "DX3LCDLR4,DATX8 3 Local Calibrated Delay Line Register 4" hexmask.long.word 0x10 0.--8. 1. " RDQSND ,Read DQSN delay" line.long 0x14 "DX3LCDLR5,DATX8 3 Local Calibrated Delay Line Register 5" hexmask.long.word 0x14 0.--8. 1. " DQSGSD ,DQS gating status delay" group.long (0xA00+0xA0)++0x07 line.long 0x00 "DX3MDLR0,DATX8 3 Master Delay Line Register 0" hexmask.long.word 0x00 16.--24. 1. " TPRD ,Target period" hexmask.long.word 0x00 0.--8. 1. " IPRD ,Initial period" line.long 0x04 "DX3MDLR1,DATX8 3 Master Delay Line Register 1" hexmask.long.word 0x04 0.--8. 1. " MDLD ,MDL delay" group.long (0xA00+0xC0)++0x03 line.long 0x00 "DX3GTR0,DATX8 3 General Timing Register 0" bitfld.long 0x00 24.--26. " WDQSL ,DQ write path latency pipeline" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16.--19. " WLSL ,Write leveling system latency" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--4. " DGSL ,DQS gating system latency" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long (0xA00+0xD0)++0x1F line.long 0x00 "DX3RSR0,DATX8 3 Rank Status Register 0" hexmask.long.word 0x00 0.--15. 1. " QSGERR ,DQS gate training error" line.long 0x04 "DX3RSR1,DATX8 3 Rank Status Register 1" hexmask.long.word 0x04 0.--15. 1. " RDLVLERR ,Read leveling error" line.long 0x08 "DX3RSR2,DATX8 3 Rank Status Register 2" hexmask.long.word 0x08 0.--15. 1. " WLAWN ,Write latency adjustment warning" line.long 0x0C "DX3RSR3,DATX8 3 Rank Status Register 3" hexmask.long.word 0x0C 0.--15. 1. " WLAERR ,Write leveling adjustment error" line.long 0x10 "DX3GSR0,DATX8 3 General Status Register 0" bitfld.long 0x10 30. " WLDQ ,Write leveling DQ status" "0,1" hexmask.long.word 0x10 17.--25. 1. " GDQSPRD ,Read DQS gating period" bitfld.long 0x10 16. " DPLOCK ,DATX8 PLL lock" "Not locked,Locked" hexmask.long.word 0x10 7.--15. 1. " WLPRD ,Write leveling period" textline " " bitfld.long 0x10 6. " WLERR ,Write leveling error" "No error,Error" bitfld.long 0x10 5. " WLDONE ,Write leveling done" "Not done,Done" bitfld.long 0x10 4. " WLCAL ,Write leveling calibration" "Not done,Done" bitfld.long 0x10 3. " GDQSCAL ,Read DQS gating calibration" "Not done,Done" textline " " bitfld.long 0x10 2. " RDQSNCAL ,Read DQS# calibration" "Not done,Done" bitfld.long 0x10 1. " RDQSCAL ,Read DQS calibration" "Not done,Done" bitfld.long 0x10 0. " WDQCAL ,Write DQ calibration" "Not done,Done" line.long 0x14 "DX3GSR1,DATX8 3 General Status Register 1" hexmask.long.tbyte 0x14 1.--24. 1. " DLTCODE ,Delay line test code" bitfld.long 0x14 0. " DLTDONE ,Delay line test done" "Not done,Done" line.long 0x18 "DX3GSR2,DATX8 3 General Status Register 2" hexmask.long.word 0x18 23.--31. 1. " GSDQSPRD ,Read DQS gating status period" bitfld.long 0x18 22. " GSDQSCAL ,Read DQS gating status calibration" "Not done,Done" bitfld.long 0x18 20. " SRDERR ,Static read error" "No error,Error" hexmask.long.byte 0x18 12.--19. 1. " DQS2DQERR ,Write DQS2DQ training error" textline " " bitfld.long 0x18 8.--11. " ESTAT ,Error status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 7. " WEWN ,Write eye centering warning" "Not occurred,Occurred" bitfld.long 0x18 6. " WEERR ,Write eye centering error" "No error,Error" bitfld.long 0x18 5. " REWN ,Read eye centering warning" "Not occurred,Occurred" textline " " bitfld.long 0x18 4. " REERR ,Read eye centering error" "No error,Error" bitfld.long 0x18 3. " WDWN ,Write bit deskew warning" "Not occurred,Occurred" bitfld.long 0x18 2. " WDERR ,Write bit deskew error" "No error,Error" bitfld.long 0x18 1. " RDWN ,Read bit deskew warning" "Not occurred,Occurred" textline " " bitfld.long 0x18 0. " RDERR ,Read bit deskew error" "No error,Error" line.long 0x1C "DX3GSR3,DATX8 3 General Status Register 3" bitfld.long 0x1C 24.--26. " ESTAT ,VREF training error status code" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 20.--23. " DVWRN ,DRAM VREF training warning" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C 16.--19. " DVERR ,DRAM VREF training error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C 12.--15. " HVWRN ,Host VREF training warning" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x1C 8.--11. " HVERR ,Host VREF training error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C 0.--1. " SRDPC ,Static read delay pass count" "0,1,2,3" group.long 0xB00++0x1B line.long 0x00 "DX4GCR0,DATX8 4 General Configuration Register 0" bitfld.long 0x00 31. " CALBYP ,Calibration bypass" "No bypass,Bypass" bitfld.long 0x00 30. " MDLEN ,Master delay line enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " CODTSHFT ,Configurable ODTTE phase shift" "0,1,2,3" bitfld.long 0x00 24.--27. " DQSDCC ,DQS duty cycle correction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 20.--23. " RDDLY ,Number of cycles to generate CTL_DX_GET_STATIC_RD input" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 13. " DQSNSEPDR ,DQSNSE power down receiver" "No,Yes" bitfld.long 0x00 12. " DQSSEPDR ,DQSSE power down receiver" "No,Yes" bitfld.long 0x00 11. " RTTOAL ,RTT on additive latency" "Disabled,Enabled" textline " " bitfld.long 0x00 9.--10. " RTTOH ,RTT output hold" "0,1,2,3" bitfld.long 0x00 7.--8. " CPDRSHFT ,Configurable PDR phase shift" "0,1,2,3" bitfld.long 0x00 6. " DQSRPD ,DQSR power down" "No,Yes" bitfld.long 0x00 5. " DQSGPDR ,DQSG power down receiver" "No,Yes" textline " " bitfld.long 0x00 3. " DQSGODT ,DQSG On-Die termination" "Disabled,Enabled" bitfld.long 0x00 2. " DQSGOE ,DQSG output enable" "Disabled,Enabled" line.long 0x04 "DX4GCR1,DATX8 4 General Configuration Register 1" bitfld.long 0x04 30.--31. " DXPDRMODE[15:14] ,Enable the PDR mode for DQ7" "0,1,2,3" bitfld.long 0x04 28.--29. " [13:12] ,Enable the PDR mode for DQ6" "0,1,2,3" bitfld.long 0x04 26.--27. " [11:10] ,Enable the PDR mode for DQ5" "0,1,2,3" bitfld.long 0x04 24.--25. " [9:8] ,Enable the PDR mode for DQ4" "0,1,2,3" textline " " bitfld.long 0x04 22.--23. " [7:6] ,Enable the PDR mode for DQ3" "0,1,2,3" bitfld.long 0x04 20.--21. " [5:4] ,Enable the PDR mode for DQ2" "0,1,2,3" bitfld.long 0x04 18.--19. " [3:2] ,Enable the PDR mode for DQ1" "0,1,2,3" bitfld.long 0x04 16.--17. " [1:0] ,Enable the PDR mode for DQ0" "0,1,2,3" textline " " bitfld.long 0x04 14. " QSNSEL ,Select the delayed or non-delayed read data strobe #" "Disabled,Enabled" bitfld.long 0x04 13. " QSSEL ,Select the delayed or non-delayed read data strobe" "Disabled,Enabled" bitfld.long 0x04 12. " OEEN ,Enables read data strobe in a byte lane" "Disabled,Enabled" bitfld.long 0x04 11. " PDREN ,Enables PDR in a byte lane" "Disabled,Enabled" textline " " bitfld.long 0x04 10. " TEEN ,Enables ODT/TE in a byte lane" "Disabled,Enabled" bitfld.long 0x04 9. " DSEN ,Enables write data strobe in a byte lane" "Disabled,Enabled" bitfld.long 0x04 8. " DMEN ,Enables DM pin in a byte lane" "Disabled,Enabled" bitfld.long 0x04 7. " DQEN[7] ,DQ7 enable" "Disabled,Enabled" textline " " bitfld.long 0x04 6. " [6] ,DQ6 enable" "Disabled,Enabled" bitfld.long 0x04 5. " [5] ,DQ5 enable" "Disabled,Enabled" bitfld.long 0x04 4. " [4] ,DQ4 enable" "Disabled,Enabled" bitfld.long 0x04 3. " [3] ,DQ3 enable" "Disabled,Enabled" textline " " bitfld.long 0x04 2. " [2] ,DQ2 enable" "Disabled,Enabled" bitfld.long 0x04 1. " [1] ,DQ1 enable" "Disabled,Enabled" bitfld.long 0x04 0. " [0] ,DQ0 enable" "Disabled,Enabled" line.long 0x08 "DX4GCR2,DATX8 4 General Configuration Register 2" bitfld.long 0x08 30.--31. " DXOEMODE[15:14] ,Enable the OE mode for DQ7" "0,1,2,3" bitfld.long 0x08 28.--29. " [13:12] ,Enable the OE mode for DQ6" "0,1,2,3" bitfld.long 0x08 26.--27. " [11:10] ,Enable the OE mode for DQ5" "0,1,2,3" bitfld.long 0x08 24.--25. " [9:8] ,Enable the OE mode for DQ4" "0,1,2,3" textline " " bitfld.long 0x08 22.--23. " [7:6] ,Enable the OE mode for DQ3" "0,1,2,3" bitfld.long 0x08 20.--21. " [5:4] ,Enable the OE mode for DQ2" "0,1,2,3" bitfld.long 0x08 18.--19. " [3:2] ,Enable the OE mode for DQ1" "0,1,2,3" bitfld.long 0x08 16.--17. " [1:0] ,Enable the OE mode for DQ0" "0,1,2,3" textline " " bitfld.long 0x08 14.--15. " DXTEMODE[15:14] ,Enable the TE mode for DQ7" "0,1,2,3" bitfld.long 0x08 12.--13. " [13:12] ,Enable the TE mode for DQ6" "0,1,2,3" bitfld.long 0x08 10.--11. " [11:10] ,Enable the TE mode for DQ5" "0,1,2,3" bitfld.long 0x08 8.--9. " [9:8] ,Enable the TE mode for DQ4" "0,1,2,3" textline " " bitfld.long 0x08 6.--7. " [7:6] ,Enable the TE mode for DQ3" "0,1,2,3" bitfld.long 0x08 4.--5. " [5:4] ,Enable the TE mode for DQ2" "0,1,2,3" bitfld.long 0x08 2.--3. " [3:2] ,Enable the TE mode for DQ1" "0,1,2,3" bitfld.long 0x08 0.--1. " [1:0] ,Enable the TE mode for DQ0" "0,1,2,3" line.long 0x0C "DX4GCR3,DATX8 4 General Configuration Register 3" bitfld.long 0x0C 29. " RDBVT ,Read data BDL VT compensation" "Disabled,Enabled" bitfld.long 0x0C 28. " WDBVT ,Write data BDL VT compensation" "Disabled,Enabled" bitfld.long 0x0C 27. " RGLVT ,Read DQS gating LCDL delay VT compensation" "Disabled,Enabled" bitfld.long 0x0C 26. " RDLVT ,Read DQS LCDL delay VT compensation" "Disabled,Enabled" textline " " bitfld.long 0x0C 25. " WDLVT ,Write DQ LCDL delay VT compensation" "Disabled,Enabled" bitfld.long 0x0C 24. " WLLVT ,Write leveling LCDL delay VT compensation" "Disabled,Enabled" bitfld.long 0x0C 20.--21. " DSNOEMODE ,Enables the OE mode for DQS" "0,1,2,3" bitfld.long 0x0C 18.--19. " DSNTEMODE ,Enables the TE mode for DQS" "0,1,2,3" textline " " bitfld.long 0x0C 16.--17. " DSNPDRMODE ,Enables the PDR mode for DQS" "0,1,2,3" bitfld.long 0x0C 14.--15. " DMOEMODE ,Enables the OE mode values for DM" "0,1,2,3" bitfld.long 0x0C 12.--13. " DMTEMODE ,Enables the TE mode values for DM" "0,1,2,3" bitfld.long 0x0C 10.--11. " DMPDRMODE ,Enables the PDR mode values for DM" "0,1,2,3" textline " " bitfld.long 0x0C 6.--7. " DSOEMODE ,Enables the OE mode values for DQS" "0,1,2,3" bitfld.long 0x0C 4.--5. " DSTEMODE ,Enables the TE mode values for DQS" "0,1,2,3" bitfld.long 0x0C 2.--3. " DSPDRMODE ,Enables the PDR mode values for DQS" "0,1,2,3" line.long 0x10 "DX4GCR4,DATX8 4 General Configuration Register 4" bitfld.long 0x10 28. " DXREFPEN ,Byte lane VREF pad enable" "Disabled,Enabled" bitfld.long 0x10 26.--27. " DXREFEEN ,Byte lane internal VREF enable" "0,1,2,3" bitfld.long 0x10 25. " DXREFSEN ,Byte lane Single-End VREF enable" "Disabled,Enabled" bitfld.long 0x10 23. " DXREFESELRANGE ,External VREF generator REFSEL range select" "0,1" textline " " hexmask.long.byte 0x10 16.--22. 1. " DXREFESEL ,Byte lane external VREF select" bitfld.long 0x10 15. " DXREFSSELRANGE ,Single ended VREF generator REFSEL range select" "0,1" hexmask.long.byte 0x10 8.--14. 1. " DXREFSSEL ,Byte lane Single-End VREF select" bitfld.long 0x10 2.--5. " DXREFIEN ,VREF enable control for DQ IO single ended buffers of a byte lane" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x10 0.--1. " DXREFIMON ,VRMON control for DQ IO single ended buffers of a byte lane" "0,1,2,3" line.long 0x14 "DX4GCR5,DATX8 4 General Configuration Register 5" hexmask.long.byte 0x14 24.--30. 1. " DXREFISELR3 ,Byte lane internal VREF select for rank 3" hexmask.long.byte 0x14 16.--22. 1. " DXREFISELR2 ,Byte lane internal VREF select for rank 2" hexmask.long.byte 0x14 8.--14. 1. " DXREFISELR1 ,Byte lane internal VREF select for rank 1" hexmask.long.byte 0x14 0.--6. 1. " DXREFISELR0 ,Byte lane internal VREF select for rank 0" line.long 0x18 "DX4GCR6,DATX8 4 General Configuration Register 6" bitfld.long 0x18 24.--29. " DXDQVREFR3 ,DRAM DQ VREF select for rank3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x18 16.--21. " DXDQVREFR2 ,DRAM DQ VREF select for rank2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x18 8.--13. " DXDQVREFR1 ,DRAM DQ VREF select for rank1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x18 0.--5. " DXDQVREFR0 ,DRAM DQ VREF select for rank0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long (0xB00+0x40)++0x0B line.long 0x00 "DX4BDLR0,DATX8 4 Bit Delay Line Register 0" bitfld.long 0x00 24.--29. " DQ3WBD ,DQ3 write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 16.--21. " DQ2WBD ,DQ2 write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 8.--13. " DQ1WBD ,DQ1 write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " DQ0WBD ,DQ0 write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "DX4BDLR1,DATX8 4 Bit Delay Line Register 1" bitfld.long 0x04 24.--29. " DQ7WBD ,DQ7 write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 16.--21. " DQ6WBD ,DQ6 write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 8.--13. " DQ5WBD ,DQ5 write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 0.--5. " DQ4WBD ,DQ4 write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x08 "DX4BDLR2,DATX8 4 Bit Delay Line Register 2" bitfld.long 0x08 24.--29. " DSNWBD ,DQSN write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x08 16.--21. " DSOEBD ,DQS/DM/DQ output enable bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x08 8.--13. " DSWBD ,DQS write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x08 0.--5. " DMWBD ,DM write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long (0xB00+0x50)++0x0B line.long 0x00 "DX4BDLR3,DATX8 4 Bit Delay Line Register 3" bitfld.long 0x00 24.--29. " DQ3RBD ,DQ3 read bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 16.--21. " DQ2RBD ,DQ2 read bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 8.--13. " DQ1RBD ,DQ1 read bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " DQ0RBD ,DQ0 read bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "DX4BDLR4,DATX8 4 Bit Delay Line Register 4" bitfld.long 0x04 24.--29. " DQ7RBD ,DQ7 read bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 16.--21. " DQ6RBD ,DQ6 read bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 8.--13. " DQ5RBD ,DQ5 read bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 0.--5. " DQ4RBD ,DQ4 read bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x08 "DX4BDLR5,DATX8 4 Bit Delay Line Register 5" bitfld.long 0x08 0.--5. " DMRBD ,DM read bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long (0xB00+0x60)++0x03 line.long 0x00 "DX4BDLR6,DATX8 4 Bit Delay Line Register 6" bitfld.long 0x00 16.--21. " TERBD ,Termination enable bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 8.--13. " PDRBD ,Power down receiver bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long (0xB00+0x80)++0x17 line.long 0x00 "DX4LCDLR0,DATX8 4 Local Calibrated Delay Line Register 0" hexmask.long.word 0x00 0.--8. 1. " WLD ,Write leveling delay" line.long 0x04 "DX4LCDLR1,DATX8 4 Local Calibrated Delay Line Register 1" hexmask.long.word 0x04 0.--8. 1. " WDQD ,Write data delay" line.long 0x08 "DX4LCDLR2,DATX8 4 Local Calibrated Delay Line Register 2" hexmask.long.word 0x08 0.--8. 1. " DQSGD ,Read DQS gating delay" line.long 0x0C "DX4LCDLR3,DATX8 4 Local Calibrated Delay Line Register 3" hexmask.long.word 0x0C 0.--8. 1. " RDQSD ,Read DQS delay" line.long 0x10 "DX4LCDLR4,DATX8 4 Local Calibrated Delay Line Register 4" hexmask.long.word 0x10 0.--8. 1. " RDQSND ,Read DQSN delay" line.long 0x14 "DX4LCDLR5,DATX8 4 Local Calibrated Delay Line Register 5" hexmask.long.word 0x14 0.--8. 1. " DQSGSD ,DQS gating status delay" group.long (0xB00+0xA0)++0x07 line.long 0x00 "DX4MDLR0,DATX8 4 Master Delay Line Register 0" hexmask.long.word 0x00 16.--24. 1. " TPRD ,Target period" hexmask.long.word 0x00 0.--8. 1. " IPRD ,Initial period" line.long 0x04 "DX4MDLR1,DATX8 4 Master Delay Line Register 1" hexmask.long.word 0x04 0.--8. 1. " MDLD ,MDL delay" group.long (0xB00+0xC0)++0x03 line.long 0x00 "DX4GTR0,DATX8 4 General Timing Register 0" bitfld.long 0x00 24.--26. " WDQSL ,DQ write path latency pipeline" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16.--19. " WLSL ,Write leveling system latency" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--4. " DGSL ,DQS gating system latency" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long (0xB00+0xD0)++0x1F line.long 0x00 "DX4RSR0,DATX8 4 Rank Status Register 0" hexmask.long.word 0x00 0.--15. 1. " QSGERR ,DQS gate training error" line.long 0x04 "DX4RSR1,DATX8 4 Rank Status Register 1" hexmask.long.word 0x04 0.--15. 1. " RDLVLERR ,Read leveling error" line.long 0x08 "DX4RSR2,DATX8 4 Rank Status Register 2" hexmask.long.word 0x08 0.--15. 1. " WLAWN ,Write latency adjustment warning" line.long 0x0C "DX4RSR3,DATX8 4 Rank Status Register 3" hexmask.long.word 0x0C 0.--15. 1. " WLAERR ,Write leveling adjustment error" line.long 0x10 "DX4GSR0,DATX8 4 General Status Register 0" bitfld.long 0x10 30. " WLDQ ,Write leveling DQ status" "0,1" hexmask.long.word 0x10 17.--25. 1. " GDQSPRD ,Read DQS gating period" bitfld.long 0x10 16. " DPLOCK ,DATX8 PLL lock" "Not locked,Locked" hexmask.long.word 0x10 7.--15. 1. " WLPRD ,Write leveling period" textline " " bitfld.long 0x10 6. " WLERR ,Write leveling error" "No error,Error" bitfld.long 0x10 5. " WLDONE ,Write leveling done" "Not done,Done" bitfld.long 0x10 4. " WLCAL ,Write leveling calibration" "Not done,Done" bitfld.long 0x10 3. " GDQSCAL ,Read DQS gating calibration" "Not done,Done" textline " " bitfld.long 0x10 2. " RDQSNCAL ,Read DQS# calibration" "Not done,Done" bitfld.long 0x10 1. " RDQSCAL ,Read DQS calibration" "Not done,Done" bitfld.long 0x10 0. " WDQCAL ,Write DQ calibration" "Not done,Done" line.long 0x14 "DX4GSR1,DATX8 4 General Status Register 1" hexmask.long.tbyte 0x14 1.--24. 1. " DLTCODE ,Delay line test code" bitfld.long 0x14 0. " DLTDONE ,Delay line test done" "Not done,Done" line.long 0x18 "DX4GSR2,DATX8 4 General Status Register 2" hexmask.long.word 0x18 23.--31. 1. " GSDQSPRD ,Read DQS gating status period" bitfld.long 0x18 22. " GSDQSCAL ,Read DQS gating status calibration" "Not done,Done" bitfld.long 0x18 20. " SRDERR ,Static read error" "No error,Error" hexmask.long.byte 0x18 12.--19. 1. " DQS2DQERR ,Write DQS2DQ training error" textline " " bitfld.long 0x18 8.--11. " ESTAT ,Error status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 7. " WEWN ,Write eye centering warning" "Not occurred,Occurred" bitfld.long 0x18 6. " WEERR ,Write eye centering error" "No error,Error" bitfld.long 0x18 5. " REWN ,Read eye centering warning" "Not occurred,Occurred" textline " " bitfld.long 0x18 4. " REERR ,Read eye centering error" "No error,Error" bitfld.long 0x18 3. " WDWN ,Write bit deskew warning" "Not occurred,Occurred" bitfld.long 0x18 2. " WDERR ,Write bit deskew error" "No error,Error" bitfld.long 0x18 1. " RDWN ,Read bit deskew warning" "Not occurred,Occurred" textline " " bitfld.long 0x18 0. " RDERR ,Read bit deskew error" "No error,Error" line.long 0x1C "DX4GSR3,DATX8 4 General Status Register 3" bitfld.long 0x1C 24.--26. " ESTAT ,VREF training error status code" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 20.--23. " DVWRN ,DRAM VREF training warning" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C 16.--19. " DVERR ,DRAM VREF training error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C 12.--15. " HVWRN ,Host VREF training warning" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x1C 8.--11. " HVERR ,Host VREF training error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C 0.--1. " SRDPC ,Static read delay pass count" "0,1,2,3" group.long 0xC00++0x1B line.long 0x00 "DX5GCR0,DATX8 5 General Configuration Register 0" bitfld.long 0x00 31. " CALBYP ,Calibration bypass" "No bypass,Bypass" bitfld.long 0x00 30. " MDLEN ,Master delay line enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " CODTSHFT ,Configurable ODTTE phase shift" "0,1,2,3" bitfld.long 0x00 24.--27. " DQSDCC ,DQS duty cycle correction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 20.--23. " RDDLY ,Number of cycles to generate CTL_DX_GET_STATIC_RD input" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 13. " DQSNSEPDR ,DQSNSE power down receiver" "No,Yes" bitfld.long 0x00 12. " DQSSEPDR ,DQSSE power down receiver" "No,Yes" bitfld.long 0x00 11. " RTTOAL ,RTT on additive latency" "Disabled,Enabled" textline " " bitfld.long 0x00 9.--10. " RTTOH ,RTT output hold" "0,1,2,3" bitfld.long 0x00 7.--8. " CPDRSHFT ,Configurable PDR phase shift" "0,1,2,3" bitfld.long 0x00 6. " DQSRPD ,DQSR power down" "No,Yes" bitfld.long 0x00 5. " DQSGPDR ,DQSG power down receiver" "No,Yes" textline " " bitfld.long 0x00 3. " DQSGODT ,DQSG On-Die termination" "Disabled,Enabled" bitfld.long 0x00 2. " DQSGOE ,DQSG output enable" "Disabled,Enabled" line.long 0x04 "DX5GCR1,DATX8 5 General Configuration Register 1" bitfld.long 0x04 30.--31. " DXPDRMODE[15:14] ,Enable the PDR mode for DQ7" "0,1,2,3" bitfld.long 0x04 28.--29. " [13:12] ,Enable the PDR mode for DQ6" "0,1,2,3" bitfld.long 0x04 26.--27. " [11:10] ,Enable the PDR mode for DQ5" "0,1,2,3" bitfld.long 0x04 24.--25. " [9:8] ,Enable the PDR mode for DQ4" "0,1,2,3" textline " " bitfld.long 0x04 22.--23. " [7:6] ,Enable the PDR mode for DQ3" "0,1,2,3" bitfld.long 0x04 20.--21. " [5:4] ,Enable the PDR mode for DQ2" "0,1,2,3" bitfld.long 0x04 18.--19. " [3:2] ,Enable the PDR mode for DQ1" "0,1,2,3" bitfld.long 0x04 16.--17. " [1:0] ,Enable the PDR mode for DQ0" "0,1,2,3" textline " " bitfld.long 0x04 14. " QSNSEL ,Select the delayed or non-delayed read data strobe #" "Disabled,Enabled" bitfld.long 0x04 13. " QSSEL ,Select the delayed or non-delayed read data strobe" "Disabled,Enabled" bitfld.long 0x04 12. " OEEN ,Enables read data strobe in a byte lane" "Disabled,Enabled" bitfld.long 0x04 11. " PDREN ,Enables PDR in a byte lane" "Disabled,Enabled" textline " " bitfld.long 0x04 10. " TEEN ,Enables ODT/TE in a byte lane" "Disabled,Enabled" bitfld.long 0x04 9. " DSEN ,Enables write data strobe in a byte lane" "Disabled,Enabled" bitfld.long 0x04 8. " DMEN ,Enables DM pin in a byte lane" "Disabled,Enabled" bitfld.long 0x04 7. " DQEN[7] ,DQ7 enable" "Disabled,Enabled" textline " " bitfld.long 0x04 6. " [6] ,DQ6 enable" "Disabled,Enabled" bitfld.long 0x04 5. " [5] ,DQ5 enable" "Disabled,Enabled" bitfld.long 0x04 4. " [4] ,DQ4 enable" "Disabled,Enabled" bitfld.long 0x04 3. " [3] ,DQ3 enable" "Disabled,Enabled" textline " " bitfld.long 0x04 2. " [2] ,DQ2 enable" "Disabled,Enabled" bitfld.long 0x04 1. " [1] ,DQ1 enable" "Disabled,Enabled" bitfld.long 0x04 0. " [0] ,DQ0 enable" "Disabled,Enabled" line.long 0x08 "DX5GCR2,DATX8 5 General Configuration Register 2" bitfld.long 0x08 30.--31. " DXOEMODE[15:14] ,Enable the OE mode for DQ7" "0,1,2,3" bitfld.long 0x08 28.--29. " [13:12] ,Enable the OE mode for DQ6" "0,1,2,3" bitfld.long 0x08 26.--27. " [11:10] ,Enable the OE mode for DQ5" "0,1,2,3" bitfld.long 0x08 24.--25. " [9:8] ,Enable the OE mode for DQ4" "0,1,2,3" textline " " bitfld.long 0x08 22.--23. " [7:6] ,Enable the OE mode for DQ3" "0,1,2,3" bitfld.long 0x08 20.--21. " [5:4] ,Enable the OE mode for DQ2" "0,1,2,3" bitfld.long 0x08 18.--19. " [3:2] ,Enable the OE mode for DQ1" "0,1,2,3" bitfld.long 0x08 16.--17. " [1:0] ,Enable the OE mode for DQ0" "0,1,2,3" textline " " bitfld.long 0x08 14.--15. " DXTEMODE[15:14] ,Enable the TE mode for DQ7" "0,1,2,3" bitfld.long 0x08 12.--13. " [13:12] ,Enable the TE mode for DQ6" "0,1,2,3" bitfld.long 0x08 10.--11. " [11:10] ,Enable the TE mode for DQ5" "0,1,2,3" bitfld.long 0x08 8.--9. " [9:8] ,Enable the TE mode for DQ4" "0,1,2,3" textline " " bitfld.long 0x08 6.--7. " [7:6] ,Enable the TE mode for DQ3" "0,1,2,3" bitfld.long 0x08 4.--5. " [5:4] ,Enable the TE mode for DQ2" "0,1,2,3" bitfld.long 0x08 2.--3. " [3:2] ,Enable the TE mode for DQ1" "0,1,2,3" bitfld.long 0x08 0.--1. " [1:0] ,Enable the TE mode for DQ0" "0,1,2,3" line.long 0x0C "DX5GCR3,DATX8 5 General Configuration Register 3" bitfld.long 0x0C 29. " RDBVT ,Read data BDL VT compensation" "Disabled,Enabled" bitfld.long 0x0C 28. " WDBVT ,Write data BDL VT compensation" "Disabled,Enabled" bitfld.long 0x0C 27. " RGLVT ,Read DQS gating LCDL delay VT compensation" "Disabled,Enabled" bitfld.long 0x0C 26. " RDLVT ,Read DQS LCDL delay VT compensation" "Disabled,Enabled" textline " " bitfld.long 0x0C 25. " WDLVT ,Write DQ LCDL delay VT compensation" "Disabled,Enabled" bitfld.long 0x0C 24. " WLLVT ,Write leveling LCDL delay VT compensation" "Disabled,Enabled" bitfld.long 0x0C 20.--21. " DSNOEMODE ,Enables the OE mode for DQS" "0,1,2,3" bitfld.long 0x0C 18.--19. " DSNTEMODE ,Enables the TE mode for DQS" "0,1,2,3" textline " " bitfld.long 0x0C 16.--17. " DSNPDRMODE ,Enables the PDR mode for DQS" "0,1,2,3" bitfld.long 0x0C 14.--15. " DMOEMODE ,Enables the OE mode values for DM" "0,1,2,3" bitfld.long 0x0C 12.--13. " DMTEMODE ,Enables the TE mode values for DM" "0,1,2,3" bitfld.long 0x0C 10.--11. " DMPDRMODE ,Enables the PDR mode values for DM" "0,1,2,3" textline " " bitfld.long 0x0C 6.--7. " DSOEMODE ,Enables the OE mode values for DQS" "0,1,2,3" bitfld.long 0x0C 4.--5. " DSTEMODE ,Enables the TE mode values for DQS" "0,1,2,3" bitfld.long 0x0C 2.--3. " DSPDRMODE ,Enables the PDR mode values for DQS" "0,1,2,3" line.long 0x10 "DX5GCR4,DATX8 5 General Configuration Register 4" bitfld.long 0x10 28. " DXREFPEN ,Byte lane VREF pad enable" "Disabled,Enabled" bitfld.long 0x10 26.--27. " DXREFEEN ,Byte lane internal VREF enable" "0,1,2,3" bitfld.long 0x10 25. " DXREFSEN ,Byte lane Single-End VREF enable" "Disabled,Enabled" bitfld.long 0x10 23. " DXREFESELRANGE ,External VREF generator REFSEL range select" "0,1" textline " " hexmask.long.byte 0x10 16.--22. 1. " DXREFESEL ,Byte lane external VREF select" bitfld.long 0x10 15. " DXREFSSELRANGE ,Single ended VREF generator REFSEL range select" "0,1" hexmask.long.byte 0x10 8.--14. 1. " DXREFSSEL ,Byte lane Single-End VREF select" bitfld.long 0x10 2.--5. " DXREFIEN ,VREF enable control for DQ IO single ended buffers of a byte lane" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x10 0.--1. " DXREFIMON ,VRMON control for DQ IO single ended buffers of a byte lane" "0,1,2,3" line.long 0x14 "DX5GCR5,DATX8 5 General Configuration Register 5" hexmask.long.byte 0x14 24.--30. 1. " DXREFISELR3 ,Byte lane internal VREF select for rank 3" hexmask.long.byte 0x14 16.--22. 1. " DXREFISELR2 ,Byte lane internal VREF select for rank 2" hexmask.long.byte 0x14 8.--14. 1. " DXREFISELR1 ,Byte lane internal VREF select for rank 1" hexmask.long.byte 0x14 0.--6. 1. " DXREFISELR0 ,Byte lane internal VREF select for rank 0" line.long 0x18 "DX5GCR6,DATX8 5 General Configuration Register 6" bitfld.long 0x18 24.--29. " DXDQVREFR3 ,DRAM DQ VREF select for rank3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x18 16.--21. " DXDQVREFR2 ,DRAM DQ VREF select for rank2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x18 8.--13. " DXDQVREFR1 ,DRAM DQ VREF select for rank1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x18 0.--5. " DXDQVREFR0 ,DRAM DQ VREF select for rank0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long (0xC00+0x40)++0x0B line.long 0x00 "DX5BDLR0,DATX8 5 Bit Delay Line Register 0" bitfld.long 0x00 24.--29. " DQ3WBD ,DQ3 write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 16.--21. " DQ2WBD ,DQ2 write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 8.--13. " DQ1WBD ,DQ1 write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " DQ0WBD ,DQ0 write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "DX5BDLR1,DATX8 5 Bit Delay Line Register 1" bitfld.long 0x04 24.--29. " DQ7WBD ,DQ7 write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 16.--21. " DQ6WBD ,DQ6 write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 8.--13. " DQ5WBD ,DQ5 write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 0.--5. " DQ4WBD ,DQ4 write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x08 "DX5BDLR2,DATX8 5 Bit Delay Line Register 2" bitfld.long 0x08 24.--29. " DSNWBD ,DQSN write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x08 16.--21. " DSOEBD ,DQS/DM/DQ output enable bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x08 8.--13. " DSWBD ,DQS write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x08 0.--5. " DMWBD ,DM write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long (0xC00+0x50)++0x0B line.long 0x00 "DX5BDLR3,DATX8 5 Bit Delay Line Register 3" bitfld.long 0x00 24.--29. " DQ3RBD ,DQ3 read bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 16.--21. " DQ2RBD ,DQ2 read bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 8.--13. " DQ1RBD ,DQ1 read bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " DQ0RBD ,DQ0 read bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "DX5BDLR4,DATX8 5 Bit Delay Line Register 4" bitfld.long 0x04 24.--29. " DQ7RBD ,DQ7 read bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 16.--21. " DQ6RBD ,DQ6 read bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 8.--13. " DQ5RBD ,DQ5 read bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 0.--5. " DQ4RBD ,DQ4 read bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x08 "DX5BDLR5,DATX8 5 Bit Delay Line Register 5" bitfld.long 0x08 0.--5. " DMRBD ,DM read bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long (0xC00+0x60)++0x03 line.long 0x00 "DX5BDLR6,DATX8 5 Bit Delay Line Register 6" bitfld.long 0x00 16.--21. " TERBD ,Termination enable bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 8.--13. " PDRBD ,Power down receiver bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long (0xC00+0x80)++0x17 line.long 0x00 "DX5LCDLR0,DATX8 5 Local Calibrated Delay Line Register 0" hexmask.long.word 0x00 0.--8. 1. " WLD ,Write leveling delay" line.long 0x04 "DX5LCDLR1,DATX8 5 Local Calibrated Delay Line Register 1" hexmask.long.word 0x04 0.--8. 1. " WDQD ,Write data delay" line.long 0x08 "DX5LCDLR2,DATX8 5 Local Calibrated Delay Line Register 2" hexmask.long.word 0x08 0.--8. 1. " DQSGD ,Read DQS gating delay" line.long 0x0C "DX5LCDLR3,DATX8 5 Local Calibrated Delay Line Register 3" hexmask.long.word 0x0C 0.--8. 1. " RDQSD ,Read DQS delay" line.long 0x10 "DX5LCDLR4,DATX8 5 Local Calibrated Delay Line Register 4" hexmask.long.word 0x10 0.--8. 1. " RDQSND ,Read DQSN delay" line.long 0x14 "DX5LCDLR5,DATX8 5 Local Calibrated Delay Line Register 5" hexmask.long.word 0x14 0.--8. 1. " DQSGSD ,DQS gating status delay" group.long (0xC00+0xA0)++0x07 line.long 0x00 "DX5MDLR0,DATX8 5 Master Delay Line Register 0" hexmask.long.word 0x00 16.--24. 1. " TPRD ,Target period" hexmask.long.word 0x00 0.--8. 1. " IPRD ,Initial period" line.long 0x04 "DX5MDLR1,DATX8 5 Master Delay Line Register 1" hexmask.long.word 0x04 0.--8. 1. " MDLD ,MDL delay" group.long (0xC00+0xC0)++0x03 line.long 0x00 "DX5GTR0,DATX8 5 General Timing Register 0" bitfld.long 0x00 24.--26. " WDQSL ,DQ write path latency pipeline" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16.--19. " WLSL ,Write leveling system latency" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--4. " DGSL ,DQS gating system latency" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long (0xC00+0xD0)++0x1F line.long 0x00 "DX5RSR0,DATX8 5 Rank Status Register 0" hexmask.long.word 0x00 0.--15. 1. " QSGERR ,DQS gate training error" line.long 0x04 "DX5RSR1,DATX8 5 Rank Status Register 1" hexmask.long.word 0x04 0.--15. 1. " RDLVLERR ,Read leveling error" line.long 0x08 "DX5RSR2,DATX8 5 Rank Status Register 2" hexmask.long.word 0x08 0.--15. 1. " WLAWN ,Write latency adjustment warning" line.long 0x0C "DX5RSR3,DATX8 5 Rank Status Register 3" hexmask.long.word 0x0C 0.--15. 1. " WLAERR ,Write leveling adjustment error" line.long 0x10 "DX5GSR0,DATX8 5 General Status Register 0" bitfld.long 0x10 30. " WLDQ ,Write leveling DQ status" "0,1" hexmask.long.word 0x10 17.--25. 1. " GDQSPRD ,Read DQS gating period" bitfld.long 0x10 16. " DPLOCK ,DATX8 PLL lock" "Not locked,Locked" hexmask.long.word 0x10 7.--15. 1. " WLPRD ,Write leveling period" textline " " bitfld.long 0x10 6. " WLERR ,Write leveling error" "No error,Error" bitfld.long 0x10 5. " WLDONE ,Write leveling done" "Not done,Done" bitfld.long 0x10 4. " WLCAL ,Write leveling calibration" "Not done,Done" bitfld.long 0x10 3. " GDQSCAL ,Read DQS gating calibration" "Not done,Done" textline " " bitfld.long 0x10 2. " RDQSNCAL ,Read DQS# calibration" "Not done,Done" bitfld.long 0x10 1. " RDQSCAL ,Read DQS calibration" "Not done,Done" bitfld.long 0x10 0. " WDQCAL ,Write DQ calibration" "Not done,Done" line.long 0x14 "DX5GSR1,DATX8 5 General Status Register 1" hexmask.long.tbyte 0x14 1.--24. 1. " DLTCODE ,Delay line test code" bitfld.long 0x14 0. " DLTDONE ,Delay line test done" "Not done,Done" line.long 0x18 "DX5GSR2,DATX8 5 General Status Register 2" hexmask.long.word 0x18 23.--31. 1. " GSDQSPRD ,Read DQS gating status period" bitfld.long 0x18 22. " GSDQSCAL ,Read DQS gating status calibration" "Not done,Done" bitfld.long 0x18 20. " SRDERR ,Static read error" "No error,Error" hexmask.long.byte 0x18 12.--19. 1. " DQS2DQERR ,Write DQS2DQ training error" textline " " bitfld.long 0x18 8.--11. " ESTAT ,Error status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 7. " WEWN ,Write eye centering warning" "Not occurred,Occurred" bitfld.long 0x18 6. " WEERR ,Write eye centering error" "No error,Error" bitfld.long 0x18 5. " REWN ,Read eye centering warning" "Not occurred,Occurred" textline " " bitfld.long 0x18 4. " REERR ,Read eye centering error" "No error,Error" bitfld.long 0x18 3. " WDWN ,Write bit deskew warning" "Not occurred,Occurred" bitfld.long 0x18 2. " WDERR ,Write bit deskew error" "No error,Error" bitfld.long 0x18 1. " RDWN ,Read bit deskew warning" "Not occurred,Occurred" textline " " bitfld.long 0x18 0. " RDERR ,Read bit deskew error" "No error,Error" line.long 0x1C "DX5GSR3,DATX8 5 General Status Register 3" bitfld.long 0x1C 24.--26. " ESTAT ,VREF training error status code" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 20.--23. " DVWRN ,DRAM VREF training warning" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C 16.--19. " DVERR ,DRAM VREF training error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C 12.--15. " HVWRN ,Host VREF training warning" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x1C 8.--11. " HVERR ,Host VREF training error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C 0.--1. " SRDPC ,Static read delay pass count" "0,1,2,3" group.long 0xD00++0x1B line.long 0x00 "DX6GCR0,DATX8 6 General Configuration Register 0" bitfld.long 0x00 31. " CALBYP ,Calibration bypass" "No bypass,Bypass" bitfld.long 0x00 30. " MDLEN ,Master delay line enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " CODTSHFT ,Configurable ODTTE phase shift" "0,1,2,3" bitfld.long 0x00 24.--27. " DQSDCC ,DQS duty cycle correction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 20.--23. " RDDLY ,Number of cycles to generate CTL_DX_GET_STATIC_RD input" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 13. " DQSNSEPDR ,DQSNSE power down receiver" "No,Yes" bitfld.long 0x00 12. " DQSSEPDR ,DQSSE power down receiver" "No,Yes" bitfld.long 0x00 11. " RTTOAL ,RTT on additive latency" "Disabled,Enabled" textline " " bitfld.long 0x00 9.--10. " RTTOH ,RTT output hold" "0,1,2,3" bitfld.long 0x00 7.--8. " CPDRSHFT ,Configurable PDR phase shift" "0,1,2,3" bitfld.long 0x00 6. " DQSRPD ,DQSR power down" "No,Yes" bitfld.long 0x00 5. " DQSGPDR ,DQSG power down receiver" "No,Yes" textline " " bitfld.long 0x00 3. " DQSGODT ,DQSG On-Die termination" "Disabled,Enabled" bitfld.long 0x00 2. " DQSGOE ,DQSG output enable" "Disabled,Enabled" line.long 0x04 "DX6GCR1,DATX8 6 General Configuration Register 1" bitfld.long 0x04 30.--31. " DXPDRMODE[15:14] ,Enable the PDR mode for DQ7" "0,1,2,3" bitfld.long 0x04 28.--29. " [13:12] ,Enable the PDR mode for DQ6" "0,1,2,3" bitfld.long 0x04 26.--27. " [11:10] ,Enable the PDR mode for DQ5" "0,1,2,3" bitfld.long 0x04 24.--25. " [9:8] ,Enable the PDR mode for DQ4" "0,1,2,3" textline " " bitfld.long 0x04 22.--23. " [7:6] ,Enable the PDR mode for DQ3" "0,1,2,3" bitfld.long 0x04 20.--21. " [5:4] ,Enable the PDR mode for DQ2" "0,1,2,3" bitfld.long 0x04 18.--19. " [3:2] ,Enable the PDR mode for DQ1" "0,1,2,3" bitfld.long 0x04 16.--17. " [1:0] ,Enable the PDR mode for DQ0" "0,1,2,3" textline " " bitfld.long 0x04 14. " QSNSEL ,Select the delayed or non-delayed read data strobe #" "Disabled,Enabled" bitfld.long 0x04 13. " QSSEL ,Select the delayed or non-delayed read data strobe" "Disabled,Enabled" bitfld.long 0x04 12. " OEEN ,Enables read data strobe in a byte lane" "Disabled,Enabled" bitfld.long 0x04 11. " PDREN ,Enables PDR in a byte lane" "Disabled,Enabled" textline " " bitfld.long 0x04 10. " TEEN ,Enables ODT/TE in a byte lane" "Disabled,Enabled" bitfld.long 0x04 9. " DSEN ,Enables write data strobe in a byte lane" "Disabled,Enabled" bitfld.long 0x04 8. " DMEN ,Enables DM pin in a byte lane" "Disabled,Enabled" bitfld.long 0x04 7. " DQEN[7] ,DQ7 enable" "Disabled,Enabled" textline " " bitfld.long 0x04 6. " [6] ,DQ6 enable" "Disabled,Enabled" bitfld.long 0x04 5. " [5] ,DQ5 enable" "Disabled,Enabled" bitfld.long 0x04 4. " [4] ,DQ4 enable" "Disabled,Enabled" bitfld.long 0x04 3. " [3] ,DQ3 enable" "Disabled,Enabled" textline " " bitfld.long 0x04 2. " [2] ,DQ2 enable" "Disabled,Enabled" bitfld.long 0x04 1. " [1] ,DQ1 enable" "Disabled,Enabled" bitfld.long 0x04 0. " [0] ,DQ0 enable" "Disabled,Enabled" line.long 0x08 "DX6GCR2,DATX8 6 General Configuration Register 2" bitfld.long 0x08 30.--31. " DXOEMODE[15:14] ,Enable the OE mode for DQ7" "0,1,2,3" bitfld.long 0x08 28.--29. " [13:12] ,Enable the OE mode for DQ6" "0,1,2,3" bitfld.long 0x08 26.--27. " [11:10] ,Enable the OE mode for DQ5" "0,1,2,3" bitfld.long 0x08 24.--25. " [9:8] ,Enable the OE mode for DQ4" "0,1,2,3" textline " " bitfld.long 0x08 22.--23. " [7:6] ,Enable the OE mode for DQ3" "0,1,2,3" bitfld.long 0x08 20.--21. " [5:4] ,Enable the OE mode for DQ2" "0,1,2,3" bitfld.long 0x08 18.--19. " [3:2] ,Enable the OE mode for DQ1" "0,1,2,3" bitfld.long 0x08 16.--17. " [1:0] ,Enable the OE mode for DQ0" "0,1,2,3" textline " " bitfld.long 0x08 14.--15. " DXTEMODE[15:14] ,Enable the TE mode for DQ7" "0,1,2,3" bitfld.long 0x08 12.--13. " [13:12] ,Enable the TE mode for DQ6" "0,1,2,3" bitfld.long 0x08 10.--11. " [11:10] ,Enable the TE mode for DQ5" "0,1,2,3" bitfld.long 0x08 8.--9. " [9:8] ,Enable the TE mode for DQ4" "0,1,2,3" textline " " bitfld.long 0x08 6.--7. " [7:6] ,Enable the TE mode for DQ3" "0,1,2,3" bitfld.long 0x08 4.--5. " [5:4] ,Enable the TE mode for DQ2" "0,1,2,3" bitfld.long 0x08 2.--3. " [3:2] ,Enable the TE mode for DQ1" "0,1,2,3" bitfld.long 0x08 0.--1. " [1:0] ,Enable the TE mode for DQ0" "0,1,2,3" line.long 0x0C "DX6GCR3,DATX8 6 General Configuration Register 3" bitfld.long 0x0C 29. " RDBVT ,Read data BDL VT compensation" "Disabled,Enabled" bitfld.long 0x0C 28. " WDBVT ,Write data BDL VT compensation" "Disabled,Enabled" bitfld.long 0x0C 27. " RGLVT ,Read DQS gating LCDL delay VT compensation" "Disabled,Enabled" bitfld.long 0x0C 26. " RDLVT ,Read DQS LCDL delay VT compensation" "Disabled,Enabled" textline " " bitfld.long 0x0C 25. " WDLVT ,Write DQ LCDL delay VT compensation" "Disabled,Enabled" bitfld.long 0x0C 24. " WLLVT ,Write leveling LCDL delay VT compensation" "Disabled,Enabled" bitfld.long 0x0C 20.--21. " DSNOEMODE ,Enables the OE mode for DQS" "0,1,2,3" bitfld.long 0x0C 18.--19. " DSNTEMODE ,Enables the TE mode for DQS" "0,1,2,3" textline " " bitfld.long 0x0C 16.--17. " DSNPDRMODE ,Enables the PDR mode for DQS" "0,1,2,3" bitfld.long 0x0C 14.--15. " DMOEMODE ,Enables the OE mode values for DM" "0,1,2,3" bitfld.long 0x0C 12.--13. " DMTEMODE ,Enables the TE mode values for DM" "0,1,2,3" bitfld.long 0x0C 10.--11. " DMPDRMODE ,Enables the PDR mode values for DM" "0,1,2,3" textline " " bitfld.long 0x0C 6.--7. " DSOEMODE ,Enables the OE mode values for DQS" "0,1,2,3" bitfld.long 0x0C 4.--5. " DSTEMODE ,Enables the TE mode values for DQS" "0,1,2,3" bitfld.long 0x0C 2.--3. " DSPDRMODE ,Enables the PDR mode values for DQS" "0,1,2,3" line.long 0x10 "DX6GCR4,DATX8 6 General Configuration Register 4" bitfld.long 0x10 28. " DXREFPEN ,Byte lane VREF pad enable" "Disabled,Enabled" bitfld.long 0x10 26.--27. " DXREFEEN ,Byte lane internal VREF enable" "0,1,2,3" bitfld.long 0x10 25. " DXREFSEN ,Byte lane Single-End VREF enable" "Disabled,Enabled" bitfld.long 0x10 23. " DXREFESELRANGE ,External VREF generator REFSEL range select" "0,1" textline " " hexmask.long.byte 0x10 16.--22. 1. " DXREFESEL ,Byte lane external VREF select" bitfld.long 0x10 15. " DXREFSSELRANGE ,Single ended VREF generator REFSEL range select" "0,1" hexmask.long.byte 0x10 8.--14. 1. " DXREFSSEL ,Byte lane Single-End VREF select" bitfld.long 0x10 2.--5. " DXREFIEN ,VREF enable control for DQ IO single ended buffers of a byte lane" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x10 0.--1. " DXREFIMON ,VRMON control for DQ IO single ended buffers of a byte lane" "0,1,2,3" line.long 0x14 "DX6GCR5,DATX8 6 General Configuration Register 5" hexmask.long.byte 0x14 24.--30. 1. " DXREFISELR3 ,Byte lane internal VREF select for rank 3" hexmask.long.byte 0x14 16.--22. 1. " DXREFISELR2 ,Byte lane internal VREF select for rank 2" hexmask.long.byte 0x14 8.--14. 1. " DXREFISELR1 ,Byte lane internal VREF select for rank 1" hexmask.long.byte 0x14 0.--6. 1. " DXREFISELR0 ,Byte lane internal VREF select for rank 0" line.long 0x18 "DX6GCR6,DATX8 6 General Configuration Register 6" bitfld.long 0x18 24.--29. " DXDQVREFR3 ,DRAM DQ VREF select for rank3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x18 16.--21. " DXDQVREFR2 ,DRAM DQ VREF select for rank2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x18 8.--13. " DXDQVREFR1 ,DRAM DQ VREF select for rank1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x18 0.--5. " DXDQVREFR0 ,DRAM DQ VREF select for rank0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long (0xD00+0x40)++0x0B line.long 0x00 "DX6BDLR0,DATX8 6 Bit Delay Line Register 0" bitfld.long 0x00 24.--29. " DQ3WBD ,DQ3 write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 16.--21. " DQ2WBD ,DQ2 write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 8.--13. " DQ1WBD ,DQ1 write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " DQ0WBD ,DQ0 write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "DX6BDLR1,DATX8 6 Bit Delay Line Register 1" bitfld.long 0x04 24.--29. " DQ7WBD ,DQ7 write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 16.--21. " DQ6WBD ,DQ6 write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 8.--13. " DQ5WBD ,DQ5 write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 0.--5. " DQ4WBD ,DQ4 write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x08 "DX6BDLR2,DATX8 6 Bit Delay Line Register 2" bitfld.long 0x08 24.--29. " DSNWBD ,DQSN write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x08 16.--21. " DSOEBD ,DQS/DM/DQ output enable bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x08 8.--13. " DSWBD ,DQS write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x08 0.--5. " DMWBD ,DM write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long (0xD00+0x50)++0x0B line.long 0x00 "DX6BDLR3,DATX8 6 Bit Delay Line Register 3" bitfld.long 0x00 24.--29. " DQ3RBD ,DQ3 read bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 16.--21. " DQ2RBD ,DQ2 read bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 8.--13. " DQ1RBD ,DQ1 read bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " DQ0RBD ,DQ0 read bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "DX6BDLR4,DATX8 6 Bit Delay Line Register 4" bitfld.long 0x04 24.--29. " DQ7RBD ,DQ7 read bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 16.--21. " DQ6RBD ,DQ6 read bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 8.--13. " DQ5RBD ,DQ5 read bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 0.--5. " DQ4RBD ,DQ4 read bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x08 "DX6BDLR5,DATX8 6 Bit Delay Line Register 5" bitfld.long 0x08 0.--5. " DMRBD ,DM read bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long (0xD00+0x60)++0x03 line.long 0x00 "DX6BDLR6,DATX8 6 Bit Delay Line Register 6" bitfld.long 0x00 16.--21. " TERBD ,Termination enable bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 8.--13. " PDRBD ,Power down receiver bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long (0xD00+0x80)++0x17 line.long 0x00 "DX6LCDLR0,DATX8 6 Local Calibrated Delay Line Register 0" hexmask.long.word 0x00 0.--8. 1. " WLD ,Write leveling delay" line.long 0x04 "DX6LCDLR1,DATX8 6 Local Calibrated Delay Line Register 1" hexmask.long.word 0x04 0.--8. 1. " WDQD ,Write data delay" line.long 0x08 "DX6LCDLR2,DATX8 6 Local Calibrated Delay Line Register 2" hexmask.long.word 0x08 0.--8. 1. " DQSGD ,Read DQS gating delay" line.long 0x0C "DX6LCDLR3,DATX8 6 Local Calibrated Delay Line Register 3" hexmask.long.word 0x0C 0.--8. 1. " RDQSD ,Read DQS delay" line.long 0x10 "DX6LCDLR4,DATX8 6 Local Calibrated Delay Line Register 4" hexmask.long.word 0x10 0.--8. 1. " RDQSND ,Read DQSN delay" line.long 0x14 "DX6LCDLR5,DATX8 6 Local Calibrated Delay Line Register 5" hexmask.long.word 0x14 0.--8. 1. " DQSGSD ,DQS gating status delay" group.long (0xD00+0xA0)++0x07 line.long 0x00 "DX6MDLR0,DATX8 6 Master Delay Line Register 0" hexmask.long.word 0x00 16.--24. 1. " TPRD ,Target period" hexmask.long.word 0x00 0.--8. 1. " IPRD ,Initial period" line.long 0x04 "DX6MDLR1,DATX8 6 Master Delay Line Register 1" hexmask.long.word 0x04 0.--8. 1. " MDLD ,MDL delay" group.long (0xD00+0xC0)++0x03 line.long 0x00 "DX6GTR0,DATX8 6 General Timing Register 0" bitfld.long 0x00 24.--26. " WDQSL ,DQ write path latency pipeline" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16.--19. " WLSL ,Write leveling system latency" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--4. " DGSL ,DQS gating system latency" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long (0xD00+0xD0)++0x1F line.long 0x00 "DX6RSR0,DATX8 6 Rank Status Register 0" hexmask.long.word 0x00 0.--15. 1. " QSGERR ,DQS gate training error" line.long 0x04 "DX6RSR1,DATX8 6 Rank Status Register 1" hexmask.long.word 0x04 0.--15. 1. " RDLVLERR ,Read leveling error" line.long 0x08 "DX6RSR2,DATX8 6 Rank Status Register 2" hexmask.long.word 0x08 0.--15. 1. " WLAWN ,Write latency adjustment warning" line.long 0x0C "DX6RSR3,DATX8 6 Rank Status Register 3" hexmask.long.word 0x0C 0.--15. 1. " WLAERR ,Write leveling adjustment error" line.long 0x10 "DX6GSR0,DATX8 6 General Status Register 0" bitfld.long 0x10 30. " WLDQ ,Write leveling DQ status" "0,1" hexmask.long.word 0x10 17.--25. 1. " GDQSPRD ,Read DQS gating period" bitfld.long 0x10 16. " DPLOCK ,DATX8 PLL lock" "Not locked,Locked" hexmask.long.word 0x10 7.--15. 1. " WLPRD ,Write leveling period" textline " " bitfld.long 0x10 6. " WLERR ,Write leveling error" "No error,Error" bitfld.long 0x10 5. " WLDONE ,Write leveling done" "Not done,Done" bitfld.long 0x10 4. " WLCAL ,Write leveling calibration" "Not done,Done" bitfld.long 0x10 3. " GDQSCAL ,Read DQS gating calibration" "Not done,Done" textline " " bitfld.long 0x10 2. " RDQSNCAL ,Read DQS# calibration" "Not done,Done" bitfld.long 0x10 1. " RDQSCAL ,Read DQS calibration" "Not done,Done" bitfld.long 0x10 0. " WDQCAL ,Write DQ calibration" "Not done,Done" line.long 0x14 "DX6GSR1,DATX8 6 General Status Register 1" hexmask.long.tbyte 0x14 1.--24. 1. " DLTCODE ,Delay line test code" bitfld.long 0x14 0. " DLTDONE ,Delay line test done" "Not done,Done" line.long 0x18 "DX6GSR2,DATX8 6 General Status Register 2" hexmask.long.word 0x18 23.--31. 1. " GSDQSPRD ,Read DQS gating status period" bitfld.long 0x18 22. " GSDQSCAL ,Read DQS gating status calibration" "Not done,Done" bitfld.long 0x18 20. " SRDERR ,Static read error" "No error,Error" hexmask.long.byte 0x18 12.--19. 1. " DQS2DQERR ,Write DQS2DQ training error" textline " " bitfld.long 0x18 8.--11. " ESTAT ,Error status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 7. " WEWN ,Write eye centering warning" "Not occurred,Occurred" bitfld.long 0x18 6. " WEERR ,Write eye centering error" "No error,Error" bitfld.long 0x18 5. " REWN ,Read eye centering warning" "Not occurred,Occurred" textline " " bitfld.long 0x18 4. " REERR ,Read eye centering error" "No error,Error" bitfld.long 0x18 3. " WDWN ,Write bit deskew warning" "Not occurred,Occurred" bitfld.long 0x18 2. " WDERR ,Write bit deskew error" "No error,Error" bitfld.long 0x18 1. " RDWN ,Read bit deskew warning" "Not occurred,Occurred" textline " " bitfld.long 0x18 0. " RDERR ,Read bit deskew error" "No error,Error" line.long 0x1C "DX6GSR3,DATX8 6 General Status Register 3" bitfld.long 0x1C 24.--26. " ESTAT ,VREF training error status code" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 20.--23. " DVWRN ,DRAM VREF training warning" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C 16.--19. " DVERR ,DRAM VREF training error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C 12.--15. " HVWRN ,Host VREF training warning" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x1C 8.--11. " HVERR ,Host VREF training error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C 0.--1. " SRDPC ,Static read delay pass count" "0,1,2,3" group.long 0xE00++0x1B line.long 0x00 "DX7GCR0,DATX8 7 General Configuration Register 0" bitfld.long 0x00 31. " CALBYP ,Calibration bypass" "No bypass,Bypass" bitfld.long 0x00 30. " MDLEN ,Master delay line enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " CODTSHFT ,Configurable ODTTE phase shift" "0,1,2,3" bitfld.long 0x00 24.--27. " DQSDCC ,DQS duty cycle correction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 20.--23. " RDDLY ,Number of cycles to generate CTL_DX_GET_STATIC_RD input" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 13. " DQSNSEPDR ,DQSNSE power down receiver" "No,Yes" bitfld.long 0x00 12. " DQSSEPDR ,DQSSE power down receiver" "No,Yes" bitfld.long 0x00 11. " RTTOAL ,RTT on additive latency" "Disabled,Enabled" textline " " bitfld.long 0x00 9.--10. " RTTOH ,RTT output hold" "0,1,2,3" bitfld.long 0x00 7.--8. " CPDRSHFT ,Configurable PDR phase shift" "0,1,2,3" bitfld.long 0x00 6. " DQSRPD ,DQSR power down" "No,Yes" bitfld.long 0x00 5. " DQSGPDR ,DQSG power down receiver" "No,Yes" textline " " bitfld.long 0x00 3. " DQSGODT ,DQSG On-Die termination" "Disabled,Enabled" bitfld.long 0x00 2. " DQSGOE ,DQSG output enable" "Disabled,Enabled" line.long 0x04 "DX7GCR1,DATX8 7 General Configuration Register 1" bitfld.long 0x04 30.--31. " DXPDRMODE[15:14] ,Enable the PDR mode for DQ7" "0,1,2,3" bitfld.long 0x04 28.--29. " [13:12] ,Enable the PDR mode for DQ6" "0,1,2,3" bitfld.long 0x04 26.--27. " [11:10] ,Enable the PDR mode for DQ5" "0,1,2,3" bitfld.long 0x04 24.--25. " [9:8] ,Enable the PDR mode for DQ4" "0,1,2,3" textline " " bitfld.long 0x04 22.--23. " [7:6] ,Enable the PDR mode for DQ3" "0,1,2,3" bitfld.long 0x04 20.--21. " [5:4] ,Enable the PDR mode for DQ2" "0,1,2,3" bitfld.long 0x04 18.--19. " [3:2] ,Enable the PDR mode for DQ1" "0,1,2,3" bitfld.long 0x04 16.--17. " [1:0] ,Enable the PDR mode for DQ0" "0,1,2,3" textline " " bitfld.long 0x04 14. " QSNSEL ,Select the delayed or non-delayed read data strobe #" "Disabled,Enabled" bitfld.long 0x04 13. " QSSEL ,Select the delayed or non-delayed read data strobe" "Disabled,Enabled" bitfld.long 0x04 12. " OEEN ,Enables read data strobe in a byte lane" "Disabled,Enabled" bitfld.long 0x04 11. " PDREN ,Enables PDR in a byte lane" "Disabled,Enabled" textline " " bitfld.long 0x04 10. " TEEN ,Enables ODT/TE in a byte lane" "Disabled,Enabled" bitfld.long 0x04 9. " DSEN ,Enables write data strobe in a byte lane" "Disabled,Enabled" bitfld.long 0x04 8. " DMEN ,Enables DM pin in a byte lane" "Disabled,Enabled" bitfld.long 0x04 7. " DQEN[7] ,DQ7 enable" "Disabled,Enabled" textline " " bitfld.long 0x04 6. " [6] ,DQ6 enable" "Disabled,Enabled" bitfld.long 0x04 5. " [5] ,DQ5 enable" "Disabled,Enabled" bitfld.long 0x04 4. " [4] ,DQ4 enable" "Disabled,Enabled" bitfld.long 0x04 3. " [3] ,DQ3 enable" "Disabled,Enabled" textline " " bitfld.long 0x04 2. " [2] ,DQ2 enable" "Disabled,Enabled" bitfld.long 0x04 1. " [1] ,DQ1 enable" "Disabled,Enabled" bitfld.long 0x04 0. " [0] ,DQ0 enable" "Disabled,Enabled" line.long 0x08 "DX7GCR2,DATX8 7 General Configuration Register 2" bitfld.long 0x08 30.--31. " DXOEMODE[15:14] ,Enable the OE mode for DQ7" "0,1,2,3" bitfld.long 0x08 28.--29. " [13:12] ,Enable the OE mode for DQ6" "0,1,2,3" bitfld.long 0x08 26.--27. " [11:10] ,Enable the OE mode for DQ5" "0,1,2,3" bitfld.long 0x08 24.--25. " [9:8] ,Enable the OE mode for DQ4" "0,1,2,3" textline " " bitfld.long 0x08 22.--23. " [7:6] ,Enable the OE mode for DQ3" "0,1,2,3" bitfld.long 0x08 20.--21. " [5:4] ,Enable the OE mode for DQ2" "0,1,2,3" bitfld.long 0x08 18.--19. " [3:2] ,Enable the OE mode for DQ1" "0,1,2,3" bitfld.long 0x08 16.--17. " [1:0] ,Enable the OE mode for DQ0" "0,1,2,3" textline " " bitfld.long 0x08 14.--15. " DXTEMODE[15:14] ,Enable the TE mode for DQ7" "0,1,2,3" bitfld.long 0x08 12.--13. " [13:12] ,Enable the TE mode for DQ6" "0,1,2,3" bitfld.long 0x08 10.--11. " [11:10] ,Enable the TE mode for DQ5" "0,1,2,3" bitfld.long 0x08 8.--9. " [9:8] ,Enable the TE mode for DQ4" "0,1,2,3" textline " " bitfld.long 0x08 6.--7. " [7:6] ,Enable the TE mode for DQ3" "0,1,2,3" bitfld.long 0x08 4.--5. " [5:4] ,Enable the TE mode for DQ2" "0,1,2,3" bitfld.long 0x08 2.--3. " [3:2] ,Enable the TE mode for DQ1" "0,1,2,3" bitfld.long 0x08 0.--1. " [1:0] ,Enable the TE mode for DQ0" "0,1,2,3" line.long 0x0C "DX7GCR3,DATX8 7 General Configuration Register 3" bitfld.long 0x0C 29. " RDBVT ,Read data BDL VT compensation" "Disabled,Enabled" bitfld.long 0x0C 28. " WDBVT ,Write data BDL VT compensation" "Disabled,Enabled" bitfld.long 0x0C 27. " RGLVT ,Read DQS gating LCDL delay VT compensation" "Disabled,Enabled" bitfld.long 0x0C 26. " RDLVT ,Read DQS LCDL delay VT compensation" "Disabled,Enabled" textline " " bitfld.long 0x0C 25. " WDLVT ,Write DQ LCDL delay VT compensation" "Disabled,Enabled" bitfld.long 0x0C 24. " WLLVT ,Write leveling LCDL delay VT compensation" "Disabled,Enabled" bitfld.long 0x0C 20.--21. " DSNOEMODE ,Enables the OE mode for DQS" "0,1,2,3" bitfld.long 0x0C 18.--19. " DSNTEMODE ,Enables the TE mode for DQS" "0,1,2,3" textline " " bitfld.long 0x0C 16.--17. " DSNPDRMODE ,Enables the PDR mode for DQS" "0,1,2,3" bitfld.long 0x0C 14.--15. " DMOEMODE ,Enables the OE mode values for DM" "0,1,2,3" bitfld.long 0x0C 12.--13. " DMTEMODE ,Enables the TE mode values for DM" "0,1,2,3" bitfld.long 0x0C 10.--11. " DMPDRMODE ,Enables the PDR mode values for DM" "0,1,2,3" textline " " bitfld.long 0x0C 6.--7. " DSOEMODE ,Enables the OE mode values for DQS" "0,1,2,3" bitfld.long 0x0C 4.--5. " DSTEMODE ,Enables the TE mode values for DQS" "0,1,2,3" bitfld.long 0x0C 2.--3. " DSPDRMODE ,Enables the PDR mode values for DQS" "0,1,2,3" line.long 0x10 "DX7GCR4,DATX8 7 General Configuration Register 4" bitfld.long 0x10 28. " DXREFPEN ,Byte lane VREF pad enable" "Disabled,Enabled" bitfld.long 0x10 26.--27. " DXREFEEN ,Byte lane internal VREF enable" "0,1,2,3" bitfld.long 0x10 25. " DXREFSEN ,Byte lane Single-End VREF enable" "Disabled,Enabled" bitfld.long 0x10 23. " DXREFESELRANGE ,External VREF generator REFSEL range select" "0,1" textline " " hexmask.long.byte 0x10 16.--22. 1. " DXREFESEL ,Byte lane external VREF select" bitfld.long 0x10 15. " DXREFSSELRANGE ,Single ended VREF generator REFSEL range select" "0,1" hexmask.long.byte 0x10 8.--14. 1. " DXREFSSEL ,Byte lane Single-End VREF select" bitfld.long 0x10 2.--5. " DXREFIEN ,VREF enable control for DQ IO single ended buffers of a byte lane" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x10 0.--1. " DXREFIMON ,VRMON control for DQ IO single ended buffers of a byte lane" "0,1,2,3" line.long 0x14 "DX7GCR5,DATX8 7 General Configuration Register 5" hexmask.long.byte 0x14 24.--30. 1. " DXREFISELR3 ,Byte lane internal VREF select for rank 3" hexmask.long.byte 0x14 16.--22. 1. " DXREFISELR2 ,Byte lane internal VREF select for rank 2" hexmask.long.byte 0x14 8.--14. 1. " DXREFISELR1 ,Byte lane internal VREF select for rank 1" hexmask.long.byte 0x14 0.--6. 1. " DXREFISELR0 ,Byte lane internal VREF select for rank 0" line.long 0x18 "DX7GCR6,DATX8 7 General Configuration Register 6" bitfld.long 0x18 24.--29. " DXDQVREFR3 ,DRAM DQ VREF select for rank3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x18 16.--21. " DXDQVREFR2 ,DRAM DQ VREF select for rank2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x18 8.--13. " DXDQVREFR1 ,DRAM DQ VREF select for rank1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x18 0.--5. " DXDQVREFR0 ,DRAM DQ VREF select for rank0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long (0xE00+0x40)++0x0B line.long 0x00 "DX7BDLR0,DATX8 7 Bit Delay Line Register 0" bitfld.long 0x00 24.--29. " DQ3WBD ,DQ3 write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 16.--21. " DQ2WBD ,DQ2 write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 8.--13. " DQ1WBD ,DQ1 write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " DQ0WBD ,DQ0 write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "DX7BDLR1,DATX8 7 Bit Delay Line Register 1" bitfld.long 0x04 24.--29. " DQ7WBD ,DQ7 write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 16.--21. " DQ6WBD ,DQ6 write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 8.--13. " DQ5WBD ,DQ5 write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 0.--5. " DQ4WBD ,DQ4 write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x08 "DX7BDLR2,DATX8 7 Bit Delay Line Register 2" bitfld.long 0x08 24.--29. " DSNWBD ,DQSN write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x08 16.--21. " DSOEBD ,DQS/DM/DQ output enable bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x08 8.--13. " DSWBD ,DQS write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x08 0.--5. " DMWBD ,DM write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long (0xE00+0x50)++0x0B line.long 0x00 "DX7BDLR3,DATX8 7 Bit Delay Line Register 3" bitfld.long 0x00 24.--29. " DQ3RBD ,DQ3 read bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 16.--21. " DQ2RBD ,DQ2 read bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 8.--13. " DQ1RBD ,DQ1 read bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " DQ0RBD ,DQ0 read bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "DX7BDLR4,DATX8 7 Bit Delay Line Register 4" bitfld.long 0x04 24.--29. " DQ7RBD ,DQ7 read bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 16.--21. " DQ6RBD ,DQ6 read bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 8.--13. " DQ5RBD ,DQ5 read bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 0.--5. " DQ4RBD ,DQ4 read bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x08 "DX7BDLR5,DATX8 7 Bit Delay Line Register 5" bitfld.long 0x08 0.--5. " DMRBD ,DM read bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long (0xE00+0x60)++0x03 line.long 0x00 "DX7BDLR6,DATX8 7 Bit Delay Line Register 6" bitfld.long 0x00 16.--21. " TERBD ,Termination enable bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 8.--13. " PDRBD ,Power down receiver bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long (0xE00+0x80)++0x17 line.long 0x00 "DX7LCDLR0,DATX8 7 Local Calibrated Delay Line Register 0" hexmask.long.word 0x00 0.--8. 1. " WLD ,Write leveling delay" line.long 0x04 "DX7LCDLR1,DATX8 7 Local Calibrated Delay Line Register 1" hexmask.long.word 0x04 0.--8. 1. " WDQD ,Write data delay" line.long 0x08 "DX7LCDLR2,DATX8 7 Local Calibrated Delay Line Register 2" hexmask.long.word 0x08 0.--8. 1. " DQSGD ,Read DQS gating delay" line.long 0x0C "DX7LCDLR3,DATX8 7 Local Calibrated Delay Line Register 3" hexmask.long.word 0x0C 0.--8. 1. " RDQSD ,Read DQS delay" line.long 0x10 "DX7LCDLR4,DATX8 7 Local Calibrated Delay Line Register 4" hexmask.long.word 0x10 0.--8. 1. " RDQSND ,Read DQSN delay" line.long 0x14 "DX7LCDLR5,DATX8 7 Local Calibrated Delay Line Register 5" hexmask.long.word 0x14 0.--8. 1. " DQSGSD ,DQS gating status delay" group.long (0xE00+0xA0)++0x07 line.long 0x00 "DX7MDLR0,DATX8 7 Master Delay Line Register 0" hexmask.long.word 0x00 16.--24. 1. " TPRD ,Target period" hexmask.long.word 0x00 0.--8. 1. " IPRD ,Initial period" line.long 0x04 "DX7MDLR1,DATX8 7 Master Delay Line Register 1" hexmask.long.word 0x04 0.--8. 1. " MDLD ,MDL delay" group.long (0xE00+0xC0)++0x03 line.long 0x00 "DX7GTR0,DATX8 7 General Timing Register 0" bitfld.long 0x00 24.--26. " WDQSL ,DQ write path latency pipeline" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16.--19. " WLSL ,Write leveling system latency" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--4. " DGSL ,DQS gating system latency" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long (0xE00+0xD0)++0x1F line.long 0x00 "DX7RSR0,DATX8 7 Rank Status Register 0" hexmask.long.word 0x00 0.--15. 1. " QSGERR ,DQS gate training error" line.long 0x04 "DX7RSR1,DATX8 7 Rank Status Register 1" hexmask.long.word 0x04 0.--15. 1. " RDLVLERR ,Read leveling error" line.long 0x08 "DX7RSR2,DATX8 7 Rank Status Register 2" hexmask.long.word 0x08 0.--15. 1. " WLAWN ,Write latency adjustment warning" line.long 0x0C "DX7RSR3,DATX8 7 Rank Status Register 3" hexmask.long.word 0x0C 0.--15. 1. " WLAERR ,Write leveling adjustment error" line.long 0x10 "DX7GSR0,DATX8 7 General Status Register 0" bitfld.long 0x10 30. " WLDQ ,Write leveling DQ status" "0,1" hexmask.long.word 0x10 17.--25. 1. " GDQSPRD ,Read DQS gating period" bitfld.long 0x10 16. " DPLOCK ,DATX8 PLL lock" "Not locked,Locked" hexmask.long.word 0x10 7.--15. 1. " WLPRD ,Write leveling period" textline " " bitfld.long 0x10 6. " WLERR ,Write leveling error" "No error,Error" bitfld.long 0x10 5. " WLDONE ,Write leveling done" "Not done,Done" bitfld.long 0x10 4. " WLCAL ,Write leveling calibration" "Not done,Done" bitfld.long 0x10 3. " GDQSCAL ,Read DQS gating calibration" "Not done,Done" textline " " bitfld.long 0x10 2. " RDQSNCAL ,Read DQS# calibration" "Not done,Done" bitfld.long 0x10 1. " RDQSCAL ,Read DQS calibration" "Not done,Done" bitfld.long 0x10 0. " WDQCAL ,Write DQ calibration" "Not done,Done" line.long 0x14 "DX7GSR1,DATX8 7 General Status Register 1" hexmask.long.tbyte 0x14 1.--24. 1. " DLTCODE ,Delay line test code" bitfld.long 0x14 0. " DLTDONE ,Delay line test done" "Not done,Done" line.long 0x18 "DX7GSR2,DATX8 7 General Status Register 2" hexmask.long.word 0x18 23.--31. 1. " GSDQSPRD ,Read DQS gating status period" bitfld.long 0x18 22. " GSDQSCAL ,Read DQS gating status calibration" "Not done,Done" bitfld.long 0x18 20. " SRDERR ,Static read error" "No error,Error" hexmask.long.byte 0x18 12.--19. 1. " DQS2DQERR ,Write DQS2DQ training error" textline " " bitfld.long 0x18 8.--11. " ESTAT ,Error status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 7. " WEWN ,Write eye centering warning" "Not occurred,Occurred" bitfld.long 0x18 6. " WEERR ,Write eye centering error" "No error,Error" bitfld.long 0x18 5. " REWN ,Read eye centering warning" "Not occurred,Occurred" textline " " bitfld.long 0x18 4. " REERR ,Read eye centering error" "No error,Error" bitfld.long 0x18 3. " WDWN ,Write bit deskew warning" "Not occurred,Occurred" bitfld.long 0x18 2. " WDERR ,Write bit deskew error" "No error,Error" bitfld.long 0x18 1. " RDWN ,Read bit deskew warning" "Not occurred,Occurred" textline " " bitfld.long 0x18 0. " RDERR ,Read bit deskew error" "No error,Error" line.long 0x1C "DX7GSR3,DATX8 7 General Status Register 3" bitfld.long 0x1C 24.--26. " ESTAT ,VREF training error status code" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 20.--23. " DVWRN ,DRAM VREF training warning" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C 16.--19. " DVERR ,DRAM VREF training error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C 12.--15. " HVWRN ,Host VREF training warning" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x1C 8.--11. " HVERR ,Host VREF training error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C 0.--1. " SRDPC ,Static read delay pass count" "0,1,2,3" group.long 0xF00++0x1B line.long 0x00 "DX8GCR0,DATX8 8 General Configuration Register 0" bitfld.long 0x00 31. " CALBYP ,Calibration bypass" "No bypass,Bypass" bitfld.long 0x00 30. " MDLEN ,Master delay line enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " CODTSHFT ,Configurable ODTTE phase shift" "0,1,2,3" bitfld.long 0x00 24.--27. " DQSDCC ,DQS duty cycle correction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 20.--23. " RDDLY ,Number of cycles to generate CTL_DX_GET_STATIC_RD input" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 13. " DQSNSEPDR ,DQSNSE power down receiver" "No,Yes" bitfld.long 0x00 12. " DQSSEPDR ,DQSSE power down receiver" "No,Yes" bitfld.long 0x00 11. " RTTOAL ,RTT on additive latency" "Disabled,Enabled" textline " " bitfld.long 0x00 9.--10. " RTTOH ,RTT output hold" "0,1,2,3" bitfld.long 0x00 7.--8. " CPDRSHFT ,Configurable PDR phase shift" "0,1,2,3" bitfld.long 0x00 6. " DQSRPD ,DQSR power down" "No,Yes" bitfld.long 0x00 5. " DQSGPDR ,DQSG power down receiver" "No,Yes" textline " " bitfld.long 0x00 3. " DQSGODT ,DQSG On-Die termination" "Disabled,Enabled" bitfld.long 0x00 2. " DQSGOE ,DQSG output enable" "Disabled,Enabled" line.long 0x04 "DX8GCR1,DATX8 8 General Configuration Register 1" bitfld.long 0x04 30.--31. " DXPDRMODE[15:14] ,Enable the PDR mode for DQ7" "0,1,2,3" bitfld.long 0x04 28.--29. " [13:12] ,Enable the PDR mode for DQ6" "0,1,2,3" bitfld.long 0x04 26.--27. " [11:10] ,Enable the PDR mode for DQ5" "0,1,2,3" bitfld.long 0x04 24.--25. " [9:8] ,Enable the PDR mode for DQ4" "0,1,2,3" textline " " bitfld.long 0x04 22.--23. " [7:6] ,Enable the PDR mode for DQ3" "0,1,2,3" bitfld.long 0x04 20.--21. " [5:4] ,Enable the PDR mode for DQ2" "0,1,2,3" bitfld.long 0x04 18.--19. " [3:2] ,Enable the PDR mode for DQ1" "0,1,2,3" bitfld.long 0x04 16.--17. " [1:0] ,Enable the PDR mode for DQ0" "0,1,2,3" textline " " bitfld.long 0x04 14. " QSNSEL ,Select the delayed or non-delayed read data strobe #" "Disabled,Enabled" bitfld.long 0x04 13. " QSSEL ,Select the delayed or non-delayed read data strobe" "Disabled,Enabled" bitfld.long 0x04 12. " OEEN ,Enables read data strobe in a byte lane" "Disabled,Enabled" bitfld.long 0x04 11. " PDREN ,Enables PDR in a byte lane" "Disabled,Enabled" textline " " bitfld.long 0x04 10. " TEEN ,Enables ODT/TE in a byte lane" "Disabled,Enabled" bitfld.long 0x04 9. " DSEN ,Enables write data strobe in a byte lane" "Disabled,Enabled" bitfld.long 0x04 8. " DMEN ,Enables DM pin in a byte lane" "Disabled,Enabled" bitfld.long 0x04 7. " DQEN[7] ,DQ7 enable" "Disabled,Enabled" textline " " bitfld.long 0x04 6. " [6] ,DQ6 enable" "Disabled,Enabled" bitfld.long 0x04 5. " [5] ,DQ5 enable" "Disabled,Enabled" bitfld.long 0x04 4. " [4] ,DQ4 enable" "Disabled,Enabled" bitfld.long 0x04 3. " [3] ,DQ3 enable" "Disabled,Enabled" textline " " bitfld.long 0x04 2. " [2] ,DQ2 enable" "Disabled,Enabled" bitfld.long 0x04 1. " [1] ,DQ1 enable" "Disabled,Enabled" bitfld.long 0x04 0. " [0] ,DQ0 enable" "Disabled,Enabled" line.long 0x08 "DX8GCR2,DATX8 8 General Configuration Register 2" bitfld.long 0x08 30.--31. " DXOEMODE[15:14] ,Enable the OE mode for DQ7" "0,1,2,3" bitfld.long 0x08 28.--29. " [13:12] ,Enable the OE mode for DQ6" "0,1,2,3" bitfld.long 0x08 26.--27. " [11:10] ,Enable the OE mode for DQ5" "0,1,2,3" bitfld.long 0x08 24.--25. " [9:8] ,Enable the OE mode for DQ4" "0,1,2,3" textline " " bitfld.long 0x08 22.--23. " [7:6] ,Enable the OE mode for DQ3" "0,1,2,3" bitfld.long 0x08 20.--21. " [5:4] ,Enable the OE mode for DQ2" "0,1,2,3" bitfld.long 0x08 18.--19. " [3:2] ,Enable the OE mode for DQ1" "0,1,2,3" bitfld.long 0x08 16.--17. " [1:0] ,Enable the OE mode for DQ0" "0,1,2,3" textline " " bitfld.long 0x08 14.--15. " DXTEMODE[15:14] ,Enable the TE mode for DQ7" "0,1,2,3" bitfld.long 0x08 12.--13. " [13:12] ,Enable the TE mode for DQ6" "0,1,2,3" bitfld.long 0x08 10.--11. " [11:10] ,Enable the TE mode for DQ5" "0,1,2,3" bitfld.long 0x08 8.--9. " [9:8] ,Enable the TE mode for DQ4" "0,1,2,3" textline " " bitfld.long 0x08 6.--7. " [7:6] ,Enable the TE mode for DQ3" "0,1,2,3" bitfld.long 0x08 4.--5. " [5:4] ,Enable the TE mode for DQ2" "0,1,2,3" bitfld.long 0x08 2.--3. " [3:2] ,Enable the TE mode for DQ1" "0,1,2,3" bitfld.long 0x08 0.--1. " [1:0] ,Enable the TE mode for DQ0" "0,1,2,3" line.long 0x0C "DX8GCR3,DATX8 8 General Configuration Register 3" bitfld.long 0x0C 29. " RDBVT ,Read data BDL VT compensation" "Disabled,Enabled" bitfld.long 0x0C 28. " WDBVT ,Write data BDL VT compensation" "Disabled,Enabled" bitfld.long 0x0C 27. " RGLVT ,Read DQS gating LCDL delay VT compensation" "Disabled,Enabled" bitfld.long 0x0C 26. " RDLVT ,Read DQS LCDL delay VT compensation" "Disabled,Enabled" textline " " bitfld.long 0x0C 25. " WDLVT ,Write DQ LCDL delay VT compensation" "Disabled,Enabled" bitfld.long 0x0C 24. " WLLVT ,Write leveling LCDL delay VT compensation" "Disabled,Enabled" bitfld.long 0x0C 20.--21. " DSNOEMODE ,Enables the OE mode for DQS" "0,1,2,3" bitfld.long 0x0C 18.--19. " DSNTEMODE ,Enables the TE mode for DQS" "0,1,2,3" textline " " bitfld.long 0x0C 16.--17. " DSNPDRMODE ,Enables the PDR mode for DQS" "0,1,2,3" bitfld.long 0x0C 14.--15. " DMOEMODE ,Enables the OE mode values for DM" "0,1,2,3" bitfld.long 0x0C 12.--13. " DMTEMODE ,Enables the TE mode values for DM" "0,1,2,3" bitfld.long 0x0C 10.--11. " DMPDRMODE ,Enables the PDR mode values for DM" "0,1,2,3" textline " " bitfld.long 0x0C 6.--7. " DSOEMODE ,Enables the OE mode values for DQS" "0,1,2,3" bitfld.long 0x0C 4.--5. " DSTEMODE ,Enables the TE mode values for DQS" "0,1,2,3" bitfld.long 0x0C 2.--3. " DSPDRMODE ,Enables the PDR mode values for DQS" "0,1,2,3" line.long 0x10 "DX8GCR4,DATX8 8 General Configuration Register 4" bitfld.long 0x10 28. " DXREFPEN ,Byte lane VREF pad enable" "Disabled,Enabled" bitfld.long 0x10 26.--27. " DXREFEEN ,Byte lane internal VREF enable" "0,1,2,3" bitfld.long 0x10 25. " DXREFSEN ,Byte lane Single-End VREF enable" "Disabled,Enabled" bitfld.long 0x10 23. " DXREFESELRANGE ,External VREF generator REFSEL range select" "0,1" textline " " hexmask.long.byte 0x10 16.--22. 1. " DXREFESEL ,Byte lane external VREF select" bitfld.long 0x10 15. " DXREFSSELRANGE ,Single ended VREF generator REFSEL range select" "0,1" hexmask.long.byte 0x10 8.--14. 1. " DXREFSSEL ,Byte lane Single-End VREF select" bitfld.long 0x10 2.--5. " DXREFIEN ,VREF enable control for DQ IO single ended buffers of a byte lane" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x10 0.--1. " DXREFIMON ,VRMON control for DQ IO single ended buffers of a byte lane" "0,1,2,3" line.long 0x14 "DX8GCR5,DATX8 8 General Configuration Register 5" hexmask.long.byte 0x14 24.--30. 1. " DXREFISELR3 ,Byte lane internal VREF select for rank 3" hexmask.long.byte 0x14 16.--22. 1. " DXREFISELR2 ,Byte lane internal VREF select for rank 2" hexmask.long.byte 0x14 8.--14. 1. " DXREFISELR1 ,Byte lane internal VREF select for rank 1" hexmask.long.byte 0x14 0.--6. 1. " DXREFISELR0 ,Byte lane internal VREF select for rank 0" line.long 0x18 "DX8GCR6,DATX8 8 General Configuration Register 6" bitfld.long 0x18 24.--29. " DXDQVREFR3 ,DRAM DQ VREF select for rank3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x18 16.--21. " DXDQVREFR2 ,DRAM DQ VREF select for rank2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x18 8.--13. " DXDQVREFR1 ,DRAM DQ VREF select for rank1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x18 0.--5. " DXDQVREFR0 ,DRAM DQ VREF select for rank0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long (0xF00+0x40)++0x0B line.long 0x00 "DX8BDLR0,DATX8 8 Bit Delay Line Register 0" bitfld.long 0x00 24.--29. " DQ3WBD ,DQ3 write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 16.--21. " DQ2WBD ,DQ2 write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 8.--13. " DQ1WBD ,DQ1 write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " DQ0WBD ,DQ0 write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "DX8BDLR1,DATX8 8 Bit Delay Line Register 1" bitfld.long 0x04 24.--29. " DQ7WBD ,DQ7 write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 16.--21. " DQ6WBD ,DQ6 write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 8.--13. " DQ5WBD ,DQ5 write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 0.--5. " DQ4WBD ,DQ4 write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x08 "DX8BDLR2,DATX8 8 Bit Delay Line Register 2" bitfld.long 0x08 24.--29. " DSNWBD ,DQSN write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x08 16.--21. " DSOEBD ,DQS/DM/DQ output enable bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x08 8.--13. " DSWBD ,DQS write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x08 0.--5. " DMWBD ,DM write bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long (0xF00+0x50)++0x0B line.long 0x00 "DX8BDLR3,DATX8 8 Bit Delay Line Register 3" bitfld.long 0x00 24.--29. " DQ3RBD ,DQ3 read bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 16.--21. " DQ2RBD ,DQ2 read bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 8.--13. " DQ1RBD ,DQ1 read bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " DQ0RBD ,DQ0 read bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "DX8BDLR4,DATX8 8 Bit Delay Line Register 4" bitfld.long 0x04 24.--29. " DQ7RBD ,DQ7 read bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 16.--21. " DQ6RBD ,DQ6 read bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 8.--13. " DQ5RBD ,DQ5 read bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 0.--5. " DQ4RBD ,DQ4 read bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x08 "DX8BDLR5,DATX8 8 Bit Delay Line Register 5" bitfld.long 0x08 0.--5. " DMRBD ,DM read bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long (0xF00+0x60)++0x03 line.long 0x00 "DX8BDLR6,DATX8 8 Bit Delay Line Register 6" bitfld.long 0x00 16.--21. " TERBD ,Termination enable bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 8.--13. " PDRBD ,Power down receiver bit delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long (0xF00+0x80)++0x17 line.long 0x00 "DX8LCDLR0,DATX8 8 Local Calibrated Delay Line Register 0" hexmask.long.word 0x00 0.--8. 1. " WLD ,Write leveling delay" line.long 0x04 "DX8LCDLR1,DATX8 8 Local Calibrated Delay Line Register 1" hexmask.long.word 0x04 0.--8. 1. " WDQD ,Write data delay" line.long 0x08 "DX8LCDLR2,DATX8 8 Local Calibrated Delay Line Register 2" hexmask.long.word 0x08 0.--8. 1. " DQSGD ,Read DQS gating delay" line.long 0x0C "DX8LCDLR3,DATX8 8 Local Calibrated Delay Line Register 3" hexmask.long.word 0x0C 0.--8. 1. " RDQSD ,Read DQS delay" line.long 0x10 "DX8LCDLR4,DATX8 8 Local Calibrated Delay Line Register 4" hexmask.long.word 0x10 0.--8. 1. " RDQSND ,Read DQSN delay" line.long 0x14 "DX8LCDLR5,DATX8 8 Local Calibrated Delay Line Register 5" hexmask.long.word 0x14 0.--8. 1. " DQSGSD ,DQS gating status delay" group.long (0xF00+0xA0)++0x07 line.long 0x00 "DX8MDLR0,DATX8 8 Master Delay Line Register 0" hexmask.long.word 0x00 16.--24. 1. " TPRD ,Target period" hexmask.long.word 0x00 0.--8. 1. " IPRD ,Initial period" line.long 0x04 "DX8MDLR1,DATX8 8 Master Delay Line Register 1" hexmask.long.word 0x04 0.--8. 1. " MDLD ,MDL delay" group.long (0xF00+0xC0)++0x03 line.long 0x00 "DX8GTR0,DATX8 8 General Timing Register 0" bitfld.long 0x00 24.--26. " WDQSL ,DQ write path latency pipeline" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16.--19. " WLSL ,Write leveling system latency" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--4. " DGSL ,DQS gating system latency" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long (0xF00+0xD0)++0x1F line.long 0x00 "DX8RSR0,DATX8 8 Rank Status Register 0" hexmask.long.word 0x00 0.--15. 1. " QSGERR ,DQS gate training error" line.long 0x04 "DX8RSR1,DATX8 8 Rank Status Register 1" hexmask.long.word 0x04 0.--15. 1. " RDLVLERR ,Read leveling error" line.long 0x08 "DX8RSR2,DATX8 8 Rank Status Register 2" hexmask.long.word 0x08 0.--15. 1. " WLAWN ,Write latency adjustment warning" line.long 0x0C "DX8RSR3,DATX8 8 Rank Status Register 3" hexmask.long.word 0x0C 0.--15. 1. " WLAERR ,Write leveling adjustment error" line.long 0x10 "DX8GSR0,DATX8 8 General Status Register 0" bitfld.long 0x10 30. " WLDQ ,Write leveling DQ status" "0,1" hexmask.long.word 0x10 17.--25. 1. " GDQSPRD ,Read DQS gating period" bitfld.long 0x10 16. " DPLOCK ,DATX8 PLL lock" "Not locked,Locked" hexmask.long.word 0x10 7.--15. 1. " WLPRD ,Write leveling period" textline " " bitfld.long 0x10 6. " WLERR ,Write leveling error" "No error,Error" bitfld.long 0x10 5. " WLDONE ,Write leveling done" "Not done,Done" bitfld.long 0x10 4. " WLCAL ,Write leveling calibration" "Not done,Done" bitfld.long 0x10 3. " GDQSCAL ,Read DQS gating calibration" "Not done,Done" textline " " bitfld.long 0x10 2. " RDQSNCAL ,Read DQS# calibration" "Not done,Done" bitfld.long 0x10 1. " RDQSCAL ,Read DQS calibration" "Not done,Done" bitfld.long 0x10 0. " WDQCAL ,Write DQ calibration" "Not done,Done" line.long 0x14 "DX8GSR1,DATX8 8 General Status Register 1" hexmask.long.tbyte 0x14 1.--24. 1. " DLTCODE ,Delay line test code" bitfld.long 0x14 0. " DLTDONE ,Delay line test done" "Not done,Done" line.long 0x18 "DX8GSR2,DATX8 8 General Status Register 2" hexmask.long.word 0x18 23.--31. 1. " GSDQSPRD ,Read DQS gating status period" bitfld.long 0x18 22. " GSDQSCAL ,Read DQS gating status calibration" "Not done,Done" bitfld.long 0x18 20. " SRDERR ,Static read error" "No error,Error" hexmask.long.byte 0x18 12.--19. 1. " DQS2DQERR ,Write DQS2DQ training error" textline " " bitfld.long 0x18 8.--11. " ESTAT ,Error status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 7. " WEWN ,Write eye centering warning" "Not occurred,Occurred" bitfld.long 0x18 6. " WEERR ,Write eye centering error" "No error,Error" bitfld.long 0x18 5. " REWN ,Read eye centering warning" "Not occurred,Occurred" textline " " bitfld.long 0x18 4. " REERR ,Read eye centering error" "No error,Error" bitfld.long 0x18 3. " WDWN ,Write bit deskew warning" "Not occurred,Occurred" bitfld.long 0x18 2. " WDERR ,Write bit deskew error" "No error,Error" bitfld.long 0x18 1. " RDWN ,Read bit deskew warning" "Not occurred,Occurred" textline " " bitfld.long 0x18 0. " RDERR ,Read bit deskew error" "No error,Error" line.long 0x1C "DX8GSR3,DATX8 8 General Status Register 3" bitfld.long 0x1C 24.--26. " ESTAT ,VREF training error status code" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 20.--23. " DVWRN ,DRAM VREF training warning" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C 16.--19. " DVERR ,DRAM VREF training error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C 12.--15. " HVWRN ,Host VREF training warning" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x1C 8.--11. " HVERR ,Host VREF training error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C 0.--1. " SRDPC ,Static read delay pass count" "0,1,2,3" textline " " group.long 0x1400++0x1F line.long 0x00 "DX8SL0OSC,DATX8 0-1 Oscillator Register" bitfld.long 0x00 28.--29. " GATEDXRDCLK ,Enable clock gating for DX DDR_CLK" "0,1,2,3" bitfld.long 0x00 26.--27. " GATEDXDDRCLK ,Enable clock gating for DX CTL_RD_CLK" "0,1,2,3" bitfld.long 0x00 24.--25. " GATEDXCTLCLK ,Enable clock gating for DX CTL_CLK" "0,1,2,3" bitfld.long 0x00 22.--23. " CLKLEVEL ,Selects the level to which clocks will be stalled when clock gating is enabled" "0,1,2,3" textline " " bitfld.long 0x00 21. " LBMODE ,Loopback mode" "Disabled,Enabled" eventfld.long 0x00 20. " LBGSDQS ,Load GSDQS LCDL with 2x the calibrated GSDQSPRD value" "Not loaded,Loaded" bitfld.long 0x00 18.--19. " LBGDQS ,Loopback DQS gating" "0,1,2,3" bitfld.long 0x00 17. " LBDQSS ,Loopback DQS shift" "Not shifted,Shifted" textline " " bitfld.long 0x00 16. " PHYHRST ,PHY High-Speed reset" "No reset,Reset" bitfld.long 0x00 15. " PHYFRST ,PHY FIFO reset" "No reset,Reset" bitfld.long 0x00 14. " DLTST ,Delay line test start" "Not started,Started" bitfld.long 0x00 13. " DLTMODE ,Delay line test mode" "Disabled,Enabled" textline " " bitfld.long 0x00 9.--10. " OSCWDDL ,Oscillator mode Write-Data delay line select" "0,1,2,3" bitfld.long 0x00 5.--6. " OSCWDL ,Oscillator mode Write-Leveling delay line select" "0,1,2,3" bitfld.long 0x00 1.--4. " OSCDIV ,Oscillator mode division" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0. " OSCEN ,Oscillator enable" "Disabled,Enabled" line.long 0x04 "DX8SL0PLLCR0,DAXT8 0-1 PLL Control Register 0" bitfld.long 0x04 31. " PLLBYP ,PLL bypass" "No bypass,Bypass" bitfld.long 0x04 30. " PLLRST ,PLL reset" "No reset,Reset" bitfld.long 0x04 29. " PLLPD ,PLL power down" "No,Yes" bitfld.long 0x04 28. " RSTOPM ,Reference stop mode" "0,1" textline " " bitfld.long 0x04 24.--27. " FRQSEL ,PLL frequency select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 23. " RLOCKM ,Relock mode" "Disabled,Enabled" bitfld.long 0x04 17.--22. " CPPC ,Charge pump proportional current control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 13.--16. " CPIC ,Charge pump integrating current control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 12. " GSHIFT ,Gear shift" "0,1" bitfld.long 0x04 8. " ATOEN ,Analog test enable ATOEN" "Disabled,Enabled" bitfld.long 0x04 4.--7. " ATC ,Analog test control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. " DTC ,Digital test control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "DX8SL0PLLCR1,DAXT8 0-1 PLL Control Register 1" hexmask.long.word 0x08 6.--21. 1. " PLLPROG ,Connects to the PLL PLL_PROG bus" bitfld.long 0x08 5. " BYPVREGCP ,Bypass PLL VREG_CP" "No bypass,Bypass" bitfld.long 0x08 4. " BYPVREGDIG ,Bypass PLL VREG_DIG" "No bypass,Bypass" bitfld.long 0x08 3. " BYPVDD ,PLL VDD voltage level control" "0,1" textline " " bitfld.long 0x08 2. " LOCKPS ,Lock detector phase select" "0,1" bitfld.long 0x08 1. " LOCKCS ,Lock detector counter select" "0,1" bitfld.long 0x08 0. " LOCKDS ,Lock detector select" "0,1" line.long 0x0C "DX8SL0PLLCR2,DAXT8 0-1 PLL Control Register 2" line.long 0x10 "DX8SL0PLLCR3,DAXT8 0-1 PLL Control Register 3" line.long 0x14 "DX8SL0PLLCR4,DAXT8 0-1 PLL Control Register 4" line.long 0x18 "DX8SL0PLLCR5,DAXT8 0-1 PLL Control Register 5" hexmask.long.byte 0x18 0.--7. 1. " PLLCTRL_103_96 ,Connectes to bits [103:96] of the PLL generatl control bus PLL_CTRL" line.long 0x1C "DX8SL0DQSCTL,DATX8 0-1 DQS Control Register" bitfld.long 0x1C 24. " RRRMODE ,Read path Rise-to-Rise mode" "0,1" bitfld.long 0x1C 21. " WRRMODE ,Write path Rise-to-Rise mode" "0,1" bitfld.long 0x1C 19.--20. " DQSGX ,DQS gate extension" "0,1,2,3" bitfld.long 0x1C 18. " LPPLLPD ,Low power PLL power down" "No,Yes" textline " " bitfld.long 0x1C 17. " LPIOPD ,Low power I/O power down" "No,Yes" bitfld.long 0x1C 14. " QSCNTEN ,QS counter enable" "Disabled,Enabled" bitfld.long 0x1C 13. " UDQIOM ,Unused DQ I/O mode" "0,1" bitfld.long 0x1C 8.--9. " DXSR ,Data slew rate" "0,1,2,3" textline " " bitfld.long 0x1C 4.--7. " DQSNRES ,DQS_N resistor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C 0.--3. " DQSRES ,DQS resistor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long (0x1400+0x24)++0x1F line.long 0x00 "DX8SL0DDLCTL,DATX8 0-1 DDL Control Register" bitfld.long 0x00 26. " DLYLDTM ,Delay load timing" "0,1" bitfld.long 0x00 25. " DXDDLLDT ,DX DDL load type" "0,1" bitfld.long 0x00 18.--22. " DXDDLLD ,DATX8 DDL delay select dymainc load" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x00 2.--17. 1. " DXDDLBYP ,DATX8 DDL bypass" textline " " bitfld.long 0x00 0.--1. " DDLBYPMODE ,Controls DDL bypass mode" "0,1,2,3" line.long 0x04 "DX8SL0DXCTL1,DATX8 0-1 DX Control Register 1" bitfld.long 0x04 24. " DXCALCLK ,DATX calibration clock select" "0,1" bitfld.long 0x04 23. " DXRCLKMD ,DATX8 read clock mode" "0,1" bitfld.long 0x04 20.--21. " DXDTOSEL ,DATX8 digital test output select" "0,1,2,3" bitfld.long 0x04 19. " DXGSMD ,Read DQS gating status mode" "0,1" textline " " bitfld.long 0x04 18. " DXQSDBYP ,Read DQS/DQS_N delay load bypass mode" "0,1" bitfld.long 0x04 17. " DXGDBYP ,Read DQS gate delay load bypass mode" "0,1" bitfld.long 0x04 16. " DXTMODE ,DATX8 test mode" "0,1" line.long 0x08 "DX8SL0DXCTL2,DATX8 0-1 DX Control Register 2" bitfld.long 0x08 23. " CRDEN ,Configurable read data enable" "Disabled,Enabled" bitfld.long 0x08 20.--22. " POSOEX ,OX extension during Post-amble" "0,1,2,3,4,5,6,7" bitfld.long 0x08 18.--19. " PREOEX ,OE extension during Pre-amble" "0,1,2,3" bitfld.long 0x08 16. " IOAG ,I/O assisted gate select" "0,1" textline " " bitfld.long 0x08 15. " IOLB ,I/O loopback select" "0,1" bitfld.long 0x08 9.--12. " LPWAKEUP_THRSH ,Low power wakeup threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 8. " RDBI ,Read data bus inversion enable" "Disabled,Enabled" bitfld.long 0x08 7. " WDBI ,Write data bus inversion enable" "Disabled,Enabled" textline " " bitfld.long 0x08 6. " PRFBYP ,PUB read FIFO bypass" "No bypass,Bypass" bitfld.long 0x08 4.--5. " RDMODE ,DATX8 receive FIFO read mode" "0,1,2,3" bitfld.long 0x08 3. " DISRST ,Disables the read FIFO reset" "No reset,Reset" bitfld.long 0x08 1.--2. " DQSGLB ,Read DQS gate I/O loopback" "0,1,2,3" line.long 0x0C "DX8SL0IOCR,DATX8 0-1 I/O Configuration Register" bitfld.long 0x0C 28.--30. " DXDACRANGE ,PVREF_DAC REFSEL range select" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 25.--27. " DXVREFIOM ,IOM bits for PVREF, PVREF_DAC and PVREFE cells in DX IO ring" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 22.--24. " DXIOM ,DX IO mode" "0,1,2,3,4,5,6,7" hexmask.long.word 0x0C 11.--21. 1. " DXTXM ,DX IO transmitter mode" textline " " hexmask.long.word 0x0C 0.--10. 1. " DXRXM ,DX IO receiver mode" group.long 0x1440++0x1F line.long 0x00 "DX8SL1OSC,DATX8 0-1 Oscillator Register" bitfld.long 0x00 28.--29. " GATEDXRDCLK ,Enable clock gating for DX DDR_CLK" "0,1,2,3" bitfld.long 0x00 26.--27. " GATEDXDDRCLK ,Enable clock gating for DX CTL_RD_CLK" "0,1,2,3" bitfld.long 0x00 24.--25. " GATEDXCTLCLK ,Enable clock gating for DX CTL_CLK" "0,1,2,3" bitfld.long 0x00 22.--23. " CLKLEVEL ,Selects the level to which clocks will be stalled when clock gating is enabled" "0,1,2,3" textline " " bitfld.long 0x00 21. " LBMODE ,Loopback mode" "Disabled,Enabled" eventfld.long 0x00 20. " LBGSDQS ,Load GSDQS LCDL with 2x the calibrated GSDQSPRD value" "Not loaded,Loaded" bitfld.long 0x00 18.--19. " LBGDQS ,Loopback DQS gating" "0,1,2,3" bitfld.long 0x00 17. " LBDQSS ,Loopback DQS shift" "Not shifted,Shifted" textline " " bitfld.long 0x00 16. " PHYHRST ,PHY High-Speed reset" "No reset,Reset" bitfld.long 0x00 15. " PHYFRST ,PHY FIFO reset" "No reset,Reset" bitfld.long 0x00 14. " DLTST ,Delay line test start" "Not started,Started" bitfld.long 0x00 13. " DLTMODE ,Delay line test mode" "Disabled,Enabled" textline " " bitfld.long 0x00 9.--10. " OSCWDDL ,Oscillator mode Write-Data delay line select" "0,1,2,3" bitfld.long 0x00 5.--6. " OSCWDL ,Oscillator mode Write-Leveling delay line select" "0,1,2,3" bitfld.long 0x00 1.--4. " OSCDIV ,Oscillator mode division" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0. " OSCEN ,Oscillator enable" "Disabled,Enabled" line.long 0x04 "DX8SL1PLLCR0,DAXT8 0-1 PLL Control Register 0" bitfld.long 0x04 31. " PLLBYP ,PLL bypass" "No bypass,Bypass" bitfld.long 0x04 30. " PLLRST ,PLL reset" "No reset,Reset" bitfld.long 0x04 29. " PLLPD ,PLL power down" "No,Yes" bitfld.long 0x04 28. " RSTOPM ,Reference stop mode" "0,1" textline " " bitfld.long 0x04 24.--27. " FRQSEL ,PLL frequency select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 23. " RLOCKM ,Relock mode" "Disabled,Enabled" bitfld.long 0x04 17.--22. " CPPC ,Charge pump proportional current control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 13.--16. " CPIC ,Charge pump integrating current control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 12. " GSHIFT ,Gear shift" "0,1" bitfld.long 0x04 8. " ATOEN ,Analog test enable ATOEN" "Disabled,Enabled" bitfld.long 0x04 4.--7. " ATC ,Analog test control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. " DTC ,Digital test control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "DX8SL1PLLCR1,DAXT8 0-1 PLL Control Register 1" hexmask.long.word 0x08 6.--21. 1. " PLLPROG ,Connects to the PLL PLL_PROG bus" bitfld.long 0x08 5. " BYPVREGCP ,Bypass PLL VREG_CP" "No bypass,Bypass" bitfld.long 0x08 4. " BYPVREGDIG ,Bypass PLL VREG_DIG" "No bypass,Bypass" bitfld.long 0x08 3. " BYPVDD ,PLL VDD voltage level control" "0,1" textline " " bitfld.long 0x08 2. " LOCKPS ,Lock detector phase select" "0,1" bitfld.long 0x08 1. " LOCKCS ,Lock detector counter select" "0,1" bitfld.long 0x08 0. " LOCKDS ,Lock detector select" "0,1" line.long 0x0C "DX8SL1PLLCR2,DAXT8 0-1 PLL Control Register 2" line.long 0x10 "DX8SL1PLLCR3,DAXT8 0-1 PLL Control Register 3" line.long 0x14 "DX8SL1PLLCR4,DAXT8 0-1 PLL Control Register 4" line.long 0x18 "DX8SL1PLLCR5,DAXT8 0-1 PLL Control Register 5" hexmask.long.byte 0x18 0.--7. 1. " PLLCTRL_103_96 ,Connectes to bits [103:96] of the PLL generatl control bus PLL_CTRL" line.long 0x1C "DX8SL1DQSCTL,DATX8 0-1 DQS Control Register" bitfld.long 0x1C 24. " RRRMODE ,Read path Rise-to-Rise mode" "0,1" bitfld.long 0x1C 21. " WRRMODE ,Write path Rise-to-Rise mode" "0,1" bitfld.long 0x1C 19.--20. " DQSGX ,DQS gate extension" "0,1,2,3" bitfld.long 0x1C 18. " LPPLLPD ,Low power PLL power down" "No,Yes" textline " " bitfld.long 0x1C 17. " LPIOPD ,Low power I/O power down" "No,Yes" bitfld.long 0x1C 14. " QSCNTEN ,QS counter enable" "Disabled,Enabled" bitfld.long 0x1C 13. " UDQIOM ,Unused DQ I/O mode" "0,1" bitfld.long 0x1C 8.--9. " DXSR ,Data slew rate" "0,1,2,3" textline " " bitfld.long 0x1C 4.--7. " DQSNRES ,DQS_N resistor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C 0.--3. " DQSRES ,DQS resistor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long (0x1440+0x24)++0x1F line.long 0x00 "DX8SL1DDLCTL,DATX8 0-1 DDL Control Register" bitfld.long 0x00 26. " DLYLDTM ,Delay load timing" "0,1" bitfld.long 0x00 25. " DXDDLLDT ,DX DDL load type" "0,1" bitfld.long 0x00 18.--22. " DXDDLLD ,DATX8 DDL delay select dymainc load" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x00 2.--17. 1. " DXDDLBYP ,DATX8 DDL bypass" textline " " bitfld.long 0x00 0.--1. " DDLBYPMODE ,Controls DDL bypass mode" "0,1,2,3" line.long 0x04 "DX8SL1DXCTL1,DATX8 0-1 DX Control Register 1" bitfld.long 0x04 24. " DXCALCLK ,DATX calibration clock select" "0,1" bitfld.long 0x04 23. " DXRCLKMD ,DATX8 read clock mode" "0,1" bitfld.long 0x04 20.--21. " DXDTOSEL ,DATX8 digital test output select" "0,1,2,3" bitfld.long 0x04 19. " DXGSMD ,Read DQS gating status mode" "0,1" textline " " bitfld.long 0x04 18. " DXQSDBYP ,Read DQS/DQS_N delay load bypass mode" "0,1" bitfld.long 0x04 17. " DXGDBYP ,Read DQS gate delay load bypass mode" "0,1" bitfld.long 0x04 16. " DXTMODE ,DATX8 test mode" "0,1" line.long 0x08 "DX8SL1DXCTL2,DATX8 0-1 DX Control Register 2" bitfld.long 0x08 23. " CRDEN ,Configurable read data enable" "Disabled,Enabled" bitfld.long 0x08 20.--22. " POSOEX ,OX extension during Post-amble" "0,1,2,3,4,5,6,7" bitfld.long 0x08 18.--19. " PREOEX ,OE extension during Pre-amble" "0,1,2,3" bitfld.long 0x08 16. " IOAG ,I/O assisted gate select" "0,1" textline " " bitfld.long 0x08 15. " IOLB ,I/O loopback select" "0,1" bitfld.long 0x08 9.--12. " LPWAKEUP_THRSH ,Low power wakeup threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 8. " RDBI ,Read data bus inversion enable" "Disabled,Enabled" bitfld.long 0x08 7. " WDBI ,Write data bus inversion enable" "Disabled,Enabled" textline " " bitfld.long 0x08 6. " PRFBYP ,PUB read FIFO bypass" "No bypass,Bypass" bitfld.long 0x08 4.--5. " RDMODE ,DATX8 receive FIFO read mode" "0,1,2,3" bitfld.long 0x08 3. " DISRST ,Disables the read FIFO reset" "No reset,Reset" bitfld.long 0x08 1.--2. " DQSGLB ,Read DQS gate I/O loopback" "0,1,2,3" line.long 0x0C "DX8SL1IOCR,DATX8 0-1 I/O Configuration Register" bitfld.long 0x0C 28.--30. " DXDACRANGE ,PVREF_DAC REFSEL range select" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 25.--27. " DXVREFIOM ,IOM bits for PVREF, PVREF_DAC and PVREFE cells in DX IO ring" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 22.--24. " DXIOM ,DX IO mode" "0,1,2,3,4,5,6,7" hexmask.long.word 0x0C 11.--21. 1. " DXTXM ,DX IO transmitter mode" textline " " hexmask.long.word 0x0C 0.--10. 1. " DXRXM ,DX IO receiver mode" group.long 0x1480++0x1F line.long 0x00 "DX8SL2OSC,DATX8 0-1 Oscillator Register" bitfld.long 0x00 28.--29. " GATEDXRDCLK ,Enable clock gating for DX DDR_CLK" "0,1,2,3" bitfld.long 0x00 26.--27. " GATEDXDDRCLK ,Enable clock gating for DX CTL_RD_CLK" "0,1,2,3" bitfld.long 0x00 24.--25. " GATEDXCTLCLK ,Enable clock gating for DX CTL_CLK" "0,1,2,3" bitfld.long 0x00 22.--23. " CLKLEVEL ,Selects the level to which clocks will be stalled when clock gating is enabled" "0,1,2,3" textline " " bitfld.long 0x00 21. " LBMODE ,Loopback mode" "Disabled,Enabled" eventfld.long 0x00 20. " LBGSDQS ,Load GSDQS LCDL with 2x the calibrated GSDQSPRD value" "Not loaded,Loaded" bitfld.long 0x00 18.--19. " LBGDQS ,Loopback DQS gating" "0,1,2,3" bitfld.long 0x00 17. " LBDQSS ,Loopback DQS shift" "Not shifted,Shifted" textline " " bitfld.long 0x00 16. " PHYHRST ,PHY High-Speed reset" "No reset,Reset" bitfld.long 0x00 15. " PHYFRST ,PHY FIFO reset" "No reset,Reset" bitfld.long 0x00 14. " DLTST ,Delay line test start" "Not started,Started" bitfld.long 0x00 13. " DLTMODE ,Delay line test mode" "Disabled,Enabled" textline " " bitfld.long 0x00 9.--10. " OSCWDDL ,Oscillator mode Write-Data delay line select" "0,1,2,3" bitfld.long 0x00 5.--6. " OSCWDL ,Oscillator mode Write-Leveling delay line select" "0,1,2,3" bitfld.long 0x00 1.--4. " OSCDIV ,Oscillator mode division" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0. " OSCEN ,Oscillator enable" "Disabled,Enabled" line.long 0x04 "DX8SL2PLLCR0,DAXT8 0-1 PLL Control Register 0" bitfld.long 0x04 31. " PLLBYP ,PLL bypass" "No bypass,Bypass" bitfld.long 0x04 30. " PLLRST ,PLL reset" "No reset,Reset" bitfld.long 0x04 29. " PLLPD ,PLL power down" "No,Yes" bitfld.long 0x04 28. " RSTOPM ,Reference stop mode" "0,1" textline " " bitfld.long 0x04 24.--27. " FRQSEL ,PLL frequency select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 23. " RLOCKM ,Relock mode" "Disabled,Enabled" bitfld.long 0x04 17.--22. " CPPC ,Charge pump proportional current control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 13.--16. " CPIC ,Charge pump integrating current control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 12. " GSHIFT ,Gear shift" "0,1" bitfld.long 0x04 8. " ATOEN ,Analog test enable ATOEN" "Disabled,Enabled" bitfld.long 0x04 4.--7. " ATC ,Analog test control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. " DTC ,Digital test control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "DX8SL2PLLCR1,DAXT8 0-1 PLL Control Register 1" hexmask.long.word 0x08 6.--21. 1. " PLLPROG ,Connects to the PLL PLL_PROG bus" bitfld.long 0x08 5. " BYPVREGCP ,Bypass PLL VREG_CP" "No bypass,Bypass" bitfld.long 0x08 4. " BYPVREGDIG ,Bypass PLL VREG_DIG" "No bypass,Bypass" bitfld.long 0x08 3. " BYPVDD ,PLL VDD voltage level control" "0,1" textline " " bitfld.long 0x08 2. " LOCKPS ,Lock detector phase select" "0,1" bitfld.long 0x08 1. " LOCKCS ,Lock detector counter select" "0,1" bitfld.long 0x08 0. " LOCKDS ,Lock detector select" "0,1" line.long 0x0C "DX8SL2PLLCR2,DAXT8 0-1 PLL Control Register 2" line.long 0x10 "DX8SL2PLLCR3,DAXT8 0-1 PLL Control Register 3" line.long 0x14 "DX8SL2PLLCR4,DAXT8 0-1 PLL Control Register 4" line.long 0x18 "DX8SL2PLLCR5,DAXT8 0-1 PLL Control Register 5" hexmask.long.byte 0x18 0.--7. 1. " PLLCTRL_103_96 ,Connectes to bits [103:96] of the PLL generatl control bus PLL_CTRL" line.long 0x1C "DX8SL2DQSCTL,DATX8 0-1 DQS Control Register" bitfld.long 0x1C 24. " RRRMODE ,Read path Rise-to-Rise mode" "0,1" bitfld.long 0x1C 21. " WRRMODE ,Write path Rise-to-Rise mode" "0,1" bitfld.long 0x1C 19.--20. " DQSGX ,DQS gate extension" "0,1,2,3" bitfld.long 0x1C 18. " LPPLLPD ,Low power PLL power down" "No,Yes" textline " " bitfld.long 0x1C 17. " LPIOPD ,Low power I/O power down" "No,Yes" bitfld.long 0x1C 14. " QSCNTEN ,QS counter enable" "Disabled,Enabled" bitfld.long 0x1C 13. " UDQIOM ,Unused DQ I/O mode" "0,1" bitfld.long 0x1C 8.--9. " DXSR ,Data slew rate" "0,1,2,3" textline " " bitfld.long 0x1C 4.--7. " DQSNRES ,DQS_N resistor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C 0.--3. " DQSRES ,DQS resistor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long (0x1480+0x24)++0x1F line.long 0x00 "DX8SL2DDLCTL,DATX8 0-1 DDL Control Register" bitfld.long 0x00 26. " DLYLDTM ,Delay load timing" "0,1" bitfld.long 0x00 25. " DXDDLLDT ,DX DDL load type" "0,1" bitfld.long 0x00 18.--22. " DXDDLLD ,DATX8 DDL delay select dymainc load" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x00 2.--17. 1. " DXDDLBYP ,DATX8 DDL bypass" textline " " bitfld.long 0x00 0.--1. " DDLBYPMODE ,Controls DDL bypass mode" "0,1,2,3" line.long 0x04 "DX8SL2DXCTL1,DATX8 0-1 DX Control Register 1" bitfld.long 0x04 24. " DXCALCLK ,DATX calibration clock select" "0,1" bitfld.long 0x04 23. " DXRCLKMD ,DATX8 read clock mode" "0,1" bitfld.long 0x04 20.--21. " DXDTOSEL ,DATX8 digital test output select" "0,1,2,3" bitfld.long 0x04 19. " DXGSMD ,Read DQS gating status mode" "0,1" textline " " bitfld.long 0x04 18. " DXQSDBYP ,Read DQS/DQS_N delay load bypass mode" "0,1" bitfld.long 0x04 17. " DXGDBYP ,Read DQS gate delay load bypass mode" "0,1" bitfld.long 0x04 16. " DXTMODE ,DATX8 test mode" "0,1" line.long 0x08 "DX8SL2DXCTL2,DATX8 0-1 DX Control Register 2" bitfld.long 0x08 23. " CRDEN ,Configurable read data enable" "Disabled,Enabled" bitfld.long 0x08 20.--22. " POSOEX ,OX extension during Post-amble" "0,1,2,3,4,5,6,7" bitfld.long 0x08 18.--19. " PREOEX ,OE extension during Pre-amble" "0,1,2,3" bitfld.long 0x08 16. " IOAG ,I/O assisted gate select" "0,1" textline " " bitfld.long 0x08 15. " IOLB ,I/O loopback select" "0,1" bitfld.long 0x08 9.--12. " LPWAKEUP_THRSH ,Low power wakeup threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 8. " RDBI ,Read data bus inversion enable" "Disabled,Enabled" bitfld.long 0x08 7. " WDBI ,Write data bus inversion enable" "Disabled,Enabled" textline " " bitfld.long 0x08 6. " PRFBYP ,PUB read FIFO bypass" "No bypass,Bypass" bitfld.long 0x08 4.--5. " RDMODE ,DATX8 receive FIFO read mode" "0,1,2,3" bitfld.long 0x08 3. " DISRST ,Disables the read FIFO reset" "No reset,Reset" bitfld.long 0x08 1.--2. " DQSGLB ,Read DQS gate I/O loopback" "0,1,2,3" line.long 0x0C "DX8SL2IOCR,DATX8 0-1 I/O Configuration Register" bitfld.long 0x0C 28.--30. " DXDACRANGE ,PVREF_DAC REFSEL range select" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 25.--27. " DXVREFIOM ,IOM bits for PVREF, PVREF_DAC and PVREFE cells in DX IO ring" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 22.--24. " DXIOM ,DX IO mode" "0,1,2,3,4,5,6,7" hexmask.long.word 0x0C 11.--21. 1. " DXTXM ,DX IO transmitter mode" textline " " hexmask.long.word 0x0C 0.--10. 1. " DXRXM ,DX IO receiver mode" group.long 0x14C0++0x1F line.long 0x00 "DX8SL3OSC,DATX8 0-1 Oscillator Register" bitfld.long 0x00 28.--29. " GATEDXRDCLK ,Enable clock gating for DX DDR_CLK" "0,1,2,3" bitfld.long 0x00 26.--27. " GATEDXDDRCLK ,Enable clock gating for DX CTL_RD_CLK" "0,1,2,3" bitfld.long 0x00 24.--25. " GATEDXCTLCLK ,Enable clock gating for DX CTL_CLK" "0,1,2,3" bitfld.long 0x00 22.--23. " CLKLEVEL ,Selects the level to which clocks will be stalled when clock gating is enabled" "0,1,2,3" textline " " bitfld.long 0x00 21. " LBMODE ,Loopback mode" "Disabled,Enabled" eventfld.long 0x00 20. " LBGSDQS ,Load GSDQS LCDL with 2x the calibrated GSDQSPRD value" "Not loaded,Loaded" bitfld.long 0x00 18.--19. " LBGDQS ,Loopback DQS gating" "0,1,2,3" bitfld.long 0x00 17. " LBDQSS ,Loopback DQS shift" "Not shifted,Shifted" textline " " bitfld.long 0x00 16. " PHYHRST ,PHY High-Speed reset" "No reset,Reset" bitfld.long 0x00 15. " PHYFRST ,PHY FIFO reset" "No reset,Reset" bitfld.long 0x00 14. " DLTST ,Delay line test start" "Not started,Started" bitfld.long 0x00 13. " DLTMODE ,Delay line test mode" "Disabled,Enabled" textline " " bitfld.long 0x00 9.--10. " OSCWDDL ,Oscillator mode Write-Data delay line select" "0,1,2,3" bitfld.long 0x00 5.--6. " OSCWDL ,Oscillator mode Write-Leveling delay line select" "0,1,2,3" bitfld.long 0x00 1.--4. " OSCDIV ,Oscillator mode division" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0. " OSCEN ,Oscillator enable" "Disabled,Enabled" line.long 0x04 "DX8SL3PLLCR0,DAXT8 0-1 PLL Control Register 0" bitfld.long 0x04 31. " PLLBYP ,PLL bypass" "No bypass,Bypass" bitfld.long 0x04 30. " PLLRST ,PLL reset" "No reset,Reset" bitfld.long 0x04 29. " PLLPD ,PLL power down" "No,Yes" bitfld.long 0x04 28. " RSTOPM ,Reference stop mode" "0,1" textline " " bitfld.long 0x04 24.--27. " FRQSEL ,PLL frequency select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 23. " RLOCKM ,Relock mode" "Disabled,Enabled" bitfld.long 0x04 17.--22. " CPPC ,Charge pump proportional current control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 13.--16. " CPIC ,Charge pump integrating current control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 12. " GSHIFT ,Gear shift" "0,1" bitfld.long 0x04 8. " ATOEN ,Analog test enable ATOEN" "Disabled,Enabled" bitfld.long 0x04 4.--7. " ATC ,Analog test control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. " DTC ,Digital test control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "DX8SL3PLLCR1,DAXT8 0-1 PLL Control Register 1" hexmask.long.word 0x08 6.--21. 1. " PLLPROG ,Connects to the PLL PLL_PROG bus" bitfld.long 0x08 5. " BYPVREGCP ,Bypass PLL VREG_CP" "No bypass,Bypass" bitfld.long 0x08 4. " BYPVREGDIG ,Bypass PLL VREG_DIG" "No bypass,Bypass" bitfld.long 0x08 3. " BYPVDD ,PLL VDD voltage level control" "0,1" textline " " bitfld.long 0x08 2. " LOCKPS ,Lock detector phase select" "0,1" bitfld.long 0x08 1. " LOCKCS ,Lock detector counter select" "0,1" bitfld.long 0x08 0. " LOCKDS ,Lock detector select" "0,1" line.long 0x0C "DX8SL3PLLCR2,DAXT8 0-1 PLL Control Register 2" line.long 0x10 "DX8SL3PLLCR3,DAXT8 0-1 PLL Control Register 3" line.long 0x14 "DX8SL3PLLCR4,DAXT8 0-1 PLL Control Register 4" line.long 0x18 "DX8SL3PLLCR5,DAXT8 0-1 PLL Control Register 5" hexmask.long.byte 0x18 0.--7. 1. " PLLCTRL_103_96 ,Connectes to bits [103:96] of the PLL generatl control bus PLL_CTRL" line.long 0x1C "DX8SL3DQSCTL,DATX8 0-1 DQS Control Register" bitfld.long 0x1C 24. " RRRMODE ,Read path Rise-to-Rise mode" "0,1" bitfld.long 0x1C 21. " WRRMODE ,Write path Rise-to-Rise mode" "0,1" bitfld.long 0x1C 19.--20. " DQSGX ,DQS gate extension" "0,1,2,3" bitfld.long 0x1C 18. " LPPLLPD ,Low power PLL power down" "No,Yes" textline " " bitfld.long 0x1C 17. " LPIOPD ,Low power I/O power down" "No,Yes" bitfld.long 0x1C 14. " QSCNTEN ,QS counter enable" "Disabled,Enabled" bitfld.long 0x1C 13. " UDQIOM ,Unused DQ I/O mode" "0,1" bitfld.long 0x1C 8.--9. " DXSR ,Data slew rate" "0,1,2,3" textline " " bitfld.long 0x1C 4.--7. " DQSNRES ,DQS_N resistor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C 0.--3. " DQSRES ,DQS resistor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long (0x14C0+0x24)++0x1F line.long 0x00 "DX8SL3DDLCTL,DATX8 0-1 DDL Control Register" bitfld.long 0x00 26. " DLYLDTM ,Delay load timing" "0,1" bitfld.long 0x00 25. " DXDDLLDT ,DX DDL load type" "0,1" bitfld.long 0x00 18.--22. " DXDDLLD ,DATX8 DDL delay select dymainc load" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x00 2.--17. 1. " DXDDLBYP ,DATX8 DDL bypass" textline " " bitfld.long 0x00 0.--1. " DDLBYPMODE ,Controls DDL bypass mode" "0,1,2,3" line.long 0x04 "DX8SL3DXCTL1,DATX8 0-1 DX Control Register 1" bitfld.long 0x04 24. " DXCALCLK ,DATX calibration clock select" "0,1" bitfld.long 0x04 23. " DXRCLKMD ,DATX8 read clock mode" "0,1" bitfld.long 0x04 20.--21. " DXDTOSEL ,DATX8 digital test output select" "0,1,2,3" bitfld.long 0x04 19. " DXGSMD ,Read DQS gating status mode" "0,1" textline " " bitfld.long 0x04 18. " DXQSDBYP ,Read DQS/DQS_N delay load bypass mode" "0,1" bitfld.long 0x04 17. " DXGDBYP ,Read DQS gate delay load bypass mode" "0,1" bitfld.long 0x04 16. " DXTMODE ,DATX8 test mode" "0,1" line.long 0x08 "DX8SL3DXCTL2,DATX8 0-1 DX Control Register 2" bitfld.long 0x08 23. " CRDEN ,Configurable read data enable" "Disabled,Enabled" bitfld.long 0x08 20.--22. " POSOEX ,OX extension during Post-amble" "0,1,2,3,4,5,6,7" bitfld.long 0x08 18.--19. " PREOEX ,OE extension during Pre-amble" "0,1,2,3" bitfld.long 0x08 16. " IOAG ,I/O assisted gate select" "0,1" textline " " bitfld.long 0x08 15. " IOLB ,I/O loopback select" "0,1" bitfld.long 0x08 9.--12. " LPWAKEUP_THRSH ,Low power wakeup threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 8. " RDBI ,Read data bus inversion enable" "Disabled,Enabled" bitfld.long 0x08 7. " WDBI ,Write data bus inversion enable" "Disabled,Enabled" textline " " bitfld.long 0x08 6. " PRFBYP ,PUB read FIFO bypass" "No bypass,Bypass" bitfld.long 0x08 4.--5. " RDMODE ,DATX8 receive FIFO read mode" "0,1,2,3" bitfld.long 0x08 3. " DISRST ,Disables the read FIFO reset" "No reset,Reset" bitfld.long 0x08 1.--2. " DQSGLB ,Read DQS gate I/O loopback" "0,1,2,3" line.long 0x0C "DX8SL3IOCR,DATX8 0-1 I/O Configuration Register" bitfld.long 0x0C 28.--30. " DXDACRANGE ,PVREF_DAC REFSEL range select" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 25.--27. " DXVREFIOM ,IOM bits for PVREF, PVREF_DAC and PVREFE cells in DX IO ring" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 22.--24. " DXIOM ,DX IO mode" "0,1,2,3,4,5,6,7" hexmask.long.word 0x0C 11.--21. 1. " DXTXM ,DX IO transmitter mode" textline " " hexmask.long.word 0x0C 0.--10. 1. " DXRXM ,DX IO receiver mode" group.long 0x1500++0x1F line.long 0x00 "DX8SL4OSC,DATX8 0-1 Oscillator Register" bitfld.long 0x00 28.--29. " GATEDXRDCLK ,Enable clock gating for DX DDR_CLK" "0,1,2,3" bitfld.long 0x00 26.--27. " GATEDXDDRCLK ,Enable clock gating for DX CTL_RD_CLK" "0,1,2,3" bitfld.long 0x00 24.--25. " GATEDXCTLCLK ,Enable clock gating for DX CTL_CLK" "0,1,2,3" bitfld.long 0x00 22.--23. " CLKLEVEL ,Selects the level to which clocks will be stalled when clock gating is enabled" "0,1,2,3" textline " " bitfld.long 0x00 21. " LBMODE ,Loopback mode" "Disabled,Enabled" eventfld.long 0x00 20. " LBGSDQS ,Load GSDQS LCDL with 2x the calibrated GSDQSPRD value" "Not loaded,Loaded" bitfld.long 0x00 18.--19. " LBGDQS ,Loopback DQS gating" "0,1,2,3" bitfld.long 0x00 17. " LBDQSS ,Loopback DQS shift" "Not shifted,Shifted" textline " " bitfld.long 0x00 16. " PHYHRST ,PHY High-Speed reset" "No reset,Reset" bitfld.long 0x00 15. " PHYFRST ,PHY FIFO reset" "No reset,Reset" bitfld.long 0x00 14. " DLTST ,Delay line test start" "Not started,Started" bitfld.long 0x00 13. " DLTMODE ,Delay line test mode" "Disabled,Enabled" textline " " bitfld.long 0x00 9.--10. " OSCWDDL ,Oscillator mode Write-Data delay line select" "0,1,2,3" bitfld.long 0x00 5.--6. " OSCWDL ,Oscillator mode Write-Leveling delay line select" "0,1,2,3" bitfld.long 0x00 1.--4. " OSCDIV ,Oscillator mode division" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0. " OSCEN ,Oscillator enable" "Disabled,Enabled" line.long 0x04 "DX8SL4PLLCR0,DAXT8 0-1 PLL Control Register 0" bitfld.long 0x04 31. " PLLBYP ,PLL bypass" "No bypass,Bypass" bitfld.long 0x04 30. " PLLRST ,PLL reset" "No reset,Reset" bitfld.long 0x04 29. " PLLPD ,PLL power down" "No,Yes" bitfld.long 0x04 28. " RSTOPM ,Reference stop mode" "0,1" textline " " bitfld.long 0x04 24.--27. " FRQSEL ,PLL frequency select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 23. " RLOCKM ,Relock mode" "Disabled,Enabled" bitfld.long 0x04 17.--22. " CPPC ,Charge pump proportional current control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 13.--16. " CPIC ,Charge pump integrating current control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 12. " GSHIFT ,Gear shift" "0,1" bitfld.long 0x04 8. " ATOEN ,Analog test enable ATOEN" "Disabled,Enabled" bitfld.long 0x04 4.--7. " ATC ,Analog test control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. " DTC ,Digital test control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "DX8SL4PLLCR1,DAXT8 0-1 PLL Control Register 1" hexmask.long.word 0x08 6.--21. 1. " PLLPROG ,Connects to the PLL PLL_PROG bus" bitfld.long 0x08 5. " BYPVREGCP ,Bypass PLL VREG_CP" "No bypass,Bypass" bitfld.long 0x08 4. " BYPVREGDIG ,Bypass PLL VREG_DIG" "No bypass,Bypass" bitfld.long 0x08 3. " BYPVDD ,PLL VDD voltage level control" "0,1" textline " " bitfld.long 0x08 2. " LOCKPS ,Lock detector phase select" "0,1" bitfld.long 0x08 1. " LOCKCS ,Lock detector counter select" "0,1" bitfld.long 0x08 0. " LOCKDS ,Lock detector select" "0,1" line.long 0x0C "DX8SL4PLLCR2,DAXT8 0-1 PLL Control Register 2" line.long 0x10 "DX8SL4PLLCR3,DAXT8 0-1 PLL Control Register 3" line.long 0x14 "DX8SL4PLLCR4,DAXT8 0-1 PLL Control Register 4" line.long 0x18 "DX8SL4PLLCR5,DAXT8 0-1 PLL Control Register 5" hexmask.long.byte 0x18 0.--7. 1. " PLLCTRL_103_96 ,Connectes to bits [103:96] of the PLL generatl control bus PLL_CTRL" line.long 0x1C "DX8SL4DQSCTL,DATX8 0-1 DQS Control Register" bitfld.long 0x1C 24. " RRRMODE ,Read path Rise-to-Rise mode" "0,1" bitfld.long 0x1C 21. " WRRMODE ,Write path Rise-to-Rise mode" "0,1" bitfld.long 0x1C 19.--20. " DQSGX ,DQS gate extension" "0,1,2,3" bitfld.long 0x1C 18. " LPPLLPD ,Low power PLL power down" "No,Yes" textline " " bitfld.long 0x1C 17. " LPIOPD ,Low power I/O power down" "No,Yes" bitfld.long 0x1C 14. " QSCNTEN ,QS counter enable" "Disabled,Enabled" bitfld.long 0x1C 13. " UDQIOM ,Unused DQ I/O mode" "0,1" bitfld.long 0x1C 8.--9. " DXSR ,Data slew rate" "0,1,2,3" textline " " bitfld.long 0x1C 4.--7. " DQSNRES ,DQS_N resistor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C 0.--3. " DQSRES ,DQS resistor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long (0x1500+0x24)++0x1F line.long 0x00 "DX8SL4DDLCTL,DATX8 0-1 DDL Control Register" bitfld.long 0x00 26. " DLYLDTM ,Delay load timing" "0,1" bitfld.long 0x00 25. " DXDDLLDT ,DX DDL load type" "0,1" bitfld.long 0x00 18.--22. " DXDDLLD ,DATX8 DDL delay select dymainc load" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x00 2.--17. 1. " DXDDLBYP ,DATX8 DDL bypass" textline " " bitfld.long 0x00 0.--1. " DDLBYPMODE ,Controls DDL bypass mode" "0,1,2,3" line.long 0x04 "DX8SL4DXCTL1,DATX8 0-1 DX Control Register 1" bitfld.long 0x04 24. " DXCALCLK ,DATX calibration clock select" "0,1" bitfld.long 0x04 23. " DXRCLKMD ,DATX8 read clock mode" "0,1" bitfld.long 0x04 20.--21. " DXDTOSEL ,DATX8 digital test output select" "0,1,2,3" bitfld.long 0x04 19. " DXGSMD ,Read DQS gating status mode" "0,1" textline " " bitfld.long 0x04 18. " DXQSDBYP ,Read DQS/DQS_N delay load bypass mode" "0,1" bitfld.long 0x04 17. " DXGDBYP ,Read DQS gate delay load bypass mode" "0,1" bitfld.long 0x04 16. " DXTMODE ,DATX8 test mode" "0,1" line.long 0x08 "DX8SL4DXCTL2,DATX8 0-1 DX Control Register 2" bitfld.long 0x08 23. " CRDEN ,Configurable read data enable" "Disabled,Enabled" bitfld.long 0x08 20.--22. " POSOEX ,OX extension during Post-amble" "0,1,2,3,4,5,6,7" bitfld.long 0x08 18.--19. " PREOEX ,OE extension during Pre-amble" "0,1,2,3" bitfld.long 0x08 16. " IOAG ,I/O assisted gate select" "0,1" textline " " bitfld.long 0x08 15. " IOLB ,I/O loopback select" "0,1" bitfld.long 0x08 9.--12. " LPWAKEUP_THRSH ,Low power wakeup threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 8. " RDBI ,Read data bus inversion enable" "Disabled,Enabled" bitfld.long 0x08 7. " WDBI ,Write data bus inversion enable" "Disabled,Enabled" textline " " bitfld.long 0x08 6. " PRFBYP ,PUB read FIFO bypass" "No bypass,Bypass" bitfld.long 0x08 4.--5. " RDMODE ,DATX8 receive FIFO read mode" "0,1,2,3" bitfld.long 0x08 3. " DISRST ,Disables the read FIFO reset" "No reset,Reset" bitfld.long 0x08 1.--2. " DQSGLB ,Read DQS gate I/O loopback" "0,1,2,3" line.long 0x0C "DX8SL4IOCR,DATX8 0-1 I/O Configuration Register" bitfld.long 0x0C 28.--30. " DXDACRANGE ,PVREF_DAC REFSEL range select" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 25.--27. " DXVREFIOM ,IOM bits for PVREF, PVREF_DAC and PVREFE cells in DX IO ring" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 22.--24. " DXIOM ,DX IO mode" "0,1,2,3,4,5,6,7" hexmask.long.word 0x0C 11.--21. 1. " DXTXM ,DX IO transmitter mode" textline " " hexmask.long.word 0x0C 0.--10. 1. " DXRXM ,DX IO receiver mode" group.long 0x1540++0x1F line.long 0x00 "DX8SL5OSC,DATX8 0-1 Oscillator Register" bitfld.long 0x00 28.--29. " GATEDXRDCLK ,Enable clock gating for DX DDR_CLK" "0,1,2,3" bitfld.long 0x00 26.--27. " GATEDXDDRCLK ,Enable clock gating for DX CTL_RD_CLK" "0,1,2,3" bitfld.long 0x00 24.--25. " GATEDXCTLCLK ,Enable clock gating for DX CTL_CLK" "0,1,2,3" bitfld.long 0x00 22.--23. " CLKLEVEL ,Selects the level to which clocks will be stalled when clock gating is enabled" "0,1,2,3" textline " " bitfld.long 0x00 21. " LBMODE ,Loopback mode" "Disabled,Enabled" eventfld.long 0x00 20. " LBGSDQS ,Load GSDQS LCDL with 2x the calibrated GSDQSPRD value" "Not loaded,Loaded" bitfld.long 0x00 18.--19. " LBGDQS ,Loopback DQS gating" "0,1,2,3" bitfld.long 0x00 17. " LBDQSS ,Loopback DQS shift" "Not shifted,Shifted" textline " " bitfld.long 0x00 16. " PHYHRST ,PHY High-Speed reset" "No reset,Reset" bitfld.long 0x00 15. " PHYFRST ,PHY FIFO reset" "No reset,Reset" bitfld.long 0x00 14. " DLTST ,Delay line test start" "Not started,Started" bitfld.long 0x00 13. " DLTMODE ,Delay line test mode" "Disabled,Enabled" textline " " bitfld.long 0x00 9.--10. " OSCWDDL ,Oscillator mode Write-Data delay line select" "0,1,2,3" bitfld.long 0x00 5.--6. " OSCWDL ,Oscillator mode Write-Leveling delay line select" "0,1,2,3" bitfld.long 0x00 1.--4. " OSCDIV ,Oscillator mode division" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0. " OSCEN ,Oscillator enable" "Disabled,Enabled" line.long 0x04 "DX8SL5PLLCR0,DAXT8 0-1 PLL Control Register 0" bitfld.long 0x04 31. " PLLBYP ,PLL bypass" "No bypass,Bypass" bitfld.long 0x04 30. " PLLRST ,PLL reset" "No reset,Reset" bitfld.long 0x04 29. " PLLPD ,PLL power down" "No,Yes" bitfld.long 0x04 28. " RSTOPM ,Reference stop mode" "0,1" textline " " bitfld.long 0x04 24.--27. " FRQSEL ,PLL frequency select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 23. " RLOCKM ,Relock mode" "Disabled,Enabled" bitfld.long 0x04 17.--22. " CPPC ,Charge pump proportional current control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 13.--16. " CPIC ,Charge pump integrating current control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 12. " GSHIFT ,Gear shift" "0,1" bitfld.long 0x04 8. " ATOEN ,Analog test enable ATOEN" "Disabled,Enabled" bitfld.long 0x04 4.--7. " ATC ,Analog test control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. " DTC ,Digital test control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "DX8SL5PLLCR1,DAXT8 0-1 PLL Control Register 1" hexmask.long.word 0x08 6.--21. 1. " PLLPROG ,Connects to the PLL PLL_PROG bus" bitfld.long 0x08 5. " BYPVREGCP ,Bypass PLL VREG_CP" "No bypass,Bypass" bitfld.long 0x08 4. " BYPVREGDIG ,Bypass PLL VREG_DIG" "No bypass,Bypass" bitfld.long 0x08 3. " BYPVDD ,PLL VDD voltage level control" "0,1" textline " " bitfld.long 0x08 2. " LOCKPS ,Lock detector phase select" "0,1" bitfld.long 0x08 1. " LOCKCS ,Lock detector counter select" "0,1" bitfld.long 0x08 0. " LOCKDS ,Lock detector select" "0,1" line.long 0x0C "DX8SL5PLLCR2,DAXT8 0-1 PLL Control Register 2" line.long 0x10 "DX8SL5PLLCR3,DAXT8 0-1 PLL Control Register 3" line.long 0x14 "DX8SL5PLLCR4,DAXT8 0-1 PLL Control Register 4" line.long 0x18 "DX8SL5PLLCR5,DAXT8 0-1 PLL Control Register 5" hexmask.long.byte 0x18 0.--7. 1. " PLLCTRL_103_96 ,Connectes to bits [103:96] of the PLL generatl control bus PLL_CTRL" line.long 0x1C "DX8SL5DQSCTL,DATX8 0-1 DQS Control Register" bitfld.long 0x1C 24. " RRRMODE ,Read path Rise-to-Rise mode" "0,1" bitfld.long 0x1C 21. " WRRMODE ,Write path Rise-to-Rise mode" "0,1" bitfld.long 0x1C 19.--20. " DQSGX ,DQS gate extension" "0,1,2,3" bitfld.long 0x1C 18. " LPPLLPD ,Low power PLL power down" "No,Yes" textline " " bitfld.long 0x1C 17. " LPIOPD ,Low power I/O power down" "No,Yes" bitfld.long 0x1C 14. " QSCNTEN ,QS counter enable" "Disabled,Enabled" bitfld.long 0x1C 13. " UDQIOM ,Unused DQ I/O mode" "0,1" bitfld.long 0x1C 8.--9. " DXSR ,Data slew rate" "0,1,2,3" textline " " bitfld.long 0x1C 4.--7. " DQSNRES ,DQS_N resistor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C 0.--3. " DQSRES ,DQS resistor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long (0x1540+0x24)++0x1F line.long 0x00 "DX8SL5DDLCTL,DATX8 0-1 DDL Control Register" bitfld.long 0x00 26. " DLYLDTM ,Delay load timing" "0,1" bitfld.long 0x00 25. " DXDDLLDT ,DX DDL load type" "0,1" bitfld.long 0x00 18.--22. " DXDDLLD ,DATX8 DDL delay select dymainc load" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x00 2.--17. 1. " DXDDLBYP ,DATX8 DDL bypass" textline " " bitfld.long 0x00 0.--1. " DDLBYPMODE ,Controls DDL bypass mode" "0,1,2,3" line.long 0x04 "DX8SL5DXCTL1,DATX8 0-1 DX Control Register 1" bitfld.long 0x04 24. " DXCALCLK ,DATX calibration clock select" "0,1" bitfld.long 0x04 23. " DXRCLKMD ,DATX8 read clock mode" "0,1" bitfld.long 0x04 20.--21. " DXDTOSEL ,DATX8 digital test output select" "0,1,2,3" bitfld.long 0x04 19. " DXGSMD ,Read DQS gating status mode" "0,1" textline " " bitfld.long 0x04 18. " DXQSDBYP ,Read DQS/DQS_N delay load bypass mode" "0,1" bitfld.long 0x04 17. " DXGDBYP ,Read DQS gate delay load bypass mode" "0,1" bitfld.long 0x04 16. " DXTMODE ,DATX8 test mode" "0,1" line.long 0x08 "DX8SL5DXCTL2,DATX8 0-1 DX Control Register 2" bitfld.long 0x08 23. " CRDEN ,Configurable read data enable" "Disabled,Enabled" bitfld.long 0x08 20.--22. " POSOEX ,OX extension during Post-amble" "0,1,2,3,4,5,6,7" bitfld.long 0x08 18.--19. " PREOEX ,OE extension during Pre-amble" "0,1,2,3" bitfld.long 0x08 16. " IOAG ,I/O assisted gate select" "0,1" textline " " bitfld.long 0x08 15. " IOLB ,I/O loopback select" "0,1" bitfld.long 0x08 9.--12. " LPWAKEUP_THRSH ,Low power wakeup threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 8. " RDBI ,Read data bus inversion enable" "Disabled,Enabled" bitfld.long 0x08 7. " WDBI ,Write data bus inversion enable" "Disabled,Enabled" textline " " bitfld.long 0x08 6. " PRFBYP ,PUB read FIFO bypass" "No bypass,Bypass" bitfld.long 0x08 4.--5. " RDMODE ,DATX8 receive FIFO read mode" "0,1,2,3" bitfld.long 0x08 3. " DISRST ,Disables the read FIFO reset" "No reset,Reset" bitfld.long 0x08 1.--2. " DQSGLB ,Read DQS gate I/O loopback" "0,1,2,3" line.long 0x0C "DX8SL5IOCR,DATX8 0-1 I/O Configuration Register" bitfld.long 0x0C 28.--30. " DXDACRANGE ,PVREF_DAC REFSEL range select" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 25.--27. " DXVREFIOM ,IOM bits for PVREF, PVREF_DAC and PVREFE cells in DX IO ring" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 22.--24. " DXIOM ,DX IO mode" "0,1,2,3,4,5,6,7" hexmask.long.word 0x0C 11.--21. 1. " DXTXM ,DX IO transmitter mode" textline " " hexmask.long.word 0x0C 0.--10. 1. " DXRXM ,DX IO receiver mode" group.long 0x1580++0x1F line.long 0x00 "DX8SL6OSC,DATX8 0-1 Oscillator Register" bitfld.long 0x00 28.--29. " GATEDXRDCLK ,Enable clock gating for DX DDR_CLK" "0,1,2,3" bitfld.long 0x00 26.--27. " GATEDXDDRCLK ,Enable clock gating for DX CTL_RD_CLK" "0,1,2,3" bitfld.long 0x00 24.--25. " GATEDXCTLCLK ,Enable clock gating for DX CTL_CLK" "0,1,2,3" bitfld.long 0x00 22.--23. " CLKLEVEL ,Selects the level to which clocks will be stalled when clock gating is enabled" "0,1,2,3" textline " " bitfld.long 0x00 21. " LBMODE ,Loopback mode" "Disabled,Enabled" eventfld.long 0x00 20. " LBGSDQS ,Load GSDQS LCDL with 2x the calibrated GSDQSPRD value" "Not loaded,Loaded" bitfld.long 0x00 18.--19. " LBGDQS ,Loopback DQS gating" "0,1,2,3" bitfld.long 0x00 17. " LBDQSS ,Loopback DQS shift" "Not shifted,Shifted" textline " " bitfld.long 0x00 16. " PHYHRST ,PHY High-Speed reset" "No reset,Reset" bitfld.long 0x00 15. " PHYFRST ,PHY FIFO reset" "No reset,Reset" bitfld.long 0x00 14. " DLTST ,Delay line test start" "Not started,Started" bitfld.long 0x00 13. " DLTMODE ,Delay line test mode" "Disabled,Enabled" textline " " bitfld.long 0x00 9.--10. " OSCWDDL ,Oscillator mode Write-Data delay line select" "0,1,2,3" bitfld.long 0x00 5.--6. " OSCWDL ,Oscillator mode Write-Leveling delay line select" "0,1,2,3" bitfld.long 0x00 1.--4. " OSCDIV ,Oscillator mode division" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0. " OSCEN ,Oscillator enable" "Disabled,Enabled" line.long 0x04 "DX8SL6PLLCR0,DAXT8 0-1 PLL Control Register 0" bitfld.long 0x04 31. " PLLBYP ,PLL bypass" "No bypass,Bypass" bitfld.long 0x04 30. " PLLRST ,PLL reset" "No reset,Reset" bitfld.long 0x04 29. " PLLPD ,PLL power down" "No,Yes" bitfld.long 0x04 28. " RSTOPM ,Reference stop mode" "0,1" textline " " bitfld.long 0x04 24.--27. " FRQSEL ,PLL frequency select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 23. " RLOCKM ,Relock mode" "Disabled,Enabled" bitfld.long 0x04 17.--22. " CPPC ,Charge pump proportional current control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 13.--16. " CPIC ,Charge pump integrating current control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 12. " GSHIFT ,Gear shift" "0,1" bitfld.long 0x04 8. " ATOEN ,Analog test enable ATOEN" "Disabled,Enabled" bitfld.long 0x04 4.--7. " ATC ,Analog test control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. " DTC ,Digital test control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "DX8SL6PLLCR1,DAXT8 0-1 PLL Control Register 1" hexmask.long.word 0x08 6.--21. 1. " PLLPROG ,Connects to the PLL PLL_PROG bus" bitfld.long 0x08 5. " BYPVREGCP ,Bypass PLL VREG_CP" "No bypass,Bypass" bitfld.long 0x08 4. " BYPVREGDIG ,Bypass PLL VREG_DIG" "No bypass,Bypass" bitfld.long 0x08 3. " BYPVDD ,PLL VDD voltage level control" "0,1" textline " " bitfld.long 0x08 2. " LOCKPS ,Lock detector phase select" "0,1" bitfld.long 0x08 1. " LOCKCS ,Lock detector counter select" "0,1" bitfld.long 0x08 0. " LOCKDS ,Lock detector select" "0,1" line.long 0x0C "DX8SL6PLLCR2,DAXT8 0-1 PLL Control Register 2" line.long 0x10 "DX8SL6PLLCR3,DAXT8 0-1 PLL Control Register 3" line.long 0x14 "DX8SL6PLLCR4,DAXT8 0-1 PLL Control Register 4" line.long 0x18 "DX8SL6PLLCR5,DAXT8 0-1 PLL Control Register 5" hexmask.long.byte 0x18 0.--7. 1. " PLLCTRL_103_96 ,Connectes to bits [103:96] of the PLL generatl control bus PLL_CTRL" line.long 0x1C "DX8SL6DQSCTL,DATX8 0-1 DQS Control Register" bitfld.long 0x1C 24. " RRRMODE ,Read path Rise-to-Rise mode" "0,1" bitfld.long 0x1C 21. " WRRMODE ,Write path Rise-to-Rise mode" "0,1" bitfld.long 0x1C 19.--20. " DQSGX ,DQS gate extension" "0,1,2,3" bitfld.long 0x1C 18. " LPPLLPD ,Low power PLL power down" "No,Yes" textline " " bitfld.long 0x1C 17. " LPIOPD ,Low power I/O power down" "No,Yes" bitfld.long 0x1C 14. " QSCNTEN ,QS counter enable" "Disabled,Enabled" bitfld.long 0x1C 13. " UDQIOM ,Unused DQ I/O mode" "0,1" bitfld.long 0x1C 8.--9. " DXSR ,Data slew rate" "0,1,2,3" textline " " bitfld.long 0x1C 4.--7. " DQSNRES ,DQS_N resistor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C 0.--3. " DQSRES ,DQS resistor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long (0x1580+0x24)++0x1F line.long 0x00 "DX8SL6DDLCTL,DATX8 0-1 DDL Control Register" bitfld.long 0x00 26. " DLYLDTM ,Delay load timing" "0,1" bitfld.long 0x00 25. " DXDDLLDT ,DX DDL load type" "0,1" bitfld.long 0x00 18.--22. " DXDDLLD ,DATX8 DDL delay select dymainc load" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x00 2.--17. 1. " DXDDLBYP ,DATX8 DDL bypass" textline " " bitfld.long 0x00 0.--1. " DDLBYPMODE ,Controls DDL bypass mode" "0,1,2,3" line.long 0x04 "DX8SL6DXCTL1,DATX8 0-1 DX Control Register 1" bitfld.long 0x04 24. " DXCALCLK ,DATX calibration clock select" "0,1" bitfld.long 0x04 23. " DXRCLKMD ,DATX8 read clock mode" "0,1" bitfld.long 0x04 20.--21. " DXDTOSEL ,DATX8 digital test output select" "0,1,2,3" bitfld.long 0x04 19. " DXGSMD ,Read DQS gating status mode" "0,1" textline " " bitfld.long 0x04 18. " DXQSDBYP ,Read DQS/DQS_N delay load bypass mode" "0,1" bitfld.long 0x04 17. " DXGDBYP ,Read DQS gate delay load bypass mode" "0,1" bitfld.long 0x04 16. " DXTMODE ,DATX8 test mode" "0,1" line.long 0x08 "DX8SL6DXCTL2,DATX8 0-1 DX Control Register 2" bitfld.long 0x08 23. " CRDEN ,Configurable read data enable" "Disabled,Enabled" bitfld.long 0x08 20.--22. " POSOEX ,OX extension during Post-amble" "0,1,2,3,4,5,6,7" bitfld.long 0x08 18.--19. " PREOEX ,OE extension during Pre-amble" "0,1,2,3" bitfld.long 0x08 16. " IOAG ,I/O assisted gate select" "0,1" textline " " bitfld.long 0x08 15. " IOLB ,I/O loopback select" "0,1" bitfld.long 0x08 9.--12. " LPWAKEUP_THRSH ,Low power wakeup threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 8. " RDBI ,Read data bus inversion enable" "Disabled,Enabled" bitfld.long 0x08 7. " WDBI ,Write data bus inversion enable" "Disabled,Enabled" textline " " bitfld.long 0x08 6. " PRFBYP ,PUB read FIFO bypass" "No bypass,Bypass" bitfld.long 0x08 4.--5. " RDMODE ,DATX8 receive FIFO read mode" "0,1,2,3" bitfld.long 0x08 3. " DISRST ,Disables the read FIFO reset" "No reset,Reset" bitfld.long 0x08 1.--2. " DQSGLB ,Read DQS gate I/O loopback" "0,1,2,3" line.long 0x0C "DX8SL6IOCR,DATX8 0-1 I/O Configuration Register" bitfld.long 0x0C 28.--30. " DXDACRANGE ,PVREF_DAC REFSEL range select" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 25.--27. " DXVREFIOM ,IOM bits for PVREF, PVREF_DAC and PVREFE cells in DX IO ring" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 22.--24. " DXIOM ,DX IO mode" "0,1,2,3,4,5,6,7" hexmask.long.word 0x0C 11.--21. 1. " DXTXM ,DX IO transmitter mode" textline " " hexmask.long.word 0x0C 0.--10. 1. " DXRXM ,DX IO receiver mode" group.long 0x15C0++0x1F line.long 0x00 "DX8SL7OSC,DATX8 0-1 Oscillator Register" bitfld.long 0x00 28.--29. " GATEDXRDCLK ,Enable clock gating for DX DDR_CLK" "0,1,2,3" bitfld.long 0x00 26.--27. " GATEDXDDRCLK ,Enable clock gating for DX CTL_RD_CLK" "0,1,2,3" bitfld.long 0x00 24.--25. " GATEDXCTLCLK ,Enable clock gating for DX CTL_CLK" "0,1,2,3" bitfld.long 0x00 22.--23. " CLKLEVEL ,Selects the level to which clocks will be stalled when clock gating is enabled" "0,1,2,3" textline " " bitfld.long 0x00 21. " LBMODE ,Loopback mode" "Disabled,Enabled" eventfld.long 0x00 20. " LBGSDQS ,Load GSDQS LCDL with 2x the calibrated GSDQSPRD value" "Not loaded,Loaded" bitfld.long 0x00 18.--19. " LBGDQS ,Loopback DQS gating" "0,1,2,3" bitfld.long 0x00 17. " LBDQSS ,Loopback DQS shift" "Not shifted,Shifted" textline " " bitfld.long 0x00 16. " PHYHRST ,PHY High-Speed reset" "No reset,Reset" bitfld.long 0x00 15. " PHYFRST ,PHY FIFO reset" "No reset,Reset" bitfld.long 0x00 14. " DLTST ,Delay line test start" "Not started,Started" bitfld.long 0x00 13. " DLTMODE ,Delay line test mode" "Disabled,Enabled" textline " " bitfld.long 0x00 9.--10. " OSCWDDL ,Oscillator mode Write-Data delay line select" "0,1,2,3" bitfld.long 0x00 5.--6. " OSCWDL ,Oscillator mode Write-Leveling delay line select" "0,1,2,3" bitfld.long 0x00 1.--4. " OSCDIV ,Oscillator mode division" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0. " OSCEN ,Oscillator enable" "Disabled,Enabled" line.long 0x04 "DX8SL7PLLCR0,DAXT8 0-1 PLL Control Register 0" bitfld.long 0x04 31. " PLLBYP ,PLL bypass" "No bypass,Bypass" bitfld.long 0x04 30. " PLLRST ,PLL reset" "No reset,Reset" bitfld.long 0x04 29. " PLLPD ,PLL power down" "No,Yes" bitfld.long 0x04 28. " RSTOPM ,Reference stop mode" "0,1" textline " " bitfld.long 0x04 24.--27. " FRQSEL ,PLL frequency select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 23. " RLOCKM ,Relock mode" "Disabled,Enabled" bitfld.long 0x04 17.--22. " CPPC ,Charge pump proportional current control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 13.--16. " CPIC ,Charge pump integrating current control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 12. " GSHIFT ,Gear shift" "0,1" bitfld.long 0x04 8. " ATOEN ,Analog test enable ATOEN" "Disabled,Enabled" bitfld.long 0x04 4.--7. " ATC ,Analog test control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. " DTC ,Digital test control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "DX8SL7PLLCR1,DAXT8 0-1 PLL Control Register 1" hexmask.long.word 0x08 6.--21. 1. " PLLPROG ,Connects to the PLL PLL_PROG bus" bitfld.long 0x08 5. " BYPVREGCP ,Bypass PLL VREG_CP" "No bypass,Bypass" bitfld.long 0x08 4. " BYPVREGDIG ,Bypass PLL VREG_DIG" "No bypass,Bypass" bitfld.long 0x08 3. " BYPVDD ,PLL VDD voltage level control" "0,1" textline " " bitfld.long 0x08 2. " LOCKPS ,Lock detector phase select" "0,1" bitfld.long 0x08 1. " LOCKCS ,Lock detector counter select" "0,1" bitfld.long 0x08 0. " LOCKDS ,Lock detector select" "0,1" line.long 0x0C "DX8SL7PLLCR2,DAXT8 0-1 PLL Control Register 2" line.long 0x10 "DX8SL7PLLCR3,DAXT8 0-1 PLL Control Register 3" line.long 0x14 "DX8SL7PLLCR4,DAXT8 0-1 PLL Control Register 4" line.long 0x18 "DX8SL7PLLCR5,DAXT8 0-1 PLL Control Register 5" hexmask.long.byte 0x18 0.--7. 1. " PLLCTRL_103_96 ,Connectes to bits [103:96] of the PLL generatl control bus PLL_CTRL" line.long 0x1C "DX8SL7DQSCTL,DATX8 0-1 DQS Control Register" bitfld.long 0x1C 24. " RRRMODE ,Read path Rise-to-Rise mode" "0,1" bitfld.long 0x1C 21. " WRRMODE ,Write path Rise-to-Rise mode" "0,1" bitfld.long 0x1C 19.--20. " DQSGX ,DQS gate extension" "0,1,2,3" bitfld.long 0x1C 18. " LPPLLPD ,Low power PLL power down" "No,Yes" textline " " bitfld.long 0x1C 17. " LPIOPD ,Low power I/O power down" "No,Yes" bitfld.long 0x1C 14. " QSCNTEN ,QS counter enable" "Disabled,Enabled" bitfld.long 0x1C 13. " UDQIOM ,Unused DQ I/O mode" "0,1" bitfld.long 0x1C 8.--9. " DXSR ,Data slew rate" "0,1,2,3" textline " " bitfld.long 0x1C 4.--7. " DQSNRES ,DQS_N resistor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C 0.--3. " DQSRES ,DQS resistor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long (0x15C0+0x24)++0x1F line.long 0x00 "DX8SL7DDLCTL,DATX8 0-1 DDL Control Register" bitfld.long 0x00 26. " DLYLDTM ,Delay load timing" "0,1" bitfld.long 0x00 25. " DXDDLLDT ,DX DDL load type" "0,1" bitfld.long 0x00 18.--22. " DXDDLLD ,DATX8 DDL delay select dymainc load" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x00 2.--17. 1. " DXDDLBYP ,DATX8 DDL bypass" textline " " bitfld.long 0x00 0.--1. " DDLBYPMODE ,Controls DDL bypass mode" "0,1,2,3" line.long 0x04 "DX8SL7DXCTL1,DATX8 0-1 DX Control Register 1" bitfld.long 0x04 24. " DXCALCLK ,DATX calibration clock select" "0,1" bitfld.long 0x04 23. " DXRCLKMD ,DATX8 read clock mode" "0,1" bitfld.long 0x04 20.--21. " DXDTOSEL ,DATX8 digital test output select" "0,1,2,3" bitfld.long 0x04 19. " DXGSMD ,Read DQS gating status mode" "0,1" textline " " bitfld.long 0x04 18. " DXQSDBYP ,Read DQS/DQS_N delay load bypass mode" "0,1" bitfld.long 0x04 17. " DXGDBYP ,Read DQS gate delay load bypass mode" "0,1" bitfld.long 0x04 16. " DXTMODE ,DATX8 test mode" "0,1" line.long 0x08 "DX8SL7DXCTL2,DATX8 0-1 DX Control Register 2" bitfld.long 0x08 23. " CRDEN ,Configurable read data enable" "Disabled,Enabled" bitfld.long 0x08 20.--22. " POSOEX ,OX extension during Post-amble" "0,1,2,3,4,5,6,7" bitfld.long 0x08 18.--19. " PREOEX ,OE extension during Pre-amble" "0,1,2,3" bitfld.long 0x08 16. " IOAG ,I/O assisted gate select" "0,1" textline " " bitfld.long 0x08 15. " IOLB ,I/O loopback select" "0,1" bitfld.long 0x08 9.--12. " LPWAKEUP_THRSH ,Low power wakeup threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 8. " RDBI ,Read data bus inversion enable" "Disabled,Enabled" bitfld.long 0x08 7. " WDBI ,Write data bus inversion enable" "Disabled,Enabled" textline " " bitfld.long 0x08 6. " PRFBYP ,PUB read FIFO bypass" "No bypass,Bypass" bitfld.long 0x08 4.--5. " RDMODE ,DATX8 receive FIFO read mode" "0,1,2,3" bitfld.long 0x08 3. " DISRST ,Disables the read FIFO reset" "No reset,Reset" bitfld.long 0x08 1.--2. " DQSGLB ,Read DQS gate I/O loopback" "0,1,2,3" line.long 0x0C "DX8SL7IOCR,DATX8 0-1 I/O Configuration Register" bitfld.long 0x0C 28.--30. " DXDACRANGE ,PVREF_DAC REFSEL range select" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 25.--27. " DXVREFIOM ,IOM bits for PVREF, PVREF_DAC and PVREFE cells in DX IO ring" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 22.--24. " DXIOM ,DX IO mode" "0,1,2,3,4,5,6,7" hexmask.long.word 0x0C 11.--21. 1. " DXTXM ,DX IO transmitter mode" textline " " hexmask.long.word 0x0C 0.--10. 1. " DXRXM ,DX IO receiver mode" group.long 0x1600++0x1F line.long 0x00 "DX8SL8OSC,DATX8 0-1 Oscillator Register" bitfld.long 0x00 28.--29. " GATEDXRDCLK ,Enable clock gating for DX DDR_CLK" "0,1,2,3" bitfld.long 0x00 26.--27. " GATEDXDDRCLK ,Enable clock gating for DX CTL_RD_CLK" "0,1,2,3" bitfld.long 0x00 24.--25. " GATEDXCTLCLK ,Enable clock gating for DX CTL_CLK" "0,1,2,3" bitfld.long 0x00 22.--23. " CLKLEVEL ,Selects the level to which clocks will be stalled when clock gating is enabled" "0,1,2,3" textline " " bitfld.long 0x00 21. " LBMODE ,Loopback mode" "Disabled,Enabled" eventfld.long 0x00 20. " LBGSDQS ,Load GSDQS LCDL with 2x the calibrated GSDQSPRD value" "Not loaded,Loaded" bitfld.long 0x00 18.--19. " LBGDQS ,Loopback DQS gating" "0,1,2,3" bitfld.long 0x00 17. " LBDQSS ,Loopback DQS shift" "Not shifted,Shifted" textline " " bitfld.long 0x00 16. " PHYHRST ,PHY High-Speed reset" "No reset,Reset" bitfld.long 0x00 15. " PHYFRST ,PHY FIFO reset" "No reset,Reset" bitfld.long 0x00 14. " DLTST ,Delay line test start" "Not started,Started" bitfld.long 0x00 13. " DLTMODE ,Delay line test mode" "Disabled,Enabled" textline " " bitfld.long 0x00 9.--10. " OSCWDDL ,Oscillator mode Write-Data delay line select" "0,1,2,3" bitfld.long 0x00 5.--6. " OSCWDL ,Oscillator mode Write-Leveling delay line select" "0,1,2,3" bitfld.long 0x00 1.--4. " OSCDIV ,Oscillator mode division" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0. " OSCEN ,Oscillator enable" "Disabled,Enabled" line.long 0x04 "DX8SL8PLLCR0,DAXT8 0-1 PLL Control Register 0" bitfld.long 0x04 31. " PLLBYP ,PLL bypass" "No bypass,Bypass" bitfld.long 0x04 30. " PLLRST ,PLL reset" "No reset,Reset" bitfld.long 0x04 29. " PLLPD ,PLL power down" "No,Yes" bitfld.long 0x04 28. " RSTOPM ,Reference stop mode" "0,1" textline " " bitfld.long 0x04 24.--27. " FRQSEL ,PLL frequency select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 23. " RLOCKM ,Relock mode" "Disabled,Enabled" bitfld.long 0x04 17.--22. " CPPC ,Charge pump proportional current control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 13.--16. " CPIC ,Charge pump integrating current control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 12. " GSHIFT ,Gear shift" "0,1" bitfld.long 0x04 8. " ATOEN ,Analog test enable ATOEN" "Disabled,Enabled" bitfld.long 0x04 4.--7. " ATC ,Analog test control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. " DTC ,Digital test control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "DX8SL8PLLCR1,DAXT8 0-1 PLL Control Register 1" hexmask.long.word 0x08 6.--21. 1. " PLLPROG ,Connects to the PLL PLL_PROG bus" bitfld.long 0x08 5. " BYPVREGCP ,Bypass PLL VREG_CP" "No bypass,Bypass" bitfld.long 0x08 4. " BYPVREGDIG ,Bypass PLL VREG_DIG" "No bypass,Bypass" bitfld.long 0x08 3. " BYPVDD ,PLL VDD voltage level control" "0,1" textline " " bitfld.long 0x08 2. " LOCKPS ,Lock detector phase select" "0,1" bitfld.long 0x08 1. " LOCKCS ,Lock detector counter select" "0,1" bitfld.long 0x08 0. " LOCKDS ,Lock detector select" "0,1" line.long 0x0C "DX8SL8PLLCR2,DAXT8 0-1 PLL Control Register 2" line.long 0x10 "DX8SL8PLLCR3,DAXT8 0-1 PLL Control Register 3" line.long 0x14 "DX8SL8PLLCR4,DAXT8 0-1 PLL Control Register 4" line.long 0x18 "DX8SL8PLLCR5,DAXT8 0-1 PLL Control Register 5" hexmask.long.byte 0x18 0.--7. 1. " PLLCTRL_103_96 ,Connectes to bits [103:96] of the PLL generatl control bus PLL_CTRL" line.long 0x1C "DX8SL8DQSCTL,DATX8 0-1 DQS Control Register" bitfld.long 0x1C 24. " RRRMODE ,Read path Rise-to-Rise mode" "0,1" bitfld.long 0x1C 21. " WRRMODE ,Write path Rise-to-Rise mode" "0,1" bitfld.long 0x1C 19.--20. " DQSGX ,DQS gate extension" "0,1,2,3" bitfld.long 0x1C 18. " LPPLLPD ,Low power PLL power down" "No,Yes" textline " " bitfld.long 0x1C 17. " LPIOPD ,Low power I/O power down" "No,Yes" bitfld.long 0x1C 14. " QSCNTEN ,QS counter enable" "Disabled,Enabled" bitfld.long 0x1C 13. " UDQIOM ,Unused DQ I/O mode" "0,1" bitfld.long 0x1C 8.--9. " DXSR ,Data slew rate" "0,1,2,3" textline " " bitfld.long 0x1C 4.--7. " DQSNRES ,DQS_N resistor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C 0.--3. " DQSRES ,DQS resistor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long (0x1600+0x24)++0x1F line.long 0x00 "DX8SL8DDLCTL,DATX8 0-1 DDL Control Register" bitfld.long 0x00 26. " DLYLDTM ,Delay load timing" "0,1" bitfld.long 0x00 25. " DXDDLLDT ,DX DDL load type" "0,1" bitfld.long 0x00 18.--22. " DXDDLLD ,DATX8 DDL delay select dymainc load" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x00 2.--17. 1. " DXDDLBYP ,DATX8 DDL bypass" textline " " bitfld.long 0x00 0.--1. " DDLBYPMODE ,Controls DDL bypass mode" "0,1,2,3" line.long 0x04 "DX8SL8DXCTL1,DATX8 0-1 DX Control Register 1" bitfld.long 0x04 24. " DXCALCLK ,DATX calibration clock select" "0,1" bitfld.long 0x04 23. " DXRCLKMD ,DATX8 read clock mode" "0,1" bitfld.long 0x04 20.--21. " DXDTOSEL ,DATX8 digital test output select" "0,1,2,3" bitfld.long 0x04 19. " DXGSMD ,Read DQS gating status mode" "0,1" textline " " bitfld.long 0x04 18. " DXQSDBYP ,Read DQS/DQS_N delay load bypass mode" "0,1" bitfld.long 0x04 17. " DXGDBYP ,Read DQS gate delay load bypass mode" "0,1" bitfld.long 0x04 16. " DXTMODE ,DATX8 test mode" "0,1" line.long 0x08 "DX8SL8DXCTL2,DATX8 0-1 DX Control Register 2" bitfld.long 0x08 23. " CRDEN ,Configurable read data enable" "Disabled,Enabled" bitfld.long 0x08 20.--22. " POSOEX ,OX extension during Post-amble" "0,1,2,3,4,5,6,7" bitfld.long 0x08 18.--19. " PREOEX ,OE extension during Pre-amble" "0,1,2,3" bitfld.long 0x08 16. " IOAG ,I/O assisted gate select" "0,1" textline " " bitfld.long 0x08 15. " IOLB ,I/O loopback select" "0,1" bitfld.long 0x08 9.--12. " LPWAKEUP_THRSH ,Low power wakeup threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 8. " RDBI ,Read data bus inversion enable" "Disabled,Enabled" bitfld.long 0x08 7. " WDBI ,Write data bus inversion enable" "Disabled,Enabled" textline " " bitfld.long 0x08 6. " PRFBYP ,PUB read FIFO bypass" "No bypass,Bypass" bitfld.long 0x08 4.--5. " RDMODE ,DATX8 receive FIFO read mode" "0,1,2,3" bitfld.long 0x08 3. " DISRST ,Disables the read FIFO reset" "No reset,Reset" bitfld.long 0x08 1.--2. " DQSGLB ,Read DQS gate I/O loopback" "0,1,2,3" line.long 0x0C "DX8SL8IOCR,DATX8 0-1 I/O Configuration Register" bitfld.long 0x0C 28.--30. " DXDACRANGE ,PVREF_DAC REFSEL range select" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 25.--27. " DXVREFIOM ,IOM bits for PVREF, PVREF_DAC and PVREFE cells in DX IO ring" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 22.--24. " DXIOM ,DX IO mode" "0,1,2,3,4,5,6,7" hexmask.long.word 0x0C 11.--21. 1. " DXTXM ,DX IO transmitter mode" textline " " hexmask.long.word 0x0C 0.--10. 1. " DXRXM ,DX IO receiver mode" wgroup.long 0x17C0++0x1F line.long 0x00 "DX8SLBOSC,DATX8 0-8 Oscillator Register" bitfld.long 0x00 28.--29. " GATEDXRDCLK ,Enable clock gating for DX DDR_CLK" "0,1,2,3" bitfld.long 0x00 26.--27. " GATEDXDDRCLK ,Enable clock gating for DX CTL_RD_CLK" "0,1,2,3" bitfld.long 0x00 24.--25. " GATEDXCTLCLK ,Enable clock gating for DX CTL_CLK" "0,1,2,3" bitfld.long 0x00 22.--23. " CLKLEVEL ,Selects the level to which clocks will be stalled when clock gating is enabled" "0,1,2,3" textline " " bitfld.long 0x00 21. " LBMODE ,Loopback mode" "Disabled,Enabled" bitfld.long 0x00 20. " LBGSDQS ,Load GSDQS LCDL with 2x the calibrated GSDQSPRD value" "Not loaded,Loaded" bitfld.long 0x00 18.--19. " LBGDQS ,Loopback DQS gating" "0,1,2,3" bitfld.long 0x00 17. " LBDQSS ,Loopback DQS shift" "Not shifted,Shifted" textline " " bitfld.long 0x00 16. " PHYHRST ,PHY High-Speed reset" "No reset,Reset" bitfld.long 0x00 15. " PHYFRST ,PHY FIFO reset" "No reset,Reset" bitfld.long 0x00 14. " DLTST ,Delay line test start" "Not started,Started" bitfld.long 0x00 13. " DLTMODE ,Delay line test mode" "Disabled,Enabled" textline " " bitfld.long 0x00 9.--10. " OSCWDDL ,Oscillator mode Write-Data delay line select" "0,1,2,3" bitfld.long 0x00 5.--6. " OSCWDL ,Oscillator mode Write-Leveling delay line select" "0,1,2,3" bitfld.long 0x00 1.--4. " OSCDIV ,Oscillator mode division" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0. " OSCEN ,Oscillator enable" "Disabled,Enabled" line.long 0x04 "DX8SLBPLLCR0,DAXT8 0-8 PLL Control Register 0" bitfld.long 0x04 31. " PLLBYP ,PLL bypass" "No bypass,Bypass" bitfld.long 0x04 30. " PLLRST ,PLL reset" "No reset,Reset" bitfld.long 0x04 29. " PLLPD ,PLL power down" "No,Yes" bitfld.long 0x04 28. " RSTOPM ,Reference stop mode" "0,1" textline " " bitfld.long 0x04 24.--27. " FRQSEL ,PLL frequency select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 23. " RLOCKM ,Relock mode" "Disabled,Enabled" bitfld.long 0x04 17.--22. " CPPC ,Charge pump proportional current control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 13.--16. " CPIC ,Charge pump integrating current control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 12. " GSHIFT ,Gear shift" "0,1" bitfld.long 0x04 8. " ATOEN ,Analog test enable ATOEN" "Disabled,Enabled" bitfld.long 0x04 4.--7. " ATC ,Analog test control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. " DTC ,Digital test control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "DX8SLBPLLCR1,DAXT8 0-8 PLL Control Register 1" hexmask.long.word 0x08 6.--21. 1. " PLLPROG ,Connects to the PLL PLL_PROG bus" bitfld.long 0x08 5. " BYPVREGCP ,Bypass PLL VREG_CP" "No bypass,Bypass" bitfld.long 0x08 4. " BYPVREGDIG ,Bypass PLL VREG_DIG" "No bypass,Bypass" bitfld.long 0x08 3. " BYPVDD ,PLL VDD voltage level control" "0,1" textline " " bitfld.long 0x08 2. " LOCKPS ,Lock detector phase select" "0,1" bitfld.long 0x08 1. " LOCKCS ,Lock detector counter select" "0,1" bitfld.long 0x08 0. " LOCKDS ,Lock detector select" "0,1" line.long 0x0C "DX8SLBPLLCR2,DAXT8 0-8 PLL Control Register 2" line.long 0x10 "DX8SLBPLLCR3,DAXT8 0-8 PLL Control Register 3" line.long 0x14 "DX8SLBPLLCR4,DAXT8 0-8 PLL Control Register 4" line.long 0x18 "DX8SLBPLLCR5,DAXT8 0-8 PLL Control Register 5" hexmask.long.byte 0x18 0.--7. 1. " PLLCTRL_103_96 ,Connectes to bits [103:96] of the PLL generatl control bus PLL_CTRL" line.long 0x1C "DX8SLBDQSCTL,DATX8 0-8 DQS Control Register" bitfld.long 0x1C 24. " RRRMODE ,Read path Rise-to-Rise mode" "0,1" bitfld.long 0x1C 21. " WRRMODE ,Write path Rise-to-Rise mode" "0,1" bitfld.long 0x1C 19.--20. " DQSGX ,DQS gate extension" "0,1,2,3" bitfld.long 0x1C 18. " LPPLLPD ,Low power PLL power down" "No,Yes" textline " " bitfld.long 0x1C 17. " LPIOPD ,Low power I/O power down" "No,Yes" bitfld.long 0x1C 14. " QSCNTEN ,QS counter enable" "Disabled,Enabled" bitfld.long 0x1C 13. " UDQIOM ,Unused DQ I/O mode" "0,1" bitfld.long 0x1C 8.--9. " DXSR ,Data slew rate" "0,1,2,3" textline " " bitfld.long 0x1C 4.--7. " DQSNRES ,DQS_N resistor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C 0.--3. " DQSRES ,DQS resistor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" wgroup.long 0x17E4++0x1F line.long 0x00 "DX8SLBDDLCTL,DATX8 0-8 DDL Control Register" bitfld.long 0x00 26. " DLYLDTM ,Delay load timing" "0,1" bitfld.long 0x00 25. " DXDDLLDT ,DX DDL load type" "0,1" bitfld.long 0x00 18.--22. " DXDDLLD ,DATX8 DDL delay select dymainc load" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x00 2.--17. 1. " DXDDLBYP ,DATX8 DDL bypass" textline " " bitfld.long 0x00 0.--1. " DDLBYPMODE ,Controls DDL bypass mode" "0,1,2,3" line.long 0x04 "DX8SLBDXCTL1,DATX8 0-8 DX Control Register 1" bitfld.long 0x04 24. " DXCALCLK ,DATX calibration clock select" "0,1" bitfld.long 0x04 23. " DXRCLKMD ,DATX8 read clock mode" "0,1" bitfld.long 0x04 20.--21. " DXDTOSEL ,DATX8 digital test output select" "0,1,2,3" bitfld.long 0x04 19. " DXGSMD ,Read DQS gating status mode" "0,1" textline " " bitfld.long 0x04 18. " DXQSDBYP ,Read DQS/DQS_N delay load bypass mode" "0,1" bitfld.long 0x04 17. " DXGDBYP ,Read DQS gate delay load bypass mode" "0,1" bitfld.long 0x04 16. " DXTMODE ,DATX8 test mode" "0,1" line.long 0x08 "DX8SLBDXCTL2,DATX8 0-8 DX Control Register 2" bitfld.long 0x08 23. " CRDEN ,Configurable read data enable" "Disabled,Enabled" bitfld.long 0x08 20.--22. " POSOEX ,OX extension during Post-amble" "0,1,2,3,4,5,6,7" bitfld.long 0x08 18.--19. " PREOEX ,OE extension during Pre-amble" "0,1,2,3" bitfld.long 0x08 16. " IOAG ,I/O assisted gate select" "0,1" textline " " bitfld.long 0x08 15. " IOLB ,I/O loopback select" "0,1" bitfld.long 0x08 9.--12. " LPWAKEUP_THRSH ,Low power wakeup threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 8. " RDBI ,Read data bus inversion enable" "Disabled,Enabled" bitfld.long 0x08 7. " WDBI ,Write data bus inversion enable" "Disabled,Enabled" textline " " bitfld.long 0x08 6. " PRFBYP ,PUB read FIFO bypass" "No bypass,Bypass" bitfld.long 0x08 4.--5. " RDMODE ,DATX8 receive FIFO read mode" "0,1,2,3" bitfld.long 0x08 3. " DISRST ,Disables the read FIFO reset" "No reset,Reset" bitfld.long 0x08 1.--2. " DQSGLB ,Read DQS gate I/O loopback" "0,1,2,3" line.long 0x0C "DX8SLBIOCR,DATX8 0-8 I/O Configuration Register" bitfld.long 0x0C 28.--30. " DXDACRANGE ,PVREF_DAC REFSEL range select" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 25.--27. " DXVREFIOM ,IOM bits for PVREF, PVREF_DAC and PVREFE cells in DX IO ring" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 22.--24. " DXIOM ,DX IO mode" "0,1,2,3,4,5,6,7" hexmask.long.word 0x0C 11.--21. 1. " DXTXM ,DX IO transmitter mode" textline " " hexmask.long.word 0x0C 0.--10. 1. " DXRXM ,DX IO receiver mode" width 0x0B tree.end tree "DDR_QOS_CTRL (Quality of Service Controller)" base ad:0xFD090000 width 22. group.long 0x00++0x1B line.long 0x00 "PORT_TYPE,Set Port Type Register" bitfld.long 0x00 14.--15. " PORT5_TYPE ,Set port 5 type" "Best effort,Low latency,Video traffic,?..." bitfld.long 0x00 12.--13. " PORT4_TYPE ,Set port 4 type" "Best effort,Low latency,Video traffic,?..." bitfld.long 0x00 10.--11. " PORT3_TYPE ,Set port 3 type" "Best effort,Low latency,Video traffic,?..." bitfld.long 0x00 8.--9. " PORT2B_TYPE ,Set port 2 blue queue type" "Best effort,Low latency,Video traffic,?..." textline " " bitfld.long 0x00 6.--7. " PORT2R_TYPE ,Set port 2 red queue type" "Best effort,Low latency,Video traffic,?..." bitfld.long 0x00 4.--5. " PORT1B_TYPE ,Set port 1 blue queue type" "Best effort,Low latency,Video traffic,?..." bitfld.long 0x00 2.--3. " PORT1R_TYPE ,Set port 1 red queue type" "Best effort,Low latency,Video traffic,?..." bitfld.long 0x00 0.--1. " PORT0_TYPE ,Set port 0 type" "Best effort,Low latency,Video traffic,?..." line.long 0x04 "QOS_CTRL,QoS Control Register" bitfld.long 0x04 22. " APB_ERR_RES ,Pslverr value after access on unimplemented space" "0,1" bitfld.long 0x04 21. " PORT5_WR_CTRL ,Port 5 QoS throttle control on write channel" "Disabled,Enabled" bitfld.long 0x04 20. " PORT5_HPR_CTRL ,Port 5 QoS throttle control on read HPR channel" "Disabled,Enabled" bitfld.long 0x04 19. " PORT5_LPR_CTRL ,Port 5 QoS throttle control on read LPR channel" "Disabled,Enabled" textline " " bitfld.long 0x04 18. " PORT4_WR_CTRL ,Port 4 QoS throttle control on write channel" "Disabled,Enabled" bitfld.long 0x04 17. " PORT4_HPR_CTRL ,Port 4 QoS throttle control on read HPR channel" "Disabled,Enabled" bitfld.long 0x04 16. " PORT4_LPR_CTRL ,Port 4 QoS throttle control on read LPR channel" "Disabled,Enabled" bitfld.long 0x04 15. " PORT3_WR_CTRL ,Port 3 QoS throttle control on write channel" "Disabled,Enabled" textline " " bitfld.long 0x04 14. " PORT3_HPR_CTRL ,Port 3 QoS throttle control on read HPR channel" "Disabled,Enabled" bitfld.long 0x04 13. " PORT3_LPR_CTRL ,Port 3 QoS throttle control on read LPR channel" "Disabled,Enabled" bitfld.long 0x04 12. " PORT2_WR_CTRL ,Port 2 QoS throttle control on write channel" "Disabled,Enabled" bitfld.long 0x04 11. " PORT2B_HPR_TRL ,Port 2 blue queue QoS throttle control on read HPR channel" "Disabled,Enabled" textline " " bitfld.long 0x04 10. " PORT2B_LPR_CTRL ,Port 2 blue queue throttle control on read LPR channel" "Disabled,Enabled" bitfld.long 0x04 9. " PORT2R_HPR_CTRL ,Port 2 red queue QoS throttle control on read HPR channel" "Disabled,Enabled" bitfld.long 0x04 8. " PORT2R_LPR_CTRL ,Port 2 red queue QoS throttle control on read LPR channel" "Disabled,Enabled" bitfld.long 0x04 7. " PORT1_WR_CTRL ,Port 1 QoS throttle control on write channel" "Disabled,Enabled" textline " " bitfld.long 0x04 6. " PORT1B_HPR_CTRL ,Port 1 blue queue throttle QoS control on read HPR channel" "Disabled,Enabled" bitfld.long 0x04 5. " PORT1B_LPR_CTRL ,Port 1 blue queue throttle control on read LPR channel" "Disabled,Enabled" bitfld.long 0x04 4. " PORT1R_HPR_CTRL ,Port 1 red queue QoS throttle control on read HPR channel" "Disabled,Enabled" bitfld.long 0x04 3. " PORT1R_LPR_CTRL ,Port 1 red queue QoS throttle control on read LPR channel" "Disabled,Enabled" textline " " bitfld.long 0x04 2. " PORT0_WR_CTRL ,Port 0 QoS throttle control on write channel" "Disabled,Enabled" bitfld.long 0x04 1. " PORT0_HPR_CTRL ,Port 0 QoS throttle control on read HPR channel" "Disabled,Enabled" bitfld.long 0x04 0. " PORT0_LPR_CTRL ,Port 0 QoS throttle control on read LPR channel" "Disabled,Enabled" line.long 0x08 "RD_HPR_THRSLD,Set Value For Read HPR CAM Threshold Register" hexmask.long.byte 0x08 0.--6. 1. " VALUE ,Read HPR CAM threshold level" line.long 0x0C "RD_LPR_THRSLD,Set Value For Read LPR CAM Threshold Register" hexmask.long.byte 0x0C 0.--6. 1. " VALUE ,Read LPR CAM threshold level" line.long 0x10 "WR_THRSLD,Set Value For Write CAM Threshold Register" hexmask.long.byte 0x10 0.--6. 1. " VALUE ,Write CAM threshold level" line.long 0x14 "ZQCS_CTRL0,ZQCS Control Register 0" bitfld.long 0x14 0. " ENABLE ,Enable ZQCS control through QoS controller" "Disabled,Enabled" line.long 0x18 "ZQCS_CTRL1,ZQCS Control Register 1" bitfld.long 0x18 0.--3. " VSYNC_CNT ,Software programmable register to issue ZQCS to DDRC after programmable VSYNC pulse count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long 0x1C++0x03 line.long 0x00 "ZQCS_STATUS,ZQCS Status Register" bitfld.long 0x00 0. " BUSY ,QoS controller status" "Not busy,Busy" group.long 0x20++0x03 line.long 0x00 "DDRC_EXT_REFRESH,DDRC External Refresh Control Register" bitfld.long 0x00 0. " ENABLE ,Enable DDRC external refresh control through QoS controller" "Disabled,Enabled" group.long 0x200++0x03 line.long 0x00 "QOS_IRQ_STATUS,Interrupt Status Register" eventfld.long 0x00 10. " DDRC_WR_POISON ,Write poison interrupt status from DDRC" "No interrupt,Interrupt" eventfld.long 0x00 9. " DDRC_RD_POISON ,Read poison interrupt status from DDRC" "No interrupt,Interrupt" eventfld.long 0x00 8. " MRR_DATA_VALID ,Data on DDR_QOS_CTRL.DDRC_MRR_DATA* is valid" "No interrupt,Interrupt" eventfld.long 0x00 7. " PC_COPY_DONE ,Copy happened in performance counters" "No interrupt,Interrupt" textline " " eventfld.long 0x00 6. " DFI_ALT_ERR ,Parity or CRC error detected on the DFI interface" "No interrupt,Interrupt" eventfld.long 0x00 5. " DFI_ALT_ERR_MAX ,DDRC.CRCPARSTAT.DFI_ALERT_ERR_CNT reached it maximum value" "No interrupt,Interrupt" eventfld.long 0x00 4. " DFI_ALT_ERR_FTL ,Parity error due to MRS detected on the DFI interface" "No interrupt,Interrupt" eventfld.long 0x00 3. " DFI_INIT_COMP ,PHY initialization complete" "No interrupt,Interrupt" textline " " eventfld.long 0x00 2. " DDRECC_UNCRERR ,Uncorrectable ECC error detected by DDRC" "No interrupt,Interrupt" eventfld.long 0x00 1. " DDRECC_CORERR ,Correctable ECC error detected by DDRC" "No interrupt,Interrupt" eventfld.long 0x00 0. " INV_APB ,APB access occurred to an unimplemented space" "No interrupt,Interrupt" group.long 0x204++0x03 line.long 0x00 "QOS_IRQ_MASK_SET/CLR,Interrupt Mask Register" setclrfld.long 0x00 10. 0x08 10. 0x04 10. " DDRC_WR_POISON ,Write poison interrupt mask" "Not masked,Masked" setclrfld.long 0x00 9. 0x08 9. 0x04 9. " DDRC_RD_POISON ,Read poison interrupt mask" "Not masked,Masked" setclrfld.long 0x00 8. 0x08 8. 0x04 8. " MRR_DATA_VALID ,Data on DDR_QOS_CTRL.DDRC_MRR_DATA* is valid interrupt mask" "Not masked,Masked" setclrfld.long 0x00 7. 0x08 7. 0x04 7. " PC_COPY_DONE ,Copy happened in performance counters interrupt mask" "Not masked,Masked" textline " " setclrfld.long 0x00 6. 0x08 6. 0x04 6. " DFI_ALT_ERR ,Parity or CRC error detected on the DFI interface interrupt mask" "Not masked,Masked" setclrfld.long 0x00 5. 0x08 5. 0x04 5. " DFI_ALT_ERR_MAX ,DDRC.CRCPARSTAT.DFI_ALERT_ERR_CNT reached it maximum value interrupt mask" "Not masked,Masked" setclrfld.long 0x00 4. 0x08 4. 0x04 4. " DFI_ALT_ERR_FTL ,Parity error due to MRS detected on the DFI interface interrupt mask" "Not masked,Masked" setclrfld.long 0x00 3. 0x08 3. 0x04 3. " DFI_INIT_COMP ,PHY initialization complete interrupt mask" "Not masked,Masked" textline " " setclrfld.long 0x00 2. 0x08 2. 0x04 2. " DDRECC_UNCRERR ,Uncorrectable ECC error detected by DDRC interrupt mask" "Not masked,Masked" setclrfld.long 0x00 1. 0x08 1. 0x04 1. " DDRECC_CORERR ,Correctable ECC error detected by DDRC interrupt mask" "Not masked,Masked" setclrfld.long 0x00 0. 0x08 0. 0x04 0. " INV_APB ,APB access occurred to an unimplemented space interrupt mask" "Not masked,Masked" group.long 0x510++0x07 line.long 0x00 "DDRC_URGENT,DDRC URGENT Sideband Signal Control Register" bitfld.long 0x00 13. " ARURGENT_5 ,Sideband signal to indicate a DDRC port 5 read queue urgent transaction" "Not urgent,Urgent" bitfld.long 0x00 12. " AWURGENT_5 ,Sideband signal to indicate a DDRC port 5 write urgent transaction" "Not urgent,Urgent" bitfld.long 0x00 11. " ARURGENT_4 ,Sideband signal to indicate a DDRC port 4 read queue urgent transaction" "Not urgent,Urgent" bitfld.long 0x00 10. " AWURGENT_4 ,Sideband signal to indicate a DDRC port 4 write urgent transaction" "Not urgent,Urgent" textline " " bitfld.long 0x00 9. " ARURGENT_3 ,Sideband signal to indicate a DDRC port 3 read queue urgent transaction" "Not urgent,Urgent" bitfld.long 0x00 8. " AWURGENT_3 ,Sideband signal to indicate a DDRC port 3 write urgent transaction" "Not urgent,Urgent" bitfld.long 0x00 7. " ARURGENTR_2 ,Sideband signal to indicate a DDRC port 2 read red queue urgent transaction" "Not urgent,Urgent" bitfld.long 0x00 6. " ARURGENTB_2 ,Sideband signal to indicate a DDRC port 2 read blue queue urgent transaction" "Not urgent,Urgent" textline " " bitfld.long 0x00 5. " AWURGENT_2 ,Sideband signal to indicate a DDRC port 2 write urgent transaction" "Not urgent,Urgent" bitfld.long 0x00 4. " ARURGENTR_1 ,Sideband signal to indicate a DDRC port 1 read red queue urgent transaction" "Not urgent,Urgent" bitfld.long 0x00 3. " ARURGENTB_1 ,Sideband signal to indicate a DDRC port 1 read blue queue urgent transaction" "Not urgent,Urgent" bitfld.long 0x00 2. " AWURGENT_1 ,Sideband signal to indicate a DDRC port 1 write urgent transaction" "Not urgent,Urgent" textline " " bitfld.long 0x00 1. " ARURGENT_0 ,Sideband signal to indicate a DDRC port 0 read queue urgent transaction" "Not urgent,Urgent" bitfld.long 0x00 0. " AWURGENT_0 ,Sideband signal to indicate a DDRC port 0 write urgent transaction" "Not urgent,Urgent" line.long 0x04 "DDRC_QVN_CTRL,DDRC QVN Control Register" bitfld.long 0x04 5. " PREALLOC_P2[1] ,Token preallocation for DDR_SS slave port 2 VN1" "Disabled,Enabled" bitfld.long 0x04 4. " [0] ,Token preallocation for DDR_SS slave port 2 VN0" "Disabled,Enabled" bitfld.long 0x04 3. " PREALLOC_P1[1] ,Token preallocation for DDR_SS slave port 1 VN1" "Disabled,Enabled" bitfld.long 0x04 2. " [0] ,Token preallocation for DDR_SS slave port 1 VN0" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " EN_P2 ,QVN enable for DDR_SS slave port 2" "Disabled,Enabled" bitfld.long 0x04 0. " EN_P1 ,QVN enable for DDR_SS slave port 1" "Disabled,Enabled" rgroup.long 0x518++0x33 line.long 0x00 "DDRC_MRR_STATUS,DDRC MRR Register Status" bitfld.long 0x00 1.--3. " VALID_CNT ,Quantity of valid data available in FIFO" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " VALID ,Indicate valid data is available in FIFO" "Not available,Available" line.long 0x04 "DDRC_MRR_DATA0,DDRC MRR Register Data" line.long 0x08 "DDRC_MRR_DATA1,DDRC MRR Register Data" line.long 0x0C "DDRC_MRR_DATA2,DDRC MRR Register Data" hexmask.long.byte 0x0C 0.--7. 1. " ECC ,DDRC MRR register ECC data" line.long 0x10 "DDRC_MRR_DATA3,DDRC MRR Register Data" line.long 0x14 "DDRC_MRR_DATA4,DDRC MRR Register Data" line.long 0x18 "DDRC_MRR_DATA5,DDRC MRR Register Data" hexmask.long.byte 0x18 0.--7. 1. " ECC ,DDRC MRR register ECC data" line.long 0x1C "DDRC_MRR_DATA6,DDRC MRR Register Data" line.long 0x20 "DDRC_MRR_DATA7,DDRC MRR Register Data" line.long 0x24 "DDRC_MRR_DATA8,DDRC MRR Register Data" hexmask.long.byte 0x24 0.--7. 1. " ECC ,DDRC MRR register ECC data" line.long 0x28 "DDRC_MRR_DATA9,DDRC MRR Register Data" line.long 0x2C "DDRC_MRR_DATA10,DDRC MRR Register Data" line.long 0x30 "DDRC_MRR_DATA11,DDRC MRR Register Data" hexmask.long.byte 0x30 0.--7. 1. " ECC ,DDRC MRR register ECC data" group.long 0x700++0x03 line.long 0x00 "DDR_CLK_CTRL,DDR Sub System Clock Control Register" bitfld.long 0x00 0. " CLKACT ,Clock active signal" "Not active,Active" group.long 0x708++0x03 line.long 0x00 "DDR_CLK_CTRL,DDRPHY Bypass Mode Clock Selection Register" bitfld.long 0x00 0. " BYP_MODE ,DDRPHY PLL bypass mode enable/disable" "Disabled,Enabled" width 0x0B tree.end tree "XMPU_DDR (Xilinx Memory Protection)" tree "DDR_XMPU0_CFG" base ad:0xFD000000 width 13. group.long 0x00++0x03 line.long 0x00 "CTRL,XMPU Control Register" rbitfld.long 0x00 3. " ALIGNCFG ,Region alignment" ",1MB" bitfld.long 0x00 2. " POISONCFG ,Transaction poisoning" "Attribute,Address" bitfld.long 0x00 1. " DEFWRALLOWED ,Default write permission" "Poisoned,Allowed" bitfld.long 0x00 0. " DEFRDALLOWED ,Default read permission" "Poisoned,Allowed" rgroup.long 0x04++0x07 line.long 0x00 "ERR_STATUS1,XMPU Error Status Register 1" hexmask.long 0x00 0.--27. 1. " AXI_ADDR ,Address bits [39:12] of the first poisoned read or write request" line.long 0x04 "ERR_STATUS2,XMPU Error Status Register 2" hexmask.long.word 0x04 0.--9. 1. " AXI_ID ,Master ID of the first poisoned read or write request" group.long 0x0C++0x03 line.long 0x00 "POISON,XMPU Poison Address Attribute Register" bitfld.long 0x00 20. " ATTRIB ,Poison attribute" "0,1" hexmask.long.tbyte 0x00 0.--19. 1. " BASE ,Poisoned AXI address bits [31:12]" group.long 0x10++0x03 line.long 0x00 "ISR,Interrupt Status Register" eventfld.long 0x00 3. " SECURITYVIO ,Security violation occurred on any enabled region" "No interrupt,Interrupt" eventfld.long 0x00 2. " WRPERMVIO ,Write permission violation occurred on any enabled region" "No interrupt,Interrupt" eventfld.long 0x00 1. " RDPERMVIO ,Read permission violation occurred on any enabled region" "No interrupt,Interrupt" eventfld.long 0x00 0. " INV_APB ,APB register access occurs to an unimplemented register" "No interrupt,Interrupt" group.long 0x14++0x03 line.long 0x00 "IMR_SET/CLR,Interrupt Mask Register" setclrfld.long 0x00 3. 0x08 3. 0x04 3. " SECURITYVIO ,Security violation occurred on any enabled region" "Not masked,Masked" setclrfld.long 0x00 2. 0x08 2. 0x04 2. " WRPERMVIO ,Write permission violation occurred on any enabled region" "Not masked,Masked" setclrfld.long 0x00 1. 0x08 1. 0x04 1. " RDPERMVIO ,Read permission violation occurred on any enabled region" "Not masked,Masked" setclrfld.long 0x00 0. 0x08 0. 0x04 0. " INV_APB ,APB register access occurs to an unimplemented register" "Not masked,Masked" group.byte 0x20++0x00 line.byte 0x00 "LOCK,Lock Register" bitfld.byte 0x00 0. " REGWRDIS ,XMPU registers lock" "Not locked,Locked" textline " " group.long 0x100++0x0F "Region 00" line.long 0x00 "R00_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R00_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R00_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R00_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x110++0x0F "Region 01" line.long 0x00 "R01_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R01_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R01_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R01_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x120++0x0F "Region 02" line.long 0x00 "R02_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R02_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R02_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R02_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x130++0x0F "Region 03" line.long 0x00 "R03_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R03_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R03_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R03_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x140++0x0F "Region 04" line.long 0x00 "R04_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R04_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R04_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R04_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x150++0x0F "Region 05" line.long 0x00 "R05_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R05_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R05_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R05_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x160++0x0F "Region 06" line.long 0x00 "R06_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R06_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R06_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R06_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x170++0x0F "Region 07" line.long 0x00 "R07_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R07_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R07_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R07_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x180++0x0F "Region 08" line.long 0x00 "R08_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R08_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R08_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R08_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x190++0x0F "Region 09" line.long 0x00 "R09_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R09_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R09_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R09_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x1A0++0x0F "Region 10" line.long 0x00 "R10_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R10_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R10_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R10_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x1B0++0x0F "Region 11" line.long 0x00 "R11_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R11_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R11_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R11_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x1C0++0x0F "Region 12" line.long 0x00 "R12_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R12_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R12_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R12_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x1D0++0x0F "Region 13" line.long 0x00 "R13_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R13_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R13_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R13_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x1E0++0x0F "Region 14" line.long 0x00 "R14_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R14_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R14_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R14_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x1F0++0x0F "Region 15" line.long 0x00 "R15_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R15_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R15_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R15_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" width 0x0B tree.end tree "DDR_XMPU1_CFG" base ad:0xFD010000 width 13. group.long 0x00++0x03 line.long 0x00 "CTRL,XMPU Control Register" rbitfld.long 0x00 3. " ALIGNCFG ,Region alignment" ",1MB" bitfld.long 0x00 2. " POISONCFG ,Transaction poisoning" "Attribute,Address" bitfld.long 0x00 1. " DEFWRALLOWED ,Default write permission" "Poisoned,Allowed" bitfld.long 0x00 0. " DEFRDALLOWED ,Default read permission" "Poisoned,Allowed" rgroup.long 0x04++0x07 line.long 0x00 "ERR_STATUS1,XMPU Error Status Register 1" hexmask.long 0x00 0.--27. 1. " AXI_ADDR ,Address bits [39:12] of the first poisoned read or write request" line.long 0x04 "ERR_STATUS2,XMPU Error Status Register 2" hexmask.long.word 0x04 0.--9. 1. " AXI_ID ,Master ID of the first poisoned read or write request" group.long 0x0C++0x03 line.long 0x00 "POISON,XMPU Poison Address Attribute Register" bitfld.long 0x00 20. " ATTRIB ,Poison attribute" "0,1" hexmask.long.tbyte 0x00 0.--19. 1. " BASE ,Poisoned AXI address bits [31:12]" group.long 0x10++0x03 line.long 0x00 "ISR,Interrupt Status Register" eventfld.long 0x00 3. " SECURITYVIO ,Security violation occurred on any enabled region" "No interrupt,Interrupt" eventfld.long 0x00 2. " WRPERMVIO ,Write permission violation occurred on any enabled region" "No interrupt,Interrupt" eventfld.long 0x00 1. " RDPERMVIO ,Read permission violation occurred on any enabled region" "No interrupt,Interrupt" eventfld.long 0x00 0. " INV_APB ,APB register access occurs to an unimplemented register" "No interrupt,Interrupt" group.long 0x14++0x03 line.long 0x00 "IMR_SET/CLR,Interrupt Mask Register" setclrfld.long 0x00 3. 0x08 3. 0x04 3. " SECURITYVIO ,Security violation occurred on any enabled region" "Not masked,Masked" setclrfld.long 0x00 2. 0x08 2. 0x04 2. " WRPERMVIO ,Write permission violation occurred on any enabled region" "Not masked,Masked" setclrfld.long 0x00 1. 0x08 1. 0x04 1. " RDPERMVIO ,Read permission violation occurred on any enabled region" "Not masked,Masked" setclrfld.long 0x00 0. 0x08 0. 0x04 0. " INV_APB ,APB register access occurs to an unimplemented register" "Not masked,Masked" group.byte 0x20++0x00 line.byte 0x00 "LOCK,Lock Register" bitfld.byte 0x00 0. " REGWRDIS ,XMPU registers lock" "Not locked,Locked" textline " " group.long 0x100++0x0F "Region 00" line.long 0x00 "R00_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R00_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R00_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R00_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x110++0x0F "Region 01" line.long 0x00 "R01_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R01_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R01_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R01_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x120++0x0F "Region 02" line.long 0x00 "R02_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R02_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R02_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R02_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x130++0x0F "Region 03" line.long 0x00 "R03_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R03_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R03_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R03_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x140++0x0F "Region 04" line.long 0x00 "R04_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R04_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R04_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R04_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x150++0x0F "Region 05" line.long 0x00 "R05_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R05_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R05_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R05_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x160++0x0F "Region 06" line.long 0x00 "R06_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R06_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R06_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R06_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x170++0x0F "Region 07" line.long 0x00 "R07_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R07_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R07_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R07_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x180++0x0F "Region 08" line.long 0x00 "R08_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R08_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R08_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R08_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x190++0x0F "Region 09" line.long 0x00 "R09_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R09_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R09_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R09_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x1A0++0x0F "Region 10" line.long 0x00 "R10_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R10_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R10_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R10_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x1B0++0x0F "Region 11" line.long 0x00 "R11_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R11_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R11_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R11_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x1C0++0x0F "Region 12" line.long 0x00 "R12_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R12_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R12_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R12_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x1D0++0x0F "Region 13" line.long 0x00 "R13_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R13_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R13_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R13_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x1E0++0x0F "Region 14" line.long 0x00 "R14_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R14_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R14_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R14_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x1F0++0x0F "Region 15" line.long 0x00 "R15_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R15_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R15_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R15_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" width 0x0B tree.end tree "DDR_XMPU2_CFG" base ad:0xFD020000 width 13. group.long 0x00++0x03 line.long 0x00 "CTRL,XMPU Control Register" rbitfld.long 0x00 3. " ALIGNCFG ,Region alignment" ",1MB" bitfld.long 0x00 2. " POISONCFG ,Transaction poisoning" "Attribute,Address" bitfld.long 0x00 1. " DEFWRALLOWED ,Default write permission" "Poisoned,Allowed" bitfld.long 0x00 0. " DEFRDALLOWED ,Default read permission" "Poisoned,Allowed" rgroup.long 0x04++0x07 line.long 0x00 "ERR_STATUS1,XMPU Error Status Register 1" hexmask.long 0x00 0.--27. 1. " AXI_ADDR ,Address bits [39:12] of the first poisoned read or write request" line.long 0x04 "ERR_STATUS2,XMPU Error Status Register 2" hexmask.long.word 0x04 0.--9. 1. " AXI_ID ,Master ID of the first poisoned read or write request" group.long 0x0C++0x03 line.long 0x00 "POISON,XMPU Poison Address Attribute Register" bitfld.long 0x00 20. " ATTRIB ,Poison attribute" "0,1" hexmask.long.tbyte 0x00 0.--19. 1. " BASE ,Poisoned AXI address bits [31:12]" group.long 0x10++0x03 line.long 0x00 "ISR,Interrupt Status Register" eventfld.long 0x00 3. " SECURITYVIO ,Security violation occurred on any enabled region" "No interrupt,Interrupt" eventfld.long 0x00 2. " WRPERMVIO ,Write permission violation occurred on any enabled region" "No interrupt,Interrupt" eventfld.long 0x00 1. " RDPERMVIO ,Read permission violation occurred on any enabled region" "No interrupt,Interrupt" eventfld.long 0x00 0. " INV_APB ,APB register access occurs to an unimplemented register" "No interrupt,Interrupt" group.long 0x14++0x03 line.long 0x00 "IMR_SET/CLR,Interrupt Mask Register" setclrfld.long 0x00 3. 0x08 3. 0x04 3. " SECURITYVIO ,Security violation occurred on any enabled region" "Not masked,Masked" setclrfld.long 0x00 2. 0x08 2. 0x04 2. " WRPERMVIO ,Write permission violation occurred on any enabled region" "Not masked,Masked" setclrfld.long 0x00 1. 0x08 1. 0x04 1. " RDPERMVIO ,Read permission violation occurred on any enabled region" "Not masked,Masked" setclrfld.long 0x00 0. 0x08 0. 0x04 0. " INV_APB ,APB register access occurs to an unimplemented register" "Not masked,Masked" group.byte 0x20++0x00 line.byte 0x00 "LOCK,Lock Register" bitfld.byte 0x00 0. " REGWRDIS ,XMPU registers lock" "Not locked,Locked" textline " " group.long 0x100++0x0F "Region 00" line.long 0x00 "R00_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R00_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R00_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R00_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x110++0x0F "Region 01" line.long 0x00 "R01_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R01_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R01_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R01_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x120++0x0F "Region 02" line.long 0x00 "R02_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R02_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R02_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R02_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x130++0x0F "Region 03" line.long 0x00 "R03_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R03_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R03_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R03_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x140++0x0F "Region 04" line.long 0x00 "R04_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R04_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R04_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R04_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x150++0x0F "Region 05" line.long 0x00 "R05_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R05_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R05_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R05_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x160++0x0F "Region 06" line.long 0x00 "R06_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R06_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R06_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R06_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x170++0x0F "Region 07" line.long 0x00 "R07_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R07_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R07_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R07_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x180++0x0F "Region 08" line.long 0x00 "R08_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R08_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R08_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R08_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x190++0x0F "Region 09" line.long 0x00 "R09_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R09_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R09_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R09_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x1A0++0x0F "Region 10" line.long 0x00 "R10_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R10_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R10_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R10_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x1B0++0x0F "Region 11" line.long 0x00 "R11_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R11_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R11_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R11_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x1C0++0x0F "Region 12" line.long 0x00 "R12_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R12_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R12_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R12_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x1D0++0x0F "Region 13" line.long 0x00 "R13_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R13_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R13_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R13_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x1E0++0x0F "Region 14" line.long 0x00 "R14_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R14_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R14_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R14_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x1F0++0x0F "Region 15" line.long 0x00 "R15_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R15_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R15_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R15_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" width 0x0B tree.end tree "DDR_XMPU3_CFG" base ad:0xFD030000 width 13. group.long 0x00++0x03 line.long 0x00 "CTRL,XMPU Control Register" rbitfld.long 0x00 3. " ALIGNCFG ,Region alignment" ",1MB" bitfld.long 0x00 2. " POISONCFG ,Transaction poisoning" "Attribute,Address" bitfld.long 0x00 1. " DEFWRALLOWED ,Default write permission" "Poisoned,Allowed" bitfld.long 0x00 0. " DEFRDALLOWED ,Default read permission" "Poisoned,Allowed" rgroup.long 0x04++0x07 line.long 0x00 "ERR_STATUS1,XMPU Error Status Register 1" hexmask.long 0x00 0.--27. 1. " AXI_ADDR ,Address bits [39:12] of the first poisoned read or write request" line.long 0x04 "ERR_STATUS2,XMPU Error Status Register 2" hexmask.long.word 0x04 0.--9. 1. " AXI_ID ,Master ID of the first poisoned read or write request" group.long 0x0C++0x03 line.long 0x00 "POISON,XMPU Poison Address Attribute Register" bitfld.long 0x00 20. " ATTRIB ,Poison attribute" "0,1" hexmask.long.tbyte 0x00 0.--19. 1. " BASE ,Poisoned AXI address bits [31:12]" group.long 0x10++0x03 line.long 0x00 "ISR,Interrupt Status Register" eventfld.long 0x00 3. " SECURITYVIO ,Security violation occurred on any enabled region" "No interrupt,Interrupt" eventfld.long 0x00 2. " WRPERMVIO ,Write permission violation occurred on any enabled region" "No interrupt,Interrupt" eventfld.long 0x00 1. " RDPERMVIO ,Read permission violation occurred on any enabled region" "No interrupt,Interrupt" eventfld.long 0x00 0. " INV_APB ,APB register access occurs to an unimplemented register" "No interrupt,Interrupt" group.long 0x14++0x03 line.long 0x00 "IMR_SET/CLR,Interrupt Mask Register" setclrfld.long 0x00 3. 0x08 3. 0x04 3. " SECURITYVIO ,Security violation occurred on any enabled region" "Not masked,Masked" setclrfld.long 0x00 2. 0x08 2. 0x04 2. " WRPERMVIO ,Write permission violation occurred on any enabled region" "Not masked,Masked" setclrfld.long 0x00 1. 0x08 1. 0x04 1. " RDPERMVIO ,Read permission violation occurred on any enabled region" "Not masked,Masked" setclrfld.long 0x00 0. 0x08 0. 0x04 0. " INV_APB ,APB register access occurs to an unimplemented register" "Not masked,Masked" group.byte 0x20++0x00 line.byte 0x00 "LOCK,Lock Register" bitfld.byte 0x00 0. " REGWRDIS ,XMPU registers lock" "Not locked,Locked" textline " " group.long 0x100++0x0F "Region 00" line.long 0x00 "R00_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R00_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R00_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R00_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x110++0x0F "Region 01" line.long 0x00 "R01_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R01_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R01_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R01_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x120++0x0F "Region 02" line.long 0x00 "R02_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R02_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R02_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R02_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x130++0x0F "Region 03" line.long 0x00 "R03_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R03_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R03_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R03_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x140++0x0F "Region 04" line.long 0x00 "R04_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R04_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R04_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R04_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x150++0x0F "Region 05" line.long 0x00 "R05_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R05_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R05_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R05_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x160++0x0F "Region 06" line.long 0x00 "R06_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R06_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R06_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R06_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x170++0x0F "Region 07" line.long 0x00 "R07_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R07_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R07_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R07_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x180++0x0F "Region 08" line.long 0x00 "R08_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R08_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R08_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R08_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x190++0x0F "Region 09" line.long 0x00 "R09_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R09_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R09_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R09_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x1A0++0x0F "Region 10" line.long 0x00 "R10_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R10_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R10_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R10_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x1B0++0x0F "Region 11" line.long 0x00 "R11_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R11_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R11_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R11_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x1C0++0x0F "Region 12" line.long 0x00 "R12_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R12_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R12_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R12_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x1D0++0x0F "Region 13" line.long 0x00 "R13_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R13_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R13_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R13_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x1E0++0x0F "Region 14" line.long 0x00 "R14_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R14_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R14_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R14_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x1F0++0x0F "Region 15" line.long 0x00 "R15_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R15_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R15_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R15_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" width 0x0B tree.end tree "DDR_XMPU4_CFG" base ad:0xFD040000 width 13. group.long 0x00++0x03 line.long 0x00 "CTRL,XMPU Control Register" rbitfld.long 0x00 3. " ALIGNCFG ,Region alignment" ",1MB" bitfld.long 0x00 2. " POISONCFG ,Transaction poisoning" "Attribute,Address" bitfld.long 0x00 1. " DEFWRALLOWED ,Default write permission" "Poisoned,Allowed" bitfld.long 0x00 0. " DEFRDALLOWED ,Default read permission" "Poisoned,Allowed" rgroup.long 0x04++0x07 line.long 0x00 "ERR_STATUS1,XMPU Error Status Register 1" hexmask.long 0x00 0.--27. 1. " AXI_ADDR ,Address bits [39:12] of the first poisoned read or write request" line.long 0x04 "ERR_STATUS2,XMPU Error Status Register 2" hexmask.long.word 0x04 0.--9. 1. " AXI_ID ,Master ID of the first poisoned read or write request" group.long 0x0C++0x03 line.long 0x00 "POISON,XMPU Poison Address Attribute Register" bitfld.long 0x00 20. " ATTRIB ,Poison attribute" "0,1" hexmask.long.tbyte 0x00 0.--19. 1. " BASE ,Poisoned AXI address bits [31:12]" group.long 0x10++0x03 line.long 0x00 "ISR,Interrupt Status Register" eventfld.long 0x00 3. " SECURITYVIO ,Security violation occurred on any enabled region" "No interrupt,Interrupt" eventfld.long 0x00 2. " WRPERMVIO ,Write permission violation occurred on any enabled region" "No interrupt,Interrupt" eventfld.long 0x00 1. " RDPERMVIO ,Read permission violation occurred on any enabled region" "No interrupt,Interrupt" eventfld.long 0x00 0. " INV_APB ,APB register access occurs to an unimplemented register" "No interrupt,Interrupt" group.long 0x14++0x03 line.long 0x00 "IMR_SET/CLR,Interrupt Mask Register" setclrfld.long 0x00 3. 0x08 3. 0x04 3. " SECURITYVIO ,Security violation occurred on any enabled region" "Not masked,Masked" setclrfld.long 0x00 2. 0x08 2. 0x04 2. " WRPERMVIO ,Write permission violation occurred on any enabled region" "Not masked,Masked" setclrfld.long 0x00 1. 0x08 1. 0x04 1. " RDPERMVIO ,Read permission violation occurred on any enabled region" "Not masked,Masked" setclrfld.long 0x00 0. 0x08 0. 0x04 0. " INV_APB ,APB register access occurs to an unimplemented register" "Not masked,Masked" group.byte 0x20++0x00 line.byte 0x00 "LOCK,Lock Register" bitfld.byte 0x00 0. " REGWRDIS ,XMPU registers lock" "Not locked,Locked" textline " " group.long 0x100++0x0F "Region 00" line.long 0x00 "R00_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R00_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R00_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R00_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x110++0x0F "Region 01" line.long 0x00 "R01_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R01_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R01_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R01_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x120++0x0F "Region 02" line.long 0x00 "R02_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R02_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R02_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R02_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x130++0x0F "Region 03" line.long 0x00 "R03_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R03_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R03_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R03_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x140++0x0F "Region 04" line.long 0x00 "R04_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R04_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R04_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R04_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x150++0x0F "Region 05" line.long 0x00 "R05_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R05_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R05_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R05_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x160++0x0F "Region 06" line.long 0x00 "R06_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R06_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R06_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R06_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x170++0x0F "Region 07" line.long 0x00 "R07_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R07_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R07_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R07_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x180++0x0F "Region 08" line.long 0x00 "R08_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R08_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R08_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R08_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x190++0x0F "Region 09" line.long 0x00 "R09_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R09_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R09_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R09_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x1A0++0x0F "Region 10" line.long 0x00 "R10_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R10_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R10_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R10_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x1B0++0x0F "Region 11" line.long 0x00 "R11_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R11_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R11_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R11_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x1C0++0x0F "Region 12" line.long 0x00 "R12_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R12_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R12_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R12_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x1D0++0x0F "Region 13" line.long 0x00 "R13_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R13_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R13_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R13_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x1E0++0x0F "Region 14" line.long 0x00 "R14_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R14_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R14_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R14_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x1F0++0x0F "Region 15" line.long 0x00 "R15_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R15_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R15_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R15_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" width 0x0B tree.end tree "DDR_XMPU5_CFG" base ad:0xFD050000 width 13. group.long 0x00++0x03 line.long 0x00 "CTRL,XMPU Control Register" rbitfld.long 0x00 3. " ALIGNCFG ,Region alignment" ",1MB" bitfld.long 0x00 2. " POISONCFG ,Transaction poisoning" "Attribute,Address" bitfld.long 0x00 1. " DEFWRALLOWED ,Default write permission" "Poisoned,Allowed" bitfld.long 0x00 0. " DEFRDALLOWED ,Default read permission" "Poisoned,Allowed" rgroup.long 0x04++0x07 line.long 0x00 "ERR_STATUS1,XMPU Error Status Register 1" hexmask.long 0x00 0.--27. 1. " AXI_ADDR ,Address bits [39:12] of the first poisoned read or write request" line.long 0x04 "ERR_STATUS2,XMPU Error Status Register 2" hexmask.long.word 0x04 0.--9. 1. " AXI_ID ,Master ID of the first poisoned read or write request" group.long 0x0C++0x03 line.long 0x00 "POISON,XMPU Poison Address Attribute Register" bitfld.long 0x00 20. " ATTRIB ,Poison attribute" "0,1" hexmask.long.tbyte 0x00 0.--19. 1. " BASE ,Poisoned AXI address bits [31:12]" group.long 0x10++0x03 line.long 0x00 "ISR,Interrupt Status Register" eventfld.long 0x00 3. " SECURITYVIO ,Security violation occurred on any enabled region" "No interrupt,Interrupt" eventfld.long 0x00 2. " WRPERMVIO ,Write permission violation occurred on any enabled region" "No interrupt,Interrupt" eventfld.long 0x00 1. " RDPERMVIO ,Read permission violation occurred on any enabled region" "No interrupt,Interrupt" eventfld.long 0x00 0. " INV_APB ,APB register access occurs to an unimplemented register" "No interrupt,Interrupt" group.long 0x14++0x03 line.long 0x00 "IMR_SET/CLR,Interrupt Mask Register" setclrfld.long 0x00 3. 0x08 3. 0x04 3. " SECURITYVIO ,Security violation occurred on any enabled region" "Not masked,Masked" setclrfld.long 0x00 2. 0x08 2. 0x04 2. " WRPERMVIO ,Write permission violation occurred on any enabled region" "Not masked,Masked" setclrfld.long 0x00 1. 0x08 1. 0x04 1. " RDPERMVIO ,Read permission violation occurred on any enabled region" "Not masked,Masked" setclrfld.long 0x00 0. 0x08 0. 0x04 0. " INV_APB ,APB register access occurs to an unimplemented register" "Not masked,Masked" group.byte 0x20++0x00 line.byte 0x00 "LOCK,Lock Register" bitfld.byte 0x00 0. " REGWRDIS ,XMPU registers lock" "Not locked,Locked" textline " " group.long 0x100++0x0F "Region 00" line.long 0x00 "R00_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R00_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R00_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R00_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x110++0x0F "Region 01" line.long 0x00 "R01_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R01_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R01_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R01_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x120++0x0F "Region 02" line.long 0x00 "R02_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R02_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R02_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R02_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x130++0x0F "Region 03" line.long 0x00 "R03_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R03_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R03_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R03_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x140++0x0F "Region 04" line.long 0x00 "R04_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R04_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R04_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R04_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x150++0x0F "Region 05" line.long 0x00 "R05_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R05_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R05_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R05_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x160++0x0F "Region 06" line.long 0x00 "R06_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R06_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R06_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R06_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x170++0x0F "Region 07" line.long 0x00 "R07_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R07_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R07_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R07_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x180++0x0F "Region 08" line.long 0x00 "R08_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R08_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R08_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R08_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x190++0x0F "Region 09" line.long 0x00 "R09_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R09_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R09_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R09_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x1A0++0x0F "Region 10" line.long 0x00 "R10_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R10_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R10_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R10_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x1B0++0x0F "Region 11" line.long 0x00 "R11_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R11_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R11_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R11_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x1C0++0x0F "Region 12" line.long 0x00 "R12_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R12_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R12_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R12_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x1D0++0x0F "Region 13" line.long 0x00 "R13_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R13_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R13_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R13_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x1E0++0x0F "Region 14" line.long 0x00 "R14_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R14_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R14_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R14_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x1F0++0x0F "Region 15" line.long 0x00 "R15_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R15_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R15_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R15_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" width 0x0B tree.end tree.end tree "DP (Display Port Subsystem)" tree "DP" base ad:0xFD4A0000 width 34. group.long 0x00++0x1B line.long 0x00 "DP_LINK_BW_SET,Link Bandwidth Register" hexmask.long.byte 0x00 0.--7. 1. " BW ,Sets the value of the main link bandwidth for the sink device" line.long 0x04 "DP_LANE_COUNT_SET,Lane Count Register" bitfld.long 0x04 0.--4. " LANE_CNT ,Lane count" ",1,2,?..." line.long 0x08 "DP_ENHANCED_FRAME_EN,Enhanced Framing Enable Register" bitfld.long 0x08 0. " ENH_FRAMING_EN ,Enable the enhanced framing symbol sequence" "Disabled,Enabled" line.long 0x0C "DP_TRAINING_PATTERN_SET,Training Pattern Force Register" bitfld.long 0x0C 0.--1. " TP_SET ,Sets the link training mode" "Off,Pattern 1,Pattern 2,Pattern 3" line.long 0x10 "DP_LINK_QUAL_PATTERN_SET,Link Quality Pattern Transmit Register" bitfld.long 0x10 2. " EXT ,Transmit HBR2 compliance pattern" "Not transmitted,Transmitted" bitfld.long 0x10 0.--1. " LNK_QUAL_PAT_SET ,Link quality pattern set" "Not transmitted,,Symbol error rate,?..." line.long 0x14 "DP_SCRAMBLING_DISABLE,Scrambling Disable Register" bitfld.long 0x14 0. " SCR_DIS ,Transmitter has disabled the scrambler and transmits all symbols" "No,Yes" line.long 0x18 "DP_DOWNSPREAD_CTRL,Down-spreading Control Register" bitfld.long 0x18 0. " DWNSPRD_CTL ,Down-spreading control" "Disabled,Enabled" wgroup.long 0x1C++0x03 line.long 0x00 "DP_SOFTWARE_RESET,Software Reset Register" bitfld.long 0x00 0. " SOFT_RST ,Soft video reset" "No reset,Reset" group.long 0x20++0x0B line.long 0x00 "DP_COMP_PATTERN_80BIT_1,DP_COMP_PATTERN_80BIT Register 1" line.long 0x04 "DP_COMP_PATTERN_80BIT_2,DP_COMP_PATTERN_80BIT Register 2" line.long 0x08 "DP_COMP_PATTERN_80BIT_3,DP_COMP_PATTERN_80BIT Register 3" hexmask.long.word 0x08 0.--15. 1. " BITS_79_64 ,Bits [79:64] of 80bit custom pattern" group.long 0x80++0x07 line.long 0x00 "DP_TRANSMITTER_ENABLE,Transmitter Enable Register" bitfld.long 0x00 0. " TX_EN ,Enable the basic operations of the transmitter" "Disabled,Enabled" line.long 0x04 "DP_MAIN_STREAM_ENABLE,Main Stream Enable Register" bitfld.long 0x04 0. " MS_ENABLE ,Enable the transmission of main link video information" "Disabled,Enabled" wgroup.long 0xC0++0x03 line.long 0x00 "DP_FORCE_SCRAMBLER_RESET,Force Scrambler Reset Register" bitfld.long 0x00 0. " FORCE_SCR_RESET ,Force a scrambler reset" "No reset,Reset" rgroup.long 0xF8++0x07 line.long 0x00 "DP_VERSION_REGISTER,Core Version Register" line.long 0x04 "DP_CORE_ID,Core ID Register" group.long 0x100++0x03 line.long 0x00 "DP_AUX_CMD_REGISTER,Command Register" bitfld.long 0x00 12. " ADDR_TRANSFER_EN ,Source will initiate address only transfers" "Disabled,Enabled" bitfld.long 0x00 8.--11. " AUD_CH_CMD ,AUD channel command" "IC write,IC read,IC write status,,IC write MOT,IC read MOT,,,AUX write,AUX read,?..." bitfld.long 0x00 0.--3. " NUM_OF_BYTES ,Number of bytes to transfer with the current command" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" wgroup.long 0x104++0x03 line.long 0x00 "DP_AUX_WRITE_FIFO,Write FIFO Register" hexmask.long.byte 0x00 0.--7. 1. " AUX_WRITE_FIFO ,AUX channel byte data" group.long 0x108++0x07 line.long 0x00 "DP_AUX_ADDRESS,AUX Channel Command Address Register" hexmask.long.tbyte 0x00 0.--19. 1. " AUX_ADDRESS ,Address for the start of the AUX channel burst" line.long 0x04 "DP_AUX_CLOCK_DIVIDER,Clock Divider Register" hexmask.long.byte 0x04 8.--15. 1. " AUX_SIG_WIDTH_FILTER ,The number of APB clocks equivalent to the recommended width of AUX pulse" hexmask.long.byte 0x04 0.--7. 1. " CLK_DIV ,Clock divider value" textline " " hgroup.long 0x110++0x03 hide.long 0x00 "DP_TX_USER_FIFO_OVERFLOW,User FIFO Overflow Register" in textline " " group.long 0x130++0x03 line.long 0x00 "DP_INTERRUPT_SIG_STATE,Interrupt Signal State Register" bitfld.long 0x00 3. " REPLY_TIMEOUT ,Reply timeout has occurred" "No interrupt,Interrupt" bitfld.long 0x00 2. " REPLY_STATE ,Reply is currently being received" "No interrupt,Interrupt" bitfld.long 0x00 1. " REQ_STATE ,Request is currently being sent" "No interrupt,Interrupt" textline " " bitfld.long 0x00 0. " HPD_STATE ,Raw state of the HPD pin on the DisplayPort connector" "No interrupt,Interrupt" rgroup.long 0x134++0x07 line.long 0x00 "DP_AUX_REPLY_DATA,Reply Data Register" hexmask.long.byte 0x00 0.--7. 1. " AUX_REPLY_DATA ,AUX reply data" line.long 0x04 "DP_AUX_REPLY_CODE,Reply Code Register" bitfld.long 0x04 2.--3. " CODE1 ,Code 1" "I2C ACK,I2C NACK,I2C DEFER,?..." bitfld.long 0x04 0.--1. " CODE0 ,Code 0" "AUX ACK,AUX NACK,AUX DEFER,?..." group.long 0x13C++0x03 line.long 0x00 "DP_AUX_REPLY_COUNT,Reply Count Register" hexmask.long.byte 0x00 0.--7. 1. " AUX_REPLY_COUNT ,Current reply count" rgroup.long 0x148++0x0B line.long 0x00 "DP_REPLY_DATA_COUNT,Reply Data Count Register" bitfld.long 0x00 0.--4. " REPLY_DATA_COUNT ,Total number of data bytes received during the reply phase of the AUX transaction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x04 "DP_REPLY_STATUS,Reply Status Register" hexmask.long.byte 0x04 4.--11. 1. " AUX_REPLY_STATE ,Internal AUX reply state machine status bits" bitfld.long 0x04 3. " REPLY_ERROR ,AUX reply logic has detected an error in the reply to the most recent AUX transaction" "No error,Error" bitfld.long 0x04 2. " REQ_IN_PROG ,Request in progress" "Not in progress,In progress" textline " " bitfld.long 0x04 1. " REPLY_IN_PROG ,Reply in progress" "Not in progress,In progress" bitfld.long 0x04 0. " REPLY_RECEIVED ,Reply received" "Not received,Received" textline " " line.long 0x08 "DP_HPD_DURATION,HPD Duration Register" hexmask.long.word 0x08 0.--15. 1. " HPD_DURATION ,Duration of the HPD pulse in microseconds" group.long 0x180++0x37 line.long 0x00 "DP_MAIN_STREAM_HTOTAL,Main Stream HTOTAL Register" hexmask.long.word 0x00 0.--15. 1. " HTOTAL ,Horizontal line length total in clocks" line.long 0x04 "DP_MAIN_STREAM_VTOTAL,Main Stream VTOTAL Register" hexmask.long.word 0x04 0.--15. 1. " VTOTAL ,Total number of lines per video frame" line.long 0x08 "DP_MAIN_STREAM_POLARITY,Main Stream Polarity Register" bitfld.long 0x08 1. " VSYNC_POLARITY ,Polarity of the vertical sync pulse" "Active-low,Active-high" bitfld.long 0x08 0. " HSYNC_POLARITY ,Polarity of the horizontal sync pulse" "Active-low,Active-high" line.long 0x0C "DP_MAIN_STREAM_HSWIDTH,Main Stream Horizontal Sync Pulse Width Register" hexmask.long.word 0x0C 0.--14. 1. " HSWIDTH ,Horizontal sync width in clock cycles" line.long 0x10 "DP_MAIN_STREAM_VSWIDTH,Main Stream Vertical Sync Pulse Width Register" hexmask.long.word 0x10 0.--14. 1. " VSWIDTH ,Vertical sync width in clock cycles" line.long 0x14 "DP_MAIN_STREAM_HRES,Main Stream Horizontal Resolution Register" hexmask.long.word 0x14 0.--15. 1. " HRES ,Number of active pixels per line of the main stream video" line.long 0x18 "DP_MAIN_STREAM_VRES,Main Stream Vertical Resolution Register" hexmask.long.word 0x18 0.--15. 1. " VRES ,Number of active pixels per line of the main stream video" line.long 0x1C "DP_MAIN_STREAM_HSTART,Main Stream Horizontal Start Register" hexmask.long.word 0x1C 0.--15. 1. " HSTART ,Horizontal start clock count" line.long 0x20 "DP_MAIN_STREAM_VSTART,Main Stream Vertical Start Register" hexmask.long.word 0x20 0.--15. 1. " VSTART ,Vertical start clock count" line.long 0x24 "DP_MAIN_STREAM_MISC0,Miscellaneous Stream Attributes Register 0" bitfld.long 0x24 5.--7. " BPC ,Bit depth per color/component" "0,1,2,3,4,5,6,7" bitfld.long 0x24 4. " YCBCR_COLR ,Ycbcr colorimetry" "0,1" bitfld.long 0x24 3. " DYNC_RANGE ,Dynamic range" "0,1" textline " " bitfld.long 0x24 1.--2. " COMP_FORMAT ,Component format" "0,1,2,3" bitfld.long 0x24 0. " SYNC_CLOCK ,Synchronous clock" "0,1" line.long 0x28 "DP_MAIN_STREAM_MISC1,Miscellaneous Stream Attributes Register 1" bitfld.long 0x28 7. " Y_ONLY_EN ,Y only enable" "Disabled,Enabled" bitfld.long 0x28 1.--2. " STEREO_VID_ATTR ,Stereo video attribute" "0,1,2,3" line.long 0x2C "DP_MAIN_STREAM_M_VID,Main Stream M Value Register" hexmask.long.tbyte 0x2C 0.--23. 1. " M_VID ,Unsigned value computed in the asynchronous clock mode" line.long 0x30 "DP_MSA_TRANSFER_UNIT_SIZE,MSA Transfer Unit Size Register" hexmask.long.byte 0x30 0.--6. 1. " TU_SIZE ,Transfer unit size" line.long 0x34 "DP_MAIN_STREAM_N_VID,Mmain Stream N Value Register" hexmask.long.tbyte 0x34 0.--23. 1. " N_VID ,Unsigned value computed in the asynchronous clock mode" rgroup.long 0x1B8++0x03 line.long 0x00 "DP_MAIN_STREAM_HTOTAL,User Pixel Width Size Register" bitfld.long 0x00 0.--1. " PIX_WIDTH ,DP tx core is used in single pixel mode" "0,1,2,3" group.long 0x1BC++0x03 line.long 0x00 "DP_USER_DATA_COUNT_PER_LANE,User Data Count Per Lane Register" hexmask.long.tbyte 0x00 0.--17. 1. " DATA_CNT_PER_LANE ,User data count per lane" group.long 0x1C4++0x0F line.long 0x00 "DP_MIN_BYTES_PER_TU,Min Number Of Bytes Per Transfer Unit Register" hexmask.long.byte 0x00 0.--6. 1. " MIN_BYTES_PER_TU ,MIN number of bytes per transfer unit" line.long 0x04 "DP_FRAC_BYTES_PER_TU,Fractional Part Of The Min Number Of Bytes Per Transfer Unit Register" hexmask.long.word 0x04 0.--9. 1. " FRACT_BYTES_PER_TU ,Fractional part of the min number of bytes per transfer unit" line.long 0x08 "DP_INIT_WAIT,Initial Wait Cycles Register" hexmask.long.byte 0x08 0.--6. 1. " INIT_WAIT ,Number of initial wait cycles at the start of a new line by the framing logic" group.long 0x200++0x03 line.long 0x00 "DP_PHY_RESET,Transmitter PHY Reset Register" bitfld.long 0x00 16. " EN_8B_10B ,Enable/disable 8B/10B encoding from GT" "Disabled,Enabled" bitfld.long 0x00 1. " GT_RESET ,GT reset" "No reset,Reset" group.long 0x220++0x07 line.long 0x00 "DP_PHY_VOLTAGE_DIFF_LANE_0,Differential Voltage Swing For Lane 0 Register" bitfld.long 0x00 0.--3. " VDIFF0 ,Differential voltage swing for lane 0 of the DisplayPort link" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "DP_PHY_VOLTAGE_DIFF_LANE_1,Differential Voltage Swing For Lane 1 Register" bitfld.long 0x04 0.--3. " VDIFF1 ,Differential voltage swing for lane 1 of the DisplayPort link" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x230++0x13 line.long 0x00 "DP_TRANSMIT_PRBS7,Pseudo Random Bit Sequence 7 Enabled Register" bitfld.long 0x00 0. " TX_PRBS7 ,Enable the transmission of the sequence" "Disabled,Enabled" line.long 0x04 "DP_PHY_CLOCK_SELECT,Phy Clock Select Register" bitfld.long 0x04 0.--2. " SEL ,Clock select" ",1.62 Gb/s,,2.70 Gb/s,,5.40 Gb/s,?..." line.long 0x08 "DP_TX_PHY_POWER_DOWN,PHY Power Down Register" bitfld.long 0x08 2.--3. " POWER_DWN[3:2] ,PHY lane 1 power down" "Active state,,,Power down" bitfld.long 0x08 0.--1. " [1:0] ,PHY lane 0 power down" "Active state,,,Power down" line.long 0x0C "DP_PHY_POSTCURSOR_LANE_0,Post-cursor Level For Lane 0 Register" bitfld.long 0x0C 0.--4. " POSTCURSOR0 ,Controls the post-cursor level for lane 0 of the transmitter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x10 "DP_PHY_POSTCURSOR_LANE_1,Post-cursor Level For Lane 1 Register" bitfld.long 0x10 0.--4. " POSTCURSOR1 ,Controls the post-cursor level for lane 1 of the transmitter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x24C++0x07 line.long 0x00 "DP_PHY_PRECURSOR_LANE_0,Pre-cursor Level For Lane 0 Register" bitfld.long 0x00 0.--4. " PRECURSOR0 ,Controls the pre-cursor level for lane 0 of the transmitter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x04 "DP_PHY_PRECURSOR_LANE_1,Pre-cursor Level For Lane 1 Register" bitfld.long 0x04 0.--4. " PRECURSOR1 ,Controls the pre-cursor level for lane 1 of the transmitter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x280++0x03 line.long 0x00 "DP_PHY_STATUS,PHY Status Register" bitfld.long 0x00 4. " PLL_LOCKED ,GT PLL locked status" "Not locked,Locked" bitfld.long 0x00 3. " RATE_CHANGE_DONE1 ,Received PHYSTATUS pulse from GT after rate change request from lane 1" "Not received,Received" bitfld.long 0x00 2. " RATE_CHANGE_DONE0 ,Received PHYSTATUS pulse from GT after rate change request from lane 0" "Not received,Received" textline " " bitfld.long 0x00 1. " RESET_LANE1 ,Reset done for lane 1" "Not done,Done" bitfld.long 0x00 0. " RESET_LANE0 ,Reset done for lane 0" "Not done,Done" group.long 0x300++0x07 line.long 0x00 "DP_TX_AUDIO_CONTROL,TX Audio Control Register" bitfld.long 0x00 0. " TX_AUD_CTRL ,Audio enable" "Disabled,Enabled" line.long 0x04 "DP_TX_AUDIO_CHANNELS,TX Channel Count Register" bitfld.long 0x04 0. " TX_AUD_CH ,Channel count" "0,1" wgroup.long 0x308++0x1F line.long 0x00 "DP_TX_AUDIO_INFO_DATA0,TX Audio Info Data Register 0" line.long 0x04 "DP_TX_AUDIO_INFO_DATA1,TX Audio Info Data Register 1" line.long 0x08 "DP_TX_AUDIO_INFO_DATA2,TX Audio Info Data Register 2" line.long 0x0C "DP_TX_AUDIO_INFO_DATA3,TX Audio Info Data Register 3" line.long 0x10 "DP_TX_AUDIO_INFO_DATA4,TX Audio Info Data Register 4" line.long 0x14 "DP_TX_AUDIO_INFO_DATA5,TX Audio Info Data Register 5" line.long 0x18 "DP_TX_AUDIO_INFO_DATA6,TX Audio Info Data Register 6" line.long 0x1C "DP_TX_AUDIO_INFO_DATA7,TX Audio Info Data Register 7" group.long 0x328++0x07 line.long 0x00 "DP_TX_M_AUD,TX Audio M Value Register" hexmask.long.tbyte 0x00 0.--23. 1. " MAUD ,Unsigned value computed when audio clock and link clock are synchronous" line.long 0x04 "DP_TX_N_AUD,TX Audio N Value Register" hexmask.long.tbyte 0x04 0.--23. 1. " NAUD ,Unsigned value computed when audio clock and link clock are synchronous" wgroup.long 0x330++0x23 line.long 0x00 "DP_TX_AUDIO_EXT_DATA0,TX Audio Data Extension Register 0" line.long 0x04 "DP_TX_AUDIO_EXT_DATA1,TX Audio Data Extension Register 1" line.long 0x08 "DP_TX_AUDIO_EXT_DATA2,TX Audio Data Extension Register 2" line.long 0x0C "DP_TX_AUDIO_EXT_DATA3,TX Audio Data Extension Register 3" line.long 0x10 "DP_TX_AUDIO_EXT_DATA4,TX Audio Data Extension Register 4" line.long 0x14 "DP_TX_AUDIO_EXT_DATA5,TX Audio Data Extension Register 5" line.long 0x18 "DP_TX_AUDIO_EXT_DATA6,TX Audio Data Extension Register 6" line.long 0x1C "DP_TX_AUDIO_EXT_DATA7,TX Audio Data Extension Register 7" line.long 0x20 "DP_TX_AUDIO_EXT_DATA8,TX Audio Data Extension Register 8" textline " " group.long 0x3A0++0x03 line.long 0x00 "DP_INT_STATUS,Interrupt Status Register" eventfld.long 0x00 31. " VSYNC_TS ,VSYNC timestamp available" "No interrupt,Interrupt" eventfld.long 0x00 30. " EXT_VSYNC_TS ,External VSYNC has triggered timestamp" "No interrupt,Interrupt" eventfld.long 0x00 29. " CUST_TS ,User defined custom event has triggered timestamp" "No interrupt,Interrupt" textline " " eventfld.long 0x00 28. " CUST_TS_2 ,User defined custom event 2 has triggered timestamp" "No interrupt,Interrupt" eventfld.long 0x00 27. " CHBUF0_OVERFLW ,AV buffer manager channel buffer 0 overflow" "No interrupt,Interrupt" eventfld.long 0x00 26. " CHBUF1_OVERFLW ,AV buffer manager channel buffer 1 overflow" "No interrupt,Interrupt" textline " " eventfld.long 0x00 25. " CHBUF2_OVERFLW ,AV buffer manager channel buffer 2 overflow" "No interrupt,Interrupt" eventfld.long 0x00 24. " CHBUF3_OVERFLW ,AV buffer manager channel buffer 3 overflow" "No interrupt,Interrupt" eventfld.long 0x00 23. " CHBUF4_OVERFLW ,AV buffer manager channel buffer 4 overflow" "No interrupt,Interrupt" textline " " eventfld.long 0x00 22. " CHBUF5_OVERFLW ,AV buffer manager channel buffer 5 overflow" "No interrupt,Interrupt" eventfld.long 0x00 21. " CHBUF0_UNDERFLW ,AV buffer manager channel buffer 0 underflow" "No interrupt,Interrupt" eventfld.long 0x00 20. " CHBUF1_UNDERFLW ,AV buffer manager channel buffer 1 underflow" "No interrupt,Interrupt" textline " " eventfld.long 0x00 19. " CHBUF2_UNDERFLW ,AV buffer manager channel buffer 2 underflow" "No interrupt,Interrupt" eventfld.long 0x00 18. " CHBUF3_UNDERFLW ,AV buffer manager channel buffer 3 underflow" "No interrupt,Interrupt" eventfld.long 0x00 17. " CHBUF4_UNDERFLW ,AV buffer manager channel buffer 4 underflow" "No interrupt,Interrupt" textline " " eventfld.long 0x00 16. " CHBUF5_UNDERFLW ,AV buffer manager channel buffer 5 underflow" "No interrupt,Interrupt" eventfld.long 0x00 15. " PIXEL0_MATCH ,VCOUNT and HCOUNT programmed in B074 matches early VCOUNT" "No interrupt,Interrupt" eventfld.long 0x00 14. " PIXEL1_MATCH ,VCOUNT and HCOUNT programmed in B078 matches early VCOUNT" "No interrupt,Interrupt" textline " " eventfld.long 0x00 13. " VBLNK_START ,Interrupt at start of early vertical blanking" "No interrupt,Interrupt" eventfld.long 0x00 12. " LIV_ABUF_UNDRFLW ,Live audio enabled but the input from PL is not matching audio sample rate" "No interrupt,Interrupt" eventfld.long 0x00 5. " EXT_PKT_TXD ,Extended packet is transmitted and controller is ready to accept new packet" "No interrupt,Interrupt" textline " " eventfld.long 0x00 4. " HPD_PULSE_DET ,A pulse on the HPD line was detected" "No interrupt,Interrupt" eventfld.long 0x00 3. " REPLY_TIMEOUT ,A reply timeout has occurred" "No interrupt,Interrupt" eventfld.long 0x00 2. " REPLY_RECEIVED ,An AUX reply transaction has been detected" "No interrupt,Interrupt" textline " " eventfld.long 0x00 1. " HPD_EVENT ,Detection of HPD or loss of HPD" "No interrupt,Interrupt" eventfld.long 0x00 0. " HPD_IRQ ,An interrupt is with proper timing is received on HPD" "No interrupt,Interrupt" group.long 0x3A4++0x03 line.long 0x00 "DP_INT_MASK_SET/CLR,Interrupt Mask Register" setclrfld.long 0x00 31. 0x08 31. 0x04 31. " VSYNC_TS ,VSYNC timestamp available" "Not masked,Masked" setclrfld.long 0x00 30. 0x08 30. 0x04 30. " EXT_VSYNC_TS ,External VSYNC has triggered timestamp" "Not masked,Masked" setclrfld.long 0x00 29. 0x08 29. 0x04 29. " CUST_TS ,User defined custom event has triggered timestamp" "Not masked,Masked" textline " " setclrfld.long 0x00 28. 0x08 28. 0x04 28. " CUST_TS_2 ,User defined custom event 2 has triggered timestamp" "Not masked,Masked" setclrfld.long 0x00 27. 0x08 27. 0x04 27. " CHBUF0_OVERFLW ,AV buffer manager channel buffer 0 overflow" "Not masked,Masked" setclrfld.long 0x00 26. 0x08 26. 0x04 26. " CHBUF1_OVERFLW ,AV buffer manager channel buffer 1 overflow" "Not masked,Masked" textline " " setclrfld.long 0x00 25. 0x08 25. 0x04 25. " CHBUF2_OVERFLW ,AV buffer manager channel buffer 2 overflow" "Not masked,Masked" setclrfld.long 0x00 24. 0x08 24. 0x04 24. " CHBUF3_OVERFLW ,AV buffer manager channel buffer 3 overflow" "Not masked,Masked" setclrfld.long 0x00 23. 0x08 23. 0x04 23. " CHBUF4_OVERFLW ,AV buffer manager channel buffer 4 overflow" "Not masked,Masked" textline " " setclrfld.long 0x00 22. 0x08 22. 0x04 22. " CHBUF5_OVERFLW ,AV buffer manager channel buffer 5 overflow" "Not masked,Masked" setclrfld.long 0x00 21. 0x08 21. 0x04 21. " CHBUF0_UNDERFLW ,AV buffer manager channel buffer 0 underflow" "Not masked,Masked" setclrfld.long 0x00 20. 0x08 20. 0x04 20. " CHBUF1_UNDERFLW ,AV buffer manager channel buffer 1 underflow" "Not masked,Masked" textline " " setclrfld.long 0x00 19. 0x08 19. 0x04 19. " CHBUF2_UNDERFLW ,AV buffer manager channel buffer 2 underflow" "Not masked,Masked" setclrfld.long 0x00 18. 0x08 18. 0x04 18. " CHBUF3_UNDERFLW ,AV buffer manager channel buffer 3 underflow" "Not masked,Masked" setclrfld.long 0x00 17. 0x08 17. 0x04 17. " CHBUF4_UNDERFLW ,AV buffer manager channel buffer 4 underflow" "Not masked,Masked" textline " " setclrfld.long 0x00 16. 0x08 16. 0x04 16. " CHBUF5_UNDERFLW ,AV buffer manager channel buffer 5 underflow" "Not masked,Masked" setclrfld.long 0x00 15. 0x08 15. 0x04 15. " PIXEL0_MATCH ,VCOUNT and HCOUNT programmed in B074 matches early VCOUNT" "Not masked,Masked" setclrfld.long 0x00 14. 0x08 14. 0x04 14. " PIXEL1_MATCH ,VCOUNT and HCOUNT programmed in B078 matches early VCOUNT" "Not masked,Masked" textline " " setclrfld.long 0x00 13. 0x08 13. 0x04 13. " VBLNK_START ,Interrupt at start of early vertical blanking" "Not masked,Masked" setclrfld.long 0x00 12. 0x08 12. 0x04 12. " LIV_ABUF_UNDRFLW ,Live audio enabled but the input from PL is not matching audio sample rate" "Not masked,Masked" setclrfld.long 0x00 5. 0x08 5. 0x04 5. " EXT_PKT_TXD ,Extended packet is transmitted and controller is ready to accept new packet" "Not masked,Masked" textline " " setclrfld.long 0x00 4. 0x08 4. 0x04 4. " HPD_PULSE_DET ,A pulse on the HPD line was detected" "Not masked,Masked" setclrfld.long 0x00 3. 0x08 3. 0x04 3. " REPLY_TIMEOUT ,A reply timeout has occurred" "Not masked,Masked" setclrfld.long 0x00 2. 0x08 2. 0x04 2. " REPLY_RECEIVED ,An AUX reply transaction has been detected" "Not masked,Masked" textline " " setclrfld.long 0x00 1. 0x08 1. 0x04 1. " HPD_EVENT ,Detection of HPD or loss of HPD" "Not masked,Masked" setclrfld.long 0x00 0. 0x08 0. 0x04 0. " HPD_IRQ ,An interrupt is with proper timing is received on HPD" "Not masked,Masked" group.long 0xA000++0x0F line.long 0x00 "V_BLEND_BG_CLR_0,Blended Background Color Register 0" hexmask.long.word 0x00 0.--11. 1. " CLR0 ,Set R/Cr value" line.long 0x04 "V_BLEND_BG_CLR_1,Blended Background Color Register 1" hexmask.long.word 0x04 0.--11. 1. " CLR1 ,Set G/Y value" line.long 0x08 "V_BLEND_BG_CLR_2,Blended Background Color Register 2" hexmask.long.word 0x08 0.--11. 1. " CLR2 ,Set B/Cb value" line.long 0x0C "V_BLEND_SET_GLOBAL_ALPHA_REG,Blended Global Alpha Register" hexmask.long.byte 0x0C 1.--8. 1. " VALUE ,Global alpha value" bitfld.long 0x0C 0. " EN ,Global alpha enable" "Disabled,Enabled" group.long 0xA014++0x9B line.long 0x00 "V_BLEND_OUTPUT_VID_FORMAT,Blended Output Video Format Register" bitfld.long 0x00 4. " EN_DOWNSAMPLE ,Downsampling on blender output" "Disabled,Enabled" bitfld.long 0x00 0.--2. " VID_FORMAT ,Blended video format" "RGB,YCbCr444,YCbCr422,Y-only,?..." line.long 0x04 "V_BLEND_LAYER0_CONTROL,Blended Layer 0 Control Register" bitfld.long 0x04 8. " BYPASS ,Layer 0 passed through as the blender out" "No bypass,Bypass" bitfld.long 0x04 1. " RGB_MODE ,RGB mode enable" "Disabled,Enabled" bitfld.long 0x04 0. " EN_US ,Sampler enable" "Disabled,Enabled" line.long 0x08 "V_BLEND_LAYER1_CONTROL,Blended Layer 1 Control Register" bitfld.long 0x08 8. " BYPASS ,Layer 1 passed through as the blender out" "No bypass,Bypass" bitfld.long 0x08 1. " RGB_MODE ,RGB mode enable" "Disabled,Enabled" bitfld.long 0x08 0. " EN_US ,Sampler enable" "Disabled,Enabled" line.long 0x0C "V_BLEND_RGB2YCBCR_COEFF0,Blended RGB2YCBCR Coefficient Value 0 Register" hexmask.long.word 0x0C 0.--14. 1. " RGB2Y_C0 ,RGB2YCBCR coefficient value 0" line.long 0x10 "V_BLEND_RGB2YCBCR_COEFF1,Blended RGB2YCBCR Coefficient Value 1 Register" hexmask.long.word 0x10 0.--14. 1. " RGB2Y_C1 ,RGB2YCBCR coefficient value 1" line.long 0x14 "V_BLEND_RGB2YCBCR_COEFF2,Blended RGB2YCBCR Coefficient Value 2 Register" hexmask.long.word 0x14 0.--14. 1. " RGB2Y_C2 ,RGB2YCBCR coefficient value 2" line.long 0x18 "V_BLEND_RGB2YCBCR_COEFF3,Blended RGB2YCBCR Coefficient Value 3 Register" hexmask.long.word 0x18 0.--14. 1. " RGB2Y_C3 ,RGB2YCBCR coefficient value 3" line.long 0x1C "V_BLEND_RGB2YCBCR_COEFF4,Blended RGB2YCBCR Coefficient Value 4 Register" hexmask.long.word 0x1C 0.--14. 1. " RGB2Y_C4 ,RGB2YCBCR coefficient value 4" line.long 0x20 "V_BLEND_RGB2YCBCR_COEFF5,Blended RGB2YCBCR Coefficient Value 5 Register" hexmask.long.word 0x20 0.--14. 1. " RGB2Y_C5 ,RGB2YCBCR coefficient value 5" line.long 0x24 "V_BLEND_RGB2YCBCR_COEFF6,Blended RGB2YCBCR Coefficient Value 6 Register" hexmask.long.word 0x24 0.--14. 1. " RGB2Y_C6 ,RGB2YCBCR coefficient value 6" line.long 0x28 "V_BLEND_RGB2YCBCR_COEFF7,Blended RGB2YCBCR Coefficient Value 7 Register" hexmask.long.word 0x28 0.--14. 1. " RGB2Y_C7 ,RGB2YCBCR coefficient value 7" line.long 0x2C "V_BLEND_RGB2YCBCR_COEFF8,Blended RGB2YCBCR Coefficient Value 8 Register" hexmask.long.word 0x2C 0.--14. 1. " RGB2Y_C8 ,RGB2YCBCR coefficient value 8" line.long 0x30 "V_BLEND_IN1CSC_COEFF0,Blended IN1CSC Coefficient Value 0 Register" hexmask.long.word 0x30 0.--14. 1. " Y2R_C0 ,IN1CSC coefficient value 0" line.long 0x34 "V_BLEND_IN1CSC_COEFF1,Blended IN1CSC Coefficient Value 1 Register" hexmask.long.word 0x34 0.--14. 1. " Y2R_C1 ,IN1CSC coefficient value 1" line.long 0x38 "V_BLEND_IN1CSC_COEFF2,Blended IN1CSC Coefficient Value 2 Register" hexmask.long.word 0x38 0.--14. 1. " Y2R_C2 ,IN1CSC coefficient value 2" line.long 0x3C "V_BLEND_IN1CSC_COEFF3,Blended IN1CSC Coefficient Value 3 Register" hexmask.long.word 0x3C 0.--14. 1. " Y2R_C3 ,IN1CSC coefficient value 3" line.long 0x40 "V_BLEND_IN1CSC_COEFF4,Blended IN1CSC Coefficient Value 4 Register" hexmask.long.word 0x40 0.--14. 1. " Y2R_C4 ,IN1CSC coefficient value 4" line.long 0x44 "V_BLEND_IN1CSC_COEFF5,Blended IN1CSC Coefficient Value 5 Register" hexmask.long.word 0x44 0.--14. 1. " Y2R_C5 ,IN1CSC coefficient value 5" line.long 0x48 "V_BLEND_IN1CSC_COEFF6,Blended IN1CSC Coefficient Value 6 Register" hexmask.long.word 0x48 0.--14. 1. " Y2R_C6 ,IN1CSC coefficient value 6" line.long 0x4C "V_BLEND_IN1CSC_COEFF7,Blended IN1CSC Coefficient Value 7 Register" hexmask.long.word 0x4C 0.--14. 1. " Y2R_C7 ,IN1CSC coefficient value 7" line.long 0x50 "V_BLEND_IN1CSC_COEFF8,Blended IN1CSC Coefficient Value 8 Register" hexmask.long.word 0x50 0.--14. 1. " Y2R_C8 ,IN1CSC coefficient value 8" line.long 0x54 "V_BLEND_LUMA_IN1CSC_OFFSET,Blended Luma IN1CSC Offset Register" hexmask.long.word 0x54 16.--28. 1. " POST_OFFSET ,Signed representation of post matrix offset for color component 0" hexmask.long.word 0x54 0.--12. 1. " PRE_OFFSET ,Signed representation of offset for color component 0" line.long 0x58 "V_BLEND_CR_IN1CSC_OFFSET,Blended Cr IN1CSC Offset Register" hexmask.long.word 0x58 16.--28. 1. " POST_OFFSET ,Signed representation of post matrix offset for color component 1" hexmask.long.word 0x58 0.--12. 1. " PRE_OFFSET ,Signed representation of offset for color component 1" line.long 0x5C "V_BLEND_CB_IN1CSC_OFFSET,Blended Cb IN1CSC Offset Register" hexmask.long.word 0x5C 16.--28. 1. " POST_OFFSET ,Signed representation of post matrix offset for color component 2" hexmask.long.word 0x5C 0.--12. 1. " PRE_OFFSET ,Signed representation of offset for color component 2" line.long 0x60 "V_BLEND_LUMA_OUTCSC_OFFSET,Blended Luma OUTCSC Offset Register" hexmask.long.word 0x60 16.--28. 1. " POST_OFFSET ,Signed representation of post matrix offset for color component 0" hexmask.long.word 0x60 0.--12. 1. " PRE_OFFSET ,Signed representation of offset for color component 0" line.long 0x64 "V_BLEND_CR_OUTCSC_OFFSET,Blended Cr OUTCSC Offset Register" hexmask.long.word 0x64 16.--28. 1. " POST_OFFSET ,Signed representation of post matrix offset for color component 1" hexmask.long.word 0x64 0.--12. 1. " PRE_OFFSET ,Signed representation of offset for color component 1" line.long 0x68 "V_BLEND_CB_OUTCSC_OFFSET,Blended Cb OUTCSC Offset Register" hexmask.long.word 0x68 16.--28. 1. " POST_OFFSET ,Signed representation of post matrix offset for color component 2" hexmask.long.word 0x68 0.--12. 1. " PRE_OFFSET ,Signed representation of offset for color component 2" line.long 0x6C "V_BLEND_IN2CSC_COEFF0,Blended IN1CSC Coefficient Value 0 Register" hexmask.long.word 0x6C 0.--14. 1. " Y2R_C0 ,IN1CSC coefficient value 0" line.long 0x70 "V_BLEND_IN2CSC_COEFF1,Blended IN1CSC Coefficient Value 1 Register" hexmask.long.word 0x70 0.--14. 1. " Y2R_C1 ,IN1CSC coefficient value 1" line.long 0x74 "V_BLEND_IN2CSC_COEFF2,Blended IN1CSC Coefficient Value 2 Register" hexmask.long.word 0x74 0.--14. 1. " Y2R_C2 ,IN1CSC coefficient value 2" line.long 0x78 "V_BLEND_IN2CSC_COEFF3,Blended IN1CSC Coefficient Value 3 Register" hexmask.long.word 0x78 0.--14. 1. " Y2R_C3 ,IN1CSC coefficient value 3" line.long 0x7C "V_BLEND_IN2CSC_COEFF4,Blended IN1CSC Coefficient Value 4 Register" hexmask.long.word 0x7C 0.--14. 1. " Y2R_C4 ,IN1CSC coefficient value 4" line.long 0x80 "V_BLEND_IN2CSC_COEFF5,Blended IN1CSC Coefficient Value 5 Register" hexmask.long.word 0x80 0.--14. 1. " Y2R_C5 ,IN1CSC coefficient value 5" line.long 0x84 "V_BLEND_IN2CSC_COEFF6,Blended IN1CSC Coefficient Value 6 Register" hexmask.long.word 0x84 0.--14. 1. " Y2R_C6 ,IN1CSC coefficient value 6" line.long 0x88 "V_BLEND_IN2CSC_COEFF7,Blended IN1CSC Coefficient Value 7 Register" hexmask.long.word 0x88 0.--14. 1. " Y2R_C7 ,IN1CSC coefficient value 7" line.long 0x8C "V_BLEND_IN2CSC_COEFF8,Blended IN1CSC Coefficient Value 8 Register" hexmask.long.word 0x8C 0.--14. 1. " Y2R_C8 ,IN1CSC coefficient value 8" line.long 0x90 "V_BLEND_LUMA_IN2CSC_OFFSET,Blended Luma IN2CSC Offset Register" hexmask.long.word 0x90 16.--28. 1. " POST_OFFSET ,Signed representation of post matrix offset for color component 0" hexmask.long.word 0x90 0.--12. 1. " PRE_OFFSET ,Signed representation of offset for color component 0" line.long 0x94 "V_BLEND_CR_IN2CSC_OFFSET,Blended Cr IN2CSC Offset Register" hexmask.long.word 0x94 16.--28. 1. " POST_OFFSET ,Signed representation of post matrix offset for color component 1" hexmask.long.word 0x94 0.--12. 1. " PRE_OFFSET ,Signed representation of offset for color component 1" line.long 0x98 "V_BLEND_CB_IN2CSC_OFFSET,Blended Cb IN2CSC Offset Register" hexmask.long.word 0x98 16.--28. 1. " POST_OFFSET ,Signed representation of post matrix offset for color component 2" hexmask.long.word 0x98 0.--12. 1. " PRE_OFFSET ,Signed representation of offset for color component 2" group.long 0xA1D0++0x0F line.long 0x00 "V_BLEND_CHROMA_KEY_ENABLE,Blended Chroma Key Enable Register" bitfld.long 0x00 1. " M_SEL ,Master select" "Stream 1,Stream 0" bitfld.long 0x00 0. " EN ,Chroma keying enable" "Disabled,Enabled" line.long 0x04 "V_BLEND_CHROMA_KEY_COMP1,Blended Chroma Key Component 1 Register" hexmask.long.word 0x04 16.--27. 1. " MAX ,R component of the key maximum value" hexmask.long.word 0x04 0.--11. 1. " MIN ,R component of the key minimum value" line.long 0x08 "V_BLEND_CHROMA_KEY_COMP2,Blended Chroma Key Component 2 Register" hexmask.long.word 0x08 16.--27. 1. " MAX ,G component of the key maximum value" hexmask.long.word 0x08 0.--11. 1. " MIN ,G component of the key minimum value" line.long 0x0C "V_BLEND_CHROMA_KEY_COMP3,Blended Chroma Key Component 3 Register" hexmask.long.word 0x0C 16.--27. 1. " MAX ,B component of the key maximum value" hexmask.long.word 0x0C 0.--11. 1. " MIN ,B component of the key minimum value" textline " " group.long 0xB000++0x03 line.long 0x00 "AV_BUF_FORMAT,AV Buffer Format Register" bitfld.long 0x00 8.--11. " NL_GRAPHX_FORMAT ,Graphics format" "RGBA8888,ABGR8888,RGB888,BGR888,RGBA5551,RGBA4444,RGB565,8BPP,4BPP,2BPP,1BPP,?..." bitfld.long 0x00 0.--4. " NL_VID_FORMAT ,Video format" "Cb-Y0-Cr-Y1,Cr-Y0-Cb-Y1,Y0-Cr-Y1-Cb,Y0-Cb-Y1-Cr,YV16,YV24,Yv16ci,Monochrome,Yv16ci2,YUV444,RGB888,RGBA8880,VID_RGB888_10BPC,VID_YUV444_10BPC,YV16CI2_10BPC,YV16CI_10BPC,YV16_10BPC,YV24_10BPC,Y_ONLY_10BPC,YV16_420,YV16CI_420,Yv16ci2_420,YV16_420_10BPC,Yv16ci_420_10bpc,YV16CI2_420_10BPC,?..." textline " " group.long 0xB008++0x03 line.long 0x00 "AV_BUF_NON_LIVE_LATENCY,Memory Fetch Latency Register" hexmask.long.word 0x00 0.--9. 1. " NL_LATENCY ,The memory fetch latency" group.long 0xB010++0x03 line.long 0x00 "AV_CHBUF0,Channel 0 Enable, Flush And Burst Length Register" bitfld.long 0x00 2.--6. " BURST_LEN ,Burst length" "1,2,,4,,,,8,,,,,,,,16,?..." bitfld.long 0x00 1. " FLUSH ,Flush" "No flush,Flush" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" group.long 0xB014++0x03 line.long 0x00 "AV_CHBUF1,Channel 1 Enable, Flush And Burst Length Register" bitfld.long 0x00 2.--6. " BURST_LEN ,Burst length" "1,2,,4,,,,8,,,,,,,,16,?..." bitfld.long 0x00 1. " FLUSH ,Flush" "No flush,Flush" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" group.long 0xB018++0x03 line.long 0x00 "AV_CHBUF2,Channel 2 Enable, Flush And Burst Length Register" bitfld.long 0x00 2.--6. " BURST_LEN ,Burst length" "1,2,,4,,,,8,,,,,,,,16,?..." bitfld.long 0x00 1. " FLUSH ,Flush" "No flush,Flush" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" group.long 0xB01C++0x03 line.long 0x00 "AV_CHBUF3,Channel 3 Enable, Flush And Burst Length Register" bitfld.long 0x00 2.--6. " BURST_LEN ,Burst length" "1,2,,4,,,,8,,,,,,,,16,?..." bitfld.long 0x00 1. " FLUSH ,Flush" "No flush,Flush" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" group.long 0xB020++0x03 line.long 0x00 "AV_CHBUF4,Channel 4 Enable, Flush And Burst Length Register" bitfld.long 0x00 2.--6. " BURST_LEN ,Burst length" "1,2,,4,,,,8,,,,,,,,16,?..." bitfld.long 0x00 1. " FLUSH ,Flush" "No flush,Flush" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" group.long 0xB024++0x03 line.long 0x00 "AV_CHBUF5,Channel 5 Enable, Flush And Burst Length Register" bitfld.long 0x00 2.--6. " BURST_LEN ,Burst length" "1,2,,4,,,,8,,,,,,,,16,?..." bitfld.long 0x00 1. " FLUSH ,Flush" "No flush,Flush" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" group.long 0xB02C++0x0F line.long 0x00 "AV_BUF_STC_CONTROL,STC Control Register" bitfld.long 0x00 0. " EN ,Enable" "Enabled,Cleared" line.long 0x04 "AV_BUF_STC_INIT_VALUE0,Buffer STC Initial Value 0 Register" line.long 0x08 "AV_BUF_STC_INIT_VALUE1,Buffer STC Initial Value 1 Register" hexmask.long.word 0x08 0.--9. 1. " INIT_VALUE1 ,Initial Value-most significant 10bits of STC" line.long 0x0C "AV_BUF_STC_ADJ,STC Adjust Register" bitfld.long 0x0C 31. " SIGN ,Sign value to increment/decrement" "0,1" hexmask.long 0x0C 0.--30. 1. " VALUE ,STC adjust value" rgroup.long 0xB03C++0x1F line.long 0x00 "AV_BUF_STC_VIDEO_VSYNC_TS_REG0,STC Video VSYNC TS Register 0" line.long 0x04 "AV_BUF_STC_VIDEO_VSYNC_TS_REG1,STC Video VSYNC TS Register 1" hexmask.long.word 0x04 0.--9. 1. " VSYNC_TS1 ,Bits [41:32] of VSYNC TS" line.long 0x08 "AV_BUF_STC_EXT_VSYNC_TS_REG0,STC External VSYNC TS Register 0" line.long 0x0C "AV_BUF_STC_EXT_VSYNC_TS_REG1,STC External VSYNC TS Register 1" hexmask.long.word 0x0C 0.--9. 1. " EXT_VSYNC_TS1 ,Bits [41:32] of EXT VSYNC TS" line.long 0x10 "AV_BUF_STC_CUSTOM_EVENT_TS_REG0,STC TS With Custom Event 1 Register 0" line.long 0x14 "AV_BUF_STC_CUSTOM_EVENT_TS_REG1,STC TS With Custom Event 1 Register 1" hexmask.long.word 0x14 0.--9. 1. " CUST_EVENT_TS1 ,Bits [41:32] of custom event TS" line.long 0x18 "AV_BUF_STC_CUSTOM_EVENT2_TS_REG0,STC TS With Custom Event 2 Register 0" line.long 0x1C "AV_BUF_STC_CUSTOM_EVENT2_TS_REG1,STC TS With Custom Event 2 Register 1" hexmask.long.word 0x1C 0.--9. 1. " CUST_EVENT_TS1 ,Bits [41:32] of custom event 2 TS" hgroup.long 0xB060++0x07 hide.long 0x00 "AV_BUF_STC_SNAPSHOT0,STC Snapshot Register 0" in hide.long 0x04 "AV_BUF_STC_SNAPSHOT1,STC Snapshot Register 1" in group.long 0xB070++0x23 line.long 0x00 "AV_BUF_OUTPUT_AUDIO_VIDEO_SELECT,Output Audio Video Select Register" bitfld.long 0x00 6. " AUD_STREAM2_SEL ,STREAM2 enable" "Disabled,Enabled" bitfld.long 0x00 4.--5. " AUD_STREAM1_SEL ,STREAM1 select" "Live audio,Memory audio,Pattern gen.,None" bitfld.long 0x00 2.--3. " VID_STREAM2_SEL ,STREAM2 enable (Graphics from memory/live)" "Disabled/disabled,Enabled/disabled,Disabled/enabled,None" textline " " bitfld.long 0x00 0.--1. " VID_STREAM1_SEL ,STREAM1 select" "Live video,Memory video,Pattern gen.,None" line.long 0x04 "AV_BUF_HCOUNT_VCOUNT_INT0,HCOUNT VCOUNT Interrupt 0 Register" hexmask.long.word 0x04 16.--29. 1. " HCOUNT ,HCOUNT value to match" hexmask.long.word 0x04 0.--13. 1. " VCOUNT ,VCOUNT value to match" line.long 0x08 "AV_BUF_HCOUNT_VCOUNT_INT1,HCOUNT VCOUNT Interrupt 1 Register" hexmask.long.word 0x08 16.--29. 1. " HCOUNT ,HCOUNT value to match" hexmask.long.word 0x08 0.--13. 1. " VCOUNT ,VCOUNT value to match" line.long 0x0C "AV_BUF_DITHER_CONFIG,Dither Configuration Register" bitfld.long 0x0C 10. " TAP_MSB ,MSB bits of the LFSR are tapped as random value" "LSB,MSB" bitfld.long 0x0C 9. " DW_SEL ,Enable each color to have a different random value for dithering" "Disabled,Enabled" bitfld.long 0x0C 8. " LD ,Load LFSR" "No effect,Loaded" textline " " bitfld.long 0x0C 5.--7. " TRUNC_PT ,Truncation point" "0,1,2,3,4,?..." bitfld.long 0x0C 3.--4. " MODE ,Dithering mode" "Round,Truncate,Dither,Truncate" bitfld.long 0x0C 0.--2. " SIZE ,Dithering word size" ",,2,3,4,5,?..." line.long 0x10 "DITHER_CONFIG_SEED0,Dither Seed Configuration Register 0" hexmask.long.word 0x10 0.--15. 1. " COLR0 ,Seed for random value generation for color component 0" line.long 0x14 "DITHER_CONFIG_SEED1,Dither Seed Configuration Register 1" hexmask.long.word 0x14 0.--15. 1. " COLR1 ,Seed for random value generation for color component 1" line.long 0x18 "DITHER_CONFIG_SEED2,Dither Seed Configuration Register 2" hexmask.long.word 0x18 0.--15. 1. " COLR2 ,Seed for random value generation for color component 2" line.long 0x1C "DITHER_CONFIG_MAX,Dither Max Pixel Value Register" hexmask.long.word 0x1C 0.--11. 1. " COLR_MAX ,Max value" line.long 0x20 "DITHER_CONFIG_MIN,Dither Min Pixel Value Register" hexmask.long.word 0x20 0.--11. 1. " COLR_MIN ,Min value" group.long 0xB100++0x0B line.long 0x00 "PATTERN_GEN_SELECT,Pattern Generator Select Register" hexmask.long.tbyte 0x00 8.--31. 1. " OFFSET_EQ ,Offset value which is needed by audio pattern generator to generate ping pattern" bitfld.long 0x00 0.--1. " AUD_RATE_SEL ,Audio pattern generator" "44.1khz,48khz,?..." line.long 0x04 "AUD_PATTERN_SELECT1,Audio Pattern Select Register 1" bitfld.long 0x04 0.--1. " PATTERN ,Audio pattern generated on ch1" "Ping,Sine,Silence,?..." line.long 0x08 "AUD_PATTERN_SELECT2,Audio Pattern Select Register 2" bitfld.long 0x08 0.--1. " PATTERN ,Audio pattern generated on ch2" "Ping,Sine,Silence,?..." group.long 0xB120++0x0F line.long 0x00 "AV_BUF_AUD_VID_CLK_SOURCE,Audio Video Clock Source Register" bitfld.long 0x00 2. " VID_TIMING_SRC ,Video timing source" "PL,Internal" bitfld.long 0x00 1. " AUD_CLK_SRC ,Audio clock source" "PL,PS" bitfld.long 0x00 0. " VID_CLK_SRC ,Video clock source" "PL,PS" line.long 0x04 "AV_BUF_SRST_REG,Soft Reset Register" bitfld.long 0x04 1. " VID_RST ,Video pipe soft reset" "No reset,Reset" line.long 0x08 "AV_BUF_AUDIO_RDY_INTERVAL,Audio Ready Interval Register" hexmask.long.word 0x08 16.--31. 1. " CH1_INT ,Audio channel 2 ready interval" hexmask.long.word 0x08 0.--15. 1. " CH0_INT ,Audio channel 1 ready interval" line.long 0x0C "AV_BUF_AUDIO_CH_CONFIG,Audio Channel Configuration Register" bitfld.long 0x0C 1. " AUD_CH_ID[1] ,Audio channel configuration, non live graphics audio (Left/right)" "[15:0]/[31:16],[31:16]/[15:0]" bitfld.long 0x0C 0. " [0] ,Audio channel configuration, non live audio (Left/right)" "[15:0]/[31:16],[31:16]/[15:0]" group.long 0xB200++0x37 line.long 0x00 "AV_BUF_GFX_COMP0_SCALE_FACTOR,Scaling Factor For Graphics Component 0 Register" hexmask.long.tbyte 0x00 0.--16. 1. " GFX_SCALE_FACTOR0 ,Scaling factor for graphics color component 0" line.long 0x04 "AV_BUF_GFX_COMP1_SCALE_FACTOR,Scaling Factor For Graphics Component 1 Register" hexmask.long.tbyte 0x04 0.--16. 1. " GFX_SCALE_FACTOR1 ,Scaling factor for graphics color component 1" line.long 0x08 "AV_BUF_GFX_COMP2_SCALE_FACTOR,Scaling Factor For Graphics Component 2 Register" hexmask.long.tbyte 0x08 0.--16. 1. " GFX_SCALE_FACTOR2 ,Scaling factor for graphics color component 2" line.long 0x0C "AV_BUF_VIDEO_COMP0_SCALE_FACTOR,Scaling Factor For Video Color Component 0 Register" hexmask.long.tbyte 0x0C 0.--16. 1. " VID_SCA_FACT0 ,Scaling factor for video color component 0" line.long 0x10 "AV_BUF_VIDEO_COMP1_SCALE_FACTOR,Scaling Factor For Video Color Component 1 Register" hexmask.long.tbyte 0x10 0.--16. 1. " VID_SCA_FACT1 ,Scaling factor for video color component 1" line.long 0x14 "AV_BUF_VIDEO_COMP2_SCALE_FACTOR,Scaling Factor For Video Color Component 2 Register" hexmask.long.tbyte 0x14 0.--16. 1. " VID_SCA_FACT2 ,Scaling factor for video color component 2" line.long 0x18 "AV_BUF_LIVE_VIDEO_COMP0_SF,Scaling Factor For Live Video Color Component 0 Register" hexmask.long.tbyte 0x18 0.--16. 1. " LIV_VID_SCA_FACT0 ,Scaling factor for live video color component 0" line.long 0x1C "AV_BUF_LIVE_VIDEO_COMP1_SF,Scaling Factor For Live Video Color Component 1 Register" hexmask.long.tbyte 0x1C 0.--16. 1. " LIV_VID_SCA_FACT1 ,Scaling factor for live video color component 1" line.long 0x20 "AV_BUF_LIVE_VIDEO_COMP2_SF,Scaling Factor For Live Video Color Component 2 Register" hexmask.long.tbyte 0x20 0.--16. 1. " LIV_VID_SCA_FACT2 ,Scaling factor for live video color component 2" line.long 0x24 "AV_BUF_LIVE_VID_CONFIG,Live Video Configuration Register" bitfld.long 0x24 8. " CB_FIRST ,Receive cb first" "Disabled,Enabled" bitfld.long 0x24 4.--5. " FORMAT ,Format" "RGB,YUV444,YUV422,Y only" bitfld.long 0x24 0.--2. " BPC ,Bits per component" "6,8,10,12,?..." line.long 0x28 "AV_BUF_LIVE_GFX_COMP0_SF,Live Video Graphics Component 0 Scalling Factor Register" hexmask.long.tbyte 0x28 0.--16. 1. " LIV_VID_SCA_FACT0 ,Live video graphics component 0 scalling factor" line.long 0x2C "AV_BUF_LIVE_GFX_COMP1_SF,Live Video Graphics Component 1 Scalling Factor Register" hexmask.long.tbyte 0x2C 0.--16. 1. " LIV_VID_SCA_FACT1 ,Live video graphics component 1 scalling factor" line.long 0x30 "AV_BUF_LIVE_GFX_COMP2_SF,Live Video Graphics Component 2 Scalling Factor Register" hexmask.long.tbyte 0x30 0.--16. 1. " LIV_VID_SCA_FACT2 ,Live video graphics component 2 scalling factor" line.long 0x34 "AV_BUF_LIVE_GFX_CONFIG,Live Graphics Configuration Register" bitfld.long 0x34 8. " CB_FIRST ,Receive cb first" "Disabled,Enabled" bitfld.long 0x34 4.--5. " FORMAT ,Format" "RGB,YUV444,YUV422,Y only" bitfld.long 0x34 0.--2. " BPC ,Bits per component" "6,8,10,12,?..." group.long 0xC000++0x4F line.long 0x00 "AUDIO_MIXER_VOLUME_CONTROL,Audio Mixer Volume Control Register" hexmask.long.word 0x00 16.--31. 1. " VOL_CTRL_CH1 ,Volume - multiplication factor for stream2 graphcis" hexmask.long.word 0x00 0.--15. 1. " VOL_CTRL_CH0 ,Volume - multiplication factor for stream1 video" line.long 0x04 "AUDIO_MIXER_META_DATA,Audio Mixer Meta Data Register" bitfld.long 0x04 0. " AUD_META_DATA_SEL ,Meta data select" "Registers,Live stream" line.long 0x08 "AUD_CH_STATUS_REG0,Audio Channel Status Bits 31 To 0 Register" line.long 0x0C "AUD_CH_STATUS_REG1,Audio Channel Status Bits 63 To 32 Register" line.long 0x10 "AUD_CH_STATUS_REG2,Audio Channel Status Bits 95 To 64 Register" line.long 0x14 "AUD_CH_STATUS_REG3,Audio Channel Status Bits 127 To 96 Register" line.long 0x18 "AUD_CH_STATUS_REG4,Audio Channel Status Bits 159 To 128 Register" line.long 0x1C "AUD_CH_STATUS_REG5,Audio Channel Status Bits 191 To 160 Register" line.long 0x20 "AUD_CH_A_DATA_REG0,Audio Channel A User Data Bits 31 To 0 Register" line.long 0x24 "AUD_CH_A_DATA_REG1,Audio Channel A User Data Bits 63 To 32 Register" line.long 0x28 "AUD_CH_A_DATA_REG2,Audio Channel A User Data Bits 95 To 64 Register" line.long 0x2C "AUD_CH_A_DATA_REG3,Audio Channel A User Data Bits 127 To 96 Register" line.long 0x30 "AUD_CH_A_DATA_REG4,Audio Channel A User Data Bits 159 To 128 Register" line.long 0x34 "AUD_CH_A_DATA_REG5,Audio Channel A User Data Bits 191 To 160 Register" line.long 0x38 "AUD_CH_B_DATA_REG0,Audio Channel B User Data Bits 31 To 0 Register" line.long 0x3C "AUD_CH_B_DATA_REG1,Audio Channel B User Data Bits 63 To 32 Register" line.long 0x40 "AUD_CH_B_DATA_REG2,Audio Channel B User Data Bits 95 To 64 Register" line.long 0x44 "AUD_CH_B_DATA_REG3,Audio Channel B User Data Bits 127 To 96 Register" line.long 0x48 "AUD_CH_B_DATA_REG4,Audio Channel B User Data Bits 159 To 128 Register" line.long 0x4C "AUD_CH_B_DATA_REG5,Audio Channel B User Data Bits 191 To 160 Register" group.long 0xCC00++0x03 line.long 0x00 "AUDIO_SOFT_RESET,Audio Soft Reset Register" bitfld.long 0x00 2. " EXTRA_BS_CONTROL ,Bypass the extra BS on link" "No bypass,Bypass" bitfld.long 0x00 1. " LINE_RESET_DISABLE ,Disable the end of line reset for reduced blanking resolutions" "No,Yes" bitfld.long 0x00 0. " AUDIO_SRST ,Reset audio pipe" "No reset,Reset" rgroup.long 0xC000++0x0B line.long 0x00 "PATGEN_CRC_R,Pattern Generator First Component CRC Register" hexmask.long.word 0x00 0.--15. 1. " CRC_R ,CRC calculated on the first component of video output from internal test pattern generator" line.long 0x04 "PATGEN_CRC_G,Pattern Generator Second Component CRC Register" hexmask.long.word 0x04 0.--15. 1. " CRC_G ,CRC calculated on the second component of video output from internal test pattern generator" line.long 0x08 "PATGEN_CRC_B,Pattern Generator Third Component CRC Register" hexmask.long.word 0x08 0.--15. 1. " CRC_B ,CRC calculated on the third component of video output from internal test pattern generator" width 0x0B tree.end tree "DPDMA" base ad:0xFD4C0000 width 27. group.long 0x00++0x07 line.long 0x00 "DPDMA_ERR_CTRL,Error Response Enable/disable Register" bitfld.long 0x00 0. " APB_ERR_RES ,Pslverr value after access on unimplemented space" "0,1" line.long 0x04 "DPDMA_ISR,Interrupt Status Register" eventfld.long 0x04 27. " VSYNC_INT ,Interrupt on vsync" "No interrupt,Interrupt" eventfld.long 0x04 26. " AXI_RD_4K_CROSS ,AXI read channel burst crosses 4k boundary" "No interrupt,Interrupt" eventfld.long 0x04 25. " WR_DATA_FIFO_FULL ,Write data FIFO full condition is detected during descriptor update" "No interrupt,Interrupt" textline " " eventfld.long 0x04 24. " WR_CMD_FIFO_FULL ,Write cmd FIFO full condition is detected during descriptor update" "No interrupt,Interrupt" eventfld.long 0x04 23. " DSCR_ERR5 ,Descriptor payload is larger than line/frame size dictated by video timing signals on channel 5" "No interrupt,Interrupt" eventfld.long 0x04 22. " DSCR_ERR4 ,Descriptor payload is larger than line/frame size dictated by video timing signals on channel 4" "No interrupt,Interrupt" textline " " eventfld.long 0x04 21. " DSCR_ERR3 ,Descriptor payload is larger than line/frame size dictated by video timing signals on channel 3" "No interrupt,Interrupt" eventfld.long 0x04 20. " DSCR_ERR2 ,Descriptor payload is larger than line/frame size dictated by video timing signals on channel 2" "No interrupt,Interrupt" eventfld.long 0x04 19. " DSCR_ERR1 ,Descriptor payload is larger than line/frame size dictated by video timing signals on channel 1" "No interrupt,Interrupt" textline " " eventfld.long 0x04 18. " DSCR_ERR0 ,Descriptor payload is larger than line/frame size dictated by video timing signals on channel 0" "No interrupt,Interrupt" eventfld.long 0x04 17. " DATA_AXI_ERR5 ,Error occurred during data read on channel 5" "No interrupt,Interrupt" eventfld.long 0x04 16. " DATA_AXI_ERR4 ,Error occurred during data read on channel 4" "No interrupt,Interrupt" textline " " eventfld.long 0x04 15. " DATA_AXI_ERR3 ,Error occurred during data read on channel 3" "No interrupt,Interrupt" eventfld.long 0x04 14. " DATA_AXI_ERR2 ,Error occurred during data read on channel 2" "No interrupt,Interrupt" eventfld.long 0x04 13. " DATA_AXI_ERR1 ,Error occurred during data read on channel 1" "No interrupt,Interrupt" textline " " eventfld.long 0x04 12. " DATA_AXI_ERR0 ,Error occurred during data read on channel 0" "No interrupt,Interrupt" eventfld.long 0x04 11. " NO_OSTAND_TRAN5 ,Outstanding transaction counter reached zero during pause on channel 5" "No interrupt,Interrupt" eventfld.long 0x04 10. " NO_OSTAND_TRAN4 ,Outstanding transaction counter reached zero during pause on channel 4" "No interrupt,Interrupt" textline " " eventfld.long 0x04 9. " NO_OSTAND_TRAN3 ,Outstanding transaction counter reached zero during pause on channel 3" "No interrupt,Interrupt" eventfld.long 0x04 8. " NO_OSTAND_TRAN2 ,Outstanding transaction counter reached zero during pause on channel 2" "No interrupt,Interrupt" eventfld.long 0x04 7. " NO_OSTAND_TRAN1 ,Outstanding transaction counter reached zero during pause on channel 1" "No interrupt,Interrupt" textline " " eventfld.long 0x04 6. " NO_OSTAND_TRAN0 ,Outstanding transaction counter reached zero during pause on channel 0" "No interrupt,Interrupt" eventfld.long 0x04 5. " DSCR_DONE5 ,DMA is done with current descriptor" "No interrupt,Interrupt" eventfld.long 0x04 4. " DSCR_DONE4 ,DMA is done with current descriptor" "No interrupt,Interrupt" textline " " eventfld.long 0x04 3. " DSCR_DONE3 ,DMA is done with current descriptor" "No interrupt,Interrupt" eventfld.long 0x04 2. " DSCR_DONE2 ,DMA is done with current descriptor" "No interrupt,Interrupt" eventfld.long 0x04 1. " DSCR_DONE1 ,DMA is done with current descriptor" "No interrupt,Interrupt" textline " " eventfld.long 0x04 0. " DSCR_DONE0 ,DMA is done with current descriptor" "No interrupt,Interrupt" group.long 0x08++0x03 line.long 0x00 "DPDMA_IMR_SET/CLR,Interrupt Mask Register" setclrfld.long 0x00 27. 0x08 27. 0x04 27. " VSYNC_INT ,Interrupt on vsync" "Not masked,Masked" setclrfld.long 0x00 26. 0x08 26. 0x04 26. " AXI_RD_4K_CROSS ,AXI read channel burst crosses 4k boundary" "Not masked,Masked" setclrfld.long 0x00 25. 0x08 25. 0x04 25. " WR_DATA_FIFO_FULL ,Write data FIFO full condition is detected during descriptor update" "Not masked,Masked" textline " " setclrfld.long 0x00 24. 0x08 24. 0x04 24. " WR_CMD_FIFO_FULL ,Write cmd FIFO full condition is detected during descriptor update" "Not masked,Masked" setclrfld.long 0x00 23. 0x08 23. 0x04 23. " DSCR_ERR5 ,Descriptor payload is larger than line/frame size dictated by video timing signals on channel 5" "Not masked,Masked" setclrfld.long 0x00 22. 0x08 22. 0x04 22. " DSCR_ERR4 ,Descriptor payload is larger than line/frame size dictated by video timing signals on channel 4" "Not masked,Masked" textline " " setclrfld.long 0x00 21. 0x08 21. 0x04 21. " DSCR_ERR3 ,Descriptor payload is larger than line/frame size dictated by video timing signals on channel 3" "Not masked,Masked" setclrfld.long 0x00 20. 0x08 20. 0x04 20. " DSCR_ERR2 ,Descriptor payload is larger than line/frame size dictated by video timing signals on channel 2" "Not masked,Masked" setclrfld.long 0x00 19. 0x08 19. 0x04 19. " DSCR_ERR1 ,Descriptor payload is larger than line/frame size dictated by video timing signals on channel 1" "Not masked,Masked" textline " " setclrfld.long 0x00 18. 0x08 18. 0x04 18. " DSCR_ERR0 ,Descriptor payload is larger than line/frame size dictated by video timing signals on channel 0" "Not masked,Masked" setclrfld.long 0x00 17. 0x08 17. 0x04 17. " DATA_AXI_ERR5 ,Error occurred during data read on channel 5" "Not masked,Masked" setclrfld.long 0x00 16. 0x08 16. 0x04 16. " DATA_AXI_ERR4 ,Error occurred during data read on channel 4" "Not masked,Masked" textline " " setclrfld.long 0x00 15. 0x08 15. 0x04 15. " DATA_AXI_ERR3 ,Error occurred during data read on channel 3" "Not masked,Masked" setclrfld.long 0x00 14. 0x08 14. 0x04 14. " DATA_AXI_ERR2 ,Error occurred during data read on channel 2" "Not masked,Masked" setclrfld.long 0x00 13. 0x08 13. 0x04 13. " DATA_AXI_ERR1 ,Error occurred during data read on channel 1" "Not masked,Masked" textline " " setclrfld.long 0x00 12. 0x08 12. 0x04 12. " DATA_AXI_ERR0 ,Error occurred during data read on channel 0" "Not masked,Masked" setclrfld.long 0x00 11. 0x08 11. 0x04 11. " NO_OSTAND_TRAN5 ,Outstanding transaction counter reached zero during pause on channel 5" "Not masked,Masked" setclrfld.long 0x00 10. 0x08 10. 0x04 10. " NO_OSTAND_TRAN4 ,Outstanding transaction counter reached zero during pause on channel 4" "Not masked,Masked" textline " " setclrfld.long 0x00 9. 0x08 9. 0x04 9. " NO_OSTAND_TRAN3 ,Outstanding transaction counter reached zero during pause on channel 3" "Not masked,Masked" setclrfld.long 0x00 8. 0x08 8. 0x04 8. " NO_OSTAND_TRAN2 ,Outstanding transaction counter reached zero during pause on channel 2" "Not masked,Masked" setclrfld.long 0x00 7. 0x08 7. 0x04 7. " NO_OSTAND_TRAN1 ,Outstanding transaction counter reached zero during pause on channel 1" "Not masked,Masked" textline " " setclrfld.long 0x00 6. 0x08 6. 0x04 6. " NO_OSTAND_TRAN0 ,Outstanding transaction counter reached zero during pause on channel 0" "Not masked,Masked" setclrfld.long 0x00 5. 0x08 5. 0x04 5. " DSCR_DONE5 ,DMA is done with current descriptor" "Not masked,Masked" setclrfld.long 0x00 4. 0x08 4. 0x04 4. " DSCR_DONE4 ,DMA is done with current descriptor" "Not masked,Masked" textline " " setclrfld.long 0x00 3. 0x08 3. 0x04 3. " DSCR_DONE3 ,DMA is done with current descriptor" "Not masked,Masked" setclrfld.long 0x00 2. 0x08 2. 0x04 2. " DSCR_DONE2 ,DMA is done with current descriptor" "Not masked,Masked" setclrfld.long 0x00 1. 0x08 1. 0x04 1. " DSCR_DONE1 ,DMA is done with current descriptor" "Not masked,Masked" textline " " setclrfld.long 0x00 0. 0x08 0. 0x04 0. " DSCR_DONE0 ,DMA is done with current descriptor" "Not masked,Masked" group.long 0x14++0x03 line.long 0x00 "DPDMA_EISR,Interrupt Status Register" eventfld.long 0x00 31. " RD_CMD_FIFO_FULL ,Read cmd FIFO full condition is detected during data/descriptor read" "No interrupt,Interrupt" eventfld.long 0x00 30. " DSCR_DONE_ERR5 ,Descriptor already processed on channel 5, ignore done not set, done bit set" "No interrupt,Interrupt" eventfld.long 0x00 29. " DSCR_DONE_ERR4 ,Descriptor already processed on channel 4, ignore done not set, done bit set" "No interrupt,Interrupt" textline " " eventfld.long 0x00 28. " DSCR_DONE_ERR3 ,Descriptor already processed on channel 3, ignore done not set, done bit set" "No interrupt,Interrupt" eventfld.long 0x00 27. " DSCR_DONE_ERR2 ,Descriptor already processed on channel 2, ignore done not set, done bit set" "No interrupt,Interrupt" eventfld.long 0x00 26. " DSCR_DONE_ERR1 ,Descriptor already processed on channel 1, ignore done not set, done bit set" "No interrupt,Interrupt" textline " " eventfld.long 0x00 25. " DSCR_DONE_ERR0 ,Descriptor already processed on channel 0, ignore done not set, done bit set" "No interrupt,Interrupt" eventfld.long 0x00 24. " DSCR_WR_AXI_ERR5 ,Error during descriptor write on channel 5 - SLAVE/DECODE error on BRESP" "No interrupt,Interrupt" eventfld.long 0x00 23. " DSCR_WR_AXI_ERR4 ,Error during descriptor write on channel 4 - SLAVE/DECODE error on BRESP" "No interrupt,Interrupt" textline " " eventfld.long 0x00 22. " DSCR_WR_AXI_ERR3 ,Error during descriptor write on channel 3 - SLAVE/DECODE error on BRESP" "No interrupt,Interrupt" eventfld.long 0x00 21. " DSCR_WR_AXI_ERR2 ,Error during descriptor write on channel 2 - SLAVE/DECODE error on BRESP" "No interrupt,Interrupt" eventfld.long 0x00 20. " DSCR_WR_AXI_ERR1 ,Error during descriptor write on channel 1 - SLAVE/DECODE error on BRESP" "No interrupt,Interrupt" textline " " eventfld.long 0x00 19. " DSCR_WR_AXI_ERR0 ,Error during descriptor write on channel 0 - SLAVE/DECODE error on BRESP" "No interrupt,Interrupt" eventfld.long 0x00 18. " DSCR_CRC_ERR5 ,Error during descriptor read on channel 5 - CRC mismatch" "No interrupt,Interrupt" eventfld.long 0x00 17. " DSCR_CRC_ERR4 ,Error during descriptor read on channel 4 - CRC mismatch" "No interrupt,Interrupt" textline " " eventfld.long 0x00 16. " DSCR_CRC_ERR3 ,Error during descriptor read on channel 3 - CRC mismatch" "No interrupt,Interrupt" eventfld.long 0x00 15. " DSCR_CRC_ERR2 ,Error during descriptor read on channel 2 - CRC mismatch" "No interrupt,Interrupt" eventfld.long 0x00 14. " DSCR_CRC_ERR1 ,Error during descriptor read on channel 1 - CRC mismatch" "No interrupt,Interrupt" textline " " eventfld.long 0x00 13. " DSCR_CRC_ERR0 ,Error during descriptor read on channel 0 - CRC mismatch" "No interrupt,Interrupt" eventfld.long 0x00 12. " DSCR_PRE_ERR5 ,Error during descriptor read on channel 5 - preamble mismatch" "No interrupt,Interrupt" eventfld.long 0x00 11. " DSCR_PRE_ERR4 ,Error during descriptor read on channel 4 - preamble mismatch" "No interrupt,Interrupt" textline " " eventfld.long 0x00 10. " DSCR_PRE_ERR3 ,Error during descriptor read on channel 3 - preamble mismatch" "No interrupt,Interrupt" eventfld.long 0x00 9. " DSCR_PRE_ERR2 ,Error during descriptor read on channel 2 - preamble mismatch" "No interrupt,Interrupt" eventfld.long 0x00 8. " DSCR_PRE_ERR1 ,Error during descriptor read on channel 1 - preamble mismatch" "No interrupt,Interrupt" textline " " eventfld.long 0x00 7. " DSCR_PRE_ERR0 ,Error during descriptor read on channel 0 - preamble mismatch" "No interrupt,Interrupt" eventfld.long 0x00 6. " DSCR_RD_AXI_ERR5 ,Error during descriptor read on channel 5" "No interrupt,Interrupt" eventfld.long 0x00 5. " DSCR_RD_AXI_ERR4 ,Error during descriptor read on channel 4" "No interrupt,Interrupt" textline " " eventfld.long 0x00 4. " DSCR_RD_AXI_ERR3 ,Error during descriptor read on channel 3" "No interrupt,Interrupt" eventfld.long 0x00 3. " DSCR_RD_AXI_ERR2 ,Error during descriptor read on channel 2" "No interrupt,Interrupt" eventfld.long 0x00 2. " DSCR_RD_AXI_ERR1 ,Error during descriptor read on channel 1" "No interrupt,Interrupt" textline " " eventfld.long 0x00 1. " DSCR_RD_AXI_ERR0 ,Error during descriptor read on channel 0" "No interrupt,Interrupt" eventfld.long 0x00 0. " INV_APB ,See DPDMA_INT_STATUS register for details" "No interrupt,Interrupt" group.long 0x18++0x03 line.long 0x00 "DPDMA_EIMR_SET/CLR,Interrupt Mask Register" setclrfld.long 0x00 31. 0x08 31. 0x04 31. " RD_CMD_FIFO_FULL ,Read cmd FIFO full condition is detected during data/descriptor read" "Not masked,Masked" setclrfld.long 0x00 30. 0x08 30. 0x04 30. " DSCR_DONE_ERR5 ,Descriptor already processed on channel 5, ignore done not set, done bit set" "Not masked,Masked" setclrfld.long 0x00 29. 0x08 29. 0x04 29. " DSCR_DONE_ERR4 ,Descriptor already processed on channel 4, ignore done not set, done bit set" "Not masked,Masked" textline " " setclrfld.long 0x00 28. 0x08 28. 0x04 28. " DSCR_DONE_ERR3 ,Descriptor already processed on channel 3, ignore done not set, done bit set" "Not masked,Masked" setclrfld.long 0x00 27. 0x08 27. 0x04 27. " DSCR_DONE_ERR2 ,Descriptor already processed on channel 2, ignore done not set, done bit set" "Not masked,Masked" setclrfld.long 0x00 26. 0x08 26. 0x04 26. " DSCR_DONE_ERR1 ,Descriptor already processed on channel 1, ignore done not set, done bit set" "Not masked,Masked" textline " " setclrfld.long 0x00 25. 0x08 25. 0x04 25. " DSCR_DONE_ERR0 ,Descriptor already processed on channel 0, ignore done not set, done bit set" "Not masked,Masked" setclrfld.long 0x00 24. 0x08 24. 0x04 24. " DSCR_WR_AXI_ERR5 ,Error during descriptor write on channel 5 - SLAVE/DECODE error on BRESP" "Not masked,Masked" setclrfld.long 0x00 23. 0x08 23. 0x04 23. " DSCR_WR_AXI_ERR4 ,Error during descriptor write on channel 4 - SLAVE/DECODE error on BRESP" "Not masked,Masked" textline " " setclrfld.long 0x00 22. 0x08 22. 0x04 22. " DSCR_WR_AXI_ERR3 ,Error during descriptor write on channel 3 - SLAVE/DECODE error on BRESP" "Not masked,Masked" setclrfld.long 0x00 21. 0x08 21. 0x04 21. " DSCR_WR_AXI_ERR2 ,Error during descriptor write on channel 2 - SLAVE/DECODE error on BRESP" "Not masked,Masked" setclrfld.long 0x00 20. 0x08 20. 0x04 20. " DSCR_WR_AXI_ERR1 ,Error during descriptor write on channel 1 - SLAVE/DECODE error on BRESP" "Not masked,Masked" textline " " setclrfld.long 0x00 19. 0x08 19. 0x04 19. " DSCR_WR_AXI_ERR0 ,Error during descriptor write on channel 0 - SLAVE/DECODE error on BRESP" "Not masked,Masked" setclrfld.long 0x00 18. 0x08 18. 0x04 18. " DSCR_CRC_ERR5 ,Error during descriptor read on channel 5 - CRC mismatch" "Not masked,Masked" setclrfld.long 0x00 17. 0x08 17. 0x04 17. " DSCR_CRC_ERR4 ,Error during descriptor read on channel 4 - CRC mismatch" "Not masked,Masked" textline " " setclrfld.long 0x00 16. 0x08 16. 0x04 16. " DSCR_CRC_ERR3 ,Error during descriptor read on channel 3 - CRC mismatch" "Not masked,Masked" setclrfld.long 0x00 15. 0x08 15. 0x04 15. " DSCR_CRC_ERR2 ,Error during descriptor read on channel 2 - CRC mismatch" "Not masked,Masked" setclrfld.long 0x00 14. 0x08 14. 0x04 14. " DSCR_CRC_ERR1 ,Error during descriptor read on channel 1 - CRC mismatch" "Not masked,Masked" textline " " setclrfld.long 0x00 13. 0x08 13. 0x04 13. " DSCR_CRC_ERR0 ,Error during descriptor read on channel 0 - CRC mismatch" "Not masked,Masked" setclrfld.long 0x00 12. 0x08 12. 0x04 12. " DSCR_PRE_ERR5 ,Error during descriptor read on channel 5 - preamble mismatch" "Not masked,Masked" setclrfld.long 0x00 11. 0x08 11. 0x04 11. " DSCR_PRE_ERR4 ,Error during descriptor read on channel 4 - preamble mismatch" "Not masked,Masked" textline " " setclrfld.long 0x00 10. 0x08 10. 0x04 10. " DSCR_PRE_ERR3 ,Error during descriptor read on channel 3 - preamble mismatch" "Not masked,Masked" setclrfld.long 0x00 9. 0x08 9. 0x04 9. " DSCR_PRE_ERR2 ,Error during descriptor read on channel 2 - preamble mismatch" "Not masked,Masked" setclrfld.long 0x00 8. 0x08 8. 0x04 8. " DSCR_PRE_ERR1 ,Error during descriptor read on channel 1 - preamble mismatch" "Not masked,Masked" textline " " setclrfld.long 0x00 7. 0x08 7. 0x04 7. " DSCR_PRE_ERR0 ,Error during descriptor read on channel 0 - preamble mismatch" "Not masked,Masked" setclrfld.long 0x00 6. 0x08 6. 0x04 6. " DSCR_RD_AXI_ERR5 ,Error during descriptor read on channel 5" "Not masked,Masked" setclrfld.long 0x00 5. 0x08 5. 0x04 5. " DSCR_RD_AXI_ERR4 ,Error during descriptor read on channel 4" "Not masked,Masked" textline " " setclrfld.long 0x00 4. 0x08 4. 0x04 4. " DSCR_RD_AXI_ERR3 ,Error during descriptor read on channel 3" "Not masked,Masked" setclrfld.long 0x00 3. 0x08 3. 0x04 3. " DSCR_RD_AXI_ERR2 ,Error during descriptor read on channel 2" "Not masked,Masked" setclrfld.long 0x00 2. 0x08 2. 0x04 2. " DSCR_RD_AXI_ERR1 ,Error during descriptor read on channel 1" "Not masked,Masked" textline " " setclrfld.long 0x00 1. 0x08 1. 0x04 1. " DSCR_RD_AXI_ERR0 ,Error during descriptor read on channel 0" "Not masked,Masked" setclrfld.long 0x00 0. 0x08 0. 0x04 0. " INV_APB ,See DPDMA_INT_STATUS register for details" "Not masked,Masked" textline " " wgroup.long 0x104++0x03 line.long 0x00 "DPDMA_GBL,Global Control Register" bitfld.long 0x00 11. " RTRG_CH5 ,Redirect channel 5" "No effect,Redirect" bitfld.long 0x00 10. " RTRG_CH4 ,Redirect channel 4" "No effect,Redirect" bitfld.long 0x00 9. " RTRG_CH3 ,Redirect channel 3" "No effect,Redirect" textline " " bitfld.long 0x00 8. " RTRG_CH2 ,Redirect channel 2" "No effect,Redirect" bitfld.long 0x00 7. " RTRG_CH1 ,Redirect channel 1" "No effect,Redirect" bitfld.long 0x00 6. " RTRG_CH0 ,Redirect channel 0" "No effect,Redirect" textline " " bitfld.long 0x00 5. " TRG_CH5 ,Start operation on channel 5" "No effect,Start" bitfld.long 0x00 4. " TRG_CH4 ,Start operation on channel 4" "No effect,Start" bitfld.long 0x00 3. " TRG_CH3 ,Start operation on channel 3" "No effect,Start" textline " " bitfld.long 0x00 2. " TRG_CH2 ,Start operation on channel 2" "No effect,Start" bitfld.long 0x00 1. " TRG_CH1 ,Start operation on channel 1" "No effect,Start" bitfld.long 0x00 0. " TRG_CH0 ,Start operation on channel 0" "No effect,Start" group.long 0x108++0x03 line.long 0x00 "DPDMA_ALC0_CNTL,ALC0 Control Register" bitfld.long 0x00 2.--5. " MON_ID ,ID used to filter the traffic on AXI channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 1. " CLEAR ,Clear the state of ALC" "No effect,Clear" bitfld.long 0x00 0. " EN ,Enable bit for ALC0" "Disabled,Enabled" rgroup.long (0x108+0x04)++0x13 line.long 0x00 "DPDMA_ALC0_STATUS,ALC0 Status Register" bitfld.long 0x00 0. " OFLOW ,Overflow occurred on accumulated transaction count" "No overflow,Overflow" line.long 0x04 "DPDMA_ALC0_MAX,ALC0 Max Latency Register" hexmask.long.word 0x04 0.--15. 1. " LATENCY ,Indicates maximum trnasaction latency logged" line.long 0x08 "DPDMA_ALC0_MIN,ALC0 Min Latency Register" hexmask.long.word 0x08 0.--15. 1. " LATENCY ,Indicates minimum trnasaction latency logged" line.long 0x0C "DPDMA_ALC0_ACC,ALC0 Accumulated Transaction Latency Register" line.long 0x10 "DPDMA_ALC0_ACC_TRAN,ALC0 Accumulated Transaction Count Register" group.long 0x120++0x03 line.long 0x00 "DPDMA_ALC1_CNTL,ALC1 Control Register" bitfld.long 0x00 2.--5. " MON_ID ,ID used to filter the traffic on AXI channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 1. " CLEAR ,Clear the state of ALC" "No effect,Clear" bitfld.long 0x00 0. " EN ,Enable bit for ALC1" "Disabled,Enabled" rgroup.long (0x120+0x04)++0x13 line.long 0x00 "DPDMA_ALC1_STATUS,ALC1 Status Register" bitfld.long 0x00 0. " OFLOW ,Overflow occurred on accumulated transaction count" "No overflow,Overflow" line.long 0x04 "DPDMA_ALC1_MAX,ALC1 Max Latency Register" hexmask.long.word 0x04 0.--15. 1. " LATENCY ,Indicates maximum trnasaction latency logged" line.long 0x08 "DPDMA_ALC1_MIN,ALC1 Min Latency Register" hexmask.long.word 0x08 0.--15. 1. " LATENCY ,Indicates minimum trnasaction latency logged" line.long 0x0C "DPDMA_ALC1_ACC,ALC1 Accumulated Transaction Latency Register" line.long 0x10 "DPDMA_ALC1_ACC_TRAN,ALC1 Accumulated Transaction Count Register" group.long 0x200++0x1B line.long 0x00 "DPDMA_CH0_DSCR_STRT_ADDRE,Channel 0 Descriptor Start Address Extension Register" hexmask.long.word 0x00 0.--15. 1. " MSB ,4 bit address extention for first descriptor fetch" line.long 0x04 "DPDMA_CH0_DSCR_STRT_ADDR,Channel 0 Descriptor Start Address Register" line.long 0x08 "DPDMA_CH0_DSCR_NEXT_ADDRE,Channel 0 Next Descriptor Address Extention Register" hexmask.long.word 0x08 0.--15. 1. " MSB ,Shows [35:32] of the next descriptor fetch address" line.long 0x0C "DPDMA_CH0_DSCR_NEXT_ADDR,Channel 0 Next Descriptor Address Register" line.long 0x10 "DPDMA_CH0_PYLD_CUR_ADDRE,Channel 0 Current Payload Address Extension Register" hexmask.long.word 0x10 0.--15. 1. " MSB ,Shows [35:32] of the current payload address under process" line.long 0x14 "DPDMA_CH0_PYLD_CUR_ADDR,Channel 0 Current Payload Address Register" line.long 0x18 "DPDMA_CH0_CNTL,Channel 0 Control Register" hexmask.long.word 0x18 20.--29. 1. " DSCR_DLY_CNT ,Programmable count used to schedule DSCR count" bitfld.long 0x18 16.--19. " DSCR_AXCACHE ,Descriptor fetch/update" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 14.--15. " DSCR_AXPROT ,All descriptor fetch/update for channel 0" "0,1,2,3" textline " " bitfld.long 0x18 10.--13. " QOS_DATA_RD ,DMA uses this QOS value along with AXI cmd for descriptor write" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 6.--9. " QOS_DSCR_RD ,DMA uses this QOS value along with AXI cmd for data read" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 2.--5. " QOS_DSCR_WR ,DMA uses this QOS value along with AXI cmd for descriptor read" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x18 1. " PAUSE ,Pause for DMA channel" "Normal,Paused" bitfld.long 0x18 0. " EN ,Enable/disable for DMA channel" "Disabled,Enabled" rgroup.long (0x200+0x1C)++0x0F line.long 0x00 "DPDMA_CH0_STATUS,Channel 0 Status Register" bitfld.long 0x00 21.--24. " OTRAN_CNT ,Outstanding AXI transaction counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x00 13.--20. 1. " PREAMBLE ,Preamble value received from current descriptor" bitfld.long 0x00 12. " EN_DSCR_INTR ,Completion interrupt is requested for current descriptor" "Not requested,Requested" textline " " bitfld.long 0x00 11. " EN_DSCR_UP ,Descriptor update is requested for current descriptor" "Not requested,Requested" bitfld.long 0x00 10. " DSCR_DONE ,Current descriptor is not valid unless IGNR_DONE is set" "Ignored,Valid when set" bitfld.long 0x00 9. " IGNR_DONE ,DMA channel current descriptor processing" "Stop when done,Ignore done bit" textline " " bitfld.long 0x00 8. " LDSCR_FRAME ,Current descriptor is last descriptor of the frame" "Not last,Last" bitfld.long 0x00 7. " LAST_DSCR ,Current descriptor is last descriptor in chain" "Not last,Last" bitfld.long 0x00 6. " EN_CRC ,CRC check" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " MODE ,Current descriptor mode" "Contiguous,Fragmented" bitfld.long 0x00 4. " BURST_TYPE ,Burst type information received from descriptor" "0,1" bitfld.long 0x00 0.--3. " BURST_LEN ,Burst length used for generating the AXI CMD for data read" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "DPDMA_CH0_VDO,Channel 0 Video Parameter Register" hexmask.long.tbyte 0x04 14.--31. 1. " LINE_LENGTH ,Line length information received from current descriptor" hexmask.long.word 0x04 0.--13. 1. " STRIDE ,Stride information received from current descriptor" line.long 0x08 "DPDMA_CH0_PYLD_SZ,Channel 0 Current Descriptor Payload Size Register" line.long 0x0C "DPDMA_CH0_PYLD_SZ,Channel 0 Current Descriptor Payload Size Register" hexmask.long.word 0x0C 0.--15. 1. " VAL ,Shows the descriptor ID of descriptor under process" group.long 0x300++0x1B line.long 0x00 "DPDMA_CH1_DSCR_STRT_ADDRE,Channel 1 Descriptor Start Address Extension Register" hexmask.long.word 0x00 0.--15. 1. " MSB ,4 bit address extention for first descriptor fetch" line.long 0x04 "DPDMA_CH1_DSCR_STRT_ADDR,Channel 1 Descriptor Start Address Register" line.long 0x08 "DPDMA_CH1_DSCR_NEXT_ADDRE,Channel 1 Next Descriptor Address Extention Register" hexmask.long.word 0x08 0.--15. 1. " MSB ,Shows [35:32] of the next descriptor fetch address" line.long 0x0C "DPDMA_CH1_DSCR_NEXT_ADDR,Channel 1 Next Descriptor Address Register" line.long 0x10 "DPDMA_CH1_PYLD_CUR_ADDRE,Channel 1 Current Payload Address Extension Register" hexmask.long.word 0x10 0.--15. 1. " MSB ,Shows [35:32] of the current payload address under process" line.long 0x14 "DPDMA_CH1_PYLD_CUR_ADDR,Channel 1 Current Payload Address Register" line.long 0x18 "DPDMA_CH1_CNTL,Channel 1 Control Register" hexmask.long.word 0x18 20.--29. 1. " DSCR_DLY_CNT ,Programmable count used to schedule DSCR count" bitfld.long 0x18 16.--19. " DSCR_AXCACHE ,Descriptor fetch/update" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 14.--15. " DSCR_AXPROT ,All descriptor fetch/update for channel 1" "0,1,2,3" textline " " bitfld.long 0x18 10.--13. " QOS_DATA_RD ,DMA uses this QOS value along with AXI cmd for descriptor write" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 6.--9. " QOS_DSCR_RD ,DMA uses this QOS value along with AXI cmd for data read" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 2.--5. " QOS_DSCR_WR ,DMA uses this QOS value along with AXI cmd for descriptor read" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x18 1. " PAUSE ,Pause for DMA channel" "Normal,Paused" bitfld.long 0x18 0. " EN ,Enable/disable for DMA channel" "Disabled,Enabled" rgroup.long (0x300+0x1C)++0x0F line.long 0x00 "DPDMA_CH1_STATUS,Channel 1 Status Register" bitfld.long 0x00 21.--24. " OTRAN_CNT ,Outstanding AXI transaction counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x00 13.--20. 1. " PREAMBLE ,Preamble value received from current descriptor" bitfld.long 0x00 12. " EN_DSCR_INTR ,Completion interrupt is requested for current descriptor" "Not requested,Requested" textline " " bitfld.long 0x00 11. " EN_DSCR_UP ,Descriptor update is requested for current descriptor" "Not requested,Requested" bitfld.long 0x00 10. " DSCR_DONE ,Current descriptor is not valid unless IGNR_DONE is set" "Ignored,Valid when set" bitfld.long 0x00 9. " IGNR_DONE ,DMA channel current descriptor processing" "Stop when done,Ignore done bit" textline " " bitfld.long 0x00 8. " LDSCR_FRAME ,Current descriptor is last descriptor of the frame" "Not last,Last" bitfld.long 0x00 7. " LAST_DSCR ,Current descriptor is last descriptor in chain" "Not last,Last" bitfld.long 0x00 6. " EN_CRC ,CRC check" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " MODE ,Current descriptor mode" "Contiguous,Fragmented" bitfld.long 0x00 4. " BURST_TYPE ,Burst type information received from descriptor" "0,1" bitfld.long 0x00 0.--3. " BURST_LEN ,Burst length used for generating the AXI CMD for data read" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "DPDMA_CH1_VDO,Channel 1 Video Parameter Register" hexmask.long.tbyte 0x04 14.--31. 1. " LINE_LENGTH ,Line length information received from current descriptor" hexmask.long.word 0x04 0.--13. 1. " STRIDE ,Stride information received from current descriptor" line.long 0x08 "DPDMA_CH1_PYLD_SZ,Channel 1 Current Descriptor Payload Size Register" line.long 0x0C "DPDMA_CH1_PYLD_SZ,Channel 1 Current Descriptor Payload Size Register" hexmask.long.word 0x0C 0.--15. 1. " VAL ,Shows the descriptor ID of descriptor under process" group.long 0x400++0x1B line.long 0x00 "DPDMA_CH2_DSCR_STRT_ADDRE,Channel 2 Descriptor Start Address Extension Register" hexmask.long.word 0x00 0.--15. 1. " MSB ,4 bit address extention for first descriptor fetch" line.long 0x04 "DPDMA_CH2_DSCR_STRT_ADDR,Channel 2 Descriptor Start Address Register" line.long 0x08 "DPDMA_CH2_DSCR_NEXT_ADDRE,Channel 2 Next Descriptor Address Extention Register" hexmask.long.word 0x08 0.--15. 1. " MSB ,Shows [35:32] of the next descriptor fetch address" line.long 0x0C "DPDMA_CH2_DSCR_NEXT_ADDR,Channel 2 Next Descriptor Address Register" line.long 0x10 "DPDMA_CH2_PYLD_CUR_ADDRE,Channel 2 Current Payload Address Extension Register" hexmask.long.word 0x10 0.--15. 1. " MSB ,Shows [35:32] of the current payload address under process" line.long 0x14 "DPDMA_CH2_PYLD_CUR_ADDR,Channel 2 Current Payload Address Register" line.long 0x18 "DPDMA_CH2_CNTL,Channel 2 Control Register" hexmask.long.word 0x18 20.--29. 1. " DSCR_DLY_CNT ,Programmable count used to schedule DSCR count" bitfld.long 0x18 16.--19. " DSCR_AXCACHE ,Descriptor fetch/update" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 14.--15. " DSCR_AXPROT ,All descriptor fetch/update for channel 2" "0,1,2,3" textline " " bitfld.long 0x18 10.--13. " QOS_DATA_RD ,DMA uses this QOS value along with AXI cmd for descriptor write" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 6.--9. " QOS_DSCR_RD ,DMA uses this QOS value along with AXI cmd for data read" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 2.--5. " QOS_DSCR_WR ,DMA uses this QOS value along with AXI cmd for descriptor read" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x18 1. " PAUSE ,Pause for DMA channel" "Normal,Paused" bitfld.long 0x18 0. " EN ,Enable/disable for DMA channel" "Disabled,Enabled" rgroup.long (0x400+0x1C)++0x0F line.long 0x00 "DPDMA_CH2_STATUS,Channel 2 Status Register" bitfld.long 0x00 21.--24. " OTRAN_CNT ,Outstanding AXI transaction counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x00 13.--20. 1. " PREAMBLE ,Preamble value received from current descriptor" bitfld.long 0x00 12. " EN_DSCR_INTR ,Completion interrupt is requested for current descriptor" "Not requested,Requested" textline " " bitfld.long 0x00 11. " EN_DSCR_UP ,Descriptor update is requested for current descriptor" "Not requested,Requested" bitfld.long 0x00 10. " DSCR_DONE ,Current descriptor is not valid unless IGNR_DONE is set" "Ignored,Valid when set" bitfld.long 0x00 9. " IGNR_DONE ,DMA channel current descriptor processing" "Stop when done,Ignore done bit" textline " " bitfld.long 0x00 8. " LDSCR_FRAME ,Current descriptor is last descriptor of the frame" "Not last,Last" bitfld.long 0x00 7. " LAST_DSCR ,Current descriptor is last descriptor in chain" "Not last,Last" bitfld.long 0x00 6. " EN_CRC ,CRC check" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " MODE ,Current descriptor mode" "Contiguous,Fragmented" bitfld.long 0x00 4. " BURST_TYPE ,Burst type information received from descriptor" "0,1" bitfld.long 0x00 0.--3. " BURST_LEN ,Burst length used for generating the AXI CMD for data read" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "DPDMA_CH2_VDO,Channel 2 Video Parameter Register" hexmask.long.tbyte 0x04 14.--31. 1. " LINE_LENGTH ,Line length information received from current descriptor" hexmask.long.word 0x04 0.--13. 1. " STRIDE ,Stride information received from current descriptor" line.long 0x08 "DPDMA_CH2_PYLD_SZ,Channel 2 Current Descriptor Payload Size Register" line.long 0x0C "DPDMA_CH2_PYLD_SZ,Channel 2 Current Descriptor Payload Size Register" hexmask.long.word 0x0C 0.--15. 1. " VAL ,Shows the descriptor ID of descriptor under process" group.long 0x500++0x1B line.long 0x00 "DPDMA_CH3_DSCR_STRT_ADDRE,Channel 3 Descriptor Start Address Extension Register" hexmask.long.word 0x00 0.--15. 1. " MSB ,4 bit address extention for first descriptor fetch" line.long 0x04 "DPDMA_CH3_DSCR_STRT_ADDR,Channel 3 Descriptor Start Address Register" line.long 0x08 "DPDMA_CH3_DSCR_NEXT_ADDRE,Channel 3 Next Descriptor Address Extention Register" hexmask.long.word 0x08 0.--15. 1. " MSB ,Shows [35:32] of the next descriptor fetch address" line.long 0x0C "DPDMA_CH3_DSCR_NEXT_ADDR,Channel 3 Next Descriptor Address Register" line.long 0x10 "DPDMA_CH3_PYLD_CUR_ADDRE,Channel 3 Current Payload Address Extension Register" hexmask.long.word 0x10 0.--15. 1. " MSB ,Shows [35:32] of the current payload address under process" line.long 0x14 "DPDMA_CH3_PYLD_CUR_ADDR,Channel 3 Current Payload Address Register" line.long 0x18 "DPDMA_CH3_CNTL,Channel 3 Control Register" hexmask.long.word 0x18 20.--29. 1. " DSCR_DLY_CNT ,Programmable count used to schedule DSCR count" bitfld.long 0x18 16.--19. " DSCR_AXCACHE ,Descriptor fetch/update" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 14.--15. " DSCR_AXPROT ,All descriptor fetch/update for channel 3" "0,1,2,3" textline " " bitfld.long 0x18 10.--13. " QOS_DATA_RD ,DMA uses this QOS value along with AXI cmd for descriptor write" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 6.--9. " QOS_DSCR_RD ,DMA uses this QOS value along with AXI cmd for data read" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 2.--5. " QOS_DSCR_WR ,DMA uses this QOS value along with AXI cmd for descriptor read" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x18 1. " PAUSE ,Pause for DMA channel" "Normal,Paused" bitfld.long 0x18 0. " EN ,Enable/disable for DMA channel" "Disabled,Enabled" rgroup.long (0x500+0x1C)++0x0F line.long 0x00 "DPDMA_CH3_STATUS,Channel 3 Status Register" bitfld.long 0x00 21.--24. " OTRAN_CNT ,Outstanding AXI transaction counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x00 13.--20. 1. " PREAMBLE ,Preamble value received from current descriptor" bitfld.long 0x00 12. " EN_DSCR_INTR ,Completion interrupt is requested for current descriptor" "Not requested,Requested" textline " " bitfld.long 0x00 11. " EN_DSCR_UP ,Descriptor update is requested for current descriptor" "Not requested,Requested" bitfld.long 0x00 10. " DSCR_DONE ,Current descriptor is not valid unless IGNR_DONE is set" "Ignored,Valid when set" bitfld.long 0x00 9. " IGNR_DONE ,DMA channel current descriptor processing" "Stop when done,Ignore done bit" textline " " bitfld.long 0x00 8. " LDSCR_FRAME ,Current descriptor is last descriptor of the frame" "Not last,Last" bitfld.long 0x00 7. " LAST_DSCR ,Current descriptor is last descriptor in chain" "Not last,Last" bitfld.long 0x00 6. " EN_CRC ,CRC check" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " MODE ,Current descriptor mode" "Contiguous,Fragmented" bitfld.long 0x00 4. " BURST_TYPE ,Burst type information received from descriptor" "0,1" bitfld.long 0x00 0.--3. " BURST_LEN ,Burst length used for generating the AXI CMD for data read" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "DPDMA_CH3_VDO,Channel 3 Video Parameter Register" hexmask.long.tbyte 0x04 14.--31. 1. " LINE_LENGTH ,Line length information received from current descriptor" hexmask.long.word 0x04 0.--13. 1. " STRIDE ,Stride information received from current descriptor" line.long 0x08 "DPDMA_CH3_PYLD_SZ,Channel 3 Current Descriptor Payload Size Register" line.long 0x0C "DPDMA_CH3_PYLD_SZ,Channel 3 Current Descriptor Payload Size Register" hexmask.long.word 0x0C 0.--15. 1. " VAL ,Shows the descriptor ID of descriptor under process" group.long 0x600++0x1B line.long 0x00 "DPDMA_CH4_DSCR_STRT_ADDRE,Channel 4 Descriptor Start Address Extension Register" hexmask.long.word 0x00 0.--15. 1. " MSB ,4 bit address extention for first descriptor fetch" line.long 0x04 "DPDMA_CH4_DSCR_STRT_ADDR,Channel 4 Descriptor Start Address Register" line.long 0x08 "DPDMA_CH4_DSCR_NEXT_ADDRE,Channel 4 Next Descriptor Address Extention Register" hexmask.long.word 0x08 0.--15. 1. " MSB ,Shows [35:32] of the next descriptor fetch address" line.long 0x0C "DPDMA_CH4_DSCR_NEXT_ADDR,Channel 4 Next Descriptor Address Register" line.long 0x10 "DPDMA_CH4_PYLD_CUR_ADDRE,Channel 4 Current Payload Address Extension Register" hexmask.long.word 0x10 0.--15. 1. " MSB ,Shows [35:32] of the current payload address under process" line.long 0x14 "DPDMA_CH4_PYLD_CUR_ADDR,Channel 4 Current Payload Address Register" line.long 0x18 "DPDMA_CH4_CNTL,Channel 4 Control Register" hexmask.long.word 0x18 20.--29. 1. " DSCR_DLY_CNT ,Programmable count used to schedule DSCR count" bitfld.long 0x18 16.--19. " DSCR_AXCACHE ,Descriptor fetch/update" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 14.--15. " DSCR_AXPROT ,All descriptor fetch/update for channel 4" "0,1,2,3" textline " " bitfld.long 0x18 10.--13. " QOS_DATA_RD ,DMA uses this QOS value along with AXI cmd for descriptor write" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 6.--9. " QOS_DSCR_RD ,DMA uses this QOS value along with AXI cmd for data read" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 2.--5. " QOS_DSCR_WR ,DMA uses this QOS value along with AXI cmd for descriptor read" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x18 1. " PAUSE ,Pause for DMA channel" "Normal,Paused" bitfld.long 0x18 0. " EN ,Enable/disable for DMA channel" "Disabled,Enabled" rgroup.long (0x600+0x1C)++0x0F line.long 0x00 "DPDMA_CH4_STATUS,Channel 4 Status Register" bitfld.long 0x00 21.--24. " OTRAN_CNT ,Outstanding AXI transaction counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x00 13.--20. 1. " PREAMBLE ,Preamble value received from current descriptor" bitfld.long 0x00 12. " EN_DSCR_INTR ,Completion interrupt is requested for current descriptor" "Not requested,Requested" textline " " bitfld.long 0x00 11. " EN_DSCR_UP ,Descriptor update is requested for current descriptor" "Not requested,Requested" bitfld.long 0x00 10. " DSCR_DONE ,Current descriptor is not valid unless IGNR_DONE is set" "Ignored,Valid when set" bitfld.long 0x00 9. " IGNR_DONE ,DMA channel current descriptor processing" "Stop when done,Ignore done bit" textline " " bitfld.long 0x00 8. " LDSCR_FRAME ,Current descriptor is last descriptor of the frame" "Not last,Last" bitfld.long 0x00 7. " LAST_DSCR ,Current descriptor is last descriptor in chain" "Not last,Last" bitfld.long 0x00 6. " EN_CRC ,CRC check" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " MODE ,Current descriptor mode" "Contiguous,Fragmented" bitfld.long 0x00 4. " BURST_TYPE ,Burst type information received from descriptor" "0,1" bitfld.long 0x00 0.--3. " BURST_LEN ,Burst length used for generating the AXI CMD for data read" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "DPDMA_CH4_VDO,Channel 4 Video Parameter Register" hexmask.long.tbyte 0x04 14.--31. 1. " LINE_LENGTH ,Line length information received from current descriptor" hexmask.long.word 0x04 0.--13. 1. " STRIDE ,Stride information received from current descriptor" line.long 0x08 "DPDMA_CH4_PYLD_SZ,Channel 4 Current Descriptor Payload Size Register" line.long 0x0C "DPDMA_CH4_PYLD_SZ,Channel 4 Current Descriptor Payload Size Register" hexmask.long.word 0x0C 0.--15. 1. " VAL ,Shows the descriptor ID of descriptor under process" group.long 0x700++0x1B line.long 0x00 "DPDMA_CH5_DSCR_STRT_ADDRE,Channel 5 Descriptor Start Address Extension Register" hexmask.long.word 0x00 0.--15. 1. " MSB ,4 bit address extention for first descriptor fetch" line.long 0x04 "DPDMA_CH5_DSCR_STRT_ADDR,Channel 5 Descriptor Start Address Register" line.long 0x08 "DPDMA_CH5_DSCR_NEXT_ADDRE,Channel 5 Next Descriptor Address Extention Register" hexmask.long.word 0x08 0.--15. 1. " MSB ,Shows [35:32] of the next descriptor fetch address" line.long 0x0C "DPDMA_CH5_DSCR_NEXT_ADDR,Channel 5 Next Descriptor Address Register" line.long 0x10 "DPDMA_CH5_PYLD_CUR_ADDRE,Channel 5 Current Payload Address Extension Register" hexmask.long.word 0x10 0.--15. 1. " MSB ,Shows [35:32] of the current payload address under process" line.long 0x14 "DPDMA_CH5_PYLD_CUR_ADDR,Channel 5 Current Payload Address Register" line.long 0x18 "DPDMA_CH5_CNTL,Channel 5 Control Register" hexmask.long.word 0x18 20.--29. 1. " DSCR_DLY_CNT ,Programmable count used to schedule DSCR count" bitfld.long 0x18 16.--19. " DSCR_AXCACHE ,Descriptor fetch/update" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 14.--15. " DSCR_AXPROT ,All descriptor fetch/update for channel 5" "0,1,2,3" textline " " bitfld.long 0x18 10.--13. " QOS_DATA_RD ,DMA uses this QOS value along with AXI cmd for descriptor write" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 6.--9. " QOS_DSCR_RD ,DMA uses this QOS value along with AXI cmd for data read" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 2.--5. " QOS_DSCR_WR ,DMA uses this QOS value along with AXI cmd for descriptor read" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x18 1. " PAUSE ,Pause for DMA channel" "Normal,Paused" bitfld.long 0x18 0. " EN ,Enable/disable for DMA channel" "Disabled,Enabled" rgroup.long (0x700+0x1C)++0x0F line.long 0x00 "DPDMA_CH5_STATUS,Channel 5 Status Register" bitfld.long 0x00 21.--24. " OTRAN_CNT ,Outstanding AXI transaction counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x00 13.--20. 1. " PREAMBLE ,Preamble value received from current descriptor" bitfld.long 0x00 12. " EN_DSCR_INTR ,Completion interrupt is requested for current descriptor" "Not requested,Requested" textline " " bitfld.long 0x00 11. " EN_DSCR_UP ,Descriptor update is requested for current descriptor" "Not requested,Requested" bitfld.long 0x00 10. " DSCR_DONE ,Current descriptor is not valid unless IGNR_DONE is set" "Ignored,Valid when set" bitfld.long 0x00 9. " IGNR_DONE ,DMA channel current descriptor processing" "Stop when done,Ignore done bit" textline " " bitfld.long 0x00 8. " LDSCR_FRAME ,Current descriptor is last descriptor of the frame" "Not last,Last" bitfld.long 0x00 7. " LAST_DSCR ,Current descriptor is last descriptor in chain" "Not last,Last" bitfld.long 0x00 6. " EN_CRC ,CRC check" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " MODE ,Current descriptor mode" "Contiguous,Fragmented" bitfld.long 0x00 4. " BURST_TYPE ,Burst type information received from descriptor" "0,1" bitfld.long 0x00 0.--3. " BURST_LEN ,Burst length used for generating the AXI CMD for data read" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "DPDMA_CH5_VDO,Channel 5 Video Parameter Register" hexmask.long.tbyte 0x04 14.--31. 1. " LINE_LENGTH ,Line length information received from current descriptor" hexmask.long.word 0x04 0.--13. 1. " STRIDE ,Stride information received from current descriptor" line.long 0x08 "DPDMA_CH5_PYLD_SZ,Channel 5 Current Descriptor Payload Size Register" line.long 0x0C "DPDMA_CH5_PYLD_SZ,Channel 5 Current Descriptor Payload Size Register" hexmask.long.word 0x0C 0.--15. 1. " VAL ,Shows the descriptor ID of descriptor under process" group.long 0xFFC++0x03 line.long 0x00 "DPDMA_ECO,ECO Register" width 0x0B tree.end tree.end tree "EFUSE (EFUSE Module)" base ad:0xFFCC0000 width 16. group.word 0x00++0x01 line.word 0x00 "WR_LOCK,Write Lock Register" group.long 0x04++0x03 line.long 0x00 "CFG,Configuration Register" bitfld.long 0x00 5. " SLVERR_ENABLE ,SLVERR enable/disable" "Disabled,Enabled" bitfld.long 0x00 2.--3. " MARGIN_RD ,Efuse read margin control" "Normal,Margin 1,Margin 2,?..." bitfld.long 0x00 1. " PGM_EN ,Efuse PS control, enabled programming if set" "Disabled,Enabled" bitfld.long 0x00 0. " EFUSE_CLK_SEL ,Selects the source of the efuse clock" "Internal ring osc.,PS_REF_CLK" if (((d.l(ad:0xFFCC0000+0x08))&0x40)==0x40) rgroup.long 0x08++0x03 line.long 0x00 "STATUS,Status Register" bitfld.long 0x00 7. " AES_CRC_PASS ,AES key integrity check passed" "Not passed,Passed" bitfld.long 0x00 6. " AES_CRC_DONE ,AES key integrity chck has finished" "Not finished,Finished" bitfld.long 0x00 5. " CACHE_DONE ,EFUSE cache has completed loading" "Not completed,Completed" bitfld.long 0x00 4. " CACHE_LOAD ,EFUSE cache is currently being loaded" "Not loaded,Loaded" textline " " bitfld.long 0x00 0. " EFUSE_0_TBIT ,TBIT pattern was successfully read from efuse 0" "Failed,Passed" else rgroup.long 0x08++0x03 line.long 0x00 "STATUS,Status Register" bitfld.long 0x00 6. " AES_CRC_DONE ,AES key integrity chck has finished" "Not finished,Finished" bitfld.long 0x00 5. " CACHE_DONE ,EFUSE cache has completed loading" "Not completed,Completed" bitfld.long 0x00 4. " CACHE_LOAD ,EFUSE cache is currently being loaded" "Not loaded,Loaded" textline " " bitfld.long 0x00 0. " EFUSE_0_TBIT ,TBIT pattern was successfully read from efuse 0" "Failed,Passed" endif wgroup.long 0x0C++0x07 line.long 0x00 "PGM_ADDR,Program Bit Address Register" bitfld.long 0x00 5.--10. " ROW ,Efuse row address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--4. " COLUMN ,Efuse column address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x04 "RD_ADDR,Read Address Register" bitfld.long 0x04 5.--10. " ROW ,Efuse row address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" rgroup.long 0x14++0x03 line.long 0x00 "RD_DATA,Read Data Register" group.long 0x18++0x17 line.long 0x00 "TPGM,Program Strobe Width Register" hexmask.long.word 0x00 0.--15. 1. " VALUE ,Count value for program strobe duration with resepct to reference clock" line.long 0x04 "TRD,Read Strobe Width Register" hexmask.long.byte 0x04 0.--7. 1. " VALUE ,Count value for read strobe duration with respect to the SYSOSC clock" line.long 0x08 "TSU_H_PS,PS To Strobe Timing Register" hexmask.long.byte 0x08 0.--7. 1. " VALUE ,Count value for the PS to STROBE setup/hold timing parameter" line.long 0x0C "TSU_H_PS_CS,PS To CS Timing Register" hexmask.long.byte 0x0C 0.--7. 1. " VALUE ,Count value for the PS to CSB setup/hold timing parameter" line.long 0x10 "TSU_H_CS,CS To STROBE Timing Register" bitfld.long 0x10 0.--3. " VALUE ,Count value for the CSB/LOAD/PGENB to STROBE setup/hold timing parameter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x14 "ISR,Interrupt Status Register" eventfld.long 0x14 31. " APB_SLVERR ,APB slave error" "No error,Error" eventfld.long 0x14 4. " CACHE_ERROR ,Indicates that there was a parity error in the EFUSE cache" "No error,Error" eventfld.long 0x14 3. " RD_ERROR ,Indicates that a RD was requested to a restricted FUSE" "Not requested,Requested" eventfld.long 0x14 2. " RD_DONE ,Indicates that the RD operation has completed" "Not completed,Completed" textline " " eventfld.long 0x14 1. " PGM_ERROR ,Indicates that PGM was requested to a restricted FUSE" "Not requested,Requested" eventfld.long 0x14 0. " PGM_DONE ,Indicates that the PGM operation has completed" "Not completed,Completed" group.long 0x34++0x03 line.long 0x00 "IMR_SET/CLR,Interrupt Mask Status Register" setclrfld.long 0x00 31. 0x08 31. 0x04 31. " APB_SLVERR ,APB slave error mask" "Not masked,Masked" setclrfld.long 0x00 4. 0x08 4. 0x04 4. " CACHE_ERROR ,Cache error mask" "Not masked,Masked" setclrfld.long 0x00 3. 0x08 3. 0x04 3. " RD_ERROR ,Read error mask" "Not masked,Masked" setclrfld.long 0x00 2. 0x08 2. 0x04 2. " RD_DONE ,Read done mask" "Not masked,Masked" textline " " setclrfld.long 0x00 1. 0x08 1. 0x04 1. " PGM_ERROR ,PGM error mask" "Not masked,Masked" setclrfld.long 0x00 0. 0x08 0. 0x04 0. " PGM_DONE ,PGM done mask" "Not masked,Masked" wgroup.long 0x40++0x03 line.long 0x00 "CACHE_LOAD,Cache Load Register" bitfld.long 0x00 0. " LOAD ,Reload the efuse cache" "No effect,Reload" group.long 0x44++0x03 line.long 0x00 "PGM_LOCK,Program Lock Register" bitfld.long 0x00 0. " SPK_ID_LOCK ,Prevents programming the SPK_ID fuses" "Not loacked,Locked" wgroup.long 0x48++0x03 line.long 0x00 "AES_CRC,AES Key Integrity Check Register" group.long 0xFC++0x03 line.long 0x00 "ECO,Miscellaneous Control Register" bitfld.long 0x00 0.--3. " GF_STAGES ,Configures the number of stages to be used for the PL -> PS security signals passing through the glitch filters" "0,,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long 0x100C++0x0B line.long 0x00 "DNA_0,Device DNA 0 Register" line.long 0x04 "DNA_1,Device DNA 1 Register" line.long 0x08 "DNA_2,Device DNA 2 Register" rgroup.long 0x1020++0x23 line.long 0x00 "USER_0,User Fuses 0 Register" line.long 0x04 "USER_1,User Fuses 1 Register" line.long 0x08 "USER_2,User Fuses 2 Register" line.long 0x0C "USER_3,User Fuses 3 Register" line.long 0x10 "USER_4,User Fuses 4 Register" line.long 0x14 "USER_5,User Fuses 5 Register" line.long 0x18 "USER_6,User Fuses 6 Register" line.long 0x1C "USER_7,User Fuses 7 Register" line.long 0x20 "MISC_USER_CTRL,Miscellaneous User Control Register" bitfld.long 0x20 10. " LBIST_EN ,Enables LBIST during pre-boot" "Disabled,Enabled" bitfld.long 0x20 7. " USR_WRLK_7 ,Locks writing to USER_7 fuses" "Not locked,Locked" bitfld.long 0x20 6. " USR_WRLK_6 ,Locks writing to USER_6 fuses" "Not locked,Locked" bitfld.long 0x20 5. " USR_WRLK_5 ,Locks writing to USER_5 fuses" "Not locked,Locked" textline " " bitfld.long 0x20 4. " USR_WRLK_4 ,Locks writing to USER_4 fuses" "Not locked,Locked" bitfld.long 0x20 3. " USR_WRLK_3 ,Locks writing to USER_3 fuses" "Not locked,Locked" bitfld.long 0x20 2. " USR_WRLK_2 ,Locks writing to USER_2 fuses" "Not locked,Locked" bitfld.long 0x20 1. " USR_WRLK_1 ,Locks writing to USER_1 fuses" "Not locked,Locked" textline " " bitfld.long 0x20 0. " USR_WRLK_0 ,Locks writing to USER_0 fuses" "Not locked,Locked" rgroup.long 0x1058++0x07 line.long 0x00 "USRCODE,JTAG Usercode Register" bitfld.long 0x00 30.--31. " PPK1_INVLD ,Revokes PPK1" "0,1,2,3" bitfld.long 0x00 29. " PPK1_WRLK ,Locks writing to PPK1 efuses" "Not locked,Locked" bitfld.long 0x00 27.--28. " PPK0_INVLD ,Revokes PPK0" "0,1,2,3" bitfld.long 0x00 26. " PPK0_WRLK ,Locks writing to PPK0 efuses" "Not locked,Locked" textline " " bitfld.long 0x00 24.--25. " RSA_EN ,Enables RSA authentication during boot" "0,1,2,3" bitfld.long 0x00 10. " SEC_LOCK ,Disables the reboot into JTAG mode when doing a secure lockdown" "No,Yes" bitfld.long 0x00 9. " PROG_GATE_2 ,Disables the PROG_GATE feature in the PPD" "No,Yes" bitfld.long 0x00 8. " PROG_GATE_1 ,Disables the PROG_GATE feature in the PPD" "No,Yes" textline " " bitfld.long 0x00 7. " PROG_GATE_0 ,Disables the PROG_GATE feature in the PPD" "No,Yes" bitfld.long 0x00 6. " DFT_DIS ,Disables DFT boot mode" "No,Yes" bitfld.long 0x00 5. " JTAG_DIS ,Disables the JTAG controller" "No,Yes" bitfld.long 0x00 4. " ERROR_DIS ,Supresses error output from the PMU" "Not supressed,Supressed" textline " " bitfld.long 0x00 3. " BBRAM_DIS ,Disables the BBRAM key" "No,Yes" bitfld.long 0x00 2. " ENC_ONLY ,Requires all boots to be encrypted using the efuse key" "Disabled,Enabled" bitfld.long 0x00 1. " AES_WRLK ,Locks writing to the AES key section of efuse" "Not locked,Locked" bitfld.long 0x00 0. " AES_RDLK ,Locks the AES key CRC check function" "Not locked,Locked" line.long 0x04 "SPK_ID,SPK Identification Code Register" rgroup.long 0x10A0++0x5F line.long 0x00 "PPK0_0,PPK0 Register 0" line.long 0x04 "PPK0_1,PPK0 Register 1" line.long 0x08 "PPK0_2,PPK0 Register 2" line.long 0x0C "PPK0_3,PPK0 Register 3" line.long 0x10 "PPK0_4,PPK0 Register 4" line.long 0x14 "PPK0_5,PPK0 Register 5" line.long 0x18 "PPK0_6,PPK0 Register 6" line.long 0x1C "PPK0_7,PPK0 Register 7" line.long 0x20 "PPK0_8,PPK0 Register 8" line.long 0x24 "PPK0_9,PPK0 Register 9" line.long 0x28 "PPK0_10,PPK0 Register 10" line.long 0x2C "PPK0_11,PPK0 Register 11" line.long 0x30 "PPK1_0,PPK1 Register 0" line.long 0x34 "PPK1_1,PPK1 Register 1" line.long 0x38 "PPK1_2,PPK1 Register 2" line.long 0x3C "PPK1_3,PPK1 Register 3" line.long 0x40 "PPK1_4,PPK1 Register 4" line.long 0x44 "PPK1_5,PPK1 Register 5" line.long 0x48 "PPK1_6,PPK1 Register 6" line.long 0x4C "PPK1_7,PPK1 Register 7" line.long 0x50 "PPK1_8,PPK1 Register 8" line.long 0x54 "PPK1_9,PPK1 Register 9" line.long 0x58 "PPK1_10,PPK1 Register 10" line.long 0x5C "PPK1_11,PPK1 Register 11" width 0x0B tree.end tree "FPD_GPV (Full Power Domain GPV)" base ad:0xFD700000 width 39. rgroup.long 0x1FD0++0x03 line.long 0x00 "PERIPH_ID_4,Peripherial ID Register 4" hexmask.long.byte 0x00 0.--7. 1. " PERIPH_ID_4 ,4KB count, JEP106 continuation code" rgroup.long 0x1FE0++0x1F line.long 0x00 "PERIPH_ID_0,Peripherial ID Register 0" hexmask.long.byte 0x00 0.--7. 1. " PERIPH_ID_0 ,Part number [7:0]" line.long 0x04 "PERIPH_ID_1,Peripherial ID Register 1" hexmask.long.byte 0x04 0.--7. 1. " PERIPH_ID_1 ,JEP106[3:0], part number [11:8]" line.long 0x08 "PERIPH_ID_2,Peripherial ID Register 2" hexmask.long.byte 0x08 0.--7. 1. " PERIPH_ID_2 ,Revision, JEP106 code flag, JEP106[6:4]" line.long 0x0C "PERIPH_ID_3,Peripherial ID Register 3" bitfld.long 0x0C 4.--7. " REV_AND ,Revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 0.--3. " CUST_MOD_NUM ,Customer modified number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x10 "COMP_ID_0,Component ID Register 0" hexmask.long.byte 0x10 0.--7. 1. " COMP_ID_0 ,Preamble" line.long 0x14 "COMP_ID_1,Component ID Register 1" hexmask.long.byte 0x14 0.--7. 1. " COMP_ID_1 ,Generic IP component class, preamble" line.long 0x18 "COMP_ID_2,Component ID Register 2" hexmask.long.byte 0x18 0.--7. 1. " COMP_ID_2 ,Preamble" line.long 0x1C "COMP_ID_3,Component ID Register 3" hexmask.long.byte 0x1C 0.--7. 1. " COMP_ID_3 ,Preamble" group.long 0x2008++0x03 line.long 0x00 "INTFPD_INTLPD_IB_FN_MOD_ISS_BM,Bus Matrix Issuing Functionality Modification Register" bitfld.long 0x00 0.--1. " FN_MOD_ISS_BM ,Bus matrix issuing functionality modification" "0,1,2,3" group.long 0x2024++0x03 line.long 0x00 "INTFPD_INTLPD_IB_FN_MOD2,Issuing Functionality Modification Register 2" bitfld.long 0x00 0. " BYPASS_MERGE ,Do not alter any transactions that could pass through legally without alteration" "No bypass,Bypass" group.long 0x2108++0x03 line.long 0x00 "INTFPD_INTLPD_IB_FN_MOD,Issuing Functionality Modification Register" bitfld.long 0x00 1. " FN_MOD[1] ,Write issuing, write_iss_override" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Read issuing, read_iss_override" "Disabled,Enabled" group.long (0x42000+0x108)++0x27 line.long 0x00 "INTFPDCCI_INTFPDMAIN_IB_FN_MOD,Issuing Functionality Modification Register" bitfld.long 0x00 1. " FN_MOD[1] ,Write issuing, write_iss_override" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Read issuing, read_iss_override" "Disabled,Enabled" line.long 0x04 "INTFPDCCI_INTFPDMAIN_IB_QOS_CNTL,Qos Control Register" bitfld.long 0x04 7. " EN_AWAR_OT ,Enable combined regulation of outstanding transactions" "Disabled,Enabled" bitfld.long 0x04 6. " EN_AR_OT ,Enable regulation of outstanding read transactions" "Disabled,Enabled" bitfld.long 0x04 5. " EN_AW_OT ,Enable regulation of outstanding write transactions" "Disabled,Enabled" bitfld.long 0x04 2. " EN_AWAR_RATE ,Enable combined AW/AR rate regulation" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " EN_AR_RATE ,Enable AR rate regulation" "Disabled,Enabled" bitfld.long 0x04 0. " EN_AW_RATE ,Enable AW rate regulation" "Disabled,Enabled" line.long 0x08 "INTFPDCCI_INTFPDMAIN_IB_MAX_OT,Maximum Number Of Outstanding Transactions Register" bitfld.long 0x08 24.--29. " AR_MAX_OTI ,Integer part of max outstanding AR addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 16.--23. 1. " AR_MAX_OTF ,Fraction part of max outstanding AR addresses" bitfld.long 0x08 8.--13. " AW_MAX_OTI ,Integer part of max outstanding AW addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 0.--7. 1. " AW_MAX_OTF ,Fraction part of max outstanding AW addresses" line.long 0x0C "INTFPDCCI_INTFPDMAIN_IB_MAX_COMB_OT,Maximum Number Of Combined Outstanding Transactions Register" hexmask.long.byte 0x0C 8.--14. 1. " AWAR_MAX_OTI ,Integer part of max combined outstanding AW/AR addresses" hexmask.long.byte 0x0C 0.--7. 1. " AWAR_MAX_OTF ,Fraction part of max combined outstanding AW/AR addresses" line.long 0x10 "INTFPDCCI_INTFPDMAIN_IB_AW_P,AW Channel Peak Rate Register" hexmask.long.byte 0x10 24.--31. 1. " AW_P ,Channel peak rate" line.long 0x14 "INTFPDCCI_INTFPDMAIN_IB_AW_B,AW Channel Burstiness Allowance Register" hexmask.long.word 0x14 0.--15. 1. " AW_B ,Channel burstiness integer number of transfers" line.long 0x18 "INTFPDCCI_INTFPDMAIN_IB_AW_R,AW Channel Average Rate Register" hexmask.long.word 0x18 20.--31. 1. " AW_R ,Channel average rate" line.long 0x1C "INTFPDCCI_INTFPDMAIN_IB_AR_P,AR Channel Peak Rate Register" hexmask.long.byte 0x1C 24.--31. 1. " AR_P ,Channel peak rate" line.long 0x20 "INTFPDCCI_INTFPDMAIN_IB_AR_B,AR Channel Burstiness Allowance Register" hexmask.long.word 0x20 0.--15. 1. " AR_B ,Channel burstiness" line.long 0x24 "INTFPDCCI_INTFPDMAIN_IB_AR_R,AR Channel Average Rate" hexmask.long.word 0x24 20.--31. 1. " AR_R ,Channel average rate" group.long (0x43000+0x108)++0x27 line.long 0x00 "INTFPDSMMUTBU3_INTFPDMAIN_FN_MOD,Issuing Functionality Modification Register" bitfld.long 0x00 1. " FN_MOD[1] ,Write issuing, write_iss_override" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Read issuing, read_iss_override" "Disabled,Enabled" line.long 0x04 "INTFPDSMMUTBU3_INTFPDMAIN_QOS_CNTL,Qos Control Register" bitfld.long 0x04 7. " EN_AWAR_OT ,Enable combined regulation of outstanding transactions" "Disabled,Enabled" bitfld.long 0x04 6. " EN_AR_OT ,Enable regulation of outstanding read transactions" "Disabled,Enabled" bitfld.long 0x04 5. " EN_AW_OT ,Enable regulation of outstanding write transactions" "Disabled,Enabled" bitfld.long 0x04 2. " EN_AWAR_RATE ,Enable combined AW/AR rate regulation" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " EN_AR_RATE ,Enable AR rate regulation" "Disabled,Enabled" bitfld.long 0x04 0. " EN_AW_RATE ,Enable AW rate regulation" "Disabled,Enabled" line.long 0x08 "INTFPDSMMUTBU3_INTFPDMAIN_MAX_OT,Maximum Number Of Outstanding Transactions Register" bitfld.long 0x08 24.--29. " AR_MAX_OTI ,Integer part of max outstanding AR addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 16.--23. 1. " AR_MAX_OTF ,Fraction part of max outstanding AR addresses" bitfld.long 0x08 8.--13. " AW_MAX_OTI ,Integer part of max outstanding AW addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 0.--7. 1. " AW_MAX_OTF ,Fraction part of max outstanding AW addresses" line.long 0x0C "INTFPDSMMUTBU3_INTFPDMAIN_MAX_COMB_OT,Maximum Number Of Combined Outstanding Transactions Register" hexmask.long.byte 0x0C 8.--14. 1. " AWAR_MAX_OTI ,Integer part of max combined outstanding AW/AR addresses" hexmask.long.byte 0x0C 0.--7. 1. " AWAR_MAX_OTF ,Fraction part of max combined outstanding AW/AR addresses" line.long 0x10 "INTFPDSMMUTBU3_INTFPDMAIN_AW_P,AW Channel Peak Rate Register" hexmask.long.byte 0x10 24.--31. 1. " AW_P ,Channel peak rate" line.long 0x14 "INTFPDSMMUTBU3_INTFPDMAIN_AW_B,AW Channel Burstiness Allowance Register" hexmask.long.word 0x14 0.--15. 1. " AW_B ,Channel burstiness integer number of transfers" line.long 0x18 "INTFPDSMMUTBU3_INTFPDMAIN_AW_R,AW Channel Average Rate Register" hexmask.long.word 0x18 20.--31. 1. " AW_R ,Channel average rate" line.long 0x1C "INTFPDSMMUTBU3_INTFPDMAIN_AR_P,AR Channel Peak Rate Register" hexmask.long.byte 0x1C 24.--31. 1. " AR_P ,Channel peak rate" line.long 0x20 "INTFPDSMMUTBU3_INTFPDMAIN_AR_B,AR Channel Burstiness Allowance Register" hexmask.long.word 0x20 0.--15. 1. " AR_B ,Channel burstiness" line.long 0x24 "INTFPDSMMUTBU3_INTFPDMAIN_AR_R,AR Channel Average Rate" hexmask.long.word 0x24 20.--31. 1. " AR_R ,Channel average rate" group.long (0x44000+0x108)++0x27 line.long 0x00 "INTFPDSMMUTBU4_INTFPDMAIN_FN_MOD,Issuing Functionality Modification Register" bitfld.long 0x00 1. " FN_MOD[1] ,Write issuing, write_iss_override" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Read issuing, read_iss_override" "Disabled,Enabled" line.long 0x04 "INTFPDSMMUTBU4_INTFPDMAIN_QOS_CNTL,Qos Control Register" bitfld.long 0x04 7. " EN_AWAR_OT ,Enable combined regulation of outstanding transactions" "Disabled,Enabled" bitfld.long 0x04 6. " EN_AR_OT ,Enable regulation of outstanding read transactions" "Disabled,Enabled" bitfld.long 0x04 5. " EN_AW_OT ,Enable regulation of outstanding write transactions" "Disabled,Enabled" bitfld.long 0x04 2. " EN_AWAR_RATE ,Enable combined AW/AR rate regulation" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " EN_AR_RATE ,Enable AR rate regulation" "Disabled,Enabled" bitfld.long 0x04 0. " EN_AW_RATE ,Enable AW rate regulation" "Disabled,Enabled" line.long 0x08 "INTFPDSMMUTBU4_INTFPDMAIN_MAX_OT,Maximum Number Of Outstanding Transactions Register" bitfld.long 0x08 24.--29. " AR_MAX_OTI ,Integer part of max outstanding AR addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 16.--23. 1. " AR_MAX_OTF ,Fraction part of max outstanding AR addresses" bitfld.long 0x08 8.--13. " AW_MAX_OTI ,Integer part of max outstanding AW addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 0.--7. 1. " AW_MAX_OTF ,Fraction part of max outstanding AW addresses" line.long 0x0C "INTFPDSMMUTBU4_INTFPDMAIN_MAX_COMB_OT,Maximum Number Of Combined Outstanding Transactions Register" hexmask.long.byte 0x0C 8.--14. 1. " AWAR_MAX_OTI ,Integer part of max combined outstanding AW/AR addresses" hexmask.long.byte 0x0C 0.--7. 1. " AWAR_MAX_OTF ,Fraction part of max combined outstanding AW/AR addresses" line.long 0x10 "INTFPDSMMUTBU4_INTFPDMAIN_AW_P,AW Channel Peak Rate Register" hexmask.long.byte 0x10 24.--31. 1. " AW_P ,Channel peak rate" line.long 0x14 "INTFPDSMMUTBU4_INTFPDMAIN_AW_B,AW Channel Burstiness Allowance Register" hexmask.long.word 0x14 0.--15. 1. " AW_B ,Channel burstiness integer number of transfers" line.long 0x18 "INTFPDSMMUTBU4_INTFPDMAIN_AW_R,AW Channel Average Rate Register" hexmask.long.word 0x18 20.--31. 1. " AW_R ,Channel average rate" line.long 0x1C "INTFPDSMMUTBU4_INTFPDMAIN_AR_P,AR Channel Peak Rate Register" hexmask.long.byte 0x1C 24.--31. 1. " AR_P ,Channel peak rate" line.long 0x20 "INTFPDSMMUTBU4_INTFPDMAIN_AR_B,AR Channel Burstiness Allowance Register" hexmask.long.word 0x20 0.--15. 1. " AR_B ,Channel burstiness" line.long 0x24 "INTFPDSMMUTBU4_INTFPDMAIN_AR_R,AR Channel Average Rate" hexmask.long.word 0x24 20.--31. 1. " AR_R ,Channel average rate" group.long (0x45000+0x108)++0x27 line.long 0x00 "AFIFM0M_INTFPD_FN_MOD,Issuing Functionality Modification Register" bitfld.long 0x00 1. " FN_MOD[1] ,Write issuing, write_iss_override" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Read issuing, read_iss_override" "Disabled,Enabled" line.long 0x04 "AFIFM0M_INTFPD_QOS_CNTL,Qos Control Register" bitfld.long 0x04 7. " EN_AWAR_OT ,Enable combined regulation of outstanding transactions" "Disabled,Enabled" bitfld.long 0x04 6. " EN_AR_OT ,Enable regulation of outstanding read transactions" "Disabled,Enabled" bitfld.long 0x04 5. " EN_AW_OT ,Enable regulation of outstanding write transactions" "Disabled,Enabled" bitfld.long 0x04 2. " EN_AWAR_RATE ,Enable combined AW/AR rate regulation" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " EN_AR_RATE ,Enable AR rate regulation" "Disabled,Enabled" bitfld.long 0x04 0. " EN_AW_RATE ,Enable AW rate regulation" "Disabled,Enabled" line.long 0x08 "AFIFM0M_INTFPD_MAX_OT,Maximum Number Of Outstanding Transactions Register" bitfld.long 0x08 24.--29. " AR_MAX_OTI ,Integer part of max outstanding AR addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 16.--23. 1. " AR_MAX_OTF ,Fraction part of max outstanding AR addresses" bitfld.long 0x08 8.--13. " AW_MAX_OTI ,Integer part of max outstanding AW addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 0.--7. 1. " AW_MAX_OTF ,Fraction part of max outstanding AW addresses" line.long 0x0C "AFIFM0M_INTFPD_MAX_COMB_OT,Maximum Number Of Combined Outstanding Transactions Register" hexmask.long.byte 0x0C 8.--14. 1. " AWAR_MAX_OTI ,Integer part of max combined outstanding AW/AR addresses" hexmask.long.byte 0x0C 0.--7. 1. " AWAR_MAX_OTF ,Fraction part of max combined outstanding AW/AR addresses" line.long 0x10 "AFIFM0M_INTFPD_AW_P,AW Channel Peak Rate Register" hexmask.long.byte 0x10 24.--31. 1. " AW_P ,Channel peak rate" line.long 0x14 "AFIFM0M_INTFPD_AW_B,AW Channel Burstiness Allowance Register" hexmask.long.word 0x14 0.--15. 1. " AW_B ,Channel burstiness integer number of transfers" line.long 0x18 "AFIFM0M_INTFPD_AW_R,AW Channel Average Rate Register" hexmask.long.word 0x18 20.--31. 1. " AW_R ,Channel average rate" line.long 0x1C "AFIFM0M_INTFPD_AR_P,AR Channel Peak Rate Register" hexmask.long.byte 0x1C 24.--31. 1. " AR_P ,Channel peak rate" line.long 0x20 "AFIFM0M_INTFPD_AR_B,AR Channel Burstiness Allowance Register" hexmask.long.word 0x20 0.--15. 1. " AR_B ,Channel burstiness" line.long 0x24 "AFIFM0M_INTFPD_AR_R,AR Channel Average Rate" hexmask.long.word 0x24 20.--31. 1. " AR_R ,Channel average rate" group.long (0x46000+0x108)++0x27 line.long 0x00 "AFIFM1M_INTFPD_FN_MOD,Issuing Functionality Modification Register" bitfld.long 0x00 1. " FN_MOD[1] ,Write issuing, write_iss_override" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Read issuing, read_iss_override" "Disabled,Enabled" line.long 0x04 "AFIFM1M_INTFPD_QOS_CNTL,Qos Control Register" bitfld.long 0x04 7. " EN_AWAR_OT ,Enable combined regulation of outstanding transactions" "Disabled,Enabled" bitfld.long 0x04 6. " EN_AR_OT ,Enable regulation of outstanding read transactions" "Disabled,Enabled" bitfld.long 0x04 5. " EN_AW_OT ,Enable regulation of outstanding write transactions" "Disabled,Enabled" bitfld.long 0x04 2. " EN_AWAR_RATE ,Enable combined AW/AR rate regulation" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " EN_AR_RATE ,Enable AR rate regulation" "Disabled,Enabled" bitfld.long 0x04 0. " EN_AW_RATE ,Enable AW rate regulation" "Disabled,Enabled" line.long 0x08 "AFIFM1M_INTFPD_MAX_OT,Maximum Number Of Outstanding Transactions Register" bitfld.long 0x08 24.--29. " AR_MAX_OTI ,Integer part of max outstanding AR addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 16.--23. 1. " AR_MAX_OTF ,Fraction part of max outstanding AR addresses" bitfld.long 0x08 8.--13. " AW_MAX_OTI ,Integer part of max outstanding AW addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 0.--7. 1. " AW_MAX_OTF ,Fraction part of max outstanding AW addresses" line.long 0x0C "AFIFM1M_INTFPD_MAX_COMB_OT,Maximum Number Of Combined Outstanding Transactions Register" hexmask.long.byte 0x0C 8.--14. 1. " AWAR_MAX_OTI ,Integer part of max combined outstanding AW/AR addresses" hexmask.long.byte 0x0C 0.--7. 1. " AWAR_MAX_OTF ,Fraction part of max combined outstanding AW/AR addresses" line.long 0x10 "AFIFM1M_INTFPD_AW_P,AW Channel Peak Rate Register" hexmask.long.byte 0x10 24.--31. 1. " AW_P ,Channel peak rate" line.long 0x14 "AFIFM1M_INTFPD_AW_B,AW Channel Burstiness Allowance Register" hexmask.long.word 0x14 0.--15. 1. " AW_B ,Channel burstiness integer number of transfers" line.long 0x18 "AFIFM1M_INTFPD_AW_R,AW Channel Average Rate Register" hexmask.long.word 0x18 20.--31. 1. " AW_R ,Channel average rate" line.long 0x1C "AFIFM1M_INTFPD_AR_P,AR Channel Peak Rate Register" hexmask.long.byte 0x1C 24.--31. 1. " AR_P ,Channel peak rate" line.long 0x20 "AFIFM1M_INTFPD_AR_B,AR Channel Burstiness Allowance Register" hexmask.long.word 0x20 0.--15. 1. " AR_B ,Channel burstiness" line.long 0x24 "AFIFM1M_INTFPD_AR_R,AR Channel Average Rate" hexmask.long.word 0x24 20.--31. 1. " AR_R ,Channel average rate" group.long (0x47000+0x108)++0x27 line.long 0x00 "AFIFM2M_INTFPD_FN_MOD,Issuing Functionality Modification Register" bitfld.long 0x00 1. " FN_MOD[1] ,Write issuing, write_iss_override" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Read issuing, read_iss_override" "Disabled,Enabled" line.long 0x04 "AFIFM2M_INTFPD_QOS_CNTL,Qos Control Register" bitfld.long 0x04 7. " EN_AWAR_OT ,Enable combined regulation of outstanding transactions" "Disabled,Enabled" bitfld.long 0x04 6. " EN_AR_OT ,Enable regulation of outstanding read transactions" "Disabled,Enabled" bitfld.long 0x04 5. " EN_AW_OT ,Enable regulation of outstanding write transactions" "Disabled,Enabled" bitfld.long 0x04 2. " EN_AWAR_RATE ,Enable combined AW/AR rate regulation" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " EN_AR_RATE ,Enable AR rate regulation" "Disabled,Enabled" bitfld.long 0x04 0. " EN_AW_RATE ,Enable AW rate regulation" "Disabled,Enabled" line.long 0x08 "AFIFM2M_INTFPD_MAX_OT,Maximum Number Of Outstanding Transactions Register" bitfld.long 0x08 24.--29. " AR_MAX_OTI ,Integer part of max outstanding AR addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 16.--23. 1. " AR_MAX_OTF ,Fraction part of max outstanding AR addresses" bitfld.long 0x08 8.--13. " AW_MAX_OTI ,Integer part of max outstanding AW addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 0.--7. 1. " AW_MAX_OTF ,Fraction part of max outstanding AW addresses" line.long 0x0C "AFIFM2M_INTFPD_MAX_COMB_OT,Maximum Number Of Combined Outstanding Transactions Register" hexmask.long.byte 0x0C 8.--14. 1. " AWAR_MAX_OTI ,Integer part of max combined outstanding AW/AR addresses" hexmask.long.byte 0x0C 0.--7. 1. " AWAR_MAX_OTF ,Fraction part of max combined outstanding AW/AR addresses" line.long 0x10 "AFIFM2M_INTFPD_AW_P,AW Channel Peak Rate Register" hexmask.long.byte 0x10 24.--31. 1. " AW_P ,Channel peak rate" line.long 0x14 "AFIFM2M_INTFPD_AW_B,AW Channel Burstiness Allowance Register" hexmask.long.word 0x14 0.--15. 1. " AW_B ,Channel burstiness integer number of transfers" line.long 0x18 "AFIFM2M_INTFPD_AW_R,AW Channel Average Rate Register" hexmask.long.word 0x18 20.--31. 1. " AW_R ,Channel average rate" line.long 0x1C "AFIFM2M_INTFPD_AR_P,AR Channel Peak Rate Register" hexmask.long.byte 0x1C 24.--31. 1. " AR_P ,Channel peak rate" line.long 0x20 "AFIFM2M_INTFPD_AR_B,AR Channel Burstiness Allowance Register" hexmask.long.word 0x20 0.--15. 1. " AR_B ,Channel burstiness" line.long 0x24 "AFIFM2M_INTFPD_AR_R,AR Channel Average Rate" hexmask.long.word 0x24 20.--31. 1. " AR_R ,Channel average rate" group.long (0x48000+0x108)++0x27 line.long 0x00 "INTFPDSMMUTBU5_INTFPDMAIN_FN_MOD,Issuing Functionality Modification Register" bitfld.long 0x00 1. " FN_MOD[1] ,Write issuing, write_iss_override" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Read issuing, read_iss_override" "Disabled,Enabled" line.long 0x04 "INTFPDSMMUTBU5_INTFPDMAIN_QOS_CNTL,Qos Control Register" bitfld.long 0x04 7. " EN_AWAR_OT ,Enable combined regulation of outstanding transactions" "Disabled,Enabled" bitfld.long 0x04 6. " EN_AR_OT ,Enable regulation of outstanding read transactions" "Disabled,Enabled" bitfld.long 0x04 5. " EN_AW_OT ,Enable regulation of outstanding write transactions" "Disabled,Enabled" bitfld.long 0x04 2. " EN_AWAR_RATE ,Enable combined AW/AR rate regulation" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " EN_AR_RATE ,Enable AR rate regulation" "Disabled,Enabled" bitfld.long 0x04 0. " EN_AW_RATE ,Enable AW rate regulation" "Disabled,Enabled" line.long 0x08 "INTFPDSMMUTBU5_INTFPDMAIN_MAX_OT,Maximum Number Of Outstanding Transactions Register" bitfld.long 0x08 24.--29. " AR_MAX_OTI ,Integer part of max outstanding AR addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 16.--23. 1. " AR_MAX_OTF ,Fraction part of max outstanding AR addresses" bitfld.long 0x08 8.--13. " AW_MAX_OTI ,Integer part of max outstanding AW addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 0.--7. 1. " AW_MAX_OTF ,Fraction part of max outstanding AW addresses" line.long 0x0C "INTFPDSMMUTBU5_INTFPDMAIN_MAX_COMB_OT,Maximum Number Of Combined Outstanding Transactions Register" hexmask.long.byte 0x0C 8.--14. 1. " AWAR_MAX_OTI ,Integer part of max combined outstanding AW/AR addresses" hexmask.long.byte 0x0C 0.--7. 1. " AWAR_MAX_OTF ,Fraction part of max combined outstanding AW/AR addresses" line.long 0x10 "INTFPDSMMUTBU5_INTFPDMAIN_AW_P,AW Channel Peak Rate Register" hexmask.long.byte 0x10 24.--31. 1. " AW_P ,Channel peak rate" line.long 0x14 "INTFPDSMMUTBU5_INTFPDMAIN_AW_B,AW Channel Burstiness Allowance Register" hexmask.long.word 0x14 0.--15. 1. " AW_B ,Channel burstiness integer number of transfers" line.long 0x18 "INTFPDSMMUTBU5_INTFPDMAIN_AW_R,AW Channel Average Rate Register" hexmask.long.word 0x18 20.--31. 1. " AW_R ,Channel average rate" line.long 0x1C "INTFPDSMMUTBU5_INTFPDMAIN_AR_P,AR Channel Peak Rate Register" hexmask.long.byte 0x1C 24.--31. 1. " AR_P ,Channel peak rate" line.long 0x20 "INTFPDSMMUTBU5_INTFPDMAIN_AR_B,AR Channel Burstiness Allowance Register" hexmask.long.word 0x20 0.--15. 1. " AR_B ,Channel burstiness" line.long 0x24 "INTFPDSMMUTBU5_INTFPDMAIN_AR_R,AR Channel Average Rate" hexmask.long.word 0x24 20.--31. 1. " AR_R ,Channel average rate" group.long (0x49000+0x108)++0x27 line.long 0x00 "DP_INTFPD_IB_FN_MOD,Issuing Functionality Modification Register" bitfld.long 0x00 1. " FN_MOD[1] ,Write issuing, write_iss_override" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Read issuing, read_iss_override" "Disabled,Enabled" line.long 0x04 "DP_INTFPD_IB_QOS_CNTL,Qos Control Register" bitfld.long 0x04 7. " EN_AWAR_OT ,Enable combined regulation of outstanding transactions" "Disabled,Enabled" bitfld.long 0x04 6. " EN_AR_OT ,Enable regulation of outstanding read transactions" "Disabled,Enabled" bitfld.long 0x04 5. " EN_AW_OT ,Enable regulation of outstanding write transactions" "Disabled,Enabled" bitfld.long 0x04 2. " EN_AWAR_RATE ,Enable combined AW/AR rate regulation" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " EN_AR_RATE ,Enable AR rate regulation" "Disabled,Enabled" bitfld.long 0x04 0. " EN_AW_RATE ,Enable AW rate regulation" "Disabled,Enabled" line.long 0x08 "DP_INTFPD_IB_MAX_OT,Maximum Number Of Outstanding Transactions Register" bitfld.long 0x08 24.--29. " AR_MAX_OTI ,Integer part of max outstanding AR addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 16.--23. 1. " AR_MAX_OTF ,Fraction part of max outstanding AR addresses" bitfld.long 0x08 8.--13. " AW_MAX_OTI ,Integer part of max outstanding AW addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 0.--7. 1. " AW_MAX_OTF ,Fraction part of max outstanding AW addresses" line.long 0x0C "DP_INTFPD_IB_MAX_COMB_OT,Maximum Number Of Combined Outstanding Transactions Register" hexmask.long.byte 0x0C 8.--14. 1. " AWAR_MAX_OTI ,Integer part of max combined outstanding AW/AR addresses" hexmask.long.byte 0x0C 0.--7. 1. " AWAR_MAX_OTF ,Fraction part of max combined outstanding AW/AR addresses" line.long 0x10 "DP_INTFPD_IB_AW_P,AW Channel Peak Rate Register" hexmask.long.byte 0x10 24.--31. 1. " AW_P ,Channel peak rate" line.long 0x14 "DP_INTFPD_IB_AW_B,AW Channel Burstiness Allowance Register" hexmask.long.word 0x14 0.--15. 1. " AW_B ,Channel burstiness integer number of transfers" line.long 0x18 "DP_INTFPD_IB_AW_R,AW Channel Average Rate Register" hexmask.long.word 0x18 20.--31. 1. " AW_R ,Channel average rate" line.long 0x1C "DP_INTFPD_IB_AR_P,AR Channel Peak Rate Register" hexmask.long.byte 0x1C 24.--31. 1. " AR_P ,Channel peak rate" line.long 0x20 "DP_INTFPD_IB_AR_B,AR Channel Burstiness Allowance Register" hexmask.long.word 0x20 0.--15. 1. " AR_B ,Channel burstiness" line.long 0x24 "DP_INTFPD_IB_AR_R,AR Channel Average Rate" hexmask.long.word 0x24 20.--31. 1. " AR_R ,Channel average rate" group.long (0x4A000+0x108)++0x27 line.long 0x00 "AFIFM3M_INTFPD_FN_MOD,Issuing Functionality Modification Register" bitfld.long 0x00 1. " FN_MOD[1] ,Write issuing, write_iss_override" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Read issuing, read_iss_override" "Disabled,Enabled" line.long 0x04 "AFIFM3M_INTFPD_QOS_CNTL,Qos Control Register" bitfld.long 0x04 7. " EN_AWAR_OT ,Enable combined regulation of outstanding transactions" "Disabled,Enabled" bitfld.long 0x04 6. " EN_AR_OT ,Enable regulation of outstanding read transactions" "Disabled,Enabled" bitfld.long 0x04 5. " EN_AW_OT ,Enable regulation of outstanding write transactions" "Disabled,Enabled" bitfld.long 0x04 2. " EN_AWAR_RATE ,Enable combined AW/AR rate regulation" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " EN_AR_RATE ,Enable AR rate regulation" "Disabled,Enabled" bitfld.long 0x04 0. " EN_AW_RATE ,Enable AW rate regulation" "Disabled,Enabled" line.long 0x08 "AFIFM3M_INTFPD_MAX_OT,Maximum Number Of Outstanding Transactions Register" bitfld.long 0x08 24.--29. " AR_MAX_OTI ,Integer part of max outstanding AR addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 16.--23. 1. " AR_MAX_OTF ,Fraction part of max outstanding AR addresses" bitfld.long 0x08 8.--13. " AW_MAX_OTI ,Integer part of max outstanding AW addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 0.--7. 1. " AW_MAX_OTF ,Fraction part of max outstanding AW addresses" line.long 0x0C "AFIFM3M_INTFPD_MAX_COMB_OT,Maximum Number Of Combined Outstanding Transactions Register" hexmask.long.byte 0x0C 8.--14. 1. " AWAR_MAX_OTI ,Integer part of max combined outstanding AW/AR addresses" hexmask.long.byte 0x0C 0.--7. 1. " AWAR_MAX_OTF ,Fraction part of max combined outstanding AW/AR addresses" line.long 0x10 "AFIFM3M_INTFPD_AW_P,AW Channel Peak Rate Register" hexmask.long.byte 0x10 24.--31. 1. " AW_P ,Channel peak rate" line.long 0x14 "AFIFM3M_INTFPD_AW_B,AW Channel Burstiness Allowance Register" hexmask.long.word 0x14 0.--15. 1. " AW_B ,Channel burstiness integer number of transfers" line.long 0x18 "AFIFM3M_INTFPD_AW_R,AW Channel Average Rate Register" hexmask.long.word 0x18 20.--31. 1. " AW_R ,Channel average rate" line.long 0x1C "AFIFM3M_INTFPD_AR_P,AR Channel Peak Rate Register" hexmask.long.byte 0x1C 24.--31. 1. " AR_P ,Channel peak rate" line.long 0x20 "AFIFM3M_INTFPD_AR_B,AR Channel Burstiness Allowance Register" hexmask.long.word 0x20 0.--15. 1. " AR_B ,Channel burstiness" line.long 0x24 "AFIFM3M_INTFPD_AR_R,AR Channel Average Rate" hexmask.long.word 0x24 20.--31. 1. " AR_R ,Channel average rate" group.long (0x4B000+0x108)++0x27 line.long 0x00 "AFIFM4M_INTFPD_FN_MOD,Issuing Functionality Modification Register" bitfld.long 0x00 1. " FN_MOD[1] ,Write issuing, write_iss_override" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Read issuing, read_iss_override" "Disabled,Enabled" line.long 0x04 "AFIFM4M_INTFPD_QOS_CNTL,Qos Control Register" bitfld.long 0x04 7. " EN_AWAR_OT ,Enable combined regulation of outstanding transactions" "Disabled,Enabled" bitfld.long 0x04 6. " EN_AR_OT ,Enable regulation of outstanding read transactions" "Disabled,Enabled" bitfld.long 0x04 5. " EN_AW_OT ,Enable regulation of outstanding write transactions" "Disabled,Enabled" bitfld.long 0x04 2. " EN_AWAR_RATE ,Enable combined AW/AR rate regulation" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " EN_AR_RATE ,Enable AR rate regulation" "Disabled,Enabled" bitfld.long 0x04 0. " EN_AW_RATE ,Enable AW rate regulation" "Disabled,Enabled" line.long 0x08 "AFIFM4M_INTFPD_MAX_OT,Maximum Number Of Outstanding Transactions Register" bitfld.long 0x08 24.--29. " AR_MAX_OTI ,Integer part of max outstanding AR addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 16.--23. 1. " AR_MAX_OTF ,Fraction part of max outstanding AR addresses" bitfld.long 0x08 8.--13. " AW_MAX_OTI ,Integer part of max outstanding AW addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 0.--7. 1. " AW_MAX_OTF ,Fraction part of max outstanding AW addresses" line.long 0x0C "AFIFM4M_INTFPD_MAX_COMB_OT,Maximum Number Of Combined Outstanding Transactions Register" hexmask.long.byte 0x0C 8.--14. 1. " AWAR_MAX_OTI ,Integer part of max combined outstanding AW/AR addresses" hexmask.long.byte 0x0C 0.--7. 1. " AWAR_MAX_OTF ,Fraction part of max combined outstanding AW/AR addresses" line.long 0x10 "AFIFM4M_INTFPD_AW_P,AW Channel Peak Rate Register" hexmask.long.byte 0x10 24.--31. 1. " AW_P ,Channel peak rate" line.long 0x14 "AFIFM4M_INTFPD_AW_B,AW Channel Burstiness Allowance Register" hexmask.long.word 0x14 0.--15. 1. " AW_B ,Channel burstiness integer number of transfers" line.long 0x18 "AFIFM4M_INTFPD_AW_R,AW Channel Average Rate Register" hexmask.long.word 0x18 20.--31. 1. " AW_R ,Channel average rate" line.long 0x1C "AFIFM4M_INTFPD_AR_P,AR Channel Peak Rate Register" hexmask.long.byte 0x1C 24.--31. 1. " AR_P ,Channel peak rate" line.long 0x20 "AFIFM4M_INTFPD_AR_B,AR Channel Burstiness Allowance Register" hexmask.long.word 0x20 0.--15. 1. " AR_B ,Channel burstiness" line.long 0x24 "AFIFM4M_INTFPD_AR_R,AR Channel Average Rate" hexmask.long.word 0x24 20.--31. 1. " AR_R ,Channel average rate" group.long (0x4C000+0x108)++0x27 line.long 0x00 "AFIFM5M_INTFPD_FN_MOD,Issuing Functionality Modification Register" bitfld.long 0x00 1. " FN_MOD[1] ,Write issuing, write_iss_override" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Read issuing, read_iss_override" "Disabled,Enabled" line.long 0x04 "AFIFM5M_INTFPD_QOS_CNTL,Qos Control Register" bitfld.long 0x04 7. " EN_AWAR_OT ,Enable combined regulation of outstanding transactions" "Disabled,Enabled" bitfld.long 0x04 6. " EN_AR_OT ,Enable regulation of outstanding read transactions" "Disabled,Enabled" bitfld.long 0x04 5. " EN_AW_OT ,Enable regulation of outstanding write transactions" "Disabled,Enabled" bitfld.long 0x04 2. " EN_AWAR_RATE ,Enable combined AW/AR rate regulation" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " EN_AR_RATE ,Enable AR rate regulation" "Disabled,Enabled" bitfld.long 0x04 0. " EN_AW_RATE ,Enable AW rate regulation" "Disabled,Enabled" line.long 0x08 "AFIFM5M_INTFPD_MAX_OT,Maximum Number Of Outstanding Transactions Register" bitfld.long 0x08 24.--29. " AR_MAX_OTI ,Integer part of max outstanding AR addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 16.--23. 1. " AR_MAX_OTF ,Fraction part of max outstanding AR addresses" bitfld.long 0x08 8.--13. " AW_MAX_OTI ,Integer part of max outstanding AW addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 0.--7. 1. " AW_MAX_OTF ,Fraction part of max outstanding AW addresses" line.long 0x0C "AFIFM5M_INTFPD_MAX_COMB_OT,Maximum Number Of Combined Outstanding Transactions Register" hexmask.long.byte 0x0C 8.--14. 1. " AWAR_MAX_OTI ,Integer part of max combined outstanding AW/AR addresses" hexmask.long.byte 0x0C 0.--7. 1. " AWAR_MAX_OTF ,Fraction part of max combined outstanding AW/AR addresses" line.long 0x10 "AFIFM5M_INTFPD_AW_P,AW Channel Peak Rate Register" hexmask.long.byte 0x10 24.--31. 1. " AW_P ,Channel peak rate" line.long 0x14 "AFIFM5M_INTFPD_AW_B,AW Channel Burstiness Allowance Register" hexmask.long.word 0x14 0.--15. 1. " AW_B ,Channel burstiness integer number of transfers" line.long 0x18 "AFIFM5M_INTFPD_AW_R,AW Channel Average Rate Register" hexmask.long.word 0x18 20.--31. 1. " AW_R ,Channel average rate" line.long 0x1C "AFIFM5M_INTFPD_AR_P,AR Channel Peak Rate Register" hexmask.long.byte 0x1C 24.--31. 1. " AR_P ,Channel peak rate" line.long 0x20 "AFIFM5M_INTFPD_AR_B,AR Channel Burstiness Allowance Register" hexmask.long.word 0x20 0.--15. 1. " AR_B ,Channel burstiness" line.long 0x24 "AFIFM5M_INTFPD_AR_R,AR Channel Average Rate" hexmask.long.word 0x24 20.--31. 1. " AR_R ,Channel average rate" group.long (0x4D000+0x100)++0x07 line.long 0x00 "GPU_INTFPD_IB_READ_QOS,Read Channel Qos Value Register" bitfld.long 0x00 0.--3. " AR_QOS ,Read channel qos value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "GPU_INTFPD_IB_WRITE_QOS,Write Channel Qos Value Register" bitfld.long 0x04 0.--3. " AW_QOS ,Write channel qos value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long (0x4D000+0x108)++0x27 line.long 0x00 "GPU_INTFPD_IB_FN_MOD,Issuing Functionality Modification Register" bitfld.long 0x00 1. " FN_MOD[1] ,Write issuing, write_iss_override" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Read issuing, read_iss_override" "Disabled,Enabled" line.long 0x04 "GPU_INTFPD_IB_QOS_CNTL,Qos Control Register" bitfld.long 0x04 7. " EN_AWAR_OT ,Enable combined regulation of outstanding transactions" "Disabled,Enabled" bitfld.long 0x04 6. " EN_AR_OT ,Enable regulation of outstanding read transactions" "Disabled,Enabled" bitfld.long 0x04 5. " EN_AW_OT ,Enable regulation of outstanding write transactions" "Disabled,Enabled" bitfld.long 0x04 2. " EN_AWAR_RATE ,Enable combined AW/AR rate regulation" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " EN_AR_RATE ,Enable AR rate regulation" "Disabled,Enabled" bitfld.long 0x04 0. " EN_AW_RATE ,Enable AW rate regulation" "Disabled,Enabled" line.long 0x08 "GPU_INTFPD_IB_MAX_OT,Maximum Number Of Outstanding Transactions Register" bitfld.long 0x08 24.--29. " AR_MAX_OTI ,Integer part of max outstanding AR addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 16.--23. 1. " AR_MAX_OTF ,Fraction part of max outstanding AR addresses" bitfld.long 0x08 8.--13. " AW_MAX_OTI ,Integer part of max outstanding AW addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 0.--7. 1. " AW_MAX_OTF ,Fraction part of max outstanding AW addresses" line.long 0x0C "GPU_INTFPD_IB_MAX_COMB_OT,Maximum Number Of Combined Outstanding Transactions Register" hexmask.long.byte 0x0C 8.--14. 1. " AWAR_MAX_OTI ,Integer part of max combined outstanding AW/AR addresses" hexmask.long.byte 0x0C 0.--7. 1. " AWAR_MAX_OTF ,Fraction part of max combined outstanding AW/AR addresses" line.long 0x10 "GPU_INTFPD_IB_AW_P,AW Channel Peak Rate Register" hexmask.long.byte 0x10 24.--31. 1. " AW_P ,Channel peak rate" line.long 0x14 "GPU_INTFPD_IB_AW_B,AW Channel Burstiness Allowance Register" hexmask.long.word 0x14 0.--15. 1. " AW_B ,Channel burstiness integer number of transfers" line.long 0x18 "GPU_INTFPD_IB_AW_R,AW Channel Average Rate Register" hexmask.long.word 0x18 20.--31. 1. " AW_R ,Channel average rate" line.long 0x1C "GPU_INTFPD_IB_AR_P,AR Channel Peak Rate Register" hexmask.long.byte 0x1C 24.--31. 1. " AR_P ,Channel peak rate" line.long 0x20 "GPU_INTFPD_IB_AR_B,AR Channel Burstiness Allowance Register" hexmask.long.word 0x20 0.--15. 1. " AR_B ,Channel burstiness" line.long 0x24 "GPU_INTFPD_IB_AR_R,AR Channel Average Rate" hexmask.long.word 0x24 20.--31. 1. " AR_R ,Channel average rate" group.long (0x4E000+0x24)++0x03 line.long 0x00 "PCIEM_INTFPD_IB_FN_MOD2,Issuing Functionality Modification Register 2" bitfld.long 0x00 0. " BYPASS_MERGE ,Do not alter any transactions that could pass through legally without alteration" "No bypass,Bypass" group.long (0x4E000+0x100)++0x07 line.long 0x00 "PCIEM_INTFPD_IB_READ_QOS,Read Channel Qos Value Register" bitfld.long 0x00 0.--3. " AR_QOS ,Read channel qos value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "PCIEM_INTFPD_IB_WRITE_QOS,Write Channel Qos Value Register" bitfld.long 0x04 0.--3. " AW_QOS ,Write channel qos value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long (0x4E000+0x108)++0x27 line.long 0x00 "PCIEM_INTFPD_IB_FN_MOD,Issuing Functionality Modification Register" bitfld.long 0x00 1. " FN_MOD[1] ,Write issuing, write_iss_override" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Read issuing, read_iss_override" "Disabled,Enabled" line.long 0x04 "PCIEM_INTFPD_IB_QOS_CNTL,Qos Control Register" bitfld.long 0x04 7. " EN_AWAR_OT ,Enable combined regulation of outstanding transactions" "Disabled,Enabled" bitfld.long 0x04 6. " EN_AR_OT ,Enable regulation of outstanding read transactions" "Disabled,Enabled" bitfld.long 0x04 5. " EN_AW_OT ,Enable regulation of outstanding write transactions" "Disabled,Enabled" bitfld.long 0x04 2. " EN_AWAR_RATE ,Enable combined AW/AR rate regulation" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " EN_AR_RATE ,Enable AR rate regulation" "Disabled,Enabled" bitfld.long 0x04 0. " EN_AW_RATE ,Enable AW rate regulation" "Disabled,Enabled" line.long 0x08 "PCIEM_INTFPD_IB_MAX_OT,Maximum Number Of Outstanding Transactions Register" bitfld.long 0x08 24.--29. " AR_MAX_OTI ,Integer part of max outstanding AR addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 16.--23. 1. " AR_MAX_OTF ,Fraction part of max outstanding AR addresses" bitfld.long 0x08 8.--13. " AW_MAX_OTI ,Integer part of max outstanding AW addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 0.--7. 1. " AW_MAX_OTF ,Fraction part of max outstanding AW addresses" line.long 0x0C "PCIEM_INTFPD_IB_MAX_COMB_OT,Maximum Number Of Combined Outstanding Transactions Register" hexmask.long.byte 0x0C 8.--14. 1. " AWAR_MAX_OTI ,Integer part of max combined outstanding AW/AR addresses" hexmask.long.byte 0x0C 0.--7. 1. " AWAR_MAX_OTF ,Fraction part of max combined outstanding AW/AR addresses" line.long 0x10 "PCIEM_INTFPD_IB_AW_P,AW Channel Peak Rate Register" hexmask.long.byte 0x10 24.--31. 1. " AW_P ,Channel peak rate" line.long 0x14 "PCIEM_INTFPD_IB_AW_B,AW Channel Burstiness Allowance Register" hexmask.long.word 0x14 0.--15. 1. " AW_B ,Channel burstiness integer number of transfers" line.long 0x18 "PCIEM_INTFPD_IB_AW_R,AW Channel Average Rate Register" hexmask.long.word 0x18 20.--31. 1. " AW_R ,Channel average rate" line.long 0x1C "PCIEM_INTFPD_IB_AR_P,AR Channel Peak Rate Register" hexmask.long.byte 0x1C 24.--31. 1. " AR_P ,Channel peak rate" line.long 0x20 "PCIEM_INTFPD_IB_AR_B,AR Channel Burstiness Allowance Register" hexmask.long.word 0x20 0.--15. 1. " AR_B ,Channel burstiness" line.long 0x24 "PCIEM_INTFPD_IB_AR_R,AR Channel Average Rate" hexmask.long.word 0x24 20.--31. 1. " AR_R ,Channel average rate" group.long (0x4F000+0x24)++0x03 line.long 0x00 "GDMA_INTFPD_IB_FN_MOD2,Issuing Functionality Modification Register 2" bitfld.long 0x00 0. " BYPASS_MERGE ,Do not alter any transactions that could pass through legally without alteration" "No bypass,Bypass" group.long (0x4F000+0x108)++0x27 line.long 0x00 "GDMA_INTFPD_IB_FN_MOD,Issuing Functionality Modification Register" bitfld.long 0x00 1. " FN_MOD[1] ,Write issuing, write_iss_override" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Read issuing, read_iss_override" "Disabled,Enabled" line.long 0x04 "GDMA_INTFPD_IB_QOS_CNTL,Qos Control Register" bitfld.long 0x04 7. " EN_AWAR_OT ,Enable combined regulation of outstanding transactions" "Disabled,Enabled" bitfld.long 0x04 6. " EN_AR_OT ,Enable regulation of outstanding read transactions" "Disabled,Enabled" bitfld.long 0x04 5. " EN_AW_OT ,Enable regulation of outstanding write transactions" "Disabled,Enabled" bitfld.long 0x04 2. " EN_AWAR_RATE ,Enable combined AW/AR rate regulation" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " EN_AR_RATE ,Enable AR rate regulation" "Disabled,Enabled" bitfld.long 0x04 0. " EN_AW_RATE ,Enable AW rate regulation" "Disabled,Enabled" line.long 0x08 "GDMA_INTFPD_IB_MAX_OT,Maximum Number Of Outstanding Transactions Register" bitfld.long 0x08 24.--29. " AR_MAX_OTI ,Integer part of max outstanding AR addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 16.--23. 1. " AR_MAX_OTF ,Fraction part of max outstanding AR addresses" bitfld.long 0x08 8.--13. " AW_MAX_OTI ,Integer part of max outstanding AW addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 0.--7. 1. " AW_MAX_OTF ,Fraction part of max outstanding AW addresses" line.long 0x0C "GDMA_INTFPD_IB_MAX_COMB_OT,Maximum Number Of Combined Outstanding Transactions Register" hexmask.long.byte 0x0C 8.--14. 1. " AWAR_MAX_OTI ,Integer part of max combined outstanding AW/AR addresses" hexmask.long.byte 0x0C 0.--7. 1. " AWAR_MAX_OTF ,Fraction part of max combined outstanding AW/AR addresses" line.long 0x10 "GDMA_INTFPD_IB_AW_P,AW Channel Peak Rate Register" hexmask.long.byte 0x10 24.--31. 1. " AW_P ,Channel peak rate" line.long 0x14 "GDMA_INTFPD_IB_AW_B,AW Channel Burstiness Allowance Register" hexmask.long.word 0x14 0.--15. 1. " AW_B ,Channel burstiness integer number of transfers" line.long 0x18 "GDMA_INTFPD_IB_AW_R,AW Channel Average Rate Register" hexmask.long.word 0x18 20.--31. 1. " AW_R ,Channel average rate" line.long 0x1C "GDMA_INTFPD_IB_AR_P,AR Channel Peak Rate Register" hexmask.long.byte 0x1C 24.--31. 1. " AR_P ,Channel peak rate" line.long 0x20 "GDMA_INTFPD_IB_AR_B,AR Channel Burstiness Allowance Register" hexmask.long.word 0x20 0.--15. 1. " AR_B ,Channel burstiness" line.long 0x24 "GDMA_INTFPD_IB_AR_R,AR Channel Average Rate" hexmask.long.word 0x24 20.--31. 1. " AR_R ,Channel average rate" group.long (0x50000+0x24)++0x03 line.long 0x00 "SATAM_INTFPD_IB_FN_MOD2,Issuing Functionality Modification Register 2" bitfld.long 0x00 0. " BYPASS_MERGE ,Do not alter any transactions that could pass through legally without alteration" "No bypass,Bypass" group.long (0x50000+0x100)++0x07 line.long 0x00 "SATAM_INTFPD_IB_READ_QOS,Read Channel Qos Value Register" bitfld.long 0x00 0.--3. " AR_QOS ,Read channel qos value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "SATAM_INTFPD_IB_WRITE_QOS,Write Channel Qos Value Register" bitfld.long 0x04 0.--3. " AW_QOS ,Write channel qos value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long (0x50000+0x108)++0x27 line.long 0x00 "SATAM_INTFPD_IB_FN_MOD,Issuing Functionality Modification Register" bitfld.long 0x00 1. " FN_MOD[1] ,Write issuing, write_iss_override" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Read issuing, read_iss_override" "Disabled,Enabled" line.long 0x04 "SATAM_INTFPD_IB_QOS_CNTL,Qos Control Register" bitfld.long 0x04 7. " EN_AWAR_OT ,Enable combined regulation of outstanding transactions" "Disabled,Enabled" bitfld.long 0x04 6. " EN_AR_OT ,Enable regulation of outstanding read transactions" "Disabled,Enabled" bitfld.long 0x04 5. " EN_AW_OT ,Enable regulation of outstanding write transactions" "Disabled,Enabled" bitfld.long 0x04 2. " EN_AWAR_RATE ,Enable combined AW/AR rate regulation" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " EN_AR_RATE ,Enable AR rate regulation" "Disabled,Enabled" bitfld.long 0x04 0. " EN_AW_RATE ,Enable AW rate regulation" "Disabled,Enabled" line.long 0x08 "SATAM_INTFPD_IB_MAX_OT,Maximum Number Of Outstanding Transactions Register" bitfld.long 0x08 24.--29. " AR_MAX_OTI ,Integer part of max outstanding AR addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 16.--23. 1. " AR_MAX_OTF ,Fraction part of max outstanding AR addresses" bitfld.long 0x08 8.--13. " AW_MAX_OTI ,Integer part of max outstanding AW addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 0.--7. 1. " AW_MAX_OTF ,Fraction part of max outstanding AW addresses" line.long 0x0C "SATAM_INTFPD_IB_MAX_COMB_OT,Maximum Number Of Combined Outstanding Transactions Register" hexmask.long.byte 0x0C 8.--14. 1. " AWAR_MAX_OTI ,Integer part of max combined outstanding AW/AR addresses" hexmask.long.byte 0x0C 0.--7. 1. " AWAR_MAX_OTF ,Fraction part of max combined outstanding AW/AR addresses" line.long 0x10 "SATAM_INTFPD_IB_AW_P,AW Channel Peak Rate Register" hexmask.long.byte 0x10 24.--31. 1. " AW_P ,Channel peak rate" line.long 0x14 "SATAM_INTFPD_IB_AW_B,AW Channel Burstiness Allowance Register" hexmask.long.word 0x14 0.--15. 1. " AW_B ,Channel burstiness integer number of transfers" line.long 0x18 "SATAM_INTFPD_IB_AW_R,AW Channel Average Rate Register" hexmask.long.word 0x18 20.--31. 1. " AW_R ,Channel average rate" line.long 0x1C "SATAM_INTFPD_IB_AR_P,AR Channel Peak Rate Register" hexmask.long.byte 0x1C 24.--31. 1. " AR_P ,Channel peak rate" line.long 0x20 "SATAM_INTFPD_IB_AR_B,AR Channel Burstiness Allowance Register" hexmask.long.word 0x20 0.--15. 1. " AR_B ,Channel burstiness" line.long 0x24 "SATAM_INTFPD_IB_AR_R,AR Channel Average Rate" hexmask.long.word 0x24 20.--31. 1. " AR_R ,Channel average rate" group.long (0x51000+0x24)++0x03 line.long 0x00 "CORESIGHTM_INTFPD_IB_FN_MOD2,Issuing Functionality Modification Register 2" bitfld.long 0x00 0. " BYPASS_MERGE ,Do not alter any transactions that could pass through legally without alteration" "No bypass,Bypass" group.long (0x51000+0x100)++0x07 line.long 0x00 "CORESIGHTM_INTFPD_IB_READ_QOS,Read Channel Qos Value Register" bitfld.long 0x00 0.--3. " AR_QOS ,Read channel qos value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "CORESIGHTM_INTFPD_IB_WRITE_QOS,Write Channel Qos Value Register" bitfld.long 0x04 0.--3. " AW_QOS ,Write channel qos value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long (0x51000+0x108)++0x27 line.long 0x00 "CORESIGHTM_INTFPD_IB_FN_MOD,Issuing Functionality Modification Register" bitfld.long 0x00 1. " FN_MOD[1] ,Write issuing, write_iss_override" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Read issuing, read_iss_override" "Disabled,Enabled" line.long 0x04 "CORESIGHTM_INTFPD_IB_QOS_CNTL,Qos Control Register" bitfld.long 0x04 7. " EN_AWAR_OT ,Enable combined regulation of outstanding transactions" "Disabled,Enabled" bitfld.long 0x04 6. " EN_AR_OT ,Enable regulation of outstanding read transactions" "Disabled,Enabled" bitfld.long 0x04 5. " EN_AW_OT ,Enable regulation of outstanding write transactions" "Disabled,Enabled" bitfld.long 0x04 2. " EN_AWAR_RATE ,Enable combined AW/AR rate regulation" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " EN_AR_RATE ,Enable AR rate regulation" "Disabled,Enabled" bitfld.long 0x04 0. " EN_AW_RATE ,Enable AW rate regulation" "Disabled,Enabled" line.long 0x08 "CORESIGHTM_INTFPD_IB_MAX_OT,Maximum Number Of Outstanding Transactions Register" bitfld.long 0x08 24.--29. " AR_MAX_OTI ,Integer part of max outstanding AR addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 16.--23. 1. " AR_MAX_OTF ,Fraction part of max outstanding AR addresses" bitfld.long 0x08 8.--13. " AW_MAX_OTI ,Integer part of max outstanding AW addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 0.--7. 1. " AW_MAX_OTF ,Fraction part of max outstanding AW addresses" line.long 0x0C "CORESIGHTM_INTFPD_IB_MAX_COMB_OT,Maximum Number Of Combined Outstanding Transactions Register" hexmask.long.byte 0x0C 8.--14. 1. " AWAR_MAX_OTI ,Integer part of max combined outstanding AW/AR addresses" hexmask.long.byte 0x0C 0.--7. 1. " AWAR_MAX_OTF ,Fraction part of max combined outstanding AW/AR addresses" line.long 0x10 "CORESIGHTM_INTFPD_IB_AW_P,AW Channel Peak Rate Register" hexmask.long.byte 0x10 24.--31. 1. " AW_P ,Channel peak rate" line.long 0x14 "CORESIGHTM_INTFPD_IB_AW_B,AW Channel Burstiness Allowance Register" hexmask.long.word 0x14 0.--15. 1. " AW_B ,Channel burstiness integer number of transfers" line.long 0x18 "CORESIGHTM_INTFPD_IB_AW_R,AW Channel Average Rate Register" hexmask.long.word 0x18 20.--31. 1. " AW_R ,Channel average rate" line.long 0x1C "CORESIGHTM_INTFPD_IB_AR_P,AR Channel Peak Rate Register" hexmask.long.byte 0x1C 24.--31. 1. " AR_P ,Channel peak rate" line.long 0x20 "CORESIGHTM_INTFPD_IB_AR_B,AR Channel Burstiness Allowance Register" hexmask.long.word 0x20 0.--15. 1. " AR_B ,Channel burstiness" line.long 0x24 "CORESIGHTM_INTFPD_IB_AR_R,AR Channel Average Rate" hexmask.long.word 0x24 20.--31. 1. " AR_R ,Channel average rate" group.long (0x52000+0x08)++0x03 line.long 0x00 "IB2_MOD_ISS_BM,Bus Matrix Issuing Functionality Modification Register" bitfld.long 0x00 0.--1. " FN_MOD_ISS_BM ,Bus matrix issuing functionality modification" "0,1,2,3" group.long (0x52000+0x108)++0x27 line.long 0x00 "IB2_FN_MOD,Issuing Functionality Modification Register" bitfld.long 0x00 1. " FN_MOD[1] ,Write issuing, write_iss_override" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Read issuing, read_iss_override" "Disabled,Enabled" line.long 0x04 "IB2_QOS_CNTL,Qos Control Register" bitfld.long 0x04 7. " EN_AWAR_OT ,Enable combined regulation of outstanding transactions" "Disabled,Enabled" bitfld.long 0x04 6. " EN_AR_OT ,Enable regulation of outstanding read transactions" "Disabled,Enabled" bitfld.long 0x04 5. " EN_AW_OT ,Enable regulation of outstanding write transactions" "Disabled,Enabled" bitfld.long 0x04 2. " EN_AWAR_RATE ,Enable combined AW/AR rate regulation" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " EN_AR_RATE ,Enable AR rate regulation" "Disabled,Enabled" bitfld.long 0x04 0. " EN_AW_RATE ,Enable AW rate regulation" "Disabled,Enabled" line.long 0x08 "IB2_MAX_OT,Maximum Number Of Outstanding Transactions Register" bitfld.long 0x08 24.--29. " AR_MAX_OTI ,Integer part of max outstanding AR addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 16.--23. 1. " AR_MAX_OTF ,Fraction part of max outstanding AR addresses" bitfld.long 0x08 8.--13. " AW_MAX_OTI ,Integer part of max outstanding AW addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 0.--7. 1. " AW_MAX_OTF ,Fraction part of max outstanding AW addresses" line.long 0x0C "IB2_MAX_COMB_OT,Maximum Number Of Combined Outstanding Transactions Register" hexmask.long.byte 0x0C 8.--14. 1. " AWAR_MAX_OTI ,Integer part of max combined outstanding AW/AR addresses" hexmask.long.byte 0x0C 0.--7. 1. " AWAR_MAX_OTF ,Fraction part of max combined outstanding AW/AR addresses" line.long 0x10 "IB2_AW_P,AW Channel Peak Rate Register" hexmask.long.byte 0x10 24.--31. 1. " AW_P ,Channel peak rate" line.long 0x14 "IB2_AW_B,AW Channel Burstiness Allowance Register" hexmask.long.word 0x14 0.--15. 1. " AW_B ,Channel burstiness integer number of transfers" line.long 0x18 "IB2_AW_R,AW Channel Average Rate Register" hexmask.long.word 0x18 20.--31. 1. " AW_R ,Channel average rate" line.long 0x1C "IB2_AR_P,AR Channel Peak Rate Register" hexmask.long.byte 0x1C 24.--31. 1. " AR_P ,Channel peak rate" line.long 0x20 "IB2_AR_B,AR Channel Burstiness Allowance Register" hexmask.long.word 0x20 0.--15. 1. " AR_B ,Channel burstiness" line.long 0x24 "IB2_AR_R,AR Channel Average Rate" hexmask.long.word 0x24 20.--31. 1. " AR_R ,Channel average rate" group.long (0x53000+0x08)++0x03 line.long 0x00 "IB6_MOD_ISS_BM,Bus Matrix Issuing Functionality Modification Register" bitfld.long 0x00 0.--1. " FN_MOD_ISS_BM ,Bus matrix issuing functionality modification" "0,1,2,3" group.long (0x53000+0x24)++0x03 line.long 0x00 "IB6_FN_MOD2,Issuing Functionality Modification Register 2" bitfld.long 0x00 0. " BYPASS_MERGE ,Do not alter any transactions that could pass through legally without alteration" "No bypass,Bypass" group.long (0x53000+0x108)++0x27 line.long 0x00 "IB6_FN_MOD,Issuing Functionality Modification Register" bitfld.long 0x00 1. " FN_MOD[1] ,Write issuing, write_iss_override" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Read issuing, read_iss_override" "Disabled,Enabled" line.long 0x04 "IB6_QOS_CNTL,Qos Control Register" bitfld.long 0x04 7. " EN_AWAR_OT ,Enable combined regulation of outstanding transactions" "Disabled,Enabled" bitfld.long 0x04 6. " EN_AR_OT ,Enable regulation of outstanding read transactions" "Disabled,Enabled" bitfld.long 0x04 5. " EN_AW_OT ,Enable regulation of outstanding write transactions" "Disabled,Enabled" bitfld.long 0x04 2. " EN_AWAR_RATE ,Enable combined AW/AR rate regulation" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " EN_AR_RATE ,Enable AR rate regulation" "Disabled,Enabled" bitfld.long 0x04 0. " EN_AW_RATE ,Enable AW rate regulation" "Disabled,Enabled" line.long 0x08 "IB6_MAX_OT,Maximum Number Of Outstanding Transactions Register" bitfld.long 0x08 24.--29. " AR_MAX_OTI ,Integer part of max outstanding AR addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 16.--23. 1. " AR_MAX_OTF ,Fraction part of max outstanding AR addresses" bitfld.long 0x08 8.--13. " AW_MAX_OTI ,Integer part of max outstanding AW addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 0.--7. 1. " AW_MAX_OTF ,Fraction part of max outstanding AW addresses" line.long 0x0C "IB6_MAX_COMB_OT,Maximum Number Of Combined Outstanding Transactions Register" hexmask.long.byte 0x0C 8.--14. 1. " AWAR_MAX_OTI ,Integer part of max combined outstanding AW/AR addresses" hexmask.long.byte 0x0C 0.--7. 1. " AWAR_MAX_OTF ,Fraction part of max combined outstanding AW/AR addresses" line.long 0x10 "IB6_AW_P,AW Channel Peak Rate Register" hexmask.long.byte 0x10 24.--31. 1. " AW_P ,Channel peak rate" line.long 0x14 "IB6_AW_B,AW Channel Burstiness Allowance Register" hexmask.long.word 0x14 0.--15. 1. " AW_B ,Channel burstiness integer number of transfers" line.long 0x18 "IB6_AW_R,AW Channel Average Rate Register" hexmask.long.word 0x18 20.--31. 1. " AW_R ,Channel average rate" line.long 0x1C "IB6_AR_P,AR Channel Peak Rate Register" hexmask.long.byte 0x1C 24.--31. 1. " AR_P ,Channel peak rate" line.long 0x20 "IB6_AR_B,AR Channel Burstiness Allowance Register" hexmask.long.word 0x20 0.--15. 1. " AR_B ,Channel burstiness" line.long 0x24 "IB6_AR_R,AR Channel Average Rate" hexmask.long.word 0x24 20.--31. 1. " AR_R ,Channel average rate" width 0x0B tree.end tree "FPD_SLCR (Full Power Domain SLCR)" base ad:0xFD610000 width 21. group.long 0x00++0x0B line.long 0x00 "WPROT0,FP Domain SLCR Write Protection Register" bitfld.long 0x00 0. " ACTIVE ,FP domain SLCR write protection" "Not protected,Protected" line.long 0x04 "CFG,General Control Register For The FP Domain SLCR" bitfld.long 0x04 0. " SLVERR_ENABLE ,SLVERR enable/disable" "Disabled,Enabled" line.long 0x08 "ISR,Interrupt Status Register" eventfld.long 0x08 0. " ADDR_DECODE_ERR ,Status for an address decode error" "No error,Error" group.long 0x0C++0x03 line.long 0x00 "IMR_SET/CLR,Interrupt Mask Register" setclrfld.long 0x00 0. 0x08 0. 0x04 0. " ADDR_DECODE_ERR ,Mask for an address decode error" "Not masked,Masked" wgroup.long 0x18++0x03 line.long 0x00 "ITR,Interrupt Trigger Register" bitfld.long 0x00 0. " ADDR_DECODE_ERR ,Trigger an address decode error interrupt" "No effect,Trigger" group.long 0x100++0x03 line.long 0x00 "WDT_CLK_SEL,SWDT Clock Source Select Register" bitfld.long 0x00 0. " SELECT ,System watchdog timer clock source selection" "Internal,External" group.long 0x200++0x03 line.long 0x00 "INT_FPD,Interconnect Clock Source Select Register" bitfld.long 0x00 0. " GFM_SEL ,Clock source select for FPD interconnect components that interface to LPD" "LPD,FPD" group.long 0x100C++0x03 line.long 0x00 "INT_FPD,GPU Idle Status Register" bitfld.long 0x00 7.--10. " ARCACHE ,GPU ARCACHE register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3.--6. " AWCACHE ,GPU AWCACHE register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x00 2. " PP1_IDLE ,PP1 is idle" "Not idle,Idle" rbitfld.long 0x00 1. " PP0_IDLE ,PP0 is idle" "Not idle,Idle" textline " " rbitfld.long 0x00 0. " IDLE ,Full GPU idle" "Not idle,Idle" rgroup.long 0x3000++0x03 line.long 0x00 "GDMA_CFG,GDMA RF2 Configuration Register" bitfld.long 0x00 5.--6. " BUS_WIDTH ,AXI bus width" "32-bit,64-bit,128-bit,256-bit" bitfld.long 0x00 0.--4. " NUM_CH ,Number of implemented channels" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x5000++0x03 line.long 0x00 "AFI_FS,AFI FS SLCR Control Register" bitfld.long 0x00 10.--11. " DW_SS1_SEL ,Data width selection for the slave 1" "32-bit,64-bit,128-bit,?..." bitfld.long 0x00 8.--9. " DW_SS0_SEL ,Data width selection for the slave 0" "32-bit,64-bit,128-bit,?..." textline " " group.long 0x6000++0x03 line.long 0x00 "ERR_ATB_ISR,Interrupt Status Register" eventfld.long 0x00 2. " AFIFS1 ,ISR for ATB placed between fpd main switch and AFI_FS1" "No interrupt,Interrupt" eventfld.long 0x00 1. " AFIFS0 ,ISR for ATB placed between fpd main switch and AFI_FS0" "No interrupt,Interrupt" eventfld.long 0x00 0. " FPDS ,ISR for ATB placed between fpd main switch and fpd slaves switch" "No interrupt,Interrupt" group.long 0x6004++0x03 line.long 0x00 "ERR_ATB_IMR_SET/CLR,Interrupt Mask Register" setclrfld.long 0x00 2. 0x08 2. 0x04 2. " AFIFS1 ,ISR for ATB placed between fpd main switch and AFI_FS1" "Not masked,Masked" setclrfld.long 0x00 1. 0x08 1. 0x04 1. " AFIFS0 ,ISR for ATB placed between fpd main switch and AFI_FS0" "Not masked,Masked" setclrfld.long 0x00 0. 0x08 0. 0x04 0. " FPDS ,ISR for ATB placed between fpd main switch and fpd slaves switch" "Not masked,Masked" group.long 0x6010++0x0B line.long 0x00 "ATB_CMD_STORE_EN,ATB Sideband Signals Register" bitfld.long 0x00 2. " AFIFS1 ,Keeps track of read and write transactions" "Disabled,Enabled" bitfld.long 0x00 1. " AFIFS0 ,Keeps track of read and write transactions" "Disabled,Enabled" bitfld.long 0x00 0. " FPDS ,Keeps track of read and write transactions" "Disabled,Enabled" line.long 0x04 "ATB_RESP_EN,ATB Sideband Signals Register" bitfld.long 0x04 2. " AFIFS1 ,Send response if ATB sees timeout" "Disabled,Enabled" bitfld.long 0x04 1. " AFIFS0 ,Send response if ATB sees timeout" "Disabled,Enabled" bitfld.long 0x04 0. " FPDS ,Send response if ATB sees timeout" "Disabled,Enabled" line.long 0x08 "ATB_RESP_TYPE,ATB Response Type Register" bitfld.long 0x08 2. " AFIFS1 ,Send SLVERR if ATB sees timeout" "Disabled,Enabled" bitfld.long 0x08 1. " AFIFS0 ,Send SLVERR if ATB sees timeout" "Disabled,Enabled" bitfld.long 0x08 0. " FPDS ,Send SLVERR if ATB sees timeout" "Disabled,Enabled" group.long 0x6020++0x03 line.long 0x00 "ATB_PRESCALE,ATB Sideband Signals Register" bitfld.long 0x00 16. " ENABLE ,Counter enable" "Disabled,Enabled" hexmask.long.word 0x00 0.--15. 1. " VALUE ,16 bit prescale value based on 100 mhz clock" width 0x0B tree.end tree "FPD_SLCR_SECURE (Secure Full Power Domain SLCR)" base ad:0xFD690000 width 13. group.byte 0x04++0x00 line.byte 0x00 "CFG,General Control Register For The LP SLCR" bitfld.byte 0x00 0. " SLVERR_ENABLE ,SLVERR enable/disable" "Disabled,Enabled" group.byte 0x08++0x00 line.byte 0x00 "ISR,Interrupt Status Register" eventfld.byte 0x00 0. " ADDR_DECODE_ERR ,Status for an address decode error" "No error,Error" group.byte 0x0C++0x00 line.byte 0x00 "IMR_SET/CLR,Interrupt Mask Register" setclrfld.byte 0x00 0. 0x08 0. 0x04 0. " ADDR_DECODE_ERR ,Mask for an address decode error" "Not masked,Masked" wgroup.byte 0x18++0x00 line.byte 0x00 "ITR,Interrupt Trigger Register" bitfld.byte 0x00 0. " ADDR_DECODE_ERR ,Trigger an address decode error interrupt" "No effect,Trigger" group.long 0x20++0x03 line.long 0x00 "SLCR_SATA,SATA TrustZone Settings Register" bitfld.long 0x00 3. " TZ_AXIMDMA1 ,TrustZone classification for DMA port 1" "Secure,Non-secure" bitfld.long 0x00 2. " TZ_AXIMDMA0 ,TrustZone classification for DMA port 0" "Secure,Non-secure" bitfld.long 0x00 1. " TZ_AXIS ,TrustZone classification for AHCI interface AXI slave port" "Secure,Non-secure" bitfld.long 0x00 0. " TZ_EN ,Enable trustzone function" "Disabled,Enabled" group.long 0x30++0x03 line.long 0x00 "SLCR_PCIE,PCIe TrustZone Settings Register" bitfld.long 0x00 24. " TZ_DMA_3 ,TrustZone classification for DMA channel 3" "Secure,Non-secure" bitfld.long 0x00 23. " TZ_DMA_2 ,TrustZone classification for DMA channel 2" "Secure,Non-secure" bitfld.long 0x00 22. " TZ_DMA_1 ,TrustZone classification for DMA channel 1" "Secure,Non-secure" bitfld.long 0x00 21. " TZ_DMA_0 ,TrustZone classification for DMA channel 0" "Secure,Non-secure" textline " " bitfld.long 0x00 20. " TZ_AT_INGR_7 ,TrustZone classification for ingress address translation 7" "Secure,Non-secure" bitfld.long 0x00 19. " TZ_AT_INGR_6 ,TrustZone classification for ingress address translation 6" "Secure,Non-secure" bitfld.long 0x00 18. " TZ_AT_INGR_5 ,TrustZone classification for ingress address translation 5" "Secure,Non-secure" bitfld.long 0x00 17. " TZ_AT_INGR_4 ,TrustZone classification for ingress address translation 4" "Secure,Non-secure" textline " " bitfld.long 0x00 16. " TZ_AT_INGR_3 ,TrustZone classification for ingress address translation 3" "Secure,Non-secure" bitfld.long 0x00 15. " TZ_AT_INGR_2 ,TrustZone classification for ingress address translation 2" "Secure,Non-secure" bitfld.long 0x00 14. " TZ_AT_INGR_1 ,TrustZone classification for ingress address translation 1" "Secure,Non-secure" bitfld.long 0x00 13. " TZ_AT_INGR_0 ,TrustZone classification for ingress address translation 0" "Secure,Non-secure" textline " " bitfld.long 0x00 12. " TZ_AT_EGR_7 ,TrustZone classification for egress address translation 7" "Secure,Non-secure" bitfld.long 0x00 11. " TZ_AT_EGR_6 ,TrustZone classification for egress address translation 6" "Secure,Non-secure" bitfld.long 0x00 10. " TZ_AT_EGR_5 ,TrustZone classification for egress address translation 5" "Secure,Non-secure" bitfld.long 0x00 9. " TZ_AT_EGR_4 ,TrustZone classification for egress address translation 4" "Secure,Non-secure" textline " " bitfld.long 0x00 8. " TZ_AT_EGR_3 ,TrustZone classification for egress address translation 3" "Secure,Non-secure" bitfld.long 0x00 7. " TZ_AT_EGR_2 ,TrustZone classification for egress address translation 2" "Secure,Non-secure" bitfld.long 0x00 6. " TZ_AT_EGR_1 ,TrustZone classification for egress address translation 1" "Secure,Non-secure" bitfld.long 0x00 5. " TZ_AT_EGR_0 ,TrustZone classification for egress address translation 0" "Secure,Non-secure" textline " " bitfld.long 0x00 4. " TZ_DMA_REGS ,TrustZone classification for DMA registers" "Secure,Non-secure" bitfld.long 0x00 3. " TZ_MSIX_PBA ,TrustZone classification for MSIx PBA" "Secure,Non-secure" bitfld.long 0x00 2. " TZ_MSIX_TABLE ,TrustZone classification for MSIx table" "Secure,Non-secure" bitfld.long 0x00 1. " TZ_ECAM ,TrustZone classification for ECAM" "Secure,Non-secure" textline " " bitfld.long 0x00 0. " TZ_BRIDGE_REGS ,TrustZone classification for bridge common registers" "Secure,Non-secure" group.long 0x40++0x03 line.long 0x00 "SLCR_DPDMA,DPDMA TrustZone Settings Register" bitfld.long 0x00 0. " TZ ,TrustZone classification for DisplayPort DMA" "Secure,Non-secure" group.byte 0x50++0x00 line.byte 0x00 "SLCR_GDMA,GDMA TrustZone Settings Register" group.byte 0x60++0x00 line.byte 0x00 "SLCR_GIC,GIC Settings Register" bitfld.byte 0x00 0. " CFG_DISABLE ,Disable write access to certain secure registers of GIC" "No,Yes" width 0x0B tree.end tree "XMPU_FPD (XMPU FPD Module)" base ad:0xFD5D0000 width 13. group.long 0x00++0x03 line.long 0x00 "CTRL,XMPU Control Register" rbitfld.long 0x00 3. " ALIGNCFG ,Region alignment" "4kb,?..." bitfld.long 0x00 2. " POISONCFG ,Transaction poisoning mode" "Attribute,Address" bitfld.long 0x00 1. " DEFWRALLOWED ,Default write permission" "Poisoned,Allowed" bitfld.long 0x00 0. " DEFRDALLOWED ,Default read permission" "Poisoned,Allowed" rgroup.long 0x04++0x0B line.long 0x00 "ERR_STATUS,XMPU Error Status Register 2" hexmask.long 0x00 0.--27. 1. " AXI_ADDR ,Address bits [39:12] of the first poisoned request" line.long 0x04 "ERR_STATUS2,XMPU Error Status Register 2" hexmask.long.word 0x04 0.--9. 1. " AXI_ID ,Master ID of the first poisoned read or write request" line.long 0x08 "POISON,XMPU Poison Address Attribute Register" bitfld.long 0x08 20. " ATTRIB ,Poison attribute setting enable" "Disabled,Enabled" hexmask.long.tbyte 0x08 0.--19. 1. " BASE ,Poisoned AXI address" group.long 0x10++0x03 line.long 0x00 "ISR,Interrupt Status Register" eventfld.long 0x00 3. " SECURITYVIO ,Security violation occurred on any enabled region" "Not occurred,Occurred" eventfld.long 0x00 2. " WRPERMVIO ,Write permission violation occurred on any enabled region" "Not occurred,Occurred" eventfld.long 0x00 1. " RDPERMVIO ,Read permission violation occurred on any enabled region" "Not occurred,Occurred" eventfld.long 0x00 0. " INV_APB ,APB register access occurs to an unimplemented register" "Not occurred,Occurred" group.long 0x14++0x03 line.long 0x00 "IMR_SET/CLR,Interrupt Mask Register" setclrfld.long 0x00 3. 0x08 3. 0x04 3. " SECURITYVIO ,Security violation occurred on any enabled region" "Not masked,Masked" setclrfld.long 0x00 2. 0x08 2. 0x04 2. " WRPERMVIO ,Write permission violation occurred on any enabled region" "Not masked,Masked" setclrfld.long 0x00 1. 0x08 1. 0x04 1. " RDPERMVIO ,Read permission violation occurred on any enabled region" "Not masked,Masked" setclrfld.long 0x00 0. 0x08 0. 0x04 0. " INV_APB ,APB register access occurs to an unimplemented register" "Not masked,Masked" group.byte 0x20++0x00 line.byte 0x00 "LOCK,Lock Register" bitfld.byte 0x00 0. " REGWRDIS ,XMPU registers lock" "Not locked,Locked" textline " " group.long 0x100++0x0F line.long 0x00 "R00_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R00_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R00_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R00_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x110++0x0F line.long 0x00 "R01_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R01_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R01_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R01_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x120++0x0F line.long 0x00 "R02_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R02_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R02_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R02_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x130++0x0F line.long 0x00 "R03_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R03_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R03_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R03_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x140++0x0F line.long 0x00 "R04_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R04_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R04_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R04_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x150++0x0F line.long 0x00 "R05_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R05_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R05_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R05_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x160++0x0F line.long 0x00 "R06_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R06_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R06_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R06_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x170++0x0F line.long 0x00 "R07_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R07_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R07_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R07_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x180++0x0F line.long 0x00 "R08_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R08_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R08_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R08_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x190++0x0F line.long 0x00 "R09_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R09_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R09_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R09_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x1A0++0x0F line.long 0x00 "R10_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R10_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R10_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R10_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x1B0++0x0F line.long 0x00 "R11_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R11_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R11_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R11_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x1C0++0x0F line.long 0x00 "R12_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R12_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R12_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R12_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x1D0++0x0F line.long 0x00 "R13_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R13_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R13_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R13_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x1E0++0x0F line.long 0x00 "R14_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R14_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R14_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R14_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x1F0++0x0F line.long 0x00 "R15_START,Region Start Address Register" hexmask.long 0x00 0.--27. 1. " ADDR ,Start address bits [39:12] of this region" line.long 0x04 "R15_END,Region Start Address Register" hexmask.long 0x04 0.--27. 1. " ADDR ,End address bits [39:12] of this region" line.long 0x08 "R15_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R15_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" width 0x0B tree.end tree "XMPU_SINK (XMPU Default Sink)" base ad:0xFD4F0000 width 13. group.long 0xFF00++0x03 line.long 0x00 "ERR_STATUS,Error Status Register" bitfld.long 0x00 31. " RDWR ,Access type of the first access request sent to the black hole region or the non-existing register space in the upper 256B region" "Read,Write" hexmask.long.word 0x00 0.--11. 1. " ADDR ,Address bits [11:0] of the first access request sent to the black hole region or the non-existing register space in the upper 256B region" group.byte 0xFF10++0x00 line.byte 0x00 "ISR,Interrupt Status Register" eventfld.byte 0x00 0. " ADDR_DECODE_ERR ,Status for an address decode error" "No error,Error" group.byte 0xFF14++0x00 line.byte 0x00 "IMR_SET/CLR,Interrupt Mask Register" setclrfld.byte 0x00 0. 0x08 0. 0x04 0. " ADDR_DECODE_ERR ,Mask for an address decode error" "Not masked,Masked" group.long 0xFFEC++0x03 line.long 0x00 "ERR_CTRL,Error Control Register" bitfld.long 0x00 0. " PSLVERR ,Pslverr after access on unimplemented space" "Disabled,Enabled" width 0x0B tree.end tree "GEM (Gigabit Ethernet Controller)" tree "GEM0" base ad:0xFF0B0000 width 26. group.long 0x00++0x07 line.long 0x00 "NETWORK_CONTROL,General MAC Control Functions For Both Receiver And Transmitter Register" bitfld.long 0x00 24. " OSSM ,1588 one step sync mode" "Disabled,Enabled" bitfld.long 0x00 23. " ETPE ,External TSU timer port enable" "Disabled,Enabled" bitfld.long 0x00 22. " SUO ,Store UDP/TCP offset to memory" "Normal,UDP/TCP" textline " " bitfld.long 0x00 21. " ASM ,Alternative SGMII mode" "Disabled,Enabled" bitfld.long 0x00 20. " PUE ,Enable detection of unicast PTP" "Disabled,Enabled" bitfld.long 0x00 19. " TLE ,Enable LPI transmission when set LPI (Low power idle) is immediately transmitted" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " FRPP ,Flush the next packet from the external RX DPRAM" "No effect,Flushed" bitfld.long 0x00 17. " TPPBPF ,Write a one to transmit PFC priority based pause frame" "Disabled,Transmitted" bitfld.long 0x00 16. " PFC_EN ,Enable PFC priority based pause reception capabilities" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " SRT ,Store receive time stamp to memory" "Normal,Replaced" bitfld.long 0x00 12. " TPFZ ,Transmit zero quantum pause frame" "No effect,Transmitted" bitfld.long 0x00 11. " TPFR ,Transmit pause frame" "No effect,Transmitted" textline " " bitfld.long 0x00 10. " TXP ,Transmit halt" "Not halted,Halted" bitfld.long 0x00 9. " TSP ,Start transmission" "No effect,Start" bitfld.long 0x00 8. " BP ,Back pressure" "Not forced,Forced" textline " " bitfld.long 0x00 7. " SWE ,Write enable for statistic registers" "Disabled,Enabled" bitfld.long 0x00 6. " IASR ,Incremental statistics registers" "Not incremented,Incremented" bitfld.long 0x00 5. " CASR ,Clear statistics registers" "No effect,Clear" textline " " bitfld.long 0x00 4. " MANPEN ,Management port enable" "Disabled,Enabled" bitfld.long 0x00 3. " EN_TRANSMIT ,Transmit enable" "Disabled,Enabled" bitfld.long 0x00 2. " EN_RECEIVE ,Receive enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " LOOPBACK_LOCAL ,Loopback local" "Not asserted,Asserted" bitfld.long 0x00 0. " LOOPBACK ,Controls the loopback output pin" "Low,High" line.long 0x04 "NETWORK_CONFIG,Network Configuration Register" bitfld.long 0x04 31. " UDE ,Uni direction enable" "Disabled,Enabled" bitfld.long 0x04 30. " IIRE ,Ignore IPG RX_ER" "Not ignored,Ignored" bitfld.long 0x04 29. " NSP_CHANGE ,Receive bad preamble" "Rejected,Not rejected" textline " " bitfld.long 0x04 28. " ISE ,IPG stretch enable" "Disabled,Enabled" bitfld.long 0x04 27. " SME ,SGMII mode enable" "Disabled,Enabled" bitfld.long 0x04 26. " IRF ,Ignore RX FCS" "Rejected,Not rejected" textline " " bitfld.long 0x04 25. " EHDRX ,Enable frames to by received in half-duplex mode" "Disabled,Enabled" bitfld.long 0x04 24. " RCOE ,Receive checksum offload enable" "Disabled,Enabled" bitfld.long 0x04 23. " DISCOPF ,Disable copy of pause frames" "No,Yes" textline " " bitfld.long 0x04 21.--22. " DBW ,Data bus width" "32 bits,64 bits,?..." bitfld.long 0x04 18.--20. " MCD ,MDC clock division" "/8,/16,/32,/48,/64,/96,/128,/224" bitfld.long 0x04 17. " FCSREM ,FCS remove" "Without last 4 bytes,With 4 bytes" textline " " bitfld.long 0x04 16. " LFEFD ,Length field error frame discard" "Disabled,Enabled" bitfld.long 0x04 14.--15. " RBO ,Receive buffer offset" "0,1,2,3" bitfld.long 0x04 13. " PAUSE_EN ,Pause enable" "Not paused,Paused" textline " " bitfld.long 0x04 12. " RETRY_TEST ,Retry test" "Disabled,Enabled" bitfld.long 0x04 11. " PSC_SELECT ,PCS select" "GMII/MII,TBI" bitfld.long 0x04 10. " GMODEEN ,Gigabit mode enable" "10/100mbps,1000 mbps" textline " " bitfld.long 0x04 9. " EAME ,External address match enable" "Disabled,Enabled" bitfld.long 0x04 8. " R1536BF ,Receive 1536 byte frames" "Disabled,Enabled" bitfld.long 0x04 7. " UHE ,Unicast hash enable" "Disabled,Enabled" textline " " bitfld.long 0x04 6. " MHE ,Multicast hash enable" "Disabled,Enabled" bitfld.long 0x04 5. " NO_BRODCAST ,No broadcast" "Accepted,Not accepted" bitfld.long 0x04 4. " CPY_ALL_FRAMES ,Copy all frames" "Not accepted,Accepted" textline " " bitfld.long 0x04 3. " JUMBO_FRAMES ,Jumbo frames" "Disabled,Enabled" bitfld.long 0x04 2. " DIS_NONVLANFRM ,Discard non-VLAN frames" "Not discarded,Discarded" textline " " bitfld.long 0x04 1. " FULL_DUPLEX ,Full duplex" "Not ignored,Ignored" bitfld.long 0x04 0. " SPEED ,Port speed" "10mbps,100mbps" rgroup.long 0x08++0x03 line.long 0x00 "NETWORK_STATUS,Status Information With Respect To The PHY Management Interface Register" bitfld.long 0x00 7. " LPIINDIPCLK ,LPI indication" "Not detected,Detected" bitfld.long 0x00 6. " PFCNEGPCLK ,PFC priority based pause has been negotiated" "Not occurred,Occurred" bitfld.long 0x00 5. " MACPAUSETXEN ,PCS auto-negotiation pause transmit resolution" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " MACPAUSERXEN ,PCS auto-negotiation pause receive resolution" "Disabled,Enabled" bitfld.long 0x00 3. " MACFULLDUPLEX ,PCS auto-negotiation duplex resolution" "Depends on LINKSTATE,Full duplex" bitfld.long 0x00 2. " MAN_DONE ,The PHY management logic is idle" "Not idle,Idle" textline " " bitfld.long 0x00 1. " MDIO_IN ,Status of the MDIO_IN pin" "Low,High" bitfld.long 0x00 0. " PCS_LINK_STATE ,Status of PCS link state" "Low,High" if (((d.l(ad:0xFF0B0000+0x40))&0x80000000)==0x80000000) group.long 0x10++0x03 line.long 0x00 "DMA_CONFIG,DMA Configuration Register" bitfld.long 0x00 30. " DMAABW1 ,DMA address bus width" "32b,64b" bitfld.long 0x00 29. " TXDBEXTMODEEN ,Enable TX extended BD mode" "Disabled,Enabled" bitfld.long 0x00 28. " RXDBEXTMODEEN ,Enable RX extended BD mode" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " FORCEMAXABTX ,Force max length bursts on TX" "Not forced,Forced" bitfld.long 0x00 25. " FORCEMAXABRX ,Force max length bursts on RX" "Not forced,Forced" bitfld.long 0x00 24. " FORCEDISENERR ,Auto discard RX pkts during lack of resource" "Not discarded,Discarded" textline " " hexmask.long.byte 0x00 16.--23. 1. " RX_BUF_SIZE ,DMA receive buffer size in external AMBA (Ahb/axi) system memory" bitfld.long 0x00 10. " TX_PBUF_SIZE ,Transmitter packet buffer memory size select" "2kb,4kb" textline " " bitfld.long 0x00 8.--9. " RX_PBUF_SIZE ,Receiver packet buffer memory size select" "1kb,2kb,4kb,8kb" bitfld.long 0x00 7. " ENDIANSWPPACKET ,Endian swap mode enable for packet data accesses" "Not swapped,Swapped" bitfld.long 0x00 6. " ENDIANSWAPMAN ,Endian swap mode enable for management descriptor accesses" "Not swapped,Swapped" textline " " bitfld.long 0x00 0.--4. " AMBABURSTLENGTH ,Selects the burst length to attempt to use on the AMBA" "Auto,1,1,1,4,4,4,4,8,8,8,8,8,8,8,8,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16" else group.long 0x10++0x03 line.long 0x00 "DMA_CONFIG,DMA Configuration Register" bitfld.long 0x00 30. " DMAABW1 ,DMA address bus width" "32b,64b" bitfld.long 0x00 29. " TXDBEXTMODEEN ,Enable TX extended BD mode" "Disabled,Enabled" bitfld.long 0x00 28. " RXDBEXTMODEEN ,Enable RX extended BD mode" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " FORCEMAXABTX ,Force max length bursts on TX" "Not forced,Forced" bitfld.long 0x00 25. " FORCEMAXABRX ,Force max length bursts on RX" "Not forced,Forced" bitfld.long 0x00 24. " FORCEDISENERR ,Auto discard RX packets during lack of resource" "Not discarded,Discarded" textline " " hexmask.long.byte 0x00 16.--23. 1. " RX_BUF_SIZE ,DMA receive buffer size in external AMBA (Ahb/axi) system memory" bitfld.long 0x00 11. " TX_PBUF_TCP_EN ,TCP and UDP checksum generation offload enable" "Disabled,Enabled" bitfld.long 0x00 10. " TX_PBUF_SIZE ,Transmitter packet buffer memory size select" "2kb,4kb" textline " " bitfld.long 0x00 8.--9. " RX_PBUF_SIZE ,Receiver packet buffer memory size select" "1kb,2kb,4kb,8kb" bitfld.long 0x00 7. " ENDIANSWPPACKET ,Endian swap mode enable for packet data accesses" "Not swapped,Swapped" bitfld.long 0x00 6. " ENDIANSWAPMAN ,Endian swap mode enable for management descriptor accesses" "Not swapped,Swapped" textline " " bitfld.long 0x00 0.--4. " AMBABURSTLENGTH ,Selects the burst length to attempt to use on the AMBA" "Auto,1,1,1,4,4,4,4,8,8,8,8,8,8,8,8,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16" endif group.long 0x14++0x0F line.long 0x00 "TRANSMIT_STATUS,Details Of The Status Of A Transmit Register" eventfld.long 0x00 8. " RESP_NOT_OK ,BRESP/HRESP not OK" "Ok,Not ok" eventfld.long 0x00 7. " LATECOLOCC ,Late collision occurred" "Not occurred,Occurred" eventfld.long 0x00 6. " TRANSMITUR ,Transmit under run" "Not occurred,Occurred" textline " " eventfld.long 0x00 5. " TRNCOMPLETE ,Transmit complete" "Not completed,Completed" eventfld.long 0x00 4. " AMBA_ERROR ,Transmit frame corruption due to AMBA (Ahb/axi) errors" "Not occurred,Occurred" eventfld.long 0x00 3. " TRANSMIT_GO ,Transmit go" "Not active,Active" textline " " eventfld.long 0x00 2. " RETRYLIMITEX ,Retry limit exceeded" "Not exceed,Exceed" eventfld.long 0x00 1. " COLLISION_OCCURRED ,Collision occurred" "Not occurred,Occurred" eventfld.long 0x00 0. " USED_BIT_READ ,Used bit read" "Not occurred,Occurred" line.long 0x04 "RECEIVE_Q_PTR,Start Address Of The Receive Buffer Queue Register" hexmask.long 0x04 2.--31. 0x04 " DMA_RX_Q_PTR ,Receive buffer queue base address" line.long 0x08 "TRANSMIT_Q_PTR,Start Address Of The Transmit Buffer Queue Register" hexmask.long 0x08 2.--31. 0x04 " DMA_TX_Q_PTR ,Transmit buffer queue base address" line.long 0x0C "RECEIVE_STATUS,Details Of The Status Of A Receive Register" eventfld.long 0x0C 3. " RESP_NOT_OK ,BRESP/HRESP not OK" "Ok,Not ok" eventfld.long 0x0C 2. " RECEIVE_OVERRUN ,Receive overrun" "Not occurred,Occurred" eventfld.long 0x0C 1. " FRAME_RECEIVED ,Frame received" "Not received,Received" textline " " eventfld.long 0x0C 0. " BUFFERNOTAVAIL ,Buffer not available" "No,Yes" textline " " hgroup.long 0x24++0x03 hide.long 0x00 "INT_STATUS,Source Of This Interrupt" textfld " " in textline " " group.long 0x30++0x03 line.long 0x00 "INT_MASK,Interrupt Mask Register" setclrfld.long 0x00 29. -0x04 29. -0x08 29. " MASKTTCI ,Mask TSU timer comparison interrupt" "Not masked,Masked" setclrfld.long 0x00 28. -0x04 28. -0x08 28. " MASKWOLERI ,Mask WOL event received interrupt" "Not masked,Masked" setclrfld.long 0x00 27. -0x04 27. -0x08 27. " MASKRXPLIII ,Mask RX LPI indication interrupt" "Not masked,Masked" textline " " setclrfld.long 0x00 26. -0x04 26. -0x08 26. " MASKTSUSRI ,Mask TSU seconds register increment" "Not masked,Masked" setclrfld.long 0x00 25. -0x04 25. -0x08 25. " MASKPTPPFT ,Mask PTP PDELAY_RESP frame transmitted" "Not masked,Masked" setclrfld.long 0x00 24. -0x04 24. -0x08 24. " MASKPTPPFT ,Mask PTP PDELAY_REQ frame transmitted" "Not masked,Masked" textline " " setclrfld.long 0x00 23. -0x04 23. -0x08 23. " MASKPTPPFR ,Mask PTP PDELAY_RESP frame received" "Not masked,Masked" setclrfld.long 0x00 22. -0x04 22. -0x08 22. " MASKPTPDFR ,Mask PTP PDELAY_REQ frame received" "Not masked,Masked" setclrfld.long 0x00 21. -0x04 21. -0x08 21. " MASKPTPSFT ,Mask PTP sync frame transmitted" "Not masked,Masked" textline " " setclrfld.long 0x00 20. -0x04 20. -0x08 20. " MASKPTPDFT ,Mask PTP DELAY_REQ frame transmitted" "Not masked,Masked" setclrfld.long 0x00 19. -0x04 19. -0x08 19. " MASKPTPSFR ,Mask PTP sync frame received" "Not masked,Masked" setclrfld.long 0x00 18. -0x04 18. -0x08 18. " MASKPTPDFR ,Mask PTP DELAY_REQ frame received" "Not masked,Masked" textline " " setclrfld.long 0x00 17. -0x04 17. -0x08 17. " MASKPCSLPPR ,Mask PCS link partner page received" "Not masked,Masked" setclrfld.long 0x00 16. -0x04 16. -0x08 16. " MASKPCSACI ,Mask PCS auto-negotiation complete interrupt" "Not masked,Masked" setclrfld.long 0x00 15. -0x04 15. -0x08 15. " MASKEI ,Mask external interrupt" "Not masked,Masked" textline " " setclrfld.long 0x00 14. -0x04 14. -0x08 14. " MASKFTI ,Mask pause frame transmitted interrupt" "Not masked,Masked" setclrfld.long 0x00 13. -0x04 13. -0x08 13. " MASKPTZI ,Mask pause time zero interrupt" "Not masked,Masked" setclrfld.long 0x00 12. -0x04 12. -0x08 12. " MASKPFWNPQI ,Mask pause frame with non-zero pause quantum interrupt" "Not masked,Masked" textline " " setclrfld.long 0x00 11. -0x04 11. -0x08 11. " MASKBHNOKI ,Mask BRESP/HRESP not OK interrupt" "Not masked,Masked" setclrfld.long 0x00 10. -0x04 10. -0x08 10. " MASKROI ,Mask receive overrun interrupt" "Not masked,Masked" setclrfld.long 0x00 9. -0x04 9. -0x08 9. " MASKLCI ,Mask link change interrupt" "Not masked,Masked" textline " " setclrfld.long 0x00 7. -0x04 7. -0x08 7. " MASKTCI ,Mask transmit complete interrupt" "Not masked,Masked" setclrfld.long 0x00 6. -0x04 6. -0x08 6. " MASKTFCDTOAMBA ,Mask transmit frame corruption due to AMBA (Ahb/axi) error interrupt" "Not masked,Masked" setclrfld.long 0x00 5. -0x04 5. -0x08 5. " MASKRLEOLCI ,Mask retry limit exceeded or late collision interrupt" "Not masked,Masked" textline " " setclrfld.long 0x00 4. -0x04 4. -0x08 4. " MASKTBURI ,Mask transmit buffer under run interrupt" "Not masked,Masked" setclrfld.long 0x00 3. -0x04 3. -0x08 3. " MASKTUBRI ,Mask transmit used bit read interrupt" "Not masked,Masked" setclrfld.long 0x00 2. -0x04 2. -0x08 2. " MASKRUBRI ,Mask receive used bit read interrupt" "Not masked,Masked" textline " " setclrfld.long 0x00 1. -0x04 1. -0x08 1. " MASKRCI ,Mask receive complete interrupt" "Not masked,Masked" setclrfld.long 0x00 0. -0x04 0. -0x08 0. " MASKMDI ,Mask management done interrupt" "Not masked,Masked" if (((d.l(ad:0xFF0B0000+0x34))&0x40000000)==0x40000000) group.long 0x34++0x03 line.long 0x00 "PHY_MANAGEMENT,PHY Management Register" bitfld.long 0x00 31. " WRITE0 ,Must be written with 0" "0,?..." bitfld.long 0x00 30. " WRITE1 ,Valid clause frame" "45 frame,22 frame" bitfld.long 0x00 28.--29. " OPERATION ,Operation" ",Write,Read,?..." textline " " hexmask.long.byte 0x00 23.--27. 0x80 " PHYADDR ,PHY address" hexmask.long.byte 0x00 18.--22. 0x04 " REGADDR ,Register address" bitfld.long 0x00 16.--17. " WRITE10 ,Must be written with 10" ",,2,?..." textline " " hexmask.long.word 0x00 0.--15. 1. " PHYW/RDATA ,DATA" else group.long 0x34++0x03 line.long 0x00 "PHY_MANAGEMENT,PHY Management Register" bitfld.long 0x00 31. " WRITE0 ,Must be written with 0" "0,?..." bitfld.long 0x00 30. " WRITE1 ,Valid clause frame" "45 frame,22 frame" bitfld.long 0x00 28.--29. " OPERATION ,Operation" "Address,Write,Post read,Read frame" textline " " hexmask.long.byte 0x00 23.--27. 0x80 " PHYADDR ,PHY address" hexmask.long.byte 0x00 18.--22. 0x04 " REGADDR ,Register address" bitfld.long 0x00 16.--17. " WRITE10 ,Must be written with 10" ",,2,?..." textline " " hexmask.long.word 0x00 0.--15. 1. " PHYW/RDATA ,DATA" endif rgroup.long 0x38++0x03 line.long 0x00 "PAUSE_TIME,Received Pause Quantum Register" hexmask.long.word 0x00 0.--15. 1. " QUANTUM ,Received pause quantum" group.long 0x3C++0x03 line.long 0x00 "TX_PAUSE_QUANTUM,Transmit Pause Quantum Register" hexmask.long.word 0x00 0.--15. 1. " QUANTUM ,Transmit pause quantum" textline " " group.long 0x40++0x0F line.long 0x00 "PBUF_TXCUTTHRU,TX Partial Store And Forward Register" bitfld.long 0x00 31. " DMA_TX_CUTTHRU ,Enable TX partial store and forward operation" "Disabled,Enabled" hexmask.long.word 0x00 0.--11. 1. " DMA_TX_CUTTHRU_THRESHOLD ,Watermark value" line.long 0x04 "PBUF_RXCUTTHRU,RX Partial Store And Forward" bitfld.long 0x04 31. " DMA_RX_CUTTHRU ,Enable RX partial store and forward operation" "Disabled,Enabled" hexmask.long.word 0x04 0.--11. 1. " DMA_RX_CUTTHRU_THRESHOLD ,Watermark value" line.long 0x08 "JUMBO_MAX_LENGTH,Maximum Jumbo Frame Size" hexmask.long.word 0x08 0.--15. 1. " JUMBO_MAX_LENGTH ,Maximal jumbo frame size" line.long 0x0C "EXTERNAL_FIFO_INTERFACE,External FIFO Interface Enable" bitfld.long 0x0C 0. " EXTERNAL_FIFO_INTERFACE ,Enable external FIFO interface" "Disabled,Enabled" group.long 0x54++0x03 line.long 0x00 "AXI_MAX_PIPELINE,Maximum Amount Of Outstanding Transactions On The AXI Bus Between AR / R And AW / W Channels Register" hexmask.long.byte 0x00 8.--15. 1. " AW2W_MAX_PIPELINE ,Maximum number of outstanding AXI write requests that can be issued by the DMA via the AW channel" hexmask.long.byte 0x00 0.--7. 1. " AR2R_MAX_PIPELINE ,Maximum number of outstanding AXI read requests that can be issued by the DMA via the AR channel" group.long 0x80++0x1F line.long 0x00 "HASH_BOTTOM,The First 32 Bits Of The Hash Address Register" line.long 0x04 "HASH_TOP,The Remaining 32 Bits Of The Hash Address Register" line.long 0x08 "SPEC_ADD1_BOTTOM,Least Significant 32 Bits Of The Destination Address Register" line.long 0x0C "SPEC_ADD1_TOP,Specific Address Top Register" bitfld.long 0x0C 16. " FILTER_TYPE ,Destination address filter/source address filter" "Destination,Source" hexmask.long.word 0x0C 0.--15. 1. " ADDRESS ,The most significant bits of the destination/source address[32-47]" line.long 0x10 "SPEC_ADD2_BOTTOM,Least Significant 32 Bits Of The Destination Address Register" line.long 0x14 "SPEC_ADD2_TOP,Least Significant 32 Bits Of The Destination Address Register" bitfld.long 0x14 29. " FILTER_BYTE_MASK_[5] ,Byte 5 of the specific address compare enable" "Compared,Not compared" bitfld.long 0x14 28. " [4] ,Byte 4 of the specific address compare enable" "Compared,Not compared" bitfld.long 0x14 27. " [3] ,Byte 3 of the specific address compare enable" "Compared,Not compared" textline " " bitfld.long 0x14 26. " [2] ,Byte 2 of the specific address compare enable" "Compared,Not compared" bitfld.long 0x14 25. " [1] ,Byte 1 of the specific address compare enable" "Compared,Not compared" bitfld.long 0x14 24. " [0] ,Byte 0 of the specific address compare enable" "Compared,Not compared" textline " " bitfld.long 0x14 16. " FILTER_TYPE ,Destination address filter/source address filter" "Destination,Source" textline " " hexmask.long.word 0x14 0.--15. 1. " ADDRESS ,Specific address 1[32-47]" line.long 0x18 "SPEC_ADD3_BOTTOM,Address Register" line.long 0x1C "SPEC_ADD3_TOP,Least Significant 32 Bits Of The Destination Address Register" bitfld.long 0x1C 29. " FILTER_BYTE_MASK_[5] ,Byte 5 of the specific address compare enable" "Compared,Not compared" bitfld.long 0x1C 28. " [4] ,Byte 4 of the specific address compare enable" "Compared,Not compared" bitfld.long 0x1C 27. " [3] ,Byte 3 of the specific address compare enable" "Compared,Not compared" textline " " bitfld.long 0x1C 26. " [2] ,Byte 2 of the specific address compare enable" "Compared,Not compared" bitfld.long 0x1C 25. " [1] ,Byte 1 of the specific address compare enable" "Compared,Not compared" bitfld.long 0x1C 24. " [0] ,Byte 0 of the specific address compare enable" "Compared,Not compared" textline " " bitfld.long 0x1C 16. " FILTER_TYPE ,Destination address filter/source address filter" "Destination,Source" textline " " hexmask.long.word 0x1C 0.--15. 1. " ADDRESS ,Specific address 1[32-47]" group.long 0xA0++0x1F line.long 0x00 "SPEC_ADD4_BOTTOM,Specific Address Top Register" line.long 0x04 "SPEC_ADD4_TOP,Least Significant 32 Bits Of The Destination Address Register" bitfld.long 0x04 29. " FILTER_BYTE_MASK_[5] ,Byte 5 of the specific address compare enable" "Compared,Not compared" bitfld.long 0x04 28. " [4] ,Byte 4 of the specific address compare enable" "Compared,Not compared" bitfld.long 0x04 27. " [3] ,Byte 3 of the specific address compare enable" "Compared,Not compared" textline " " bitfld.long 0x04 26. " [2] ,Byte 2 of the specific address compare enable" "Compared,Not compared" bitfld.long 0x04 25. " [1] ,Byte 1 of the specific address compare enable" "Compared,Not compared" bitfld.long 0x04 24. " [0] ,Byte 0 of the specific address compare enable" "Compared,Not compared" textline " " bitfld.long 0x04 16. " FILTER_TYPE ,Destination address filter/source address filter" "Destination,Source" textline " " hexmask.long.word 0x04 0.--15. 1. " ADDRESS ,Specific address 1[32-47]" line.long 0x08 "SPEC_TYPE1,Type ID Match 1 Register" bitfld.long 0x08 31. " ENABLE_COPY ,Enable copying of type ID match 1 matched frames" "Disabled,Enabled" hexmask.long.word 0x08 0.--15. 1. " MATCH ,Type ID match 1" line.long 0x0C "SPEC_TYPE2,Type ID Match 2 Register" bitfld.long 0x0C 31. " ENABLE_COPY ,Enable copying of type ID match 2 matched frames" "Disabled,Enabled" hexmask.long.word 0x0C 0.--15. 1. " MATCH ,Type ID match 2" line.long 0x10 "SPEC_TYPE3,Type ID Match 3 Register" bitfld.long 0x10 31. " ENABLE_COPY ,Enable copying of type ID match 3 matched frames" "Disabled,Enabled" hexmask.long.word 0x10 0.--15. 1. " MATCH ,Type ID match 3" line.long 0x14 "SPEC_TYPE4,Type ID Match 4 Register" bitfld.long 0x14 31. " ENABLE_COPY ,Enable copying of type ID match 4 matched frames" "Disabled,Enabled" hexmask.long.word 0x14 0.--15. 1. " MATCH ,Type ID match 4" line.long 0x18 "WOL_REGISTER,Wake On LAN Register" bitfld.long 0x18 19. " WOL_MASK_3 ,Wake on LAN multicast hash event enable" "Disabled,Enabled" bitfld.long 0x18 18. " WOL_MASK_2 ,Wake on LAN specific address register 1 event enable" "Disabled,Enabled" textline " " bitfld.long 0x18 17. " WOL_MASK_1 ,Wake on LAN ARP request event enable" "Disabled,Enabled" bitfld.long 0x18 16. " WOL_MASK_0 ,Wake on LAN magic packet event enable" "Disabled,Enabled" textline " " hexmask.long.word 0x18 0.--15. 1. " ADDR ,Wake on LAN ARP request IP address" line.long 0x1C "STRETCH_RATIO,IPG Stretch Register" hexmask.long.word 0x1C 0.--15. 1. " IPG_STRETCH ,IPG stretch" group.long 0xC0++0x1F line.long 0x00 "STACKED_VLAN,Stacked VLAN Register" bitfld.long 0x00 31. " ENABLE_PROCESSING ,Enable stacked VLAN processing mode" "Disabled,Enabled" hexmask.long.word 0x00 0.--15. 1. " MATCH ,User defined VLAN_TYPE field" line.long 0x04 "TX_PFC_PAUSE,Transmit PFC Pause Register" hexmask.long.byte 0x04 8.--15. 1. " VECTOR ,Priority vector pause size" hexmask.long.byte 0x04 0.--7. 1. " VECTOR_ENABLE ,Priority vector enable" line.long 0x08 "MASK_ADD1_BOTTOM,Specific Address Mask 1 Bottom Register" line.long 0x0C "MASK_ADD1_TOP,Specific Address Mask 1 Top Register" bitfld.long 0x0C 15. " ADDRESS_MASK[15] ,Priority vector enable" "Disabled,Enabled" bitfld.long 0x0C 14. " [14] ,Priority vector enable" "Disabled,Enabled" bitfld.long 0x0C 13. " [13] ,Priority vector enable" "Disabled,Enabled" bitfld.long 0x0C 12. " [12] ,Priority vector enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 11. " [11] ,Priority vector enable" "Disabled,Enabled" bitfld.long 0x0C 10. " [10] ,Priority vector enable" "Disabled,Enabled" bitfld.long 0x0C 9. " [9] ,Priority vector enable" "Disabled,Enabled" bitfld.long 0x0C 8. " [8] ,Priority vector enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 7. " [7] ,Priority vector enable" "Disabled,Enabled" bitfld.long 0x0C 6. " [6] ,Priority vector enable" "Disabled,Enabled" bitfld.long 0x0C 5. " [5] ,Priority vector enable" "Disabled,Enabled" bitfld.long 0x0C 4. " [4] ,Priority vector enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 3. " [3] ,Priority vector enable" "Disabled,Enabled" bitfld.long 0x0C 2. " [2] ,Priority vector enable" "Disabled,Enabled" bitfld.long 0x0C 1. " [1] ,Priority vector enable" "Disabled,Enabled" bitfld.long 0x0C 0. " [0] ,Priority vector enable" "Disabled,?..." line.long 0x10 "DMA_ADDR_OR_MASK,Receive DMA Data Buffer Address Mask Register" bitfld.long 0x10 28.--31. " MASK_VALUE ,Data buffer address mask value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x10 3. " MASK_ENABLE[3] ,AHB/AXI address bit 31 access force" "Not forced,Forced" bitfld.long 0x10 2. " [2] ,AHB/AXI address bit 30 access force" "Not forced,Forced" bitfld.long 0x10 1. " [1] ,AHB/AXI address bit 29 access force" "Not forced,Forced" bitfld.long 0x10 0. " [0] ,AHB/AXI address bit 28 access force" "Not forced,Forced" line.long 0x14 "RX_PTP_UNICAST,PTP RX Unicast IP Destination Address Register" line.long 0x18 "TX_PTP_UNICAST,PTP TX Unicast IP Destination Address Register" line.long 0x1C "TSU_NSEC_CMP,TSU Timer Comparison Value Nanoseconds Register" hexmask.long.tbyte 0x1C 0.--21. 1. " COMPARISON_VALUE ,TSU timer comparison value" group.long 0xE0++0x07 line.long 0x00 "TSU_SEC_CMP,TSU Timer Comparison Value Seconds Register" line.long 0x04 "TSU_MSB_SEC_CMP,TSU Timer Comparison Value Seconds Register" hexmask.long.word 0x04 0.--15. 1. " COMPARISON_VALUE ,TSU timer comparison value" rgroup.long 0xE8++0x0F line.long 0x00 "TSU_PTP_TX_MSB_SEC,PTP Event Frame Transmitted Seconds Register" hexmask.long.word 0x00 0.--15. 1. " TIMER_SECONDS ,PTP event frame TX seconds" line.long 0x04 "TSU_PTP_RX_MSB_SEC,PTP Event Frame Received Seconds Register" hexmask.long.word 0x04 0.--15. 1. " TIMER_SECONDS ,PTP event frame RX seconds" line.long 0x08 "TSU_PEER_TX_MSB_SEC,PTP Peer Event Frame Transmitted Seconds Register" hexmask.long.word 0x08 0.--15. 1. " TIMER_SECONDS ,PTP peer event frame TX seconds" line.long 0x0C "TSU_PEER_RX_MSB_SEC,PTP Peer Event Frame Received Seconds Register" hexmask.long.word 0x0C 0.--15. 1. " TIMER_SECONDS ,PTP peer event frame RX seconds" group.long 0xF8++0x03 line.long 0x00 "DPRAM_FILL_DBG,The Fill Levels For The TX & RX Packet Buffers Register" hexmask.long.word 0x00 16.--31. 1. " DMA_TX_RX_FILL_LEVEL ,TX or RX packet buffer fill level" bitfld.long 0x00 4.--7. " DMA_TX_Q_FILL_LEVEL_SELECT ,TX queue fill level select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 0. " DMA_TX_RX_FILL_LEVEL_SELECT ,TX/RX fill level select" "0,1" rgroup.long 0xFC++0x03 line.long 0x00 "REVISION_REG,Module Identification Number And Module Revision Register" bitfld.long 0x00 28.--31. " FIX_NUMBER ,Fix number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 16.--27. 1. " MODULE_ID_NUMBER ,Module identification number" hexmask.long.word 0x00 0.--15. 1. " MODULE_REVISION ,Module revision" hgroup.long 0x100++0x03 hide.long 0x00 "OCTETS_TXED_BOTTOM,Transmitted Octets In Frame Without Errors Register" textfld " " in hgroup.long 0x104++0x03 hide.long 0x00 "OCTETS_TXED_TOP,Octets Transmitted Register" textfld " " in textline " " group.long 0x108++0x17 line.long 0x00 "FRAMES_TXED_OK,Frames Transmitted Without Error" line.long 0x04 "BROADCAST_TXED,Broadcast Frames Transmitted Without Error Register" line.long 0x08 "MULTICAST_TXED,Multicast Frames Transmitted Without Error Register" line.long 0x0C "PAUSE_FRAMES_TXED,Pause Frames Transmitted" hexmask.long.word 0x0C 0.--15. 1. " COUNT ,Transmitted pause frames register" line.long 0x10 "FRAMES_TXED_64,64 Byte Frames Transmitted Register" line.long 0x14 "FRAMES_TXED_65,65 To 127 Byte Frames Transmitted Register" group.long 0x120++0x1F line.long 0x00 "FRAMES_TXED_128,128 To 255 Byte Frames Transmitted Register" line.long 0x04 "FRAMES_TXED_256,256 To 511 Byte Frames Transmitted Register" line.long 0x08 "FRAMES_TXED_512,512 To 1023 Byte Frames Transmitted Register" line.long 0x0C "FRAMES_TXED_1024,1024 To 1518 Byte Frames Transmitted Register" line.long 0x10 "FRAMES_TXED_1519,Greater Than 1518 Byte Frames Transmitted Register" line.long 0x14 "TX_UNDERRUNS,Transmit Under Runs Register" hexmask.long.word 0x14 0.--9. 1. " COUNT ,Transmit under runs" line.long 0x18 "SINGLE_COLLISIONS,Single Collision Frames Register" hexmask.long.tbyte 0x18 0.--17. 1. " COUNT ,Single collision frames register" line.long 0x1C "MULTIPLE_COLLISIONS,Multiple Collision Frames" hexmask.long.tbyte 0x1C 0.--17. 1. " COUNT ,Multiple collision frames register" group.long 0x140++0x1F line.long 0x00 "EXCESSIVE_COLLISIONS,Excessive Collisions Register" hexmask.long.word 0x00 0.--9. 1. " COUNT ,Excessive collisions" line.long 0x04 "LATE_COLLISIONS,Late Collisions Register" hexmask.long.word 0x04 0.--9. 1. " COUNT ,Late collisions" line.long 0x08 "DEFERRED_FRAMES,Deferred Transmission Frames Register" hexmask.long.tbyte 0x08 0.--17. 1. " COUNT ,Deferred transmission frames" line.long 0x0C "CRS_ERRORS,Carrier Sense Errors Register" hexmask.long.word 0x0C 0.--9. 1. " COUNT ,Carrier sense errors" line.long 0x10 "OCTETS_RXED_BOTTOM,Octets Received Register" line.long 0x14 "OCTETS_RXED_TOP,Octets Received" hexmask.long.word 0x14 0.--15. 1. " COUNT ,Received octets in frame without errors" line.long 0x18 "FRAMES_RXED_OK,Frames Received Register" line.long 0x1C "BROADCAST_RXED,Broadcast Frames Received Register" group.long 0x160++0x1F line.long 0x00 "MULTICAST_RXED,Multicast Frames Received Register" line.long 0x04 "PAUSE_FRAMES_RXED,Received Pause Frames Register" hexmask.long.word 0x04 0.--15. 1. " COUNT ,Received pause frames" line.long 0x08 "FRAMES_RXED_64,64 Byte Frames Received Register" line.long 0x0C "FRAMES_RXED_65,65 To 127 Byte Frames Received Register" line.long 0x10 "FRAMES_RXED_128,128 To 255 Byte Frames Received Register" line.long 0x14 "FRAMES_RXED_256,256 To 511 Byte Frames Received Register" line.long 0x18 "FRAMES_RXED_512,512 To 1023 Byte Frames Received Register" line.long 0x1C "FRAMES_RXED_1024,1024 To 1518 Byte Frames Received Register" group.long 0x180++0x1F line.long 0x00 "FRAMES_RXED_1519,1519 To Maximum Byte Frames Received Register" line.long 0x04 "UNDERSIZE_FRAMES,Undersized Frames Received Register" hexmask.long.word 0x04 0.--9. 1. " COUNT ,Undersize frames received" line.long 0x08 "EXCESSIVE_RX_LENGTH,Oversize Frames Received Register" hexmask.long.word 0x08 0.--9. 1. " COUNT ,Oversize frames received" line.long 0x0C "RX_JABBERS,Jabbers Received Register" hexmask.long.word 0x0C 0.--9. 1. " COUNT ,Jabbers received" line.long 0x10 "FCS_ERRORS,Frame Check Sequence Errors Register" hexmask.long.word 0x10 0.--9. 1. " COUNT ,Frame check sequence errors" line.long 0x14 "RX_LENGTH_ERRORS,Length Field Frame Errors Register" hexmask.long.word 0x14 0.--9. 1. " COUNT ,Length field frame errors" line.long 0x18 "RX_SYMBOL_ERRORS,Receive Symbol Error Registers" hexmask.long.word 0x18 0.--9. 1. " COUNT ,Receive symbol errors" line.long 0x1C "ALIGNMENT_ERRORS,Alignment Errors Register" hexmask.long.word 0x1C 0.--9. 1. " COUNT ,Alignment errors" group.long 0x1A0++0x17 line.long 0x00 "RX_RESOURCE_ERRORS,Receive Resource Errors Register" hexmask.long.tbyte 0x00 0.--17. 1. " COUNT ,Receive resource errors" line.long 0x04 "RX_OVERRUNS,Receive Overruns Register" hexmask.long.word 0x04 0.--9. 1. " COUNT ,Receive overruns" line.long 0x08 "RX_IP_CK_ERRORS,IP Header Checksum Errors Register" hexmask.long.byte 0x08 0.--7. 1. " COUNT ,IP header checksum errors" line.long 0x0C "RX_TCP_CK_ERRORS,TCP Checksum Errors Register" hexmask.long.byte 0x0C 0.--7. 1. " COUNT ,TCP checksum errors" line.long 0x10 "RX_UDP_CK_ERRORS,UDP Checksum Errors Register" hexmask.long.byte 0x10 0.--7. 1. " COUNT ,UDP checksum errors" line.long 0x14 "AUTO_FLUSHED_PKTS,Receive DMA Flushed Packets Register" hexmask.long.word 0x14 0.--15. 1. " COUNT ,Receive DMA flushed packets" group.long 0x1BC++0x07 line.long 0x00 "TSU_TIMER_INCR_SUB_NSEC,1588 Timer Increment Register SUB NSEC Register" hexmask.long.byte 0x00 24.--31. 1. " SUB_NS_INCR_LSB ,Bits [7:0] of timer increment sub nsec" hexmask.long.word 0x00 0.--15. 1. " SUB_NS_INCR ,Bits [23:8] of timer increment sub nsec" line.long 0x04 "TSU_TIMER_MSB_SEC,1588 Timer Seconds Register" hexmask.long.word 0x04 0.--15. 1. " TIMER ,TSU timer value (S)" rgroup.long 0x1C4++0x03 line.long 0x00 "TSU_STROBE_MSB_SEC,1588 Timer Sync Strobe Seconds Register" hexmask.long.word 0x00 0.--15. 1. " STROBE ,1588 timer sync strobe seconds" rgroup.long 0x1C8++0x07 line.long 0x00 "TSU_STROBE_SEC,1588 Timer Sync Strobe Seconds Register" line.long 0x04 "TSU_STROBE_NSEC,1588 Timer Sync Strobe Nanoseconds Register" hexmask.long 0x04 0.--29. 1. " STROBE ,1588 timer sync strobe nanoseconds" group.long 0x1D0++0x07 line.long 0x00 "TSU_TIMER_SEC,1588 Timer Seconds Register" line.long 0x04 "TSU_TIMER_NSEC,1588 Timer Nanoseconds Register" hexmask.long 0x04 0.--29. 1. " TIMER ,Timer count in nanoseconds" textline " " wgroup.long 0x1D8++0x03 line.long 0x00 "TSU_TIMER_ADJUST,TSU Timer Adjust Register" bitfld.long 0x00 31. " ADD_SUBTRACT ,Write as one to subtract from the 1588 timer" "Add,Subtract" hexmask.long 0x00 0.--29. 1. " INCREMENT_VALUE ,Timer increment value" group.long 0x1DC++0x03 line.long 0x00 "TSU_TIMER_INCR,1588 Timer Increment Register" hexmask.long.byte 0x00 16.--23. 1. " NUM_INCS ,The number of increments after which the alternative increment is used" hexmask.long.byte 0x00 8.--15. 1. " ALT_NS_INCR ,Alternative nanoseconds count" hexmask.long.byte 0x00 0.--7. 1. " NUM_INCR ,A count of nanoseconds by which the 1588 timer nanoseconds register will be incremented each clock cycle" rgroup.long 0x1E0++0x1F line.long 0x00 "TSU_PTP_TX_SEC,PTP Event Frame Transmitted Seconds Register" line.long 0x04 "TSU_PTP_TX_NSEC,PTP Event Frame Transmitted Nanoseconds Register" hexmask.long 0x04 0.--29. 1. " TIMER ,PTP event frame transmitted nanoseconds" line.long 0x08 "TSU_PTP_RX_SEC,PTP Event Frame Received Seconds Register" line.long 0x0C "TSU_PTP_RX_NSEC,PTP Event Frame Received Nanoseconds Register" hexmask.long 0x0C 0.--29. 1. " TIMER ,PTP event frame transmitted nanoseconds" line.long 0x10 "TSU_PEER_TX_SEC,PTP Peer Event Frame Transmitted Seconds Register" line.long 0x14 "TSU_PEER_TX_NSEC,PTP Peer Event Frame Transmitted Nanoseconds Register" hexmask.long 0x14 0.--29. 1. " TIMER ,PTP peer event frame transmitted nanoseconds" line.long 0x18 "TSU_PEER_RX_SEC,PTP Peer Event Frame Received Seconds Register" line.long 0x1C "TSU_PEER_RX_NSEC,PTP Peer Event Frame Received Nanoseconds Register" hexmask.long 0x1C 0.--29. 1. " TIMER ,PTP peer event frame received nanoseconds" group.long 0x200++0x03 line.long 0x00 "PCS_CONTROL,PSC Control Register" bitfld.long 0x00 15. " PCS_SOFTWARE_RESET ,PCS software reset" "No effect,Reset" bitfld.long 0x00 14. " LOOPBACK_MODE ,Loopback mode" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " ENABLE_AUTO_NEG ,Enable auto-negotiation" "Disabled,Enabled" bitfld.long 0x00 9. " RESTART_AUTO_NEG ,Restart auto-negotiation" "No effect,Reset" textline " " bitfld.long 0x00 8. " MAC_DUPLEX_STATE ,MAC duplex state" "0,1" bitfld.long 0x00 7. " COLLISION_TEST ,Collision test" "No collision,Collision" textline " " bitfld.long 0x00 6. 13. " SPEED_SELECT_BIT ,Speed select" ",1000 mbps,?..." textline " " hgroup.long 0x204++0x03 hide.long 0x00 "PCS_STATUS,PCS General Status Information Register" textfld " " in textline " " rgroup.long 0x208++0x07 line.long 0x00 "PCS_PHY_TOP_ID,Upper 16-bits Of The Phy's Identification Code Register" hexmask.long.word 0x00 0.--15. 1. " ID_CODE ,Upper 16-bits of the PHY identification code" line.long 0x04 "PCS_PHY_BOT_ID,Lower 16-bits Of The Phy's Identification Code Register" hexmask.long.word 0x04 0.--15. 1. " ID_CODE ,Lower 16-bits of the PHY identification code" group.long 0x210++0x03 line.long 0x00 "PCS_AN_ADV,Transmit Base Page Of The GEM PCS Capabilities Register" bitfld.long 0x00 15. " NEXT_PAGE ,Next page" "Not required,Required" bitfld.long 0x00 12.--13. " REMOTE_FAULT ,Remote fault" "No error,Link failure,Off line,Auto-negation error" textline " " bitfld.long 0x00 7.--8. " PAUSE ,Pause" "No pause,Symmetric,Asymmetric,Both" bitfld.long 0x00 6. " HALF_DUPLEX ,Half duplex support" "Not supported,Supported" textline " " bitfld.long 0x00 5. " FULL_DUPLEX ,Full duplex support" "Not supported,Supported" if ((d.l(ad:0xFF0B0000+0x04)&0x8000000)==0x8000000) rgroup.long 0x214++0x03 line.long 0x00 "PCS_AN_LP_BASE,Link Partner's Base Page Received Information Register" bitfld.long 0x00 15. " LPNPS ,Link status" "Link down,Link up" bitfld.long 0x00 14. " LPA ,Link partner acknowledge" "Not successful,Successful" textline " " bitfld.long 0x00 12. " LPRFDM ,Link partner remote fault duplex mode" "Half duplex,Full duplex" textline " " bitfld.long 0x00 10.--11. " SPEED ,Speed" "10 mbps bit,100mbps,1000 mbps,?..." else rgroup.long 0x214++0x03 line.long 0x00 "PCS_AN_LP_BASE,Link Partner's Base Page Received Information Register" bitfld.long 0x00 15. " LPNPS ,Link partner next page" "Not exchange,Exchange" bitfld.long 0x00 14. " LPA ,Link partner acknowledge" "Not successful,Successful" textline " " bitfld.long 0x00 12.--13. " LPRFDM ,Link partner remote fault" "No error,Link failure,Off line,Auto-negotiation error" bitfld.long 0x00 7.--8. " PAUSE ,Pause" "No pause,Symmetric pause,Asymmetric pause,Both" textline " " bitfld.long 0x00 6. " LPHD ,Link partner half duplex" "Not supported,Supported" bitfld.long 0x00 5. " LPFD ,Link partner full duplex" "Not supported,Supported" endif rgroup.long 0x218++0x03 line.long 0x00 "PCS_AN_EXP,Auto-negotiation Next Page Ability And Page Received Information Register" bitfld.long 0x00 2. " NPC ,Next page capability" "Not supported,Supported" bitfld.long 0x00 1. " PR ,Page received" "Not received,Received" group.long 0x21C++0x03 line.long 0x00 "PCS_AN_NP_TX,Transmit The Next Page Information For The GEM PCS Register" bitfld.long 0x00 15. " NPTT ,Next page to transmit" "Last page,Not last" bitfld.long 0x00 13. " MPI ,Message page indicator" "Unformatted,Message" textline " " bitfld.long 0x00 12. " ACKNOWLEDGE_2 ,GEM PCS has the ability to comply with the last received message" "Not able,Able" hexmask.long.word 0x00 0.--10. 1. " MESSAGE ,Contains data as defined by the message page indicator bit" rgroup.long 0x220++0x03 line.long 0x00 "PCS_AN_LP_NP,Next Page Received Information From The Link Partner Register" bitfld.long 0x00 15. " NPTR ,Next page to receive" "Last page,Not last" bitfld.long 0x00 14. " ACKNOWLEDGE ,Link partner has successfully received the last message transmitted" "Not successful,Successful" textline " " bitfld.long 0x00 13. " MPI ,Message page indicator" "Unformatted,Message" bitfld.long 0x00 12. " ACKNOWLEDGE_2 ,Link partner has the ability to comply with the last message received" "Not able,Able" textline " " bitfld.long 0x00 11. " TOGGLE ,Toggle every received page" "Not toggle,Toggle" hexmask.long.word 0x00 0.--10. 1. " MESSAGE ,Contains data as defined by the message page indicator bit" rgroup.long 0x23C++0x03 line.long 0x00 "PCS_AN_EXT_STATUS,PCS auto-negotiation Extended Status Information Register" bitfld.long 0x00 15. " FD_1000BASE_X ,Full duplex 1000BASE-X" "Not supported,Supported" bitfld.long 0x00 14. " HD_1000BASE_X ,Half duplex 1000BASE-X" "Not supported,Supported" textline " " bitfld.long 0x00 13. " FD_1000BASE_T ,Full duplex 1000BASE-T" "Not supported,Supported" bitfld.long 0x00 12. " HD_1000BASE_T ,Half duplex 1000BASE-T" "Not supported,Supported" textline " " hgroup.long 0x270++0x07 hide.long 0x00 "RX_LPI,Received LPI Transitions Register" textfld " " in hide.long 0x04 "RX_LPI_TIME,Received LPI Time Register" textfld " " in group.long 0x278++0x03 line.long 0x00 "TX_LPI,Transmit LPI Transitions Register" hexmask.long.word 0x00 0.--15. 1. " COUNT ,Count of LPI transmissions" hgroup.long 0x27C++0x03 hide.long 0x00 "TX_LPI_TIME,Transmit LPI Time Register" textfld " " in textline " " rgroup.long 0x280++0x0B line.long 0x00 "DESIGNCFG_DEBUG1,Design Configuration Register 1" bitfld.long 0x00 28.--31. " AXI_CACHE_VALUE ,Takes the value of the GEM_AXI_CACHE_VALUE define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 25.--27. " DMA_BUS_WIDTH ,Takes the value of the GEM_DMA_BUS_WIDTH define" "0,1,2,3,4,5,6,7" bitfld.long 0x00 23. " IRQ_READ_CLEAR ,Takes the value of the GEM_IRQ_READ_CLEAR define" "0,1" textline " " bitfld.long 0x00 22. " NO_SNAPSHOT ,Takes the value of the GEM_NO_SNAPSHOT define" "0,1" bitfld.long 0x00 21. " NO_STATS ,Takes the value of the GEM_NO_STATS define" "0,1" bitfld.long 0x00 20. " NO_SCAN_PINS ,Takes the value of the GEM_NO_SCAN_PINS define" "0,1" textline " " bitfld.long 0x00 15.--19. " USER_IN_WIDTH ,Takes the value of the GEM_USER_IN_WIDTH define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 10.--14. " USER_OUT_WIDTH ,Takes the value of the GEM_USER_OUT_WIDTH define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 9. " USER_IO ,Takes the value of the GEM_USER_IO define" "0,1" textline " " bitfld.long 0x00 8. " APB_REV2 ,Takes the value of the GEM_APB_REV2 define" "0,1" bitfld.long 0x00 7. " APB_REV1 ,Takes the value of the GEM_APB_REV1 define" "0,1" bitfld.long 0x00 6. " EXT_FIFO_INTERFACE ,Takes the value of the GEM_EXT_FIFO_INTERFACE define" "0,1" textline " " bitfld.long 0x00 5. " NO_INT_LOOPBACK ,Takes the value of the GEM_NO_INT_LOOPBACK define" "0,1" bitfld.long 0x00 4. " INT_LOOPBACK ,Takes the value of the GEM_INT_LOOPBACK define" "0,1" bitfld.long 0x00 3. " TDC_50 ,Takes the value of the TDC_50 define" "0,1" textline " " bitfld.long 0x00 2. " RDC_50 ,Takes the value of the RDC_50 define" "0,1" bitfld.long 0x00 1. " SERDES ,Takes the value of the GEM_SERDES define" "0,1" bitfld.long 0x00 0. " NO_PCS ,Takes the value of the GEM_NO_PCS define" "0,1" line.long 0x04 "DESIGNCFG_DEBUG2,Design Configuration Register 2" bitfld.long 0x04 31. " SPRAM ,Takes the value of the GEM_SPRAM define" "0,1" bitfld.long 0x04 30. " AXI ,Takes the value of the GEM_AXI define" "0,1" bitfld.long 0x04 26.--29. " TX_PBUF_ADDR ,Takes the value of the GEM_TX_PBUF_ADDR define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 22.--25. " RX_PBUF_ADDR ,Takes the value of the GEM_RX_PBUF_ADDR define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 21. " TX_PKT_BUFFER ,Takes the value of the GEM_TX_PKT_BUFFER define" "0,1" bitfld.long 0x04 20. " RX_PKT_BUFFER ,Takes the value of the GEM_RX_PKT_BUFFER define" "0,1" textline " " bitfld.long 0x04 16.--19. " HPROT_VALUE ,Takes the value of the GEM_HPROT_VALUE define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x04 0.--15. 1. " JUMBO_MAX_LENGTH ,Takes the value of the gem_jumbo_max_length define" line.long 0x08 "DESIGNCFG_DEBUG3,Design Configuration Register 3" bitfld.long 0x08 24.--29. " NUM_SPEC_ADD_FILTERS ,Takes the value of the NUM_SPEC_ADD_FILTERS define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" rgroup.long 0x290++0x17 line.long 0x00 "DESIGNCFG_DEBUG5,Design Configuration Register 5" bitfld.long 0x00 29.--31. " AXI_PROT_VALUE ,Takes the value of the GEM_AXI_PROT_VALUE define" "0,1,2,3,4,5,6,7" bitfld.long 0x00 28. " TSU_CLK ,Takes the value of the GEM_TSU_CLK define" "0,1" hexmask.long.byte 0x00 20.--27. 1. " RX_BUFFER_LENGTH_DEF ,Takes the value of the GEM_RX_BUFFER_LENGTH_DEF define" textline " " bitfld.long 0x00 19. " TX_PBUF_SIZE_DEF ,Takes the value of the GEM_TX_PBUF_SIZE_DEF define" "0,1" bitfld.long 0x00 17.--18. " RX_PBUF_SIZE_DEF ,Takes the value of the GEM_RX_PBUF_SIZE_DEF define" "0,1,2,3" bitfld.long 0x00 15.--16. " ENDIAN_SWAP_DEF ,Takes the value of the GEM_ENDIAN_SWAP_DEF define" "0,1,2,3" textline " " bitfld.long 0x00 12.--14. " MDC_CLOCK_DIV ,Takes the value of the GEM_MDC_CLOCK_DIV define" "0,1,2,3,4,5,6,7" bitfld.long 0x00 10.--11. " DMA_BUS_WIDTH_DEF ,Takes the value of the GEM_DMA_BUS_WIDTH_DEF define" "0,1,2,3" bitfld.long 0x00 9. " PHY_IDENT ,Takes the value of the GEM_PHY_IDENT define" "0,1" textline " " bitfld.long 0x00 8. " TSU ,Takes the value of the GEM_TSU define" "0,1" bitfld.long 0x00 4.--7. " TX_FIFO_CNT_WIDTH ,Takes the value of the GEM_TX_FIFO_CNT_WIDTH define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " RX_FIFO_CNT_WIDTH ,Takes the value of the GEM_RX_FIFO_CNT_WIDTH define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " line.long 0x04 "DESIGNCFG_DEBUG6,Design Configuration Register 6" bitfld.long 0x04 25. " PBUF_CUTTHRU ,Takes the value of the GEM_PBUF_CUTTHRU define" "0,1" bitfld.long 0x04 24. " PFC_MULTI_QUANTUM ,Takes the value of the GEM_PFC_MULTI_QUANTUM define" "0,1" bitfld.long 0x04 23. " DMA_ADDR_WIDTH_IS_64B ,Takes the value of the GEM_DMA_ADDR_WIDTH_IS_64B define" "0,1" textline " " bitfld.long 0x04 22. " HOST_IF_SOFT_SELECT ,Takes the value of the GEM_HOST_IF_SOFT_SELECT define" "0,1" bitfld.long 0x04 21. " TX_ADD_FIFO_IF ,Takes the value of the GEM_TX_ADD_FIFO_IF define" "0,1" bitfld.long 0x04 20. " EXT_TSU_TIMER ,Takes the value of the GEM_EXT_TSU_TIMER define" "0,1" textline " " bitfld.long 0x04 16.--19. " TX_PBUF_QUEUE_SEGMENT_SIZE ,Takes the value of the GEM_TX_PBUF_QUEUE_SEGMENT_SIZE define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 15. " DMA_PRIORITY_QUEUE[15] ,Takes the value of the DMA_PRIORITY_QUEUE15 define" "0,1" bitfld.long 0x04 14. " [14] ,Takes the value of the DMA_PRIORITY_QUEUE14 define" "0,1" bitfld.long 0x04 13. " [13] ,Takes the value of the DMA_PRIORITY_QUEUE13 define" "0,1" textline " " bitfld.long 0x04 12. " [12] ,Takes the value of the DMA_PRIORITY_QUEUE12 define" "0,1" bitfld.long 0x04 11. " [11] ,Takes the value of the DMA_PRIORITY_QUEUE11 define" "0,1" bitfld.long 0x04 10. " [10] ,Takes the value of the DMA_PRIORITY_QUEUE10 define" "0,1" textline " " bitfld.long 0x04 9. " [9] ,Takes the value of the DMA_PRIORITY_QUEUE9 define" "0,1" bitfld.long 0x04 8. " [8] ,Takes the value of the DMA_PRIORITY_QUEUE8 define" "0,1" bitfld.long 0x04 7. " [7] ,Takes the value of the DMA_PRIORITY_QUEUE7 define" "0,1" textline " " bitfld.long 0x04 6. " [6] ,Takes the value of the DMA_PRIORITY_QUEUE6 define" "0,1" bitfld.long 0x04 5. " [5] ,Takes the value of the DMA_PRIORITY_QUEUE5 define" "0,1" bitfld.long 0x04 4. " [4] ,Takes the value of the DMA_PRIORITY_QUEUE4 define" "0,1" textline " " bitfld.long 0x04 3. " [3] ,Takes the value of the DMA_PRIORITY_QUEUE3 define" "0,1" bitfld.long 0x04 2. " [2] ,Takes the value of the DMA_PRIORITY_QUEUE2 define" "0,1" bitfld.long 0x04 1. " [1] ,Takes the value of the DMA_PRIORITY_QUEUE1 define" "0,1" line.long 0x08 "DESIGNCFG_DEBUG7,Design Configuration Register 7" bitfld.long 0x08 28.--31. " TX_PBUF_NUM_SEGMENTS_Q[7] ,Takes the value of the GEM_TX_PBUF_NUM_SEGMENTS_QUEUE7 define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 24.--27. " [6] ,Takes the value of the GEM_TX_PBUF_NUM_SEGMENTS_QUEUE6 define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 20.--23. " [5] ,Takes the value of the GEM_TX_PBUF_NUM_SEGMENTS_QUEUE5 define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x08 16.--19. " [4] ,Takes the value of the GEM_TX_PBUF_NUM_SEGMENTS_QUEUE4 define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 12.--15. " [3] ,Takes the value of the GEM_TX_PBUF_NUM_SEGMENTS_QUEUE3 define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 8.--11. " [2] ,Takes the value of the GEM_TX_PBUF_NUM_SEGMENTS_QUEUE2 define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x08 4.--7. " [1] ,Takes the value of the GEM_TX_PBUF_NUM_SEGMENTS_Q1 define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--3. " [0] ,Takes the value of the GEM_TX_PBUF_NUM_SEGMENTS_Q0 define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x0C "DESIGNCFG_DEBUG8,Design Configuration Register 8" hexmask.long.byte 0x0C 24.--31. 1. " NUM_TYPE1_SCREENERS ,Takes the value of the NUM_TYPE1_SCREENERS define" hexmask.long.byte 0x0C 16.--23. 1. " NUM_TYPE2_SCREENERS ,Takes the value of the NUM_TYPE2_SCREENERS define" textline " " hexmask.long.byte 0x0C 8.--15. 1. " NUM_SCR2_ETHTYPE_REGS ,Takes the value of the NUM_SCR2_ETHTYPE_REGS define" hexmask.long.byte 0x0C 0.--7. 1. " NUM_SCR2_COMPARE_REGS ,Takes the value of the NUM_SCR2_COMPARE_REGS define" line.long 0x10 "DESIGNCFG_DEBUG9,Design Configuration Register 9" bitfld.long 0x10 28.--31. " TX_PBUF_NUM_SEGMENTS_Q[15] ,Takes the value of the GEM_TX_PBUF_NUM_SEGMENTS_Q15 define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 24.--27. " [14] ,Takes the value of the GEM_TX_PBUF_NUM_SEGMENTS_Q14 define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 20.--23. " [13] ,Takes the value of the GEM_TX_PBUF_NUM_SEGMENTS_Q13 define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x10 16.--19. " [12] ,Takes the value of the GEM_TX_PBUF_NUM_SEGMENTS_Q12 define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 12.--15. " [11] ,Takes the value of the GEM_TX_PBUF_NUM_SEGMENTS_Q11 define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 8.--11. " [10] ,Takes the value of the GEM_TX_PBUF_NUM_SEGMENTS_Q10 define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x10 4.--7. " [9] ,Takes the value of the GEM_TX_PBUF_NUM_SEGMENTS_Q9 define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 0.--3. " [8] ,Takes the value of the GEM_TX_PBUF_NUM_SEGMENTS_Q8 define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " line.long 0x14 "DESIGNCFG_DEBUG10,Design Configuration Register 10" bitfld.long 0x14 28.--31. " EMAC_BUS_WIDTH ,Takes the value of the GEM_EMAC_BUS_WIDTH define" ",32bits,64bits,,128bits,?..." bitfld.long 0x14 24.--27. " TX_PBUF_DATA ,Takes the value of the GEM_TX_PBUF_DATA define" ",32bits,64bits,,128bits,?..." textline " " bitfld.long 0x14 20.--23. " RX_PBUF_DATA ,Takes the value of the GEM_RX_PBUF_DATA define" ",32bits,64bits,,128bits,?..." bitfld.long 0x14 16.--19. " AXI_ACCESS_PIPELINE_BITS ,Takes the value of the GEM_AXI_ACCESS_PIPELINE_BITS define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x14 12.--15. " AXI_TX_DESCR_RD_BUFF_BITS ,Takes the value of the GEM_AXI_TX_DESCR_RD_BUFF_BITS define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x14 8.--11. " AXI_RX_DESCR_RD_BUFF_BITS ,Takes the value of the GEM_AXI_RX_DESCR_RD_BUFF_BITS define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x14 4.--7. " AXI_TX_DESCR_WR_BUFF_BITS ,Takes the value of the GEM_AXI_TX_DESCR_WR_BUFF_BITS define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x14 0.--3. " AXI_RX_DESCR_WR_BUFF_BITS ,Takes the value of the GEM_AXI_RX_DESCR_WR_BUFF_BITS define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x400++0x03 line.long 0x00 "INT_Q1_STATUS,Priority Queue Interrupt Status Register" bitfld.long 0x00 11. " RESP_NOT_OK ,BRESP/HRESP not OK" "No occurred,Occurred" bitfld.long 0x00 10. " RO ,Receive overrun" "No occurred,Occurred" textline " " bitfld.long 0x00 7. " TC ,Transmit complete" "No occurred,Occurred" bitfld.long 0x00 6. " AMBA_ERROR ,Transmit frame corruption due to AMBA (Ahb/axi) error" "No occurred,Occurred" textline " " bitfld.long 0x00 5. " RLEORLC ,Retry limit exceeded or late collision" "No occurred,Occurred" bitfld.long 0x00 2. " RX_USED_READ ,RX used bit read" "No occurred,Occurred" textline " " bitfld.long 0x00 1. " RC ,Receive complete" "No occurred,Occurred" group.long 0x440++0x03 line.long 0x00 "TRANSMIT_Q1_PTR,Transmit Buffer Queue Base Address Register" hexmask.long 0x00 2.--31. 0x04 " DMA_TX_Q_PTR ,Transmit buffer queue base address" group.long 0x480++0x03 line.long 0x00 "RECEIVE_Q1_PTR,Receive Buffer Queue Base Address Register" hexmask.long 0x00 2.--31. 0x04 " DMA_RX_Q_PTR ,Receive buffer queue base address" group.long 0x4A0++0x03 line.long 0x00 "DMA_RXBUF_SIZE_Q1,Receive Buffer Queue Size" hexmask.long.byte 0x00 0.--7. 1. " DMA_RX_Q_BUF_SIZE ,DMA receive buffer size in system memory" group.long 0x4BC++0x1B line.long 0x00 "CBS_CONTROL,Enable credit-based Shaping Register" bitfld.long 0x00 1. " CBS_ENABLE_QUEUE_B ,Enable Credit-Based shaping on the 2nd highest priority queue (Queue B)" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " CBS_ENABLE_QUEUE_A ,Enable Credit-Based shaping on the highest priority queue (Queue A)" "Disabled,Enabled" line.long 0x04 "CBS_IDLESLOPE_Q_A,Idle/slope Value For Queue A In Bytes/sec Register" line.long 0x08 "CBS_IDLESLOPE_Q_B,Idle/slope Value For Queue B In Bytes/sec Register" line.long 0x0C "UPPER_TX_Q_BASE_ADDR,Upper 32 Bits Of Transmit Buffer Descriptor Queue Base Address" line.long 0x10 "TX_BD_CONTROL,TX BD Control Register" bitfld.long 0x10 4.--5. " TX_BD_TS_MODE ,TX descriptor timestamp insertion mode" "Disabled,PTP event frames only,All PTP frames only,All frames" line.long 0x14 "RX_BD_CONTROL,RX BD Control Register" bitfld.long 0x14 4.--5. " RX_BD_TS_MODE ,RX descriptor timestamp insertion mode" "Disabled,PTP event frames only,All PTP frames only,All frames" line.long 0x18 "UPPER_RX_Q_BASE_ADDR,Upper 32 Bits Of Receive Buffer Descriptor Queue Base Address Register" textline " " group.long 0x500++0x0F line.long 0x00 "SCREENING_TYPE_1_REG_0,Screening Type 1 Register 0" bitfld.long 0x00 29. " UPME ,UDP port match enable" "Disabled,Enabled" bitfld.long 0x00 28. " DETC_EN ,DS/TC enable" "Disabled,Enabled" hexmask.long.word 0x00 12.--27. 1. " UDP_PM ,UDP port match" textline " " hexmask.long.byte 0x00 4.--11. 1. " DSTC_MATCH ,DS/TC match" bitfld.long 0x00 0.--3. " QN ,Queue number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "SCREENING_TYPE_1_REG_1,Screening Type 1 Register 1" bitfld.long 0x04 29. " UPME ,UDP port match enable" "Disabled,Enabled" bitfld.long 0x04 28. " DETC_EN ,DS/TC enable" "Disabled,Enabled" hexmask.long.word 0x04 12.--27. 1. " UDP_PM ,UDP port match" textline " " hexmask.long.byte 0x04 4.--11. 1. " DSTC_MATCH ,DS/TC match" bitfld.long 0x04 0.--3. " QN ,Queue number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "SCREENING_TYPE_1_REG_2,Screening Type 1 Register 2" bitfld.long 0x08 29. " UPME ,UDP port match enable" "Disabled,Enabled" bitfld.long 0x08 28. " DETC_EN ,DS/TC enable" "Disabled,Enabled" hexmask.long.word 0x08 12.--27. 1. " UDP_PM ,UDP port match" textline " " hexmask.long.byte 0x08 4.--11. 1. " DSTC_MATCH ,DS/TC match" bitfld.long 0x08 0.--3. " QN ,Queue number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x0C "SCREENING_TYPE_1_REG_3,Screening Type 1 Register 3" bitfld.long 0x0C 29. " UPME ,UDP port match enable" "Disabled,Enabled" bitfld.long 0x0C 28. " DETC_EN ,DS/TC enable" "Disabled,Enabled" hexmask.long.word 0x0C 12.--27. 1. " UDP_PM ,UDP port match" textline " " hexmask.long.byte 0x0C 4.--11. 1. " DSTC_MATCH ,DS/TC match" bitfld.long 0x0C 0.--3. " QN ,Queue number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x540++0x0F line.long 0x00 "SCREENING_TYPE_2_REG_0,Screening Type 2 Register 0" bitfld.long 0x00 30. " COMPARE_C_EN ,Compare C enable" "Disabled,Enabled" bitfld.long 0x00 25.--29. " COMPARE_C ,Compare C - index to screener type 2 compare register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 24. " COMPARE_B_EN ,Compare B enable" "Disabled,Enabled" textline " " bitfld.long 0x00 19.--23. " COMPARE_B ,Compare B - index to screener type 2 compare register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 18. " COMPARE_A_EN ,Compare A enable" "Disabled,Enabled" bitfld.long 0x00 13.--17. " COMPARE_A ,Compare A - index to screener type 2 compare register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 12. " ETHERTYPE_EN ,Ethertype enable" "Disabled,Enabled" bitfld.long 0x00 9.--11. " INDEX ,Index to screener type 2 ethertype register" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8. " VLAN_EN ,VLAN enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4.--6. " VLAN_PRIORITY ,VLAN priority" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. " QUEUE_NUMBER ,Queue number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "SCREENING_TYPE_2_REG_1,Screening Type 2 Register 1" bitfld.long 0x04 30. " COMPARE_C_EN ,Compare C enable" "Disabled,Enabled" bitfld.long 0x04 25.--29. " COMPARE_C ,Compare C - index to screener type 2 compare register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 24. " COMPARE_B_EN ,Compare B enable" "Disabled,Enabled" textline " " bitfld.long 0x04 19.--23. " COMPARE_B ,Compare B - index to screener type 2 compare register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 18. " COMPARE_A_EN ,Compare A enable" "Disabled,Enabled" bitfld.long 0x04 13.--17. " COMPARE_A ,Compare A - index to screener type 2 compare register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x04 12. " ETHERTYPE_EN ,Ethertype enable" "Disabled,Enabled" bitfld.long 0x04 9.--11. " INDEX ,Index to screener type 2 ethertype register" "0,1,2,3,4,5,6,7" bitfld.long 0x04 8. " VLAN_EN ,VLAN enable" "Disabled,Enabled" textline " " bitfld.long 0x04 4.--6. " VLAN_PRIORITY ,VLAN priority" "0,1,2,3,4,5,6,7" bitfld.long 0x04 0.--3. " QUEUE_NUMBER ,Queue number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "SCREENING_TYPE_2_REG_2,Screening Type 2 Register 2" bitfld.long 0x08 30. " COMPARE_C_EN ,Compare C enable" "Disabled,Enabled" bitfld.long 0x08 25.--29. " COMPARE_C ,Compare C - index to screener type 2 compare register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x08 24. " COMPARE_B_EN ,Compare B enable" "Disabled,Enabled" textline " " bitfld.long 0x08 19.--23. " COMPARE_B ,Compare B - index to screener type 2 compare register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x08 18. " COMPARE_A_EN ,Compare A enable" "Disabled,Enabled" bitfld.long 0x08 13.--17. " COMPARE_A ,Compare A - index to screener type 2 compare register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x08 12. " ETHERTYPE_EN ,Ethertype enable" "Disabled,Enabled" bitfld.long 0x08 9.--11. " INDEX ,Index to screener type 2 ethertype register" "0,1,2,3,4,5,6,7" bitfld.long 0x08 8. " VLAN_EN ,VLAN enable" "Disabled,Enabled" textline " " bitfld.long 0x08 4.--6. " VLAN_PRIORITY ,VLAN priority" "0,1,2,3,4,5,6,7" bitfld.long 0x08 0.--3. " QUEUE_NUMBER ,Queue number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x0C "SCREENING_TYPE_2_REG_3,Screening Type 2 Register 3" bitfld.long 0x0C 30. " COMPARE_C_EN ,Compare C enable" "Disabled,Enabled" bitfld.long 0x0C 25.--29. " COMPARE_C ,Compare C - index to screener type 2 compare register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0C 24. " COMPARE_B_EN ,Compare B enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 19.--23. " COMPARE_B ,Compare B - index to screener type 2 compare register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0C 18. " COMPARE_A_EN ,Compare A enable" "Disabled,Enabled" bitfld.long 0x0C 13.--17. " COMPARE_A ,Compare A - index to screener type 2 compare register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x0C 12. " ETHERTYPE_EN ,Ethertype enable" "Disabled,Enabled" bitfld.long 0x0C 9.--11. " INDEX ,Index to screener type 2 ethertype register" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 8. " VLAN_EN ,VLAN enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 4.--6. " VLAN_PRIORITY ,VLAN priority" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 0.--3. " QUEUE_NUMBER ,Queue number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x640++0x03 line.long 0x00 "INT_Q1_MASK,Interrupt Mask Register" setclrfld.long 0x00 11. -0x20 11. -0x40 11. " MASKRNOI ,BRESP/HRESP not OK mask" "Not masked,Masked" setclrfld.long 0x00 10. -0x20 10. -0x40 10. " MASKROI ,Receive overrun mask" "Not masked,Masked" setclrfld.long 0x00 7. -0x20 7. -0x40 7. " MASKTCI ,Transmit complete mask" "Not masked,Masked" textline " " setclrfld.long 0x00 6. -0x20 6. -0x40 6. " MASKTFCDTAEI ,Transmit frame corruption due to AMBA (Ahb/axi) error mask" "Not masked,Masked" setclrfld.long 0x00 5. -0x20 5. -0x40 5. " MASKRLEOLCI ,Retry limit exceeded or late collision mask" "Not masked,Masked" setclrfld.long 0x00 2. -0x20 2. -0x40 2. " MASKRXUBRI ,RX used bit read mask" "Not masked,Masked" textline " " setclrfld.long 0x00 1. -0x20 1. -0x40 1. " MASKRCI ,Receive complete mask" "Not masked,Masked" group.long 0x6E0++0x0F line.long 0x00 "ST2ETREG0,Screening Type 2 Ethernet Type Register 0" hexmask.long.word 0x00 0.--15. 1. " COMPARE_VALUE ,Ethertype compare value" line.long 0x04 "ST2ETREG1,Screening Type 2 Ethernet Type Register 1" hexmask.long.word 0x04 0.--15. 1. " COMPARE_VALUE ,Ethertype compare value" line.long 0x08 "ST2ETREG2,Screening Type 2 Ethernet Type Register 2" hexmask.long.word 0x08 0.--15. 1. " COMPARE_VALUE ,Ethertype compare value" line.long 0x0C "ST2ETREG3,Screening Type 2 Ethernet Type Register 3" hexmask.long.word 0x0C 0.--15. 1. " COMPARE_VALUE ,Ethertype compare value" group.long 0x700++0x1F line.long 0x00 "TYPE2_COMPARE_0_WORD_0,Type2 Compare Word 0 Register" hexmask.long.word 0x00 16.--31. 1. " COMPARE_VALUE ,2 byte compare value" hexmask.long.word 0x00 0.--15. 1. " MASK_VALUE ,2 byte mask value" line.long 0x04 "TYPE2_COMPARE_0_WORD_1,Type2 Compare Word 1 Register" bitfld.long 0x04 7.--8. " COMPARE_OFFSET ,Compare byte offset" "Beginning,After ether type,End of IP header,End of TCP/UDP header" hexmask.long.byte 0x04 0.--6. 1. " OFFSET_VALUE ,Offset value in bytes" line.long 0x08 "TYPE2_COMPARE_1_WORD_0,Type2 Compare Word 0 Register" hexmask.long.word 0x08 16.--31. 1. " COMPARE_VALUE ,2 byte compare value" hexmask.long.word 0x08 0.--15. 1. " MASK_VALUE ,2 byte mask value" line.long 0x0C "TYPE2_COMPARE_1_WORD_1,Type2 Compare Word 1 Register" bitfld.long 0x0C 7.--8. " COMPARE_OFFSET ,Compare byte offset" "Beginning,After ether type,End of IP header,End of TCP/UDP header" hexmask.long.byte 0x0C 0.--6. 1. " OFFSET_VALUE ,Offset value in bytes" line.long 0x10 "TYPE2_COMPARE_2_WORD_0,Type2 Compare Word 0 Register" hexmask.long.word 0x10 16.--31. 1. " COMPARE_VALUE ,2 byte compare value" hexmask.long.word 0x10 0.--15. 1. " MASK_VALUE ,2 byte mask value" line.long 0x14 "TYPE2_COMPARE_2_WORD_1,Type2 Compare Word 1 Register" bitfld.long 0x14 7.--8. " COMPARE_OFFSET ,Compare byte offset" "Beginning,After ether type,End of IP header,End of TCP/UDP header" hexmask.long.byte 0x14 0.--6. 1. " OFFSET_VALUE ,Offset value in bytes" line.long 0x18 "TYPE2_COMPARE_3_WORD_0,Type2 Compare Word 0 Register" hexmask.long.word 0x18 16.--31. 1. " COMPARE_VALUE ,2 byte compare value" hexmask.long.word 0x18 0.--15. 1. " MASK_VALUE ,2 byte mask value" line.long 0x1C "TYPE2_COMPARE_3_WORD_1,Type2 Compare Word 1 Register" bitfld.long 0x1C 7.--8. " COMPARE_OFFSET ,Compare byte offset" "Beginning,After ether type,End of IP header,End of TCP/UDP header" hexmask.long.byte 0x1C 0.--6. 1. " OFFSET_VALUE ,Offset value in bytes" width 0x0B tree.end tree "GEM1" base ad:0xFF0C0000 width 26. group.long 0x00++0x07 line.long 0x00 "NETWORK_CONTROL,General MAC Control Functions For Both Receiver And Transmitter Register" bitfld.long 0x00 24. " OSSM ,1588 one step sync mode" "Disabled,Enabled" bitfld.long 0x00 23. " ETPE ,External TSU timer port enable" "Disabled,Enabled" bitfld.long 0x00 22. " SUO ,Store UDP/TCP offset to memory" "Normal,UDP/TCP" textline " " bitfld.long 0x00 21. " ASM ,Alternative SGMII mode" "Disabled,Enabled" bitfld.long 0x00 20. " PUE ,Enable detection of unicast PTP" "Disabled,Enabled" bitfld.long 0x00 19. " TLE ,Enable LPI transmission when set LPI (Low power idle) is immediately transmitted" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " FRPP ,Flush the next packet from the external RX DPRAM" "No effect,Flushed" bitfld.long 0x00 17. " TPPBPF ,Write a one to transmit PFC priority based pause frame" "Disabled,Transmitted" bitfld.long 0x00 16. " PFC_EN ,Enable PFC priority based pause reception capabilities" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " SRT ,Store receive time stamp to memory" "Normal,Replaced" bitfld.long 0x00 12. " TPFZ ,Transmit zero quantum pause frame" "No effect,Transmitted" bitfld.long 0x00 11. " TPFR ,Transmit pause frame" "No effect,Transmitted" textline " " bitfld.long 0x00 10. " TXP ,Transmit halt" "Not halted,Halted" bitfld.long 0x00 9. " TSP ,Start transmission" "No effect,Start" bitfld.long 0x00 8. " BP ,Back pressure" "Not forced,Forced" textline " " bitfld.long 0x00 7. " SWE ,Write enable for statistic registers" "Disabled,Enabled" bitfld.long 0x00 6. " IASR ,Incremental statistics registers" "Not incremented,Incremented" bitfld.long 0x00 5. " CASR ,Clear statistics registers" "No effect,Clear" textline " " bitfld.long 0x00 4. " MANPEN ,Management port enable" "Disabled,Enabled" bitfld.long 0x00 3. " EN_TRANSMIT ,Transmit enable" "Disabled,Enabled" bitfld.long 0x00 2. " EN_RECEIVE ,Receive enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " LOOPBACK_LOCAL ,Loopback local" "Not asserted,Asserted" bitfld.long 0x00 0. " LOOPBACK ,Controls the loopback output pin" "Low,High" line.long 0x04 "NETWORK_CONFIG,Network Configuration Register" bitfld.long 0x04 31. " UDE ,Uni direction enable" "Disabled,Enabled" bitfld.long 0x04 30. " IIRE ,Ignore IPG RX_ER" "Not ignored,Ignored" bitfld.long 0x04 29. " NSP_CHANGE ,Receive bad preamble" "Rejected,Not rejected" textline " " bitfld.long 0x04 28. " ISE ,IPG stretch enable" "Disabled,Enabled" bitfld.long 0x04 27. " SME ,SGMII mode enable" "Disabled,Enabled" bitfld.long 0x04 26. " IRF ,Ignore RX FCS" "Rejected,Not rejected" textline " " bitfld.long 0x04 25. " EHDRX ,Enable frames to by received in half-duplex mode" "Disabled,Enabled" bitfld.long 0x04 24. " RCOE ,Receive checksum offload enable" "Disabled,Enabled" bitfld.long 0x04 23. " DISCOPF ,Disable copy of pause frames" "No,Yes" textline " " bitfld.long 0x04 21.--22. " DBW ,Data bus width" "32 bits,64 bits,?..." bitfld.long 0x04 18.--20. " MCD ,MDC clock division" "/8,/16,/32,/48,/64,/96,/128,/224" bitfld.long 0x04 17. " FCSREM ,FCS remove" "Without last 4 bytes,With 4 bytes" textline " " bitfld.long 0x04 16. " LFEFD ,Length field error frame discard" "Disabled,Enabled" bitfld.long 0x04 14.--15. " RBO ,Receive buffer offset" "0,1,2,3" bitfld.long 0x04 13. " PAUSE_EN ,Pause enable" "Not paused,Paused" textline " " bitfld.long 0x04 12. " RETRY_TEST ,Retry test" "Disabled,Enabled" bitfld.long 0x04 11. " PSC_SELECT ,PCS select" "GMII/MII,TBI" bitfld.long 0x04 10. " GMODEEN ,Gigabit mode enable" "10/100mbps,1000 mbps" textline " " bitfld.long 0x04 9. " EAME ,External address match enable" "Disabled,Enabled" bitfld.long 0x04 8. " R1536BF ,Receive 1536 byte frames" "Disabled,Enabled" bitfld.long 0x04 7. " UHE ,Unicast hash enable" "Disabled,Enabled" textline " " bitfld.long 0x04 6. " MHE ,Multicast hash enable" "Disabled,Enabled" bitfld.long 0x04 5. " NO_BRODCAST ,No broadcast" "Accepted,Not accepted" bitfld.long 0x04 4. " CPY_ALL_FRAMES ,Copy all frames" "Not accepted,Accepted" textline " " bitfld.long 0x04 3. " JUMBO_FRAMES ,Jumbo frames" "Disabled,Enabled" bitfld.long 0x04 2. " DIS_NONVLANFRM ,Discard non-VLAN frames" "Not discarded,Discarded" textline " " bitfld.long 0x04 1. " FULL_DUPLEX ,Full duplex" "Not ignored,Ignored" bitfld.long 0x04 0. " SPEED ,Port speed" "10mbps,100mbps" rgroup.long 0x08++0x03 line.long 0x00 "NETWORK_STATUS,Status Information With Respect To The PHY Management Interface Register" bitfld.long 0x00 7. " LPIINDIPCLK ,LPI indication" "Not detected,Detected" bitfld.long 0x00 6. " PFCNEGPCLK ,PFC priority based pause has been negotiated" "Not occurred,Occurred" bitfld.long 0x00 5. " MACPAUSETXEN ,PCS auto-negotiation pause transmit resolution" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " MACPAUSERXEN ,PCS auto-negotiation pause receive resolution" "Disabled,Enabled" bitfld.long 0x00 3. " MACFULLDUPLEX ,PCS auto-negotiation duplex resolution" "Depends on LINKSTATE,Full duplex" bitfld.long 0x00 2. " MAN_DONE ,The PHY management logic is idle" "Not idle,Idle" textline " " bitfld.long 0x00 1. " MDIO_IN ,Status of the MDIO_IN pin" "Low,High" bitfld.long 0x00 0. " PCS_LINK_STATE ,Status of PCS link state" "Low,High" if (((d.l(ad:0xFF0C0000+0x40))&0x80000000)==0x80000000) group.long 0x10++0x03 line.long 0x00 "DMA_CONFIG,DMA Configuration Register" bitfld.long 0x00 30. " DMAABW1 ,DMA address bus width" "32b,64b" bitfld.long 0x00 29. " TXDBEXTMODEEN ,Enable TX extended BD mode" "Disabled,Enabled" bitfld.long 0x00 28. " RXDBEXTMODEEN ,Enable RX extended BD mode" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " FORCEMAXABTX ,Force max length bursts on TX" "Not forced,Forced" bitfld.long 0x00 25. " FORCEMAXABRX ,Force max length bursts on RX" "Not forced,Forced" bitfld.long 0x00 24. " FORCEDISENERR ,Auto discard RX pkts during lack of resource" "Not discarded,Discarded" textline " " hexmask.long.byte 0x00 16.--23. 1. " RX_BUF_SIZE ,DMA receive buffer size in external AMBA (Ahb/axi) system memory" bitfld.long 0x00 10. " TX_PBUF_SIZE ,Transmitter packet buffer memory size select" "2kb,4kb" textline " " bitfld.long 0x00 8.--9. " RX_PBUF_SIZE ,Receiver packet buffer memory size select" "1kb,2kb,4kb,8kb" bitfld.long 0x00 7. " ENDIANSWPPACKET ,Endian swap mode enable for packet data accesses" "Not swapped,Swapped" bitfld.long 0x00 6. " ENDIANSWAPMAN ,Endian swap mode enable for management descriptor accesses" "Not swapped,Swapped" textline " " bitfld.long 0x00 0.--4. " AMBABURSTLENGTH ,Selects the burst length to attempt to use on the AMBA" "Auto,1,1,1,4,4,4,4,8,8,8,8,8,8,8,8,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16" else group.long 0x10++0x03 line.long 0x00 "DMA_CONFIG,DMA Configuration Register" bitfld.long 0x00 30. " DMAABW1 ,DMA address bus width" "32b,64b" bitfld.long 0x00 29. " TXDBEXTMODEEN ,Enable TX extended BD mode" "Disabled,Enabled" bitfld.long 0x00 28. " RXDBEXTMODEEN ,Enable RX extended BD mode" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " FORCEMAXABTX ,Force max length bursts on TX" "Not forced,Forced" bitfld.long 0x00 25. " FORCEMAXABRX ,Force max length bursts on RX" "Not forced,Forced" bitfld.long 0x00 24. " FORCEDISENERR ,Auto discard RX packets during lack of resource" "Not discarded,Discarded" textline " " hexmask.long.byte 0x00 16.--23. 1. " RX_BUF_SIZE ,DMA receive buffer size in external AMBA (Ahb/axi) system memory" bitfld.long 0x00 11. " TX_PBUF_TCP_EN ,TCP and UDP checksum generation offload enable" "Disabled,Enabled" bitfld.long 0x00 10. " TX_PBUF_SIZE ,Transmitter packet buffer memory size select" "2kb,4kb" textline " " bitfld.long 0x00 8.--9. " RX_PBUF_SIZE ,Receiver packet buffer memory size select" "1kb,2kb,4kb,8kb" bitfld.long 0x00 7. " ENDIANSWPPACKET ,Endian swap mode enable for packet data accesses" "Not swapped,Swapped" bitfld.long 0x00 6. " ENDIANSWAPMAN ,Endian swap mode enable for management descriptor accesses" "Not swapped,Swapped" textline " " bitfld.long 0x00 0.--4. " AMBABURSTLENGTH ,Selects the burst length to attempt to use on the AMBA" "Auto,1,1,1,4,4,4,4,8,8,8,8,8,8,8,8,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16" endif group.long 0x14++0x0F line.long 0x00 "TRANSMIT_STATUS,Details Of The Status Of A Transmit Register" eventfld.long 0x00 8. " RESP_NOT_OK ,BRESP/HRESP not OK" "Ok,Not ok" eventfld.long 0x00 7. " LATECOLOCC ,Late collision occurred" "Not occurred,Occurred" eventfld.long 0x00 6. " TRANSMITUR ,Transmit under run" "Not occurred,Occurred" textline " " eventfld.long 0x00 5. " TRNCOMPLETE ,Transmit complete" "Not completed,Completed" eventfld.long 0x00 4. " AMBA_ERROR ,Transmit frame corruption due to AMBA (Ahb/axi) errors" "Not occurred,Occurred" eventfld.long 0x00 3. " TRANSMIT_GO ,Transmit go" "Not active,Active" textline " " eventfld.long 0x00 2. " RETRYLIMITEX ,Retry limit exceeded" "Not exceed,Exceed" eventfld.long 0x00 1. " COLLISION_OCCURRED ,Collision occurred" "Not occurred,Occurred" eventfld.long 0x00 0. " USED_BIT_READ ,Used bit read" "Not occurred,Occurred" line.long 0x04 "RECEIVE_Q_PTR,Start Address Of The Receive Buffer Queue Register" hexmask.long 0x04 2.--31. 0x04 " DMA_RX_Q_PTR ,Receive buffer queue base address" line.long 0x08 "TRANSMIT_Q_PTR,Start Address Of The Transmit Buffer Queue Register" hexmask.long 0x08 2.--31. 0x04 " DMA_TX_Q_PTR ,Transmit buffer queue base address" line.long 0x0C "RECEIVE_STATUS,Details Of The Status Of A Receive Register" eventfld.long 0x0C 3. " RESP_NOT_OK ,BRESP/HRESP not OK" "Ok,Not ok" eventfld.long 0x0C 2. " RECEIVE_OVERRUN ,Receive overrun" "Not occurred,Occurred" eventfld.long 0x0C 1. " FRAME_RECEIVED ,Frame received" "Not received,Received" textline " " eventfld.long 0x0C 0. " BUFFERNOTAVAIL ,Buffer not available" "No,Yes" textline " " hgroup.long 0x24++0x03 hide.long 0x00 "INT_STATUS,Source Of This Interrupt" textfld " " in textline " " group.long 0x30++0x03 line.long 0x00 "INT_MASK,Interrupt Mask Register" setclrfld.long 0x00 29. -0x04 29. -0x08 29. " MASKTTCI ,Mask TSU timer comparison interrupt" "Not masked,Masked" setclrfld.long 0x00 28. -0x04 28. -0x08 28. " MASKWOLERI ,Mask WOL event received interrupt" "Not masked,Masked" setclrfld.long 0x00 27. -0x04 27. -0x08 27. " MASKRXPLIII ,Mask RX LPI indication interrupt" "Not masked,Masked" textline " " setclrfld.long 0x00 26. -0x04 26. -0x08 26. " MASKTSUSRI ,Mask TSU seconds register increment" "Not masked,Masked" setclrfld.long 0x00 25. -0x04 25. -0x08 25. " MASKPTPPFT ,Mask PTP PDELAY_RESP frame transmitted" "Not masked,Masked" setclrfld.long 0x00 24. -0x04 24. -0x08 24. " MASKPTPPFT ,Mask PTP PDELAY_REQ frame transmitted" "Not masked,Masked" textline " " setclrfld.long 0x00 23. -0x04 23. -0x08 23. " MASKPTPPFR ,Mask PTP PDELAY_RESP frame received" "Not masked,Masked" setclrfld.long 0x00 22. -0x04 22. -0x08 22. " MASKPTPDFR ,Mask PTP PDELAY_REQ frame received" "Not masked,Masked" setclrfld.long 0x00 21. -0x04 21. -0x08 21. " MASKPTPSFT ,Mask PTP sync frame transmitted" "Not masked,Masked" textline " " setclrfld.long 0x00 20. -0x04 20. -0x08 20. " MASKPTPDFT ,Mask PTP DELAY_REQ frame transmitted" "Not masked,Masked" setclrfld.long 0x00 19. -0x04 19. -0x08 19. " MASKPTPSFR ,Mask PTP sync frame received" "Not masked,Masked" setclrfld.long 0x00 18. -0x04 18. -0x08 18. " MASKPTPDFR ,Mask PTP DELAY_REQ frame received" "Not masked,Masked" textline " " setclrfld.long 0x00 17. -0x04 17. -0x08 17. " MASKPCSLPPR ,Mask PCS link partner page received" "Not masked,Masked" setclrfld.long 0x00 16. -0x04 16. -0x08 16. " MASKPCSACI ,Mask PCS auto-negotiation complete interrupt" "Not masked,Masked" setclrfld.long 0x00 15. -0x04 15. -0x08 15. " MASKEI ,Mask external interrupt" "Not masked,Masked" textline " " setclrfld.long 0x00 14. -0x04 14. -0x08 14. " MASKFTI ,Mask pause frame transmitted interrupt" "Not masked,Masked" setclrfld.long 0x00 13. -0x04 13. -0x08 13. " MASKPTZI ,Mask pause time zero interrupt" "Not masked,Masked" setclrfld.long 0x00 12. -0x04 12. -0x08 12. " MASKPFWNPQI ,Mask pause frame with non-zero pause quantum interrupt" "Not masked,Masked" textline " " setclrfld.long 0x00 11. -0x04 11. -0x08 11. " MASKBHNOKI ,Mask BRESP/HRESP not OK interrupt" "Not masked,Masked" setclrfld.long 0x00 10. -0x04 10. -0x08 10. " MASKROI ,Mask receive overrun interrupt" "Not masked,Masked" setclrfld.long 0x00 9. -0x04 9. -0x08 9. " MASKLCI ,Mask link change interrupt" "Not masked,Masked" textline " " setclrfld.long 0x00 7. -0x04 7. -0x08 7. " MASKTCI ,Mask transmit complete interrupt" "Not masked,Masked" setclrfld.long 0x00 6. -0x04 6. -0x08 6. " MASKTFCDTOAMBA ,Mask transmit frame corruption due to AMBA (Ahb/axi) error interrupt" "Not masked,Masked" setclrfld.long 0x00 5. -0x04 5. -0x08 5. " MASKRLEOLCI ,Mask retry limit exceeded or late collision interrupt" "Not masked,Masked" textline " " setclrfld.long 0x00 4. -0x04 4. -0x08 4. " MASKTBURI ,Mask transmit buffer under run interrupt" "Not masked,Masked" setclrfld.long 0x00 3. -0x04 3. -0x08 3. " MASKTUBRI ,Mask transmit used bit read interrupt" "Not masked,Masked" setclrfld.long 0x00 2. -0x04 2. -0x08 2. " MASKRUBRI ,Mask receive used bit read interrupt" "Not masked,Masked" textline " " setclrfld.long 0x00 1. -0x04 1. -0x08 1. " MASKRCI ,Mask receive complete interrupt" "Not masked,Masked" setclrfld.long 0x00 0. -0x04 0. -0x08 0. " MASKMDI ,Mask management done interrupt" "Not masked,Masked" if (((d.l(ad:0xFF0C0000+0x34))&0x40000000)==0x40000000) group.long 0x34++0x03 line.long 0x00 "PHY_MANAGEMENT,PHY Management Register" bitfld.long 0x00 31. " WRITE0 ,Must be written with 0" "0,?..." bitfld.long 0x00 30. " WRITE1 ,Valid clause frame" "45 frame,22 frame" bitfld.long 0x00 28.--29. " OPERATION ,Operation" ",Write,Read,?..." textline " " hexmask.long.byte 0x00 23.--27. 0x80 " PHYADDR ,PHY address" hexmask.long.byte 0x00 18.--22. 0x04 " REGADDR ,Register address" bitfld.long 0x00 16.--17. " WRITE10 ,Must be written with 10" ",,2,?..." textline " " hexmask.long.word 0x00 0.--15. 1. " PHYW/RDATA ,DATA" else group.long 0x34++0x03 line.long 0x00 "PHY_MANAGEMENT,PHY Management Register" bitfld.long 0x00 31. " WRITE0 ,Must be written with 0" "0,?..." bitfld.long 0x00 30. " WRITE1 ,Valid clause frame" "45 frame,22 frame" bitfld.long 0x00 28.--29. " OPERATION ,Operation" "Address,Write,Post read,Read frame" textline " " hexmask.long.byte 0x00 23.--27. 0x80 " PHYADDR ,PHY address" hexmask.long.byte 0x00 18.--22. 0x04 " REGADDR ,Register address" bitfld.long 0x00 16.--17. " WRITE10 ,Must be written with 10" ",,2,?..." textline " " hexmask.long.word 0x00 0.--15. 1. " PHYW/RDATA ,DATA" endif rgroup.long 0x38++0x03 line.long 0x00 "PAUSE_TIME,Received Pause Quantum Register" hexmask.long.word 0x00 0.--15. 1. " QUANTUM ,Received pause quantum" group.long 0x3C++0x03 line.long 0x00 "TX_PAUSE_QUANTUM,Transmit Pause Quantum Register" hexmask.long.word 0x00 0.--15. 1. " QUANTUM ,Transmit pause quantum" textline " " group.long 0x40++0x0F line.long 0x00 "PBUF_TXCUTTHRU,TX Partial Store And Forward Register" bitfld.long 0x00 31. " DMA_TX_CUTTHRU ,Enable TX partial store and forward operation" "Disabled,Enabled" hexmask.long.word 0x00 0.--11. 1. " DMA_TX_CUTTHRU_THRESHOLD ,Watermark value" line.long 0x04 "PBUF_RXCUTTHRU,RX Partial Store And Forward" bitfld.long 0x04 31. " DMA_RX_CUTTHRU ,Enable RX partial store and forward operation" "Disabled,Enabled" hexmask.long.word 0x04 0.--11. 1. " DMA_RX_CUTTHRU_THRESHOLD ,Watermark value" line.long 0x08 "JUMBO_MAX_LENGTH,Maximum Jumbo Frame Size" hexmask.long.word 0x08 0.--15. 1. " JUMBO_MAX_LENGTH ,Maximal jumbo frame size" line.long 0x0C "EXTERNAL_FIFO_INTERFACE,External FIFO Interface Enable" bitfld.long 0x0C 0. " EXTERNAL_FIFO_INTERFACE ,Enable external FIFO interface" "Disabled,Enabled" group.long 0x54++0x03 line.long 0x00 "AXI_MAX_PIPELINE,Maximum Amount Of Outstanding Transactions On The AXI Bus Between AR / R And AW / W Channels Register" hexmask.long.byte 0x00 8.--15. 1. " AW2W_MAX_PIPELINE ,Maximum number of outstanding AXI write requests that can be issued by the DMA via the AW channel" hexmask.long.byte 0x00 0.--7. 1. " AR2R_MAX_PIPELINE ,Maximum number of outstanding AXI read requests that can be issued by the DMA via the AR channel" group.long 0x80++0x1F line.long 0x00 "HASH_BOTTOM,The First 32 Bits Of The Hash Address Register" line.long 0x04 "HASH_TOP,The Remaining 32 Bits Of The Hash Address Register" line.long 0x08 "SPEC_ADD1_BOTTOM,Least Significant 32 Bits Of The Destination Address Register" line.long 0x0C "SPEC_ADD1_TOP,Specific Address Top Register" bitfld.long 0x0C 16. " FILTER_TYPE ,Destination address filter/source address filter" "Destination,Source" hexmask.long.word 0x0C 0.--15. 1. " ADDRESS ,The most significant bits of the destination/source address[32-47]" line.long 0x10 "SPEC_ADD2_BOTTOM,Least Significant 32 Bits Of The Destination Address Register" line.long 0x14 "SPEC_ADD2_TOP,Least Significant 32 Bits Of The Destination Address Register" bitfld.long 0x14 29. " FILTER_BYTE_MASK_[5] ,Byte 5 of the specific address compare enable" "Compared,Not compared" bitfld.long 0x14 28. " [4] ,Byte 4 of the specific address compare enable" "Compared,Not compared" bitfld.long 0x14 27. " [3] ,Byte 3 of the specific address compare enable" "Compared,Not compared" textline " " bitfld.long 0x14 26. " [2] ,Byte 2 of the specific address compare enable" "Compared,Not compared" bitfld.long 0x14 25. " [1] ,Byte 1 of the specific address compare enable" "Compared,Not compared" bitfld.long 0x14 24. " [0] ,Byte 0 of the specific address compare enable" "Compared,Not compared" textline " " bitfld.long 0x14 16. " FILTER_TYPE ,Destination address filter/source address filter" "Destination,Source" textline " " hexmask.long.word 0x14 0.--15. 1. " ADDRESS ,Specific address 1[32-47]" line.long 0x18 "SPEC_ADD3_BOTTOM,Address Register" line.long 0x1C "SPEC_ADD3_TOP,Least Significant 32 Bits Of The Destination Address Register" bitfld.long 0x1C 29. " FILTER_BYTE_MASK_[5] ,Byte 5 of the specific address compare enable" "Compared,Not compared" bitfld.long 0x1C 28. " [4] ,Byte 4 of the specific address compare enable" "Compared,Not compared" bitfld.long 0x1C 27. " [3] ,Byte 3 of the specific address compare enable" "Compared,Not compared" textline " " bitfld.long 0x1C 26. " [2] ,Byte 2 of the specific address compare enable" "Compared,Not compared" bitfld.long 0x1C 25. " [1] ,Byte 1 of the specific address compare enable" "Compared,Not compared" bitfld.long 0x1C 24. " [0] ,Byte 0 of the specific address compare enable" "Compared,Not compared" textline " " bitfld.long 0x1C 16. " FILTER_TYPE ,Destination address filter/source address filter" "Destination,Source" textline " " hexmask.long.word 0x1C 0.--15. 1. " ADDRESS ,Specific address 1[32-47]" group.long 0xA0++0x1F line.long 0x00 "SPEC_ADD4_BOTTOM,Specific Address Top Register" line.long 0x04 "SPEC_ADD4_TOP,Least Significant 32 Bits Of The Destination Address Register" bitfld.long 0x04 29. " FILTER_BYTE_MASK_[5] ,Byte 5 of the specific address compare enable" "Compared,Not compared" bitfld.long 0x04 28. " [4] ,Byte 4 of the specific address compare enable" "Compared,Not compared" bitfld.long 0x04 27. " [3] ,Byte 3 of the specific address compare enable" "Compared,Not compared" textline " " bitfld.long 0x04 26. " [2] ,Byte 2 of the specific address compare enable" "Compared,Not compared" bitfld.long 0x04 25. " [1] ,Byte 1 of the specific address compare enable" "Compared,Not compared" bitfld.long 0x04 24. " [0] ,Byte 0 of the specific address compare enable" "Compared,Not compared" textline " " bitfld.long 0x04 16. " FILTER_TYPE ,Destination address filter/source address filter" "Destination,Source" textline " " hexmask.long.word 0x04 0.--15. 1. " ADDRESS ,Specific address 1[32-47]" line.long 0x08 "SPEC_TYPE1,Type ID Match 1 Register" bitfld.long 0x08 31. " ENABLE_COPY ,Enable copying of type ID match 1 matched frames" "Disabled,Enabled" hexmask.long.word 0x08 0.--15. 1. " MATCH ,Type ID match 1" line.long 0x0C "SPEC_TYPE2,Type ID Match 2 Register" bitfld.long 0x0C 31. " ENABLE_COPY ,Enable copying of type ID match 2 matched frames" "Disabled,Enabled" hexmask.long.word 0x0C 0.--15. 1. " MATCH ,Type ID match 2" line.long 0x10 "SPEC_TYPE3,Type ID Match 3 Register" bitfld.long 0x10 31. " ENABLE_COPY ,Enable copying of type ID match 3 matched frames" "Disabled,Enabled" hexmask.long.word 0x10 0.--15. 1. " MATCH ,Type ID match 3" line.long 0x14 "SPEC_TYPE4,Type ID Match 4 Register" bitfld.long 0x14 31. " ENABLE_COPY ,Enable copying of type ID match 4 matched frames" "Disabled,Enabled" hexmask.long.word 0x14 0.--15. 1. " MATCH ,Type ID match 4" line.long 0x18 "WOL_REGISTER,Wake On LAN Register" bitfld.long 0x18 19. " WOL_MASK_3 ,Wake on LAN multicast hash event enable" "Disabled,Enabled" bitfld.long 0x18 18. " WOL_MASK_2 ,Wake on LAN specific address register 1 event enable" "Disabled,Enabled" textline " " bitfld.long 0x18 17. " WOL_MASK_1 ,Wake on LAN ARP request event enable" "Disabled,Enabled" bitfld.long 0x18 16. " WOL_MASK_0 ,Wake on LAN magic packet event enable" "Disabled,Enabled" textline " " hexmask.long.word 0x18 0.--15. 1. " ADDR ,Wake on LAN ARP request IP address" line.long 0x1C "STRETCH_RATIO,IPG Stretch Register" hexmask.long.word 0x1C 0.--15. 1. " IPG_STRETCH ,IPG stretch" group.long 0xC0++0x1F line.long 0x00 "STACKED_VLAN,Stacked VLAN Register" bitfld.long 0x00 31. " ENABLE_PROCESSING ,Enable stacked VLAN processing mode" "Disabled,Enabled" hexmask.long.word 0x00 0.--15. 1. " MATCH ,User defined VLAN_TYPE field" line.long 0x04 "TX_PFC_PAUSE,Transmit PFC Pause Register" hexmask.long.byte 0x04 8.--15. 1. " VECTOR ,Priority vector pause size" hexmask.long.byte 0x04 0.--7. 1. " VECTOR_ENABLE ,Priority vector enable" line.long 0x08 "MASK_ADD1_BOTTOM,Specific Address Mask 1 Bottom Register" line.long 0x0C "MASK_ADD1_TOP,Specific Address Mask 1 Top Register" bitfld.long 0x0C 15. " ADDRESS_MASK[15] ,Priority vector enable" "Disabled,Enabled" bitfld.long 0x0C 14. " [14] ,Priority vector enable" "Disabled,Enabled" bitfld.long 0x0C 13. " [13] ,Priority vector enable" "Disabled,Enabled" bitfld.long 0x0C 12. " [12] ,Priority vector enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 11. " [11] ,Priority vector enable" "Disabled,Enabled" bitfld.long 0x0C 10. " [10] ,Priority vector enable" "Disabled,Enabled" bitfld.long 0x0C 9. " [9] ,Priority vector enable" "Disabled,Enabled" bitfld.long 0x0C 8. " [8] ,Priority vector enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 7. " [7] ,Priority vector enable" "Disabled,Enabled" bitfld.long 0x0C 6. " [6] ,Priority vector enable" "Disabled,Enabled" bitfld.long 0x0C 5. " [5] ,Priority vector enable" "Disabled,Enabled" bitfld.long 0x0C 4. " [4] ,Priority vector enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 3. " [3] ,Priority vector enable" "Disabled,Enabled" bitfld.long 0x0C 2. " [2] ,Priority vector enable" "Disabled,Enabled" bitfld.long 0x0C 1. " [1] ,Priority vector enable" "Disabled,Enabled" bitfld.long 0x0C 0. " [0] ,Priority vector enable" "Disabled,?..." line.long 0x10 "DMA_ADDR_OR_MASK,Receive DMA Data Buffer Address Mask Register" bitfld.long 0x10 28.--31. " MASK_VALUE ,Data buffer address mask value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x10 3. " MASK_ENABLE[3] ,AHB/AXI address bit 31 access force" "Not forced,Forced" bitfld.long 0x10 2. " [2] ,AHB/AXI address bit 30 access force" "Not forced,Forced" bitfld.long 0x10 1. " [1] ,AHB/AXI address bit 29 access force" "Not forced,Forced" bitfld.long 0x10 0. " [0] ,AHB/AXI address bit 28 access force" "Not forced,Forced" line.long 0x14 "RX_PTP_UNICAST,PTP RX Unicast IP Destination Address Register" line.long 0x18 "TX_PTP_UNICAST,PTP TX Unicast IP Destination Address Register" line.long 0x1C "TSU_NSEC_CMP,TSU Timer Comparison Value Nanoseconds Register" hexmask.long.tbyte 0x1C 0.--21. 1. " COMPARISON_VALUE ,TSU timer comparison value" group.long 0xE0++0x07 line.long 0x00 "TSU_SEC_CMP,TSU Timer Comparison Value Seconds Register" line.long 0x04 "TSU_MSB_SEC_CMP,TSU Timer Comparison Value Seconds Register" hexmask.long.word 0x04 0.--15. 1. " COMPARISON_VALUE ,TSU timer comparison value" rgroup.long 0xE8++0x0F line.long 0x00 "TSU_PTP_TX_MSB_SEC,PTP Event Frame Transmitted Seconds Register" hexmask.long.word 0x00 0.--15. 1. " TIMER_SECONDS ,PTP event frame TX seconds" line.long 0x04 "TSU_PTP_RX_MSB_SEC,PTP Event Frame Received Seconds Register" hexmask.long.word 0x04 0.--15. 1. " TIMER_SECONDS ,PTP event frame RX seconds" line.long 0x08 "TSU_PEER_TX_MSB_SEC,PTP Peer Event Frame Transmitted Seconds Register" hexmask.long.word 0x08 0.--15. 1. " TIMER_SECONDS ,PTP peer event frame TX seconds" line.long 0x0C "TSU_PEER_RX_MSB_SEC,PTP Peer Event Frame Received Seconds Register" hexmask.long.word 0x0C 0.--15. 1. " TIMER_SECONDS ,PTP peer event frame RX seconds" group.long 0xF8++0x03 line.long 0x00 "DPRAM_FILL_DBG,The Fill Levels For The TX & RX Packet Buffers Register" hexmask.long.word 0x00 16.--31. 1. " DMA_TX_RX_FILL_LEVEL ,TX or RX packet buffer fill level" bitfld.long 0x00 4.--7. " DMA_TX_Q_FILL_LEVEL_SELECT ,TX queue fill level select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 0. " DMA_TX_RX_FILL_LEVEL_SELECT ,TX/RX fill level select" "0,1" rgroup.long 0xFC++0x03 line.long 0x00 "REVISION_REG,Module Identification Number And Module Revision Register" bitfld.long 0x00 28.--31. " FIX_NUMBER ,Fix number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 16.--27. 1. " MODULE_ID_NUMBER ,Module identification number" hexmask.long.word 0x00 0.--15. 1. " MODULE_REVISION ,Module revision" hgroup.long 0x100++0x03 hide.long 0x00 "OCTETS_TXED_BOTTOM,Transmitted Octets In Frame Without Errors Register" textfld " " in hgroup.long 0x104++0x03 hide.long 0x00 "OCTETS_TXED_TOP,Octets Transmitted Register" textfld " " in textline " " group.long 0x108++0x17 line.long 0x00 "FRAMES_TXED_OK,Frames Transmitted Without Error" line.long 0x04 "BROADCAST_TXED,Broadcast Frames Transmitted Without Error Register" line.long 0x08 "MULTICAST_TXED,Multicast Frames Transmitted Without Error Register" line.long 0x0C "PAUSE_FRAMES_TXED,Pause Frames Transmitted" hexmask.long.word 0x0C 0.--15. 1. " COUNT ,Transmitted pause frames register" line.long 0x10 "FRAMES_TXED_64,64 Byte Frames Transmitted Register" line.long 0x14 "FRAMES_TXED_65,65 To 127 Byte Frames Transmitted Register" group.long 0x120++0x1F line.long 0x00 "FRAMES_TXED_128,128 To 255 Byte Frames Transmitted Register" line.long 0x04 "FRAMES_TXED_256,256 To 511 Byte Frames Transmitted Register" line.long 0x08 "FRAMES_TXED_512,512 To 1023 Byte Frames Transmitted Register" line.long 0x0C "FRAMES_TXED_1024,1024 To 1518 Byte Frames Transmitted Register" line.long 0x10 "FRAMES_TXED_1519,Greater Than 1518 Byte Frames Transmitted Register" line.long 0x14 "TX_UNDERRUNS,Transmit Under Runs Register" hexmask.long.word 0x14 0.--9. 1. " COUNT ,Transmit under runs" line.long 0x18 "SINGLE_COLLISIONS,Single Collision Frames Register" hexmask.long.tbyte 0x18 0.--17. 1. " COUNT ,Single collision frames register" line.long 0x1C "MULTIPLE_COLLISIONS,Multiple Collision Frames" hexmask.long.tbyte 0x1C 0.--17. 1. " COUNT ,Multiple collision frames register" group.long 0x140++0x1F line.long 0x00 "EXCESSIVE_COLLISIONS,Excessive Collisions Register" hexmask.long.word 0x00 0.--9. 1. " COUNT ,Excessive collisions" line.long 0x04 "LATE_COLLISIONS,Late Collisions Register" hexmask.long.word 0x04 0.--9. 1. " COUNT ,Late collisions" line.long 0x08 "DEFERRED_FRAMES,Deferred Transmission Frames Register" hexmask.long.tbyte 0x08 0.--17. 1. " COUNT ,Deferred transmission frames" line.long 0x0C "CRS_ERRORS,Carrier Sense Errors Register" hexmask.long.word 0x0C 0.--9. 1. " COUNT ,Carrier sense errors" line.long 0x10 "OCTETS_RXED_BOTTOM,Octets Received Register" line.long 0x14 "OCTETS_RXED_TOP,Octets Received" hexmask.long.word 0x14 0.--15. 1. " COUNT ,Received octets in frame without errors" line.long 0x18 "FRAMES_RXED_OK,Frames Received Register" line.long 0x1C "BROADCAST_RXED,Broadcast Frames Received Register" group.long 0x160++0x1F line.long 0x00 "MULTICAST_RXED,Multicast Frames Received Register" line.long 0x04 "PAUSE_FRAMES_RXED,Received Pause Frames Register" hexmask.long.word 0x04 0.--15. 1. " COUNT ,Received pause frames" line.long 0x08 "FRAMES_RXED_64,64 Byte Frames Received Register" line.long 0x0C "FRAMES_RXED_65,65 To 127 Byte Frames Received Register" line.long 0x10 "FRAMES_RXED_128,128 To 255 Byte Frames Received Register" line.long 0x14 "FRAMES_RXED_256,256 To 511 Byte Frames Received Register" line.long 0x18 "FRAMES_RXED_512,512 To 1023 Byte Frames Received Register" line.long 0x1C "FRAMES_RXED_1024,1024 To 1518 Byte Frames Received Register" group.long 0x180++0x1F line.long 0x00 "FRAMES_RXED_1519,1519 To Maximum Byte Frames Received Register" line.long 0x04 "UNDERSIZE_FRAMES,Undersized Frames Received Register" hexmask.long.word 0x04 0.--9. 1. " COUNT ,Undersize frames received" line.long 0x08 "EXCESSIVE_RX_LENGTH,Oversize Frames Received Register" hexmask.long.word 0x08 0.--9. 1. " COUNT ,Oversize frames received" line.long 0x0C "RX_JABBERS,Jabbers Received Register" hexmask.long.word 0x0C 0.--9. 1. " COUNT ,Jabbers received" line.long 0x10 "FCS_ERRORS,Frame Check Sequence Errors Register" hexmask.long.word 0x10 0.--9. 1. " COUNT ,Frame check sequence errors" line.long 0x14 "RX_LENGTH_ERRORS,Length Field Frame Errors Register" hexmask.long.word 0x14 0.--9. 1. " COUNT ,Length field frame errors" line.long 0x18 "RX_SYMBOL_ERRORS,Receive Symbol Error Registers" hexmask.long.word 0x18 0.--9. 1. " COUNT ,Receive symbol errors" line.long 0x1C "ALIGNMENT_ERRORS,Alignment Errors Register" hexmask.long.word 0x1C 0.--9. 1. " COUNT ,Alignment errors" group.long 0x1A0++0x17 line.long 0x00 "RX_RESOURCE_ERRORS,Receive Resource Errors Register" hexmask.long.tbyte 0x00 0.--17. 1. " COUNT ,Receive resource errors" line.long 0x04 "RX_OVERRUNS,Receive Overruns Register" hexmask.long.word 0x04 0.--9. 1. " COUNT ,Receive overruns" line.long 0x08 "RX_IP_CK_ERRORS,IP Header Checksum Errors Register" hexmask.long.byte 0x08 0.--7. 1. " COUNT ,IP header checksum errors" line.long 0x0C "RX_TCP_CK_ERRORS,TCP Checksum Errors Register" hexmask.long.byte 0x0C 0.--7. 1. " COUNT ,TCP checksum errors" line.long 0x10 "RX_UDP_CK_ERRORS,UDP Checksum Errors Register" hexmask.long.byte 0x10 0.--7. 1. " COUNT ,UDP checksum errors" line.long 0x14 "AUTO_FLUSHED_PKTS,Receive DMA Flushed Packets Register" hexmask.long.word 0x14 0.--15. 1. " COUNT ,Receive DMA flushed packets" group.long 0x1BC++0x07 line.long 0x00 "TSU_TIMER_INCR_SUB_NSEC,1588 Timer Increment Register SUB NSEC Register" hexmask.long.byte 0x00 24.--31. 1. " SUB_NS_INCR_LSB ,Bits [7:0] of timer increment sub nsec" hexmask.long.word 0x00 0.--15. 1. " SUB_NS_INCR ,Bits [23:8] of timer increment sub nsec" line.long 0x04 "TSU_TIMER_MSB_SEC,1588 Timer Seconds Register" hexmask.long.word 0x04 0.--15. 1. " TIMER ,TSU timer value (S)" rgroup.long 0x1C4++0x03 line.long 0x00 "TSU_STROBE_MSB_SEC,1588 Timer Sync Strobe Seconds Register" hexmask.long.word 0x00 0.--15. 1. " STROBE ,1588 timer sync strobe seconds" rgroup.long 0x1C8++0x07 line.long 0x00 "TSU_STROBE_SEC,1588 Timer Sync Strobe Seconds Register" line.long 0x04 "TSU_STROBE_NSEC,1588 Timer Sync Strobe Nanoseconds Register" hexmask.long 0x04 0.--29. 1. " STROBE ,1588 timer sync strobe nanoseconds" group.long 0x1D0++0x07 line.long 0x00 "TSU_TIMER_SEC,1588 Timer Seconds Register" line.long 0x04 "TSU_TIMER_NSEC,1588 Timer Nanoseconds Register" hexmask.long 0x04 0.--29. 1. " TIMER ,Timer count in nanoseconds" textline " " wgroup.long 0x1D8++0x03 line.long 0x00 "TSU_TIMER_ADJUST,TSU Timer Adjust Register" bitfld.long 0x00 31. " ADD_SUBTRACT ,Write as one to subtract from the 1588 timer" "Add,Subtract" hexmask.long 0x00 0.--29. 1. " INCREMENT_VALUE ,Timer increment value" group.long 0x1DC++0x03 line.long 0x00 "TSU_TIMER_INCR,1588 Timer Increment Register" hexmask.long.byte 0x00 16.--23. 1. " NUM_INCS ,The number of increments after which the alternative increment is used" hexmask.long.byte 0x00 8.--15. 1. " ALT_NS_INCR ,Alternative nanoseconds count" hexmask.long.byte 0x00 0.--7. 1. " NUM_INCR ,A count of nanoseconds by which the 1588 timer nanoseconds register will be incremented each clock cycle" rgroup.long 0x1E0++0x1F line.long 0x00 "TSU_PTP_TX_SEC,PTP Event Frame Transmitted Seconds Register" line.long 0x04 "TSU_PTP_TX_NSEC,PTP Event Frame Transmitted Nanoseconds Register" hexmask.long 0x04 0.--29. 1. " TIMER ,PTP event frame transmitted nanoseconds" line.long 0x08 "TSU_PTP_RX_SEC,PTP Event Frame Received Seconds Register" line.long 0x0C "TSU_PTP_RX_NSEC,PTP Event Frame Received Nanoseconds Register" hexmask.long 0x0C 0.--29. 1. " TIMER ,PTP event frame transmitted nanoseconds" line.long 0x10 "TSU_PEER_TX_SEC,PTP Peer Event Frame Transmitted Seconds Register" line.long 0x14 "TSU_PEER_TX_NSEC,PTP Peer Event Frame Transmitted Nanoseconds Register" hexmask.long 0x14 0.--29. 1. " TIMER ,PTP peer event frame transmitted nanoseconds" line.long 0x18 "TSU_PEER_RX_SEC,PTP Peer Event Frame Received Seconds Register" line.long 0x1C "TSU_PEER_RX_NSEC,PTP Peer Event Frame Received Nanoseconds Register" hexmask.long 0x1C 0.--29. 1. " TIMER ,PTP peer event frame received nanoseconds" group.long 0x200++0x03 line.long 0x00 "PCS_CONTROL,PSC Control Register" bitfld.long 0x00 15. " PCS_SOFTWARE_RESET ,PCS software reset" "No effect,Reset" bitfld.long 0x00 14. " LOOPBACK_MODE ,Loopback mode" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " ENABLE_AUTO_NEG ,Enable auto-negotiation" "Disabled,Enabled" bitfld.long 0x00 9. " RESTART_AUTO_NEG ,Restart auto-negotiation" "No effect,Reset" textline " " bitfld.long 0x00 8. " MAC_DUPLEX_STATE ,MAC duplex state" "0,1" bitfld.long 0x00 7. " COLLISION_TEST ,Collision test" "No collision,Collision" textline " " bitfld.long 0x00 6. 13. " SPEED_SELECT_BIT ,Speed select" ",1000 mbps,?..." textline " " hgroup.long 0x204++0x03 hide.long 0x00 "PCS_STATUS,PCS General Status Information Register" textfld " " in textline " " rgroup.long 0x208++0x07 line.long 0x00 "PCS_PHY_TOP_ID,Upper 16-bits Of The Phy's Identification Code Register" hexmask.long.word 0x00 0.--15. 1. " ID_CODE ,Upper 16-bits of the PHY identification code" line.long 0x04 "PCS_PHY_BOT_ID,Lower 16-bits Of The Phy's Identification Code Register" hexmask.long.word 0x04 0.--15. 1. " ID_CODE ,Lower 16-bits of the PHY identification code" group.long 0x210++0x03 line.long 0x00 "PCS_AN_ADV,Transmit Base Page Of The GEM PCS Capabilities Register" bitfld.long 0x00 15. " NEXT_PAGE ,Next page" "Not required,Required" bitfld.long 0x00 12.--13. " REMOTE_FAULT ,Remote fault" "No error,Link failure,Off line,Auto-negation error" textline " " bitfld.long 0x00 7.--8. " PAUSE ,Pause" "No pause,Symmetric,Asymmetric,Both" bitfld.long 0x00 6. " HALF_DUPLEX ,Half duplex support" "Not supported,Supported" textline " " bitfld.long 0x00 5. " FULL_DUPLEX ,Full duplex support" "Not supported,Supported" if ((d.l(ad:0xFF0C0000+0x04)&0x8000000)==0x8000000) rgroup.long 0x214++0x03 line.long 0x00 "PCS_AN_LP_BASE,Link Partner's Base Page Received Information Register" bitfld.long 0x00 15. " LPNPS ,Link status" "Link down,Link up" bitfld.long 0x00 14. " LPA ,Link partner acknowledge" "Not successful,Successful" textline " " bitfld.long 0x00 12. " LPRFDM ,Link partner remote fault duplex mode" "Half duplex,Full duplex" textline " " bitfld.long 0x00 10.--11. " SPEED ,Speed" "10 mbps bit,100mbps,1000 mbps,?..." else rgroup.long 0x214++0x03 line.long 0x00 "PCS_AN_LP_BASE,Link Partner's Base Page Received Information Register" bitfld.long 0x00 15. " LPNPS ,Link partner next page" "Not exchange,Exchange" bitfld.long 0x00 14. " LPA ,Link partner acknowledge" "Not successful,Successful" textline " " bitfld.long 0x00 12.--13. " LPRFDM ,Link partner remote fault" "No error,Link failure,Off line,Auto-negotiation error" bitfld.long 0x00 7.--8. " PAUSE ,Pause" "No pause,Symmetric pause,Asymmetric pause,Both" textline " " bitfld.long 0x00 6. " LPHD ,Link partner half duplex" "Not supported,Supported" bitfld.long 0x00 5. " LPFD ,Link partner full duplex" "Not supported,Supported" endif rgroup.long 0x218++0x03 line.long 0x00 "PCS_AN_EXP,Auto-negotiation Next Page Ability And Page Received Information Register" bitfld.long 0x00 2. " NPC ,Next page capability" "Not supported,Supported" bitfld.long 0x00 1. " PR ,Page received" "Not received,Received" group.long 0x21C++0x03 line.long 0x00 "PCS_AN_NP_TX,Transmit The Next Page Information For The GEM PCS Register" bitfld.long 0x00 15. " NPTT ,Next page to transmit" "Last page,Not last" bitfld.long 0x00 13. " MPI ,Message page indicator" "Unformatted,Message" textline " " bitfld.long 0x00 12. " ACKNOWLEDGE_2 ,GEM PCS has the ability to comply with the last received message" "Not able,Able" hexmask.long.word 0x00 0.--10. 1. " MESSAGE ,Contains data as defined by the message page indicator bit" rgroup.long 0x220++0x03 line.long 0x00 "PCS_AN_LP_NP,Next Page Received Information From The Link Partner Register" bitfld.long 0x00 15. " NPTR ,Next page to receive" "Last page,Not last" bitfld.long 0x00 14. " ACKNOWLEDGE ,Link partner has successfully received the last message transmitted" "Not successful,Successful" textline " " bitfld.long 0x00 13. " MPI ,Message page indicator" "Unformatted,Message" bitfld.long 0x00 12. " ACKNOWLEDGE_2 ,Link partner has the ability to comply with the last message received" "Not able,Able" textline " " bitfld.long 0x00 11. " TOGGLE ,Toggle every received page" "Not toggle,Toggle" hexmask.long.word 0x00 0.--10. 1. " MESSAGE ,Contains data as defined by the message page indicator bit" rgroup.long 0x23C++0x03 line.long 0x00 "PCS_AN_EXT_STATUS,PCS auto-negotiation Extended Status Information Register" bitfld.long 0x00 15. " FD_1000BASE_X ,Full duplex 1000BASE-X" "Not supported,Supported" bitfld.long 0x00 14. " HD_1000BASE_X ,Half duplex 1000BASE-X" "Not supported,Supported" textline " " bitfld.long 0x00 13. " FD_1000BASE_T ,Full duplex 1000BASE-T" "Not supported,Supported" bitfld.long 0x00 12. " HD_1000BASE_T ,Half duplex 1000BASE-T" "Not supported,Supported" textline " " hgroup.long 0x270++0x07 hide.long 0x00 "RX_LPI,Received LPI Transitions Register" textfld " " in hide.long 0x04 "RX_LPI_TIME,Received LPI Time Register" textfld " " in group.long 0x278++0x03 line.long 0x00 "TX_LPI,Transmit LPI Transitions Register" hexmask.long.word 0x00 0.--15. 1. " COUNT ,Count of LPI transmissions" hgroup.long 0x27C++0x03 hide.long 0x00 "TX_LPI_TIME,Transmit LPI Time Register" textfld " " in textline " " rgroup.long 0x280++0x0B line.long 0x00 "DESIGNCFG_DEBUG1,Design Configuration Register 1" bitfld.long 0x00 28.--31. " AXI_CACHE_VALUE ,Takes the value of the GEM_AXI_CACHE_VALUE define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 25.--27. " DMA_BUS_WIDTH ,Takes the value of the GEM_DMA_BUS_WIDTH define" "0,1,2,3,4,5,6,7" bitfld.long 0x00 23. " IRQ_READ_CLEAR ,Takes the value of the GEM_IRQ_READ_CLEAR define" "0,1" textline " " bitfld.long 0x00 22. " NO_SNAPSHOT ,Takes the value of the GEM_NO_SNAPSHOT define" "0,1" bitfld.long 0x00 21. " NO_STATS ,Takes the value of the GEM_NO_STATS define" "0,1" bitfld.long 0x00 20. " NO_SCAN_PINS ,Takes the value of the GEM_NO_SCAN_PINS define" "0,1" textline " " bitfld.long 0x00 15.--19. " USER_IN_WIDTH ,Takes the value of the GEM_USER_IN_WIDTH define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 10.--14. " USER_OUT_WIDTH ,Takes the value of the GEM_USER_OUT_WIDTH define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 9. " USER_IO ,Takes the value of the GEM_USER_IO define" "0,1" textline " " bitfld.long 0x00 8. " APB_REV2 ,Takes the value of the GEM_APB_REV2 define" "0,1" bitfld.long 0x00 7. " APB_REV1 ,Takes the value of the GEM_APB_REV1 define" "0,1" bitfld.long 0x00 6. " EXT_FIFO_INTERFACE ,Takes the value of the GEM_EXT_FIFO_INTERFACE define" "0,1" textline " " bitfld.long 0x00 5. " NO_INT_LOOPBACK ,Takes the value of the GEM_NO_INT_LOOPBACK define" "0,1" bitfld.long 0x00 4. " INT_LOOPBACK ,Takes the value of the GEM_INT_LOOPBACK define" "0,1" bitfld.long 0x00 3. " TDC_50 ,Takes the value of the TDC_50 define" "0,1" textline " " bitfld.long 0x00 2. " RDC_50 ,Takes the value of the RDC_50 define" "0,1" bitfld.long 0x00 1. " SERDES ,Takes the value of the GEM_SERDES define" "0,1" bitfld.long 0x00 0. " NO_PCS ,Takes the value of the GEM_NO_PCS define" "0,1" line.long 0x04 "DESIGNCFG_DEBUG2,Design Configuration Register 2" bitfld.long 0x04 31. " SPRAM ,Takes the value of the GEM_SPRAM define" "0,1" bitfld.long 0x04 30. " AXI ,Takes the value of the GEM_AXI define" "0,1" bitfld.long 0x04 26.--29. " TX_PBUF_ADDR ,Takes the value of the GEM_TX_PBUF_ADDR define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 22.--25. " RX_PBUF_ADDR ,Takes the value of the GEM_RX_PBUF_ADDR define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 21. " TX_PKT_BUFFER ,Takes the value of the GEM_TX_PKT_BUFFER define" "0,1" bitfld.long 0x04 20. " RX_PKT_BUFFER ,Takes the value of the GEM_RX_PKT_BUFFER define" "0,1" textline " " bitfld.long 0x04 16.--19. " HPROT_VALUE ,Takes the value of the GEM_HPROT_VALUE define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x04 0.--15. 1. " JUMBO_MAX_LENGTH ,Takes the value of the gem_jumbo_max_length define" line.long 0x08 "DESIGNCFG_DEBUG3,Design Configuration Register 3" bitfld.long 0x08 24.--29. " NUM_SPEC_ADD_FILTERS ,Takes the value of the NUM_SPEC_ADD_FILTERS define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" rgroup.long 0x290++0x17 line.long 0x00 "DESIGNCFG_DEBUG5,Design Configuration Register 5" bitfld.long 0x00 29.--31. " AXI_PROT_VALUE ,Takes the value of the GEM_AXI_PROT_VALUE define" "0,1,2,3,4,5,6,7" bitfld.long 0x00 28. " TSU_CLK ,Takes the value of the GEM_TSU_CLK define" "0,1" hexmask.long.byte 0x00 20.--27. 1. " RX_BUFFER_LENGTH_DEF ,Takes the value of the GEM_RX_BUFFER_LENGTH_DEF define" textline " " bitfld.long 0x00 19. " TX_PBUF_SIZE_DEF ,Takes the value of the GEM_TX_PBUF_SIZE_DEF define" "0,1" bitfld.long 0x00 17.--18. " RX_PBUF_SIZE_DEF ,Takes the value of the GEM_RX_PBUF_SIZE_DEF define" "0,1,2,3" bitfld.long 0x00 15.--16. " ENDIAN_SWAP_DEF ,Takes the value of the GEM_ENDIAN_SWAP_DEF define" "0,1,2,3" textline " " bitfld.long 0x00 12.--14. " MDC_CLOCK_DIV ,Takes the value of the GEM_MDC_CLOCK_DIV define" "0,1,2,3,4,5,6,7" bitfld.long 0x00 10.--11. " DMA_BUS_WIDTH_DEF ,Takes the value of the GEM_DMA_BUS_WIDTH_DEF define" "0,1,2,3" bitfld.long 0x00 9. " PHY_IDENT ,Takes the value of the GEM_PHY_IDENT define" "0,1" textline " " bitfld.long 0x00 8. " TSU ,Takes the value of the GEM_TSU define" "0,1" bitfld.long 0x00 4.--7. " TX_FIFO_CNT_WIDTH ,Takes the value of the GEM_TX_FIFO_CNT_WIDTH define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " RX_FIFO_CNT_WIDTH ,Takes the value of the GEM_RX_FIFO_CNT_WIDTH define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " line.long 0x04 "DESIGNCFG_DEBUG6,Design Configuration Register 6" bitfld.long 0x04 25. " PBUF_CUTTHRU ,Takes the value of the GEM_PBUF_CUTTHRU define" "0,1" bitfld.long 0x04 24. " PFC_MULTI_QUANTUM ,Takes the value of the GEM_PFC_MULTI_QUANTUM define" "0,1" bitfld.long 0x04 23. " DMA_ADDR_WIDTH_IS_64B ,Takes the value of the GEM_DMA_ADDR_WIDTH_IS_64B define" "0,1" textline " " bitfld.long 0x04 22. " HOST_IF_SOFT_SELECT ,Takes the value of the GEM_HOST_IF_SOFT_SELECT define" "0,1" bitfld.long 0x04 21. " TX_ADD_FIFO_IF ,Takes the value of the GEM_TX_ADD_FIFO_IF define" "0,1" bitfld.long 0x04 20. " EXT_TSU_TIMER ,Takes the value of the GEM_EXT_TSU_TIMER define" "0,1" textline " " bitfld.long 0x04 16.--19. " TX_PBUF_QUEUE_SEGMENT_SIZE ,Takes the value of the GEM_TX_PBUF_QUEUE_SEGMENT_SIZE define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 15. " DMA_PRIORITY_QUEUE[15] ,Takes the value of the DMA_PRIORITY_QUEUE15 define" "0,1" bitfld.long 0x04 14. " [14] ,Takes the value of the DMA_PRIORITY_QUEUE14 define" "0,1" bitfld.long 0x04 13. " [13] ,Takes the value of the DMA_PRIORITY_QUEUE13 define" "0,1" textline " " bitfld.long 0x04 12. " [12] ,Takes the value of the DMA_PRIORITY_QUEUE12 define" "0,1" bitfld.long 0x04 11. " [11] ,Takes the value of the DMA_PRIORITY_QUEUE11 define" "0,1" bitfld.long 0x04 10. " [10] ,Takes the value of the DMA_PRIORITY_QUEUE10 define" "0,1" textline " " bitfld.long 0x04 9. " [9] ,Takes the value of the DMA_PRIORITY_QUEUE9 define" "0,1" bitfld.long 0x04 8. " [8] ,Takes the value of the DMA_PRIORITY_QUEUE8 define" "0,1" bitfld.long 0x04 7. " [7] ,Takes the value of the DMA_PRIORITY_QUEUE7 define" "0,1" textline " " bitfld.long 0x04 6. " [6] ,Takes the value of the DMA_PRIORITY_QUEUE6 define" "0,1" bitfld.long 0x04 5. " [5] ,Takes the value of the DMA_PRIORITY_QUEUE5 define" "0,1" bitfld.long 0x04 4. " [4] ,Takes the value of the DMA_PRIORITY_QUEUE4 define" "0,1" textline " " bitfld.long 0x04 3. " [3] ,Takes the value of the DMA_PRIORITY_QUEUE3 define" "0,1" bitfld.long 0x04 2. " [2] ,Takes the value of the DMA_PRIORITY_QUEUE2 define" "0,1" bitfld.long 0x04 1. " [1] ,Takes the value of the DMA_PRIORITY_QUEUE1 define" "0,1" line.long 0x08 "DESIGNCFG_DEBUG7,Design Configuration Register 7" bitfld.long 0x08 28.--31. " TX_PBUF_NUM_SEGMENTS_Q[7] ,Takes the value of the GEM_TX_PBUF_NUM_SEGMENTS_QUEUE7 define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 24.--27. " [6] ,Takes the value of the GEM_TX_PBUF_NUM_SEGMENTS_QUEUE6 define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 20.--23. " [5] ,Takes the value of the GEM_TX_PBUF_NUM_SEGMENTS_QUEUE5 define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x08 16.--19. " [4] ,Takes the value of the GEM_TX_PBUF_NUM_SEGMENTS_QUEUE4 define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 12.--15. " [3] ,Takes the value of the GEM_TX_PBUF_NUM_SEGMENTS_QUEUE3 define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 8.--11. " [2] ,Takes the value of the GEM_TX_PBUF_NUM_SEGMENTS_QUEUE2 define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x08 4.--7. " [1] ,Takes the value of the GEM_TX_PBUF_NUM_SEGMENTS_Q1 define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--3. " [0] ,Takes the value of the GEM_TX_PBUF_NUM_SEGMENTS_Q0 define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x0C "DESIGNCFG_DEBUG8,Design Configuration Register 8" hexmask.long.byte 0x0C 24.--31. 1. " NUM_TYPE1_SCREENERS ,Takes the value of the NUM_TYPE1_SCREENERS define" hexmask.long.byte 0x0C 16.--23. 1. " NUM_TYPE2_SCREENERS ,Takes the value of the NUM_TYPE2_SCREENERS define" textline " " hexmask.long.byte 0x0C 8.--15. 1. " NUM_SCR2_ETHTYPE_REGS ,Takes the value of the NUM_SCR2_ETHTYPE_REGS define" hexmask.long.byte 0x0C 0.--7. 1. " NUM_SCR2_COMPARE_REGS ,Takes the value of the NUM_SCR2_COMPARE_REGS define" line.long 0x10 "DESIGNCFG_DEBUG9,Design Configuration Register 9" bitfld.long 0x10 28.--31. " TX_PBUF_NUM_SEGMENTS_Q[15] ,Takes the value of the GEM_TX_PBUF_NUM_SEGMENTS_Q15 define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 24.--27. " [14] ,Takes the value of the GEM_TX_PBUF_NUM_SEGMENTS_Q14 define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 20.--23. " [13] ,Takes the value of the GEM_TX_PBUF_NUM_SEGMENTS_Q13 define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x10 16.--19. " [12] ,Takes the value of the GEM_TX_PBUF_NUM_SEGMENTS_Q12 define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 12.--15. " [11] ,Takes the value of the GEM_TX_PBUF_NUM_SEGMENTS_Q11 define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 8.--11. " [10] ,Takes the value of the GEM_TX_PBUF_NUM_SEGMENTS_Q10 define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x10 4.--7. " [9] ,Takes the value of the GEM_TX_PBUF_NUM_SEGMENTS_Q9 define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 0.--3. " [8] ,Takes the value of the GEM_TX_PBUF_NUM_SEGMENTS_Q8 define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " line.long 0x14 "DESIGNCFG_DEBUG10,Design Configuration Register 10" bitfld.long 0x14 28.--31. " EMAC_BUS_WIDTH ,Takes the value of the GEM_EMAC_BUS_WIDTH define" ",32bits,64bits,,128bits,?..." bitfld.long 0x14 24.--27. " TX_PBUF_DATA ,Takes the value of the GEM_TX_PBUF_DATA define" ",32bits,64bits,,128bits,?..." textline " " bitfld.long 0x14 20.--23. " RX_PBUF_DATA ,Takes the value of the GEM_RX_PBUF_DATA define" ",32bits,64bits,,128bits,?..." bitfld.long 0x14 16.--19. " AXI_ACCESS_PIPELINE_BITS ,Takes the value of the GEM_AXI_ACCESS_PIPELINE_BITS define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x14 12.--15. " AXI_TX_DESCR_RD_BUFF_BITS ,Takes the value of the GEM_AXI_TX_DESCR_RD_BUFF_BITS define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x14 8.--11. " AXI_RX_DESCR_RD_BUFF_BITS ,Takes the value of the GEM_AXI_RX_DESCR_RD_BUFF_BITS define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x14 4.--7. " AXI_TX_DESCR_WR_BUFF_BITS ,Takes the value of the GEM_AXI_TX_DESCR_WR_BUFF_BITS define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x14 0.--3. " AXI_RX_DESCR_WR_BUFF_BITS ,Takes the value of the GEM_AXI_RX_DESCR_WR_BUFF_BITS define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x400++0x03 line.long 0x00 "INT_Q1_STATUS,Priority Queue Interrupt Status Register" bitfld.long 0x00 11. " RESP_NOT_OK ,BRESP/HRESP not OK" "No occurred,Occurred" bitfld.long 0x00 10. " RO ,Receive overrun" "No occurred,Occurred" textline " " bitfld.long 0x00 7. " TC ,Transmit complete" "No occurred,Occurred" bitfld.long 0x00 6. " AMBA_ERROR ,Transmit frame corruption due to AMBA (Ahb/axi) error" "No occurred,Occurred" textline " " bitfld.long 0x00 5. " RLEORLC ,Retry limit exceeded or late collision" "No occurred,Occurred" bitfld.long 0x00 2. " RX_USED_READ ,RX used bit read" "No occurred,Occurred" textline " " bitfld.long 0x00 1. " RC ,Receive complete" "No occurred,Occurred" group.long 0x440++0x03 line.long 0x00 "TRANSMIT_Q1_PTR,Transmit Buffer Queue Base Address Register" hexmask.long 0x00 2.--31. 0x04 " DMA_TX_Q_PTR ,Transmit buffer queue base address" group.long 0x480++0x03 line.long 0x00 "RECEIVE_Q1_PTR,Receive Buffer Queue Base Address Register" hexmask.long 0x00 2.--31. 0x04 " DMA_RX_Q_PTR ,Receive buffer queue base address" group.long 0x4A0++0x03 line.long 0x00 "DMA_RXBUF_SIZE_Q1,Receive Buffer Queue Size" hexmask.long.byte 0x00 0.--7. 1. " DMA_RX_Q_BUF_SIZE ,DMA receive buffer size in system memory" group.long 0x4BC++0x1B line.long 0x00 "CBS_CONTROL,Enable credit-based Shaping Register" bitfld.long 0x00 1. " CBS_ENABLE_QUEUE_B ,Enable Credit-Based shaping on the 2nd highest priority queue (Queue B)" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " CBS_ENABLE_QUEUE_A ,Enable Credit-Based shaping on the highest priority queue (Queue A)" "Disabled,Enabled" line.long 0x04 "CBS_IDLESLOPE_Q_A,Idle/slope Value For Queue A In Bytes/sec Register" line.long 0x08 "CBS_IDLESLOPE_Q_B,Idle/slope Value For Queue B In Bytes/sec Register" line.long 0x0C "UPPER_TX_Q_BASE_ADDR,Upper 32 Bits Of Transmit Buffer Descriptor Queue Base Address" line.long 0x10 "TX_BD_CONTROL,TX BD Control Register" bitfld.long 0x10 4.--5. " TX_BD_TS_MODE ,TX descriptor timestamp insertion mode" "Disabled,PTP event frames only,All PTP frames only,All frames" line.long 0x14 "RX_BD_CONTROL,RX BD Control Register" bitfld.long 0x14 4.--5. " RX_BD_TS_MODE ,RX descriptor timestamp insertion mode" "Disabled,PTP event frames only,All PTP frames only,All frames" line.long 0x18 "UPPER_RX_Q_BASE_ADDR,Upper 32 Bits Of Receive Buffer Descriptor Queue Base Address Register" textline " " group.long 0x500++0x0F line.long 0x00 "SCREENING_TYPE_1_REG_0,Screening Type 1 Register 0" bitfld.long 0x00 29. " UPME ,UDP port match enable" "Disabled,Enabled" bitfld.long 0x00 28. " DETC_EN ,DS/TC enable" "Disabled,Enabled" hexmask.long.word 0x00 12.--27. 1. " UDP_PM ,UDP port match" textline " " hexmask.long.byte 0x00 4.--11. 1. " DSTC_MATCH ,DS/TC match" bitfld.long 0x00 0.--3. " QN ,Queue number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "SCREENING_TYPE_1_REG_1,Screening Type 1 Register 1" bitfld.long 0x04 29. " UPME ,UDP port match enable" "Disabled,Enabled" bitfld.long 0x04 28. " DETC_EN ,DS/TC enable" "Disabled,Enabled" hexmask.long.word 0x04 12.--27. 1. " UDP_PM ,UDP port match" textline " " hexmask.long.byte 0x04 4.--11. 1. " DSTC_MATCH ,DS/TC match" bitfld.long 0x04 0.--3. " QN ,Queue number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "SCREENING_TYPE_1_REG_2,Screening Type 1 Register 2" bitfld.long 0x08 29. " UPME ,UDP port match enable" "Disabled,Enabled" bitfld.long 0x08 28. " DETC_EN ,DS/TC enable" "Disabled,Enabled" hexmask.long.word 0x08 12.--27. 1. " UDP_PM ,UDP port match" textline " " hexmask.long.byte 0x08 4.--11. 1. " DSTC_MATCH ,DS/TC match" bitfld.long 0x08 0.--3. " QN ,Queue number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x0C "SCREENING_TYPE_1_REG_3,Screening Type 1 Register 3" bitfld.long 0x0C 29. " UPME ,UDP port match enable" "Disabled,Enabled" bitfld.long 0x0C 28. " DETC_EN ,DS/TC enable" "Disabled,Enabled" hexmask.long.word 0x0C 12.--27. 1. " UDP_PM ,UDP port match" textline " " hexmask.long.byte 0x0C 4.--11. 1. " DSTC_MATCH ,DS/TC match" bitfld.long 0x0C 0.--3. " QN ,Queue number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x540++0x0F line.long 0x00 "SCREENING_TYPE_2_REG_0,Screening Type 2 Register 0" bitfld.long 0x00 30. " COMPARE_C_EN ,Compare C enable" "Disabled,Enabled" bitfld.long 0x00 25.--29. " COMPARE_C ,Compare C - index to screener type 2 compare register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 24. " COMPARE_B_EN ,Compare B enable" "Disabled,Enabled" textline " " bitfld.long 0x00 19.--23. " COMPARE_B ,Compare B - index to screener type 2 compare register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 18. " COMPARE_A_EN ,Compare A enable" "Disabled,Enabled" bitfld.long 0x00 13.--17. " COMPARE_A ,Compare A - index to screener type 2 compare register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 12. " ETHERTYPE_EN ,Ethertype enable" "Disabled,Enabled" bitfld.long 0x00 9.--11. " INDEX ,Index to screener type 2 ethertype register" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8. " VLAN_EN ,VLAN enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4.--6. " VLAN_PRIORITY ,VLAN priority" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. " QUEUE_NUMBER ,Queue number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "SCREENING_TYPE_2_REG_1,Screening Type 2 Register 1" bitfld.long 0x04 30. " COMPARE_C_EN ,Compare C enable" "Disabled,Enabled" bitfld.long 0x04 25.--29. " COMPARE_C ,Compare C - index to screener type 2 compare register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 24. " COMPARE_B_EN ,Compare B enable" "Disabled,Enabled" textline " " bitfld.long 0x04 19.--23. " COMPARE_B ,Compare B - index to screener type 2 compare register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 18. " COMPARE_A_EN ,Compare A enable" "Disabled,Enabled" bitfld.long 0x04 13.--17. " COMPARE_A ,Compare A - index to screener type 2 compare register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x04 12. " ETHERTYPE_EN ,Ethertype enable" "Disabled,Enabled" bitfld.long 0x04 9.--11. " INDEX ,Index to screener type 2 ethertype register" "0,1,2,3,4,5,6,7" bitfld.long 0x04 8. " VLAN_EN ,VLAN enable" "Disabled,Enabled" textline " " bitfld.long 0x04 4.--6. " VLAN_PRIORITY ,VLAN priority" "0,1,2,3,4,5,6,7" bitfld.long 0x04 0.--3. " QUEUE_NUMBER ,Queue number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "SCREENING_TYPE_2_REG_2,Screening Type 2 Register 2" bitfld.long 0x08 30. " COMPARE_C_EN ,Compare C enable" "Disabled,Enabled" bitfld.long 0x08 25.--29. " COMPARE_C ,Compare C - index to screener type 2 compare register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x08 24. " COMPARE_B_EN ,Compare B enable" "Disabled,Enabled" textline " " bitfld.long 0x08 19.--23. " COMPARE_B ,Compare B - index to screener type 2 compare register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x08 18. " COMPARE_A_EN ,Compare A enable" "Disabled,Enabled" bitfld.long 0x08 13.--17. " COMPARE_A ,Compare A - index to screener type 2 compare register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x08 12. " ETHERTYPE_EN ,Ethertype enable" "Disabled,Enabled" bitfld.long 0x08 9.--11. " INDEX ,Index to screener type 2 ethertype register" "0,1,2,3,4,5,6,7" bitfld.long 0x08 8. " VLAN_EN ,VLAN enable" "Disabled,Enabled" textline " " bitfld.long 0x08 4.--6. " VLAN_PRIORITY ,VLAN priority" "0,1,2,3,4,5,6,7" bitfld.long 0x08 0.--3. " QUEUE_NUMBER ,Queue number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x0C "SCREENING_TYPE_2_REG_3,Screening Type 2 Register 3" bitfld.long 0x0C 30. " COMPARE_C_EN ,Compare C enable" "Disabled,Enabled" bitfld.long 0x0C 25.--29. " COMPARE_C ,Compare C - index to screener type 2 compare register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0C 24. " COMPARE_B_EN ,Compare B enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 19.--23. " COMPARE_B ,Compare B - index to screener type 2 compare register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0C 18. " COMPARE_A_EN ,Compare A enable" "Disabled,Enabled" bitfld.long 0x0C 13.--17. " COMPARE_A ,Compare A - index to screener type 2 compare register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x0C 12. " ETHERTYPE_EN ,Ethertype enable" "Disabled,Enabled" bitfld.long 0x0C 9.--11. " INDEX ,Index to screener type 2 ethertype register" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 8. " VLAN_EN ,VLAN enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 4.--6. " VLAN_PRIORITY ,VLAN priority" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 0.--3. " QUEUE_NUMBER ,Queue number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x640++0x03 line.long 0x00 "INT_Q1_MASK,Interrupt Mask Register" setclrfld.long 0x00 11. -0x20 11. -0x40 11. " MASKRNOI ,BRESP/HRESP not OK mask" "Not masked,Masked" setclrfld.long 0x00 10. -0x20 10. -0x40 10. " MASKROI ,Receive overrun mask" "Not masked,Masked" setclrfld.long 0x00 7. -0x20 7. -0x40 7. " MASKTCI ,Transmit complete mask" "Not masked,Masked" textline " " setclrfld.long 0x00 6. -0x20 6. -0x40 6. " MASKTFCDTAEI ,Transmit frame corruption due to AMBA (Ahb/axi) error mask" "Not masked,Masked" setclrfld.long 0x00 5. -0x20 5. -0x40 5. " MASKRLEOLCI ,Retry limit exceeded or late collision mask" "Not masked,Masked" setclrfld.long 0x00 2. -0x20 2. -0x40 2. " MASKRXUBRI ,RX used bit read mask" "Not masked,Masked" textline " " setclrfld.long 0x00 1. -0x20 1. -0x40 1. " MASKRCI ,Receive complete mask" "Not masked,Masked" group.long 0x6E0++0x0F line.long 0x00 "ST2ETREG0,Screening Type 2 Ethernet Type Register 0" hexmask.long.word 0x00 0.--15. 1. " COMPARE_VALUE ,Ethertype compare value" line.long 0x04 "ST2ETREG1,Screening Type 2 Ethernet Type Register 1" hexmask.long.word 0x04 0.--15. 1. " COMPARE_VALUE ,Ethertype compare value" line.long 0x08 "ST2ETREG2,Screening Type 2 Ethernet Type Register 2" hexmask.long.word 0x08 0.--15. 1. " COMPARE_VALUE ,Ethertype compare value" line.long 0x0C "ST2ETREG3,Screening Type 2 Ethernet Type Register 3" hexmask.long.word 0x0C 0.--15. 1. " COMPARE_VALUE ,Ethertype compare value" group.long 0x700++0x1F line.long 0x00 "TYPE2_COMPARE_0_WORD_0,Type2 Compare Word 0 Register" hexmask.long.word 0x00 16.--31. 1. " COMPARE_VALUE ,2 byte compare value" hexmask.long.word 0x00 0.--15. 1. " MASK_VALUE ,2 byte mask value" line.long 0x04 "TYPE2_COMPARE_0_WORD_1,Type2 Compare Word 1 Register" bitfld.long 0x04 7.--8. " COMPARE_OFFSET ,Compare byte offset" "Beginning,After ether type,End of IP header,End of TCP/UDP header" hexmask.long.byte 0x04 0.--6. 1. " OFFSET_VALUE ,Offset value in bytes" line.long 0x08 "TYPE2_COMPARE_1_WORD_0,Type2 Compare Word 0 Register" hexmask.long.word 0x08 16.--31. 1. " COMPARE_VALUE ,2 byte compare value" hexmask.long.word 0x08 0.--15. 1. " MASK_VALUE ,2 byte mask value" line.long 0x0C "TYPE2_COMPARE_1_WORD_1,Type2 Compare Word 1 Register" bitfld.long 0x0C 7.--8. " COMPARE_OFFSET ,Compare byte offset" "Beginning,After ether type,End of IP header,End of TCP/UDP header" hexmask.long.byte 0x0C 0.--6. 1. " OFFSET_VALUE ,Offset value in bytes" line.long 0x10 "TYPE2_COMPARE_2_WORD_0,Type2 Compare Word 0 Register" hexmask.long.word 0x10 16.--31. 1. " COMPARE_VALUE ,2 byte compare value" hexmask.long.word 0x10 0.--15. 1. " MASK_VALUE ,2 byte mask value" line.long 0x14 "TYPE2_COMPARE_2_WORD_1,Type2 Compare Word 1 Register" bitfld.long 0x14 7.--8. " COMPARE_OFFSET ,Compare byte offset" "Beginning,After ether type,End of IP header,End of TCP/UDP header" hexmask.long.byte 0x14 0.--6. 1. " OFFSET_VALUE ,Offset value in bytes" line.long 0x18 "TYPE2_COMPARE_3_WORD_0,Type2 Compare Word 0 Register" hexmask.long.word 0x18 16.--31. 1. " COMPARE_VALUE ,2 byte compare value" hexmask.long.word 0x18 0.--15. 1. " MASK_VALUE ,2 byte mask value" line.long 0x1C "TYPE2_COMPARE_3_WORD_1,Type2 Compare Word 1 Register" bitfld.long 0x1C 7.--8. " COMPARE_OFFSET ,Compare byte offset" "Beginning,After ether type,End of IP header,End of TCP/UDP header" hexmask.long.byte 0x1C 0.--6. 1. " OFFSET_VALUE ,Offset value in bytes" width 0x0B tree.end tree "GEM2" base ad:0xFF0D0000 width 26. group.long 0x00++0x07 line.long 0x00 "NETWORK_CONTROL,General MAC Control Functions For Both Receiver And Transmitter Register" bitfld.long 0x00 24. " OSSM ,1588 one step sync mode" "Disabled,Enabled" bitfld.long 0x00 23. " ETPE ,External TSU timer port enable" "Disabled,Enabled" bitfld.long 0x00 22. " SUO ,Store UDP/TCP offset to memory" "Normal,UDP/TCP" textline " " bitfld.long 0x00 21. " ASM ,Alternative SGMII mode" "Disabled,Enabled" bitfld.long 0x00 20. " PUE ,Enable detection of unicast PTP" "Disabled,Enabled" bitfld.long 0x00 19. " TLE ,Enable LPI transmission when set LPI (Low power idle) is immediately transmitted" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " FRPP ,Flush the next packet from the external RX DPRAM" "No effect,Flushed" bitfld.long 0x00 17. " TPPBPF ,Write a one to transmit PFC priority based pause frame" "Disabled,Transmitted" bitfld.long 0x00 16. " PFC_EN ,Enable PFC priority based pause reception capabilities" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " SRT ,Store receive time stamp to memory" "Normal,Replaced" bitfld.long 0x00 12. " TPFZ ,Transmit zero quantum pause frame" "No effect,Transmitted" bitfld.long 0x00 11. " TPFR ,Transmit pause frame" "No effect,Transmitted" textline " " bitfld.long 0x00 10. " TXP ,Transmit halt" "Not halted,Halted" bitfld.long 0x00 9. " TSP ,Start transmission" "No effect,Start" bitfld.long 0x00 8. " BP ,Back pressure" "Not forced,Forced" textline " " bitfld.long 0x00 7. " SWE ,Write enable for statistic registers" "Disabled,Enabled" bitfld.long 0x00 6. " IASR ,Incremental statistics registers" "Not incremented,Incremented" bitfld.long 0x00 5. " CASR ,Clear statistics registers" "No effect,Clear" textline " " bitfld.long 0x00 4. " MANPEN ,Management port enable" "Disabled,Enabled" bitfld.long 0x00 3. " EN_TRANSMIT ,Transmit enable" "Disabled,Enabled" bitfld.long 0x00 2. " EN_RECEIVE ,Receive enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " LOOPBACK_LOCAL ,Loopback local" "Not asserted,Asserted" bitfld.long 0x00 0. " LOOPBACK ,Controls the loopback output pin" "Low,High" line.long 0x04 "NETWORK_CONFIG,Network Configuration Register" bitfld.long 0x04 31. " UDE ,Uni direction enable" "Disabled,Enabled" bitfld.long 0x04 30. " IIRE ,Ignore IPG RX_ER" "Not ignored,Ignored" bitfld.long 0x04 29. " NSP_CHANGE ,Receive bad preamble" "Rejected,Not rejected" textline " " bitfld.long 0x04 28. " ISE ,IPG stretch enable" "Disabled,Enabled" bitfld.long 0x04 27. " SME ,SGMII mode enable" "Disabled,Enabled" bitfld.long 0x04 26. " IRF ,Ignore RX FCS" "Rejected,Not rejected" textline " " bitfld.long 0x04 25. " EHDRX ,Enable frames to by received in half-duplex mode" "Disabled,Enabled" bitfld.long 0x04 24. " RCOE ,Receive checksum offload enable" "Disabled,Enabled" bitfld.long 0x04 23. " DISCOPF ,Disable copy of pause frames" "No,Yes" textline " " bitfld.long 0x04 21.--22. " DBW ,Data bus width" "32 bits,64 bits,?..." bitfld.long 0x04 18.--20. " MCD ,MDC clock division" "/8,/16,/32,/48,/64,/96,/128,/224" bitfld.long 0x04 17. " FCSREM ,FCS remove" "Without last 4 bytes,With 4 bytes" textline " " bitfld.long 0x04 16. " LFEFD ,Length field error frame discard" "Disabled,Enabled" bitfld.long 0x04 14.--15. " RBO ,Receive buffer offset" "0,1,2,3" bitfld.long 0x04 13. " PAUSE_EN ,Pause enable" "Not paused,Paused" textline " " bitfld.long 0x04 12. " RETRY_TEST ,Retry test" "Disabled,Enabled" bitfld.long 0x04 11. " PSC_SELECT ,PCS select" "GMII/MII,TBI" bitfld.long 0x04 10. " GMODEEN ,Gigabit mode enable" "10/100mbps,1000 mbps" textline " " bitfld.long 0x04 9. " EAME ,External address match enable" "Disabled,Enabled" bitfld.long 0x04 8. " R1536BF ,Receive 1536 byte frames" "Disabled,Enabled" bitfld.long 0x04 7. " UHE ,Unicast hash enable" "Disabled,Enabled" textline " " bitfld.long 0x04 6. " MHE ,Multicast hash enable" "Disabled,Enabled" bitfld.long 0x04 5. " NO_BRODCAST ,No broadcast" "Accepted,Not accepted" bitfld.long 0x04 4. " CPY_ALL_FRAMES ,Copy all frames" "Not accepted,Accepted" textline " " bitfld.long 0x04 3. " JUMBO_FRAMES ,Jumbo frames" "Disabled,Enabled" bitfld.long 0x04 2. " DIS_NONVLANFRM ,Discard non-VLAN frames" "Not discarded,Discarded" textline " " bitfld.long 0x04 1. " FULL_DUPLEX ,Full duplex" "Not ignored,Ignored" bitfld.long 0x04 0. " SPEED ,Port speed" "10mbps,100mbps" rgroup.long 0x08++0x03 line.long 0x00 "NETWORK_STATUS,Status Information With Respect To The PHY Management Interface Register" bitfld.long 0x00 7. " LPIINDIPCLK ,LPI indication" "Not detected,Detected" bitfld.long 0x00 6. " PFCNEGPCLK ,PFC priority based pause has been negotiated" "Not occurred,Occurred" bitfld.long 0x00 5. " MACPAUSETXEN ,PCS auto-negotiation pause transmit resolution" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " MACPAUSERXEN ,PCS auto-negotiation pause receive resolution" "Disabled,Enabled" bitfld.long 0x00 3. " MACFULLDUPLEX ,PCS auto-negotiation duplex resolution" "Depends on LINKSTATE,Full duplex" bitfld.long 0x00 2. " MAN_DONE ,The PHY management logic is idle" "Not idle,Idle" textline " " bitfld.long 0x00 1. " MDIO_IN ,Status of the MDIO_IN pin" "Low,High" bitfld.long 0x00 0. " PCS_LINK_STATE ,Status of PCS link state" "Low,High" if (((d.l(ad:0xFF0D0000+0x40))&0x80000000)==0x80000000) group.long 0x10++0x03 line.long 0x00 "DMA_CONFIG,DMA Configuration Register" bitfld.long 0x00 30. " DMAABW1 ,DMA address bus width" "32b,64b" bitfld.long 0x00 29. " TXDBEXTMODEEN ,Enable TX extended BD mode" "Disabled,Enabled" bitfld.long 0x00 28. " RXDBEXTMODEEN ,Enable RX extended BD mode" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " FORCEMAXABTX ,Force max length bursts on TX" "Not forced,Forced" bitfld.long 0x00 25. " FORCEMAXABRX ,Force max length bursts on RX" "Not forced,Forced" bitfld.long 0x00 24. " FORCEDISENERR ,Auto discard RX pkts during lack of resource" "Not discarded,Discarded" textline " " hexmask.long.byte 0x00 16.--23. 1. " RX_BUF_SIZE ,DMA receive buffer size in external AMBA (Ahb/axi) system memory" bitfld.long 0x00 10. " TX_PBUF_SIZE ,Transmitter packet buffer memory size select" "2kb,4kb" textline " " bitfld.long 0x00 8.--9. " RX_PBUF_SIZE ,Receiver packet buffer memory size select" "1kb,2kb,4kb,8kb" bitfld.long 0x00 7. " ENDIANSWPPACKET ,Endian swap mode enable for packet data accesses" "Not swapped,Swapped" bitfld.long 0x00 6. " ENDIANSWAPMAN ,Endian swap mode enable for management descriptor accesses" "Not swapped,Swapped" textline " " bitfld.long 0x00 0.--4. " AMBABURSTLENGTH ,Selects the burst length to attempt to use on the AMBA" "Auto,1,1,1,4,4,4,4,8,8,8,8,8,8,8,8,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16" else group.long 0x10++0x03 line.long 0x00 "DMA_CONFIG,DMA Configuration Register" bitfld.long 0x00 30. " DMAABW1 ,DMA address bus width" "32b,64b" bitfld.long 0x00 29. " TXDBEXTMODEEN ,Enable TX extended BD mode" "Disabled,Enabled" bitfld.long 0x00 28. " RXDBEXTMODEEN ,Enable RX extended BD mode" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " FORCEMAXABTX ,Force max length bursts on TX" "Not forced,Forced" bitfld.long 0x00 25. " FORCEMAXABRX ,Force max length bursts on RX" "Not forced,Forced" bitfld.long 0x00 24. " FORCEDISENERR ,Auto discard RX packets during lack of resource" "Not discarded,Discarded" textline " " hexmask.long.byte 0x00 16.--23. 1. " RX_BUF_SIZE ,DMA receive buffer size in external AMBA (Ahb/axi) system memory" bitfld.long 0x00 11. " TX_PBUF_TCP_EN ,TCP and UDP checksum generation offload enable" "Disabled,Enabled" bitfld.long 0x00 10. " TX_PBUF_SIZE ,Transmitter packet buffer memory size select" "2kb,4kb" textline " " bitfld.long 0x00 8.--9. " RX_PBUF_SIZE ,Receiver packet buffer memory size select" "1kb,2kb,4kb,8kb" bitfld.long 0x00 7. " ENDIANSWPPACKET ,Endian swap mode enable for packet data accesses" "Not swapped,Swapped" bitfld.long 0x00 6. " ENDIANSWAPMAN ,Endian swap mode enable for management descriptor accesses" "Not swapped,Swapped" textline " " bitfld.long 0x00 0.--4. " AMBABURSTLENGTH ,Selects the burst length to attempt to use on the AMBA" "Auto,1,1,1,4,4,4,4,8,8,8,8,8,8,8,8,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16" endif group.long 0x14++0x0F line.long 0x00 "TRANSMIT_STATUS,Details Of The Status Of A Transmit Register" eventfld.long 0x00 8. " RESP_NOT_OK ,BRESP/HRESP not OK" "Ok,Not ok" eventfld.long 0x00 7. " LATECOLOCC ,Late collision occurred" "Not occurred,Occurred" eventfld.long 0x00 6. " TRANSMITUR ,Transmit under run" "Not occurred,Occurred" textline " " eventfld.long 0x00 5. " TRNCOMPLETE ,Transmit complete" "Not completed,Completed" eventfld.long 0x00 4. " AMBA_ERROR ,Transmit frame corruption due to AMBA (Ahb/axi) errors" "Not occurred,Occurred" eventfld.long 0x00 3. " TRANSMIT_GO ,Transmit go" "Not active,Active" textline " " eventfld.long 0x00 2. " RETRYLIMITEX ,Retry limit exceeded" "Not exceed,Exceed" eventfld.long 0x00 1. " COLLISION_OCCURRED ,Collision occurred" "Not occurred,Occurred" eventfld.long 0x00 0. " USED_BIT_READ ,Used bit read" "Not occurred,Occurred" line.long 0x04 "RECEIVE_Q_PTR,Start Address Of The Receive Buffer Queue Register" hexmask.long 0x04 2.--31. 0x04 " DMA_RX_Q_PTR ,Receive buffer queue base address" line.long 0x08 "TRANSMIT_Q_PTR,Start Address Of The Transmit Buffer Queue Register" hexmask.long 0x08 2.--31. 0x04 " DMA_TX_Q_PTR ,Transmit buffer queue base address" line.long 0x0C "RECEIVE_STATUS,Details Of The Status Of A Receive Register" eventfld.long 0x0C 3. " RESP_NOT_OK ,BRESP/HRESP not OK" "Ok,Not ok" eventfld.long 0x0C 2. " RECEIVE_OVERRUN ,Receive overrun" "Not occurred,Occurred" eventfld.long 0x0C 1. " FRAME_RECEIVED ,Frame received" "Not received,Received" textline " " eventfld.long 0x0C 0. " BUFFERNOTAVAIL ,Buffer not available" "No,Yes" textline " " hgroup.long 0x24++0x03 hide.long 0x00 "INT_STATUS,Source Of This Interrupt" textfld " " in textline " " group.long 0x30++0x03 line.long 0x00 "INT_MASK,Interrupt Mask Register" setclrfld.long 0x00 29. -0x04 29. -0x08 29. " MASKTTCI ,Mask TSU timer comparison interrupt" "Not masked,Masked" setclrfld.long 0x00 28. -0x04 28. -0x08 28. " MASKWOLERI ,Mask WOL event received interrupt" "Not masked,Masked" setclrfld.long 0x00 27. -0x04 27. -0x08 27. " MASKRXPLIII ,Mask RX LPI indication interrupt" "Not masked,Masked" textline " " setclrfld.long 0x00 26. -0x04 26. -0x08 26. " MASKTSUSRI ,Mask TSU seconds register increment" "Not masked,Masked" setclrfld.long 0x00 25. -0x04 25. -0x08 25. " MASKPTPPFT ,Mask PTP PDELAY_RESP frame transmitted" "Not masked,Masked" setclrfld.long 0x00 24. -0x04 24. -0x08 24. " MASKPTPPFT ,Mask PTP PDELAY_REQ frame transmitted" "Not masked,Masked" textline " " setclrfld.long 0x00 23. -0x04 23. -0x08 23. " MASKPTPPFR ,Mask PTP PDELAY_RESP frame received" "Not masked,Masked" setclrfld.long 0x00 22. -0x04 22. -0x08 22. " MASKPTPDFR ,Mask PTP PDELAY_REQ frame received" "Not masked,Masked" setclrfld.long 0x00 21. -0x04 21. -0x08 21. " MASKPTPSFT ,Mask PTP sync frame transmitted" "Not masked,Masked" textline " " setclrfld.long 0x00 20. -0x04 20. -0x08 20. " MASKPTPDFT ,Mask PTP DELAY_REQ frame transmitted" "Not masked,Masked" setclrfld.long 0x00 19. -0x04 19. -0x08 19. " MASKPTPSFR ,Mask PTP sync frame received" "Not masked,Masked" setclrfld.long 0x00 18. -0x04 18. -0x08 18. " MASKPTPDFR ,Mask PTP DELAY_REQ frame received" "Not masked,Masked" textline " " setclrfld.long 0x00 17. -0x04 17. -0x08 17. " MASKPCSLPPR ,Mask PCS link partner page received" "Not masked,Masked" setclrfld.long 0x00 16. -0x04 16. -0x08 16. " MASKPCSACI ,Mask PCS auto-negotiation complete interrupt" "Not masked,Masked" setclrfld.long 0x00 15. -0x04 15. -0x08 15. " MASKEI ,Mask external interrupt" "Not masked,Masked" textline " " setclrfld.long 0x00 14. -0x04 14. -0x08 14. " MASKFTI ,Mask pause frame transmitted interrupt" "Not masked,Masked" setclrfld.long 0x00 13. -0x04 13. -0x08 13. " MASKPTZI ,Mask pause time zero interrupt" "Not masked,Masked" setclrfld.long 0x00 12. -0x04 12. -0x08 12. " MASKPFWNPQI ,Mask pause frame with non-zero pause quantum interrupt" "Not masked,Masked" textline " " setclrfld.long 0x00 11. -0x04 11. -0x08 11. " MASKBHNOKI ,Mask BRESP/HRESP not OK interrupt" "Not masked,Masked" setclrfld.long 0x00 10. -0x04 10. -0x08 10. " MASKROI ,Mask receive overrun interrupt" "Not masked,Masked" setclrfld.long 0x00 9. -0x04 9. -0x08 9. " MASKLCI ,Mask link change interrupt" "Not masked,Masked" textline " " setclrfld.long 0x00 7. -0x04 7. -0x08 7. " MASKTCI ,Mask transmit complete interrupt" "Not masked,Masked" setclrfld.long 0x00 6. -0x04 6. -0x08 6. " MASKTFCDTOAMBA ,Mask transmit frame corruption due to AMBA (Ahb/axi) error interrupt" "Not masked,Masked" setclrfld.long 0x00 5. -0x04 5. -0x08 5. " MASKRLEOLCI ,Mask retry limit exceeded or late collision interrupt" "Not masked,Masked" textline " " setclrfld.long 0x00 4. -0x04 4. -0x08 4. " MASKTBURI ,Mask transmit buffer under run interrupt" "Not masked,Masked" setclrfld.long 0x00 3. -0x04 3. -0x08 3. " MASKTUBRI ,Mask transmit used bit read interrupt" "Not masked,Masked" setclrfld.long 0x00 2. -0x04 2. -0x08 2. " MASKRUBRI ,Mask receive used bit read interrupt" "Not masked,Masked" textline " " setclrfld.long 0x00 1. -0x04 1. -0x08 1. " MASKRCI ,Mask receive complete interrupt" "Not masked,Masked" setclrfld.long 0x00 0. -0x04 0. -0x08 0. " MASKMDI ,Mask management done interrupt" "Not masked,Masked" if (((d.l(ad:0xFF0D0000+0x34))&0x40000000)==0x40000000) group.long 0x34++0x03 line.long 0x00 "PHY_MANAGEMENT,PHY Management Register" bitfld.long 0x00 31. " WRITE0 ,Must be written with 0" "0,?..." bitfld.long 0x00 30. " WRITE1 ,Valid clause frame" "45 frame,22 frame" bitfld.long 0x00 28.--29. " OPERATION ,Operation" ",Write,Read,?..." textline " " hexmask.long.byte 0x00 23.--27. 0x80 " PHYADDR ,PHY address" hexmask.long.byte 0x00 18.--22. 0x04 " REGADDR ,Register address" bitfld.long 0x00 16.--17. " WRITE10 ,Must be written with 10" ",,2,?..." textline " " hexmask.long.word 0x00 0.--15. 1. " PHYW/RDATA ,DATA" else group.long 0x34++0x03 line.long 0x00 "PHY_MANAGEMENT,PHY Management Register" bitfld.long 0x00 31. " WRITE0 ,Must be written with 0" "0,?..." bitfld.long 0x00 30. " WRITE1 ,Valid clause frame" "45 frame,22 frame" bitfld.long 0x00 28.--29. " OPERATION ,Operation" "Address,Write,Post read,Read frame" textline " " hexmask.long.byte 0x00 23.--27. 0x80 " PHYADDR ,PHY address" hexmask.long.byte 0x00 18.--22. 0x04 " REGADDR ,Register address" bitfld.long 0x00 16.--17. " WRITE10 ,Must be written with 10" ",,2,?..." textline " " hexmask.long.word 0x00 0.--15. 1. " PHYW/RDATA ,DATA" endif rgroup.long 0x38++0x03 line.long 0x00 "PAUSE_TIME,Received Pause Quantum Register" hexmask.long.word 0x00 0.--15. 1. " QUANTUM ,Received pause quantum" group.long 0x3C++0x03 line.long 0x00 "TX_PAUSE_QUANTUM,Transmit Pause Quantum Register" hexmask.long.word 0x00 0.--15. 1. " QUANTUM ,Transmit pause quantum" textline " " group.long 0x40++0x0F line.long 0x00 "PBUF_TXCUTTHRU,TX Partial Store And Forward Register" bitfld.long 0x00 31. " DMA_TX_CUTTHRU ,Enable TX partial store and forward operation" "Disabled,Enabled" hexmask.long.word 0x00 0.--11. 1. " DMA_TX_CUTTHRU_THRESHOLD ,Watermark value" line.long 0x04 "PBUF_RXCUTTHRU,RX Partial Store And Forward" bitfld.long 0x04 31. " DMA_RX_CUTTHRU ,Enable RX partial store and forward operation" "Disabled,Enabled" hexmask.long.word 0x04 0.--11. 1. " DMA_RX_CUTTHRU_THRESHOLD ,Watermark value" line.long 0x08 "JUMBO_MAX_LENGTH,Maximum Jumbo Frame Size" hexmask.long.word 0x08 0.--15. 1. " JUMBO_MAX_LENGTH ,Maximal jumbo frame size" line.long 0x0C "EXTERNAL_FIFO_INTERFACE,External FIFO Interface Enable" bitfld.long 0x0C 0. " EXTERNAL_FIFO_INTERFACE ,Enable external FIFO interface" "Disabled,Enabled" group.long 0x54++0x03 line.long 0x00 "AXI_MAX_PIPELINE,Maximum Amount Of Outstanding Transactions On The AXI Bus Between AR / R And AW / W Channels Register" hexmask.long.byte 0x00 8.--15. 1. " AW2W_MAX_PIPELINE ,Maximum number of outstanding AXI write requests that can be issued by the DMA via the AW channel" hexmask.long.byte 0x00 0.--7. 1. " AR2R_MAX_PIPELINE ,Maximum number of outstanding AXI read requests that can be issued by the DMA via the AR channel" group.long 0x80++0x1F line.long 0x00 "HASH_BOTTOM,The First 32 Bits Of The Hash Address Register" line.long 0x04 "HASH_TOP,The Remaining 32 Bits Of The Hash Address Register" line.long 0x08 "SPEC_ADD1_BOTTOM,Least Significant 32 Bits Of The Destination Address Register" line.long 0x0C "SPEC_ADD1_TOP,Specific Address Top Register" bitfld.long 0x0C 16. " FILTER_TYPE ,Destination address filter/source address filter" "Destination,Source" hexmask.long.word 0x0C 0.--15. 1. " ADDRESS ,The most significant bits of the destination/source address[32-47]" line.long 0x10 "SPEC_ADD2_BOTTOM,Least Significant 32 Bits Of The Destination Address Register" line.long 0x14 "SPEC_ADD2_TOP,Least Significant 32 Bits Of The Destination Address Register" bitfld.long 0x14 29. " FILTER_BYTE_MASK_[5] ,Byte 5 of the specific address compare enable" "Compared,Not compared" bitfld.long 0x14 28. " [4] ,Byte 4 of the specific address compare enable" "Compared,Not compared" bitfld.long 0x14 27. " [3] ,Byte 3 of the specific address compare enable" "Compared,Not compared" textline " " bitfld.long 0x14 26. " [2] ,Byte 2 of the specific address compare enable" "Compared,Not compared" bitfld.long 0x14 25. " [1] ,Byte 1 of the specific address compare enable" "Compared,Not compared" bitfld.long 0x14 24. " [0] ,Byte 0 of the specific address compare enable" "Compared,Not compared" textline " " bitfld.long 0x14 16. " FILTER_TYPE ,Destination address filter/source address filter" "Destination,Source" textline " " hexmask.long.word 0x14 0.--15. 1. " ADDRESS ,Specific address 1[32-47]" line.long 0x18 "SPEC_ADD3_BOTTOM,Address Register" line.long 0x1C "SPEC_ADD3_TOP,Least Significant 32 Bits Of The Destination Address Register" bitfld.long 0x1C 29. " FILTER_BYTE_MASK_[5] ,Byte 5 of the specific address compare enable" "Compared,Not compared" bitfld.long 0x1C 28. " [4] ,Byte 4 of the specific address compare enable" "Compared,Not compared" bitfld.long 0x1C 27. " [3] ,Byte 3 of the specific address compare enable" "Compared,Not compared" textline " " bitfld.long 0x1C 26. " [2] ,Byte 2 of the specific address compare enable" "Compared,Not compared" bitfld.long 0x1C 25. " [1] ,Byte 1 of the specific address compare enable" "Compared,Not compared" bitfld.long 0x1C 24. " [0] ,Byte 0 of the specific address compare enable" "Compared,Not compared" textline " " bitfld.long 0x1C 16. " FILTER_TYPE ,Destination address filter/source address filter" "Destination,Source" textline " " hexmask.long.word 0x1C 0.--15. 1. " ADDRESS ,Specific address 1[32-47]" group.long 0xA0++0x1F line.long 0x00 "SPEC_ADD4_BOTTOM,Specific Address Top Register" line.long 0x04 "SPEC_ADD4_TOP,Least Significant 32 Bits Of The Destination Address Register" bitfld.long 0x04 29. " FILTER_BYTE_MASK_[5] ,Byte 5 of the specific address compare enable" "Compared,Not compared" bitfld.long 0x04 28. " [4] ,Byte 4 of the specific address compare enable" "Compared,Not compared" bitfld.long 0x04 27. " [3] ,Byte 3 of the specific address compare enable" "Compared,Not compared" textline " " bitfld.long 0x04 26. " [2] ,Byte 2 of the specific address compare enable" "Compared,Not compared" bitfld.long 0x04 25. " [1] ,Byte 1 of the specific address compare enable" "Compared,Not compared" bitfld.long 0x04 24. " [0] ,Byte 0 of the specific address compare enable" "Compared,Not compared" textline " " bitfld.long 0x04 16. " FILTER_TYPE ,Destination address filter/source address filter" "Destination,Source" textline " " hexmask.long.word 0x04 0.--15. 1. " ADDRESS ,Specific address 1[32-47]" line.long 0x08 "SPEC_TYPE1,Type ID Match 1 Register" bitfld.long 0x08 31. " ENABLE_COPY ,Enable copying of type ID match 1 matched frames" "Disabled,Enabled" hexmask.long.word 0x08 0.--15. 1. " MATCH ,Type ID match 1" line.long 0x0C "SPEC_TYPE2,Type ID Match 2 Register" bitfld.long 0x0C 31. " ENABLE_COPY ,Enable copying of type ID match 2 matched frames" "Disabled,Enabled" hexmask.long.word 0x0C 0.--15. 1. " MATCH ,Type ID match 2" line.long 0x10 "SPEC_TYPE3,Type ID Match 3 Register" bitfld.long 0x10 31. " ENABLE_COPY ,Enable copying of type ID match 3 matched frames" "Disabled,Enabled" hexmask.long.word 0x10 0.--15. 1. " MATCH ,Type ID match 3" line.long 0x14 "SPEC_TYPE4,Type ID Match 4 Register" bitfld.long 0x14 31. " ENABLE_COPY ,Enable copying of type ID match 4 matched frames" "Disabled,Enabled" hexmask.long.word 0x14 0.--15. 1. " MATCH ,Type ID match 4" line.long 0x18 "WOL_REGISTER,Wake On LAN Register" bitfld.long 0x18 19. " WOL_MASK_3 ,Wake on LAN multicast hash event enable" "Disabled,Enabled" bitfld.long 0x18 18. " WOL_MASK_2 ,Wake on LAN specific address register 1 event enable" "Disabled,Enabled" textline " " bitfld.long 0x18 17. " WOL_MASK_1 ,Wake on LAN ARP request event enable" "Disabled,Enabled" bitfld.long 0x18 16. " WOL_MASK_0 ,Wake on LAN magic packet event enable" "Disabled,Enabled" textline " " hexmask.long.word 0x18 0.--15. 1. " ADDR ,Wake on LAN ARP request IP address" line.long 0x1C "STRETCH_RATIO,IPG Stretch Register" hexmask.long.word 0x1C 0.--15. 1. " IPG_STRETCH ,IPG stretch" group.long 0xC0++0x1F line.long 0x00 "STACKED_VLAN,Stacked VLAN Register" bitfld.long 0x00 31. " ENABLE_PROCESSING ,Enable stacked VLAN processing mode" "Disabled,Enabled" hexmask.long.word 0x00 0.--15. 1. " MATCH ,User defined VLAN_TYPE field" line.long 0x04 "TX_PFC_PAUSE,Transmit PFC Pause Register" hexmask.long.byte 0x04 8.--15. 1. " VECTOR ,Priority vector pause size" hexmask.long.byte 0x04 0.--7. 1. " VECTOR_ENABLE ,Priority vector enable" line.long 0x08 "MASK_ADD1_BOTTOM,Specific Address Mask 1 Bottom Register" line.long 0x0C "MASK_ADD1_TOP,Specific Address Mask 1 Top Register" bitfld.long 0x0C 15. " ADDRESS_MASK[15] ,Priority vector enable" "Disabled,Enabled" bitfld.long 0x0C 14. " [14] ,Priority vector enable" "Disabled,Enabled" bitfld.long 0x0C 13. " [13] ,Priority vector enable" "Disabled,Enabled" bitfld.long 0x0C 12. " [12] ,Priority vector enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 11. " [11] ,Priority vector enable" "Disabled,Enabled" bitfld.long 0x0C 10. " [10] ,Priority vector enable" "Disabled,Enabled" bitfld.long 0x0C 9. " [9] ,Priority vector enable" "Disabled,Enabled" bitfld.long 0x0C 8. " [8] ,Priority vector enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 7. " [7] ,Priority vector enable" "Disabled,Enabled" bitfld.long 0x0C 6. " [6] ,Priority vector enable" "Disabled,Enabled" bitfld.long 0x0C 5. " [5] ,Priority vector enable" "Disabled,Enabled" bitfld.long 0x0C 4. " [4] ,Priority vector enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 3. " [3] ,Priority vector enable" "Disabled,Enabled" bitfld.long 0x0C 2. " [2] ,Priority vector enable" "Disabled,Enabled" bitfld.long 0x0C 1. " [1] ,Priority vector enable" "Disabled,Enabled" bitfld.long 0x0C 0. " [0] ,Priority vector enable" "Disabled,?..." line.long 0x10 "DMA_ADDR_OR_MASK,Receive DMA Data Buffer Address Mask Register" bitfld.long 0x10 28.--31. " MASK_VALUE ,Data buffer address mask value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x10 3. " MASK_ENABLE[3] ,AHB/AXI address bit 31 access force" "Not forced,Forced" bitfld.long 0x10 2. " [2] ,AHB/AXI address bit 30 access force" "Not forced,Forced" bitfld.long 0x10 1. " [1] ,AHB/AXI address bit 29 access force" "Not forced,Forced" bitfld.long 0x10 0. " [0] ,AHB/AXI address bit 28 access force" "Not forced,Forced" line.long 0x14 "RX_PTP_UNICAST,PTP RX Unicast IP Destination Address Register" line.long 0x18 "TX_PTP_UNICAST,PTP TX Unicast IP Destination Address Register" line.long 0x1C "TSU_NSEC_CMP,TSU Timer Comparison Value Nanoseconds Register" hexmask.long.tbyte 0x1C 0.--21. 1. " COMPARISON_VALUE ,TSU timer comparison value" group.long 0xE0++0x07 line.long 0x00 "TSU_SEC_CMP,TSU Timer Comparison Value Seconds Register" line.long 0x04 "TSU_MSB_SEC_CMP,TSU Timer Comparison Value Seconds Register" hexmask.long.word 0x04 0.--15. 1. " COMPARISON_VALUE ,TSU timer comparison value" rgroup.long 0xE8++0x0F line.long 0x00 "TSU_PTP_TX_MSB_SEC,PTP Event Frame Transmitted Seconds Register" hexmask.long.word 0x00 0.--15. 1. " TIMER_SECONDS ,PTP event frame TX seconds" line.long 0x04 "TSU_PTP_RX_MSB_SEC,PTP Event Frame Received Seconds Register" hexmask.long.word 0x04 0.--15. 1. " TIMER_SECONDS ,PTP event frame RX seconds" line.long 0x08 "TSU_PEER_TX_MSB_SEC,PTP Peer Event Frame Transmitted Seconds Register" hexmask.long.word 0x08 0.--15. 1. " TIMER_SECONDS ,PTP peer event frame TX seconds" line.long 0x0C "TSU_PEER_RX_MSB_SEC,PTP Peer Event Frame Received Seconds Register" hexmask.long.word 0x0C 0.--15. 1. " TIMER_SECONDS ,PTP peer event frame RX seconds" group.long 0xF8++0x03 line.long 0x00 "DPRAM_FILL_DBG,The Fill Levels For The TX & RX Packet Buffers Register" hexmask.long.word 0x00 16.--31. 1. " DMA_TX_RX_FILL_LEVEL ,TX or RX packet buffer fill level" bitfld.long 0x00 4.--7. " DMA_TX_Q_FILL_LEVEL_SELECT ,TX queue fill level select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 0. " DMA_TX_RX_FILL_LEVEL_SELECT ,TX/RX fill level select" "0,1" rgroup.long 0xFC++0x03 line.long 0x00 "REVISION_REG,Module Identification Number And Module Revision Register" bitfld.long 0x00 28.--31. " FIX_NUMBER ,Fix number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 16.--27. 1. " MODULE_ID_NUMBER ,Module identification number" hexmask.long.word 0x00 0.--15. 1. " MODULE_REVISION ,Module revision" hgroup.long 0x100++0x03 hide.long 0x00 "OCTETS_TXED_BOTTOM,Transmitted Octets In Frame Without Errors Register" textfld " " in hgroup.long 0x104++0x03 hide.long 0x00 "OCTETS_TXED_TOP,Octets Transmitted Register" textfld " " in textline " " group.long 0x108++0x17 line.long 0x00 "FRAMES_TXED_OK,Frames Transmitted Without Error" line.long 0x04 "BROADCAST_TXED,Broadcast Frames Transmitted Without Error Register" line.long 0x08 "MULTICAST_TXED,Multicast Frames Transmitted Without Error Register" line.long 0x0C "PAUSE_FRAMES_TXED,Pause Frames Transmitted" hexmask.long.word 0x0C 0.--15. 1. " COUNT ,Transmitted pause frames register" line.long 0x10 "FRAMES_TXED_64,64 Byte Frames Transmitted Register" line.long 0x14 "FRAMES_TXED_65,65 To 127 Byte Frames Transmitted Register" group.long 0x120++0x1F line.long 0x00 "FRAMES_TXED_128,128 To 255 Byte Frames Transmitted Register" line.long 0x04 "FRAMES_TXED_256,256 To 511 Byte Frames Transmitted Register" line.long 0x08 "FRAMES_TXED_512,512 To 1023 Byte Frames Transmitted Register" line.long 0x0C "FRAMES_TXED_1024,1024 To 1518 Byte Frames Transmitted Register" line.long 0x10 "FRAMES_TXED_1519,Greater Than 1518 Byte Frames Transmitted Register" line.long 0x14 "TX_UNDERRUNS,Transmit Under Runs Register" hexmask.long.word 0x14 0.--9. 1. " COUNT ,Transmit under runs" line.long 0x18 "SINGLE_COLLISIONS,Single Collision Frames Register" hexmask.long.tbyte 0x18 0.--17. 1. " COUNT ,Single collision frames register" line.long 0x1C "MULTIPLE_COLLISIONS,Multiple Collision Frames" hexmask.long.tbyte 0x1C 0.--17. 1. " COUNT ,Multiple collision frames register" group.long 0x140++0x1F line.long 0x00 "EXCESSIVE_COLLISIONS,Excessive Collisions Register" hexmask.long.word 0x00 0.--9. 1. " COUNT ,Excessive collisions" line.long 0x04 "LATE_COLLISIONS,Late Collisions Register" hexmask.long.word 0x04 0.--9. 1. " COUNT ,Late collisions" line.long 0x08 "DEFERRED_FRAMES,Deferred Transmission Frames Register" hexmask.long.tbyte 0x08 0.--17. 1. " COUNT ,Deferred transmission frames" line.long 0x0C "CRS_ERRORS,Carrier Sense Errors Register" hexmask.long.word 0x0C 0.--9. 1. " COUNT ,Carrier sense errors" line.long 0x10 "OCTETS_RXED_BOTTOM,Octets Received Register" line.long 0x14 "OCTETS_RXED_TOP,Octets Received" hexmask.long.word 0x14 0.--15. 1. " COUNT ,Received octets in frame without errors" line.long 0x18 "FRAMES_RXED_OK,Frames Received Register" line.long 0x1C "BROADCAST_RXED,Broadcast Frames Received Register" group.long 0x160++0x1F line.long 0x00 "MULTICAST_RXED,Multicast Frames Received Register" line.long 0x04 "PAUSE_FRAMES_RXED,Received Pause Frames Register" hexmask.long.word 0x04 0.--15. 1. " COUNT ,Received pause frames" line.long 0x08 "FRAMES_RXED_64,64 Byte Frames Received Register" line.long 0x0C "FRAMES_RXED_65,65 To 127 Byte Frames Received Register" line.long 0x10 "FRAMES_RXED_128,128 To 255 Byte Frames Received Register" line.long 0x14 "FRAMES_RXED_256,256 To 511 Byte Frames Received Register" line.long 0x18 "FRAMES_RXED_512,512 To 1023 Byte Frames Received Register" line.long 0x1C "FRAMES_RXED_1024,1024 To 1518 Byte Frames Received Register" group.long 0x180++0x1F line.long 0x00 "FRAMES_RXED_1519,1519 To Maximum Byte Frames Received Register" line.long 0x04 "UNDERSIZE_FRAMES,Undersized Frames Received Register" hexmask.long.word 0x04 0.--9. 1. " COUNT ,Undersize frames received" line.long 0x08 "EXCESSIVE_RX_LENGTH,Oversize Frames Received Register" hexmask.long.word 0x08 0.--9. 1. " COUNT ,Oversize frames received" line.long 0x0C "RX_JABBERS,Jabbers Received Register" hexmask.long.word 0x0C 0.--9. 1. " COUNT ,Jabbers received" line.long 0x10 "FCS_ERRORS,Frame Check Sequence Errors Register" hexmask.long.word 0x10 0.--9. 1. " COUNT ,Frame check sequence errors" line.long 0x14 "RX_LENGTH_ERRORS,Length Field Frame Errors Register" hexmask.long.word 0x14 0.--9. 1. " COUNT ,Length field frame errors" line.long 0x18 "RX_SYMBOL_ERRORS,Receive Symbol Error Registers" hexmask.long.word 0x18 0.--9. 1. " COUNT ,Receive symbol errors" line.long 0x1C "ALIGNMENT_ERRORS,Alignment Errors Register" hexmask.long.word 0x1C 0.--9. 1. " COUNT ,Alignment errors" group.long 0x1A0++0x17 line.long 0x00 "RX_RESOURCE_ERRORS,Receive Resource Errors Register" hexmask.long.tbyte 0x00 0.--17. 1. " COUNT ,Receive resource errors" line.long 0x04 "RX_OVERRUNS,Receive Overruns Register" hexmask.long.word 0x04 0.--9. 1. " COUNT ,Receive overruns" line.long 0x08 "RX_IP_CK_ERRORS,IP Header Checksum Errors Register" hexmask.long.byte 0x08 0.--7. 1. " COUNT ,IP header checksum errors" line.long 0x0C "RX_TCP_CK_ERRORS,TCP Checksum Errors Register" hexmask.long.byte 0x0C 0.--7. 1. " COUNT ,TCP checksum errors" line.long 0x10 "RX_UDP_CK_ERRORS,UDP Checksum Errors Register" hexmask.long.byte 0x10 0.--7. 1. " COUNT ,UDP checksum errors" line.long 0x14 "AUTO_FLUSHED_PKTS,Receive DMA Flushed Packets Register" hexmask.long.word 0x14 0.--15. 1. " COUNT ,Receive DMA flushed packets" group.long 0x1BC++0x07 line.long 0x00 "TSU_TIMER_INCR_SUB_NSEC,1588 Timer Increment Register SUB NSEC Register" hexmask.long.byte 0x00 24.--31. 1. " SUB_NS_INCR_LSB ,Bits [7:0] of timer increment sub nsec" hexmask.long.word 0x00 0.--15. 1. " SUB_NS_INCR ,Bits [23:8] of timer increment sub nsec" line.long 0x04 "TSU_TIMER_MSB_SEC,1588 Timer Seconds Register" hexmask.long.word 0x04 0.--15. 1. " TIMER ,TSU timer value (S)" rgroup.long 0x1C4++0x03 line.long 0x00 "TSU_STROBE_MSB_SEC,1588 Timer Sync Strobe Seconds Register" hexmask.long.word 0x00 0.--15. 1. " STROBE ,1588 timer sync strobe seconds" rgroup.long 0x1C8++0x07 line.long 0x00 "TSU_STROBE_SEC,1588 Timer Sync Strobe Seconds Register" line.long 0x04 "TSU_STROBE_NSEC,1588 Timer Sync Strobe Nanoseconds Register" hexmask.long 0x04 0.--29. 1. " STROBE ,1588 timer sync strobe nanoseconds" group.long 0x1D0++0x07 line.long 0x00 "TSU_TIMER_SEC,1588 Timer Seconds Register" line.long 0x04 "TSU_TIMER_NSEC,1588 Timer Nanoseconds Register" hexmask.long 0x04 0.--29. 1. " TIMER ,Timer count in nanoseconds" textline " " wgroup.long 0x1D8++0x03 line.long 0x00 "TSU_TIMER_ADJUST,TSU Timer Adjust Register" bitfld.long 0x00 31. " ADD_SUBTRACT ,Write as one to subtract from the 1588 timer" "Add,Subtract" hexmask.long 0x00 0.--29. 1. " INCREMENT_VALUE ,Timer increment value" group.long 0x1DC++0x03 line.long 0x00 "TSU_TIMER_INCR,1588 Timer Increment Register" hexmask.long.byte 0x00 16.--23. 1. " NUM_INCS ,The number of increments after which the alternative increment is used" hexmask.long.byte 0x00 8.--15. 1. " ALT_NS_INCR ,Alternative nanoseconds count" hexmask.long.byte 0x00 0.--7. 1. " NUM_INCR ,A count of nanoseconds by which the 1588 timer nanoseconds register will be incremented each clock cycle" rgroup.long 0x1E0++0x1F line.long 0x00 "TSU_PTP_TX_SEC,PTP Event Frame Transmitted Seconds Register" line.long 0x04 "TSU_PTP_TX_NSEC,PTP Event Frame Transmitted Nanoseconds Register" hexmask.long 0x04 0.--29. 1. " TIMER ,PTP event frame transmitted nanoseconds" line.long 0x08 "TSU_PTP_RX_SEC,PTP Event Frame Received Seconds Register" line.long 0x0C "TSU_PTP_RX_NSEC,PTP Event Frame Received Nanoseconds Register" hexmask.long 0x0C 0.--29. 1. " TIMER ,PTP event frame transmitted nanoseconds" line.long 0x10 "TSU_PEER_TX_SEC,PTP Peer Event Frame Transmitted Seconds Register" line.long 0x14 "TSU_PEER_TX_NSEC,PTP Peer Event Frame Transmitted Nanoseconds Register" hexmask.long 0x14 0.--29. 1. " TIMER ,PTP peer event frame transmitted nanoseconds" line.long 0x18 "TSU_PEER_RX_SEC,PTP Peer Event Frame Received Seconds Register" line.long 0x1C "TSU_PEER_RX_NSEC,PTP Peer Event Frame Received Nanoseconds Register" hexmask.long 0x1C 0.--29. 1. " TIMER ,PTP peer event frame received nanoseconds" group.long 0x200++0x03 line.long 0x00 "PCS_CONTROL,PSC Control Register" bitfld.long 0x00 15. " PCS_SOFTWARE_RESET ,PCS software reset" "No effect,Reset" bitfld.long 0x00 14. " LOOPBACK_MODE ,Loopback mode" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " ENABLE_AUTO_NEG ,Enable auto-negotiation" "Disabled,Enabled" bitfld.long 0x00 9. " RESTART_AUTO_NEG ,Restart auto-negotiation" "No effect,Reset" textline " " bitfld.long 0x00 8. " MAC_DUPLEX_STATE ,MAC duplex state" "0,1" bitfld.long 0x00 7. " COLLISION_TEST ,Collision test" "No collision,Collision" textline " " bitfld.long 0x00 6. 13. " SPEED_SELECT_BIT ,Speed select" ",1000 mbps,?..." textline " " hgroup.long 0x204++0x03 hide.long 0x00 "PCS_STATUS,PCS General Status Information Register" textfld " " in textline " " rgroup.long 0x208++0x07 line.long 0x00 "PCS_PHY_TOP_ID,Upper 16-bits Of The Phy's Identification Code Register" hexmask.long.word 0x00 0.--15. 1. " ID_CODE ,Upper 16-bits of the PHY identification code" line.long 0x04 "PCS_PHY_BOT_ID,Lower 16-bits Of The Phy's Identification Code Register" hexmask.long.word 0x04 0.--15. 1. " ID_CODE ,Lower 16-bits of the PHY identification code" group.long 0x210++0x03 line.long 0x00 "PCS_AN_ADV,Transmit Base Page Of The GEM PCS Capabilities Register" bitfld.long 0x00 15. " NEXT_PAGE ,Next page" "Not required,Required" bitfld.long 0x00 12.--13. " REMOTE_FAULT ,Remote fault" "No error,Link failure,Off line,Auto-negation error" textline " " bitfld.long 0x00 7.--8. " PAUSE ,Pause" "No pause,Symmetric,Asymmetric,Both" bitfld.long 0x00 6. " HALF_DUPLEX ,Half duplex support" "Not supported,Supported" textline " " bitfld.long 0x00 5. " FULL_DUPLEX ,Full duplex support" "Not supported,Supported" if ((d.l(ad:0xFF0D0000+0x04)&0x8000000)==0x8000000) rgroup.long 0x214++0x03 line.long 0x00 "PCS_AN_LP_BASE,Link Partner's Base Page Received Information Register" bitfld.long 0x00 15. " LPNPS ,Link status" "Link down,Link up" bitfld.long 0x00 14. " LPA ,Link partner acknowledge" "Not successful,Successful" textline " " bitfld.long 0x00 12. " LPRFDM ,Link partner remote fault duplex mode" "Half duplex,Full duplex" textline " " bitfld.long 0x00 10.--11. " SPEED ,Speed" "10 mbps bit,100mbps,1000 mbps,?..." else rgroup.long 0x214++0x03 line.long 0x00 "PCS_AN_LP_BASE,Link Partner's Base Page Received Information Register" bitfld.long 0x00 15. " LPNPS ,Link partner next page" "Not exchange,Exchange" bitfld.long 0x00 14. " LPA ,Link partner acknowledge" "Not successful,Successful" textline " " bitfld.long 0x00 12.--13. " LPRFDM ,Link partner remote fault" "No error,Link failure,Off line,Auto-negotiation error" bitfld.long 0x00 7.--8. " PAUSE ,Pause" "No pause,Symmetric pause,Asymmetric pause,Both" textline " " bitfld.long 0x00 6. " LPHD ,Link partner half duplex" "Not supported,Supported" bitfld.long 0x00 5. " LPFD ,Link partner full duplex" "Not supported,Supported" endif rgroup.long 0x218++0x03 line.long 0x00 "PCS_AN_EXP,Auto-negotiation Next Page Ability And Page Received Information Register" bitfld.long 0x00 2. " NPC ,Next page capability" "Not supported,Supported" bitfld.long 0x00 1. " PR ,Page received" "Not received,Received" group.long 0x21C++0x03 line.long 0x00 "PCS_AN_NP_TX,Transmit The Next Page Information For The GEM PCS Register" bitfld.long 0x00 15. " NPTT ,Next page to transmit" "Last page,Not last" bitfld.long 0x00 13. " MPI ,Message page indicator" "Unformatted,Message" textline " " bitfld.long 0x00 12. " ACKNOWLEDGE_2 ,GEM PCS has the ability to comply with the last received message" "Not able,Able" hexmask.long.word 0x00 0.--10. 1. " MESSAGE ,Contains data as defined by the message page indicator bit" rgroup.long 0x220++0x03 line.long 0x00 "PCS_AN_LP_NP,Next Page Received Information From The Link Partner Register" bitfld.long 0x00 15. " NPTR ,Next page to receive" "Last page,Not last" bitfld.long 0x00 14. " ACKNOWLEDGE ,Link partner has successfully received the last message transmitted" "Not successful,Successful" textline " " bitfld.long 0x00 13. " MPI ,Message page indicator" "Unformatted,Message" bitfld.long 0x00 12. " ACKNOWLEDGE_2 ,Link partner has the ability to comply with the last message received" "Not able,Able" textline " " bitfld.long 0x00 11. " TOGGLE ,Toggle every received page" "Not toggle,Toggle" hexmask.long.word 0x00 0.--10. 1. " MESSAGE ,Contains data as defined by the message page indicator bit" rgroup.long 0x23C++0x03 line.long 0x00 "PCS_AN_EXT_STATUS,PCS auto-negotiation Extended Status Information Register" bitfld.long 0x00 15. " FD_1000BASE_X ,Full duplex 1000BASE-X" "Not supported,Supported" bitfld.long 0x00 14. " HD_1000BASE_X ,Half duplex 1000BASE-X" "Not supported,Supported" textline " " bitfld.long 0x00 13. " FD_1000BASE_T ,Full duplex 1000BASE-T" "Not supported,Supported" bitfld.long 0x00 12. " HD_1000BASE_T ,Half duplex 1000BASE-T" "Not supported,Supported" textline " " hgroup.long 0x270++0x07 hide.long 0x00 "RX_LPI,Received LPI Transitions Register" textfld " " in hide.long 0x04 "RX_LPI_TIME,Received LPI Time Register" textfld " " in group.long 0x278++0x03 line.long 0x00 "TX_LPI,Transmit LPI Transitions Register" hexmask.long.word 0x00 0.--15. 1. " COUNT ,Count of LPI transmissions" hgroup.long 0x27C++0x03 hide.long 0x00 "TX_LPI_TIME,Transmit LPI Time Register" textfld " " in textline " " rgroup.long 0x280++0x0B line.long 0x00 "DESIGNCFG_DEBUG1,Design Configuration Register 1" bitfld.long 0x00 28.--31. " AXI_CACHE_VALUE ,Takes the value of the GEM_AXI_CACHE_VALUE define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 25.--27. " DMA_BUS_WIDTH ,Takes the value of the GEM_DMA_BUS_WIDTH define" "0,1,2,3,4,5,6,7" bitfld.long 0x00 23. " IRQ_READ_CLEAR ,Takes the value of the GEM_IRQ_READ_CLEAR define" "0,1" textline " " bitfld.long 0x00 22. " NO_SNAPSHOT ,Takes the value of the GEM_NO_SNAPSHOT define" "0,1" bitfld.long 0x00 21. " NO_STATS ,Takes the value of the GEM_NO_STATS define" "0,1" bitfld.long 0x00 20. " NO_SCAN_PINS ,Takes the value of the GEM_NO_SCAN_PINS define" "0,1" textline " " bitfld.long 0x00 15.--19. " USER_IN_WIDTH ,Takes the value of the GEM_USER_IN_WIDTH define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 10.--14. " USER_OUT_WIDTH ,Takes the value of the GEM_USER_OUT_WIDTH define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 9. " USER_IO ,Takes the value of the GEM_USER_IO define" "0,1" textline " " bitfld.long 0x00 8. " APB_REV2 ,Takes the value of the GEM_APB_REV2 define" "0,1" bitfld.long 0x00 7. " APB_REV1 ,Takes the value of the GEM_APB_REV1 define" "0,1" bitfld.long 0x00 6. " EXT_FIFO_INTERFACE ,Takes the value of the GEM_EXT_FIFO_INTERFACE define" "0,1" textline " " bitfld.long 0x00 5. " NO_INT_LOOPBACK ,Takes the value of the GEM_NO_INT_LOOPBACK define" "0,1" bitfld.long 0x00 4. " INT_LOOPBACK ,Takes the value of the GEM_INT_LOOPBACK define" "0,1" bitfld.long 0x00 3. " TDC_50 ,Takes the value of the TDC_50 define" "0,1" textline " " bitfld.long 0x00 2. " RDC_50 ,Takes the value of the RDC_50 define" "0,1" bitfld.long 0x00 1. " SERDES ,Takes the value of the GEM_SERDES define" "0,1" bitfld.long 0x00 0. " NO_PCS ,Takes the value of the GEM_NO_PCS define" "0,1" line.long 0x04 "DESIGNCFG_DEBUG2,Design Configuration Register 2" bitfld.long 0x04 31. " SPRAM ,Takes the value of the GEM_SPRAM define" "0,1" bitfld.long 0x04 30. " AXI ,Takes the value of the GEM_AXI define" "0,1" bitfld.long 0x04 26.--29. " TX_PBUF_ADDR ,Takes the value of the GEM_TX_PBUF_ADDR define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 22.--25. " RX_PBUF_ADDR ,Takes the value of the GEM_RX_PBUF_ADDR define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 21. " TX_PKT_BUFFER ,Takes the value of the GEM_TX_PKT_BUFFER define" "0,1" bitfld.long 0x04 20. " RX_PKT_BUFFER ,Takes the value of the GEM_RX_PKT_BUFFER define" "0,1" textline " " bitfld.long 0x04 16.--19. " HPROT_VALUE ,Takes the value of the GEM_HPROT_VALUE define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x04 0.--15. 1. " JUMBO_MAX_LENGTH ,Takes the value of the gem_jumbo_max_length define" line.long 0x08 "DESIGNCFG_DEBUG3,Design Configuration Register 3" bitfld.long 0x08 24.--29. " NUM_SPEC_ADD_FILTERS ,Takes the value of the NUM_SPEC_ADD_FILTERS define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" rgroup.long 0x290++0x17 line.long 0x00 "DESIGNCFG_DEBUG5,Design Configuration Register 5" bitfld.long 0x00 29.--31. " AXI_PROT_VALUE ,Takes the value of the GEM_AXI_PROT_VALUE define" "0,1,2,3,4,5,6,7" bitfld.long 0x00 28. " TSU_CLK ,Takes the value of the GEM_TSU_CLK define" "0,1" hexmask.long.byte 0x00 20.--27. 1. " RX_BUFFER_LENGTH_DEF ,Takes the value of the GEM_RX_BUFFER_LENGTH_DEF define" textline " " bitfld.long 0x00 19. " TX_PBUF_SIZE_DEF ,Takes the value of the GEM_TX_PBUF_SIZE_DEF define" "0,1" bitfld.long 0x00 17.--18. " RX_PBUF_SIZE_DEF ,Takes the value of the GEM_RX_PBUF_SIZE_DEF define" "0,1,2,3" bitfld.long 0x00 15.--16. " ENDIAN_SWAP_DEF ,Takes the value of the GEM_ENDIAN_SWAP_DEF define" "0,1,2,3" textline " " bitfld.long 0x00 12.--14. " MDC_CLOCK_DIV ,Takes the value of the GEM_MDC_CLOCK_DIV define" "0,1,2,3,4,5,6,7" bitfld.long 0x00 10.--11. " DMA_BUS_WIDTH_DEF ,Takes the value of the GEM_DMA_BUS_WIDTH_DEF define" "0,1,2,3" bitfld.long 0x00 9. " PHY_IDENT ,Takes the value of the GEM_PHY_IDENT define" "0,1" textline " " bitfld.long 0x00 8. " TSU ,Takes the value of the GEM_TSU define" "0,1" bitfld.long 0x00 4.--7. " TX_FIFO_CNT_WIDTH ,Takes the value of the GEM_TX_FIFO_CNT_WIDTH define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " RX_FIFO_CNT_WIDTH ,Takes the value of the GEM_RX_FIFO_CNT_WIDTH define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " line.long 0x04 "DESIGNCFG_DEBUG6,Design Configuration Register 6" bitfld.long 0x04 25. " PBUF_CUTTHRU ,Takes the value of the GEM_PBUF_CUTTHRU define" "0,1" bitfld.long 0x04 24. " PFC_MULTI_QUANTUM ,Takes the value of the GEM_PFC_MULTI_QUANTUM define" "0,1" bitfld.long 0x04 23. " DMA_ADDR_WIDTH_IS_64B ,Takes the value of the GEM_DMA_ADDR_WIDTH_IS_64B define" "0,1" textline " " bitfld.long 0x04 22. " HOST_IF_SOFT_SELECT ,Takes the value of the GEM_HOST_IF_SOFT_SELECT define" "0,1" bitfld.long 0x04 21. " TX_ADD_FIFO_IF ,Takes the value of the GEM_TX_ADD_FIFO_IF define" "0,1" bitfld.long 0x04 20. " EXT_TSU_TIMER ,Takes the value of the GEM_EXT_TSU_TIMER define" "0,1" textline " " bitfld.long 0x04 16.--19. " TX_PBUF_QUEUE_SEGMENT_SIZE ,Takes the value of the GEM_TX_PBUF_QUEUE_SEGMENT_SIZE define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 15. " DMA_PRIORITY_QUEUE[15] ,Takes the value of the DMA_PRIORITY_QUEUE15 define" "0,1" bitfld.long 0x04 14. " [14] ,Takes the value of the DMA_PRIORITY_QUEUE14 define" "0,1" bitfld.long 0x04 13. " [13] ,Takes the value of the DMA_PRIORITY_QUEUE13 define" "0,1" textline " " bitfld.long 0x04 12. " [12] ,Takes the value of the DMA_PRIORITY_QUEUE12 define" "0,1" bitfld.long 0x04 11. " [11] ,Takes the value of the DMA_PRIORITY_QUEUE11 define" "0,1" bitfld.long 0x04 10. " [10] ,Takes the value of the DMA_PRIORITY_QUEUE10 define" "0,1" textline " " bitfld.long 0x04 9. " [9] ,Takes the value of the DMA_PRIORITY_QUEUE9 define" "0,1" bitfld.long 0x04 8. " [8] ,Takes the value of the DMA_PRIORITY_QUEUE8 define" "0,1" bitfld.long 0x04 7. " [7] ,Takes the value of the DMA_PRIORITY_QUEUE7 define" "0,1" textline " " bitfld.long 0x04 6. " [6] ,Takes the value of the DMA_PRIORITY_QUEUE6 define" "0,1" bitfld.long 0x04 5. " [5] ,Takes the value of the DMA_PRIORITY_QUEUE5 define" "0,1" bitfld.long 0x04 4. " [4] ,Takes the value of the DMA_PRIORITY_QUEUE4 define" "0,1" textline " " bitfld.long 0x04 3. " [3] ,Takes the value of the DMA_PRIORITY_QUEUE3 define" "0,1" bitfld.long 0x04 2. " [2] ,Takes the value of the DMA_PRIORITY_QUEUE2 define" "0,1" bitfld.long 0x04 1. " [1] ,Takes the value of the DMA_PRIORITY_QUEUE1 define" "0,1" line.long 0x08 "DESIGNCFG_DEBUG7,Design Configuration Register 7" bitfld.long 0x08 28.--31. " TX_PBUF_NUM_SEGMENTS_Q[7] ,Takes the value of the GEM_TX_PBUF_NUM_SEGMENTS_QUEUE7 define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 24.--27. " [6] ,Takes the value of the GEM_TX_PBUF_NUM_SEGMENTS_QUEUE6 define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 20.--23. " [5] ,Takes the value of the GEM_TX_PBUF_NUM_SEGMENTS_QUEUE5 define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x08 16.--19. " [4] ,Takes the value of the GEM_TX_PBUF_NUM_SEGMENTS_QUEUE4 define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 12.--15. " [3] ,Takes the value of the GEM_TX_PBUF_NUM_SEGMENTS_QUEUE3 define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 8.--11. " [2] ,Takes the value of the GEM_TX_PBUF_NUM_SEGMENTS_QUEUE2 define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x08 4.--7. " [1] ,Takes the value of the GEM_TX_PBUF_NUM_SEGMENTS_Q1 define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--3. " [0] ,Takes the value of the GEM_TX_PBUF_NUM_SEGMENTS_Q0 define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x0C "DESIGNCFG_DEBUG8,Design Configuration Register 8" hexmask.long.byte 0x0C 24.--31. 1. " NUM_TYPE1_SCREENERS ,Takes the value of the NUM_TYPE1_SCREENERS define" hexmask.long.byte 0x0C 16.--23. 1. " NUM_TYPE2_SCREENERS ,Takes the value of the NUM_TYPE2_SCREENERS define" textline " " hexmask.long.byte 0x0C 8.--15. 1. " NUM_SCR2_ETHTYPE_REGS ,Takes the value of the NUM_SCR2_ETHTYPE_REGS define" hexmask.long.byte 0x0C 0.--7. 1. " NUM_SCR2_COMPARE_REGS ,Takes the value of the NUM_SCR2_COMPARE_REGS define" line.long 0x10 "DESIGNCFG_DEBUG9,Design Configuration Register 9" bitfld.long 0x10 28.--31. " TX_PBUF_NUM_SEGMENTS_Q[15] ,Takes the value of the GEM_TX_PBUF_NUM_SEGMENTS_Q15 define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 24.--27. " [14] ,Takes the value of the GEM_TX_PBUF_NUM_SEGMENTS_Q14 define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 20.--23. " [13] ,Takes the value of the GEM_TX_PBUF_NUM_SEGMENTS_Q13 define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x10 16.--19. " [12] ,Takes the value of the GEM_TX_PBUF_NUM_SEGMENTS_Q12 define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 12.--15. " [11] ,Takes the value of the GEM_TX_PBUF_NUM_SEGMENTS_Q11 define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 8.--11. " [10] ,Takes the value of the GEM_TX_PBUF_NUM_SEGMENTS_Q10 define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x10 4.--7. " [9] ,Takes the value of the GEM_TX_PBUF_NUM_SEGMENTS_Q9 define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 0.--3. " [8] ,Takes the value of the GEM_TX_PBUF_NUM_SEGMENTS_Q8 define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " line.long 0x14 "DESIGNCFG_DEBUG10,Design Configuration Register 10" bitfld.long 0x14 28.--31. " EMAC_BUS_WIDTH ,Takes the value of the GEM_EMAC_BUS_WIDTH define" ",32bits,64bits,,128bits,?..." bitfld.long 0x14 24.--27. " TX_PBUF_DATA ,Takes the value of the GEM_TX_PBUF_DATA define" ",32bits,64bits,,128bits,?..." textline " " bitfld.long 0x14 20.--23. " RX_PBUF_DATA ,Takes the value of the GEM_RX_PBUF_DATA define" ",32bits,64bits,,128bits,?..." bitfld.long 0x14 16.--19. " AXI_ACCESS_PIPELINE_BITS ,Takes the value of the GEM_AXI_ACCESS_PIPELINE_BITS define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x14 12.--15. " AXI_TX_DESCR_RD_BUFF_BITS ,Takes the value of the GEM_AXI_TX_DESCR_RD_BUFF_BITS define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x14 8.--11. " AXI_RX_DESCR_RD_BUFF_BITS ,Takes the value of the GEM_AXI_RX_DESCR_RD_BUFF_BITS define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x14 4.--7. " AXI_TX_DESCR_WR_BUFF_BITS ,Takes the value of the GEM_AXI_TX_DESCR_WR_BUFF_BITS define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x14 0.--3. " AXI_RX_DESCR_WR_BUFF_BITS ,Takes the value of the GEM_AXI_RX_DESCR_WR_BUFF_BITS define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x400++0x03 line.long 0x00 "INT_Q1_STATUS,Priority Queue Interrupt Status Register" bitfld.long 0x00 11. " RESP_NOT_OK ,BRESP/HRESP not OK" "No occurred,Occurred" bitfld.long 0x00 10. " RO ,Receive overrun" "No occurred,Occurred" textline " " bitfld.long 0x00 7. " TC ,Transmit complete" "No occurred,Occurred" bitfld.long 0x00 6. " AMBA_ERROR ,Transmit frame corruption due to AMBA (Ahb/axi) error" "No occurred,Occurred" textline " " bitfld.long 0x00 5. " RLEORLC ,Retry limit exceeded or late collision" "No occurred,Occurred" bitfld.long 0x00 2. " RX_USED_READ ,RX used bit read" "No occurred,Occurred" textline " " bitfld.long 0x00 1. " RC ,Receive complete" "No occurred,Occurred" group.long 0x440++0x03 line.long 0x00 "TRANSMIT_Q1_PTR,Transmit Buffer Queue Base Address Register" hexmask.long 0x00 2.--31. 0x04 " DMA_TX_Q_PTR ,Transmit buffer queue base address" group.long 0x480++0x03 line.long 0x00 "RECEIVE_Q1_PTR,Receive Buffer Queue Base Address Register" hexmask.long 0x00 2.--31. 0x04 " DMA_RX_Q_PTR ,Receive buffer queue base address" group.long 0x4A0++0x03 line.long 0x00 "DMA_RXBUF_SIZE_Q1,Receive Buffer Queue Size" hexmask.long.byte 0x00 0.--7. 1. " DMA_RX_Q_BUF_SIZE ,DMA receive buffer size in system memory" group.long 0x4BC++0x1B line.long 0x00 "CBS_CONTROL,Enable credit-based Shaping Register" bitfld.long 0x00 1. " CBS_ENABLE_QUEUE_B ,Enable Credit-Based shaping on the 2nd highest priority queue (Queue B)" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " CBS_ENABLE_QUEUE_A ,Enable Credit-Based shaping on the highest priority queue (Queue A)" "Disabled,Enabled" line.long 0x04 "CBS_IDLESLOPE_Q_A,Idle/slope Value For Queue A In Bytes/sec Register" line.long 0x08 "CBS_IDLESLOPE_Q_B,Idle/slope Value For Queue B In Bytes/sec Register" line.long 0x0C "UPPER_TX_Q_BASE_ADDR,Upper 32 Bits Of Transmit Buffer Descriptor Queue Base Address" line.long 0x10 "TX_BD_CONTROL,TX BD Control Register" bitfld.long 0x10 4.--5. " TX_BD_TS_MODE ,TX descriptor timestamp insertion mode" "Disabled,PTP event frames only,All PTP frames only,All frames" line.long 0x14 "RX_BD_CONTROL,RX BD Control Register" bitfld.long 0x14 4.--5. " RX_BD_TS_MODE ,RX descriptor timestamp insertion mode" "Disabled,PTP event frames only,All PTP frames only,All frames" line.long 0x18 "UPPER_RX_Q_BASE_ADDR,Upper 32 Bits Of Receive Buffer Descriptor Queue Base Address Register" textline " " group.long 0x500++0x0F line.long 0x00 "SCREENING_TYPE_1_REG_0,Screening Type 1 Register 0" bitfld.long 0x00 29. " UPME ,UDP port match enable" "Disabled,Enabled" bitfld.long 0x00 28. " DETC_EN ,DS/TC enable" "Disabled,Enabled" hexmask.long.word 0x00 12.--27. 1. " UDP_PM ,UDP port match" textline " " hexmask.long.byte 0x00 4.--11. 1. " DSTC_MATCH ,DS/TC match" bitfld.long 0x00 0.--3. " QN ,Queue number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "SCREENING_TYPE_1_REG_1,Screening Type 1 Register 1" bitfld.long 0x04 29. " UPME ,UDP port match enable" "Disabled,Enabled" bitfld.long 0x04 28. " DETC_EN ,DS/TC enable" "Disabled,Enabled" hexmask.long.word 0x04 12.--27. 1. " UDP_PM ,UDP port match" textline " " hexmask.long.byte 0x04 4.--11. 1. " DSTC_MATCH ,DS/TC match" bitfld.long 0x04 0.--3. " QN ,Queue number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "SCREENING_TYPE_1_REG_2,Screening Type 1 Register 2" bitfld.long 0x08 29. " UPME ,UDP port match enable" "Disabled,Enabled" bitfld.long 0x08 28. " DETC_EN ,DS/TC enable" "Disabled,Enabled" hexmask.long.word 0x08 12.--27. 1. " UDP_PM ,UDP port match" textline " " hexmask.long.byte 0x08 4.--11. 1. " DSTC_MATCH ,DS/TC match" bitfld.long 0x08 0.--3. " QN ,Queue number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x0C "SCREENING_TYPE_1_REG_3,Screening Type 1 Register 3" bitfld.long 0x0C 29. " UPME ,UDP port match enable" "Disabled,Enabled" bitfld.long 0x0C 28. " DETC_EN ,DS/TC enable" "Disabled,Enabled" hexmask.long.word 0x0C 12.--27. 1. " UDP_PM ,UDP port match" textline " " hexmask.long.byte 0x0C 4.--11. 1. " DSTC_MATCH ,DS/TC match" bitfld.long 0x0C 0.--3. " QN ,Queue number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x540++0x0F line.long 0x00 "SCREENING_TYPE_2_REG_0,Screening Type 2 Register 0" bitfld.long 0x00 30. " COMPARE_C_EN ,Compare C enable" "Disabled,Enabled" bitfld.long 0x00 25.--29. " COMPARE_C ,Compare C - index to screener type 2 compare register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 24. " COMPARE_B_EN ,Compare B enable" "Disabled,Enabled" textline " " bitfld.long 0x00 19.--23. " COMPARE_B ,Compare B - index to screener type 2 compare register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 18. " COMPARE_A_EN ,Compare A enable" "Disabled,Enabled" bitfld.long 0x00 13.--17. " COMPARE_A ,Compare A - index to screener type 2 compare register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 12. " ETHERTYPE_EN ,Ethertype enable" "Disabled,Enabled" bitfld.long 0x00 9.--11. " INDEX ,Index to screener type 2 ethertype register" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8. " VLAN_EN ,VLAN enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4.--6. " VLAN_PRIORITY ,VLAN priority" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. " QUEUE_NUMBER ,Queue number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "SCREENING_TYPE_2_REG_1,Screening Type 2 Register 1" bitfld.long 0x04 30. " COMPARE_C_EN ,Compare C enable" "Disabled,Enabled" bitfld.long 0x04 25.--29. " COMPARE_C ,Compare C - index to screener type 2 compare register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 24. " COMPARE_B_EN ,Compare B enable" "Disabled,Enabled" textline " " bitfld.long 0x04 19.--23. " COMPARE_B ,Compare B - index to screener type 2 compare register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 18. " COMPARE_A_EN ,Compare A enable" "Disabled,Enabled" bitfld.long 0x04 13.--17. " COMPARE_A ,Compare A - index to screener type 2 compare register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x04 12. " ETHERTYPE_EN ,Ethertype enable" "Disabled,Enabled" bitfld.long 0x04 9.--11. " INDEX ,Index to screener type 2 ethertype register" "0,1,2,3,4,5,6,7" bitfld.long 0x04 8. " VLAN_EN ,VLAN enable" "Disabled,Enabled" textline " " bitfld.long 0x04 4.--6. " VLAN_PRIORITY ,VLAN priority" "0,1,2,3,4,5,6,7" bitfld.long 0x04 0.--3. " QUEUE_NUMBER ,Queue number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "SCREENING_TYPE_2_REG_2,Screening Type 2 Register 2" bitfld.long 0x08 30. " COMPARE_C_EN ,Compare C enable" "Disabled,Enabled" bitfld.long 0x08 25.--29. " COMPARE_C ,Compare C - index to screener type 2 compare register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x08 24. " COMPARE_B_EN ,Compare B enable" "Disabled,Enabled" textline " " bitfld.long 0x08 19.--23. " COMPARE_B ,Compare B - index to screener type 2 compare register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x08 18. " COMPARE_A_EN ,Compare A enable" "Disabled,Enabled" bitfld.long 0x08 13.--17. " COMPARE_A ,Compare A - index to screener type 2 compare register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x08 12. " ETHERTYPE_EN ,Ethertype enable" "Disabled,Enabled" bitfld.long 0x08 9.--11. " INDEX ,Index to screener type 2 ethertype register" "0,1,2,3,4,5,6,7" bitfld.long 0x08 8. " VLAN_EN ,VLAN enable" "Disabled,Enabled" textline " " bitfld.long 0x08 4.--6. " VLAN_PRIORITY ,VLAN priority" "0,1,2,3,4,5,6,7" bitfld.long 0x08 0.--3. " QUEUE_NUMBER ,Queue number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x0C "SCREENING_TYPE_2_REG_3,Screening Type 2 Register 3" bitfld.long 0x0C 30. " COMPARE_C_EN ,Compare C enable" "Disabled,Enabled" bitfld.long 0x0C 25.--29. " COMPARE_C ,Compare C - index to screener type 2 compare register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0C 24. " COMPARE_B_EN ,Compare B enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 19.--23. " COMPARE_B ,Compare B - index to screener type 2 compare register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0C 18. " COMPARE_A_EN ,Compare A enable" "Disabled,Enabled" bitfld.long 0x0C 13.--17. " COMPARE_A ,Compare A - index to screener type 2 compare register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x0C 12. " ETHERTYPE_EN ,Ethertype enable" "Disabled,Enabled" bitfld.long 0x0C 9.--11. " INDEX ,Index to screener type 2 ethertype register" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 8. " VLAN_EN ,VLAN enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 4.--6. " VLAN_PRIORITY ,VLAN priority" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 0.--3. " QUEUE_NUMBER ,Queue number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x640++0x03 line.long 0x00 "INT_Q1_MASK,Interrupt Mask Register" setclrfld.long 0x00 11. -0x20 11. -0x40 11. " MASKRNOI ,BRESP/HRESP not OK mask" "Not masked,Masked" setclrfld.long 0x00 10. -0x20 10. -0x40 10. " MASKROI ,Receive overrun mask" "Not masked,Masked" setclrfld.long 0x00 7. -0x20 7. -0x40 7. " MASKTCI ,Transmit complete mask" "Not masked,Masked" textline " " setclrfld.long 0x00 6. -0x20 6. -0x40 6. " MASKTFCDTAEI ,Transmit frame corruption due to AMBA (Ahb/axi) error mask" "Not masked,Masked" setclrfld.long 0x00 5. -0x20 5. -0x40 5. " MASKRLEOLCI ,Retry limit exceeded or late collision mask" "Not masked,Masked" setclrfld.long 0x00 2. -0x20 2. -0x40 2. " MASKRXUBRI ,RX used bit read mask" "Not masked,Masked" textline " " setclrfld.long 0x00 1. -0x20 1. -0x40 1. " MASKRCI ,Receive complete mask" "Not masked,Masked" group.long 0x6E0++0x0F line.long 0x00 "ST2ETREG0,Screening Type 2 Ethernet Type Register 0" hexmask.long.word 0x00 0.--15. 1. " COMPARE_VALUE ,Ethertype compare value" line.long 0x04 "ST2ETREG1,Screening Type 2 Ethernet Type Register 1" hexmask.long.word 0x04 0.--15. 1. " COMPARE_VALUE ,Ethertype compare value" line.long 0x08 "ST2ETREG2,Screening Type 2 Ethernet Type Register 2" hexmask.long.word 0x08 0.--15. 1. " COMPARE_VALUE ,Ethertype compare value" line.long 0x0C "ST2ETREG3,Screening Type 2 Ethernet Type Register 3" hexmask.long.word 0x0C 0.--15. 1. " COMPARE_VALUE ,Ethertype compare value" group.long 0x700++0x1F line.long 0x00 "TYPE2_COMPARE_0_WORD_0,Type2 Compare Word 0 Register" hexmask.long.word 0x00 16.--31. 1. " COMPARE_VALUE ,2 byte compare value" hexmask.long.word 0x00 0.--15. 1. " MASK_VALUE ,2 byte mask value" line.long 0x04 "TYPE2_COMPARE_0_WORD_1,Type2 Compare Word 1 Register" bitfld.long 0x04 7.--8. " COMPARE_OFFSET ,Compare byte offset" "Beginning,After ether type,End of IP header,End of TCP/UDP header" hexmask.long.byte 0x04 0.--6. 1. " OFFSET_VALUE ,Offset value in bytes" line.long 0x08 "TYPE2_COMPARE_1_WORD_0,Type2 Compare Word 0 Register" hexmask.long.word 0x08 16.--31. 1. " COMPARE_VALUE ,2 byte compare value" hexmask.long.word 0x08 0.--15. 1. " MASK_VALUE ,2 byte mask value" line.long 0x0C "TYPE2_COMPARE_1_WORD_1,Type2 Compare Word 1 Register" bitfld.long 0x0C 7.--8. " COMPARE_OFFSET ,Compare byte offset" "Beginning,After ether type,End of IP header,End of TCP/UDP header" hexmask.long.byte 0x0C 0.--6. 1. " OFFSET_VALUE ,Offset value in bytes" line.long 0x10 "TYPE2_COMPARE_2_WORD_0,Type2 Compare Word 0 Register" hexmask.long.word 0x10 16.--31. 1. " COMPARE_VALUE ,2 byte compare value" hexmask.long.word 0x10 0.--15. 1. " MASK_VALUE ,2 byte mask value" line.long 0x14 "TYPE2_COMPARE_2_WORD_1,Type2 Compare Word 1 Register" bitfld.long 0x14 7.--8. " COMPARE_OFFSET ,Compare byte offset" "Beginning,After ether type,End of IP header,End of TCP/UDP header" hexmask.long.byte 0x14 0.--6. 1. " OFFSET_VALUE ,Offset value in bytes" line.long 0x18 "TYPE2_COMPARE_3_WORD_0,Type2 Compare Word 0 Register" hexmask.long.word 0x18 16.--31. 1. " COMPARE_VALUE ,2 byte compare value" hexmask.long.word 0x18 0.--15. 1. " MASK_VALUE ,2 byte mask value" line.long 0x1C "TYPE2_COMPARE_3_WORD_1,Type2 Compare Word 1 Register" bitfld.long 0x1C 7.--8. " COMPARE_OFFSET ,Compare byte offset" "Beginning,After ether type,End of IP header,End of TCP/UDP header" hexmask.long.byte 0x1C 0.--6. 1. " OFFSET_VALUE ,Offset value in bytes" width 0x0B tree.end tree "GEM3" base ad:0xFF0E0000 width 26. group.long 0x00++0x07 line.long 0x00 "NETWORK_CONTROL,General MAC Control Functions For Both Receiver And Transmitter Register" bitfld.long 0x00 24. " OSSM ,1588 one step sync mode" "Disabled,Enabled" bitfld.long 0x00 23. " ETPE ,External TSU timer port enable" "Disabled,Enabled" bitfld.long 0x00 22. " SUO ,Store UDP/TCP offset to memory" "Normal,UDP/TCP" textline " " bitfld.long 0x00 21. " ASM ,Alternative SGMII mode" "Disabled,Enabled" bitfld.long 0x00 20. " PUE ,Enable detection of unicast PTP" "Disabled,Enabled" bitfld.long 0x00 19. " TLE ,Enable LPI transmission when set LPI (Low power idle) is immediately transmitted" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " FRPP ,Flush the next packet from the external RX DPRAM" "No effect,Flushed" bitfld.long 0x00 17. " TPPBPF ,Write a one to transmit PFC priority based pause frame" "Disabled,Transmitted" bitfld.long 0x00 16. " PFC_EN ,Enable PFC priority based pause reception capabilities" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " SRT ,Store receive time stamp to memory" "Normal,Replaced" bitfld.long 0x00 12. " TPFZ ,Transmit zero quantum pause frame" "No effect,Transmitted" bitfld.long 0x00 11. " TPFR ,Transmit pause frame" "No effect,Transmitted" textline " " bitfld.long 0x00 10. " TXP ,Transmit halt" "Not halted,Halted" bitfld.long 0x00 9. " TSP ,Start transmission" "No effect,Start" bitfld.long 0x00 8. " BP ,Back pressure" "Not forced,Forced" textline " " bitfld.long 0x00 7. " SWE ,Write enable for statistic registers" "Disabled,Enabled" bitfld.long 0x00 6. " IASR ,Incremental statistics registers" "Not incremented,Incremented" bitfld.long 0x00 5. " CASR ,Clear statistics registers" "No effect,Clear" textline " " bitfld.long 0x00 4. " MANPEN ,Management port enable" "Disabled,Enabled" bitfld.long 0x00 3. " EN_TRANSMIT ,Transmit enable" "Disabled,Enabled" bitfld.long 0x00 2. " EN_RECEIVE ,Receive enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " LOOPBACK_LOCAL ,Loopback local" "Not asserted,Asserted" bitfld.long 0x00 0. " LOOPBACK ,Controls the loopback output pin" "Low,High" line.long 0x04 "NETWORK_CONFIG,Network Configuration Register" bitfld.long 0x04 31. " UDE ,Uni direction enable" "Disabled,Enabled" bitfld.long 0x04 30. " IIRE ,Ignore IPG RX_ER" "Not ignored,Ignored" bitfld.long 0x04 29. " NSP_CHANGE ,Receive bad preamble" "Rejected,Not rejected" textline " " bitfld.long 0x04 28. " ISE ,IPG stretch enable" "Disabled,Enabled" bitfld.long 0x04 27. " SME ,SGMII mode enable" "Disabled,Enabled" bitfld.long 0x04 26. " IRF ,Ignore RX FCS" "Rejected,Not rejected" textline " " bitfld.long 0x04 25. " EHDRX ,Enable frames to by received in half-duplex mode" "Disabled,Enabled" bitfld.long 0x04 24. " RCOE ,Receive checksum offload enable" "Disabled,Enabled" bitfld.long 0x04 23. " DISCOPF ,Disable copy of pause frames" "No,Yes" textline " " bitfld.long 0x04 21.--22. " DBW ,Data bus width" "32 bits,64 bits,?..." bitfld.long 0x04 18.--20. " MCD ,MDC clock division" "/8,/16,/32,/48,/64,/96,/128,/224" bitfld.long 0x04 17. " FCSREM ,FCS remove" "Without last 4 bytes,With 4 bytes" textline " " bitfld.long 0x04 16. " LFEFD ,Length field error frame discard" "Disabled,Enabled" bitfld.long 0x04 14.--15. " RBO ,Receive buffer offset" "0,1,2,3" bitfld.long 0x04 13. " PAUSE_EN ,Pause enable" "Not paused,Paused" textline " " bitfld.long 0x04 12. " RETRY_TEST ,Retry test" "Disabled,Enabled" bitfld.long 0x04 11. " PSC_SELECT ,PCS select" "GMII/MII,TBI" bitfld.long 0x04 10. " GMODEEN ,Gigabit mode enable" "10/100mbps,1000 mbps" textline " " bitfld.long 0x04 9. " EAME ,External address match enable" "Disabled,Enabled" bitfld.long 0x04 8. " R1536BF ,Receive 1536 byte frames" "Disabled,Enabled" bitfld.long 0x04 7. " UHE ,Unicast hash enable" "Disabled,Enabled" textline " " bitfld.long 0x04 6. " MHE ,Multicast hash enable" "Disabled,Enabled" bitfld.long 0x04 5. " NO_BRODCAST ,No broadcast" "Accepted,Not accepted" bitfld.long 0x04 4. " CPY_ALL_FRAMES ,Copy all frames" "Not accepted,Accepted" textline " " bitfld.long 0x04 3. " JUMBO_FRAMES ,Jumbo frames" "Disabled,Enabled" bitfld.long 0x04 2. " DIS_NONVLANFRM ,Discard non-VLAN frames" "Not discarded,Discarded" textline " " bitfld.long 0x04 1. " FULL_DUPLEX ,Full duplex" "Not ignored,Ignored" bitfld.long 0x04 0. " SPEED ,Port speed" "10mbps,100mbps" rgroup.long 0x08++0x03 line.long 0x00 "NETWORK_STATUS,Status Information With Respect To The PHY Management Interface Register" bitfld.long 0x00 7. " LPIINDIPCLK ,LPI indication" "Not detected,Detected" bitfld.long 0x00 6. " PFCNEGPCLK ,PFC priority based pause has been negotiated" "Not occurred,Occurred" bitfld.long 0x00 5. " MACPAUSETXEN ,PCS auto-negotiation pause transmit resolution" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " MACPAUSERXEN ,PCS auto-negotiation pause receive resolution" "Disabled,Enabled" bitfld.long 0x00 3. " MACFULLDUPLEX ,PCS auto-negotiation duplex resolution" "Depends on LINKSTATE,Full duplex" bitfld.long 0x00 2. " MAN_DONE ,The PHY management logic is idle" "Not idle,Idle" textline " " bitfld.long 0x00 1. " MDIO_IN ,Status of the MDIO_IN pin" "Low,High" bitfld.long 0x00 0. " PCS_LINK_STATE ,Status of PCS link state" "Low,High" if (((d.l(ad:0xFF0E0000+0x40))&0x80000000)==0x80000000) group.long 0x10++0x03 line.long 0x00 "DMA_CONFIG,DMA Configuration Register" bitfld.long 0x00 30. " DMAABW1 ,DMA address bus width" "32b,64b" bitfld.long 0x00 29. " TXDBEXTMODEEN ,Enable TX extended BD mode" "Disabled,Enabled" bitfld.long 0x00 28. " RXDBEXTMODEEN ,Enable RX extended BD mode" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " FORCEMAXABTX ,Force max length bursts on TX" "Not forced,Forced" bitfld.long 0x00 25. " FORCEMAXABRX ,Force max length bursts on RX" "Not forced,Forced" bitfld.long 0x00 24. " FORCEDISENERR ,Auto discard RX pkts during lack of resource" "Not discarded,Discarded" textline " " hexmask.long.byte 0x00 16.--23. 1. " RX_BUF_SIZE ,DMA receive buffer size in external AMBA (Ahb/axi) system memory" bitfld.long 0x00 10. " TX_PBUF_SIZE ,Transmitter packet buffer memory size select" "2kb,4kb" textline " " bitfld.long 0x00 8.--9. " RX_PBUF_SIZE ,Receiver packet buffer memory size select" "1kb,2kb,4kb,8kb" bitfld.long 0x00 7. " ENDIANSWPPACKET ,Endian swap mode enable for packet data accesses" "Not swapped,Swapped" bitfld.long 0x00 6. " ENDIANSWAPMAN ,Endian swap mode enable for management descriptor accesses" "Not swapped,Swapped" textline " " bitfld.long 0x00 0.--4. " AMBABURSTLENGTH ,Selects the burst length to attempt to use on the AMBA" "Auto,1,1,1,4,4,4,4,8,8,8,8,8,8,8,8,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16" else group.long 0x10++0x03 line.long 0x00 "DMA_CONFIG,DMA Configuration Register" bitfld.long 0x00 30. " DMAABW1 ,DMA address bus width" "32b,64b" bitfld.long 0x00 29. " TXDBEXTMODEEN ,Enable TX extended BD mode" "Disabled,Enabled" bitfld.long 0x00 28. " RXDBEXTMODEEN ,Enable RX extended BD mode" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " FORCEMAXABTX ,Force max length bursts on TX" "Not forced,Forced" bitfld.long 0x00 25. " FORCEMAXABRX ,Force max length bursts on RX" "Not forced,Forced" bitfld.long 0x00 24. " FORCEDISENERR ,Auto discard RX packets during lack of resource" "Not discarded,Discarded" textline " " hexmask.long.byte 0x00 16.--23. 1. " RX_BUF_SIZE ,DMA receive buffer size in external AMBA (Ahb/axi) system memory" bitfld.long 0x00 11. " TX_PBUF_TCP_EN ,TCP and UDP checksum generation offload enable" "Disabled,Enabled" bitfld.long 0x00 10. " TX_PBUF_SIZE ,Transmitter packet buffer memory size select" "2kb,4kb" textline " " bitfld.long 0x00 8.--9. " RX_PBUF_SIZE ,Receiver packet buffer memory size select" "1kb,2kb,4kb,8kb" bitfld.long 0x00 7. " ENDIANSWPPACKET ,Endian swap mode enable for packet data accesses" "Not swapped,Swapped" bitfld.long 0x00 6. " ENDIANSWAPMAN ,Endian swap mode enable for management descriptor accesses" "Not swapped,Swapped" textline " " bitfld.long 0x00 0.--4. " AMBABURSTLENGTH ,Selects the burst length to attempt to use on the AMBA" "Auto,1,1,1,4,4,4,4,8,8,8,8,8,8,8,8,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16" endif group.long 0x14++0x0F line.long 0x00 "TRANSMIT_STATUS,Details Of The Status Of A Transmit Register" eventfld.long 0x00 8. " RESP_NOT_OK ,BRESP/HRESP not OK" "Ok,Not ok" eventfld.long 0x00 7. " LATECOLOCC ,Late collision occurred" "Not occurred,Occurred" eventfld.long 0x00 6. " TRANSMITUR ,Transmit under run" "Not occurred,Occurred" textline " " eventfld.long 0x00 5. " TRNCOMPLETE ,Transmit complete" "Not completed,Completed" eventfld.long 0x00 4. " AMBA_ERROR ,Transmit frame corruption due to AMBA (Ahb/axi) errors" "Not occurred,Occurred" eventfld.long 0x00 3. " TRANSMIT_GO ,Transmit go" "Not active,Active" textline " " eventfld.long 0x00 2. " RETRYLIMITEX ,Retry limit exceeded" "Not exceed,Exceed" eventfld.long 0x00 1. " COLLISION_OCCURRED ,Collision occurred" "Not occurred,Occurred" eventfld.long 0x00 0. " USED_BIT_READ ,Used bit read" "Not occurred,Occurred" line.long 0x04 "RECEIVE_Q_PTR,Start Address Of The Receive Buffer Queue Register" hexmask.long 0x04 2.--31. 0x04 " DMA_RX_Q_PTR ,Receive buffer queue base address" line.long 0x08 "TRANSMIT_Q_PTR,Start Address Of The Transmit Buffer Queue Register" hexmask.long 0x08 2.--31. 0x04 " DMA_TX_Q_PTR ,Transmit buffer queue base address" line.long 0x0C "RECEIVE_STATUS,Details Of The Status Of A Receive Register" eventfld.long 0x0C 3. " RESP_NOT_OK ,BRESP/HRESP not OK" "Ok,Not ok" eventfld.long 0x0C 2. " RECEIVE_OVERRUN ,Receive overrun" "Not occurred,Occurred" eventfld.long 0x0C 1. " FRAME_RECEIVED ,Frame received" "Not received,Received" textline " " eventfld.long 0x0C 0. " BUFFERNOTAVAIL ,Buffer not available" "No,Yes" textline " " hgroup.long 0x24++0x03 hide.long 0x00 "INT_STATUS,Source Of This Interrupt" textfld " " in textline " " group.long 0x30++0x03 line.long 0x00 "INT_MASK,Interrupt Mask Register" setclrfld.long 0x00 29. -0x04 29. -0x08 29. " MASKTTCI ,Mask TSU timer comparison interrupt" "Not masked,Masked" setclrfld.long 0x00 28. -0x04 28. -0x08 28. " MASKWOLERI ,Mask WOL event received interrupt" "Not masked,Masked" setclrfld.long 0x00 27. -0x04 27. -0x08 27. " MASKRXPLIII ,Mask RX LPI indication interrupt" "Not masked,Masked" textline " " setclrfld.long 0x00 26. -0x04 26. -0x08 26. " MASKTSUSRI ,Mask TSU seconds register increment" "Not masked,Masked" setclrfld.long 0x00 25. -0x04 25. -0x08 25. " MASKPTPPFT ,Mask PTP PDELAY_RESP frame transmitted" "Not masked,Masked" setclrfld.long 0x00 24. -0x04 24. -0x08 24. " MASKPTPPFT ,Mask PTP PDELAY_REQ frame transmitted" "Not masked,Masked" textline " " setclrfld.long 0x00 23. -0x04 23. -0x08 23. " MASKPTPPFR ,Mask PTP PDELAY_RESP frame received" "Not masked,Masked" setclrfld.long 0x00 22. -0x04 22. -0x08 22. " MASKPTPDFR ,Mask PTP PDELAY_REQ frame received" "Not masked,Masked" setclrfld.long 0x00 21. -0x04 21. -0x08 21. " MASKPTPSFT ,Mask PTP sync frame transmitted" "Not masked,Masked" textline " " setclrfld.long 0x00 20. -0x04 20. -0x08 20. " MASKPTPDFT ,Mask PTP DELAY_REQ frame transmitted" "Not masked,Masked" setclrfld.long 0x00 19. -0x04 19. -0x08 19. " MASKPTPSFR ,Mask PTP sync frame received" "Not masked,Masked" setclrfld.long 0x00 18. -0x04 18. -0x08 18. " MASKPTPDFR ,Mask PTP DELAY_REQ frame received" "Not masked,Masked" textline " " setclrfld.long 0x00 17. -0x04 17. -0x08 17. " MASKPCSLPPR ,Mask PCS link partner page received" "Not masked,Masked" setclrfld.long 0x00 16. -0x04 16. -0x08 16. " MASKPCSACI ,Mask PCS auto-negotiation complete interrupt" "Not masked,Masked" setclrfld.long 0x00 15. -0x04 15. -0x08 15. " MASKEI ,Mask external interrupt" "Not masked,Masked" textline " " setclrfld.long 0x00 14. -0x04 14. -0x08 14. " MASKFTI ,Mask pause frame transmitted interrupt" "Not masked,Masked" setclrfld.long 0x00 13. -0x04 13. -0x08 13. " MASKPTZI ,Mask pause time zero interrupt" "Not masked,Masked" setclrfld.long 0x00 12. -0x04 12. -0x08 12. " MASKPFWNPQI ,Mask pause frame with non-zero pause quantum interrupt" "Not masked,Masked" textline " " setclrfld.long 0x00 11. -0x04 11. -0x08 11. " MASKBHNOKI ,Mask BRESP/HRESP not OK interrupt" "Not masked,Masked" setclrfld.long 0x00 10. -0x04 10. -0x08 10. " MASKROI ,Mask receive overrun interrupt" "Not masked,Masked" setclrfld.long 0x00 9. -0x04 9. -0x08 9. " MASKLCI ,Mask link change interrupt" "Not masked,Masked" textline " " setclrfld.long 0x00 7. -0x04 7. -0x08 7. " MASKTCI ,Mask transmit complete interrupt" "Not masked,Masked" setclrfld.long 0x00 6. -0x04 6. -0x08 6. " MASKTFCDTOAMBA ,Mask transmit frame corruption due to AMBA (Ahb/axi) error interrupt" "Not masked,Masked" setclrfld.long 0x00 5. -0x04 5. -0x08 5. " MASKRLEOLCI ,Mask retry limit exceeded or late collision interrupt" "Not masked,Masked" textline " " setclrfld.long 0x00 4. -0x04 4. -0x08 4. " MASKTBURI ,Mask transmit buffer under run interrupt" "Not masked,Masked" setclrfld.long 0x00 3. -0x04 3. -0x08 3. " MASKTUBRI ,Mask transmit used bit read interrupt" "Not masked,Masked" setclrfld.long 0x00 2. -0x04 2. -0x08 2. " MASKRUBRI ,Mask receive used bit read interrupt" "Not masked,Masked" textline " " setclrfld.long 0x00 1. -0x04 1. -0x08 1. " MASKRCI ,Mask receive complete interrupt" "Not masked,Masked" setclrfld.long 0x00 0. -0x04 0. -0x08 0. " MASKMDI ,Mask management done interrupt" "Not masked,Masked" if (((d.l(ad:0xFF0E0000+0x34))&0x40000000)==0x40000000) group.long 0x34++0x03 line.long 0x00 "PHY_MANAGEMENT,PHY Management Register" bitfld.long 0x00 31. " WRITE0 ,Must be written with 0" "0,?..." bitfld.long 0x00 30. " WRITE1 ,Valid clause frame" "45 frame,22 frame" bitfld.long 0x00 28.--29. " OPERATION ,Operation" ",Write,Read,?..." textline " " hexmask.long.byte 0x00 23.--27. 0x80 " PHYADDR ,PHY address" hexmask.long.byte 0x00 18.--22. 0x04 " REGADDR ,Register address" bitfld.long 0x00 16.--17. " WRITE10 ,Must be written with 10" ",,2,?..." textline " " hexmask.long.word 0x00 0.--15. 1. " PHYW/RDATA ,DATA" else group.long 0x34++0x03 line.long 0x00 "PHY_MANAGEMENT,PHY Management Register" bitfld.long 0x00 31. " WRITE0 ,Must be written with 0" "0,?..." bitfld.long 0x00 30. " WRITE1 ,Valid clause frame" "45 frame,22 frame" bitfld.long 0x00 28.--29. " OPERATION ,Operation" "Address,Write,Post read,Read frame" textline " " hexmask.long.byte 0x00 23.--27. 0x80 " PHYADDR ,PHY address" hexmask.long.byte 0x00 18.--22. 0x04 " REGADDR ,Register address" bitfld.long 0x00 16.--17. " WRITE10 ,Must be written with 10" ",,2,?..." textline " " hexmask.long.word 0x00 0.--15. 1. " PHYW/RDATA ,DATA" endif rgroup.long 0x38++0x03 line.long 0x00 "PAUSE_TIME,Received Pause Quantum Register" hexmask.long.word 0x00 0.--15. 1. " QUANTUM ,Received pause quantum" group.long 0x3C++0x03 line.long 0x00 "TX_PAUSE_QUANTUM,Transmit Pause Quantum Register" hexmask.long.word 0x00 0.--15. 1. " QUANTUM ,Transmit pause quantum" textline " " group.long 0x40++0x0F line.long 0x00 "PBUF_TXCUTTHRU,TX Partial Store And Forward Register" bitfld.long 0x00 31. " DMA_TX_CUTTHRU ,Enable TX partial store and forward operation" "Disabled,Enabled" hexmask.long.word 0x00 0.--11. 1. " DMA_TX_CUTTHRU_THRESHOLD ,Watermark value" line.long 0x04 "PBUF_RXCUTTHRU,RX Partial Store And Forward" bitfld.long 0x04 31. " DMA_RX_CUTTHRU ,Enable RX partial store and forward operation" "Disabled,Enabled" hexmask.long.word 0x04 0.--11. 1. " DMA_RX_CUTTHRU_THRESHOLD ,Watermark value" line.long 0x08 "JUMBO_MAX_LENGTH,Maximum Jumbo Frame Size" hexmask.long.word 0x08 0.--15. 1. " JUMBO_MAX_LENGTH ,Maximal jumbo frame size" line.long 0x0C "EXTERNAL_FIFO_INTERFACE,External FIFO Interface Enable" bitfld.long 0x0C 0. " EXTERNAL_FIFO_INTERFACE ,Enable external FIFO interface" "Disabled,Enabled" group.long 0x54++0x03 line.long 0x00 "AXI_MAX_PIPELINE,Maximum Amount Of Outstanding Transactions On The AXI Bus Between AR / R And AW / W Channels Register" hexmask.long.byte 0x00 8.--15. 1. " AW2W_MAX_PIPELINE ,Maximum number of outstanding AXI write requests that can be issued by the DMA via the AW channel" hexmask.long.byte 0x00 0.--7. 1. " AR2R_MAX_PIPELINE ,Maximum number of outstanding AXI read requests that can be issued by the DMA via the AR channel" group.long 0x80++0x1F line.long 0x00 "HASH_BOTTOM,The First 32 Bits Of The Hash Address Register" line.long 0x04 "HASH_TOP,The Remaining 32 Bits Of The Hash Address Register" line.long 0x08 "SPEC_ADD1_BOTTOM,Least Significant 32 Bits Of The Destination Address Register" line.long 0x0C "SPEC_ADD1_TOP,Specific Address Top Register" bitfld.long 0x0C 16. " FILTER_TYPE ,Destination address filter/source address filter" "Destination,Source" hexmask.long.word 0x0C 0.--15. 1. " ADDRESS ,The most significant bits of the destination/source address[32-47]" line.long 0x10 "SPEC_ADD2_BOTTOM,Least Significant 32 Bits Of The Destination Address Register" line.long 0x14 "SPEC_ADD2_TOP,Least Significant 32 Bits Of The Destination Address Register" bitfld.long 0x14 29. " FILTER_BYTE_MASK_[5] ,Byte 5 of the specific address compare enable" "Compared,Not compared" bitfld.long 0x14 28. " [4] ,Byte 4 of the specific address compare enable" "Compared,Not compared" bitfld.long 0x14 27. " [3] ,Byte 3 of the specific address compare enable" "Compared,Not compared" textline " " bitfld.long 0x14 26. " [2] ,Byte 2 of the specific address compare enable" "Compared,Not compared" bitfld.long 0x14 25. " [1] ,Byte 1 of the specific address compare enable" "Compared,Not compared" bitfld.long 0x14 24. " [0] ,Byte 0 of the specific address compare enable" "Compared,Not compared" textline " " bitfld.long 0x14 16. " FILTER_TYPE ,Destination address filter/source address filter" "Destination,Source" textline " " hexmask.long.word 0x14 0.--15. 1. " ADDRESS ,Specific address 1[32-47]" line.long 0x18 "SPEC_ADD3_BOTTOM,Address Register" line.long 0x1C "SPEC_ADD3_TOP,Least Significant 32 Bits Of The Destination Address Register" bitfld.long 0x1C 29. " FILTER_BYTE_MASK_[5] ,Byte 5 of the specific address compare enable" "Compared,Not compared" bitfld.long 0x1C 28. " [4] ,Byte 4 of the specific address compare enable" "Compared,Not compared" bitfld.long 0x1C 27. " [3] ,Byte 3 of the specific address compare enable" "Compared,Not compared" textline " " bitfld.long 0x1C 26. " [2] ,Byte 2 of the specific address compare enable" "Compared,Not compared" bitfld.long 0x1C 25. " [1] ,Byte 1 of the specific address compare enable" "Compared,Not compared" bitfld.long 0x1C 24. " [0] ,Byte 0 of the specific address compare enable" "Compared,Not compared" textline " " bitfld.long 0x1C 16. " FILTER_TYPE ,Destination address filter/source address filter" "Destination,Source" textline " " hexmask.long.word 0x1C 0.--15. 1. " ADDRESS ,Specific address 1[32-47]" group.long 0xA0++0x1F line.long 0x00 "SPEC_ADD4_BOTTOM,Specific Address Top Register" line.long 0x04 "SPEC_ADD4_TOP,Least Significant 32 Bits Of The Destination Address Register" bitfld.long 0x04 29. " FILTER_BYTE_MASK_[5] ,Byte 5 of the specific address compare enable" "Compared,Not compared" bitfld.long 0x04 28. " [4] ,Byte 4 of the specific address compare enable" "Compared,Not compared" bitfld.long 0x04 27. " [3] ,Byte 3 of the specific address compare enable" "Compared,Not compared" textline " " bitfld.long 0x04 26. " [2] ,Byte 2 of the specific address compare enable" "Compared,Not compared" bitfld.long 0x04 25. " [1] ,Byte 1 of the specific address compare enable" "Compared,Not compared" bitfld.long 0x04 24. " [0] ,Byte 0 of the specific address compare enable" "Compared,Not compared" textline " " bitfld.long 0x04 16. " FILTER_TYPE ,Destination address filter/source address filter" "Destination,Source" textline " " hexmask.long.word 0x04 0.--15. 1. " ADDRESS ,Specific address 1[32-47]" line.long 0x08 "SPEC_TYPE1,Type ID Match 1 Register" bitfld.long 0x08 31. " ENABLE_COPY ,Enable copying of type ID match 1 matched frames" "Disabled,Enabled" hexmask.long.word 0x08 0.--15. 1. " MATCH ,Type ID match 1" line.long 0x0C "SPEC_TYPE2,Type ID Match 2 Register" bitfld.long 0x0C 31. " ENABLE_COPY ,Enable copying of type ID match 2 matched frames" "Disabled,Enabled" hexmask.long.word 0x0C 0.--15. 1. " MATCH ,Type ID match 2" line.long 0x10 "SPEC_TYPE3,Type ID Match 3 Register" bitfld.long 0x10 31. " ENABLE_COPY ,Enable copying of type ID match 3 matched frames" "Disabled,Enabled" hexmask.long.word 0x10 0.--15. 1. " MATCH ,Type ID match 3" line.long 0x14 "SPEC_TYPE4,Type ID Match 4 Register" bitfld.long 0x14 31. " ENABLE_COPY ,Enable copying of type ID match 4 matched frames" "Disabled,Enabled" hexmask.long.word 0x14 0.--15. 1. " MATCH ,Type ID match 4" line.long 0x18 "WOL_REGISTER,Wake On LAN Register" bitfld.long 0x18 19. " WOL_MASK_3 ,Wake on LAN multicast hash event enable" "Disabled,Enabled" bitfld.long 0x18 18. " WOL_MASK_2 ,Wake on LAN specific address register 1 event enable" "Disabled,Enabled" textline " " bitfld.long 0x18 17. " WOL_MASK_1 ,Wake on LAN ARP request event enable" "Disabled,Enabled" bitfld.long 0x18 16. " WOL_MASK_0 ,Wake on LAN magic packet event enable" "Disabled,Enabled" textline " " hexmask.long.word 0x18 0.--15. 1. " ADDR ,Wake on LAN ARP request IP address" line.long 0x1C "STRETCH_RATIO,IPG Stretch Register" hexmask.long.word 0x1C 0.--15. 1. " IPG_STRETCH ,IPG stretch" group.long 0xC0++0x1F line.long 0x00 "STACKED_VLAN,Stacked VLAN Register" bitfld.long 0x00 31. " ENABLE_PROCESSING ,Enable stacked VLAN processing mode" "Disabled,Enabled" hexmask.long.word 0x00 0.--15. 1. " MATCH ,User defined VLAN_TYPE field" line.long 0x04 "TX_PFC_PAUSE,Transmit PFC Pause Register" hexmask.long.byte 0x04 8.--15. 1. " VECTOR ,Priority vector pause size" hexmask.long.byte 0x04 0.--7. 1. " VECTOR_ENABLE ,Priority vector enable" line.long 0x08 "MASK_ADD1_BOTTOM,Specific Address Mask 1 Bottom Register" line.long 0x0C "MASK_ADD1_TOP,Specific Address Mask 1 Top Register" bitfld.long 0x0C 15. " ADDRESS_MASK[15] ,Priority vector enable" "Disabled,Enabled" bitfld.long 0x0C 14. " [14] ,Priority vector enable" "Disabled,Enabled" bitfld.long 0x0C 13. " [13] ,Priority vector enable" "Disabled,Enabled" bitfld.long 0x0C 12. " [12] ,Priority vector enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 11. " [11] ,Priority vector enable" "Disabled,Enabled" bitfld.long 0x0C 10. " [10] ,Priority vector enable" "Disabled,Enabled" bitfld.long 0x0C 9. " [9] ,Priority vector enable" "Disabled,Enabled" bitfld.long 0x0C 8. " [8] ,Priority vector enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 7. " [7] ,Priority vector enable" "Disabled,Enabled" bitfld.long 0x0C 6. " [6] ,Priority vector enable" "Disabled,Enabled" bitfld.long 0x0C 5. " [5] ,Priority vector enable" "Disabled,Enabled" bitfld.long 0x0C 4. " [4] ,Priority vector enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 3. " [3] ,Priority vector enable" "Disabled,Enabled" bitfld.long 0x0C 2. " [2] ,Priority vector enable" "Disabled,Enabled" bitfld.long 0x0C 1. " [1] ,Priority vector enable" "Disabled,Enabled" bitfld.long 0x0C 0. " [0] ,Priority vector enable" "Disabled,?..." line.long 0x10 "DMA_ADDR_OR_MASK,Receive DMA Data Buffer Address Mask Register" bitfld.long 0x10 28.--31. " MASK_VALUE ,Data buffer address mask value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x10 3. " MASK_ENABLE[3] ,AHB/AXI address bit 31 access force" "Not forced,Forced" bitfld.long 0x10 2. " [2] ,AHB/AXI address bit 30 access force" "Not forced,Forced" bitfld.long 0x10 1. " [1] ,AHB/AXI address bit 29 access force" "Not forced,Forced" bitfld.long 0x10 0. " [0] ,AHB/AXI address bit 28 access force" "Not forced,Forced" line.long 0x14 "RX_PTP_UNICAST,PTP RX Unicast IP Destination Address Register" line.long 0x18 "TX_PTP_UNICAST,PTP TX Unicast IP Destination Address Register" line.long 0x1C "TSU_NSEC_CMP,TSU Timer Comparison Value Nanoseconds Register" hexmask.long.tbyte 0x1C 0.--21. 1. " COMPARISON_VALUE ,TSU timer comparison value" group.long 0xE0++0x07 line.long 0x00 "TSU_SEC_CMP,TSU Timer Comparison Value Seconds Register" line.long 0x04 "TSU_MSB_SEC_CMP,TSU Timer Comparison Value Seconds Register" hexmask.long.word 0x04 0.--15. 1. " COMPARISON_VALUE ,TSU timer comparison value" rgroup.long 0xE8++0x0F line.long 0x00 "TSU_PTP_TX_MSB_SEC,PTP Event Frame Transmitted Seconds Register" hexmask.long.word 0x00 0.--15. 1. " TIMER_SECONDS ,PTP event frame TX seconds" line.long 0x04 "TSU_PTP_RX_MSB_SEC,PTP Event Frame Received Seconds Register" hexmask.long.word 0x04 0.--15. 1. " TIMER_SECONDS ,PTP event frame RX seconds" line.long 0x08 "TSU_PEER_TX_MSB_SEC,PTP Peer Event Frame Transmitted Seconds Register" hexmask.long.word 0x08 0.--15. 1. " TIMER_SECONDS ,PTP peer event frame TX seconds" line.long 0x0C "TSU_PEER_RX_MSB_SEC,PTP Peer Event Frame Received Seconds Register" hexmask.long.word 0x0C 0.--15. 1. " TIMER_SECONDS ,PTP peer event frame RX seconds" group.long 0xF8++0x03 line.long 0x00 "DPRAM_FILL_DBG,The Fill Levels For The TX & RX Packet Buffers Register" hexmask.long.word 0x00 16.--31. 1. " DMA_TX_RX_FILL_LEVEL ,TX or RX packet buffer fill level" bitfld.long 0x00 4.--7. " DMA_TX_Q_FILL_LEVEL_SELECT ,TX queue fill level select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 0. " DMA_TX_RX_FILL_LEVEL_SELECT ,TX/RX fill level select" "0,1" rgroup.long 0xFC++0x03 line.long 0x00 "REVISION_REG,Module Identification Number And Module Revision Register" bitfld.long 0x00 28.--31. " FIX_NUMBER ,Fix number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 16.--27. 1. " MODULE_ID_NUMBER ,Module identification number" hexmask.long.word 0x00 0.--15. 1. " MODULE_REVISION ,Module revision" hgroup.long 0x100++0x03 hide.long 0x00 "OCTETS_TXED_BOTTOM,Transmitted Octets In Frame Without Errors Register" textfld " " in hgroup.long 0x104++0x03 hide.long 0x00 "OCTETS_TXED_TOP,Octets Transmitted Register" textfld " " in textline " " group.long 0x108++0x17 line.long 0x00 "FRAMES_TXED_OK,Frames Transmitted Without Error" line.long 0x04 "BROADCAST_TXED,Broadcast Frames Transmitted Without Error Register" line.long 0x08 "MULTICAST_TXED,Multicast Frames Transmitted Without Error Register" line.long 0x0C "PAUSE_FRAMES_TXED,Pause Frames Transmitted" hexmask.long.word 0x0C 0.--15. 1. " COUNT ,Transmitted pause frames register" line.long 0x10 "FRAMES_TXED_64,64 Byte Frames Transmitted Register" line.long 0x14 "FRAMES_TXED_65,65 To 127 Byte Frames Transmitted Register" group.long 0x120++0x1F line.long 0x00 "FRAMES_TXED_128,128 To 255 Byte Frames Transmitted Register" line.long 0x04 "FRAMES_TXED_256,256 To 511 Byte Frames Transmitted Register" line.long 0x08 "FRAMES_TXED_512,512 To 1023 Byte Frames Transmitted Register" line.long 0x0C "FRAMES_TXED_1024,1024 To 1518 Byte Frames Transmitted Register" line.long 0x10 "FRAMES_TXED_1519,Greater Than 1518 Byte Frames Transmitted Register" line.long 0x14 "TX_UNDERRUNS,Transmit Under Runs Register" hexmask.long.word 0x14 0.--9. 1. " COUNT ,Transmit under runs" line.long 0x18 "SINGLE_COLLISIONS,Single Collision Frames Register" hexmask.long.tbyte 0x18 0.--17. 1. " COUNT ,Single collision frames register" line.long 0x1C "MULTIPLE_COLLISIONS,Multiple Collision Frames" hexmask.long.tbyte 0x1C 0.--17. 1. " COUNT ,Multiple collision frames register" group.long 0x140++0x1F line.long 0x00 "EXCESSIVE_COLLISIONS,Excessive Collisions Register" hexmask.long.word 0x00 0.--9. 1. " COUNT ,Excessive collisions" line.long 0x04 "LATE_COLLISIONS,Late Collisions Register" hexmask.long.word 0x04 0.--9. 1. " COUNT ,Late collisions" line.long 0x08 "DEFERRED_FRAMES,Deferred Transmission Frames Register" hexmask.long.tbyte 0x08 0.--17. 1. " COUNT ,Deferred transmission frames" line.long 0x0C "CRS_ERRORS,Carrier Sense Errors Register" hexmask.long.word 0x0C 0.--9. 1. " COUNT ,Carrier sense errors" line.long 0x10 "OCTETS_RXED_BOTTOM,Octets Received Register" line.long 0x14 "OCTETS_RXED_TOP,Octets Received" hexmask.long.word 0x14 0.--15. 1. " COUNT ,Received octets in frame without errors" line.long 0x18 "FRAMES_RXED_OK,Frames Received Register" line.long 0x1C "BROADCAST_RXED,Broadcast Frames Received Register" group.long 0x160++0x1F line.long 0x00 "MULTICAST_RXED,Multicast Frames Received Register" line.long 0x04 "PAUSE_FRAMES_RXED,Received Pause Frames Register" hexmask.long.word 0x04 0.--15. 1. " COUNT ,Received pause frames" line.long 0x08 "FRAMES_RXED_64,64 Byte Frames Received Register" line.long 0x0C "FRAMES_RXED_65,65 To 127 Byte Frames Received Register" line.long 0x10 "FRAMES_RXED_128,128 To 255 Byte Frames Received Register" line.long 0x14 "FRAMES_RXED_256,256 To 511 Byte Frames Received Register" line.long 0x18 "FRAMES_RXED_512,512 To 1023 Byte Frames Received Register" line.long 0x1C "FRAMES_RXED_1024,1024 To 1518 Byte Frames Received Register" group.long 0x180++0x1F line.long 0x00 "FRAMES_RXED_1519,1519 To Maximum Byte Frames Received Register" line.long 0x04 "UNDERSIZE_FRAMES,Undersized Frames Received Register" hexmask.long.word 0x04 0.--9. 1. " COUNT ,Undersize frames received" line.long 0x08 "EXCESSIVE_RX_LENGTH,Oversize Frames Received Register" hexmask.long.word 0x08 0.--9. 1. " COUNT ,Oversize frames received" line.long 0x0C "RX_JABBERS,Jabbers Received Register" hexmask.long.word 0x0C 0.--9. 1. " COUNT ,Jabbers received" line.long 0x10 "FCS_ERRORS,Frame Check Sequence Errors Register" hexmask.long.word 0x10 0.--9. 1. " COUNT ,Frame check sequence errors" line.long 0x14 "RX_LENGTH_ERRORS,Length Field Frame Errors Register" hexmask.long.word 0x14 0.--9. 1. " COUNT ,Length field frame errors" line.long 0x18 "RX_SYMBOL_ERRORS,Receive Symbol Error Registers" hexmask.long.word 0x18 0.--9. 1. " COUNT ,Receive symbol errors" line.long 0x1C "ALIGNMENT_ERRORS,Alignment Errors Register" hexmask.long.word 0x1C 0.--9. 1. " COUNT ,Alignment errors" group.long 0x1A0++0x17 line.long 0x00 "RX_RESOURCE_ERRORS,Receive Resource Errors Register" hexmask.long.tbyte 0x00 0.--17. 1. " COUNT ,Receive resource errors" line.long 0x04 "RX_OVERRUNS,Receive Overruns Register" hexmask.long.word 0x04 0.--9. 1. " COUNT ,Receive overruns" line.long 0x08 "RX_IP_CK_ERRORS,IP Header Checksum Errors Register" hexmask.long.byte 0x08 0.--7. 1. " COUNT ,IP header checksum errors" line.long 0x0C "RX_TCP_CK_ERRORS,TCP Checksum Errors Register" hexmask.long.byte 0x0C 0.--7. 1. " COUNT ,TCP checksum errors" line.long 0x10 "RX_UDP_CK_ERRORS,UDP Checksum Errors Register" hexmask.long.byte 0x10 0.--7. 1. " COUNT ,UDP checksum errors" line.long 0x14 "AUTO_FLUSHED_PKTS,Receive DMA Flushed Packets Register" hexmask.long.word 0x14 0.--15. 1. " COUNT ,Receive DMA flushed packets" group.long 0x1BC++0x07 line.long 0x00 "TSU_TIMER_INCR_SUB_NSEC,1588 Timer Increment Register SUB NSEC Register" hexmask.long.byte 0x00 24.--31. 1. " SUB_NS_INCR_LSB ,Bits [7:0] of timer increment sub nsec" hexmask.long.word 0x00 0.--15. 1. " SUB_NS_INCR ,Bits [23:8] of timer increment sub nsec" line.long 0x04 "TSU_TIMER_MSB_SEC,1588 Timer Seconds Register" hexmask.long.word 0x04 0.--15. 1. " TIMER ,TSU timer value (S)" rgroup.long 0x1C4++0x03 line.long 0x00 "TSU_STROBE_MSB_SEC,1588 Timer Sync Strobe Seconds Register" hexmask.long.word 0x00 0.--15. 1. " STROBE ,1588 timer sync strobe seconds" rgroup.long 0x1C8++0x07 line.long 0x00 "TSU_STROBE_SEC,1588 Timer Sync Strobe Seconds Register" line.long 0x04 "TSU_STROBE_NSEC,1588 Timer Sync Strobe Nanoseconds Register" hexmask.long 0x04 0.--29. 1. " STROBE ,1588 timer sync strobe nanoseconds" group.long 0x1D0++0x07 line.long 0x00 "TSU_TIMER_SEC,1588 Timer Seconds Register" line.long 0x04 "TSU_TIMER_NSEC,1588 Timer Nanoseconds Register" hexmask.long 0x04 0.--29. 1. " TIMER ,Timer count in nanoseconds" textline " " wgroup.long 0x1D8++0x03 line.long 0x00 "TSU_TIMER_ADJUST,TSU Timer Adjust Register" bitfld.long 0x00 31. " ADD_SUBTRACT ,Write as one to subtract from the 1588 timer" "Add,Subtract" hexmask.long 0x00 0.--29. 1. " INCREMENT_VALUE ,Timer increment value" group.long 0x1DC++0x03 line.long 0x00 "TSU_TIMER_INCR,1588 Timer Increment Register" hexmask.long.byte 0x00 16.--23. 1. " NUM_INCS ,The number of increments after which the alternative increment is used" hexmask.long.byte 0x00 8.--15. 1. " ALT_NS_INCR ,Alternative nanoseconds count" hexmask.long.byte 0x00 0.--7. 1. " NUM_INCR ,A count of nanoseconds by which the 1588 timer nanoseconds register will be incremented each clock cycle" rgroup.long 0x1E0++0x1F line.long 0x00 "TSU_PTP_TX_SEC,PTP Event Frame Transmitted Seconds Register" line.long 0x04 "TSU_PTP_TX_NSEC,PTP Event Frame Transmitted Nanoseconds Register" hexmask.long 0x04 0.--29. 1. " TIMER ,PTP event frame transmitted nanoseconds" line.long 0x08 "TSU_PTP_RX_SEC,PTP Event Frame Received Seconds Register" line.long 0x0C "TSU_PTP_RX_NSEC,PTP Event Frame Received Nanoseconds Register" hexmask.long 0x0C 0.--29. 1. " TIMER ,PTP event frame transmitted nanoseconds" line.long 0x10 "TSU_PEER_TX_SEC,PTP Peer Event Frame Transmitted Seconds Register" line.long 0x14 "TSU_PEER_TX_NSEC,PTP Peer Event Frame Transmitted Nanoseconds Register" hexmask.long 0x14 0.--29. 1. " TIMER ,PTP peer event frame transmitted nanoseconds" line.long 0x18 "TSU_PEER_RX_SEC,PTP Peer Event Frame Received Seconds Register" line.long 0x1C "TSU_PEER_RX_NSEC,PTP Peer Event Frame Received Nanoseconds Register" hexmask.long 0x1C 0.--29. 1. " TIMER ,PTP peer event frame received nanoseconds" group.long 0x200++0x03 line.long 0x00 "PCS_CONTROL,PSC Control Register" bitfld.long 0x00 15. " PCS_SOFTWARE_RESET ,PCS software reset" "No effect,Reset" bitfld.long 0x00 14. " LOOPBACK_MODE ,Loopback mode" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " ENABLE_AUTO_NEG ,Enable auto-negotiation" "Disabled,Enabled" bitfld.long 0x00 9. " RESTART_AUTO_NEG ,Restart auto-negotiation" "No effect,Reset" textline " " bitfld.long 0x00 8. " MAC_DUPLEX_STATE ,MAC duplex state" "0,1" bitfld.long 0x00 7. " COLLISION_TEST ,Collision test" "No collision,Collision" textline " " bitfld.long 0x00 6. 13. " SPEED_SELECT_BIT ,Speed select" ",1000 mbps,?..." textline " " hgroup.long 0x204++0x03 hide.long 0x00 "PCS_STATUS,PCS General Status Information Register" textfld " " in textline " " rgroup.long 0x208++0x07 line.long 0x00 "PCS_PHY_TOP_ID,Upper 16-bits Of The Phy's Identification Code Register" hexmask.long.word 0x00 0.--15. 1. " ID_CODE ,Upper 16-bits of the PHY identification code" line.long 0x04 "PCS_PHY_BOT_ID,Lower 16-bits Of The Phy's Identification Code Register" hexmask.long.word 0x04 0.--15. 1. " ID_CODE ,Lower 16-bits of the PHY identification code" group.long 0x210++0x03 line.long 0x00 "PCS_AN_ADV,Transmit Base Page Of The GEM PCS Capabilities Register" bitfld.long 0x00 15. " NEXT_PAGE ,Next page" "Not required,Required" bitfld.long 0x00 12.--13. " REMOTE_FAULT ,Remote fault" "No error,Link failure,Off line,Auto-negation error" textline " " bitfld.long 0x00 7.--8. " PAUSE ,Pause" "No pause,Symmetric,Asymmetric,Both" bitfld.long 0x00 6. " HALF_DUPLEX ,Half duplex support" "Not supported,Supported" textline " " bitfld.long 0x00 5. " FULL_DUPLEX ,Full duplex support" "Not supported,Supported" if ((d.l(ad:0xFF0E0000+0x04)&0x8000000)==0x8000000) rgroup.long 0x214++0x03 line.long 0x00 "PCS_AN_LP_BASE,Link Partner's Base Page Received Information Register" bitfld.long 0x00 15. " LPNPS ,Link status" "Link down,Link up" bitfld.long 0x00 14. " LPA ,Link partner acknowledge" "Not successful,Successful" textline " " bitfld.long 0x00 12. " LPRFDM ,Link partner remote fault duplex mode" "Half duplex,Full duplex" textline " " bitfld.long 0x00 10.--11. " SPEED ,Speed" "10 mbps bit,100mbps,1000 mbps,?..." else rgroup.long 0x214++0x03 line.long 0x00 "PCS_AN_LP_BASE,Link Partner's Base Page Received Information Register" bitfld.long 0x00 15. " LPNPS ,Link partner next page" "Not exchange,Exchange" bitfld.long 0x00 14. " LPA ,Link partner acknowledge" "Not successful,Successful" textline " " bitfld.long 0x00 12.--13. " LPRFDM ,Link partner remote fault" "No error,Link failure,Off line,Auto-negotiation error" bitfld.long 0x00 7.--8. " PAUSE ,Pause" "No pause,Symmetric pause,Asymmetric pause,Both" textline " " bitfld.long 0x00 6. " LPHD ,Link partner half duplex" "Not supported,Supported" bitfld.long 0x00 5. " LPFD ,Link partner full duplex" "Not supported,Supported" endif rgroup.long 0x218++0x03 line.long 0x00 "PCS_AN_EXP,Auto-negotiation Next Page Ability And Page Received Information Register" bitfld.long 0x00 2. " NPC ,Next page capability" "Not supported,Supported" bitfld.long 0x00 1. " PR ,Page received" "Not received,Received" group.long 0x21C++0x03 line.long 0x00 "PCS_AN_NP_TX,Transmit The Next Page Information For The GEM PCS Register" bitfld.long 0x00 15. " NPTT ,Next page to transmit" "Last page,Not last" bitfld.long 0x00 13. " MPI ,Message page indicator" "Unformatted,Message" textline " " bitfld.long 0x00 12. " ACKNOWLEDGE_2 ,GEM PCS has the ability to comply with the last received message" "Not able,Able" hexmask.long.word 0x00 0.--10. 1. " MESSAGE ,Contains data as defined by the message page indicator bit" rgroup.long 0x220++0x03 line.long 0x00 "PCS_AN_LP_NP,Next Page Received Information From The Link Partner Register" bitfld.long 0x00 15. " NPTR ,Next page to receive" "Last page,Not last" bitfld.long 0x00 14. " ACKNOWLEDGE ,Link partner has successfully received the last message transmitted" "Not successful,Successful" textline " " bitfld.long 0x00 13. " MPI ,Message page indicator" "Unformatted,Message" bitfld.long 0x00 12. " ACKNOWLEDGE_2 ,Link partner has the ability to comply with the last message received" "Not able,Able" textline " " bitfld.long 0x00 11. " TOGGLE ,Toggle every received page" "Not toggle,Toggle" hexmask.long.word 0x00 0.--10. 1. " MESSAGE ,Contains data as defined by the message page indicator bit" rgroup.long 0x23C++0x03 line.long 0x00 "PCS_AN_EXT_STATUS,PCS auto-negotiation Extended Status Information Register" bitfld.long 0x00 15. " FD_1000BASE_X ,Full duplex 1000BASE-X" "Not supported,Supported" bitfld.long 0x00 14. " HD_1000BASE_X ,Half duplex 1000BASE-X" "Not supported,Supported" textline " " bitfld.long 0x00 13. " FD_1000BASE_T ,Full duplex 1000BASE-T" "Not supported,Supported" bitfld.long 0x00 12. " HD_1000BASE_T ,Half duplex 1000BASE-T" "Not supported,Supported" textline " " hgroup.long 0x270++0x07 hide.long 0x00 "RX_LPI,Received LPI Transitions Register" textfld " " in hide.long 0x04 "RX_LPI_TIME,Received LPI Time Register" textfld " " in group.long 0x278++0x03 line.long 0x00 "TX_LPI,Transmit LPI Transitions Register" hexmask.long.word 0x00 0.--15. 1. " COUNT ,Count of LPI transmissions" hgroup.long 0x27C++0x03 hide.long 0x00 "TX_LPI_TIME,Transmit LPI Time Register" textfld " " in textline " " rgroup.long 0x280++0x0B line.long 0x00 "DESIGNCFG_DEBUG1,Design Configuration Register 1" bitfld.long 0x00 28.--31. " AXI_CACHE_VALUE ,Takes the value of the GEM_AXI_CACHE_VALUE define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 25.--27. " DMA_BUS_WIDTH ,Takes the value of the GEM_DMA_BUS_WIDTH define" "0,1,2,3,4,5,6,7" bitfld.long 0x00 23. " IRQ_READ_CLEAR ,Takes the value of the GEM_IRQ_READ_CLEAR define" "0,1" textline " " bitfld.long 0x00 22. " NO_SNAPSHOT ,Takes the value of the GEM_NO_SNAPSHOT define" "0,1" bitfld.long 0x00 21. " NO_STATS ,Takes the value of the GEM_NO_STATS define" "0,1" bitfld.long 0x00 20. " NO_SCAN_PINS ,Takes the value of the GEM_NO_SCAN_PINS define" "0,1" textline " " bitfld.long 0x00 15.--19. " USER_IN_WIDTH ,Takes the value of the GEM_USER_IN_WIDTH define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 10.--14. " USER_OUT_WIDTH ,Takes the value of the GEM_USER_OUT_WIDTH define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 9. " USER_IO ,Takes the value of the GEM_USER_IO define" "0,1" textline " " bitfld.long 0x00 8. " APB_REV2 ,Takes the value of the GEM_APB_REV2 define" "0,1" bitfld.long 0x00 7. " APB_REV1 ,Takes the value of the GEM_APB_REV1 define" "0,1" bitfld.long 0x00 6. " EXT_FIFO_INTERFACE ,Takes the value of the GEM_EXT_FIFO_INTERFACE define" "0,1" textline " " bitfld.long 0x00 5. " NO_INT_LOOPBACK ,Takes the value of the GEM_NO_INT_LOOPBACK define" "0,1" bitfld.long 0x00 4. " INT_LOOPBACK ,Takes the value of the GEM_INT_LOOPBACK define" "0,1" bitfld.long 0x00 3. " TDC_50 ,Takes the value of the TDC_50 define" "0,1" textline " " bitfld.long 0x00 2. " RDC_50 ,Takes the value of the RDC_50 define" "0,1" bitfld.long 0x00 1. " SERDES ,Takes the value of the GEM_SERDES define" "0,1" bitfld.long 0x00 0. " NO_PCS ,Takes the value of the GEM_NO_PCS define" "0,1" line.long 0x04 "DESIGNCFG_DEBUG2,Design Configuration Register 2" bitfld.long 0x04 31. " SPRAM ,Takes the value of the GEM_SPRAM define" "0,1" bitfld.long 0x04 30. " AXI ,Takes the value of the GEM_AXI define" "0,1" bitfld.long 0x04 26.--29. " TX_PBUF_ADDR ,Takes the value of the GEM_TX_PBUF_ADDR define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 22.--25. " RX_PBUF_ADDR ,Takes the value of the GEM_RX_PBUF_ADDR define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 21. " TX_PKT_BUFFER ,Takes the value of the GEM_TX_PKT_BUFFER define" "0,1" bitfld.long 0x04 20. " RX_PKT_BUFFER ,Takes the value of the GEM_RX_PKT_BUFFER define" "0,1" textline " " bitfld.long 0x04 16.--19. " HPROT_VALUE ,Takes the value of the GEM_HPROT_VALUE define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x04 0.--15. 1. " JUMBO_MAX_LENGTH ,Takes the value of the gem_jumbo_max_length define" line.long 0x08 "DESIGNCFG_DEBUG3,Design Configuration Register 3" bitfld.long 0x08 24.--29. " NUM_SPEC_ADD_FILTERS ,Takes the value of the NUM_SPEC_ADD_FILTERS define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" rgroup.long 0x290++0x17 line.long 0x00 "DESIGNCFG_DEBUG5,Design Configuration Register 5" bitfld.long 0x00 29.--31. " AXI_PROT_VALUE ,Takes the value of the GEM_AXI_PROT_VALUE define" "0,1,2,3,4,5,6,7" bitfld.long 0x00 28. " TSU_CLK ,Takes the value of the GEM_TSU_CLK define" "0,1" hexmask.long.byte 0x00 20.--27. 1. " RX_BUFFER_LENGTH_DEF ,Takes the value of the GEM_RX_BUFFER_LENGTH_DEF define" textline " " bitfld.long 0x00 19. " TX_PBUF_SIZE_DEF ,Takes the value of the GEM_TX_PBUF_SIZE_DEF define" "0,1" bitfld.long 0x00 17.--18. " RX_PBUF_SIZE_DEF ,Takes the value of the GEM_RX_PBUF_SIZE_DEF define" "0,1,2,3" bitfld.long 0x00 15.--16. " ENDIAN_SWAP_DEF ,Takes the value of the GEM_ENDIAN_SWAP_DEF define" "0,1,2,3" textline " " bitfld.long 0x00 12.--14. " MDC_CLOCK_DIV ,Takes the value of the GEM_MDC_CLOCK_DIV define" "0,1,2,3,4,5,6,7" bitfld.long 0x00 10.--11. " DMA_BUS_WIDTH_DEF ,Takes the value of the GEM_DMA_BUS_WIDTH_DEF define" "0,1,2,3" bitfld.long 0x00 9. " PHY_IDENT ,Takes the value of the GEM_PHY_IDENT define" "0,1" textline " " bitfld.long 0x00 8. " TSU ,Takes the value of the GEM_TSU define" "0,1" bitfld.long 0x00 4.--7. " TX_FIFO_CNT_WIDTH ,Takes the value of the GEM_TX_FIFO_CNT_WIDTH define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " RX_FIFO_CNT_WIDTH ,Takes the value of the GEM_RX_FIFO_CNT_WIDTH define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " line.long 0x04 "DESIGNCFG_DEBUG6,Design Configuration Register 6" bitfld.long 0x04 25. " PBUF_CUTTHRU ,Takes the value of the GEM_PBUF_CUTTHRU define" "0,1" bitfld.long 0x04 24. " PFC_MULTI_QUANTUM ,Takes the value of the GEM_PFC_MULTI_QUANTUM define" "0,1" bitfld.long 0x04 23. " DMA_ADDR_WIDTH_IS_64B ,Takes the value of the GEM_DMA_ADDR_WIDTH_IS_64B define" "0,1" textline " " bitfld.long 0x04 22. " HOST_IF_SOFT_SELECT ,Takes the value of the GEM_HOST_IF_SOFT_SELECT define" "0,1" bitfld.long 0x04 21. " TX_ADD_FIFO_IF ,Takes the value of the GEM_TX_ADD_FIFO_IF define" "0,1" bitfld.long 0x04 20. " EXT_TSU_TIMER ,Takes the value of the GEM_EXT_TSU_TIMER define" "0,1" textline " " bitfld.long 0x04 16.--19. " TX_PBUF_QUEUE_SEGMENT_SIZE ,Takes the value of the GEM_TX_PBUF_QUEUE_SEGMENT_SIZE define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 15. " DMA_PRIORITY_QUEUE[15] ,Takes the value of the DMA_PRIORITY_QUEUE15 define" "0,1" bitfld.long 0x04 14. " [14] ,Takes the value of the DMA_PRIORITY_QUEUE14 define" "0,1" bitfld.long 0x04 13. " [13] ,Takes the value of the DMA_PRIORITY_QUEUE13 define" "0,1" textline " " bitfld.long 0x04 12. " [12] ,Takes the value of the DMA_PRIORITY_QUEUE12 define" "0,1" bitfld.long 0x04 11. " [11] ,Takes the value of the DMA_PRIORITY_QUEUE11 define" "0,1" bitfld.long 0x04 10. " [10] ,Takes the value of the DMA_PRIORITY_QUEUE10 define" "0,1" textline " " bitfld.long 0x04 9. " [9] ,Takes the value of the DMA_PRIORITY_QUEUE9 define" "0,1" bitfld.long 0x04 8. " [8] ,Takes the value of the DMA_PRIORITY_QUEUE8 define" "0,1" bitfld.long 0x04 7. " [7] ,Takes the value of the DMA_PRIORITY_QUEUE7 define" "0,1" textline " " bitfld.long 0x04 6. " [6] ,Takes the value of the DMA_PRIORITY_QUEUE6 define" "0,1" bitfld.long 0x04 5. " [5] ,Takes the value of the DMA_PRIORITY_QUEUE5 define" "0,1" bitfld.long 0x04 4. " [4] ,Takes the value of the DMA_PRIORITY_QUEUE4 define" "0,1" textline " " bitfld.long 0x04 3. " [3] ,Takes the value of the DMA_PRIORITY_QUEUE3 define" "0,1" bitfld.long 0x04 2. " [2] ,Takes the value of the DMA_PRIORITY_QUEUE2 define" "0,1" bitfld.long 0x04 1. " [1] ,Takes the value of the DMA_PRIORITY_QUEUE1 define" "0,1" line.long 0x08 "DESIGNCFG_DEBUG7,Design Configuration Register 7" bitfld.long 0x08 28.--31. " TX_PBUF_NUM_SEGMENTS_Q[7] ,Takes the value of the GEM_TX_PBUF_NUM_SEGMENTS_QUEUE7 define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 24.--27. " [6] ,Takes the value of the GEM_TX_PBUF_NUM_SEGMENTS_QUEUE6 define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 20.--23. " [5] ,Takes the value of the GEM_TX_PBUF_NUM_SEGMENTS_QUEUE5 define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x08 16.--19. " [4] ,Takes the value of the GEM_TX_PBUF_NUM_SEGMENTS_QUEUE4 define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 12.--15. " [3] ,Takes the value of the GEM_TX_PBUF_NUM_SEGMENTS_QUEUE3 define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 8.--11. " [2] ,Takes the value of the GEM_TX_PBUF_NUM_SEGMENTS_QUEUE2 define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x08 4.--7. " [1] ,Takes the value of the GEM_TX_PBUF_NUM_SEGMENTS_Q1 define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--3. " [0] ,Takes the value of the GEM_TX_PBUF_NUM_SEGMENTS_Q0 define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x0C "DESIGNCFG_DEBUG8,Design Configuration Register 8" hexmask.long.byte 0x0C 24.--31. 1. " NUM_TYPE1_SCREENERS ,Takes the value of the NUM_TYPE1_SCREENERS define" hexmask.long.byte 0x0C 16.--23. 1. " NUM_TYPE2_SCREENERS ,Takes the value of the NUM_TYPE2_SCREENERS define" textline " " hexmask.long.byte 0x0C 8.--15. 1. " NUM_SCR2_ETHTYPE_REGS ,Takes the value of the NUM_SCR2_ETHTYPE_REGS define" hexmask.long.byte 0x0C 0.--7. 1. " NUM_SCR2_COMPARE_REGS ,Takes the value of the NUM_SCR2_COMPARE_REGS define" line.long 0x10 "DESIGNCFG_DEBUG9,Design Configuration Register 9" bitfld.long 0x10 28.--31. " TX_PBUF_NUM_SEGMENTS_Q[15] ,Takes the value of the GEM_TX_PBUF_NUM_SEGMENTS_Q15 define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 24.--27. " [14] ,Takes the value of the GEM_TX_PBUF_NUM_SEGMENTS_Q14 define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 20.--23. " [13] ,Takes the value of the GEM_TX_PBUF_NUM_SEGMENTS_Q13 define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x10 16.--19. " [12] ,Takes the value of the GEM_TX_PBUF_NUM_SEGMENTS_Q12 define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 12.--15. " [11] ,Takes the value of the GEM_TX_PBUF_NUM_SEGMENTS_Q11 define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 8.--11. " [10] ,Takes the value of the GEM_TX_PBUF_NUM_SEGMENTS_Q10 define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x10 4.--7. " [9] ,Takes the value of the GEM_TX_PBUF_NUM_SEGMENTS_Q9 define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 0.--3. " [8] ,Takes the value of the GEM_TX_PBUF_NUM_SEGMENTS_Q8 define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " line.long 0x14 "DESIGNCFG_DEBUG10,Design Configuration Register 10" bitfld.long 0x14 28.--31. " EMAC_BUS_WIDTH ,Takes the value of the GEM_EMAC_BUS_WIDTH define" ",32bits,64bits,,128bits,?..." bitfld.long 0x14 24.--27. " TX_PBUF_DATA ,Takes the value of the GEM_TX_PBUF_DATA define" ",32bits,64bits,,128bits,?..." textline " " bitfld.long 0x14 20.--23. " RX_PBUF_DATA ,Takes the value of the GEM_RX_PBUF_DATA define" ",32bits,64bits,,128bits,?..." bitfld.long 0x14 16.--19. " AXI_ACCESS_PIPELINE_BITS ,Takes the value of the GEM_AXI_ACCESS_PIPELINE_BITS define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x14 12.--15. " AXI_TX_DESCR_RD_BUFF_BITS ,Takes the value of the GEM_AXI_TX_DESCR_RD_BUFF_BITS define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x14 8.--11. " AXI_RX_DESCR_RD_BUFF_BITS ,Takes the value of the GEM_AXI_RX_DESCR_RD_BUFF_BITS define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x14 4.--7. " AXI_TX_DESCR_WR_BUFF_BITS ,Takes the value of the GEM_AXI_TX_DESCR_WR_BUFF_BITS define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x14 0.--3. " AXI_RX_DESCR_WR_BUFF_BITS ,Takes the value of the GEM_AXI_RX_DESCR_WR_BUFF_BITS define" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x400++0x03 line.long 0x00 "INT_Q1_STATUS,Priority Queue Interrupt Status Register" bitfld.long 0x00 11. " RESP_NOT_OK ,BRESP/HRESP not OK" "No occurred,Occurred" bitfld.long 0x00 10. " RO ,Receive overrun" "No occurred,Occurred" textline " " bitfld.long 0x00 7. " TC ,Transmit complete" "No occurred,Occurred" bitfld.long 0x00 6. " AMBA_ERROR ,Transmit frame corruption due to AMBA (Ahb/axi) error" "No occurred,Occurred" textline " " bitfld.long 0x00 5. " RLEORLC ,Retry limit exceeded or late collision" "No occurred,Occurred" bitfld.long 0x00 2. " RX_USED_READ ,RX used bit read" "No occurred,Occurred" textline " " bitfld.long 0x00 1. " RC ,Receive complete" "No occurred,Occurred" group.long 0x440++0x03 line.long 0x00 "TRANSMIT_Q1_PTR,Transmit Buffer Queue Base Address Register" hexmask.long 0x00 2.--31. 0x04 " DMA_TX_Q_PTR ,Transmit buffer queue base address" group.long 0x480++0x03 line.long 0x00 "RECEIVE_Q1_PTR,Receive Buffer Queue Base Address Register" hexmask.long 0x00 2.--31. 0x04 " DMA_RX_Q_PTR ,Receive buffer queue base address" group.long 0x4A0++0x03 line.long 0x00 "DMA_RXBUF_SIZE_Q1,Receive Buffer Queue Size" hexmask.long.byte 0x00 0.--7. 1. " DMA_RX_Q_BUF_SIZE ,DMA receive buffer size in system memory" group.long 0x4BC++0x1B line.long 0x00 "CBS_CONTROL,Enable credit-based Shaping Register" bitfld.long 0x00 1. " CBS_ENABLE_QUEUE_B ,Enable Credit-Based shaping on the 2nd highest priority queue (Queue B)" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " CBS_ENABLE_QUEUE_A ,Enable Credit-Based shaping on the highest priority queue (Queue A)" "Disabled,Enabled" line.long 0x04 "CBS_IDLESLOPE_Q_A,Idle/slope Value For Queue A In Bytes/sec Register" line.long 0x08 "CBS_IDLESLOPE_Q_B,Idle/slope Value For Queue B In Bytes/sec Register" line.long 0x0C "UPPER_TX_Q_BASE_ADDR,Upper 32 Bits Of Transmit Buffer Descriptor Queue Base Address" line.long 0x10 "TX_BD_CONTROL,TX BD Control Register" bitfld.long 0x10 4.--5. " TX_BD_TS_MODE ,TX descriptor timestamp insertion mode" "Disabled,PTP event frames only,All PTP frames only,All frames" line.long 0x14 "RX_BD_CONTROL,RX BD Control Register" bitfld.long 0x14 4.--5. " RX_BD_TS_MODE ,RX descriptor timestamp insertion mode" "Disabled,PTP event frames only,All PTP frames only,All frames" line.long 0x18 "UPPER_RX_Q_BASE_ADDR,Upper 32 Bits Of Receive Buffer Descriptor Queue Base Address Register" textline " " group.long 0x500++0x0F line.long 0x00 "SCREENING_TYPE_1_REG_0,Screening Type 1 Register 0" bitfld.long 0x00 29. " UPME ,UDP port match enable" "Disabled,Enabled" bitfld.long 0x00 28. " DETC_EN ,DS/TC enable" "Disabled,Enabled" hexmask.long.word 0x00 12.--27. 1. " UDP_PM ,UDP port match" textline " " hexmask.long.byte 0x00 4.--11. 1. " DSTC_MATCH ,DS/TC match" bitfld.long 0x00 0.--3. " QN ,Queue number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "SCREENING_TYPE_1_REG_1,Screening Type 1 Register 1" bitfld.long 0x04 29. " UPME ,UDP port match enable" "Disabled,Enabled" bitfld.long 0x04 28. " DETC_EN ,DS/TC enable" "Disabled,Enabled" hexmask.long.word 0x04 12.--27. 1. " UDP_PM ,UDP port match" textline " " hexmask.long.byte 0x04 4.--11. 1. " DSTC_MATCH ,DS/TC match" bitfld.long 0x04 0.--3. " QN ,Queue number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "SCREENING_TYPE_1_REG_2,Screening Type 1 Register 2" bitfld.long 0x08 29. " UPME ,UDP port match enable" "Disabled,Enabled" bitfld.long 0x08 28. " DETC_EN ,DS/TC enable" "Disabled,Enabled" hexmask.long.word 0x08 12.--27. 1. " UDP_PM ,UDP port match" textline " " hexmask.long.byte 0x08 4.--11. 1. " DSTC_MATCH ,DS/TC match" bitfld.long 0x08 0.--3. " QN ,Queue number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x0C "SCREENING_TYPE_1_REG_3,Screening Type 1 Register 3" bitfld.long 0x0C 29. " UPME ,UDP port match enable" "Disabled,Enabled" bitfld.long 0x0C 28. " DETC_EN ,DS/TC enable" "Disabled,Enabled" hexmask.long.word 0x0C 12.--27. 1. " UDP_PM ,UDP port match" textline " " hexmask.long.byte 0x0C 4.--11. 1. " DSTC_MATCH ,DS/TC match" bitfld.long 0x0C 0.--3. " QN ,Queue number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x540++0x0F line.long 0x00 "SCREENING_TYPE_2_REG_0,Screening Type 2 Register 0" bitfld.long 0x00 30. " COMPARE_C_EN ,Compare C enable" "Disabled,Enabled" bitfld.long 0x00 25.--29. " COMPARE_C ,Compare C - index to screener type 2 compare register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 24. " COMPARE_B_EN ,Compare B enable" "Disabled,Enabled" textline " " bitfld.long 0x00 19.--23. " COMPARE_B ,Compare B - index to screener type 2 compare register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 18. " COMPARE_A_EN ,Compare A enable" "Disabled,Enabled" bitfld.long 0x00 13.--17. " COMPARE_A ,Compare A - index to screener type 2 compare register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 12. " ETHERTYPE_EN ,Ethertype enable" "Disabled,Enabled" bitfld.long 0x00 9.--11. " INDEX ,Index to screener type 2 ethertype register" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8. " VLAN_EN ,VLAN enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4.--6. " VLAN_PRIORITY ,VLAN priority" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. " QUEUE_NUMBER ,Queue number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "SCREENING_TYPE_2_REG_1,Screening Type 2 Register 1" bitfld.long 0x04 30. " COMPARE_C_EN ,Compare C enable" "Disabled,Enabled" bitfld.long 0x04 25.--29. " COMPARE_C ,Compare C - index to screener type 2 compare register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 24. " COMPARE_B_EN ,Compare B enable" "Disabled,Enabled" textline " " bitfld.long 0x04 19.--23. " COMPARE_B ,Compare B - index to screener type 2 compare register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 18. " COMPARE_A_EN ,Compare A enable" "Disabled,Enabled" bitfld.long 0x04 13.--17. " COMPARE_A ,Compare A - index to screener type 2 compare register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x04 12. " ETHERTYPE_EN ,Ethertype enable" "Disabled,Enabled" bitfld.long 0x04 9.--11. " INDEX ,Index to screener type 2 ethertype register" "0,1,2,3,4,5,6,7" bitfld.long 0x04 8. " VLAN_EN ,VLAN enable" "Disabled,Enabled" textline " " bitfld.long 0x04 4.--6. " VLAN_PRIORITY ,VLAN priority" "0,1,2,3,4,5,6,7" bitfld.long 0x04 0.--3. " QUEUE_NUMBER ,Queue number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "SCREENING_TYPE_2_REG_2,Screening Type 2 Register 2" bitfld.long 0x08 30. " COMPARE_C_EN ,Compare C enable" "Disabled,Enabled" bitfld.long 0x08 25.--29. " COMPARE_C ,Compare C - index to screener type 2 compare register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x08 24. " COMPARE_B_EN ,Compare B enable" "Disabled,Enabled" textline " " bitfld.long 0x08 19.--23. " COMPARE_B ,Compare B - index to screener type 2 compare register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x08 18. " COMPARE_A_EN ,Compare A enable" "Disabled,Enabled" bitfld.long 0x08 13.--17. " COMPARE_A ,Compare A - index to screener type 2 compare register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x08 12. " ETHERTYPE_EN ,Ethertype enable" "Disabled,Enabled" bitfld.long 0x08 9.--11. " INDEX ,Index to screener type 2 ethertype register" "0,1,2,3,4,5,6,7" bitfld.long 0x08 8. " VLAN_EN ,VLAN enable" "Disabled,Enabled" textline " " bitfld.long 0x08 4.--6. " VLAN_PRIORITY ,VLAN priority" "0,1,2,3,4,5,6,7" bitfld.long 0x08 0.--3. " QUEUE_NUMBER ,Queue number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x0C "SCREENING_TYPE_2_REG_3,Screening Type 2 Register 3" bitfld.long 0x0C 30. " COMPARE_C_EN ,Compare C enable" "Disabled,Enabled" bitfld.long 0x0C 25.--29. " COMPARE_C ,Compare C - index to screener type 2 compare register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0C 24. " COMPARE_B_EN ,Compare B enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 19.--23. " COMPARE_B ,Compare B - index to screener type 2 compare register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0C 18. " COMPARE_A_EN ,Compare A enable" "Disabled,Enabled" bitfld.long 0x0C 13.--17. " COMPARE_A ,Compare A - index to screener type 2 compare register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x0C 12. " ETHERTYPE_EN ,Ethertype enable" "Disabled,Enabled" bitfld.long 0x0C 9.--11. " INDEX ,Index to screener type 2 ethertype register" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 8. " VLAN_EN ,VLAN enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 4.--6. " VLAN_PRIORITY ,VLAN priority" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 0.--3. " QUEUE_NUMBER ,Queue number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x640++0x03 line.long 0x00 "INT_Q1_MASK,Interrupt Mask Register" setclrfld.long 0x00 11. -0x20 11. -0x40 11. " MASKRNOI ,BRESP/HRESP not OK mask" "Not masked,Masked" setclrfld.long 0x00 10. -0x20 10. -0x40 10. " MASKROI ,Receive overrun mask" "Not masked,Masked" setclrfld.long 0x00 7. -0x20 7. -0x40 7. " MASKTCI ,Transmit complete mask" "Not masked,Masked" textline " " setclrfld.long 0x00 6. -0x20 6. -0x40 6. " MASKTFCDTAEI ,Transmit frame corruption due to AMBA (Ahb/axi) error mask" "Not masked,Masked" setclrfld.long 0x00 5. -0x20 5. -0x40 5. " MASKRLEOLCI ,Retry limit exceeded or late collision mask" "Not masked,Masked" setclrfld.long 0x00 2. -0x20 2. -0x40 2. " MASKRXUBRI ,RX used bit read mask" "Not masked,Masked" textline " " setclrfld.long 0x00 1. -0x20 1. -0x40 1. " MASKRCI ,Receive complete mask" "Not masked,Masked" group.long 0x6E0++0x0F line.long 0x00 "ST2ETREG0,Screening Type 2 Ethernet Type Register 0" hexmask.long.word 0x00 0.--15. 1. " COMPARE_VALUE ,Ethertype compare value" line.long 0x04 "ST2ETREG1,Screening Type 2 Ethernet Type Register 1" hexmask.long.word 0x04 0.--15. 1. " COMPARE_VALUE ,Ethertype compare value" line.long 0x08 "ST2ETREG2,Screening Type 2 Ethernet Type Register 2" hexmask.long.word 0x08 0.--15. 1. " COMPARE_VALUE ,Ethertype compare value" line.long 0x0C "ST2ETREG3,Screening Type 2 Ethernet Type Register 3" hexmask.long.word 0x0C 0.--15. 1. " COMPARE_VALUE ,Ethertype compare value" group.long 0x700++0x1F line.long 0x00 "TYPE2_COMPARE_0_WORD_0,Type2 Compare Word 0 Register" hexmask.long.word 0x00 16.--31. 1. " COMPARE_VALUE ,2 byte compare value" hexmask.long.word 0x00 0.--15. 1. " MASK_VALUE ,2 byte mask value" line.long 0x04 "TYPE2_COMPARE_0_WORD_1,Type2 Compare Word 1 Register" bitfld.long 0x04 7.--8. " COMPARE_OFFSET ,Compare byte offset" "Beginning,After ether type,End of IP header,End of TCP/UDP header" hexmask.long.byte 0x04 0.--6. 1. " OFFSET_VALUE ,Offset value in bytes" line.long 0x08 "TYPE2_COMPARE_1_WORD_0,Type2 Compare Word 0 Register" hexmask.long.word 0x08 16.--31. 1. " COMPARE_VALUE ,2 byte compare value" hexmask.long.word 0x08 0.--15. 1. " MASK_VALUE ,2 byte mask value" line.long 0x0C "TYPE2_COMPARE_1_WORD_1,Type2 Compare Word 1 Register" bitfld.long 0x0C 7.--8. " COMPARE_OFFSET ,Compare byte offset" "Beginning,After ether type,End of IP header,End of TCP/UDP header" hexmask.long.byte 0x0C 0.--6. 1. " OFFSET_VALUE ,Offset value in bytes" line.long 0x10 "TYPE2_COMPARE_2_WORD_0,Type2 Compare Word 0 Register" hexmask.long.word 0x10 16.--31. 1. " COMPARE_VALUE ,2 byte compare value" hexmask.long.word 0x10 0.--15. 1. " MASK_VALUE ,2 byte mask value" line.long 0x14 "TYPE2_COMPARE_2_WORD_1,Type2 Compare Word 1 Register" bitfld.long 0x14 7.--8. " COMPARE_OFFSET ,Compare byte offset" "Beginning,After ether type,End of IP header,End of TCP/UDP header" hexmask.long.byte 0x14 0.--6. 1. " OFFSET_VALUE ,Offset value in bytes" line.long 0x18 "TYPE2_COMPARE_3_WORD_0,Type2 Compare Word 0 Register" hexmask.long.word 0x18 16.--31. 1. " COMPARE_VALUE ,2 byte compare value" hexmask.long.word 0x18 0.--15. 1. " MASK_VALUE ,2 byte mask value" line.long 0x1C "TYPE2_COMPARE_3_WORD_1,Type2 Compare Word 1 Register" bitfld.long 0x1C 7.--8. " COMPARE_OFFSET ,Compare byte offset" "Beginning,After ether type,End of IP header,End of TCP/UDP header" hexmask.long.byte 0x1C 0.--6. 1. " OFFSET_VALUE ,Offset value in bytes" width 0x0B tree.end tree.end tree "GPIO (General Purpose Input/Output)" base ad:0xFF0A0000 width 20. tree "GPIO Bank 0" group.long 0x0++0x07 line.long 0x00 "MASK_DATA_0_LSW,Maskable single-word-based Data Access Register" bitfld.long 0x00 31. " MASK_0_LSW[15] ,Mask value to be applied on writes to pin 15" "Not masked,Masked" bitfld.long 0x00 30. " MASK_0_LSW[14] ,Mask value to be applied on writes to pin 14" "Not masked,Masked" bitfld.long 0x00 29. " MASK_0_LSW[13] ,Mask value to be applied on writes to pin 13" "Not masked,Masked" bitfld.long 0x00 28. " MASK_0_LSW[12] ,Mask value to be applied on writes to pin 12" "Not masked,Masked" textline " " bitfld.long 0x00 27. " MASK_0_LSW[11] ,Mask value to be applied on writes to pin 11" "Not masked,Masked" bitfld.long 0x00 26. " MASK_0_LSW[10] ,Mask value to be applied on writes to pin 10" "Not masked,Masked" bitfld.long 0x00 25. " MASK_0_LSW[9] ,Mask value to be applied on writes to pin 9" "Not masked,Masked" bitfld.long 0x00 24. " MASK_0_LSW[8] ,Mask value to be applied on writes to pin 8" "Not masked,Masked" textline " " bitfld.long 0x00 23. " MASK_0_LSW[7] ,Mask value to be applied on writes to pin 7" "Not masked,Masked" bitfld.long 0x00 22. " MASK_0_LSW[6] ,Mask value to be applied on writes to pin 6" "Not masked,Masked" bitfld.long 0x00 21. " MASK_0_LSW[5] ,Mask value to be applied on writes to pin 5" "Not masked,Masked" bitfld.long 0x00 20. " MASK_0_LSW[4] ,Mask value to be applied on writes to pin 4" "Not masked,Masked" textline " " bitfld.long 0x00 19. " MASK_0_LSW[3] ,Mask value to be applied on writes to pin 3" "Not masked,Masked" bitfld.long 0x00 18. " MASK_0_LSW[2] ,Mask value to be applied on writes to pin 2" "Not masked,Masked" bitfld.long 0x00 17. " MASK_0_LSW[1] ,Mask value to be applied on writes to pin 1" "Not masked,Masked" bitfld.long 0x00 16. " MASK_0_LSW[0] ,Mask value to be applied on writes to pin 0" "Not masked,Masked" textline " " bitfld.long 0x00 15. " DATA_0_LSW[15] ,Data value read from or written to pin 15" "Low,High" bitfld.long 0x00 14. " DATA_0_LSW[14] ,Data value read from or written to pin 14" "Low,High" bitfld.long 0x00 13. " DATA_0_LSW[13] ,Data value read from or written to pin 13" "Low,High" bitfld.long 0x00 12. " DATA_0_LSW[12] ,Data value read from or written to pin 12" "Low,High" textline " " bitfld.long 0x00 11. " DATA_0_LSW[11] ,Data value read from or written to pin 11" "Low,High" bitfld.long 0x00 10. " DATA_0_LSW[10] ,Data value read from or written to pin 10" "Low,High" bitfld.long 0x00 9. " DATA_0_LSW[9] ,Data value read from or written to pin 9" "Low,High" bitfld.long 0x00 8. " DATA_0_LSW[8] ,Data value read from or written to pin 8" "Low,High" textline " " bitfld.long 0x00 7. " DATA_0_LSW[7] ,Data value read from or written to pin 7" "Low,High" bitfld.long 0x00 6. " DATA_0_LSW[6] ,Data value read from or written to pin 6" "Low,High" bitfld.long 0x00 5. " DATA_0_LSW[5] ,Data value read from or written to pin 5" "Low,High" bitfld.long 0x00 4. " DATA_0_LSW[4] ,Data value read from or written to pin 4" "Low,High" textline " " bitfld.long 0x00 3. " DATA_0_LSW[3] ,Data value read from or written to pin 3" "Low,High" bitfld.long 0x00 2. " DATA_0_LSW[2] ,Data value read from or written to pin 2" "Low,High" bitfld.long 0x00 1. " DATA_0_LSW[1] ,Data value read from or written to pin 1" "Low,High" bitfld.long 0x00 0. " DATA_0_LSW[0] ,Data value read from or written to pin 0" "Low,High" line.long 0x04 "MASK_DATA_0_MSW,Maskable single-word-based Data Access Register" bitfld.long 0x04 25. " MASK_0_MSW[9] ,Mask value to be applied on writes to pin 9" "Not masked,Masked" bitfld.long 0x04 24. " MASK_0_MSW[8] ,Mask value to be applied on writes to pin 8" "Not masked,Masked" textline " " bitfld.long 0x04 23. " MASK_0_MSW[7] ,Mask value to be applied on writes to pin 7" "Not masked,Masked" bitfld.long 0x04 22. " MASK_0_MSW[6] ,Mask value to be applied on writes to pin 6" "Not masked,Masked" bitfld.long 0x04 21. " MASK_0_MSW[5] ,Mask value to be applied on writes to pin 5" "Not masked,Masked" bitfld.long 0x04 20. " MASK_0_MSW[4] ,Mask value to be applied on writes to pin 4" "Not masked,Masked" textline " " bitfld.long 0x04 19. " MASK_0_MSW[3] ,Mask value to be applied on writes to pin 3" "Not masked,Masked" bitfld.long 0x04 18. " MASK_0_MSW[2] ,Mask value to be applied on writes to pin 2" "Not masked,Masked" bitfld.long 0x04 17. " MASK_0_MSW[1] ,Mask value to be applied on writes to pin 1" "Not masked,Masked" bitfld.long 0x04 16. " MASK_0_MSW[0] ,Mask value to be applied on writes to pin 0" "Not masked,Masked" textline " " bitfld.long 0x04 9. " DATA_0_MSW[9] ,Data value read from or written to pin 9" "Low,High" bitfld.long 0x04 8. " DATA_0_MSW[8] ,Data value read from or written to pin 8" "Low,High" textline " " bitfld.long 0x04 7. " DATA_0_MSW[7] ,Data value read from or written to pin 7" "Low,High" bitfld.long 0x04 6. " DATA_0_MSW[6] ,Data value read from or written to pin 6" "Low,High" bitfld.long 0x04 5. " DATA_0_MSW[5] ,Data value read from or written to pin 5" "Low,High" bitfld.long 0x04 4. " DATA_0_MSW[4] ,Data value read from or written to pin 4" "Low,High" textline " " bitfld.long 0x04 3. " DATA_0_MSW[3] ,Data value read from or written to pin 3" "Low,High" bitfld.long 0x04 2. " DATA_0_MSW[2] ,Data value read from or written to pin 2" "Low,High" bitfld.long 0x04 1. " DATA_0_MSW[1] ,Data value read from or written to pin 1" "Low,High" bitfld.long 0x04 0. " DATA_0_MSW[0] ,Data value read from or written to pin 0" "Low,High" group.long 0x40++0x03 line.long 0x00 "DATA_0,Unmasked double-word-based Data Access Register" bitfld.long 0x00 25. " DATA_0[25] ,Data value read from or written to pin 25" "Low,High" bitfld.long 0x00 24. " DATA_0[24] ,Data value read from or written to pin 24" "Low,High" textline " " bitfld.long 0x00 23. " DATA_0[23] ,Data value read from or written to pin 23" "Low,High" bitfld.long 0x00 22. " DATA_0[22] ,Data value read from or written to pin 22" "Low,High" bitfld.long 0x00 21. " DATA_0[21] ,Data value read from or written to pin 21" "Low,High" bitfld.long 0x00 20. " DATA_0[20] ,Data value read from or written to pin 20" "Low,High" textline " " bitfld.long 0x00 19. " DATA_0[19] ,Data value read from or written to pin 19" "Low,High" bitfld.long 0x00 18. " DATA_0[18] ,Data value read from or written to pin 18" "Low,High" bitfld.long 0x00 17. " DATA_0[17] ,Data value read from or written to pin 17" "Low,High" bitfld.long 0x00 16. " DATA_0[16] ,Data value read from or written to pin 16" "Low,High" textline " " bitfld.long 0x00 15. " DATA_0[15] ,Data value read from or written to pin 15" "Low,High" bitfld.long 0x00 14. " DATA_0[14] ,Data value read from or written to pin 14" "Low,High" bitfld.long 0x00 13. " DATA_0[13] ,Data value read from or written to pin 13" "Low,High" bitfld.long 0x00 12. " DATA_0[12] ,Data value read from or written to pin 12" "Low,High" textline " " bitfld.long 0x00 11. " DATA_0[11] ,Data value read from or written to pin 11" "Low,High" bitfld.long 0x00 10. " DATA_0[10] ,Data value read from or written to pin 10" "Low,High" bitfld.long 0x00 9. " DATA_0[9] ,Data value read from or written to pin 9" "Low,High" bitfld.long 0x00 8. " DATA_0[8] ,Data value read from or written to pin 8" "Low,High" textline " " bitfld.long 0x00 7. " DATA_0[7] ,Data value read from or written to pin 7" "Low,High" bitfld.long 0x00 6. " DATA_0[6] ,Data value read from or written to pin 6" "Low,High" bitfld.long 0x00 5. " DATA_0[5] ,Data value read from or written to pin 5" "Low,High" bitfld.long 0x00 4. " DATA_0[4] ,Data value read from or written to pin 4" "Low,High" textline " " bitfld.long 0x00 3. " DATA_0[3] ,Data value read from or written to pin 3" "Low,High" bitfld.long 0x00 2. " DATA_0[2] ,Data value read from or written to pin 2" "Low,High" bitfld.long 0x00 1. " DATA_0[1] ,Data value read from or written to pin 1" "Low,High" bitfld.long 0x00 0. " DATA_0[0] ,Data value read from or written to pin 0" "Low,High" rgroup.long 0x60++0x03 line.long 0x00 "DATA_0_RO,Read Only Pin Value Register" bitfld.long 0x00 25. " DATA_0_RO[25] ,GPIO pin value 25" "Low,High" bitfld.long 0x00 24. " DATA_0_RO[24] ,GPIO pin value 24" "Low,High" textline " " bitfld.long 0x00 23. " DATA_0_RO[23] ,GPIO pin value 23" "Low,High" bitfld.long 0x00 22. " DATA_0_RO[22] ,GPIO pin value 22" "Low,High" bitfld.long 0x00 21. " DATA_0_RO[21] ,GPIO pin value 21" "Low,High" bitfld.long 0x00 20. " DATA_0_RO[20] ,GPIO pin value 20" "Low,High" textline " " bitfld.long 0x00 19. " DATA_0_RO[19] ,GPIO pin value 19" "Low,High" bitfld.long 0x00 18. " DATA_0_RO[18] ,GPIO pin value 18" "Low,High" bitfld.long 0x00 17. " DATA_0_RO[17] ,GPIO pin value 17" "Low,High" bitfld.long 0x00 16. " DATA_0_RO[16] ,GPIO pin value 16" "Low,High" textline " " bitfld.long 0x00 15. " DATA_0_RO[15] ,GPIO pin value 15" "Low,High" bitfld.long 0x00 14. " DATA_0_RO[14] ,GPIO pin value 14" "Low,High" bitfld.long 0x00 13. " DATA_0_RO[13] ,GPIO pin value 13" "Low,High" bitfld.long 0x00 12. " DATA_0_RO[12] ,GPIO pin value 12" "Low,High" textline " " bitfld.long 0x00 11. " DATA_0_RO[11] ,GPIO pin value 11" "Low,High" bitfld.long 0x00 10. " DATA_0_RO[10] ,GPIO pin value 10" "Low,High" bitfld.long 0x00 9. " DATA_0_RO[9] ,GPIO pin value 9" "Low,High" bitfld.long 0x00 8. " DATA_0_RO[8] ,GPIO pin value 8" "Low,High" textline " " bitfld.long 0x00 7. " DATA_0_RO[7] ,GPIO pin value 7" "Low,High" bitfld.long 0x00 6. " DATA_0_RO[6] ,GPIO pin value 6" "Low,High" bitfld.long 0x00 5. " DATA_0_RO[5] ,GPIO pin value 5" "Low,High" bitfld.long 0x00 4. " DATA_0_RO[4] ,GPIO pin value 4" "Low,High" textline " " bitfld.long 0x00 3. " DATA_0_RO[3] ,GPIO pin value 3" "Low,High" bitfld.long 0x00 2. " DATA_0_RO[2] ,GPIO pin value 2" "Low,High" bitfld.long 0x00 1. " DATA_0_RO[1] ,GPIO pin value 1" "Low,High" bitfld.long 0x00 0. " DATA_0_RO[0] ,GPIO pin value 0" "Low,High" group.long 0x204++0x07 line.long 0x00 "DIRM_0,Direction Mode Configuration Register" bitfld.long 0x00 25. " DIRECTION_0[25] ,Direction mode for bank 0 pin 25" "Input,Output" bitfld.long 0x00 24. " DIRECTION_0[24] ,Direction mode for bank 0 pin 24" "Input,Output" textline " " bitfld.long 0x00 23. " DIRECTION_0[23] ,Direction mode for bank 0 pin 23" "Input,Output" bitfld.long 0x00 22. " DIRECTION_0[22] ,Direction mode for bank 0 pin 22" "Input,Output" bitfld.long 0x00 21. " DIRECTION_0[21] ,Direction mode for bank 0 pin 21" "Input,Output" bitfld.long 0x00 20. " DIRECTION_0[20] ,Direction mode for bank 0 pin 20" "Input,Output" textline " " bitfld.long 0x00 19. " DIRECTION_0[19] ,Direction mode for bank 0 pin 19" "Input,Output" bitfld.long 0x00 18. " DIRECTION_0[18] ,Direction mode for bank 0 pin 18" "Input,Output" bitfld.long 0x00 17. " DIRECTION_0[17] ,Direction mode for bank 0 pin 17" "Input,Output" bitfld.long 0x00 16. " DIRECTION_0[16] ,Direction mode for bank 0 pin 16" "Input,Output" textline " " bitfld.long 0x00 15. " DIRECTION_0[15] ,Direction mode for bank 0 pin 15" "Input,Output" bitfld.long 0x00 14. " DIRECTION_0[14] ,Direction mode for bank 0 pin 14" "Input,Output" bitfld.long 0x00 13. " DIRECTION_0[13] ,Direction mode for bank 0 pin 13" "Input,Output" bitfld.long 0x00 12. " DIRECTION_0[12] ,Direction mode for bank 0 pin 12" "Input,Output" textline " " bitfld.long 0x00 11. " DIRECTION_0[11] ,Direction mode for bank 0 pin 11" "Input,Output" bitfld.long 0x00 10. " DIRECTION_0[10] ,Direction mode for bank 0 pin 10" "Input,Output" bitfld.long 0x00 9. " DIRECTION_0[9] ,Direction mode for bank 0 pin 9" "Input,Output" bitfld.long 0x00 8. " DIRECTION_0[8] ,Direction mode for bank 0 pin 8" "Input,Output" textline " " bitfld.long 0x00 7. " DIRECTION_0[7] ,Direction mode for bank 0 pin 7" "Input,Output" bitfld.long 0x00 6. " DIRECTION_0[6] ,Direction mode for bank 0 pin 6" "Input,Output" bitfld.long 0x00 5. " DIRECTION_0[5] ,Direction mode for bank 0 pin 5" "Input,Output" bitfld.long 0x00 4. " DIRECTION_0[4] ,Direction mode for bank 0 pin 4" "Input,Output" textline " " bitfld.long 0x00 3. " DIRECTION_0[3] ,Direction mode for bank 0 pin 3" "Input,Output" bitfld.long 0x00 2. " DIRECTION_0[2] ,Direction mode for bank 0 pin 2" "Input,Output" bitfld.long 0x00 1. " DIRECTION_0[1] ,Direction mode for bank 0 pin 1" "Input,Output" bitfld.long 0x00 0. " DIRECTION_0[0] ,Direction mode for bank 0 pin 0" "Input,Output" line.long 0x04 "OEN_0,Output Enable Register" bitfld.long 0x04 25. " OP_ENABLE_0[25] ,Output enable for bank 0 pin 25" "Disabled,Enabled" bitfld.long 0x04 24. " OP_ENABLE_0[24] ,Output enable for bank 0 pin 24" "Disabled,Enabled" textline " " bitfld.long 0x04 23. " OP_ENABLE_0[23] ,Output enable for bank 0 pin 23" "Disabled,Enabled" bitfld.long 0x04 22. " OP_ENABLE_0[22] ,Output enable for bank 0 pin 22" "Disabled,Enabled" bitfld.long 0x04 21. " OP_ENABLE_0[21] ,Output enable for bank 0 pin 21" "Disabled,Enabled" bitfld.long 0x04 20. " OP_ENABLE_0[20] ,Output enable for bank 0 pin 20" "Disabled,Enabled" textline " " bitfld.long 0x04 19. " OP_ENABLE_0[19] ,Output enable for bank 0 pin 19" "Disabled,Enabled" bitfld.long 0x04 18. " OP_ENABLE_0[18] ,Output enable for bank 0 pin 18" "Disabled,Enabled" bitfld.long 0x04 17. " OP_ENABLE_0[17] ,Output enable for bank 0 pin 17" "Disabled,Enabled" bitfld.long 0x04 16. " OP_ENABLE_0[16] ,Output enable for bank 0 pin 16" "Disabled,Enabled" textline " " bitfld.long 0x04 15. " OP_ENABLE_0[15] ,Output enable for bank 0 pin 15" "Disabled,Enabled" bitfld.long 0x04 14. " OP_ENABLE_0[14] ,Output enable for bank 0 pin 14" "Disabled,Enabled" bitfld.long 0x04 13. " OP_ENABLE_0[13] ,Output enable for bank 0 pin 13" "Disabled,Enabled" bitfld.long 0x04 12. " OP_ENABLE_0[12] ,Output enable for bank 0 pin 12" "Disabled,Enabled" textline " " bitfld.long 0x04 11. " OP_ENABLE_0[11] ,Output enable for bank 0 pin 11" "Disabled,Enabled" bitfld.long 0x04 10. " OP_ENABLE_0[10] ,Output enable for bank 0 pin 10" "Disabled,Enabled" bitfld.long 0x04 9. " OP_ENABLE_0[9] ,Output enable for bank 0 pin 9" "Disabled,Enabled" bitfld.long 0x04 8. " OP_ENABLE_0[8] ,Output enable for bank 0 pin 8" "Disabled,Enabled" textline " " bitfld.long 0x04 7. " OP_ENABLE_0[7] ,Output enable for bank 0 pin 7" "Disabled,Enabled" bitfld.long 0x04 6. " OP_ENABLE_0[6] ,Output enable for bank 0 pin 6" "Disabled,Enabled" bitfld.long 0x04 5. " OP_ENABLE_0[5] ,Output enable for bank 0 pin 5" "Disabled,Enabled" bitfld.long 0x04 4. " OP_ENABLE_0[4] ,Output enable for bank 0 pin 4" "Disabled,Enabled" textline " " bitfld.long 0x04 3. " OP_ENABLE_0[3] ,Output enable for bank 0 pin 3" "Disabled,Enabled" bitfld.long 0x04 2. " OP_ENABLE_0[2] ,Output enable for bank 0 pin 2" "Disabled,Enabled" bitfld.long 0x04 1. " OP_ENABLE_0[1] ,Output enable for bank 0 pin 1" "Disabled,Enabled" bitfld.long 0x04 0. " OP_ENABLE_0[0] ,Output enable for bank 0 pin 0" "Disabled,Enabled" group.long (0x204+0x08)++0x03 line.long 0x00 "INT_MASK_0_SET/CLR,Interrupt Mask Status Register" setclrfld.long 0x00 25. 0x08 25. 0x04 25. " INT_MASK_0[25] ,Interrupt mask for bank 0 pin 25" "Not masked,Masked" setclrfld.long 0x00 24. 0x08 24. 0x04 24. " INT_MASK_0[24] ,Interrupt mask for bank 0 pin 24" "Not masked,Masked" textline " " setclrfld.long 0x00 23. 0x08 23. 0x04 23. " INT_MASK_0[23] ,Interrupt mask for bank 0 pin 23" "Not masked,Masked" setclrfld.long 0x00 22. 0x08 22. 0x04 22. " INT_MASK_0[22] ,Interrupt mask for bank 0 pin 22" "Not masked,Masked" setclrfld.long 0x00 21. 0x08 21. 0x04 21. " INT_MASK_0[21] ,Interrupt mask for bank 0 pin 21" "Not masked,Masked" setclrfld.long 0x00 20. 0x08 20. 0x04 20. " INT_MASK_0[20] ,Interrupt mask for bank 0 pin 20" "Not masked,Masked" textline " " setclrfld.long 0x00 19. 0x08 19. 0x04 19. " INT_MASK_0[19] ,Interrupt mask for bank 0 pin 19" "Not masked,Masked" setclrfld.long 0x00 18. 0x08 18. 0x04 18. " INT_MASK_0[18] ,Interrupt mask for bank 0 pin 18" "Not masked,Masked" setclrfld.long 0x00 17. 0x08 17. 0x04 17. " INT_MASK_0[17] ,Interrupt mask for bank 0 pin 17" "Not masked,Masked" setclrfld.long 0x00 16. 0x08 16. 0x04 16. " INT_MASK_0[16] ,Interrupt mask for bank 0 pin 16" "Not masked,Masked" textline " " setclrfld.long 0x00 15. 0x08 15. 0x04 15. " INT_MASK_0[15] ,Interrupt mask for bank 0 pin 15" "Not masked,Masked" setclrfld.long 0x00 14. 0x08 14. 0x04 14. " INT_MASK_0[14] ,Interrupt mask for bank 0 pin 14" "Not masked,Masked" setclrfld.long 0x00 13. 0x08 13. 0x04 13. " INT_MASK_0[13] ,Interrupt mask for bank 0 pin 13" "Not masked,Masked" setclrfld.long 0x00 12. 0x08 12. 0x04 12. " INT_MASK_0[12] ,Interrupt mask for bank 0 pin 12" "Not masked,Masked" textline " " setclrfld.long 0x00 11. 0x08 11. 0x04 11. " INT_MASK_0[11] ,Interrupt mask for bank 0 pin 11" "Not masked,Masked" setclrfld.long 0x00 10. 0x08 10. 0x04 10. " INT_MASK_0[10] ,Interrupt mask for bank 0 pin 10" "Not masked,Masked" setclrfld.long 0x00 9. 0x08 9. 0x04 9. " INT_MASK_0[9] ,Interrupt mask for bank 0 pin 9" "Not masked,Masked" setclrfld.long 0x00 8. 0x08 8. 0x04 8. " INT_MASK_0[8] ,Interrupt mask for bank 0 pin 8" "Not masked,Masked" textline " " setclrfld.long 0x00 7. 0x08 7. 0x04 7. " INT_MASK_0[7] ,Interrupt mask for bank 0 pin 7" "Not masked,Masked" setclrfld.long 0x00 6. 0x08 6. 0x04 6. " INT_MASK_0[6] ,Interrupt mask for bank 0 pin 6" "Not masked,Masked" setclrfld.long 0x00 5. 0x08 5. 0x04 5. " INT_MASK_0[5] ,Interrupt mask for bank 0 pin 5" "Not masked,Masked" setclrfld.long 0x00 4. 0x08 4. 0x04 4. " INT_MASK_0[4] ,Interrupt mask for bank 0 pin 4" "Not masked,Masked" textline " " setclrfld.long 0x00 3. 0x08 3. 0x04 3. " INT_MASK_0[3] ,Interrupt mask for bank 0 pin 3" "Not masked,Masked" setclrfld.long 0x00 2. 0x08 2. 0x04 2. " INT_MASK_0[2] ,Interrupt mask for bank 0 pin 2" "Not masked,Masked" setclrfld.long 0x00 1. 0x08 1. 0x04 1. " INT_MASK_0[1] ,Interrupt mask for bank 0 pin 1" "Not masked,Masked" setclrfld.long 0x00 0. 0x08 0. 0x04 0. " INT_MASK_0[0] ,Interrupt mask for bank 0 pin 0" "Not masked,Masked" group.long (0x204+0x14)++0x0F line.long 0x00 "INT_STAT_0,Interrupt Status Register" eventfld.long 0x00 25. " INT_STATUS_0[25] ,Interrupt status for bank 0 pin 25" "No interrupt,Interrupt" eventfld.long 0x00 24. " INT_STATUS_0[24] ,Interrupt status for bank 0 pin 24" "No interrupt,Interrupt" textline " " eventfld.long 0x00 23. " INT_STATUS_0[23] ,Interrupt status for bank 0 pin 23" "No interrupt,Interrupt" eventfld.long 0x00 22. " INT_STATUS_0[22] ,Interrupt status for bank 0 pin 22" "No interrupt,Interrupt" eventfld.long 0x00 21. " INT_STATUS_0[21] ,Interrupt status for bank 0 pin 21" "No interrupt,Interrupt" eventfld.long 0x00 20. " INT_STATUS_0[20] ,Interrupt status for bank 0 pin 20" "No interrupt,Interrupt" textline " " eventfld.long 0x00 19. " INT_STATUS_0[19] ,Interrupt status for bank 0 pin 19" "No interrupt,Interrupt" eventfld.long 0x00 18. " INT_STATUS_0[18] ,Interrupt status for bank 0 pin 18" "No interrupt,Interrupt" eventfld.long 0x00 17. " INT_STATUS_0[17] ,Interrupt status for bank 0 pin 17" "No interrupt,Interrupt" eventfld.long 0x00 16. " INT_STATUS_0[16] ,Interrupt status for bank 0 pin 16" "No interrupt,Interrupt" textline " " eventfld.long 0x00 15. " INT_STATUS_0[15] ,Interrupt status for bank 0 pin 15" "No interrupt,Interrupt" eventfld.long 0x00 14. " INT_STATUS_0[14] ,Interrupt status for bank 0 pin 14" "No interrupt,Interrupt" eventfld.long 0x00 13. " INT_STATUS_0[13] ,Interrupt status for bank 0 pin 13" "No interrupt,Interrupt" eventfld.long 0x00 12. " INT_STATUS_0[12] ,Interrupt status for bank 0 pin 12" "No interrupt,Interrupt" textline " " eventfld.long 0x00 11. " INT_STATUS_0[11] ,Interrupt status for bank 0 pin 11" "No interrupt,Interrupt" eventfld.long 0x00 10. " INT_STATUS_0[10] ,Interrupt status for bank 0 pin 10" "No interrupt,Interrupt" eventfld.long 0x00 9. " INT_STATUS_0[9] ,Interrupt status for bank 0 pin 9" "No interrupt,Interrupt" eventfld.long 0x00 8. " INT_STATUS_0[8] ,Interrupt status for bank 0 pin 8" "No interrupt,Interrupt" textline " " eventfld.long 0x00 7. " INT_STATUS_0[7] ,Interrupt status for bank 0 pin 7" "No interrupt,Interrupt" eventfld.long 0x00 6. " INT_STATUS_0[6] ,Interrupt status for bank 0 pin 6" "No interrupt,Interrupt" eventfld.long 0x00 5. " INT_STATUS_0[5] ,Interrupt status for bank 0 pin 5" "No interrupt,Interrupt" eventfld.long 0x00 4. " INT_STATUS_0[4] ,Interrupt status for bank 0 pin 4" "No interrupt,Interrupt" textline " " eventfld.long 0x00 3. " INT_STATUS_0[3] ,Interrupt status for bank 0 pin 3" "No interrupt,Interrupt" eventfld.long 0x00 2. " INT_STATUS_0[2] ,Interrupt status for bank 0 pin 2" "No interrupt,Interrupt" eventfld.long 0x00 1. " INT_STATUS_0[1] ,Interrupt status for bank 0 pin 1" "No interrupt,Interrupt" eventfld.long 0x00 0. " INT_STATUS_0[0] ,Interrupt status for bank 0 pin 0" "No interrupt,Interrupt" line.long 0x04 "INT_TYPE_0,Interrupt Type Configuration Register" bitfld.long 0x04 25. " INT_TYPE_0[25] ,Interrupt type for bank 0 pin 25" "Level,Edge" bitfld.long 0x04 24. " INT_TYPE_0[24] ,Interrupt type for bank 0 pin 24" "Level,Edge" textline " " bitfld.long 0x04 23. " INT_TYPE_0[23] ,Interrupt type for bank 0 pin 23" "Level,Edge" bitfld.long 0x04 22. " INT_TYPE_0[22] ,Interrupt type for bank 0 pin 22" "Level,Edge" bitfld.long 0x04 21. " INT_TYPE_0[21] ,Interrupt type for bank 0 pin 21" "Level,Edge" bitfld.long 0x04 20. " INT_TYPE_0[20] ,Interrupt type for bank 0 pin 20" "Level,Edge" textline " " bitfld.long 0x04 19. " INT_TYPE_0[19] ,Interrupt type for bank 0 pin 19" "Level,Edge" bitfld.long 0x04 18. " INT_TYPE_0[18] ,Interrupt type for bank 0 pin 18" "Level,Edge" bitfld.long 0x04 17. " INT_TYPE_0[17] ,Interrupt type for bank 0 pin 17" "Level,Edge" bitfld.long 0x04 16. " INT_TYPE_0[16] ,Interrupt type for bank 0 pin 16" "Level,Edge" textline " " bitfld.long 0x04 15. " INT_TYPE_0[15] ,Interrupt type for bank 0 pin 15" "Level,Edge" bitfld.long 0x04 14. " INT_TYPE_0[14] ,Interrupt type for bank 0 pin 14" "Level,Edge" bitfld.long 0x04 13. " INT_TYPE_0[13] ,Interrupt type for bank 0 pin 13" "Level,Edge" bitfld.long 0x04 12. " INT_TYPE_0[12] ,Interrupt type for bank 0 pin 12" "Level,Edge" textline " " bitfld.long 0x04 11. " INT_TYPE_0[11] ,Interrupt type for bank 0 pin 11" "Level,Edge" bitfld.long 0x04 10. " INT_TYPE_0[10] ,Interrupt type for bank 0 pin 10" "Level,Edge" bitfld.long 0x04 9. " INT_TYPE_0[9] ,Interrupt type for bank 0 pin 9" "Level,Edge" bitfld.long 0x04 8. " INT_TYPE_0[8] ,Interrupt type for bank 0 pin 8" "Level,Edge" textline " " bitfld.long 0x04 7. " INT_TYPE_0[7] ,Interrupt type for bank 0 pin 7" "Level,Edge" bitfld.long 0x04 6. " INT_TYPE_0[6] ,Interrupt type for bank 0 pin 6" "Level,Edge" bitfld.long 0x04 5. " INT_TYPE_0[5] ,Interrupt type for bank 0 pin 5" "Level,Edge" bitfld.long 0x04 4. " INT_TYPE_0[4] ,Interrupt type for bank 0 pin 4" "Level,Edge" textline " " bitfld.long 0x04 3. " INT_TYPE_0[3] ,Interrupt type for bank 0 pin 3" "Level,Edge" bitfld.long 0x04 2. " INT_TYPE_0[2] ,Interrupt type for bank 0 pin 2" "Level,Edge" bitfld.long 0x04 1. " INT_TYPE_0[1] ,Interrupt type for bank 0 pin 1" "Level,Edge" bitfld.long 0x04 0. " INT_TYPE_0[0] ,Interrupt type for bank 0 pin 0" "Level,Edge" line.long 0x08 "INT_POLARITY_0,Interrupt Polarity Configuration Register" bitfld.long 0x08 25. " INT_POL_0[25] ,Interrupt polarity for bank 0 pin 25" "Low,High" bitfld.long 0x08 24. " INT_POL_0[24] ,Interrupt polarity for bank 0 pin 24" "Low,High" textline " " bitfld.long 0x08 23. " INT_POL_0[23] ,Interrupt polarity for bank 0 pin 23" "Low,High" bitfld.long 0x08 22. " INT_POL_0[22] ,Interrupt polarity for bank 0 pin 22" "Low,High" bitfld.long 0x08 21. " INT_POL_0[21] ,Interrupt polarity for bank 0 pin 21" "Low,High" bitfld.long 0x08 20. " INT_POL_0[20] ,Interrupt polarity for bank 0 pin 20" "Low,High" textline " " bitfld.long 0x08 19. " INT_POL_0[19] ,Interrupt polarity for bank 0 pin 19" "Low,High" bitfld.long 0x08 18. " INT_POL_0[18] ,Interrupt polarity for bank 0 pin 18" "Low,High" bitfld.long 0x08 17. " INT_POL_0[17] ,Interrupt polarity for bank 0 pin 17" "Low,High" bitfld.long 0x08 16. " INT_POL_0[16] ,Interrupt polarity for bank 0 pin 16" "Low,High" textline " " bitfld.long 0x08 15. " INT_POL_0[15] ,Interrupt polarity for bank 0 pin 15" "Low,High" bitfld.long 0x08 14. " INT_POL_0[14] ,Interrupt polarity for bank 0 pin 14" "Low,High" bitfld.long 0x08 13. " INT_POL_0[13] ,Interrupt polarity for bank 0 pin 13" "Low,High" bitfld.long 0x08 12. " INT_POL_0[12] ,Interrupt polarity for bank 0 pin 12" "Low,High" textline " " bitfld.long 0x08 11. " INT_POL_0[11] ,Interrupt polarity for bank 0 pin 11" "Low,High" bitfld.long 0x08 10. " INT_POL_0[10] ,Interrupt polarity for bank 0 pin 10" "Low,High" bitfld.long 0x08 9. " INT_POL_0[9] ,Interrupt polarity for bank 0 pin 9" "Low,High" bitfld.long 0x08 8. " INT_POL_0[8] ,Interrupt polarity for bank 0 pin 8" "Low,High" textline " " bitfld.long 0x08 7. " INT_POL_0[7] ,Interrupt polarity for bank 0 pin 7" "Low,High" bitfld.long 0x08 6. " INT_POL_0[6] ,Interrupt polarity for bank 0 pin 6" "Low,High" bitfld.long 0x08 5. " INT_POL_0[5] ,Interrupt polarity for bank 0 pin 5" "Low,High" bitfld.long 0x08 4. " INT_POL_0[4] ,Interrupt polarity for bank 0 pin 4" "Low,High" textline " " bitfld.long 0x08 3. " INT_POL_0[3] ,Interrupt polarity for bank 0 pin 3" "Low,High" bitfld.long 0x08 2. " INT_POL_0[2] ,Interrupt polarity for bank 0 pin 2" "Low,High" bitfld.long 0x08 1. " INT_POL_0[1] ,Interrupt polarity for bank 0 pin 1" "Low,High" bitfld.long 0x08 0. " INT_POL_0[0] ,Interrupt polarity for bank 0 pin 0" "Low,High" line.long 0x0C "INT_ANY_0,Interrupt On Any Configuration Register" bitfld.long 0x0C 25. " INT_ON_ANY_0[25] ,Interrupt edge triggering mode for bank 0 0 pin 25" "Single,Both" bitfld.long 0x0C 24. " INT_ON_ANY_0[24] ,Interrupt edge triggering mode for bank 0 0 pin 24" "Single,Both" textline " " bitfld.long 0x0C 23. " INT_ON_ANY_0[23] ,Interrupt edge triggering mode for bank 0 0 pin 23" "Single,Both" bitfld.long 0x0C 22. " INT_ON_ANY_0[22] ,Interrupt edge triggering mode for bank 0 0 pin 22" "Single,Both" bitfld.long 0x0C 21. " INT_ON_ANY_0[21] ,Interrupt edge triggering mode for bank 0 0 pin 21" "Single,Both" bitfld.long 0x0C 20. " INT_ON_ANY_0[20] ,Interrupt edge triggering mode for bank 0 0 pin 20" "Single,Both" textline " " bitfld.long 0x0C 19. " INT_ON_ANY_0[19] ,Interrupt edge triggering mode for bank 0 0 pin 19" "Single,Both" bitfld.long 0x0C 18. " INT_ON_ANY_0[18] ,Interrupt edge triggering mode for bank 0 0 pin 18" "Single,Both" bitfld.long 0x0C 17. " INT_ON_ANY_0[17] ,Interrupt edge triggering mode for bank 0 0 pin 17" "Single,Both" bitfld.long 0x0C 16. " INT_ON_ANY_0[16] ,Interrupt edge triggering mode for bank 0 0 pin 16" "Single,Both" textline " " bitfld.long 0x0C 15. " INT_ON_ANY_0[15] ,Interrupt edge triggering mode for bank 0 0 pin 15" "Single,Both" bitfld.long 0x0C 14. " INT_ON_ANY_0[14] ,Interrupt edge triggering mode for bank 0 0 pin 14" "Single,Both" bitfld.long 0x0C 13. " INT_ON_ANY_0[13] ,Interrupt edge triggering mode for bank 0 0 pin 13" "Single,Both" bitfld.long 0x0C 12. " INT_ON_ANY_0[12] ,Interrupt edge triggering mode for bank 0 0 pin 12" "Single,Both" textline " " bitfld.long 0x0C 11. " INT_ON_ANY_0[11] ,Interrupt edge triggering mode for bank 0 0 pin 11" "Single,Both" bitfld.long 0x0C 10. " INT_ON_ANY_0[10] ,Interrupt edge triggering mode for bank 0 0 pin 10" "Single,Both" bitfld.long 0x0C 9. " INT_ON_ANY_0[9] ,Interrupt edge triggering mode for bank 0 0 pin 9" "Single,Both" bitfld.long 0x0C 8. " INT_ON_ANY_0[8] ,Interrupt edge triggering mode for bank 0 0 pin 8" "Single,Both" textline " " bitfld.long 0x0C 7. " INT_ON_ANY_0[7] ,Interrupt edge triggering mode for bank 0 0 pin 7" "Single,Both" bitfld.long 0x0C 6. " INT_ON_ANY_0[6] ,Interrupt edge triggering mode for bank 0 0 pin 6" "Single,Both" bitfld.long 0x0C 5. " INT_ON_ANY_0[5] ,Interrupt edge triggering mode for bank 0 0 pin 5" "Single,Both" bitfld.long 0x0C 4. " INT_ON_ANY_0[4] ,Interrupt edge triggering mode for bank 0 0 pin 4" "Single,Both" textline " " bitfld.long 0x0C 3. " INT_ON_ANY_0[3] ,Interrupt edge triggering mode for bank 0 0 pin 3" "Single,Both" bitfld.long 0x0C 2. " INT_ON_ANY_0[2] ,Interrupt edge triggering mode for bank 0 0 pin 2" "Single,Both" bitfld.long 0x0C 1. " INT_ON_ANY_0[1] ,Interrupt edge triggering mode for bank 0 0 pin 1" "Single,Both" bitfld.long 0x0C 0. " INT_ON_ANY_0[0] ,Interrupt edge triggering mode for bank 0 0 pin 0" "Single,Both" tree.end tree "GPIO Bank 1" group.long 0x8++0x07 line.long 0x00 "MASK_DATA_1_LSW,Maskable single-word-based Data Access Register" bitfld.long 0x00 31. " MASK_1_LSW[15] ,Mask value to be applied on writes to pin 15" "Not masked,Masked" bitfld.long 0x00 30. " MASK_1_LSW[14] ,Mask value to be applied on writes to pin 14" "Not masked,Masked" bitfld.long 0x00 29. " MASK_1_LSW[13] ,Mask value to be applied on writes to pin 13" "Not masked,Masked" bitfld.long 0x00 28. " MASK_1_LSW[12] ,Mask value to be applied on writes to pin 12" "Not masked,Masked" textline " " bitfld.long 0x00 27. " MASK_1_LSW[11] ,Mask value to be applied on writes to pin 11" "Not masked,Masked" bitfld.long 0x00 26. " MASK_1_LSW[10] ,Mask value to be applied on writes to pin 10" "Not masked,Masked" bitfld.long 0x00 25. " MASK_1_LSW[9] ,Mask value to be applied on writes to pin 9" "Not masked,Masked" bitfld.long 0x00 24. " MASK_1_LSW[8] ,Mask value to be applied on writes to pin 8" "Not masked,Masked" textline " " bitfld.long 0x00 23. " MASK_1_LSW[7] ,Mask value to be applied on writes to pin 7" "Not masked,Masked" bitfld.long 0x00 22. " MASK_1_LSW[6] ,Mask value to be applied on writes to pin 6" "Not masked,Masked" bitfld.long 0x00 21. " MASK_1_LSW[5] ,Mask value to be applied on writes to pin 5" "Not masked,Masked" bitfld.long 0x00 20. " MASK_1_LSW[4] ,Mask value to be applied on writes to pin 4" "Not masked,Masked" textline " " bitfld.long 0x00 19. " MASK_1_LSW[3] ,Mask value to be applied on writes to pin 3" "Not masked,Masked" bitfld.long 0x00 18. " MASK_1_LSW[2] ,Mask value to be applied on writes to pin 2" "Not masked,Masked" bitfld.long 0x00 17. " MASK_1_LSW[1] ,Mask value to be applied on writes to pin 1" "Not masked,Masked" bitfld.long 0x00 16. " MASK_1_LSW[0] ,Mask value to be applied on writes to pin 0" "Not masked,Masked" textline " " bitfld.long 0x00 15. " DATA_1_LSW[15] ,Data value read from or written to pin 15" "Low,High" bitfld.long 0x00 14. " DATA_1_LSW[14] ,Data value read from or written to pin 14" "Low,High" bitfld.long 0x00 13. " DATA_1_LSW[13] ,Data value read from or written to pin 13" "Low,High" bitfld.long 0x00 12. " DATA_1_LSW[12] ,Data value read from or written to pin 12" "Low,High" textline " " bitfld.long 0x00 11. " DATA_1_LSW[11] ,Data value read from or written to pin 11" "Low,High" bitfld.long 0x00 10. " DATA_1_LSW[10] ,Data value read from or written to pin 10" "Low,High" bitfld.long 0x00 9. " DATA_1_LSW[9] ,Data value read from or written to pin 9" "Low,High" bitfld.long 0x00 8. " DATA_1_LSW[8] ,Data value read from or written to pin 8" "Low,High" textline " " bitfld.long 0x00 7. " DATA_1_LSW[7] ,Data value read from or written to pin 7" "Low,High" bitfld.long 0x00 6. " DATA_1_LSW[6] ,Data value read from or written to pin 6" "Low,High" bitfld.long 0x00 5. " DATA_1_LSW[5] ,Data value read from or written to pin 5" "Low,High" bitfld.long 0x00 4. " DATA_1_LSW[4] ,Data value read from or written to pin 4" "Low,High" textline " " bitfld.long 0x00 3. " DATA_1_LSW[3] ,Data value read from or written to pin 3" "Low,High" bitfld.long 0x00 2. " DATA_1_LSW[2] ,Data value read from or written to pin 2" "Low,High" bitfld.long 0x00 1. " DATA_1_LSW[1] ,Data value read from or written to pin 1" "Low,High" bitfld.long 0x00 0. " DATA_1_LSW[0] ,Data value read from or written to pin 0" "Low,High" line.long 0x04 "MASK_DATA_1_MSW,Maskable single-word-based Data Access Register" bitfld.long 0x04 25. " MASK_1_MSW[9] ,Mask value to be applied on writes to pin 9" "Not masked,Masked" bitfld.long 0x04 24. " MASK_1_MSW[8] ,Mask value to be applied on writes to pin 8" "Not masked,Masked" textline " " bitfld.long 0x04 23. " MASK_1_MSW[7] ,Mask value to be applied on writes to pin 7" "Not masked,Masked" bitfld.long 0x04 22. " MASK_1_MSW[6] ,Mask value to be applied on writes to pin 6" "Not masked,Masked" bitfld.long 0x04 21. " MASK_1_MSW[5] ,Mask value to be applied on writes to pin 5" "Not masked,Masked" bitfld.long 0x04 20. " MASK_1_MSW[4] ,Mask value to be applied on writes to pin 4" "Not masked,Masked" textline " " bitfld.long 0x04 19. " MASK_1_MSW[3] ,Mask value to be applied on writes to pin 3" "Not masked,Masked" bitfld.long 0x04 18. " MASK_1_MSW[2] ,Mask value to be applied on writes to pin 2" "Not masked,Masked" bitfld.long 0x04 17. " MASK_1_MSW[1] ,Mask value to be applied on writes to pin 1" "Not masked,Masked" bitfld.long 0x04 16. " MASK_1_MSW[0] ,Mask value to be applied on writes to pin 0" "Not masked,Masked" textline " " bitfld.long 0x04 9. " DATA_1_MSW[9] ,Data value read from or written to pin 9" "Low,High" bitfld.long 0x04 8. " DATA_1_MSW[8] ,Data value read from or written to pin 8" "Low,High" textline " " bitfld.long 0x04 7. " DATA_1_MSW[7] ,Data value read from or written to pin 7" "Low,High" bitfld.long 0x04 6. " DATA_1_MSW[6] ,Data value read from or written to pin 6" "Low,High" bitfld.long 0x04 5. " DATA_1_MSW[5] ,Data value read from or written to pin 5" "Low,High" bitfld.long 0x04 4. " DATA_1_MSW[4] ,Data value read from or written to pin 4" "Low,High" textline " " bitfld.long 0x04 3. " DATA_1_MSW[3] ,Data value read from or written to pin 3" "Low,High" bitfld.long 0x04 2. " DATA_1_MSW[2] ,Data value read from or written to pin 2" "Low,High" bitfld.long 0x04 1. " DATA_1_MSW[1] ,Data value read from or written to pin 1" "Low,High" bitfld.long 0x04 0. " DATA_1_MSW[0] ,Data value read from or written to pin 0" "Low,High" group.long 0x44++0x03 line.long 0x00 "DATA_1,Unmasked double-word-based Data Access Register" bitfld.long 0x00 25. " DATA_1[25] ,Data value read from or written to pin 25" "Low,High" bitfld.long 0x00 24. " DATA_1[24] ,Data value read from or written to pin 24" "Low,High" textline " " bitfld.long 0x00 23. " DATA_1[23] ,Data value read from or written to pin 23" "Low,High" bitfld.long 0x00 22. " DATA_1[22] ,Data value read from or written to pin 22" "Low,High" bitfld.long 0x00 21. " DATA_1[21] ,Data value read from or written to pin 21" "Low,High" bitfld.long 0x00 20. " DATA_1[20] ,Data value read from or written to pin 20" "Low,High" textline " " bitfld.long 0x00 19. " DATA_1[19] ,Data value read from or written to pin 19" "Low,High" bitfld.long 0x00 18. " DATA_1[18] ,Data value read from or written to pin 18" "Low,High" bitfld.long 0x00 17. " DATA_1[17] ,Data value read from or written to pin 17" "Low,High" bitfld.long 0x00 16. " DATA_1[16] ,Data value read from or written to pin 16" "Low,High" textline " " bitfld.long 0x00 15. " DATA_1[15] ,Data value read from or written to pin 15" "Low,High" bitfld.long 0x00 14. " DATA_1[14] ,Data value read from or written to pin 14" "Low,High" bitfld.long 0x00 13. " DATA_1[13] ,Data value read from or written to pin 13" "Low,High" bitfld.long 0x00 12. " DATA_1[12] ,Data value read from or written to pin 12" "Low,High" textline " " bitfld.long 0x00 11. " DATA_1[11] ,Data value read from or written to pin 11" "Low,High" bitfld.long 0x00 10. " DATA_1[10] ,Data value read from or written to pin 10" "Low,High" bitfld.long 0x00 9. " DATA_1[9] ,Data value read from or written to pin 9" "Low,High" bitfld.long 0x00 8. " DATA_1[8] ,Data value read from or written to pin 8" "Low,High" textline " " bitfld.long 0x00 7. " DATA_1[7] ,Data value read from or written to pin 7" "Low,High" bitfld.long 0x00 6. " DATA_1[6] ,Data value read from or written to pin 6" "Low,High" bitfld.long 0x00 5. " DATA_1[5] ,Data value read from or written to pin 5" "Low,High" bitfld.long 0x00 4. " DATA_1[4] ,Data value read from or written to pin 4" "Low,High" textline " " bitfld.long 0x00 3. " DATA_1[3] ,Data value read from or written to pin 3" "Low,High" bitfld.long 0x00 2. " DATA_1[2] ,Data value read from or written to pin 2" "Low,High" bitfld.long 0x00 1. " DATA_1[1] ,Data value read from or written to pin 1" "Low,High" bitfld.long 0x00 0. " DATA_1[0] ,Data value read from or written to pin 0" "Low,High" rgroup.long 0x64++0x03 line.long 0x00 "DATA_1_RO,Read Only Pin Value Register" bitfld.long 0x00 25. " DATA_1_RO[25] ,GPIO pin value 25" "Low,High" bitfld.long 0x00 24. " DATA_1_RO[24] ,GPIO pin value 24" "Low,High" textline " " bitfld.long 0x00 23. " DATA_1_RO[23] ,GPIO pin value 23" "Low,High" bitfld.long 0x00 22. " DATA_1_RO[22] ,GPIO pin value 22" "Low,High" bitfld.long 0x00 21. " DATA_1_RO[21] ,GPIO pin value 21" "Low,High" bitfld.long 0x00 20. " DATA_1_RO[20] ,GPIO pin value 20" "Low,High" textline " " bitfld.long 0x00 19. " DATA_1_RO[19] ,GPIO pin value 19" "Low,High" bitfld.long 0x00 18. " DATA_1_RO[18] ,GPIO pin value 18" "Low,High" bitfld.long 0x00 17. " DATA_1_RO[17] ,GPIO pin value 17" "Low,High" bitfld.long 0x00 16. " DATA_1_RO[16] ,GPIO pin value 16" "Low,High" textline " " bitfld.long 0x00 15. " DATA_1_RO[15] ,GPIO pin value 15" "Low,High" bitfld.long 0x00 14. " DATA_1_RO[14] ,GPIO pin value 14" "Low,High" bitfld.long 0x00 13. " DATA_1_RO[13] ,GPIO pin value 13" "Low,High" bitfld.long 0x00 12. " DATA_1_RO[12] ,GPIO pin value 12" "Low,High" textline " " bitfld.long 0x00 11. " DATA_1_RO[11] ,GPIO pin value 11" "Low,High" bitfld.long 0x00 10. " DATA_1_RO[10] ,GPIO pin value 10" "Low,High" bitfld.long 0x00 9. " DATA_1_RO[9] ,GPIO pin value 9" "Low,High" bitfld.long 0x00 8. " DATA_1_RO[8] ,GPIO pin value 8" "Low,High" textline " " bitfld.long 0x00 7. " DATA_1_RO[7] ,GPIO pin value 7" "Low,High" bitfld.long 0x00 6. " DATA_1_RO[6] ,GPIO pin value 6" "Low,High" bitfld.long 0x00 5. " DATA_1_RO[5] ,GPIO pin value 5" "Low,High" bitfld.long 0x00 4. " DATA_1_RO[4] ,GPIO pin value 4" "Low,High" textline " " bitfld.long 0x00 3. " DATA_1_RO[3] ,GPIO pin value 3" "Low,High" bitfld.long 0x00 2. " DATA_1_RO[2] ,GPIO pin value 2" "Low,High" bitfld.long 0x00 1. " DATA_1_RO[1] ,GPIO pin value 1" "Low,High" bitfld.long 0x00 0. " DATA_1_RO[0] ,GPIO pin value 0" "Low,High" group.long 0x244++0x07 line.long 0x00 "DIRM_1,Direction Mode Configuration Register" bitfld.long 0x00 25. " DIRECTION_1[25] ,Direction mode for bank 1 pin 25" "Input,Output" bitfld.long 0x00 24. " DIRECTION_1[24] ,Direction mode for bank 1 pin 24" "Input,Output" textline " " bitfld.long 0x00 23. " DIRECTION_1[23] ,Direction mode for bank 1 pin 23" "Input,Output" bitfld.long 0x00 22. " DIRECTION_1[22] ,Direction mode for bank 1 pin 22" "Input,Output" bitfld.long 0x00 21. " DIRECTION_1[21] ,Direction mode for bank 1 pin 21" "Input,Output" bitfld.long 0x00 20. " DIRECTION_1[20] ,Direction mode for bank 1 pin 20" "Input,Output" textline " " bitfld.long 0x00 19. " DIRECTION_1[19] ,Direction mode for bank 1 pin 19" "Input,Output" bitfld.long 0x00 18. " DIRECTION_1[18] ,Direction mode for bank 1 pin 18" "Input,Output" bitfld.long 0x00 17. " DIRECTION_1[17] ,Direction mode for bank 1 pin 17" "Input,Output" bitfld.long 0x00 16. " DIRECTION_1[16] ,Direction mode for bank 1 pin 16" "Input,Output" textline " " bitfld.long 0x00 15. " DIRECTION_1[15] ,Direction mode for bank 1 pin 15" "Input,Output" bitfld.long 0x00 14. " DIRECTION_1[14] ,Direction mode for bank 1 pin 14" "Input,Output" bitfld.long 0x00 13. " DIRECTION_1[13] ,Direction mode for bank 1 pin 13" "Input,Output" bitfld.long 0x00 12. " DIRECTION_1[12] ,Direction mode for bank 1 pin 12" "Input,Output" textline " " bitfld.long 0x00 11. " DIRECTION_1[11] ,Direction mode for bank 1 pin 11" "Input,Output" bitfld.long 0x00 10. " DIRECTION_1[10] ,Direction mode for bank 1 pin 10" "Input,Output" bitfld.long 0x00 9. " DIRECTION_1[9] ,Direction mode for bank 1 pin 9" "Input,Output" bitfld.long 0x00 8. " DIRECTION_1[8] ,Direction mode for bank 1 pin 8" "Input,Output" textline " " bitfld.long 0x00 7. " DIRECTION_1[7] ,Direction mode for bank 1 pin 7" "Input,Output" bitfld.long 0x00 6. " DIRECTION_1[6] ,Direction mode for bank 1 pin 6" "Input,Output" bitfld.long 0x00 5. " DIRECTION_1[5] ,Direction mode for bank 1 pin 5" "Input,Output" bitfld.long 0x00 4. " DIRECTION_1[4] ,Direction mode for bank 1 pin 4" "Input,Output" textline " " bitfld.long 0x00 3. " DIRECTION_1[3] ,Direction mode for bank 1 pin 3" "Input,Output" bitfld.long 0x00 2. " DIRECTION_1[2] ,Direction mode for bank 1 pin 2" "Input,Output" bitfld.long 0x00 1. " DIRECTION_1[1] ,Direction mode for bank 1 pin 1" "Input,Output" bitfld.long 0x00 0. " DIRECTION_1[0] ,Direction mode for bank 1 pin 0" "Input,Output" line.long 0x04 "OEN_1,Output Enable Register" bitfld.long 0x04 25. " OP_ENABLE_1[25] ,Output enable for bank 1 pin 25" "Disabled,Enabled" bitfld.long 0x04 24. " OP_ENABLE_1[24] ,Output enable for bank 1 pin 24" "Disabled,Enabled" textline " " bitfld.long 0x04 23. " OP_ENABLE_1[23] ,Output enable for bank 1 pin 23" "Disabled,Enabled" bitfld.long 0x04 22. " OP_ENABLE_1[22] ,Output enable for bank 1 pin 22" "Disabled,Enabled" bitfld.long 0x04 21. " OP_ENABLE_1[21] ,Output enable for bank 1 pin 21" "Disabled,Enabled" bitfld.long 0x04 20. " OP_ENABLE_1[20] ,Output enable for bank 1 pin 20" "Disabled,Enabled" textline " " bitfld.long 0x04 19. " OP_ENABLE_1[19] ,Output enable for bank 1 pin 19" "Disabled,Enabled" bitfld.long 0x04 18. " OP_ENABLE_1[18] ,Output enable for bank 1 pin 18" "Disabled,Enabled" bitfld.long 0x04 17. " OP_ENABLE_1[17] ,Output enable for bank 1 pin 17" "Disabled,Enabled" bitfld.long 0x04 16. " OP_ENABLE_1[16] ,Output enable for bank 1 pin 16" "Disabled,Enabled" textline " " bitfld.long 0x04 15. " OP_ENABLE_1[15] ,Output enable for bank 1 pin 15" "Disabled,Enabled" bitfld.long 0x04 14. " OP_ENABLE_1[14] ,Output enable for bank 1 pin 14" "Disabled,Enabled" bitfld.long 0x04 13. " OP_ENABLE_1[13] ,Output enable for bank 1 pin 13" "Disabled,Enabled" bitfld.long 0x04 12. " OP_ENABLE_1[12] ,Output enable for bank 1 pin 12" "Disabled,Enabled" textline " " bitfld.long 0x04 11. " OP_ENABLE_1[11] ,Output enable for bank 1 pin 11" "Disabled,Enabled" bitfld.long 0x04 10. " OP_ENABLE_1[10] ,Output enable for bank 1 pin 10" "Disabled,Enabled" bitfld.long 0x04 9. " OP_ENABLE_1[9] ,Output enable for bank 1 pin 9" "Disabled,Enabled" bitfld.long 0x04 8. " OP_ENABLE_1[8] ,Output enable for bank 1 pin 8" "Disabled,Enabled" textline " " bitfld.long 0x04 7. " OP_ENABLE_1[7] ,Output enable for bank 1 pin 7" "Disabled,Enabled" bitfld.long 0x04 6. " OP_ENABLE_1[6] ,Output enable for bank 1 pin 6" "Disabled,Enabled" bitfld.long 0x04 5. " OP_ENABLE_1[5] ,Output enable for bank 1 pin 5" "Disabled,Enabled" bitfld.long 0x04 4. " OP_ENABLE_1[4] ,Output enable for bank 1 pin 4" "Disabled,Enabled" textline " " bitfld.long 0x04 3. " OP_ENABLE_1[3] ,Output enable for bank 1 pin 3" "Disabled,Enabled" bitfld.long 0x04 2. " OP_ENABLE_1[2] ,Output enable for bank 1 pin 2" "Disabled,Enabled" bitfld.long 0x04 1. " OP_ENABLE_1[1] ,Output enable for bank 1 pin 1" "Disabled,Enabled" bitfld.long 0x04 0. " OP_ENABLE_1[0] ,Output enable for bank 1 pin 0" "Disabled,Enabled" group.long (0x244+0x08)++0x03 line.long 0x00 "INT_MASK_1_SET/CLR,Interrupt Mask Status Register" setclrfld.long 0x00 25. 0x08 25. 0x04 25. " INT_MASK_1[25] ,Interrupt mask for bank 1 pin 25" "Not masked,Masked" setclrfld.long 0x00 24. 0x08 24. 0x04 24. " INT_MASK_1[24] ,Interrupt mask for bank 1 pin 24" "Not masked,Masked" textline " " setclrfld.long 0x00 23. 0x08 23. 0x04 23. " INT_MASK_1[23] ,Interrupt mask for bank 1 pin 23" "Not masked,Masked" setclrfld.long 0x00 22. 0x08 22. 0x04 22. " INT_MASK_1[22] ,Interrupt mask for bank 1 pin 22" "Not masked,Masked" setclrfld.long 0x00 21. 0x08 21. 0x04 21. " INT_MASK_1[21] ,Interrupt mask for bank 1 pin 21" "Not masked,Masked" setclrfld.long 0x00 20. 0x08 20. 0x04 20. " INT_MASK_1[20] ,Interrupt mask for bank 1 pin 20" "Not masked,Masked" textline " " setclrfld.long 0x00 19. 0x08 19. 0x04 19. " INT_MASK_1[19] ,Interrupt mask for bank 1 pin 19" "Not masked,Masked" setclrfld.long 0x00 18. 0x08 18. 0x04 18. " INT_MASK_1[18] ,Interrupt mask for bank 1 pin 18" "Not masked,Masked" setclrfld.long 0x00 17. 0x08 17. 0x04 17. " INT_MASK_1[17] ,Interrupt mask for bank 1 pin 17" "Not masked,Masked" setclrfld.long 0x00 16. 0x08 16. 0x04 16. " INT_MASK_1[16] ,Interrupt mask for bank 1 pin 16" "Not masked,Masked" textline " " setclrfld.long 0x00 15. 0x08 15. 0x04 15. " INT_MASK_1[15] ,Interrupt mask for bank 1 pin 15" "Not masked,Masked" setclrfld.long 0x00 14. 0x08 14. 0x04 14. " INT_MASK_1[14] ,Interrupt mask for bank 1 pin 14" "Not masked,Masked" setclrfld.long 0x00 13. 0x08 13. 0x04 13. " INT_MASK_1[13] ,Interrupt mask for bank 1 pin 13" "Not masked,Masked" setclrfld.long 0x00 12. 0x08 12. 0x04 12. " INT_MASK_1[12] ,Interrupt mask for bank 1 pin 12" "Not masked,Masked" textline " " setclrfld.long 0x00 11. 0x08 11. 0x04 11. " INT_MASK_1[11] ,Interrupt mask for bank 1 pin 11" "Not masked,Masked" setclrfld.long 0x00 10. 0x08 10. 0x04 10. " INT_MASK_1[10] ,Interrupt mask for bank 1 pin 10" "Not masked,Masked" setclrfld.long 0x00 9. 0x08 9. 0x04 9. " INT_MASK_1[9] ,Interrupt mask for bank 1 pin 9" "Not masked,Masked" setclrfld.long 0x00 8. 0x08 8. 0x04 8. " INT_MASK_1[8] ,Interrupt mask for bank 1 pin 8" "Not masked,Masked" textline " " setclrfld.long 0x00 7. 0x08 7. 0x04 7. " INT_MASK_1[7] ,Interrupt mask for bank 1 pin 7" "Not masked,Masked" setclrfld.long 0x00 6. 0x08 6. 0x04 6. " INT_MASK_1[6] ,Interrupt mask for bank 1 pin 6" "Not masked,Masked" setclrfld.long 0x00 5. 0x08 5. 0x04 5. " INT_MASK_1[5] ,Interrupt mask for bank 1 pin 5" "Not masked,Masked" setclrfld.long 0x00 4. 0x08 4. 0x04 4. " INT_MASK_1[4] ,Interrupt mask for bank 1 pin 4" "Not masked,Masked" textline " " setclrfld.long 0x00 3. 0x08 3. 0x04 3. " INT_MASK_1[3] ,Interrupt mask for bank 1 pin 3" "Not masked,Masked" setclrfld.long 0x00 2. 0x08 2. 0x04 2. " INT_MASK_1[2] ,Interrupt mask for bank 1 pin 2" "Not masked,Masked" setclrfld.long 0x00 1. 0x08 1. 0x04 1. " INT_MASK_1[1] ,Interrupt mask for bank 1 pin 1" "Not masked,Masked" setclrfld.long 0x00 0. 0x08 0. 0x04 0. " INT_MASK_1[0] ,Interrupt mask for bank 1 pin 0" "Not masked,Masked" group.long (0x244+0x14)++0x0F line.long 0x00 "INT_STAT_1,Interrupt Status Register" eventfld.long 0x00 25. " INT_STATUS_1[25] ,Interrupt status for bank 1 pin 25" "No interrupt,Interrupt" eventfld.long 0x00 24. " INT_STATUS_1[24] ,Interrupt status for bank 1 pin 24" "No interrupt,Interrupt" textline " " eventfld.long 0x00 23. " INT_STATUS_1[23] ,Interrupt status for bank 1 pin 23" "No interrupt,Interrupt" eventfld.long 0x00 22. " INT_STATUS_1[22] ,Interrupt status for bank 1 pin 22" "No interrupt,Interrupt" eventfld.long 0x00 21. " INT_STATUS_1[21] ,Interrupt status for bank 1 pin 21" "No interrupt,Interrupt" eventfld.long 0x00 20. " INT_STATUS_1[20] ,Interrupt status for bank 1 pin 20" "No interrupt,Interrupt" textline " " eventfld.long 0x00 19. " INT_STATUS_1[19] ,Interrupt status for bank 1 pin 19" "No interrupt,Interrupt" eventfld.long 0x00 18. " INT_STATUS_1[18] ,Interrupt status for bank 1 pin 18" "No interrupt,Interrupt" eventfld.long 0x00 17. " INT_STATUS_1[17] ,Interrupt status for bank 1 pin 17" "No interrupt,Interrupt" eventfld.long 0x00 16. " INT_STATUS_1[16] ,Interrupt status for bank 1 pin 16" "No interrupt,Interrupt" textline " " eventfld.long 0x00 15. " INT_STATUS_1[15] ,Interrupt status for bank 1 pin 15" "No interrupt,Interrupt" eventfld.long 0x00 14. " INT_STATUS_1[14] ,Interrupt status for bank 1 pin 14" "No interrupt,Interrupt" eventfld.long 0x00 13. " INT_STATUS_1[13] ,Interrupt status for bank 1 pin 13" "No interrupt,Interrupt" eventfld.long 0x00 12. " INT_STATUS_1[12] ,Interrupt status for bank 1 pin 12" "No interrupt,Interrupt" textline " " eventfld.long 0x00 11. " INT_STATUS_1[11] ,Interrupt status for bank 1 pin 11" "No interrupt,Interrupt" eventfld.long 0x00 10. " INT_STATUS_1[10] ,Interrupt status for bank 1 pin 10" "No interrupt,Interrupt" eventfld.long 0x00 9. " INT_STATUS_1[9] ,Interrupt status for bank 1 pin 9" "No interrupt,Interrupt" eventfld.long 0x00 8. " INT_STATUS_1[8] ,Interrupt status for bank 1 pin 8" "No interrupt,Interrupt" textline " " eventfld.long 0x00 7. " INT_STATUS_1[7] ,Interrupt status for bank 1 pin 7" "No interrupt,Interrupt" eventfld.long 0x00 6. " INT_STATUS_1[6] ,Interrupt status for bank 1 pin 6" "No interrupt,Interrupt" eventfld.long 0x00 5. " INT_STATUS_1[5] ,Interrupt status for bank 1 pin 5" "No interrupt,Interrupt" eventfld.long 0x00 4. " INT_STATUS_1[4] ,Interrupt status for bank 1 pin 4" "No interrupt,Interrupt" textline " " eventfld.long 0x00 3. " INT_STATUS_1[3] ,Interrupt status for bank 1 pin 3" "No interrupt,Interrupt" eventfld.long 0x00 2. " INT_STATUS_1[2] ,Interrupt status for bank 1 pin 2" "No interrupt,Interrupt" eventfld.long 0x00 1. " INT_STATUS_1[1] ,Interrupt status for bank 1 pin 1" "No interrupt,Interrupt" eventfld.long 0x00 0. " INT_STATUS_1[0] ,Interrupt status for bank 1 pin 0" "No interrupt,Interrupt" line.long 0x04 "INT_TYPE_1,Interrupt Type Configuration Register" bitfld.long 0x04 25. " INT_TYPE_1[25] ,Interrupt type for bank 1 pin 25" "Level,Edge" bitfld.long 0x04 24. " INT_TYPE_1[24] ,Interrupt type for bank 1 pin 24" "Level,Edge" textline " " bitfld.long 0x04 23. " INT_TYPE_1[23] ,Interrupt type for bank 1 pin 23" "Level,Edge" bitfld.long 0x04 22. " INT_TYPE_1[22] ,Interrupt type for bank 1 pin 22" "Level,Edge" bitfld.long 0x04 21. " INT_TYPE_1[21] ,Interrupt type for bank 1 pin 21" "Level,Edge" bitfld.long 0x04 20. " INT_TYPE_1[20] ,Interrupt type for bank 1 pin 20" "Level,Edge" textline " " bitfld.long 0x04 19. " INT_TYPE_1[19] ,Interrupt type for bank 1 pin 19" "Level,Edge" bitfld.long 0x04 18. " INT_TYPE_1[18] ,Interrupt type for bank 1 pin 18" "Level,Edge" bitfld.long 0x04 17. " INT_TYPE_1[17] ,Interrupt type for bank 1 pin 17" "Level,Edge" bitfld.long 0x04 16. " INT_TYPE_1[16] ,Interrupt type for bank 1 pin 16" "Level,Edge" textline " " bitfld.long 0x04 15. " INT_TYPE_1[15] ,Interrupt type for bank 1 pin 15" "Level,Edge" bitfld.long 0x04 14. " INT_TYPE_1[14] ,Interrupt type for bank 1 pin 14" "Level,Edge" bitfld.long 0x04 13. " INT_TYPE_1[13] ,Interrupt type for bank 1 pin 13" "Level,Edge" bitfld.long 0x04 12. " INT_TYPE_1[12] ,Interrupt type for bank 1 pin 12" "Level,Edge" textline " " bitfld.long 0x04 11. " INT_TYPE_1[11] ,Interrupt type for bank 1 pin 11" "Level,Edge" bitfld.long 0x04 10. " INT_TYPE_1[10] ,Interrupt type for bank 1 pin 10" "Level,Edge" bitfld.long 0x04 9. " INT_TYPE_1[9] ,Interrupt type for bank 1 pin 9" "Level,Edge" bitfld.long 0x04 8. " INT_TYPE_1[8] ,Interrupt type for bank 1 pin 8" "Level,Edge" textline " " bitfld.long 0x04 7. " INT_TYPE_1[7] ,Interrupt type for bank 1 pin 7" "Level,Edge" bitfld.long 0x04 6. " INT_TYPE_1[6] ,Interrupt type for bank 1 pin 6" "Level,Edge" bitfld.long 0x04 5. " INT_TYPE_1[5] ,Interrupt type for bank 1 pin 5" "Level,Edge" bitfld.long 0x04 4. " INT_TYPE_1[4] ,Interrupt type for bank 1 pin 4" "Level,Edge" textline " " bitfld.long 0x04 3. " INT_TYPE_1[3] ,Interrupt type for bank 1 pin 3" "Level,Edge" bitfld.long 0x04 2. " INT_TYPE_1[2] ,Interrupt type for bank 1 pin 2" "Level,Edge" bitfld.long 0x04 1. " INT_TYPE_1[1] ,Interrupt type for bank 1 pin 1" "Level,Edge" bitfld.long 0x04 0. " INT_TYPE_1[0] ,Interrupt type for bank 1 pin 0" "Level,Edge" line.long 0x08 "INT_POLARITY_1,Interrupt Polarity Configuration Register" bitfld.long 0x08 25. " INT_POL_1[25] ,Interrupt polarity for bank 1 pin 25" "Low,High" bitfld.long 0x08 24. " INT_POL_1[24] ,Interrupt polarity for bank 1 pin 24" "Low,High" textline " " bitfld.long 0x08 23. " INT_POL_1[23] ,Interrupt polarity for bank 1 pin 23" "Low,High" bitfld.long 0x08 22. " INT_POL_1[22] ,Interrupt polarity for bank 1 pin 22" "Low,High" bitfld.long 0x08 21. " INT_POL_1[21] ,Interrupt polarity for bank 1 pin 21" "Low,High" bitfld.long 0x08 20. " INT_POL_1[20] ,Interrupt polarity for bank 1 pin 20" "Low,High" textline " " bitfld.long 0x08 19. " INT_POL_1[19] ,Interrupt polarity for bank 1 pin 19" "Low,High" bitfld.long 0x08 18. " INT_POL_1[18] ,Interrupt polarity for bank 1 pin 18" "Low,High" bitfld.long 0x08 17. " INT_POL_1[17] ,Interrupt polarity for bank 1 pin 17" "Low,High" bitfld.long 0x08 16. " INT_POL_1[16] ,Interrupt polarity for bank 1 pin 16" "Low,High" textline " " bitfld.long 0x08 15. " INT_POL_1[15] ,Interrupt polarity for bank 1 pin 15" "Low,High" bitfld.long 0x08 14. " INT_POL_1[14] ,Interrupt polarity for bank 1 pin 14" "Low,High" bitfld.long 0x08 13. " INT_POL_1[13] ,Interrupt polarity for bank 1 pin 13" "Low,High" bitfld.long 0x08 12. " INT_POL_1[12] ,Interrupt polarity for bank 1 pin 12" "Low,High" textline " " bitfld.long 0x08 11. " INT_POL_1[11] ,Interrupt polarity for bank 1 pin 11" "Low,High" bitfld.long 0x08 10. " INT_POL_1[10] ,Interrupt polarity for bank 1 pin 10" "Low,High" bitfld.long 0x08 9. " INT_POL_1[9] ,Interrupt polarity for bank 1 pin 9" "Low,High" bitfld.long 0x08 8. " INT_POL_1[8] ,Interrupt polarity for bank 1 pin 8" "Low,High" textline " " bitfld.long 0x08 7. " INT_POL_1[7] ,Interrupt polarity for bank 1 pin 7" "Low,High" bitfld.long 0x08 6. " INT_POL_1[6] ,Interrupt polarity for bank 1 pin 6" "Low,High" bitfld.long 0x08 5. " INT_POL_1[5] ,Interrupt polarity for bank 1 pin 5" "Low,High" bitfld.long 0x08 4. " INT_POL_1[4] ,Interrupt polarity for bank 1 pin 4" "Low,High" textline " " bitfld.long 0x08 3. " INT_POL_1[3] ,Interrupt polarity for bank 1 pin 3" "Low,High" bitfld.long 0x08 2. " INT_POL_1[2] ,Interrupt polarity for bank 1 pin 2" "Low,High" bitfld.long 0x08 1. " INT_POL_1[1] ,Interrupt polarity for bank 1 pin 1" "Low,High" bitfld.long 0x08 0. " INT_POL_1[0] ,Interrupt polarity for bank 1 pin 0" "Low,High" line.long 0x0C "INT_ANY_1,Interrupt On Any Configuration Register" bitfld.long 0x0C 25. " INT_ON_ANY_1[25] ,Interrupt edge triggering mode for bank 1 0 pin 25" "Single,Both" bitfld.long 0x0C 24. " INT_ON_ANY_1[24] ,Interrupt edge triggering mode for bank 1 0 pin 24" "Single,Both" textline " " bitfld.long 0x0C 23. " INT_ON_ANY_1[23] ,Interrupt edge triggering mode for bank 1 0 pin 23" "Single,Both" bitfld.long 0x0C 22. " INT_ON_ANY_1[22] ,Interrupt edge triggering mode for bank 1 0 pin 22" "Single,Both" bitfld.long 0x0C 21. " INT_ON_ANY_1[21] ,Interrupt edge triggering mode for bank 1 0 pin 21" "Single,Both" bitfld.long 0x0C 20. " INT_ON_ANY_1[20] ,Interrupt edge triggering mode for bank 1 0 pin 20" "Single,Both" textline " " bitfld.long 0x0C 19. " INT_ON_ANY_1[19] ,Interrupt edge triggering mode for bank 1 0 pin 19" "Single,Both" bitfld.long 0x0C 18. " INT_ON_ANY_1[18] ,Interrupt edge triggering mode for bank 1 0 pin 18" "Single,Both" bitfld.long 0x0C 17. " INT_ON_ANY_1[17] ,Interrupt edge triggering mode for bank 1 0 pin 17" "Single,Both" bitfld.long 0x0C 16. " INT_ON_ANY_1[16] ,Interrupt edge triggering mode for bank 1 0 pin 16" "Single,Both" textline " " bitfld.long 0x0C 15. " INT_ON_ANY_1[15] ,Interrupt edge triggering mode for bank 1 0 pin 15" "Single,Both" bitfld.long 0x0C 14. " INT_ON_ANY_1[14] ,Interrupt edge triggering mode for bank 1 0 pin 14" "Single,Both" bitfld.long 0x0C 13. " INT_ON_ANY_1[13] ,Interrupt edge triggering mode for bank 1 0 pin 13" "Single,Both" bitfld.long 0x0C 12. " INT_ON_ANY_1[12] ,Interrupt edge triggering mode for bank 1 0 pin 12" "Single,Both" textline " " bitfld.long 0x0C 11. " INT_ON_ANY_1[11] ,Interrupt edge triggering mode for bank 1 0 pin 11" "Single,Both" bitfld.long 0x0C 10. " INT_ON_ANY_1[10] ,Interrupt edge triggering mode for bank 1 0 pin 10" "Single,Both" bitfld.long 0x0C 9. " INT_ON_ANY_1[9] ,Interrupt edge triggering mode for bank 1 0 pin 9" "Single,Both" bitfld.long 0x0C 8. " INT_ON_ANY_1[8] ,Interrupt edge triggering mode for bank 1 0 pin 8" "Single,Both" textline " " bitfld.long 0x0C 7. " INT_ON_ANY_1[7] ,Interrupt edge triggering mode for bank 1 0 pin 7" "Single,Both" bitfld.long 0x0C 6. " INT_ON_ANY_1[6] ,Interrupt edge triggering mode for bank 1 0 pin 6" "Single,Both" bitfld.long 0x0C 5. " INT_ON_ANY_1[5] ,Interrupt edge triggering mode for bank 1 0 pin 5" "Single,Both" bitfld.long 0x0C 4. " INT_ON_ANY_1[4] ,Interrupt edge triggering mode for bank 1 0 pin 4" "Single,Both" textline " " bitfld.long 0x0C 3. " INT_ON_ANY_1[3] ,Interrupt edge triggering mode for bank 1 0 pin 3" "Single,Both" bitfld.long 0x0C 2. " INT_ON_ANY_1[2] ,Interrupt edge triggering mode for bank 1 0 pin 2" "Single,Both" bitfld.long 0x0C 1. " INT_ON_ANY_1[1] ,Interrupt edge triggering mode for bank 1 0 pin 1" "Single,Both" bitfld.long 0x0C 0. " INT_ON_ANY_1[0] ,Interrupt edge triggering mode for bank 1 0 pin 0" "Single,Both" tree.end tree "GPIO Bank 2" group.long 0x10++0x07 line.long 0x00 "MASK_DATA_2_LSW,Maskable single-word-based Data Access Register" bitfld.long 0x00 31. " MASK_2_LSW[15] ,Mask value to be applied on writes to pin 15" "Not masked,Masked" bitfld.long 0x00 30. " MASK_2_LSW[14] ,Mask value to be applied on writes to pin 14" "Not masked,Masked" bitfld.long 0x00 29. " MASK_2_LSW[13] ,Mask value to be applied on writes to pin 13" "Not masked,Masked" bitfld.long 0x00 28. " MASK_2_LSW[12] ,Mask value to be applied on writes to pin 12" "Not masked,Masked" textline " " bitfld.long 0x00 27. " MASK_2_LSW[11] ,Mask value to be applied on writes to pin 11" "Not masked,Masked" bitfld.long 0x00 26. " MASK_2_LSW[10] ,Mask value to be applied on writes to pin 10" "Not masked,Masked" bitfld.long 0x00 25. " MASK_2_LSW[9] ,Mask value to be applied on writes to pin 9" "Not masked,Masked" bitfld.long 0x00 24. " MASK_2_LSW[8] ,Mask value to be applied on writes to pin 8" "Not masked,Masked" textline " " bitfld.long 0x00 23. " MASK_2_LSW[7] ,Mask value to be applied on writes to pin 7" "Not masked,Masked" bitfld.long 0x00 22. " MASK_2_LSW[6] ,Mask value to be applied on writes to pin 6" "Not masked,Masked" bitfld.long 0x00 21. " MASK_2_LSW[5] ,Mask value to be applied on writes to pin 5" "Not masked,Masked" bitfld.long 0x00 20. " MASK_2_LSW[4] ,Mask value to be applied on writes to pin 4" "Not masked,Masked" textline " " bitfld.long 0x00 19. " MASK_2_LSW[3] ,Mask value to be applied on writes to pin 3" "Not masked,Masked" bitfld.long 0x00 18. " MASK_2_LSW[2] ,Mask value to be applied on writes to pin 2" "Not masked,Masked" bitfld.long 0x00 17. " MASK_2_LSW[1] ,Mask value to be applied on writes to pin 1" "Not masked,Masked" bitfld.long 0x00 16. " MASK_2_LSW[0] ,Mask value to be applied on writes to pin 0" "Not masked,Masked" textline " " bitfld.long 0x00 15. " DATA_2_LSW[15] ,Data value read from or written to pin 15" "Low,High" bitfld.long 0x00 14. " DATA_2_LSW[14] ,Data value read from or written to pin 14" "Low,High" bitfld.long 0x00 13. " DATA_2_LSW[13] ,Data value read from or written to pin 13" "Low,High" bitfld.long 0x00 12. " DATA_2_LSW[12] ,Data value read from or written to pin 12" "Low,High" textline " " bitfld.long 0x00 11. " DATA_2_LSW[11] ,Data value read from or written to pin 11" "Low,High" bitfld.long 0x00 10. " DATA_2_LSW[10] ,Data value read from or written to pin 10" "Low,High" bitfld.long 0x00 9. " DATA_2_LSW[9] ,Data value read from or written to pin 9" "Low,High" bitfld.long 0x00 8. " DATA_2_LSW[8] ,Data value read from or written to pin 8" "Low,High" textline " " bitfld.long 0x00 7. " DATA_2_LSW[7] ,Data value read from or written to pin 7" "Low,High" bitfld.long 0x00 6. " DATA_2_LSW[6] ,Data value read from or written to pin 6" "Low,High" bitfld.long 0x00 5. " DATA_2_LSW[5] ,Data value read from or written to pin 5" "Low,High" bitfld.long 0x00 4. " DATA_2_LSW[4] ,Data value read from or written to pin 4" "Low,High" textline " " bitfld.long 0x00 3. " DATA_2_LSW[3] ,Data value read from or written to pin 3" "Low,High" bitfld.long 0x00 2. " DATA_2_LSW[2] ,Data value read from or written to pin 2" "Low,High" bitfld.long 0x00 1. " DATA_2_LSW[1] ,Data value read from or written to pin 1" "Low,High" bitfld.long 0x00 0. " DATA_2_LSW[0] ,Data value read from or written to pin 0" "Low,High" line.long 0x04 "MASK_DATA_2_MSW,Maskable single-word-based Data Access Register" bitfld.long 0x04 25. " MASK_2_MSW[9] ,Mask value to be applied on writes to pin 9" "Not masked,Masked" bitfld.long 0x04 24. " MASK_2_MSW[8] ,Mask value to be applied on writes to pin 8" "Not masked,Masked" textline " " bitfld.long 0x04 23. " MASK_2_MSW[7] ,Mask value to be applied on writes to pin 7" "Not masked,Masked" bitfld.long 0x04 22. " MASK_2_MSW[6] ,Mask value to be applied on writes to pin 6" "Not masked,Masked" bitfld.long 0x04 21. " MASK_2_MSW[5] ,Mask value to be applied on writes to pin 5" "Not masked,Masked" bitfld.long 0x04 20. " MASK_2_MSW[4] ,Mask value to be applied on writes to pin 4" "Not masked,Masked" textline " " bitfld.long 0x04 19. " MASK_2_MSW[3] ,Mask value to be applied on writes to pin 3" "Not masked,Masked" bitfld.long 0x04 18. " MASK_2_MSW[2] ,Mask value to be applied on writes to pin 2" "Not masked,Masked" bitfld.long 0x04 17. " MASK_2_MSW[1] ,Mask value to be applied on writes to pin 1" "Not masked,Masked" bitfld.long 0x04 16. " MASK_2_MSW[0] ,Mask value to be applied on writes to pin 0" "Not masked,Masked" textline " " bitfld.long 0x04 9. " DATA_2_MSW[9] ,Data value read from or written to pin 9" "Low,High" bitfld.long 0x04 8. " DATA_2_MSW[8] ,Data value read from or written to pin 8" "Low,High" textline " " bitfld.long 0x04 7. " DATA_2_MSW[7] ,Data value read from or written to pin 7" "Low,High" bitfld.long 0x04 6. " DATA_2_MSW[6] ,Data value read from or written to pin 6" "Low,High" bitfld.long 0x04 5. " DATA_2_MSW[5] ,Data value read from or written to pin 5" "Low,High" bitfld.long 0x04 4. " DATA_2_MSW[4] ,Data value read from or written to pin 4" "Low,High" textline " " bitfld.long 0x04 3. " DATA_2_MSW[3] ,Data value read from or written to pin 3" "Low,High" bitfld.long 0x04 2. " DATA_2_MSW[2] ,Data value read from or written to pin 2" "Low,High" bitfld.long 0x04 1. " DATA_2_MSW[1] ,Data value read from or written to pin 1" "Low,High" bitfld.long 0x04 0. " DATA_2_MSW[0] ,Data value read from or written to pin 0" "Low,High" group.long 0x48++0x03 line.long 0x00 "DATA_2,Unmasked double-word-based Data Access Register" bitfld.long 0x00 25. " DATA_2[25] ,Data value read from or written to pin 25" "Low,High" bitfld.long 0x00 24. " DATA_2[24] ,Data value read from or written to pin 24" "Low,High" textline " " bitfld.long 0x00 23. " DATA_2[23] ,Data value read from or written to pin 23" "Low,High" bitfld.long 0x00 22. " DATA_2[22] ,Data value read from or written to pin 22" "Low,High" bitfld.long 0x00 21. " DATA_2[21] ,Data value read from or written to pin 21" "Low,High" bitfld.long 0x00 20. " DATA_2[20] ,Data value read from or written to pin 20" "Low,High" textline " " bitfld.long 0x00 19. " DATA_2[19] ,Data value read from or written to pin 19" "Low,High" bitfld.long 0x00 18. " DATA_2[18] ,Data value read from or written to pin 18" "Low,High" bitfld.long 0x00 17. " DATA_2[17] ,Data value read from or written to pin 17" "Low,High" bitfld.long 0x00 16. " DATA_2[16] ,Data value read from or written to pin 16" "Low,High" textline " " bitfld.long 0x00 15. " DATA_2[15] ,Data value read from or written to pin 15" "Low,High" bitfld.long 0x00 14. " DATA_2[14] ,Data value read from or written to pin 14" "Low,High" bitfld.long 0x00 13. " DATA_2[13] ,Data value read from or written to pin 13" "Low,High" bitfld.long 0x00 12. " DATA_2[12] ,Data value read from or written to pin 12" "Low,High" textline " " bitfld.long 0x00 11. " DATA_2[11] ,Data value read from or written to pin 11" "Low,High" bitfld.long 0x00 10. " DATA_2[10] ,Data value read from or written to pin 10" "Low,High" bitfld.long 0x00 9. " DATA_2[9] ,Data value read from or written to pin 9" "Low,High" bitfld.long 0x00 8. " DATA_2[8] ,Data value read from or written to pin 8" "Low,High" textline " " bitfld.long 0x00 7. " DATA_2[7] ,Data value read from or written to pin 7" "Low,High" bitfld.long 0x00 6. " DATA_2[6] ,Data value read from or written to pin 6" "Low,High" bitfld.long 0x00 5. " DATA_2[5] ,Data value read from or written to pin 5" "Low,High" bitfld.long 0x00 4. " DATA_2[4] ,Data value read from or written to pin 4" "Low,High" textline " " bitfld.long 0x00 3. " DATA_2[3] ,Data value read from or written to pin 3" "Low,High" bitfld.long 0x00 2. " DATA_2[2] ,Data value read from or written to pin 2" "Low,High" bitfld.long 0x00 1. " DATA_2[1] ,Data value read from or written to pin 1" "Low,High" bitfld.long 0x00 0. " DATA_2[0] ,Data value read from or written to pin 0" "Low,High" rgroup.long 0x68++0x03 line.long 0x00 "DATA_2_RO,Read Only Pin Value Register" bitfld.long 0x00 25. " DATA_2_RO[25] ,GPIO pin value 25" "Low,High" bitfld.long 0x00 24. " DATA_2_RO[24] ,GPIO pin value 24" "Low,High" textline " " bitfld.long 0x00 23. " DATA_2_RO[23] ,GPIO pin value 23" "Low,High" bitfld.long 0x00 22. " DATA_2_RO[22] ,GPIO pin value 22" "Low,High" bitfld.long 0x00 21. " DATA_2_RO[21] ,GPIO pin value 21" "Low,High" bitfld.long 0x00 20. " DATA_2_RO[20] ,GPIO pin value 20" "Low,High" textline " " bitfld.long 0x00 19. " DATA_2_RO[19] ,GPIO pin value 19" "Low,High" bitfld.long 0x00 18. " DATA_2_RO[18] ,GPIO pin value 18" "Low,High" bitfld.long 0x00 17. " DATA_2_RO[17] ,GPIO pin value 17" "Low,High" bitfld.long 0x00 16. " DATA_2_RO[16] ,GPIO pin value 16" "Low,High" textline " " bitfld.long 0x00 15. " DATA_2_RO[15] ,GPIO pin value 15" "Low,High" bitfld.long 0x00 14. " DATA_2_RO[14] ,GPIO pin value 14" "Low,High" bitfld.long 0x00 13. " DATA_2_RO[13] ,GPIO pin value 13" "Low,High" bitfld.long 0x00 12. " DATA_2_RO[12] ,GPIO pin value 12" "Low,High" textline " " bitfld.long 0x00 11. " DATA_2_RO[11] ,GPIO pin value 11" "Low,High" bitfld.long 0x00 10. " DATA_2_RO[10] ,GPIO pin value 10" "Low,High" bitfld.long 0x00 9. " DATA_2_RO[9] ,GPIO pin value 9" "Low,High" bitfld.long 0x00 8. " DATA_2_RO[8] ,GPIO pin value 8" "Low,High" textline " " bitfld.long 0x00 7. " DATA_2_RO[7] ,GPIO pin value 7" "Low,High" bitfld.long 0x00 6. " DATA_2_RO[6] ,GPIO pin value 6" "Low,High" bitfld.long 0x00 5. " DATA_2_RO[5] ,GPIO pin value 5" "Low,High" bitfld.long 0x00 4. " DATA_2_RO[4] ,GPIO pin value 4" "Low,High" textline " " bitfld.long 0x00 3. " DATA_2_RO[3] ,GPIO pin value 3" "Low,High" bitfld.long 0x00 2. " DATA_2_RO[2] ,GPIO pin value 2" "Low,High" bitfld.long 0x00 1. " DATA_2_RO[1] ,GPIO pin value 1" "Low,High" bitfld.long 0x00 0. " DATA_2_RO[0] ,GPIO pin value 0" "Low,High" group.long 0x284++0x07 line.long 0x00 "DIRM_2,Direction Mode Configuration Register" bitfld.long 0x00 25. " DIRECTION_2[25] ,Direction mode for bank 2 pin 25" "Input,Output" bitfld.long 0x00 24. " DIRECTION_2[24] ,Direction mode for bank 2 pin 24" "Input,Output" textline " " bitfld.long 0x00 23. " DIRECTION_2[23] ,Direction mode for bank 2 pin 23" "Input,Output" bitfld.long 0x00 22. " DIRECTION_2[22] ,Direction mode for bank 2 pin 22" "Input,Output" bitfld.long 0x00 21. " DIRECTION_2[21] ,Direction mode for bank 2 pin 21" "Input,Output" bitfld.long 0x00 20. " DIRECTION_2[20] ,Direction mode for bank 2 pin 20" "Input,Output" textline " " bitfld.long 0x00 19. " DIRECTION_2[19] ,Direction mode for bank 2 pin 19" "Input,Output" bitfld.long 0x00 18. " DIRECTION_2[18] ,Direction mode for bank 2 pin 18" "Input,Output" bitfld.long 0x00 17. " DIRECTION_2[17] ,Direction mode for bank 2 pin 17" "Input,Output" bitfld.long 0x00 16. " DIRECTION_2[16] ,Direction mode for bank 2 pin 16" "Input,Output" textline " " bitfld.long 0x00 15. " DIRECTION_2[15] ,Direction mode for bank 2 pin 15" "Input,Output" bitfld.long 0x00 14. " DIRECTION_2[14] ,Direction mode for bank 2 pin 14" "Input,Output" bitfld.long 0x00 13. " DIRECTION_2[13] ,Direction mode for bank 2 pin 13" "Input,Output" bitfld.long 0x00 12. " DIRECTION_2[12] ,Direction mode for bank 2 pin 12" "Input,Output" textline " " bitfld.long 0x00 11. " DIRECTION_2[11] ,Direction mode for bank 2 pin 11" "Input,Output" bitfld.long 0x00 10. " DIRECTION_2[10] ,Direction mode for bank 2 pin 10" "Input,Output" bitfld.long 0x00 9. " DIRECTION_2[9] ,Direction mode for bank 2 pin 9" "Input,Output" bitfld.long 0x00 8. " DIRECTION_2[8] ,Direction mode for bank 2 pin 8" "Input,Output" textline " " bitfld.long 0x00 7. " DIRECTION_2[7] ,Direction mode for bank 2 pin 7" "Input,Output" bitfld.long 0x00 6. " DIRECTION_2[6] ,Direction mode for bank 2 pin 6" "Input,Output" bitfld.long 0x00 5. " DIRECTION_2[5] ,Direction mode for bank 2 pin 5" "Input,Output" bitfld.long 0x00 4. " DIRECTION_2[4] ,Direction mode for bank 2 pin 4" "Input,Output" textline " " bitfld.long 0x00 3. " DIRECTION_2[3] ,Direction mode for bank 2 pin 3" "Input,Output" bitfld.long 0x00 2. " DIRECTION_2[2] ,Direction mode for bank 2 pin 2" "Input,Output" bitfld.long 0x00 1. " DIRECTION_2[1] ,Direction mode for bank 2 pin 1" "Input,Output" bitfld.long 0x00 0. " DIRECTION_2[0] ,Direction mode for bank 2 pin 0" "Input,Output" line.long 0x04 "OEN_2,Output Enable Register" bitfld.long 0x04 25. " OP_ENABLE_2[25] ,Output enable for bank 2 pin 25" "Disabled,Enabled" bitfld.long 0x04 24. " OP_ENABLE_2[24] ,Output enable for bank 2 pin 24" "Disabled,Enabled" textline " " bitfld.long 0x04 23. " OP_ENABLE_2[23] ,Output enable for bank 2 pin 23" "Disabled,Enabled" bitfld.long 0x04 22. " OP_ENABLE_2[22] ,Output enable for bank 2 pin 22" "Disabled,Enabled" bitfld.long 0x04 21. " OP_ENABLE_2[21] ,Output enable for bank 2 pin 21" "Disabled,Enabled" bitfld.long 0x04 20. " OP_ENABLE_2[20] ,Output enable for bank 2 pin 20" "Disabled,Enabled" textline " " bitfld.long 0x04 19. " OP_ENABLE_2[19] ,Output enable for bank 2 pin 19" "Disabled,Enabled" bitfld.long 0x04 18. " OP_ENABLE_2[18] ,Output enable for bank 2 pin 18" "Disabled,Enabled" bitfld.long 0x04 17. " OP_ENABLE_2[17] ,Output enable for bank 2 pin 17" "Disabled,Enabled" bitfld.long 0x04 16. " OP_ENABLE_2[16] ,Output enable for bank 2 pin 16" "Disabled,Enabled" textline " " bitfld.long 0x04 15. " OP_ENABLE_2[15] ,Output enable for bank 2 pin 15" "Disabled,Enabled" bitfld.long 0x04 14. " OP_ENABLE_2[14] ,Output enable for bank 2 pin 14" "Disabled,Enabled" bitfld.long 0x04 13. " OP_ENABLE_2[13] ,Output enable for bank 2 pin 13" "Disabled,Enabled" bitfld.long 0x04 12. " OP_ENABLE_2[12] ,Output enable for bank 2 pin 12" "Disabled,Enabled" textline " " bitfld.long 0x04 11. " OP_ENABLE_2[11] ,Output enable for bank 2 pin 11" "Disabled,Enabled" bitfld.long 0x04 10. " OP_ENABLE_2[10] ,Output enable for bank 2 pin 10" "Disabled,Enabled" bitfld.long 0x04 9. " OP_ENABLE_2[9] ,Output enable for bank 2 pin 9" "Disabled,Enabled" bitfld.long 0x04 8. " OP_ENABLE_2[8] ,Output enable for bank 2 pin 8" "Disabled,Enabled" textline " " bitfld.long 0x04 7. " OP_ENABLE_2[7] ,Output enable for bank 2 pin 7" "Disabled,Enabled" bitfld.long 0x04 6. " OP_ENABLE_2[6] ,Output enable for bank 2 pin 6" "Disabled,Enabled" bitfld.long 0x04 5. " OP_ENABLE_2[5] ,Output enable for bank 2 pin 5" "Disabled,Enabled" bitfld.long 0x04 4. " OP_ENABLE_2[4] ,Output enable for bank 2 pin 4" "Disabled,Enabled" textline " " bitfld.long 0x04 3. " OP_ENABLE_2[3] ,Output enable for bank 2 pin 3" "Disabled,Enabled" bitfld.long 0x04 2. " OP_ENABLE_2[2] ,Output enable for bank 2 pin 2" "Disabled,Enabled" bitfld.long 0x04 1. " OP_ENABLE_2[1] ,Output enable for bank 2 pin 1" "Disabled,Enabled" bitfld.long 0x04 0. " OP_ENABLE_2[0] ,Output enable for bank 2 pin 0" "Disabled,Enabled" group.long (0x284+0x08)++0x03 line.long 0x00 "INT_MASK_2_SET/CLR,Interrupt Mask Status Register" setclrfld.long 0x00 25. 0x08 25. 0x04 25. " INT_MASK_2[25] ,Interrupt mask for bank 2 pin 25" "Not masked,Masked" setclrfld.long 0x00 24. 0x08 24. 0x04 24. " INT_MASK_2[24] ,Interrupt mask for bank 2 pin 24" "Not masked,Masked" textline " " setclrfld.long 0x00 23. 0x08 23. 0x04 23. " INT_MASK_2[23] ,Interrupt mask for bank 2 pin 23" "Not masked,Masked" setclrfld.long 0x00 22. 0x08 22. 0x04 22. " INT_MASK_2[22] ,Interrupt mask for bank 2 pin 22" "Not masked,Masked" setclrfld.long 0x00 21. 0x08 21. 0x04 21. " INT_MASK_2[21] ,Interrupt mask for bank 2 pin 21" "Not masked,Masked" setclrfld.long 0x00 20. 0x08 20. 0x04 20. " INT_MASK_2[20] ,Interrupt mask for bank 2 pin 20" "Not masked,Masked" textline " " setclrfld.long 0x00 19. 0x08 19. 0x04 19. " INT_MASK_2[19] ,Interrupt mask for bank 2 pin 19" "Not masked,Masked" setclrfld.long 0x00 18. 0x08 18. 0x04 18. " INT_MASK_2[18] ,Interrupt mask for bank 2 pin 18" "Not masked,Masked" setclrfld.long 0x00 17. 0x08 17. 0x04 17. " INT_MASK_2[17] ,Interrupt mask for bank 2 pin 17" "Not masked,Masked" setclrfld.long 0x00 16. 0x08 16. 0x04 16. " INT_MASK_2[16] ,Interrupt mask for bank 2 pin 16" "Not masked,Masked" textline " " setclrfld.long 0x00 15. 0x08 15. 0x04 15. " INT_MASK_2[15] ,Interrupt mask for bank 2 pin 15" "Not masked,Masked" setclrfld.long 0x00 14. 0x08 14. 0x04 14. " INT_MASK_2[14] ,Interrupt mask for bank 2 pin 14" "Not masked,Masked" setclrfld.long 0x00 13. 0x08 13. 0x04 13. " INT_MASK_2[13] ,Interrupt mask for bank 2 pin 13" "Not masked,Masked" setclrfld.long 0x00 12. 0x08 12. 0x04 12. " INT_MASK_2[12] ,Interrupt mask for bank 2 pin 12" "Not masked,Masked" textline " " setclrfld.long 0x00 11. 0x08 11. 0x04 11. " INT_MASK_2[11] ,Interrupt mask for bank 2 pin 11" "Not masked,Masked" setclrfld.long 0x00 10. 0x08 10. 0x04 10. " INT_MASK_2[10] ,Interrupt mask for bank 2 pin 10" "Not masked,Masked" setclrfld.long 0x00 9. 0x08 9. 0x04 9. " INT_MASK_2[9] ,Interrupt mask for bank 2 pin 9" "Not masked,Masked" setclrfld.long 0x00 8. 0x08 8. 0x04 8. " INT_MASK_2[8] ,Interrupt mask for bank 2 pin 8" "Not masked,Masked" textline " " setclrfld.long 0x00 7. 0x08 7. 0x04 7. " INT_MASK_2[7] ,Interrupt mask for bank 2 pin 7" "Not masked,Masked" setclrfld.long 0x00 6. 0x08 6. 0x04 6. " INT_MASK_2[6] ,Interrupt mask for bank 2 pin 6" "Not masked,Masked" setclrfld.long 0x00 5. 0x08 5. 0x04 5. " INT_MASK_2[5] ,Interrupt mask for bank 2 pin 5" "Not masked,Masked" setclrfld.long 0x00 4. 0x08 4. 0x04 4. " INT_MASK_2[4] ,Interrupt mask for bank 2 pin 4" "Not masked,Masked" textline " " setclrfld.long 0x00 3. 0x08 3. 0x04 3. " INT_MASK_2[3] ,Interrupt mask for bank 2 pin 3" "Not masked,Masked" setclrfld.long 0x00 2. 0x08 2. 0x04 2. " INT_MASK_2[2] ,Interrupt mask for bank 2 pin 2" "Not masked,Masked" setclrfld.long 0x00 1. 0x08 1. 0x04 1. " INT_MASK_2[1] ,Interrupt mask for bank 2 pin 1" "Not masked,Masked" setclrfld.long 0x00 0. 0x08 0. 0x04 0. " INT_MASK_2[0] ,Interrupt mask for bank 2 pin 0" "Not masked,Masked" group.long (0x284+0x14)++0x0F line.long 0x00 "INT_STAT_2,Interrupt Status Register" eventfld.long 0x00 25. " INT_STATUS_2[25] ,Interrupt status for bank 2 pin 25" "No interrupt,Interrupt" eventfld.long 0x00 24. " INT_STATUS_2[24] ,Interrupt status for bank 2 pin 24" "No interrupt,Interrupt" textline " " eventfld.long 0x00 23. " INT_STATUS_2[23] ,Interrupt status for bank 2 pin 23" "No interrupt,Interrupt" eventfld.long 0x00 22. " INT_STATUS_2[22] ,Interrupt status for bank 2 pin 22" "No interrupt,Interrupt" eventfld.long 0x00 21. " INT_STATUS_2[21] ,Interrupt status for bank 2 pin 21" "No interrupt,Interrupt" eventfld.long 0x00 20. " INT_STATUS_2[20] ,Interrupt status for bank 2 pin 20" "No interrupt,Interrupt" textline " " eventfld.long 0x00 19. " INT_STATUS_2[19] ,Interrupt status for bank 2 pin 19" "No interrupt,Interrupt" eventfld.long 0x00 18. " INT_STATUS_2[18] ,Interrupt status for bank 2 pin 18" "No interrupt,Interrupt" eventfld.long 0x00 17. " INT_STATUS_2[17] ,Interrupt status for bank 2 pin 17" "No interrupt,Interrupt" eventfld.long 0x00 16. " INT_STATUS_2[16] ,Interrupt status for bank 2 pin 16" "No interrupt,Interrupt" textline " " eventfld.long 0x00 15. " INT_STATUS_2[15] ,Interrupt status for bank 2 pin 15" "No interrupt,Interrupt" eventfld.long 0x00 14. " INT_STATUS_2[14] ,Interrupt status for bank 2 pin 14" "No interrupt,Interrupt" eventfld.long 0x00 13. " INT_STATUS_2[13] ,Interrupt status for bank 2 pin 13" "No interrupt,Interrupt" eventfld.long 0x00 12. " INT_STATUS_2[12] ,Interrupt status for bank 2 pin 12" "No interrupt,Interrupt" textline " " eventfld.long 0x00 11. " INT_STATUS_2[11] ,Interrupt status for bank 2 pin 11" "No interrupt,Interrupt" eventfld.long 0x00 10. " INT_STATUS_2[10] ,Interrupt status for bank 2 pin 10" "No interrupt,Interrupt" eventfld.long 0x00 9. " INT_STATUS_2[9] ,Interrupt status for bank 2 pin 9" "No interrupt,Interrupt" eventfld.long 0x00 8. " INT_STATUS_2[8] ,Interrupt status for bank 2 pin 8" "No interrupt,Interrupt" textline " " eventfld.long 0x00 7. " INT_STATUS_2[7] ,Interrupt status for bank 2 pin 7" "No interrupt,Interrupt" eventfld.long 0x00 6. " INT_STATUS_2[6] ,Interrupt status for bank 2 pin 6" "No interrupt,Interrupt" eventfld.long 0x00 5. " INT_STATUS_2[5] ,Interrupt status for bank 2 pin 5" "No interrupt,Interrupt" eventfld.long 0x00 4. " INT_STATUS_2[4] ,Interrupt status for bank 2 pin 4" "No interrupt,Interrupt" textline " " eventfld.long 0x00 3. " INT_STATUS_2[3] ,Interrupt status for bank 2 pin 3" "No interrupt,Interrupt" eventfld.long 0x00 2. " INT_STATUS_2[2] ,Interrupt status for bank 2 pin 2" "No interrupt,Interrupt" eventfld.long 0x00 1. " INT_STATUS_2[1] ,Interrupt status for bank 2 pin 1" "No interrupt,Interrupt" eventfld.long 0x00 0. " INT_STATUS_2[0] ,Interrupt status for bank 2 pin 0" "No interrupt,Interrupt" line.long 0x04 "INT_TYPE_2,Interrupt Type Configuration Register" bitfld.long 0x04 25. " INT_TYPE_2[25] ,Interrupt type for bank 2 pin 25" "Level,Edge" bitfld.long 0x04 24. " INT_TYPE_2[24] ,Interrupt type for bank 2 pin 24" "Level,Edge" textline " " bitfld.long 0x04 23. " INT_TYPE_2[23] ,Interrupt type for bank 2 pin 23" "Level,Edge" bitfld.long 0x04 22. " INT_TYPE_2[22] ,Interrupt type for bank 2 pin 22" "Level,Edge" bitfld.long 0x04 21. " INT_TYPE_2[21] ,Interrupt type for bank 2 pin 21" "Level,Edge" bitfld.long 0x04 20. " INT_TYPE_2[20] ,Interrupt type for bank 2 pin 20" "Level,Edge" textline " " bitfld.long 0x04 19. " INT_TYPE_2[19] ,Interrupt type for bank 2 pin 19" "Level,Edge" bitfld.long 0x04 18. " INT_TYPE_2[18] ,Interrupt type for bank 2 pin 18" "Level,Edge" bitfld.long 0x04 17. " INT_TYPE_2[17] ,Interrupt type for bank 2 pin 17" "Level,Edge" bitfld.long 0x04 16. " INT_TYPE_2[16] ,Interrupt type for bank 2 pin 16" "Level,Edge" textline " " bitfld.long 0x04 15. " INT_TYPE_2[15] ,Interrupt type for bank 2 pin 15" "Level,Edge" bitfld.long 0x04 14. " INT_TYPE_2[14] ,Interrupt type for bank 2 pin 14" "Level,Edge" bitfld.long 0x04 13. " INT_TYPE_2[13] ,Interrupt type for bank 2 pin 13" "Level,Edge" bitfld.long 0x04 12. " INT_TYPE_2[12] ,Interrupt type for bank 2 pin 12" "Level,Edge" textline " " bitfld.long 0x04 11. " INT_TYPE_2[11] ,Interrupt type for bank 2 pin 11" "Level,Edge" bitfld.long 0x04 10. " INT_TYPE_2[10] ,Interrupt type for bank 2 pin 10" "Level,Edge" bitfld.long 0x04 9. " INT_TYPE_2[9] ,Interrupt type for bank 2 pin 9" "Level,Edge" bitfld.long 0x04 8. " INT_TYPE_2[8] ,Interrupt type for bank 2 pin 8" "Level,Edge" textline " " bitfld.long 0x04 7. " INT_TYPE_2[7] ,Interrupt type for bank 2 pin 7" "Level,Edge" bitfld.long 0x04 6. " INT_TYPE_2[6] ,Interrupt type for bank 2 pin 6" "Level,Edge" bitfld.long 0x04 5. " INT_TYPE_2[5] ,Interrupt type for bank 2 pin 5" "Level,Edge" bitfld.long 0x04 4. " INT_TYPE_2[4] ,Interrupt type for bank 2 pin 4" "Level,Edge" textline " " bitfld.long 0x04 3. " INT_TYPE_2[3] ,Interrupt type for bank 2 pin 3" "Level,Edge" bitfld.long 0x04 2. " INT_TYPE_2[2] ,Interrupt type for bank 2 pin 2" "Level,Edge" bitfld.long 0x04 1. " INT_TYPE_2[1] ,Interrupt type for bank 2 pin 1" "Level,Edge" bitfld.long 0x04 0. " INT_TYPE_2[0] ,Interrupt type for bank 2 pin 0" "Level,Edge" line.long 0x08 "INT_POLARITY_2,Interrupt Polarity Configuration Register" bitfld.long 0x08 25. " INT_POL_2[25] ,Interrupt polarity for bank 2 pin 25" "Low,High" bitfld.long 0x08 24. " INT_POL_2[24] ,Interrupt polarity for bank 2 pin 24" "Low,High" textline " " bitfld.long 0x08 23. " INT_POL_2[23] ,Interrupt polarity for bank 2 pin 23" "Low,High" bitfld.long 0x08 22. " INT_POL_2[22] ,Interrupt polarity for bank 2 pin 22" "Low,High" bitfld.long 0x08 21. " INT_POL_2[21] ,Interrupt polarity for bank 2 pin 21" "Low,High" bitfld.long 0x08 20. " INT_POL_2[20] ,Interrupt polarity for bank 2 pin 20" "Low,High" textline " " bitfld.long 0x08 19. " INT_POL_2[19] ,Interrupt polarity for bank 2 pin 19" "Low,High" bitfld.long 0x08 18. " INT_POL_2[18] ,Interrupt polarity for bank 2 pin 18" "Low,High" bitfld.long 0x08 17. " INT_POL_2[17] ,Interrupt polarity for bank 2 pin 17" "Low,High" bitfld.long 0x08 16. " INT_POL_2[16] ,Interrupt polarity for bank 2 pin 16" "Low,High" textline " " bitfld.long 0x08 15. " INT_POL_2[15] ,Interrupt polarity for bank 2 pin 15" "Low,High" bitfld.long 0x08 14. " INT_POL_2[14] ,Interrupt polarity for bank 2 pin 14" "Low,High" bitfld.long 0x08 13. " INT_POL_2[13] ,Interrupt polarity for bank 2 pin 13" "Low,High" bitfld.long 0x08 12. " INT_POL_2[12] ,Interrupt polarity for bank 2 pin 12" "Low,High" textline " " bitfld.long 0x08 11. " INT_POL_2[11] ,Interrupt polarity for bank 2 pin 11" "Low,High" bitfld.long 0x08 10. " INT_POL_2[10] ,Interrupt polarity for bank 2 pin 10" "Low,High" bitfld.long 0x08 9. " INT_POL_2[9] ,Interrupt polarity for bank 2 pin 9" "Low,High" bitfld.long 0x08 8. " INT_POL_2[8] ,Interrupt polarity for bank 2 pin 8" "Low,High" textline " " bitfld.long 0x08 7. " INT_POL_2[7] ,Interrupt polarity for bank 2 pin 7" "Low,High" bitfld.long 0x08 6. " INT_POL_2[6] ,Interrupt polarity for bank 2 pin 6" "Low,High" bitfld.long 0x08 5. " INT_POL_2[5] ,Interrupt polarity for bank 2 pin 5" "Low,High" bitfld.long 0x08 4. " INT_POL_2[4] ,Interrupt polarity for bank 2 pin 4" "Low,High" textline " " bitfld.long 0x08 3. " INT_POL_2[3] ,Interrupt polarity for bank 2 pin 3" "Low,High" bitfld.long 0x08 2. " INT_POL_2[2] ,Interrupt polarity for bank 2 pin 2" "Low,High" bitfld.long 0x08 1. " INT_POL_2[1] ,Interrupt polarity for bank 2 pin 1" "Low,High" bitfld.long 0x08 0. " INT_POL_2[0] ,Interrupt polarity for bank 2 pin 0" "Low,High" line.long 0x0C "INT_ANY_2,Interrupt On Any Configuration Register" bitfld.long 0x0C 25. " INT_ON_ANY_2[25] ,Interrupt edge triggering mode for bank 2 0 pin 25" "Single,Both" bitfld.long 0x0C 24. " INT_ON_ANY_2[24] ,Interrupt edge triggering mode for bank 2 0 pin 24" "Single,Both" textline " " bitfld.long 0x0C 23. " INT_ON_ANY_2[23] ,Interrupt edge triggering mode for bank 2 0 pin 23" "Single,Both" bitfld.long 0x0C 22. " INT_ON_ANY_2[22] ,Interrupt edge triggering mode for bank 2 0 pin 22" "Single,Both" bitfld.long 0x0C 21. " INT_ON_ANY_2[21] ,Interrupt edge triggering mode for bank 2 0 pin 21" "Single,Both" bitfld.long 0x0C 20. " INT_ON_ANY_2[20] ,Interrupt edge triggering mode for bank 2 0 pin 20" "Single,Both" textline " " bitfld.long 0x0C 19. " INT_ON_ANY_2[19] ,Interrupt edge triggering mode for bank 2 0 pin 19" "Single,Both" bitfld.long 0x0C 18. " INT_ON_ANY_2[18] ,Interrupt edge triggering mode for bank 2 0 pin 18" "Single,Both" bitfld.long 0x0C 17. " INT_ON_ANY_2[17] ,Interrupt edge triggering mode for bank 2 0 pin 17" "Single,Both" bitfld.long 0x0C 16. " INT_ON_ANY_2[16] ,Interrupt edge triggering mode for bank 2 0 pin 16" "Single,Both" textline " " bitfld.long 0x0C 15. " INT_ON_ANY_2[15] ,Interrupt edge triggering mode for bank 2 0 pin 15" "Single,Both" bitfld.long 0x0C 14. " INT_ON_ANY_2[14] ,Interrupt edge triggering mode for bank 2 0 pin 14" "Single,Both" bitfld.long 0x0C 13. " INT_ON_ANY_2[13] ,Interrupt edge triggering mode for bank 2 0 pin 13" "Single,Both" bitfld.long 0x0C 12. " INT_ON_ANY_2[12] ,Interrupt edge triggering mode for bank 2 0 pin 12" "Single,Both" textline " " bitfld.long 0x0C 11. " INT_ON_ANY_2[11] ,Interrupt edge triggering mode for bank 2 0 pin 11" "Single,Both" bitfld.long 0x0C 10. " INT_ON_ANY_2[10] ,Interrupt edge triggering mode for bank 2 0 pin 10" "Single,Both" bitfld.long 0x0C 9. " INT_ON_ANY_2[9] ,Interrupt edge triggering mode for bank 2 0 pin 9" "Single,Both" bitfld.long 0x0C 8. " INT_ON_ANY_2[8] ,Interrupt edge triggering mode for bank 2 0 pin 8" "Single,Both" textline " " bitfld.long 0x0C 7. " INT_ON_ANY_2[7] ,Interrupt edge triggering mode for bank 2 0 pin 7" "Single,Both" bitfld.long 0x0C 6. " INT_ON_ANY_2[6] ,Interrupt edge triggering mode for bank 2 0 pin 6" "Single,Both" bitfld.long 0x0C 5. " INT_ON_ANY_2[5] ,Interrupt edge triggering mode for bank 2 0 pin 5" "Single,Both" bitfld.long 0x0C 4. " INT_ON_ANY_2[4] ,Interrupt edge triggering mode for bank 2 0 pin 4" "Single,Both" textline " " bitfld.long 0x0C 3. " INT_ON_ANY_2[3] ,Interrupt edge triggering mode for bank 2 0 pin 3" "Single,Both" bitfld.long 0x0C 2. " INT_ON_ANY_2[2] ,Interrupt edge triggering mode for bank 2 0 pin 2" "Single,Both" bitfld.long 0x0C 1. " INT_ON_ANY_2[1] ,Interrupt edge triggering mode for bank 2 0 pin 1" "Single,Both" bitfld.long 0x0C 0. " INT_ON_ANY_2[0] ,Interrupt edge triggering mode for bank 2 0 pin 0" "Single,Both" tree.end tree "GPIO Bank 3" group.long 0x18++0x07 line.long 0x00 "MASK_DATA_3_LSW,Maskable single-word-based Data Access Register" bitfld.long 0x00 31. " MASK_3_LSW[15] ,Mask value to be applied on writes to pin 15" "Not masked,Masked" bitfld.long 0x00 30. " MASK_3_LSW[14] ,Mask value to be applied on writes to pin 14" "Not masked,Masked" bitfld.long 0x00 29. " MASK_3_LSW[13] ,Mask value to be applied on writes to pin 13" "Not masked,Masked" bitfld.long 0x00 28. " MASK_3_LSW[12] ,Mask value to be applied on writes to pin 12" "Not masked,Masked" textline " " bitfld.long 0x00 27. " MASK_3_LSW[11] ,Mask value to be applied on writes to pin 11" "Not masked,Masked" bitfld.long 0x00 26. " MASK_3_LSW[10] ,Mask value to be applied on writes to pin 10" "Not masked,Masked" bitfld.long 0x00 25. " MASK_3_LSW[9] ,Mask value to be applied on writes to pin 9" "Not masked,Masked" bitfld.long 0x00 24. " MASK_3_LSW[8] ,Mask value to be applied on writes to pin 8" "Not masked,Masked" textline " " bitfld.long 0x00 23. " MASK_3_LSW[7] ,Mask value to be applied on writes to pin 7" "Not masked,Masked" bitfld.long 0x00 22. " MASK_3_LSW[6] ,Mask value to be applied on writes to pin 6" "Not masked,Masked" bitfld.long 0x00 21. " MASK_3_LSW[5] ,Mask value to be applied on writes to pin 5" "Not masked,Masked" bitfld.long 0x00 20. " MASK_3_LSW[4] ,Mask value to be applied on writes to pin 4" "Not masked,Masked" textline " " bitfld.long 0x00 19. " MASK_3_LSW[3] ,Mask value to be applied on writes to pin 3" "Not masked,Masked" bitfld.long 0x00 18. " MASK_3_LSW[2] ,Mask value to be applied on writes to pin 2" "Not masked,Masked" bitfld.long 0x00 17. " MASK_3_LSW[1] ,Mask value to be applied on writes to pin 1" "Not masked,Masked" bitfld.long 0x00 16. " MASK_3_LSW[0] ,Mask value to be applied on writes to pin 0" "Not masked,Masked" textline " " bitfld.long 0x00 15. " DATA_3_LSW[15] ,Data value read from or written to pin 15" "Low,High" bitfld.long 0x00 14. " DATA_3_LSW[14] ,Data value read from or written to pin 14" "Low,High" bitfld.long 0x00 13. " DATA_3_LSW[13] ,Data value read from or written to pin 13" "Low,High" bitfld.long 0x00 12. " DATA_3_LSW[12] ,Data value read from or written to pin 12" "Low,High" textline " " bitfld.long 0x00 11. " DATA_3_LSW[11] ,Data value read from or written to pin 11" "Low,High" bitfld.long 0x00 10. " DATA_3_LSW[10] ,Data value read from or written to pin 10" "Low,High" bitfld.long 0x00 9. " DATA_3_LSW[9] ,Data value read from or written to pin 9" "Low,High" bitfld.long 0x00 8. " DATA_3_LSW[8] ,Data value read from or written to pin 8" "Low,High" textline " " bitfld.long 0x00 7. " DATA_3_LSW[7] ,Data value read from or written to pin 7" "Low,High" bitfld.long 0x00 6. " DATA_3_LSW[6] ,Data value read from or written to pin 6" "Low,High" bitfld.long 0x00 5. " DATA_3_LSW[5] ,Data value read from or written to pin 5" "Low,High" bitfld.long 0x00 4. " DATA_3_LSW[4] ,Data value read from or written to pin 4" "Low,High" textline " " bitfld.long 0x00 3. " DATA_3_LSW[3] ,Data value read from or written to pin 3" "Low,High" bitfld.long 0x00 2. " DATA_3_LSW[2] ,Data value read from or written to pin 2" "Low,High" bitfld.long 0x00 1. " DATA_3_LSW[1] ,Data value read from or written to pin 1" "Low,High" bitfld.long 0x00 0. " DATA_3_LSW[0] ,Data value read from or written to pin 0" "Low,High" line.long 0x04 "MASK_DATA_3_MSW,Maskable single-word-based Data Access Register" bitfld.long 0x04 31. " MASK_3_MSW[15] ,Mask value to be applied on writes to pin 15" "Not masked,Masked" bitfld.long 0x04 30. " MASK_3_MSW[14] ,Mask value to be applied on writes to pin 14" "Not masked,Masked" bitfld.long 0x04 29. " MASK_3_MSW[13] ,Mask value to be applied on writes to pin 13" "Not masked,Masked" bitfld.long 0x04 28. " MASK_3_MSW[12] ,Mask value to be applied on writes to pin 12" "Not masked,Masked" textline " " bitfld.long 0x04 27. " MASK_3_MSW[11] ,Mask value to be applied on writes to pin 11" "Not masked,Masked" bitfld.long 0x04 26. " MASK_3_MSW[10] ,Mask value to be applied on writes to pin 10" "Not masked,Masked" bitfld.long 0x04 25. " MASK_3_MSW[9] ,Mask value to be applied on writes to pin 9" "Not masked,Masked" bitfld.long 0x04 24. " MASK_3_MSW[8] ,Mask value to be applied on writes to pin 8" "Not masked,Masked" textline " " bitfld.long 0x04 23. " MASK_3_MSW[7] ,Mask value to be applied on writes to pin 7" "Not masked,Masked" bitfld.long 0x04 22. " MASK_3_MSW[6] ,Mask value to be applied on writes to pin 6" "Not masked,Masked" bitfld.long 0x04 21. " MASK_3_MSW[5] ,Mask value to be applied on writes to pin 5" "Not masked,Masked" bitfld.long 0x04 20. " MASK_3_MSW[4] ,Mask value to be applied on writes to pin 4" "Not masked,Masked" textline " " bitfld.long 0x04 19. " MASK_3_MSW[3] ,Mask value to be applied on writes to pin 3" "Not masked,Masked" bitfld.long 0x04 18. " MASK_3_MSW[2] ,Mask value to be applied on writes to pin 2" "Not masked,Masked" bitfld.long 0x04 17. " MASK_3_MSW[1] ,Mask value to be applied on writes to pin 1" "Not masked,Masked" bitfld.long 0x04 16. " MASK_3_MSW[0] ,Mask value to be applied on writes to pin 0" "Not masked,Masked" textline " " bitfld.long 0x04 15. " DATA_3_MSW[15] ,Data value read from or written to pin 15" "Low,High" bitfld.long 0x04 14. " DATA_3_MSW[14] ,Data value read from or written to pin 14" "Low,High" bitfld.long 0x04 13. " DATA_3_MSW[13] ,Data value read from or written to pin 13" "Low,High" bitfld.long 0x04 12. " DATA_3_MSW[12] ,Data value read from or written to pin 12" "Low,High" textline " " bitfld.long 0x04 11. " DATA_3_MSW[11] ,Data value read from or written to pin 11" "Low,High" bitfld.long 0x04 10. " DATA_3_MSW[10] ,Data value read from or written to pin 10" "Low,High" bitfld.long 0x04 9. " DATA_3_MSW[9] ,Data value read from or written to pin 9" "Low,High" bitfld.long 0x04 8. " DATA_3_MSW[8] ,Data value read from or written to pin 8" "Low,High" textline " " bitfld.long 0x04 7. " DATA_3_MSW[7] ,Data value read from or written to pin 7" "Low,High" bitfld.long 0x04 6. " DATA_3_MSW[6] ,Data value read from or written to pin 6" "Low,High" bitfld.long 0x04 5. " DATA_3_MSW[5] ,Data value read from or written to pin 5" "Low,High" bitfld.long 0x04 4. " DATA_3_MSW[4] ,Data value read from or written to pin 4" "Low,High" textline " " bitfld.long 0x04 3. " DATA_3_MSW[3] ,Data value read from or written to pin 3" "Low,High" bitfld.long 0x04 2. " DATA_3_MSW[2] ,Data value read from or written to pin 2" "Low,High" bitfld.long 0x04 1. " DATA_3_MSW[1] ,Data value read from or written to pin 1" "Low,High" bitfld.long 0x04 0. " DATA_3_MSW[0] ,Data value read from or written to pin 0" "Low,High" group.long 0x4C++0x03 line.long 0x00 "DATA_3,Unmasked double-word-based Data Access Register" bitfld.long 0x00 31. " DATA_3[31] ,Data value read from or written to pin 31" "Low,High" bitfld.long 0x00 30. " DATA_3[30] ,Data value read from or written to pin 30" "Low,High" bitfld.long 0x00 29. " DATA_3[29] ,Data value read from or written to pin 29" "Low,High" bitfld.long 0x00 28. " DATA_3[28] ,Data value read from or written to pin 28" "Low,High" textline " " bitfld.long 0x00 27. " DATA_3[27] ,Data value read from or written to pin 27" "Low,High" bitfld.long 0x00 26. " DATA_3[26] ,Data value read from or written to pin 26" "Low,High" bitfld.long 0x00 25. " DATA_3[25] ,Data value read from or written to pin 25" "Low,High" bitfld.long 0x00 24. " DATA_3[24] ,Data value read from or written to pin 24" "Low,High" textline " " bitfld.long 0x00 23. " DATA_3[23] ,Data value read from or written to pin 23" "Low,High" bitfld.long 0x00 22. " DATA_3[22] ,Data value read from or written to pin 22" "Low,High" bitfld.long 0x00 21. " DATA_3[21] ,Data value read from or written to pin 21" "Low,High" bitfld.long 0x00 20. " DATA_3[20] ,Data value read from or written to pin 20" "Low,High" textline " " bitfld.long 0x00 19. " DATA_3[19] ,Data value read from or written to pin 19" "Low,High" bitfld.long 0x00 18. " DATA_3[18] ,Data value read from or written to pin 18" "Low,High" bitfld.long 0x00 17. " DATA_3[17] ,Data value read from or written to pin 17" "Low,High" bitfld.long 0x00 16. " DATA_3[16] ,Data value read from or written to pin 16" "Low,High" textline " " bitfld.long 0x00 15. " DATA_3[15] ,Data value read from or written to pin 15" "Low,High" bitfld.long 0x00 14. " DATA_3[14] ,Data value read from or written to pin 14" "Low,High" bitfld.long 0x00 13. " DATA_3[13] ,Data value read from or written to pin 13" "Low,High" bitfld.long 0x00 12. " DATA_3[12] ,Data value read from or written to pin 12" "Low,High" textline " " bitfld.long 0x00 11. " DATA_3[11] ,Data value read from or written to pin 11" "Low,High" bitfld.long 0x00 10. " DATA_3[10] ,Data value read from or written to pin 10" "Low,High" bitfld.long 0x00 9. " DATA_3[9] ,Data value read from or written to pin 9" "Low,High" bitfld.long 0x00 8. " DATA_3[8] ,Data value read from or written to pin 8" "Low,High" textline " " bitfld.long 0x00 7. " DATA_3[7] ,Data value read from or written to pin 7" "Low,High" bitfld.long 0x00 6. " DATA_3[6] ,Data value read from or written to pin 6" "Low,High" bitfld.long 0x00 5. " DATA_3[5] ,Data value read from or written to pin 5" "Low,High" bitfld.long 0x00 4. " DATA_3[4] ,Data value read from or written to pin 4" "Low,High" textline " " bitfld.long 0x00 3. " DATA_3[3] ,Data value read from or written to pin 3" "Low,High" bitfld.long 0x00 2. " DATA_3[2] ,Data value read from or written to pin 2" "Low,High" bitfld.long 0x00 1. " DATA_3[1] ,Data value read from or written to pin 1" "Low,High" bitfld.long 0x00 0. " DATA_3[0] ,Data value read from or written to pin 0" "Low,High" rgroup.long 0x6C++0x03 line.long 0x00 "DATA_3_RO,Read Only Pin Value Register" bitfld.long 0x00 31. " DATA_3_RO[31] ,GPIO pin value 31" "Low,High" bitfld.long 0x00 30. " DATA_3_RO[30] ,GPIO pin value 30" "Low,High" bitfld.long 0x00 29. " DATA_3_RO[29] ,GPIO pin value 29" "Low,High" bitfld.long 0x00 28. " DATA_3_RO[28] ,GPIO pin value 28" "Low,High" textline " " bitfld.long 0x00 27. " DATA_3_RO[27] ,GPIO pin value 27" "Low,High" bitfld.long 0x00 26. " DATA_3_RO[26] ,GPIO pin value 26" "Low,High" bitfld.long 0x00 25. " DATA_3_RO[25] ,GPIO pin value 25" "Low,High" bitfld.long 0x00 24. " DATA_3_RO[24] ,GPIO pin value 24" "Low,High" textline " " bitfld.long 0x00 23. " DATA_3_RO[23] ,GPIO pin value 23" "Low,High" bitfld.long 0x00 22. " DATA_3_RO[22] ,GPIO pin value 22" "Low,High" bitfld.long 0x00 21. " DATA_3_RO[21] ,GPIO pin value 21" "Low,High" bitfld.long 0x00 20. " DATA_3_RO[20] ,GPIO pin value 20" "Low,High" textline " " bitfld.long 0x00 19. " DATA_3_RO[19] ,GPIO pin value 19" "Low,High" bitfld.long 0x00 18. " DATA_3_RO[18] ,GPIO pin value 18" "Low,High" bitfld.long 0x00 17. " DATA_3_RO[17] ,GPIO pin value 17" "Low,High" bitfld.long 0x00 16. " DATA_3_RO[16] ,GPIO pin value 16" "Low,High" textline " " bitfld.long 0x00 15. " DATA_3_RO[15] ,GPIO pin value 15" "Low,High" bitfld.long 0x00 14. " DATA_3_RO[14] ,GPIO pin value 14" "Low,High" bitfld.long 0x00 13. " DATA_3_RO[13] ,GPIO pin value 13" "Low,High" bitfld.long 0x00 12. " DATA_3_RO[12] ,GPIO pin value 12" "Low,High" textline " " bitfld.long 0x00 11. " DATA_3_RO[11] ,GPIO pin value 11" "Low,High" bitfld.long 0x00 10. " DATA_3_RO[10] ,GPIO pin value 10" "Low,High" bitfld.long 0x00 9. " DATA_3_RO[9] ,GPIO pin value 9" "Low,High" bitfld.long 0x00 8. " DATA_3_RO[8] ,GPIO pin value 8" "Low,High" textline " " bitfld.long 0x00 7. " DATA_3_RO[7] ,GPIO pin value 7" "Low,High" bitfld.long 0x00 6. " DATA_3_RO[6] ,GPIO pin value 6" "Low,High" bitfld.long 0x00 5. " DATA_3_RO[5] ,GPIO pin value 5" "Low,High" bitfld.long 0x00 4. " DATA_3_RO[4] ,GPIO pin value 4" "Low,High" textline " " bitfld.long 0x00 3. " DATA_3_RO[3] ,GPIO pin value 3" "Low,High" bitfld.long 0x00 2. " DATA_3_RO[2] ,GPIO pin value 2" "Low,High" bitfld.long 0x00 1. " DATA_3_RO[1] ,GPIO pin value 1" "Low,High" bitfld.long 0x00 0. " DATA_3_RO[0] ,GPIO pin value 0" "Low,High" group.long 0x2C4++0x07 line.long 0x00 "DIRM_3,Direction Mode Configuration Register" bitfld.long 0x00 31. " DIRECTION_3[31] ,Direction mode for bank 3 pin 31" "Input,Output" bitfld.long 0x00 30. " DIRECTION_3[30] ,Direction mode for bank 3 pin 30" "Input,Output" bitfld.long 0x00 29. " DIRECTION_3[29] ,Direction mode for bank 3 pin 29" "Input,Output" bitfld.long 0x00 28. " DIRECTION_3[28] ,Direction mode for bank 3 pin 28" "Input,Output" textline " " bitfld.long 0x00 27. " DIRECTION_3[27] ,Direction mode for bank 3 pin 27" "Input,Output" bitfld.long 0x00 26. " DIRECTION_3[26] ,Direction mode for bank 3 pin 26" "Input,Output" bitfld.long 0x00 25. " DIRECTION_3[25] ,Direction mode for bank 3 pin 25" "Input,Output" bitfld.long 0x00 24. " DIRECTION_3[24] ,Direction mode for bank 3 pin 24" "Input,Output" textline " " bitfld.long 0x00 23. " DIRECTION_3[23] ,Direction mode for bank 3 pin 23" "Input,Output" bitfld.long 0x00 22. " DIRECTION_3[22] ,Direction mode for bank 3 pin 22" "Input,Output" bitfld.long 0x00 21. " DIRECTION_3[21] ,Direction mode for bank 3 pin 21" "Input,Output" bitfld.long 0x00 20. " DIRECTION_3[20] ,Direction mode for bank 3 pin 20" "Input,Output" textline " " bitfld.long 0x00 19. " DIRECTION_3[19] ,Direction mode for bank 3 pin 19" "Input,Output" bitfld.long 0x00 18. " DIRECTION_3[18] ,Direction mode for bank 3 pin 18" "Input,Output" bitfld.long 0x00 17. " DIRECTION_3[17] ,Direction mode for bank 3 pin 17" "Input,Output" bitfld.long 0x00 16. " DIRECTION_3[16] ,Direction mode for bank 3 pin 16" "Input,Output" textline " " bitfld.long 0x00 15. " DIRECTION_3[15] ,Direction mode for bank 3 pin 15" "Input,Output" bitfld.long 0x00 14. " DIRECTION_3[14] ,Direction mode for bank 3 pin 14" "Input,Output" bitfld.long 0x00 13. " DIRECTION_3[13] ,Direction mode for bank 3 pin 13" "Input,Output" bitfld.long 0x00 12. " DIRECTION_3[12] ,Direction mode for bank 3 pin 12" "Input,Output" textline " " bitfld.long 0x00 11. " DIRECTION_3[11] ,Direction mode for bank 3 pin 11" "Input,Output" bitfld.long 0x00 10. " DIRECTION_3[10] ,Direction mode for bank 3 pin 10" "Input,Output" bitfld.long 0x00 9. " DIRECTION_3[9] ,Direction mode for bank 3 pin 9" "Input,Output" bitfld.long 0x00 8. " DIRECTION_3[8] ,Direction mode for bank 3 pin 8" "Input,Output" textline " " bitfld.long 0x00 7. " DIRECTION_3[7] ,Direction mode for bank 3 pin 7" "Input,Output" bitfld.long 0x00 6. " DIRECTION_3[6] ,Direction mode for bank 3 pin 6" "Input,Output" bitfld.long 0x00 5. " DIRECTION_3[5] ,Direction mode for bank 3 pin 5" "Input,Output" bitfld.long 0x00 4. " DIRECTION_3[4] ,Direction mode for bank 3 pin 4" "Input,Output" textline " " bitfld.long 0x00 3. " DIRECTION_3[3] ,Direction mode for bank 3 pin 3" "Input,Output" bitfld.long 0x00 2. " DIRECTION_3[2] ,Direction mode for bank 3 pin 2" "Input,Output" bitfld.long 0x00 1. " DIRECTION_3[1] ,Direction mode for bank 3 pin 1" "Input,Output" bitfld.long 0x00 0. " DIRECTION_3[0] ,Direction mode for bank 3 pin 0" "Input,Output" line.long 0x04 "OEN_3,Output Enable Register" bitfld.long 0x04 31. " OP_ENABLE_3[31] ,Output enable for bank 3 pin 31" "Disabled,Enabled" bitfld.long 0x04 30. " OP_ENABLE_3[30] ,Output enable for bank 3 pin 30" "Disabled,Enabled" bitfld.long 0x04 29. " OP_ENABLE_3[29] ,Output enable for bank 3 pin 29" "Disabled,Enabled" bitfld.long 0x04 28. " OP_ENABLE_3[28] ,Output enable for bank 3 pin 28" "Disabled,Enabled" textline " " bitfld.long 0x04 27. " OP_ENABLE_3[27] ,Output enable for bank 3 pin 27" "Disabled,Enabled" bitfld.long 0x04 26. " OP_ENABLE_3[26] ,Output enable for bank 3 pin 26" "Disabled,Enabled" bitfld.long 0x04 25. " OP_ENABLE_3[25] ,Output enable for bank 3 pin 25" "Disabled,Enabled" bitfld.long 0x04 24. " OP_ENABLE_3[24] ,Output enable for bank 3 pin 24" "Disabled,Enabled" textline " " bitfld.long 0x04 23. " OP_ENABLE_3[23] ,Output enable for bank 3 pin 23" "Disabled,Enabled" bitfld.long 0x04 22. " OP_ENABLE_3[22] ,Output enable for bank 3 pin 22" "Disabled,Enabled" bitfld.long 0x04 21. " OP_ENABLE_3[21] ,Output enable for bank 3 pin 21" "Disabled,Enabled" bitfld.long 0x04 20. " OP_ENABLE_3[20] ,Output enable for bank 3 pin 20" "Disabled,Enabled" textline " " bitfld.long 0x04 19. " OP_ENABLE_3[19] ,Output enable for bank 3 pin 19" "Disabled,Enabled" bitfld.long 0x04 18. " OP_ENABLE_3[18] ,Output enable for bank 3 pin 18" "Disabled,Enabled" bitfld.long 0x04 17. " OP_ENABLE_3[17] ,Output enable for bank 3 pin 17" "Disabled,Enabled" bitfld.long 0x04 16. " OP_ENABLE_3[16] ,Output enable for bank 3 pin 16" "Disabled,Enabled" textline " " bitfld.long 0x04 15. " OP_ENABLE_3[15] ,Output enable for bank 3 pin 15" "Disabled,Enabled" bitfld.long 0x04 14. " OP_ENABLE_3[14] ,Output enable for bank 3 pin 14" "Disabled,Enabled" bitfld.long 0x04 13. " OP_ENABLE_3[13] ,Output enable for bank 3 pin 13" "Disabled,Enabled" bitfld.long 0x04 12. " OP_ENABLE_3[12] ,Output enable for bank 3 pin 12" "Disabled,Enabled" textline " " bitfld.long 0x04 11. " OP_ENABLE_3[11] ,Output enable for bank 3 pin 11" "Disabled,Enabled" bitfld.long 0x04 10. " OP_ENABLE_3[10] ,Output enable for bank 3 pin 10" "Disabled,Enabled" bitfld.long 0x04 9. " OP_ENABLE_3[9] ,Output enable for bank 3 pin 9" "Disabled,Enabled" bitfld.long 0x04 8. " OP_ENABLE_3[8] ,Output enable for bank 3 pin 8" "Disabled,Enabled" textline " " bitfld.long 0x04 7. " OP_ENABLE_3[7] ,Output enable for bank 3 pin 7" "Disabled,Enabled" bitfld.long 0x04 6. " OP_ENABLE_3[6] ,Output enable for bank 3 pin 6" "Disabled,Enabled" bitfld.long 0x04 5. " OP_ENABLE_3[5] ,Output enable for bank 3 pin 5" "Disabled,Enabled" bitfld.long 0x04 4. " OP_ENABLE_3[4] ,Output enable for bank 3 pin 4" "Disabled,Enabled" textline " " bitfld.long 0x04 3. " OP_ENABLE_3[3] ,Output enable for bank 3 pin 3" "Disabled,Enabled" bitfld.long 0x04 2. " OP_ENABLE_3[2] ,Output enable for bank 3 pin 2" "Disabled,Enabled" bitfld.long 0x04 1. " OP_ENABLE_3[1] ,Output enable for bank 3 pin 1" "Disabled,Enabled" bitfld.long 0x04 0. " OP_ENABLE_3[0] ,Output enable for bank 3 pin 0" "Disabled,Enabled" group.long (0x2C4+0x08)++0x03 line.long 0x00 "INT_MASK_3_SET/CLR,Interrupt Mask Status Register" setclrfld.long 0x00 31. 0x08 31. 0x04 31. " INT_MASK_3[31] ,Interrupt mask for bank 3 pin 31" "Not masked,Masked" setclrfld.long 0x00 30. 0x08 30. 0x04 30. " INT_MASK_3[30] ,Interrupt mask for bank 3 pin 30" "Not masked,Masked" setclrfld.long 0x00 29. 0x08 29. 0x04 29. " INT_MASK_3[29] ,Interrupt mask for bank 3 pin 29" "Not masked,Masked" setclrfld.long 0x00 28. 0x08 28. 0x04 28. " INT_MASK_3[28] ,Interrupt mask for bank 3 pin 28" "Not masked,Masked" textline " " setclrfld.long 0x00 27. 0x08 27. 0x04 27. " INT_MASK_3[27] ,Interrupt mask for bank 3 pin 27" "Not masked,Masked" setclrfld.long 0x00 26. 0x08 26. 0x04 26. " INT_MASK_3[26] ,Interrupt mask for bank 3 pin 26" "Not masked,Masked" setclrfld.long 0x00 25. 0x08 25. 0x04 25. " INT_MASK_3[25] ,Interrupt mask for bank 3 pin 25" "Not masked,Masked" setclrfld.long 0x00 24. 0x08 24. 0x04 24. " INT_MASK_3[24] ,Interrupt mask for bank 3 pin 24" "Not masked,Masked" textline " " setclrfld.long 0x00 23. 0x08 23. 0x04 23. " INT_MASK_3[23] ,Interrupt mask for bank 3 pin 23" "Not masked,Masked" setclrfld.long 0x00 22. 0x08 22. 0x04 22. " INT_MASK_3[22] ,Interrupt mask for bank 3 pin 22" "Not masked,Masked" setclrfld.long 0x00 21. 0x08 21. 0x04 21. " INT_MASK_3[21] ,Interrupt mask for bank 3 pin 21" "Not masked,Masked" setclrfld.long 0x00 20. 0x08 20. 0x04 20. " INT_MASK_3[20] ,Interrupt mask for bank 3 pin 20" "Not masked,Masked" textline " " setclrfld.long 0x00 19. 0x08 19. 0x04 19. " INT_MASK_3[19] ,Interrupt mask for bank 3 pin 19" "Not masked,Masked" setclrfld.long 0x00 18. 0x08 18. 0x04 18. " INT_MASK_3[18] ,Interrupt mask for bank 3 pin 18" "Not masked,Masked" setclrfld.long 0x00 17. 0x08 17. 0x04 17. " INT_MASK_3[17] ,Interrupt mask for bank 3 pin 17" "Not masked,Masked" setclrfld.long 0x00 16. 0x08 16. 0x04 16. " INT_MASK_3[16] ,Interrupt mask for bank 3 pin 16" "Not masked,Masked" textline " " setclrfld.long 0x00 15. 0x08 15. 0x04 15. " INT_MASK_3[15] ,Interrupt mask for bank 3 pin 15" "Not masked,Masked" setclrfld.long 0x00 14. 0x08 14. 0x04 14. " INT_MASK_3[14] ,Interrupt mask for bank 3 pin 14" "Not masked,Masked" setclrfld.long 0x00 13. 0x08 13. 0x04 13. " INT_MASK_3[13] ,Interrupt mask for bank 3 pin 13" "Not masked,Masked" setclrfld.long 0x00 12. 0x08 12. 0x04 12. " INT_MASK_3[12] ,Interrupt mask for bank 3 pin 12" "Not masked,Masked" textline " " setclrfld.long 0x00 11. 0x08 11. 0x04 11. " INT_MASK_3[11] ,Interrupt mask for bank 3 pin 11" "Not masked,Masked" setclrfld.long 0x00 10. 0x08 10. 0x04 10. " INT_MASK_3[10] ,Interrupt mask for bank 3 pin 10" "Not masked,Masked" setclrfld.long 0x00 9. 0x08 9. 0x04 9. " INT_MASK_3[9] ,Interrupt mask for bank 3 pin 9" "Not masked,Masked" setclrfld.long 0x00 8. 0x08 8. 0x04 8. " INT_MASK_3[8] ,Interrupt mask for bank 3 pin 8" "Not masked,Masked" textline " " setclrfld.long 0x00 7. 0x08 7. 0x04 7. " INT_MASK_3[7] ,Interrupt mask for bank 3 pin 7" "Not masked,Masked" setclrfld.long 0x00 6. 0x08 6. 0x04 6. " INT_MASK_3[6] ,Interrupt mask for bank 3 pin 6" "Not masked,Masked" setclrfld.long 0x00 5. 0x08 5. 0x04 5. " INT_MASK_3[5] ,Interrupt mask for bank 3 pin 5" "Not masked,Masked" setclrfld.long 0x00 4. 0x08 4. 0x04 4. " INT_MASK_3[4] ,Interrupt mask for bank 3 pin 4" "Not masked,Masked" textline " " setclrfld.long 0x00 3. 0x08 3. 0x04 3. " INT_MASK_3[3] ,Interrupt mask for bank 3 pin 3" "Not masked,Masked" setclrfld.long 0x00 2. 0x08 2. 0x04 2. " INT_MASK_3[2] ,Interrupt mask for bank 3 pin 2" "Not masked,Masked" setclrfld.long 0x00 1. 0x08 1. 0x04 1. " INT_MASK_3[1] ,Interrupt mask for bank 3 pin 1" "Not masked,Masked" setclrfld.long 0x00 0. 0x08 0. 0x04 0. " INT_MASK_3[0] ,Interrupt mask for bank 3 pin 0" "Not masked,Masked" group.long (0x2C4+0x14)++0x0F line.long 0x00 "INT_STAT_3,Interrupt Status Register" eventfld.long 0x00 31. " INT_STATUS_3[31] ,Interrupt status for bank 3 pin 31" "No interrupt,Interrupt" eventfld.long 0x00 30. " INT_STATUS_3[30] ,Interrupt status for bank 3 pin 30" "No interrupt,Interrupt" eventfld.long 0x00 29. " INT_STATUS_3[29] ,Interrupt status for bank 3 pin 29" "No interrupt,Interrupt" eventfld.long 0x00 28. " INT_STATUS_3[28] ,Interrupt status for bank 3 pin 28" "No interrupt,Interrupt" textline " " eventfld.long 0x00 27. " INT_STATUS_3[27] ,Interrupt status for bank 3 pin 27" "No interrupt,Interrupt" eventfld.long 0x00 26. " INT_STATUS_3[26] ,Interrupt status for bank 3 pin 26" "No interrupt,Interrupt" eventfld.long 0x00 25. " INT_STATUS_3[25] ,Interrupt status for bank 3 pin 25" "No interrupt,Interrupt" eventfld.long 0x00 24. " INT_STATUS_3[24] ,Interrupt status for bank 3 pin 24" "No interrupt,Interrupt" textline " " eventfld.long 0x00 23. " INT_STATUS_3[23] ,Interrupt status for bank 3 pin 23" "No interrupt,Interrupt" eventfld.long 0x00 22. " INT_STATUS_3[22] ,Interrupt status for bank 3 pin 22" "No interrupt,Interrupt" eventfld.long 0x00 21. " INT_STATUS_3[21] ,Interrupt status for bank 3 pin 21" "No interrupt,Interrupt" eventfld.long 0x00 20. " INT_STATUS_3[20] ,Interrupt status for bank 3 pin 20" "No interrupt,Interrupt" textline " " eventfld.long 0x00 19. " INT_STATUS_3[19] ,Interrupt status for bank 3 pin 19" "No interrupt,Interrupt" eventfld.long 0x00 18. " INT_STATUS_3[18] ,Interrupt status for bank 3 pin 18" "No interrupt,Interrupt" eventfld.long 0x00 17. " INT_STATUS_3[17] ,Interrupt status for bank 3 pin 17" "No interrupt,Interrupt" eventfld.long 0x00 16. " INT_STATUS_3[16] ,Interrupt status for bank 3 pin 16" "No interrupt,Interrupt" textline " " eventfld.long 0x00 15. " INT_STATUS_3[15] ,Interrupt status for bank 3 pin 15" "No interrupt,Interrupt" eventfld.long 0x00 14. " INT_STATUS_3[14] ,Interrupt status for bank 3 pin 14" "No interrupt,Interrupt" eventfld.long 0x00 13. " INT_STATUS_3[13] ,Interrupt status for bank 3 pin 13" "No interrupt,Interrupt" eventfld.long 0x00 12. " INT_STATUS_3[12] ,Interrupt status for bank 3 pin 12" "No interrupt,Interrupt" textline " " eventfld.long 0x00 11. " INT_STATUS_3[11] ,Interrupt status for bank 3 pin 11" "No interrupt,Interrupt" eventfld.long 0x00 10. " INT_STATUS_3[10] ,Interrupt status for bank 3 pin 10" "No interrupt,Interrupt" eventfld.long 0x00 9. " INT_STATUS_3[9] ,Interrupt status for bank 3 pin 9" "No interrupt,Interrupt" eventfld.long 0x00 8. " INT_STATUS_3[8] ,Interrupt status for bank 3 pin 8" "No interrupt,Interrupt" textline " " eventfld.long 0x00 7. " INT_STATUS_3[7] ,Interrupt status for bank 3 pin 7" "No interrupt,Interrupt" eventfld.long 0x00 6. " INT_STATUS_3[6] ,Interrupt status for bank 3 pin 6" "No interrupt,Interrupt" eventfld.long 0x00 5. " INT_STATUS_3[5] ,Interrupt status for bank 3 pin 5" "No interrupt,Interrupt" eventfld.long 0x00 4. " INT_STATUS_3[4] ,Interrupt status for bank 3 pin 4" "No interrupt,Interrupt" textline " " eventfld.long 0x00 3. " INT_STATUS_3[3] ,Interrupt status for bank 3 pin 3" "No interrupt,Interrupt" eventfld.long 0x00 2. " INT_STATUS_3[2] ,Interrupt status for bank 3 pin 2" "No interrupt,Interrupt" eventfld.long 0x00 1. " INT_STATUS_3[1] ,Interrupt status for bank 3 pin 1" "No interrupt,Interrupt" eventfld.long 0x00 0. " INT_STATUS_3[0] ,Interrupt status for bank 3 pin 0" "No interrupt,Interrupt" line.long 0x04 "INT_TYPE_3,Interrupt Type Configuration Register" bitfld.long 0x04 31. " INT_TYPE_3[31] ,Interrupt type for bank 3 pin 31" "Level,Edge" bitfld.long 0x04 30. " INT_TYPE_3[30] ,Interrupt type for bank 3 pin 30" "Level,Edge" bitfld.long 0x04 29. " INT_TYPE_3[29] ,Interrupt type for bank 3 pin 29" "Level,Edge" bitfld.long 0x04 28. " INT_TYPE_3[28] ,Interrupt type for bank 3 pin 28" "Level,Edge" textline " " bitfld.long 0x04 27. " INT_TYPE_3[27] ,Interrupt type for bank 3 pin 27" "Level,Edge" bitfld.long 0x04 26. " INT_TYPE_3[26] ,Interrupt type for bank 3 pin 26" "Level,Edge" bitfld.long 0x04 25. " INT_TYPE_3[25] ,Interrupt type for bank 3 pin 25" "Level,Edge" bitfld.long 0x04 24. " INT_TYPE_3[24] ,Interrupt type for bank 3 pin 24" "Level,Edge" textline " " bitfld.long 0x04 23. " INT_TYPE_3[23] ,Interrupt type for bank 3 pin 23" "Level,Edge" bitfld.long 0x04 22. " INT_TYPE_3[22] ,Interrupt type for bank 3 pin 22" "Level,Edge" bitfld.long 0x04 21. " INT_TYPE_3[21] ,Interrupt type for bank 3 pin 21" "Level,Edge" bitfld.long 0x04 20. " INT_TYPE_3[20] ,Interrupt type for bank 3 pin 20" "Level,Edge" textline " " bitfld.long 0x04 19. " INT_TYPE_3[19] ,Interrupt type for bank 3 pin 19" "Level,Edge" bitfld.long 0x04 18. " INT_TYPE_3[18] ,Interrupt type for bank 3 pin 18" "Level,Edge" bitfld.long 0x04 17. " INT_TYPE_3[17] ,Interrupt type for bank 3 pin 17" "Level,Edge" bitfld.long 0x04 16. " INT_TYPE_3[16] ,Interrupt type for bank 3 pin 16" "Level,Edge" textline " " bitfld.long 0x04 15. " INT_TYPE_3[15] ,Interrupt type for bank 3 pin 15" "Level,Edge" bitfld.long 0x04 14. " INT_TYPE_3[14] ,Interrupt type for bank 3 pin 14" "Level,Edge" bitfld.long 0x04 13. " INT_TYPE_3[13] ,Interrupt type for bank 3 pin 13" "Level,Edge" bitfld.long 0x04 12. " INT_TYPE_3[12] ,Interrupt type for bank 3 pin 12" "Level,Edge" textline " " bitfld.long 0x04 11. " INT_TYPE_3[11] ,Interrupt type for bank 3 pin 11" "Level,Edge" bitfld.long 0x04 10. " INT_TYPE_3[10] ,Interrupt type for bank 3 pin 10" "Level,Edge" bitfld.long 0x04 9. " INT_TYPE_3[9] ,Interrupt type for bank 3 pin 9" "Level,Edge" bitfld.long 0x04 8. " INT_TYPE_3[8] ,Interrupt type for bank 3 pin 8" "Level,Edge" textline " " bitfld.long 0x04 7. " INT_TYPE_3[7] ,Interrupt type for bank 3 pin 7" "Level,Edge" bitfld.long 0x04 6. " INT_TYPE_3[6] ,Interrupt type for bank 3 pin 6" "Level,Edge" bitfld.long 0x04 5. " INT_TYPE_3[5] ,Interrupt type for bank 3 pin 5" "Level,Edge" bitfld.long 0x04 4. " INT_TYPE_3[4] ,Interrupt type for bank 3 pin 4" "Level,Edge" textline " " bitfld.long 0x04 3. " INT_TYPE_3[3] ,Interrupt type for bank 3 pin 3" "Level,Edge" bitfld.long 0x04 2. " INT_TYPE_3[2] ,Interrupt type for bank 3 pin 2" "Level,Edge" bitfld.long 0x04 1. " INT_TYPE_3[1] ,Interrupt type for bank 3 pin 1" "Level,Edge" bitfld.long 0x04 0. " INT_TYPE_3[0] ,Interrupt type for bank 3 pin 0" "Level,Edge" line.long 0x08 "INT_POLARITY_3,Interrupt Polarity Configuration Register" bitfld.long 0x08 31. " INT_POL_3[31] ,Interrupt polarity for bank 3 pin 31" "Low,High" bitfld.long 0x08 30. " INT_POL_3[30] ,Interrupt polarity for bank 3 pin 30" "Low,High" bitfld.long 0x08 29. " INT_POL_3[29] ,Interrupt polarity for bank 3 pin 29" "Low,High" bitfld.long 0x08 28. " INT_POL_3[28] ,Interrupt polarity for bank 3 pin 28" "Low,High" textline " " bitfld.long 0x08 27. " INT_POL_3[27] ,Interrupt polarity for bank 3 pin 27" "Low,High" bitfld.long 0x08 26. " INT_POL_3[26] ,Interrupt polarity for bank 3 pin 26" "Low,High" bitfld.long 0x08 25. " INT_POL_3[25] ,Interrupt polarity for bank 3 pin 25" "Low,High" bitfld.long 0x08 24. " INT_POL_3[24] ,Interrupt polarity for bank 3 pin 24" "Low,High" textline " " bitfld.long 0x08 23. " INT_POL_3[23] ,Interrupt polarity for bank 3 pin 23" "Low,High" bitfld.long 0x08 22. " INT_POL_3[22] ,Interrupt polarity for bank 3 pin 22" "Low,High" bitfld.long 0x08 21. " INT_POL_3[21] ,Interrupt polarity for bank 3 pin 21" "Low,High" bitfld.long 0x08 20. " INT_POL_3[20] ,Interrupt polarity for bank 3 pin 20" "Low,High" textline " " bitfld.long 0x08 19. " INT_POL_3[19] ,Interrupt polarity for bank 3 pin 19" "Low,High" bitfld.long 0x08 18. " INT_POL_3[18] ,Interrupt polarity for bank 3 pin 18" "Low,High" bitfld.long 0x08 17. " INT_POL_3[17] ,Interrupt polarity for bank 3 pin 17" "Low,High" bitfld.long 0x08 16. " INT_POL_3[16] ,Interrupt polarity for bank 3 pin 16" "Low,High" textline " " bitfld.long 0x08 15. " INT_POL_3[15] ,Interrupt polarity for bank 3 pin 15" "Low,High" bitfld.long 0x08 14. " INT_POL_3[14] ,Interrupt polarity for bank 3 pin 14" "Low,High" bitfld.long 0x08 13. " INT_POL_3[13] ,Interrupt polarity for bank 3 pin 13" "Low,High" bitfld.long 0x08 12. " INT_POL_3[12] ,Interrupt polarity for bank 3 pin 12" "Low,High" textline " " bitfld.long 0x08 11. " INT_POL_3[11] ,Interrupt polarity for bank 3 pin 11" "Low,High" bitfld.long 0x08 10. " INT_POL_3[10] ,Interrupt polarity for bank 3 pin 10" "Low,High" bitfld.long 0x08 9. " INT_POL_3[9] ,Interrupt polarity for bank 3 pin 9" "Low,High" bitfld.long 0x08 8. " INT_POL_3[8] ,Interrupt polarity for bank 3 pin 8" "Low,High" textline " " bitfld.long 0x08 7. " INT_POL_3[7] ,Interrupt polarity for bank 3 pin 7" "Low,High" bitfld.long 0x08 6. " INT_POL_3[6] ,Interrupt polarity for bank 3 pin 6" "Low,High" bitfld.long 0x08 5. " INT_POL_3[5] ,Interrupt polarity for bank 3 pin 5" "Low,High" bitfld.long 0x08 4. " INT_POL_3[4] ,Interrupt polarity for bank 3 pin 4" "Low,High" textline " " bitfld.long 0x08 3. " INT_POL_3[3] ,Interrupt polarity for bank 3 pin 3" "Low,High" bitfld.long 0x08 2. " INT_POL_3[2] ,Interrupt polarity for bank 3 pin 2" "Low,High" bitfld.long 0x08 1. " INT_POL_3[1] ,Interrupt polarity for bank 3 pin 1" "Low,High" bitfld.long 0x08 0. " INT_POL_3[0] ,Interrupt polarity for bank 3 pin 0" "Low,High" line.long 0x0C "INT_ANY_3,Interrupt On Any Configuration Register" bitfld.long 0x0C 31. " INT_ON_ANY_3[31] ,Interrupt edge triggering mode for bank 3 0 pin 31" "Single,Both" bitfld.long 0x0C 30. " INT_ON_ANY_3[30] ,Interrupt edge triggering mode for bank 3 0 pin 30" "Single,Both" bitfld.long 0x0C 29. " INT_ON_ANY_3[29] ,Interrupt edge triggering mode for bank 3 0 pin 29" "Single,Both" bitfld.long 0x0C 28. " INT_ON_ANY_3[28] ,Interrupt edge triggering mode for bank 3 0 pin 28" "Single,Both" textline " " bitfld.long 0x0C 27. " INT_ON_ANY_3[27] ,Interrupt edge triggering mode for bank 3 0 pin 27" "Single,Both" bitfld.long 0x0C 26. " INT_ON_ANY_3[26] ,Interrupt edge triggering mode for bank 3 0 pin 26" "Single,Both" bitfld.long 0x0C 25. " INT_ON_ANY_3[25] ,Interrupt edge triggering mode for bank 3 0 pin 25" "Single,Both" bitfld.long 0x0C 24. " INT_ON_ANY_3[24] ,Interrupt edge triggering mode for bank 3 0 pin 24" "Single,Both" textline " " bitfld.long 0x0C 23. " INT_ON_ANY_3[23] ,Interrupt edge triggering mode for bank 3 0 pin 23" "Single,Both" bitfld.long 0x0C 22. " INT_ON_ANY_3[22] ,Interrupt edge triggering mode for bank 3 0 pin 22" "Single,Both" bitfld.long 0x0C 21. " INT_ON_ANY_3[21] ,Interrupt edge triggering mode for bank 3 0 pin 21" "Single,Both" bitfld.long 0x0C 20. " INT_ON_ANY_3[20] ,Interrupt edge triggering mode for bank 3 0 pin 20" "Single,Both" textline " " bitfld.long 0x0C 19. " INT_ON_ANY_3[19] ,Interrupt edge triggering mode for bank 3 0 pin 19" "Single,Both" bitfld.long 0x0C 18. " INT_ON_ANY_3[18] ,Interrupt edge triggering mode for bank 3 0 pin 18" "Single,Both" bitfld.long 0x0C 17. " INT_ON_ANY_3[17] ,Interrupt edge triggering mode for bank 3 0 pin 17" "Single,Both" bitfld.long 0x0C 16. " INT_ON_ANY_3[16] ,Interrupt edge triggering mode for bank 3 0 pin 16" "Single,Both" textline " " bitfld.long 0x0C 15. " INT_ON_ANY_3[15] ,Interrupt edge triggering mode for bank 3 0 pin 15" "Single,Both" bitfld.long 0x0C 14. " INT_ON_ANY_3[14] ,Interrupt edge triggering mode for bank 3 0 pin 14" "Single,Both" bitfld.long 0x0C 13. " INT_ON_ANY_3[13] ,Interrupt edge triggering mode for bank 3 0 pin 13" "Single,Both" bitfld.long 0x0C 12. " INT_ON_ANY_3[12] ,Interrupt edge triggering mode for bank 3 0 pin 12" "Single,Both" textline " " bitfld.long 0x0C 11. " INT_ON_ANY_3[11] ,Interrupt edge triggering mode for bank 3 0 pin 11" "Single,Both" bitfld.long 0x0C 10. " INT_ON_ANY_3[10] ,Interrupt edge triggering mode for bank 3 0 pin 10" "Single,Both" bitfld.long 0x0C 9. " INT_ON_ANY_3[9] ,Interrupt edge triggering mode for bank 3 0 pin 9" "Single,Both" bitfld.long 0x0C 8. " INT_ON_ANY_3[8] ,Interrupt edge triggering mode for bank 3 0 pin 8" "Single,Both" textline " " bitfld.long 0x0C 7. " INT_ON_ANY_3[7] ,Interrupt edge triggering mode for bank 3 0 pin 7" "Single,Both" bitfld.long 0x0C 6. " INT_ON_ANY_3[6] ,Interrupt edge triggering mode for bank 3 0 pin 6" "Single,Both" bitfld.long 0x0C 5. " INT_ON_ANY_3[5] ,Interrupt edge triggering mode for bank 3 0 pin 5" "Single,Both" bitfld.long 0x0C 4. " INT_ON_ANY_3[4] ,Interrupt edge triggering mode for bank 3 0 pin 4" "Single,Both" textline " " bitfld.long 0x0C 3. " INT_ON_ANY_3[3] ,Interrupt edge triggering mode for bank 3 0 pin 3" "Single,Both" bitfld.long 0x0C 2. " INT_ON_ANY_3[2] ,Interrupt edge triggering mode for bank 3 0 pin 2" "Single,Both" bitfld.long 0x0C 1. " INT_ON_ANY_3[1] ,Interrupt edge triggering mode for bank 3 0 pin 1" "Single,Both" bitfld.long 0x0C 0. " INT_ON_ANY_3[0] ,Interrupt edge triggering mode for bank 3 0 pin 0" "Single,Both" tree.end tree "GPIO Bank 4" group.long 0x20++0x07 line.long 0x00 "MASK_DATA_4_LSW,Maskable single-word-based Data Access Register" bitfld.long 0x00 31. " MASK_4_LSW[15] ,Mask value to be applied on writes to pin 15" "Not masked,Masked" bitfld.long 0x00 30. " MASK_4_LSW[14] ,Mask value to be applied on writes to pin 14" "Not masked,Masked" bitfld.long 0x00 29. " MASK_4_LSW[13] ,Mask value to be applied on writes to pin 13" "Not masked,Masked" bitfld.long 0x00 28. " MASK_4_LSW[12] ,Mask value to be applied on writes to pin 12" "Not masked,Masked" textline " " bitfld.long 0x00 27. " MASK_4_LSW[11] ,Mask value to be applied on writes to pin 11" "Not masked,Masked" bitfld.long 0x00 26. " MASK_4_LSW[10] ,Mask value to be applied on writes to pin 10" "Not masked,Masked" bitfld.long 0x00 25. " MASK_4_LSW[9] ,Mask value to be applied on writes to pin 9" "Not masked,Masked" bitfld.long 0x00 24. " MASK_4_LSW[8] ,Mask value to be applied on writes to pin 8" "Not masked,Masked" textline " " bitfld.long 0x00 23. " MASK_4_LSW[7] ,Mask value to be applied on writes to pin 7" "Not masked,Masked" bitfld.long 0x00 22. " MASK_4_LSW[6] ,Mask value to be applied on writes to pin 6" "Not masked,Masked" bitfld.long 0x00 21. " MASK_4_LSW[5] ,Mask value to be applied on writes to pin 5" "Not masked,Masked" bitfld.long 0x00 20. " MASK_4_LSW[4] ,Mask value to be applied on writes to pin 4" "Not masked,Masked" textline " " bitfld.long 0x00 19. " MASK_4_LSW[3] ,Mask value to be applied on writes to pin 3" "Not masked,Masked" bitfld.long 0x00 18. " MASK_4_LSW[2] ,Mask value to be applied on writes to pin 2" "Not masked,Masked" bitfld.long 0x00 17. " MASK_4_LSW[1] ,Mask value to be applied on writes to pin 1" "Not masked,Masked" bitfld.long 0x00 16. " MASK_4_LSW[0] ,Mask value to be applied on writes to pin 0" "Not masked,Masked" textline " " bitfld.long 0x00 15. " DATA_4_LSW[15] ,Data value read from or written to pin 15" "Low,High" bitfld.long 0x00 14. " DATA_4_LSW[14] ,Data value read from or written to pin 14" "Low,High" bitfld.long 0x00 13. " DATA_4_LSW[13] ,Data value read from or written to pin 13" "Low,High" bitfld.long 0x00 12. " DATA_4_LSW[12] ,Data value read from or written to pin 12" "Low,High" textline " " bitfld.long 0x00 11. " DATA_4_LSW[11] ,Data value read from or written to pin 11" "Low,High" bitfld.long 0x00 10. " DATA_4_LSW[10] ,Data value read from or written to pin 10" "Low,High" bitfld.long 0x00 9. " DATA_4_LSW[9] ,Data value read from or written to pin 9" "Low,High" bitfld.long 0x00 8. " DATA_4_LSW[8] ,Data value read from or written to pin 8" "Low,High" textline " " bitfld.long 0x00 7. " DATA_4_LSW[7] ,Data value read from or written to pin 7" "Low,High" bitfld.long 0x00 6. " DATA_4_LSW[6] ,Data value read from or written to pin 6" "Low,High" bitfld.long 0x00 5. " DATA_4_LSW[5] ,Data value read from or written to pin 5" "Low,High" bitfld.long 0x00 4. " DATA_4_LSW[4] ,Data value read from or written to pin 4" "Low,High" textline " " bitfld.long 0x00 3. " DATA_4_LSW[3] ,Data value read from or written to pin 3" "Low,High" bitfld.long 0x00 2. " DATA_4_LSW[2] ,Data value read from or written to pin 2" "Low,High" bitfld.long 0x00 1. " DATA_4_LSW[1] ,Data value read from or written to pin 1" "Low,High" bitfld.long 0x00 0. " DATA_4_LSW[0] ,Data value read from or written to pin 0" "Low,High" line.long 0x04 "MASK_DATA_4_MSW,Maskable single-word-based Data Access Register" bitfld.long 0x04 31. " MASK_4_MSW[15] ,Mask value to be applied on writes to pin 15" "Not masked,Masked" bitfld.long 0x04 30. " MASK_4_MSW[14] ,Mask value to be applied on writes to pin 14" "Not masked,Masked" bitfld.long 0x04 29. " MASK_4_MSW[13] ,Mask value to be applied on writes to pin 13" "Not masked,Masked" bitfld.long 0x04 28. " MASK_4_MSW[12] ,Mask value to be applied on writes to pin 12" "Not masked,Masked" textline " " bitfld.long 0x04 27. " MASK_4_MSW[11] ,Mask value to be applied on writes to pin 11" "Not masked,Masked" bitfld.long 0x04 26. " MASK_4_MSW[10] ,Mask value to be applied on writes to pin 10" "Not masked,Masked" bitfld.long 0x04 25. " MASK_4_MSW[9] ,Mask value to be applied on writes to pin 9" "Not masked,Masked" bitfld.long 0x04 24. " MASK_4_MSW[8] ,Mask value to be applied on writes to pin 8" "Not masked,Masked" textline " " bitfld.long 0x04 23. " MASK_4_MSW[7] ,Mask value to be applied on writes to pin 7" "Not masked,Masked" bitfld.long 0x04 22. " MASK_4_MSW[6] ,Mask value to be applied on writes to pin 6" "Not masked,Masked" bitfld.long 0x04 21. " MASK_4_MSW[5] ,Mask value to be applied on writes to pin 5" "Not masked,Masked" bitfld.long 0x04 20. " MASK_4_MSW[4] ,Mask value to be applied on writes to pin 4" "Not masked,Masked" textline " " bitfld.long 0x04 19. " MASK_4_MSW[3] ,Mask value to be applied on writes to pin 3" "Not masked,Masked" bitfld.long 0x04 18. " MASK_4_MSW[2] ,Mask value to be applied on writes to pin 2" "Not masked,Masked" bitfld.long 0x04 17. " MASK_4_MSW[1] ,Mask value to be applied on writes to pin 1" "Not masked,Masked" bitfld.long 0x04 16. " MASK_4_MSW[0] ,Mask value to be applied on writes to pin 0" "Not masked,Masked" textline " " bitfld.long 0x04 15. " DATA_4_MSW[15] ,Data value read from or written to pin 15" "Low,High" bitfld.long 0x04 14. " DATA_4_MSW[14] ,Data value read from or written to pin 14" "Low,High" bitfld.long 0x04 13. " DATA_4_MSW[13] ,Data value read from or written to pin 13" "Low,High" bitfld.long 0x04 12. " DATA_4_MSW[12] ,Data value read from or written to pin 12" "Low,High" textline " " bitfld.long 0x04 11. " DATA_4_MSW[11] ,Data value read from or written to pin 11" "Low,High" bitfld.long 0x04 10. " DATA_4_MSW[10] ,Data value read from or written to pin 10" "Low,High" bitfld.long 0x04 9. " DATA_4_MSW[9] ,Data value read from or written to pin 9" "Low,High" bitfld.long 0x04 8. " DATA_4_MSW[8] ,Data value read from or written to pin 8" "Low,High" textline " " bitfld.long 0x04 7. " DATA_4_MSW[7] ,Data value read from or written to pin 7" "Low,High" bitfld.long 0x04 6. " DATA_4_MSW[6] ,Data value read from or written to pin 6" "Low,High" bitfld.long 0x04 5. " DATA_4_MSW[5] ,Data value read from or written to pin 5" "Low,High" bitfld.long 0x04 4. " DATA_4_MSW[4] ,Data value read from or written to pin 4" "Low,High" textline " " bitfld.long 0x04 3. " DATA_4_MSW[3] ,Data value read from or written to pin 3" "Low,High" bitfld.long 0x04 2. " DATA_4_MSW[2] ,Data value read from or written to pin 2" "Low,High" bitfld.long 0x04 1. " DATA_4_MSW[1] ,Data value read from or written to pin 1" "Low,High" bitfld.long 0x04 0. " DATA_4_MSW[0] ,Data value read from or written to pin 0" "Low,High" group.long 0x50++0x03 line.long 0x00 "DATA_4,Unmasked double-word-based Data Access Register" bitfld.long 0x00 31. " DATA_4[31] ,Data value read from or written to pin 31" "Low,High" bitfld.long 0x00 30. " DATA_4[30] ,Data value read from or written to pin 30" "Low,High" bitfld.long 0x00 29. " DATA_4[29] ,Data value read from or written to pin 29" "Low,High" bitfld.long 0x00 28. " DATA_4[28] ,Data value read from or written to pin 28" "Low,High" textline " " bitfld.long 0x00 27. " DATA_4[27] ,Data value read from or written to pin 27" "Low,High" bitfld.long 0x00 26. " DATA_4[26] ,Data value read from or written to pin 26" "Low,High" bitfld.long 0x00 25. " DATA_4[25] ,Data value read from or written to pin 25" "Low,High" bitfld.long 0x00 24. " DATA_4[24] ,Data value read from or written to pin 24" "Low,High" textline " " bitfld.long 0x00 23. " DATA_4[23] ,Data value read from or written to pin 23" "Low,High" bitfld.long 0x00 22. " DATA_4[22] ,Data value read from or written to pin 22" "Low,High" bitfld.long 0x00 21. " DATA_4[21] ,Data value read from or written to pin 21" "Low,High" bitfld.long 0x00 20. " DATA_4[20] ,Data value read from or written to pin 20" "Low,High" textline " " bitfld.long 0x00 19. " DATA_4[19] ,Data value read from or written to pin 19" "Low,High" bitfld.long 0x00 18. " DATA_4[18] ,Data value read from or written to pin 18" "Low,High" bitfld.long 0x00 17. " DATA_4[17] ,Data value read from or written to pin 17" "Low,High" bitfld.long 0x00 16. " DATA_4[16] ,Data value read from or written to pin 16" "Low,High" textline " " bitfld.long 0x00 15. " DATA_4[15] ,Data value read from or written to pin 15" "Low,High" bitfld.long 0x00 14. " DATA_4[14] ,Data value read from or written to pin 14" "Low,High" bitfld.long 0x00 13. " DATA_4[13] ,Data value read from or written to pin 13" "Low,High" bitfld.long 0x00 12. " DATA_4[12] ,Data value read from or written to pin 12" "Low,High" textline " " bitfld.long 0x00 11. " DATA_4[11] ,Data value read from or written to pin 11" "Low,High" bitfld.long 0x00 10. " DATA_4[10] ,Data value read from or written to pin 10" "Low,High" bitfld.long 0x00 9. " DATA_4[9] ,Data value read from or written to pin 9" "Low,High" bitfld.long 0x00 8. " DATA_4[8] ,Data value read from or written to pin 8" "Low,High" textline " " bitfld.long 0x00 7. " DATA_4[7] ,Data value read from or written to pin 7" "Low,High" bitfld.long 0x00 6. " DATA_4[6] ,Data value read from or written to pin 6" "Low,High" bitfld.long 0x00 5. " DATA_4[5] ,Data value read from or written to pin 5" "Low,High" bitfld.long 0x00 4. " DATA_4[4] ,Data value read from or written to pin 4" "Low,High" textline " " bitfld.long 0x00 3. " DATA_4[3] ,Data value read from or written to pin 3" "Low,High" bitfld.long 0x00 2. " DATA_4[2] ,Data value read from or written to pin 2" "Low,High" bitfld.long 0x00 1. " DATA_4[1] ,Data value read from or written to pin 1" "Low,High" bitfld.long 0x00 0. " DATA_4[0] ,Data value read from or written to pin 0" "Low,High" rgroup.long 0x70++0x03 line.long 0x00 "DATA_4_RO,Read Only Pin Value Register" bitfld.long 0x00 31. " DATA_4_RO[31] ,GPIO pin value 31" "Low,High" bitfld.long 0x00 30. " DATA_4_RO[30] ,GPIO pin value 30" "Low,High" bitfld.long 0x00 29. " DATA_4_RO[29] ,GPIO pin value 29" "Low,High" bitfld.long 0x00 28. " DATA_4_RO[28] ,GPIO pin value 28" "Low,High" textline " " bitfld.long 0x00 27. " DATA_4_RO[27] ,GPIO pin value 27" "Low,High" bitfld.long 0x00 26. " DATA_4_RO[26] ,GPIO pin value 26" "Low,High" bitfld.long 0x00 25. " DATA_4_RO[25] ,GPIO pin value 25" "Low,High" bitfld.long 0x00 24. " DATA_4_RO[24] ,GPIO pin value 24" "Low,High" textline " " bitfld.long 0x00 23. " DATA_4_RO[23] ,GPIO pin value 23" "Low,High" bitfld.long 0x00 22. " DATA_4_RO[22] ,GPIO pin value 22" "Low,High" bitfld.long 0x00 21. " DATA_4_RO[21] ,GPIO pin value 21" "Low,High" bitfld.long 0x00 20. " DATA_4_RO[20] ,GPIO pin value 20" "Low,High" textline " " bitfld.long 0x00 19. " DATA_4_RO[19] ,GPIO pin value 19" "Low,High" bitfld.long 0x00 18. " DATA_4_RO[18] ,GPIO pin value 18" "Low,High" bitfld.long 0x00 17. " DATA_4_RO[17] ,GPIO pin value 17" "Low,High" bitfld.long 0x00 16. " DATA_4_RO[16] ,GPIO pin value 16" "Low,High" textline " " bitfld.long 0x00 15. " DATA_4_RO[15] ,GPIO pin value 15" "Low,High" bitfld.long 0x00 14. " DATA_4_RO[14] ,GPIO pin value 14" "Low,High" bitfld.long 0x00 13. " DATA_4_RO[13] ,GPIO pin value 13" "Low,High" bitfld.long 0x00 12. " DATA_4_RO[12] ,GPIO pin value 12" "Low,High" textline " " bitfld.long 0x00 11. " DATA_4_RO[11] ,GPIO pin value 11" "Low,High" bitfld.long 0x00 10. " DATA_4_RO[10] ,GPIO pin value 10" "Low,High" bitfld.long 0x00 9. " DATA_4_RO[9] ,GPIO pin value 9" "Low,High" bitfld.long 0x00 8. " DATA_4_RO[8] ,GPIO pin value 8" "Low,High" textline " " bitfld.long 0x00 7. " DATA_4_RO[7] ,GPIO pin value 7" "Low,High" bitfld.long 0x00 6. " DATA_4_RO[6] ,GPIO pin value 6" "Low,High" bitfld.long 0x00 5. " DATA_4_RO[5] ,GPIO pin value 5" "Low,High" bitfld.long 0x00 4. " DATA_4_RO[4] ,GPIO pin value 4" "Low,High" textline " " bitfld.long 0x00 3. " DATA_4_RO[3] ,GPIO pin value 3" "Low,High" bitfld.long 0x00 2. " DATA_4_RO[2] ,GPIO pin value 2" "Low,High" bitfld.long 0x00 1. " DATA_4_RO[1] ,GPIO pin value 1" "Low,High" bitfld.long 0x00 0. " DATA_4_RO[0] ,GPIO pin value 0" "Low,High" group.long 0x304++0x07 line.long 0x00 "DIRM_4,Direction Mode Configuration Register" bitfld.long 0x00 31. " DIRECTION_4[31] ,Direction mode for bank 4 pin 31" "Input,Output" bitfld.long 0x00 30. " DIRECTION_4[30] ,Direction mode for bank 4 pin 30" "Input,Output" bitfld.long 0x00 29. " DIRECTION_4[29] ,Direction mode for bank 4 pin 29" "Input,Output" bitfld.long 0x00 28. " DIRECTION_4[28] ,Direction mode for bank 4 pin 28" "Input,Output" textline " " bitfld.long 0x00 27. " DIRECTION_4[27] ,Direction mode for bank 4 pin 27" "Input,Output" bitfld.long 0x00 26. " DIRECTION_4[26] ,Direction mode for bank 4 pin 26" "Input,Output" bitfld.long 0x00 25. " DIRECTION_4[25] ,Direction mode for bank 4 pin 25" "Input,Output" bitfld.long 0x00 24. " DIRECTION_4[24] ,Direction mode for bank 4 pin 24" "Input,Output" textline " " bitfld.long 0x00 23. " DIRECTION_4[23] ,Direction mode for bank 4 pin 23" "Input,Output" bitfld.long 0x00 22. " DIRECTION_4[22] ,Direction mode for bank 4 pin 22" "Input,Output" bitfld.long 0x00 21. " DIRECTION_4[21] ,Direction mode for bank 4 pin 21" "Input,Output" bitfld.long 0x00 20. " DIRECTION_4[20] ,Direction mode for bank 4 pin 20" "Input,Output" textline " " bitfld.long 0x00 19. " DIRECTION_4[19] ,Direction mode for bank 4 pin 19" "Input,Output" bitfld.long 0x00 18. " DIRECTION_4[18] ,Direction mode for bank 4 pin 18" "Input,Output" bitfld.long 0x00 17. " DIRECTION_4[17] ,Direction mode for bank 4 pin 17" "Input,Output" bitfld.long 0x00 16. " DIRECTION_4[16] ,Direction mode for bank 4 pin 16" "Input,Output" textline " " bitfld.long 0x00 15. " DIRECTION_4[15] ,Direction mode for bank 4 pin 15" "Input,Output" bitfld.long 0x00 14. " DIRECTION_4[14] ,Direction mode for bank 4 pin 14" "Input,Output" bitfld.long 0x00 13. " DIRECTION_4[13] ,Direction mode for bank 4 pin 13" "Input,Output" bitfld.long 0x00 12. " DIRECTION_4[12] ,Direction mode for bank 4 pin 12" "Input,Output" textline " " bitfld.long 0x00 11. " DIRECTION_4[11] ,Direction mode for bank 4 pin 11" "Input,Output" bitfld.long 0x00 10. " DIRECTION_4[10] ,Direction mode for bank 4 pin 10" "Input,Output" bitfld.long 0x00 9. " DIRECTION_4[9] ,Direction mode for bank 4 pin 9" "Input,Output" bitfld.long 0x00 8. " DIRECTION_4[8] ,Direction mode for bank 4 pin 8" "Input,Output" textline " " bitfld.long 0x00 7. " DIRECTION_4[7] ,Direction mode for bank 4 pin 7" "Input,Output" bitfld.long 0x00 6. " DIRECTION_4[6] ,Direction mode for bank 4 pin 6" "Input,Output" bitfld.long 0x00 5. " DIRECTION_4[5] ,Direction mode for bank 4 pin 5" "Input,Output" bitfld.long 0x00 4. " DIRECTION_4[4] ,Direction mode for bank 4 pin 4" "Input,Output" textline " " bitfld.long 0x00 3. " DIRECTION_4[3] ,Direction mode for bank 4 pin 3" "Input,Output" bitfld.long 0x00 2. " DIRECTION_4[2] ,Direction mode for bank 4 pin 2" "Input,Output" bitfld.long 0x00 1. " DIRECTION_4[1] ,Direction mode for bank 4 pin 1" "Input,Output" bitfld.long 0x00 0. " DIRECTION_4[0] ,Direction mode for bank 4 pin 0" "Input,Output" line.long 0x04 "OEN_4,Output Enable Register" bitfld.long 0x04 31. " OP_ENABLE_4[31] ,Output enable for bank 4 pin 31" "Disabled,Enabled" bitfld.long 0x04 30. " OP_ENABLE_4[30] ,Output enable for bank 4 pin 30" "Disabled,Enabled" bitfld.long 0x04 29. " OP_ENABLE_4[29] ,Output enable for bank 4 pin 29" "Disabled,Enabled" bitfld.long 0x04 28. " OP_ENABLE_4[28] ,Output enable for bank 4 pin 28" "Disabled,Enabled" textline " " bitfld.long 0x04 27. " OP_ENABLE_4[27] ,Output enable for bank 4 pin 27" "Disabled,Enabled" bitfld.long 0x04 26. " OP_ENABLE_4[26] ,Output enable for bank 4 pin 26" "Disabled,Enabled" bitfld.long 0x04 25. " OP_ENABLE_4[25] ,Output enable for bank 4 pin 25" "Disabled,Enabled" bitfld.long 0x04 24. " OP_ENABLE_4[24] ,Output enable for bank 4 pin 24" "Disabled,Enabled" textline " " bitfld.long 0x04 23. " OP_ENABLE_4[23] ,Output enable for bank 4 pin 23" "Disabled,Enabled" bitfld.long 0x04 22. " OP_ENABLE_4[22] ,Output enable for bank 4 pin 22" "Disabled,Enabled" bitfld.long 0x04 21. " OP_ENABLE_4[21] ,Output enable for bank 4 pin 21" "Disabled,Enabled" bitfld.long 0x04 20. " OP_ENABLE_4[20] ,Output enable for bank 4 pin 20" "Disabled,Enabled" textline " " bitfld.long 0x04 19. " OP_ENABLE_4[19] ,Output enable for bank 4 pin 19" "Disabled,Enabled" bitfld.long 0x04 18. " OP_ENABLE_4[18] ,Output enable for bank 4 pin 18" "Disabled,Enabled" bitfld.long 0x04 17. " OP_ENABLE_4[17] ,Output enable for bank 4 pin 17" "Disabled,Enabled" bitfld.long 0x04 16. " OP_ENABLE_4[16] ,Output enable for bank 4 pin 16" "Disabled,Enabled" textline " " bitfld.long 0x04 15. " OP_ENABLE_4[15] ,Output enable for bank 4 pin 15" "Disabled,Enabled" bitfld.long 0x04 14. " OP_ENABLE_4[14] ,Output enable for bank 4 pin 14" "Disabled,Enabled" bitfld.long 0x04 13. " OP_ENABLE_4[13] ,Output enable for bank 4 pin 13" "Disabled,Enabled" bitfld.long 0x04 12. " OP_ENABLE_4[12] ,Output enable for bank 4 pin 12" "Disabled,Enabled" textline " " bitfld.long 0x04 11. " OP_ENABLE_4[11] ,Output enable for bank 4 pin 11" "Disabled,Enabled" bitfld.long 0x04 10. " OP_ENABLE_4[10] ,Output enable for bank 4 pin 10" "Disabled,Enabled" bitfld.long 0x04 9. " OP_ENABLE_4[9] ,Output enable for bank 4 pin 9" "Disabled,Enabled" bitfld.long 0x04 8. " OP_ENABLE_4[8] ,Output enable for bank 4 pin 8" "Disabled,Enabled" textline " " bitfld.long 0x04 7. " OP_ENABLE_4[7] ,Output enable for bank 4 pin 7" "Disabled,Enabled" bitfld.long 0x04 6. " OP_ENABLE_4[6] ,Output enable for bank 4 pin 6" "Disabled,Enabled" bitfld.long 0x04 5. " OP_ENABLE_4[5] ,Output enable for bank 4 pin 5" "Disabled,Enabled" bitfld.long 0x04 4. " OP_ENABLE_4[4] ,Output enable for bank 4 pin 4" "Disabled,Enabled" textline " " bitfld.long 0x04 3. " OP_ENABLE_4[3] ,Output enable for bank 4 pin 3" "Disabled,Enabled" bitfld.long 0x04 2. " OP_ENABLE_4[2] ,Output enable for bank 4 pin 2" "Disabled,Enabled" bitfld.long 0x04 1. " OP_ENABLE_4[1] ,Output enable for bank 4 pin 1" "Disabled,Enabled" bitfld.long 0x04 0. " OP_ENABLE_4[0] ,Output enable for bank 4 pin 0" "Disabled,Enabled" group.long (0x304+0x08)++0x03 line.long 0x00 "INT_MASK_4_SET/CLR,Interrupt Mask Status Register" setclrfld.long 0x00 31. 0x08 31. 0x04 31. " INT_MASK_4[31] ,Interrupt mask for bank 4 pin 31" "Not masked,Masked" setclrfld.long 0x00 30. 0x08 30. 0x04 30. " INT_MASK_4[30] ,Interrupt mask for bank 4 pin 30" "Not masked,Masked" setclrfld.long 0x00 29. 0x08 29. 0x04 29. " INT_MASK_4[29] ,Interrupt mask for bank 4 pin 29" "Not masked,Masked" setclrfld.long 0x00 28. 0x08 28. 0x04 28. " INT_MASK_4[28] ,Interrupt mask for bank 4 pin 28" "Not masked,Masked" textline " " setclrfld.long 0x00 27. 0x08 27. 0x04 27. " INT_MASK_4[27] ,Interrupt mask for bank 4 pin 27" "Not masked,Masked" setclrfld.long 0x00 26. 0x08 26. 0x04 26. " INT_MASK_4[26] ,Interrupt mask for bank 4 pin 26" "Not masked,Masked" setclrfld.long 0x00 25. 0x08 25. 0x04 25. " INT_MASK_4[25] ,Interrupt mask for bank 4 pin 25" "Not masked,Masked" setclrfld.long 0x00 24. 0x08 24. 0x04 24. " INT_MASK_4[24] ,Interrupt mask for bank 4 pin 24" "Not masked,Masked" textline " " setclrfld.long 0x00 23. 0x08 23. 0x04 23. " INT_MASK_4[23] ,Interrupt mask for bank 4 pin 23" "Not masked,Masked" setclrfld.long 0x00 22. 0x08 22. 0x04 22. " INT_MASK_4[22] ,Interrupt mask for bank 4 pin 22" "Not masked,Masked" setclrfld.long 0x00 21. 0x08 21. 0x04 21. " INT_MASK_4[21] ,Interrupt mask for bank 4 pin 21" "Not masked,Masked" setclrfld.long 0x00 20. 0x08 20. 0x04 20. " INT_MASK_4[20] ,Interrupt mask for bank 4 pin 20" "Not masked,Masked" textline " " setclrfld.long 0x00 19. 0x08 19. 0x04 19. " INT_MASK_4[19] ,Interrupt mask for bank 4 pin 19" "Not masked,Masked" setclrfld.long 0x00 18. 0x08 18. 0x04 18. " INT_MASK_4[18] ,Interrupt mask for bank 4 pin 18" "Not masked,Masked" setclrfld.long 0x00 17. 0x08 17. 0x04 17. " INT_MASK_4[17] ,Interrupt mask for bank 4 pin 17" "Not masked,Masked" setclrfld.long 0x00 16. 0x08 16. 0x04 16. " INT_MASK_4[16] ,Interrupt mask for bank 4 pin 16" "Not masked,Masked" textline " " setclrfld.long 0x00 15. 0x08 15. 0x04 15. " INT_MASK_4[15] ,Interrupt mask for bank 4 pin 15" "Not masked,Masked" setclrfld.long 0x00 14. 0x08 14. 0x04 14. " INT_MASK_4[14] ,Interrupt mask for bank 4 pin 14" "Not masked,Masked" setclrfld.long 0x00 13. 0x08 13. 0x04 13. " INT_MASK_4[13] ,Interrupt mask for bank 4 pin 13" "Not masked,Masked" setclrfld.long 0x00 12. 0x08 12. 0x04 12. " INT_MASK_4[12] ,Interrupt mask for bank 4 pin 12" "Not masked,Masked" textline " " setclrfld.long 0x00 11. 0x08 11. 0x04 11. " INT_MASK_4[11] ,Interrupt mask for bank 4 pin 11" "Not masked,Masked" setclrfld.long 0x00 10. 0x08 10. 0x04 10. " INT_MASK_4[10] ,Interrupt mask for bank 4 pin 10" "Not masked,Masked" setclrfld.long 0x00 9. 0x08 9. 0x04 9. " INT_MASK_4[9] ,Interrupt mask for bank 4 pin 9" "Not masked,Masked" setclrfld.long 0x00 8. 0x08 8. 0x04 8. " INT_MASK_4[8] ,Interrupt mask for bank 4 pin 8" "Not masked,Masked" textline " " setclrfld.long 0x00 7. 0x08 7. 0x04 7. " INT_MASK_4[7] ,Interrupt mask for bank 4 pin 7" "Not masked,Masked" setclrfld.long 0x00 6. 0x08 6. 0x04 6. " INT_MASK_4[6] ,Interrupt mask for bank 4 pin 6" "Not masked,Masked" setclrfld.long 0x00 5. 0x08 5. 0x04 5. " INT_MASK_4[5] ,Interrupt mask for bank 4 pin 5" "Not masked,Masked" setclrfld.long 0x00 4. 0x08 4. 0x04 4. " INT_MASK_4[4] ,Interrupt mask for bank 4 pin 4" "Not masked,Masked" textline " " setclrfld.long 0x00 3. 0x08 3. 0x04 3. " INT_MASK_4[3] ,Interrupt mask for bank 4 pin 3" "Not masked,Masked" setclrfld.long 0x00 2. 0x08 2. 0x04 2. " INT_MASK_4[2] ,Interrupt mask for bank 4 pin 2" "Not masked,Masked" setclrfld.long 0x00 1. 0x08 1. 0x04 1. " INT_MASK_4[1] ,Interrupt mask for bank 4 pin 1" "Not masked,Masked" setclrfld.long 0x00 0. 0x08 0. 0x04 0. " INT_MASK_4[0] ,Interrupt mask for bank 4 pin 0" "Not masked,Masked" group.long (0x304+0x14)++0x0F line.long 0x00 "INT_STAT_4,Interrupt Status Register" eventfld.long 0x00 31. " INT_STATUS_4[31] ,Interrupt status for bank 4 pin 31" "No interrupt,Interrupt" eventfld.long 0x00 30. " INT_STATUS_4[30] ,Interrupt status for bank 4 pin 30" "No interrupt,Interrupt" eventfld.long 0x00 29. " INT_STATUS_4[29] ,Interrupt status for bank 4 pin 29" "No interrupt,Interrupt" eventfld.long 0x00 28. " INT_STATUS_4[28] ,Interrupt status for bank 4 pin 28" "No interrupt,Interrupt" textline " " eventfld.long 0x00 27. " INT_STATUS_4[27] ,Interrupt status for bank 4 pin 27" "No interrupt,Interrupt" eventfld.long 0x00 26. " INT_STATUS_4[26] ,Interrupt status for bank 4 pin 26" "No interrupt,Interrupt" eventfld.long 0x00 25. " INT_STATUS_4[25] ,Interrupt status for bank 4 pin 25" "No interrupt,Interrupt" eventfld.long 0x00 24. " INT_STATUS_4[24] ,Interrupt status for bank 4 pin 24" "No interrupt,Interrupt" textline " " eventfld.long 0x00 23. " INT_STATUS_4[23] ,Interrupt status for bank 4 pin 23" "No interrupt,Interrupt" eventfld.long 0x00 22. " INT_STATUS_4[22] ,Interrupt status for bank 4 pin 22" "No interrupt,Interrupt" eventfld.long 0x00 21. " INT_STATUS_4[21] ,Interrupt status for bank 4 pin 21" "No interrupt,Interrupt" eventfld.long 0x00 20. " INT_STATUS_4[20] ,Interrupt status for bank 4 pin 20" "No interrupt,Interrupt" textline " " eventfld.long 0x00 19. " INT_STATUS_4[19] ,Interrupt status for bank 4 pin 19" "No interrupt,Interrupt" eventfld.long 0x00 18. " INT_STATUS_4[18] ,Interrupt status for bank 4 pin 18" "No interrupt,Interrupt" eventfld.long 0x00 17. " INT_STATUS_4[17] ,Interrupt status for bank 4 pin 17" "No interrupt,Interrupt" eventfld.long 0x00 16. " INT_STATUS_4[16] ,Interrupt status for bank 4 pin 16" "No interrupt,Interrupt" textline " " eventfld.long 0x00 15. " INT_STATUS_4[15] ,Interrupt status for bank 4 pin 15" "No interrupt,Interrupt" eventfld.long 0x00 14. " INT_STATUS_4[14] ,Interrupt status for bank 4 pin 14" "No interrupt,Interrupt" eventfld.long 0x00 13. " INT_STATUS_4[13] ,Interrupt status for bank 4 pin 13" "No interrupt,Interrupt" eventfld.long 0x00 12. " INT_STATUS_4[12] ,Interrupt status for bank 4 pin 12" "No interrupt,Interrupt" textline " " eventfld.long 0x00 11. " INT_STATUS_4[11] ,Interrupt status for bank 4 pin 11" "No interrupt,Interrupt" eventfld.long 0x00 10. " INT_STATUS_4[10] ,Interrupt status for bank 4 pin 10" "No interrupt,Interrupt" eventfld.long 0x00 9. " INT_STATUS_4[9] ,Interrupt status for bank 4 pin 9" "No interrupt,Interrupt" eventfld.long 0x00 8. " INT_STATUS_4[8] ,Interrupt status for bank 4 pin 8" "No interrupt,Interrupt" textline " " eventfld.long 0x00 7. " INT_STATUS_4[7] ,Interrupt status for bank 4 pin 7" "No interrupt,Interrupt" eventfld.long 0x00 6. " INT_STATUS_4[6] ,Interrupt status for bank 4 pin 6" "No interrupt,Interrupt" eventfld.long 0x00 5. " INT_STATUS_4[5] ,Interrupt status for bank 4 pin 5" "No interrupt,Interrupt" eventfld.long 0x00 4. " INT_STATUS_4[4] ,Interrupt status for bank 4 pin 4" "No interrupt,Interrupt" textline " " eventfld.long 0x00 3. " INT_STATUS_4[3] ,Interrupt status for bank 4 pin 3" "No interrupt,Interrupt" eventfld.long 0x00 2. " INT_STATUS_4[2] ,Interrupt status for bank 4 pin 2" "No interrupt,Interrupt" eventfld.long 0x00 1. " INT_STATUS_4[1] ,Interrupt status for bank 4 pin 1" "No interrupt,Interrupt" eventfld.long 0x00 0. " INT_STATUS_4[0] ,Interrupt status for bank 4 pin 0" "No interrupt,Interrupt" line.long 0x04 "INT_TYPE_4,Interrupt Type Configuration Register" bitfld.long 0x04 31. " INT_TYPE_4[31] ,Interrupt type for bank 4 pin 31" "Level,Edge" bitfld.long 0x04 30. " INT_TYPE_4[30] ,Interrupt type for bank 4 pin 30" "Level,Edge" bitfld.long 0x04 29. " INT_TYPE_4[29] ,Interrupt type for bank 4 pin 29" "Level,Edge" bitfld.long 0x04 28. " INT_TYPE_4[28] ,Interrupt type for bank 4 pin 28" "Level,Edge" textline " " bitfld.long 0x04 27. " INT_TYPE_4[27] ,Interrupt type for bank 4 pin 27" "Level,Edge" bitfld.long 0x04 26. " INT_TYPE_4[26] ,Interrupt type for bank 4 pin 26" "Level,Edge" bitfld.long 0x04 25. " INT_TYPE_4[25] ,Interrupt type for bank 4 pin 25" "Level,Edge" bitfld.long 0x04 24. " INT_TYPE_4[24] ,Interrupt type for bank 4 pin 24" "Level,Edge" textline " " bitfld.long 0x04 23. " INT_TYPE_4[23] ,Interrupt type for bank 4 pin 23" "Level,Edge" bitfld.long 0x04 22. " INT_TYPE_4[22] ,Interrupt type for bank 4 pin 22" "Level,Edge" bitfld.long 0x04 21. " INT_TYPE_4[21] ,Interrupt type for bank 4 pin 21" "Level,Edge" bitfld.long 0x04 20. " INT_TYPE_4[20] ,Interrupt type for bank 4 pin 20" "Level,Edge" textline " " bitfld.long 0x04 19. " INT_TYPE_4[19] ,Interrupt type for bank 4 pin 19" "Level,Edge" bitfld.long 0x04 18. " INT_TYPE_4[18] ,Interrupt type for bank 4 pin 18" "Level,Edge" bitfld.long 0x04 17. " INT_TYPE_4[17] ,Interrupt type for bank 4 pin 17" "Level,Edge" bitfld.long 0x04 16. " INT_TYPE_4[16] ,Interrupt type for bank 4 pin 16" "Level,Edge" textline " " bitfld.long 0x04 15. " INT_TYPE_4[15] ,Interrupt type for bank 4 pin 15" "Level,Edge" bitfld.long 0x04 14. " INT_TYPE_4[14] ,Interrupt type for bank 4 pin 14" "Level,Edge" bitfld.long 0x04 13. " INT_TYPE_4[13] ,Interrupt type for bank 4 pin 13" "Level,Edge" bitfld.long 0x04 12. " INT_TYPE_4[12] ,Interrupt type for bank 4 pin 12" "Level,Edge" textline " " bitfld.long 0x04 11. " INT_TYPE_4[11] ,Interrupt type for bank 4 pin 11" "Level,Edge" bitfld.long 0x04 10. " INT_TYPE_4[10] ,Interrupt type for bank 4 pin 10" "Level,Edge" bitfld.long 0x04 9. " INT_TYPE_4[9] ,Interrupt type for bank 4 pin 9" "Level,Edge" bitfld.long 0x04 8. " INT_TYPE_4[8] ,Interrupt type for bank 4 pin 8" "Level,Edge" textline " " bitfld.long 0x04 7. " INT_TYPE_4[7] ,Interrupt type for bank 4 pin 7" "Level,Edge" bitfld.long 0x04 6. " INT_TYPE_4[6] ,Interrupt type for bank 4 pin 6" "Level,Edge" bitfld.long 0x04 5. " INT_TYPE_4[5] ,Interrupt type for bank 4 pin 5" "Level,Edge" bitfld.long 0x04 4. " INT_TYPE_4[4] ,Interrupt type for bank 4 pin 4" "Level,Edge" textline " " bitfld.long 0x04 3. " INT_TYPE_4[3] ,Interrupt type for bank 4 pin 3" "Level,Edge" bitfld.long 0x04 2. " INT_TYPE_4[2] ,Interrupt type for bank 4 pin 2" "Level,Edge" bitfld.long 0x04 1. " INT_TYPE_4[1] ,Interrupt type for bank 4 pin 1" "Level,Edge" bitfld.long 0x04 0. " INT_TYPE_4[0] ,Interrupt type for bank 4 pin 0" "Level,Edge" line.long 0x08 "INT_POLARITY_4,Interrupt Polarity Configuration Register" bitfld.long 0x08 31. " INT_POL_4[31] ,Interrupt polarity for bank 4 pin 31" "Low,High" bitfld.long 0x08 30. " INT_POL_4[30] ,Interrupt polarity for bank 4 pin 30" "Low,High" bitfld.long 0x08 29. " INT_POL_4[29] ,Interrupt polarity for bank 4 pin 29" "Low,High" bitfld.long 0x08 28. " INT_POL_4[28] ,Interrupt polarity for bank 4 pin 28" "Low,High" textline " " bitfld.long 0x08 27. " INT_POL_4[27] ,Interrupt polarity for bank 4 pin 27" "Low,High" bitfld.long 0x08 26. " INT_POL_4[26] ,Interrupt polarity for bank 4 pin 26" "Low,High" bitfld.long 0x08 25. " INT_POL_4[25] ,Interrupt polarity for bank 4 pin 25" "Low,High" bitfld.long 0x08 24. " INT_POL_4[24] ,Interrupt polarity for bank 4 pin 24" "Low,High" textline " " bitfld.long 0x08 23. " INT_POL_4[23] ,Interrupt polarity for bank 4 pin 23" "Low,High" bitfld.long 0x08 22. " INT_POL_4[22] ,Interrupt polarity for bank 4 pin 22" "Low,High" bitfld.long 0x08 21. " INT_POL_4[21] ,Interrupt polarity for bank 4 pin 21" "Low,High" bitfld.long 0x08 20. " INT_POL_4[20] ,Interrupt polarity for bank 4 pin 20" "Low,High" textline " " bitfld.long 0x08 19. " INT_POL_4[19] ,Interrupt polarity for bank 4 pin 19" "Low,High" bitfld.long 0x08 18. " INT_POL_4[18] ,Interrupt polarity for bank 4 pin 18" "Low,High" bitfld.long 0x08 17. " INT_POL_4[17] ,Interrupt polarity for bank 4 pin 17" "Low,High" bitfld.long 0x08 16. " INT_POL_4[16] ,Interrupt polarity for bank 4 pin 16" "Low,High" textline " " bitfld.long 0x08 15. " INT_POL_4[15] ,Interrupt polarity for bank 4 pin 15" "Low,High" bitfld.long 0x08 14. " INT_POL_4[14] ,Interrupt polarity for bank 4 pin 14" "Low,High" bitfld.long 0x08 13. " INT_POL_4[13] ,Interrupt polarity for bank 4 pin 13" "Low,High" bitfld.long 0x08 12. " INT_POL_4[12] ,Interrupt polarity for bank 4 pin 12" "Low,High" textline " " bitfld.long 0x08 11. " INT_POL_4[11] ,Interrupt polarity for bank 4 pin 11" "Low,High" bitfld.long 0x08 10. " INT_POL_4[10] ,Interrupt polarity for bank 4 pin 10" "Low,High" bitfld.long 0x08 9. " INT_POL_4[9] ,Interrupt polarity for bank 4 pin 9" "Low,High" bitfld.long 0x08 8. " INT_POL_4[8] ,Interrupt polarity for bank 4 pin 8" "Low,High" textline " " bitfld.long 0x08 7. " INT_POL_4[7] ,Interrupt polarity for bank 4 pin 7" "Low,High" bitfld.long 0x08 6. " INT_POL_4[6] ,Interrupt polarity for bank 4 pin 6" "Low,High" bitfld.long 0x08 5. " INT_POL_4[5] ,Interrupt polarity for bank 4 pin 5" "Low,High" bitfld.long 0x08 4. " INT_POL_4[4] ,Interrupt polarity for bank 4 pin 4" "Low,High" textline " " bitfld.long 0x08 3. " INT_POL_4[3] ,Interrupt polarity for bank 4 pin 3" "Low,High" bitfld.long 0x08 2. " INT_POL_4[2] ,Interrupt polarity for bank 4 pin 2" "Low,High" bitfld.long 0x08 1. " INT_POL_4[1] ,Interrupt polarity for bank 4 pin 1" "Low,High" bitfld.long 0x08 0. " INT_POL_4[0] ,Interrupt polarity for bank 4 pin 0" "Low,High" line.long 0x0C "INT_ANY_4,Interrupt On Any Configuration Register" bitfld.long 0x0C 31. " INT_ON_ANY_4[31] ,Interrupt edge triggering mode for bank 4 0 pin 31" "Single,Both" bitfld.long 0x0C 30. " INT_ON_ANY_4[30] ,Interrupt edge triggering mode for bank 4 0 pin 30" "Single,Both" bitfld.long 0x0C 29. " INT_ON_ANY_4[29] ,Interrupt edge triggering mode for bank 4 0 pin 29" "Single,Both" bitfld.long 0x0C 28. " INT_ON_ANY_4[28] ,Interrupt edge triggering mode for bank 4 0 pin 28" "Single,Both" textline " " bitfld.long 0x0C 27. " INT_ON_ANY_4[27] ,Interrupt edge triggering mode for bank 4 0 pin 27" "Single,Both" bitfld.long 0x0C 26. " INT_ON_ANY_4[26] ,Interrupt edge triggering mode for bank 4 0 pin 26" "Single,Both" bitfld.long 0x0C 25. " INT_ON_ANY_4[25] ,Interrupt edge triggering mode for bank 4 0 pin 25" "Single,Both" bitfld.long 0x0C 24. " INT_ON_ANY_4[24] ,Interrupt edge triggering mode for bank 4 0 pin 24" "Single,Both" textline " " bitfld.long 0x0C 23. " INT_ON_ANY_4[23] ,Interrupt edge triggering mode for bank 4 0 pin 23" "Single,Both" bitfld.long 0x0C 22. " INT_ON_ANY_4[22] ,Interrupt edge triggering mode for bank 4 0 pin 22" "Single,Both" bitfld.long 0x0C 21. " INT_ON_ANY_4[21] ,Interrupt edge triggering mode for bank 4 0 pin 21" "Single,Both" bitfld.long 0x0C 20. " INT_ON_ANY_4[20] ,Interrupt edge triggering mode for bank 4 0 pin 20" "Single,Both" textline " " bitfld.long 0x0C 19. " INT_ON_ANY_4[19] ,Interrupt edge triggering mode for bank 4 0 pin 19" "Single,Both" bitfld.long 0x0C 18. " INT_ON_ANY_4[18] ,Interrupt edge triggering mode for bank 4 0 pin 18" "Single,Both" bitfld.long 0x0C 17. " INT_ON_ANY_4[17] ,Interrupt edge triggering mode for bank 4 0 pin 17" "Single,Both" bitfld.long 0x0C 16. " INT_ON_ANY_4[16] ,Interrupt edge triggering mode for bank 4 0 pin 16" "Single,Both" textline " " bitfld.long 0x0C 15. " INT_ON_ANY_4[15] ,Interrupt edge triggering mode for bank 4 0 pin 15" "Single,Both" bitfld.long 0x0C 14. " INT_ON_ANY_4[14] ,Interrupt edge triggering mode for bank 4 0 pin 14" "Single,Both" bitfld.long 0x0C 13. " INT_ON_ANY_4[13] ,Interrupt edge triggering mode for bank 4 0 pin 13" "Single,Both" bitfld.long 0x0C 12. " INT_ON_ANY_4[12] ,Interrupt edge triggering mode for bank 4 0 pin 12" "Single,Both" textline " " bitfld.long 0x0C 11. " INT_ON_ANY_4[11] ,Interrupt edge triggering mode for bank 4 0 pin 11" "Single,Both" bitfld.long 0x0C 10. " INT_ON_ANY_4[10] ,Interrupt edge triggering mode for bank 4 0 pin 10" "Single,Both" bitfld.long 0x0C 9. " INT_ON_ANY_4[9] ,Interrupt edge triggering mode for bank 4 0 pin 9" "Single,Both" bitfld.long 0x0C 8. " INT_ON_ANY_4[8] ,Interrupt edge triggering mode for bank 4 0 pin 8" "Single,Both" textline " " bitfld.long 0x0C 7. " INT_ON_ANY_4[7] ,Interrupt edge triggering mode for bank 4 0 pin 7" "Single,Both" bitfld.long 0x0C 6. " INT_ON_ANY_4[6] ,Interrupt edge triggering mode for bank 4 0 pin 6" "Single,Both" bitfld.long 0x0C 5. " INT_ON_ANY_4[5] ,Interrupt edge triggering mode for bank 4 0 pin 5" "Single,Both" bitfld.long 0x0C 4. " INT_ON_ANY_4[4] ,Interrupt edge triggering mode for bank 4 0 pin 4" "Single,Both" textline " " bitfld.long 0x0C 3. " INT_ON_ANY_4[3] ,Interrupt edge triggering mode for bank 4 0 pin 3" "Single,Both" bitfld.long 0x0C 2. " INT_ON_ANY_4[2] ,Interrupt edge triggering mode for bank 4 0 pin 2" "Single,Both" bitfld.long 0x0C 1. " INT_ON_ANY_4[1] ,Interrupt edge triggering mode for bank 4 0 pin 1" "Single,Both" bitfld.long 0x0C 0. " INT_ON_ANY_4[0] ,Interrupt edge triggering mode for bank 4 0 pin 0" "Single,Both" tree.end tree "GPIO Bank 5" group.long 0x28++0x07 line.long 0x00 "MASK_DATA_5_LSW,Maskable single-word-based Data Access Register" bitfld.long 0x00 31. " MASK_5_LSW[15] ,Mask value to be applied on writes to pin 15" "Not masked,Masked" bitfld.long 0x00 30. " MASK_5_LSW[14] ,Mask value to be applied on writes to pin 14" "Not masked,Masked" bitfld.long 0x00 29. " MASK_5_LSW[13] ,Mask value to be applied on writes to pin 13" "Not masked,Masked" bitfld.long 0x00 28. " MASK_5_LSW[12] ,Mask value to be applied on writes to pin 12" "Not masked,Masked" textline " " bitfld.long 0x00 27. " MASK_5_LSW[11] ,Mask value to be applied on writes to pin 11" "Not masked,Masked" bitfld.long 0x00 26. " MASK_5_LSW[10] ,Mask value to be applied on writes to pin 10" "Not masked,Masked" bitfld.long 0x00 25. " MASK_5_LSW[9] ,Mask value to be applied on writes to pin 9" "Not masked,Masked" bitfld.long 0x00 24. " MASK_5_LSW[8] ,Mask value to be applied on writes to pin 8" "Not masked,Masked" textline " " bitfld.long 0x00 23. " MASK_5_LSW[7] ,Mask value to be applied on writes to pin 7" "Not masked,Masked" bitfld.long 0x00 22. " MASK_5_LSW[6] ,Mask value to be applied on writes to pin 6" "Not masked,Masked" bitfld.long 0x00 21. " MASK_5_LSW[5] ,Mask value to be applied on writes to pin 5" "Not masked,Masked" bitfld.long 0x00 20. " MASK_5_LSW[4] ,Mask value to be applied on writes to pin 4" "Not masked,Masked" textline " " bitfld.long 0x00 19. " MASK_5_LSW[3] ,Mask value to be applied on writes to pin 3" "Not masked,Masked" bitfld.long 0x00 18. " MASK_5_LSW[2] ,Mask value to be applied on writes to pin 2" "Not masked,Masked" bitfld.long 0x00 17. " MASK_5_LSW[1] ,Mask value to be applied on writes to pin 1" "Not masked,Masked" bitfld.long 0x00 16. " MASK_5_LSW[0] ,Mask value to be applied on writes to pin 0" "Not masked,Masked" textline " " bitfld.long 0x00 15. " DATA_5_LSW[15] ,Data value read from or written to pin 15" "Low,High" bitfld.long 0x00 14. " DATA_5_LSW[14] ,Data value read from or written to pin 14" "Low,High" bitfld.long 0x00 13. " DATA_5_LSW[13] ,Data value read from or written to pin 13" "Low,High" bitfld.long 0x00 12. " DATA_5_LSW[12] ,Data value read from or written to pin 12" "Low,High" textline " " bitfld.long 0x00 11. " DATA_5_LSW[11] ,Data value read from or written to pin 11" "Low,High" bitfld.long 0x00 10. " DATA_5_LSW[10] ,Data value read from or written to pin 10" "Low,High" bitfld.long 0x00 9. " DATA_5_LSW[9] ,Data value read from or written to pin 9" "Low,High" bitfld.long 0x00 8. " DATA_5_LSW[8] ,Data value read from or written to pin 8" "Low,High" textline " " bitfld.long 0x00 7. " DATA_5_LSW[7] ,Data value read from or written to pin 7" "Low,High" bitfld.long 0x00 6. " DATA_5_LSW[6] ,Data value read from or written to pin 6" "Low,High" bitfld.long 0x00 5. " DATA_5_LSW[5] ,Data value read from or written to pin 5" "Low,High" bitfld.long 0x00 4. " DATA_5_LSW[4] ,Data value read from or written to pin 4" "Low,High" textline " " bitfld.long 0x00 3. " DATA_5_LSW[3] ,Data value read from or written to pin 3" "Low,High" bitfld.long 0x00 2. " DATA_5_LSW[2] ,Data value read from or written to pin 2" "Low,High" bitfld.long 0x00 1. " DATA_5_LSW[1] ,Data value read from or written to pin 1" "Low,High" bitfld.long 0x00 0. " DATA_5_LSW[0] ,Data value read from or written to pin 0" "Low,High" line.long 0x04 "MASK_DATA_5_MSW,Maskable single-word-based Data Access Register" bitfld.long 0x04 31. " MASK_5_MSW[15] ,Mask value to be applied on writes to pin 15" "Not masked,Masked" bitfld.long 0x04 30. " MASK_5_MSW[14] ,Mask value to be applied on writes to pin 14" "Not masked,Masked" bitfld.long 0x04 29. " MASK_5_MSW[13] ,Mask value to be applied on writes to pin 13" "Not masked,Masked" bitfld.long 0x04 28. " MASK_5_MSW[12] ,Mask value to be applied on writes to pin 12" "Not masked,Masked" textline " " bitfld.long 0x04 27. " MASK_5_MSW[11] ,Mask value to be applied on writes to pin 11" "Not masked,Masked" bitfld.long 0x04 26. " MASK_5_MSW[10] ,Mask value to be applied on writes to pin 10" "Not masked,Masked" bitfld.long 0x04 25. " MASK_5_MSW[9] ,Mask value to be applied on writes to pin 9" "Not masked,Masked" bitfld.long 0x04 24. " MASK_5_MSW[8] ,Mask value to be applied on writes to pin 8" "Not masked,Masked" textline " " bitfld.long 0x04 23. " MASK_5_MSW[7] ,Mask value to be applied on writes to pin 7" "Not masked,Masked" bitfld.long 0x04 22. " MASK_5_MSW[6] ,Mask value to be applied on writes to pin 6" "Not masked,Masked" bitfld.long 0x04 21. " MASK_5_MSW[5] ,Mask value to be applied on writes to pin 5" "Not masked,Masked" bitfld.long 0x04 20. " MASK_5_MSW[4] ,Mask value to be applied on writes to pin 4" "Not masked,Masked" textline " " bitfld.long 0x04 19. " MASK_5_MSW[3] ,Mask value to be applied on writes to pin 3" "Not masked,Masked" bitfld.long 0x04 18. " MASK_5_MSW[2] ,Mask value to be applied on writes to pin 2" "Not masked,Masked" bitfld.long 0x04 17. " MASK_5_MSW[1] ,Mask value to be applied on writes to pin 1" "Not masked,Masked" bitfld.long 0x04 16. " MASK_5_MSW[0] ,Mask value to be applied on writes to pin 0" "Not masked,Masked" textline " " bitfld.long 0x04 15. " DATA_5_MSW[15] ,Data value read from or written to pin 15" "Low,High" bitfld.long 0x04 14. " DATA_5_MSW[14] ,Data value read from or written to pin 14" "Low,High" bitfld.long 0x04 13. " DATA_5_MSW[13] ,Data value read from or written to pin 13" "Low,High" bitfld.long 0x04 12. " DATA_5_MSW[12] ,Data value read from or written to pin 12" "Low,High" textline " " bitfld.long 0x04 11. " DATA_5_MSW[11] ,Data value read from or written to pin 11" "Low,High" bitfld.long 0x04 10. " DATA_5_MSW[10] ,Data value read from or written to pin 10" "Low,High" bitfld.long 0x04 9. " DATA_5_MSW[9] ,Data value read from or written to pin 9" "Low,High" bitfld.long 0x04 8. " DATA_5_MSW[8] ,Data value read from or written to pin 8" "Low,High" textline " " bitfld.long 0x04 7. " DATA_5_MSW[7] ,Data value read from or written to pin 7" "Low,High" bitfld.long 0x04 6. " DATA_5_MSW[6] ,Data value read from or written to pin 6" "Low,High" bitfld.long 0x04 5. " DATA_5_MSW[5] ,Data value read from or written to pin 5" "Low,High" bitfld.long 0x04 4. " DATA_5_MSW[4] ,Data value read from or written to pin 4" "Low,High" textline " " bitfld.long 0x04 3. " DATA_5_MSW[3] ,Data value read from or written to pin 3" "Low,High" bitfld.long 0x04 2. " DATA_5_MSW[2] ,Data value read from or written to pin 2" "Low,High" bitfld.long 0x04 1. " DATA_5_MSW[1] ,Data value read from or written to pin 1" "Low,High" bitfld.long 0x04 0. " DATA_5_MSW[0] ,Data value read from or written to pin 0" "Low,High" group.long 0x54++0x03 line.long 0x00 "DATA_5,Unmasked double-word-based Data Access Register" bitfld.long 0x00 31. " DATA_5[31] ,Data value read from or written to pin 31" "Low,High" bitfld.long 0x00 30. " DATA_5[30] ,Data value read from or written to pin 30" "Low,High" bitfld.long 0x00 29. " DATA_5[29] ,Data value read from or written to pin 29" "Low,High" bitfld.long 0x00 28. " DATA_5[28] ,Data value read from or written to pin 28" "Low,High" textline " " bitfld.long 0x00 27. " DATA_5[27] ,Data value read from or written to pin 27" "Low,High" bitfld.long 0x00 26. " DATA_5[26] ,Data value read from or written to pin 26" "Low,High" bitfld.long 0x00 25. " DATA_5[25] ,Data value read from or written to pin 25" "Low,High" bitfld.long 0x00 24. " DATA_5[24] ,Data value read from or written to pin 24" "Low,High" textline " " bitfld.long 0x00 23. " DATA_5[23] ,Data value read from or written to pin 23" "Low,High" bitfld.long 0x00 22. " DATA_5[22] ,Data value read from or written to pin 22" "Low,High" bitfld.long 0x00 21. " DATA_5[21] ,Data value read from or written to pin 21" "Low,High" bitfld.long 0x00 20. " DATA_5[20] ,Data value read from or written to pin 20" "Low,High" textline " " bitfld.long 0x00 19. " DATA_5[19] ,Data value read from or written to pin 19" "Low,High" bitfld.long 0x00 18. " DATA_5[18] ,Data value read from or written to pin 18" "Low,High" bitfld.long 0x00 17. " DATA_5[17] ,Data value read from or written to pin 17" "Low,High" bitfld.long 0x00 16. " DATA_5[16] ,Data value read from or written to pin 16" "Low,High" textline " " bitfld.long 0x00 15. " DATA_5[15] ,Data value read from or written to pin 15" "Low,High" bitfld.long 0x00 14. " DATA_5[14] ,Data value read from or written to pin 14" "Low,High" bitfld.long 0x00 13. " DATA_5[13] ,Data value read from or written to pin 13" "Low,High" bitfld.long 0x00 12. " DATA_5[12] ,Data value read from or written to pin 12" "Low,High" textline " " bitfld.long 0x00 11. " DATA_5[11] ,Data value read from or written to pin 11" "Low,High" bitfld.long 0x00 10. " DATA_5[10] ,Data value read from or written to pin 10" "Low,High" bitfld.long 0x00 9. " DATA_5[9] ,Data value read from or written to pin 9" "Low,High" bitfld.long 0x00 8. " DATA_5[8] ,Data value read from or written to pin 8" "Low,High" textline " " bitfld.long 0x00 7. " DATA_5[7] ,Data value read from or written to pin 7" "Low,High" bitfld.long 0x00 6. " DATA_5[6] ,Data value read from or written to pin 6" "Low,High" bitfld.long 0x00 5. " DATA_5[5] ,Data value read from or written to pin 5" "Low,High" bitfld.long 0x00 4. " DATA_5[4] ,Data value read from or written to pin 4" "Low,High" textline " " bitfld.long 0x00 3. " DATA_5[3] ,Data value read from or written to pin 3" "Low,High" bitfld.long 0x00 2. " DATA_5[2] ,Data value read from or written to pin 2" "Low,High" bitfld.long 0x00 1. " DATA_5[1] ,Data value read from or written to pin 1" "Low,High" bitfld.long 0x00 0. " DATA_5[0] ,Data value read from or written to pin 0" "Low,High" rgroup.long 0x74++0x03 line.long 0x00 "DATA_5_RO,Read Only Pin Value Register" bitfld.long 0x00 31. " DATA_5_RO[31] ,GPIO pin value 31" "Low,High" bitfld.long 0x00 30. " DATA_5_RO[30] ,GPIO pin value 30" "Low,High" bitfld.long 0x00 29. " DATA_5_RO[29] ,GPIO pin value 29" "Low,High" bitfld.long 0x00 28. " DATA_5_RO[28] ,GPIO pin value 28" "Low,High" textline " " bitfld.long 0x00 27. " DATA_5_RO[27] ,GPIO pin value 27" "Low,High" bitfld.long 0x00 26. " DATA_5_RO[26] ,GPIO pin value 26" "Low,High" bitfld.long 0x00 25. " DATA_5_RO[25] ,GPIO pin value 25" "Low,High" bitfld.long 0x00 24. " DATA_5_RO[24] ,GPIO pin value 24" "Low,High" textline " " bitfld.long 0x00 23. " DATA_5_RO[23] ,GPIO pin value 23" "Low,High" bitfld.long 0x00 22. " DATA_5_RO[22] ,GPIO pin value 22" "Low,High" bitfld.long 0x00 21. " DATA_5_RO[21] ,GPIO pin value 21" "Low,High" bitfld.long 0x00 20. " DATA_5_RO[20] ,GPIO pin value 20" "Low,High" textline " " bitfld.long 0x00 19. " DATA_5_RO[19] ,GPIO pin value 19" "Low,High" bitfld.long 0x00 18. " DATA_5_RO[18] ,GPIO pin value 18" "Low,High" bitfld.long 0x00 17. " DATA_5_RO[17] ,GPIO pin value 17" "Low,High" bitfld.long 0x00 16. " DATA_5_RO[16] ,GPIO pin value 16" "Low,High" textline " " bitfld.long 0x00 15. " DATA_5_RO[15] ,GPIO pin value 15" "Low,High" bitfld.long 0x00 14. " DATA_5_RO[14] ,GPIO pin value 14" "Low,High" bitfld.long 0x00 13. " DATA_5_RO[13] ,GPIO pin value 13" "Low,High" bitfld.long 0x00 12. " DATA_5_RO[12] ,GPIO pin value 12" "Low,High" textline " " bitfld.long 0x00 11. " DATA_5_RO[11] ,GPIO pin value 11" "Low,High" bitfld.long 0x00 10. " DATA_5_RO[10] ,GPIO pin value 10" "Low,High" bitfld.long 0x00 9. " DATA_5_RO[9] ,GPIO pin value 9" "Low,High" bitfld.long 0x00 8. " DATA_5_RO[8] ,GPIO pin value 8" "Low,High" textline " " bitfld.long 0x00 7. " DATA_5_RO[7] ,GPIO pin value 7" "Low,High" bitfld.long 0x00 6. " DATA_5_RO[6] ,GPIO pin value 6" "Low,High" bitfld.long 0x00 5. " DATA_5_RO[5] ,GPIO pin value 5" "Low,High" bitfld.long 0x00 4. " DATA_5_RO[4] ,GPIO pin value 4" "Low,High" textline " " bitfld.long 0x00 3. " DATA_5_RO[3] ,GPIO pin value 3" "Low,High" bitfld.long 0x00 2. " DATA_5_RO[2] ,GPIO pin value 2" "Low,High" bitfld.long 0x00 1. " DATA_5_RO[1] ,GPIO pin value 1" "Low,High" bitfld.long 0x00 0. " DATA_5_RO[0] ,GPIO pin value 0" "Low,High" group.long 0x344++0x07 line.long 0x00 "DIRM_5,Direction Mode Configuration Register" bitfld.long 0x00 31. " DIRECTION_5[31] ,Direction mode for bank 5 pin 31" "Input,Output" bitfld.long 0x00 30. " DIRECTION_5[30] ,Direction mode for bank 5 pin 30" "Input,Output" bitfld.long 0x00 29. " DIRECTION_5[29] ,Direction mode for bank 5 pin 29" "Input,Output" bitfld.long 0x00 28. " DIRECTION_5[28] ,Direction mode for bank 5 pin 28" "Input,Output" textline " " bitfld.long 0x00 27. " DIRECTION_5[27] ,Direction mode for bank 5 pin 27" "Input,Output" bitfld.long 0x00 26. " DIRECTION_5[26] ,Direction mode for bank 5 pin 26" "Input,Output" bitfld.long 0x00 25. " DIRECTION_5[25] ,Direction mode for bank 5 pin 25" "Input,Output" bitfld.long 0x00 24. " DIRECTION_5[24] ,Direction mode for bank 5 pin 24" "Input,Output" textline " " bitfld.long 0x00 23. " DIRECTION_5[23] ,Direction mode for bank 5 pin 23" "Input,Output" bitfld.long 0x00 22. " DIRECTION_5[22] ,Direction mode for bank 5 pin 22" "Input,Output" bitfld.long 0x00 21. " DIRECTION_5[21] ,Direction mode for bank 5 pin 21" "Input,Output" bitfld.long 0x00 20. " DIRECTION_5[20] ,Direction mode for bank 5 pin 20" "Input,Output" textline " " bitfld.long 0x00 19. " DIRECTION_5[19] ,Direction mode for bank 5 pin 19" "Input,Output" bitfld.long 0x00 18. " DIRECTION_5[18] ,Direction mode for bank 5 pin 18" "Input,Output" bitfld.long 0x00 17. " DIRECTION_5[17] ,Direction mode for bank 5 pin 17" "Input,Output" bitfld.long 0x00 16. " DIRECTION_5[16] ,Direction mode for bank 5 pin 16" "Input,Output" textline " " bitfld.long 0x00 15. " DIRECTION_5[15] ,Direction mode for bank 5 pin 15" "Input,Output" bitfld.long 0x00 14. " DIRECTION_5[14] ,Direction mode for bank 5 pin 14" "Input,Output" bitfld.long 0x00 13. " DIRECTION_5[13] ,Direction mode for bank 5 pin 13" "Input,Output" bitfld.long 0x00 12. " DIRECTION_5[12] ,Direction mode for bank 5 pin 12" "Input,Output" textline " " bitfld.long 0x00 11. " DIRECTION_5[11] ,Direction mode for bank 5 pin 11" "Input,Output" bitfld.long 0x00 10. " DIRECTION_5[10] ,Direction mode for bank 5 pin 10" "Input,Output" bitfld.long 0x00 9. " DIRECTION_5[9] ,Direction mode for bank 5 pin 9" "Input,Output" bitfld.long 0x00 8. " DIRECTION_5[8] ,Direction mode for bank 5 pin 8" "Input,Output" textline " " bitfld.long 0x00 7. " DIRECTION_5[7] ,Direction mode for bank 5 pin 7" "Input,Output" bitfld.long 0x00 6. " DIRECTION_5[6] ,Direction mode for bank 5 pin 6" "Input,Output" bitfld.long 0x00 5. " DIRECTION_5[5] ,Direction mode for bank 5 pin 5" "Input,Output" bitfld.long 0x00 4. " DIRECTION_5[4] ,Direction mode for bank 5 pin 4" "Input,Output" textline " " bitfld.long 0x00 3. " DIRECTION_5[3] ,Direction mode for bank 5 pin 3" "Input,Output" bitfld.long 0x00 2. " DIRECTION_5[2] ,Direction mode for bank 5 pin 2" "Input,Output" bitfld.long 0x00 1. " DIRECTION_5[1] ,Direction mode for bank 5 pin 1" "Input,Output" bitfld.long 0x00 0. " DIRECTION_5[0] ,Direction mode for bank 5 pin 0" "Input,Output" line.long 0x04 "OEN_5,Output Enable Register" bitfld.long 0x04 31. " OP_ENABLE_5[31] ,Output enable for bank 5 pin 31" "Disabled,Enabled" bitfld.long 0x04 30. " OP_ENABLE_5[30] ,Output enable for bank 5 pin 30" "Disabled,Enabled" bitfld.long 0x04 29. " OP_ENABLE_5[29] ,Output enable for bank 5 pin 29" "Disabled,Enabled" bitfld.long 0x04 28. " OP_ENABLE_5[28] ,Output enable for bank 5 pin 28" "Disabled,Enabled" textline " " bitfld.long 0x04 27. " OP_ENABLE_5[27] ,Output enable for bank 5 pin 27" "Disabled,Enabled" bitfld.long 0x04 26. " OP_ENABLE_5[26] ,Output enable for bank 5 pin 26" "Disabled,Enabled" bitfld.long 0x04 25. " OP_ENABLE_5[25] ,Output enable for bank 5 pin 25" "Disabled,Enabled" bitfld.long 0x04 24. " OP_ENABLE_5[24] ,Output enable for bank 5 pin 24" "Disabled,Enabled" textline " " bitfld.long 0x04 23. " OP_ENABLE_5[23] ,Output enable for bank 5 pin 23" "Disabled,Enabled" bitfld.long 0x04 22. " OP_ENABLE_5[22] ,Output enable for bank 5 pin 22" "Disabled,Enabled" bitfld.long 0x04 21. " OP_ENABLE_5[21] ,Output enable for bank 5 pin 21" "Disabled,Enabled" bitfld.long 0x04 20. " OP_ENABLE_5[20] ,Output enable for bank 5 pin 20" "Disabled,Enabled" textline " " bitfld.long 0x04 19. " OP_ENABLE_5[19] ,Output enable for bank 5 pin 19" "Disabled,Enabled" bitfld.long 0x04 18. " OP_ENABLE_5[18] ,Output enable for bank 5 pin 18" "Disabled,Enabled" bitfld.long 0x04 17. " OP_ENABLE_5[17] ,Output enable for bank 5 pin 17" "Disabled,Enabled" bitfld.long 0x04 16. " OP_ENABLE_5[16] ,Output enable for bank 5 pin 16" "Disabled,Enabled" textline " " bitfld.long 0x04 15. " OP_ENABLE_5[15] ,Output enable for bank 5 pin 15" "Disabled,Enabled" bitfld.long 0x04 14. " OP_ENABLE_5[14] ,Output enable for bank 5 pin 14" "Disabled,Enabled" bitfld.long 0x04 13. " OP_ENABLE_5[13] ,Output enable for bank 5 pin 13" "Disabled,Enabled" bitfld.long 0x04 12. " OP_ENABLE_5[12] ,Output enable for bank 5 pin 12" "Disabled,Enabled" textline " " bitfld.long 0x04 11. " OP_ENABLE_5[11] ,Output enable for bank 5 pin 11" "Disabled,Enabled" bitfld.long 0x04 10. " OP_ENABLE_5[10] ,Output enable for bank 5 pin 10" "Disabled,Enabled" bitfld.long 0x04 9. " OP_ENABLE_5[9] ,Output enable for bank 5 pin 9" "Disabled,Enabled" bitfld.long 0x04 8. " OP_ENABLE_5[8] ,Output enable for bank 5 pin 8" "Disabled,Enabled" textline " " bitfld.long 0x04 7. " OP_ENABLE_5[7] ,Output enable for bank 5 pin 7" "Disabled,Enabled" bitfld.long 0x04 6. " OP_ENABLE_5[6] ,Output enable for bank 5 pin 6" "Disabled,Enabled" bitfld.long 0x04 5. " OP_ENABLE_5[5] ,Output enable for bank 5 pin 5" "Disabled,Enabled" bitfld.long 0x04 4. " OP_ENABLE_5[4] ,Output enable for bank 5 pin 4" "Disabled,Enabled" textline " " bitfld.long 0x04 3. " OP_ENABLE_5[3] ,Output enable for bank 5 pin 3" "Disabled,Enabled" bitfld.long 0x04 2. " OP_ENABLE_5[2] ,Output enable for bank 5 pin 2" "Disabled,Enabled" bitfld.long 0x04 1. " OP_ENABLE_5[1] ,Output enable for bank 5 pin 1" "Disabled,Enabled" bitfld.long 0x04 0. " OP_ENABLE_5[0] ,Output enable for bank 5 pin 0" "Disabled,Enabled" group.long (0x344+0x08)++0x03 line.long 0x00 "INT_MASK_5_SET/CLR,Interrupt Mask Status Register" setclrfld.long 0x00 31. 0x08 31. 0x04 31. " INT_MASK_5[31] ,Interrupt mask for bank 5 pin 31" "Not masked,Masked" setclrfld.long 0x00 30. 0x08 30. 0x04 30. " INT_MASK_5[30] ,Interrupt mask for bank 5 pin 30" "Not masked,Masked" setclrfld.long 0x00 29. 0x08 29. 0x04 29. " INT_MASK_5[29] ,Interrupt mask for bank 5 pin 29" "Not masked,Masked" setclrfld.long 0x00 28. 0x08 28. 0x04 28. " INT_MASK_5[28] ,Interrupt mask for bank 5 pin 28" "Not masked,Masked" textline " " setclrfld.long 0x00 27. 0x08 27. 0x04 27. " INT_MASK_5[27] ,Interrupt mask for bank 5 pin 27" "Not masked,Masked" setclrfld.long 0x00 26. 0x08 26. 0x04 26. " INT_MASK_5[26] ,Interrupt mask for bank 5 pin 26" "Not masked,Masked" setclrfld.long 0x00 25. 0x08 25. 0x04 25. " INT_MASK_5[25] ,Interrupt mask for bank 5 pin 25" "Not masked,Masked" setclrfld.long 0x00 24. 0x08 24. 0x04 24. " INT_MASK_5[24] ,Interrupt mask for bank 5 pin 24" "Not masked,Masked" textline " " setclrfld.long 0x00 23. 0x08 23. 0x04 23. " INT_MASK_5[23] ,Interrupt mask for bank 5 pin 23" "Not masked,Masked" setclrfld.long 0x00 22. 0x08 22. 0x04 22. " INT_MASK_5[22] ,Interrupt mask for bank 5 pin 22" "Not masked,Masked" setclrfld.long 0x00 21. 0x08 21. 0x04 21. " INT_MASK_5[21] ,Interrupt mask for bank 5 pin 21" "Not masked,Masked" setclrfld.long 0x00 20. 0x08 20. 0x04 20. " INT_MASK_5[20] ,Interrupt mask for bank 5 pin 20" "Not masked,Masked" textline " " setclrfld.long 0x00 19. 0x08 19. 0x04 19. " INT_MASK_5[19] ,Interrupt mask for bank 5 pin 19" "Not masked,Masked" setclrfld.long 0x00 18. 0x08 18. 0x04 18. " INT_MASK_5[18] ,Interrupt mask for bank 5 pin 18" "Not masked,Masked" setclrfld.long 0x00 17. 0x08 17. 0x04 17. " INT_MASK_5[17] ,Interrupt mask for bank 5 pin 17" "Not masked,Masked" setclrfld.long 0x00 16. 0x08 16. 0x04 16. " INT_MASK_5[16] ,Interrupt mask for bank 5 pin 16" "Not masked,Masked" textline " " setclrfld.long 0x00 15. 0x08 15. 0x04 15. " INT_MASK_5[15] ,Interrupt mask for bank 5 pin 15" "Not masked,Masked" setclrfld.long 0x00 14. 0x08 14. 0x04 14. " INT_MASK_5[14] ,Interrupt mask for bank 5 pin 14" "Not masked,Masked" setclrfld.long 0x00 13. 0x08 13. 0x04 13. " INT_MASK_5[13] ,Interrupt mask for bank 5 pin 13" "Not masked,Masked" setclrfld.long 0x00 12. 0x08 12. 0x04 12. " INT_MASK_5[12] ,Interrupt mask for bank 5 pin 12" "Not masked,Masked" textline " " setclrfld.long 0x00 11. 0x08 11. 0x04 11. " INT_MASK_5[11] ,Interrupt mask for bank 5 pin 11" "Not masked,Masked" setclrfld.long 0x00 10. 0x08 10. 0x04 10. " INT_MASK_5[10] ,Interrupt mask for bank 5 pin 10" "Not masked,Masked" setclrfld.long 0x00 9. 0x08 9. 0x04 9. " INT_MASK_5[9] ,Interrupt mask for bank 5 pin 9" "Not masked,Masked" setclrfld.long 0x00 8. 0x08 8. 0x04 8. " INT_MASK_5[8] ,Interrupt mask for bank 5 pin 8" "Not masked,Masked" textline " " setclrfld.long 0x00 7. 0x08 7. 0x04 7. " INT_MASK_5[7] ,Interrupt mask for bank 5 pin 7" "Not masked,Masked" setclrfld.long 0x00 6. 0x08 6. 0x04 6. " INT_MASK_5[6] ,Interrupt mask for bank 5 pin 6" "Not masked,Masked" setclrfld.long 0x00 5. 0x08 5. 0x04 5. " INT_MASK_5[5] ,Interrupt mask for bank 5 pin 5" "Not masked,Masked" setclrfld.long 0x00 4. 0x08 4. 0x04 4. " INT_MASK_5[4] ,Interrupt mask for bank 5 pin 4" "Not masked,Masked" textline " " setclrfld.long 0x00 3. 0x08 3. 0x04 3. " INT_MASK_5[3] ,Interrupt mask for bank 5 pin 3" "Not masked,Masked" setclrfld.long 0x00 2. 0x08 2. 0x04 2. " INT_MASK_5[2] ,Interrupt mask for bank 5 pin 2" "Not masked,Masked" setclrfld.long 0x00 1. 0x08 1. 0x04 1. " INT_MASK_5[1] ,Interrupt mask for bank 5 pin 1" "Not masked,Masked" setclrfld.long 0x00 0. 0x08 0. 0x04 0. " INT_MASK_5[0] ,Interrupt mask for bank 5 pin 0" "Not masked,Masked" group.long (0x344+0x14)++0x0F line.long 0x00 "INT_STAT_5,Interrupt Status Register" eventfld.long 0x00 31. " INT_STATUS_5[31] ,Interrupt status for bank 5 pin 31" "No interrupt,Interrupt" eventfld.long 0x00 30. " INT_STATUS_5[30] ,Interrupt status for bank 5 pin 30" "No interrupt,Interrupt" eventfld.long 0x00 29. " INT_STATUS_5[29] ,Interrupt status for bank 5 pin 29" "No interrupt,Interrupt" eventfld.long 0x00 28. " INT_STATUS_5[28] ,Interrupt status for bank 5 pin 28" "No interrupt,Interrupt" textline " " eventfld.long 0x00 27. " INT_STATUS_5[27] ,Interrupt status for bank 5 pin 27" "No interrupt,Interrupt" eventfld.long 0x00 26. " INT_STATUS_5[26] ,Interrupt status for bank 5 pin 26" "No interrupt,Interrupt" eventfld.long 0x00 25. " INT_STATUS_5[25] ,Interrupt status for bank 5 pin 25" "No interrupt,Interrupt" eventfld.long 0x00 24. " INT_STATUS_5[24] ,Interrupt status for bank 5 pin 24" "No interrupt,Interrupt" textline " " eventfld.long 0x00 23. " INT_STATUS_5[23] ,Interrupt status for bank 5 pin 23" "No interrupt,Interrupt" eventfld.long 0x00 22. " INT_STATUS_5[22] ,Interrupt status for bank 5 pin 22" "No interrupt,Interrupt" eventfld.long 0x00 21. " INT_STATUS_5[21] ,Interrupt status for bank 5 pin 21" "No interrupt,Interrupt" eventfld.long 0x00 20. " INT_STATUS_5[20] ,Interrupt status for bank 5 pin 20" "No interrupt,Interrupt" textline " " eventfld.long 0x00 19. " INT_STATUS_5[19] ,Interrupt status for bank 5 pin 19" "No interrupt,Interrupt" eventfld.long 0x00 18. " INT_STATUS_5[18] ,Interrupt status for bank 5 pin 18" "No interrupt,Interrupt" eventfld.long 0x00 17. " INT_STATUS_5[17] ,Interrupt status for bank 5 pin 17" "No interrupt,Interrupt" eventfld.long 0x00 16. " INT_STATUS_5[16] ,Interrupt status for bank 5 pin 16" "No interrupt,Interrupt" textline " " eventfld.long 0x00 15. " INT_STATUS_5[15] ,Interrupt status for bank 5 pin 15" "No interrupt,Interrupt" eventfld.long 0x00 14. " INT_STATUS_5[14] ,Interrupt status for bank 5 pin 14" "No interrupt,Interrupt" eventfld.long 0x00 13. " INT_STATUS_5[13] ,Interrupt status for bank 5 pin 13" "No interrupt,Interrupt" eventfld.long 0x00 12. " INT_STATUS_5[12] ,Interrupt status for bank 5 pin 12" "No interrupt,Interrupt" textline " " eventfld.long 0x00 11. " INT_STATUS_5[11] ,Interrupt status for bank 5 pin 11" "No interrupt,Interrupt" eventfld.long 0x00 10. " INT_STATUS_5[10] ,Interrupt status for bank 5 pin 10" "No interrupt,Interrupt" eventfld.long 0x00 9. " INT_STATUS_5[9] ,Interrupt status for bank 5 pin 9" "No interrupt,Interrupt" eventfld.long 0x00 8. " INT_STATUS_5[8] ,Interrupt status for bank 5 pin 8" "No interrupt,Interrupt" textline " " eventfld.long 0x00 7. " INT_STATUS_5[7] ,Interrupt status for bank 5 pin 7" "No interrupt,Interrupt" eventfld.long 0x00 6. " INT_STATUS_5[6] ,Interrupt status for bank 5 pin 6" "No interrupt,Interrupt" eventfld.long 0x00 5. " INT_STATUS_5[5] ,Interrupt status for bank 5 pin 5" "No interrupt,Interrupt" eventfld.long 0x00 4. " INT_STATUS_5[4] ,Interrupt status for bank 5 pin 4" "No interrupt,Interrupt" textline " " eventfld.long 0x00 3. " INT_STATUS_5[3] ,Interrupt status for bank 5 pin 3" "No interrupt,Interrupt" eventfld.long 0x00 2. " INT_STATUS_5[2] ,Interrupt status for bank 5 pin 2" "No interrupt,Interrupt" eventfld.long 0x00 1. " INT_STATUS_5[1] ,Interrupt status for bank 5 pin 1" "No interrupt,Interrupt" eventfld.long 0x00 0. " INT_STATUS_5[0] ,Interrupt status for bank 5 pin 0" "No interrupt,Interrupt" line.long 0x04 "INT_TYPE_5,Interrupt Type Configuration Register" bitfld.long 0x04 31. " INT_TYPE_5[31] ,Interrupt type for bank 5 pin 31" "Level,Edge" bitfld.long 0x04 30. " INT_TYPE_5[30] ,Interrupt type for bank 5 pin 30" "Level,Edge" bitfld.long 0x04 29. " INT_TYPE_5[29] ,Interrupt type for bank 5 pin 29" "Level,Edge" bitfld.long 0x04 28. " INT_TYPE_5[28] ,Interrupt type for bank 5 pin 28" "Level,Edge" textline " " bitfld.long 0x04 27. " INT_TYPE_5[27] ,Interrupt type for bank 5 pin 27" "Level,Edge" bitfld.long 0x04 26. " INT_TYPE_5[26] ,Interrupt type for bank 5 pin 26" "Level,Edge" bitfld.long 0x04 25. " INT_TYPE_5[25] ,Interrupt type for bank 5 pin 25" "Level,Edge" bitfld.long 0x04 24. " INT_TYPE_5[24] ,Interrupt type for bank 5 pin 24" "Level,Edge" textline " " bitfld.long 0x04 23. " INT_TYPE_5[23] ,Interrupt type for bank 5 pin 23" "Level,Edge" bitfld.long 0x04 22. " INT_TYPE_5[22] ,Interrupt type for bank 5 pin 22" "Level,Edge" bitfld.long 0x04 21. " INT_TYPE_5[21] ,Interrupt type for bank 5 pin 21" "Level,Edge" bitfld.long 0x04 20. " INT_TYPE_5[20] ,Interrupt type for bank 5 pin 20" "Level,Edge" textline " " bitfld.long 0x04 19. " INT_TYPE_5[19] ,Interrupt type for bank 5 pin 19" "Level,Edge" bitfld.long 0x04 18. " INT_TYPE_5[18] ,Interrupt type for bank 5 pin 18" "Level,Edge" bitfld.long 0x04 17. " INT_TYPE_5[17] ,Interrupt type for bank 5 pin 17" "Level,Edge" bitfld.long 0x04 16. " INT_TYPE_5[16] ,Interrupt type for bank 5 pin 16" "Level,Edge" textline " " bitfld.long 0x04 15. " INT_TYPE_5[15] ,Interrupt type for bank 5 pin 15" "Level,Edge" bitfld.long 0x04 14. " INT_TYPE_5[14] ,Interrupt type for bank 5 pin 14" "Level,Edge" bitfld.long 0x04 13. " INT_TYPE_5[13] ,Interrupt type for bank 5 pin 13" "Level,Edge" bitfld.long 0x04 12. " INT_TYPE_5[12] ,Interrupt type for bank 5 pin 12" "Level,Edge" textline " " bitfld.long 0x04 11. " INT_TYPE_5[11] ,Interrupt type for bank 5 pin 11" "Level,Edge" bitfld.long 0x04 10. " INT_TYPE_5[10] ,Interrupt type for bank 5 pin 10" "Level,Edge" bitfld.long 0x04 9. " INT_TYPE_5[9] ,Interrupt type for bank 5 pin 9" "Level,Edge" bitfld.long 0x04 8. " INT_TYPE_5[8] ,Interrupt type for bank 5 pin 8" "Level,Edge" textline " " bitfld.long 0x04 7. " INT_TYPE_5[7] ,Interrupt type for bank 5 pin 7" "Level,Edge" bitfld.long 0x04 6. " INT_TYPE_5[6] ,Interrupt type for bank 5 pin 6" "Level,Edge" bitfld.long 0x04 5. " INT_TYPE_5[5] ,Interrupt type for bank 5 pin 5" "Level,Edge" bitfld.long 0x04 4. " INT_TYPE_5[4] ,Interrupt type for bank 5 pin 4" "Level,Edge" textline " " bitfld.long 0x04 3. " INT_TYPE_5[3] ,Interrupt type for bank 5 pin 3" "Level,Edge" bitfld.long 0x04 2. " INT_TYPE_5[2] ,Interrupt type for bank 5 pin 2" "Level,Edge" bitfld.long 0x04 1. " INT_TYPE_5[1] ,Interrupt type for bank 5 pin 1" "Level,Edge" bitfld.long 0x04 0. " INT_TYPE_5[0] ,Interrupt type for bank 5 pin 0" "Level,Edge" line.long 0x08 "INT_POLARITY_5,Interrupt Polarity Configuration Register" bitfld.long 0x08 31. " INT_POL_5[31] ,Interrupt polarity for bank 5 pin 31" "Low,High" bitfld.long 0x08 30. " INT_POL_5[30] ,Interrupt polarity for bank 5 pin 30" "Low,High" bitfld.long 0x08 29. " INT_POL_5[29] ,Interrupt polarity for bank 5 pin 29" "Low,High" bitfld.long 0x08 28. " INT_POL_5[28] ,Interrupt polarity for bank 5 pin 28" "Low,High" textline " " bitfld.long 0x08 27. " INT_POL_5[27] ,Interrupt polarity for bank 5 pin 27" "Low,High" bitfld.long 0x08 26. " INT_POL_5[26] ,Interrupt polarity for bank 5 pin 26" "Low,High" bitfld.long 0x08 25. " INT_POL_5[25] ,Interrupt polarity for bank 5 pin 25" "Low,High" bitfld.long 0x08 24. " INT_POL_5[24] ,Interrupt polarity for bank 5 pin 24" "Low,High" textline " " bitfld.long 0x08 23. " INT_POL_5[23] ,Interrupt polarity for bank 5 pin 23" "Low,High" bitfld.long 0x08 22. " INT_POL_5[22] ,Interrupt polarity for bank 5 pin 22" "Low,High" bitfld.long 0x08 21. " INT_POL_5[21] ,Interrupt polarity for bank 5 pin 21" "Low,High" bitfld.long 0x08 20. " INT_POL_5[20] ,Interrupt polarity for bank 5 pin 20" "Low,High" textline " " bitfld.long 0x08 19. " INT_POL_5[19] ,Interrupt polarity for bank 5 pin 19" "Low,High" bitfld.long 0x08 18. " INT_POL_5[18] ,Interrupt polarity for bank 5 pin 18" "Low,High" bitfld.long 0x08 17. " INT_POL_5[17] ,Interrupt polarity for bank 5 pin 17" "Low,High" bitfld.long 0x08 16. " INT_POL_5[16] ,Interrupt polarity for bank 5 pin 16" "Low,High" textline " " bitfld.long 0x08 15. " INT_POL_5[15] ,Interrupt polarity for bank 5 pin 15" "Low,High" bitfld.long 0x08 14. " INT_POL_5[14] ,Interrupt polarity for bank 5 pin 14" "Low,High" bitfld.long 0x08 13. " INT_POL_5[13] ,Interrupt polarity for bank 5 pin 13" "Low,High" bitfld.long 0x08 12. " INT_POL_5[12] ,Interrupt polarity for bank 5 pin 12" "Low,High" textline " " bitfld.long 0x08 11. " INT_POL_5[11] ,Interrupt polarity for bank 5 pin 11" "Low,High" bitfld.long 0x08 10. " INT_POL_5[10] ,Interrupt polarity for bank 5 pin 10" "Low,High" bitfld.long 0x08 9. " INT_POL_5[9] ,Interrupt polarity for bank 5 pin 9" "Low,High" bitfld.long 0x08 8. " INT_POL_5[8] ,Interrupt polarity for bank 5 pin 8" "Low,High" textline " " bitfld.long 0x08 7. " INT_POL_5[7] ,Interrupt polarity for bank 5 pin 7" "Low,High" bitfld.long 0x08 6. " INT_POL_5[6] ,Interrupt polarity for bank 5 pin 6" "Low,High" bitfld.long 0x08 5. " INT_POL_5[5] ,Interrupt polarity for bank 5 pin 5" "Low,High" bitfld.long 0x08 4. " INT_POL_5[4] ,Interrupt polarity for bank 5 pin 4" "Low,High" textline " " bitfld.long 0x08 3. " INT_POL_5[3] ,Interrupt polarity for bank 5 pin 3" "Low,High" bitfld.long 0x08 2. " INT_POL_5[2] ,Interrupt polarity for bank 5 pin 2" "Low,High" bitfld.long 0x08 1. " INT_POL_5[1] ,Interrupt polarity for bank 5 pin 1" "Low,High" bitfld.long 0x08 0. " INT_POL_5[0] ,Interrupt polarity for bank 5 pin 0" "Low,High" line.long 0x0C "INT_ANY_5,Interrupt On Any Configuration Register" bitfld.long 0x0C 31. " INT_ON_ANY_5[31] ,Interrupt edge triggering mode for bank 5 0 pin 31" "Single,Both" bitfld.long 0x0C 30. " INT_ON_ANY_5[30] ,Interrupt edge triggering mode for bank 5 0 pin 30" "Single,Both" bitfld.long 0x0C 29. " INT_ON_ANY_5[29] ,Interrupt edge triggering mode for bank 5 0 pin 29" "Single,Both" bitfld.long 0x0C 28. " INT_ON_ANY_5[28] ,Interrupt edge triggering mode for bank 5 0 pin 28" "Single,Both" textline " " bitfld.long 0x0C 27. " INT_ON_ANY_5[27] ,Interrupt edge triggering mode for bank 5 0 pin 27" "Single,Both" bitfld.long 0x0C 26. " INT_ON_ANY_5[26] ,Interrupt edge triggering mode for bank 5 0 pin 26" "Single,Both" bitfld.long 0x0C 25. " INT_ON_ANY_5[25] ,Interrupt edge triggering mode for bank 5 0 pin 25" "Single,Both" bitfld.long 0x0C 24. " INT_ON_ANY_5[24] ,Interrupt edge triggering mode for bank 5 0 pin 24" "Single,Both" textline " " bitfld.long 0x0C 23. " INT_ON_ANY_5[23] ,Interrupt edge triggering mode for bank 5 0 pin 23" "Single,Both" bitfld.long 0x0C 22. " INT_ON_ANY_5[22] ,Interrupt edge triggering mode for bank 5 0 pin 22" "Single,Both" bitfld.long 0x0C 21. " INT_ON_ANY_5[21] ,Interrupt edge triggering mode for bank 5 0 pin 21" "Single,Both" bitfld.long 0x0C 20. " INT_ON_ANY_5[20] ,Interrupt edge triggering mode for bank 5 0 pin 20" "Single,Both" textline " " bitfld.long 0x0C 19. " INT_ON_ANY_5[19] ,Interrupt edge triggering mode for bank 5 0 pin 19" "Single,Both" bitfld.long 0x0C 18. " INT_ON_ANY_5[18] ,Interrupt edge triggering mode for bank 5 0 pin 18" "Single,Both" bitfld.long 0x0C 17. " INT_ON_ANY_5[17] ,Interrupt edge triggering mode for bank 5 0 pin 17" "Single,Both" bitfld.long 0x0C 16. " INT_ON_ANY_5[16] ,Interrupt edge triggering mode for bank 5 0 pin 16" "Single,Both" textline " " bitfld.long 0x0C 15. " INT_ON_ANY_5[15] ,Interrupt edge triggering mode for bank 5 0 pin 15" "Single,Both" bitfld.long 0x0C 14. " INT_ON_ANY_5[14] ,Interrupt edge triggering mode for bank 5 0 pin 14" "Single,Both" bitfld.long 0x0C 13. " INT_ON_ANY_5[13] ,Interrupt edge triggering mode for bank 5 0 pin 13" "Single,Both" bitfld.long 0x0C 12. " INT_ON_ANY_5[12] ,Interrupt edge triggering mode for bank 5 0 pin 12" "Single,Both" textline " " bitfld.long 0x0C 11. " INT_ON_ANY_5[11] ,Interrupt edge triggering mode for bank 5 0 pin 11" "Single,Both" bitfld.long 0x0C 10. " INT_ON_ANY_5[10] ,Interrupt edge triggering mode for bank 5 0 pin 10" "Single,Both" bitfld.long 0x0C 9. " INT_ON_ANY_5[9] ,Interrupt edge triggering mode for bank 5 0 pin 9" "Single,Both" bitfld.long 0x0C 8. " INT_ON_ANY_5[8] ,Interrupt edge triggering mode for bank 5 0 pin 8" "Single,Both" textline " " bitfld.long 0x0C 7. " INT_ON_ANY_5[7] ,Interrupt edge triggering mode for bank 5 0 pin 7" "Single,Both" bitfld.long 0x0C 6. " INT_ON_ANY_5[6] ,Interrupt edge triggering mode for bank 5 0 pin 6" "Single,Both" bitfld.long 0x0C 5. " INT_ON_ANY_5[5] ,Interrupt edge triggering mode for bank 5 0 pin 5" "Single,Both" bitfld.long 0x0C 4. " INT_ON_ANY_5[4] ,Interrupt edge triggering mode for bank 5 0 pin 4" "Single,Both" textline " " bitfld.long 0x0C 3. " INT_ON_ANY_5[3] ,Interrupt edge triggering mode for bank 5 0 pin 3" "Single,Both" bitfld.long 0x0C 2. " INT_ON_ANY_5[2] ,Interrupt edge triggering mode for bank 5 0 pin 2" "Single,Both" bitfld.long 0x0C 1. " INT_ON_ANY_5[1] ,Interrupt edge triggering mode for bank 5 0 pin 1" "Single,Both" bitfld.long 0x0C 0. " INT_ON_ANY_5[0] ,Interrupt edge triggering mode for bank 5 0 pin 0" "Single,Both" tree.end width 0x0B tree.end tree "GPU (Graphics Processing Unit)" tree "GPU" base ad:0xFD4B0000 width 40. group.long 0x00++0x17 line.long 0x00 "GP_CONTR_REG_VSCL_START_ADDR,GP Controlregister VSCL Start Address Register" hexmask.long 0x00 3.--31. 0x08 " GP_CONTR_REG_VSCL_START_ADDR ,Start address of the VSCL" line.long 0x04 "GP_CONTR_REG_VSCL_END_ADDR,GP Control Register VSCL End Address Register" hexmask.long 0x04 3.--31. 0x08 " GP_CONTR_REG_VSCL_END_ADDR ,End address of the VSCL" line.long 0x08 "GP_CONTR_REG_PLBCL_START_ADDR,GP Control Register PLBCL Start Address Register" hexmask.long 0x08 3.--31. 0x08 " GP_CONTR_REG_PLBCL_START_ADDR ,Start address of the PLBCL" line.long 0x0C "GP_CONTR_REG_PLBCL_END_ADDR,GP Control Register PLBCL End Address Register" hexmask.long 0x0C 3.--31. 0x08 " GP_CONTR_REG_PLBCL_END_ADDR ,End address of PLB command list" line.long 0x10 "GP_CONTR_REG_PLB_ALLOC_START_ADDR,GP Control Register PLB Allocate Start Address Register" hexmask.long 0x10 7.--31. 0x80 " GP_CONTR_REG_PLB_ALLOC_START_ADDR ,Start/current address for the polygon list allocation" line.long 0x14 "GP_CONTR_REG_PLB_ALLOC_END_ADDR,GP Control Register PLB Allocate End Address Register" hexmask.long 0x14 7.--31. 0x80 " GP_CONTR_REG_PLB_ALLOC_END_ADDR ,End address for the polygon list allocation" wgroup.long 0x20++0x03 line.long 0x00 "GP_CONTR_REG_CMD,GP Control Register Command Register" bitfld.long 0x00 11. " GP_CMD_CLK_OVERRIDE ,Disable block level clock gates" "No,Yes" bitfld.long 0x00 10. " GP_CMD_SOFT_RESET ,Waits until all outstanding bus-transfers are completed, then resets the internal state of GP" "No reset,Reset" textline " " bitfld.long 0x00 9. " GP_CMD_STOP_BUS ,Stop data bus" "No effect,Stop" bitfld.long 0x00 8. " GP_CMD_START_BUS ,Start data bus" "No effect,Start" textline " " bitfld.long 0x00 6. " GP_CMD_FORCE_HANG ,Force hang" "No force,Force" bitfld.long 0x00 5. " GP_CMD_FORCE_RESET ,Resets the internal state of GP immediately" "No reset,Reset" textline " " bitfld.long 0x00 4. " GP_CMD_UPDATE_PLB_ALLOC ,Update polygon list allocation addresses" "No update,Update" bitfld.long 0x00 1. " GP_CMD_START_PLB ,Start PLB" "No effect,Start" textline " " bitfld.long 0x00 0. " GP_CMD_START_VS ,Start vertex shader" "No effect,Start" group.long 0x24++0x03 line.long 0x00 "GP_CONTR_REG_INT_RAWSTAT,GP Control Register Interrupt Rawstat Register" bitfld.long 0x00 22. " GP_IRQ_PTR_OUT_OF_BOUNDS ,Access a pointer with an index larger than the number of tiles specified" "Not occurred,Occurred" bitfld.long 0x00 21. " GP_IRQ_SEMAPHORE_OVERFLOW ,Semaphore overflow interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 20. " GP_IRQ_SEMAPHORE_UNDERFLOW ,Semaphore underflow interrupt" "No interrupt,Interrupt" bitfld.long 0x00 19. " GP_IRQ_RESET_COMPLETED ,Reset completed interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 14. " GP_IRQ_PLB_INVALID_CMD ,Invalid command interrupt from the PLB" "No interrupt,Interrupt" bitfld.long 0x00 13. " GP_IRQ_VS_INVALID_CMD ,Invalid command interrupt from the vertex shader" "No interrupt,Interrupt" textline " " bitfld.long 0x00 12. " GP_IRQ_AXI_BUS_STOPPED ,AXI bus stopped" "Not stopped,Stopped" bitfld.long 0x00 11. " GP_IRQ_AXI_BUS_ERR ,AXI bus error" "No error,Error" textline " " bitfld.long 0x00 9. " GP_IRQ_WRITE_BOUND_ERR ,Write boundaries error" "No error,Error" bitfld.long 0x00 8. " GP_IRQ_PERF_CNT_1_LIMIT ,Performance counter 1 limit reached" "Not reached,Reached" textline " " bitfld.long 0x00 7. " GP_IRQ_PERF_CNT_0_LIMIT ,Performance counter 0 limit reached" "Not reached,Reached" bitfld.long 0x00 6. " GP_IRQ_FORCED_HANG ,Forced hang" "Not occurred,Occurred" textline " " bitfld.long 0x00 5. " GP_IRQ_HANG ,Watchdog timer limit reached" "Not reached,Reached" bitfld.long 0x00 4. " GP_IRQ_PLB_SEM ,PLB semaphore decremented" "No interrupt,Interrupt" textline " " bitfld.long 0x00 3. " GP_IRQ_VS_SEM ,Vertex shader semaphore incremented" "No interrupt,Interrupt" bitfld.long 0x00 2. " GP_IRQ_PLB_OUT_OF_MEM ,PLB out of list memory" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " GP_IRQ_PLB_END_CMD_LIST ,PLB end of command list" "No interrupt,Interrupt" bitfld.long 0x00 0. " GP_IRQ_VS_END_CMD_LIST ,Vertex shader end of command list" "No interrupt,Interrupt" wgroup.long 0x28++0x07 line.long 0x00 "GP_CONTR_REG_INT_CLEAR,GP Control Register Interrupt Clear Register" bitfld.long 0x00 22. " GP_IRQ_PTR_OUT_OF_BOUNDS ,Access a pointer with an index larger than the number of tiles specified" "No effect,Clear" bitfld.long 0x00 21. " GP_IRQ_SEMAPHORE_OVERFLOW ,Semaphore overflow interrupt" "No effect,Clear" textline " " bitfld.long 0x00 20. " GP_IRQ_SEMAPHORE_UNDERFLOW ,Semaphore underflow interrupt" "No effect,Clear" bitfld.long 0x00 19. " GP_IRQ_RESET_COMPLETED ,Reset completed interrupt" "No effect,Clear" textline " " bitfld.long 0x00 14. " GP_IRQ_PLB_INVALID_CMD ,Invalid command interrupt from the PLB" "No effect,Clear" bitfld.long 0x00 13. " GP_IRQ_VS_INVALID_CMD ,Invalid command interrupt from the vertex shader" "No effect,Clear" textline " " bitfld.long 0x00 12. " GP_IRQ_AXI_BUS_STOPPED ,AXI bus stopped" "No effect,Clear" bitfld.long 0x00 11. " GP_IRQ_AXI_BUS_ERR ,AXI bus error" "No effect,Clear" textline " " bitfld.long 0x00 9. " GP_IRQ_WRITE_BOUND_ERR ,Write boundaries error" "No effect,Clear" bitfld.long 0x00 8. " GP_IRQ_PERF_CNT_1_LIMIT ,Performance counter 1 limit reached" "No effect,Clear" textline " " bitfld.long 0x00 7. " GP_IRQ_PERF_CNT_0_LIMIT ,Performance counter 0 limit reached" "No effect,Clear" bitfld.long 0x00 6. " GP_IRQ_FORCED_HANG ,Forced hang" "No effect,Clear" textline " " bitfld.long 0x00 5. " GP_IRQ_HANG ,Watchdog timer limit reached" "No effect,Clear" bitfld.long 0x00 4. " GP_IRQ_PLB_SEM ,PLB semaphore decremented" "No effect,Clear" textline " " bitfld.long 0x00 3. " GP_IRQ_VS_SEM ,Vertex shader semaphore incremented" "No effect,Clear" bitfld.long 0x00 2. " GP_IRQ_PLB_OUT_OF_MEM ,PLB out of list memory" "No effect,Clear" textline " " bitfld.long 0x00 1. " GP_IRQ_PLB_END_CMD_LIST ,PLB end of command list" "No effect,Clear" bitfld.long 0x00 0. " GP_IRQ_VS_END_CMD_LIST ,Vertex shader end of command list" "No effect,Clear" line.long 0x04 "GP_CONTR_REG_INT_MASK,GP Control Register Interrupt Mask Register" bitfld.long 0x04 22. " GP_IRQ_PTR_OUT_OF_BOUNDS ,Access a pointer with an index larger than the number of tiles specified" "Not masked,Masked" bitfld.long 0x04 21. " GP_IRQ_SEMAPHORE_OVERFLOW ,Semaphore overflow interrupt" "Not masked,Masked" textline " " bitfld.long 0x04 20. " GP_IRQ_SEMAPHORE_UNDERFLOW ,Semaphore underflow interrupt" "Not masked,Masked" bitfld.long 0x04 19. " GP_IRQ_RESET_COMPLETED ,Reset completed interrupt" "Not masked,Masked" textline " " bitfld.long 0x04 14. " GP_IRQ_PLB_INVALID_CMD ,Invalid command interrupt from the PLB" "Not masked,Masked" bitfld.long 0x04 13. " GP_IRQ_VS_INVALID_CMD ,Invalid command interrupt from the vertex shader" "Not masked,Masked" textline " " bitfld.long 0x04 12. " GP_IRQ_AXI_BUS_STOPPED ,AXI bus stopped" "Not masked,Masked" bitfld.long 0x04 11. " GP_IRQ_AXI_BUS_ERR ,AXI bus error" "Not masked,Masked" textline " " bitfld.long 0x04 9. " GP_IRQ_WRITE_BOUND_ERR ,Write boundaries error" "Not masked,Masked" bitfld.long 0x04 8. " GP_IRQ_PERF_CNT_1_LIMIT ,Performance counter 1 limit reached" "Not masked,Masked" textline " " bitfld.long 0x04 7. " GP_IRQ_PERF_CNT_0_LIMIT ,Performance counter 0 limit reached" "Not masked,Masked" bitfld.long 0x04 6. " GP_IRQ_FORCED_HANG ,Forced hang" "Not masked,Masked" textline " " bitfld.long 0x04 5. " GP_IRQ_HANG ,Watchdog timer limit reached" "Not masked,Masked" bitfld.long 0x04 4. " GP_IRQ_PLB_SEM ,PLB semaphore decremented" "Not masked,Masked" textline " " bitfld.long 0x04 3. " GP_IRQ_VS_SEM ,Vertex shader semaphore incremented" "Not masked,Masked" bitfld.long 0x04 2. " GP_IRQ_PLB_OUT_OF_MEM ,PLB out of list memory" "Not masked,Masked" textline " " bitfld.long 0x04 1. " GP_IRQ_PLB_END_CMD_LIST ,PLB end of command list" "Not masked,Masked" bitfld.long 0x04 0. " GP_IRQ_VS_END_CMD_LIST ,Vertex shader end of command list" "Not masked,Masked" rgroup.long 0x30++0x03 line.long 0x00 "GP_CONTR_REG_INT_STAT,GP Control Register Interrupt Status Register" bitfld.long 0x00 22. " GP_IRQ_PTR_OUT_OF_BOUNDS ,Access a pointer with an index larger than the number of tiles specified" "Not occurred,Occurred" bitfld.long 0x00 21. " GP_IRQ_SEMAPHORE_OVERFLOW ,Semaphore overflow interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 20. " GP_IRQ_SEMAPHORE_UNDERFLOW ,Semaphore underflow interrupt" "No interrupt,Interrupt" bitfld.long 0x00 19. " GP_IRQ_RESET_COMPLETED ,Reset completed interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 14. " GP_IRQ_PLB_INVALID_CMD ,Invalid command interrupt from the PLB" "No interrupt,Interrupt" bitfld.long 0x00 13. " GP_IRQ_VS_INVALID_CMD ,Invalid command interrupt from the vertex shader" "No interrupt,Interrupt" textline " " bitfld.long 0x00 12. " GP_IRQ_AXI_BUS_STOPPED ,AXI bus stopped" "Not stopped,Stopped" bitfld.long 0x00 11. " GP_IRQ_AXI_BUS_ERR ,AXI bus error" "No error,Error" textline " " bitfld.long 0x00 9. " GP_IRQ_WRITE_BOUND_ERR ,Write boundaries error" "No error,Error" bitfld.long 0x00 8. " GP_IRQ_PERF_CNT_1_LIMIT ,Performance counter 1 limit reached" "Not reached,Reached" textline " " bitfld.long 0x00 7. " GP_IRQ_PERF_CNT_0_LIMIT ,Performance counter 0 limit reached" "Not reached,Reached" bitfld.long 0x00 6. " GP_IRQ_FORCED_HANG ,Forced hang" "Not occurred,Occurred" textline " " bitfld.long 0x00 5. " GP_IRQ_HANG ,Watchdog timer limit reached" "Not reached,Reached" bitfld.long 0x00 4. " GP_IRQ_PLB_SEM ,PLB semaphore decremented" "No interrupt,Interrupt" textline " " bitfld.long 0x00 3. " GP_IRQ_VS_SEM ,Vertex shader semaphore incremented" "No interrupt,Interrupt" bitfld.long 0x00 2. " GP_IRQ_PLB_OUT_OF_MEM ,PLB out of list memory" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " GP_IRQ_PLB_END_CMD_LIST ,PLB end of command list" "No interrupt,Interrupt" bitfld.long 0x00 0. " GP_IRQ_VS_END_CMD_LIST ,Vertex shader end of command list" "No interrupt,Interrupt" group.long 0x34++0x17 line.long 0x00 "GP_CONTR_REG_WRITE_BOUND_LOW,GP Control Register Write Boundary Low" hexmask.long.tbyte 0x00 8.--31. 0x01 " GP_CONTR_REG_WRITE_BOUND_LOW ,Value of low write boundary" line.long 0x04 "GP_CONTR_REG_WRITE_BOUND_HIGH,GP Control Register Write Boundary High" hexmask.long.tbyte 0x04 8.--31. 0x01 " GP_CONTR_REG_WRITE_BOUND_HIGH ,Value of high write boundary" line.long 0x08 "GP_CONTR_REG_PERF_CNT_0_ENABLE,GP Control Register Performance Counter 0 Enable" bitfld.long 0x08 0. " GP_CONTR_REG_PERF_CNT_0_ENABLE ,Enable performance counter 0" "Disabled,Enabled" line.long 0x0C "GP_CONTR_REG_PERF_CNT_1_ENABLE,GP Control Register Performance Counter 1 Enable" bitfld.long 0x0C 0. " GP_CONTR_REG_PERF_CNT_1_ENABLE ,Enable performance counter 1" "Disabled,Enabled" line.long 0x10 "GP_CONTR_REG_PERF_CNT_0_SRC,GP Control Register Performance Counter 0 Source" bitfld.long 0x10 0. " GP_CONTR_REG_PERF_CNT_0_SRC ,Source values" "0,1" line.long 0x14 "GP_CONTR_REG_PERF_CNT_1_SRC,GP Control Register Performance Counter 1 Source" bitfld.long 0x14 0. " GP_CONTR_REG_PERF_CNT_1_SRC ,Source values" "0,1" rgroup.long 0x4C++0x07 line.long 0x00 "GP_CONTR_REG_PERF_CNT_0_VAL,GP Control Register Performance Counter 0 Value" line.long 0x04 "GP_CONTR_REG_PERF_CNT_1_VAL,GP Control Register Performance Counter 1 Value" group.long 0x54++0x07 line.long 0x00 "GP_CONTR_REG_PERF_CNT_0_LIMIT,GP Control Register Performance Counter 0 Limit" line.long 0x04 "GP_CONTR_REG_PERF_CNT_1_LIMIT,GP Control Register Performance Counter 1 Limit" rgroup.long 0x68++0x07 line.long 0x00 "GP_CONTR_REG_STATUS,GP Control Register Status" bitfld.long 0x00 9. " CLK_OVERRIDE ,Block level clock gates have been disabled" "No,Yes" bitfld.long 0x00 8. " GP_STATUS_WR_BOUND_ERR ,Write boundaries error detected" "Not detected,Detected" textline " " bitfld.long 0x00 7. " GP_STATUS_HANG ,Watchdog timer limit reached" "Not reached,Reached" bitfld.long 0x00 6. " GP_STATUS_BUS_ERR ,Bus error detected" "Not detected,Detected" textline " " bitfld.long 0x00 5. " GP_STATUS_PLB_STALLED ,PLB stalled on list allocation" "Not stalled,Stalled" bitfld.long 0x00 3. " GP_STATUS_PLB_ACTIVE ,PLB active" "Not active,Active" textline " " bitfld.long 0x00 2. " GP_STATUS_BUS_STOPPED ,Stop command issued" "Not occurred,Occurred" bitfld.long 0x00 1. " GP_STATUS_VS_ACTIVE ,Vertex shader active" "Not active,Active" textline " " bitfld.long 0x00 0. " GP_STATUS_IRQ ,IRQ asserted" "Not asserted,Asserted" line.long 0x04 "GP_CONTR_REG_VERSION,GP Control Register Version" hexmask.long.word 0x04 16.--31. 1. " PRODUCT_ID ,Product ID number" hexmask.long.byte 0x04 8.--15. 1. " VERSION_MAJOR ,Major product version information" textline " " hexmask.long.byte 0x04 0.--7. 1. " VERSION_MINOR ,Minor product version information" rgroup.long 0x80++0x0B line.long 0x00 "GP_CONTR_REG_VSCL_INITIAL_ADDR,GP Control Register VSCL Initial Address Register" hexmask.long 0x00 3.--31. 0x08 " GP_CONTR_REG_VSCL_INIT_ADDR ,Start address of vertex shader command list" line.long 0x04 "GP_CONTR_REG_PLBCL_INITIAL_ADDR,GP Control Register PLBCL Initial Address Register" hexmask.long 0x04 3.--31. 0x08 " GP_CONTR_REG_PLBCL_INIT_ADDR ,Start address of PLB command list" line.long 0x08 "GP_CONTR_REG_WRITE_BOUNDARY_ERROR_ADDR,GP Control Register Write Error Address Register" rgroup.long 0x94++0x03 line.long 0x00 "GP_CONTR_REG_AXI_BUS_ERROR_STAT,GP Control AXI Bus Error Status Register" bitfld.long 0x00 6.--9. " GP_READ_ERROR_ID ,ID of read error cause" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 2.--5. " GP_WRITE_ERROR_ID ,ID of write error cause" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 1. " GP_READ_ERR ,Set when a read error occurs" "No error,Error" bitfld.long 0x00 0. " GP_WRITE_ERR ,Set when a write error occurs" "No error,Error" group.long 0xA0++0x07 line.long 0x00 "GP_CONTR_REG_WATCHDOG_DISABLE,GP Control Register Watchdog Disable Register" bitfld.long 0x00 0. " GP_CONTR_REG_WATCHDOG_DISABLE ,Disable watchdog timer" "No,Yes" line.long 0x04 "GP_CONTR_REG_WATCHDOG_TIMEOUT,GP Control Register Watchdog Timeout Register" rgroup.long 0x1000++0x0B line.long 0x00 "VERSION,Version Register" hexmask.long.word 0x00 16.--31. 1. " PRODUCT_ID ,Product ID number" hexmask.long.byte 0x00 8.--15. 1. " VERSION_MAJOR ,Major product version information" textline " " hexmask.long.byte 0x00 0.--7. 1. " VERSION_MINOR ,Minor product version information" line.long 0x04 "SIZE,Size Register" hexmask.long.byte 0x04 24.--31. 1. " EXTERNAL_BUS_WIDTH ,Log2 external bus width in bits" hexmask.long.byte 0x04 16.--23. 1. " CACHE_SIZE ,Log2 cache size in bytes" textline " " hexmask.long.byte 0x04 8.--15. 1. " ASSOCIATIVITY ,Log2 associativity" hexmask.long.byte 0x04 0.--7. 1. " LINE_SIZE ,Log2 line size in bytes" line.long 0x08 "STATUS,Status Register" bitfld.long 0x08 1. " DATA_BUSY ,Cache is busy handling data" "Not busy,Busy" bitfld.long 0x08 0. " COMMAND_BUSY ,Cache is busy handling commands" "Not busy,Busy" wgroup.long 0x1010++0x07 line.long 0x00 "COMMAND,Command Register" bitfld.long 0x00 0.--2. " COMMAND ,Command" ",Cache clear,?..." line.long 0x04 "CLEAR_PAGE,Clear Page Register" group.long 0x1018++0x17 line.long 0x00 "COMMAND,Command Register" bitfld.long 0x00 0.--4. " MAX_READS ,Maximum number of outstanding read transactions" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x04 "COMMAND,Enable Register" bitfld.long 0x04 1. " PERM_CACHE_READ_ALLOCATE ,Permit_cache_read_allocate" "Not permitted,Permitted" bitfld.long 0x04 0. " PERM_CACHEABLE_ACCESSES ,Permit_cacheable_accesses" "Not permitted,Permitted" line.long 0x08 "PERFCNT_SRC0,Performance Counter 0 Source Register" hexmask.long.byte 0x08 0.--6. 1. " PERFCNT ,Performance counter 0 source" line.long 0x0C "PERFCNT_VAL0,Performance Counter 0 Value Register" line.long 0x10 "PERFCNT_SRC1,Performance Counter 1 Source Register" hexmask.long.byte 0x10 0.--6. 1. " PERFCNT ,Performance counter 1 source" line.long 0x14 "PERFCNT_VAL1,Performance Counter 1 Value Register" group.long 0x3000++0x03 line.long 0x00 "GP_MMU_DTE_ADDR,MMU Current Page Table Address Register" rgroup.long 0x3004++0x03 line.long 0x00 "GP_MMU_STATUS,MMU Status Register" bitfld.long 0x00 6.--10. " MMU_PAGE_FAULT_BUS_ID ,Index of master responsible for last page fault" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 5. " MMU_PAGE_FAULT_IS_WRITE ,The direction of access for last page fault" "Read,Write" textline " " bitfld.long 0x00 4. " MMU_REPLAY_BUFFER_EMPTY ,The MMU replay buffer is empty" "Not empty,Empty" bitfld.long 0x00 3. " MMU_IDLE ,The MMU is idle when accesses are being translated and there are no unfinished translated accesses" "Not idle,Idle" textline " " bitfld.long 0x00 2. " MMU_STALL_ACTIVE ,MMU stall mode currently enabled" "Disabled,Enabled" bitfld.long 0x00 1. " MMU_PAGE_FAULT_ACTIVE ,MMU page fault mode currently enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " MMU_PAGING_ENABLED ,Paging is enabled" "Disabled,Enabled" wgroup.long 0x3008++0x03 line.long 0x00 "GP_MMU_COMMAND,MMU Command Register" bitfld.long 0x00 0.--2. " CMD ,MMU command" "Enable paging,Disable paging,Enable stall,Disable stall,Zap cache,Page fault done,Force reset,?..." rgroup.long 0x300C++0x03 line.long 0x00 "GP_MMU_PAGE_FAULT_ADDR,MMU Logical Address Register" wgroup.long 0x3010++0x03 line.long 0x00 "GP_MMU_ZAP_ONE_LINE,MMU Zap Cache Line Register" group.long 0x3014++0x03 line.long 0x00 "GP_MMU_INT_RAWSTAT,MMU Raw Interrupt Status Register" bitfld.long 0x00 1. " READ_BUS_ERR ,Read bus error" "No error,Error" bitfld.long 0x00 0. " PAGE_FAULT ,Page fault" "Not occurred,Occurred" wgroup.long 0x3018++0x03 line.long 0x00 "GP_MMU_INT_CLEAR,MMU Interrupt Clear Register" bitfld.long 0x00 1. " READ_BUS_ERR ,Read bus error interrupt clear" "No effect,Clear" bitfld.long 0x00 0. " PAGE_FAULT ,Page fault interrupt clear" "No effect,Clear" group.long 0x301C++0x03 line.long 0x00 "GP_MMU_INT_MASK,MMU Interrupt Mask Register" bitfld.long 0x00 1. " READ_BUS_ERR ,Read bus error interrupt mask" "Not masked,Masked" bitfld.long 0x00 0. " PAGE_FAULT ,Page fault interrupt mask" "Not masked,Masked" rgroup.long 0x3020++0x03 line.long 0x00 "GP_MMU_INT_STATUS,MMU Interrupt Status Register" bitfld.long 0x00 1. " READ_BUS_ERR ,Read bus error" "No error,Error" bitfld.long 0x00 0. " PAGE_FAULT ,Page fault" "Not occurred,Occurred" width 0x0B tree.end tree "PP0" base ad:0xFD4B4000 width 32. group.long 0x00++0x03 line.long 0x00 "PP0_MMU_DTE_ADDR,MMU Current Page Table Address Register" rgroup.long 0x04++0x03 line.long 0x00 "PP0_MMU_STATUS,MMU Status Register" bitfld.long 0x00 6.--10. " MMU_PAGE_FAULT_BUS_ID ,Index of master responsible for last page fault" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 5. " MMU_PAGE_FAULT_IS_WR ,The direction of access for last page fault" "Read,Write" bitfld.long 0x00 4. " MMU_REPLAY_BUF_EMPTY ,The MMU replay buffer is empty" "Not empty,Empty" textline " " bitfld.long 0x00 3. " MMU_IDLE ,The MMU is idle when accesses are being translated and there are no unfinished translated accesses" "Not idle,Idle" bitfld.long 0x00 2. " MMU_STALL_ACTIVE ,MMU stall mode currently enabled" "Disabled,Enabled" bitfld.long 0x00 1. " MMU_PAGE_FAULT_ACTIVE ,MMU page fault mode currently enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " MMU_PAGING_ENABLED ,Paging is enabled" "Disabled,Enabled" wgroup.long 0x08++0x03 line.long 0x00 "PP0_MMU_COMMAND,MMU Command Register" bitfld.long 0x00 0.--2. " CMD ,MMU command" "Enable paging,Disable paging,Enable stall,Disable stall,Zap cache,Page fault done,Force reset,?..." textline " " rgroup.long 0x0C++0x03 line.long 0x00 "PP0_MMU_PAGE_FAULT_ADDR,MMU Logical Address Register" wgroup.long 0x10++0x03 line.long 0x00 "PP0_MMU_ZAP_ONE_LINE,MMU Zap Cache Line Register" group.long 0x14++0x03 line.long 0x00 "PP0_MMU_INT_RAWSTAT,MMU Raw Interrupt Status Register" bitfld.long 0x00 1. " READ_BUS_ERROR ,Read bus error" "No error,Error" bitfld.long 0x00 0. " PAGE_FAULT ,Page fault" "Not occurred,Occurred" wgroup.long 0x18++0x03 line.long 0x00 "PP0_MMU_INT_CLEAR,MMU Interrupt Clear Register" bitfld.long 0x00 1. " READ_BUS_ERROR ,Read bus error interrupt clear" "No effect,Clear" bitfld.long 0x00 0. " PAGE_FAULT ,Page fault interrupt clear" "No effect,Clear" group.long 0x1C++0x03 line.long 0x00 "PP0_MMU_INT_MASK,MMU Interrupt Mask Register" bitfld.long 0x00 1. " READ_BUS_ERROR ,Read bus error interrupt mask" "Not masked,Masked" bitfld.long 0x00 0. " PAGE_FAULT ,Page fault interrupt mask" "Not masked,Masked" rgroup.long 0x20++0x03 line.long 0x00 "PP0_MMU_INT_STATUS,MMU Interrupt Status Register" bitfld.long 0x00 1. " READ_BUS_ERROR ,Read bus error" "No error,Error" bitfld.long 0x00 0. " PAGE_FAULT ,Page fault" "Not occurred,Occurred" base ad:0xFD4B8000 group.long 0x00++0x17 line.long 0x00 "PP0_REND_LIST_ADDR,Renderer List Address Register" hexmask.long 0x00 3.--31. 0x08 " REND_LIST_ADDR ,Start address of the polygon list to use for the frame" line.long 0x04 "PP0_REND_RSW_BASE,Renderer State Word Base Address Register" hexmask.long 0x04 6.--31. 0x40 " REND_RSW_BASE ,Default renderer state word base address" line.long 0x08 "PP0_REND_VERTEX_BASE,Renderer Vertex Base Register" hexmask.long 0x08 6.--31. 0x40 " REND_VERTEX_BASE ,Default vertex bundles base address" line.long 0x0C "PP0_FEATURE_ENABLE,Feature Enable Register" bitfld.long 0x0C 6. " SUMMATE_QUAD_COVER ,Coverage-to-alpha 2x2 fragment quad operation" "Disabled,Enabled" bitfld.long 0x0C 5. " ORIGIN_LOWER_LEFT ,Coordinate system for the screen XY position has its origin in the upper-left corner" "Disabled,Enabled" bitfld.long 0x0C 4. " EARLYZ_DISABLE2 ,Disable the second of two Early-Z mechanisms" "No,Yes" textline " " bitfld.long 0x0C 3. " EARLYZ_DISABLE1 ,Disable the first of two Early-Z mechanisms" "No,Yes" bitfld.long 0x0C 1. " EARLYZ_EN ,Enable the early Z-test mechanism in the rasterizer" "Disabled,Enabled" bitfld.long 0x0C 0. " FP_TILEBUF_EN ,Component format" "8-bit,FP16" line.long 0x10 "PP0_Z_CLEAR_VALUE,Z Clear Value Register" hexmask.long.tbyte 0x10 0.--23. 1. " Z_CLEAR_VAL ,Z tile buffer clear value" line.long 0x14 "PP0_STENCIL_CLEAR_VALUE,Stencil Clear Value Register" hexmask.long.byte 0x14 0.--7. 1. " STENCIL_CLEAR_VAL ,Stencil clear value" if (((d.l(ad:0xFD4B8000+0x0C))&0x01)==0x00) group.long 0x18++0x0F line.long 0x00 "PP0_ABGR_CLEAR_VALUE_0,ABGR Clear Value 0 Register" hexmask.long.byte 0x00 24.--31. 1. " ALPHA_CLEAR_VAL ,Alpha clear value" hexmask.long.byte 0x00 16.--23. 1. " BLUE_CLEAR_VAL ,Blue clear value" hexmask.long.byte 0x00 8.--15. 1. " GREEN_CLEAR_VAL ,Green clear value" textline " " hexmask.long.byte 0x00 0.--7. 1. " RED_CLEAR_VAL ,Red clear value" line.long 0x04 "PP0_ABGR_CLEAR_VALUE_1,ABGR Clear Value 1 Register" hexmask.long.byte 0x04 24.--31. 1. " ALPHA_CLEAR_VAL ,Alpha clear value" hexmask.long.byte 0x04 16.--23. 1. " BLUE_CLEAR_VAL ,Blue clear value" hexmask.long.byte 0x04 8.--15. 1. " GREEN_CLEAR_VAL ,Green clear value" textline " " hexmask.long.byte 0x04 0.--7. 1. " RED_CLEAR_VAL ,Red clear value" line.long 0x08 "PP0_ABGR_CLEAR_VALUE_2,ABGR Clear Value 2 Register" hexmask.long.byte 0x08 24.--31. 1. " ALPHA_CLEAR_VAL ,Alpha clear value" hexmask.long.byte 0x08 16.--23. 1. " BLUE_CLEAR_VAL ,Blue clear value" hexmask.long.byte 0x08 8.--15. 1. " GREEN_CLEAR_VAL ,Green clear value" textline " " hexmask.long.byte 0x08 0.--7. 1. " RED_CLEAR_VAL ,Red clear value" line.long 0x0C "PP0_ABGR_CLEAR_VALUE_2,ABGR Clear Value 2 Register" hexmask.long.byte 0x0C 24.--31. 1. " ALPHA_CLEAR_VAL ,Alpha clear value" hexmask.long.byte 0x0C 16.--23. 1. " BLUE_CLEAR_VAL ,Blue clear value" hexmask.long.byte 0x0C 8.--15. 1. " GREEN_CLEAR_VAL ,Green clear value" textline " " hexmask.long.byte 0x0C 0.--7. 1. " RED_CLEAR_VAL ,Red clear value" else group.long 0x18++0x07 line.long 0x00 "PP0_ABGR_CLEAR_VALUE_0,ABGR Clear Value 0 Register" hexmask.long.byte 0x00 24.--31. 1. " GREEN_CLEAR_VAL ,Green clear value" hexmask.long.byte 0x00 8.--15. 1. " RED_CLEAR_VAL ,Red clear value" textline " " line.long 0x04 "PP0_ABGR_CLEAR_VALUE_1,ABGR Clear Value 1 Register" hexmask.long.byte 0x04 24.--31. 1. " ALPHA_CLEAR_VAL ,Alpha clear value" hexmask.long.byte 0x04 16.--23. 1. " BLUE_CLEAR_VAL ,Blue clear value" textline " " hgroup.long 0x20++0x07 hide.long 0x00 "PP0_ABGR_CLEAR_VALUE_2,ABGR Clear Value 2 Register" textline " " hide.long 0x04 "PP0_ABGR_CLEAR_VALUE_2,ABGR Clear Value 2 Register" textline " " endif group.long 0x28++0x0F line.long 0x00 "PP0_BOUNDING_BOX_LEFT_RIGHT,Bounding Box Left Right Register" bitfld.long 0x00 16.--19. " BOUNDING_BOX_LEFT ,Bits [3:0] of the number of pixels from the left initial framebuffer edge to exclude from write-back" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 0.--13. 1. " BOUNDING_BOX_RIGHT ,The number of pixels from the left initial framebuffer edge - 1 to include in write-back" line.long 0x04 "PP0_BOUNDING_BOX_BOTTOM,Bounding Box Bottom Register" hexmask.long.word 0x04 0.--13. 1. " BOUNDING_BOX_BOTTOM ,The number of pixels from the top initial framebuffer edge, to include in write-back" line.long 0x08 "PP0_FS_STACK_ADDR,FS Stack Address Register" hexmask.long 0x08 6.--31. 0x40 " FS_STACK_ADDR ,Fragment shader stack address" line.long 0x0C "PP0_FS_STACK_SIZE_AND_INIT_VAL,FS Stack Size And Initial Value Register" hexmask.long.word 0x0C 16.--31. 1. " FS_STACK_INIT_VAL ,The initial value of the stack pointer" hexmask.long.word 0x0C 0.--15. 1. " FS_STACK_SIZE ,The fragment shader stack size" group.long 0x40++0x1B line.long 0x00 "PP0_ORIGIN_OFFSET_X,Origin Offset X Register" hexmask.long.word 0x00 0.--15. 1. " ORIGIN_OFFSET_X ,X offset of the screen space coordinate system" line.long 0x04 "PP0_ORIGIN_OFFSET_Y,Origin Offset Y Register" hexmask.long.word 0x04 0.--15. 1. " ORIGIN_OFFSET_Y ,Y offset of the screen space coordinate system" line.long 0x08 "PP0_SUBPIXEL_SPECIFIER,Subpixel Specifier Register" hexmask.long.byte 0x08 0.--7. 1. " ORIGIN_OFFSET_X ,Subpixel specifier" line.long 0x0C "PP0_TIEBREAK_MODE,Tiebreak Mode Register" bitfld.long 0x0C 0.--2. " TIEBREAK_MODE ,Tie break mode" "0,1,2,3,4,5,6,7" line.long 0x10 "PP0_PLIST_CONFIG,Polygon List Format Register" bitfld.long 0x10 28.--29. " LIST_FORMAT ,The polygon list format" "1x1,2x2,4x4,?..." bitfld.long 0x10 16.--21. " SCALE_Y ,Log2 of the number of tiles in the y direction for a supertile" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x10 0.--5. " SCALE_X ,Log2 of the number of tiles in the x direction for a supertile" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x14 "PP0_SCALING_CONFIG,Scaling Register" bitfld.long 0x14 20.--22. " SCALE_Y ,Log2 of the scale factor in y-direction" "0,1,2,3,4,5,6,7" bitfld.long 0x14 16.--18. " SCALE_X ,Log2 of the scale factor in x-direction" "0,1,2,3,4,5,6,7" bitfld.long 0x14 11. " FLIP_DERIV_Y ,Flips the sign of the y derivative" "Not flipped,Flipped" textline " " bitfld.long 0x14 10. " FLIP_FRAGCOORD ,Flips the coordinate system as read by fragcoord" "Not flipped,Flipped" bitfld.long 0x14 9. " FLIP_DITH_MATRIX ,Flips the dithering matrix upside down" "Not flipped,Flipped" bitfld.long 0x14 8. " FLIP_POINT_SPRITES ,Flips the point sprites upside down" "Not flipped,Flipped" textline " " bitfld.long 0x14 3. " DERIV_SCALE_EN ,Enables scaling of the derivative instruction" "Disabled,Enabled" bitfld.long 0x14 2. " FRAGCOORD_SCALE_EN ,Enables inverse scaling of fragcoord values" "Disabled,Enabled" bitfld.long 0x14 1. " DITH_SCALE_EN ,Enables scaling of dithering values" "Disabled,Enabled" textline " " bitfld.long 0x14 0. " POINT_AND_LINE_SCALE_EN ,Enables scaling of point and line sizes" "Disabled,Enabled" line.long 0x18 "PP0_TILEBUFFER_BITS,Tilebuffer Configuration Register" bitfld.long 0x18 12.--15. " TILEBUFFER_A_BITS ,Number of bits allocated to the alpha component in the tilebuffer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 8.--11. " TILEBUFFER_B_BITS ,Number of bits allocated to the blue component in the tilebuffer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 4.--7. " TILEBUFFER_G_BITS ,Number of bits allocated to the green component in the tilebuffer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x18 0.--3. " TILEBUFFER_R_BITS ,Number of bits allocated to the red component in the tilebuffer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " group.long 0x100++0x2F line.long 0x00 "PP0_WB0_SOURCE_SELECT,WB0 Source Select Register" bitfld.long 0x00 0.--1. " SOURCE_SELECT ,Tile buffer source for the write-back unit" "None,Z/stencil,ARGB,?..." line.long 0x04 "PP0_WB0_TARGET_ADDR,WB0 Target Address Register" hexmask.long 0x04 3.--31. 0x08 " TARGET_ADDR ,The start address in memory of the target buffer" line.long 0x08 "PP0_WB0_TARGET_PIXEL_FORMAT,WB0 Target Pixel Format Register" bitfld.long 0x08 0.--3. " TARGET_PIXEL_FORMAT ,Pixel format of the target buffer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x0C "PP0_WB0_TARGET_AA_FORMAT,WB0 Target AA Format Register" bitfld.long 0x0C 12.--14. " TARGET_AA_Y ,Log2 of downsampling in y-direction" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 8.--9. " TARGET_AA_X ,Log2 of downsampling in x-direction" "0,1,2,3" bitfld.long 0x0C 0.--2. " TARGET_AA_FORMAT ,AA format" "0,?..." line.long 0x10 "PP0_WB0_TARGET_LAYOUT,WB0 Target Layout" bitfld.long 0x10 0.--1. " TARGET_LAYOUT ,Layout" "Linear,Interleaved,Interl. Blocks,?..." line.long 0x14 "PP0_WB0_TARGET_SCANLINE_LENGTH,WB0 Target Scanline Length" hexmask.long.word 0x14 0.--15. 1. " TARGET_SCANLINE_LEN ,Offset between the beginning of two lines of the target buffer" line.long 0x18 "PP0_WB0_TARGET_FLAGS,WB0 Target Flags Register" bitfld.long 0x18 5. " BIG_ENDIAN ,Big-endian byte order" "Disabled,Enabled" bitfld.long 0x18 4. " DITHER_EN ,Dithering enable" "Disabled,Enabled" bitfld.long 0x18 3. " INV_COMP_ORDER_EN ,Invert the order of the color components" "Disabled,Enabled" textline " " bitfld.long 0x18 2. " SWAP_RED_BLUE_EN ,Swap red and blue components" "Disabled,Enabled" bitfld.long 0x18 1. " BOUNDING_BOX_EN ,Write-back is limited to the rectangular box defined by the BOUNDING_BOX_LEFT_RIGHT and BOUNDING_BOX_BOTTOM registers" "Disabled,Enabled" bitfld.long 0x18 0. " DIRTY_BIT_EN ,Write back to the framebuffer only the pixels written to the tile buffer" "Disabled,Enabled" line.long 0x1C "PP0_WB0_MRT_ENABLE,WB0 MRT Enable Register" bitfld.long 0x1C 3. " MRT_ENABLE[3] ,MRT 3 enable" "Disabled,Enabled" bitfld.long 0x1C 2. " [2] ,MRT 2 enable" "Disabled,Enabled" bitfld.long 0x1C 1. " [1] ,MRT 1 enable" "Disabled,Enabled" textline " " bitfld.long 0x1C 0. " [0] ,MRT 0 enable" "Disabled,Enabled" line.long 0x20 "PP0_WB0_MRT_OFFSET,WB0 MRT Offset Register" hexmask.long 0x20 3.--31. 0x08 " WB0_MRT_OFFSET ,Offset value giving the distance in memory between each MRT" line.long 0x24 "PP0_WB0_GLOBAL_TEST_ENABLE,WB0 Global Test Enable Register" bitfld.long 0x24 0. " GLOBAL_TEST_EN ,Enable global write-back value testing" "Disabled,Enabled" line.long 0x28 "PP0_WB0_GLOBAL_TEST_REF_VALUE,WB0 Global Test Reference Value Register" hexmask.long.word 0x28 0.--15. 1. " GLOBAL_TEST_REF_VAL ,Global test reference value" line.long 0x2C "PP0_WB0_GLOBAL_TEST_CMP_FUNC,WB0 Global Test Compare Function Register" bitfld.long 0x2C 0.--2. " GLOBAL_TEST_CMP_FUNC ,Global test compare function" "Less,Equal,Greater than,?..." group.long 0x200++0x2F line.long 0x00 "PP0_WB1_SOURCE_SELECT,WB1 Source Select Register" bitfld.long 0x00 0.--1. " SOURCE_SELECT ,Tile buffer source for the write-back unit" "None,Z/stencil,ARGB,?..." line.long 0x04 "PP0_WB1_TARGET_ADDR,WB1 Target Address Register" hexmask.long 0x04 3.--31. 0x08 " TARGET_ADDR ,The start address in memory of the target buffer" line.long 0x08 "PP0_WB1_TARGET_PIXEL_FORMAT,WB1 Target Pixel Format Register" bitfld.long 0x08 0.--3. " TARGET_PIXEL_FORMAT ,Pixel format of the target buffer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x0C "PP0_WB1_TARGET_AA_FORMAT,WB1 Target AA Format Register" bitfld.long 0x0C 12.--14. " TARGET_AA_Y ,Log2 of downsampling in y-direction" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 8.--9. " TARGET_AA_X ,Log2 of downsampling in x-direction" "0,1,2,3" bitfld.long 0x0C 0.--2. " TARGET_AA_FORMAT ,AA format" "0,?..." line.long 0x10 "PP0_WB1_TARGET_LAYOUT,WB1 Target Layout" bitfld.long 0x10 0.--1. " TARGET_LAYOUT ,Layout" "Linear,Interleaved,Interl. Blocks,?..." line.long 0x14 "PP0_WB1_TARGET_SCANLINE_LENGTH,WB1 Target Scanline Length" hexmask.long.word 0x14 0.--15. 1. " TARGET_SCANLINE_LEN ,Offset between the beginning of two lines of the target buffer" line.long 0x18 "PP0_WB1_TARGET_FLAGS,WB1 Target Flags Register" bitfld.long 0x18 5. " BIG_ENDIAN ,Big-endian byte order" "Disabled,Enabled" bitfld.long 0x18 4. " DITHER_EN ,Dithering enable" "Disabled,Enabled" bitfld.long 0x18 3. " INV_COMP_ORDER_EN ,Invert the order of the color components" "Disabled,Enabled" textline " " bitfld.long 0x18 2. " SWAP_RED_BLUE_EN ,Swap red and blue components" "Disabled,Enabled" bitfld.long 0x18 1. " BOUNDING_BOX_EN ,Write-back is limited to the rectangular box defined by the BOUNDING_BOX_LEFT_RIGHT and BOUNDING_BOX_BOTTOM registers" "Disabled,Enabled" bitfld.long 0x18 0. " DIRTY_BIT_EN ,Write back to the framebuffer only the pixels written to the tile buffer" "Disabled,Enabled" line.long 0x1C "PP0_WB1_MRT_ENABLE,WB1 MRT Enable Register" bitfld.long 0x1C 3. " MRT_ENABLE[3] ,MRT 3 enable" "Disabled,Enabled" bitfld.long 0x1C 2. " [2] ,MRT 2 enable" "Disabled,Enabled" bitfld.long 0x1C 1. " [1] ,MRT 1 enable" "Disabled,Enabled" textline " " bitfld.long 0x1C 0. " [0] ,MRT 0 enable" "Disabled,Enabled" line.long 0x20 "PP0_WB1_MRT_OFFSET,WB1 MRT Offset Register" hexmask.long 0x20 3.--31. 0x08 " WB1_MRT_OFFSET ,Offset value giving the distance in memory between each MRT" line.long 0x24 "PP0_WB1_GLOBAL_TEST_ENABLE,WB1 Global Test Enable Register" bitfld.long 0x24 0. " GLOBAL_TEST_EN ,Enable global write-back value testing" "Disabled,Enabled" line.long 0x28 "PP0_WB1_GLOBAL_TEST_REF_VALUE,WB1 Global Test Reference Value Register" hexmask.long.word 0x28 0.--15. 1. " GLOBAL_TEST_REF_VAL ,Global test reference value" line.long 0x2C "PP0_WB1_GLOBAL_TEST_CMP_FUNC,WB1 Global Test Compare Function Register" bitfld.long 0x2C 0.--2. " GLOBAL_TEST_CMP_FUNC ,Global test compare function" "Less,Equal,Greater than,?..." group.long 0x300++0x2F line.long 0x00 "PP0_WB2_SOURCE_SELECT,WB2 Source Select Register" bitfld.long 0x00 0.--1. " SOURCE_SELECT ,Tile buffer source for the write-back unit" "None,Z/stencil,ARGB,?..." line.long 0x04 "PP0_WB2_TARGET_ADDR,WB2 Target Address Register" hexmask.long 0x04 3.--31. 0x08 " TARGET_ADDR ,The start address in memory of the target buffer" line.long 0x08 "PP0_WB2_TARGET_PIXEL_FORMAT,WB2 Target Pixel Format Register" bitfld.long 0x08 0.--3. " TARGET_PIXEL_FORMAT ,Pixel format of the target buffer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x0C "PP0_WB2_TARGET_AA_FORMAT,WB2 Target AA Format Register" bitfld.long 0x0C 12.--14. " TARGET_AA_Y ,Log2 of downsampling in y-direction" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 8.--9. " TARGET_AA_X ,Log2 of downsampling in x-direction" "0,1,2,3" bitfld.long 0x0C 0.--2. " TARGET_AA_FORMAT ,AA format" "0,?..." line.long 0x10 "PP0_WB2_TARGET_LAYOUT,WB2 Target Layout" bitfld.long 0x10 0.--1. " TARGET_LAYOUT ,Layout" "Linear,Interleaved,Interl. Blocks,?..." line.long 0x14 "PP0_WB2_TARGET_SCANLINE_LENGTH,WB2 Target Scanline Length" hexmask.long.word 0x14 0.--15. 1. " TARGET_SCANLINE_LEN ,Offset between the beginning of two lines of the target buffer" line.long 0x18 "PP0_WB2_TARGET_FLAGS,WB2 Target Flags Register" bitfld.long 0x18 5. " BIG_ENDIAN ,Big-endian byte order" "Disabled,Enabled" bitfld.long 0x18 4. " DITHER_EN ,Dithering enable" "Disabled,Enabled" bitfld.long 0x18 3. " INV_COMP_ORDER_EN ,Invert the order of the color components" "Disabled,Enabled" textline " " bitfld.long 0x18 2. " SWAP_RED_BLUE_EN ,Swap red and blue components" "Disabled,Enabled" bitfld.long 0x18 1. " BOUNDING_BOX_EN ,Write-back is limited to the rectangular box defined by the BOUNDING_BOX_LEFT_RIGHT and BOUNDING_BOX_BOTTOM registers" "Disabled,Enabled" bitfld.long 0x18 0. " DIRTY_BIT_EN ,Write back to the framebuffer only the pixels written to the tile buffer" "Disabled,Enabled" line.long 0x1C "PP0_WB2_MRT_ENABLE,WB2 MRT Enable Register" bitfld.long 0x1C 3. " MRT_ENABLE[3] ,MRT 3 enable" "Disabled,Enabled" bitfld.long 0x1C 2. " [2] ,MRT 2 enable" "Disabled,Enabled" bitfld.long 0x1C 1. " [1] ,MRT 1 enable" "Disabled,Enabled" textline " " bitfld.long 0x1C 0. " [0] ,MRT 0 enable" "Disabled,Enabled" line.long 0x20 "PP0_WB2_MRT_OFFSET,WB2 MRT Offset Register" hexmask.long 0x20 3.--31. 0x08 " WB2_MRT_OFFSET ,Offset value giving the distance in memory between each MRT" line.long 0x24 "PP0_WB2_GLOBAL_TEST_ENABLE,WB2 Global Test Enable Register" bitfld.long 0x24 0. " GLOBAL_TEST_EN ,Enable global write-back value testing" "Disabled,Enabled" line.long 0x28 "PP0_WB2_GLOBAL_TEST_REF_VALUE,WB2 Global Test Reference Value Register" hexmask.long.word 0x28 0.--15. 1. " GLOBAL_TEST_REF_VAL ,Global test reference value" line.long 0x2C "PP0_WB2_GLOBAL_TEST_CMP_FUNC,WB2 Global Test Compare Function Register" bitfld.long 0x2C 0.--2. " GLOBAL_TEST_CMP_FUNC ,Global test compare function" "Less,Equal,Greater than,?..." textline " " rgroup.long 0x1000++0x03 line.long 0x00 "PP0_VERSION,Version Register" hexmask.long.word 0x00 16.--31. 1. " PRODUCT_ID ,Product ID number" hexmask.long.byte 0x00 8.--15. 1. " VERSION_MAJOR ,These bits provide the major product version information" hexmask.long.byte 0x00 0.--7. 1. " VERSION_MINOR ,These bits provide the minor product version information" group.long 0x1004++0x07 line.long 0x00 "PP0_CURRENT_REND_LIST_ADDR,Current Renderer List Address Register" hexmask.long 0x00 5.--31. 0x20 " CURR_REND_LIST_ADDR ,Address of the current polygon list item being processed" line.long 0x04 "PP0_STATUS,Pixel Processor Status Register" bitfld.long 0x04 7. " CLK_OVERRIDE ,Block level clock gates have been disabled" "No,Yes" bitfld.long 0x04 6. " INTERR_ASSERTED ,Current status of the interrupt request line of the pixel processor" "No interrupt,Interrupt" bitfld.long 0x04 5. " WR_BOUNDARY_ERROR ,Pixel processor attempted to write outside the write boundary set by the WR_BOUNDARY registers" "No error,Error" textline " " bitfld.long 0x04 4. " BUS_STOPPED ,Master bus interface of the pixel processor has been stopped because of a STOP_BUS command or a performance counter limit event" "Not stopped,Stopped" bitfld.long 0x04 3. " BUS_ERROR ,A bus transaction has ended with error" "No error,Error" bitfld.long 0x04 2. " HANG ,Watchdog timer limit reached" "Not reached,Reached" textline " " bitfld.long 0x04 1. " TILE_STOPPED ,Rendering of the current tile has been completed as if it was the last tile of the frame" "Not completed,Completed" bitfld.long 0x04 0. " RENDER_ACTIVE ,The pixel processor is currently active rendering" "Not active,Active" wgroup.long 0x100C++0x03 line.long 0x00 "PP0_CTRL_MGMT,Control Management Register" bitfld.long 0x00 8. " CLK_OVERRIDE ,Disable block level clock gates" "No,Yes" bitfld.long 0x00 7. " SOFT_RESET ,Reset the pixel processor after all outstanding bus-transfers have completed" "No reset,Reset" bitfld.long 0x00 6. " START_RENDERING ,Initiate rendering" "No effect,Start" textline " " bitfld.long 0x00 5. " FORCE_RESET ,Reset the pixel processor, so that it can be brought out of a hang in a reasonably clean manner" "No reset,Reset" bitfld.long 0x00 4. " FORCE_HANG ,Cause the pixel processor to hang" "No hang,Hang" bitfld.long 0x00 3. " FLUSH_CACHES ,Cause all the vertex, RSW and texture caches to be flushed immediately" "No flush,Flush" textline " " bitfld.long 0x00 2. " END_AFTER_TILE ,Cause the renderer to treat a BEGIN-NEW-TILE command as an End-Of-List command" "No,Yes" bitfld.long 0x00 1. " START_BUS ,Reactivate the bus interface after it has been stopped by a STOP_BUS command or a WR_BOUNDARY_LIMIT event" "Not started,Started" bitfld.long 0x00 0. " STOP_BUS ,Cause the bus interface to hold back future transactions on the bus" "Not stopped,Stopped" rgroup.long 0x1010++0x07 line.long 0x00 "PP0_LAST_TILE_POS_START,Last Tile Where Processing Started Register" hexmask.long.byte 0x00 16.--23. 1. " TILEY_START ,The y position of the last file that processing has begun" hexmask.long.byte 0x00 0.--7. 1. " TILEX_START ,The x position of the last file that processing has begun" line.long 0x04 "PP0_LAST_TILE_POS_END,Last Tile Where Processing Completed Register" hexmask.long.byte 0x04 16.--23. 1. " TILEY_END ,The y position of the last tile that processing has ended, that is written back" hexmask.long.byte 0x04 0.--7. 1. " TILEX_END ,The x position of the last tile that processing has ended, that is written back" group.long 0x1020++0x03 line.long 0x00 "PP0_INT_RAWSTAT,Interrupt Rawstat Register" bitfld.long 0x00 12. " RESET_COMPLETED ,Whenever the pixel processor has been successfully reset" "Not completed,Completed" bitfld.long 0x00 11. " CALL_STACK_OVERFLOW ,The polygon list command call has been executed to many times recursively" "No overflow,Overflow" bitfld.long 0x00 10. " CALL_STACK_UNDERFLOW ,The polygon list command return was executed without a call first" "No underflow,Underflow" textline " " bitfld.long 0x00 9. " INV_PLIST_COMMAND ,A command in the polygon list was invalid and rendering could not continue" "No error,Error" bitfld.long 0x00 8. " WR_BOUNDARY_ERROR ,The pixel processor has attempted to write outside the write boundary set by the WR_BOUNDARY registers" "No error,Error" bitfld.long 0x00 7. " CNT_1_LIMIT ,Performance counter PERF_CNT_1 has passed the limit set in PERF_CNT_1_LIMIT" "Not passed,Passed" textline " " bitfld.long 0x00 6. " CNT_0_LIMIT ,Performance counter PERF_CNT_0 has passed the limit set in PERF_CNT_0_LIMIT" "Not passed,Passed" bitfld.long 0x00 5. " BUS_STOP ,The renderer has been stopped by a STOP_BUS command" "Not stopped,Stopped" bitfld.long 0x00 4. " BUS_ERROR ,A bus transaction has ended with error" "No error,Error" textline " " bitfld.long 0x00 3. " FORCE_HANG ,The pixel processor has been forced into an illegal state by the FORCE_HANG command" "Not occurred,Occurred" bitfld.long 0x00 2. " HANG ,Watchdog timer limit reached" "Not reached,Reached" bitfld.long 0x00 1. " END_OF_TILE ,Rendering has been ended by an END_AFTER_TILE command" "Not ended,Ended" textline " " bitfld.long 0x00 0. " END_OF_FRAME ,Rendering has ended by completion of the polygon list" "Not ended,Ended" wgroup.long 0x1024++0x03 line.long 0x00 "PP0_INT_CLEAR,Interrupt Clear Register" bitfld.long 0x00 12. " RESET_COMPLETED ,Whenever the pixel processor has been successfully reset" "Clear,No effect" bitfld.long 0x00 11. " CALL_STACK_OVERFLOW ,The polygon list command call has been executed to many times recursively" "Clear,No effect" bitfld.long 0x00 10. " CALL_STACK_UNDERFLOW ,The polygon list command return was executed without a call first" "Clear,No effect" textline " " bitfld.long 0x00 9. " INV_PLIST_COMMAND ,A command in the polygon list was invalid and rendering could not continue" "Clear,No effect" bitfld.long 0x00 8. " WR_BOUNDARY_ERROR ,The pixel processor has attempted to write outside the write boundary set by the WR_BOUNDARY registers" "Clear,No effect" bitfld.long 0x00 7. " CNT_1_LIMIT ,Performance counter PERF_CNT_1 has passed the limit set in PERF_CNT_1_LIMIT" "Clear,No effect" textline " " bitfld.long 0x00 6. " CNT_0_LIMIT ,Performance counter PERF_CNT_0 has passed the limit set in PERF_CNT_0_LIMIT" "Clear,No effect" bitfld.long 0x00 5. " BUS_STOP ,The renderer has been stopped by a STOP_BUS command" "Clear,No effect" bitfld.long 0x00 4. " BUS_ERROR ,A bus transaction has ended with error" "Clear,No effect" textline " " bitfld.long 0x00 3. " FORCE_HANG ,The pixel processor has been forced into an illegal state by the FORCE_HANG command" "Clear,No effect" bitfld.long 0x00 2. " HANG ,Watchdog timer limit reached" "Clear,No effect" bitfld.long 0x00 1. " END_OF_TILE ,Rendering has been ended by an END_AFTER_TILE command" "Clear,No effect" textline " " bitfld.long 0x00 0. " END_OF_FRAME ,Rendering has ended by completion of the polygon list" "Clear,No effect" group.long 0x1028++0x07 line.long 0x00 "PP0_INT_MASK,Interrupt Mask Register" bitfld.long 0x00 12. " RESET_COMPLETED ,Whenever the pixel processor has been successfully reset" "Masked,Not masked" bitfld.long 0x00 11. " CALL_STACK_OVERFLOW ,The polygon list command call has been executed to many times recursively" "Masked,Not masked" bitfld.long 0x00 10. " CALL_STACK_UNDERFLOW ,The polygon list command return was executed without a call first" "Masked,Not masked" textline " " bitfld.long 0x00 9. " INV_PLIST_COMMAND ,A command in the polygon list was invalid and rendering could not continue" "Masked,Not masked" bitfld.long 0x00 8. " WR_BOUNDARY_ERROR ,The pixel processor has attempted to write outside the write boundary set by the WR_BOUNDARY registers" "Masked,Not masked" bitfld.long 0x00 7. " CNT_1_LIMIT ,Performance counter PERF_CNT_1 has passed the limit set in PERF_CNT_1_LIMIT" "Masked,Not masked" textline " " bitfld.long 0x00 6. " CNT_0_LIMIT ,Performance counter PERF_CNT_0 has passed the limit set in PERF_CNT_0_LIMIT" "Masked,Not masked" bitfld.long 0x00 5. " BUS_STOP ,The renderer has been stopped by a STOP_BUS command" "Masked,Not masked" bitfld.long 0x00 4. " BUS_ERROR ,A bus transaction has ended with error" "Masked,Not masked" textline " " bitfld.long 0x00 3. " FORCE_HANG ,The pixel processor has been forced into an illegal state by the FORCE_HANG command" "Masked,Not masked" bitfld.long 0x00 2. " HANG ,Watchdog timer limit reached" "Masked,Not masked" bitfld.long 0x00 1. " END_OF_TILE ,Rendering has been ended by an END_AFTER_TILE command" "Masked,Not masked" textline " " bitfld.long 0x00 0. " END_OF_FRAME ,Rendering has ended by completion of the polygon list" "Masked,Not masked" line.long 0x04 "PP0_INT_STATUS,Interrupt Status Register" bitfld.long 0x04 12. " RESET_COMPLETED ,Whenever the pixel processor has been successfully reset" "Not completed,Completed" bitfld.long 0x04 11. " CALL_STACK_OVERFLOW ,The polygon list command call has been executed to many times recursively" "No overflow,Overflow" bitfld.long 0x04 10. " CALL_STACK_UNDERFLOW ,The polygon list command return was executed without a call first" "No underflow,Underflow" textline " " bitfld.long 0x04 9. " INV_PLIST_COMMAND ,A command in the polygon list was invalid and rendering could not continue" "No error,Error" bitfld.long 0x04 8. " WR_BOUNDARY_ERR ,The pixel processor has attempted to write outside the write boundary set by the WR_BOUNDARY registers" "No error,Error" bitfld.long 0x04 7. " CNT_1_LIMIT ,Performance counter PERF_CNT_1 has passed the limit set in PERF_CNT_1_LIMIT" "Not passed,Passed" textline " " bitfld.long 0x04 6. " CNT_0_LIMIT ,Performance counter PERF_CNT_0 has passed the limit set in PERF_CNT_0_LIMIT" "Not passed,Passed" bitfld.long 0x04 5. " BUS_STOP ,The renderer has been stopped by a STOP_BUS command" "Not stopped,Stopped" bitfld.long 0x04 4. " BUS_ERROR ,A bus transaction has ended with error" "No error,Error" textline " " bitfld.long 0x04 3. " FORCE_HANG ,The pixel processor has been forced into an illegal state by the FORCE_HANG command" "Not occurred,Occurred" bitfld.long 0x04 2. " HANG ,Watchdog timer limit reached" "Not reached,Reached" bitfld.long 0x04 1. " END_OF_TILE ,Rendering has been ended by an END_AFTER_TILE command" "Not ended,Ended" textline " " bitfld.long 0x04 0. " END_OF_FRAME ,Rendering has ended by completion of the polygon list" "Not ended,Ended" group.long 0x1040++0x0B line.long 0x00 "PP0_WR_BOUNDARY_ENABLE,Write Boundary Enable Register" bitfld.long 0x00 0. " WR_BOUNDARY_EN ,Write boundary enable" "Disabled,Enabled" line.long 0x04 "PP0_WRITE_BOUNDARY_LOW,Write Boundary Low Register" hexmask.long.tbyte 0x04 8.--31. 0x01 " WR_BOUNDARY_LOW ,Address for setting the low write boundary for the renderer" line.long 0x08 "PP0_WRITE_BOUNDARY_HIGH,Write Boundary High Register" hexmask.long.tbyte 0x08 8.--31. 0x01 " WR_BOUNDARY_HIGH ,Address for setting the high write boundary for the renderer" group.long 0x104C++0x07 line.long 0x00 "PP0_WR_BOUNDARY_ADDRESS,Write Boundary Address Register" hexmask.long 0x00 2.--31. 0x04 " WR_BOUNDARY_ADDR ,After a WR_BOUNDARY_ERROR the write address is stored in this location" line.long 0x04 "PP0_BUS_ERROR_STATUS,Bus Error Status Register" bitfld.long 0x04 6.--9. " READ_ERROR_ID ,Id number of read error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 2.--5. " WRITE_ERROR_ID ,Id number of write error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 1. " READ_ERROR ,Indicates a read error" "No error,Error" textline " " bitfld.long 0x04 0. " WRITE_ERROR ,Indicates a write error" "No error,Error" group.long 0x1060++0x07 line.long 0x00 "PP0_WATCHDOG_DISABLE,Watchdog Disable Register" bitfld.long 0x00 0. " WDOG_DIS ,Watchdog disable" "No,Yes" line.long 0x04 "PP0_WATCHDOG_TIMEOUT,Watchdog Timeout Register" group.long 0x1080++0x0F line.long 0x00 "PP0_PERF_CNT_0_ENABLE,Performance Counter 0 Enable Register" bitfld.long 0x00 1. " PERF_CNT_0_LIM_EN ,Activate PERF_CNT_0_LIMIT" "Disabled,Enabled" bitfld.long 0x00 0. " PERF_CNT_0_EN ,Reset performance counter 0 to zero and activate" "Disabled,Enabled" line.long 0x04 "PP0_PERF_CNT_0_SRC,Performance Counter 0 SRC Register" bitfld.long 0x04 0.--5. " PERF_CNT_0_SRC ,Index value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x08 "PP0_PERF_CNT_0_LIMIT,Performance Counter 0 Limit Register" line.long 0x0C "PP0_PERF_CNT_0_VALUE,Performance Counter 0 Value Register" group.long 0x10A0++0x0F line.long 0x00 "PP0_PERF_CNT_1_ENABLE,Performance Counter 1 Enable Register" bitfld.long 0x00 1. " PERF_CNT_1_LIM_EN ,Activate PERF_CNT_1_LIMIT" "Disabled,Enabled" bitfld.long 0x00 0. " PERF_CNT_1_EN ,Reset performance counter 0 to zero and activate" "Disabled,Enabled" line.long 0x04 "PP0_PERF_CNT_1_SRC,Performance Counter 1 SRC Register" bitfld.long 0x04 0.--5. " PERF_CNT_1_SRC ,Index value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x08 "PP0_PERF_CNT_1_LIMIT,Performance Counter 1 Limit Register" line.long 0x0C "PP0_PERF_CNT_1_VALUE,Performance Counter 1 Value Register" group.long 0x10B0++0x07 line.long 0x00 "PP0_PERFMON_CONTR,Performance Monitor Control Register" hexmask.long.word 0x00 16.--25. 1. " NUMBER_TILE_X_DIR ,Number of tiles in the x direction" bitfld.long 0x00 0. " PERFMON_EN ,Performance monitor enable" "Disabled,Enabled" line.long 0x04 "PP0_PERFMON_BASE,Performance Monitor Base Address Register" hexmask.long 0x04 3.--31. 0x08 " PERFMON_BASE ,Performance monitor base address" width 0x0B tree.end tree "PP1" base ad:0xFD4B5000 width 32. group.long 0x00++0x03 line.long 0x00 "PP1_MMU_DTE_ADDR,MMU Current Page Table Address Register" rgroup.long 0x04++0x03 line.long 0x00 "PP1_MMU_STATUS,MMU Status Register" bitfld.long 0x00 6.--10. " MMU_PAGE_FAULT_BUS_ID ,Index of master responsible for last page fault" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 5. " MMU_PAGE_FAULT_IS_WR ,The direction of access for last page fault" "Read,Write" bitfld.long 0x00 4. " MMU_REPLAY_BUF_EMPTY ,The MMU replay buffer is empty" "Not empty,Empty" textline " " bitfld.long 0x00 3. " MMU_IDLE ,The MMU is idle when accesses are being translated and there are no unfinished translated accesses" "Not idle,Idle" bitfld.long 0x00 2. " MMU_STALL_ACTIVE ,MMU stall mode currently enabled" "Disabled,Enabled" bitfld.long 0x00 1. " MMU_PAGE_FAULT_ACTIVE ,MMU page fault mode currently enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " MMU_PAGING_ENABLED ,Paging is enabled" "Disabled,Enabled" wgroup.long 0x08++0x03 line.long 0x00 "PP1_MMU_COMMAND,MMU Command Register" bitfld.long 0x00 0.--2. " CMD ,MMU command" "Enable paging,Disable paging,Enable stall,Disable stall,Zap cache,Page fault done,Force reset,?..." textline " " rgroup.long 0x0C++0x03 line.long 0x00 "PP1_MMU_PAGE_FAULT_ADDR,MMU Logical Address Register" wgroup.long 0x10++0x03 line.long 0x00 "PP1_MMU_ZAP_ONE_LINE,MMU Zap Cache Line Register" group.long 0x14++0x03 line.long 0x00 "PP1_MMU_INT_RAWSTAT,MMU Raw Interrupt Status Register" bitfld.long 0x00 1. " READ_BUS_ERROR ,Read bus error" "No error,Error" bitfld.long 0x00 0. " PAGE_FAULT ,Page fault" "Not occurred,Occurred" wgroup.long 0x18++0x03 line.long 0x00 "PP1_MMU_INT_CLEAR,MMU Interrupt Clear Register" bitfld.long 0x00 1. " READ_BUS_ERROR ,Read bus error interrupt clear" "No effect,Clear" bitfld.long 0x00 0. " PAGE_FAULT ,Page fault interrupt clear" "No effect,Clear" group.long 0x1C++0x03 line.long 0x00 "PP1_MMU_INT_MASK,MMU Interrupt Mask Register" bitfld.long 0x00 1. " READ_BUS_ERROR ,Read bus error interrupt mask" "Not masked,Masked" bitfld.long 0x00 0. " PAGE_FAULT ,Page fault interrupt mask" "Not masked,Masked" rgroup.long 0x20++0x03 line.long 0x00 "PP1_MMU_INT_STATUS,MMU Interrupt Status Register" bitfld.long 0x00 1. " READ_BUS_ERROR ,Read bus error" "No error,Error" bitfld.long 0x00 0. " PAGE_FAULT ,Page fault" "Not occurred,Occurred" base ad:0xFD4BA000 group.long 0x00++0x17 line.long 0x00 "PP1_REND_LIST_ADDR,Renderer List Address Register" hexmask.long 0x00 3.--31. 0x08 " REND_LIST_ADDR ,Start address of the polygon list to use for the frame" line.long 0x04 "PP1_REND_RSW_BASE,Renderer State Word Base Address Register" hexmask.long 0x04 6.--31. 0x40 " REND_RSW_BASE ,Default renderer state word base address" line.long 0x08 "PP1_REND_VERTEX_BASE,Renderer Vertex Base Register" hexmask.long 0x08 6.--31. 0x40 " REND_VERTEX_BASE ,Default vertex bundles base address" line.long 0x0C "PP1_FEATURE_ENABLE,Feature Enable Register" bitfld.long 0x0C 6. " SUMMATE_QUAD_COVER ,Coverage-to-alpha 2x2 fragment quad operation" "Disabled,Enabled" bitfld.long 0x0C 5. " ORIGIN_LOWER_LEFT ,Coordinate system for the screen XY position has its origin in the upper-left corner" "Disabled,Enabled" bitfld.long 0x0C 4. " EARLYZ_DISABLE2 ,Disable the second of two Early-Z mechanisms" "No,Yes" textline " " bitfld.long 0x0C 3. " EARLYZ_DISABLE1 ,Disable the first of two Early-Z mechanisms" "No,Yes" bitfld.long 0x0C 1. " EARLYZ_EN ,Enable the early Z-test mechanism in the rasterizer" "Disabled,Enabled" bitfld.long 0x0C 0. " FP_TILEBUF_EN ,Component format" "8-bit,FP16" line.long 0x10 "PP1_Z_CLEAR_VALUE,Z Clear Value Register" hexmask.long.tbyte 0x10 0.--23. 1. " Z_CLEAR_VAL ,Z tile buffer clear value" line.long 0x14 "PP1_STENCIL_CLEAR_VALUE,Stencil Clear Value Register" hexmask.long.byte 0x14 0.--7. 1. " STENCIL_CLEAR_VAL ,Stencil clear value" if (((d.l(ad:0xFD4BA000+0x0C))&0x01)==0x00) group.long 0x18++0x0F line.long 0x00 "PP1_ABGR_CLEAR_VALUE_0,ABGR Clear Value 0 Register" hexmask.long.byte 0x00 24.--31. 1. " ALPHA_CLEAR_VAL ,Alpha clear value" hexmask.long.byte 0x00 16.--23. 1. " BLUE_CLEAR_VAL ,Blue clear value" hexmask.long.byte 0x00 8.--15. 1. " GREEN_CLEAR_VAL ,Green clear value" textline " " hexmask.long.byte 0x00 0.--7. 1. " RED_CLEAR_VAL ,Red clear value" line.long 0x04 "PP1_ABGR_CLEAR_VALUE_1,ABGR Clear Value 1 Register" hexmask.long.byte 0x04 24.--31. 1. " ALPHA_CLEAR_VAL ,Alpha clear value" hexmask.long.byte 0x04 16.--23. 1. " BLUE_CLEAR_VAL ,Blue clear value" hexmask.long.byte 0x04 8.--15. 1. " GREEN_CLEAR_VAL ,Green clear value" textline " " hexmask.long.byte 0x04 0.--7. 1. " RED_CLEAR_VAL ,Red clear value" line.long 0x08 "PP1_ABGR_CLEAR_VALUE_2,ABGR Clear Value 2 Register" hexmask.long.byte 0x08 24.--31. 1. " ALPHA_CLEAR_VAL ,Alpha clear value" hexmask.long.byte 0x08 16.--23. 1. " BLUE_CLEAR_VAL ,Blue clear value" hexmask.long.byte 0x08 8.--15. 1. " GREEN_CLEAR_VAL ,Green clear value" textline " " hexmask.long.byte 0x08 0.--7. 1. " RED_CLEAR_VAL ,Red clear value" line.long 0x0C "PP1_ABGR_CLEAR_VALUE_2,ABGR Clear Value 2 Register" hexmask.long.byte 0x0C 24.--31. 1. " ALPHA_CLEAR_VAL ,Alpha clear value" hexmask.long.byte 0x0C 16.--23. 1. " BLUE_CLEAR_VAL ,Blue clear value" hexmask.long.byte 0x0C 8.--15. 1. " GREEN_CLEAR_VAL ,Green clear value" textline " " hexmask.long.byte 0x0C 0.--7. 1. " RED_CLEAR_VAL ,Red clear value" else group.long 0x18++0x07 line.long 0x00 "PP1_ABGR_CLEAR_VALUE_0,ABGR Clear Value 0 Register" hexmask.long.byte 0x00 24.--31. 1. " GREEN_CLEAR_VAL ,Green clear value" hexmask.long.byte 0x00 8.--15. 1. " RED_CLEAR_VAL ,Red clear value" textline " " line.long 0x04 "PP1_ABGR_CLEAR_VALUE_1,ABGR Clear Value 1 Register" hexmask.long.byte 0x04 24.--31. 1. " ALPHA_CLEAR_VAL ,Alpha clear value" hexmask.long.byte 0x04 16.--23. 1. " BLUE_CLEAR_VAL ,Blue clear value" textline " " hgroup.long 0x20++0x07 hide.long 0x00 "PP1_ABGR_CLEAR_VALUE_2,ABGR Clear Value 2 Register" textline " " hide.long 0x04 "PP1_ABGR_CLEAR_VALUE_2,ABGR Clear Value 2 Register" textline " " endif group.long 0x28++0x0F line.long 0x00 "PP1_BOUNDING_BOX_LEFT_RIGHT,Bounding Box Left Right Register" bitfld.long 0x00 16.--19. " BOUNDING_BOX_LEFT ,Bits [3:0] of the number of pixels from the left initial framebuffer edge to exclude from write-back" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 0.--13. 1. " BOUNDING_BOX_RIGHT ,The number of pixels from the left initial framebuffer edge - 1 to include in write-back" line.long 0x04 "PP1_BOUNDING_BOX_BOTTOM,Bounding Box Bottom Register" hexmask.long.word 0x04 0.--13. 1. " BOUNDING_BOX_BOTTOM ,The number of pixels from the top initial framebuffer edge, to include in write-back" line.long 0x08 "PP1_FS_STACK_ADDR,FS Stack Address Register" hexmask.long 0x08 6.--31. 0x40 " FS_STACK_ADDR ,Fragment shader stack address" line.long 0x0C "PP1_FS_STACK_SIZE_AND_INIT_VAL,FS Stack Size And Initial Value Register" hexmask.long.word 0x0C 16.--31. 1. " FS_STACK_INIT_VAL ,The initial value of the stack pointer" hexmask.long.word 0x0C 0.--15. 1. " FS_STACK_SIZE ,The fragment shader stack size" group.long 0x40++0x1B line.long 0x00 "PP1_ORIGIN_OFFSET_X,Origin Offset X Register" hexmask.long.word 0x00 0.--15. 1. " ORIGIN_OFFSET_X ,X offset of the screen space coordinate system" line.long 0x04 "PP1_ORIGIN_OFFSET_Y,Origin Offset Y Register" hexmask.long.word 0x04 0.--15. 1. " ORIGIN_OFFSET_Y ,Y offset of the screen space coordinate system" line.long 0x08 "PP1_SUBPIXEL_SPECIFIER,Subpixel Specifier Register" hexmask.long.byte 0x08 0.--7. 1. " ORIGIN_OFFSET_X ,Subpixel specifier" line.long 0x0C "PP1_TIEBREAK_MODE,Tiebreak Mode Register" bitfld.long 0x0C 0.--2. " TIEBREAK_MODE ,Tie break mode" "0,1,2,3,4,5,6,7" line.long 0x10 "PP1_PLIST_CONFIG,Polygon List Format Register" bitfld.long 0x10 28.--29. " LIST_FORMAT ,The polygon list format" "1x1,2x2,4x4,?..." bitfld.long 0x10 16.--21. " SCALE_Y ,Log2 of the number of tiles in the y direction for a supertile" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x10 0.--5. " SCALE_X ,Log2 of the number of tiles in the x direction for a supertile" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x14 "PP1_SCALING_CONFIG,Scaling Register" bitfld.long 0x14 20.--22. " SCALE_Y ,Log2 of the scale factor in y-direction" "0,1,2,3,4,5,6,7" bitfld.long 0x14 16.--18. " SCALE_X ,Log2 of the scale factor in x-direction" "0,1,2,3,4,5,6,7" bitfld.long 0x14 11. " FLIP_DERIV_Y ,Flips the sign of the y derivative" "Not flipped,Flipped" textline " " bitfld.long 0x14 10. " FLIP_FRAGCOORD ,Flips the coordinate system as read by fragcoord" "Not flipped,Flipped" bitfld.long 0x14 9. " FLIP_DITH_MATRIX ,Flips the dithering matrix upside down" "Not flipped,Flipped" bitfld.long 0x14 8. " FLIP_POINT_SPRITES ,Flips the point sprites upside down" "Not flipped,Flipped" textline " " bitfld.long 0x14 3. " DERIV_SCALE_EN ,Enables scaling of the derivative instruction" "Disabled,Enabled" bitfld.long 0x14 2. " FRAGCOORD_SCALE_EN ,Enables inverse scaling of fragcoord values" "Disabled,Enabled" bitfld.long 0x14 1. " DITH_SCALE_EN ,Enables scaling of dithering values" "Disabled,Enabled" textline " " bitfld.long 0x14 0. " POINT_AND_LINE_SCALE_EN ,Enables scaling of point and line sizes" "Disabled,Enabled" line.long 0x18 "PP1_TILEBUFFER_BITS,Tilebuffer Configuration Register" bitfld.long 0x18 12.--15. " TILEBUFFER_A_BITS ,Number of bits allocated to the alpha component in the tilebuffer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 8.--11. " TILEBUFFER_B_BITS ,Number of bits allocated to the blue component in the tilebuffer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 4.--7. " TILEBUFFER_G_BITS ,Number of bits allocated to the green component in the tilebuffer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x18 0.--3. " TILEBUFFER_R_BITS ,Number of bits allocated to the red component in the tilebuffer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " group.long 0x100++0x2F line.long 0x00 "PP1_WB0_SOURCE_SELECT,WB0 Source Select Register" bitfld.long 0x00 0.--1. " SOURCE_SELECT ,Tile buffer source for the write-back unit" "None,Z/stencil,ARGB,?..." line.long 0x04 "PP1_WB0_TARGET_ADDR,WB0 Target Address Register" hexmask.long 0x04 3.--31. 0x08 " TARGET_ADDR ,The start address in memory of the target buffer" line.long 0x08 "PP1_WB0_TARGET_PIXEL_FORMAT,WB0 Target Pixel Format Register" bitfld.long 0x08 0.--3. " TARGET_PIXEL_FORMAT ,Pixel format of the target buffer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x0C "PP1_WB0_TARGET_AA_FORMAT,WB0 Target AA Format Register" bitfld.long 0x0C 12.--14. " TARGET_AA_Y ,Log2 of downsampling in y-direction" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 8.--9. " TARGET_AA_X ,Log2 of downsampling in x-direction" "0,1,2,3" bitfld.long 0x0C 0.--2. " TARGET_AA_FORMAT ,AA format" "0,?..." line.long 0x10 "PP1_WB0_TARGET_LAYOUT,WB0 Target Layout" bitfld.long 0x10 0.--1. " TARGET_LAYOUT ,Layout" "Linear,Interleaved,Interl. Blocks,?..." line.long 0x14 "PP1_WB0_TARGET_SCANLINE_LENGTH,WB0 Target Scanline Length" hexmask.long.word 0x14 0.--15. 1. " TARGET_SCANLINE_LEN ,Offset between the beginning of two lines of the target buffer" line.long 0x18 "PP1_WB0_TARGET_FLAGS,WB0 Target Flags Register" bitfld.long 0x18 5. " BIG_ENDIAN ,Big-endian byte order" "Disabled,Enabled" bitfld.long 0x18 4. " DITHER_EN ,Dithering enable" "Disabled,Enabled" bitfld.long 0x18 3. " INV_COMP_ORDER_EN ,Invert the order of the color components" "Disabled,Enabled" textline " " bitfld.long 0x18 2. " SWAP_RED_BLUE_EN ,Swap red and blue components" "Disabled,Enabled" bitfld.long 0x18 1. " BOUNDING_BOX_EN ,Write-back is limited to the rectangular box defined by the BOUNDING_BOX_LEFT_RIGHT and BOUNDING_BOX_BOTTOM registers" "Disabled,Enabled" bitfld.long 0x18 0. " DIRTY_BIT_EN ,Write back to the framebuffer only the pixels written to the tile buffer" "Disabled,Enabled" line.long 0x1C "PP1_WB0_MRT_ENABLE,WB0 MRT Enable Register" bitfld.long 0x1C 3. " MRT_ENABLE[3] ,MRT 3 enable" "Disabled,Enabled" bitfld.long 0x1C 2. " [2] ,MRT 2 enable" "Disabled,Enabled" bitfld.long 0x1C 1. " [1] ,MRT 1 enable" "Disabled,Enabled" textline " " bitfld.long 0x1C 0. " [0] ,MRT 0 enable" "Disabled,Enabled" line.long 0x20 "PP1_WB0_MRT_OFFSET,WB0 MRT Offset Register" hexmask.long 0x20 3.--31. 0x08 " WB0_MRT_OFFSET ,Offset value giving the distance in memory between each MRT" line.long 0x24 "PP1_WB0_GLOBAL_TEST_ENABLE,WB0 Global Test Enable Register" bitfld.long 0x24 0. " GLOBAL_TEST_EN ,Enable global write-back value testing" "Disabled,Enabled" line.long 0x28 "PP1_WB0_GLOBAL_TEST_REF_VALUE,WB0 Global Test Reference Value Register" hexmask.long.word 0x28 0.--15. 1. " GLOBAL_TEST_REF_VAL ,Global test reference value" line.long 0x2C "PP1_WB0_GLOBAL_TEST_CMP_FUNC,WB0 Global Test Compare Function Register" bitfld.long 0x2C 0.--2. " GLOBAL_TEST_CMP_FUNC ,Global test compare function" "Less,Equal,Greater than,?..." group.long 0x200++0x2F line.long 0x00 "PP1_WB1_SOURCE_SELECT,WB1 Source Select Register" bitfld.long 0x00 0.--1. " SOURCE_SELECT ,Tile buffer source for the write-back unit" "None,Z/stencil,ARGB,?..." line.long 0x04 "PP1_WB1_TARGET_ADDR,WB1 Target Address Register" hexmask.long 0x04 3.--31. 0x08 " TARGET_ADDR ,The start address in memory of the target buffer" line.long 0x08 "PP1_WB1_TARGET_PIXEL_FORMAT,WB1 Target Pixel Format Register" bitfld.long 0x08 0.--3. " TARGET_PIXEL_FORMAT ,Pixel format of the target buffer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x0C "PP1_WB1_TARGET_AA_FORMAT,WB1 Target AA Format Register" bitfld.long 0x0C 12.--14. " TARGET_AA_Y ,Log2 of downsampling in y-direction" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 8.--9. " TARGET_AA_X ,Log2 of downsampling in x-direction" "0,1,2,3" bitfld.long 0x0C 0.--2. " TARGET_AA_FORMAT ,AA format" "0,?..." line.long 0x10 "PP1_WB1_TARGET_LAYOUT,WB1 Target Layout" bitfld.long 0x10 0.--1. " TARGET_LAYOUT ,Layout" "Linear,Interleaved,Interl. Blocks,?..." line.long 0x14 "PP1_WB1_TARGET_SCANLINE_LENGTH,WB1 Target Scanline Length" hexmask.long.word 0x14 0.--15. 1. " TARGET_SCANLINE_LEN ,Offset between the beginning of two lines of the target buffer" line.long 0x18 "PP1_WB1_TARGET_FLAGS,WB1 Target Flags Register" bitfld.long 0x18 5. " BIG_ENDIAN ,Big-endian byte order" "Disabled,Enabled" bitfld.long 0x18 4. " DITHER_EN ,Dithering enable" "Disabled,Enabled" bitfld.long 0x18 3. " INV_COMP_ORDER_EN ,Invert the order of the color components" "Disabled,Enabled" textline " " bitfld.long 0x18 2. " SWAP_RED_BLUE_EN ,Swap red and blue components" "Disabled,Enabled" bitfld.long 0x18 1. " BOUNDING_BOX_EN ,Write-back is limited to the rectangular box defined by the BOUNDING_BOX_LEFT_RIGHT and BOUNDING_BOX_BOTTOM registers" "Disabled,Enabled" bitfld.long 0x18 0. " DIRTY_BIT_EN ,Write back to the framebuffer only the pixels written to the tile buffer" "Disabled,Enabled" line.long 0x1C "PP1_WB1_MRT_ENABLE,WB1 MRT Enable Register" bitfld.long 0x1C 3. " MRT_ENABLE[3] ,MRT 3 enable" "Disabled,Enabled" bitfld.long 0x1C 2. " [2] ,MRT 2 enable" "Disabled,Enabled" bitfld.long 0x1C 1. " [1] ,MRT 1 enable" "Disabled,Enabled" textline " " bitfld.long 0x1C 0. " [0] ,MRT 0 enable" "Disabled,Enabled" line.long 0x20 "PP1_WB1_MRT_OFFSET,WB1 MRT Offset Register" hexmask.long 0x20 3.--31. 0x08 " WB1_MRT_OFFSET ,Offset value giving the distance in memory between each MRT" line.long 0x24 "PP1_WB1_GLOBAL_TEST_ENABLE,WB1 Global Test Enable Register" bitfld.long 0x24 0. " GLOBAL_TEST_EN ,Enable global write-back value testing" "Disabled,Enabled" line.long 0x28 "PP1_WB1_GLOBAL_TEST_REF_VALUE,WB1 Global Test Reference Value Register" hexmask.long.word 0x28 0.--15. 1. " GLOBAL_TEST_REF_VAL ,Global test reference value" line.long 0x2C "PP1_WB1_GLOBAL_TEST_CMP_FUNC,WB1 Global Test Compare Function Register" bitfld.long 0x2C 0.--2. " GLOBAL_TEST_CMP_FUNC ,Global test compare function" "Less,Equal,Greater than,?..." group.long 0x300++0x2F line.long 0x00 "PP1_WB2_SOURCE_SELECT,WB2 Source Select Register" bitfld.long 0x00 0.--1. " SOURCE_SELECT ,Tile buffer source for the write-back unit" "None,Z/stencil,ARGB,?..." line.long 0x04 "PP1_WB2_TARGET_ADDR,WB2 Target Address Register" hexmask.long 0x04 3.--31. 0x08 " TARGET_ADDR ,The start address in memory of the target buffer" line.long 0x08 "PP1_WB2_TARGET_PIXEL_FORMAT,WB2 Target Pixel Format Register" bitfld.long 0x08 0.--3. " TARGET_PIXEL_FORMAT ,Pixel format of the target buffer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x0C "PP1_WB2_TARGET_AA_FORMAT,WB2 Target AA Format Register" bitfld.long 0x0C 12.--14. " TARGET_AA_Y ,Log2 of downsampling in y-direction" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 8.--9. " TARGET_AA_X ,Log2 of downsampling in x-direction" "0,1,2,3" bitfld.long 0x0C 0.--2. " TARGET_AA_FORMAT ,AA format" "0,?..." line.long 0x10 "PP1_WB2_TARGET_LAYOUT,WB2 Target Layout" bitfld.long 0x10 0.--1. " TARGET_LAYOUT ,Layout" "Linear,Interleaved,Interl. Blocks,?..." line.long 0x14 "PP1_WB2_TARGET_SCANLINE_LENGTH,WB2 Target Scanline Length" hexmask.long.word 0x14 0.--15. 1. " TARGET_SCANLINE_LEN ,Offset between the beginning of two lines of the target buffer" line.long 0x18 "PP1_WB2_TARGET_FLAGS,WB2 Target Flags Register" bitfld.long 0x18 5. " BIG_ENDIAN ,Big-endian byte order" "Disabled,Enabled" bitfld.long 0x18 4. " DITHER_EN ,Dithering enable" "Disabled,Enabled" bitfld.long 0x18 3. " INV_COMP_ORDER_EN ,Invert the order of the color components" "Disabled,Enabled" textline " " bitfld.long 0x18 2. " SWAP_RED_BLUE_EN ,Swap red and blue components" "Disabled,Enabled" bitfld.long 0x18 1. " BOUNDING_BOX_EN ,Write-back is limited to the rectangular box defined by the BOUNDING_BOX_LEFT_RIGHT and BOUNDING_BOX_BOTTOM registers" "Disabled,Enabled" bitfld.long 0x18 0. " DIRTY_BIT_EN ,Write back to the framebuffer only the pixels written to the tile buffer" "Disabled,Enabled" line.long 0x1C "PP1_WB2_MRT_ENABLE,WB2 MRT Enable Register" bitfld.long 0x1C 3. " MRT_ENABLE[3] ,MRT 3 enable" "Disabled,Enabled" bitfld.long 0x1C 2. " [2] ,MRT 2 enable" "Disabled,Enabled" bitfld.long 0x1C 1. " [1] ,MRT 1 enable" "Disabled,Enabled" textline " " bitfld.long 0x1C 0. " [0] ,MRT 0 enable" "Disabled,Enabled" line.long 0x20 "PP1_WB2_MRT_OFFSET,WB2 MRT Offset Register" hexmask.long 0x20 3.--31. 0x08 " WB2_MRT_OFFSET ,Offset value giving the distance in memory between each MRT" line.long 0x24 "PP1_WB2_GLOBAL_TEST_ENABLE,WB2 Global Test Enable Register" bitfld.long 0x24 0. " GLOBAL_TEST_EN ,Enable global write-back value testing" "Disabled,Enabled" line.long 0x28 "PP1_WB2_GLOBAL_TEST_REF_VALUE,WB2 Global Test Reference Value Register" hexmask.long.word 0x28 0.--15. 1. " GLOBAL_TEST_REF_VAL ,Global test reference value" line.long 0x2C "PP1_WB2_GLOBAL_TEST_CMP_FUNC,WB2 Global Test Compare Function Register" bitfld.long 0x2C 0.--2. " GLOBAL_TEST_CMP_FUNC ,Global test compare function" "Less,Equal,Greater than,?..." textline " " rgroup.long 0x1000++0x03 line.long 0x00 "PP1_VERSION,Version Register" hexmask.long.word 0x00 16.--31. 1. " PRODUCT_ID ,Product ID number" hexmask.long.byte 0x00 8.--15. 1. " VERSION_MAJOR ,These bits provide the major product version information" hexmask.long.byte 0x00 0.--7. 1. " VERSION_MINOR ,These bits provide the minor product version information" group.long 0x1004++0x07 line.long 0x00 "PP1_CURRENT_REND_LIST_ADDR,Current Renderer List Address Register" hexmask.long 0x00 5.--31. 0x20 " CURR_REND_LIST_ADDR ,Address of the current polygon list item being processed" line.long 0x04 "PP1_STATUS,Pixel Processor Status Register" bitfld.long 0x04 7. " CLK_OVERRIDE ,Block level clock gates have been disabled" "No,Yes" bitfld.long 0x04 6. " INTERR_ASSERTED ,Current status of the interrupt request line of the pixel processor" "No interrupt,Interrupt" bitfld.long 0x04 5. " WR_BOUNDARY_ERROR ,Pixel processor attempted to write outside the write boundary set by the WR_BOUNDARY registers" "No error,Error" textline " " bitfld.long 0x04 4. " BUS_STOPPED ,Master bus interface of the pixel processor has been stopped because of a STOP_BUS command or a performance counter limit event" "Not stopped,Stopped" bitfld.long 0x04 3. " BUS_ERROR ,A bus transaction has ended with error" "No error,Error" bitfld.long 0x04 2. " HANG ,Watchdog timer limit reached" "Not reached,Reached" textline " " bitfld.long 0x04 1. " TILE_STOPPED ,Rendering of the current tile has been completed as if it was the last tile of the frame" "Not completed,Completed" bitfld.long 0x04 0. " RENDER_ACTIVE ,The pixel processor is currently active rendering" "Not active,Active" wgroup.long 0x100C++0x03 line.long 0x00 "PP1_CTRL_MGMT,Control Management Register" bitfld.long 0x00 8. " CLK_OVERRIDE ,Disable block level clock gates" "No,Yes" bitfld.long 0x00 7. " SOFT_RESET ,Reset the pixel processor after all outstanding bus-transfers have completed" "No reset,Reset" bitfld.long 0x00 6. " START_RENDERING ,Initiate rendering" "No effect,Start" textline " " bitfld.long 0x00 5. " FORCE_RESET ,Reset the pixel processor, so that it can be brought out of a hang in a reasonably clean manner" "No reset,Reset" bitfld.long 0x00 4. " FORCE_HANG ,Cause the pixel processor to hang" "No hang,Hang" bitfld.long 0x00 3. " FLUSH_CACHES ,Cause all the vertex, RSW and texture caches to be flushed immediately" "No flush,Flush" textline " " bitfld.long 0x00 2. " END_AFTER_TILE ,Cause the renderer to treat a BEGIN-NEW-TILE command as an End-Of-List command" "No,Yes" bitfld.long 0x00 1. " START_BUS ,Reactivate the bus interface after it has been stopped by a STOP_BUS command or a WR_BOUNDARY_LIMIT event" "Not started,Started" bitfld.long 0x00 0. " STOP_BUS ,Cause the bus interface to hold back future transactions on the bus" "Not stopped,Stopped" rgroup.long 0x1010++0x07 line.long 0x00 "PP1_LAST_TILE_POS_START,Last Tile Where Processing Started Register" hexmask.long.byte 0x00 16.--23. 1. " TILEY_START ,The y position of the last file that processing has begun" hexmask.long.byte 0x00 0.--7. 1. " TILEX_START ,The x position of the last file that processing has begun" line.long 0x04 "PP1_LAST_TILE_POS_END,Last Tile Where Processing Completed Register" hexmask.long.byte 0x04 16.--23. 1. " TILEY_END ,The y position of the last tile that processing has ended, that is written back" hexmask.long.byte 0x04 0.--7. 1. " TILEX_END ,The x position of the last tile that processing has ended, that is written back" group.long 0x1020++0x03 line.long 0x00 "PP1_INT_RAWSTAT,Interrupt Rawstat Register" bitfld.long 0x00 12. " RESET_COMPLETED ,Whenever the pixel processor has been successfully reset" "Not completed,Completed" bitfld.long 0x00 11. " CALL_STACK_OVERFLOW ,The polygon list command call has been executed to many times recursively" "No overflow,Overflow" bitfld.long 0x00 10. " CALL_STACK_UNDERFLOW ,The polygon list command return was executed without a call first" "No underflow,Underflow" textline " " bitfld.long 0x00 9. " INV_PLIST_COMMAND ,A command in the polygon list was invalid and rendering could not continue" "No error,Error" bitfld.long 0x00 8. " WR_BOUNDARY_ERROR ,The pixel processor has attempted to write outside the write boundary set by the WR_BOUNDARY registers" "No error,Error" bitfld.long 0x00 7. " CNT_1_LIMIT ,Performance counter PERF_CNT_1 has passed the limit set in PERF_CNT_1_LIMIT" "Not passed,Passed" textline " " bitfld.long 0x00 6. " CNT_0_LIMIT ,Performance counter PERF_CNT_0 has passed the limit set in PERF_CNT_0_LIMIT" "Not passed,Passed" bitfld.long 0x00 5. " BUS_STOP ,The renderer has been stopped by a STOP_BUS command" "Not stopped,Stopped" bitfld.long 0x00 4. " BUS_ERROR ,A bus transaction has ended with error" "No error,Error" textline " " bitfld.long 0x00 3. " FORCE_HANG ,The pixel processor has been forced into an illegal state by the FORCE_HANG command" "Not occurred,Occurred" bitfld.long 0x00 2. " HANG ,Watchdog timer limit reached" "Not reached,Reached" bitfld.long 0x00 1. " END_OF_TILE ,Rendering has been ended by an END_AFTER_TILE command" "Not ended,Ended" textline " " bitfld.long 0x00 0. " END_OF_FRAME ,Rendering has ended by completion of the polygon list" "Not ended,Ended" wgroup.long 0x1024++0x03 line.long 0x00 "PP1_INT_CLEAR,Interrupt Clear Register" bitfld.long 0x00 12. " RESET_COMPLETED ,Whenever the pixel processor has been successfully reset" "Clear,No effect" bitfld.long 0x00 11. " CALL_STACK_OVERFLOW ,The polygon list command call has been executed to many times recursively" "Clear,No effect" bitfld.long 0x00 10. " CALL_STACK_UNDERFLOW ,The polygon list command return was executed without a call first" "Clear,No effect" textline " " bitfld.long 0x00 9. " INV_PLIST_COMMAND ,A command in the polygon list was invalid and rendering could not continue" "Clear,No effect" bitfld.long 0x00 8. " WR_BOUNDARY_ERROR ,The pixel processor has attempted to write outside the write boundary set by the WR_BOUNDARY registers" "Clear,No effect" bitfld.long 0x00 7. " CNT_1_LIMIT ,Performance counter PERF_CNT_1 has passed the limit set in PERF_CNT_1_LIMIT" "Clear,No effect" textline " " bitfld.long 0x00 6. " CNT_0_LIMIT ,Performance counter PERF_CNT_0 has passed the limit set in PERF_CNT_0_LIMIT" "Clear,No effect" bitfld.long 0x00 5. " BUS_STOP ,The renderer has been stopped by a STOP_BUS command" "Clear,No effect" bitfld.long 0x00 4. " BUS_ERROR ,A bus transaction has ended with error" "Clear,No effect" textline " " bitfld.long 0x00 3. " FORCE_HANG ,The pixel processor has been forced into an illegal state by the FORCE_HANG command" "Clear,No effect" bitfld.long 0x00 2. " HANG ,Watchdog timer limit reached" "Clear,No effect" bitfld.long 0x00 1. " END_OF_TILE ,Rendering has been ended by an END_AFTER_TILE command" "Clear,No effect" textline " " bitfld.long 0x00 0. " END_OF_FRAME ,Rendering has ended by completion of the polygon list" "Clear,No effect" group.long 0x1028++0x07 line.long 0x00 "PP1_INT_MASK,Interrupt Mask Register" bitfld.long 0x00 12. " RESET_COMPLETED ,Whenever the pixel processor has been successfully reset" "Masked,Not masked" bitfld.long 0x00 11. " CALL_STACK_OVERFLOW ,The polygon list command call has been executed to many times recursively" "Masked,Not masked" bitfld.long 0x00 10. " CALL_STACK_UNDERFLOW ,The polygon list command return was executed without a call first" "Masked,Not masked" textline " " bitfld.long 0x00 9. " INV_PLIST_COMMAND ,A command in the polygon list was invalid and rendering could not continue" "Masked,Not masked" bitfld.long 0x00 8. " WR_BOUNDARY_ERROR ,The pixel processor has attempted to write outside the write boundary set by the WR_BOUNDARY registers" "Masked,Not masked" bitfld.long 0x00 7. " CNT_1_LIMIT ,Performance counter PERF_CNT_1 has passed the limit set in PERF_CNT_1_LIMIT" "Masked,Not masked" textline " " bitfld.long 0x00 6. " CNT_0_LIMIT ,Performance counter PERF_CNT_0 has passed the limit set in PERF_CNT_0_LIMIT" "Masked,Not masked" bitfld.long 0x00 5. " BUS_STOP ,The renderer has been stopped by a STOP_BUS command" "Masked,Not masked" bitfld.long 0x00 4. " BUS_ERROR ,A bus transaction has ended with error" "Masked,Not masked" textline " " bitfld.long 0x00 3. " FORCE_HANG ,The pixel processor has been forced into an illegal state by the FORCE_HANG command" "Masked,Not masked" bitfld.long 0x00 2. " HANG ,Watchdog timer limit reached" "Masked,Not masked" bitfld.long 0x00 1. " END_OF_TILE ,Rendering has been ended by an END_AFTER_TILE command" "Masked,Not masked" textline " " bitfld.long 0x00 0. " END_OF_FRAME ,Rendering has ended by completion of the polygon list" "Masked,Not masked" line.long 0x04 "PP1_INT_STATUS,Interrupt Status Register" bitfld.long 0x04 12. " RESET_COMPLETED ,Whenever the pixel processor has been successfully reset" "Not completed,Completed" bitfld.long 0x04 11. " CALL_STACK_OVERFLOW ,The polygon list command call has been executed to many times recursively" "No overflow,Overflow" bitfld.long 0x04 10. " CALL_STACK_UNDERFLOW ,The polygon list command return was executed without a call first" "No underflow,Underflow" textline " " bitfld.long 0x04 9. " INV_PLIST_COMMAND ,A command in the polygon list was invalid and rendering could not continue" "No error,Error" bitfld.long 0x04 8. " WR_BOUNDARY_ERR ,The pixel processor has attempted to write outside the write boundary set by the WR_BOUNDARY registers" "No error,Error" bitfld.long 0x04 7. " CNT_1_LIMIT ,Performance counter PERF_CNT_1 has passed the limit set in PERF_CNT_1_LIMIT" "Not passed,Passed" textline " " bitfld.long 0x04 6. " CNT_0_LIMIT ,Performance counter PERF_CNT_0 has passed the limit set in PERF_CNT_0_LIMIT" "Not passed,Passed" bitfld.long 0x04 5. " BUS_STOP ,The renderer has been stopped by a STOP_BUS command" "Not stopped,Stopped" bitfld.long 0x04 4. " BUS_ERROR ,A bus transaction has ended with error" "No error,Error" textline " " bitfld.long 0x04 3. " FORCE_HANG ,The pixel processor has been forced into an illegal state by the FORCE_HANG command" "Not occurred,Occurred" bitfld.long 0x04 2. " HANG ,Watchdog timer limit reached" "Not reached,Reached" bitfld.long 0x04 1. " END_OF_TILE ,Rendering has been ended by an END_AFTER_TILE command" "Not ended,Ended" textline " " bitfld.long 0x04 0. " END_OF_FRAME ,Rendering has ended by completion of the polygon list" "Not ended,Ended" group.long 0x1040++0x0B line.long 0x00 "PP1_WR_BOUNDARY_ENABLE,Write Boundary Enable Register" bitfld.long 0x00 0. " WR_BOUNDARY_EN ,Write boundary enable" "Disabled,Enabled" line.long 0x04 "PP1_WRITE_BOUNDARY_LOW,Write Boundary Low Register" hexmask.long.tbyte 0x04 8.--31. 0x01 " WR_BOUNDARY_LOW ,Address for setting the low write boundary for the renderer" line.long 0x08 "PP1_WRITE_BOUNDARY_HIGH,Write Boundary High Register" hexmask.long.tbyte 0x08 8.--31. 0x01 " WR_BOUNDARY_HIGH ,Address for setting the high write boundary for the renderer" group.long 0x104C++0x07 line.long 0x00 "PP1_WR_BOUNDARY_ADDRESS,Write Boundary Address Register" hexmask.long 0x00 2.--31. 0x04 " WR_BOUNDARY_ADDR ,After a WR_BOUNDARY_ERROR the write address is stored in this location" line.long 0x04 "PP1_BUS_ERROR_STATUS,Bus Error Status Register" bitfld.long 0x04 6.--9. " READ_ERROR_ID ,Id number of read error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 2.--5. " WRITE_ERROR_ID ,Id number of write error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 1. " READ_ERROR ,Indicates a read error" "No error,Error" textline " " bitfld.long 0x04 0. " WRITE_ERROR ,Indicates a write error" "No error,Error" group.long 0x1060++0x07 line.long 0x00 "PP1_WATCHDOG_DISABLE,Watchdog Disable Register" bitfld.long 0x00 0. " WDOG_DIS ,Watchdog disable" "No,Yes" line.long 0x04 "PP1_WATCHDOG_TIMEOUT,Watchdog Timeout Register" group.long 0x1080++0x0F line.long 0x00 "PP1_PERF_CNT_0_ENABLE,Performance Counter 0 Enable Register" bitfld.long 0x00 1. " PERF_CNT_0_LIM_EN ,Activate PERF_CNT_0_LIMIT" "Disabled,Enabled" bitfld.long 0x00 0. " PERF_CNT_0_EN ,Reset performance counter 0 to zero and activate" "Disabled,Enabled" line.long 0x04 "PP1_PERF_CNT_0_SRC,Performance Counter 0 SRC Register" bitfld.long 0x04 0.--5. " PERF_CNT_0_SRC ,Index value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x08 "PP1_PERF_CNT_0_LIMIT,Performance Counter 0 Limit Register" line.long 0x0C "PP1_PERF_CNT_0_VALUE,Performance Counter 0 Value Register" group.long 0x10A0++0x0F line.long 0x00 "PP1_PERF_CNT_1_ENABLE,Performance Counter 1 Enable Register" bitfld.long 0x00 1. " PERF_CNT_1_LIM_EN ,Activate PERF_CNT_1_LIMIT" "Disabled,Enabled" bitfld.long 0x00 0. " PERF_CNT_1_EN ,Reset performance counter 0 to zero and activate" "Disabled,Enabled" line.long 0x04 "PP1_PERF_CNT_1_SRC,Performance Counter 1 SRC Register" bitfld.long 0x04 0.--5. " PERF_CNT_1_SRC ,Index value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x08 "PP1_PERF_CNT_1_LIMIT,Performance Counter 1 Limit Register" line.long 0x0C "PP1_PERF_CNT_1_VALUE,Performance Counter 1 Value Register" group.long 0x10B0++0x07 line.long 0x00 "PP1_PERFMON_CONTR,Performance Monitor Control Register" hexmask.long.word 0x00 16.--25. 1. " NUMBER_TILE_X_DIR ,Number of tiles in the x direction" bitfld.long 0x00 0. " PERFMON_EN ,Performance monitor enable" "Disabled,Enabled" line.long 0x04 "PP1_PERFMON_BASE,Performance Monitor Base Address Register" hexmask.long 0x04 3.--31. 0x08 " PERFMON_BASE ,Performance monitor base address" width 0x0B tree.end tree.end tree "I2C (Inter Integrated Circuit)" tree "I2C0" base ad:0xFF020000 width 26. if (((d.w(ad:0xFF020000))&0x02)==0x02) group.word 0x00++0x01 line.word 0x00 "CONTROL_REG0,Control Register" bitfld.word 0x00 14.--15. " DIVISOR_A ,Divisor for stage A clock divider" "/1,/2,/3,/4" bitfld.word 0x00 8.--13. " DIVISOR_B ,Divisor for stage B clock divider" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32,/33,/34,/35,/36,/37,/38,/39,/40,/41,/42,/43,/44,/45,/46,/47,/48,/49,/50,/51,/52,/53,/54,/55,/56,/57,/58,/59,/60,/61,/62,/63,/64" bitfld.word 0x00 6. " CLR_FIFO ,Clear FIFO" "No effect,Clear" textline " " bitfld.word 0x00 5. " SLVMON ,Slave monitor mode" "Normal,Monitor" bitfld.word 0x00 4. " HOLD ,Hold bus" "No hold,Hold" bitfld.word 0x00 3. " ACKEN ,Acknowledge enable" "Disabled,Enabled" textline " " bitfld.word 0x00 2. " NEA ,Addressing mode" ",Normal" bitfld.word 0x00 1. " MS ,Overall interface mode" "Slave,Master" bitfld.word 0x00 0. " RW ,Direction of transfer" "Transmitter,Receiver" else group.word 0x00++0x01 line.word 0x00 "CONTROL_REG0,Control Register" bitfld.word 0x00 14.--15. " DIVISOR_A ,Divisor for stage A clock divider" "/1,/2,/3,/4" bitfld.word 0x00 8.--13. " DIVISOR_B ,Divisor for stage B clock divider" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32,/33,/34,/35,/36,/37,/38,/39,/40,/41,/42,/43,/44,/45,/46,/47,/48,/49,/50,/51,/52,/53,/54,/55,/56,/57,/58,/59,/60,/61,/62,/63,/64" bitfld.word 0x00 6. " CLR_FIFO ,Clear FIFO" "No effect,Clear" textline " " bitfld.word 0x00 5. " SLVMON ,Slave monitor mode" "Normal,Monitor" bitfld.word 0x00 4. " HOLD ,Hold bus" "No hold,Hold" bitfld.word 0x00 3. " ACKEN ,Acknowledge enable" "Disabled,Enabled" textline " " textfld " " bitfld.word 0x00 1. " MS ,Overall interface mode" "Slave,Master" endif rgroup.word 0x04++0x01 line.word 0x00 "STATUS_REG0,Status Register 0" bitfld.word 0x00 8. " BA ,Bus active" "Inactive,Active" bitfld.word 0x00 7. " RXOVF ,Receiver overflow" "No overflow,Overflow" bitfld.word 0x00 6. " TXDV ,Transmit data valid" "Invalid,Valid" textline " " bitfld.word 0x00 5. " RXDV ,Receiver data valid" "Invalid,Valid" bitfld.word 0x00 3. " RXRW ,RX read write" "Disabled,Enabled" group.word 0x08++0x01 line.word 0x00 "I2C_ADDRESS_REG0,IIC Address Register" hexmask.word 0x00 0.--9. 0x01 " ADD ,Address" hgroup.word 0x0C++0x01 hide.word 0x00 "I2C_DATA_REG0,IIC Data Register" rgroup.word 0x10++0x01 line.word 0x00 "INTERRUPT_STATUS_REG0,IIC Interrupt Status Register" bitfld.word 0x00 9. " ARB_LOST ,Arbitration lost" "Not lost,Lost" bitfld.word 0x00 7. " RX_UNF ,FIFO receive underflow" "No underflow,Underflow" bitfld.word 0x00 6. " TX_OVF ,FIFO transmit overflow" "No overflow,Overflow" textline " " bitfld.word 0x00 5. " RX_OVF ,Receive overflow" "No overflow,Overflow" bitfld.word 0x00 4. " SLV_RDY ,Monitored slave ready" "Not ready,Ready" bitfld.word 0x00 3. " TO ,Transfer time out" "Not timeout,Timeout" textline " " bitfld.word 0x00 2. " NACK ,Transfer not acknowledged" "Acknowledged,Not acknowledged" bitfld.word 0x00 1. " DATA ,More data" "No,Yes" bitfld.word 0x00 0. " COMP ,Transfer complete" "Not completed,Completed" group.byte 0x14++0x00 line.byte 0x00 "TRANSFER_SIZE_REG0,Transfer Size Register" group.byte 0x18++0x00 line.byte 0x00 "SLAVE_MON_PAUSE_REG0,Slave Monitor Pause Register" bitfld.byte 0x00 0.--3. " PAUSE ,Pause interval" "0,1,2,3,4,5,6,7,?..." group.byte 0x1C++0x00 line.byte 0x00 "TIME_OUT_REG0,Time Out Register" group.word 0x20++0x01 line.word 0x00 "INTRPT_MASK_REG0_SET/CLR,Interrupt Mask Register" setclrfld.word 0x00 9. 0x08 9. 0x04 9. " ARB_LOST ,Arbitration lost" "Not masked,Masked" setclrfld.word 0x00 7. 0x08 7. 0x04 7. " RX_UNF ,FIFO receive underflow" "Not masked,Masked" setclrfld.word 0x00 6. 0x08 6. 0x04 6. " TX_OVF ,FIFO transmit overflow" "Not masked,Masked" textline " " setclrfld.word 0x00 5. 0x08 5. 0x04 5. " RX_OVF ,Receive overflow" "Not masked,Masked" setclrfld.word 0x00 4. 0x08 4. 0x04 4. " SLV_RDY ,Monitored slave ready" "Not masked,Masked" setclrfld.word 0x00 3. 0x08 3. 0x04 3. " TO ,Transfer time out" "Not masked,Masked" textline " " setclrfld.word 0x00 2. 0x08 2. 0x04 2. " NACK ,Transfer not acknowledged" "Not masked,Masked" setclrfld.word 0x00 1. 0x08 1. 0x04 1. " DATA ,More data" "Not masked,Masked" setclrfld.word 0x00 0. 0x08 0. 0x04 0. " COMP ,Transfer complete" "Not masked,Masked" group.word 0x2C++0x01 line.word 0x00 "GLITCH_FILTER_REG,Glitch Filter Control Register" bitfld.word 0x00 0.--3. " GF ,Length of the glitch filter shift register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" width 0x0B tree.end tree "I2C1" base ad:0xFF030000 width 26. if (((d.w(ad:0xFF030000))&0x02)==0x02) group.word 0x00++0x01 line.word 0x00 "CONTROL_REG0,Control Register" bitfld.word 0x00 14.--15. " DIVISOR_A ,Divisor for stage A clock divider" "/1,/2,/3,/4" bitfld.word 0x00 8.--13. " DIVISOR_B ,Divisor for stage B clock divider" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32,/33,/34,/35,/36,/37,/38,/39,/40,/41,/42,/43,/44,/45,/46,/47,/48,/49,/50,/51,/52,/53,/54,/55,/56,/57,/58,/59,/60,/61,/62,/63,/64" bitfld.word 0x00 6. " CLR_FIFO ,Clear FIFO" "No effect,Clear" textline " " bitfld.word 0x00 5. " SLVMON ,Slave monitor mode" "Normal,Monitor" bitfld.word 0x00 4. " HOLD ,Hold bus" "No hold,Hold" bitfld.word 0x00 3. " ACKEN ,Acknowledge enable" "Disabled,Enabled" textline " " bitfld.word 0x00 2. " NEA ,Addressing mode" ",Normal" bitfld.word 0x00 1. " MS ,Overall interface mode" "Slave,Master" bitfld.word 0x00 0. " RW ,Direction of transfer" "Transmitter,Receiver" else group.word 0x00++0x01 line.word 0x00 "CONTROL_REG0,Control Register" bitfld.word 0x00 14.--15. " DIVISOR_A ,Divisor for stage A clock divider" "/1,/2,/3,/4" bitfld.word 0x00 8.--13. " DIVISOR_B ,Divisor for stage B clock divider" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32,/33,/34,/35,/36,/37,/38,/39,/40,/41,/42,/43,/44,/45,/46,/47,/48,/49,/50,/51,/52,/53,/54,/55,/56,/57,/58,/59,/60,/61,/62,/63,/64" bitfld.word 0x00 6. " CLR_FIFO ,Clear FIFO" "No effect,Clear" textline " " bitfld.word 0x00 5. " SLVMON ,Slave monitor mode" "Normal,Monitor" bitfld.word 0x00 4. " HOLD ,Hold bus" "No hold,Hold" bitfld.word 0x00 3. " ACKEN ,Acknowledge enable" "Disabled,Enabled" textline " " textfld " " bitfld.word 0x00 1. " MS ,Overall interface mode" "Slave,Master" endif rgroup.word 0x04++0x01 line.word 0x00 "STATUS_REG0,Status Register 0" bitfld.word 0x00 8. " BA ,Bus active" "Inactive,Active" bitfld.word 0x00 7. " RXOVF ,Receiver overflow" "No overflow,Overflow" bitfld.word 0x00 6. " TXDV ,Transmit data valid" "Invalid,Valid" textline " " bitfld.word 0x00 5. " RXDV ,Receiver data valid" "Invalid,Valid" bitfld.word 0x00 3. " RXRW ,RX read write" "Disabled,Enabled" group.word 0x08++0x01 line.word 0x00 "I2C_ADDRESS_REG0,IIC Address Register" hexmask.word 0x00 0.--9. 0x01 " ADD ,Address" hgroup.word 0x0C++0x01 hide.word 0x00 "I2C_DATA_REG0,IIC Data Register" rgroup.word 0x10++0x01 line.word 0x00 "INTERRUPT_STATUS_REG0,IIC Interrupt Status Register" bitfld.word 0x00 9. " ARB_LOST ,Arbitration lost" "Not lost,Lost" bitfld.word 0x00 7. " RX_UNF ,FIFO receive underflow" "No underflow,Underflow" bitfld.word 0x00 6. " TX_OVF ,FIFO transmit overflow" "No overflow,Overflow" textline " " bitfld.word 0x00 5. " RX_OVF ,Receive overflow" "No overflow,Overflow" bitfld.word 0x00 4. " SLV_RDY ,Monitored slave ready" "Not ready,Ready" bitfld.word 0x00 3. " TO ,Transfer time out" "Not timeout,Timeout" textline " " bitfld.word 0x00 2. " NACK ,Transfer not acknowledged" "Acknowledged,Not acknowledged" bitfld.word 0x00 1. " DATA ,More data" "No,Yes" bitfld.word 0x00 0. " COMP ,Transfer complete" "Not completed,Completed" group.byte 0x14++0x00 line.byte 0x00 "TRANSFER_SIZE_REG0,Transfer Size Register" group.byte 0x18++0x00 line.byte 0x00 "SLAVE_MON_PAUSE_REG0,Slave Monitor Pause Register" bitfld.byte 0x00 0.--3. " PAUSE ,Pause interval" "0,1,2,3,4,5,6,7,?..." group.byte 0x1C++0x00 line.byte 0x00 "TIME_OUT_REG0,Time Out Register" group.word 0x20++0x01 line.word 0x00 "INTRPT_MASK_REG0_SET/CLR,Interrupt Mask Register" setclrfld.word 0x00 9. 0x08 9. 0x04 9. " ARB_LOST ,Arbitration lost" "Not masked,Masked" setclrfld.word 0x00 7. 0x08 7. 0x04 7. " RX_UNF ,FIFO receive underflow" "Not masked,Masked" setclrfld.word 0x00 6. 0x08 6. 0x04 6. " TX_OVF ,FIFO transmit overflow" "Not masked,Masked" textline " " setclrfld.word 0x00 5. 0x08 5. 0x04 5. " RX_OVF ,Receive overflow" "Not masked,Masked" setclrfld.word 0x00 4. 0x08 4. 0x04 4. " SLV_RDY ,Monitored slave ready" "Not masked,Masked" setclrfld.word 0x00 3. 0x08 3. 0x04 3. " TO ,Transfer time out" "Not masked,Masked" textline " " setclrfld.word 0x00 2. 0x08 2. 0x04 2. " NACK ,Transfer not acknowledged" "Not masked,Masked" setclrfld.word 0x00 1. 0x08 1. 0x04 1. " DATA ,More data" "Not masked,Masked" setclrfld.word 0x00 0. 0x08 0. 0x04 0. " COMP ,Transfer complete" "Not masked,Masked" group.word 0x2C++0x01 line.word 0x00 "GLITCH_FILTER_REG,Glitch Filter Control Register" bitfld.word 0x00 0.--3. " GF ,Length of the glitch filter shift register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" width 0x0B tree.end tree.end tree "IOU_GPV (IOU GPV Module)" base ad:0xFE000000 width 29. rgroup.long 0x1FD0++0x03 line.long 0x00 "PERIPH_ID_4,Peripherial ID Register 4" hexmask.long.byte 0x00 0.--7. 1. " PERIPH_ID_4 ,4KB count, JEP106 continuation code" rgroup.long 0x1FE0++0x1F line.long 0x00 "PERIPH_ID_0,Peripherial ID Register 0" hexmask.long.byte 0x00 0.--7. 1. " PERIPH_ID_0 ,Part number [7:0]" line.long 0x04 "PERIPH_ID_1,Peripherial ID Register 1" hexmask.long.byte 0x04 0.--7. 1. " PERIPH_ID_1 ,JEP106[3:0], part number [11:8]" line.long 0x08 "PERIPH_ID_2,Peripherial ID Register 2" hexmask.long.byte 0x08 0.--7. 1. " PERIPH_ID_2 ,Revision, JEP106 code flag, JEP106[6:4]" line.long 0x0C "PERIPH_ID_3,Peripherial ID Register 3" bitfld.long 0x0C 4.--7. " REV_AND ,Revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 0.--3. " CUST_MOD_NUM ,Customer modified number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x10 "COMP_ID_0,Component ID Register 0" hexmask.long.byte 0x10 0.--7. 1. " COMP_ID_0 ,Preamble" line.long 0x14 "COMP_ID_1,Component ID Register 1" hexmask.long.byte 0x14 0.--7. 1. " COMP_ID_1 ,Generic IP component class, preamble" line.long 0x18 "COMP_ID_2,Component ID Register 2" hexmask.long.byte 0x18 0.--7. 1. " COMP_ID_2 ,Preamble" line.long 0x1C "COMP_ID_3,Component ID Register 3" hexmask.long.byte 0x1C 0.--7. 1. " COMP_ID_3 ,Preamble" group.long 0x2008++0x03 line.long 0x00 "INTIOU_INTLPD_FN_MOD_ISS_BM,Bus Matrix Issuing Functionality Modification Register" bitfld.long 0x00 0.--1. " FN_MOD_ISS_BM ,Bus matrix issuing functionality modification" "0,1,2,3" group.long 0x7008++0x03 line.long 0x00 "APB_NS_0_IB_FN_MOD_ISS_BM,Bus Matrix Issuing Functionality Modification Register" bitfld.long 0x00 0.--1. " FN_MOD_ISS_BM ,Bus matrix issuing functionality modification" "0,1,2,3" group.long 0x8008++0x03 line.long 0x00 "APB_NS_1_IB_FN_MOD_ISS_BM,Bus Matrix Issuing Functionality Modification Register" bitfld.long 0x00 0.--1. " FN_MOD_ISS_BM ,Bus matrix issuing functionality modification" "0,1,2,3" group.long (0x42000+0x108)++0x27 line.long 0x00 "INTLPD_INTIOU_FN_MOD,Issuing Functionality Modification Register" bitfld.long 0x00 1. " FN_MOD[1] ,Write issuing, write_iss_override" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Read issuing, read_iss_override" "Disabled,Enabled" line.long 0x04 "INTLPD_INTIOU_QOS_CNTL,QoS Control Register" bitfld.long 0x04 7. " EN_AWAR_OT ,Enable combined regulation of outstanding transactions" "Disabled,Enabled" bitfld.long 0x04 6. " EN_AR_OT ,Enable regulation of outstanding read transactions" "Disabled,Enabled" bitfld.long 0x04 5. " EN_AW_OT ,Enable regulation of outstanding write transactions" "Disabled,Enabled" bitfld.long 0x04 2. " EN_AWAR_RATE ,Enable combined AW/AR rate regulation" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " EN_AR_RATE ,Enable AR rate regulation" "Disabled,Enabled" bitfld.long 0x04 0. " EN_AW_RATE ,Enable AW rate regulation" "Disabled,Enabled" line.long 0x08 "INTLPD_INTIOU_MAX_OT,Maximum Number Of Outstanding Transactions Register" bitfld.long 0x08 24.--29. " AR_MAX_OTI ,Integer part of max outstanding AR addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 16.--23. 1. " AR_MAX_OTF ,Fraction part of max outstanding AR addresses" bitfld.long 0x08 8.--13. " AW_MAX_OTI ,Integer part of max outstanding AW addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 0.--7. 1. " AW_MAX_OTF ,Fraction part of max outstanding AW addresses" line.long 0x0C "INTLPD_INTIOU_MAX_COMB_OT,Maximum Number Of Combined Outstanding Transactions Register" hexmask.long.byte 0x0C 8.--14. 1. " AWAR_MAX_OTI ,Integer part of max combined outstanding AW/AR addresses" hexmask.long.byte 0x0C 0.--7. 1. " AWAR_MAX_OTF ,Fraction part of max combined outstanding AW/AR addresses" line.long 0x10 "INTLPD_INTIOU_AW_P,AW Channel Peak Rate Register" hexmask.long.byte 0x10 24.--31. 1. " AW_P ,Channel peak rate" line.long 0x14 "INTLPD_INTIOU_AW_B,AW Channel Burstiness Allowance Register" hexmask.long.word 0x14 0.--15. 1. " AW_B ,Channel burstiness integer number of transfers" line.long 0x18 "INTLPD_INTIOU_AW_R,AW Channel Average Rate Register" hexmask.long.word 0x18 20.--31. 1. " AW_R ,Channel average rate" line.long 0x1C "INTLPD_INTIOU_AR_P,AR Channel Peak Rate Register" hexmask.long.byte 0x1C 24.--31. 1. " AR_P ,Channel peak rate" line.long 0x20 "INTLPD_INTIOU_AR_B,AR Channel Burstiness Allowance Register" hexmask.long.word 0x20 0.--15. 1. " AR_B ,Channel burstiness" line.long 0x24 "INTLPD_INTIOU_AR_R,AR Channel Average Rate" hexmask.long.word 0x24 20.--31. 1. " AR_R ,Channel average rate" group.long (0x43000+0x100)++0x07 line.long 0x00 "GEM0M_INTIOU_READ_QOS,Read Channel QoS Value Register" bitfld.long 0x00 0.--3. " AR_QOS ,Read channel QoS value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "GEM0M_INTIOU_WRITE_QOS,Write Channel QoS Value Register" bitfld.long 0x04 0.--3. " AW_QOS ,Write channel QoS value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long (0x43000+0x108)++0x27 line.long 0x00 "GEM0M_INTIOU_FN_MOD,Issuing Functionality Modification Register" bitfld.long 0x00 1. " FN_MOD[1] ,Write issuing, write_iss_override" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Read issuing, read_iss_override" "Disabled,Enabled" line.long 0x04 "GEM0M_INTIOU_QOS_CNTL,QoS Control Register" bitfld.long 0x04 7. " EN_AWAR_OT ,Enable combined regulation of outstanding transactions" "Disabled,Enabled" bitfld.long 0x04 6. " EN_AR_OT ,Enable regulation of outstanding read transactions" "Disabled,Enabled" bitfld.long 0x04 5. " EN_AW_OT ,Enable regulation of outstanding write transactions" "Disabled,Enabled" bitfld.long 0x04 2. " EN_AWAR_RATE ,Enable combined AW/AR rate regulation" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " EN_AR_RATE ,Enable AR rate regulation" "Disabled,Enabled" bitfld.long 0x04 0. " EN_AW_RATE ,Enable AW rate regulation" "Disabled,Enabled" line.long 0x08 "GEM0M_INTIOU_MAX_OT,Maximum Number Of Outstanding Transactions Register" bitfld.long 0x08 24.--29. " AR_MAX_OTI ,Integer part of max outstanding AR addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 16.--23. 1. " AR_MAX_OTF ,Fraction part of max outstanding AR addresses" bitfld.long 0x08 8.--13. " AW_MAX_OTI ,Integer part of max outstanding AW addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 0.--7. 1. " AW_MAX_OTF ,Fraction part of max outstanding AW addresses" line.long 0x0C "GEM0M_INTIOU_MAX_COMB_OT,Maximum Number Of Combined Outstanding Transactions Register" hexmask.long.byte 0x0C 8.--14. 1. " AWAR_MAX_OTI ,Integer part of max combined outstanding AW/AR addresses" hexmask.long.byte 0x0C 0.--7. 1. " AWAR_MAX_OTF ,Fraction part of max combined outstanding AW/AR addresses" line.long 0x10 "GEM0M_INTIOU_AW_P,AW Channel Peak Rate Register" hexmask.long.byte 0x10 24.--31. 1. " AW_P ,Channel peak rate" line.long 0x14 "GEM0M_INTIOU_AW_B,AW Channel Burstiness Allowance Register" hexmask.long.word 0x14 0.--15. 1. " AW_B ,Channel burstiness integer number of transfers" line.long 0x18 "GEM0M_INTIOU_AW_R,AW Channel Average Rate Register" hexmask.long.word 0x18 20.--31. 1. " AW_R ,Channel average rate" line.long 0x1C "GEM0M_INTIOU_AR_P,AR Channel Peak Rate Register" hexmask.long.byte 0x1C 24.--31. 1. " AR_P ,Channel peak rate" line.long 0x20 "GEM0M_INTIOU_AR_B,AR Channel Burstiness Allowance Register" hexmask.long.word 0x20 0.--15. 1. " AR_B ,Channel burstiness" line.long 0x24 "GEM0M_INTIOU_AR_R,AR Channel Average Rate" hexmask.long.word 0x24 20.--31. 1. " AR_R ,Channel average rate" group.long (0x44000+0x100)++0x07 line.long 0x00 "GEM1M_INTIOU_READ_QOS,Read Channel QoS Value Register" bitfld.long 0x00 0.--3. " AR_QOS ,Read channel QoS value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "GEM1M_INTIOU_WRITE_QOS,Write Channel QoS Value Register" bitfld.long 0x04 0.--3. " AW_QOS ,Write channel QoS value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long (0x44000+0x108)++0x27 line.long 0x00 "GEM1M_INTIOU_FN_MOD,Issuing Functionality Modification Register" bitfld.long 0x00 1. " FN_MOD[1] ,Write issuing, write_iss_override" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Read issuing, read_iss_override" "Disabled,Enabled" line.long 0x04 "GEM1M_INTIOU_QOS_CNTL,QoS Control Register" bitfld.long 0x04 7. " EN_AWAR_OT ,Enable combined regulation of outstanding transactions" "Disabled,Enabled" bitfld.long 0x04 6. " EN_AR_OT ,Enable regulation of outstanding read transactions" "Disabled,Enabled" bitfld.long 0x04 5. " EN_AW_OT ,Enable regulation of outstanding write transactions" "Disabled,Enabled" bitfld.long 0x04 2. " EN_AWAR_RATE ,Enable combined AW/AR rate regulation" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " EN_AR_RATE ,Enable AR rate regulation" "Disabled,Enabled" bitfld.long 0x04 0. " EN_AW_RATE ,Enable AW rate regulation" "Disabled,Enabled" line.long 0x08 "GEM1M_INTIOU_MAX_OT,Maximum Number Of Outstanding Transactions Register" bitfld.long 0x08 24.--29. " AR_MAX_OTI ,Integer part of max outstanding AR addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 16.--23. 1. " AR_MAX_OTF ,Fraction part of max outstanding AR addresses" bitfld.long 0x08 8.--13. " AW_MAX_OTI ,Integer part of max outstanding AW addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 0.--7. 1. " AW_MAX_OTF ,Fraction part of max outstanding AW addresses" line.long 0x0C "GEM1M_INTIOU_MAX_COMB_OT,Maximum Number Of Combined Outstanding Transactions Register" hexmask.long.byte 0x0C 8.--14. 1. " AWAR_MAX_OTI ,Integer part of max combined outstanding AW/AR addresses" hexmask.long.byte 0x0C 0.--7. 1. " AWAR_MAX_OTF ,Fraction part of max combined outstanding AW/AR addresses" line.long 0x10 "GEM1M_INTIOU_AW_P,AW Channel Peak Rate Register" hexmask.long.byte 0x10 24.--31. 1. " AW_P ,Channel peak rate" line.long 0x14 "GEM1M_INTIOU_AW_B,AW Channel Burstiness Allowance Register" hexmask.long.word 0x14 0.--15. 1. " AW_B ,Channel burstiness integer number of transfers" line.long 0x18 "GEM1M_INTIOU_AW_R,AW Channel Average Rate Register" hexmask.long.word 0x18 20.--31. 1. " AW_R ,Channel average rate" line.long 0x1C "GEM1M_INTIOU_AR_P,AR Channel Peak Rate Register" hexmask.long.byte 0x1C 24.--31. 1. " AR_P ,Channel peak rate" line.long 0x20 "GEM1M_INTIOU_AR_B,AR Channel Burstiness Allowance Register" hexmask.long.word 0x20 0.--15. 1. " AR_B ,Channel burstiness" line.long 0x24 "GEM1M_INTIOU_AR_R,AR Channel Average Rate" hexmask.long.word 0x24 20.--31. 1. " AR_R ,Channel average rate" group.long (0x45000+0x100)++0x07 line.long 0x00 "GEM2M_INTIOU_READ_QOS,Read Channel QoS Value Register" bitfld.long 0x00 0.--3. " AR_QOS ,Read channel QoS value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "GEM2M_INTIOU_WRITE_QOS,Write Channel QoS Value Register" bitfld.long 0x04 0.--3. " AW_QOS ,Write channel QoS value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long (0x45000+0x108)++0x27 line.long 0x00 "GEM2M_INTIOU_FN_MOD,Issuing Functionality Modification Register" bitfld.long 0x00 1. " FN_MOD[1] ,Write issuing, write_iss_override" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Read issuing, read_iss_override" "Disabled,Enabled" line.long 0x04 "GEM2M_INTIOU_QOS_CNTL,QoS Control Register" bitfld.long 0x04 7. " EN_AWAR_OT ,Enable combined regulation of outstanding transactions" "Disabled,Enabled" bitfld.long 0x04 6. " EN_AR_OT ,Enable regulation of outstanding read transactions" "Disabled,Enabled" bitfld.long 0x04 5. " EN_AW_OT ,Enable regulation of outstanding write transactions" "Disabled,Enabled" bitfld.long 0x04 2. " EN_AWAR_RATE ,Enable combined AW/AR rate regulation" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " EN_AR_RATE ,Enable AR rate regulation" "Disabled,Enabled" bitfld.long 0x04 0. " EN_AW_RATE ,Enable AW rate regulation" "Disabled,Enabled" line.long 0x08 "GEM2M_INTIOU_MAX_OT,Maximum Number Of Outstanding Transactions Register" bitfld.long 0x08 24.--29. " AR_MAX_OTI ,Integer part of max outstanding AR addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 16.--23. 1. " AR_MAX_OTF ,Fraction part of max outstanding AR addresses" bitfld.long 0x08 8.--13. " AW_MAX_OTI ,Integer part of max outstanding AW addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 0.--7. 1. " AW_MAX_OTF ,Fraction part of max outstanding AW addresses" line.long 0x0C "GEM2M_INTIOU_MAX_COMB_OT,Maximum Number Of Combined Outstanding Transactions Register" hexmask.long.byte 0x0C 8.--14. 1. " AWAR_MAX_OTI ,Integer part of max combined outstanding AW/AR addresses" hexmask.long.byte 0x0C 0.--7. 1. " AWAR_MAX_OTF ,Fraction part of max combined outstanding AW/AR addresses" line.long 0x10 "GEM2M_INTIOU_AW_P,AW Channel Peak Rate Register" hexmask.long.byte 0x10 24.--31. 1. " AW_P ,Channel peak rate" line.long 0x14 "GEM2M_INTIOU_AW_B,AW Channel Burstiness Allowance Register" hexmask.long.word 0x14 0.--15. 1. " AW_B ,Channel burstiness integer number of transfers" line.long 0x18 "GEM2M_INTIOU_AW_R,AW Channel Average Rate Register" hexmask.long.word 0x18 20.--31. 1. " AW_R ,Channel average rate" line.long 0x1C "GEM2M_INTIOU_AR_P,AR Channel Peak Rate Register" hexmask.long.byte 0x1C 24.--31. 1. " AR_P ,Channel peak rate" line.long 0x20 "GEM2M_INTIOU_AR_B,AR Channel Burstiness Allowance Register" hexmask.long.word 0x20 0.--15. 1. " AR_B ,Channel burstiness" line.long 0x24 "GEM2M_INTIOU_AR_R,AR Channel Average Rate" hexmask.long.word 0x24 20.--31. 1. " AR_R ,Channel average rate" group.long (0x46000+0x100)++0x07 line.long 0x00 "GEM3M_INTIOU_READ_QOS,Read Channel QoS Value Register" bitfld.long 0x00 0.--3. " AR_QOS ,Read channel QoS value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "GEM3M_INTIOU_WRITE_QOS,Write Channel QoS Value Register" bitfld.long 0x04 0.--3. " AW_QOS ,Write channel QoS value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long (0x46000+0x108)++0x27 line.long 0x00 "GEM3M_INTIOU_FN_MOD,Issuing Functionality Modification Register" bitfld.long 0x00 1. " FN_MOD[1] ,Write issuing, write_iss_override" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Read issuing, read_iss_override" "Disabled,Enabled" line.long 0x04 "GEM3M_INTIOU_QOS_CNTL,QoS Control Register" bitfld.long 0x04 7. " EN_AWAR_OT ,Enable combined regulation of outstanding transactions" "Disabled,Enabled" bitfld.long 0x04 6. " EN_AR_OT ,Enable regulation of outstanding read transactions" "Disabled,Enabled" bitfld.long 0x04 5. " EN_AW_OT ,Enable regulation of outstanding write transactions" "Disabled,Enabled" bitfld.long 0x04 2. " EN_AWAR_RATE ,Enable combined AW/AR rate regulation" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " EN_AR_RATE ,Enable AR rate regulation" "Disabled,Enabled" bitfld.long 0x04 0. " EN_AW_RATE ,Enable AW rate regulation" "Disabled,Enabled" line.long 0x08 "GEM3M_INTIOU_MAX_OT,Maximum Number Of Outstanding Transactions Register" bitfld.long 0x08 24.--29. " AR_MAX_OTI ,Integer part of max outstanding AR addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 16.--23. 1. " AR_MAX_OTF ,Fraction part of max outstanding AR addresses" bitfld.long 0x08 8.--13. " AW_MAX_OTI ,Integer part of max outstanding AW addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 0.--7. 1. " AW_MAX_OTF ,Fraction part of max outstanding AW addresses" line.long 0x0C "GEM3M_INTIOU_MAX_COMB_OT,Maximum Number Of Combined Outstanding Transactions Register" hexmask.long.byte 0x0C 8.--14. 1. " AWAR_MAX_OTI ,Integer part of max combined outstanding AW/AR addresses" hexmask.long.byte 0x0C 0.--7. 1. " AWAR_MAX_OTF ,Fraction part of max combined outstanding AW/AR addresses" line.long 0x10 "GEM3M_INTIOU_AW_P,AW Channel Peak Rate Register" hexmask.long.byte 0x10 24.--31. 1. " AW_P ,Channel peak rate" line.long 0x14 "GEM3M_INTIOU_AW_B,AW Channel Burstiness Allowance Register" hexmask.long.word 0x14 0.--15. 1. " AW_B ,Channel burstiness integer number of transfers" line.long 0x18 "GEM3M_INTIOU_AW_R,AW Channel Average Rate Register" hexmask.long.word 0x18 20.--31. 1. " AW_R ,Channel average rate" line.long 0x1C "GEM3M_INTIOU_AR_P,AR Channel Peak Rate Register" hexmask.long.byte 0x1C 24.--31. 1. " AR_P ,Channel peak rate" line.long 0x20 "GEM3M_INTIOU_AR_B,AR Channel Burstiness Allowance Register" hexmask.long.word 0x20 0.--15. 1. " AR_B ,Channel burstiness" line.long 0x24 "GEM3M_INTIOU_AR_R,AR Channel Average Rate" hexmask.long.word 0x24 20.--31. 1. " AR_R ,Channel average rate" group.long (0x47000+0x24)++0x03 line.long 0x00 "NANDM_INTIOU_IB_FN_MOD2,Issuing Functionality Modification Register 2" bitfld.long 0x00 0. " BYPASS_MERGE ,Do not alter any transactions that could pass through legally without alteration" "No bypass,Bypass" group.long (0x47000+0x100)++0x07 line.long 0x00 "NANDM_INTIOU_IB_READ_QOS,Read Channel QoS Value Register" bitfld.long 0x00 0.--3. " AR_QOS ,Read channel QoS value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "NANDM_INTIOU_IB_WRITE_QOS,Write Channel QoS Value Register" bitfld.long 0x04 0.--3. " AW_QOS ,Write channel QoS value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long (0x47000+0x108)++0x27 line.long 0x00 "NANDM_INTIOU_IB_FN_MOD,Issuing Functionality Modification Register" bitfld.long 0x00 1. " FN_MOD[1] ,Write issuing, write_iss_override" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Read issuing, read_iss_override" "Disabled,Enabled" line.long 0x04 "NANDM_INTIOU_IB_QOS_CNTL,QoS Control Register" bitfld.long 0x04 7. " EN_AWAR_OT ,Enable combined regulation of outstanding transactions" "Disabled,Enabled" bitfld.long 0x04 6. " EN_AR_OT ,Enable regulation of outstanding read transactions" "Disabled,Enabled" bitfld.long 0x04 5. " EN_AW_OT ,Enable regulation of outstanding write transactions" "Disabled,Enabled" bitfld.long 0x04 2. " EN_AWAR_RATE ,Enable combined AW/AR rate regulation" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " EN_AR_RATE ,Enable AR rate regulation" "Disabled,Enabled" bitfld.long 0x04 0. " EN_AW_RATE ,Enable AW rate regulation" "Disabled,Enabled" line.long 0x08 "NANDM_INTIOU_IB_MAX_OT,Maximum Number Of Outstanding Transactions Register" bitfld.long 0x08 24.--29. " AR_MAX_OTI ,Integer part of max outstanding AR addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 16.--23. 1. " AR_MAX_OTF ,Fraction part of max outstanding AR addresses" bitfld.long 0x08 8.--13. " AW_MAX_OTI ,Integer part of max outstanding AW addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 0.--7. 1. " AW_MAX_OTF ,Fraction part of max outstanding AW addresses" line.long 0x0C "NANDM_INTIOU_IB_MAX_COMB_OT,Maximum Number Of Combined Outstanding Transactions Register" hexmask.long.byte 0x0C 8.--14. 1. " AWAR_MAX_OTI ,Integer part of max combined outstanding AW/AR addresses" hexmask.long.byte 0x0C 0.--7. 1. " AWAR_MAX_OTF ,Fraction part of max combined outstanding AW/AR addresses" line.long 0x10 "NANDM_INTIOU_IB_AW_P,AW Channel Peak Rate Register" hexmask.long.byte 0x10 24.--31. 1. " AW_P ,Channel peak rate" line.long 0x14 "NANDM_INTIOU_IB_AW_B,AW Channel Burstiness Allowance Register" hexmask.long.word 0x14 0.--15. 1. " AW_B ,Channel burstiness integer number of transfers" line.long 0x18 "NANDM_INTIOU_IB_AW_R,AW Channel Average Rate Register" hexmask.long.word 0x18 20.--31. 1. " AW_R ,Channel average rate" line.long 0x1C "NANDM_INTIOU_IB_AR_P,AR Channel Peak Rate Register" hexmask.long.byte 0x1C 24.--31. 1. " AR_P ,Channel peak rate" line.long 0x20 "NANDM_INTIOU_IB_AR_B,AR Channel Burstiness Allowance Register" hexmask.long.word 0x20 0.--15. 1. " AR_B ,Channel burstiness" line.long 0x24 "NANDM_INTIOU_IB_AR_R,AR Channel Average Rate" hexmask.long.word 0x24 20.--31. 1. " AR_R ,Channel average rate" group.long (0x48000+0x24)++0x03 line.long 0x00 "SD0M_INTIOU_IB_FN_MOD2,Issuing Functionality Modification Register 2" bitfld.long 0x00 0. " BYPASS_MERGE ,Do not alter any transactions that could pass through legally without alteration" "No bypass,Bypass" group.long (0x48000+0x100)++0x07 line.long 0x00 "SD0M_INTIOU_IB_READ_QOS,Read Channel QoS Value Register" bitfld.long 0x00 0.--3. " AR_QOS ,Read channel QoS value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "SD0M_INTIOU_IB_WRITE_QOS,Write Channel QoS Value Register" bitfld.long 0x04 0.--3. " AW_QOS ,Write channel QoS value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long (0x48000+0x108)++0x27 line.long 0x00 "SD0M_INTIOU_IB_FN_MOD,Issuing Functionality Modification Register" bitfld.long 0x00 1. " FN_MOD[1] ,Write issuing, write_iss_override" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Read issuing, read_iss_override" "Disabled,Enabled" line.long 0x04 "SD0M_INTIOU_IB_QOS_CNTL,QoS Control Register" bitfld.long 0x04 7. " EN_AWAR_OT ,Enable combined regulation of outstanding transactions" "Disabled,Enabled" bitfld.long 0x04 6. " EN_AR_OT ,Enable regulation of outstanding read transactions" "Disabled,Enabled" bitfld.long 0x04 5. " EN_AW_OT ,Enable regulation of outstanding write transactions" "Disabled,Enabled" bitfld.long 0x04 2. " EN_AWAR_RATE ,Enable combined AW/AR rate regulation" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " EN_AR_RATE ,Enable AR rate regulation" "Disabled,Enabled" bitfld.long 0x04 0. " EN_AW_RATE ,Enable AW rate regulation" "Disabled,Enabled" line.long 0x08 "SD0M_INTIOU_IB_MAX_OT,Maximum Number Of Outstanding Transactions Register" bitfld.long 0x08 24.--29. " AR_MAX_OTI ,Integer part of max outstanding AR addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 16.--23. 1. " AR_MAX_OTF ,Fraction part of max outstanding AR addresses" bitfld.long 0x08 8.--13. " AW_MAX_OTI ,Integer part of max outstanding AW addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 0.--7. 1. " AW_MAX_OTF ,Fraction part of max outstanding AW addresses" line.long 0x0C "SD0M_INTIOU_IB_MAX_COMB_OT,Maximum Number Of Combined Outstanding Transactions Register" hexmask.long.byte 0x0C 8.--14. 1. " AWAR_MAX_OTI ,Integer part of max combined outstanding AW/AR addresses" hexmask.long.byte 0x0C 0.--7. 1. " AWAR_MAX_OTF ,Fraction part of max combined outstanding AW/AR addresses" line.long 0x10 "SD0M_INTIOU_IB_AW_P,AW Channel Peak Rate Register" hexmask.long.byte 0x10 24.--31. 1. " AW_P ,Channel peak rate" line.long 0x14 "SD0M_INTIOU_IB_AW_B,AW Channel Burstiness Allowance Register" hexmask.long.word 0x14 0.--15. 1. " AW_B ,Channel burstiness integer number of transfers" line.long 0x18 "SD0M_INTIOU_IB_AW_R,AW Channel Average Rate Register" hexmask.long.word 0x18 20.--31. 1. " AW_R ,Channel average rate" line.long 0x1C "SD0M_INTIOU_IB_AR_P,AR Channel Peak Rate Register" hexmask.long.byte 0x1C 24.--31. 1. " AR_P ,Channel peak rate" line.long 0x20 "SD0M_INTIOU_IB_AR_B,AR Channel Burstiness Allowance Register" hexmask.long.word 0x20 0.--15. 1. " AR_B ,Channel burstiness" line.long 0x24 "SD0M_INTIOU_IB_AR_R,AR Channel Average Rate" hexmask.long.word 0x24 20.--31. 1. " AR_R ,Channel average rate" group.long (0x49000+0x24)++0x03 line.long 0x00 "SD1M_INTIOU_IB_FN_MOD2,Issuing Functionality Modification Register 2" bitfld.long 0x00 0. " BYPASS_MERGE ,Do not alter any transactions that could pass through legally without alteration" "No bypass,Bypass" group.long (0x49000+0x100)++0x07 line.long 0x00 "SD1M_INTIOU_IB_READ_QOS,Read Channel QoS Value Register" bitfld.long 0x00 0.--3. " AR_QOS ,Read channel QoS value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "SD1M_INTIOU_IB_WRITE_QOS,Write Channel QoS Value Register" bitfld.long 0x04 0.--3. " AW_QOS ,Write channel QoS value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long (0x49000+0x108)++0x27 line.long 0x00 "SD1M_INTIOU_IB_FN_MOD,Issuing Functionality Modification Register" bitfld.long 0x00 1. " FN_MOD[1] ,Write issuing, write_iss_override" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Read issuing, read_iss_override" "Disabled,Enabled" line.long 0x04 "SD1M_INTIOU_IB_QOS_CNTL,QoS Control Register" bitfld.long 0x04 7. " EN_AWAR_OT ,Enable combined regulation of outstanding transactions" "Disabled,Enabled" bitfld.long 0x04 6. " EN_AR_OT ,Enable regulation of outstanding read transactions" "Disabled,Enabled" bitfld.long 0x04 5. " EN_AW_OT ,Enable regulation of outstanding write transactions" "Disabled,Enabled" bitfld.long 0x04 2. " EN_AWAR_RATE ,Enable combined AW/AR rate regulation" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " EN_AR_RATE ,Enable AR rate regulation" "Disabled,Enabled" bitfld.long 0x04 0. " EN_AW_RATE ,Enable AW rate regulation" "Disabled,Enabled" line.long 0x08 "SD1M_INTIOU_IB_MAX_OT,Maximum Number Of Outstanding Transactions Register" bitfld.long 0x08 24.--29. " AR_MAX_OTI ,Integer part of max outstanding AR addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 16.--23. 1. " AR_MAX_OTF ,Fraction part of max outstanding AR addresses" bitfld.long 0x08 8.--13. " AW_MAX_OTI ,Integer part of max outstanding AW addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 0.--7. 1. " AW_MAX_OTF ,Fraction part of max outstanding AW addresses" line.long 0x0C "SD1M_INTIOU_IB_MAX_COMB_OT,Maximum Number Of Combined Outstanding Transactions Register" hexmask.long.byte 0x0C 8.--14. 1. " AWAR_MAX_OTI ,Integer part of max combined outstanding AW/AR addresses" hexmask.long.byte 0x0C 0.--7. 1. " AWAR_MAX_OTF ,Fraction part of max combined outstanding AW/AR addresses" line.long 0x10 "SD1M_INTIOU_IB_AW_P,AW Channel Peak Rate Register" hexmask.long.byte 0x10 24.--31. 1. " AW_P ,Channel peak rate" line.long 0x14 "SD1M_INTIOU_IB_AW_B,AW Channel Burstiness Allowance Register" hexmask.long.word 0x14 0.--15. 1. " AW_B ,Channel burstiness integer number of transfers" line.long 0x18 "SD1M_INTIOU_IB_AW_R,AW Channel Average Rate Register" hexmask.long.word 0x18 20.--31. 1. " AW_R ,Channel average rate" line.long 0x1C "SD1M_INTIOU_IB_AR_P,AR Channel Peak Rate Register" hexmask.long.byte 0x1C 24.--31. 1. " AR_P ,Channel peak rate" line.long 0x20 "SD1M_INTIOU_IB_AR_B,AR Channel Burstiness Allowance Register" hexmask.long.word 0x20 0.--15. 1. " AR_B ,Channel burstiness" line.long 0x24 "SD1M_INTIOU_IB_AR_R,AR Channel Average Rate" hexmask.long.word 0x24 20.--31. 1. " AR_R ,Channel average rate" group.long (0x4A000+0x24)++0x03 line.long 0x00 "QSPIM_INTIOU_IB_FN_MOD2,Issuing Functionality Modification Register 2" bitfld.long 0x00 0. " BYPASS_MERGE ,Do not alter any transactions that could pass through legally without alteration" "No bypass,Bypass" group.long (0x4A000+0x100)++0x07 line.long 0x00 "QSPIM_INTIOU_IB_READ_QOS,Read Channel QoS Value Register" bitfld.long 0x00 0.--3. " AR_QOS ,Read channel QoS value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "QSPIM_INTIOU_IB_WRITE_QOS,Write Channel QoS Value Register" bitfld.long 0x04 0.--3. " AW_QOS ,Write channel QoS value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long (0x4A000+0x108)++0x27 line.long 0x00 "QSPIM_INTIOU_IB_FN_MOD,Issuing Functionality Modification Register" bitfld.long 0x00 1. " FN_MOD[1] ,Write issuing, write_iss_override" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Read issuing, read_iss_override" "Disabled,Enabled" line.long 0x04 "QSPIM_INTIOU_IB_QOS_CNTL,QoS Control Register" bitfld.long 0x04 7. " EN_AWAR_OT ,Enable combined regulation of outstanding transactions" "Disabled,Enabled" bitfld.long 0x04 6. " EN_AR_OT ,Enable regulation of outstanding read transactions" "Disabled,Enabled" bitfld.long 0x04 5. " EN_AW_OT ,Enable regulation of outstanding write transactions" "Disabled,Enabled" bitfld.long 0x04 2. " EN_AWAR_RATE ,Enable combined AW/AR rate regulation" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " EN_AR_RATE ,Enable AR rate regulation" "Disabled,Enabled" bitfld.long 0x04 0. " EN_AW_RATE ,Enable AW rate regulation" "Disabled,Enabled" line.long 0x08 "QSPIM_INTIOU_IB_MAX_OT,Maximum Number Of Outstanding Transactions Register" bitfld.long 0x08 24.--29. " AR_MAX_OTI ,Integer part of max outstanding AR addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 16.--23. 1. " AR_MAX_OTF ,Fraction part of max outstanding AR addresses" bitfld.long 0x08 8.--13. " AW_MAX_OTI ,Integer part of max outstanding AW addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 0.--7. 1. " AW_MAX_OTF ,Fraction part of max outstanding AW addresses" line.long 0x0C "QSPIM_INTIOU_IB_MAX_COMB_OT,Maximum Number Of Combined Outstanding Transactions Register" hexmask.long.byte 0x0C 8.--14. 1. " AWAR_MAX_OTI ,Integer part of max combined outstanding AW/AR addresses" hexmask.long.byte 0x0C 0.--7. 1. " AWAR_MAX_OTF ,Fraction part of max combined outstanding AW/AR addresses" line.long 0x10 "QSPIM_INTIOU_IB_AW_P,AW Channel Peak Rate Register" hexmask.long.byte 0x10 24.--31. 1. " AW_P ,Channel peak rate" line.long 0x14 "QSPIM_INTIOU_IB_AW_B,AW Channel Burstiness Allowance Register" hexmask.long.word 0x14 0.--15. 1. " AW_B ,Channel burstiness integer number of transfers" line.long 0x18 "QSPIM_INTIOU_IB_AW_R,AW Channel Average Rate Register" hexmask.long.word 0x18 20.--31. 1. " AW_R ,Channel average rate" line.long 0x1C "QSPIM_INTIOU_IB_AR_P,AR Channel Peak Rate Register" hexmask.long.byte 0x1C 24.--31. 1. " AR_P ,Channel peak rate" line.long 0x20 "QSPIM_INTIOU_IB_AR_B,AR Channel Burstiness Allowance Register" hexmask.long.word 0x20 0.--15. 1. " AR_B ,Channel burstiness" line.long 0x24 "QSPIM_INTIOU_IB_AR_R,AR Channel Average Rate" hexmask.long.word 0x24 20.--31. 1. " AR_R ,Channel average rate" width 0x0B tree.end tree "CXTSGEN (CXTSGEN Module)" tree "IOU_SCNTR" base ad:0xFF250000 width 29. group.long 0x00++0x07 line.long 0x00 "CURRENT_COUNTER_VALUE_LOWER,Current Counter Value Lower Register" line.long 0x04 "CURRENT_COUNTER_VALUE_UPPER,Current Counter Value Upper Register" width 0x0B tree.end tree "IOU_SCNTRS" base ad:0xFF260000 width 29. group.long 0x00++0x03 line.long 0x00 "COUNTER_CONTROL,Counter Control Register" bitfld.long 0x00 1. " HDBG ,Halt on debug" "Disabled,Enabled" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" rgroup.long 0x04++0x03 line.long 0x00 "COUNTER_STATUS,Counter Status Register" bitfld.long 0x00 1. " DBGH ,Debug halted" "Not occurred,Occurred" group.long 0x08++0x07 line.long 0x00 "CURRENT_COUNTER_VALUE_LOWER,Current Counter Value Lower Register" line.long 0x04 "CURRENT_COUNTER_VALUE_UPPER,Current Counter Value Upper Register" group.long 0x20++0x03 line.long 0x00 "BASE_FREQUENCY_ID,Base Frequency ID Register" width 0x0B tree.end tree.end tree "IOU_SLCR_SECURE (Secure IOU SLCR)" base ad:0xFF240000 width 16. group.long 0x00++0x07 line.long 0x00 "IOU_AXI_WPRTCN,AXI Write Protection Type Selection Register" bitfld.long 0x00 27. " QSPI_AXI_AWPROT[2] ,AXI protection bit 2" "Data,Instruction" bitfld.long 0x00 26. " [1] ,AXI protection bit 1" "Secure,Non-secure" bitfld.long 0x00 25. " [0] ,AXI protection bit 0" "Normal,Previleged" textline " " bitfld.long 0x00 24. " NAND_AXI_AWPROT[2] ,AXI protection bit 2" "Data,Instruction" bitfld.long 0x00 23. " [1] ,AXI protection bit 1" "Secure,Non-secure" bitfld.long 0x00 22. " [0] ,AXI protection bit 0" "Normal,Previleged" textline " " bitfld.long 0x00 21. " SD1_AXI_AWPROT[2] ,AXI protection bit 2" "Data,Instruction" bitfld.long 0x00 20. " [1] ,AXI protection bit 1" "Secure,Non-secure" bitfld.long 0x00 19. " [0] ,AXI protection bit 0" "Normal,Previleged" textline " " bitfld.long 0x00 18. " SD0_AXI_AWPROT[2] ,AXI protection bit 2" "Data,Instruction" bitfld.long 0x00 17. " [1] ,AXI protection bit 1" "Secure,Non-secure" bitfld.long 0x00 16. " [0] ,AXI protection bit 0" "Normal,Previleged" textline " " bitfld.long 0x00 11. " GEM3_AXI_AWPROT[2] ,AXI protection bit 2" "Data,Instruction" bitfld.long 0x00 10. " [1] ,AXI protection bit 1" "Secure,Non-secure" bitfld.long 0x00 9. " [0] ,AXI protection bit 0" "Normal,Previleged" textline " " bitfld.long 0x00 8. " GEM2_AXI_AWPROT[2] ,AXI protection bit 2" "Data,Instruction" bitfld.long 0x00 7. " [1] ,AXI protection bit 1" "Secure,Non-secure" bitfld.long 0x00 6. " [0] ,AXI protection bit 0" "Normal,Previleged" textline " " bitfld.long 0x00 5. " GEM1_AXI_AWPROT[2] ,AXI protection bit 2" "Data,Instruction" bitfld.long 0x00 4. " [1] ,AXI protection bit 1" "Secure,Non-secure" bitfld.long 0x00 3. " [0] ,AXI protection bit 0" "Normal,Previleged" textline " " bitfld.long 0x00 2. " GEM0_AXI_AWPROT[2] ,AXI protection bit 2" "Data,Instruction" bitfld.long 0x00 1. " [1] ,AXI protection bit 1" "Secure,Non-secure" bitfld.long 0x00 0. " [0] ,AXI protection bit 0" "Normal,Previleged" line.long 0x04 "IOU_AXI_RPRTCN,AXI Read Protection Type Selection Register" bitfld.long 0x04 24. " NAND_AXI_AWPROT[2] ,AXI protection bit 2" "Data,Instruction" bitfld.long 0x04 23. " [1] ,AXI protection bit 1" "Secure,Non-secure" bitfld.long 0x04 22. " [0] ,AXI protection bit 0" "Normal,Previleged" textline " " bitfld.long 0x04 21. " SD1_AXI_AWPROT[2] ,AXI protection bit 2" "Data,Instruction" bitfld.long 0x04 20. " [1] ,AXI protection bit 1" "Secure,Non-secure" bitfld.long 0x04 19. " [0] ,AXI protection bit 0" "Normal,Previleged" textline " " bitfld.long 0x04 18. " SD0_AXI_AWPROT[2] ,AXI protection bit 2" "Data,Instruction" bitfld.long 0x04 17. " [1] ,AXI protection bit 1" "Secure,Non-secure" bitfld.long 0x04 16. " [0] ,AXI protection bit 0" "Normal,Previleged" textline " " bitfld.long 0x04 11. " GEM3_AXI_ARPROT[2] ,AXI protection bit 2" "Data,Instruction" bitfld.long 0x04 10. " [1] ,AXI protection bit 1" "Secure,Non-secure" bitfld.long 0x04 9. " [0] ,AXI protection bit 0" "Normal,Previleged" textline " " bitfld.long 0x04 8. " GEM2_AXI_ARPROT[2] ,AXI protection bit 2" "Data,Instruction" bitfld.long 0x04 7. " [1] ,AXI protection bit 1" "Secure,Non-secure" bitfld.long 0x04 6. " [0] ,AXI protection bit 0" "Normal,Previleged" textline " " bitfld.long 0x04 5. " GEM1_AXI_ARPROT[2] ,AXI protection bit 2" "Data,Instruction" bitfld.long 0x04 4. " [1] ,AXI protection bit 1" "Secure,Non-secure" bitfld.long 0x04 3. " [0] ,AXI protection bit 0" "Normal,Previleged" textline " " bitfld.long 0x04 2. " GEM0_AXI_ARPROT[2] ,AXI protection bit 2" "Data,Instruction" bitfld.long 0x04 1. " [1] ,AXI protection bit 1" "Secure,Non-secure" bitfld.long 0x04 0. " [0] ,AXI protection bit 0" "Normal,Previleged" group.byte 0x40++0x00 line.byte 0x00 "CTRL,General Control Register For The IOU SLCR" bitfld.byte 0x00 0. " SLVERR_ENABLE ,SLVERR enable/disable" "Disabled,Enabled" group.byte 0x44++0x00 line.byte 0x00 "ISR,Interrupt Status Register" eventfld.byte 0x00 0. " ADDR_DECODE_ERR ,Status for an address decode error" "No error,Error" group.byte 0x48++0x00 line.byte 0x00 "IMR_SET/CLR,Interrupt Mask Register" setclrfld.byte 0x00 0. 0x08 0. 0x04 0. " ADDR_DECODE_ERR ,Mask for an address decode error" "Not masked,Masked" wgroup.byte 0x54++0x00 line.byte 0x00 "ITR,Interrupt Trigger Register" bitfld.byte 0x00 0. " ADDR_DECODE_ERR ,Trigger an address decode error interrupt" "No effect,Trigger" width 0x0B tree.end tree "IOU_SLCR (IOU SLCR Registers)" base ad:0xFF180000 width 24. group.long 0x00++0x14F line.long 0x00 "MIO_PIN_0,MIO Pin 0 Peripheral Interface Mapping Register" bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 mux select" "GPIO_0_PIN_IN[0]/GPIO_0_PIN_OUT[0],CAN1_PHY_TX,I2C1_SCL_INPUT/I2C1_SCL_OUT,PJTAG_TCK,SPI0_SCLK_IN/SPI0_SCLK_OUT,TTC3_CLK_IN,UA1_TXD,TRACE_CLK" bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 mux select" "Level 3 mux output,,TEST_SCAN_IN[0]/TEST_SCAN_OUT[0],?..." textline " " bitfld.long 0x00 2. " L1_SEL ,Level 1 mux select" "Level 2 mux output,?..." bitfld.long 0x00 1. " L0_SEL ,Level 0 mux select" "Level 1 mux output,QSPI_SCLK_OUT" line.long 0x04 "MIO_PIN_1,MIO Pin 1 Peripheral Interface Mapping Register" bitfld.long 0x04 5.--7. " L3_SEL ,Level 3 mux select" "GPIO_0_PIN_IN[1]/GPIO_0_PIN_OUT[1],CAN1_PHY_RX,I2C1_SDA_INPUT/I2C1_SDA_OUT,PJTAG_TDI,SPI0_N_SS_OUT[2],TTC3_WAVE_OUT,UA1_TXD,TRACE_CTL" bitfld.long 0x04 3.--4. " L2_SEL ,Level 2 mux select" "Level 3 mux output,,TEST_SCAN_IN[1]/TEST_SCAN_OUT[1],?..." textline " " bitfld.long 0x04 2. " L1_SEL ,Level 1 mux select" "Level 2 mux output,?..." bitfld.long 0x04 1. " L0_SEL ,Level 0 mux select" "Level 1 mux output,QSPI_MI_MI1/QSPI_SO_MO1" line.long 0x08 "MIO_PIN_2,MIO Pin 2 Peripheral Interface Mapping Register" bitfld.long 0x08 5.--7. " L3_SEL ,Level 3 mux select" "GPIO_0_PIN_IN[2]/GPIO_0_PIN_OUT[2],CAN0_PHY_RX,I2C0_SCL_INPUT/I2C0_SCL_OUT,PJTAG_TD0,SPI0_N_SS_OUT[1],TTC2_CLK_IN,UA0_RXD,TRACEDQ[0]" bitfld.long 0x08 3.--4. " L2_SEL ,Level 2 mux select" "Level 3 mux output,,TEST_SCAN_IN[2]/TEST_SCAN_OUT[2],?..." textline " " bitfld.long 0x08 2. " L1_SEL ,Level 1 mux select" "Level 2 mux output,?..." bitfld.long 0x08 1. " L0_SEL ,Level 0 mux select" "Level 1 mux output,QSPI_MI_MI2/QSPI_SO_MO2" line.long 0x0C "MIO_PIN_3,MIO Pin 3 Peripheral Interface Mapping Register" bitfld.long 0x0C 5.--7. " L3_SEL ,Level 3 mux select" "GPIO_0_PIN_IN[3]/GPIO_0_PIN_OUT[3],CAN0_PHY_TX,I2C0_SDA_INPUT/I2C0_SDA_OUT,PJTAG_TMS,SPI0_N_SS_OUT[0],TTC2_WAVE_OUT,UA0_TXD,TRACEDQ[1]" bitfld.long 0x0C 3.--4. " L2_SEL ,Level 2 mux select" "Level 3 mux output,,TEST_SCAN_IN[3]/TEST_SCAN_OUT[3],?..." textline " " bitfld.long 0x0C 2. " L1_SEL ,Level 1 mux select" "Level 2 mux output,?..." bitfld.long 0x0C 1. " L0_SEL ,Level 0 mux select" "Level 1 mux output,QSPI_MI_MI3/QSPI_SO_MO3" line.long 0x10 "MIO_PIN_4,MIO Pin 4 Peripheral Interface Mapping Register" bitfld.long 0x10 5.--7. " L3_SEL ,Level 3 mux select" "GPIO_0_PIN_IN[4]/GPIO_0_PIN_OUT[4],CAN1_PHY_TX,I2C1_SCL_INPUT/I2C1_SCL_OUT,SWDT1_CLK_IN,SPI0_MI/SPI0_SO,TTC2_WAVE_OUT,UA1_TXD,TRACEDQ[2]" bitfld.long 0x10 3.--4. " L2_SEL ,Level 2 mux select" "Level 3 mux output,,TEST_SCAN_IN[4]/TEST_SCAN_OUT[4],?..." textline " " bitfld.long 0x10 2. " L1_SEL ,Level 1 mux select" "Level 2 mux output,?..." bitfld.long 0x10 1. " L0_SEL ,Level 0 mux select" "Level 1 mux output,QSPI_MO_MO0/QSPI_SI_MI0" line.long 0x14 "MIO_PIN_5,MIO Pin 5 Peripheral Interface Mapping Register" bitfld.long 0x14 5.--7. " L3_SEL ,Level 3 mux select" "GPIO_0_PIN_IN[5]/GPIO_0_PIN_OUT[5],CAN1_PHY_RX,I2C1_SDA_INPUT/I2C1_SDA_OUT,SWDT1_RST_OUT,SPI0_M0/SPI0_SI,TTC1_WAVE_OUT,UA1_RXD,TRACEDQ[3]" bitfld.long 0x14 3.--4. " L2_SEL ,Level 2 mux select" "Level 3 mux output,,TEST_SCAN_IN[5]/TEST_SCAN_OUT[5],?..." textline " " bitfld.long 0x14 2. " L1_SEL ,Level 1 mux select" "Level 2 mux output,?..." bitfld.long 0x14 1. " L0_SEL ,Level 0 mux select" "Level 1 mux output,QSPI_N_SS_OUT" line.long 0x18 "MIO_PIN_6,MIO Pin 6 Peripheral Interface Mapping Register" bitfld.long 0x18 5.--7. " L3_SEL ,Level 3 mux select" "GPIO_0_PIN_IN[6]/GPIO_0_PIN_OUT[6],CAN0_PHY_RX,I2C0_SCL_INPUT/I2C0_SCL_OUT,SWDT0_CLK_IN,SPI1_SCLK_IN/SPI1_SCLK_OUT,TTC0_CLK_IN,UA0_RXD,TRACEDQ[4]" bitfld.long 0x18 3.--4. " L2_SEL ,Level 2 mux select" "Level 3 mux output,,TEST_SCAN_IN[6]/TEST_SCAN_OUT[6],?..." textline " " bitfld.long 0x18 2. " L1_SEL ,Level 1 mux select" "Level 2 mux output,?..." bitfld.long 0x18 1. " L0_SEL ,Level 0 mux select" "Level 1 mux output,QSPI_CLK_FOR_LPBK" line.long 0x1C "MIO_PIN_7,MIO Pin 7 Peripheral Interface Mapping Register" bitfld.long 0x1C 5.--7. " L3_SEL ,Level 3 mux select" "GPIO_0_PIN_IN[7]/GPIO_0_PIN_OUT[7],CAN0_PHY_TX,I2C0_SDA_INPUT/I2C0_SDA_OUT,SWDT0_RST_OUT,SPI1_N_SS_OUT[2],TTC0_WAVE_OUT,UA0_TXD,TRACEDQ[5]" bitfld.long 0x1C 3.--4. " L2_SEL ,Level 2 mux select" "Level 3 mux output,,TEST_SCAN_IN[7]/TEST_SCAN_OUT[7],?..." textline " " bitfld.long 0x1C 2. " L1_SEL ,Level 1 mux select" "Level 2 mux output,?..." bitfld.long 0x1C 1. " L0_SEL ,Level 0 mux select" "Level 1 mux output,QSPI_N_SS_OUT_UPPER" line.long 0x20 "MIO_PIN_8,MIO Pin 8 Peripheral Interface Mapping Register" bitfld.long 0x20 5.--7. " L3_SEL ,Level 3 mux select" "GPIO_0_PIN_IN[8]/GPIO_0_PIN_OUT[8],CAN1_PHY_TX,I2C1_SCL_INPUT/I2C1_SCL_OUT,SWDT1_CLK_IN,SPI1_N_SS_OUT[1],TTC3_CLK_IN,UA1_TXD,TRACEDQ[6]" bitfld.long 0x20 3.--4. " L2_SEL ,Level 2 mux select" "Level 3 mux output,,TEST_SCAN_IN[8]/TEST_SCAN_OUT[8],?..." textline " " bitfld.long 0x20 2. " L1_SEL ,Level 1 mux select" "Level 2 mux output,?..." bitfld.long 0x20 1. " L0_SEL ,Level 0 mux select" "Level 1 mux output,QSPI_MI_UPPER[0]/QSPI_MO_UPPER[0]" line.long 0x24 "MIO_PIN_9,MIO Pin 9 Peripheral Interface Mapping Register" bitfld.long 0x24 5.--7. " L3_SEL ,Level 3 mux select" "GPIO_0_PIN_IN[9]/GPIO_0_PIN_OUT[9],CAN1_PHY_RX,I2C1_SDA_INPUT/I2C1_SDA_OUT,SWDT1_RST_OUT,SPI1_N_SS_IN/SPI1_N_SS_OUT[0],TTC3_WAVE_OUT,UA1_RXD,TRACEDQ[7]" bitfld.long 0x24 3.--4. " L2_SEL ,Level 2 mux select" "Level 3 mux output,,TEST_SCAN_IN[9]/TEST_SCAN_OUT[9],?..." textline " " bitfld.long 0x24 2. " L1_SEL ,Level 1 mux select" "Level 2 mux output,NFC_CE[1]" bitfld.long 0x24 1. " L0_SEL ,Level 0 mux select" "Level 1 mux output,QSPI_MI_UPPER[1]/QSPI_MO_UPPER[1]" line.long 0x28 "MIO_PIN_10,MIO Pin 10 Peripheral Interface Mapping Register" bitfld.long 0x28 5.--7. " L3_SEL ,Level 3 mux select" "GPIO_0_PIN_IN[10]/GPIO_0_PIN_OUT[10],CAN0_PHY_RX,I2C0_SCL_INPUT/I2C0_SCL_OUT,SWDT0_CLK_IN,SPI1_MI/SPI1_SO,TTC2_CLK_IN,UA0_RXD,TRACEDQ[8]" bitfld.long 0x28 3.--4. " L2_SEL ,Level 2 mux select" "Level 3 mux output,,TEST_SCAN_IN[10]/TEST_SCAN_OUT[10],?..." textline " " bitfld.long 0x28 2. " L1_SEL ,Level 1 mux select" "Level 2 mux output,NFC_RB_N[0]" bitfld.long 0x28 1. " L0_SEL ,Level 0 mux select" "Level 1 mux output,QSPI_MI_UPPER[2]/QSPI_MO_UPPER[2]" line.long 0x2C "MIO_PIN_11,MIO Pin 11 Peripheral Interface Mapping Register" bitfld.long 0x2C 5.--7. " L3_SEL ,Level 3 mux select" "GPIO_0_PIN_IN[11]/GPIO_0_PIN_OUT[11],CAN0_PHY_TX,I2C0_SDA_INPUT/I2C0_SDA_OUT,SWDT0_RST_OUT,SPI1_MO/SPI1_SI,TTC2_WAVE_OUT,UA0_TXD,TRACEDQ[9]" bitfld.long 0x2C 3.--4. " L2_SEL ,Level 2 mux select" "Level 3 mux output,,TEST_SCAN_IN[11]/TEST_SCAN_OUT[11],?..." textline " " bitfld.long 0x2C 2. " L1_SEL ,Level 1 mux select" "Level 2 mux output,NFC_RB_N[1]" bitfld.long 0x2C 1. " L0_SEL ,Level 0 mux select" "Level 1 mux output,QSPI_MI_UPPER[3]/QSPI_MO_UPPER[3]" line.long 0x30 "MIO_PIN_12,MIO Pin 12 Peripheral Interface Mapping Register" bitfld.long 0x30 5.--7. " L3_SEL ,Level 3 mux select" "GPIO_0_PIN_IN[12]/GPIO_0_PIN_OUT[12],CAN1_PHY_TX,I2C1_SCL_INPUT/I2C1_SCL_OUT,PJTAG_TCK,SPI0_SCLK_IN/SPI0_SCLK_OUT,TTC1_CLK_IN,UA1_TXD,TRACEDQ[10]" bitfld.long 0x30 3.--4. " L2_SEL ,Level 2 mux select" "Level 3 mux output,,TEST_SCAN_IN[12]/TEST_SCAN_OUT[12],?..." textline " " bitfld.long 0x30 2. " L1_SEL ,Level 1 mux select" "Level 2 mux output,NFC_DQS_OUT" bitfld.long 0x30 1. " L0_SEL ,Level 0 mux select" "Level 1 mux output,QSPI_SCLK_OUT_UPPER" line.long 0x34 "MIO_PIN_13,MIO Pin 13 Peripheral Interface Mapping Register" bitfld.long 0x34 5.--7. " L3_SEL ,Level 3 mux select" "GPIO_0_PIN_IN[13]/GPIO_0_PIN_OUT[13],CAN1_PHY_RX,I2C1_SDA_INPUT/I2C1_SDA_OUT,PJTAG_TDI,SPI0_N_SS_OUT[2],TTC1_WAVE_OUT,UA1_RXD,TRACEDQ[11]" bitfld.long 0x34 3.--4. " L2_SEL ,Level 2 mux select" "Level 3 mux output,SD0_DATA_IN[0]/SD0_DATA_OUT[0],TEST_SCAN_IN[13]/TEST_SCAN_OUT[13],?..." textline " " bitfld.long 0x34 2. " L1_SEL ,Level 1 mux select" "Level 2 mux output,NFC_CE[0]" bitfld.long 0x34 1. " L0_SEL ,Level 0 mux select" "Level 1 mux output,?..." line.long 0x38 "MIO_PIN_14,MIO Pin 14 Peripheral Interface Mapping Register" bitfld.long 0x38 5.--7. " L3_SEL ,Level 3 mux select" "GPIO_0_PIN_IN[14]/GPIO_0_PIN_OUT[14],CAN0_PHY_RX,I2C0_SCL_INPUT/I2C0_SCL_OUT,PJTAG_TDO,SPI0_N_SS_OUT[1],TTC0_CLK_IN,UA0_RXD,TRACEDQ[12]" bitfld.long 0x38 3.--4. " L2_SEL ,Level 2 mux select" "Level 3 mux output,SD0_DATA_IN[1]/SD0_DATA_OUT[1],TEST_SCAN_IN[14]/TEST_SCAN_OUT[14],?..." textline " " bitfld.long 0x38 2. " L1_SEL ,Level 1 mux select" "Level 2 mux output,NFC_CLE" bitfld.long 0x38 1. " L0_SEL ,Level 0 mux select" "Level 1 mux output,?..." line.long 0x3C "MIO_PIN_15,MIO Pin 15 Peripheral Interface Mapping Register" bitfld.long 0x3C 5.--7. " L3_SEL ,Level 3 mux select" "GPIO_0_PIN_IN[15]/GPIO_0_PIN_OUT[15],CAN0_PHY_TX,I2C0_SDA_INPUT/I2C0_SDA_OUT,PJTAG_TMS,SPI0_N_SS_IN/SPI0_N_SS_OUT[0],TTC0_WAVE_OUT,UA0_TXD,TRACEDQ[13]" bitfld.long 0x3C 3.--4. " L2_SEL ,Level 2 mux select" "Level 3 mux output,SD0_DATA_IN[2]/SD0_DATA_OUT[2],TEST_SCAN_IN[15]/TEST_SCAN_OUT[15],?..." textline " " bitfld.long 0x3C 2. " L1_SEL ,Level 1 mux select" "Level 2 mux output,NFC_ALE" bitfld.long 0x3C 1. " L0_SEL ,Level 0 mux select" "Level 1 mux output,?..." line.long 0x40 "MIO_PIN_16,MIO Pin 16 Peripheral Interface Mapping Register" bitfld.long 0x40 5.--7. " L3_SEL ,Level 3 mux select" "GPIO_0_PIN_IN[16]/GPIO_0_PIN_OUT[16],CAN1_PHY_TX,I2C1_SCL_INPUT/I2C1_SCL_OUT,SWDT1_CLK_IN,SPI0_MI/SPI0_SO,TTC3_CLK_IN,UA1_TXD,TRACEDQ[14]" bitfld.long 0x40 3.--4. " L2_SEL ,Level 2 mux select" "Level 3 mux output,SD0_DATA_IN[3]/SD0_DATA_OUT[3],TEST_SCAN_IN[16]/TEST_SCAN_OUT[16],?..." textline " " bitfld.long 0x40 2. " L1_SEL ,Level 1 mux select" "Level 2 mux output,NFC_DQ_IN[0]/NFC_DQ_OUT[0]" bitfld.long 0x40 1. " L0_SEL ,Level 0 mux select" "Level 1 mux output,?..." line.long 0x44 "MIO_PIN_17,MIO Pin 17 Peripheral Interface Mapping Register" bitfld.long 0x44 5.--7. " L3_SEL ,Level 3 mux select" "GPIO_0_PIN_IN[17]/GPIO_0_PIN_OUT[17],CAN1_PHY_RX,I2C1_SDA_INPUT/I2C1_SDA_OUT,SWDT1_RST_OUT,SPI0_MO/SPI0_SI,TTC3_WAVE_OUT,UA1_RXD,TRACEDQ[15]" bitfld.long 0x44 3.--4. " L2_SEL ,Level 2 mux select" "Level 3 mux output,SD0_DATA_IN[4]/SD0_DATA_OUT[4],TEST_SCAN_IN[17]/TEST_SCAN_OUT[17],?..." textline " " bitfld.long 0x44 2. " L1_SEL ,Level 1 mux select" "Level 2 mux output,NFC_DQ_IN[1]/NFC_DQ_OUT[1]" bitfld.long 0x44 1. " L0_SEL ,Level 0 mux select" "Level 1 mux output,?..." line.long 0x48 "MIO_PIN_18,MIO Pin 18 Peripheral Interface Mapping Register" bitfld.long 0x48 5.--7. " L3_SEL ,Level 3 mux select" "GPIO_0_PIN_IN[18]/GPIO_0_PIN_OUT[18],CAN0_PHY_RX,I2C0_SCL_INPUT/I2C0_SCL_OUT,SWDT0_CLK_IN,SPI1_MI/SPI1_SO,TTC2_CLK_IN,UA0_RXD,?..." bitfld.long 0x48 3.--4. " L2_SEL ,Level 2 mux select" "Level 3 mux output,SD0_DATA_IN[5]/SD0_DATA_OUT[5],TEST_SCAN_IN[18]/TEST_SCAN_OUT[18],CSU_EXT_TAMPER" textline " " bitfld.long 0x48 2. " L1_SEL ,Level 1 mux select" "Level 2 mux output,NFC_DQ_IN[2]/NFC_DQ_OUT[2]" bitfld.long 0x48 1. " L0_SEL ,Level 0 mux select" "Level 1 mux output,?..." line.long 0x4C "MIO_PIN_19,MIO Pin 19 Peripheral Interface Mapping Register" bitfld.long 0x4C 5.--7. " L3_SEL ,Level 3 mux select" "GPIO_0_PIN_IN[19]/GPIO_0_PIN_OUT[19],CAN0_PHY_TX,I2C0_SDA_INPUT/I2C0_SDA_OUT,SWDT0_RST_OUT,SPI1_MI/SPI1_SO,TTC2_WAVE_OUT,UA0_TXD,?..." bitfld.long 0x4C 3.--4. " L2_SEL ,Level 2 mux select" "Level 3 mux output,SD0_DATA_IN[6]/SD0_DATA_OUT[6],TEST_SCAN_IN[19]/TEST_SCAN_OUT[19],CSU_EXT_TAMPER" textline " " bitfld.long 0x4C 2. " L1_SEL ,Level 1 mux select" "Level 2 mux output,NFC_DQ_IN[3]/NFC_DQ_OUT[3]" bitfld.long 0x4C 1. " L0_SEL ,Level 0 mux select" "Level 1 mux output,?..." line.long 0x50 "MIO_PIN_20,MIO Pin 20 Peripheral Interface Mapping Register" bitfld.long 0x50 5.--7. " L3_SEL ,Level 3 mux select" "GPIO_0_PIN_IN[20]/GPIO_0_PIN_OUT[20],CAN1_PHY_TX,I2C1_SCL_INPUT/I2C1_SCL_OUT,SWDT1_CLK_IN,SPI1_N_SS_OUT[1],TTC1_CLK_IN,UA1_TXD,?..." bitfld.long 0x50 3.--4. " L2_SEL ,Level 2 mux select" "Level 3 mux output,SD0_DATA_IN[7]/SD0_DATA_OUT[7],TEST_SCAN_IN[20]/TEST_SCAN_OUT[20],CSU_EXT_TAMPER" textline " " bitfld.long 0x50 2. " L1_SEL ,Level 1 mux select" "Level 2 mux output,NFC_DQ_IN[4]/NFC_DQ_OUT[4]" bitfld.long 0x50 1. " L0_SEL ,Level 0 mux select" "Level 1 mux output,?..." line.long 0x54 "MIO_PIN_21,MIO Pin 21 Peripheral Interface Mapping Register" bitfld.long 0x54 5.--7. " L3_SEL ,Level 3 mux select" "GPIO_0_PIN_IN[21]/GPIO_0_PIN_OUT[21],CAN1_PHY_RX,I2C1_SDA_INPUT/I2C1_SDA_OUT,SWDT1_RST_OUT,SPI1_N_SS_IN/SPI1_N_SS_OUT[0],TTC1_WAVE_OUT,UA1_RXD,?..." bitfld.long 0x54 3.--4. " L2_SEL ,Level 2 mux select" "Level 3 mux output,SD0_CMD_IN/SDIO0_CMD_OUT,TEST_SCAN_IN[21]/TEST_SCAN_OUT[21],CSU_EXT_TAMPER" textline " " bitfld.long 0x54 2. " L1_SEL ,Level 1 mux select" "Level 2 mux output,NFC_DQ_IN[4]/NFC_DQ_OUT[5]" bitfld.long 0x54 1. " L0_SEL ,Level 0 mux select" "Level 1 mux output,?..." line.long 0x58 "MIO_PIN_22,MIO Pin 22 Peripheral Interface Mapping Register" bitfld.long 0x58 5.--7. " L3_SEL ,Level 3 mux select" "GPIO_0_PIN_IN[22]/GPIO_0_PIN_OUT[22],CAN0_PHY_RX,I2C0_SCL_INPUT/I2C0_SCL_OUT,SWDT0_CLK_IN,SPI1_SCLK_IN/SPI1_SCLK_OUT,TTC0_CLK_IN,UA0_RXD,?..." bitfld.long 0x58 3.--4. " L2_SEL ,Level 2 mux select" "Level 3 mux output,SDIO0_CLK_OUT,TEST_SCAN_IN[22]/TEST_SCAN_OUT[22],CSU_EXT_TAMPER" textline " " bitfld.long 0x58 2. " L1_SEL ,Level 1 mux select" "Level 2 mux output,NFC_WE_B" bitfld.long 0x58 1. " L0_SEL ,Level 0 mux select" "Level 1 mux output,?..." line.long 0x5C "MIO_PIN_23,MIO Pin 23 Peripheral Interface Mapping Register" bitfld.long 0x5C 5.--7. " L3_SEL ,Level 3 mux select" "GPIO_0_PIN_IN[23]/GPIO_0_PIN_OUT[23],CAN0_PHY_TX,I2C0_SDA_INPUT/I2C0_SDA_OUT,SWDT0_RST_OUT,SPI1_MO/SPI1_SI,TTC0_WAVE_OUT,UA0_TXD,?..." bitfld.long 0x5C 3.--4. " L2_SEL ,Level 2 mux select" "Level 3 mux output,SDIO0_BUS_POW,TEST_SCAN_IN[23]/TEST_SCAN_OUT[23],CSU_EXT_TAMPER" textline " " bitfld.long 0x5C 2. " L1_SEL ,Level 1 mux select" "Level 2 mux output,NFC_DQ_IN[6]/NFC_DQ_OUT[6]" bitfld.long 0x5C 1. " L0_SEL ,Level 0 mux select" "Level 1 mux output,?..." line.long 0x60 "MIO_PIN_24,MIO Pin 24 Peripheral Interface Mapping Register" bitfld.long 0x60 5.--7. " L3_SEL ,Level 3 mux select" "GPIO_0_PIN_IN[24]/GPIO_0_PIN_OUT[24],CAN1_PHY_TX,I2C1_SCL_INPUT/I2C1_SCL_OUT,SWDT1_CLK_IN,,TTC3_CLK_IN,UA1_TXD,?..." bitfld.long 0x60 3.--4. " L2_SEL ,Level 2 mux select" "Level 3 mux output,SDIO0_CD_N,TEST_SCAN_IN[24]/TEST_SCAN_OUT[24],CSU_EXT_TAMPER" textline " " bitfld.long 0x60 2. " L1_SEL ,Level 1 mux select" "Level 2 mux output,NFC_DQ_IN[7]/NFC_DQ_OUT[7]" bitfld.long 0x60 1. " L0_SEL ,Level 0 mux select" "Level 1 mux output,?..." line.long 0x64 "MIO_PIN_25,MIO Pin 25 Peripheral Interface Mapping Register" bitfld.long 0x64 5.--7. " L3_SEL ,Level 3 mux select" "GPIO_0_PIN_IN[25]/GPIO_0_PIN_OUT[25],CAN1_PHY_RX,I2C1_SDA_INPUT/I2C1_SDA_OUT,SWDT1_RST_OUT,,TTC3_WAVE_OUT,UA1_RXD,?..." bitfld.long 0x64 3.--4. " L2_SEL ,Level 2 mux select" "Level 3 mux output,SDIO0_WP,TEST_SCAN_IN[25]/TEST_SCAN_OUT[25],CSU_EXT_TAMPER" textline " " bitfld.long 0x64 2. " L1_SEL ,Level 1 mux select" "Level 2 mux output,NFC_RE_N" bitfld.long 0x64 1. " L0_SEL ,Level 0 mux select" "Level 1 mux output,?..." line.long 0x68 "MIO_PIN_26,MIO Pin 26 Peripheral Interface Mapping Register" bitfld.long 0x68 5.--7. " L3_SEL ,Level 3 mux select" "GPIO_1_PIN_IN[0]/GPIO_1_PIN_OUT[0],CAN0_PHY_RX,I2C0_SCL_INPUT/I2C0_SCL_OUT,PJTAG_TCK,SPI0_SCLK_IN/SPI0_SCLK_OUT,TTC2_CLK_IN,UA0_RXD,TRACEDQ[4]" bitfld.long 0x68 3.--4. " L2_SEL ,Level 2 mux select" "Level 3 mux output,PMU_GPI[0],TEST_SCAN_IN[26]/TEST_SCAN_OUT[26],CSU_EXT_TAMPER" textline " " bitfld.long 0x68 2. " L1_SEL ,Level 1 mux select" "Level 2 mux output,NFC_CE[1]" bitfld.long 0x68 1. " L0_SEL ,Level 0 mux select" "Level 1 mux output,GEM0_RGMII_TX_CLK" line.long 0x6C "MIO_PIN_27,MIO Pin 27 Peripheral Interface Mapping Register" bitfld.long 0x6C 5.--7. " L3_SEL ,Level 3 mux select" "GPIO_1_PIN_IN[1]/GPIO_1_PIN_OUT[1],CAN0_PHY_TX,I2C0_SDA_INPUT/I2C0_SDA_OUT,PJTAG_TDI,SPI0_N_SS_OUT[2],TTC2_WAVE_OUT,UA0_TXD,TRACEDQ[5]" bitfld.long 0x6C 3.--4. " L2_SEL ,Level 2 mux select" "Level 3 mux output,PMU_GPI[1],TEST_SCAN_IN[27]/TEST_SCAN_OUT[27],DP_AUX_DATA_IN/DP_AUX_DATA_OUT" textline " " bitfld.long 0x6C 2. " L1_SEL ,Level 1 mux select" "Level 2 mux output,NFC_RB_N[0]" bitfld.long 0x6C 1. " L0_SEL ,Level 0 mux select" "Level 1 mux output,GEM0_RGMII_TXD[0]" line.long 0x70 "MIO_PIN_28,MIO Pin 28 Peripheral Interface Mapping Register" bitfld.long 0x70 5.--7. " L3_SEL ,Level 3 mux select" "GPIO_1_PIN_IN[2]/GPIO_1_PIN_OUT[2],CAN1_PHY_TX,I2C1_SCL_INPUT/I2C1_SCL_OUT,PJTAG_TD0,SPI0_N_SS_OUT[1],TTC1_CLK_IN,UA1_TXD,TRACEDQ[6]" bitfld.long 0x70 3.--4. " L2_SEL ,Level 2 mux select" "Level 3 mux output,PMU_GPI[2],TEST_SCAN_IN[28]/TEST_SCAN_OUT[28],DP_HOT_PLUG_DETECT" textline " " bitfld.long 0x70 2. " L1_SEL ,Level 1 mux select" "Level 2 mux output,NFC_RB_N[1]" bitfld.long 0x70 1. " L0_SEL ,Level 0 mux select" "Level 1 mux output,GEM0_RGMII_TXD[1]" line.long 0x74 "MIO_PIN_29,MIO Pin 29 Peripheral Interface Mapping Register" bitfld.long 0x74 5.--7. " L3_SEL ,Level 3 mux select" "GPIO_1_PIN_IN[3]/GPIO_1_PIN_OUT[3],CAN1_PHY_RX,I2C1_SDA_INPUT/I2C1_SDA_OUT,PJTAG_TMS,SPI0_N_SS_OUT[0],TTC1_WAVE_OUT,UA1_RXD,TRACEDQ[7]" bitfld.long 0x74 3.--4. " L2_SEL ,Level 2 mux select" "Level 3 mux output,PMU_GPI[3],TEST_SCAN_IN[29]/TEST_SCAN_OUT[29],DP_AUX_DATA_IN/DP_AUX_DATA_OUT" textline " " bitfld.long 0x74 2. " L1_SEL ,Level 1 mux select" "Level 2 mux output,PCIE_RESET_N" bitfld.long 0x74 1. " L0_SEL ,Level 0 mux select" "Level 1 mux output,GEM0_RGMII_TXD[2]" line.long 0x78 "MIO_PIN_30,MIO Pin 30 Peripheral Interface Mapping Register" bitfld.long 0x78 5.--7. " L3_SEL ,Level 3 mux select" "GPIO_1_PIN_IN[4]/GPIO_1_PIN_OUT[4],CAN0_PHY_RX,I2C0_SCL_INPUT/I2C0_SCL_OUT,SWDT0_CLK_IN,SPI0_MI/SPI0_SO,TTC0_CLK_IN,UA0_RXD,TRACEDQ[8]" bitfld.long 0x78 3.--4. " L2_SEL ,Level 2 mux select" "Level 3 mux output,PMU_GPI[4],TEST_SCAN_IN[30]/TEST_SCAN_OUT[30],DP_HOT_PLUG_DETECT" textline " " bitfld.long 0x78 2. " L1_SEL ,Level 1 mux select" "Level 2 mux output,PCIE_RESET_N" bitfld.long 0x78 1. " L0_SEL ,Level 0 mux select" "Level 1 mux output,GEM0_RGMII_TXD[3]" line.long 0x7C "MIO_PIN_31,MIO Pin 31 Peripheral Interface Mapping Register" bitfld.long 0x7C 5.--7. " L3_SEL ,Level 3 mux select" "GPIO_1_PIN_IN[5]/GPIO_1_PIN_OUT[5],CAN0_PHY_TX,I2C0_SDA_INPUT/I2C0_SDA_OUT,SWDT0_RST_OUT,SPI0_MO/SPI0_SI,TTC0_WAVE_OUT,UA0_TXD,TRACEDQ[9]" bitfld.long 0x7C 3.--4. " L2_SEL ,Level 2 mux select" "Level 3 mux output,PMU_GPI[5],TEST_SCAN_IN[31]/TEST_SCAN_OUT[31],CSU_EXT_TAMPER" textline " " bitfld.long 0x7C 2. " L1_SEL ,Level 1 mux select" "Level 2 mux output,PCIE_RESET_N" bitfld.long 0x7C 1. " L0_SEL ,Level 0 mux select" "Level 1 mux output,GEM0_RGMII_TX_CTL" line.long 0x80 "MIO_PIN_32,MIO Pin 32 Peripheral Interface Mapping Register" bitfld.long 0x80 5.--7. " L3_SEL ,Level 3 mux select" "GPIO_1_PIN_IN[6]/GPIO_1_PIN_OUT[6],CAN1_PHY_TX,I2C1_SCL_INPUT/I2C1_SCL_OUT,SWDT1_CLK_IN,SPI1_SCLK_IN/SPI1_SCLK_OUT,TTC3_CLK_IN,UA1_TXD,TRACEDQ[10]" bitfld.long 0x80 3.--4. " L2_SEL ,Level 2 mux select" "Level 3 mux output,PMU_GPO[0],TEST_SCAN_IN[32]/TEST_SCAN_OUT[32],CSU_EXT_TAMPER" textline " " bitfld.long 0x80 2. " L1_SEL ,Level 1 mux select" "Level 2 mux output,NFC_DQS_IN/NFC_DQS_OUT" bitfld.long 0x80 1. " L0_SEL ,Level 0 mux select" "Level 1 mux output,GEM0_RGMII_RX_CLK" line.long 0x84 "MIO_PIN_33,MIO Pin 33 Peripheral Interface Mapping Register" bitfld.long 0x84 5.--7. " L3_SEL ,Level 3 mux select" "GPIO_1_PIN_IN[7]/GPIO_1_PIN_OUT[7],CAN1_PHY_RX,I2C1_SDA_INPUT/I2C1_SDA_OUT,SWDT1_RST_OUT,SPI1_N_SS_OUT[2],TTC3_WAVE_OUT,UA1_RXD,TRACEDQ[11]" bitfld.long 0x84 3.--4. " L2_SEL ,Level 2 mux select" "Level 3 mux output,PMU_GPO[1],TEST_SCAN_IN[33]/TEST_SCAN_OUT[33],CSU_EXT_TAMPER" textline " " bitfld.long 0x84 2. " L1_SEL ,Level 1 mux select" "Level 2 mux output,PCIE_RESET_N" bitfld.long 0x84 1. " L0_SEL ,Level 0 mux select" "Level 1 mux output,GEM0_RGMII_RXD[0]" line.long 0x88 "MIO_PIN_34,MIO Pin 34 Peripheral Interface Mapping Register" bitfld.long 0x88 5.--7. " L3_SEL ,Level 3 mux select" "GPIO_1_PIN_IN[8]/GPIO_1_PIN_OUT[8],CAN0_PHY_RX,I2C0_SCL_INPUT/I2C0_SCL_OUT,SWDT0_CLK_IN,SPI1_N_SS_OUT[1],TTC2_CLK_IN,UA0_RXD,TRACEDQ[12]" bitfld.long 0x88 3.--4. " L2_SEL ,Level 2 mux select" "Level 3 mux output,PMU_GPO[2],TEST_SCAN_IN[34]/TEST_SCAN_OUT[34],DP_AUX_DATA_OUT" textline " " bitfld.long 0x88 2. " L1_SEL ,Level 1 mux select" "Level 2 mux output,PCIE_RESET_N" bitfld.long 0x88 1. " L0_SEL ,Level 0 mux select" "Level 1 mux output,GEM0_RGMII_RXD[1]" line.long 0x8C "MIO_PIN_35,MIO Pin 35 Peripheral Interface Mapping Register" bitfld.long 0x8C 5.--7. " L3_SEL ,Level 3 mux select" "GPIO_1_PIN_IN[9]/GPIO_1_PIN_OUT[9],CAN0_PHY_TX,I2C0_SDA_INPUT/I2C0_SDA_OUT,SWDT0_RST_OUT,SPI1_N_SS_IN/SPI1_N_SS_OUT,TTC2_WAVE_OUT,UA0_TXD,TRACEDQ[13]" bitfld.long 0x8C 3.--4. " L2_SEL ,Level 2 mux select" "Level 3 mux output,PMU_GPO[3],TEST_SCAN_IN[35]/TEST_SCAN_OUT[35],DP_HOT_PLUG_DETECT" textline " " bitfld.long 0x8C 2. " L1_SEL ,Level 1 mux select" "Level 2 mux output,PCIE_RESET_N" bitfld.long 0x8C 1. " L0_SEL ,Level 0 mux select" "Level 1 mux output,GEM0_RGMII_RXD[2]" line.long 0x90 "MIO_PIN_36,MIO Pin 36 Peripheral Interface Mapping Register" bitfld.long 0x90 5.--7. " L3_SEL ,Level 3 mux select" "GPIO_1_PIN_IN[10]/GPIO_1_PIN_OUT[10],CAN1_PHY_TX,I2C1_SCL_INPUT/I2C1_SCL_OUT,SWDT1_CLK_IN,SPI1_MI/SPI1_SO,TTC1_CLK_IN,UA1_TXD,TRACEDQ[14]" bitfld.long 0x90 3.--4. " L2_SEL ,Level 2 mux select" "Level 3 mux output,PMU_GPO[4],TEST_SCAN_IN[36]/TEST_SCAN_OUT[36],DP_AUX_DATA_OUT" textline " " bitfld.long 0x90 2. " L1_SEL ,Level 1 mux select" "Level 2 mux output,PCIE_RESET_N" bitfld.long 0x90 1. " L0_SEL ,Level 0 mux select" "Level 1 mux output,GEM0_RGMII_RXD[3]" line.long 0x94 "MIO_PIN_37,MIO Pin 37 Peripheral Interface Mapping Register" bitfld.long 0x94 5.--7. " L3_SEL ,Level 3 mux select" "GPIO_1_PIN_IN[11]/GPIO_1_PIN_OUT[11],CAN1_PHY_RX,I2C1_SDA_INPUT/I2C1_SDA_OUT,SWDT1_RST_OUT,SPI1_MO/SPI1_SI,TTC1_WAVE_OUT,UA1_RXD,TRACEDQ[15]" bitfld.long 0x94 3.--4. " L2_SEL ,Level 2 mux select" "Level 3 mux output,PMU_GPO[5],TEST_SCAN_IN[37]/TEST_SCAN_OUT[37],DP_AUX_DATA_IN" textline " " bitfld.long 0x94 2. " L1_SEL ,Level 1 mux select" "Level 2 mux output,PCIE_RESET_N" bitfld.long 0x94 1. " L0_SEL ,Level 0 mux select" "Level 1 mux output,GEM0_RGMII_RX_CTL" line.long 0x98 "MIO_PIN_38,MIO Pin 38 Peripheral Interface Mapping Register" bitfld.long 0x98 5.--7. " L3_SEL ,Level 3 mux select" "GPIO_1_PIN_IN[12]/GPIO_1_PIN_OUT[12],CAN0_PHY_RX,I2C0_SCL_INPUT/I2C0_SCL_OUT,PJTAG_TCK,SPI0_SCLK_IN/SPI0_SCLK_OUT,TTC0_CLK_IN,UA0_RXD,TRACE_CLK" bitfld.long 0x98 3.--4. " L2_SEL ,Level 2 mux select" "Level 3 mux output,SDIO0_CLK_OUT,?..." textline " " bitfld.long 0x98 2. " L1_SEL ,Level 1 mux select" "Level 2 mux output,?..." bitfld.long 0x98 1. " L0_SEL ,Level 0 mux select" "Level 1 mux output,GEM1_RGMII_TX_CTL" line.long 0x9C "MIO_PIN_39,MIO Pin 39 Peripheral Interface Mapping Register" bitfld.long 0x9C 5.--7. " L3_SEL ,Level 3 mux select" "GPIO_1_PIN_IN[13]/GPIO_1_PIN_OUT[13],CAN0_PHY_TX,I2C0_SDA_INPUT/I2C0_SDA_OUT,PJTAG_TDI,SPI0_N_SS_OUT[2],TTC0_WAVE_OUT,UA0_TXD,TRACE_CTL" bitfld.long 0x9C 3.--4. " L2_SEL ,Level 2 mux select" "Level 3 mux output,SDIO0_CD_N,SD1_DATA_IN[4]/SDIO1_DATA_OUT[4],?..." textline " " bitfld.long 0x9C 2. " L1_SEL ,Level 1 mux select" "Level 2 mux output,?..." bitfld.long 0x9C 1. " L0_SEL ,Level 0 mux select" "Level 1 mux output,GEM1_RGMII_TXD[0]" line.long 0xA0 "MIO_PIN_40,MIO Pin 40 Peripheral Interface Mapping Register" bitfld.long 0xA0 5.--7. " L3_SEL ,Level 3 mux select" "GPIO_1_PIN_IN[14]/GPIO_1_PIN_OUT[14],CAN1_PHY_TX,I2C1_SCL_INPUT/I2C1_SCL_OUT,PJTAG_TDO,SPI0_N_SS_OUT[1],TTC3_CLK_IN,UA1_TXD,TRACEDQ[0]" bitfld.long 0xA0 3.--4. " L2_SEL ,Level 2 mux select" "Level 3 mux output,SD0_CMD_IN/SD0_CMD_OUT,SD1_DATA_IN[5]/SDIO1_DATA_OUT[5],?..." textline " " bitfld.long 0xA0 2. " L1_SEL ,Level 1 mux select" "Level 2 mux output,?..." bitfld.long 0xA0 1. " L0_SEL ,Level 0 mux select" "Level 1 mux output,GEM1_RGMII_TXD[1]" line.long 0xA4 "MIO_PIN_41,MIO Pin 41 Peripheral Interface Mapping Register" bitfld.long 0xA4 5.--7. " L3_SEL ,Level 3 mux select" "GPIO_1_PIN_IN[15]/GPIO_1_PIN_OUT[15],CAN1_PHY_RX,I2C1_SDA_INPUT/I2C1_SDA_OUT,PJTAG_TMS,SPI0_N_SS_OUT[0],TTC3_WAVE_OUT,UA1_RXD,TRACEDQ[1]" bitfld.long 0xA4 3.--4. " L2_SEL ,Level 2 mux select" "Level 3 mux output,SD0_DATA_IN[0]/SD0_DATA_OUT[0],SD1_DATA_IN[6]/SDIO1_DATA_OUT[6],?..." textline " " bitfld.long 0xA4 2. " L1_SEL ,Level 1 mux select" "Level 2 mux output,?..." bitfld.long 0xA4 1. " L0_SEL ,Level 0 mux select" "Level 1 mux output,GEM1_RGMII_TXD[2]" line.long 0xA8 "MIO_PIN_42,MIO Pin 42 Peripheral Interface Mapping Register" bitfld.long 0xA8 5.--7. " L3_SEL ,Level 3 mux select" "GPIO_1_PIN_IN[16]/GPIO_1_PIN_OUT[16],CAN0_PHY_RX,I2C0_SCL_INPUT/I2C0_SCL_OUT,SWDT0_CLK_IN,SPI0_MI/SPI0_SO,TTC2_CLK_IN,UA0_RXD,TRACEDQ[2]" bitfld.long 0xA8 3.--4. " L2_SEL ,Level 2 mux select" "Level 3 mux output,SD0_DATA_IN[1]/SD0_DATA_OUT[1],SD1_DATA_IN[7]/SDIO1_DATA_OUT[7],?..." textline " " bitfld.long 0xA8 2. " L1_SEL ,Level 1 mux select" "Level 2 mux output,?..." bitfld.long 0xA8 1. " L0_SEL ,Level 0 mux select" "Level 1 mux output,GEM1_RGMII_TXD[3]" line.long 0xAC "MIO_PIN_43,MIO Pin 43 Peripheral Interface Mapping Register" bitfld.long 0xAC 5.--7. " L3_SEL ,Level 3 mux select" "GPIO_1_PIN_IN[17]/GPIO_1_PIN_OUT[17],CAN0_PHY_TX,I2C0_SDA_INPUT/I2C0_SDA_OUT,SWDT0_RST_OUT,SPI0_MO/SPI0_SI,TTC2_WAVE_OUT,UA0_TXD,TRACEDQ[3]" bitfld.long 0xAC 3.--4. " L2_SEL ,Level 2 mux select" "Level 3 mux output,SD0_DATA_IN[2]/SD0_DATA_OUT[2],SDIO1_BUS_POW,?..." textline " " bitfld.long 0xAC 2. " L1_SEL ,Level 1 mux select" "Level 2 mux output,?..." bitfld.long 0xAC 1. " L0_SEL ,Level 0 mux select" "Level 1 mux output,GEM1_RGMII_TX_CTL" line.long 0xB0 "MIO_PIN_44,MIO Pin 44 Peripheral Interface Mapping Register" bitfld.long 0xB0 5.--7. " L3_SEL ,Level 3 mux select" "GPIO_1_PIN_IN[18]/GPIO_1_PIN_OUT[18],CAN1_PHY_TX,I2C1_SCL_INPUT/I2C1_SCL_OUT,SWDT1_CLK_IN,SPI1_SCLK_IN,TTC1_CLK_IN,UA1_TXD,?..." bitfld.long 0xB0 3.--4. " L2_SEL ,Level 2 mux select" "Level 3 mux output,SD0_DATA_IN[3]/SD0_DATA_OUT[3],SDIO1_WP,?..." textline " " bitfld.long 0xB0 2. " L1_SEL ,Level 1 mux select" "Level 2 mux output,?..." bitfld.long 0xB0 1. " L0_SEL ,Level 0 mux select" "Level 1 mux output,GEM1_RGMII_RX_CLK" line.long 0xB4 "MIO_PIN_45,MIO Pin 45 Peripheral Interface Mapping Register" bitfld.long 0xB4 5.--7. " L3_SEL ,Level 3 mux select" "GPIO_1_PIN_IN[19]/GPIO_1_PIN_OUT[19],CAN1_PHY_RX,I2C1_SDA_INPUT/I2C1_SDA_OUT,SWDT1_RST_OUT,SPI1_N_SS_OUT[2],TTC1_WAVE_OUT,UA1_RXD,?..." bitfld.long 0xB4 3.--4. " L2_SEL ,Level 2 mux select" "Level 3 mux output,SD0_DATA_IN[4]/SD0_DATA_OUT[4],SDIO1_CD_N,?..." textline " " bitfld.long 0xB4 2. " L1_SEL ,Level 1 mux select" "Level 2 mux output,?..." bitfld.long 0xB4 1. " L0_SEL ,Level 0 mux select" "Level 1 mux output,GEM1_RGMII_RXD[0]" line.long 0xB8 "MIO_PIN_46,MIO Pin 46 Peripheral Interface Mapping Register" bitfld.long 0xB8 5.--7. " L3_SEL ,Level 3 mux select" "GPIO_1_PIN_IN[20]/GPIO_1_PIN_OUT[20],CAN0_PHY_RX,I2C0_SCL_INPUT/I2C0_SCL_OUT,SWDT0_CLK_IN,SPI1_N_SS_OUT[1],TTC0_CLK_IN,UA0_RXD,?..." bitfld.long 0xB8 3.--4. " L2_SEL ,Level 2 mux select" "Level 3 mux output,SD0_DATA_IN[5]/SD0_DATA_OUT[5],SD1_DATA_IN[0]/SDIO1_DATA_OUT[0],?..." textline " " bitfld.long 0xB8 2. " L1_SEL ,Level 1 mux select" "Level 2 mux output,?..." bitfld.long 0xB8 1. " L0_SEL ,Level 0 mux select" "Level 1 mux output,GEM1_RGMII_RXD[1]" line.long 0xBC "MIO_PIN_47,MIO Pin 47 Peripheral Interface Mapping Register" bitfld.long 0xBC 5.--7. " L3_SEL ,Level 3 mux select" "GPIO_1_PIN_IN[21]/GPIO_1_PIN_OUT[21],CAN0_PHY_TX,I2C0_SDA_INPUT/I2C0_SDA_OUT,SWDT0_RST_OUT,SPI1_N_SS_IN/SPI1_N_SS_OUT[0],TTC0_WAVE_OUT,UA0_TXD,?..." bitfld.long 0xBC 3.--4. " L2_SEL ,Level 2 mux select" "Level 3 mux output,SD0_DATA_IN[6]/SD0_DATA_OUT[6],SD1_DATA_IN[1]/SDIO1_DATA_OUT[1],?..." textline " " bitfld.long 0xBC 2. " L1_SEL ,Level 1 mux select" "Level 2 mux output,?..." bitfld.long 0xBC 1. " L0_SEL ,Level 0 mux select" "Level 1 mux output,GEM1_RGMII_RXD[2]" line.long 0xC0 "MIO_PIN_48,MIO Pin 48 Peripheral Interface Mapping Register" bitfld.long 0xC0 5.--7. " L3_SEL ,Level 3 mux select" "GPIO_1_PIN_IN[22]/GPIO_1_PIN_OUT[22],CAN1_PHY_TX,I2C1_SCL_INPUT/I2C1_SCL_OUT,SWDT1_CLK_IN,SPI1_MI/SPI1_SO,TTC3_CLK_IN,UA1_TXD,?..." bitfld.long 0xC0 3.--4. " L2_SEL ,Level 2 mux select" "Level 3 mux output,SD0_DATA_IN[7]/SD0_DATA_OUT[7],SD1_DATA_IN[2]/SDIO1_DATA_OUT[2],?..." textline " " bitfld.long 0xC0 2. " L1_SEL ,Level 1 mux select" "Level 2 mux output,?..." bitfld.long 0xC0 1. " L0_SEL ,Level 0 mux select" "Level 1 mux output,GEM1_RGMII_RXD[3]" line.long 0xC4 "MIO_PIN_49,MIO Pin 49 Peripheral Interface Mapping Register" bitfld.long 0xC4 5.--7. " L3_SEL ,Level 3 mux select" "GPIO_1_PIN_IN[23]/GPIO_1_PIN_OUT[23],CAN1_PHY_RX,I2C1_SDA_INPUT/I2C1_SDA_OUT,SWDT1_RST_OUT,SPI1_MO/SPI1_SI,TTC3_WAVE_OUT,UA1_TXD,?..." bitfld.long 0xC4 3.--4. " L2_SEL ,Level 2 mux select" "Level 3 mux output,SDIO0_BUS_POW,SD1_DATA_IN[3]/SDIO1_DATA_OUT[3],?..." textline " " bitfld.long 0xC4 2. " L1_SEL ,Level 1 mux select" "Level 2 mux output,?..." bitfld.long 0xC4 1. " L0_SEL ,Level 0 mux select" "Level 1 mux output,GEM1_RGMII_RX_CTL" line.long 0xC8 "MIO_PIN_50,MIO Pin 50 Peripheral Interface Mapping Register" bitfld.long 0xC8 5.--7. " L3_SEL ,Level 3 mux select" "GPIO_1_PIN_IN[24]/GPIO_1_PIN_OUT[24],CAN0_PHY_RX,I2C0_SCL_INPUT/I2C0_SCL_OUT,SWDT0_CLK_IN,GEM1_MDC,TTC2_CLK_IN,UA0_RXD,?..." bitfld.long 0xC8 3.--4. " L2_SEL ,Level 2 mux select" "Level 3 mux output,SDIO0_WP,SD1_CMD_IN/SD1_CMD_OUT,?..." textline " " bitfld.long 0xC8 2. " L1_SEL ,Level 1 mux select" "Level 2 mux output,?..." bitfld.long 0xC8 1. " L0_SEL ,Level 0 mux select" "Level 1 mux output,GEM_TSU_CLK" line.long 0xCC "MIO_PIN_51,MIO Pin 51 Peripheral Interface Mapping Register" bitfld.long 0xCC 5.--7. " L3_SEL ,Level 3 mux select" "GPIO_1_PIN_IN[25]/GPIO_1_PIN_OUT[25],CAN0_PHY_TX,I2C0_SDA_INPUT/I2C0_SDA_OUT,SWDT0_RST_OUT,GEM1_MDIO_IN/GEM1_MDIO_OUT,TTC2_WAVE_OUT,UA0_TXD,?..." bitfld.long 0xCC 3.--4. " L2_SEL ,Level 2 mux select" "Level 3 mux output,,SDIO1_CLK_OUT,?..." textline " " bitfld.long 0xCC 2. " L1_SEL ,Level 1 mux select" "Level 2 mux output,?..." bitfld.long 0xCC 1. " L0_SEL ,Level 0 mux select" "Level 1 mux output,GEM_TSU_CLK" line.long 0xD0 "MIO_PIN_52,MIO Pin 52 Peripheral Interface Mapping Register" bitfld.long 0xD0 5.--7. " L3_SEL ,Level 3 mux select" "GPIO_2_PIN_IN[0]/GPIO_2_PIN_OUT[0],CAN1_PHY_TX,I2C1_SCL_INPUT/I2C1_SCL_OUT,PJTAG_TCK,SPI0_SCLK_IN/SPI0_SCLK_OUT,TTC1_CLK_IN,UA1_TXD,TRACE_CLK" bitfld.long 0xD0 3.--4. " L2_SEL ,Level 2 mux select" "Level 3 mux output,?..." textline " " bitfld.long 0xD0 2. " L1_SEL ,Level 1 mux select" "Level 2 mux output,USB0_ULPI_CLK_IN" bitfld.long 0xD0 1. " L0_SEL ,Level 0 mux select" "Level 1 mux output,GEM2_RGMII_TX_CLK" line.long 0xD4 "MIO_PIN_53,MIO Pin 53 Peripheral Interface Mapping Register" bitfld.long 0xD4 5.--7. " L3_SEL ,Level 3 mux select" "GPIO_2_PIN_IN[1]/GPIO_2_PIN_OUT[1],CAN1_PHY_RX,I2C1_SDA_INPUT/I2C1_SDA_OUT,PJTAG_TDI,SPI0_N_SS_OUT[2],TTC1_WAVE_OUT,UA1_RXD,TRACE_CTL" bitfld.long 0xD4 3.--4. " L2_SEL ,Level 2 mux select" "Level 3 mux output,?..." textline " " bitfld.long 0xD4 2. " L1_SEL ,Level 1 mux select" "Level 2 mux output,USB0_ULPI_DIR" bitfld.long 0xD4 1. " L0_SEL ,Level 0 mux select" "Level 1 mux output,GEM2_RGMII_TXD[0]" line.long 0xD8 "MIO_PIN_54,MIO Pin 54 Peripheral Interface Mapping Register" bitfld.long 0xD8 5.--7. " L3_SEL ,Level 3 mux select" "GPIO_2_PIN_IN[2]/GPIO_2_PIN_OUT[2],CAN0_PHY_RX,I2C0_SCL_INPUT/I2C0_SCL_OUT,PJTAG_TDO,SPI0_N_SS_OUT[1],TTC0_CLK_IN,UA0_RXD,TRACEDQ[0]" bitfld.long 0xD8 3.--4. " L2_SEL ,Level 2 mux select" "Level 3 mux output,?..." textline " " bitfld.long 0xD8 2. " L1_SEL ,Level 1 mux select" "Level 2 mux output,USB0_ULPI_RX_DATA[2]/USB0_ULPI_TX_DATA[2]" bitfld.long 0xD8 1. " L0_SEL ,Level 0 mux select" "Level 1 mux output,GEM2_RGMII_TXD[1]" line.long 0xDC "MIO_PIN_55,MIO Pin 55 Peripheral Interface Mapping Register" bitfld.long 0xDC 5.--7. " L3_SEL ,Level 3 mux select" "GPIO_2_PIN_IN[3]/GPIO_2_PIN_OUT[3],CAN0_PHY_TX,I2C0_SDA_INPUT/I2C0_SDA_OUT,PJTAG_TMS,SPI0_N_SS_IN/SPI0_N_SS_OUT[0],TTC0_WAVE_OUT,UA0_TXD,TRACEDQ[1]" bitfld.long 0xDC 3.--4. " L2_SEL ,Level 2 mux select" "Level 3 mux output,?..." textline " " bitfld.long 0xDC 2. " L1_SEL ,Level 1 mux select" "Level 2 mux output,Usb0_ulpi_nxt" bitfld.long 0xDC 1. " L0_SEL ,Level 0 mux select" "Level 1 mux output,GEM2_RGMII_TXD[2]" line.long 0xE0 "MIO_PIN_56,MIO Pin 56 Peripheral Interface Mapping Register" bitfld.long 0xE0 5.--7. " L3_SEL ,Level 3 mux select" "GPIO_2_PIN_IN[4]/GPIO_2_PIN_OUT[4],CAN1_PHY_TX,I2C1_SCL_INPUT/I2C1_SCL_OUT,SWDT1_CLK_IN,SPI0_MI/SPI0_SO,TTC3_CLK_IN,UA1_TXD,TRACEDQ[2]" bitfld.long 0xE0 3.--4. " L2_SEL ,Level 2 mux select" "Level 3 mux output,?..." textline " " bitfld.long 0xE0 2. " L1_SEL ,Level 1 mux select" "Level 2 mux output,USB0_ULPI_RX_DATA[0]/USB0_ULPI_TX_DATA[0]" bitfld.long 0xE0 1. " L0_SEL ,Level 0 mux select" "Level 1 mux output,GEM2_RGMII_TXD[3]" line.long 0xE4 "MIO_PIN_57,MIO Pin 57 Peripheral Interface Mapping Register" bitfld.long 0xE4 5.--7. " L3_SEL ,Level 3 mux select" "GPIO_2_PIN_IN[5]/GPIO_2_PIN_OUT[5],CAN1_PHY_RX,I2C1_SDA_INPUT/I2C1_SDA_OUT,SWDT1_RST_OUT,SPI0_MO/SPI0_SI,TTC3_WAVE_OUT,UA1_RXD,TRACEDQ[3]" bitfld.long 0xE4 3.--4. " L2_SEL ,Level 2 mux select" "Level 3 mux output,?..." textline " " bitfld.long 0xE4 2. " L1_SEL ,Level 1 mux select" "Level 2 mux output,USB0_ULPI_RX_DATA[1]/USB0_ULPI_TX_DATA[1]" bitfld.long 0xE4 1. " L0_SEL ,Level 0 mux select" "Level 1 mux output,GEM2_RGMII_TX_CTL" line.long 0xE8 "MIO_PIN_58,MIO Pin 58 Peripheral Interface Mapping Register" bitfld.long 0xE8 5.--7. " L3_SEL ,Level 3 mux select" "GPIO_2_PIN_IN[6]/GPIO_2_PIN_OUT[6],CAN0_PHY_RX,I2C0_SCL_INPUT/I2C0_SCL_OUT,PJTAG_TCK,SPI1_SCLK_IN/SPI1_SCLK_OUT,TTC2_CLK_IN,UA0_RXD,TRACEDQ[4]" bitfld.long 0xE8 3.--4. " L2_SEL ,Level 2 mux select" "Level 3 mux output,?..." textline " " bitfld.long 0xE8 2. " L1_SEL ,Level 1 mux select" "Level 2 mux output,USB0_ULPI_STP" bitfld.long 0xE8 1. " L0_SEL ,Level 0 mux select" "Level 1 mux output,GEM2_RGMII_RX_CLK" line.long 0xEC "MIO_PIN_59,MIO Pin 59 Peripheral Interface Mapping Register" bitfld.long 0xEC 5.--7. " L3_SEL ,Level 3 mux select" "GPIO_2_PIN_IN[7]/GPIO_2_PIN_OUT[7],CAN0_PHY_TX,I2C0_SDA_INPUT/I2C0_SDA_OUT,PJTAG_TDI,SPI1_N_SS_OUT[2],TTC2_WAVE_OUT,UA0_TXD,TRACEDQ[5]" bitfld.long 0xEC 3.--4. " L2_SEL ,Level 2 mux select" "Level 3 mux output,?..." textline " " bitfld.long 0xEC 2. " L1_SEL ,Level 1 mux select" "Level 2 mux output,USB0_ULPI_RX_DATA[3]/USB0_ULPI_TX_DATA[3]" bitfld.long 0xEC 1. " L0_SEL ,Level 0 mux select" "Level 1 mux output,GEM2_RGMII_RXD[0]" line.long 0xF0 "MIO_PIN_60,MIO Pin 60 Peripheral Interface Mapping Register" bitfld.long 0xF0 5.--7. " L3_SEL ,Level 3 mux select" "GPIO_2_PIN_IN[8]/GPIO_2_PIN_OUT[8],CAN1_PHY_TX,I2C1_SCL_INPUT/I2C1_SCL_OUT,PJTAG_TDO,SPI1_N_SS_OUT[1],TTC1_CLK_IN,UA1_TXD,TRACEDQ[6]" bitfld.long 0xF0 3.--4. " L2_SEL ,Level 2 mux select" "Level 3 mux output,?..." textline " " bitfld.long 0xF0 2. " L1_SEL ,Level 1 mux select" "Level 2 mux output,USB0_ULPI_RX_DATA[4]/USB0_ULPI_TX_DATA[4]" bitfld.long 0xF0 1. " L0_SEL ,Level 0 mux select" "Level 1 mux output,GEM2_RGMII_RXD[1]" line.long 0xF4 "MIO_PIN_61,MIO Pin 61 Peripheral Interface Mapping Register" bitfld.long 0xF4 5.--7. " L3_SEL ,Level 3 mux select" "GPIO_2_PIN_IN[9]/GPIO_2_PIN_OUT[9],CAN1_PHY_RX,I2C1_SDA_INPUT/I2C1_SDA_OUT,PJTAG_TMS,SPI1_N_SS_IN/SPI1_N_SS_OUT[0],TTC1_WAVE_OUT,UA1_RXD,TRACEDQ[7]" bitfld.long 0xF4 3.--4. " L2_SEL ,Level 2 mux select" "Level 3 mux output,?..." textline " " bitfld.long 0xF4 2. " L1_SEL ,Level 1 mux select" "Level 2 mux output,USB0_ULPI_RX_DATA[5]/USB0_ULPI_TX_DATA[5]" bitfld.long 0xF4 1. " L0_SEL ,Level 0 mux select" "Level 1 mux output,GEM2_RGMII_RXD[2]" line.long 0xF8 "MIO_PIN_62,MIO Pin 62 Peripheral Interface Mapping Register" bitfld.long 0xF8 5.--7. " L3_SEL ,Level 3 mux select" "GPIO_2_PIN_IN[10]/GPIO_2_PIN_OUT[10],CAN0_PHY_RX,I2C0_SCL_INPUT/I2C0_SCL_OUT,SWDT0_CLK_IN,SPI1_MI/SPI1_SO,TTC0_CLK_IN,UA0_RXD,TRACEDQ[8]" bitfld.long 0xF8 3.--4. " L2_SEL ,Level 2 mux select" "Level 3 mux output,?..." textline " " bitfld.long 0xF8 2. " L1_SEL ,Level 1 mux select" "Level 2 mux output,USB0_ULPI_RX_DATA[6]/USB0_ULPI_TX_DATA[6]" bitfld.long 0xF8 1. " L0_SEL ,Level 0 mux select" "Level 1 mux output,GEM2_RGMII_RXD[3]" line.long 0xFC "MIO_PIN_63,MIO Pin 63 Peripheral Interface Mapping Register" bitfld.long 0xFC 5.--7. " L3_SEL ,Level 3 mux select" "GPIO_2_PIN_IN[11]/GPIO_2_PIN_OUT[11],CAN0_PHY_TX,I2C0_SDA_INPUT/I2C0_SDA_OUT,SWDT0_RST_OUT,SPI1_MO/SPI1_SI,TTC0_WAVE_OUT,UA0_TXD,TRACEDQ[9]" bitfld.long 0xFC 3.--4. " L2_SEL ,Level 2 mux select" "Level 3 mux output,?..." textline " " bitfld.long 0xFC 2. " L1_SEL ,Level 1 mux select" "Level 2 mux output,USB0_ULPI_RX_DATA[7]/USB0_ULPI_TX_DATA[7]" bitfld.long 0xFC 1. " L0_SEL ,Level 0 mux select" "Level 1 mux output,Gem2_rgmii_rx_ctl" line.long 0x100 "MIO_PIN_64,MIO Pin 64 Peripheral Interface Mapping Register" bitfld.long 0x100 5.--7. " L3_SEL ,Level 3 mux select" "GPIO_2_PIN_IN[12]/GPIO_2_PIN_OUT[12],CAN1_PHY_TX,I2C1_SCL_INPUT/I2C1_SCL_OUT,SWDT1_CLK_IN,SPI0_SCLK_IN/SPI0_SCLK_OUT,TTC3_CLK_IN,UA1_TXD,TRACEDQ[10]" bitfld.long 0x100 3.--4. " L2_SEL ,Level 2 mux select" "Level 3 mux output,SDIO0_CLK_OUT,?..." textline " " bitfld.long 0x100 2. " L1_SEL ,Level 1 mux select" "Level 2 mux output,USB1_ULPI_CLK_IN" bitfld.long 0x100 1. " L0_SEL ,Level 0 mux select" "Level 1 mux output,GEM3_RGMII_TX_CLK" line.long 0x104 "MIO_PIN_65,MIO Pin 65 Peripheral Interface Mapping Register" bitfld.long 0x104 5.--7. " L3_SEL ,Level 3 mux select" "GPIO_2_PIN_IN[13]/GPIO_2_PIN_OUT[13],CAN1_PHY_RX,I2C1_SDA_INPUT/I2C1_SDA_OUT,SWDT1_RST_OUT,SPI0_N_SS_OUT[2],TTC3_WAVE_OUT,UA1_RXD,TRACEDQ[11]" bitfld.long 0x104 3.--4. " L2_SEL ,Level 2 mux select" "Level 3 mux output,SDIO0_CD_N,?..." textline " " bitfld.long 0x104 2. " L1_SEL ,Level 1 mux select" "Level 2 mux output,USB1_ULPI_DIR" bitfld.long 0x104 1. " L0_SEL ,Level 0 mux select" "Level 1 mux output,GEM3_RGMII_TXD[0]" line.long 0x108 "MIO_PIN_66,MIO Pin 66 Peripheral Interface Mapping Register" bitfld.long 0x108 5.--7. " L3_SEL ,Level 3 mux select" "GPIO_2_PIN_IN[14]/GPIO_2_PIN_OUT[14],CAN0_PHY_RX,I2C0_SCL_INPUT/I2C0_SCL_OUT,SWDT0_CLK_IN,SPI0_N_SS_OUT[1],TTC2_CLK_IN,UA0_RXD,TRACEDQ[12]" bitfld.long 0x108 3.--4. " L2_SEL ,Level 2 mux select" "Level 3 mux output,SD0_CMD_IN/SD0_CMD_OUT,?..." textline " " bitfld.long 0x108 2. " L1_SEL ,Level 1 mux select" "Level 2 mux output,USB1_ULPI_RX_DATA[2]/USB1_ULPI_TX_DATA[2]" bitfld.long 0x108 1. " L0_SEL ,Level 0 mux select" "Level 1 mux output,GEM3_RGMII_TXD[1]" line.long 0x10C "MIO_PIN_67,MIO Pin 67 Peripheral Interface Mapping Register" bitfld.long 0x10C 5.--7. " L3_SEL ,Level 3 mux select" "GPIO_2_PIN_IN[15]/GPIO_2_PIN_OUT[15],CAN0_PHY_TX,I2C0_SDA_INPUT/I2C0_SDA_OUT,SWDT0_RST_OUT,SPI0_N_SS_IN/SPI0_N_SS_OUT[0],TTC2_WAVE_OUT,UA0_TXD,TRACEDQ[13]" bitfld.long 0x10C 3.--4. " L2_SEL ,Level 2 mux select" "Level 3 mux output,SD0_DATA_IN[0]/SD0_DATA_OUT[0],?..." textline " " bitfld.long 0x10C 2. " L1_SEL ,Level 1 mux select" "Level 2 mux output,USB1_ULPI_NXT" bitfld.long 0x10C 1. " L0_SEL ,Level 0 mux select" "Level 1 mux output,GEM3_RGMII_TXD[2]" line.long 0x110 "MIO_PIN_68,MIO Pin 68 Peripheral Interface Mapping Register" bitfld.long 0x110 5.--7. " L3_SEL ,Level 3 mux select" "GPIO_2_PIN_IN[16]/GPIO_2_PIN_OUT[16],CAN1_PHY_TX,I2C1_SCL_INPUT/I2C1_SCL_OUT,SWDT1_CLK_IN,SPI0_MI/SPI0_SO,TTC1_CLK_IN,UA1_TXD,TRACEDQ[14]" bitfld.long 0x110 3.--4. " L2_SEL ,Level 2 mux select" "Level 3 mux output,SD0_DATA_IN[1]/SD0_DATA_OUT[1],?..." textline " " bitfld.long 0x110 2. " L1_SEL ,Level 1 mux select" "Level 2 mux output,USB1_ULPI_RX_DATA[0]/USB1_ULPI_TX_DATA[0]" bitfld.long 0x110 1. " L0_SEL ,Level 0 mux select" "Level 1 mux output,GEM3_RGMII_TXD[3]" line.long 0x114 "MIO_PIN_69,MIO Pin 69 Peripheral Interface Mapping Register" bitfld.long 0x114 5.--7. " L3_SEL ,Level 3 mux select" "GPIO_2_PIN_IN[17]/GPIO_2_PIN_OUT[17],CAN1_PHY_RX,I2C1_SDA_INPUT/I2C1_SDA_OUT,SWDT1_RST_OUT,SPI0_MO/SPI0_SI,TTC1_WAVE_OUT,UA1_RXD,TRACEDQ[15]" bitfld.long 0x114 3.--4. " L2_SEL ,Level 2 mux select" "Level 3 mux output,SD0_DATA_IN[2]/SD0_DATA_OUT[2],SDIO1_WP,?..." textline " " bitfld.long 0x114 2. " L1_SEL ,Level 1 mux select" "Level 2 mux output,USB1_ULPI_RX_DATA[1]/USB1_ULPI_TX_DATA[1]" bitfld.long 0x114 1. " L0_SEL ,Level 0 mux select" "Level 1 mux output,GEM3_RGMII_TX_CTL" line.long 0x118 "MIO_PIN_70,MIO Pin 70 Peripheral Interface Mapping Register" bitfld.long 0x118 5.--7. " L3_SEL ,Level 3 mux select" "GPIO_2_PIN_IN[18]/GPIO_2_PIN_OUT[18],CAN0_PHY_RX,I2C0_SCL_INPUT/I2C0_SCL_OUT,SWDT0_CLK_IN,SPI1_SCLK_IN/SPI1_SCLK_OUT,TTC0_CLK_IN,UA0_RXD,?..." bitfld.long 0x118 3.--4. " L2_SEL ,Level 2 mux select" "Level 3 mux output,SD0_DATA_IN[3]/SD0_DATA_OUT[3],SDIO1_BUS_POW,?..." textline " " bitfld.long 0x118 2. " L1_SEL ,Level 1 mux select" "Level 2 mux output,USB1_ULPI_STP" bitfld.long 0x118 1. " L0_SEL ,Level 0 mux select" "Level 1 mux output,GEM3_RGMII_RX_CLK" line.long 0x11C "MIO_PIN_71,MIO Pin 71 Peripheral Interface Mapping Register" bitfld.long 0x11C 5.--7. " L3_SEL ,Level 3 mux select" "GPIO_2_PIN_IN[19]/GPIO_2_PIN_OUT[19],CAN0_PHY_TX,I2C0_SDA_INPUT/I2C0_SDA_OUT,SWDT0_RST_OUT,SPI1_N_SS_OUT[2],TTC0_WAVE_OUT,UA0_TXD,?..." bitfld.long 0x11C 3.--4. " L2_SEL ,Level 2 mux select" "Level 3 mux output,SD0_DATA_IN[4]/SD0_DATA_OUT[4],SD1_DATA_IN[0]/SD1_DATA_OUT[0],?..." textline " " bitfld.long 0x11C 2. " L1_SEL ,Level 1 mux select" "Level 2 mux output,USB1_ULPI_RX_DATA[3]/USB1_ULPI_TX_DATA[3]" bitfld.long 0x11C 1. " L0_SEL ,Level 0 mux select" "Level 1 mux output,GEM3_RGMII_RXD[0]" line.long 0x120 "MIO_PIN_72,MIO Pin 72 Peripheral Interface Mapping Register" bitfld.long 0x120 5.--7. " L3_SEL ,Level 3 mux select" "GPIO_2_PIN_IN[20]/GPIO_2_PIN_OUT[20],CAN1_PHY_TX,I2C1_SCL_INPUT/I2C1_SCL_OUT,SWDT1_CLK_IN,SPI1_N_SS_OUT[1],,UA1_TXD,?..." bitfld.long 0x120 3.--4. " L2_SEL ,Level 2 mux select" "Level 3 mux output,SD0_DATA_IN[5]/SD0_DATA_OUT[5],SD1_DATA_IN[1]/SD1_DATA_OUT[1],?..." textline " " bitfld.long 0x120 2. " L1_SEL ,Level 1 mux select" "Level 2 mux output,USB1_ULPI_RX_DATA[4]/USB1_ULPI_TX_DATA[4]" bitfld.long 0x120 1. " L0_SEL ,Level 0 mux select" "Level 1 mux output,GEM3_RGMII_RXD[1]" line.long 0x124 "MIO_PIN_73,MIO Pin 73 Peripheral Interface Mapping Register" bitfld.long 0x124 5.--7. " L3_SEL ,Level 3 mux select" "GPIO_2_PIN_IN[21]/GPIO_2_PIN_OUT[21],CAN1_PHY_RX,I2C1_SDA_INPUT/I2C1_SDA_OUT,SWDT1_RST_OUT,SPI1_N_SS_OUT[0],,UA1_RXD,?..." bitfld.long 0x124 3.--4. " L2_SEL ,Level 2 mux select" "Level 3 mux output,SD0_DATA_IN[6]/SD0_DATA_OUT[6],SD1_DATA_IN[2]/SD1_DATA_OUT[2],?..." textline " " bitfld.long 0x124 2. " L1_SEL ,Level 1 mux select" "Level 2 mux output,USB1_ULPI_RX_DATA[5]/USB1_ULPI_TX_DATA[5]" bitfld.long 0x124 1. " L0_SEL ,Level 0 mux select" "Level 1 mux output,GEM3_RGMII_RXD[2]" line.long 0x128 "MIO_PIN_74,MIO Pin 74 Peripheral Interface Mapping Register" bitfld.long 0x128 5.--7. " L3_SEL ,Level 3 mux select" "GPIO_2_PIN_IN[22]/GPIO_2_PIN_OUT[22],CAN0_PHY_RX,I2C0_SCL_INPUT/I2C0_SCL_OUT,SWDT0_CLK_IN,SPI1_MI/SPI1_SO,,UA0_RXD,?..." bitfld.long 0x128 3.--4. " L2_SEL ,Level 2 mux select" "Level 3 mux output,SD0_DATA_IN[7]/SD0_DATA_OUT[7],SD1_DATA_IN[3]/SD1_DATA_OUT[3],?..." textline " " bitfld.long 0x128 2. " L1_SEL ,Level 1 mux select" "Level 2 mux output,USB1_ULPI_RX_DATA[6]/USB1_ULPI_TX_DATA[6]" bitfld.long 0x128 1. " L0_SEL ,Level 0 mux select" "Level 1 mux output,GEM3_RGMII_RXD[3]" line.long 0x12C "MIO_PIN_75,MIO Pin 75 Peripheral Interface Mapping Register" bitfld.long 0x12C 5.--7. " L3_SEL ,Level 3 mux select" "GPIO_2_PIN_IN[23]/GPIO_2_PIN_OUT[23],CAN0_PHY_TX,I2C0_SDA_INPUT/I2C0_SDA_OUT,SWDT0_RST_OUT,SPI1_MO/SPI1_SI,,UA0_TXD,?..." bitfld.long 0x12C 3.--4. " L2_SEL ,Level 2 mux select" "Level 3 mux output,SDIO0_BUS_POW,SD1_CMD_IN/SD1_CMD_OUT,?..." textline " " bitfld.long 0x12C 2. " L1_SEL ,Level 1 mux select" "Level 2 mux output,USB1_ULPI_RX_DATA[7]/USB1_ULPI_TX_DATA[7]" bitfld.long 0x12C 1. " L0_SEL ,Level 0 mux select" "Level 1 mux output,GEM3_RGMII_RX_CTL" line.long 0x130 "MIO_PIN_76,MIO Pin 76 Peripheral Interface Mapping Register" bitfld.long 0x130 5.--7. " L3_SEL ,Level 3 mux select" "GPIO_2_PIN_IN[24]/GPIO_2_PIN_OUT[24],CAN1_PHY_TX,I2C1_SCL_INPUT/I2C1_SCL_OUT,GEM0_MDC,GEM1_MDC,GEM2_MDC,GEM3_MDC,?..." bitfld.long 0x130 3.--4. " L2_SEL ,Level 2 mux select" "Level 3 mux output,SDIO0_WP,SDIO1_CLK_OUT,?..." textline " " bitfld.long 0x130 2. " L1_SEL ,Level 1 mux select" "Level 2 mux output,?..." bitfld.long 0x130 1. " L0_SEL ,Level 0 mux select" "Level 1 mux output,?..." line.long 0x134 "MIO_PIN_77,MIO Pin 77 Peripheral Interface Mapping Register" bitfld.long 0x134 5.--7. " L3_SEL ,Level 3 mux select" "GPIO_2_PIN_IN[25]/GPIO_2_PIN_OUT[25],CAN1_PHY_RX,I2C1_SDA_INPUT/I2C1_SDA_OUT,GEM0_MDIO_IN,GEM1_MDIO_IN,GEM2_MDIO_IN,GEM3_MDIO_IN,?..." bitfld.long 0x134 3.--4. " L2_SEL ,Level 2 mux select" "Level 3 mux output,,SDIO1_CD_N,?..." textline " " bitfld.long 0x134 2. " L1_SEL ,Level 1 mux select" "Level 2 mux output,?..." bitfld.long 0x134 1. " L0_SEL ,Level 0 mux select" "Level 1 mux output,?..." textline " " line.long 0x138 "BANK0_CTRL0,Drive0 Control To MIO Bank 0 Register" bitfld.long 0x138 25. " DRIVE0[25] ,MIO[25] control" "Low,High" bitfld.long 0x138 24. " [24] ,MIO[24] control" "Low,High" bitfld.long 0x138 23. " [23] ,MIO[23] control" "Low,High" bitfld.long 0x138 22. " [22] ,MIO[22] control" "Low,High" textline " " bitfld.long 0x138 21. " [21] ,MIO[21] control" "Low,High" bitfld.long 0x138 20. " [20] ,MIO[20] control" "Low,High" bitfld.long 0x138 19. " [19] ,MIO[19] control" "Low,High" bitfld.long 0x138 18. " [18] ,MIO[18] control" "Low,High" textline " " bitfld.long 0x138 17. " [17] ,MIO[17] control" "Low,High" bitfld.long 0x138 16. " [16] ,MIO[16] control" "Low,High" bitfld.long 0x138 15. " [15] ,MIO[15] control" "Low,High" bitfld.long 0x138 14. " [14] ,MIO[14] control" "Low,High" textline " " bitfld.long 0x138 13. " [13] ,MIO[13] control" "Low,High" bitfld.long 0x138 12. " [12] ,MIO[12] control" "Low,High" bitfld.long 0x138 11. " [11] ,MIO[11] control" "Low,High" bitfld.long 0x138 10. " [10] ,MIO[10] control" "Low,High" textline " " bitfld.long 0x138 9. " [9] ,MIO[9] control" "Low,High" bitfld.long 0x138 8. " [8] ,MIO[8] control" "Low,High" bitfld.long 0x138 7. " [7] ,MIO[7] control" "Low,High" bitfld.long 0x138 6. " [6] ,MIO[6] control" "Low,High" textline " " bitfld.long 0x138 5. " [5] ,MIO[5] control" "Low,High" bitfld.long 0x138 4. " [4] ,MIO[4] control" "Low,High" bitfld.long 0x138 3. " [3] ,MIO[3] control" "Low,High" bitfld.long 0x138 2. " [2] ,MIO[2] control" "Low,High" textline " " bitfld.long 0x138 1. " [1] ,MIO[1] control" "Low,High" bitfld.long 0x138 0. " [0] ,MIO[0] control" "Low,High" line.long 0x13C "BANK0_CTRL1,Drive1 Control To MIO Bank 0 Register" bitfld.long 0x13C 25. " DRIVE1[25] ,MIO[25] control" "Low,High" bitfld.long 0x13C 24. " [24] ,MIO[24] control" "Low,High" bitfld.long 0x13C 23. " [23] ,MIO[23] control" "Low,High" bitfld.long 0x13C 22. " [22] ,MIO[22] control" "Low,High" textline " " bitfld.long 0x13C 21. " [21] ,MIO[21] control" "Low,High" bitfld.long 0x13C 20. " [20] ,MIO[20] control" "Low,High" bitfld.long 0x13C 19. " [19] ,MIO[19] control" "Low,High" bitfld.long 0x13C 18. " [18] ,MIO[18] control" "Low,High" textline " " bitfld.long 0x13C 17. " [17] ,MIO[17] control" "Low,High" bitfld.long 0x13C 16. " [16] ,MIO[16] control" "Low,High" bitfld.long 0x13C 15. " [15] ,MIO[15] control" "Low,High" bitfld.long 0x13C 14. " [14] ,MIO[14] control" "Low,High" textline " " bitfld.long 0x13C 13. " [13] ,MIO[13] control" "Low,High" bitfld.long 0x13C 12. " [12] ,MIO[12] control" "Low,High" bitfld.long 0x13C 11. " [11] ,MIO[11] control" "Low,High" bitfld.long 0x13C 10. " [10] ,MIO[10] control" "Low,High" textline " " bitfld.long 0x13C 9. " [9] ,MIO[9] control" "Low,High" bitfld.long 0x13C 8. " [8] ,MIO[8] control" "Low,High" bitfld.long 0x13C 7. " [7] ,MIO[7] control" "Low,High" bitfld.long 0x13C 6. " [6] ,MIO[6] control" "Low,High" textline " " bitfld.long 0x13C 5. " [5] ,MIO[5] control" "Low,High" bitfld.long 0x13C 4. " [4] ,MIO[4] control" "Low,High" bitfld.long 0x13C 3. " [3] ,MIO[3] control" "Low,High" bitfld.long 0x13C 2. " [2] ,MIO[2] control" "Low,High" textline " " bitfld.long 0x13C 1. " [1] ,MIO[1] control" "Low,High" bitfld.long 0x13C 0. " [0] ,MIO[0] control" "Low,High" line.long 0x140 "BANK0_CTRL3,Schmitt/cmos Input Select For MIO Bank 0 Register" bitfld.long 0x140 25. " SCHMITT_CMOS[25] ,MIO[25] schmitt/cmos input selection" "CMOS,Schmitt" bitfld.long 0x140 24. " [24] ,MIO[24] schmitt/cmos input selection" "CMOS,Schmitt" bitfld.long 0x140 23. " [23] ,MIO[23] schmitt/cmos input selection" "CMOS,Schmitt" bitfld.long 0x140 22. " [22] ,MIO[22] schmitt/cmos input selection" "CMOS,Schmitt" textline " " bitfld.long 0x140 21. " [21] ,MIO[21] schmitt/cmos input selection" "CMOS,Schmitt" bitfld.long 0x140 20. " [20] ,MIO[20] schmitt/cmos input selection" "CMOS,Schmitt" bitfld.long 0x140 19. " [19] ,MIO[19] schmitt/cmos input selection" "CMOS,Schmitt" bitfld.long 0x140 18. " [18] ,MIO[18] schmitt/cmos input selection" "CMOS,Schmitt" textline " " bitfld.long 0x140 17. " [17] ,MIO[17] schmitt/cmos input selection" "CMOS,Schmitt" bitfld.long 0x140 16. " [16] ,MIO[16] schmitt/cmos input selection" "CMOS,Schmitt" bitfld.long 0x140 15. " [15] ,MIO[15] schmitt/cmos input selection" "CMOS,Schmitt" bitfld.long 0x140 14. " [14] ,MIO[14] schmitt/cmos input selection" "CMOS,Schmitt" textline " " bitfld.long 0x140 13. " [13] ,MIO[13] schmitt/cmos input selection" "CMOS,Schmitt" bitfld.long 0x140 12. " [12] ,MIO[12] schmitt/cmos input selection" "CMOS,Schmitt" bitfld.long 0x140 11. " [11] ,MIO[11] schmitt/cmos input selection" "CMOS,Schmitt" bitfld.long 0x140 10. " [10] ,MIO[10] schmitt/cmos input selection" "CMOS,Schmitt" textline " " bitfld.long 0x140 9. " [9] ,MIO[9] schmitt/cmos input selection" "CMOS,Schmitt" bitfld.long 0x140 8. " [8] ,MIO[8] schmitt/cmos input selection" "CMOS,Schmitt" bitfld.long 0x140 7. " [7] ,MIO[7] schmitt/cmos input selection" "CMOS,Schmitt" bitfld.long 0x140 6. " [6] ,MIO[6] schmitt/cmos input selection" "CMOS,Schmitt" textline " " bitfld.long 0x140 5. " [5] ,MIO[5] schmitt/cmos input selection" "CMOS,Schmitt" bitfld.long 0x140 4. " [4] ,MIO[4] schmitt/cmos input selection" "CMOS,Schmitt" bitfld.long 0x140 3. " [3] ,MIO[3] schmitt/cmos input selection" "CMOS,Schmitt" bitfld.long 0x140 2. " [2] ,MIO[2] schmitt/cmos input selection" "CMOS,Schmitt" textline " " bitfld.long 0x140 1. " [1] ,MIO[1] schmitt/cmos input selection" "CMOS,Schmitt" bitfld.long 0x140 0. " [0] ,MIO[0] schmitt/cmos input selection" "CMOS,Schmitt" line.long 0x144 "BANK0_CTRL4,Pull Control For MIO Bank 0 Register" bitfld.long 0x144 25. " PULL_HIGH_LOW[25] ,MIO[25] pull up/down selection" "Down,Up" bitfld.long 0x144 24. " [24] ,MIO[24] pull up/down selection" "Down,Up" bitfld.long 0x144 23. " [23] ,MIO[23] pull up/down selection" "Down,Up" bitfld.long 0x144 22. " [22] ,MIO[22] pull up/down selection" "Down,Up" textline " " bitfld.long 0x144 21. " [21] ,MIO[21] pull up/down selection" "Down,Up" bitfld.long 0x144 20. " [20] ,MIO[20] pull up/down selection" "Down,Up" bitfld.long 0x144 19. " [19] ,MIO[19] pull up/down selection" "Down,Up" bitfld.long 0x144 18. " [18] ,MIO[18] pull up/down selection" "Down,Up" textline " " bitfld.long 0x144 17. " [17] ,MIO[17] pull up/down selection" "Down,Up" bitfld.long 0x144 16. " [16] ,MIO[16] pull up/down selection" "Down,Up" bitfld.long 0x144 15. " [15] ,MIO[15] pull up/down selection" "Down,Up" bitfld.long 0x144 14. " [14] ,MIO[14] pull up/down selection" "Down,Up" textline " " bitfld.long 0x144 13. " [13] ,MIO[13] pull up/down selection" "Down,Up" bitfld.long 0x144 12. " [12] ,MIO[12] pull up/down selection" "Down,Up" bitfld.long 0x144 11. " [11] ,MIO[11] pull up/down selection" "Down,Up" bitfld.long 0x144 10. " [10] ,MIO[10] pull up/down selection" "Down,Up" textline " " bitfld.long 0x144 9. " [9] ,MIO[9] pull up/down selection" "Down,Up" bitfld.long 0x144 8. " [8] ,MIO[8] pull up/down selection" "Down,Up" bitfld.long 0x144 7. " [7] ,MIO[7] pull up/down selection" "Down,Up" bitfld.long 0x144 6. " [6] ,MIO[6] pull up/down selection" "Down,Up" textline " " bitfld.long 0x144 5. " [5] ,MIO[5] pull up/down selection" "Down,Up" bitfld.long 0x144 4. " [4] ,MIO[4] pull up/down selection" "Down,Up" bitfld.long 0x144 3. " [3] ,MIO[3] pull up/down selection" "Down,Up" bitfld.long 0x144 2. " [2] ,MIO[2] pull up/down selection" "Down,Up" textline " " bitfld.long 0x144 1. " [1] ,MIO[1] pull up/down selection" "Down,Up" bitfld.long 0x144 0. " [0] ,MIO[0] pull up/down selection" "Down,Up" line.long 0x148 "BANK0_CTRL5,Pull Selection Enable For MIO Bank 0 Register" bitfld.long 0x148 25. " PULL_ENABLE[25] ,MIO[25] pull selection enable" "Disabled,Enabled" bitfld.long 0x148 24. " [24] ,MIO[24] pull selection enable" "Disabled,Enabled" bitfld.long 0x148 23. " [23] ,MIO[23] pull selection enable" "Disabled,Enabled" bitfld.long 0x148 22. " [22] ,MIO[22] pull selection enable" "Disabled,Enabled" textline " " bitfld.long 0x148 21. " [21] ,MIO[21] pull selection enable" "Disabled,Enabled" bitfld.long 0x148 20. " [20] ,MIO[20] pull selection enable" "Disabled,Enabled" bitfld.long 0x148 19. " [19] ,MIO[19] pull selection enable" "Disabled,Enabled" bitfld.long 0x148 18. " [18] ,MIO[18] pull selection enable" "Disabled,Enabled" textline " " bitfld.long 0x148 17. " [17] ,MIO[17] pull selection enable" "Disabled,Enabled" bitfld.long 0x148 16. " [16] ,MIO[16] pull selection enable" "Disabled,Enabled" bitfld.long 0x148 15. " [15] ,MIO[15] pull selection enable" "Disabled,Enabled" bitfld.long 0x148 14. " [14] ,MIO[14] pull selection enable" "Disabled,Enabled" textline " " bitfld.long 0x148 13. " [13] ,MIO[13] pull selection enable" "Disabled,Enabled" bitfld.long 0x148 12. " [12] ,MIO[12] pull selection enable" "Disabled,Enabled" bitfld.long 0x148 11. " [11] ,MIO[11] pull selection enable" "Disabled,Enabled" bitfld.long 0x148 10. " [10] ,MIO[10] pull selection enable" "Disabled,Enabled" textline " " bitfld.long 0x148 9. " [9] ,MIO[9] pull selection enable" "Disabled,Enabled" bitfld.long 0x148 8. " [8] ,MIO[8] pull selection enable" "Disabled,Enabled" bitfld.long 0x148 7. " [7] ,MIO[7] pull selection enable" "Disabled,Enabled" bitfld.long 0x148 6. " [6] ,MIO[6] pull selection enable" "Disabled,Enabled" textline " " bitfld.long 0x148 5. " [5] ,MIO[5] pull selection enable" "Disabled,Enabled" bitfld.long 0x148 4. " [4] ,MIO[4] pull selection enable" "Disabled,Enabled" bitfld.long 0x148 3. " [3] ,MIO[3] pull selection enable" "Disabled,Enabled" bitfld.long 0x148 2. " [2] ,MIO[2] pull selection enable" "Disabled,Enabled" textline " " bitfld.long 0x148 1. " [1] ,MIO[1] pull selection enable" "Disabled,Enabled" bitfld.long 0x148 0. " [0] ,MIO[0] pull selection enable" "Disabled,Enabled" line.long 0x14C "BANK0_CTRL6,Slew Rate Control For MIO Bank 0 Register" bitfld.long 0x14C 25. " SLOW_FAST_SLEW[25] ,MIO[25] slew rate control" "Fast,Slow" bitfld.long 0x14C 24. " [24] ,MIO[24] slew rate control" "Fast,Slow" bitfld.long 0x14C 23. " [23] ,MIO[23] slew rate control" "Fast,Slow" bitfld.long 0x14C 22. " [22] ,MIO[22] slew rate control" "Fast,Slow" textline " " bitfld.long 0x14C 21. " [21] ,MIO[21] slew rate control" "Fast,Slow" bitfld.long 0x14C 20. " [20] ,MIO[20] slew rate control" "Fast,Slow" bitfld.long 0x14C 19. " [19] ,MIO[19] slew rate control" "Fast,Slow" bitfld.long 0x14C 18. " [18] ,MIO[18] slew rate control" "Fast,Slow" textline " " bitfld.long 0x14C 17. " [17] ,MIO[17] slew rate control" "Fast,Slow" bitfld.long 0x14C 16. " [16] ,MIO[16] slew rate control" "Fast,Slow" bitfld.long 0x14C 15. " [15] ,MIO[15] slew rate control" "Fast,Slow" bitfld.long 0x14C 14. " [14] ,MIO[14] slew rate control" "Fast,Slow" textline " " bitfld.long 0x14C 13. " [13] ,MIO[13] slew rate control" "Fast,Slow" bitfld.long 0x14C 12. " [12] ,MIO[12] slew rate control" "Fast,Slow" bitfld.long 0x14C 11. " [11] ,MIO[11] slew rate control" "Fast,Slow" bitfld.long 0x14C 10. " [10] ,MIO[10] slew rate control" "Fast,Slow" textline " " bitfld.long 0x14C 9. " [9] ,MIO[9] slew rate control" "Fast,Slow" bitfld.long 0x14C 8. " [8] ,MIO[8] slew rate control" "Fast,Slow" bitfld.long 0x14C 7. " [7] ,MIO[7] slew rate control" "Fast,Slow" bitfld.long 0x14C 6. " [6] ,MIO[6] slew rate control" "Fast,Slow" textline " " bitfld.long 0x14C 5. " [5] ,MIO[5] slew rate control" "Fast,Slow" bitfld.long 0x14C 4. " [4] ,MIO[4] slew rate control" "Fast,Slow" bitfld.long 0x14C 3. " [3] ,MIO[3] slew rate control" "Fast,Slow" bitfld.long 0x14C 2. " [2] ,MIO[2] slew rate control" "Fast,Slow" textline " " bitfld.long 0x14C 1. " [1] ,MIO[1] slew rate control" "Fast,Slow" bitfld.long 0x14C 0. " [0] ,MIO[0] slew rate control" "Fast,Slow" rgroup.long 0x150++0x03 line.long 0x00 "BANK0_STATUS,Voltage Mode Status Of The IO Bank 0 Register" bitfld.long 0x00 0. " VOLTAGE_MODE ,Voltage mode status" "3.3V,1.8V" group.long 0x154++0x17 line.long 0x00 "BANK1_CTRL0,Drive0 Control To MIO Bank 1 Register" bitfld.long 0x00 25. " DRIVE0[51] ,MIO[51] control" "Low,High" bitfld.long 0x00 24. " [50] ,MIO[50] control" "Low,High" bitfld.long 0x00 23. " [49] ,MIO[49] control" "Low,High" bitfld.long 0x00 22. " [48] ,MIO[48] control" "Low,High" textline " " bitfld.long 0x00 21. " [47] ,MIO[47] control" "Low,High" bitfld.long 0x00 20. " [46] ,MIO[46] control" "Low,High" bitfld.long 0x00 19. " [45] ,MIO[45] control" "Low,High" bitfld.long 0x00 18. " [44] ,MIO[44] control" "Low,High" textline " " bitfld.long 0x00 17. " [43] ,MIO[43] control" "Low,High" bitfld.long 0x00 16. " [42] ,MIO[42] control" "Low,High" bitfld.long 0x00 15. " [41] ,MIO[41] control" "Low,High" bitfld.long 0x00 14. " [40] ,MIO[40] control" "Low,High" textline " " bitfld.long 0x00 13. " [39] ,MIO[39] control" "Low,High" bitfld.long 0x00 12. " [38] ,MIO[38] control" "Low,High" bitfld.long 0x00 11. " [37] ,MIO[37] control" "Low,High" bitfld.long 0x00 10. " [36] ,MIO[36] control" "Low,High" textline " " bitfld.long 0x00 9. " [35] ,MIO[35] control" "Low,High" bitfld.long 0x00 8. " [34] ,MIO[34] control" "Low,High" bitfld.long 0x00 7. " [33] ,MIO[33] control" "Low,High" bitfld.long 0x00 6. " [32] ,MIO[32] control" "Low,High" textline " " bitfld.long 0x00 5. " [31] ,MIO[31] control" "Low,High" bitfld.long 0x00 4. " [30] ,MIO[30] control" "Low,High" bitfld.long 0x00 3. " [29] ,MIO[29] control" "Low,High" bitfld.long 0x00 2. " [28] ,MIO[28] control" "Low,High" textline " " bitfld.long 0x00 1. " [27] ,MIO[27] control" "Low,High" bitfld.long 0x00 0. " [26] ,MIO[26] control" "Low,High" line.long 0x04 "BANK1_CTRL1,Drive1 Control To MIO Bank 1 Register" bitfld.long 0x04 25. " DRIVE1[51] ,MIO[51] control" "Low,High" bitfld.long 0x04 24. " [50] ,MIO[50] control" "Low,High" bitfld.long 0x04 23. " [49] ,MIO[49] control" "Low,High" bitfld.long 0x04 22. " [48] ,MIO[48] control" "Low,High" textline " " bitfld.long 0x04 21. " [47] ,MIO[47] control" "Low,High" bitfld.long 0x04 20. " [46] ,MIO[46] control" "Low,High" bitfld.long 0x04 19. " [45] ,MIO[45] control" "Low,High" bitfld.long 0x04 18. " [44] ,MIO[44] control" "Low,High" textline " " bitfld.long 0x04 17. " [43] ,MIO[43] control" "Low,High" bitfld.long 0x04 16. " [42] ,MIO[42] control" "Low,High" bitfld.long 0x04 15. " [41] ,MIO[41] control" "Low,High" bitfld.long 0x04 14. " [40] ,MIO[40] control" "Low,High" textline " " bitfld.long 0x04 13. " [39] ,MIO[39] control" "Low,High" bitfld.long 0x04 12. " [38] ,MIO[38] control" "Low,High" bitfld.long 0x04 11. " [37] ,MIO[37] control" "Low,High" bitfld.long 0x04 10. " [36] ,MIO[36] control" "Low,High" textline " " bitfld.long 0x04 9. " [35] ,MIO[35] control" "Low,High" bitfld.long 0x04 8. " [34] ,MIO[34] control" "Low,High" bitfld.long 0x04 7. " [33] ,MIO[33] control" "Low,High" bitfld.long 0x04 6. " [32] ,MIO[32] control" "Low,High" textline " " bitfld.long 0x04 5. " [31] ,MIO[31] control" "Low,High" bitfld.long 0x04 4. " [30] ,MIO[30] control" "Low,High" bitfld.long 0x04 3. " [29] ,MIO[29] control" "Low,High" bitfld.long 0x04 2. " [28] ,MIO[28] control" "Low,High" textline " " bitfld.long 0x04 1. " [27] ,MIO[27] control" "Low,High" bitfld.long 0x04 0. " [26] ,MIO[26] control" "Low,High" line.long 0x08 "BANK1_CTRL3,Schmitt/cmos Input Select For MIO Bank 1 Register" bitfld.long 0x08 25. " SCHMITT_CMOS[51] ,MIO[51] schmitt/cmos input selection" "CMOS,Schmitt" bitfld.long 0x08 24. " [50] ,MIO[50] schmitt/cmos input selection" "CMOS,Schmitt" bitfld.long 0x08 23. " [49] ,MIO[49] schmitt/cmos input selection" "CMOS,Schmitt" bitfld.long 0x08 22. " [48] ,MIO[48] schmitt/cmos input selection" "CMOS,Schmitt" textline " " bitfld.long 0x08 21. " [47] ,MIO[47] schmitt/cmos input selection" "CMOS,Schmitt" bitfld.long 0x08 20. " [46] ,MIO[46] schmitt/cmos input selection" "CMOS,Schmitt" bitfld.long 0x08 19. " [45] ,MIO[45] schmitt/cmos input selection" "CMOS,Schmitt" bitfld.long 0x08 18. " [44] ,MIO[44] schmitt/cmos input selection" "CMOS,Schmitt" textline " " bitfld.long 0x08 17. " [43] ,MIO[43] schmitt/cmos input selection" "CMOS,Schmitt" bitfld.long 0x08 16. " [42] ,MIO[42] schmitt/cmos input selection" "CMOS,Schmitt" bitfld.long 0x08 15. " [41] ,MIO[41] schmitt/cmos input selection" "CMOS,Schmitt" bitfld.long 0x08 14. " [40] ,MIO[40] schmitt/cmos input selection" "CMOS,Schmitt" textline " " bitfld.long 0x08 13. " [39] ,MIO[39] schmitt/cmos input selection" "CMOS,Schmitt" bitfld.long 0x08 12. " [38] ,MIO[38] schmitt/cmos input selection" "CMOS,Schmitt" bitfld.long 0x08 11. " [37] ,MIO[37] schmitt/cmos input selection" "CMOS,Schmitt" bitfld.long 0x08 10. " [36] ,MIO[36] schmitt/cmos input selection" "CMOS,Schmitt" textline " " bitfld.long 0x08 9. " [35] ,MIO[35] schmitt/cmos input selection" "CMOS,Schmitt" bitfld.long 0x08 8. " [34] ,MIO[34] schmitt/cmos input selection" "CMOS,Schmitt" bitfld.long 0x08 7. " [33] ,MIO[33] schmitt/cmos input selection" "CMOS,Schmitt" bitfld.long 0x08 6. " [32] ,MIO[32] schmitt/cmos input selection" "CMOS,Schmitt" textline " " bitfld.long 0x08 5. " [31] ,MIO[31] schmitt/cmos input selection" "CMOS,Schmitt" bitfld.long 0x08 4. " [30] ,MIO[30] schmitt/cmos input selection" "CMOS,Schmitt" bitfld.long 0x08 3. " [29] ,MIO[29] schmitt/cmos input selection" "CMOS,Schmitt" bitfld.long 0x08 2. " [28] ,MIO[28] schmitt/cmos input selection" "CMOS,Schmitt" textline " " bitfld.long 0x08 1. " [27] ,MIO[27] schmitt/cmos input selection" "CMOS,Schmitt" bitfld.long 0x08 0. " [26] ,MIO[26] schmitt/cmos input selection" "CMOS,Schmitt" line.long 0x0C "BANK1_CTRL4,Pull Control For MIO Bank 1 Register" bitfld.long 0x0C 25. " PULL_HIGH_LOW[51] ,MIO[51] pull up/down selection" "Down,Up" bitfld.long 0x0C 24. " [50] ,MIO[50] pull up/down selection" "Down,Up" bitfld.long 0x0C 23. " [49] ,MIO[49] pull up/down selection" "Down,Up" bitfld.long 0x0C 22. " [48] ,MIO[48] pull up/down selection" "Down,Up" textline " " bitfld.long 0x0C 21. " [47] ,MIO[47] pull up/down selection" "Down,Up" bitfld.long 0x0C 20. " [46] ,MIO[46] pull up/down selection" "Down,Up" bitfld.long 0x0C 19. " [45] ,MIO[45] pull up/down selection" "Down,Up" bitfld.long 0x0C 18. " [44] ,MIO[44] pull up/down selection" "Down,Up" textline " " bitfld.long 0x0C 17. " [43] ,MIO[43] pull up/down selection" "Down,Up" bitfld.long 0x0C 16. " [42] ,MIO[42] pull up/down selection" "Down,Up" bitfld.long 0x0C 15. " [41] ,MIO[41] pull up/down selection" "Down,Up" bitfld.long 0x0C 14. " [40] ,MIO[40] pull up/down selection" "Down,Up" textline " " bitfld.long 0x0C 13. " [39] ,MIO[39] pull up/down selection" "Down,Up" bitfld.long 0x0C 12. " [38] ,MIO[38] pull up/down selection" "Down,Up" bitfld.long 0x0C 11. " [37] ,MIO[37] pull up/down selection" "Down,Up" bitfld.long 0x0C 10. " [36] ,MIO[36] pull up/down selection" "Down,Up" textline " " bitfld.long 0x0C 9. " [35] ,MIO[35] pull up/down selection" "Down,Up" bitfld.long 0x0C 8. " [34] ,MIO[34] pull up/down selection" "Down,Up" bitfld.long 0x0C 7. " [33] ,MIO[33] pull up/down selection" "Down,Up" bitfld.long 0x0C 6. " [32] ,MIO[32] pull up/down selection" "Down,Up" textline " " bitfld.long 0x0C 5. " [31] ,MIO[31] pull up/down selection" "Down,Up" bitfld.long 0x0C 4. " [30] ,MIO[30] pull up/down selection" "Down,Up" bitfld.long 0x0C 3. " [29] ,MIO[29] pull up/down selection" "Down,Up" bitfld.long 0x0C 2. " [28] ,MIO[28] pull up/down selection" "Down,Up" textline " " bitfld.long 0x0C 1. " [27] ,MIO[27] pull up/down selection" "Down,Up" bitfld.long 0x0C 0. " [26] ,MIO[26] pull up/down selection" "Down,Up" line.long 0x10 "BANK1_CTRL5,Pull Selection Enable For MIO Bank 1 Register" bitfld.long 0x10 25. " PULL_ENABLE[51] ,MIO[51] pull selection enable" "Disabled,Enabled" bitfld.long 0x10 24. " [50] ,MIO[50] pull selection enable" "Disabled,Enabled" bitfld.long 0x10 23. " [49] ,MIO[49] pull selection enable" "Disabled,Enabled" bitfld.long 0x10 22. " [48] ,MIO[48] pull selection enable" "Disabled,Enabled" textline " " bitfld.long 0x10 21. " [47] ,MIO[47] pull selection enable" "Disabled,Enabled" bitfld.long 0x10 20. " [46] ,MIO[46] pull selection enable" "Disabled,Enabled" bitfld.long 0x10 19. " [45] ,MIO[45] pull selection enable" "Disabled,Enabled" bitfld.long 0x10 18. " [44] ,MIO[44] pull selection enable" "Disabled,Enabled" textline " " bitfld.long 0x10 17. " [43] ,MIO[43] pull selection enable" "Disabled,Enabled" bitfld.long 0x10 16. " [42] ,MIO[42] pull selection enable" "Disabled,Enabled" bitfld.long 0x10 15. " [41] ,MIO[41] pull selection enable" "Disabled,Enabled" bitfld.long 0x10 14. " [40] ,MIO[40] pull selection enable" "Disabled,Enabled" textline " " bitfld.long 0x10 13. " [39] ,MIO[39] pull selection enable" "Disabled,Enabled" bitfld.long 0x10 12. " [38] ,MIO[38] pull selection enable" "Disabled,Enabled" bitfld.long 0x10 11. " [37] ,MIO[37] pull selection enable" "Disabled,Enabled" bitfld.long 0x10 10. " [36] ,MIO[36] pull selection enable" "Disabled,Enabled" textline " " bitfld.long 0x10 9. " [35] ,MIO[35] pull selection enable" "Disabled,Enabled" bitfld.long 0x10 8. " [34] ,MIO[34] pull selection enable" "Disabled,Enabled" bitfld.long 0x10 7. " [33] ,MIO[33] pull selection enable" "Disabled,Enabled" bitfld.long 0x10 6. " [32] ,MIO[32] pull selection enable" "Disabled,Enabled" textline " " bitfld.long 0x10 5. " [31] ,MIO[31] pull selection enable" "Disabled,Enabled" bitfld.long 0x10 4. " [30] ,MIO[30] pull selection enable" "Disabled,Enabled" bitfld.long 0x10 3. " [29] ,MIO[29] pull selection enable" "Disabled,Enabled" bitfld.long 0x10 2. " [28] ,MIO[28] pull selection enable" "Disabled,Enabled" textline " " bitfld.long 0x10 1. " [27] ,MIO[27] pull selection enable" "Disabled,Enabled" bitfld.long 0x10 0. " [26] ,MIO[26] pull selection enable" "Disabled,Enabled" line.long 0x14 "BANK1_CTRL6,Slew Rate Control For MIO Bank 1 Register" bitfld.long 0x14 25. " SLOW_FAST_SLEW[51] ,MIO[51] slew rate control" "Fast,Slow" bitfld.long 0x14 24. " [50] ,MIO[50] slew rate control" "Fast,Slow" bitfld.long 0x14 23. " [49] ,MIO[49] slew rate control" "Fast,Slow" bitfld.long 0x14 22. " [48] ,MIO[48] slew rate control" "Fast,Slow" textline " " bitfld.long 0x14 21. " [47] ,MIO[47] slew rate control" "Fast,Slow" bitfld.long 0x14 20. " [46] ,MIO[46] slew rate control" "Fast,Slow" bitfld.long 0x14 19. " [45] ,MIO[45] slew rate control" "Fast,Slow" bitfld.long 0x14 18. " [44] ,MIO[44] slew rate control" "Fast,Slow" textline " " bitfld.long 0x14 17. " [43] ,MIO[43] slew rate control" "Fast,Slow" bitfld.long 0x14 16. " [42] ,MIO[42] slew rate control" "Fast,Slow" bitfld.long 0x14 15. " [41] ,MIO[41] slew rate control" "Fast,Slow" bitfld.long 0x14 14. " [40] ,MIO[40] slew rate control" "Fast,Slow" textline " " bitfld.long 0x14 13. " [39] ,MIO[39] slew rate control" "Fast,Slow" bitfld.long 0x14 12. " [38] ,MIO[38] slew rate control" "Fast,Slow" bitfld.long 0x14 11. " [37] ,MIO[37] slew rate control" "Fast,Slow" bitfld.long 0x14 10. " [36] ,MIO[36] slew rate control" "Fast,Slow" textline " " bitfld.long 0x14 9. " [35] ,MIO[35] slew rate control" "Fast,Slow" bitfld.long 0x14 8. " [34] ,MIO[34] slew rate control" "Fast,Slow" bitfld.long 0x14 7. " [33] ,MIO[33] slew rate control" "Fast,Slow" bitfld.long 0x14 6. " [32] ,MIO[32] slew rate control" "Fast,Slow" textline " " bitfld.long 0x14 5. " [31] ,MIO[31] slew rate control" "Fast,Slow" bitfld.long 0x14 4. " [30] ,MIO[30] slew rate control" "Fast,Slow" bitfld.long 0x14 3. " [29] ,MIO[29] slew rate control" "Fast,Slow" bitfld.long 0x14 2. " [28] ,MIO[28] slew rate control" "Fast,Slow" textline " " bitfld.long 0x14 1. " [27] ,MIO[27] slew rate control" "Fast,Slow" bitfld.long 0x14 0. " [26] ,MIO[26] slew rate control" "Fast,Slow" rgroup.long 0x16C++0x03 line.long 0x00 "BANK1_STATUS,Voltage Mode Status Of The IO Bank 1 Register" bitfld.long 0x00 0. " VOLTAGE_MODE ,Voltage mode status" "3.3V,1.8V" group.long 0x170++0x17 line.long 0x00 "BANK2_CTRL0,Drive0 Control To MIO Bank 2 Register" bitfld.long 0x00 25. " DRIVE0[77] ,MIO[77] control" "Low,High" bitfld.long 0x00 24. " [76] ,MIO[76] control" "Low,High" bitfld.long 0x00 23. " [75] ,MIO[75] control" "Low,High" bitfld.long 0x00 22. " [74] ,MIO[74] control" "Low,High" textline " " bitfld.long 0x00 21. " [73] ,MIO[73] control" "Low,High" bitfld.long 0x00 20. " [72] ,MIO[72] control" "Low,High" bitfld.long 0x00 19. " [71] ,MIO[71] control" "Low,High" bitfld.long 0x00 18. " [70] ,MIO[70] control" "Low,High" textline " " bitfld.long 0x00 17. " [69] ,MIO[69] control" "Low,High" bitfld.long 0x00 16. " [68] ,MIO[68] control" "Low,High" bitfld.long 0x00 15. " [67] ,MIO[67] control" "Low,High" bitfld.long 0x00 14. " [66] ,MIO[66] control" "Low,High" textline " " bitfld.long 0x00 13. " [65] ,MIO[65] control" "Low,High" bitfld.long 0x00 12. " [64] ,MIO[64] control" "Low,High" bitfld.long 0x00 11. " [63] ,MIO[63] control" "Low,High" bitfld.long 0x00 10. " [62] ,MIO[62] control" "Low,High" textline " " bitfld.long 0x00 9. " [61] ,MIO[61] control" "Low,High" bitfld.long 0x00 8. " [60] ,MIO[60] control" "Low,High" bitfld.long 0x00 7. " [59] ,MIO[59] control" "Low,High" bitfld.long 0x00 6. " [58] ,MIO[58] control" "Low,High" textline " " bitfld.long 0x00 5. " [57] ,MIO[57] control" "Low,High" bitfld.long 0x00 4. " [56] ,MIO[56] control" "Low,High" bitfld.long 0x00 3. " [55] ,MIO[55] control" "Low,High" bitfld.long 0x00 2. " [54] ,MIO[54] control" "Low,High" textline " " bitfld.long 0x00 1. " [53] ,MIO[53] control" "Low,High" bitfld.long 0x00 0. " [52] ,MIO[52] control" "Low,High" line.long 0x04 "BANK2_CTRL1,Drive1 Control To MIO Bank 2 Register" bitfld.long 0x04 25. " DRIVE1[77] ,MIO[77] control" "Low,High" bitfld.long 0x04 24. " [76] ,MIO[76] control" "Low,High" bitfld.long 0x04 23. " [75] ,MIO[75] control" "Low,High" bitfld.long 0x04 22. " [74] ,MIO[74] control" "Low,High" textline " " bitfld.long 0x04 21. " [73] ,MIO[73] control" "Low,High" bitfld.long 0x04 20. " [72] ,MIO[72] control" "Low,High" bitfld.long 0x04 19. " [71] ,MIO[71] control" "Low,High" bitfld.long 0x04 18. " [70] ,MIO[70] control" "Low,High" textline " " bitfld.long 0x04 17. " [69] ,MIO[69] control" "Low,High" bitfld.long 0x04 16. " [68] ,MIO[68] control" "Low,High" bitfld.long 0x04 15. " [67] ,MIO[67] control" "Low,High" bitfld.long 0x04 14. " [66] ,MIO[66] control" "Low,High" textline " " bitfld.long 0x04 13. " [65] ,MIO[65] control" "Low,High" bitfld.long 0x04 12. " [64] ,MIO[64] control" "Low,High" bitfld.long 0x04 11. " [63] ,MIO[63] control" "Low,High" bitfld.long 0x04 10. " [62] ,MIO[62] control" "Low,High" textline " " bitfld.long 0x04 9. " [61] ,MIO[61] control" "Low,High" bitfld.long 0x04 8. " [60] ,MIO[60] control" "Low,High" bitfld.long 0x04 7. " [59] ,MIO[59] control" "Low,High" bitfld.long 0x04 6. " [58] ,MIO[58] control" "Low,High" textline " " bitfld.long 0x04 5. " [57] ,MIO[57] control" "Low,High" bitfld.long 0x04 4. " [56] ,MIO[56] control" "Low,High" bitfld.long 0x04 3. " [55] ,MIO[55] control" "Low,High" bitfld.long 0x04 2. " [54] ,MIO[54] control" "Low,High" textline " " bitfld.long 0x04 1. " [53] ,MIO[53] control" "Low,High" bitfld.long 0x04 0. " [52] ,MIO[52] control" "Low,High" line.long 0x08 "BANK2_CTRL3,Schmitt/cmos Input Select For MIO Bank 2 Register" bitfld.long 0x08 25. " SCHMITT_CMOS[77] ,MIO[77] schmitt/cmos input selection" "CMOS,Schmitt" bitfld.long 0x08 24. " [76] ,MIO[76] schmitt/cmos input selection" "CMOS,Schmitt" bitfld.long 0x08 23. " [75] ,MIO[75] schmitt/cmos input selection" "CMOS,Schmitt" bitfld.long 0x08 22. " [74] ,MIO[74] schmitt/cmos input selection" "CMOS,Schmitt" textline " " bitfld.long 0x08 21. " [73] ,MIO[73] schmitt/cmos input selection" "CMOS,Schmitt" bitfld.long 0x08 20. " [72] ,MIO[72] schmitt/cmos input selection" "CMOS,Schmitt" bitfld.long 0x08 19. " [71] ,MIO[71] schmitt/cmos input selection" "CMOS,Schmitt" bitfld.long 0x08 18. " [70] ,MIO[70] schmitt/cmos input selection" "CMOS,Schmitt" textline " " bitfld.long 0x08 17. " [69] ,MIO[69] schmitt/cmos input selection" "CMOS,Schmitt" bitfld.long 0x08 16. " [68] ,MIO[68] schmitt/cmos input selection" "CMOS,Schmitt" bitfld.long 0x08 15. " [67] ,MIO[67] schmitt/cmos input selection" "CMOS,Schmitt" bitfld.long 0x08 14. " [66] ,MIO[66] schmitt/cmos input selection" "CMOS,Schmitt" textline " " bitfld.long 0x08 13. " [65] ,MIO[65] schmitt/cmos input selection" "CMOS,Schmitt" bitfld.long 0x08 12. " [64] ,MIO[64] schmitt/cmos input selection" "CMOS,Schmitt" bitfld.long 0x08 11. " [63] ,MIO[63] schmitt/cmos input selection" "CMOS,Schmitt" bitfld.long 0x08 10. " [62] ,MIO[62] schmitt/cmos input selection" "CMOS,Schmitt" textline " " bitfld.long 0x08 9. " [61] ,MIO[61] schmitt/cmos input selection" "CMOS,Schmitt" bitfld.long 0x08 8. " [60] ,MIO[60] schmitt/cmos input selection" "CMOS,Schmitt" bitfld.long 0x08 7. " [59] ,MIO[59] schmitt/cmos input selection" "CMOS,Schmitt" bitfld.long 0x08 6. " [58] ,MIO[58] schmitt/cmos input selection" "CMOS,Schmitt" textline " " bitfld.long 0x08 5. " [57] ,MIO[57] schmitt/cmos input selection" "CMOS,Schmitt" bitfld.long 0x08 4. " [56] ,MIO[56] schmitt/cmos input selection" "CMOS,Schmitt" bitfld.long 0x08 3. " [55] ,MIO[55] schmitt/cmos input selection" "CMOS,Schmitt" bitfld.long 0x08 2. " [54] ,MIO[54] schmitt/cmos input selection" "CMOS,Schmitt" textline " " bitfld.long 0x08 1. " [53] ,MIO[53] schmitt/cmos input selection" "CMOS,Schmitt" bitfld.long 0x08 0. " [52] ,MIO[52] schmitt/cmos input selection" "CMOS,Schmitt" line.long 0x0C "BANK2_CTRL4,Pull Control For MIO Bank 2 Register" bitfld.long 0x0C 25. " PULL_HIGH_LOW[77] ,MIO[77] pull up/down selection" "Down,Up" bitfld.long 0x0C 24. " [76] ,MIO[76] pull up/down selection" "Down,Up" bitfld.long 0x0C 23. " [75] ,MIO[75] pull up/down selection" "Down,Up" bitfld.long 0x0C 22. " [74] ,MIO[74] pull up/down selection" "Down,Up" textline " " bitfld.long 0x0C 21. " [73] ,MIO[73] pull up/down selection" "Down,Up" bitfld.long 0x0C 20. " [72] ,MIO[72] pull up/down selection" "Down,Up" bitfld.long 0x0C 19. " [71] ,MIO[71] pull up/down selection" "Down,Up" bitfld.long 0x0C 18. " [70] ,MIO[70] pull up/down selection" "Down,Up" textline " " bitfld.long 0x0C 17. " [69] ,MIO[69] pull up/down selection" "Down,Up" bitfld.long 0x0C 16. " [68] ,MIO[68] pull up/down selection" "Down,Up" bitfld.long 0x0C 15. " [67] ,MIO[67] pull up/down selection" "Down,Up" bitfld.long 0x0C 14. " [66] ,MIO[66] pull up/down selection" "Down,Up" textline " " bitfld.long 0x0C 13. " [65] ,MIO[65] pull up/down selection" "Down,Up" bitfld.long 0x0C 12. " [64] ,MIO[64] pull up/down selection" "Down,Up" bitfld.long 0x0C 11. " [63] ,MIO[63] pull up/down selection" "Down,Up" bitfld.long 0x0C 10. " [62] ,MIO[62] pull up/down selection" "Down,Up" textline " " bitfld.long 0x0C 9. " [61] ,MIO[61] pull up/down selection" "Down,Up" bitfld.long 0x0C 8. " [60] ,MIO[60] pull up/down selection" "Down,Up" bitfld.long 0x0C 7. " [59] ,MIO[59] pull up/down selection" "Down,Up" bitfld.long 0x0C 6. " [58] ,MIO[58] pull up/down selection" "Down,Up" textline " " bitfld.long 0x0C 5. " [57] ,MIO[57] pull up/down selection" "Down,Up" bitfld.long 0x0C 4. " [56] ,MIO[56] pull up/down selection" "Down,Up" bitfld.long 0x0C 3. " [55] ,MIO[55] pull up/down selection" "Down,Up" bitfld.long 0x0C 2. " [54] ,MIO[54] pull up/down selection" "Down,Up" textline " " bitfld.long 0x0C 1. " [53] ,MIO[53] pull up/down selection" "Down,Up" bitfld.long 0x0C 0. " [52] ,MIO[52] pull up/down selection" "Down,Up" line.long 0x10 "BANK2_CTRL5,Pull Selection Enable For MIO Bank 2 Register" bitfld.long 0x10 25. " PULL_ENABLE[77] ,MIO[77] pull selection enable" "Disabled,Enabled" bitfld.long 0x10 24. " [76] ,MIO[76] pull selection enable" "Disabled,Enabled" bitfld.long 0x10 23. " [75] ,MIO[75] pull selection enable" "Disabled,Enabled" bitfld.long 0x10 22. " [74] ,MIO[74] pull selection enable" "Disabled,Enabled" textline " " bitfld.long 0x10 21. " [73] ,MIO[73] pull selection enable" "Disabled,Enabled" bitfld.long 0x10 20. " [72] ,MIO[72] pull selection enable" "Disabled,Enabled" bitfld.long 0x10 19. " [71] ,MIO[71] pull selection enable" "Disabled,Enabled" bitfld.long 0x10 18. " [70] ,MIO[70] pull selection enable" "Disabled,Enabled" textline " " bitfld.long 0x10 17. " [69] ,MIO[69] pull selection enable" "Disabled,Enabled" bitfld.long 0x10 16. " [68] ,MIO[68] pull selection enable" "Disabled,Enabled" bitfld.long 0x10 15. " [67] ,MIO[67] pull selection enable" "Disabled,Enabled" bitfld.long 0x10 14. " [66] ,MIO[66] pull selection enable" "Disabled,Enabled" textline " " bitfld.long 0x10 13. " [65] ,MIO[65] pull selection enable" "Disabled,Enabled" bitfld.long 0x10 12. " [64] ,MIO[64] pull selection enable" "Disabled,Enabled" bitfld.long 0x10 11. " [63] ,MIO[63] pull selection enable" "Disabled,Enabled" bitfld.long 0x10 10. " [62] ,MIO[62] pull selection enable" "Disabled,Enabled" textline " " bitfld.long 0x10 9. " [61] ,MIO[61] pull selection enable" "Disabled,Enabled" bitfld.long 0x10 8. " [60] ,MIO[60] pull selection enable" "Disabled,Enabled" bitfld.long 0x10 7. " [59] ,MIO[59] pull selection enable" "Disabled,Enabled" bitfld.long 0x10 6. " [58] ,MIO[58] pull selection enable" "Disabled,Enabled" textline " " bitfld.long 0x10 5. " [57] ,MIO[57] pull selection enable" "Disabled,Enabled" bitfld.long 0x10 4. " [56] ,MIO[56] pull selection enable" "Disabled,Enabled" bitfld.long 0x10 3. " [55] ,MIO[55] pull selection enable" "Disabled,Enabled" bitfld.long 0x10 2. " [54] ,MIO[54] pull selection enable" "Disabled,Enabled" textline " " bitfld.long 0x10 1. " [53] ,MIO[53] pull selection enable" "Disabled,Enabled" bitfld.long 0x10 0. " [52] ,MIO[52] pull selection enable" "Disabled,Enabled" line.long 0x14 "BANK2_CTRL6,Slew Rate Control For MIO Bank 2 Register" bitfld.long 0x14 25. " SLOW_FAST_SLEW[77] ,MIO[77] pull selection enable" "Disabled,Enabled" bitfld.long 0x14 24. " [76] ,MIO[76] pull selection enable" "Disabled,Enabled" bitfld.long 0x14 23. " [75] ,MIO[75] pull selection enable" "Disabled,Enabled" bitfld.long 0x14 22. " [74] ,MIO[74] pull selection enable" "Disabled,Enabled" textline " " bitfld.long 0x14 21. " [73] ,MIO[73] pull selection enable" "Disabled,Enabled" bitfld.long 0x14 20. " [72] ,MIO[72] pull selection enable" "Disabled,Enabled" bitfld.long 0x14 19. " [71] ,MIO[71] pull selection enable" "Disabled,Enabled" bitfld.long 0x14 18. " [70] ,MIO[70] pull selection enable" "Disabled,Enabled" textline " " bitfld.long 0x14 17. " [69] ,MIO[69] pull selection enable" "Disabled,Enabled" bitfld.long 0x14 16. " [68] ,MIO[68] pull selection enable" "Disabled,Enabled" bitfld.long 0x14 15. " [67] ,MIO[67] pull selection enable" "Disabled,Enabled" bitfld.long 0x14 14. " [66] ,MIO[66] pull selection enable" "Disabled,Enabled" textline " " bitfld.long 0x14 13. " [65] ,MIO[65] pull selection enable" "Disabled,Enabled" bitfld.long 0x14 12. " [64] ,MIO[64] pull selection enable" "Disabled,Enabled" bitfld.long 0x14 11. " [63] ,MIO[63] pull selection enable" "Disabled,Enabled" bitfld.long 0x14 10. " [62] ,MIO[62] pull selection enable" "Disabled,Enabled" textline " " bitfld.long 0x14 9. " [61] ,MIO[61] pull selection enable" "Disabled,Enabled" bitfld.long 0x14 8. " [60] ,MIO[60] pull selection enable" "Disabled,Enabled" bitfld.long 0x14 7. " [59] ,MIO[59] pull selection enable" "Disabled,Enabled" bitfld.long 0x14 6. " [58] ,MIO[58] pull selection enable" "Disabled,Enabled" textline " " bitfld.long 0x14 5. " [57] ,MIO[57] pull selection enable" "Disabled,Enabled" bitfld.long 0x14 4. " [56] ,MIO[56] pull selection enable" "Disabled,Enabled" bitfld.long 0x14 3. " [55] ,MIO[55] pull selection enable" "Disabled,Enabled" bitfld.long 0x14 2. " [54] ,MIO[54] pull selection enable" "Disabled,Enabled" textline " " bitfld.long 0x14 1. " [53] ,MIO[53] pull selection enable" "Disabled,Enabled" bitfld.long 0x14 0. " [52] ,MIO[52] pull selection enable" "Disabled,Enabled" rgroup.long 0x188++0x03 line.long 0x00 "BANK2_STATUS,Voltage Mode Status Of The IO Bank 2 Register" bitfld.long 0x00 0. " VOLTAGE_MODE ,Voltage mode status" "3.3V,1.8V" textline " " group.long 0x200++0x0F line.long 0x00 "MIO_LOOPBACK,MIO Loopback Register" bitfld.long 0x00 3. " I2C0_LOOP_I2C1 ,I2C loopback control" "No loopback,Loopback" bitfld.long 0x00 2. " CAN0_LOOP_CAN1 ,CAN loopback control" "No loopback,Loopback" bitfld.long 0x00 1. " UA0_LOOP_UA1 ,UART loopback control" "No loopback,Loopback" bitfld.long 0x00 0. " SPI0_LOOP_SPI1 ,SPI loopback control" "No loopback,Loopback" line.long 0x04 "MIO_MST_TRI0,MIO Pin tri-state Enable Register 0" bitfld.long 0x04 31. " PIN_31_TRI ,Master Tri-state enable for pin 31" "Disabled,Enabled" bitfld.long 0x04 30. " PIN_30_TRI ,Master Tri-state enable for pin 30" "Disabled,Enabled" bitfld.long 0x04 29. " PIN_29_TRI ,Master Tri-state enable for pin 29" "Disabled,Enabled" bitfld.long 0x04 28. " PIN_28_TRI ,Master Tri-state enable for pin 28" "Disabled,Enabled" textline " " bitfld.long 0x04 27. " PIN_27_TRI ,Master Tri-state enable for pin 27" "Disabled,Enabled" bitfld.long 0x04 26. " PIN_26_TRI ,Master Tri-state enable for pin 26" "Disabled,Enabled" bitfld.long 0x04 25. " PIN_25_TRI ,Master Tri-state enable for pin 25" "Disabled,Enabled" bitfld.long 0x04 24. " PIN_24_TRI ,Master Tri-state enable for pin 24" "Disabled,Enabled" textline " " bitfld.long 0x04 23. " PIN_23_TRI ,Master Tri-state enable for pin 23" "Disabled,Enabled" bitfld.long 0x04 22. " PIN_22_TRI ,Master Tri-state enable for pin 22" "Disabled,Enabled" bitfld.long 0x04 21. " PIN_21_TRI ,Master Tri-state enable for pin 21" "Disabled,Enabled" bitfld.long 0x04 20. " PIN_20_TRI ,Master Tri-state enable for pin 20" "Disabled,Enabled" textline " " bitfld.long 0x04 19. " PIN_19_TRI ,Master Tri-state enable for pin 19" "Disabled,Enabled" bitfld.long 0x04 18. " PIN_18_TRI ,Master Tri-state enable for pin 18" "Disabled,Enabled" bitfld.long 0x04 17. " PIN_17_TRI ,Master Tri-state enable for pin 17" "Disabled,Enabled" bitfld.long 0x04 16. " PIN_16_TRI ,Master Tri-state enable for pin 16" "Disabled,Enabled" textline " " bitfld.long 0x04 15. " PIN_15_TRI ,Master Tri-state enable for pin 15" "Disabled,Enabled" bitfld.long 0x04 14. " PIN_14_TRI ,Master Tri-state enable for pin 14" "Disabled,Enabled" bitfld.long 0x04 13. " PIN_13_TRI ,Master Tri-state enable for pin 13" "Disabled,Enabled" bitfld.long 0x04 12. " PIN_12_TRI ,Master Tri-state enable for pin 12" "Disabled,Enabled" textline " " bitfld.long 0x04 11. " PIN_11_TRI ,Master Tri-state enable for pin 11" "Disabled,Enabled" bitfld.long 0x04 10. " PIN_10_TRI ,Master Tri-state enable for pin 10" "Disabled,Enabled" bitfld.long 0x04 9. " PIN_09_TRI ,Master Tri-state enable for pin 9" "Disabled,Enabled" bitfld.long 0x04 8. " PIN_08_TRI ,Master Tri-state enable for pin 8" "Disabled,Enabled" textline " " bitfld.long 0x04 7. " PIN_07_TRI ,Master Tri-state enable for pin 7" "Disabled,Enabled" bitfld.long 0x04 6. " PIN_06_TRI ,Master Tri-state enable for pin 6" "Disabled,Enabled" bitfld.long 0x04 5. " PIN_05_TRI ,Master Tri-state enable for pin 5" "Disabled,Enabled" bitfld.long 0x04 4. " PIN_04_TRI ,Master Tri-state enable for pin 4" "Disabled,Enabled" textline " " bitfld.long 0x04 3. " PIN_03_TRI ,Master Tri-state enable for pin 3" "Disabled,Enabled" bitfld.long 0x04 2. " PIN_02_TRI ,Master Tri-state enable for pin 2" "Disabled,Enabled" bitfld.long 0x04 1. " PIN_01_TRI ,Master Tri-state enable for pin 1" "Disabled,Enabled" bitfld.long 0x04 0. " PIN_00_TRI ,Master Tri-state enable for pin 0" "Disabled,Enabled" line.long 0x08 "MIO_MST_TRI1,MIO Pin tri-state Enable Register 1" bitfld.long 0x08 31. " PIN_63_TRI ,Master Tri-state enable for pin 63" "Disabled,Enabled" bitfld.long 0x08 30. " PIN_62_TRI ,Master Tri-state enable for pin 62" "Disabled,Enabled" bitfld.long 0x08 29. " PIN_61_TRI ,Master Tri-state enable for pin 61" "Disabled,Enabled" bitfld.long 0x08 28. " PIN_60_TRI ,Master Tri-state enable for pin 60" "Disabled,Enabled" textline " " bitfld.long 0x08 27. " PIN_59_TRI ,Master Tri-state enable for pin 59" "Disabled,Enabled" bitfld.long 0x08 26. " PIN_58_TRI ,Master Tri-state enable for pin 58" "Disabled,Enabled" bitfld.long 0x08 25. " PIN_57_TRI ,Master Tri-state enable for pin 57" "Disabled,Enabled" bitfld.long 0x08 24. " PIN_56_TRI ,Master Tri-state enable for pin 56" "Disabled,Enabled" textline " " bitfld.long 0x08 23. " PIN_55_TRI ,Master Tri-state enable for pin 55" "Disabled,Enabled" bitfld.long 0x08 22. " PIN_54_TRI ,Master Tri-state enable for pin 54" "Disabled,Enabled" bitfld.long 0x08 21. " PIN_53_TRI ,Master Tri-state enable for pin 53" "Disabled,Enabled" bitfld.long 0x08 20. " PIN_52_TRI ,Master Tri-state enable for pin 52" "Disabled,Enabled" textline " " bitfld.long 0x08 19. " PIN_51_TRI ,Master Tri-state enable for pin 51" "Disabled,Enabled" bitfld.long 0x08 18. " PIN_50_TRI ,Master Tri-state enable for pin 50" "Disabled,Enabled" bitfld.long 0x08 17. " PIN_49_TRI ,Master Tri-state enable for pin 49" "Disabled,Enabled" bitfld.long 0x08 16. " PIN_48_TRI ,Master Tri-state enable for pin 48" "Disabled,Enabled" textline " " bitfld.long 0x08 15. " PIN_47_TRI ,Master Tri-state enable for pin 47" "Disabled,Enabled" bitfld.long 0x08 14. " PIN_46_TRI ,Master Tri-state enable for pin 46" "Disabled,Enabled" bitfld.long 0x08 13. " PIN_45_TRI ,Master Tri-state enable for pin 45" "Disabled,Enabled" bitfld.long 0x08 12. " PIN_44_TRI ,Master Tri-state enable for pin 44" "Disabled,Enabled" textline " " bitfld.long 0x08 11. " PIN_43_TRI ,Master Tri-state enable for pin 43" "Disabled,Enabled" bitfld.long 0x08 10. " PIN_42_TRI ,Master Tri-state enable for pin 42" "Disabled,Enabled" bitfld.long 0x08 9. " PIN_41_TRI ,Master Tri-state enable for pin 41" "Disabled,Enabled" bitfld.long 0x08 8. " PIN_40_TRI ,Master Tri-state enable for pin 40" "Disabled,Enabled" textline " " bitfld.long 0x08 7. " PIN_39_TRI ,Master Tri-state enable for pin 39" "Disabled,Enabled" bitfld.long 0x08 6. " PIN_38_TRI ,Master Tri-state enable for pin 38" "Disabled,Enabled" bitfld.long 0x08 5. " PIN_37_TRI ,Master Tri-state enable for pin 37" "Disabled,Enabled" bitfld.long 0x08 4. " PIN_36_TRI ,Master Tri-state enable for pin 36" "Disabled,Enabled" textline " " bitfld.long 0x08 3. " PIN_35_TRI ,Master Tri-state enable for pin 35" "Disabled,Enabled" bitfld.long 0x08 2. " PIN_34_TRI ,Master Tri-state enable for pin 34" "Disabled,Enabled" bitfld.long 0x08 1. " PIN_33_TRI ,Master Tri-state enable for pin 33" "Disabled,Enabled" bitfld.long 0x08 0. " PIN_32_TRI ,Master Tri-state enable for pin 32" "Disabled,Enabled" line.long 0x0C "MIO_MST_TRI2,MIO Pin tri-state Enable Register 2" bitfld.long 0x0C 13. " PIN_77_TRI ,Master Tri-state enable for pin 77" "Disabled,Enabled" bitfld.long 0x0C 12. " PIN_76_TRI ,Master Tri-state enable for pin 76" "Disabled,Enabled" bitfld.long 0x0C 11. " PIN_75_TRI ,Master Tri-state enable for pin 75" "Disabled,Enabled" bitfld.long 0x0C 10. " PIN_74_TRI ,Master Tri-state enable for pin 74" "Disabled,Enabled" textline " " bitfld.long 0x0C 9. " PIN_73_TRI ,Master Tri-state enable for pin 73" "Disabled,Enabled" bitfld.long 0x0C 8. " PIN_72_TRI ,Master Tri-state enable for pin 72" "Disabled,Enabled" bitfld.long 0x0C 7. " PIN_71_TRI ,Master Tri-state enable for pin 71" "Disabled,Enabled" bitfld.long 0x0C 6. " PIN_70_TRI ,Master Tri-state enable for pin 70" "Disabled,Enabled" textline " " bitfld.long 0x0C 5. " PIN_69_TRI ,Master Tri-state enable for pin 69" "Disabled,Enabled" bitfld.long 0x0C 4. " PIN_68_TRI ,Master Tri-state enable for pin 68" "Disabled,Enabled" bitfld.long 0x0C 3. " PIN_67_TRI ,Master Tri-state enable for pin 67" "Disabled,Enabled" bitfld.long 0x0C 2. " PIN_66_TRI ,Master Tri-state enable for pin 66" "Disabled,Enabled" textline " " bitfld.long 0x0C 1. " PIN_65_TRI ,Master Tri-state enable for pin 65" "Disabled,Enabled" bitfld.long 0x0C 0. " PIN_64_TRI ,Master Tri-state enable for pin 64" "Disabled,Enabled" group.long 0x300++0x47 line.long 0x00 "WDT_CLK_SEL,SWDT Clock Source Select Register" bitfld.long 0x00 0. " SELECT ,System watchdog timer clock source selection" "Internal,External" line.long 0x04 "CAN_MIO_CTRL,CAN MIO Ccntrol Register" bitfld.long 0x04 23. " CAN1_RXIN_REG ,CAN 0 reference clock selection" "Falling edge,Rising edge" bitfld.long 0x04 22. " CAN1_REF_SEL ,CAN 1 reference clock selection" "Internal PLL,MIO based" hexmask.long.byte 0x04 15.--21. 1. " CAN1_MUX ,CAN 1 mux selection for MIO" bitfld.long 0x04 8. " CAN0_RXIN_REG ,CAN 0 reference clock selection" "Falling edge,Rising edge" textline " " bitfld.long 0x04 7. " CAN0_REF_SEL ,CAN 0 reference clock selection" "Internal PLL,MIO based" hexmask.long.byte 0x04 0.--6. 1. " CAN0_MUX ,CAN 0 mux selection for MIO" line.long 0x08 "GEM_CLK_CTRL,Soc Debug Clock Control Register" bitfld.long 0x08 22. " TSU_CLK_LB_SEL ,Selection of TSU interface clock" "PS,PL" bitfld.long 0x08 20.--21. " TSU_CLK_SEL ,Selection of TSU clock source" "PLL,MIO[26],PLL,MIO[50]/MIO[51]" textline " " bitfld.long 0x08 18. " GEM3_FIFO_CLK_SEL ,Selection of FIFO interface clock" "PS,PL" bitfld.long 0x08 17. " GEM3_SGMII_MODE ,Selection of SGMII or non SGMII mode" "Non-SGMII,SGMII" bitfld.long 0x08 16. " GEM3_REF_SRC_SEL ,Source selection for gem3_ref_clk generation" "PLL,FMIO PLL/GTX" bitfld.long 0x08 15. " GEM3_RX_SRC_SEL ,Source selection for gem3_rx_clk generation" "MIO,FMIO" textline " " bitfld.long 0x08 13. " GEM2_FIFO_CLK_SEL ,Selection of FIFO interface clock" "PS,PL" bitfld.long 0x08 12. " GEM2_SGMII_MODE ,Selection of SGMII or non SGMII mode" "Non-SGMII,SGMII" bitfld.long 0x08 11. " GEM2_REF_SRC_SEL ,Source selection for gem2_ref_clk generation" "PLL,FMIO PLL/GTX" bitfld.long 0x08 10. " GEM2_RX_SRC_SEL ,Source selection for gem2_rx_clk generation" "MIO,FMIO" textline " " bitfld.long 0x08 8. " GEM1_FIFO_CLK_SEL ,Selection of FIFO interface clock" "PS,PL" bitfld.long 0x08 7. " GEM1_SGMII_MODE ,Selection of SGMII or non SGMII mode" "Non-SGMII,SGMII" bitfld.long 0x08 6. " GEM1_REF_SRC_SEL ,Source selection for gem1_ref_clk generation" "PLL,FMIO PLL/GTX" bitfld.long 0x08 5. " GEM1_RX_SRC_SEL ,Source selection for gem1_rx_clk generation" "MIO,FMIO" textline " " bitfld.long 0x08 3. " GEM0_FIFO_CLK_SEL ,Selection of FIFO interface clock" "PS,PL" bitfld.long 0x08 2. " GEM0_SGMII_MODE ,Selection of SGMII or non SGMII mode" "Non-SGMII,SGMII" bitfld.long 0x08 1. " GEM0_REF_SRC_SEL ,Source selection for gem0_ref_clk generation" "PLL,FMIO PLL/GTX" bitfld.long 0x08 0. " GEM0_RX_SRC_SEL ,Source selection for gem0_rx_clk generation" "MIO,FMIO" line.long 0x0C "SDIO_CLK_CTRL,Soc Debug Clock Control Register" bitfld.long 0x0C 18. " SDIO1_FBCLK_SEL ,Selection of SD feedback clock" "MIO PAD,FMIO" bitfld.long 0x0C 17. " SDIO1_RX_SRC_SEL ,MIO pad selection for sdio1_rx_clk feedback clock from the PAD" "MIO[51],MIO[76]" bitfld.long 0x0C 2. " SDIO0_FBCLK_SEL ,Selection of SD feedback clock" "MIO PAD,FMIO" bitfld.long 0x0C 0.--1. " SDIO0_RX_SRC_SEL ,MIO pad selection for sdio0_rx_clk feedback clock from the PAD" "MIO[22],MIO[38],MIO[64],MIO[64]" line.long 0x10 "CTRL_REG_SD,SD EMMC Selection Register" bitfld.long 0x10 15. " SD1_EMMC_SEL ,SD or eMMC selection on SDIO1" "SD,EMMC" bitfld.long 0x10 0. " SD0_EMMC_SEL ,SD or eMMC selection on SDIO0" "SD,EMMC" line.long 0x14 "SD_ITAPDLY,Input Tap Delay Select Register" bitfld.long 0x14 25. " SD1_ITAPCHGWIN ,Gate the output of the tap delay lines so as to avoid glithches being propagated into the core" "Disabled,Enabled" bitfld.long 0x14 24. " SD1_ITAPDLYENA ,Enable selection of the optimal number of taps on the rxclk_in line" "Disabled,Enabled" hexmask.long.byte 0x14 16.--23. 1. " SD1_ITAPDLYSEL ,Selects optimal number of taps on the rxclk_in line" bitfld.long 0x14 9. " SD0_ITAPCHGWIN ,Gate the output of the tap delay lines so as to avoid glithches being propagated into the core" "Disabled,Enabled" textline " " bitfld.long 0x14 8. " SD0_ITAPDLYENA ,Enable selection of the optimal number of taps on the rxclk_in line" "Disabled,Enabled" hexmask.long.byte 0x14 0.--7. 1. " SD0_ITAPDLYSEL ,Selects optimal number of taps on the rxclk_in line" line.long 0x18 "SD_OTAPDLYSEL,Input Tap Delay Select Register" bitfld.long 0x18 22. " SD1_OTAPDLYENA ,Enable the selective tap delay on the sdcard_clk so as to generate the delayed sdcard_clk" "Disabled,Enabled" bitfld.long 0x18 16.--21. " SD1_OTAPDLYSEL ,Select optimal number of taps on the sdcard_clk" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x18 6. " SD0_OTAPDLYENA ,Enable the selective tap delay on the sdcard_clk so as to generate the delayed sdcard_clk" "Disabled,Enabled" bitfld.long 0x18 0.--5. " SD0_OTAPDLYSEL ,Select optimal number of taps on the sdcard_clk" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x1C "SD_CONFIG_REG1,SD Config Register 1" hexmask.long.byte 0x1C 23.--30. 1. " SD1_BASECLK ,Base clock frequency for SD clock" bitfld.long 0x1C 17.--22. " SD1_TUNIGCOUNT ,Number of taps phases of the rxclk_in that is supported" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x1C 16. " SD1_ASYNCWKPENA ,Wakeup signal generation mode" "Synchronous,Asyncrhonous" hexmask.long.byte 0x1C 7.--14. 1. " SD0_BASECLK ,Base clock frequency for SD clock" textline " " bitfld.long 0x1C 1.--6. " SD0_TUNIGCOUNT ,Number of taps phases of the rxclk_in that is supported for auto tuning mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x1C 0. " SD0_ASYNCWKPENA ,Wakeup signal generation mode" "Synchronous,Asyncrhonous" line.long 0x20 "SD_CONFIG_REG1,SD Config Register 1" bitfld.long 0x20 28.--29. " SD1_SLOTTYPE ,Slot type" "Removable scard,Embedded,Shared bus,?..." bitfld.long 0x20 27. " SD1_ASYCINTR ,Asynchronous interrupt support" "Not supported,Supported" bitfld.long 0x20 26. " SD1_64BIT ,64-bit system bus support" "Not supported,Supported" bitfld.long 0x20 25. " SD1_1P8V ,1.8V support" "Not supported,Supported" textline " " bitfld.long 0x20 24. " SD1_3P0V ,3.0V support" "Not supported,Supported" bitfld.long 0x20 23. " SD1_3P3V ,3.3V support" "Not supported,Supported" bitfld.long 0x20 22. " SD1_SUSPRES ,Suspend/resume support" "Not supported,Supported" bitfld.long 0x20 21. " SD1_SDMA ,SDMA support" "Not supported,Supported" textline " " bitfld.long 0x20 20. " SD1_HIGHSPEED ,High speed support" "Not supported,Supported" bitfld.long 0x20 19. " SD1_ADMA2 ,ADMA2 support" "Not supported,Supported" bitfld.long 0x20 18. " SD1_8BIT ,8-bit support for embedded device" "Not supported,Supported" bitfld.long 0x20 16.--17. " SD1_MAXBLK ,Max block length" "512,1024,2048,?..." textline " " bitfld.long 0x20 12.--13. " SD0_SLOTTYPE ,Should be set based on the final product usage" "Removable scard,Embedded,Shared bus,?..." bitfld.long 0x20 11. " SD0_ASYCINTR ,Asynchronous interrupt support" "Not supported,Supported" bitfld.long 0x20 10. " SD0_64BIT ,64-bit system bus support" "Not supported,Supported" bitfld.long 0x20 9. " SD0_1P8V ,1.8V support" "Not supported,Supported" textline " " bitfld.long 0x20 8. " SD0_3P0V ,3.0V support" "Not supported,Supported" bitfld.long 0x20 7. " SD0_3P3V ,3.3V support" "Not supported,Supported" bitfld.long 0x20 6. " SD0_SUSPRES ,Suspend/resume support" "Not supported,Supported" bitfld.long 0x20 5. " SD0_SDMA ,SDMA support" "Not supported,Supported" textline " " bitfld.long 0x20 4. " SD0_HIGHSPEED ,High speed support" "Not supported,Supported" bitfld.long 0x20 3. " SD0_ADMA2 ,ADMA2 support" "Not supported,Supported" bitfld.long 0x20 2. " SD0_8BIT ,8-bit support for embedded device" "Not supported,Supported" bitfld.long 0x20 0.--1. " SD0_MAXBLK ,Max block length" "512,1024,2048,?..." line.long 0x24 "SD_CONFIG_REG2,SD Config Register 2" bitfld.long 0x24 26. " SD1_TUNINGSDR50 ,Use tuning for SDR50" "Disabled,Enabled" bitfld.long 0x24 22.--25. " SD1_RETUNETMR ,Timer count for Re-Tuning timer for Re-Tuning mode 1 to 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x24 21. " SD1_DDRIVER ,Driver type D support" "Not supported,Supported" bitfld.long 0x24 20. " SD1_CDRIVER ,Driver type C support" "Not supported,Supported" textline " " bitfld.long 0x24 19. " SD1_ADRIVER ,Driver type A support" "Not supported,Supported" bitfld.long 0x24 18. " SD1_DDR50 ,DDR50 mode support" "Not supported,Supported" bitfld.long 0x24 17. " SD1_SDR104 ,SDR104 mode support" "Not supported,Supported" bitfld.long 0x24 16. " SD1_SDR50 ,SDR50 mode support" "Not supported,Supported" textline " " bitfld.long 0x24 10. " SD0_TUNINGSDR50 ,Use tuning for SDR50" "Disabled,Enabled" bitfld.long 0x24 6.--9. " SD0_RETUNETMR ,Timer count for Re-Tuning timer for Re-Tuning mode 1 to 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x24 5. " SD0_DDRIVER ,Driver type D support" "Not supported,Supported" bitfld.long 0x24 4. " SD0_CDRIVER ,Driver type C support" "Not supported,Supported" textline " " bitfld.long 0x24 3. " SD0_ADRIVER ,Driver type A support" "Not supported,Supported" bitfld.long 0x24 2. " SD0_DDR50 ,DDR50 mode support" "Not supported,Supported" bitfld.long 0x24 1. " SD0_SDR104 ,SDR104 mode support" "Not supported,Supported" bitfld.long 0x24 0. " SD0_SDR50 ,SDR50 mode support" "Not supported,Supported" line.long 0x28 "SD_INITPRESET,Preset Value For Initialization Register" hexmask.long.word 0x28 16.--28. 1. " SD1_INITPRESET ,SD1 preset value for initialization" hexmask.long.word 0x28 0.--12. 1. " SD0_INITPRESET ,SD0 preset value for initialization" line.long 0x2C "SD_DSPPRESET,Preset Value For Default Speed Register" hexmask.long.word 0x2C 16.--28. 1. " SD1_DSPPRESET ,SD1 preset value for default speed" hexmask.long.word 0x2C 0.--12. 1. " SD0_DSPPRESET ,SD0 preset value for default speed" line.long 0x30 "SD_HSPDPRESET,Preset Value For High Speed Register" hexmask.long.word 0x30 16.--28. 1. " SD1_HSPDPRESET ,SD1 preset value for high speed" hexmask.long.word 0x30 0.--12. 1. " SD0_HSPDPRESET ,SD0 preset value for high speed" line.long 0x34 "SD_SDR12PRESET,Preset Value For SDR12 Register" hexmask.long.word 0x34 16.--28. 1. " SD1_SDR12PRESET ,SD1 preset value for SDR12" hexmask.long.word 0x34 0.--12. 1. " SD0_SDR12PRESET ,SD0 preset value for SDR12" line.long 0x38 "SD_SDR25PRESET,Preset Value For SDR25 Register" hexmask.long.word 0x38 16.--28. 1. " SD1_SDR25PRESET ,SD1 preset value for SDR25" hexmask.long.word 0x38 0.--12. 1. " SD0_SDR25PRESET ,SD0 preset value for SDR25" line.long 0x3C "SD_SDR50PRESET,Preset Value For SDR50 Register" hexmask.long.word 0x3C 16.--28. 1. " SD1_SDR50PRESET ,SD1 preset value for SDR50" hexmask.long.word 0x3C 0.--12. 1. " SD0_SDR50PRESET ,SD0 preset value for SDR50" line.long 0x40 "SD_SDR104PRESET,Preset Value For SDR104 Register" hexmask.long.word 0x40 16.--28. 1. " SD1_SDR104PRESET ,SD1 preset value for SDR104" hexmask.long.word 0x40 0.--12. 1. " SD0_SDR104PRESET ,SD0 preset value for SDR104" line.long 0x44 "SD_DDR50PRESET,Preset Value For DDR50 Register" hexmask.long.word 0x44 16.--28. 1. " SD1_DDR50PRESET ,SD1 preset value for DDR50" hexmask.long.word 0x44 0.--12. 1. " SD0_DDR50PRESET ,SD0 preset value for DDR50" group.long 0x34C++0x17 line.long 0x00 "SD_MAXCUR1P8,Maximum Current For 1.8V Register" hexmask.long.byte 0x00 16.--23. 1. " SD1_MAXCUR1P8 ,SD1 maximum current for 1.8V" hexmask.long.byte 0x00 0.--7. 1. " SD0_MAXCUR1P8 ,SD0 maximum current for 1.8V" line.long 0x04 "SD_MAXCUR3P0,Maximum Current For 3.0V Register" hexmask.long.byte 0x04 16.--23. 1. " SD1_MAXCUR3P0 ,SD1 maximum current for 3.0V" hexmask.long.byte 0x04 0.--7. 1. " SD0_MAXCUR3P0 ,SD0 maximum current for 3.0V" line.long 0x08 "SD_MAXCUR3P3,Maximum Current For 3.3V Register" hexmask.long.byte 0x08 16.--23. 1. " SD1_MAXCUR3P3 ,SD1 maximum current for 3.3V" hexmask.long.byte 0x08 0.--7. 1. " SD0_MAXCUR3P3 ,SD0 maximum current for 3.3V" line.long 0x0C "SD_DLL_CTRL,SDIO Status Register" bitfld.long 0x0C 19. " SD1_DLL_RST_DIS ,Disable the SD1 DLL tuning fix" "No,Yes" bitfld.long 0x0C 18. " SD1_DLL_RST ,DLL reset" "No reset,Reset" bitfld.long 0x0C 17. " SD1_DLL_TESTMODE ,DLL test mode" "Disabled,Enabled" bitfld.long 0x0C 16. " SD1_DLL_LOCK ,DLL lock" "Not locked,Locked" textline " " bitfld.long 0x0C 3. " SD0_DLL_RST_DIS ,Disable the SD0 DLL tuning fix" "No,Yes" bitfld.long 0x0C 2. " SD0_DLL_RST ,DLL reset" "No reset,Reset" bitfld.long 0x0C 1. " SD0_DLL_TESTMODE ,DLL test mode" "Disabled,Enabled" bitfld.long 0x0C 0. " SD0_DLL_LOCK ,DLL lock" "Not locked,Locked" line.long 0x10 "SD_CDN_CTRL,SDIO Cdn Control Register" bitfld.long 0x10 16. " SD1_CDN_CTRL ,Cdn control" "From SD/MMC,Force assertion" bitfld.long 0x10 0. " SD0_CDN_CTRL ,Cdn control" "From SD/MMC,Force assertion" line.long 0x14 "GEM_CTRL,GEM SGMII Signal Detect Control Register" bitfld.long 0x14 6.--7. " GEM3_SGMII_SD ,GEM3 signal detect control" "Tie to 0,Tie to 1,External,?..." bitfld.long 0x14 4.--5. " GEM2_SGMII_SD ,GEM2 signal detect control" "Tie to 0,Tie to 1,External,?..." bitfld.long 0x14 2.--3. " GEM1_SGMII_SD ,GEM1 signal detect control" "Tie to 0,Tie to 1,External,?..." bitfld.long 0x14 0.--1. " GEM0_SGMII_SD ,GEM0 signal detect control" "Tie to 0,Tie to 1,External,?..." group.long 0x380++0x03 line.long 0x00 "IOU_TTC_APB_CLK,TTC APB Clock Select Register" bitfld.long 0x00 6.--7. " TTC3_SEL ,TTC3 APB clock select" "APB switch,PLL ref,R5,?..." bitfld.long 0x00 4.--5. " TTC2_SEL ,TTC2 APB clock select" "APB switch,PLL ref,R5,?..." bitfld.long 0x00 2.--3. " TTC1_SEL ,TTC1 APB clock select" "APB switch,PLL ref,R5,?..." bitfld.long 0x00 0.--1. " TTC0_SEL ,TTC0 APB clock select" "APB switch,PLL ref,R5,?..." group.long 0x390++0x03 line.long 0x00 "IOU_TAPDLY_BYPASS,IOU Tap Delay Bypass For The LQSPI And NAND Controllers Register" bitfld.long 0x00 2. " LQSPI_RX ,Bypass the tap delay on the rx clock signal of LQSPI" "No bypass,Bypass" bitfld.long 0x00 1. " NAND_DQS_OUT ,Bypass the tap delay on the DQS out signal of NAND" "No bypass,Bypass" bitfld.long 0x00 0. " NAND_DQS_IN ,Bypass the tap delay on the DQS in signal of NAND" "No bypass,Bypass" group.long 0x400++0x0B line.long 0x00 "IOU_COHERENT_CTRL,AXI Coherency Selection Register" bitfld.long 0x00 28.--31. " QSPI_AXI_COH ,AXI coherent or non cohernet access selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. " NAND_AXI_COH ,AXI coherent or non cohernet access selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. " SD1_AXI_COH ,AXI coherent or non cohernet access selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " SD0_AXI_COH ,AXI coherent or non cohernet access selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 12.--15. " GEM3_AXI_COH ,AXI coherent or non cohernet access selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " GEM2_AXI_COH ,AXI coherent or non cohernet access selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " GEM1_AXI_COH ,AXI coherent or non cohernet access selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " GEM0_AXI_COH ,AXI coherent or non cohernet access selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "VIDEO_PSS_CLK_SEL,VIDEO_CLK And PSS_ALT_REF_CLK Selection Register" bitfld.long 0x04 1. " PSS_ALT_CLK ,PSS alt ref clock selection" "MIO[28],MIO[51]" bitfld.long 0x04 0. " VIDEO_CLK ,Video clock selection" "MIO[27],MIO[50]" line.long 0x08 "IOU_INTERCONNECT_ROUTE,IOU DMA Master Transaction Routing To CCI Register" bitfld.long 0x08 7. " NAND ,Route the traffic to the CCI" "Not routed,Routed" bitfld.long 0x08 6. " QSPI ,Route the traffic to the CCI" "Not routed,Routed" bitfld.long 0x08 5. " SD1 ,Route the traffic to the CCI" "Not routed,Routed" bitfld.long 0x08 4. " SD0 ,Route the traffic to the CCI" "Not routed,Routed" textline " " bitfld.long 0x08 3. " GEM3 ,Route the traffic to the CCI" "Not routed,Routed" bitfld.long 0x08 2. " GEM2 ,Route the traffic to the CCI" "Not routed,Routed" bitfld.long 0x08 1. " GEM1 ,Route the traffic to the CCI" "Not routed,Routed" bitfld.long 0x08 0. " GEM0 ,Route the traffic to the CCI" "Not routed,Routed" group.byte 0x600++0x00 line.byte 0x00 "CTRL,General Control Register For The IOU SLCR" bitfld.byte 0x00 0. " SLVERR_ENABLE ,SLVERR enable/disable" "Disabled,Enabled" group.byte 0x700++0x00 line.byte 0x00 "ISR,Interrupt Status Register" eventfld.byte 0x00 0. " ADDR_DECODE_ERR ,Status for an address decode error" "No error,Error" group.byte 0x704++0x00 line.byte 0x00 "IMR_SET/CLR,Interrupt Mask Register" setclrfld.byte 0x00 0. 0x08 0. 0x04 0. " ADDR_DECODE_ERR ,Mask for an address decode error" "Not masked,Masked" wgroup.byte 0x710++0x00 line.byte 0x00 "ITR,Interrupt Trigger Register" bitfld.byte 0x00 0. " ADDR_DECODE_ERR ,Trigger an address decode error interrupt" "No effect,Trigger" width 0x0B tree.end tree "IPI (Inter Processor Interrupts)" base ad:0xFF300000 width 19. wgroup.long 0x00++0x03 line.long 0x00 "APU_TRIG,Interrupt Trigger Register" bitfld.long 0x00 27. " PL_3 ,Generate interrupt to PL_3" "No effect,Trigger" bitfld.long 0x00 26. " PL_2 ,Generate interrupt to PL_2" "No effect,Trigger" bitfld.long 0x00 25. " PL_1 ,Generate interrupt to PL_1" "No effect,Trigger" bitfld.long 0x00 24. " PL_0 ,Generate interrupt to PL_0" "No effect,Trigger" textline " " bitfld.long 0x00 19. " PMU_3 ,Generate interrupt to PMU_3" "No effect,Trigger" bitfld.long 0x00 18. " PMU_2 ,Generate interrupt to PMU_2" "No effect,Trigger" bitfld.long 0x00 17. " PMU_1 ,Generate interrupt to PMU_1" "No effect,Trigger" bitfld.long 0x00 16. " PMU_0 ,Generate interrupt to PMU_0" "No effect,Trigger" textline " " bitfld.long 0x00 9. " RPU_1 ,Generate interrupt to RPU_1" "No effect,Trigger" bitfld.long 0x00 8. " RPU_0 ,Generate interrupt to RPU_0" "No effect,Trigger" bitfld.long 0x00 0. " APU ,Generate interrupt to APU" "No effect,Trigger" rgroup.long (0x00+0x04)++0x03 line.long 0x00 "APU_OBS,Interrupt Observation Register" bitfld.long 0x00 27. " PL_3 ,PL_3 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 26. " PL_2 ,PL_2 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 25. " PL_1 ,PL_1 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 24. " PL_0 ,PL_0 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 19. " PMU_3 ,PMU_3 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 18. " PMU_2 ,PMU_2 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 17. " PMU_1 ,PMU_1 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 16. " PMU_0 ,PMU_0 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 9. " RPU_1 ,RPU_1 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 8. " RPU_0 ,RPU_0 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 0. " APU ,APU interrupt status" "No interrupt,Interrupt" group.long (0x00+0x10)++0x03 line.long 0x00 "APU_ISR,Interrupt Status Register" eventfld.long 0x00 27. " PL_3 ,PL_3 interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 26. " PL_2 ,PL_2 interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 25. " PL_1 ,PL_1 interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 24. " PL_0 ,PL_0 interrupt status" "No interrupt,Interrupt" textline " " eventfld.long 0x00 19. " PMU_3 ,PMU_3 interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 18. " PMU_2 ,PMU_2 interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 17. " PMU_1 ,PMU_1 interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 16. " PMU_0 ,PMU_0 interrupt status" "No interrupt,Interrupt" textline " " eventfld.long 0x00 9. " RPU_1 ,RPU_1 interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 8. " RPU_0 ,RPU_0 interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 0. " APU ,APU interrupt status" "No interrupt,Interrupt" group.long (0x00+0x14)++0x03 line.long 0x00 "APU_IMR_SET/CLR,Interrupt Mask Register." setclrfld.long 0x00 27. 0x04 27. 0x08 27. " PL_3 ,PL_3 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 26. 0x04 26. 0x08 26. " PL_2 ,PL_2 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 25. 0x04 25. 0x08 25. " PL_1 ,PL_1 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 24. 0x04 24. 0x08 24. " PL_0 ,PL_0 interrupt mask" "Not masked,Masked" textline " " setclrfld.long 0x00 19. 0x04 19. 0x08 19. " PMU_3 ,PMU_3 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 18. 0x04 18. 0x08 18. " PMU_2 ,PMU_2 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 17. 0x04 17. 0x08 17. " PMU_1 ,PMU_1 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 16. 0x04 16. 0x08 16. " PMU_0 ,PMU_0 interrupt mask" "Not masked,Masked" textline " " setclrfld.long 0x00 9. 0x04 9. 0x08 9. " RPU_1 ,RPU_1 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 8. 0x04 8. 0x08 8. " RPU_0 ,RPU_0 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 0. 0x04 0. 0x08 0. " APU ,APU interrupt mask" "Not masked,Masked" wgroup.long 0x10000++0x03 line.long 0x00 "RPU_0_TRIG,Interrupt Trigger Register" bitfld.long 0x00 27. " PL_3 ,Generate interrupt to PL_3" "No effect,Trigger" bitfld.long 0x00 26. " PL_2 ,Generate interrupt to PL_2" "No effect,Trigger" bitfld.long 0x00 25. " PL_1 ,Generate interrupt to PL_1" "No effect,Trigger" bitfld.long 0x00 24. " PL_0 ,Generate interrupt to PL_0" "No effect,Trigger" textline " " bitfld.long 0x00 19. " PMU_3 ,Generate interrupt to PMU_3" "No effect,Trigger" bitfld.long 0x00 18. " PMU_2 ,Generate interrupt to PMU_2" "No effect,Trigger" bitfld.long 0x00 17. " PMU_1 ,Generate interrupt to PMU_1" "No effect,Trigger" bitfld.long 0x00 16. " PMU_0 ,Generate interrupt to PMU_0" "No effect,Trigger" textline " " bitfld.long 0x00 9. " RPU_1 ,Generate interrupt to RPU_1" "No effect,Trigger" bitfld.long 0x00 8. " RPU_0 ,Generate interrupt to RPU_0" "No effect,Trigger" bitfld.long 0x00 0. " APU ,Generate interrupt to APU" "No effect,Trigger" rgroup.long (0x10000+0x04)++0x03 line.long 0x00 "RPU_0_OBS,Interrupt Observation Register" bitfld.long 0x00 27. " PL_3 ,PL_3 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 26. " PL_2 ,PL_2 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 25. " PL_1 ,PL_1 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 24. " PL_0 ,PL_0 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 19. " PMU_3 ,PMU_3 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 18. " PMU_2 ,PMU_2 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 17. " PMU_1 ,PMU_1 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 16. " PMU_0 ,PMU_0 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 9. " RPU_1 ,RPU_1 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 8. " RPU_0 ,RPU_0 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 0. " APU ,APU interrupt status" "No interrupt,Interrupt" group.long (0x10000+0x10)++0x03 line.long 0x00 "RPU_0_ISR,Interrupt Status Register" eventfld.long 0x00 27. " PL_3 ,PL_3 interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 26. " PL_2 ,PL_2 interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 25. " PL_1 ,PL_1 interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 24. " PL_0 ,PL_0 interrupt status" "No interrupt,Interrupt" textline " " eventfld.long 0x00 19. " PMU_3 ,PMU_3 interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 18. " PMU_2 ,PMU_2 interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 17. " PMU_1 ,PMU_1 interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 16. " PMU_0 ,PMU_0 interrupt status" "No interrupt,Interrupt" textline " " eventfld.long 0x00 9. " RPU_1 ,RPU_1 interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 8. " RPU_0 ,RPU_0 interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 0. " APU ,APU interrupt status" "No interrupt,Interrupt" group.long (0x10000+0x14)++0x03 line.long 0x00 "RPU_0_IMR_SET/CLR,Interrupt Mask Register." setclrfld.long 0x00 27. 0x04 27. 0x08 27. " PL_3 ,PL_3 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 26. 0x04 26. 0x08 26. " PL_2 ,PL_2 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 25. 0x04 25. 0x08 25. " PL_1 ,PL_1 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 24. 0x04 24. 0x08 24. " PL_0 ,PL_0 interrupt mask" "Not masked,Masked" textline " " setclrfld.long 0x00 19. 0x04 19. 0x08 19. " PMU_3 ,PMU_3 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 18. 0x04 18. 0x08 18. " PMU_2 ,PMU_2 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 17. 0x04 17. 0x08 17. " PMU_1 ,PMU_1 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 16. 0x04 16. 0x08 16. " PMU_0 ,PMU_0 interrupt mask" "Not masked,Masked" textline " " setclrfld.long 0x00 9. 0x04 9. 0x08 9. " RPU_1 ,RPU_1 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 8. 0x04 8. 0x08 8. " RPU_0 ,RPU_0 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 0. 0x04 0. 0x08 0. " APU ,APU interrupt mask" "Not masked,Masked" wgroup.long 0x20000++0x03 line.long 0x00 "RPU_1_TRIG,Interrupt Trigger Register" bitfld.long 0x00 27. " PL_3 ,Generate interrupt to PL_3" "No effect,Trigger" bitfld.long 0x00 26. " PL_2 ,Generate interrupt to PL_2" "No effect,Trigger" bitfld.long 0x00 25. " PL_1 ,Generate interrupt to PL_1" "No effect,Trigger" bitfld.long 0x00 24. " PL_0 ,Generate interrupt to PL_0" "No effect,Trigger" textline " " bitfld.long 0x00 19. " PMU_3 ,Generate interrupt to PMU_3" "No effect,Trigger" bitfld.long 0x00 18. " PMU_2 ,Generate interrupt to PMU_2" "No effect,Trigger" bitfld.long 0x00 17. " PMU_1 ,Generate interrupt to PMU_1" "No effect,Trigger" bitfld.long 0x00 16. " PMU_0 ,Generate interrupt to PMU_0" "No effect,Trigger" textline " " bitfld.long 0x00 9. " RPU_1 ,Generate interrupt to RPU_1" "No effect,Trigger" bitfld.long 0x00 8. " RPU_0 ,Generate interrupt to RPU_0" "No effect,Trigger" bitfld.long 0x00 0. " APU ,Generate interrupt to APU" "No effect,Trigger" rgroup.long (0x20000+0x04)++0x03 line.long 0x00 "RPU_1_OBS,Interrupt Observation Register" bitfld.long 0x00 27. " PL_3 ,PL_3 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 26. " PL_2 ,PL_2 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 25. " PL_1 ,PL_1 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 24. " PL_0 ,PL_0 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 19. " PMU_3 ,PMU_3 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 18. " PMU_2 ,PMU_2 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 17. " PMU_1 ,PMU_1 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 16. " PMU_0 ,PMU_0 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 9. " RPU_1 ,RPU_1 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 8. " RPU_0 ,RPU_0 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 0. " APU ,APU interrupt status" "No interrupt,Interrupt" group.long (0x20000+0x10)++0x03 line.long 0x00 "RPU_1_ISR,Interrupt Status Register" eventfld.long 0x00 27. " PL_3 ,PL_3 interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 26. " PL_2 ,PL_2 interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 25. " PL_1 ,PL_1 interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 24. " PL_0 ,PL_0 interrupt status" "No interrupt,Interrupt" textline " " eventfld.long 0x00 19. " PMU_3 ,PMU_3 interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 18. " PMU_2 ,PMU_2 interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 17. " PMU_1 ,PMU_1 interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 16. " PMU_0 ,PMU_0 interrupt status" "No interrupt,Interrupt" textline " " eventfld.long 0x00 9. " RPU_1 ,RPU_1 interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 8. " RPU_0 ,RPU_0 interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 0. " APU ,APU interrupt status" "No interrupt,Interrupt" group.long (0x20000+0x14)++0x03 line.long 0x00 "RPU_1_IMR_SET/CLR,Interrupt Mask Register." setclrfld.long 0x00 27. 0x04 27. 0x08 27. " PL_3 ,PL_3 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 26. 0x04 26. 0x08 26. " PL_2 ,PL_2 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 25. 0x04 25. 0x08 25. " PL_1 ,PL_1 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 24. 0x04 24. 0x08 24. " PL_0 ,PL_0 interrupt mask" "Not masked,Masked" textline " " setclrfld.long 0x00 19. 0x04 19. 0x08 19. " PMU_3 ,PMU_3 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 18. 0x04 18. 0x08 18. " PMU_2 ,PMU_2 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 17. 0x04 17. 0x08 17. " PMU_1 ,PMU_1 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 16. 0x04 16. 0x08 16. " PMU_0 ,PMU_0 interrupt mask" "Not masked,Masked" textline " " setclrfld.long 0x00 9. 0x04 9. 0x08 9. " RPU_1 ,RPU_1 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 8. 0x04 8. 0x08 8. " RPU_0 ,RPU_0 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 0. 0x04 0. 0x08 0. " APU ,APU interrupt mask" "Not masked,Masked" wgroup.long 0x30000++0x03 line.long 0x00 "PMU_0_TRIG,Interrupt Trigger Register" bitfld.long 0x00 27. " PL_3 ,Generate interrupt to PL_3" "No effect,Trigger" bitfld.long 0x00 26. " PL_2 ,Generate interrupt to PL_2" "No effect,Trigger" bitfld.long 0x00 25. " PL_1 ,Generate interrupt to PL_1" "No effect,Trigger" bitfld.long 0x00 24. " PL_0 ,Generate interrupt to PL_0" "No effect,Trigger" textline " " bitfld.long 0x00 19. " PMU_3 ,Generate interrupt to PMU_3" "No effect,Trigger" bitfld.long 0x00 18. " PMU_2 ,Generate interrupt to PMU_2" "No effect,Trigger" bitfld.long 0x00 17. " PMU_1 ,Generate interrupt to PMU_1" "No effect,Trigger" bitfld.long 0x00 16. " PMU_0 ,Generate interrupt to PMU_0" "No effect,Trigger" textline " " bitfld.long 0x00 9. " RPU_1 ,Generate interrupt to RPU_1" "No effect,Trigger" bitfld.long 0x00 8. " RPU_0 ,Generate interrupt to RPU_0" "No effect,Trigger" bitfld.long 0x00 0. " APU ,Generate interrupt to APU" "No effect,Trigger" rgroup.long (0x30000+0x04)++0x03 line.long 0x00 "PMU_0_OBS,Interrupt Observation Register" bitfld.long 0x00 27. " PL_3 ,PL_3 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 26. " PL_2 ,PL_2 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 25. " PL_1 ,PL_1 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 24. " PL_0 ,PL_0 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 19. " PMU_3 ,PMU_3 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 18. " PMU_2 ,PMU_2 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 17. " PMU_1 ,PMU_1 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 16. " PMU_0 ,PMU_0 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 9. " RPU_1 ,RPU_1 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 8. " RPU_0 ,RPU_0 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 0. " APU ,APU interrupt status" "No interrupt,Interrupt" group.long (0x30000+0x10)++0x03 line.long 0x00 "PMU_0_ISR,Interrupt Status Register" eventfld.long 0x00 27. " PL_3 ,PL_3 interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 26. " PL_2 ,PL_2 interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 25. " PL_1 ,PL_1 interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 24. " PL_0 ,PL_0 interrupt status" "No interrupt,Interrupt" textline " " eventfld.long 0x00 19. " PMU_3 ,PMU_3 interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 18. " PMU_2 ,PMU_2 interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 17. " PMU_1 ,PMU_1 interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 16. " PMU_0 ,PMU_0 interrupt status" "No interrupt,Interrupt" textline " " eventfld.long 0x00 9. " RPU_1 ,RPU_1 interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 8. " RPU_0 ,RPU_0 interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 0. " APU ,APU interrupt status" "No interrupt,Interrupt" group.long (0x30000+0x14)++0x03 line.long 0x00 "PMU_0_IMR_SET/CLR,Interrupt Mask Register." setclrfld.long 0x00 27. 0x04 27. 0x08 27. " PL_3 ,PL_3 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 26. 0x04 26. 0x08 26. " PL_2 ,PL_2 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 25. 0x04 25. 0x08 25. " PL_1 ,PL_1 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 24. 0x04 24. 0x08 24. " PL_0 ,PL_0 interrupt mask" "Not masked,Masked" textline " " setclrfld.long 0x00 19. 0x04 19. 0x08 19. " PMU_3 ,PMU_3 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 18. 0x04 18. 0x08 18. " PMU_2 ,PMU_2 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 17. 0x04 17. 0x08 17. " PMU_1 ,PMU_1 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 16. 0x04 16. 0x08 16. " PMU_0 ,PMU_0 interrupt mask" "Not masked,Masked" textline " " setclrfld.long 0x00 9. 0x04 9. 0x08 9. " RPU_1 ,RPU_1 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 8. 0x04 8. 0x08 8. " RPU_0 ,RPU_0 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 0. 0x04 0. 0x08 0. " APU ,APU interrupt mask" "Not masked,Masked" wgroup.long 0x31000++0x03 line.long 0x00 "PMU_1_TRIG,Interrupt Trigger Register" bitfld.long 0x00 27. " PL_3 ,Generate interrupt to PL_3" "No effect,Trigger" bitfld.long 0x00 26. " PL_2 ,Generate interrupt to PL_2" "No effect,Trigger" bitfld.long 0x00 25. " PL_1 ,Generate interrupt to PL_1" "No effect,Trigger" bitfld.long 0x00 24. " PL_0 ,Generate interrupt to PL_0" "No effect,Trigger" textline " " bitfld.long 0x00 19. " PMU_3 ,Generate interrupt to PMU_3" "No effect,Trigger" bitfld.long 0x00 18. " PMU_2 ,Generate interrupt to PMU_2" "No effect,Trigger" bitfld.long 0x00 17. " PMU_1 ,Generate interrupt to PMU_1" "No effect,Trigger" bitfld.long 0x00 16. " PMU_0 ,Generate interrupt to PMU_0" "No effect,Trigger" textline " " bitfld.long 0x00 9. " RPU_1 ,Generate interrupt to RPU_1" "No effect,Trigger" bitfld.long 0x00 8. " RPU_0 ,Generate interrupt to RPU_0" "No effect,Trigger" bitfld.long 0x00 0. " APU ,Generate interrupt to APU" "No effect,Trigger" rgroup.long (0x31000+0x04)++0x03 line.long 0x00 "PMU_1_OBS,Interrupt Observation Register" bitfld.long 0x00 27. " PL_3 ,PL_3 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 26. " PL_2 ,PL_2 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 25. " PL_1 ,PL_1 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 24. " PL_0 ,PL_0 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 19. " PMU_3 ,PMU_3 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 18. " PMU_2 ,PMU_2 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 17. " PMU_1 ,PMU_1 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 16. " PMU_0 ,PMU_0 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 9. " RPU_1 ,RPU_1 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 8. " RPU_0 ,RPU_0 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 0. " APU ,APU interrupt status" "No interrupt,Interrupt" group.long (0x31000+0x10)++0x03 line.long 0x00 "PMU_1_ISR,Interrupt Status Register" eventfld.long 0x00 27. " PL_3 ,PL_3 interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 26. " PL_2 ,PL_2 interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 25. " PL_1 ,PL_1 interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 24. " PL_0 ,PL_0 interrupt status" "No interrupt,Interrupt" textline " " eventfld.long 0x00 19. " PMU_3 ,PMU_3 interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 18. " PMU_2 ,PMU_2 interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 17. " PMU_1 ,PMU_1 interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 16. " PMU_0 ,PMU_0 interrupt status" "No interrupt,Interrupt" textline " " eventfld.long 0x00 9. " RPU_1 ,RPU_1 interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 8. " RPU_0 ,RPU_0 interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 0. " APU ,APU interrupt status" "No interrupt,Interrupt" group.long (0x31000+0x14)++0x03 line.long 0x00 "PMU_1_IMR_SET/CLR,Interrupt Mask Register." setclrfld.long 0x00 27. 0x04 27. 0x08 27. " PL_3 ,PL_3 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 26. 0x04 26. 0x08 26. " PL_2 ,PL_2 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 25. 0x04 25. 0x08 25. " PL_1 ,PL_1 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 24. 0x04 24. 0x08 24. " PL_0 ,PL_0 interrupt mask" "Not masked,Masked" textline " " setclrfld.long 0x00 19. 0x04 19. 0x08 19. " PMU_3 ,PMU_3 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 18. 0x04 18. 0x08 18. " PMU_2 ,PMU_2 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 17. 0x04 17. 0x08 17. " PMU_1 ,PMU_1 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 16. 0x04 16. 0x08 16. " PMU_0 ,PMU_0 interrupt mask" "Not masked,Masked" textline " " setclrfld.long 0x00 9. 0x04 9. 0x08 9. " RPU_1 ,RPU_1 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 8. 0x04 8. 0x08 8. " RPU_0 ,RPU_0 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 0. 0x04 0. 0x08 0. " APU ,APU interrupt mask" "Not masked,Masked" wgroup.long 0x32000++0x03 line.long 0x00 "PMU_2_TRIG,Interrupt Trigger Register" bitfld.long 0x00 27. " PL_3 ,Generate interrupt to PL_3" "No effect,Trigger" bitfld.long 0x00 26. " PL_2 ,Generate interrupt to PL_2" "No effect,Trigger" bitfld.long 0x00 25. " PL_1 ,Generate interrupt to PL_1" "No effect,Trigger" bitfld.long 0x00 24. " PL_0 ,Generate interrupt to PL_0" "No effect,Trigger" textline " " bitfld.long 0x00 19. " PMU_3 ,Generate interrupt to PMU_3" "No effect,Trigger" bitfld.long 0x00 18. " PMU_2 ,Generate interrupt to PMU_2" "No effect,Trigger" bitfld.long 0x00 17. " PMU_1 ,Generate interrupt to PMU_1" "No effect,Trigger" bitfld.long 0x00 16. " PMU_0 ,Generate interrupt to PMU_0" "No effect,Trigger" textline " " bitfld.long 0x00 9. " RPU_1 ,Generate interrupt to RPU_1" "No effect,Trigger" bitfld.long 0x00 8. " RPU_0 ,Generate interrupt to RPU_0" "No effect,Trigger" bitfld.long 0x00 0. " APU ,Generate interrupt to APU" "No effect,Trigger" rgroup.long (0x32000+0x04)++0x03 line.long 0x00 "PMU_2_OBS,Interrupt Observation Register" bitfld.long 0x00 27. " PL_3 ,PL_3 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 26. " PL_2 ,PL_2 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 25. " PL_1 ,PL_1 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 24. " PL_0 ,PL_0 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 19. " PMU_3 ,PMU_3 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 18. " PMU_2 ,PMU_2 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 17. " PMU_1 ,PMU_1 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 16. " PMU_0 ,PMU_0 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 9. " RPU_1 ,RPU_1 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 8. " RPU_0 ,RPU_0 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 0. " APU ,APU interrupt status" "No interrupt,Interrupt" group.long (0x32000+0x10)++0x03 line.long 0x00 "PMU_2_ISR,Interrupt Status Register" eventfld.long 0x00 27. " PL_3 ,PL_3 interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 26. " PL_2 ,PL_2 interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 25. " PL_1 ,PL_1 interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 24. " PL_0 ,PL_0 interrupt status" "No interrupt,Interrupt" textline " " eventfld.long 0x00 19. " PMU_3 ,PMU_3 interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 18. " PMU_2 ,PMU_2 interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 17. " PMU_1 ,PMU_1 interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 16. " PMU_0 ,PMU_0 interrupt status" "No interrupt,Interrupt" textline " " eventfld.long 0x00 9. " RPU_1 ,RPU_1 interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 8. " RPU_0 ,RPU_0 interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 0. " APU ,APU interrupt status" "No interrupt,Interrupt" group.long (0x32000+0x14)++0x03 line.long 0x00 "PMU_2_IMR_SET/CLR,Interrupt Mask Register." setclrfld.long 0x00 27. 0x04 27. 0x08 27. " PL_3 ,PL_3 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 26. 0x04 26. 0x08 26. " PL_2 ,PL_2 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 25. 0x04 25. 0x08 25. " PL_1 ,PL_1 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 24. 0x04 24. 0x08 24. " PL_0 ,PL_0 interrupt mask" "Not masked,Masked" textline " " setclrfld.long 0x00 19. 0x04 19. 0x08 19. " PMU_3 ,PMU_3 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 18. 0x04 18. 0x08 18. " PMU_2 ,PMU_2 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 17. 0x04 17. 0x08 17. " PMU_1 ,PMU_1 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 16. 0x04 16. 0x08 16. " PMU_0 ,PMU_0 interrupt mask" "Not masked,Masked" textline " " setclrfld.long 0x00 9. 0x04 9. 0x08 9. " RPU_1 ,RPU_1 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 8. 0x04 8. 0x08 8. " RPU_0 ,RPU_0 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 0. 0x04 0. 0x08 0. " APU ,APU interrupt mask" "Not masked,Masked" wgroup.long 0x33000++0x03 line.long 0x00 "PMU_3_TRIG,Interrupt Trigger Register" bitfld.long 0x00 27. " PL_3 ,Generate interrupt to PL_3" "No effect,Trigger" bitfld.long 0x00 26. " PL_2 ,Generate interrupt to PL_2" "No effect,Trigger" bitfld.long 0x00 25. " PL_1 ,Generate interrupt to PL_1" "No effect,Trigger" bitfld.long 0x00 24. " PL_0 ,Generate interrupt to PL_0" "No effect,Trigger" textline " " bitfld.long 0x00 19. " PMU_3 ,Generate interrupt to PMU_3" "No effect,Trigger" bitfld.long 0x00 18. " PMU_2 ,Generate interrupt to PMU_2" "No effect,Trigger" bitfld.long 0x00 17. " PMU_1 ,Generate interrupt to PMU_1" "No effect,Trigger" bitfld.long 0x00 16. " PMU_0 ,Generate interrupt to PMU_0" "No effect,Trigger" textline " " bitfld.long 0x00 9. " RPU_1 ,Generate interrupt to RPU_1" "No effect,Trigger" bitfld.long 0x00 8. " RPU_0 ,Generate interrupt to RPU_0" "No effect,Trigger" bitfld.long 0x00 0. " APU ,Generate interrupt to APU" "No effect,Trigger" rgroup.long (0x33000+0x04)++0x03 line.long 0x00 "PMU_3_OBS,Interrupt Observation Register" bitfld.long 0x00 27. " PL_3 ,PL_3 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 26. " PL_2 ,PL_2 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 25. " PL_1 ,PL_1 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 24. " PL_0 ,PL_0 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 19. " PMU_3 ,PMU_3 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 18. " PMU_2 ,PMU_2 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 17. " PMU_1 ,PMU_1 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 16. " PMU_0 ,PMU_0 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 9. " RPU_1 ,RPU_1 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 8. " RPU_0 ,RPU_0 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 0. " APU ,APU interrupt status" "No interrupt,Interrupt" group.long (0x33000+0x10)++0x03 line.long 0x00 "PMU_3_ISR,Interrupt Status Register" eventfld.long 0x00 27. " PL_3 ,PL_3 interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 26. " PL_2 ,PL_2 interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 25. " PL_1 ,PL_1 interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 24. " PL_0 ,PL_0 interrupt status" "No interrupt,Interrupt" textline " " eventfld.long 0x00 19. " PMU_3 ,PMU_3 interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 18. " PMU_2 ,PMU_2 interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 17. " PMU_1 ,PMU_1 interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 16. " PMU_0 ,PMU_0 interrupt status" "No interrupt,Interrupt" textline " " eventfld.long 0x00 9. " RPU_1 ,RPU_1 interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 8. " RPU_0 ,RPU_0 interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 0. " APU ,APU interrupt status" "No interrupt,Interrupt" group.long (0x33000+0x14)++0x03 line.long 0x00 "PMU_3_IMR_SET/CLR,Interrupt Mask Register." setclrfld.long 0x00 27. 0x04 27. 0x08 27. " PL_3 ,PL_3 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 26. 0x04 26. 0x08 26. " PL_2 ,PL_2 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 25. 0x04 25. 0x08 25. " PL_1 ,PL_1 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 24. 0x04 24. 0x08 24. " PL_0 ,PL_0 interrupt mask" "Not masked,Masked" textline " " setclrfld.long 0x00 19. 0x04 19. 0x08 19. " PMU_3 ,PMU_3 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 18. 0x04 18. 0x08 18. " PMU_2 ,PMU_2 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 17. 0x04 17. 0x08 17. " PMU_1 ,PMU_1 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 16. 0x04 16. 0x08 16. " PMU_0 ,PMU_0 interrupt mask" "Not masked,Masked" textline " " setclrfld.long 0x00 9. 0x04 9. 0x08 9. " RPU_1 ,RPU_1 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 8. 0x04 8. 0x08 8. " RPU_0 ,RPU_0 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 0. 0x04 0. 0x08 0. " APU ,APU interrupt mask" "Not masked,Masked" wgroup.long 0x40000++0x03 line.long 0x00 "PL_0_TRIG,Interrupt Trigger Register" bitfld.long 0x00 27. " PL_3 ,Generate interrupt to PL_3" "No effect,Trigger" bitfld.long 0x00 26. " PL_2 ,Generate interrupt to PL_2" "No effect,Trigger" bitfld.long 0x00 25. " PL_1 ,Generate interrupt to PL_1" "No effect,Trigger" bitfld.long 0x00 24. " PL_0 ,Generate interrupt to PL_0" "No effect,Trigger" textline " " bitfld.long 0x00 19. " PMU_3 ,Generate interrupt to PMU_3" "No effect,Trigger" bitfld.long 0x00 18. " PMU_2 ,Generate interrupt to PMU_2" "No effect,Trigger" bitfld.long 0x00 17. " PMU_1 ,Generate interrupt to PMU_1" "No effect,Trigger" bitfld.long 0x00 16. " PMU_0 ,Generate interrupt to PMU_0" "No effect,Trigger" textline " " bitfld.long 0x00 9. " RPU_1 ,Generate interrupt to RPU_1" "No effect,Trigger" bitfld.long 0x00 8. " RPU_0 ,Generate interrupt to RPU_0" "No effect,Trigger" bitfld.long 0x00 0. " APU ,Generate interrupt to APU" "No effect,Trigger" rgroup.long (0x40000+0x04)++0x03 line.long 0x00 "PL_0_OBS,Interrupt Observation Register" bitfld.long 0x00 27. " PL_3 ,PL_3 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 26. " PL_2 ,PL_2 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 25. " PL_1 ,PL_1 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 24. " PL_0 ,PL_0 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 19. " PMU_3 ,PMU_3 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 18. " PMU_2 ,PMU_2 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 17. " PMU_1 ,PMU_1 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 16. " PMU_0 ,PMU_0 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 9. " RPU_1 ,RPU_1 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 8. " RPU_0 ,RPU_0 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 0. " APU ,APU interrupt status" "No interrupt,Interrupt" group.long (0x40000+0x10)++0x03 line.long 0x00 "PL_0_ISR,Interrupt Status Register" eventfld.long 0x00 27. " PL_3 ,PL_3 interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 26. " PL_2 ,PL_2 interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 25. " PL_1 ,PL_1 interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 24. " PL_0 ,PL_0 interrupt status" "No interrupt,Interrupt" textline " " eventfld.long 0x00 19. " PMU_3 ,PMU_3 interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 18. " PMU_2 ,PMU_2 interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 17. " PMU_1 ,PMU_1 interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 16. " PMU_0 ,PMU_0 interrupt status" "No interrupt,Interrupt" textline " " eventfld.long 0x00 9. " RPU_1 ,RPU_1 interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 8. " RPU_0 ,RPU_0 interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 0. " APU ,APU interrupt status" "No interrupt,Interrupt" group.long (0x40000+0x14)++0x03 line.long 0x00 "PL_0_IMR_SET/CLR,Interrupt Mask Register." setclrfld.long 0x00 27. 0x04 27. 0x08 27. " PL_3 ,PL_3 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 26. 0x04 26. 0x08 26. " PL_2 ,PL_2 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 25. 0x04 25. 0x08 25. " PL_1 ,PL_1 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 24. 0x04 24. 0x08 24. " PL_0 ,PL_0 interrupt mask" "Not masked,Masked" textline " " setclrfld.long 0x00 19. 0x04 19. 0x08 19. " PMU_3 ,PMU_3 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 18. 0x04 18. 0x08 18. " PMU_2 ,PMU_2 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 17. 0x04 17. 0x08 17. " PMU_1 ,PMU_1 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 16. 0x04 16. 0x08 16. " PMU_0 ,PMU_0 interrupt mask" "Not masked,Masked" textline " " setclrfld.long 0x00 9. 0x04 9. 0x08 9. " RPU_1 ,RPU_1 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 8. 0x04 8. 0x08 8. " RPU_0 ,RPU_0 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 0. 0x04 0. 0x08 0. " APU ,APU interrupt mask" "Not masked,Masked" wgroup.long 0x50000++0x03 line.long 0x00 "PL_1_TRIG,Interrupt Trigger Register" bitfld.long 0x00 27. " PL_3 ,Generate interrupt to PL_3" "No effect,Trigger" bitfld.long 0x00 26. " PL_2 ,Generate interrupt to PL_2" "No effect,Trigger" bitfld.long 0x00 25. " PL_1 ,Generate interrupt to PL_1" "No effect,Trigger" bitfld.long 0x00 24. " PL_0 ,Generate interrupt to PL_0" "No effect,Trigger" textline " " bitfld.long 0x00 19. " PMU_3 ,Generate interrupt to PMU_3" "No effect,Trigger" bitfld.long 0x00 18. " PMU_2 ,Generate interrupt to PMU_2" "No effect,Trigger" bitfld.long 0x00 17. " PMU_1 ,Generate interrupt to PMU_1" "No effect,Trigger" bitfld.long 0x00 16. " PMU_0 ,Generate interrupt to PMU_0" "No effect,Trigger" textline " " bitfld.long 0x00 9. " RPU_1 ,Generate interrupt to RPU_1" "No effect,Trigger" bitfld.long 0x00 8. " RPU_0 ,Generate interrupt to RPU_0" "No effect,Trigger" bitfld.long 0x00 0. " APU ,Generate interrupt to APU" "No effect,Trigger" rgroup.long (0x50000+0x04)++0x03 line.long 0x00 "PL_1_OBS,Interrupt Observation Register" bitfld.long 0x00 27. " PL_3 ,PL_3 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 26. " PL_2 ,PL_2 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 25. " PL_1 ,PL_1 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 24. " PL_0 ,PL_0 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 19. " PMU_3 ,PMU_3 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 18. " PMU_2 ,PMU_2 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 17. " PMU_1 ,PMU_1 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 16. " PMU_0 ,PMU_0 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 9. " RPU_1 ,RPU_1 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 8. " RPU_0 ,RPU_0 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 0. " APU ,APU interrupt status" "No interrupt,Interrupt" group.long (0x50000+0x10)++0x03 line.long 0x00 "PL_1_ISR,Interrupt Status Register" eventfld.long 0x00 27. " PL_3 ,PL_3 interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 26. " PL_2 ,PL_2 interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 25. " PL_1 ,PL_1 interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 24. " PL_0 ,PL_0 interrupt status" "No interrupt,Interrupt" textline " " eventfld.long 0x00 19. " PMU_3 ,PMU_3 interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 18. " PMU_2 ,PMU_2 interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 17. " PMU_1 ,PMU_1 interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 16. " PMU_0 ,PMU_0 interrupt status" "No interrupt,Interrupt" textline " " eventfld.long 0x00 9. " RPU_1 ,RPU_1 interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 8. " RPU_0 ,RPU_0 interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 0. " APU ,APU interrupt status" "No interrupt,Interrupt" group.long (0x50000+0x14)++0x03 line.long 0x00 "PL_1_IMR_SET/CLR,Interrupt Mask Register." setclrfld.long 0x00 27. 0x04 27. 0x08 27. " PL_3 ,PL_3 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 26. 0x04 26. 0x08 26. " PL_2 ,PL_2 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 25. 0x04 25. 0x08 25. " PL_1 ,PL_1 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 24. 0x04 24. 0x08 24. " PL_0 ,PL_0 interrupt mask" "Not masked,Masked" textline " " setclrfld.long 0x00 19. 0x04 19. 0x08 19. " PMU_3 ,PMU_3 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 18. 0x04 18. 0x08 18. " PMU_2 ,PMU_2 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 17. 0x04 17. 0x08 17. " PMU_1 ,PMU_1 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 16. 0x04 16. 0x08 16. " PMU_0 ,PMU_0 interrupt mask" "Not masked,Masked" textline " " setclrfld.long 0x00 9. 0x04 9. 0x08 9. " RPU_1 ,RPU_1 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 8. 0x04 8. 0x08 8. " RPU_0 ,RPU_0 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 0. 0x04 0. 0x08 0. " APU ,APU interrupt mask" "Not masked,Masked" wgroup.long 0x60000++0x03 line.long 0x00 "PL_2_TRIG,Interrupt Trigger Register" bitfld.long 0x00 27. " PL_3 ,Generate interrupt to PL_3" "No effect,Trigger" bitfld.long 0x00 26. " PL_2 ,Generate interrupt to PL_2" "No effect,Trigger" bitfld.long 0x00 25. " PL_1 ,Generate interrupt to PL_1" "No effect,Trigger" bitfld.long 0x00 24. " PL_0 ,Generate interrupt to PL_0" "No effect,Trigger" textline " " bitfld.long 0x00 19. " PMU_3 ,Generate interrupt to PMU_3" "No effect,Trigger" bitfld.long 0x00 18. " PMU_2 ,Generate interrupt to PMU_2" "No effect,Trigger" bitfld.long 0x00 17. " PMU_1 ,Generate interrupt to PMU_1" "No effect,Trigger" bitfld.long 0x00 16. " PMU_0 ,Generate interrupt to PMU_0" "No effect,Trigger" textline " " bitfld.long 0x00 9. " RPU_1 ,Generate interrupt to RPU_1" "No effect,Trigger" bitfld.long 0x00 8. " RPU_0 ,Generate interrupt to RPU_0" "No effect,Trigger" bitfld.long 0x00 0. " APU ,Generate interrupt to APU" "No effect,Trigger" rgroup.long (0x60000+0x04)++0x03 line.long 0x00 "PL_2_OBS,Interrupt Observation Register" bitfld.long 0x00 27. " PL_3 ,PL_3 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 26. " PL_2 ,PL_2 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 25. " PL_1 ,PL_1 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 24. " PL_0 ,PL_0 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 19. " PMU_3 ,PMU_3 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 18. " PMU_2 ,PMU_2 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 17. " PMU_1 ,PMU_1 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 16. " PMU_0 ,PMU_0 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 9. " RPU_1 ,RPU_1 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 8. " RPU_0 ,RPU_0 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 0. " APU ,APU interrupt status" "No interrupt,Interrupt" group.long (0x60000+0x10)++0x03 line.long 0x00 "PL_2_ISR,Interrupt Status Register" eventfld.long 0x00 27. " PL_3 ,PL_3 interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 26. " PL_2 ,PL_2 interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 25. " PL_1 ,PL_1 interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 24. " PL_0 ,PL_0 interrupt status" "No interrupt,Interrupt" textline " " eventfld.long 0x00 19. " PMU_3 ,PMU_3 interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 18. " PMU_2 ,PMU_2 interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 17. " PMU_1 ,PMU_1 interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 16. " PMU_0 ,PMU_0 interrupt status" "No interrupt,Interrupt" textline " " eventfld.long 0x00 9. " RPU_1 ,RPU_1 interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 8. " RPU_0 ,RPU_0 interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 0. " APU ,APU interrupt status" "No interrupt,Interrupt" group.long (0x60000+0x14)++0x03 line.long 0x00 "PL_2_IMR_SET/CLR,Interrupt Mask Register." setclrfld.long 0x00 27. 0x04 27. 0x08 27. " PL_3 ,PL_3 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 26. 0x04 26. 0x08 26. " PL_2 ,PL_2 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 25. 0x04 25. 0x08 25. " PL_1 ,PL_1 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 24. 0x04 24. 0x08 24. " PL_0 ,PL_0 interrupt mask" "Not masked,Masked" textline " " setclrfld.long 0x00 19. 0x04 19. 0x08 19. " PMU_3 ,PMU_3 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 18. 0x04 18. 0x08 18. " PMU_2 ,PMU_2 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 17. 0x04 17. 0x08 17. " PMU_1 ,PMU_1 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 16. 0x04 16. 0x08 16. " PMU_0 ,PMU_0 interrupt mask" "Not masked,Masked" textline " " setclrfld.long 0x00 9. 0x04 9. 0x08 9. " RPU_1 ,RPU_1 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 8. 0x04 8. 0x08 8. " RPU_0 ,RPU_0 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 0. 0x04 0. 0x08 0. " APU ,APU interrupt mask" "Not masked,Masked" wgroup.long 0x70000++0x03 line.long 0x00 "PL_3_TRIG,Interrupt Trigger Register" bitfld.long 0x00 27. " PL_3 ,Generate interrupt to PL_3" "No effect,Trigger" bitfld.long 0x00 26. " PL_2 ,Generate interrupt to PL_2" "No effect,Trigger" bitfld.long 0x00 25. " PL_1 ,Generate interrupt to PL_1" "No effect,Trigger" bitfld.long 0x00 24. " PL_0 ,Generate interrupt to PL_0" "No effect,Trigger" textline " " bitfld.long 0x00 19. " PMU_3 ,Generate interrupt to PMU_3" "No effect,Trigger" bitfld.long 0x00 18. " PMU_2 ,Generate interrupt to PMU_2" "No effect,Trigger" bitfld.long 0x00 17. " PMU_1 ,Generate interrupt to PMU_1" "No effect,Trigger" bitfld.long 0x00 16. " PMU_0 ,Generate interrupt to PMU_0" "No effect,Trigger" textline " " bitfld.long 0x00 9. " RPU_1 ,Generate interrupt to RPU_1" "No effect,Trigger" bitfld.long 0x00 8. " RPU_0 ,Generate interrupt to RPU_0" "No effect,Trigger" bitfld.long 0x00 0. " APU ,Generate interrupt to APU" "No effect,Trigger" rgroup.long (0x70000+0x04)++0x03 line.long 0x00 "PL_3_OBS,Interrupt Observation Register" bitfld.long 0x00 27. " PL_3 ,PL_3 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 26. " PL_2 ,PL_2 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 25. " PL_1 ,PL_1 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 24. " PL_0 ,PL_0 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 19. " PMU_3 ,PMU_3 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 18. " PMU_2 ,PMU_2 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 17. " PMU_1 ,PMU_1 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 16. " PMU_0 ,PMU_0 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 9. " RPU_1 ,RPU_1 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 8. " RPU_0 ,RPU_0 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 0. " APU ,APU interrupt status" "No interrupt,Interrupt" group.long (0x70000+0x10)++0x03 line.long 0x00 "PL_3_ISR,Interrupt Status Register" eventfld.long 0x00 27. " PL_3 ,PL_3 interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 26. " PL_2 ,PL_2 interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 25. " PL_1 ,PL_1 interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 24. " PL_0 ,PL_0 interrupt status" "No interrupt,Interrupt" textline " " eventfld.long 0x00 19. " PMU_3 ,PMU_3 interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 18. " PMU_2 ,PMU_2 interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 17. " PMU_1 ,PMU_1 interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 16. " PMU_0 ,PMU_0 interrupt status" "No interrupt,Interrupt" textline " " eventfld.long 0x00 9. " RPU_1 ,RPU_1 interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 8. " RPU_0 ,RPU_0 interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 0. " APU ,APU interrupt status" "No interrupt,Interrupt" group.long (0x70000+0x14)++0x03 line.long 0x00 "PL_3_IMR_SET/CLR,Interrupt Mask Register." setclrfld.long 0x00 27. 0x04 27. 0x08 27. " PL_3 ,PL_3 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 26. 0x04 26. 0x08 26. " PL_2 ,PL_2 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 25. 0x04 25. 0x08 25. " PL_1 ,PL_1 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 24. 0x04 24. 0x08 24. " PL_0 ,PL_0 interrupt mask" "Not masked,Masked" textline " " setclrfld.long 0x00 19. 0x04 19. 0x08 19. " PMU_3 ,PMU_3 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 18. 0x04 18. 0x08 18. " PMU_2 ,PMU_2 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 17. 0x04 17. 0x08 17. " PMU_1 ,PMU_1 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 16. 0x04 16. 0x08 16. " PMU_0 ,PMU_0 interrupt mask" "Not masked,Masked" textline " " setclrfld.long 0x00 9. 0x04 9. 0x08 9. " RPU_1 ,RPU_1 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 8. 0x04 8. 0x08 8. " RPU_0 ,RPU_0 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 0. 0x04 0. 0x08 0. " APU ,APU interrupt mask" "Not masked,Masked" textline " " group.byte 0x80000++0x00 line.byte 0x00 "IPI_CTRL,General Control Register" bitfld.byte 0x00 0. " SLVERR_ENABLE ,SLVERR enable/disable" "Disabled,Enabled" group.byte 0x80010++0x00 line.byte 0x00 "ISR,Interrupt Status Register" eventfld.byte 0x00 0. " ADDR_DECODE_ERR ,Status for an address decode error" "No error,Error" group.byte 0x80014++0x00 line.byte 0x00 "IMR_SET/CLR,Interrupt Mask Register" setclrfld.byte 0x00 0. 0x08 0. 0x04 0. " ADDR_DECODE_ERR ,Mask for an address decode error" "Not masked,Masked" group.long 0x80030++0x03 line.long 0x00 "SAFETY_CHK,Scratch Register For Interconnect Data Path Checking" width 0x0B tree.end tree "LPD_GPV (LPD GPV Module)" base ad:0xFE100000 width 38. rgroup.long 0x1FD0++0x03 line.long 0x00 "PERIPH_ID_4,Peripherial ID Register 4" hexmask.long.byte 0x00 0.--7. 1. " PERIPH_ID_4 ,4KB count, JEP106 continuation code" rgroup.long 0x1FE0++0x1F line.long 0x00 "PERIPH_ID_0,Peripherial ID Register 0" hexmask.long.byte 0x00 0.--7. 1. " PERIPH_ID_0 ,Part number [7:0]" line.long 0x04 "PERIPH_ID_1,Peripherial ID Register 1" hexmask.long.byte 0x04 0.--7. 1. " PERIPH_ID_1 ,JEP106[3:0], part number [11:8]" line.long 0x08 "PERIPH_ID_2,Peripherial ID Register 2" hexmask.long.byte 0x08 0.--7. 1. " PERIPH_ID_2 ,Revision, JEP106 code flag, JEP106[6:4]" line.long 0x0C "PERIPH_ID_3,Peripherial ID Register 3" bitfld.long 0x0C 4.--7. " REV_AND ,Revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 0.--3. " CUST_MOD_NUM ,Customer modified number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x10 "COMP_ID_0,Component ID Register 0" hexmask.long.byte 0x10 0.--7. 1. " COMP_ID_0 ,Preamble" line.long 0x14 "COMP_ID_1,Component ID Register 1" hexmask.long.byte 0x14 0.--7. 1. " COMP_ID_1 ,Generic IP component class, preamble" line.long 0x18 "COMP_ID_2,Component ID Register 2" hexmask.long.byte 0x18 0.--7. 1. " COMP_ID_2 ,Preamble" line.long 0x1C "COMP_ID_3,Component ID Register 3" hexmask.long.byte 0x1C 0.--7. 1. " COMP_ID_3 ,Preamble" group.long 0x2008++0x03 line.long 0x00 "INTLPD_OCM_FN_MOD_ISS_BM,Bus Matrix Issuing Functionality Modification Register" bitfld.long 0x00 0.--1. " FN_MOD_ISS_BM ,Bus matrix issuing functionality modification" "0,1,2,3" group.long 0x5008++0x03 line.long 0x00 "INTLPD_RPUS0_FN_MOD_ISS_BM,Bus Matrix Issuing Functionality Modification Register" bitfld.long 0x00 0.--1. " FN_MOD_ISS_BM ,Bus matrix issuing functionality modification" "0,1,2,3" group.long 0x6008++0x03 line.long 0x00 "INTLPD_RPUS1_FN_MOD_ISS_BM,Bus Matrix Issuing Functionality Modification Register" bitfld.long 0x00 0.--1. " FN_MOD_ISS_BM ,Bus matrix issuing functionality modification" "0,1,2,3" group.long 0x7008++0x03 line.long 0x00 "INTLPD_USB0S_FN_MOD_ISS_BM,Bus Matrix Issuing Functionality Modification Register" bitfld.long 0x00 0.--1. " FN_MOD_ISS_BM ,Bus matrix issuing functionality modification" "0,1,2,3" group.long 0x8008++0x03 line.long 0x00 "INTLPD_USB1S_FN_MOD_ISS_BM,Bus Matrix Issuing Functionality Modification Register" bitfld.long 0x00 0.--1. " FN_MOD_ISS_BM ,Bus matrix issuing functionality modification" "0,1,2,3" group.long 0x9008++0x03 line.long 0x00 "INTLPD_AFIFS2_FN_MOD_ISS_BM,Bus Matrix Issuing Functionality Modification Register" bitfld.long 0x00 0.--1. " FN_MOD_ISS_BM ,Bus matrix issuing functionality modification" "0,1,2,3" group.long 0xA008++0x03 line.long 0x00 "INTLPD_INTIOU_FN_MOD_ISS_BM,Bus Matrix Issuing Functionality Modification Register" bitfld.long 0x00 0.--1. " FN_MOD_ISS_BM ,Bus matrix issuing functionality modification" "0,1,2,3" group.long 0xA108++0x03 line.long 0x00 "INTLPD_INTIOU_FN_MOD,Issuing Functionality Modification Register" bitfld.long 0x00 1. " FN_MOD[1] ,Write issuing, write_iss_override" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Read issuing, read_iss_override" "Disabled,Enabled" group.long 0xD008++0x03 line.long 0x00 "SLAVE_11_IB_FN_MOD_ISS_BM,Bus Matrix Issuing Functionality Modification Register" bitfld.long 0x00 0.--1. " FN_MOD_ISS_BM ,Bus matrix issuing functionality modification" "0,1,2,3" group.long (0x42000+0x100)++0x07 line.long 0x00 "RPUM0_INTLPD_READ_QOS,Read Channel QoS Value Register" bitfld.long 0x00 0.--3. " AR_QOS ,Read channel QoS value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "RPUM0_INTLPD_WRITE_QOS,Write Channel QoS Value Register" bitfld.long 0x04 0.--3. " AW_QOS ,Write channel QoS value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long (0x42000+0x108)++0x27 line.long 0x00 "RPUM0_INTLPD_FN_MOD,Issuing Functionality Modification Register" bitfld.long 0x00 1. " FN_MOD[1] ,Write issuing, write_iss_override" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Read issuing, read_iss_override" "Disabled,Enabled" line.long 0x04 "RPUM0_INTLPD_QOS_CNTL,QoS Control Register" bitfld.long 0x04 7. " EN_AWAR_OT ,Enable combined regulation of outstanding transactions" "Disabled,Enabled" bitfld.long 0x04 6. " EN_AR_OT ,Enable regulation of outstanding read transactions" "Disabled,Enabled" bitfld.long 0x04 5. " EN_AW_OT ,Enable regulation of outstanding write transactions" "Disabled,Enabled" bitfld.long 0x04 2. " EN_AWAR_RATE ,Enable combined AW/AR rate regulation" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " EN_AR_RATE ,Enable AR rate regulation" "Disabled,Enabled" bitfld.long 0x04 0. " EN_AW_RATE ,Enable AW rate regulation" "Disabled,Enabled" line.long 0x08 "RPUM0_INTLPD_MAX_OT,Maximum Number Of Outstanding Transactions Register" bitfld.long 0x08 24.--29. " AR_MAX_OTI ,Integer part of max outstanding AR addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 16.--23. 1. " AR_MAX_OTF ,Fraction part of max outstanding AR addresses" bitfld.long 0x08 8.--13. " AW_MAX_OTI ,Integer part of max outstanding AW addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 0.--7. 1. " AW_MAX_OTF ,Fraction part of max outstanding AW addresses" line.long 0x0C "RPUM0_INTLPD_MAX_COMB_OT,Maximum Number Of Combined Outstanding Transactions Register" hexmask.long.byte 0x0C 8.--14. 1. " AWAR_MAX_OTI ,Integer part of max combined outstanding AW/AR addresses" hexmask.long.byte 0x0C 0.--7. 1. " AWAR_MAX_OTF ,Fraction part of max combined outstanding AW/AR addresses" line.long 0x10 "RPUM0_INTLPD_AW_P,AW Channel Peak Rate Register" hexmask.long.byte 0x10 24.--31. 1. " AW_P ,Channel peak rate" line.long 0x14 "RPUM0_INTLPD_AW_B,AW Channel Burstiness Allowance Register" hexmask.long.word 0x14 0.--15. 1. " AW_B ,Channel burstiness integer number of transfers" line.long 0x18 "RPUM0_INTLPD_AW_R,AW Channel Average Rate Register" hexmask.long.word 0x18 20.--31. 1. " AW_R ,Channel average rate" line.long 0x1C "RPUM0_INTLPD_AR_P,AR Channel Peak Rate Register" hexmask.long.byte 0x1C 24.--31. 1. " AR_P ,Channel peak rate" line.long 0x20 "RPUM0_INTLPD_AR_B,AR Channel Burstiness Allowance Register" hexmask.long.word 0x20 0.--15. 1. " AR_B ,Channel burstiness" line.long 0x24 "RPUM0_INTLPD_AR_R,AR Channel Average Rate" hexmask.long.word 0x24 20.--31. 1. " AR_R ,Channel average rate" group.long (0x43000+0x100)++0x07 line.long 0x00 "RPUM1_INTLPD_READ_QOS,Read Channel QoS Value Register" bitfld.long 0x00 0.--3. " AR_QOS ,Read channel QoS value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "RPUM1_INTLPD_WRITE_QOS,Write Channel QoS Value Register" bitfld.long 0x04 0.--3. " AW_QOS ,Write channel QoS value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long (0x43000+0x108)++0x27 line.long 0x00 "RPUM1_INTLPD_FN_MOD,Issuing Functionality Modification Register" bitfld.long 0x00 1. " FN_MOD[1] ,Write issuing, write_iss_override" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Read issuing, read_iss_override" "Disabled,Enabled" line.long 0x04 "RPUM1_INTLPD_QOS_CNTL,QoS Control Register" bitfld.long 0x04 7. " EN_AWAR_OT ,Enable combined regulation of outstanding transactions" "Disabled,Enabled" bitfld.long 0x04 6. " EN_AR_OT ,Enable regulation of outstanding read transactions" "Disabled,Enabled" bitfld.long 0x04 5. " EN_AW_OT ,Enable regulation of outstanding write transactions" "Disabled,Enabled" bitfld.long 0x04 2. " EN_AWAR_RATE ,Enable combined AW/AR rate regulation" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " EN_AR_RATE ,Enable AR rate regulation" "Disabled,Enabled" bitfld.long 0x04 0. " EN_AW_RATE ,Enable AW rate regulation" "Disabled,Enabled" line.long 0x08 "RPUM1_INTLPD_MAX_OT,Maximum Number Of Outstanding Transactions Register" bitfld.long 0x08 24.--29. " AR_MAX_OTI ,Integer part of max outstanding AR addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 16.--23. 1. " AR_MAX_OTF ,Fraction part of max outstanding AR addresses" bitfld.long 0x08 8.--13. " AW_MAX_OTI ,Integer part of max outstanding AW addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 0.--7. 1. " AW_MAX_OTF ,Fraction part of max outstanding AW addresses" line.long 0x0C "RPUM1_INTLPD_MAX_COMB_OT,Maximum Number Of Combined Outstanding Transactions Register" hexmask.long.byte 0x0C 8.--14. 1. " AWAR_MAX_OTI ,Integer part of max combined outstanding AW/AR addresses" hexmask.long.byte 0x0C 0.--7. 1. " AWAR_MAX_OTF ,Fraction part of max combined outstanding AW/AR addresses" line.long 0x10 "RPUM1_INTLPD_AW_P,AW Channel Peak Rate Register" hexmask.long.byte 0x10 24.--31. 1. " AW_P ,Channel peak rate" line.long 0x14 "RPUM1_INTLPD_AW_B,AW Channel Burstiness Allowance Register" hexmask.long.word 0x14 0.--15. 1. " AW_B ,Channel burstiness integer number of transfers" line.long 0x18 "RPUM1_INTLPD_AW_R,AW Channel Average Rate Register" hexmask.long.word 0x18 20.--31. 1. " AW_R ,Channel average rate" line.long 0x1C "RPUM1_INTLPD_AR_P,AR Channel Peak Rate Register" hexmask.long.byte 0x1C 24.--31. 1. " AR_P ,Channel peak rate" line.long 0x20 "RPUM1_INTLPD_AR_B,AR Channel Burstiness Allowance Register" hexmask.long.word 0x20 0.--15. 1. " AR_B ,Channel burstiness" line.long 0x24 "RPUM1_INTLPD_AR_R,AR Channel Average Rate" hexmask.long.word 0x24 20.--31. 1. " AR_R ,Channel average rate" group.long (0x44000+0x24)++0x03 line.long 0x00 "ADMAM_INTLPD_IB_FN_MOD2,Issuing Functionality Modification Register 2" bitfld.long 0x00 0. " BYPASS_MERGE ,Do not alter any transactions that could pass through legally without alteration" "No bypass,Bypass" group.long (0x44000+0x108)++0x27 line.long 0x00 "ADMAM_INTLPD_IB_FN_MOD,Issuing Functionality Modification Register" bitfld.long 0x00 1. " FN_MOD[1] ,Write issuing, write_iss_override" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Read issuing, read_iss_override" "Disabled,Enabled" line.long 0x04 "ADMAM_INTLPD_IB_QOS_CNTL,QoS Control Register" bitfld.long 0x04 7. " EN_AWAR_OT ,Enable combined regulation of outstanding transactions" "Disabled,Enabled" bitfld.long 0x04 6. " EN_AR_OT ,Enable regulation of outstanding read transactions" "Disabled,Enabled" bitfld.long 0x04 5. " EN_AW_OT ,Enable regulation of outstanding write transactions" "Disabled,Enabled" bitfld.long 0x04 2. " EN_AWAR_RATE ,Enable combined AW/AR rate regulation" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " EN_AR_RATE ,Enable AR rate regulation" "Disabled,Enabled" bitfld.long 0x04 0. " EN_AW_RATE ,Enable AW rate regulation" "Disabled,Enabled" line.long 0x08 "ADMAM_INTLPD_IB_MAX_OT,Maximum Number Of Outstanding Transactions Register" bitfld.long 0x08 24.--29. " AR_MAX_OTI ,Integer part of max outstanding AR addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 16.--23. 1. " AR_MAX_OTF ,Fraction part of max outstanding AR addresses" bitfld.long 0x08 8.--13. " AW_MAX_OTI ,Integer part of max outstanding AW addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 0.--7. 1. " AW_MAX_OTF ,Fraction part of max outstanding AW addresses" line.long 0x0C "ADMAM_INTLPD_IB_MAX_COMB_OT,Maximum Number Of Combined Outstanding Transactions Register" hexmask.long.byte 0x0C 8.--14. 1. " AWAR_MAX_OTI ,Integer part of max combined outstanding AW/AR addresses" hexmask.long.byte 0x0C 0.--7. 1. " AWAR_MAX_OTF ,Fraction part of max combined outstanding AW/AR addresses" line.long 0x10 "ADMAM_INTLPD_IB_AW_P,AW Channel Peak Rate Register" hexmask.long.byte 0x10 24.--31. 1. " AW_P ,Channel peak rate" line.long 0x14 "ADMAM_INTLPD_IB_AW_B,AW Channel Burstiness Allowance Register" hexmask.long.word 0x14 0.--15. 1. " AW_B ,Channel burstiness integer number of transfers" line.long 0x18 "ADMAM_INTLPD_IB_AW_R,AW Channel Average Rate Register" hexmask.long.word 0x18 20.--31. 1. " AW_R ,Channel average rate" line.long 0x1C "ADMAM_INTLPD_IB_AR_P,AR Channel Peak Rate Register" hexmask.long.byte 0x1C 24.--31. 1. " AR_P ,Channel peak rate" line.long 0x20 "ADMAM_INTLPD_IB_AR_B,AR Channel Burstiness Allowance Register" hexmask.long.word 0x20 0.--15. 1. " AR_B ,Channel burstiness" line.long 0x24 "ADMAM_INTLPD_IB_AR_R,AR Channel Average Rate" hexmask.long.word 0x24 20.--31. 1. " AR_R ,Channel average rate" group.long (0x45000+0x108)++0x27 line.long 0x00 "AFIFM6M_INTLPD_IB_FN_MOD,Issuing Functionality Modification Register" bitfld.long 0x00 1. " FN_MOD[1] ,Write issuing, write_iss_override" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Read issuing, read_iss_override" "Disabled,Enabled" line.long 0x04 "AFIFM6M_INTLPD_IB_QOS_CNTL,QoS Control Register" bitfld.long 0x04 7. " EN_AWAR_OT ,Enable combined regulation of outstanding transactions" "Disabled,Enabled" bitfld.long 0x04 6. " EN_AR_OT ,Enable regulation of outstanding read transactions" "Disabled,Enabled" bitfld.long 0x04 5. " EN_AW_OT ,Enable regulation of outstanding write transactions" "Disabled,Enabled" bitfld.long 0x04 2. " EN_AWAR_RATE ,Enable combined AW/AR rate regulation" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " EN_AR_RATE ,Enable AR rate regulation" "Disabled,Enabled" bitfld.long 0x04 0. " EN_AW_RATE ,Enable AW rate regulation" "Disabled,Enabled" line.long 0x08 "AFIFM6M_INTLPD_IB_MAX_OT,Maximum Number Of Outstanding Transactions Register" bitfld.long 0x08 24.--29. " AR_MAX_OTI ,Integer part of max outstanding AR addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 16.--23. 1. " AR_MAX_OTF ,Fraction part of max outstanding AR addresses" bitfld.long 0x08 8.--13. " AW_MAX_OTI ,Integer part of max outstanding AW addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 0.--7. 1. " AW_MAX_OTF ,Fraction part of max outstanding AW addresses" line.long 0x0C "AFIFM6M_INTLPD_IB_MAX_COMB_OT,Maximum Number Of Combined Outstanding Transactions Register" hexmask.long.byte 0x0C 8.--14. 1. " AWAR_MAX_OTI ,Integer part of max combined outstanding AW/AR addresses" hexmask.long.byte 0x0C 0.--7. 1. " AWAR_MAX_OTF ,Fraction part of max combined outstanding AW/AR addresses" line.long 0x10 "AFIFM6M_INTLPD_IB_AW_P,AW Channel Peak Rate Register" hexmask.long.byte 0x10 24.--31. 1. " AW_P ,Channel peak rate" line.long 0x14 "AFIFM6M_INTLPD_IB_AW_B,AW Channel Burstiness Allowance Register" hexmask.long.word 0x14 0.--15. 1. " AW_B ,Channel burstiness integer number of transfers" line.long 0x18 "AFIFM6M_INTLPD_IB_AW_R,AW Channel Average Rate Register" hexmask.long.word 0x18 20.--31. 1. " AW_R ,Channel average rate" line.long 0x1C "AFIFM6M_INTLPD_IB_AR_P,AR Channel Peak Rate Register" hexmask.long.byte 0x1C 24.--31. 1. " AR_P ,Channel peak rate" line.long 0x20 "AFIFM6M_INTLPD_IB_AR_B,AR Channel Burstiness Allowance Register" hexmask.long.word 0x20 0.--15. 1. " AR_B ,Channel burstiness" line.long 0x24 "AFIFM6M_INTLPD_IB_AR_R,AR Channel Average Rate" hexmask.long.word 0x24 20.--31. 1. " AR_R ,Channel average rate" group.long (0x47000+0x24)++0x03 line.long 0x00 "DAP_INTLPD_IB_FN_MOD2,Issuing Functionality Modification Register 2" bitfld.long 0x00 0. " BYPASS_MERGE ,Do not alter any transactions that could pass through legally without alteration" "No bypass,Bypass" group.long (0x47000+0x100)++0x07 line.long 0x00 "DAP_INTLPD_IB_READ_QOS,Read Channel QoS Value Register" bitfld.long 0x00 0.--3. " AR_QOS ,Read channel QoS value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "DAP_INTLPD_IB_WRITE_QOS,Write Channel QoS Value Register" bitfld.long 0x04 0.--3. " AW_QOS ,Write channel QoS value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long (0x47000+0x108)++0x27 line.long 0x00 "DAP_INTLPD_IB_FN_MOD,Issuing Functionality Modification Register" bitfld.long 0x00 1. " FN_MOD[1] ,Write issuing, write_iss_override" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Read issuing, read_iss_override" "Disabled,Enabled" line.long 0x04 "DAP_INTLPD_IB_QOS_CNTL,QoS Control Register" bitfld.long 0x04 7. " EN_AWAR_OT ,Enable combined regulation of outstanding transactions" "Disabled,Enabled" bitfld.long 0x04 6. " EN_AR_OT ,Enable regulation of outstanding read transactions" "Disabled,Enabled" bitfld.long 0x04 5. " EN_AW_OT ,Enable regulation of outstanding write transactions" "Disabled,Enabled" bitfld.long 0x04 2. " EN_AWAR_RATE ,Enable combined AW/AR rate regulation" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " EN_AR_RATE ,Enable AR rate regulation" "Disabled,Enabled" bitfld.long 0x04 0. " EN_AW_RATE ,Enable AW rate regulation" "Disabled,Enabled" line.long 0x08 "DAP_INTLPD_IB_MAX_OT,Maximum Number Of Outstanding Transactions Register" bitfld.long 0x08 24.--29. " AR_MAX_OTI ,Integer part of max outstanding AR addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 16.--23. 1. " AR_MAX_OTF ,Fraction part of max outstanding AR addresses" bitfld.long 0x08 8.--13. " AW_MAX_OTI ,Integer part of max outstanding AW addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 0.--7. 1. " AW_MAX_OTF ,Fraction part of max outstanding AW addresses" line.long 0x0C "DAP_INTLPD_IB_MAX_COMB_OT,Maximum Number Of Combined Outstanding Transactions Register" hexmask.long.byte 0x0C 8.--14. 1. " AWAR_MAX_OTI ,Integer part of max combined outstanding AW/AR addresses" hexmask.long.byte 0x0C 0.--7. 1. " AWAR_MAX_OTF ,Fraction part of max combined outstanding AW/AR addresses" line.long 0x10 "DAP_INTLPD_IB_AW_P,AW Channel Peak Rate Register" hexmask.long.byte 0x10 24.--31. 1. " AW_P ,Channel peak rate" line.long 0x14 "DAP_INTLPD_IB_AW_B,AW Channel Burstiness Allowance Register" hexmask.long.word 0x14 0.--15. 1. " AW_B ,Channel burstiness integer number of transfers" line.long 0x18 "DAP_INTLPD_IB_AW_R,AW Channel Average Rate Register" hexmask.long.word 0x18 20.--31. 1. " AW_R ,Channel average rate" line.long 0x1C "DAP_INTLPD_IB_AR_P,AR Channel Peak Rate Register" hexmask.long.byte 0x1C 24.--31. 1. " AR_P ,Channel peak rate" line.long 0x20 "DAP_INTLPD_IB_AR_B,AR Channel Burstiness Allowance Register" hexmask.long.word 0x20 0.--15. 1. " AR_B ,Channel burstiness" line.long 0x24 "DAP_INTLPD_IB_AR_R,AR Channel Average Rate" hexmask.long.word 0x24 20.--31. 1. " AR_R ,Channel average rate" group.long (0x48000+0x100)++0x07 line.long 0x00 "USB0M_INTLPD_IB_READ_QOS,Read Channel QoS Value Register" bitfld.long 0x00 0.--3. " AR_QOS ,Read channel QoS value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "USB0M_INTLPD_IB_WRITE_QOS,Write Channel QoS Value Register" bitfld.long 0x04 0.--3. " AW_QOS ,Write channel QoS value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long (0x48000+0x108)++0x27 line.long 0x00 "USB0M_INTLPD_IB_FN_MOD,Issuing Functionality Modification Register" bitfld.long 0x00 1. " FN_MOD[1] ,Write issuing, write_iss_override" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Read issuing, read_iss_override" "Disabled,Enabled" line.long 0x04 "USB0M_INTLPD_IB_QOS_CNTL,QoS Control Register" bitfld.long 0x04 7. " EN_AWAR_OT ,Enable combined regulation of outstanding transactions" "Disabled,Enabled" bitfld.long 0x04 6. " EN_AR_OT ,Enable regulation of outstanding read transactions" "Disabled,Enabled" bitfld.long 0x04 5. " EN_AW_OT ,Enable regulation of outstanding write transactions" "Disabled,Enabled" bitfld.long 0x04 2. " EN_AWAR_RATE ,Enable combined AW/AR rate regulation" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " EN_AR_RATE ,Enable AR rate regulation" "Disabled,Enabled" bitfld.long 0x04 0. " EN_AW_RATE ,Enable AW rate regulation" "Disabled,Enabled" line.long 0x08 "USB0M_INTLPD_IB_MAX_OT,Maximum Number Of Outstanding Transactions Register" bitfld.long 0x08 24.--29. " AR_MAX_OTI ,Integer part of max outstanding AR addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 16.--23. 1. " AR_MAX_OTF ,Fraction part of max outstanding AR addresses" bitfld.long 0x08 8.--13. " AW_MAX_OTI ,Integer part of max outstanding AW addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 0.--7. 1. " AW_MAX_OTF ,Fraction part of max outstanding AW addresses" line.long 0x0C "USB0M_INTLPD_IB_MAX_COMB_OT,Maximum Number Of Combined Outstanding Transactions Register" hexmask.long.byte 0x0C 8.--14. 1. " AWAR_MAX_OTI ,Integer part of max combined outstanding AW/AR addresses" hexmask.long.byte 0x0C 0.--7. 1. " AWAR_MAX_OTF ,Fraction part of max combined outstanding AW/AR addresses" line.long 0x10 "USB0M_INTLPD_IB_AW_P,AW Channel Peak Rate Register" hexmask.long.byte 0x10 24.--31. 1. " AW_P ,Channel peak rate" line.long 0x14 "USB0M_INTLPD_IB_AW_B,AW Channel Burstiness Allowance Register" hexmask.long.word 0x14 0.--15. 1. " AW_B ,Channel burstiness integer number of transfers" line.long 0x18 "USB0M_INTLPD_IB_AW_R,AW Channel Average Rate Register" hexmask.long.word 0x18 20.--31. 1. " AW_R ,Channel average rate" line.long 0x1C "USB0M_INTLPD_IB_AR_P,AR Channel Peak Rate Register" hexmask.long.byte 0x1C 24.--31. 1. " AR_P ,Channel peak rate" line.long 0x20 "USB0M_INTLPD_IB_AR_B,AR Channel Burstiness Allowance Register" hexmask.long.word 0x20 0.--15. 1. " AR_B ,Channel burstiness" line.long 0x24 "USB0M_INTLPD_IB_AR_R,AR Channel Average Rate" hexmask.long.word 0x24 20.--31. 1. " AR_R ,Channel average rate" group.long (0x49000+0x100)++0x07 line.long 0x00 "USB1M_INTLPD_IB_READ_QOS,Read Channel QoS Value Register" bitfld.long 0x00 0.--3. " AR_QOS ,Read channel QoS value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "USB1M_INTLPD_IB_WRITE_QOS,Write Channel QoS Value Register" bitfld.long 0x04 0.--3. " AW_QOS ,Write channel QoS value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long (0x49000+0x108)++0x27 line.long 0x00 "USB1M_INTLPD_IB_FN_MOD,Issuing Functionality Modification Register" bitfld.long 0x00 1. " FN_MOD[1] ,Write issuing, write_iss_override" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Read issuing, read_iss_override" "Disabled,Enabled" line.long 0x04 "USB1M_INTLPD_IB_QOS_CNTL,QoS Control Register" bitfld.long 0x04 7. " EN_AWAR_OT ,Enable combined regulation of outstanding transactions" "Disabled,Enabled" bitfld.long 0x04 6. " EN_AR_OT ,Enable regulation of outstanding read transactions" "Disabled,Enabled" bitfld.long 0x04 5. " EN_AW_OT ,Enable regulation of outstanding write transactions" "Disabled,Enabled" bitfld.long 0x04 2. " EN_AWAR_RATE ,Enable combined AW/AR rate regulation" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " EN_AR_RATE ,Enable AR rate regulation" "Disabled,Enabled" bitfld.long 0x04 0. " EN_AW_RATE ,Enable AW rate regulation" "Disabled,Enabled" line.long 0x08 "USB1M_INTLPD_IB_MAX_OT,Maximum Number Of Outstanding Transactions Register" bitfld.long 0x08 24.--29. " AR_MAX_OTI ,Integer part of max outstanding AR addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 16.--23. 1. " AR_MAX_OTF ,Fraction part of max outstanding AR addresses" bitfld.long 0x08 8.--13. " AW_MAX_OTI ,Integer part of max outstanding AW addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 0.--7. 1. " AW_MAX_OTF ,Fraction part of max outstanding AW addresses" line.long 0x0C "USB1M_INTLPD_IB_MAX_COMB_OT,Maximum Number Of Combined Outstanding Transactions Register" hexmask.long.byte 0x0C 8.--14. 1. " AWAR_MAX_OTI ,Integer part of max combined outstanding AW/AR addresses" hexmask.long.byte 0x0C 0.--7. 1. " AWAR_MAX_OTF ,Fraction part of max combined outstanding AW/AR addresses" line.long 0x10 "USB1M_INTLPD_IB_AW_P,AW Channel Peak Rate Register" hexmask.long.byte 0x10 24.--31. 1. " AW_P ,Channel peak rate" line.long 0x14 "USB1M_INTLPD_IB_AW_B,AW Channel Burstiness Allowance Register" hexmask.long.word 0x14 0.--15. 1. " AW_B ,Channel burstiness integer number of transfers" line.long 0x18 "USB1M_INTLPD_IB_AW_R,AW Channel Average Rate Register" hexmask.long.word 0x18 20.--31. 1. " AW_R ,Channel average rate" line.long 0x1C "USB1M_INTLPD_IB_AR_P,AR Channel Peak Rate Register" hexmask.long.byte 0x1C 24.--31. 1. " AR_P ,Channel peak rate" line.long 0x20 "USB1M_INTLPD_IB_AR_B,AR Channel Burstiness Allowance Register" hexmask.long.word 0x20 0.--15. 1. " AR_B ,Channel burstiness" line.long 0x24 "USB1M_INTLPD_IB_AR_R,AR Channel Average Rate" hexmask.long.word 0x24 20.--31. 1. " AR_R ,Channel average rate" group.long (0x4A000+0x108)++0x27 line.long 0x00 "INTIOU_INTLPD_IB_FN_MOD,Issuing Functionality Modification Register" bitfld.long 0x00 1. " FN_MOD[1] ,Write issuing, write_iss_override" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Read issuing, read_iss_override" "Disabled,Enabled" line.long 0x04 "INTIOU_INTLPD_IB_QOS_CNTL,QoS Control Register" bitfld.long 0x04 7. " EN_AWAR_OT ,Enable combined regulation of outstanding transactions" "Disabled,Enabled" bitfld.long 0x04 6. " EN_AR_OT ,Enable regulation of outstanding read transactions" "Disabled,Enabled" bitfld.long 0x04 5. " EN_AW_OT ,Enable regulation of outstanding write transactions" "Disabled,Enabled" bitfld.long 0x04 2. " EN_AWAR_RATE ,Enable combined AW/AR rate regulation" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " EN_AR_RATE ,Enable AR rate regulation" "Disabled,Enabled" bitfld.long 0x04 0. " EN_AW_RATE ,Enable AW rate regulation" "Disabled,Enabled" line.long 0x08 "INTIOU_INTLPD_IB_MAX_OT,Maximum Number Of Outstanding Transactions Register" bitfld.long 0x08 24.--29. " AR_MAX_OTI ,Integer part of max outstanding AR addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 16.--23. 1. " AR_MAX_OTF ,Fraction part of max outstanding AR addresses" bitfld.long 0x08 8.--13. " AW_MAX_OTI ,Integer part of max outstanding AW addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 0.--7. 1. " AW_MAX_OTF ,Fraction part of max outstanding AW addresses" line.long 0x0C "INTIOU_INTLPD_IB_MAX_COMB_OT,Maximum Number Of Combined Outstanding Transactions Register" hexmask.long.byte 0x0C 8.--14. 1. " AWAR_MAX_OTI ,Integer part of max combined outstanding AW/AR addresses" hexmask.long.byte 0x0C 0.--7. 1. " AWAR_MAX_OTF ,Fraction part of max combined outstanding AW/AR addresses" line.long 0x10 "INTIOU_INTLPD_IB_AW_P,AW Channel Peak Rate Register" hexmask.long.byte 0x10 24.--31. 1. " AW_P ,Channel peak rate" line.long 0x14 "INTIOU_INTLPD_IB_AW_B,AW Channel Burstiness Allowance Register" hexmask.long.word 0x14 0.--15. 1. " AW_B ,Channel burstiness integer number of transfers" line.long 0x18 "INTIOU_INTLPD_IB_AW_R,AW Channel Average Rate Register" hexmask.long.word 0x18 20.--31. 1. " AW_R ,Channel average rate" line.long 0x1C "INTIOU_INTLPD_IB_AR_P,AR Channel Peak Rate Register" hexmask.long.byte 0x1C 24.--31. 1. " AR_P ,Channel peak rate" line.long 0x20 "INTIOU_INTLPD_IB_AR_B,AR Channel Burstiness Allowance Register" hexmask.long.word 0x20 0.--15. 1. " AR_B ,Channel burstiness" line.long 0x24 "INTIOU_INTLPD_IB_AR_R,AR Channel Average Rate" hexmask.long.word 0x24 20.--31. 1. " AR_R ,Channel average rate" group.long (0x4B000+0x108)++0x27 line.long 0x00 "INTCSUPMU_INTLPD_IB_FN_MOD,Issuing Functionality Modification Register" bitfld.long 0x00 1. " FN_MOD[1] ,Write issuing, write_iss_override" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Read issuing, read_iss_override" "Disabled,Enabled" line.long 0x04 "INTCSUPMU_INTLPD_IB_QOS_CNTL,QoS Control Register" bitfld.long 0x04 7. " EN_AWAR_OT ,Enable combined regulation of outstanding transactions" "Disabled,Enabled" bitfld.long 0x04 6. " EN_AR_OT ,Enable regulation of outstanding read transactions" "Disabled,Enabled" bitfld.long 0x04 5. " EN_AW_OT ,Enable regulation of outstanding write transactions" "Disabled,Enabled" bitfld.long 0x04 2. " EN_AWAR_RATE ,Enable combined AW/AR rate regulation" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " EN_AR_RATE ,Enable AR rate regulation" "Disabled,Enabled" bitfld.long 0x04 0. " EN_AW_RATE ,Enable AW rate regulation" "Disabled,Enabled" line.long 0x08 "INTCSUPMU_INTLPD_IB_MAX_OT,Maximum Number Of Outstanding Transactions Register" bitfld.long 0x08 24.--29. " AR_MAX_OTI ,Integer part of max outstanding AR addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 16.--23. 1. " AR_MAX_OTF ,Fraction part of max outstanding AR addresses" bitfld.long 0x08 8.--13. " AW_MAX_OTI ,Integer part of max outstanding AW addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 0.--7. 1. " AW_MAX_OTF ,Fraction part of max outstanding AW addresses" line.long 0x0C "INTCSUPMU_INTLPD_IB_MAX_COMB_OT,Maximum Number Of Combined Outstanding Transactions Register" hexmask.long.byte 0x0C 8.--14. 1. " AWAR_MAX_OTI ,Integer part of max combined outstanding AW/AR addresses" hexmask.long.byte 0x0C 0.--7. 1. " AWAR_MAX_OTF ,Fraction part of max combined outstanding AW/AR addresses" line.long 0x10 "INTCSUPMU_INTLPD_IB_AW_P,AW Channel Peak Rate Register" hexmask.long.byte 0x10 24.--31. 1. " AW_P ,Channel peak rate" line.long 0x14 "INTCSUPMU_INTLPD_IB_AW_B,AW Channel Burstiness Allowance Register" hexmask.long.word 0x14 0.--15. 1. " AW_B ,Channel burstiness integer number of transfers" line.long 0x18 "INTCSUPMU_INTLPD_IB_AW_R,AW Channel Average Rate Register" hexmask.long.word 0x18 20.--31. 1. " AW_R ,Channel average rate" line.long 0x1C "INTCSUPMU_INTLPD_IB_AR_P,AR Channel Peak Rate Register" hexmask.long.byte 0x1C 24.--31. 1. " AR_P ,Channel peak rate" line.long 0x20 "INTCSUPMU_INTLPD_IB_AR_B,AR Channel Burstiness Allowance Register" hexmask.long.word 0x20 0.--15. 1. " AR_B ,Channel burstiness" line.long 0x24 "INTCSUPMU_INTLPD_IB_AR_R,AR Channel Average Rate" hexmask.long.word 0x24 20.--31. 1. " AR_R ,Channel average rate" group.long (0x4C000+0x108)++0x27 line.long 0x00 "INTLPDINBOUND_INTLPDMAIN_FN_MOD,Issuing Functionality Modification Register" bitfld.long 0x00 1. " FN_MOD[1] ,Write issuing, write_iss_override" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Read issuing, read_iss_override" "Disabled,Enabled" line.long 0x04 "INTLPDINBOUND_INTLPDMAIN_QOS_CNTL,QoS Control Register" bitfld.long 0x04 7. " EN_AWAR_OT ,Enable combined regulation of outstanding transactions" "Disabled,Enabled" bitfld.long 0x04 6. " EN_AR_OT ,Enable regulation of outstanding read transactions" "Disabled,Enabled" bitfld.long 0x04 5. " EN_AW_OT ,Enable regulation of outstanding write transactions" "Disabled,Enabled" bitfld.long 0x04 2. " EN_AWAR_RATE ,Enable combined AW/AR rate regulation" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " EN_AR_RATE ,Enable AR rate regulation" "Disabled,Enabled" bitfld.long 0x04 0. " EN_AW_RATE ,Enable AW rate regulation" "Disabled,Enabled" line.long 0x08 "INTLPDINBOUND_INTLPDMAIN_MAX_OT,Maximum Number Of Outstanding Transactions Register" bitfld.long 0x08 24.--29. " AR_MAX_OTI ,Integer part of max outstanding AR addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 16.--23. 1. " AR_MAX_OTF ,Fraction part of max outstanding AR addresses" bitfld.long 0x08 8.--13. " AW_MAX_OTI ,Integer part of max outstanding AW addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 0.--7. 1. " AW_MAX_OTF ,Fraction part of max outstanding AW addresses" line.long 0x0C "INTLPDINBOUND_INTLPDMAIN_MAX_COMB_OT,Maximum Number Of Combined Outstanding Transactions Register" hexmask.long.byte 0x0C 8.--14. 1. " AWAR_MAX_OTI ,Integer part of max combined outstanding AW/AR addresses" hexmask.long.byte 0x0C 0.--7. 1. " AWAR_MAX_OTF ,Fraction part of max combined outstanding AW/AR addresses" line.long 0x10 "INTLPDINBOUND_INTLPDMAIN_AW_P,AW Channel Peak Rate Register" hexmask.long.byte 0x10 24.--31. 1. " AW_P ,Channel peak rate" line.long 0x14 "INTLPDINBOUND_INTLPDMAIN_AW_B,AW Channel Burstiness Allowance Register" hexmask.long.word 0x14 0.--15. 1. " AW_B ,Channel burstiness integer number of transfers" line.long 0x18 "INTLPDINBOUND_INTLPDMAIN_AW_R,AW Channel Average Rate Register" hexmask.long.word 0x18 20.--31. 1. " AW_R ,Channel average rate" line.long 0x1C "INTLPDINBOUND_INTLPDMAIN_AR_P,AR Channel Peak Rate Register" hexmask.long.byte 0x1C 24.--31. 1. " AR_P ,Channel peak rate" line.long 0x20 "INTLPDINBOUND_INTLPDMAIN_AR_B,AR Channel Burstiness Allowance Register" hexmask.long.word 0x20 0.--15. 1. " AR_B ,Channel burstiness" line.long 0x24 "INTLPDINBOUND_INTLPDMAIN_AR_R,AR Channel Average Rate" hexmask.long.word 0x24 20.--31. 1. " AR_R ,Channel average rate" group.long (0x4D000+0x108)++0x27 line.long 0x00 "INTFPD_INTLPDOCM_FN_MOD,Issuing Functionality Modification Register" bitfld.long 0x00 1. " FN_MOD[1] ,Write issuing, write_iss_override" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Read issuing, read_iss_override" "Disabled,Enabled" line.long 0x04 "INTFPD_INTLPDOCM_QOS_CNTL,QoS Control Register" bitfld.long 0x04 7. " EN_AWAR_OT ,Enable combined regulation of outstanding transactions" "Disabled,Enabled" bitfld.long 0x04 6. " EN_AR_OT ,Enable regulation of outstanding read transactions" "Disabled,Enabled" bitfld.long 0x04 5. " EN_AW_OT ,Enable regulation of outstanding write transactions" "Disabled,Enabled" bitfld.long 0x04 2. " EN_AWAR_RATE ,Enable combined AW/AR rate regulation" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " EN_AR_RATE ,Enable AR rate regulation" "Disabled,Enabled" bitfld.long 0x04 0. " EN_AW_RATE ,Enable AW rate regulation" "Disabled,Enabled" line.long 0x08 "INTFPD_INTLPDOCM_MAX_OT,Maximum Number Of Outstanding Transactions Register" bitfld.long 0x08 24.--29. " AR_MAX_OTI ,Integer part of max outstanding AR addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 16.--23. 1. " AR_MAX_OTF ,Fraction part of max outstanding AR addresses" bitfld.long 0x08 8.--13. " AW_MAX_OTI ,Integer part of max outstanding AW addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 0.--7. 1. " AW_MAX_OTF ,Fraction part of max outstanding AW addresses" line.long 0x0C "INTFPD_INTLPDOCM_MAX_COMB_OT,Maximum Number Of Combined Outstanding Transactions Register" hexmask.long.byte 0x0C 8.--14. 1. " AWAR_MAX_OTI ,Integer part of max combined outstanding AW/AR addresses" hexmask.long.byte 0x0C 0.--7. 1. " AWAR_MAX_OTF ,Fraction part of max combined outstanding AW/AR addresses" line.long 0x10 "INTFPD_INTLPDOCM_AW_P,AW Channel Peak Rate Register" hexmask.long.byte 0x10 24.--31. 1. " AW_P ,Channel peak rate" line.long 0x14 "INTFPD_INTLPDOCM_AW_B,AW Channel Burstiness Allowance Register" hexmask.long.word 0x14 0.--15. 1. " AW_B ,Channel burstiness integer number of transfers" line.long 0x18 "INTFPD_INTLPDOCM_AW_R,AW Channel Average Rate Register" hexmask.long.word 0x18 20.--31. 1. " AW_R ,Channel average rate" line.long 0x1C "INTFPD_INTLPDOCM_AR_P,AR Channel Peak Rate Register" hexmask.long.byte 0x1C 24.--31. 1. " AR_P ,Channel peak rate" line.long 0x20 "INTFPD_INTLPDOCM_AR_B,AR Channel Burstiness Allowance Register" hexmask.long.word 0x20 0.--15. 1. " AR_B ,Channel burstiness" line.long 0x24 "INTFPD_INTLPDOCM_AR_R,AR Channel Average Rate" hexmask.long.word 0x24 20.--31. 1. " AR_R ,Channel average rate" group.long (0xC2000+0x08)++0x03 line.long 0x00 "IB9_MOD_ISS_BM,Bus Matrix Issuing Functionality Modification Register" bitfld.long 0x00 0.--1. " FN_MOD_ISS_BM ,Bus matrix issuing functionality modification" "0,1,2,3" group.long (0xC2000+0x108)++0x03 line.long 0x00 "IB9_FN_MOD,Issuing Functionality Modification Register" bitfld.long 0x00 1. " FN_MOD[1] ,Write issuing, write_iss_override" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Read issuing, read_iss_override" "Disabled,Enabled" group.long (0xC3000+0x08)++0x03 line.long 0x00 "IB5_MOD_ISS_BM,Bus Matrix Issuing Functionality Modification Register" bitfld.long 0x00 0.--1. " FN_MOD_ISS_BM ,Bus matrix issuing functionality modification" "0,1,2,3" group.long (0xC3000+0x24)++0x03 line.long 0x00 "IB5_FN_MOD2,Issuing Functionality Modification Register 2" bitfld.long 0x00 0. " BYPASS_MERGE ,Do not alter any transactions that could pass through legally without alteration" "No bypass,Bypass" group.long (0xC3000+0x108)++0x27 line.long 0x00 "IB5_FN_MOD,Issuing Functionality Modification Register" bitfld.long 0x00 1. " FN_MOD[1] ,Write issuing, write_iss_override" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Read issuing, read_iss_override" "Disabled,Enabled" line.long 0x04 "IB5_QOS_CNTL,QoS Control Register" bitfld.long 0x04 7. " EN_AWAR_OT ,Enable combined regulation of outstanding transactions" "Disabled,Enabled" bitfld.long 0x04 6. " EN_AR_OT ,Enable regulation of outstanding read transactions" "Disabled,Enabled" bitfld.long 0x04 5. " EN_AW_OT ,Enable regulation of outstanding write transactions" "Disabled,Enabled" bitfld.long 0x04 2. " EN_AWAR_RATE ,Enable combined AW/AR rate regulation" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " EN_AR_RATE ,Enable AR rate regulation" "Disabled,Enabled" bitfld.long 0x04 0. " EN_AW_RATE ,Enable AW rate regulation" "Disabled,Enabled" line.long 0x08 "IB5_MAX_OT,Maximum Number Of Outstanding Transactions Register" bitfld.long 0x08 24.--29. " AR_MAX_OTI ,Integer part of max outstanding AR addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 16.--23. 1. " AR_MAX_OTF ,Fraction part of max outstanding AR addresses" bitfld.long 0x08 8.--13. " AW_MAX_OTI ,Integer part of max outstanding AW addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 0.--7. 1. " AW_MAX_OTF ,Fraction part of max outstanding AW addresses" line.long 0x0C "IB5_MAX_COMB_OT,Maximum Number Of Combined Outstanding Transactions Register" hexmask.long.byte 0x0C 8.--14. 1. " AWAR_MAX_OTI ,Integer part of max combined outstanding AW/AR addresses" hexmask.long.byte 0x0C 0.--7. 1. " AWAR_MAX_OTF ,Fraction part of max combined outstanding AW/AR addresses" line.long 0x10 "IB5_AW_P,AW Channel Peak Rate Register" hexmask.long.byte 0x10 24.--31. 1. " AW_P ,Channel peak rate" line.long 0x14 "IB5_AW_B,AW Channel Burstiness Allowance Register" hexmask.long.word 0x14 0.--15. 1. " AW_B ,Channel burstiness integer number of transfers" line.long 0x18 "IB5_AW_R,AW Channel Average Rate Register" hexmask.long.word 0x18 20.--31. 1. " AW_R ,Channel average rate" line.long 0x1C "IB5_AR_P,AR Channel Peak Rate Register" hexmask.long.byte 0x1C 24.--31. 1. " AR_P ,Channel peak rate" line.long 0x20 "IB5_AR_B,AR Channel Burstiness Allowance Register" hexmask.long.word 0x20 0.--15. 1. " AR_B ,Channel burstiness" line.long 0x24 "IB5_AR_R,AR Channel Average Rate" hexmask.long.word 0x24 20.--31. 1. " AR_R ,Channel average rate" group.long (0xC4000+0x08)++0x03 line.long 0x00 "IB6_MOD_ISS_BM,Bus Matrix Issuing Functionality Modification Register" bitfld.long 0x00 0.--1. " FN_MOD_ISS_BM ,Bus matrix issuing functionality modification" "0,1,2,3" group.long (0xC4000+0x24)++0x03 line.long 0x00 "IB6_FN_MOD2,Issuing Functionality Modification Register 2" bitfld.long 0x00 0. " BYPASS_MERGE ,Do not alter any transactions that could pass through legally without alteration" "No bypass,Bypass" group.long (0xC4000+0x108)++0x27 line.long 0x00 "IB6_FN_MOD,Issuing Functionality Modification Register" bitfld.long 0x00 1. " FN_MOD[1] ,Write issuing, write_iss_override" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Read issuing, read_iss_override" "Disabled,Enabled" line.long 0x04 "IB6_QOS_CNTL,QoS Control Register" bitfld.long 0x04 7. " EN_AWAR_OT ,Enable combined regulation of outstanding transactions" "Disabled,Enabled" bitfld.long 0x04 6. " EN_AR_OT ,Enable regulation of outstanding read transactions" "Disabled,Enabled" bitfld.long 0x04 5. " EN_AW_OT ,Enable regulation of outstanding write transactions" "Disabled,Enabled" bitfld.long 0x04 2. " EN_AWAR_RATE ,Enable combined AW/AR rate regulation" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " EN_AR_RATE ,Enable AR rate regulation" "Disabled,Enabled" bitfld.long 0x04 0. " EN_AW_RATE ,Enable AW rate regulation" "Disabled,Enabled" line.long 0x08 "IB6_MAX_OT,Maximum Number Of Outstanding Transactions Register" bitfld.long 0x08 24.--29. " AR_MAX_OTI ,Integer part of max outstanding AR addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 16.--23. 1. " AR_MAX_OTF ,Fraction part of max outstanding AR addresses" bitfld.long 0x08 8.--13. " AW_MAX_OTI ,Integer part of max outstanding AW addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 0.--7. 1. " AW_MAX_OTF ,Fraction part of max outstanding AW addresses" line.long 0x0C "IB6_MAX_COMB_OT,Maximum Number Of Combined Outstanding Transactions Register" hexmask.long.byte 0x0C 8.--14. 1. " AWAR_MAX_OTI ,Integer part of max combined outstanding AW/AR addresses" hexmask.long.byte 0x0C 0.--7. 1. " AWAR_MAX_OTF ,Fraction part of max combined outstanding AW/AR addresses" line.long 0x10 "IB6_AW_P,AW Channel Peak Rate Register" hexmask.long.byte 0x10 24.--31. 1. " AW_P ,Channel peak rate" line.long 0x14 "IB6_AW_B,AW Channel Burstiness Allowance Register" hexmask.long.word 0x14 0.--15. 1. " AW_B ,Channel burstiness integer number of transfers" line.long 0x18 "IB6_AW_R,AW Channel Average Rate Register" hexmask.long.word 0x18 20.--31. 1. " AW_R ,Channel average rate" line.long 0x1C "IB6_AR_P,AR Channel Peak Rate Register" hexmask.long.byte 0x1C 24.--31. 1. " AR_P ,Channel peak rate" line.long 0x20 "IB6_AR_B,AR Channel Burstiness Allowance Register" hexmask.long.word 0x20 0.--15. 1. " AR_B ,Channel burstiness" line.long 0x24 "IB6_AR_R,AR Channel Average Rate" hexmask.long.word 0x24 20.--31. 1. " AR_R ,Channel average rate" group.long (0xC5000+0x08)++0x03 line.long 0x00 "IB8_MOD_ISS_BM,Bus Matrix Issuing Functionality Modification Register" bitfld.long 0x00 0.--1. " FN_MOD_ISS_BM ,Bus matrix issuing functionality modification" "0,1,2,3" group.long (0xC5000+0x24)++0x03 line.long 0x00 "IB8_FN_MOD2,Issuing Functionality Modification Register 2" bitfld.long 0x00 0. " BYPASS_MERGE ,Do not alter any transactions that could pass through legally without alteration" "No bypass,Bypass" group.long (0xC5000+0x108)++0x27 line.long 0x00 "IB8_FN_MOD,Issuing Functionality Modification Register" bitfld.long 0x00 1. " FN_MOD[1] ,Write issuing, write_iss_override" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Read issuing, read_iss_override" "Disabled,Enabled" line.long 0x04 "IB8_QOS_CNTL,QoS Control Register" bitfld.long 0x04 7. " EN_AWAR_OT ,Enable combined regulation of outstanding transactions" "Disabled,Enabled" bitfld.long 0x04 6. " EN_AR_OT ,Enable regulation of outstanding read transactions" "Disabled,Enabled" bitfld.long 0x04 5. " EN_AW_OT ,Enable regulation of outstanding write transactions" "Disabled,Enabled" bitfld.long 0x04 2. " EN_AWAR_RATE ,Enable combined AW/AR rate regulation" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " EN_AR_RATE ,Enable AR rate regulation" "Disabled,Enabled" bitfld.long 0x04 0. " EN_AW_RATE ,Enable AW rate regulation" "Disabled,Enabled" line.long 0x08 "IB8_MAX_OT,Maximum Number Of Outstanding Transactions Register" bitfld.long 0x08 24.--29. " AR_MAX_OTI ,Integer part of max outstanding AR addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 16.--23. 1. " AR_MAX_OTF ,Fraction part of max outstanding AR addresses" bitfld.long 0x08 8.--13. " AW_MAX_OTI ,Integer part of max outstanding AW addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 0.--7. 1. " AW_MAX_OTF ,Fraction part of max outstanding AW addresses" line.long 0x0C "IB8_MAX_COMB_OT,Maximum Number Of Combined Outstanding Transactions Register" hexmask.long.byte 0x0C 8.--14. 1. " AWAR_MAX_OTI ,Integer part of max combined outstanding AW/AR addresses" hexmask.long.byte 0x0C 0.--7. 1. " AWAR_MAX_OTF ,Fraction part of max combined outstanding AW/AR addresses" line.long 0x10 "IB8_AW_P,AW Channel Peak Rate Register" hexmask.long.byte 0x10 24.--31. 1. " AW_P ,Channel peak rate" line.long 0x14 "IB8_AW_B,AW Channel Burstiness Allowance Register" hexmask.long.word 0x14 0.--15. 1. " AW_B ,Channel burstiness integer number of transfers" line.long 0x18 "IB8_AW_R,AW Channel Average Rate Register" hexmask.long.word 0x18 20.--31. 1. " AW_R ,Channel average rate" line.long 0x1C "IB8_AR_P,AR Channel Peak Rate Register" hexmask.long.byte 0x1C 24.--31. 1. " AR_P ,Channel peak rate" line.long 0x20 "IB8_AR_B,AR Channel Burstiness Allowance Register" hexmask.long.word 0x20 0.--15. 1. " AR_B ,Channel burstiness" line.long 0x24 "IB8_AR_R,AR Channel Average Rate" hexmask.long.word 0x24 20.--31. 1. " AR_R ,Channel average rate" group.long (0xC6000+0x08)++0x03 line.long 0x00 "IB0_MOD_ISS_BM,Bus Matrix Issuing Functionality Modification Register" bitfld.long 0x00 0.--1. " FN_MOD_ISS_BM ,Bus matrix issuing functionality modification" "0,1,2,3" group.long (0xC6000+0x24)++0x03 line.long 0x00 "IB0_FN_MOD2,Issuing Functionality Modification Register 2" bitfld.long 0x00 0. " BYPASS_MERGE ,Do not alter any transactions that could pass through legally without alteration" "No bypass,Bypass" group.long (0xC6000+0x108)++0x27 line.long 0x00 "IB0_FN_MOD,Issuing Functionality Modification Register" bitfld.long 0x00 1. " FN_MOD[1] ,Write issuing, write_iss_override" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Read issuing, read_iss_override" "Disabled,Enabled" line.long 0x04 "IB0_QOS_CNTL,QoS Control Register" bitfld.long 0x04 7. " EN_AWAR_OT ,Enable combined regulation of outstanding transactions" "Disabled,Enabled" bitfld.long 0x04 6. " EN_AR_OT ,Enable regulation of outstanding read transactions" "Disabled,Enabled" bitfld.long 0x04 5. " EN_AW_OT ,Enable regulation of outstanding write transactions" "Disabled,Enabled" bitfld.long 0x04 2. " EN_AWAR_RATE ,Enable combined AW/AR rate regulation" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " EN_AR_RATE ,Enable AR rate regulation" "Disabled,Enabled" bitfld.long 0x04 0. " EN_AW_RATE ,Enable AW rate regulation" "Disabled,Enabled" line.long 0x08 "IB0_MAX_OT,Maximum Number Of Outstanding Transactions Register" bitfld.long 0x08 24.--29. " AR_MAX_OTI ,Integer part of max outstanding AR addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 16.--23. 1. " AR_MAX_OTF ,Fraction part of max outstanding AR addresses" bitfld.long 0x08 8.--13. " AW_MAX_OTI ,Integer part of max outstanding AW addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 0.--7. 1. " AW_MAX_OTF ,Fraction part of max outstanding AW addresses" line.long 0x0C "IB0_MAX_COMB_OT,Maximum Number Of Combined Outstanding Transactions Register" hexmask.long.byte 0x0C 8.--14. 1. " AWAR_MAX_OTI ,Integer part of max combined outstanding AW/AR addresses" hexmask.long.byte 0x0C 0.--7. 1. " AWAR_MAX_OTF ,Fraction part of max combined outstanding AW/AR addresses" line.long 0x10 "IB0_AW_P,AW Channel Peak Rate Register" hexmask.long.byte 0x10 24.--31. 1. " AW_P ,Channel peak rate" line.long 0x14 "IB0_AW_B,AW Channel Burstiness Allowance Register" hexmask.long.word 0x14 0.--15. 1. " AW_B ,Channel burstiness integer number of transfers" line.long 0x18 "IB0_AW_R,AW Channel Average Rate Register" hexmask.long.word 0x18 20.--31. 1. " AW_R ,Channel average rate" line.long 0x1C "IB0_AR_P,AR Channel Peak Rate Register" hexmask.long.byte 0x1C 24.--31. 1. " AR_P ,Channel peak rate" line.long 0x20 "IB0_AR_B,AR Channel Burstiness Allowance Register" hexmask.long.word 0x20 0.--15. 1. " AR_B ,Channel burstiness" line.long 0x24 "IB0_AR_R,AR Channel Average Rate" hexmask.long.word 0x24 20.--31. 1. " AR_R ,Channel average rate" group.long (0xC7000+0x08)++0x03 line.long 0x00 "IB11_MOD_ISS_BM,Bus Matrix Issuing Functionality Modification Register" bitfld.long 0x00 0.--1. " FN_MOD_ISS_BM ,Bus matrix issuing functionality modification" "0,1,2,3" group.long (0xC7000+0x24)++0x03 line.long 0x00 "IB11_FN_MOD2,Issuing Functionality Modification Register 2" bitfld.long 0x00 0. " BYPASS_MERGE ,Do not alter any transactions that could pass through legally without alteration" "No bypass,Bypass" group.long (0xC7000+0x108)++0x27 line.long 0x00 "IB11_FN_MOD,Issuing Functionality Modification Register" bitfld.long 0x00 1. " FN_MOD[1] ,Write issuing, write_iss_override" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Read issuing, read_iss_override" "Disabled,Enabled" line.long 0x04 "IB11_QOS_CNTL,QoS Control Register" bitfld.long 0x04 7. " EN_AWAR_OT ,Enable combined regulation of outstanding transactions" "Disabled,Enabled" bitfld.long 0x04 6. " EN_AR_OT ,Enable regulation of outstanding read transactions" "Disabled,Enabled" bitfld.long 0x04 5. " EN_AW_OT ,Enable regulation of outstanding write transactions" "Disabled,Enabled" bitfld.long 0x04 2. " EN_AWAR_RATE ,Enable combined AW/AR rate regulation" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " EN_AR_RATE ,Enable AR rate regulation" "Disabled,Enabled" bitfld.long 0x04 0. " EN_AW_RATE ,Enable AW rate regulation" "Disabled,Enabled" line.long 0x08 "IB11_MAX_OT,Maximum Number Of Outstanding Transactions Register" bitfld.long 0x08 24.--29. " AR_MAX_OTI ,Integer part of max outstanding AR addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 16.--23. 1. " AR_MAX_OTF ,Fraction part of max outstanding AR addresses" bitfld.long 0x08 8.--13. " AW_MAX_OTI ,Integer part of max outstanding AW addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 0.--7. 1. " AW_MAX_OTF ,Fraction part of max outstanding AW addresses" line.long 0x0C "IB11_MAX_COMB_OT,Maximum Number Of Combined Outstanding Transactions Register" hexmask.long.byte 0x0C 8.--14. 1. " AWAR_MAX_OTI ,Integer part of max combined outstanding AW/AR addresses" hexmask.long.byte 0x0C 0.--7. 1. " AWAR_MAX_OTF ,Fraction part of max combined outstanding AW/AR addresses" line.long 0x10 "IB11_AW_P,AW Channel Peak Rate Register" hexmask.long.byte 0x10 24.--31. 1. " AW_P ,Channel peak rate" line.long 0x14 "IB11_AW_B,AW Channel Burstiness Allowance Register" hexmask.long.word 0x14 0.--15. 1. " AW_B ,Channel burstiness integer number of transfers" line.long 0x18 "IB11_AW_R,AW Channel Average Rate Register" hexmask.long.word 0x18 20.--31. 1. " AW_R ,Channel average rate" line.long 0x1C "IB11_AR_P,AR Channel Peak Rate Register" hexmask.long.byte 0x1C 24.--31. 1. " AR_P ,Channel peak rate" line.long 0x20 "IB11_AR_B,AR Channel Burstiness Allowance Register" hexmask.long.word 0x20 0.--15. 1. " AR_B ,Channel burstiness" line.long 0x24 "IB11_AR_R,AR Channel Average Rate" hexmask.long.word 0x24 20.--31. 1. " AR_R ,Channel average rate" group.long (0xC8000+0x08)++0x03 line.long 0x00 "IB12_MOD_ISS_BM,Bus Matrix Issuing Functionality Modification Register" bitfld.long 0x00 0.--1. " FN_MOD_ISS_BM ,Bus matrix issuing functionality modification" "0,1,2,3" group.long (0xC8000+0x24)++0x03 line.long 0x00 "IB12_FN_MOD2,Issuing Functionality Modification Register 2" bitfld.long 0x00 0. " BYPASS_MERGE ,Do not alter any transactions that could pass through legally without alteration" "No bypass,Bypass" group.long (0xC8000+0x108)++0x27 line.long 0x00 "IB12_FN_MOD,Issuing Functionality Modification Register" bitfld.long 0x00 1. " FN_MOD[1] ,Write issuing, write_iss_override" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Read issuing, read_iss_override" "Disabled,Enabled" line.long 0x04 "IB12_QOS_CNTL,QoS Control Register" bitfld.long 0x04 7. " EN_AWAR_OT ,Enable combined regulation of outstanding transactions" "Disabled,Enabled" bitfld.long 0x04 6. " EN_AR_OT ,Enable regulation of outstanding read transactions" "Disabled,Enabled" bitfld.long 0x04 5. " EN_AW_OT ,Enable regulation of outstanding write transactions" "Disabled,Enabled" bitfld.long 0x04 2. " EN_AWAR_RATE ,Enable combined AW/AR rate regulation" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " EN_AR_RATE ,Enable AR rate regulation" "Disabled,Enabled" bitfld.long 0x04 0. " EN_AW_RATE ,Enable AW rate regulation" "Disabled,Enabled" line.long 0x08 "IB12_MAX_OT,Maximum Number Of Outstanding Transactions Register" bitfld.long 0x08 24.--29. " AR_MAX_OTI ,Integer part of max outstanding AR addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 16.--23. 1. " AR_MAX_OTF ,Fraction part of max outstanding AR addresses" bitfld.long 0x08 8.--13. " AW_MAX_OTI ,Integer part of max outstanding AW addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 0.--7. 1. " AW_MAX_OTF ,Fraction part of max outstanding AW addresses" line.long 0x0C "IB12_MAX_COMB_OT,Maximum Number Of Combined Outstanding Transactions Register" hexmask.long.byte 0x0C 8.--14. 1. " AWAR_MAX_OTI ,Integer part of max combined outstanding AW/AR addresses" hexmask.long.byte 0x0C 0.--7. 1. " AWAR_MAX_OTF ,Fraction part of max combined outstanding AW/AR addresses" line.long 0x10 "IB12_AW_P,AW Channel Peak Rate Register" hexmask.long.byte 0x10 24.--31. 1. " AW_P ,Channel peak rate" line.long 0x14 "IB12_AW_B,AW Channel Burstiness Allowance Register" hexmask.long.word 0x14 0.--15. 1. " AW_B ,Channel burstiness integer number of transfers" line.long 0x18 "IB12_AW_R,AW Channel Average Rate Register" hexmask.long.word 0x18 20.--31. 1. " AW_R ,Channel average rate" line.long 0x1C "IB12_AR_P,AR Channel Peak Rate Register" hexmask.long.byte 0x1C 24.--31. 1. " AR_P ,Channel peak rate" line.long 0x20 "IB12_AR_B,AR Channel Burstiness Allowance Register" hexmask.long.word 0x20 0.--15. 1. " AR_B ,Channel burstiness" line.long 0x24 "IB12_AR_R,AR Channel Average Rate" hexmask.long.word 0x24 20.--31. 1. " AR_R ,Channel average rate" width 0x0B tree.end tree "LPD_SLCR (Low Power Domain SLCR)" base ad:0xFF410000 width 27. group.byte 0x00++0x00 line.byte 0x00 "WPROT0,LP Domain SLCR Write Protection Register" bitfld.byte 0x00 0. " ACTIVE ,LP domain SLCR write protection" "Not protected,Protected" group.byte 0x04++0x00 line.byte 0x00 "CFG,General Control Register For The LP Domain SLCR" bitfld.byte 0x00 0. " SLVERR_ENABLE ,SLVERR enable/disable" "Disabled,Enabled" group.byte 0x08++0x00 line.byte 0x00 "ISR,Interrupt Status Register" eventfld.byte 0x00 0. " ADDR_DECODE_ERR ,Status for an address decode error" "No error,Error" group.byte 0x0C++0x00 line.byte 0x00 "IMR_SET/CLR,Interrupt Mask Register" setclrfld.byte 0x00 0. 0x08 0. 0x04 0. " ADDR_DECODE_ERR ,Mask for an address decode error" "Not masked,Masked" wgroup.byte 0x18++0x00 line.byte 0x00 "ITR,Interrupt Trigger Register" bitfld.byte 0x00 0. " ADDR_DECODE_ERR ,Trigger an address decode error interrupt" "No effect,Trigger" group.long 0x40++0x13 line.long 0x00 "SAFETY_CHK0,Safety Endpoint Connectivity Check Register" line.long 0x04 "SAFETY_CHK1,Safety Endpoint Connectivity Check Register" line.long 0x08 "SAFETY_CHK2,Safety Endpoint Connectivity Check Register" line.long 0x0C "SAFETY_CHK3,Safety Endpoint Connectivity Check Register" line.long 0x10 "CSUPMU_WDT_CLK_SEL,SWDT Clock Source Select Register" bitfld.long 0x10 0. " SELECT ,System watchdog timer clock source selection" "Internal,External" rgroup.byte 0x200C++0x00 line.byte 0x00 "ADMA_CFG,GDMA RF2 Configuration Register" bitfld.byte 0x00 5.--6. " BUS_WIDTH ,AXI bus width" "32-bit,64-bit,128-bit,256-bit" bitfld.byte 0x00 0.--4. " NUM_CH ,Number of implemented channels" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x3000++0x03 line.long 0x00 "ERR_AIBAXI_ISR,Interrupt Status Register" eventfld.long 0x00 28. " AFIFS2 ,AIB_AXI for AFIFS2" "No interrupt,Interrupt" eventfld.long 0x00 27. " LPD_DDR ,AIB_AXI for LPD to DDR path" "No interrupt,Interrupt" eventfld.long 0x00 26. " OCMS ,AIB_AXI for OCM" "No interrupt,Interrupt" eventfld.long 0x00 24. " FPD_MAIN ,AIB_AXI between LPD and FPD main" "No interrupt,Interrupt" textline " " eventfld.long 0x00 23. " USB1S ,AIB_AXI for USB1 slave" "No interrupt,Interrupt" eventfld.long 0x00 22. " USB0S ,AIB_AXI for USB0 slave" "No interrupt,Interrupt" eventfld.long 0x00 19. " RPUS1 ,AIB_AXI for RPU_1 slave" "No interrupt,Interrupt" eventfld.long 0x00 18. " RPUS0 ,AIB_AXI for RPU_0 slave" "No interrupt,Interrupt" textline " " eventfld.long 0x00 17. " RPUM1 ,AIB_AXI for RPU_1 master" "No interrupt,Interrupt" eventfld.long 0x00 16. " RPUM0 ,AIB_AXI for RPU_0 master" "No interrupt,Interrupt" eventfld.long 0x00 3. " FPD_OCM ,AIB_AXI for FPD to LPD OCM path" "No interrupt,Interrupt" eventfld.long 0x00 2. " FPD_LPDIBS ,AIB_AXI for FPD to LPD interconnect path" "No interrupt,Interrupt" textline " " eventfld.long 0x00 1. " AFIFS1 ,AIB_AXI for AFI_FS1 slave" "No interrupt,Interrupt" eventfld.long 0x00 0. " AFIFS0 ,AIB_AXI for AFI_FS0 slave" "No interrupt,Interrupt" group.long 0x3008++0x03 line.long 0x00 "ERR_AIBAXI_IMR_SET/CLR,Interrupt Mask Register" setclrfld.long 0x00 28. 0x10 28. 0x08 28. " AFIFS2 ,AIB_AXI for AFIFS2" "Not masked,Masked" setclrfld.long 0x00 27. 0x10 27. 0x08 27. " LPD_DDR ,AIB_AXI for LPD to DDR path" "Not masked,Masked" setclrfld.long 0x00 26. 0x10 26. 0x08 26. " OCMS ,AIB_AXI for OCM" "Not masked,Masked" setclrfld.long 0x00 24. 0x10 24. 0x08 24. " FPD_MAIN ,AIB_AXI between LPD and FPD main" "Not masked,Masked" textline " " setclrfld.long 0x00 23. 0x10 23. 0x08 23. " USB1S ,AIB_AXI for USB1 slave" "Not masked,Masked" setclrfld.long 0x00 22. 0x10 22. 0x08 22. " USB0S ,AIB_AXI for USB0 slave" "Not masked,Masked" setclrfld.long 0x00 19. 0x10 19. 0x08 19. " RPUS1 ,AIB_AXI for RPU_1 slave" "Not masked,Masked" setclrfld.long 0x00 18. 0x10 18. 0x08 18. " RPUS0 ,AIB_AXI for RPU_0 slave" "Not masked,Masked" textline " " setclrfld.long 0x00 17. 0x10 17. 0x08 17. " RPUM1 ,AIB_AXI for RPU_1 master" "Not masked,Masked" setclrfld.long 0x00 16. 0x10 16. 0x08 16. " RPUM0 ,AIB_AXI for RPU_0 master" "Not masked,Masked" setclrfld.long 0x00 3. 0x10 3. 0x08 3. " FPD_OCM ,AIB_AXI for FPD to LPD OCM path" "Not masked,Masked" setclrfld.long 0x00 2. 0x10 2. 0x08 2. " FPD_LPDIBS ,AIB_AXI for FPD to LPD interconnect path" "Not masked,Masked" textline " " setclrfld.long 0x00 1. 0x10 1. 0x08 1. " AFIFS1 ,AIB_AXI for AFI_FS1 slave" "Not masked,Masked" setclrfld.long 0x00 0. 0x10 0. 0x08 0. " AFIFS0 ,AIB_AXI for AFI_FS0 slave" "Not masked,Masked" group.long 0x3020++0x03 line.long 0x00 "ERR_AIBAPB_ISR,Interrupt Status Register" eventfld.long 0x00 0. " GPU ,AIB_APB for GPU" "No interrupt,Interrupt" group.long 0x3024++0x03 line.long 0x00 "ERR_AIBAPB_IMR_SET/CLR,Interrupt Mask Register" setclrfld.long 0x00 0. 0x08 0. 0x04 0. " GPU ,AIB_APB for GPU" "Not masked,Masked" group.long 0x3030++0x03 line.long 0x00 "ISO_AIBAXI_REQ,Isolation Request Register" bitfld.long 0x00 28. " AFIFS2 ,AIB_AXI for AFIFS2 isolation request" "Not requested,Requested" bitfld.long 0x00 27. " LPD_DDR ,AIB_AXI for LPD to DDR path isolation request" "Not requested,Requested" bitfld.long 0x00 26. " OCMS ,AIB_AXI for OCM isolation request" "Not requested,Requested" bitfld.long 0x00 24. " FPD_MAIN ,AIB_AXI between LPD and FPD main isolation request" "Not requested,Requested" textline " " bitfld.long 0x00 23. " USB1S ,AIB_AXI for USB1 slave isolation request" "Not requested,Requested" bitfld.long 0x00 22. " USB0S ,AIB_AXI for USB0 slave isolation request" "Not requested,Requested" bitfld.long 0x00 19. " RPUS1 ,AIB_AXI for RPU_1 slave isolation request" "Not requested,Requested" bitfld.long 0x00 18. " RPUS0 ,AIB_AXI for RPU_0 slave isolation request" "Not requested,Requested" textline " " bitfld.long 0x00 17. " RPUM1 ,AIB_AXI for RPU_1 master isolation request" "Not requested,Requested" bitfld.long 0x00 16. " RPUM0 ,AIB_AXI for RPU_0 master isolation request" "Not requested,Requested" bitfld.long 0x00 3. " FPD_OCM ,AIB_AXI for FPD to LPD OCM path isolation request" "Not requested,Requested" bitfld.long 0x00 2. " FPD_LPDIBS ,AIB_AXI for FPD to LPD interconnect path isolation request" "Not requested,Requested" textline " " bitfld.long 0x00 1. " AFIFS1 ,AIB_AXI for AFI_FS1 slave isolation request" "Not requested,Requested" bitfld.long 0x00 0. " AFIFS0 ,AIB_AXI for AFI_FS0 slave isolation request" "Not requested,Requested" group.long 0x3038++0x03 line.long 0x00 "ISO_AIBAXI_TYPE,AIB Response Type Register" bitfld.long 0x00 28. " AFIFS2 ,AIB_AXI for AFIFS2 AIB response type" "No response,SLVERR" bitfld.long 0x00 27. " LPD_DDR ,AIB_AXI for LPD to DDR path AIB response type" "No response,SLVERR" bitfld.long 0x00 26. " OCMS ,AIB_AXI for OCM AIB response type" "No response,SLVERR" bitfld.long 0x00 24. " FPD_MAIN ,AIB_AXI between LPD and FPD main AIB response type" "No response,SLVERR" textline " " bitfld.long 0x00 23. " USB1S ,AIB_AXI for USB1 slave AIB response type" "No response,SLVERR" bitfld.long 0x00 22. " USB0S ,AIB_AXI for USB0 slave AIB response type" "No response,SLVERR" bitfld.long 0x00 19. " RPUS1 ,AIB_AXI for RPU_1 slave AIB response type" "No response,SLVERR" bitfld.long 0x00 18. " RPUS0 ,AIB_AXI for RPU_0 slave AIB response type" "No response,SLVERR" textline " " bitfld.long 0x00 17. " RPUM1 ,AIB_AXI for RPU_1 master AIB response type" "No response,SLVERR" bitfld.long 0x00 16. " RPUM0 ,AIB_AXI for RPU_0 master AIB response type" "No response,SLVERR" bitfld.long 0x00 3. " FPD_OCM ,AIB_AXI for FPD to LPD OCM path AIB response type" "No response,SLVERR" bitfld.long 0x00 2. " FPD_LPDIBS ,AIB_AXI for FPD to LPD interconnect path AIB response type" "No response,SLVERR" textline " " bitfld.long 0x00 1. " AFIFS1 ,AIB_AXI for AFI_FS1 slave AIB response type" "No response,SLVERR" bitfld.long 0x00 0. " AFIFS0 ,AIB_AXI for AFI_FS0 slave AIB response type" "No response,SLVERR" group.long 0x3040++0x03 line.long 0x00 "ISO_AIBAXI_ACK,AIB Functionally Isolated Master And Slave Presence Register" bitfld.long 0x00 28. " AFIFS2 ,AIB_AXI for AFIFS2 AIB functionally isolated master and slave" "Absent,Present" bitfld.long 0x00 27. " LPD_DDR ,AIB_AXI for LPD to DDR path AIB functionally isolated master and slave" "Absent,Present" bitfld.long 0x00 26. " OCMS ,AIB_AXI for OCM AIB functionally isolated master and slave" "Absent,Present" bitfld.long 0x00 24. " FPD_MAIN ,AIB_AXI between LPD and FPD main AIB functionally isolated master and slave" "Absent,Present" textline " " bitfld.long 0x00 23. " USB1S ,AIB_AXI for USB1 slave AIB functionally isolated master and slave" "Absent,Present" bitfld.long 0x00 22. " USB0S ,AIB_AXI for USB0 slave AIB functionally isolated master and slave" "Absent,Present" bitfld.long 0x00 19. " RPUS1 ,AIB_AXI for RPU_1 slave AIB functionally isolated master and slave" "Absent,Present" bitfld.long 0x00 18. " RPUS0 ,AIB_AXI for RPU_0 slave AIB functionally isolated master and slave" "Absent,Present" textline " " bitfld.long 0x00 17. " RPUM1 ,AIB_AXI for RPU_1 master AIB functionally isolated master and slave" "Absent,Present" bitfld.long 0x00 16. " RPUM0 ,AIB_AXI for RPU_0 master AIB functionally isolated master and slave" "Absent,Present" bitfld.long 0x00 3. " FPD_OCM ,AIB_AXI for FPD to LPD OCM path AIB functionally isolated master and slave" "Absent,Present" bitfld.long 0x00 2. " FPD_LPDIBS ,AIB_AXI for FPD to LPD interconnect path AIB functionally isolated master and slave" "Absent,Present" textline " " bitfld.long 0x00 1. " AFIFS1 ,AIB_AXI for AFI_FS1 slave AIB functionally isolated master and slave" "Absent,Present" bitfld.long 0x00 0. " AFIFS0 ,AIB_AXI for AFI_FS0 slave AIB functionally isolated master and slave" "Absent,Present" group.long 0x3048++0x0B line.long 0x00 "ISO_AIBAPB_REQ,Isolation Request Register" bitfld.long 0x00 0. " GPU ,AIB_APB for GPU isolation request" "Not requested,Requested" line.long 0x04 "ISO_AIBAPB_TYPE,AIB Response Type Register" bitfld.long 0x04 0. " GPU ,AIB_APB for GPU AIB response type" "No response,SLVERR" line.long 0x08 "ISO_AIBAPB_ACK,AIB Functionally Isolated Master And Slave Presence Register" bitfld.long 0x08 0. " GPU ,AIB_APB for GPU AIB functionally isolated master and slave" "Absent,Present" group.long 0x6000++0x03 line.long 0x00 "ERR_ATB_ISR,Interrupt Status Register" eventfld.long 0x00 1. " AFIFS2 ,ISR for ATB placed between lpd interconnect and afifs2" "No interrupt,Interrupt" eventfld.long 0x00 0. " LPDM ,ISR for ATB placed between lpd inbound switch and lpd main switch" "No interrupt,Interrupt" group.long 0x6004++0x03 line.long 0x00 "ERR_ATB_IMR_SET/CLR,Interrupt Mask Register" setclrfld.long 0x00 1. 0x08 1. 0x04 1. " AFIFS2 ,ISR for ATB placed between lpd interconnect and afifs2" "Not masked,Masked" setclrfld.long 0x00 0. 0x08 0. 0x04 0. " LPDM ,ISR for ATB placed between lpd inbound switch and lpd main switch" "Not masked,Masked" group.long 0x6010++0x0B line.long 0x00 "ATB_CMD_STORE_EN,ATB Command Store Enable Register" bitfld.long 0x00 1. " AFIFS2 ,Enable keeping track of read and write transactions by the ATB" "Disabled,Enabled" bitfld.long 0x00 0. " LPDM ,Enable keeping track of read and write transactions by the ATB" "Disabled,Enabled" line.long 0x04 "ATB_RESP_EN,ATB Response Enable Register" bitfld.long 0x04 1. " AFIFS2 ,Enable sending response by the ATB if it sees timeout" "Disabled,Enabled" bitfld.long 0x04 0. " LPDM ,Enable sending response by the ATB if it sees timeout" "Disabled,Enabled" line.long 0x08 "ATB_RESP_TYPE,ATB Response Type Register" bitfld.long 0x08 1. " AFIFS2 ,ATB response type after timeout" "OKAY,SLVERR" bitfld.long 0x08 0. " LPDM ,ATB response type after timeout" "OKAY,SLVERR" group.long 0x6020++0x03 line.long 0x00 "ATB_PRESCALE,ATB Prescale Register" bitfld.long 0x00 16. " ENABLE ,Counter enable" "Disabled,Enabled" hexmask.long.word 0x00 0.--15. 1. " VALUE ,16 bit prescale value based on 100 mhz clock" group.long 0x7000++0x0F line.long 0x00 "MUTEX0,LP Domain SLCR Mutex 0 Register" line.long 0x04 "MUTEX1,LP Domain SLCR Mutex 1 Register" line.long 0x08 "MUTEX2,LP Domain SLCR Mutex 2 Register" line.long 0x0C "MUTEX3,LP Domain SLCR Mutex 3 Register" group.long 0x8000++0x03 line.long 0x00 "GICP0_IRQ_STATUS,Interrupt Status Register" eventfld.long 0x00 31. " SRC31 ,PL_IPI2: OR' of all of ipis targeted to RPU PL2" "No interrupt,Interrupt" eventfld.long 0x00 30. " SRC30 ,PL_IPI1: OR' of all of ipis targeted to RPU PL1" "No interrupt,Interrupt" eventfld.long 0x00 29. " SRC29 ,PL_IPI0: OR' of all of ipis targeted to RPU PL0" "No interrupt,Interrupt" eventfld.long 0x00 28. " SRC28 ,Clock monitor coming from CRL" "No interrupt,Interrupt" textline " " eventfld.long 0x00 27. " SRC27 ,RTC seconds interrupt" "No interrupt,Interrupt" eventfld.long 0x00 26. " SRC26 ,RTC alarm interupt" "No interrupt,Interrupt" eventfld.long 0x00 25. " SRC25 ,APM_LPD: or'd of all LPD apms" "No interrupt,Interrupt" eventfld.long 0x00 24. " SRC24 ,CAN1 interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x00 23. " SRC23 ,CAN0 interrupt" "No interrupt,Interrupt" eventfld.long 0x00 22. " SRC22 ,UART1 interrupt" "No interrupt,Interrupt" eventfld.long 0x00 21. " SRC21 ,UART0 interrupt" "No interrupt,Interrupt" eventfld.long 0x00 20. " SRC20 ,SPI1 interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x00 19. " SRC19 ,SPI0 interrupt" "No interrupt,Interrupt" eventfld.long 0x00 18. " SRC18 ,I2C1 interrupt" "No interrupt,Interrupt" eventfld.long 0x00 17. " SRC17 ,I2C0 interrupt" "No interrupt,Interrupt" eventfld.long 0x00 16. " SRC16 ,GPIO interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x00 15. " SRC15 ,SPI interrupt" "No interrupt,Interrupt" eventfld.long 0x00 14. " SRC14 ,NAND/NOR/SRAM static memory controller interrupt" "No interrupt,Interrupt" eventfld.long 0x00 13. " SRC13 ,RPU CPU1 ECC errors interrupt" "No interrupt,Interrupt" eventfld.long 0x00 12. " SRC12 ,RPU CPU0 ECC errors interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x00 11. " SRC11 ,LPD_APB_INT: or'd of all APB interrupts from LPD" "No interrupt,Interrupt" eventfld.long 0x00 10. " SRC10 ,OCM interrupt error" "No interrupt,Interrupt" eventfld.long 0x00 9. " SRC9 ,RPU performance monitor" "No interrupt,Interrupt" eventfld.long 0x00 8. " SRC8 ,RPU performance monitor" "No interrupt,Interrupt" group.long 0x8004++0x03 line.long 0x00 "GICP0_IRQ_MASK,Interrupt Mask Register" setclrfld.long 0x00 31. 0x08 31. 0x04 31. " SRC31 ,PL_IPI2: OR' of all of ipis targeted to RPU PL2" "Not masked,Masked" setclrfld.long 0x00 30. 0x08 30. 0x04 30. " SRC30 ,PL_IPI1: OR' of all of ipis targeted to RPU PL1" "Not masked,Masked" setclrfld.long 0x00 29. 0x08 29. 0x04 29. " SRC29 ,PL_IPI0: OR' of all of ipis targeted to RPU PL0" "Not masked,Masked" setclrfld.long 0x00 28. 0x08 28. 0x04 28. " SRC28 ,Clock monitor coming from CRL" "Not masked,Masked" textline " " setclrfld.long 0x00 27. 0x08 27. 0x04 27. " SRC27 ,RTC seconds interrupt" "Not masked,Masked" setclrfld.long 0x00 26. 0x08 26. 0x04 26. " SRC26 ,RTC alarm interupt" "Not masked,Masked" setclrfld.long 0x00 25. 0x08 25. 0x04 25. " SRC25 ,APM_LPD: or'd of all LPD apms" "Not masked,Masked" setclrfld.long 0x00 24. 0x08 24. 0x04 24. " SRC24 ,CAN1 interrupt" "Not masked,Masked" textline " " setclrfld.long 0x00 23. 0x08 23. 0x04 23. " SRC23 ,CAN0 interrupt" "Not masked,Masked" setclrfld.long 0x00 22. 0x08 22. 0x04 22. " SRC22 ,UART1 interrupt" "Not masked,Masked" setclrfld.long 0x00 21. 0x08 21. 0x04 21. " SRC21 ,UART0 interrupt" "Not masked,Masked" setclrfld.long 0x00 20. 0x08 20. 0x04 20. " SRC20 ,SPI1 interrupt" "Not masked,Masked" textline " " setclrfld.long 0x00 19. 0x08 19. 0x04 19. " SRC19 ,SPI0 interrupt" "Not masked,Masked" setclrfld.long 0x00 18. 0x08 18. 0x04 18. " SRC18 ,I2C1 interrupt" "Not masked,Masked" setclrfld.long 0x00 17. 0x08 17. 0x04 17. " SRC17 ,I2C0 interrupt" "Not masked,Masked" setclrfld.long 0x00 16. 0x08 16. 0x04 16. " SRC16 ,GPIO interrupt" "Not masked,Masked" textline " " setclrfld.long 0x00 15. 0x08 15. 0x04 15. " SRC15 ,SPI interrupt" "Not masked,Masked" setclrfld.long 0x00 14. 0x08 14. 0x04 14. " SRC14 ,NAND/NOR/SRAM static memory controller interrupt" "Not masked,Masked" setclrfld.long 0x00 13. 0x08 13. 0x04 13. " SRC13 ,RPU CPU1 ECC errors interrupt" "Not masked,Masked" setclrfld.long 0x00 12. 0x08 12. 0x04 12. " SRC12 ,RPU CPU0 ECC errors interrupt" "Not masked,Masked" textline " " setclrfld.long 0x00 11. 0x08 11. 0x04 11. " SRC11 ,LPD_APB_INT: or'd of all APB interrupts from LPD" "Not masked,Masked" setclrfld.long 0x00 10. 0x08 10. 0x04 10. " SRC10 ,OCM interrupt error" "Not masked,Masked" setclrfld.long 0x00 9. 0x08 9. 0x04 9. " SRC9 ,RPU performance monitor" "Not masked,Masked" setclrfld.long 0x00 8. 0x08 8. 0x04 8. " SRC8 ,RPU performance monitor" "Not masked,Masked" wgroup.long 0x8010++0x03 line.long 0x00 "GICP0_IRQ_TRIGGER,Interrupt Trigger Register" bitfld.long 0x00 31. " SRC31 ,PL_IPI2: OR' of all of ipis targeted to RPU PL2" "No effect,Trigger" bitfld.long 0x00 30. " SRC30 ,PL_IPI1: OR' of all of ipis targeted to RPU PL1" "No effect,Trigger" bitfld.long 0x00 29. " SRC29 ,PL_IPI0: OR' of all of ipis targeted to RPU PL0" "No effect,Trigger" bitfld.long 0x00 28. " SRC28 ,Clock monitor coming from CRL" "No effect,Trigger" textline " " bitfld.long 0x00 27. " SRC27 ,RTC seconds interrupt" "No effect,Trigger" bitfld.long 0x00 26. " SRC26 ,RTC alarm interupt" "No effect,Trigger" bitfld.long 0x00 25. " SRC25 ,APM_LPD: or'd of all LPD apms" "No effect,Trigger" bitfld.long 0x00 24. " SRC24 ,CAN1 interrupt" "No effect,Trigger" textline " " bitfld.long 0x00 23. " SRC23 ,CAN0 interrupt" "No effect,Trigger" bitfld.long 0x00 22. " SRC22 ,UART1 interrupt" "No effect,Trigger" bitfld.long 0x00 21. " SRC21 ,UART0 interrupt" "No effect,Trigger" bitfld.long 0x00 20. " SRC20 ,SPI1 interrupt" "No effect,Trigger" textline " " bitfld.long 0x00 19. " SRC19 ,SPI0 interrupt" "No effect,Trigger" bitfld.long 0x00 18. " SRC18 ,I2C1 interrupt" "No effect,Trigger" bitfld.long 0x00 17. " SRC17 ,I2C0 interrupt" "No effect,Trigger" bitfld.long 0x00 16. " SRC16 ,GPIO interrupt" "No effect,Trigger" textline " " bitfld.long 0x00 15. " SRC15 ,SPI interrupt" "No effect,Trigger" bitfld.long 0x00 14. " SRC14 ,NAND/NOR/SRAM static memory controller interrupt" "No effect,Trigger" bitfld.long 0x00 13. " SRC13 ,RPU CPU1 ECC errors interrupt" "No effect,Trigger" bitfld.long 0x00 12. " SRC12 ,RPU CPU0 ECC errors interrupt" "No effect,Trigger" textline " " bitfld.long 0x00 11. " SRC11 ,LPD_APB_INT: or'd of all APB interrupts from LPD" "No effect,Trigger" bitfld.long 0x00 10. " SRC10 ,OCM interrupt error" "No effect,Trigger" bitfld.long 0x00 9. " SRC9 ,RPU performance monitor" "No effect,Trigger" bitfld.long 0x00 8. " SRC8 ,RPU performance monitor" "No effect,Trigger" group.long 0x8014++0x03 line.long 0x00 "GICP1_IRQ_STATUS,Interrupt Status Register" eventfld.long 0x00 31. " SRC31 ,Gigabit ethernet3 interrupt" "No interrupt,Interrupt" eventfld.long 0x00 30. " SRC30 ,Gigabit ethernet2 wakeup interrupt" "No interrupt,Interrupt" eventfld.long 0x00 29. " SRC29 ,Gigabit ethernet2 interrupt" "No interrupt,Interrupt" eventfld.long 0x00 28. " SRC28 ,Gigabit ethernet1 wakeup interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x00 27. " SRC27 ,Gigabit ethernet1 interrupt" "No interrupt,Interrupt" eventfld.long 0x00 26. " SRC26 ,Ethernet0 wakeup interrupt" "No interrupt,Interrupt" eventfld.long 0x00 25. " SRC25 ,Ethernet0 interrupt" "No interrupt,Interrupt" eventfld.long 0x00 24. " SRC24 ,AMS interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x00 23. " SRC23 ,AIB AXI interrupt" "No interrupt,Interrupt" eventfld.long 0x00 22. " SRC22 ,ATB interrupt" "No interrupt,Interrupt" eventfld.long 0x00 21. " SRC21 ,WDT in the CSUPMU" "No interrupt,Interrupt" eventfld.long 0x00 20. " SRC20 ,WDT in the LPD IOU" "No interrupt,Interrupt" textline " " eventfld.long 0x00 19. " SRC19 ,SDIO1 wake interrupt" "No interrupt,Interrupt" eventfld.long 0x00 18. " SRC18 ,SDIO0 wake interrupt" "No interrupt,Interrupt" eventfld.long 0x00 17. " SRC17 ,SDIO1 interrupt" "No interrupt,Interrupt" eventfld.long 0x00 16. " SRC16 ,SDIO0 interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x00 15. " SRC15 ,Triple time counter3" "No interrupt,Interrupt" eventfld.long 0x00 14. " SRC14 ,Triple time counter3" "No interrupt,Interrupt" eventfld.long 0x00 13. " SRC13 ,Triple time counter3" "No interrupt,Interrupt" eventfld.long 0x00 12. " SRC12 ,Triple timer counter2" "No interrupt,Interrupt" textline " " eventfld.long 0x00 11. " SRC11 ,Triple timer counter2" "No interrupt,Interrupt" eventfld.long 0x00 10. " SRC10 ,Triple timer counter2" "No interrupt,Interrupt" eventfld.long 0x00 9. " SRC9 ,Triple time counter1 interrupt TTC1" "No interrupt,Interrupt" eventfld.long 0x00 8. " SRC8 ,Triple time counter1 interrupt TTC1" "No interrupt,Interrupt" textline " " eventfld.long 0x00 7. " SRC7 ,Triple time counter1 interrupt TTC1" "No interrupt,Interrupt" eventfld.long 0x00 6. " SRC6 ,Triple timer counter0" "No interrupt,Interrupt" eventfld.long 0x00 5. " SRC5 ,Triple timer counter0" "No interrupt,Interrupt" eventfld.long 0x00 4. " SRC4 ,Triple timer counter0" "No interrupt,Interrupt" textline " " eventfld.long 0x00 3. " SRC3 ,APU_IPI0: OR' of all of ipis targeted to APU CPU" "No interrupt,Interrupt" eventfld.long 0x00 2. " SRC2 ,RPU_IPI1: OR' of all of ipis targeted to RPU CPU1" "No interrupt,Interrupt" eventfld.long 0x00 1. " SRC1 ,RPU_IPI0: OR' of all of ipis targeted to RPU CPU0" "No interrupt,Interrupt" eventfld.long 0x00 0. " SRC0 ,PL_IPI3: OR' of all of ipis targeted to RPU PL3" "No interrupt,Interrupt" group.long 0x8018++0x03 line.long 0x00 "GICP1_IRQ_MASK,Interrupt Mask Register" setclrfld.long 0x00 31. 0x08 31. 0x04 31. " SRC31 ,Gigabit ethernet3 interrupt" "Not masked,Masked" setclrfld.long 0x00 30. 0x08 30. 0x04 30. " SRC30 ,Gigabit ethernet2 wakeup interrupt" "Not masked,Masked" setclrfld.long 0x00 29. 0x08 29. 0x04 29. " SRC29 ,Gigabit ethernet2 interrupt" "Not masked,Masked" setclrfld.long 0x00 28. 0x08 28. 0x04 28. " SRC28 ,Gigabit ethernet1 wakeup interrupt" "Not masked,Masked" textline " " setclrfld.long 0x00 27. 0x08 27. 0x04 27. " SRC27 ,Gigabit ethernet1 interrupt" "Not masked,Masked" setclrfld.long 0x00 26. 0x08 26. 0x04 26. " SRC26 ,Ethernet0 wakeup interrupt" "Not masked,Masked" setclrfld.long 0x00 25. 0x08 25. 0x04 25. " SRC25 ,Ethernet0 interrupt" "Not masked,Masked" setclrfld.long 0x00 24. 0x08 24. 0x04 24. " SRC24 ,AMS interrupt" "Not masked,Masked" textline " " setclrfld.long 0x00 23. 0x08 23. 0x04 23. " SRC23 ,AIB AXI interrupt" "Not masked,Masked" setclrfld.long 0x00 22. 0x08 22. 0x04 22. " SRC22 ,ATB interrupt" "Not masked,Masked" setclrfld.long 0x00 21. 0x08 21. 0x04 21. " SRC21 ,WDT in the CSUPMU" "Not masked,Masked" setclrfld.long 0x00 20. 0x08 20. 0x04 20. " SRC20 ,WDT in the LPD IOU" "Not masked,Masked" textline " " setclrfld.long 0x00 19. 0x08 19. 0x04 19. " SRC19 ,SDIO1 wake interrupt" "Not masked,Masked" setclrfld.long 0x00 18. 0x08 18. 0x04 18. " SRC18 ,SDIO0 wake interrupt" "Not masked,Masked" setclrfld.long 0x00 17. 0x08 17. 0x04 17. " SRC17 ,SDIO1 interrupt" "Not masked,Masked" setclrfld.long 0x00 16. 0x08 16. 0x04 16. " SRC16 ,SDIO0 interrupt" "Not masked,Masked" textline " " setclrfld.long 0x00 15. 0x08 15. 0x04 15. " SRC15 ,Triple time counter3" "Not masked,Masked" setclrfld.long 0x00 14. 0x08 14. 0x04 14. " SRC14 ,Triple time counter3" "Not masked,Masked" setclrfld.long 0x00 13. 0x08 13. 0x04 13. " SRC13 ,Triple time counter3" "Not masked,Masked" setclrfld.long 0x00 12. 0x08 12. 0x04 12. " SRC12 ,Triple timer counter2" "Not masked,Masked" textline " " setclrfld.long 0x00 11. 0x08 11. 0x04 11. " SRC11 ,Triple timer counter2" "Not masked,Masked" setclrfld.long 0x00 10. 0x08 10. 0x04 10. " SRC10 ,Triple timer counter2" "Not masked,Masked" setclrfld.long 0x00 9. 0x08 9. 0x04 9. " SRC9 ,Triple time counter1 interrupt TTC1" "Not masked,Masked" setclrfld.long 0x00 8. 0x08 8. 0x04 8. " SRC8 ,Triple time counter1 interrupt TTC1" "Not masked,Masked" textline " " setclrfld.long 0x00 7. 0x08 7. 0x04 7. " SRC7 ,Triple time counter1 interrupt TTC1" "Not masked,Masked" setclrfld.long 0x00 6. 0x08 6. 0x04 6. " SRC6 ,Triple timer counter0" "Not masked,Masked" setclrfld.long 0x00 5. 0x08 5. 0x04 5. " SRC5 ,Triple timer counter0" "Not masked,Masked" setclrfld.long 0x00 4. 0x08 4. 0x04 4. " SRC4 ,Triple timer counter0" "Not masked,Masked" textline " " setclrfld.long 0x00 3. 0x08 3. 0x04 3. " SRC3 ,APU_IPI0: OR' of all of ipis targeted to APU CPU" "Not masked,Masked" setclrfld.long 0x00 2. 0x08 2. 0x04 2. " SRC2 ,RPU_IPI1: OR' of all of ipis targeted to RPU CPU1" "Not masked,Masked" setclrfld.long 0x00 1. 0x08 1. 0x04 1. " SRC1 ,RPU_IPI0: OR' of all of ipis targeted to RPU CPU0" "Not masked,Masked" setclrfld.long 0x00 0. 0x08 0. 0x04 0. " SRC0 ,PL_IPI3: OR' of all of ipis targeted to RPU PL3" "Not masked,Masked" wgroup.long 0x8024++0x03 line.long 0x00 "GICP1_IRQ_TRIGGER,Interrupt Trigger Register" bitfld.long 0x00 31. " SRC31 ,Gigabit ethernet3 interrupt" "No effect,Trigger" bitfld.long 0x00 30. " SRC30 ,Gigabit ethernet2 wakeup interrupt" "No effect,Trigger" bitfld.long 0x00 29. " SRC29 ,Gigabit ethernet2 interrupt" "No effect,Trigger" bitfld.long 0x00 28. " SRC28 ,Gigabit ethernet1 wakeup interrupt" "No effect,Trigger" textline " " bitfld.long 0x00 27. " SRC27 ,Gigabit ethernet1 interrupt" "No effect,Trigger" bitfld.long 0x00 26. " SRC26 ,Ethernet0 wakeup interrupt" "No effect,Trigger" bitfld.long 0x00 25. " SRC25 ,Ethernet0 interrupt" "No effect,Trigger" bitfld.long 0x00 24. " SRC24 ,AMS interrupt" "No effect,Trigger" textline " " bitfld.long 0x00 23. " SRC23 ,AIB AXI interrupt" "No effect,Trigger" bitfld.long 0x00 22. " SRC22 ,ATB interrupt" "No effect,Trigger" bitfld.long 0x00 21. " SRC21 ,WDT in the CSUPMU" "No effect,Trigger" bitfld.long 0x00 20. " SRC20 ,WDT in the LPD IOU" "No effect,Trigger" textline " " bitfld.long 0x00 19. " SRC19 ,SDIO1 wake interrupt" "No effect,Trigger" bitfld.long 0x00 18. " SRC18 ,SDIO0 wake interrupt" "No effect,Trigger" bitfld.long 0x00 17. " SRC17 ,SDIO1 interrupt" "No effect,Trigger" bitfld.long 0x00 16. " SRC16 ,SDIO0 interrupt" "No effect,Trigger" textline " " bitfld.long 0x00 15. " SRC15 ,Triple time counter3" "No effect,Trigger" bitfld.long 0x00 14. " SRC14 ,Triple time counter3" "No effect,Trigger" bitfld.long 0x00 13. " SRC13 ,Triple time counter3" "No effect,Trigger" bitfld.long 0x00 12. " SRC12 ,Triple timer counter2" "No effect,Trigger" textline " " bitfld.long 0x00 11. " SRC11 ,Triple timer counter2" "No effect,Trigger" bitfld.long 0x00 10. " SRC10 ,Triple timer counter2" "No effect,Trigger" bitfld.long 0x00 9. " SRC9 ,Triple time counter1 interrupt TTC1" "No effect,Trigger" bitfld.long 0x00 8. " SRC8 ,Triple time counter1 interrupt TTC1" "No effect,Trigger" textline " " bitfld.long 0x00 7. " SRC7 ,Triple time counter1 interrupt TTC1" "No effect,Trigger" bitfld.long 0x00 6. " SRC6 ,Triple timer counter0" "No effect,Trigger" bitfld.long 0x00 5. " SRC5 ,Triple timer counter0" "No effect,Trigger" bitfld.long 0x00 4. " SRC4 ,Triple timer counter0" "No effect,Trigger" textline " " bitfld.long 0x00 3. " SRC3 ,APU_IPI0: OR' of all of ipis targeted to APU CPU" "No effect,Trigger" bitfld.long 0x00 2. " SRC2 ,RPU_IPI1: OR' of all of ipis targeted to RPU CPU1" "No effect,Trigger" bitfld.long 0x00 1. " SRC1 ,RPU_IPI0: OR' of all of ipis targeted to RPU CPU0" "No effect,Trigger" bitfld.long 0x00 0. " SRC0 ,PL_IPI3: OR' of all of ipis targeted to RPU PL3" "No effect,Trigger" group.long 0x8028++0x03 line.long 0x00 "GICP2_IRQ_STATUS,Interrupt Status Register" eventfld.long 0x00 31. " SRC31 ,Bit 6 of PL_PS IRQ0" "No interrupt,Interrupt" eventfld.long 0x00 30. " SRC30 ,Bit 5 of PL_PS IRQ0" "No interrupt,Interrupt" eventfld.long 0x00 29. " SRC29 ,Bit 4 of PL_PS IRQ0" "No interrupt,Interrupt" eventfld.long 0x00 28. " SRC28 ,Bit 3 of PL_PS IRQ0" "No interrupt,Interrupt" textline " " eventfld.long 0x00 27. " SRC27 ,Bit 2 of PL_PS IRQ0" "No interrupt,Interrupt" eventfld.long 0x00 26. " SRC26 ,Bit 1 of PL_PS IRQ0" "No interrupt,Interrupt" eventfld.long 0x00 25. " SRC25 ,Bit 0 of PL_PS IRQ0" "No interrupt,Interrupt" eventfld.long 0x00 24. " SRC24 ,XMPUs error interrupt for LPD" "No interrupt,Interrupt" textline " " eventfld.long 0x00 23. " SRC23 ,EFUSE interrupt" "No interrupt,Interrupt" eventfld.long 0x00 22. " SRC22 ,DMA for CSU interrupt" "No interrupt,Interrupt" eventfld.long 0x00 21. " SRC21 ,Device configuration module interrupt" "No interrupt,Interrupt" eventfld.long 0x00 20. " SRC20 ,ADMA interrupt for channel 7" "No interrupt,Interrupt" textline " " eventfld.long 0x00 19. " SRC19 ,ADMA interrupt for channel 6" "No interrupt,Interrupt" eventfld.long 0x00 18. " SRC18 ,ADMA interrupt for channel 5" "No interrupt,Interrupt" eventfld.long 0x00 17. " SRC17 ,ADMA interrupt for channel 4" "No interrupt,Interrupt" eventfld.long 0x00 16. " SRC16 ,ADMA interrupt for channel 3" "No interrupt,Interrupt" textline " " eventfld.long 0x00 15. " SRC15 ,ADMA interrupt for channel 2" "No interrupt,Interrupt" eventfld.long 0x00 14. " SRC14 ,ADMA interrupt for channel 1" "No interrupt,Interrupt" eventfld.long 0x00 13. " SRC13 ,ADMA interrupt for channel 0" "No interrupt,Interrupt" eventfld.long 0x00 12. " SRC12 ,Wakeup from USB3_1 to PMU" "No interrupt,Interrupt" textline " " eventfld.long 0x00 11. " SRC11 ,Wakeup from USB3_0 to PMU" "No interrupt,Interrupt" eventfld.long 0x00 10. " SRC10 ,USB3_1 OTG interrupt" "No interrupt,Interrupt" eventfld.long 0x00 9. " SRC9 ,USB3_1 endpoint related interrupts" "No interrupt,Interrupt" eventfld.long 0x00 8. " SRC8 ,USB3_1 endpoint related interrupts" "No interrupt,Interrupt" textline " " eventfld.long 0x00 7. " SRC7 ,USB3_1 endpoint related interrupts" "No interrupt,Interrupt" eventfld.long 0x00 6. " SRC6 ,USB3_1 endpoint related interrupts" "No interrupt,Interrupt" eventfld.long 0x00 5. " SRC5 ,USB3_0 OTG interrupt" "No interrupt,Interrupt" eventfld.long 0x00 4. " SRC4 ,USB3_0 endpoint related interrupts" "No interrupt,Interrupt" textline " " eventfld.long 0x00 3. " SRC3 ,USB3_0 endpoint related interrupts" "No interrupt,Interrupt" eventfld.long 0x00 2. " SRC2 ,USB3_0 endpoint related interrupts" "No interrupt,Interrupt" eventfld.long 0x00 1. " SRC1 ,USB3_0 endpoint related interrupts" "No interrupt,Interrupt" eventfld.long 0x00 0. " SRC0 ,Gigabit ethernet3 wakeup interrupt" "No interrupt,Interrupt" group.long 0x802C++0x03 line.long 0x00 "GICP2_IRQ_MASK_SET/CLR,Interrupt Mask Register" setclrfld.long 0x00 31. 0x08 31. 0x04 31. " SRC31 ,Bit 6 of PL_PS IRQ0" "Not masked,Masked" setclrfld.long 0x00 30. 0x08 30. 0x04 30. " SRC30 ,Bit 5 of PL_PS IRQ0" "Not masked,Masked" setclrfld.long 0x00 29. 0x08 29. 0x04 29. " SRC29 ,Bit 4 of PL_PS IRQ0" "Not masked,Masked" setclrfld.long 0x00 28. 0x08 28. 0x04 28. " SRC28 ,Bit 3 of PL_PS IRQ0" "Not masked,Masked" textline " " setclrfld.long 0x00 27. 0x08 27. 0x04 27. " SRC27 ,Bit 2 of PL_PS IRQ0" "Not masked,Masked" setclrfld.long 0x00 26. 0x08 26. 0x04 26. " SRC26 ,Bit 1 of PL_PS IRQ0" "Not masked,Masked" setclrfld.long 0x00 25. 0x08 25. 0x04 25. " SRC25 ,Bit 0 of PL_PS IRQ0" "Not masked,Masked" setclrfld.long 0x00 24. 0x08 24. 0x04 24. " SRC24 ,Xmpus error interrupt for LPD" "Not masked,Masked" textline " " setclrfld.long 0x00 23. 0x08 23. 0x04 23. " SRC23 ,EFUSE interrupt" "Not masked,Masked" setclrfld.long 0x00 22. 0x08 22. 0x04 22. " SRC22 ,DMA for CSU interrupt" "Not masked,Masked" setclrfld.long 0x00 21. 0x08 21. 0x04 21. " SRC21 ,Device configuration module interrupt" "Not masked,Masked" setclrfld.long 0x00 20. 0x08 20. 0x04 20. " SRC20 ,ADMA interrupt for channel 7" "Not masked,Masked" textline " " setclrfld.long 0x00 19. 0x08 19. 0x04 19. " SRC19 ,ADMA interrupt for channel 6" "Not masked,Masked" setclrfld.long 0x00 18. 0x08 18. 0x04 18. " SRC18 ,ADMA interrupt for channel 5" "Not masked,Masked" setclrfld.long 0x00 17. 0x08 17. 0x04 17. " SRC17 ,ADMA interrupt for channel 4" "Not masked,Masked" setclrfld.long 0x00 16. 0x08 16. 0x04 16. " SRC16 ,ADMA interrupt for channel 3" "Not masked,Masked" textline " " setclrfld.long 0x00 15. 0x08 15. 0x04 15. " SRC15 ,ADMA interrupt for channel 2" "Not masked,Masked" setclrfld.long 0x00 14. 0x08 14. 0x04 14. " SRC14 ,ADMA interrupt for channel 1" "Not masked,Masked" setclrfld.long 0x00 13. 0x08 13. 0x04 13. " SRC13 ,ADMA interrupt for channel 0" "Not masked,Masked" setclrfld.long 0x00 12. 0x08 12. 0x04 12. " SRC12 ,Wakeup from USB3_1 to PMU" "Not masked,Masked" textline " " setclrfld.long 0x00 11. 0x08 11. 0x04 11. " SRC11 ,Wakeup from USB3_0 to PMU" "Not masked,Masked" setclrfld.long 0x00 10. 0x08 10. 0x04 10. " SRC10 ,USB3_1 OTG interrupt" "Not masked,Masked" setclrfld.long 0x00 9. 0x08 9. 0x04 9. " SRC9 ,USB3_1 endpoint related interrupts" "Not masked,Masked" setclrfld.long 0x00 8. 0x08 8. 0x04 8. " SRC8 ,USB3_1 endpoint related interrupts" "Not masked,Masked" textline " " setclrfld.long 0x00 7. 0x08 7. 0x04 7. " SRC7 ,USB3_1 endpoint related interrupts" "Not masked,Masked" setclrfld.long 0x00 6. 0x08 6. 0x04 6. " SRC6 ,USB3_1 endpoint related interrupts" "Not masked,Masked" setclrfld.long 0x00 5. 0x08 5. 0x04 5. " SRC5 ,USB3_0 OTG interrupt" "Not masked,Masked" setclrfld.long 0x00 4. 0x08 4. 0x04 4. " SRC4 ,USB3_0 endpoint related interrupts" "Not masked,Masked" textline " " setclrfld.long 0x00 3. 0x08 3. 0x04 3. " SRC3 ,USB3_0 endpoint related interrupts" "Not masked,Masked" setclrfld.long 0x00 2. 0x08 2. 0x04 2. " SRC2 ,USB3_0 endpoint related interrupts" "Not masked,Masked" setclrfld.long 0x00 1. 0x08 1. 0x04 1. " SRC1 ,USB3_0 endpoint related interrupts" "Not masked,Masked" setclrfld.long 0x00 0. 0x08 0. 0x04 0. " SRC0 ,Gigabit ethernet3 wakeup interrupt" "Not masked,Masked" wgroup.long 0x8038++0x03 line.long 0x00 "GICP2_IRQ_TRIGGER,Interrupt Trigger Register" bitfld.long 0x00 31. " SRC31 ,Bit 6 of PL_PS IRQ0" "No effect,Trigger" bitfld.long 0x00 30. " SRC30 ,Bit 5 of PL_PS IRQ0" "No effect,Trigger" bitfld.long 0x00 29. " SRC29 ,Bit 4 of PL_PS IRQ0" "No effect,Trigger" bitfld.long 0x00 28. " SRC28 ,Bit 3 of PL_PS IRQ0" "No effect,Trigger" textline " " bitfld.long 0x00 27. " SRC27 ,Bit 2 of PL_PS IRQ0" "No effect,Trigger" bitfld.long 0x00 26. " SRC26 ,Bit 1 of PL_PS IRQ0" "No effect,Trigger" bitfld.long 0x00 25. " SRC25 ,Bit 0 of PL_PS IRQ0" "No effect,Trigger" bitfld.long 0x00 24. " SRC24 ,Xmpus error interrupt for LPD" "No effect,Trigger" textline " " bitfld.long 0x00 23. " SRC23 ,EFUSE interrupt" "No effect,Trigger" bitfld.long 0x00 22. " SRC22 ,DMA for CSU interrupt" "No effect,Trigger" bitfld.long 0x00 21. " SRC21 ,Device configuration module interrupt" "No effect,Trigger" bitfld.long 0x00 20. " SRC20 ,ADMA interrupt for channel 7" "No effect,Trigger" textline " " bitfld.long 0x00 19. " SRC19 ,ADMA interrupt for channel 6" "No effect,Trigger" bitfld.long 0x00 18. " SRC18 ,ADMA interrupt for channel 5" "No effect,Trigger" bitfld.long 0x00 17. " SRC17 ,ADMA interrupt for channel 4" "No effect,Trigger" bitfld.long 0x00 16. " SRC16 ,ADMA interrupt for channel 3" "No effect,Trigger" textline " " bitfld.long 0x00 15. " SRC15 ,ADMA interrupt for channel 2" "No effect,Trigger" bitfld.long 0x00 14. " SRC14 ,ADMA interrupt for channel 1" "No effect,Trigger" bitfld.long 0x00 13. " SRC13 ,ADMA interrupt for channel 0" "No effect,Trigger" bitfld.long 0x00 12. " SRC12 ,Wakeup from USB3_1 to PMU" "No effect,Trigger" textline " " bitfld.long 0x00 11. " SRC11 ,Wakeup from USB3_0 to PMU" "No effect,Trigger" bitfld.long 0x00 10. " SRC10 ,USB3_1 OTG interrupt" "No effect,Trigger" bitfld.long 0x00 9. " SRC9 ,USB3_1 endpoint related interrupts" "No effect,Trigger" bitfld.long 0x00 8. " SRC8 ,USB3_1 endpoint related interrupts" "No effect,Trigger" textline " " bitfld.long 0x00 7. " SRC7 ,USB3_1 endpoint related interrupts" "No effect,Trigger" bitfld.long 0x00 6. " SRC6 ,USB3_1 endpoint related interrupts" "No effect,Trigger" bitfld.long 0x00 5. " SRC5 ,USB3_0 OTG interrupt" "No effect,Trigger" bitfld.long 0x00 4. " SRC4 ,USB3_0 endpoint related interrupts" "No effect,Trigger" textline " " bitfld.long 0x00 3. " SRC3 ,USB3_0 endpoint related interrupts" "No effect,Trigger" bitfld.long 0x00 2. " SRC2 ,USB3_0 endpoint related interrupts" "No effect,Trigger" bitfld.long 0x00 1. " SRC1 ,USB3_0 endpoint related interrupts" "No effect,Trigger" bitfld.long 0x00 0. " SRC0 ,Gigabit ethernet3 wakeup interrupt" "No effect,Trigger" group.long 0x803C++0x03 line.long 0x00 "GICP3_IRQ_STATUS,Interrupt Status Register" eventfld.long 0x00 31. " SRC31 ,Interrupts from GDMA channel 3" "No interrupt,Interrupt" eventfld.long 0x00 30. " SRC30 ,Interrupts from GDMA channel 2" "No interrupt,Interrupt" eventfld.long 0x00 29. " SRC29 ,Interrupts from GDMA channel 1" "No interrupt,Interrupt" eventfld.long 0x00 28. " SRC28 ,Interrupts from GDMA channel 0" "No interrupt,Interrupt" textline " " eventfld.long 0x00 27. " SRC27 ,APM_FPD: or'd of all apms for FPD" "No interrupt,Interrupt" eventfld.long 0x00 26. " SRC26 ,DPDMA interrupt" "No interrupt,Interrupt" eventfld.long 0x00 25. " SRC25 ,ATB interrupt for FPD" "No interrupt,Interrupt" eventfld.long 0x00 24. " SRC24 ,FPD_APB_INT: or'd of all APB interrupts from LPD" "No interrupt,Interrupt" textline " " eventfld.long 0x00 23. " SRC23 ,Display port general purpose interrupt" "No interrupt,Interrupt" eventfld.long 0x00 22. " SRC22 ,PCIE misc error etc interrupts" "No interrupt,Interrupt" eventfld.long 0x00 21. " SRC21 ,PCIE bridge DMA interrupts" "No interrupt,Interrupt" eventfld.long 0x00 20. " SRC20 ,PCIE legacy INTA/BC/D interrupts" "No interrupt,Interrupt" textline " " eventfld.long 0x00 19. " SRC19 ,Pcie_msi[1]=pcie interrupt for MSI vectors 63 to 32" "No interrupt,Interrupt" eventfld.long 0x00 18. " SRC18 ,Pcie_msi[0]=pcie interrupt for MSI vectors 31 to 0" "No interrupt,Interrupt" eventfld.long 0x00 17. " SRC17 ,FPD top level watch dog timer interrupt" "No interrupt,Interrupt" eventfld.long 0x00 16. " SRC16 ,DDR controller subsystem interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x00 15. " SRC15 ,Bit 7 of PL_PS IRQ1" "No interrupt,Interrupt" eventfld.long 0x00 14. " SRC14 ,Bit 6 of PL_PS IRQ1" "No interrupt,Interrupt" eventfld.long 0x00 13. " SRC13 ,Bit 5 of PL_PS IRQ1" "No interrupt,Interrupt" eventfld.long 0x00 12. " SRC12 ,Bit 4 of PL_PS IRQ1" "No interrupt,Interrupt" textline " " eventfld.long 0x00 11. " SRC11 ,Bit 3 of PL_PS IRQ1" "No interrupt,Interrupt" eventfld.long 0x00 10. " SRC10 ,Bit 2 of PL_PS IRQ1" "No interrupt,Interrupt" eventfld.long 0x00 9. " SRC9 ,Bit 1 of PL_PS IRQ1" "No interrupt,Interrupt" eventfld.long 0x00 8. " SRC8 ,Bit 0 of PL_PS IRQ1" "No interrupt,Interrupt" textline " " eventfld.long 0x00 0. " SRC0 ,Bit 7 of PL_PS IRQ0" "No interrupt,Interrupt" group.long 0x8040++0x03 line.long 0x00 "GICP3_IRQ_MASK_SET/CLR,Interrupt Mask Register" setclrfld.long 0x00 31. 0x08 31. 0x04 31. " SRC31 ,Interrupts from GDMA channel 3" "Not masked,Masked" setclrfld.long 0x00 30. 0x08 30. 0x04 30. " SRC30 ,Interrupts from GDMA channel 2" "Not masked,Masked" setclrfld.long 0x00 29. 0x08 29. 0x04 29. " SRC29 ,Interrupts from GDMA channel 1" "Not masked,Masked" setclrfld.long 0x00 28. 0x08 28. 0x04 28. " SRC28 ,Interrupts from GDMA channel 0" "Not masked,Masked" textline " " setclrfld.long 0x00 27. 0x08 27. 0x04 27. " SRC27 ,APM_FPD: or'd of all apms for FPD" "Not masked,Masked" setclrfld.long 0x00 26. 0x08 26. 0x04 26. " SRC26 ,DPDMA interrupt" "Not masked,Masked" setclrfld.long 0x00 25. 0x08 25. 0x04 25. " SRC25 ,ATB interrupt for FPD" "Not masked,Masked" setclrfld.long 0x00 24. 0x08 24. 0x04 24. " SRC24 ,FPD_APB_INT: or'd of all APB interrupts from LPD" "Not masked,Masked" textline " " setclrfld.long 0x00 23. 0x08 23. 0x04 23. " SRC23 ,Display port general purpose interrupt" "Not masked,Masked" setclrfld.long 0x00 22. 0x08 22. 0x04 22. " SRC22 ,PCIE misc error etc interrupts" "Not masked,Masked" setclrfld.long 0x00 21. 0x08 21. 0x04 21. " SRC21 ,PCIE bridge DMA interrupts" "Not masked,Masked" setclrfld.long 0x00 20. 0x08 20. 0x04 20. " SRC20 ,PCIE legacy INTA/BC/D interrupts" "Not masked,Masked" textline " " setclrfld.long 0x00 19. 0x08 19. 0x04 19. " SRC19 ,Pcie_msi[1]=pcie interrupt for MSI vectors 63 to 32" "Not masked,Masked" setclrfld.long 0x00 18. 0x08 18. 0x04 18. " SRC18 ,Pcie_msi[0]=pcie interrupt for MSI vectors 31 to 0" "Not masked,Masked" setclrfld.long 0x00 17. 0x08 17. 0x04 17. " SRC17 ,FPD top level watch dog timer interrupt" "Not masked,Masked" setclrfld.long 0x00 16. 0x08 16. 0x04 16. " SRC16 ,DDR controller subsystem interrupt" "Not masked,Masked" textline " " setclrfld.long 0x00 15. 0x08 15. 0x04 15. " SRC15 ,Bit 7 of PL_PS IRQ1" "Not masked,Masked" setclrfld.long 0x00 14. 0x08 14. 0x04 14. " SRC14 ,Bit 6 of PL_PS IRQ1" "Not masked,Masked" setclrfld.long 0x00 13. 0x08 13. 0x04 13. " SRC13 ,Bit 5 of PL_PS IRQ1" "Not masked,Masked" setclrfld.long 0x00 12. 0x08 12. 0x04 12. " SRC12 ,Bit 4 of PL_PS IRQ1" "Not masked,Masked" textline " " setclrfld.long 0x00 11. 0x08 11. 0x04 11. " SRC11 ,Bit 3 of PL_PS IRQ1" "Not masked,Masked" setclrfld.long 0x00 10. 0x08 10. 0x04 10. " SRC10 ,Bit 2 of PL_PS IRQ1" "Not masked,Masked" setclrfld.long 0x00 9. 0x08 9. 0x04 9. " SRC9 ,Bit 1 of PL_PS IRQ1" "Not masked,Masked" setclrfld.long 0x00 8. 0x08 8. 0x04 8. " SRC8 ,Bit 0 of PL_PS IRQ1" "Not masked,Masked" textline " " setclrfld.long 0x00 0. 0x08 0. 0x04 0. " SRC0 ,Bit 7 of PL_PS IRQ0" "Not masked,Masked" wgroup.long 0x804C++0x03 line.long 0x00 "GICP3_IRQ_TRIGGEER,Interrupt Trigger Register" bitfld.long 0x00 31. " SRC31 ,Interrupts from GDMA channel 3" "No effect,Trigger" bitfld.long 0x00 30. " SRC30 ,Interrupts from GDMA channel 2" "No effect,Trigger" bitfld.long 0x00 29. " SRC29 ,Interrupts from GDMA channel 1" "No effect,Trigger" bitfld.long 0x00 28. " SRC28 ,Interrupts from GDMA channel 0" "No effect,Trigger" textline " " bitfld.long 0x00 27. " SRC27 ,APM_FPD: or'd of all apms for FPD" "No effect,Trigger" bitfld.long 0x00 26. " SRC26 ,DPDMA interrupt" "No effect,Trigger" bitfld.long 0x00 25. " SRC25 ,ATB interrupt for FPD" "No effect,Trigger" bitfld.long 0x00 24. " SRC24 ,FPD_APB_INT: or'd of all APB interrupts from LPD" "No effect,Trigger" textline " " bitfld.long 0x00 23. " SRC23 ,Display port general purpose interrupt" "No effect,Trigger" bitfld.long 0x00 22. " SRC22 ,PCIE misc error etc interrupts" "No effect,Trigger" bitfld.long 0x00 21. " SRC21 ,PCIE bridge DMA interrupts" "No effect,Trigger" bitfld.long 0x00 20. " SRC20 ,PCIE legacy INTA/BC/D interrupts" "No effect,Trigger" textline " " bitfld.long 0x00 19. " SRC19 ,Pcie_msi[1]=pcie interrupt for MSI vectors 63 to 32" "No effect,Trigger" bitfld.long 0x00 18. " SRC18 ,Pcie_msi[0]=pcie interrupt for MSI vectors 31 to 0" "No effect,Trigger" bitfld.long 0x00 17. " SRC17 ,FPD top level watch dog timer interrupt" "No effect,Trigger" bitfld.long 0x00 16. " SRC16 ,DDR controller subsystem interrupt" "No effect,Trigger" textline " " bitfld.long 0x00 15. " SRC15 ,Bit 7 of PL_PS IRQ1" "No effect,Trigger" bitfld.long 0x00 14. " SRC14 ,Bit 6 of PL_PS IRQ1" "No effect,Trigger" bitfld.long 0x00 13. " SRC13 ,Bit 5 of PL_PS IRQ1" "No effect,Trigger" bitfld.long 0x00 12. " SRC12 ,Bit 4 of PL_PS IRQ1" "No effect,Trigger" textline " " bitfld.long 0x00 11. " SRC11 ,Bit 3 of PL_PS IRQ1" "No effect,Trigger" bitfld.long 0x00 10. " SRC10 ,Bit 2 of PL_PS IRQ1" "No effect,Trigger" bitfld.long 0x00 9. " SRC9 ,Bit 1 of PL_PS IRQ1" "No effect,Trigger" bitfld.long 0x00 8. " SRC8 ,Bit 0 of PL_PS IRQ1" "No effect,Trigger" textline " " bitfld.long 0x00 0. " SRC0 ,Bit 7 of PL_PS IRQ0" "No effect,Trigger" group.long 0x8050++0x03 line.long 0x00 "GICP4_IRQ_STATUS,Interrupt Status Register" eventfld.long 0x00 27. " SRC27 ,SMMU from int_fpd" "No interrupt,Interrupt" eventfld.long 0x00 26. " SRC26 ,CCI from int_fpd" "No interrupt,Interrupt" eventfld.long 0x00 25. " SRC25 ,REGS" "No interrupt,Interrupt" eventfld.long 0x00 24. " SRC24 ,EXTERR" "No interrupt,Interrupt" textline " " eventfld.long 0x00 23. " SRC23 ,EXT ERR" "No interrupt,Interrupt" eventfld.long 0x00 22. " SRC22 ,L2 error" "No interrupt,Interrupt" eventfld.long 0x00 21. " SRC21 ,L2 error" "No interrupt,Interrupt" eventfld.long 0x00 20. " SRC20 ,L2 error" "No interrupt,Interrupt" textline " " eventfld.long 0x00 19. " SRC19 ,L2 error" "No interrupt,Interrupt" eventfld.long 0x00 18. " SRC18 ,Performance monitor unit" "No interrupt,Interrupt" eventfld.long 0x00 17. " SRC17 ,Performance monitor unit" "No interrupt,Interrupt" eventfld.long 0x00 16. " SRC16 ,Performance monitor unit" "No interrupt,Interrupt" textline " " eventfld.long 0x00 15. " SRC15 ,Performance monitor unit" "No interrupt,Interrupt" eventfld.long 0x00 14. " SRC14 ,CTI" "No interrupt,Interrupt" eventfld.long 0x00 13. " SRC13 ,CTI" "No interrupt,Interrupt" eventfld.long 0x00 12. " SRC12 ,CTI" "No interrupt,Interrupt" textline " " eventfld.long 0x00 11. " SRC11 ,CTI" "No interrupt,Interrupt" eventfld.long 0x00 10. " SRC10 ,VCPUMT" "No interrupt,Interrupt" eventfld.long 0x00 9. " SRC9 ,VCPUMT" "No interrupt,Interrupt" eventfld.long 0x00 8. " SRC8 ,VCPUMT" "No interrupt,Interrupt" textline " " eventfld.long 0x00 7. " SRC7 ,VCPUMT" "No interrupt,Interrupt" eventfld.long 0x00 6. " SRC6 ,XMPU error interrupt for all of FPD" "No interrupt,Interrupt" eventfld.long 0x00 5. " SRC5 ,SATA controller interrupt" "No interrupt,Interrupt" eventfld.long 0x00 4. " SRC4 ,GPU interrupts" "No interrupt,Interrupt" textline " " eventfld.long 0x00 3. " SRC3 ,Interrupts from GDMA channel 7" "No interrupt,Interrupt" eventfld.long 0x00 2. " SRC2 ,Interrupts from GDMA channel 6" "No interrupt,Interrupt" eventfld.long 0x00 1. " SRC1 ,Interrupts from GDMA channel 5" "No interrupt,Interrupt" eventfld.long 0x00 0. " SRC0 ,Interrupts from GDMA channel 4" "No interrupt,Interrupt" group.long 0x8054++0x03 line.long 0x00 "GICP4_IRQ_MASK_SET/CLR,Interrupt Mask Register" setclrfld.long 0x00 27. 0x08 27. 0x04 27. " SRC27 ,SMMU from int_fpd" "Not masked,Masked" setclrfld.long 0x00 26. 0x08 26. 0x04 26. " SRC26 ,CCI from int_fpd" "Not masked,Masked" setclrfld.long 0x00 25. 0x08 25. 0x04 25. " SRC25 ,REGS" "Not masked,Masked" setclrfld.long 0x00 24. 0x08 24. 0x04 24. " SRC24 ,EXTERR" "Not masked,Masked" textline " " setclrfld.long 0x00 23. 0x08 23. 0x04 23. " SRC23 ,EXT ERR" "Not masked,Masked" setclrfld.long 0x00 22. 0x08 22. 0x04 22. " SRC22 ,L2 error" "Not masked,Masked" setclrfld.long 0x00 21. 0x08 21. 0x04 21. " SRC21 ,L2 error" "Not masked,Masked" setclrfld.long 0x00 20. 0x08 20. 0x04 20. " SRC20 ,L2 error" "Not masked,Masked" textline " " setclrfld.long 0x00 19. 0x08 19. 0x04 19. " SRC19 ,L2 error" "Not masked,Masked" setclrfld.long 0x00 18. 0x08 18. 0x04 18. " SRC18 ,Performance monitor unit" "Not masked,Masked" setclrfld.long 0x00 17. 0x08 17. 0x04 17. " SRC17 ,Performance monitor unit" "Not masked,Masked" setclrfld.long 0x00 16. 0x08 16. 0x04 16. " SRC16 ,Performance monitor unit" "Not masked,Masked" textline " " setclrfld.long 0x00 15. 0x08 15. 0x04 15. " SRC15 ,Performance monitor unit" "Not masked,Masked" setclrfld.long 0x00 14. 0x08 14. 0x04 14. " SRC14 ,CTI" "Not masked,Masked" setclrfld.long 0x00 13. 0x08 13. 0x04 13. " SRC13 ,CTI" "Not masked,Masked" setclrfld.long 0x00 12. 0x08 12. 0x04 12. " SRC12 ,CTI" "Not masked,Masked" textline " " setclrfld.long 0x00 11. 0x08 11. 0x04 11. " SRC11 ,CTI" "Not masked,Masked" setclrfld.long 0x00 10. 0x08 10. 0x04 10. " SRC10 ,VCPUMT" "Not masked,Masked" setclrfld.long 0x00 9. 0x08 9. 0x04 9. " SRC9 ,VCPUMT" "Not masked,Masked" setclrfld.long 0x00 8. 0x08 8. 0x04 8. " SRC8 ,VCPUMT" "Not masked,Masked" textline " " setclrfld.long 0x00 7. 0x08 7. 0x04 7. " SRC7 ,VCPUMT" "Not masked,Masked" setclrfld.long 0x00 6. 0x08 6. 0x04 6. " SRC6 ,XMPU error interrupt for all of FPD" "Not masked,Masked" setclrfld.long 0x00 5. 0x08 5. 0x04 5. " SRC5 ,SATA controller interrupt" "Not masked,Masked" setclrfld.long 0x00 4. 0x08 4. 0x04 4. " SRC4 ,GPU interrupts" "Not masked,Masked" textline " " setclrfld.long 0x00 3. 0x08 3. 0x04 3. " SRC3 ,Interrupts from GDMA channel 7" "Not masked,Masked" setclrfld.long 0x00 2. 0x08 2. 0x04 2. " SRC2 ,Interrupts from GDMA channel 6" "Not masked,Masked" setclrfld.long 0x00 1. 0x08 1. 0x04 1. " SRC1 ,Interrupts from GDMA channel 5" "Not masked,Masked" setclrfld.long 0x00 0. 0x08 0. 0x04 0. " SRC0 ,Interrupts from GDMA channel 4" "Not masked,Masked" wgroup.long 0x8060++0x03 line.long 0x00 "GICP4_IRQ_RIGGER,Interrupt Trigger Register" bitfld.long 0x00 27. " SRC27 ,SMMU from int_fpd" "No effect,Trigger" bitfld.long 0x00 26. " SRC26 ,CCI from int_fpd" "No effect,Trigger" bitfld.long 0x00 25. " SRC25 ,REGS" "No effect,Trigger" bitfld.long 0x00 24. " SRC24 ,EXTERR" "No effect,Trigger" textline " " bitfld.long 0x00 23. " SRC23 ,EXT ERR" "No effect,Trigger" bitfld.long 0x00 22. " SRC22 ,L2 error" "No effect,Trigger" bitfld.long 0x00 21. " SRC21 ,L2 error" "No effect,Trigger" bitfld.long 0x00 20. " SRC20 ,L2 error" "No effect,Trigger" textline " " bitfld.long 0x00 19. " SRC19 ,L2 error" "No effect,Trigger" bitfld.long 0x00 18. " SRC18 ,Performance monitor unit" "No effect,Trigger" bitfld.long 0x00 17. " SRC17 ,Performance monitor unit" "No effect,Trigger" bitfld.long 0x00 16. " SRC16 ,Performance monitor unit" "No effect,Trigger" textline " " bitfld.long 0x00 15. " SRC15 ,Performance monitor unit" "No effect,Trigger" bitfld.long 0x00 14. " SRC14 ,CTI" "No effect,Trigger" bitfld.long 0x00 13. " SRC13 ,CTI" "No effect,Trigger" bitfld.long 0x00 12. " SRC12 ,CTI" "No effect,Trigger" textline " " bitfld.long 0x00 11. " SRC11 ,CTI" "No effect,Trigger" bitfld.long 0x00 10. " SRC10 ,VCPUMT" "No effect,Trigger" bitfld.long 0x00 9. " SRC9 ,VCPUMT" "No effect,Trigger" bitfld.long 0x00 8. " SRC8 ,VCPUMT" "No effect,Trigger" textline " " bitfld.long 0x00 7. " SRC7 ,VCPUMT" "No effect,Trigger" bitfld.long 0x00 6. " SRC6 ,XMPU error interrupt for all of FPD" "No effect,Trigger" bitfld.long 0x00 5. " SRC5 ,SATA controller interrupt" "No effect,Trigger" bitfld.long 0x00 4. " SRC4 ,GPU interrupts" "No effect,Trigger" textline " " bitfld.long 0x00 3. " SRC3 ,Interrupts from GDMA channel 7" "No effect,Trigger" bitfld.long 0x00 2. " SRC2 ,Interrupts from GDMA channel 6" "No effect,Trigger" bitfld.long 0x00 1. " SRC1 ,Interrupts from GDMA channel 5" "No effect,Trigger" bitfld.long 0x00 0. " SRC0 ,Interrupts from GDMA channel 4" "No effect,Trigger" group.long 0x80A0++0x03 line.long 0x00 "GICP_PMU_IRQ_STATUS,Interrupt Status Register" eventfld.long 0x00 4. " SRC4 ,Create single interrupt source for PMU from GICP4" "No interrupt,Interrupt" eventfld.long 0x00 3. " SRC3 ,Create single interrupt source for PMU from GICP3" "No interrupt,Interrupt" eventfld.long 0x00 2. " SRC2 ,Create single interrupt source for PMU from GICP2" "No interrupt,Interrupt" eventfld.long 0x00 1. " SRC1 ,Create single interrupt source for PMU from GICP1" "No interrupt,Interrupt" textline " " eventfld.long 0x00 0. " SRC0 ,Create single interrupt source for PMU from GICP0" "No interrupt,Interrupt" group.long 0x80A4++0x03 line.long 0x00 "GICP_PMU_IRQ_MASK_SET/CLR,Interrupt Mask Register" setclrfld.long 0x00 4. 0x08 4. 0x04 4. " SRC4 ,Create single interrupt source for PMU from GICP4" "Not masked,Masked" setclrfld.long 0x00 3. 0x08 3. 0x04 3. " SRC3 ,Create single interrupt source for PMU from GICP3" "Not masked,Masked" setclrfld.long 0x00 2. 0x08 2. 0x04 2. " SRC2 ,Create single interrupt source for PMU from GICP2" "Not masked,Masked" setclrfld.long 0x00 1. 0x08 1. 0x04 1. " SRC1 ,Create single interrupt source for PMU from GICP1" "Not masked,Masked" textline " " setclrfld.long 0x00 0. 0x08 0. 0x04 0. " SRC0 ,Create single interrupt source for PMU from GICP0" "Not masked,Masked" wgroup.long 0x80B0++0x03 line.long 0x00 "GICP_PMU_IRQ_TRIGGER,Interrupt Trigger Register" bitfld.long 0x00 4. " SRC4 ,Create single interrupt source for PMU from GICP4" "No effect,Trigger" bitfld.long 0x00 3. " SRC3 ,Create single interrupt source for PMU from GICP3" "No effect,Trigger" bitfld.long 0x00 2. " SRC2 ,Create single interrupt source for PMU from GICP2" "No effect,Trigger" bitfld.long 0x00 1. " SRC1 ,Create single interrupt source for PMU from GICP1" "No effect,Trigger" textline " " bitfld.long 0x00 0. " SRC0 ,Create single interrupt source for PMU from GICP0" "No effect,Trigger" textline " " group.word 0x9000++0x01 line.word 0x00 "AFI_FS,AFI FS SLCR Control Register" bitfld.word 0x00 8.--9. " DW_SS2_SEL ,Data width selection for the slave 0" "32-bit,64-bit,128-bit,?..." group.long 0xA000++0x0B line.long 0x00 "LPD_CCI,CCI Configuration Register" bitfld.long 0x00 27. " QVNVNETS4 ,Virtual network # for slave port 4 PL ACE" "0,1" bitfld.long 0x00 26. " QVNVNETS3 ,Virtual network # for slave port 3 APU" "0,1" bitfld.long 0x00 25. " QVNVNETS2 ,Virtual network # for slave port 2 LPD masters" "0,1" bitfld.long 0x00 24. " QVNVNETS1 ,Virtual network # for slave port 1 FPD masters other than AFIFM0 and AFIFM1" "0,1" textline " " bitfld.long 0x00 23. " QVNVNETS0 ,Virtual network # for slave port 0 AFIFM0 and AFIFM1" "0,1" bitfld.long 0x00 18.--22. " QOSOVERRIDE ,QOS override enable" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 17. " QVNENABLE_M2 ,QVN enable for master port 2" "Disabled,Enabled" bitfld.long 0x00 16. " QVNENABLE_M1 ,QVN enable for master port 1" "Disabled,Enabled" textline " " bitfld.long 0x00 13.--15. " STRIPING_GRANULE ,Sets the stripe granule size for regions devined as striping between interfaces M1 and M2" "4KB,128B,256B,512B,1KB,2KB,?..." bitfld.long 0x00 12. " ACCHANNELEN4 ,Enable snoop and DVM messages on PL ACE interface" "Disabled,Enabled" bitfld.long 0x00 11. " ACCHANNELEN3 ,Enable snoop and DVM messages on APU ACE interface" "Disabled,Enabled" bitfld.long 0x00 10. " ACCHANNELEN0 ,Enable DVM transactions to SMMU" "Disabled,Enabled" textline " " bitfld.long 0x00 6.--9. " ECOREVNUM ,ECO revision number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 5. " ASA2 ,Enable splitting of all transactions into 64byte transactions at slave interface 2" "Disabled,Enabled" bitfld.long 0x00 4. " ASA1 ,Enable splitting of all transactions into 64byte transactions at slave interface 1" "Disabled,Enabled" bitfld.long 0x00 3. " ASA0 ,Enable splitting of all transactions into 64byte transactions at slave interface 0" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " OWO2 ,Enable ordered write observation on slave port 2" "Disabled,Enabled" bitfld.long 0x00 1. " OWO1 ,Enable ordered write observation on slave port 1" "Disabled,Enabled" bitfld.long 0x00 0. " OWO0 ,Enable ordered write observation on slave port 0" "Disabled,Enabled" line.long 0x04 "LPD_CCI_ADDRMAP,Address Decode Per CCI Region Register" bitfld.long 0x04 30.--31. " ADDRMAP15 ,Address decode for region 15 of the address map of CCI" "M0,M1,M2,M1 and M2" bitfld.long 0x04 28.--29. " ADDRMAP14 ,Address decode for region 14 of the address map of CCI" "M0,M1,M2,M1 and M2" bitfld.long 0x04 26.--27. " ADDRMAP13 ,Address decode for region 13 of the address map of CCI" "M0,M1,M2,M1 and M2" bitfld.long 0x04 24.--25. " ADDRMAP12 ,Address decode for region 12 of the address map of CCI" "M0,M1,M2,M1 and M2" textline " " bitfld.long 0x04 22.--23. " ADDRMAP11 ,Address decode for region 11 of the address map of CCI" "M0,M1,M2,M1 and M2" bitfld.long 0x04 20.--21. " ADDRMAP10 ,Address decode for region 10 of the address map of CCI" "M0,M1,M2,M1 and M2" bitfld.long 0x04 18.--19. " ADDRMAP9 ,Address decode for region 9 of the address map of CCI" "M0,M1,M2,M1 and M2" bitfld.long 0x04 16.--17. " ADDRMAP8 ,Address decode for region 8 of the address map of CCI" "M0,M1,M2,M1 and M2" textline " " bitfld.long 0x04 14.--15. " ADDRMAP7 ,Address decode for region 7 of the address map of CCI" "M0,M1,M2,M1 and M2" bitfld.long 0x04 12.--13. " ADDRMAP6 ,Address decode for region 6 of the address map of CCI" "M0,M1,M2,M1 and M2" bitfld.long 0x04 10.--11. " ADDRMAP5 ,Address decode for region 5 of the address map of CCI" "M0,M1,M2,M1 and M2" bitfld.long 0x04 8.--9. " ADDRMAP4 ,Address decode for region 4 of the address map of CCI" "M0,M1,M2,M1 and M2" textline " " bitfld.long 0x04 6.--7. " ADDRMAP3 ,Address decode for region 3 of the address map of CCI" "M0,M1,M2,M1 and M2" bitfld.long 0x04 4.--5. " ADDRMAP2 ,Address decode for region 2 of the address map of CCI" "M0,M1,M2,M1 and M2" bitfld.long 0x04 2.--3. " ADDRMAP1 ,Address decode for region 1 of the address map of CCI" "M0,M1,M2,M1 and M2" bitfld.long 0x04 0.--1. " ADDRMAP0 ,Address decode for region 0 of the address map of CCI" "M0,M1,M2,M1 and M2" line.long 0x08 "LPD_CCI_QVNPREALLOC,QVN Preallocation Configuration Register" bitfld.long 0x08 20.--23. " WM2 ,Write token preallocation for master port 2 to DDR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 16.--19. " WM1 ,Write token preallocation for master port 1 to DDR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 8.--11. " RM2 ,Read token preallocation for master port 2 to DDR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 4.--7. " RM1 ,Read token preallocation for master port 1 to DDR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0xA020++0x03 line.long 0x00 "LPD_SMMU,SMMU Configuration Register" bitfld.long 0x00 7. " INTEG_SEC_OVERRIDE ,Integration registers access by the non-secure transactions" "Disabled,Enabled" bitfld.long 0x00 6. " CTTW ,Coherent page table walks support" "Not supported,Supported" bitfld.long 0x00 5. " SYSBARDISABLE_TBU5 ,Enable barrier support for TBU5" "Disabled,Enabled" bitfld.long 0x00 4. " SYSBARDISABLE_TBU4 ,Enable barrier support for TBU4" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " SYSBARDISABLE_TBU3 ,Enable barrier support for TBU3" "Disabled,Enabled" bitfld.long 0x00 2. " SYSBARDISABLE_TBU2 ,Enable barrier support for TBU2" "Disabled,Enabled" bitfld.long 0x00 1. " SYSBARDISABLE_TBU1 ,Enable barrier support for TBU1" "Disabled,Enabled" bitfld.long 0x00 0. " SYSBARDISABLE_TBU0 ,Enable barrier support for TBU0" "Disabled,Enabled" group.long 0xA040++0x03 line.long 0x00 "LPD_APU,APU Configuration Register" bitfld.long 0x00 3. " BRDC_BARRIER ,Enable broadcasting of barriers onto the system bus" "Disabled,Enabled" bitfld.long 0x00 2. " BRDC_CMNT ,Enable broadcasting of cache maintenance operations to downstream caches" "Disabled,Enabled" bitfld.long 0x00 1. " BRDC_INNER ,Enable broadcasting of inner shareable transactions" "Disabled,Enabled" bitfld.long 0x00 0. " BRDC_OUTER ,Enable broadcasting of outer shareable trasnactions" "Disabled,Enabled" width 0x0B tree.end tree "LPD_SLCR_SECURE (Secure Low Power Domain SLCR)" base ad:0xFF4B0000 width 13. group.byte 0x04++0x00 line.byte 0x00 "CFG,General Control Register For The LP SLCR" bitfld.byte 0x00 0. " SLVERR_ENABLE ,SLVERR enable/disable" "Disabled,Enabled" group.byte 0x08++0x00 line.byte 0x00 "ISR,Interrupt Status Register" eventfld.byte 0x00 0. " ADDR_DECODE_ERR ,Status for an address decode error" "No error,Error" group.byte 0x0C++0x00 line.byte 0x00 "IMR_SET/CLR,Interrupt Mask Register" setclrfld.byte 0x00 0. 0x08 0. 0x04 0. " ADDR_DECODE_ERR ,Mask for an address decode error" "Not masked,Masked" wgroup.byte 0x18++0x00 line.byte 0x00 "ITR,Interrupt Trigger Register" bitfld.byte 0x00 0. " ADDR_DECODE_ERR ,Trigger an address decode error interrupt" "No effect,Trigger" group.byte 0x20++0x00 line.byte 0x00 "SLCR_RPU,RPU TrustZone Settings Register" bitfld.byte 0x00 1. " TZ_R5_1 ,TrustZone classification for R5_1" "Secure,Non-secure" bitfld.byte 0x00 0. " TZ_R5_0 ,TrustZone classification for R5_0" "Secure,Non-secure" group.byte 0x24++0x00 line.byte 0x00 "SLCR_ADMA,RPU TrustZone Settings Register" group.long 0x30++0x03 line.long 0x00 "SAFETY_CHK,Safety Endpoint Connectivity Check Register" group.byte 0x34++0x00 line.byte 0x00 "SLCR_RPU,RPU TrustZone Settings Register" bitfld.byte 0x00 1. " TZ_USB3_1 ,TrustZone classification for USB3_1" "Secure,Non-secure" bitfld.byte 0x00 0. " TZ_USB3_0 ,TrustZone classification for USB3_0" "Secure,Non-secure" width 0x0B tree.end tree "LPD_XPPU (XPPU Module)" base ad:0xFF980000 width 18. group.long 0x00++0x03 line.long 0x00 "CTRL,XPPU Control Register" bitfld.long 0x00 2. " APER_PARITY_EN ,Aperture permission RAM parity enable" "Disabled,Enabled" bitfld.long 0x00 1. " MID_PARITY_EN ,Master ID register parity enable" "Disabled,Enabled" bitfld.long 0x00 0. " ENABLE ,Enable XPPU permission checking" "Disabled,Enabled" rgroup.long 0x04++0x0B line.long 0x00 "ERR_STATUS1,XPPU Error Status Register 1" hexmask.long.tbyte 0x00 0.--19. 1. " AXI_ADDR ,Address bits [31:12] of the first poisoned request" line.long 0x04 "ERR_STATUS2,XPPU Error Status Register 2" hexmask.long.word 0x04 0.--9. 1. " AXI_ID ,Master ID of the first poisoned request" line.long 0x08 "POISON,XPPU Poison Address Register" hexmask.long.tbyte 0x08 0.--19. 1. " BASE ,Poisoned base address 4KB aligned bits [31:12]" group.long 0x10++0x03 line.long 0x00 "ISR,Interrupt Status Register" eventfld.long 0x00 7. " APER_PARITY ,An aperture permission RAM parity occurred" "Not occurred,Occurred" eventfld.long 0x00 6. " APER_TZ ,A trustzone violation occurred" "Not occurred,Occurred" eventfld.long 0x00 5. " APER_PERM ,A permission violation occurred" "Not occurred,Occurred" eventfld.long 0x00 3. " MID_PARITY ,A master ID register parity error is detected" "Not detected,Detected" textline " " eventfld.long 0x00 2. " MID_RO ,A read-only violation occurred" "Not occurred,Occurred" eventfld.long 0x00 1. " MID_MISS ,A MID lookup miss occurred" "Not occurred,Occurred" eventfld.long 0x00 0. " INV_APB ,APB register access occurs to an unimplemented register" "Not occurred,Occurred" group.long 0x14++0x03 line.long 0x00 "IMR_SET/CLR,Interrupt Mask Register" setclrfld.long 0x00 7. 0x08 7. 0x04 7. " APER_PARITY ,An aperture permission RAM parity occurred" "Not masked,Masked" setclrfld.long 0x00 6. 0x08 6. 0x04 6. " APER_TZ ,A trustzone violation occurred" "Not masked,Masked" setclrfld.long 0x00 5. 0x08 5. 0x04 5. " APER_PERM ,A permission violation occurred" "Not masked,Masked" setclrfld.long 0x00 3. 0x08 3. 0x04 3. " MID_PARITY ,A master ID register parity error is detected" "Not masked,Masked" textline " " setclrfld.long 0x00 2. 0x08 2. 0x04 2. " MID_RO ,A read-only violation occurred" "Not masked,Masked" setclrfld.long 0x00 1. 0x08 1. 0x04 1. " MID_MISS ,A MID lookup miss occurred" "Not masked,Masked" setclrfld.long 0x00 0. 0x08 0. 0x04 0. " INV_APB ,APB register access occurs to an unimplemented register" "Not masked,Masked" rgroup.long 0x3C++0x23 line.long 0x00 "M_MASTER_IDS,Number Of Supported Master Ids Register" line.long 0x04 "M_APERTURE_32B,Number Of Supported 32B Apertures Register" line.long 0x08 "M_APERTURE_64KB,Number Of Supported 64KB Apertures Register" line.long 0x0C "M_APERTURE_1MB,Number Of Supported 1MB Apertures Register" line.long 0x10 "M_APERTURE_512MB,Number Of Supported 512MB Apertures Register" line.long 0x14 "BASE_32B,32B Aperture Group Base Address Register" line.long 0x18 "BASE_64KB,64KB Aperture Group Base Address Register" line.long 0x1C "BASE_1MB,1MB Aperture Group Base Address Register" line.long 0x20 "BASE_512MB,512MB Aperture Group Base Address Register" group.long 0x100++0x03 line.long 0x00 "MASTER_ID00,Master ID 00 Register" bitfld.long 0x00 31. " MIDP ,Parity of all non-reserved fields i.e. MIDR, MIDM, MID" "0,1" bitfld.long 0x00 30. " MIDR ,Allow only read transactions for the masters matching this register" "All,Read only" hexmask.long.word 0x00 16.--25. 1. " MIDM ,Mask to be applied before comparing" hexmask.long.word 0x00 0.--9. 1. " MID ,Predefined master ID" group.long 0x104++0x03 line.long 0x00 "MASTER_ID01,Master ID 01 Register" bitfld.long 0x00 31. " MIDP ,Parity of all non-reserved fields i.e. MIDR, MIDM, MID" "0,1" bitfld.long 0x00 30. " MIDR ,Allow only read transactions for the masters matching this register" "All,Read only" hexmask.long.word 0x00 16.--25. 1. " MIDM ,Mask to be applied before comparing" hexmask.long.word 0x00 0.--9. 1. " MID ,Predefined master ID" group.long 0x108++0x03 line.long 0x00 "MASTER_ID02,Master ID 02 Register" bitfld.long 0x00 31. " MIDP ,Parity of all non-reserved fields i.e. MIDR, MIDM, MID" "0,1" bitfld.long 0x00 30. " MIDR ,Allow only read transactions for the masters matching this register" "All,Read only" hexmask.long.word 0x00 16.--25. 1. " MIDM ,Mask to be applied before comparing" hexmask.long.word 0x00 0.--9. 1. " MID ,Predefined master ID" group.long 0x10C++0x03 line.long 0x00 "MASTER_ID03,Master ID 03 Register" bitfld.long 0x00 31. " MIDP ,Parity of all non-reserved fields i.e. MIDR, MIDM, MID" "0,1" bitfld.long 0x00 30. " MIDR ,Allow only read transactions for the masters matching this register" "All,Read only" hexmask.long.word 0x00 16.--25. 1. " MIDM ,Mask to be applied before comparing" hexmask.long.word 0x00 0.--9. 1. " MID ,Predefined master ID" group.long 0x110++0x03 line.long 0x00 "MASTER_ID04,Master ID 04 Register" bitfld.long 0x00 31. " MIDP ,Parity of all non-reserved fields i.e. MIDR, MIDM, MID" "0,1" bitfld.long 0x00 30. " MIDR ,Allow only read transactions for the masters matching this register" "All,Read only" hexmask.long.word 0x00 16.--25. 1. " MIDM ,Mask to be applied before comparing" hexmask.long.word 0x00 0.--9. 1. " MID ,Predefined master ID" group.long 0x114++0x03 line.long 0x00 "MASTER_ID05,Master ID 05 Register" bitfld.long 0x00 31. " MIDP ,Parity of all non-reserved fields i.e. MIDR, MIDM, MID" "0,1" bitfld.long 0x00 30. " MIDR ,Allow only read transactions for the masters matching this register" "All,Read only" hexmask.long.word 0x00 16.--25. 1. " MIDM ,Mask to be applied before comparing" hexmask.long.word 0x00 0.--9. 1. " MID ,Predefined master ID" group.long 0x118++0x03 line.long 0x00 "MASTER_ID06,Master ID 06 Register" bitfld.long 0x00 31. " MIDP ,Parity of all non-reserved fields i.e. MIDR, MIDM, MID" "0,1" bitfld.long 0x00 30. " MIDR ,Allow only read transactions for the masters matching this register" "All,Read only" hexmask.long.word 0x00 16.--25. 1. " MIDM ,Mask to be applied before comparing" hexmask.long.word 0x00 0.--9. 1. " MID ,Predefined master ID" group.long 0x11C++0x03 line.long 0x00 "MASTER_ID07,Master ID 07 Register" bitfld.long 0x00 31. " MIDP ,Parity of all non-reserved fields i.e. MIDR, MIDM, MID" "0,1" bitfld.long 0x00 30. " MIDR ,Allow only read transactions for the masters matching this register" "All,Read only" hexmask.long.word 0x00 16.--25. 1. " MIDM ,Mask to be applied before comparing" hexmask.long.word 0x00 0.--9. 1. " MID ,Predefined master ID" group.long 0x120++0x03 line.long 0x00 "MASTER_ID08,Master ID 08 Register" bitfld.long 0x00 31. " MIDP ,Parity of all non-reserved fields i.e. MIDR, MIDM, MID" "0,1" bitfld.long 0x00 30. " MIDR ,Allow only read transactions for the masters matching this register" "All,Read only" hexmask.long.word 0x00 16.--25. 1. " MIDM ,Mask to be applied before comparing" hexmask.long.word 0x00 0.--9. 1. " MID ,Predefined master ID" group.long 0x124++0x03 line.long 0x00 "MASTER_ID09,Master ID 09 Register" bitfld.long 0x00 31. " MIDP ,Parity of all non-reserved fields i.e. MIDR, MIDM, MID" "0,1" bitfld.long 0x00 30. " MIDR ,Allow only read transactions for the masters matching this register" "All,Read only" hexmask.long.word 0x00 16.--25. 1. " MIDM ,Mask to be applied before comparing" hexmask.long.word 0x00 0.--9. 1. " MID ,Predefined master ID" group.long 0x128++0x03 line.long 0x00 "MASTER_ID10,Master ID 10 Register" bitfld.long 0x00 31. " MIDP ,Parity of all non-reserved fields i.e. MIDR, MIDM, MID" "0,1" bitfld.long 0x00 30. " MIDR ,Allow only read transactions for the masters matching this register" "All,Read only" hexmask.long.word 0x00 16.--25. 1. " MIDM ,Mask to be applied before comparing" hexmask.long.word 0x00 0.--9. 1. " MID ,Predefined master ID" group.long 0x12C++0x03 line.long 0x00 "MASTER_ID11,Master ID 11 Register" bitfld.long 0x00 31. " MIDP ,Parity of all non-reserved fields i.e. MIDR, MIDM, MID" "0,1" bitfld.long 0x00 30. " MIDR ,Allow only read transactions for the masters matching this register" "All,Read only" hexmask.long.word 0x00 16.--25. 1. " MIDM ,Mask to be applied before comparing" hexmask.long.word 0x00 0.--9. 1. " MID ,Predefined master ID" group.long 0x130++0x03 line.long 0x00 "MASTER_ID12,Master ID 12 Register" bitfld.long 0x00 31. " MIDP ,Parity of all non-reserved fields i.e. MIDR, MIDM, MID" "0,1" bitfld.long 0x00 30. " MIDR ,Allow only read transactions for the masters matching this register" "All,Read only" hexmask.long.word 0x00 16.--25. 1. " MIDM ,Mask to be applied before comparing" hexmask.long.word 0x00 0.--9. 1. " MID ,Predefined master ID" group.long 0x134++0x03 line.long 0x00 "MASTER_ID13,Master ID 13 Register" bitfld.long 0x00 31. " MIDP ,Parity of all non-reserved fields i.e. MIDR, MIDM, MID" "0,1" bitfld.long 0x00 30. " MIDR ,Allow only read transactions for the masters matching this register" "All,Read only" hexmask.long.word 0x00 16.--25. 1. " MIDM ,Mask to be applied before comparing" hexmask.long.word 0x00 0.--9. 1. " MID ,Predefined master ID" group.long 0x138++0x03 line.long 0x00 "MASTER_ID14,Master ID 14 Register" bitfld.long 0x00 31. " MIDP ,Parity of all non-reserved fields i.e. MIDR, MIDM, MID" "0,1" bitfld.long 0x00 30. " MIDR ,Allow only read transactions for the masters matching this register" "All,Read only" hexmask.long.word 0x00 16.--25. 1. " MIDM ,Mask to be applied before comparing" hexmask.long.word 0x00 0.--9. 1. " MID ,Predefined master ID" group.long 0x13C++0x03 line.long 0x00 "MASTER_ID15,Master ID 15 Register" bitfld.long 0x00 31. " MIDP ,Parity of all non-reserved fields i.e. MIDR, MIDM, MID" "0,1" bitfld.long 0x00 30. " MIDR ,Allow only read transactions for the masters matching this register" "All,Read only" hexmask.long.word 0x00 16.--25. 1. " MIDM ,Mask to be applied before comparing" hexmask.long.word 0x00 0.--9. 1. " MID ,Predefined master ID" group.long 0x140++0x03 line.long 0x00 "MASTER_ID16,Master ID 16 Register" bitfld.long 0x00 31. " MIDP ,Parity of all non-reserved fields i.e. MIDR, MIDM, MID" "0,1" bitfld.long 0x00 30. " MIDR ,Allow only read transactions for the masters matching this register" "All,Read only" hexmask.long.word 0x00 16.--25. 1. " MIDM ,Mask to be applied before comparing" hexmask.long.word 0x00 0.--9. 1. " MID ,Predefined master ID" group.long 0x144++0x03 line.long 0x00 "MASTER_ID17,Master ID 17 Register" bitfld.long 0x00 31. " MIDP ,Parity of all non-reserved fields i.e. MIDR, MIDM, MID" "0,1" bitfld.long 0x00 30. " MIDR ,Allow only read transactions for the masters matching this register" "All,Read only" hexmask.long.word 0x00 16.--25. 1. " MIDM ,Mask to be applied before comparing" hexmask.long.word 0x00 0.--9. 1. " MID ,Predefined master ID" group.long 0x148++0x03 line.long 0x00 "MASTER_ID18,Master ID 18 Register" bitfld.long 0x00 31. " MIDP ,Parity of all non-reserved fields i.e. MIDR, MIDM, MID" "0,1" bitfld.long 0x00 30. " MIDR ,Allow only read transactions for the masters matching this register" "All,Read only" hexmask.long.word 0x00 16.--25. 1. " MIDM ,Mask to be applied before comparing" hexmask.long.word 0x00 0.--9. 1. " MID ,Predefined master ID" group.long 0x14C++0x03 line.long 0x00 "MASTER_ID19,Master ID 19 Register" bitfld.long 0x00 31. " MIDP ,Parity of all non-reserved fields i.e. MIDR, MIDM, MID" "0,1" bitfld.long 0x00 30. " MIDR ,Allow only read transactions for the masters matching this register" "All,Read only" hexmask.long.word 0x00 16.--25. 1. " MIDM ,Mask to be applied before comparing" hexmask.long.word 0x00 0.--9. 1. " MID ,Predefined master ID" width 15. tree "The Aperture Permission List Registers" group.long 0x1000++0x03 line.long 0x00 "APERPERM_000,Entry 000 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1004++0x03 line.long 0x00 "APERPERM_001,Entry 001 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1008++0x03 line.long 0x00 "APERPERM_002,Entry 002 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x100C++0x03 line.long 0x00 "APERPERM_003,Entry 003 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1010++0x03 line.long 0x00 "APERPERM_004,Entry 004 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1014++0x03 line.long 0x00 "APERPERM_005,Entry 005 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1018++0x03 line.long 0x00 "APERPERM_006,Entry 006 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x101C++0x03 line.long 0x00 "APERPERM_007,Entry 007 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1020++0x03 line.long 0x00 "APERPERM_008,Entry 008 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1024++0x03 line.long 0x00 "APERPERM_009,Entry 009 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1028++0x03 line.long 0x00 "APERPERM_010,Entry 010 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x102C++0x03 line.long 0x00 "APERPERM_011,Entry 011 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1030++0x03 line.long 0x00 "APERPERM_012,Entry 012 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1034++0x03 line.long 0x00 "APERPERM_013,Entry 013 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1038++0x03 line.long 0x00 "APERPERM_014,Entry 014 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x103C++0x03 line.long 0x00 "APERPERM_015,Entry 015 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1040++0x03 line.long 0x00 "APERPERM_016,Entry 016 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1044++0x03 line.long 0x00 "APERPERM_017,Entry 017 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1048++0x03 line.long 0x00 "APERPERM_018,Entry 018 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x104C++0x03 line.long 0x00 "APERPERM_019,Entry 019 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1050++0x03 line.long 0x00 "APERPERM_020,Entry 020 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1054++0x03 line.long 0x00 "APERPERM_021,Entry 021 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1058++0x03 line.long 0x00 "APERPERM_022,Entry 022 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x105C++0x03 line.long 0x00 "APERPERM_023,Entry 023 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1060++0x03 line.long 0x00 "APERPERM_024,Entry 024 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1064++0x03 line.long 0x00 "APERPERM_025,Entry 025 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1068++0x03 line.long 0x00 "APERPERM_026,Entry 026 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x106C++0x03 line.long 0x00 "APERPERM_027,Entry 027 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1070++0x03 line.long 0x00 "APERPERM_028,Entry 028 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1074++0x03 line.long 0x00 "APERPERM_029,Entry 029 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1078++0x03 line.long 0x00 "APERPERM_030,Entry 030 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x107C++0x03 line.long 0x00 "APERPERM_031,Entry 031 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1080++0x03 line.long 0x00 "APERPERM_032,Entry 032 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1084++0x03 line.long 0x00 "APERPERM_033,Entry 033 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1088++0x03 line.long 0x00 "APERPERM_034,Entry 034 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x108C++0x03 line.long 0x00 "APERPERM_035,Entry 035 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1090++0x03 line.long 0x00 "APERPERM_036,Entry 036 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1094++0x03 line.long 0x00 "APERPERM_037,Entry 037 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1098++0x03 line.long 0x00 "APERPERM_038,Entry 038 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x109C++0x03 line.long 0x00 "APERPERM_039,Entry 039 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x10A0++0x03 line.long 0x00 "APERPERM_040,Entry 040 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x10A4++0x03 line.long 0x00 "APERPERM_041,Entry 041 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x10A8++0x03 line.long 0x00 "APERPERM_042,Entry 042 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x10AC++0x03 line.long 0x00 "APERPERM_043,Entry 043 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x10B0++0x03 line.long 0x00 "APERPERM_044,Entry 044 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x10B4++0x03 line.long 0x00 "APERPERM_045,Entry 045 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x10B8++0x03 line.long 0x00 "APERPERM_046,Entry 046 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x10BC++0x03 line.long 0x00 "APERPERM_047,Entry 047 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x10C0++0x03 line.long 0x00 "APERPERM_048,Entry 048 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x10C4++0x03 line.long 0x00 "APERPERM_049,Entry 049 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x10C8++0x03 line.long 0x00 "APERPERM_050,Entry 050 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x10CC++0x03 line.long 0x00 "APERPERM_051,Entry 051 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x10D0++0x03 line.long 0x00 "APERPERM_052,Entry 052 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x10D4++0x03 line.long 0x00 "APERPERM_053,Entry 053 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x10D8++0x03 line.long 0x00 "APERPERM_054,Entry 054 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x10DC++0x03 line.long 0x00 "APERPERM_055,Entry 055 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x10E0++0x03 line.long 0x00 "APERPERM_056,Entry 056 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x10E4++0x03 line.long 0x00 "APERPERM_057,Entry 057 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x10E8++0x03 line.long 0x00 "APERPERM_058,Entry 058 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x10EC++0x03 line.long 0x00 "APERPERM_059,Entry 059 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x10F0++0x03 line.long 0x00 "APERPERM_060,Entry 060 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x10F4++0x03 line.long 0x00 "APERPERM_061,Entry 061 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x10F8++0x03 line.long 0x00 "APERPERM_062,Entry 062 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x10FC++0x03 line.long 0x00 "APERPERM_063,Entry 063 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1100++0x03 line.long 0x00 "APERPERM_064,Entry 064 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1104++0x03 line.long 0x00 "APERPERM_065,Entry 065 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1108++0x03 line.long 0x00 "APERPERM_066,Entry 066 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x110C++0x03 line.long 0x00 "APERPERM_067,Entry 067 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1110++0x03 line.long 0x00 "APERPERM_068,Entry 068 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1114++0x03 line.long 0x00 "APERPERM_069,Entry 069 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1118++0x03 line.long 0x00 "APERPERM_070,Entry 070 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x111C++0x03 line.long 0x00 "APERPERM_071,Entry 071 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1120++0x03 line.long 0x00 "APERPERM_072,Entry 072 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1124++0x03 line.long 0x00 "APERPERM_073,Entry 073 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1128++0x03 line.long 0x00 "APERPERM_074,Entry 074 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x112C++0x03 line.long 0x00 "APERPERM_075,Entry 075 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1130++0x03 line.long 0x00 "APERPERM_076,Entry 076 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1134++0x03 line.long 0x00 "APERPERM_077,Entry 077 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1138++0x03 line.long 0x00 "APERPERM_078,Entry 078 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x113C++0x03 line.long 0x00 "APERPERM_079,Entry 079 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1140++0x03 line.long 0x00 "APERPERM_080,Entry 080 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1144++0x03 line.long 0x00 "APERPERM_081,Entry 081 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1148++0x03 line.long 0x00 "APERPERM_082,Entry 082 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x114C++0x03 line.long 0x00 "APERPERM_083,Entry 083 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1150++0x03 line.long 0x00 "APERPERM_084,Entry 084 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1154++0x03 line.long 0x00 "APERPERM_085,Entry 085 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1158++0x03 line.long 0x00 "APERPERM_086,Entry 086 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x115C++0x03 line.long 0x00 "APERPERM_087,Entry 087 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1160++0x03 line.long 0x00 "APERPERM_088,Entry 088 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1164++0x03 line.long 0x00 "APERPERM_089,Entry 089 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1168++0x03 line.long 0x00 "APERPERM_090,Entry 090 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x116C++0x03 line.long 0x00 "APERPERM_091,Entry 091 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1170++0x03 line.long 0x00 "APERPERM_092,Entry 092 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1174++0x03 line.long 0x00 "APERPERM_093,Entry 093 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1178++0x03 line.long 0x00 "APERPERM_094,Entry 094 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x117C++0x03 line.long 0x00 "APERPERM_095,Entry 095 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1180++0x03 line.long 0x00 "APERPERM_096,Entry 096 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1184++0x03 line.long 0x00 "APERPERM_097,Entry 097 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1188++0x03 line.long 0x00 "APERPERM_098,Entry 098 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x118C++0x03 line.long 0x00 "APERPERM_099,Entry 099 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1190++0x03 line.long 0x00 "APERPERM_100,Entry 100 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1194++0x03 line.long 0x00 "APERPERM_101,Entry 101 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1198++0x03 line.long 0x00 "APERPERM_102,Entry 102 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x119C++0x03 line.long 0x00 "APERPERM_103,Entry 103 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x11A0++0x03 line.long 0x00 "APERPERM_104,Entry 104 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x11A4++0x03 line.long 0x00 "APERPERM_105,Entry 105 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x11A8++0x03 line.long 0x00 "APERPERM_106,Entry 106 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x11AC++0x03 line.long 0x00 "APERPERM_107,Entry 107 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x11B0++0x03 line.long 0x00 "APERPERM_108,Entry 108 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x11B4++0x03 line.long 0x00 "APERPERM_109,Entry 109 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x11B8++0x03 line.long 0x00 "APERPERM_110,Entry 110 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x11BC++0x03 line.long 0x00 "APERPERM_111,Entry 111 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x11C0++0x03 line.long 0x00 "APERPERM_112,Entry 112 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x11C4++0x03 line.long 0x00 "APERPERM_113,Entry 113 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x11C8++0x03 line.long 0x00 "APERPERM_114,Entry 114 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x11CC++0x03 line.long 0x00 "APERPERM_115,Entry 115 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x11D0++0x03 line.long 0x00 "APERPERM_116,Entry 116 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x11D4++0x03 line.long 0x00 "APERPERM_117,Entry 117 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x11D8++0x03 line.long 0x00 "APERPERM_118,Entry 118 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x11DC++0x03 line.long 0x00 "APERPERM_119,Entry 119 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x11E0++0x03 line.long 0x00 "APERPERM_120,Entry 120 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x11E4++0x03 line.long 0x00 "APERPERM_121,Entry 121 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x11E8++0x03 line.long 0x00 "APERPERM_122,Entry 122 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x11EC++0x03 line.long 0x00 "APERPERM_123,Entry 123 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x11F0++0x03 line.long 0x00 "APERPERM_124,Entry 124 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x11F4++0x03 line.long 0x00 "APERPERM_125,Entry 125 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x11F8++0x03 line.long 0x00 "APERPERM_126,Entry 126 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x11FC++0x03 line.long 0x00 "APERPERM_127,Entry 127 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1200++0x03 line.long 0x00 "APERPERM_128,Entry 128 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1204++0x03 line.long 0x00 "APERPERM_129,Entry 129 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1208++0x03 line.long 0x00 "APERPERM_130,Entry 130 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x120C++0x03 line.long 0x00 "APERPERM_131,Entry 131 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1210++0x03 line.long 0x00 "APERPERM_132,Entry 132 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1214++0x03 line.long 0x00 "APERPERM_133,Entry 133 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1218++0x03 line.long 0x00 "APERPERM_134,Entry 134 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x121C++0x03 line.long 0x00 "APERPERM_135,Entry 135 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1220++0x03 line.long 0x00 "APERPERM_136,Entry 136 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1224++0x03 line.long 0x00 "APERPERM_137,Entry 137 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1228++0x03 line.long 0x00 "APERPERM_138,Entry 138 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x122C++0x03 line.long 0x00 "APERPERM_139,Entry 139 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1230++0x03 line.long 0x00 "APERPERM_140,Entry 140 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1234++0x03 line.long 0x00 "APERPERM_141,Entry 141 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1238++0x03 line.long 0x00 "APERPERM_142,Entry 142 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x123C++0x03 line.long 0x00 "APERPERM_143,Entry 143 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1240++0x03 line.long 0x00 "APERPERM_144,Entry 144 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1244++0x03 line.long 0x00 "APERPERM_145,Entry 145 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1248++0x03 line.long 0x00 "APERPERM_146,Entry 146 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x124C++0x03 line.long 0x00 "APERPERM_147,Entry 147 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1250++0x03 line.long 0x00 "APERPERM_148,Entry 148 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1254++0x03 line.long 0x00 "APERPERM_149,Entry 149 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1258++0x03 line.long 0x00 "APERPERM_150,Entry 150 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x125C++0x03 line.long 0x00 "APERPERM_151,Entry 151 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1260++0x03 line.long 0x00 "APERPERM_152,Entry 152 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1264++0x03 line.long 0x00 "APERPERM_153,Entry 153 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1268++0x03 line.long 0x00 "APERPERM_154,Entry 154 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x126C++0x03 line.long 0x00 "APERPERM_155,Entry 155 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1270++0x03 line.long 0x00 "APERPERM_156,Entry 156 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1274++0x03 line.long 0x00 "APERPERM_157,Entry 157 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1278++0x03 line.long 0x00 "APERPERM_158,Entry 158 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x127C++0x03 line.long 0x00 "APERPERM_159,Entry 159 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1280++0x03 line.long 0x00 "APERPERM_160,Entry 160 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1284++0x03 line.long 0x00 "APERPERM_161,Entry 161 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1288++0x03 line.long 0x00 "APERPERM_162,Entry 162 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x128C++0x03 line.long 0x00 "APERPERM_163,Entry 163 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1290++0x03 line.long 0x00 "APERPERM_164,Entry 164 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1294++0x03 line.long 0x00 "APERPERM_165,Entry 165 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1298++0x03 line.long 0x00 "APERPERM_166,Entry 166 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x129C++0x03 line.long 0x00 "APERPERM_167,Entry 167 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x12A0++0x03 line.long 0x00 "APERPERM_168,Entry 168 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x12A4++0x03 line.long 0x00 "APERPERM_169,Entry 169 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x12A8++0x03 line.long 0x00 "APERPERM_170,Entry 170 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x12AC++0x03 line.long 0x00 "APERPERM_171,Entry 171 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x12B0++0x03 line.long 0x00 "APERPERM_172,Entry 172 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x12B4++0x03 line.long 0x00 "APERPERM_173,Entry 173 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x12B8++0x03 line.long 0x00 "APERPERM_174,Entry 174 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x12BC++0x03 line.long 0x00 "APERPERM_175,Entry 175 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x12C0++0x03 line.long 0x00 "APERPERM_176,Entry 176 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x12C4++0x03 line.long 0x00 "APERPERM_177,Entry 177 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x12C8++0x03 line.long 0x00 "APERPERM_178,Entry 178 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x12CC++0x03 line.long 0x00 "APERPERM_179,Entry 179 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x12D0++0x03 line.long 0x00 "APERPERM_180,Entry 180 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x12D4++0x03 line.long 0x00 "APERPERM_181,Entry 181 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x12D8++0x03 line.long 0x00 "APERPERM_182,Entry 182 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x12DC++0x03 line.long 0x00 "APERPERM_183,Entry 183 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x12E0++0x03 line.long 0x00 "APERPERM_184,Entry 184 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x12E4++0x03 line.long 0x00 "APERPERM_185,Entry 185 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x12E8++0x03 line.long 0x00 "APERPERM_186,Entry 186 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x12EC++0x03 line.long 0x00 "APERPERM_187,Entry 187 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x12F0++0x03 line.long 0x00 "APERPERM_188,Entry 188 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x12F4++0x03 line.long 0x00 "APERPERM_189,Entry 189 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x12F8++0x03 line.long 0x00 "APERPERM_190,Entry 190 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x12FC++0x03 line.long 0x00 "APERPERM_191,Entry 191 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1300++0x03 line.long 0x00 "APERPERM_192,Entry 192 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1304++0x03 line.long 0x00 "APERPERM_193,Entry 193 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1308++0x03 line.long 0x00 "APERPERM_194,Entry 194 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x130C++0x03 line.long 0x00 "APERPERM_195,Entry 195 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1310++0x03 line.long 0x00 "APERPERM_196,Entry 196 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1314++0x03 line.long 0x00 "APERPERM_197,Entry 197 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1318++0x03 line.long 0x00 "APERPERM_198,Entry 198 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x131C++0x03 line.long 0x00 "APERPERM_199,Entry 199 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1320++0x03 line.long 0x00 "APERPERM_200,Entry 200 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1324++0x03 line.long 0x00 "APERPERM_201,Entry 201 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1328++0x03 line.long 0x00 "APERPERM_202,Entry 202 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x132C++0x03 line.long 0x00 "APERPERM_203,Entry 203 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1330++0x03 line.long 0x00 "APERPERM_204,Entry 204 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1334++0x03 line.long 0x00 "APERPERM_205,Entry 205 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1338++0x03 line.long 0x00 "APERPERM_206,Entry 206 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x133C++0x03 line.long 0x00 "APERPERM_207,Entry 207 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1340++0x03 line.long 0x00 "APERPERM_208,Entry 208 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1344++0x03 line.long 0x00 "APERPERM_209,Entry 209 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1348++0x03 line.long 0x00 "APERPERM_210,Entry 210 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x134C++0x03 line.long 0x00 "APERPERM_211,Entry 211 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1350++0x03 line.long 0x00 "APERPERM_212,Entry 212 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1354++0x03 line.long 0x00 "APERPERM_213,Entry 213 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1358++0x03 line.long 0x00 "APERPERM_214,Entry 214 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x135C++0x03 line.long 0x00 "APERPERM_215,Entry 215 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1360++0x03 line.long 0x00 "APERPERM_216,Entry 216 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1364++0x03 line.long 0x00 "APERPERM_217,Entry 217 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1368++0x03 line.long 0x00 "APERPERM_218,Entry 218 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x136C++0x03 line.long 0x00 "APERPERM_219,Entry 219 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1370++0x03 line.long 0x00 "APERPERM_220,Entry 220 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1374++0x03 line.long 0x00 "APERPERM_221,Entry 221 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1378++0x03 line.long 0x00 "APERPERM_222,Entry 222 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x137C++0x03 line.long 0x00 "APERPERM_223,Entry 223 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1380++0x03 line.long 0x00 "APERPERM_224,Entry 224 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1384++0x03 line.long 0x00 "APERPERM_225,Entry 225 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1388++0x03 line.long 0x00 "APERPERM_226,Entry 226 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x138C++0x03 line.long 0x00 "APERPERM_227,Entry 227 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1390++0x03 line.long 0x00 "APERPERM_228,Entry 228 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1394++0x03 line.long 0x00 "APERPERM_229,Entry 229 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1398++0x03 line.long 0x00 "APERPERM_230,Entry 230 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x139C++0x03 line.long 0x00 "APERPERM_231,Entry 231 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x13A0++0x03 line.long 0x00 "APERPERM_232,Entry 232 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x13A4++0x03 line.long 0x00 "APERPERM_233,Entry 233 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x13A8++0x03 line.long 0x00 "APERPERM_234,Entry 234 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x13AC++0x03 line.long 0x00 "APERPERM_235,Entry 235 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x13B0++0x03 line.long 0x00 "APERPERM_236,Entry 236 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x13B4++0x03 line.long 0x00 "APERPERM_237,Entry 237 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x13B8++0x03 line.long 0x00 "APERPERM_238,Entry 238 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x13BC++0x03 line.long 0x00 "APERPERM_239,Entry 239 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x13C0++0x03 line.long 0x00 "APERPERM_240,Entry 240 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x13C4++0x03 line.long 0x00 "APERPERM_241,Entry 241 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x13C8++0x03 line.long 0x00 "APERPERM_242,Entry 242 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x13CC++0x03 line.long 0x00 "APERPERM_243,Entry 243 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x13D0++0x03 line.long 0x00 "APERPERM_244,Entry 244 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x13D4++0x03 line.long 0x00 "APERPERM_245,Entry 245 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x13D8++0x03 line.long 0x00 "APERPERM_246,Entry 246 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x13DC++0x03 line.long 0x00 "APERPERM_247,Entry 247 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x13E0++0x03 line.long 0x00 "APERPERM_248,Entry 248 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x13E4++0x03 line.long 0x00 "APERPERM_249,Entry 249 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x13E8++0x03 line.long 0x00 "APERPERM_250,Entry 250 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x13EC++0x03 line.long 0x00 "APERPERM_251,Entry 251 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x13F0++0x03 line.long 0x00 "APERPERM_252,Entry 252 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x13F4++0x03 line.long 0x00 "APERPERM_253,Entry 253 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x13F8++0x03 line.long 0x00 "APERPERM_254,Entry 254 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x13FC++0x03 line.long 0x00 "APERPERM_255,Entry 255 For The 64K-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1400++0x03 line.long 0x00 "APERPERM_256,Entry 256 For 32-byte IPI Buffer 0" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1404++0x03 line.long 0x00 "APERPERM_257,Entry 257 For 32-byte IPI Buffer 1" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1408++0x03 line.long 0x00 "APERPERM_258,Entry 258 For 32-byte IPI Buffer 2" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x140C++0x03 line.long 0x00 "APERPERM_259,Entry 259 For 32-byte IPI Buffer 3" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1410++0x03 line.long 0x00 "APERPERM_260,Entry 260 For 32-byte IPI Buffer 4" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1414++0x03 line.long 0x00 "APERPERM_261,Entry 261 For 32-byte IPI Buffer 5" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1418++0x03 line.long 0x00 "APERPERM_262,Entry 262 For 32-byte IPI Buffer 6" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x141C++0x03 line.long 0x00 "APERPERM_263,Entry 263 For 32-byte IPI Buffer 7" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1420++0x03 line.long 0x00 "APERPERM_264,Entry 264 For 32-byte IPI Buffer 8" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1424++0x03 line.long 0x00 "APERPERM_265,Entry 265 For 32-byte IPI Buffer 9" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1428++0x03 line.long 0x00 "APERPERM_266,Entry 266 For 32-byte IPI Buffer 10" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x142C++0x03 line.long 0x00 "APERPERM_267,Entry 267 For 32-byte IPI Buffer 11" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1430++0x03 line.long 0x00 "APERPERM_268,Entry 268 For 32-byte IPI Buffer 12" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1434++0x03 line.long 0x00 "APERPERM_269,Entry 269 For 32-byte IPI Buffer 13" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1438++0x03 line.long 0x00 "APERPERM_270,Entry 270 For 32-byte IPI Buffer 14" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x143C++0x03 line.long 0x00 "APERPERM_271,Entry 271 For 32-byte IPI Buffer 15" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1440++0x03 line.long 0x00 "APERPERM_272,Entry 272 For 32-byte IPI Buffer 16" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1444++0x03 line.long 0x00 "APERPERM_273,Entry 273 For 32-byte IPI Buffer 17" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1448++0x03 line.long 0x00 "APERPERM_274,Entry 274 For 32-byte IPI Buffer 18" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x144C++0x03 line.long 0x00 "APERPERM_275,Entry 275 For 32-byte IPI Buffer 19" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1450++0x03 line.long 0x00 "APERPERM_276,Entry 276 For 32-byte IPI Buffer 20" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1454++0x03 line.long 0x00 "APERPERM_277,Entry 277 For 32-byte IPI Buffer 21" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1458++0x03 line.long 0x00 "APERPERM_278,Entry 278 For 32-byte IPI Buffer 22" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x145C++0x03 line.long 0x00 "APERPERM_279,Entry 279 For 32-byte IPI Buffer 23" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1460++0x03 line.long 0x00 "APERPERM_280,Entry 280 For 32-byte IPI Buffer 24" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1464++0x03 line.long 0x00 "APERPERM_281,Entry 281 For 32-byte IPI Buffer 25" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1468++0x03 line.long 0x00 "APERPERM_282,Entry 282 For 32-byte IPI Buffer 26" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x146C++0x03 line.long 0x00 "APERPERM_283,Entry 283 For 32-byte IPI Buffer 27" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1470++0x03 line.long 0x00 "APERPERM_284,Entry 284 For 32-byte IPI Buffer 28" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1474++0x03 line.long 0x00 "APERPERM_285,Entry 285 For 32-byte IPI Buffer 29" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1478++0x03 line.long 0x00 "APERPERM_286,Entry 286 For 32-byte IPI Buffer 30" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x147C++0x03 line.long 0x00 "APERPERM_287,Entry 287 For 32-byte IPI Buffer 31" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1480++0x03 line.long 0x00 "APERPERM_288,Entry 288 For 32-byte IPI Buffer 32" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1484++0x03 line.long 0x00 "APERPERM_289,Entry 289 For 32-byte IPI Buffer 33" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1488++0x03 line.long 0x00 "APERPERM_290,Entry 290 For 32-byte IPI Buffer 34" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x148C++0x03 line.long 0x00 "APERPERM_291,Entry 291 For 32-byte IPI Buffer 35" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1490++0x03 line.long 0x00 "APERPERM_292,Entry 292 For 32-byte IPI Buffer 36" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1494++0x03 line.long 0x00 "APERPERM_293,Entry 293 For 32-byte IPI Buffer 37" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1498++0x03 line.long 0x00 "APERPERM_294,Entry 294 For 32-byte IPI Buffer 38" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x149C++0x03 line.long 0x00 "APERPERM_295,Entry 295 For 32-byte IPI Buffer 39" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x14A0++0x03 line.long 0x00 "APERPERM_296,Entry 296 For 32-byte IPI Buffer 40" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x14A4++0x03 line.long 0x00 "APERPERM_297,Entry 297 For 32-byte IPI Buffer 41" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x14A8++0x03 line.long 0x00 "APERPERM_298,Entry 298 For 32-byte IPI Buffer 42" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x14AC++0x03 line.long 0x00 "APERPERM_299,Entry 299 For 32-byte IPI Buffer 43" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x14B0++0x03 line.long 0x00 "APERPERM_300,Entry 300 For 32-byte IPI Buffer 44" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x14B4++0x03 line.long 0x00 "APERPERM_301,Entry 301 For 32-byte IPI Buffer 45" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x14B8++0x03 line.long 0x00 "APERPERM_302,Entry 302 For 32-byte IPI Buffer 46" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x14BC++0x03 line.long 0x00 "APERPERM_303,Entry 303 For 32-byte IPI Buffer 47" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x14C0++0x03 line.long 0x00 "APERPERM_304,Entry 304 For 32-byte IPI Buffer 48" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x14C4++0x03 line.long 0x00 "APERPERM_305,Entry 305 For 32-byte IPI Buffer 49" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x14C8++0x03 line.long 0x00 "APERPERM_306,Entry 306 For 32-byte IPI Buffer 50" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x14CC++0x03 line.long 0x00 "APERPERM_307,Entry 307 For 32-byte IPI Buffer 51" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x14D0++0x03 line.long 0x00 "APERPERM_308,Entry 308 For 32-byte IPI Buffer 52" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x14D4++0x03 line.long 0x00 "APERPERM_309,Entry 309 For 32-byte IPI Buffer 53" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x14D8++0x03 line.long 0x00 "APERPERM_310,Entry 310 For 32-byte IPI Buffer 54" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x14DC++0x03 line.long 0x00 "APERPERM_311,Entry 311 For 32-byte IPI Buffer 55" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x14E0++0x03 line.long 0x00 "APERPERM_312,Entry 312 For 32-byte IPI Buffer 56" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x14E4++0x03 line.long 0x00 "APERPERM_313,Entry 313 For 32-byte IPI Buffer 57" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x14E8++0x03 line.long 0x00 "APERPERM_314,Entry 314 For 32-byte IPI Buffer 58" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x14EC++0x03 line.long 0x00 "APERPERM_315,Entry 315 For 32-byte IPI Buffer 59" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x14F0++0x03 line.long 0x00 "APERPERM_316,Entry 316 For 32-byte IPI Buffer 60" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x14F4++0x03 line.long 0x00 "APERPERM_317,Entry 317 For 32-byte IPI Buffer 61" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x14F8++0x03 line.long 0x00 "APERPERM_318,Entry 318 For 32-byte IPI Buffer 62" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x14FC++0x03 line.long 0x00 "APERPERM_319,Entry 319 For 32-byte IPI Buffer 63" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1500++0x03 line.long 0x00 "APERPERM_320,Entry 320 For 32-byte IPI Buffer 64" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1504++0x03 line.long 0x00 "APERPERM_321,Entry 321 For 32-byte IPI Buffer 65" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1508++0x03 line.long 0x00 "APERPERM_322,Entry 322 For 32-byte IPI Buffer 66" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x150C++0x03 line.long 0x00 "APERPERM_323,Entry 323 For 32-byte IPI Buffer 67" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1510++0x03 line.long 0x00 "APERPERM_324,Entry 324 For 32-byte IPI Buffer 68" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1514++0x03 line.long 0x00 "APERPERM_325,Entry 325 For 32-byte IPI Buffer 69" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1518++0x03 line.long 0x00 "APERPERM_326,Entry 326 For 32-byte IPI Buffer 70" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x151C++0x03 line.long 0x00 "APERPERM_327,Entry 327 For 32-byte IPI Buffer 71" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1520++0x03 line.long 0x00 "APERPERM_328,Entry 328 For 32-byte IPI Buffer 72" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1524++0x03 line.long 0x00 "APERPERM_329,Entry 329 For 32-byte IPI Buffer 73" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1528++0x03 line.long 0x00 "APERPERM_330,Entry 330 For 32-byte IPI Buffer 74" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x152C++0x03 line.long 0x00 "APERPERM_331,Entry 331 For 32-byte IPI Buffer 75" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1530++0x03 line.long 0x00 "APERPERM_332,Entry 332 For 32-byte IPI Buffer 76" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1534++0x03 line.long 0x00 "APERPERM_333,Entry 333 For 32-byte IPI Buffer 77" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1538++0x03 line.long 0x00 "APERPERM_334,Entry 334 For 32-byte IPI Buffer 78" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x153C++0x03 line.long 0x00 "APERPERM_335,Entry 335 For 32-byte IPI Buffer 79" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1540++0x03 line.long 0x00 "APERPERM_336,Entry 336 For 32-byte IPI Buffer 80" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1544++0x03 line.long 0x00 "APERPERM_337,Entry 337 For 32-byte IPI Buffer 81" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1548++0x03 line.long 0x00 "APERPERM_338,Entry 338 For 32-byte IPI Buffer 82" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x154C++0x03 line.long 0x00 "APERPERM_339,Entry 339 For 32-byte IPI Buffer 83" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1550++0x03 line.long 0x00 "APERPERM_340,Entry 340 For 32-byte IPI Buffer 84" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1554++0x03 line.long 0x00 "APERPERM_341,Entry 341 For 32-byte IPI Buffer 85" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1558++0x03 line.long 0x00 "APERPERM_342,Entry 342 For 32-byte IPI Buffer 86" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x155C++0x03 line.long 0x00 "APERPERM_343,Entry 343 For 32-byte IPI Buffer 87" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1560++0x03 line.long 0x00 "APERPERM_344,Entry 344 For 32-byte IPI Buffer 88" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1564++0x03 line.long 0x00 "APERPERM_345,Entry 345 For 32-byte IPI Buffer 89" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1568++0x03 line.long 0x00 "APERPERM_346,Entry 346 For 32-byte IPI Buffer 90" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x156C++0x03 line.long 0x00 "APERPERM_347,Entry 347 For 32-byte IPI Buffer 91" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1570++0x03 line.long 0x00 "APERPERM_348,Entry 348 For 32-byte IPI Buffer 92" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1574++0x03 line.long 0x00 "APERPERM_349,Entry 349 For 32-byte IPI Buffer 93" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1578++0x03 line.long 0x00 "APERPERM_350,Entry 350 For 32-byte IPI Buffer 94" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x157C++0x03 line.long 0x00 "APERPERM_351,Entry 351 For 32-byte IPI Buffer 95" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1580++0x03 line.long 0x00 "APERPERM_352,Entry 352 For 32-byte IPI Buffer 96" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1584++0x03 line.long 0x00 "APERPERM_353,Entry 353 For 32-byte IPI Buffer 97" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1588++0x03 line.long 0x00 "APERPERM_354,Entry 354 For 32-byte IPI Buffer 98" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x158C++0x03 line.long 0x00 "APERPERM_355,Entry 355 For 32-byte IPI Buffer 99" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1590++0x03 line.long 0x00 "APERPERM_356,Entry 356 For 32-byte IPI Buffer 100" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1594++0x03 line.long 0x00 "APERPERM_357,Entry 357 For 32-byte IPI Buffer 101" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1598++0x03 line.long 0x00 "APERPERM_358,Entry 358 For 32-byte IPI Buffer 102" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x159C++0x03 line.long 0x00 "APERPERM_359,Entry 359 For 32-byte IPI Buffer 103" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x15A0++0x03 line.long 0x00 "APERPERM_360,Entry 360 For 32-byte IPI Buffer 104" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x15A4++0x03 line.long 0x00 "APERPERM_361,Entry 361 For 32-byte IPI Buffer 105" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x15A8++0x03 line.long 0x00 "APERPERM_362,Entry 362 For 32-byte IPI Buffer 106" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x15AC++0x03 line.long 0x00 "APERPERM_363,Entry 363 For 32-byte IPI Buffer 107" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x15B0++0x03 line.long 0x00 "APERPERM_364,Entry 364 For 32-byte IPI Buffer 108" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x15B4++0x03 line.long 0x00 "APERPERM_365,Entry 365 For 32-byte IPI Buffer 109" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x15B8++0x03 line.long 0x00 "APERPERM_366,Entry 366 For 32-byte IPI Buffer 110" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x15BC++0x03 line.long 0x00 "APERPERM_367,Entry 367 For 32-byte IPI Buffer 111" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x15C0++0x03 line.long 0x00 "APERPERM_368,Entry 368 For 32-byte IPI Buffer 112" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x15C4++0x03 line.long 0x00 "APERPERM_369,Entry 369 For 32-byte IPI Buffer 113" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x15C8++0x03 line.long 0x00 "APERPERM_370,Entry 370 For 32-byte IPI Buffer 114" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x15CC++0x03 line.long 0x00 "APERPERM_371,Entry 371 For 32-byte IPI Buffer 115" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x15D0++0x03 line.long 0x00 "APERPERM_372,Entry 372 For 32-byte IPI Buffer 116" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x15D4++0x03 line.long 0x00 "APERPERM_373,Entry 373 For 32-byte IPI Buffer 117" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x15D8++0x03 line.long 0x00 "APERPERM_374,Entry 374 For 32-byte IPI Buffer 118" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x15DC++0x03 line.long 0x00 "APERPERM_375,Entry 375 For 32-byte IPI Buffer 119" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x15E0++0x03 line.long 0x00 "APERPERM_376,Entry 376 For 32-byte IPI Buffer 120" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x15E4++0x03 line.long 0x00 "APERPERM_377,Entry 377 For 32-byte IPI Buffer 121" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x15E8++0x03 line.long 0x00 "APERPERM_378,Entry 378 For 32-byte IPI Buffer 122" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x15EC++0x03 line.long 0x00 "APERPERM_379,Entry 379 For 32-byte IPI Buffer 123" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x15F0++0x03 line.long 0x00 "APERPERM_380,Entry 380 For 32-byte IPI Buffer 124" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x15F4++0x03 line.long 0x00 "APERPERM_381,Entry 381 For 32-byte IPI Buffer 125" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x15F8++0x03 line.long 0x00 "APERPERM_382,Entry 382 For 32-byte IPI Buffer 126" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x15FC++0x03 line.long 0x00 "APERPERM_383,Entry 383 For 32-byte IPI Buffer 127" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1600++0x03 line.long 0x00 "APERPERM_384,Entry 384 For The 1M-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1604++0x03 line.long 0x00 "APERPERM_385,Entry 385 For The 1M-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1608++0x03 line.long 0x00 "APERPERM_386,Entry 386 For The 1M-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x160C++0x03 line.long 0x00 "APERPERM_387,Entry 387 For The 1M-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1610++0x03 line.long 0x00 "APERPERM_388,Entry 388 For The 1M-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1614++0x03 line.long 0x00 "APERPERM_389,Entry 389 For The 1M-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1618++0x03 line.long 0x00 "APERPERM_390,Entry 390 For The 1M-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x161C++0x03 line.long 0x00 "APERPERM_391,Entry 391 For The 1M-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1620++0x03 line.long 0x00 "APERPERM_392,Entry 392 For The 1M-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1624++0x03 line.long 0x00 "APERPERM_393,Entry 393 For The 1M-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1628++0x03 line.long 0x00 "APERPERM_394,Entry 394 For The 1M-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x162C++0x03 line.long 0x00 "APERPERM_395,Entry 395 For The 1M-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1630++0x03 line.long 0x00 "APERPERM_396,Entry 396 For The 1M-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1634++0x03 line.long 0x00 "APERPERM_397,Entry 397 For The 1M-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1638++0x03 line.long 0x00 "APERPERM_398,Entry 398 For The 1M-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x163C++0x03 line.long 0x00 "APERPERM_399,Entry 399 For The 1M-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" group.long 0x1640++0x03 line.long 0x00 "APERPERM_400,Entry 400 For The 512M-byte Aperture" bitfld.long 0x00 31. " PARITY[3] ,Parity check is enabled for bits 19:15" "0,1" bitfld.long 0x00 30. " [2] ,Parity check is enabled for bits 14:10" "0,1" bitfld.long 0x00 29. " [1] ,Parity check is enabled for bits 9:5" "0,1" bitfld.long 0x00 28. " [0] ,Parity check is enabled for bits 27, 4:0" "0,1" bitfld.long 0x00 27. " TRUSTZONE ,Secure or non-secure transactions are allowed" "Secure only,All" hexmask.long.tbyte 0x00 0.--19. 1. " PERMISSION ,The MASTER ID match criteria" tree.end width 0x0B tree.end tree "XPPU_SINK (XPPU Default Sink)" base ad:0xFF9C0000 width 13. group.long 0xFF00++0x03 line.long 0x00 "ERR_STATUS,Error Status Register" bitfld.long 0x00 31. " RDWR ,Access type of the first access request sent to the black hole region or the non-existing register space in the upper 256B region" "Read,Write" hexmask.long.word 0x00 0.--11. 1. " ADDR ,Address bits [11:0] of the first access request sent to the black hole region or the non-existing register space in the upper 256B region" group.byte 0xFF10++0x00 line.byte 0x00 "ISR,Interrupt Status Register" eventfld.byte 0x00 0. " ADDR_DECODE_ERR ,Status for an address decode error" "No error,Error" group.byte 0xFF14++0x00 line.byte 0x00 "IMR_SET/CLR,Interrupt Mask Register" setclrfld.byte 0x00 0. 0x08 0. 0x04 0. " ADDR_DECODE_ERR ,Mask for an address decode error" "Not masked,Masked" group.long 0xFFEC++0x03 line.long 0x00 "ERR_CTRL,Error Control Register" bitfld.long 0x00 0. " PSLVERR ,Pslverr after access on unimplemented space" "Disabled,Enabled" width 0x0B tree.end tree "MBISTJTAG (MBIST JTAG-AP Bridge)" base ad:0xFFCF0000 width 10. group.long 0x00++0x03 line.long 0x00 "CTRL_STS,Control And Status Register" rbitfld.long 0x00 31. " SERACTV ,JTAG serializer active" "Not active,Active" rbitfld.long 0x00 28.--30. " WFIFOCNT ,Command FIFO outstanding byte count" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 24.--26. " RFIFOCNT ,Response FIFO outstanding byte count" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 3. " PORTCONNECTED ,Logical AND of the PORTCONNECTED signals from all currently-selected ports" "Not connected,Connected" bitfld.long 0x00 1. " TRST_OUT ,JTAG TAP controller reset" "No reset,Reset" group.byte 0x04++0x00 line.byte 0x00 "PORTSEL,Port Selection Register" bitfld.byte 0x00 0. " REG ,Selects the MBIST port" "Not selected,Selected" group.byte 0x08++0x00 line.byte 0x00 "PORT_STS,Port Status Register" eventfld.byte 0x00 7. " REG[7] ,Port 7 has been disabled" "No,Yes" eventfld.byte 0x00 6. " [6] ,Port 6 has been disabled" "No,Yes" eventfld.byte 0x00 5. " [5] ,Port 5 has been disabled" "No,Yes" eventfld.byte 0x00 4. " [4] ,Port 4 has been disabled" "No,Yes" eventfld.byte 0x00 3. " [3] ,Port 3 has been disabled" "No,Yes" eventfld.byte 0x00 2. " [2] ,Port 2 has been disabled" "No,Yes" eventfld.byte 0x00 1. " [1] ,Port 1 has been disabled" "No,Yes" eventfld.byte 0x00 0. " [0] ,Port 0 has been disabled" "No,Yes" textline " " hgroup.byte 0x10++0x00 hide.byte 0x00 "BFIFO1,Read And Write Byte FIFO Register, Single Byte" textfld " " in hgroup.word 0x14++0x01 hide.word 0x00 "BFIFO2,Read And Write Byte FIFO Register, Double Byte" textfld " " in hgroup.long 0x18++0x03 hide.long 0x00 "BFIFO3,Read And Write Byte FIFO Register, Triple Byte" in hgroup.long 0x1C++0x03 hide.long 0x00 "BFIFO4,Read And Write Byte FIFO Register, Quad Byte" in textline " " rgroup.long 0xFC++0x03 line.long 0x00 "IDR,Identification Register" bitfld.long 0x00 28.--31. " REVISION ,Revision 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. " JEDEC_BANK ,Designed by ARM" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x00 17.--23. 1. " JEDEC_CODE ,Designed by ARM" bitfld.long 0x00 16. " MEM_AP ,Is a mem AP" "0,1" hexmask.long.byte 0x00 0.--7. 1. " IDENTITY_VALUE ,JTAG-AP" width 0x0B tree.end tree "NAND (Nand Configuration Controller)" base ad:0xFF100000 width 19. group.long 0x00++0x13 line.long 0x00 "PACKET_REG,Packet Register" hexmask.long.word 0x00 12.--23. 1. " PACKET_COUNT ,Packet count" hexmask.long.word 0x00 0.--10. 1. " PACKET_SIZE ,Packet size" line.long 0x04 "MEMORY_ADDR_REG1,Memory Address Register 1" hexmask.long.byte 0x04 25.--31. 0x02 " BLOCK_ADDRESS ,Block address" bitfld.long 0x04 23.--24. " INTERLEAVED_ADDR ,Interleaved address bits" "Plane 0,Plane 1,Plane 2,Plane 3" textline " " hexmask.long.byte 0x04 16.--22. 0x01 " PAGE_ADDR ,Page address" hexmask.long.word 0x04 0.--12. 1. " COLUMN_ADDR ,Column address" line.long 0x08 "MEMORY_ADDR_REG2,Memory Address Register 2" bitfld.long 0x08 30.--31. " CHIP_SELECT ,Chip select" "Chip 0,Chip 1,?..." bitfld.long 0x08 25.--27. " NFC_BCH_MODE ,BCH mode value for software programmability" ",12 bit,8 bit,4 bit,24 bit,?..." textline " " bitfld.long 0x08 2. " MEM_ADDR_LUN_SEL ,Lun select bit" "Lun 0,Lun 1" bitfld.long 0x08 0.--1. " MEM_ADDR ,Remaining block address bits" "0,1,2,3" line.long 0x0C "COMMAND_REG,Command Register" bitfld.long 0x0C 31. " ECC_ON_OFF ,ECC on/off" "Off,On" bitfld.long 0x0C 28.--30. " N_OF_ADDR_CYCLES ,Number of address cycles" ",1,2,3,4,5,6,7" textline " " bitfld.long 0x0C 26.--27. " DMA_ENABLE ,DMA enable" "PIO mode,,MDMA mode,?..." bitfld.long 0x0C 23.--25. " PAGE_SIZE ,Page size" "512 byte,2K,4K,8K,16K,1K,?..." textline " " hexmask.long.byte 0x0C 8.--15. 1. " COMMAND2 ,Opcode value for 2nd cycle command" hexmask.long.byte 0x0C 0.--7. 1. " COMMAND1 ,Opcode value for 1st cycle command" line.long 0x10 "PROGRAM_REG,Program Register" bitfld.long 0x10 26. " ODT_CONFIGURE ,ODT configure operation" "Not required,Required" bitfld.long 0x10 25. " VOLUME_SELECT ,Volume select operation" "Not required,Required" bitfld.long 0x10 24. " PGM_PG_REG_CLR ,Enhanced program page register clear operation" "Not required,Required" textline " " bitfld.long 0x10 23. " RESET_LUN ,Reset operation to the selected LUN" "Not required,Required" bitfld.long 0x10 22. " CHANGE_ROW_ADDR_END ,Change row address command" "Not required,Required" bitfld.long 0x10 21. " CHANGE_ROW_ADDR ,Change row address operation" "Not required,Required" textline " " bitfld.long 0x10 20. " SMALL_DATA_MOVE ,Small data move operation" "Not required,Required" bitfld.long 0x10 19. " READ_CACHE_END ,Read cache end operation" "Not required,Required" bitfld.long 0x10 18. " READ_CACHE_RANDOM ,Read cache random operation" "Not required,Required" textline " " bitfld.long 0x10 17. " READ_CACHE_SEQ ,Read cache sequential operation" "Not required,Required" bitfld.long 0x10 16. " READ_CACHE_START ,Read operation" "Not required,Required" bitfld.long 0x10 15. " COPY_BACK_INTERL ,Copy back interleaved operation" "Not required,Required" textline " " bitfld.long 0x10 14. " CHAN_R_COL_ENHANCED ,Copy back interleaved operation command" "Not required,Required" bitfld.long 0x10 13. " READ_INTERLEAVED ,Copy back interleaved operation" "Not required,Required" bitfld.long 0x10 12. " READ_STATUS_ENHANCED ,Read status enhanced command" "Not required,Required" textline " " bitfld.long 0x10 11. " READ_UNIQUE_ID ,READ_UNIQUE_ID command" "Not required,Required" bitfld.long 0x10 10. " SET_FEATURES ,Set feature command/timing mode" "Not required,Required" bitfld.long 0x10 9. " GET_FEATURES ,Get feature command/device current timing mode" "Not required,Required" textline " " bitfld.long 0x10 8. " RESET ,Reset operation with flash device" "Not required,Required" bitfld.long 0x10 7. " READ_PARAMETER_P ,Read parameter page operation" "Not required,Required" bitfld.long 0x10 6. " READ_ID ,Read ID command and read device ID" "Not required,Required" textline " " bitfld.long 0x10 5. " MILTI_DIE_RD ,Read operation during multi die" "Not required,Required" bitfld.long 0x10 4. " PAGE_PROGRAM ,Page program with flash device" "Not required,Required" bitfld.long 0x10 3. " READ_STATUS ,Read status command with flash device" "Not required,Required" textline " " bitfld.long 0x10 2. " BLOCK_ERASE ,Block erase operation with flash device" "Not required,Required" bitfld.long 0x10 1. " MULTI_DIE ,Multi die operation (Page program, read, block erase)" "Not required,Required" bitfld.long 0x10 0. " READ ,Memory read operation" "Not required,Required" if (((d.l(ad:0xFF100000+0x0C)&0xC000000))==0x8000000) group.long 0x14++0x0B line.long 0x00 "INT_STAT_EN_REG,Interrupt Status Enable Register" bitfld.long 0x00 7. " ERROR_AHB_STS_EN ,AHB error response" "Masked,Not masked" bitfld.long 0x00 6. " DMA_INT_STS_EN ,DMA buffer boundary (Reached in DMA mode)" "Masked,Not masked" textline " " bitfld.long 0x00 5. " ECC_ERR_INTRPT_STS_EN ,Single bit error in ECC area" "Masked,Not masked" bitfld.long 0x00 4. " ERR_INTRPT_STS_EN ,BCH error" "Masked,Not masked" bitfld.long 0x00 3. " MUL_BIT_ERR_STS_EN ,Multi bit error" "Masked,Not masked" textline " " bitfld.long 0x00 2. " TRANS_COMP_STS_EN ,Preparation of NAND flash controller performed" "Masked,Not masked" bitfld.long 0x00 1. " BUFF_RD_RDY_STS_EN ,Memory read data ready in buffer" "Masked,Not masked" bitfld.long 0x00 0. " BUFF_WR_RDY_STS_EN ,Buffer memory space sufficient for receiving" "Masked,Not masked" line.long 0x04 "INT_SIG_EN_REG,Interrupt Signal Enable Register" bitfld.long 0x04 7. " ERROR_AHB_SIG_EN ,AHB error response" "Masked,Not masked" bitfld.long 0x04 6. " DMA_INT_SIG_EN ,DMA buffer boundary (Reached in DMA mode)" "Masked,Not masked" textline " " bitfld.long 0x04 5. " ECC_ERR_INTRPT_SIG_EN ,Single bit error in ECC area" "Masked,Not masked" bitfld.long 0x04 4. " ERR_INTRPT_SIG_EN ,BCH error" "Masked,Not masked" bitfld.long 0x04 3. " MUL_BIT_ERR_SIG_EN ,Multi bit error" "Masked,Not masked" textline " " bitfld.long 0x04 2. " TRANS_COMP_SIG_EN ,Preparation of NAND flash controller performed" "Masked,Not masked" bitfld.long 0x04 1. " BUFF_RD_RDY_SIG_EN ,Memory read data ready in buffer" "Masked,Not masked" bitfld.long 0x04 0. " BUFF_WR_RDY_SIG_EN ,Buffer memory space sufficient for receiving" "Masked,Not masked" line.long 0x08 "INT_STAT_REG,Interrupt Status Enable Register" bitfld.long 0x08 7. " ERROR_AHB_REG ,AHB error response" "Not sent,Sent" bitfld.long 0x08 6. " DMA_INT_REG ,DMA buffer boundary (Reached in DMA mode)" "Not detected,Detected" textline " " bitfld.long 0x08 5. " ECC_ERR_INTPRT_REG ,Single bit error in ECC area" "Not detected,Detected" bitfld.long 0x08 4. " ERR_INTPRT_REG ,BCH error" "Not asserted,Asserted" bitfld.long 0x08 3. " MUL_BIT_ERR_REG ,Multi bit error" "Not asserted,Asserted" textline " " bitfld.long 0x08 2. " TRANS_COMP_REG ,Preparation of NAND flash controller performed" "Not performed,Performed" bitfld.long 0x08 1. " BUFF_RD_RDY_REG ,Memory read data ready in buffer" "Masked,Not masked" bitfld.long 0x08 0. " BUFF_WR_RDY_REG ,Buffer memory space sufficient for receiving" "Masked,Not masked" else group.long 0x14++0x0B line.long 0x00 "INT_STAT_EN_REG,Interrupt Status Enable Register" textline " " bitfld.long 0x00 5. " ECC_ERR_INTRPT_STS_EN ,Single bit error in ECC area" "Masked,Not masked" bitfld.long 0x00 4. " ERR_INTRPT_STS_EN ,BCH error" "Masked,Not masked" bitfld.long 0x00 3. " MUL_BIT_ERR_STS_EN ,Multi bit error" "Masked,Not masked" textline " " bitfld.long 0x00 2. " TRANS_COMP_STS_EN ,Preparation of NAND flash controller performed" "Masked,Not masked" bitfld.long 0x00 1. " BUFF_RD_RDY_STS_EN ,Memory read data ready in buffer" "Masked,Not masked" bitfld.long 0x00 0. " BUFF_WR_RDY_STS_EN ,Buffer memory space sufficient for receiving" "Masked,Not masked" line.long 0x04 "INT_SIG_EN_REG,Interrupt Signal Enable Register" textline " " bitfld.long 0x04 5. " ECC_ERR_INTRPT_SIG_EN ,Single bit error in ECC area" "Masked,Not masked" bitfld.long 0x04 4. " ERR_INTRPT_SIG_EN ,BCH error" "Masked,Not masked" bitfld.long 0x04 3. " MUL_BIT_ERR_SIG_EN ,Multi bit error" "Masked,Not masked" textline " " bitfld.long 0x04 2. " TRANS_COMP_SIG_EN ,Preparation of NAND flash controller performed" "Masked,Not masked" bitfld.long 0x04 1. " BUFF_RD_RDY_SIG_EN ,Memory read data ready in buffer" "Masked,Not masked" bitfld.long 0x04 0. " BUFF_WR_RDY_SIG_EN ,Buffer memory space sufficient for receiving" "Masked,Not masked" line.long 0x08 "INT_STAT_REG,Interrupt Status Enable Register" textline " " bitfld.long 0x08 5. " ECC_ERR_INTPRT_REG ,Single bit error in ECC area" "Not detected,Detected" bitfld.long 0x08 4. " ERR_INTPRT_REG ,BCH error" "Not asserted,Asserted" bitfld.long 0x08 3. " MUL_BIT_ERR_REG ,Multi bit error" "Not asserted,Asserted" textline " " bitfld.long 0x08 2. " TRANS_COMP_REG ,Preparation of NAND flash controller performed" "Not performed,Performed" bitfld.long 0x08 1. " BUFF_RD_RDY_REG ,Memory read data ready in buffer" "Not ready,Ready" bitfld.long 0x08 0. " BUFF_WR_RDY_REG ,Buffer memory space sufficient for receiving" "Not enough,Enough" endif rgroup.long 0x20++0x03 line.long 0x00 "READY_BUSY,Ready Busy Register" bitfld.long 0x00 1. " RB_N1_STATUS ,Flash device 1 busy/ready status" "Ready,Busy" bitfld.long 0x00 0. " RB_N0_STATUS ,Flash device 0 busy/ready status" "Ready,Busy" if (((d.l(ad:0xFF100000+0x0C)&0xC000000))==0x8000000) group.long 0x24++0x03 line.long 0x00 "DMA_SYS_ADDR1_REG,DMA System Address 1 Register" else hgroup.long 0x24++0x03 hide.long 0x00 "DMA_SYS_ADDR1_REG,DMA System Address 1 Register" endif rgroup.long 0x28++0x03 line.long 0x00 "FLASH_STATUS_REG,Flash Status Register" hexmask.long.word 0x00 0.--15. 1. " FLASH_STATUS ,Flash status value" group.long 0x2C++0x0B line.long 0x00 "TIMING_REG,Timing Register" bitfld.long 0x00 15.--18. " DQS_BUFF_SEL_OUT ,NVDDR mode" ",,Mode 4/mode 5,Mode 2/mode 3,Mode 1,,Mode 0,?..." hexmask.long.byte 0x00 7.--14. 1. " TADL_TIME ,Address latch enable to data loading time" bitfld.long 0x00 3.--6. " DQS_BUFF_SEL ,Write/read data transaction values NVDDR mode" ",,Mode 4/mode 5,Mode 2/mode 3,Mode 1,,Mode 0,?..." textline " " bitfld.long 0x00 2. " SLOW_FAST_TCAD ,Slow/fast device selector" "Slow device,Fast device" bitfld.long 0x00 0.--1. " TCCS_TIME ,Column setup time (Ns)" "500,100,200,300" line.long 0x04 "BUFFER_DATA_PORT,Buffer Data Port Register" line.long 0x08 "ECC_REG,ECC Register" bitfld.long 0x08 27. " SLC_MLC ,Error correction type" "Hamming,BCH" hexmask.long.word 0x08 16.--26. 1. " ECC_SIZE ,ECC size" hexmask.long.word 0x08 0.--15. 0x01 " ECC_ADDR ,ECC address" textline " " hgroup.long 0x38++0x03 hide.long 0x00 "ECC_ERR_COUNT_REG,ECC Error Count Register" textfld " " in textline " " group.long 0x3C++0x03 line.long 0x00 "ECC_SPARE_CMD_REG,ECC Spare Command Register" bitfld.long 0x00 28.--30. " N_ECC_SP_ADDR ,Number of ECC and spare address cycles" ",1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--15. 1. " ECC_SPARE_CMD ,Program the spare/ecc opcode" group.long 0x40++0x0F line.long 0x00 "ERR_COUNT_1B_REG,Error Count 1bit Register" line.long 0x04 "ERR_COUNT_2B_REG,Error Count 2bit Register" line.long 0x08 "ERR_COUNT_3B_REG,Error Count 3bit Register" line.long 0x0C "ERR_COUNT_4B_REG,Error Count 4bit Register" if (((d.l(ad:0xFF100000+0x0C)&0xC000000))==0x8000000) group.long 0x50++0x03 line.long 0x00 "DMA_SYS_ADDR_REG,DMA System Address 0 Register" group.long 0x54++0x03 line.long 0x00 "DMA_BUF_BOUND_REG,DMA Buffer Boundary Register" bitfld.long 0x00 3. " DMA_BOUND_INT_EN ,DMA buffer boundary interrupt mask" "Masked,Not masked" bitfld.long 0x00 0.--2. " DMA_BUFFER_BOUNDARY ,Size/carry out detection" "4KB/A11,8KB/A12,16KB/A13,32KB/A14,64KB/A15,128KB/A16,256KB/A17,512KB/A18" else hgroup.long 0x50++0x03 hide.long 0x00 "DMA_SYS_ADDR_REG,DMA System Address 0 Register" group.long 0x54++0x03 line.long 0x00 "DMA_BUF_BOUND_REG,DMA Buffer Boundary Register" bitfld.long 0x00 3. " DMA_BOUND_INT_EN ,DMA buffer boundary interrupt mask" "Masked,Not masked" endif group.long 0x58++0x03 line.long 0x00 "CPU_RELEASE_REG,CPU Release Register" bitfld.long 0x00 0. " RELEASE_RESET_TO_CPU ,Primary boot code transfer" "Not transferred,Transferred" group.long 0x5C++0x0F line.long 0x00 "ERR_COUNT_5BIT,Error Count 5bit Register" line.long 0x04 "ERR_COUNT_6BIT,Error Count 6bit Register" line.long 0x08 "ERR_COUNT_7BIT,Error Count 7bit Register" line.long 0x0C "ERR_COUNT_8BIT,Error Count 8bit Register" group.long 0x6C++0x03 line.long 0x00 "DATA_INFERF_REG,Data Interface Register" bitfld.long 0x00 9.--10. " DATA_INTF ,SDR/NV-DDR mode selector" "SDR,NV-DDR,?..." bitfld.long 0x00 3.--5. " NVDDR ,NV-DDR/DDR4 mode selector" "NV-DDR mode,NV-DDR mode 1,NV-DDR mode 2,NV-DDR mode 3,NV-DDR mode 4,NV-DDR mode 5,?..." bitfld.long 0x00 0.--2. " SDR ,SDR mode selector" "SDR mode 0,SDR mode 1,SDR mode 2,SDR mode 3,SDR mode 4,SDR mode 5,?..." width 0x0B tree.end tree "OCM (On-Chip Memory)" base ad:0xFF960000 width 13. group.long 0x00++0x03 line.long 0x00 "ERR_CTRL,Enable/disable A Error Response Register" bitfld.long 0x00 3. " UE_RES ,ECC detected double bit error (Uncorrectable error response)" "No error,Error" bitfld.long 0x00 2. " PWR_ERR_RES ,Power down error response" "No error,Error" bitfld.long 0x00 1. " PZ_ERR_RES ,XMPU security check fails" "No error,Error" bitfld.long 0x00 0. " APB_ERR_RES ,Access occurs to an unimplemented space" "No error,Error" group.long 0x04++0x03 line.long 0x00 "ISR,Interrupt Status Register" eventfld.long 0x00 10. " UE_RMW ,Uncorrectable error occurred during executing sub width write transaction" "Not detected,Detected" eventfld.long 0x00 9. " FIX_BURST_WR ,FIX burst detected on AXI write channel" "Not detected,Detected" eventfld.long 0x00 8. " FIX_BURST_RD ,FIX burst detected on AXI read channel" "Not detected,Detected" eventfld.long 0x00 7. " ECC_UE ,Uncorrectable ECC ERROR detected" "Not detected,Detected" textline " " eventfld.long 0x00 6. " ECC_CE ,Correctable ECC ERROR detected" "Not detected,Detected" eventfld.long 0x00 5. " LOCK_ERR_WR ,LOCK access on write channel" "Not detected,Detected" eventfld.long 0x00 4. " LOCK_ERR_RD ,LOCK access on write channel" "Not detected,Detected" eventfld.long 0x00 3. " INV_WR ,Poison assertion on write channel" "Not detected,Detected" textline " " eventfld.long 0x00 2. " INV_RD ,Poison assertion on read channel" "Not detected,Detected" eventfld.long 0x00 1. " PWR_DWN ,Software access to power down bank" "Not detected,Detected" eventfld.long 0x00 0. " INV_APB ,APB (Register) access occurs to an unimplemented space" "Not detected,Detected" group.long 0x08++0x03 line.long 0x00 "IMR_SET/CLR,Interrupt Mask Register" setclrfld.long 0x00 10. 0x08 10. 0x04 10. " UE_RMW ,Uncorrectable error" "Not masked,Masked" setclrfld.long 0x00 9. 0x08 9. 0x04 9. " FIX_BURST_WR ,FIX burst detected on AXI write channel" "Not masked,Masked" setclrfld.long 0x00 8. 0x08 8. 0x04 8. " FIX_BURST_RD ,FIX burst detected on AXI read channel" "Not masked,Masked" setclrfld.long 0x00 7. 0x08 7. 0x04 7. " ECC_UE ,Uncorrectable ECC ERROR detected" "Not masked,Masked" textline " " setclrfld.long 0x00 6. 0x08 6. 0x04 6. " ECC_CE ,Correctable ECC ERROR detected" "Not masked,Masked" setclrfld.long 0x00 5. 0x08 5. 0x04 5. " LOCK_ERR_WR ,LOCK access on write channel" "Not masked,Masked" setclrfld.long 0x00 4. 0x08 4. 0x04 4. " LOCK_ERR_RD ,LOCK access on write channel" "Not masked,Masked" setclrfld.long 0x00 3. 0x08 3. 0x04 3. " INV_WR ,Poison assertion on write channel" "Not masked,Masked" textline " " setclrfld.long 0x00 2. 0x08 2. 0x04 2. " INV_RD ,Poison assertion on read channel" "Not masked,Masked" setclrfld.long 0x00 1. 0x08 1. 0x04 1. " PWR_DWN ,Software access to power down bank" "Not masked,Masked" setclrfld.long 0x00 0. 0x08 0. 0x04 0. " INV_APB ,APB (Register) access occurs to an unimplemented space" "Not masked,Masked" group.long 0x14++0x03 line.long 0x00 "ECC_CNTL,Control Register For OCM" bitfld.long 0x00 2. " FI_MODE ,Single error/error injection on write transaction after FI counter reaches to zero" "Single injection,Every transaction" bitfld.long 0x00 1. " DET_ONLY ,Single bit error correct-detect/double bit detect" "Corrected/detected,Detected/detected" bitfld.long 0x00 0. " ECC_ON_OFF ,ON/OFF control of ECC port" "OFF,ON" wgroup.long 0x18++0x03 line.long 0x00 "CLR_EXE,Clear Register For Exclusive Access Monitors" bitfld.long 0x00 7. " MON_[7] ,Access monitor 7 clearing" "No effect,Clear" bitfld.long 0x00 6. " [6] ,Access monitor 6 clearing" "No effect,Clear" bitfld.long 0x00 5. " [5] ,Access monitor 5 clearing" "No effect,Clear" bitfld.long 0x00 4. " [4] ,Access monitor 4 clearing" "No effect,Clear" textline " " bitfld.long 0x00 3. " [3] ,Access monitor 3 clearing" "No effect,Clear" bitfld.long 0x00 2. " [2] ,Access monitor 2 clearing" "No effect,Clear" bitfld.long 0x00 1. " [1] ,Access monitor 1 clearing" "No effect,Clear" bitfld.long 0x00 0. " [0] ,Access monitor 0 clearing" "No effect,Clear" rgroup.long 0x1C++0x03 line.long 0x00 "CE_FFA,Correctable Error First Failing Address Register" hexmask.long.tbyte 0x00 0.--17. 0x01 " ADDR ,Memory address" rgroup.long 0x20++0x2B line.long 0x00 "CE_FFD0,Correctable Error First Failing Data Register 0" line.long 0x04 "CE_FFD1,Correctable Error First Failing Data Register 1" line.long 0x08 "CE_FFD2,Correctable Error First Failing Data Register 2" line.long 0x0C "CE_FFD3,Correctable Error First Failing Data Register 3" line.long 0x10 "CE_FFE,Correctable Error First Failing ECC Register" hexmask.long.word 0x10 0.--15. 1. " SYNDROME ,First occurrence of an access with a correctable error" line.long 0x14 "UE_FFA,Correctable Error First Failing Address Register" hexmask.long.tbyte 0x14 0.--17. 1. " ADDR ,Memory address of the first occurrence of an access with a uncorrectable error" line.long 0x18 "UE_FFD0,Correctable Error First Failing Data Register 0" line.long 0x1C "UE_FFD1,Correctable Error First Failing Data Register 1" line.long 0x20 "UE_FFD2,Correctable Error First Failing Data Register 2" line.long 0x24 "UE_FFD3,Correctable Error First Failing Data Register 3" line.long 0x28 "UE_FFE,Correctable Error First Failing ECC Register" hexmask.long.word 0x28 0.--15. 1. " SYNDROME ,First occurrence of an access with an uncorrectable error" group.long 0x4C++0x13 line.long 0x00 "FI_D0,Fault Injection Data Register 0" line.long 0x04 "FI_D1,Fault Injection Data Register 1" line.long 0x08 "FI_D2,Fault Injection Data Register 2" line.long 0x0C "FI_D3,Fault Injection Data Register 3" line.long 0x10 "FI_SY,Fault Injection Syndrome Register" hexmask.long.word 0x10 0.--15. 1. " DATA ,DATA" ; group.long 0x60++0x0B ; line.long 0x00 "EMA,Extra margin adjust register" ; bitfld.long 0x00 9.--11. " BANK_3 ,Bank 3 EMA" "0,1,2,3,4,5,6,7" ; textline " " ; bitfld.long 0x00 6.--8. " BANK_2 ,Bank 2 EMA" "0,1,2,3,4,5,6,7" ; textline " " ; bitfld.long 0x00 3.--5. " BANK_1 ,Bank 1 EMA" "0,1,2,3,4,5,6,7" ; textline " " ; bitfld.long 0x00 0.--2. " BANK_0 ,Bank 0 EMA" "0,1,2,3,4,5,6,7" ; line.long 0x04 "EMAW,Extra margin adjust register" ; bitfld.long 0x04 6.--7. " BANK_3 ,Bank 3 EMAW" "0,1,2,3" ; textline " " ; bitfld.long 0x04 4.--5. " BANK_2 ,Bank 2 EMAW" "0,1,2,3" ; textline " " ; bitfld.long 0x04 2.--3. " BANK_1 ,Bank 1 EMAW" "0,1,2,3" ; textline " " ; bitfld.long 0x04 0.--1. " BANK_0 ,Bank 0 EMAW" "0,1,2,3" ; line.long 0x08 "EMAS,Extra margin adjust register" ; bitfld.long 0x08 3. " BANK_3 ,Bank 3 EMAS" "0,1" ; textline " " ; bitfld.long 0x08 2. " BANK_2 ,Bank 2 EMAS" "0,1" ; textline " " ; bitfld.long 0x08 1. " BANK_1 ,Bank 1 EMAS" "0,1" ; textline " " ; bitfld.long 0x08 0. " BANK_0 ,Bank 0 EMAS" "0,1" ; group.word 0x6C++0x01 ; line.word 0x00 "CE_CNT,Extra margin adjust register" rgroup.long 0x70++0x03 line.long 0x00 "RMW_UE_FFA,RMW Uncorrectable Error Log Register" hexmask.long.tbyte 0x00 0.--17. 0x01 " ADDR ,Memory address" group.long 0x74++0x03 line.long 0x00 "FI_CNTR,Fault Injection Count Register" hexmask.long.tbyte 0x00 0.--23. 1. " COUNT ,OCM FI counter value" rgroup.byte 0x80++0x00 line.byte 0x00 "IMP,OCM Implementation Register" bitfld.byte 0x00 0.--3. " SIZE ,OCM size" "64KB,128KB,256KB,?..." rgroup.word 0x84++0x01 line.word 0x00 "PRDY_DBG,OCM PRDY Debug Register" bitfld.word 0x00 12.--15. " BANK_[3] ,PRDY values of OCM bank 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 8.--11. " [2] ,PRDY values of OCM bank 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 4.--7. " [1] ,PRDY values of OCM bank 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 0.--3. " [0] ,PRDY values of OCM bank 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0xFF8++0x03 line.long 0x00 "SAFETY_CHK,OCM Safety Check Register" ; group.long 0xFFC++0x03 ; line.long 0x00 "ECO,ECO register" width 0x0B tree.end tree "XMPU_OCM (XMPU_OCM Module)" base ad:0xFFA70000 width 13. group.long 0x00++0x03 line.long 0x00 "CTRL,XMPU Control Register" rbitfld.long 0x00 3. " ALIGNCFG ,Region alignment" "4 kB,?..." bitfld.long 0x00 2. " POISONCFG ,Transaction poisoning" "Attribute,Address" bitfld.long 0x00 1. " DEFWRALLOWED ,Default write permission" "Poisoned,Allowed" bitfld.long 0x00 0. " DEFRDALLOWED ,Default read permission" "Poisoned,Allowed" rgroup.long 0x04++0x07 line.long 0x00 "ERR_STATUS1,XMPU Error Status Register 1" hexmask.long.tbyte 0x00 0.--19. 1. " AXI_ADDR ,Address bits [31:12] of the first poisoned read or write request" line.long 0x04 "ERR_STATUS2,XMPU Error Status Register 2" hexmask.long.word 0x04 0.--9. 1. " AXI_ID ,Master ID of the first poisoned read or write request" group.long 0x0C++0x03 line.long 0x00 "POISON,XMPU Poison Address Attribute Register" bitfld.long 0x00 20. " ATTRIB ,Poison attribute" "0,1" hexmask.long.tbyte 0x00 0.--19. 1. " BASE ,Poisoned AXI address bits [31:12]" group.long 0x10++0x03 line.long 0x00 "ISR,Interrupt Status Register" eventfld.long 0x00 3. " SECURITYVIO ,Security violation occurred on any enabled region" "No interrupt,Interrupt" eventfld.long 0x00 2. " WRPERMVIO ,Write permission violation occurred on any enabled region" "No interrupt,Interrupt" eventfld.long 0x00 1. " RDPERMVIO ,Read permission violation occurred on any enabled region" "No interrupt,Interrupt" eventfld.long 0x00 0. " INV_APB ,APB register access occurs to an unimplemented register" "No interrupt,Interrupt" group.long 0x14++0x03 line.long 0x00 "IMR_SET/CLR,Interrupt Mask Register" setclrfld.long 0x00 3. 0x08 3. 0x04 3. " SECURITYVIO ,Security violation occurred on any enabled region" "Not masked,Masked" setclrfld.long 0x00 2. 0x08 2. 0x04 2. " WRPERMVIO ,Write permission violation occurred on any enabled region" "Not masked,Masked" setclrfld.long 0x00 1. 0x08 1. 0x04 1. " RDPERMVIO ,Read permission violation occurred on any enabled region" "Not masked,Masked" setclrfld.long 0x00 0. 0x08 0. 0x04 0. " INV_APB ,APB register access occurs to an unimplemented register" "Not masked,Masked" group.byte 0x20++0x00 line.byte 0x00 "LOCK,Lock Register" bitfld.byte 0x00 0. " REGWRDIS ,XMPU registers lock" "Not locked,Locked" textline " " group.long 0x100++0x0F line.long 0x00 "R00_START,Region Start Address Register" hexmask.long.tbyte 0x00 0.--19. 1. " ADDR ,Start address bits [31:12] of this region" line.long 0x04 "R00_END,Region Start Address Register" hexmask.long.tbyte 0x04 0.--19. 1. " ADDR ,End address bits [31:12] of this region" line.long 0x08 "R00_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R00_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x110++0x0F line.long 0x00 "R01_START,Region Start Address Register" hexmask.long.tbyte 0x00 0.--19. 1. " ADDR ,Start address bits [31:12] of this region" line.long 0x04 "R01_END,Region Start Address Register" hexmask.long.tbyte 0x04 0.--19. 1. " ADDR ,End address bits [31:12] of this region" line.long 0x08 "R01_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R01_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x120++0x0F line.long 0x00 "R02_START,Region Start Address Register" hexmask.long.tbyte 0x00 0.--19. 1. " ADDR ,Start address bits [31:12] of this region" line.long 0x04 "R02_END,Region Start Address Register" hexmask.long.tbyte 0x04 0.--19. 1. " ADDR ,End address bits [31:12] of this region" line.long 0x08 "R02_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R02_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x130++0x0F line.long 0x00 "R03_START,Region Start Address Register" hexmask.long.tbyte 0x00 0.--19. 1. " ADDR ,Start address bits [31:12] of this region" line.long 0x04 "R03_END,Region Start Address Register" hexmask.long.tbyte 0x04 0.--19. 1. " ADDR ,End address bits [31:12] of this region" line.long 0x08 "R03_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R03_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x140++0x0F line.long 0x00 "R04_START,Region Start Address Register" hexmask.long.tbyte 0x00 0.--19. 1. " ADDR ,Start address bits [31:12] of this region" line.long 0x04 "R04_END,Region Start Address Register" hexmask.long.tbyte 0x04 0.--19. 1. " ADDR ,End address bits [31:12] of this region" line.long 0x08 "R04_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R04_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x150++0x0F line.long 0x00 "R05_START,Region Start Address Register" hexmask.long.tbyte 0x00 0.--19. 1. " ADDR ,Start address bits [31:12] of this region" line.long 0x04 "R05_END,Region Start Address Register" hexmask.long.tbyte 0x04 0.--19. 1. " ADDR ,End address bits [31:12] of this region" line.long 0x08 "R05_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R05_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x160++0x0F line.long 0x00 "R06_START,Region Start Address Register" hexmask.long.tbyte 0x00 0.--19. 1. " ADDR ,Start address bits [31:12] of this region" line.long 0x04 "R06_END,Region Start Address Register" hexmask.long.tbyte 0x04 0.--19. 1. " ADDR ,End address bits [31:12] of this region" line.long 0x08 "R06_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R06_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x170++0x0F line.long 0x00 "R07_START,Region Start Address Register" hexmask.long.tbyte 0x00 0.--19. 1. " ADDR ,Start address bits [31:12] of this region" line.long 0x04 "R07_END,Region Start Address Register" hexmask.long.tbyte 0x04 0.--19. 1. " ADDR ,End address bits [31:12] of this region" line.long 0x08 "R07_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R07_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x180++0x0F line.long 0x00 "R08_START,Region Start Address Register" hexmask.long.tbyte 0x00 0.--19. 1. " ADDR ,Start address bits [31:12] of this region" line.long 0x04 "R08_END,Region Start Address Register" hexmask.long.tbyte 0x04 0.--19. 1. " ADDR ,End address bits [31:12] of this region" line.long 0x08 "R08_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R08_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x190++0x0F line.long 0x00 "R09_START,Region Start Address Register" hexmask.long.tbyte 0x00 0.--19. 1. " ADDR ,Start address bits [31:12] of this region" line.long 0x04 "R09_END,Region Start Address Register" hexmask.long.tbyte 0x04 0.--19. 1. " ADDR ,End address bits [31:12] of this region" line.long 0x08 "R09_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R09_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x1A0++0x0F line.long 0x00 "R10_START,Region Start Address Register" hexmask.long.tbyte 0x00 0.--19. 1. " ADDR ,Start address bits [31:12] of this region" line.long 0x04 "R10_END,Region Start Address Register" hexmask.long.tbyte 0x04 0.--19. 1. " ADDR ,End address bits [31:12] of this region" line.long 0x08 "R10_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R10_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x1B0++0x0F line.long 0x00 "R11_START,Region Start Address Register" hexmask.long.tbyte 0x00 0.--19. 1. " ADDR ,Start address bits [31:12] of this region" line.long 0x04 "R11_END,Region Start Address Register" hexmask.long.tbyte 0x04 0.--19. 1. " ADDR ,End address bits [31:12] of this region" line.long 0x08 "R11_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R11_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x1C0++0x0F line.long 0x00 "R12_START,Region Start Address Register" hexmask.long.tbyte 0x00 0.--19. 1. " ADDR ,Start address bits [31:12] of this region" line.long 0x04 "R12_END,Region Start Address Register" hexmask.long.tbyte 0x04 0.--19. 1. " ADDR ,End address bits [31:12] of this region" line.long 0x08 "R12_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R12_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x1D0++0x0F line.long 0x00 "R13_START,Region Start Address Register" hexmask.long.tbyte 0x00 0.--19. 1. " ADDR ,Start address bits [31:12] of this region" line.long 0x04 "R13_END,Region Start Address Register" hexmask.long.tbyte 0x04 0.--19. 1. " ADDR ,End address bits [31:12] of this region" line.long 0x08 "R13_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R13_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x1E0++0x0F line.long 0x00 "R14_START,Region Start Address Register" hexmask.long.tbyte 0x00 0.--19. 1. " ADDR ,Start address bits [31:12] of this region" line.long 0x04 "R14_END,Region Start Address Register" hexmask.long.tbyte 0x04 0.--19. 1. " ADDR ,End address bits [31:12] of this region" line.long 0x08 "R14_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R14_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long 0x1F0++0x0F line.long 0x00 "R15_START,Region Start Address Register" hexmask.long.tbyte 0x00 0.--19. 1. " ADDR ,Start address bits [31:12] of this region" line.long 0x04 "R15_END,Region Start Address Register" hexmask.long.tbyte 0x04 0.--19. 1. " ADDR ,End address bits [31:12] of this region" line.long 0x08 "R15_MASTER,Region Master ID Register" hexmask.long.word 0x08 16.--25. 1. " MASK ,Master ID mask" hexmask.long.word 0x08 0.--9. 1. " ID ,Master ID value" line.long 0x0C "R15_CONFIG,Region Configuration Register" bitfld.long 0x0C 4. " NSCHECKTYPE ,NS check type" "Relaxed,Strict" bitfld.long 0x0C 3. " REGIONNS ,Region security" "Secure,Non-secure" bitfld.long 0x0C 2. " WRALLOWED ,Allow write address matching" "Poisoned,Allowed" bitfld.long 0x0C 1. " RDALLOWED ,Allow read address matching" "Poisoned,Allowed" bitfld.long 0x0C 0. " ENABLE ,Region enable" "Disabled,Enabled" width 0x0B tree.end tree "PCIE_ATTRIB (PCIe Controller Configuration)" base ad:0xFD480000 width 13. group.long 0x00++0x1B line.long 0x00 "ATTR_0,PCIe Attribute Register 0" bitfld.long 0x00 1. " AER_CAP_ECRC_GEN_CAP ,Indicates that the core is capable of generating ECRC" "Not capable,Capable" bitfld.long 0x00 0. " AER_CAP_ECRC_CHECK_CAP ,Indicates that the core is capable of checking ECRC" "Not capable,Capable" line.long 0x04 "ATTR_1,PCIe Attribute Register 1" hexmask.long.word 0x04 0.--15. 1. " AER_CAP_ID ,The capability identifier of AER capability" line.long 0x08 "ATTR_2,PCIe Attribute Register 2" bitfld.long 0x08 1.--4. " AER_CAP_VERSION ,The version of AER capability followed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0. " AER_CAP_PERMIT_ROOTERR_UPDATE ,Permit the AER root status and error source ID reg to be updated" "Not permitted,Permitted" line.long 0x0C "ATTR_3,PCIe Attribute Register 3" hexmask.long.word 0x0C 0.--11. 1. " AER_BASE_PTR ,Byte address of the base of the AER capability structure" line.long 0x10 "ATTR_4,PCIe Attribute Register 4" bitfld.long 0x10 12. " AER_CAP_ON ,Indicates that the AER structures exists" "Not present,Present" hexmask.long.word 0x10 0.--11. 1. " AER_CAP_NEXTPTR ,AER's next capability offset pointer to the next item in the capabilities list" line.long 0x14 "ATTR_5,PCIe Attribute Register 5" bitfld.long 0x14 15. " AER_CAP_OPT_ERR_SUPP[15] ,Uncorrectable internal error support" "Not supported,Supported" bitfld.long 0x14 14. " [14] ,ACS violation support" "Not supported,Supported" bitfld.long 0x14 13. " [13] ,ECRC error support" "Not supported,Supported" bitfld.long 0x14 12. " [12] ,Receiver overflow support" "Not supported,Supported" textline " " bitfld.long 0x14 11. " [11] ,Completer abort support" "Not supported,Supported" bitfld.long 0x14 10. " [10] ,Completion timeout support" "Not supported,Supported" bitfld.long 0x14 9. " [9] ,Flow control protocol error support" "Not supported,Supported" bitfld.long 0x14 8. " [8] ,Surprise down support" "Not supported,Supported" textline " " bitfld.long 0x14 2. " [2] ,Receiver error support" "Not supported,Supported" bitfld.long 0x14 1. " [1] ,Header log overflow support" "Not supported,Supported" bitfld.long 0x14 0. " [0] ,Corrected internal error support" "Not supported,Supported" line.long 0x18 "ATTR_6,PCIe Attribute Register 6" bitfld.long 0x18 8. " AER_CAP_MULTIHEADER ,Cause core to buffer several headers for AER header log field" "Disabled,Enabled" bitfld.long 0x18 2. " AER_CAP_OPT_ERR_SUPP[2] ,TLP prefix blocked support" "Not supported,Supported" bitfld.long 0x18 1. " [1] ,AtomicOp egress blocked support" "Not supported,Supported" bitfld.long 0x18 0. " [0] ,MC blocked TLP support" "Not supported,Supported" if (((d.l(ad:0xFD480000+0x01C))&0x01)==0x00) group.long 0x1C++0x03 line.long 0x00 "ATTR_7,PCIe Attribute Register 7" hexmask.long 0x00 4.--31. 1. " BAR0_MASK ,Mask for writable bits of BAR" bitfld.long 0x00 3. " BAR0_PREF ,Prefetchable" "Not prefetchable,Prefetchable" bitfld.long 0x00 1.--2. " BAR0_TYPE ,Type" "32-bit,,64-bit,?..." bitfld.long 0x00 0. " BAR0_MEM_IO ,MEM/IO space indicator" "Memory,IO" else group.long 0x1C++0x03 line.long 0x00 "ATTR_7,PCIe Attribute Register 7" hexmask.long 0x00 2.--31. 1. " BAR0_MASK ,Mask for writable bits of BAR" bitfld.long 0x00 0. " BAR0_MEM_IO ,MEM/IO space indicator" "Memory,IO" endif if (((d.l(ad:0xFD480000+0x20))&0x01)==0x00) group.long 0x20++0x03 line.long 0x00 "ATTR_8,PCIe Attribute Register 8" hexmask.long 0x00 4.--31. 1. " BAR0_MASK ,Mask for writable bits of BAR" bitfld.long 0x00 3. " BAR0_PREF ,Prefetchable" "Not prefetchable,Prefetchable" bitfld.long 0x00 1.--2. " BAR0_TYPE ,Type" "32-bit,,64-bit,?..." bitfld.long 0x00 0. " BAR0_MEM_IO ,MEM/IO space indicator" "Memory,IO" else group.long 0x20++0x03 line.long 0x00 "ATTR_8,PCIe Attribute Register 8" hexmask.long 0x00 2.--31. 1. " BAR0_MASK ,Mask for writable bits of BAR" bitfld.long 0x00 0. " BAR0_MEM_IO ,MEM/IO space indicator" "Memory,IO" endif if (((d.l(ad:0xFD480000+0x24))&0x01)==0x00) group.long 0x24++0x03 line.long 0x00 "ATTR_9,PCIe Attribute Register 9" hexmask.long 0x00 4.--31. 1. " BAR1_MASK ,Mask for writable bits of BAR" bitfld.long 0x00 3. " BAR1_PREF ,Prefetchable" "Not prefetchable,Prefetchable" bitfld.long 0x00 1.--2. " BAR1_TYPE ,Type" "32-bit,,64-bit,?..." bitfld.long 0x00 0. " BAR1_MEM_IO ,MEM/IO space indicator" "Memory,IO" else group.long 0x24++0x03 line.long 0x00 "ATTR_9,PCIe Attribute Register 9" hexmask.long 0x00 2.--31. 1. " BAR1_MASK ,Mask for writable bits of BAR" bitfld.long 0x00 0. " BAR1_MEM_IO ,MEM/IO space indicator" "Memory,IO" endif if (((d.l(ad:0xFD480000+0x28))&0x01)==0x00) group.long 0x28++0x03 line.long 0x00 "ATTR_10,PCIe Attribute Register 10" hexmask.long 0x00 4.--31. 1. " BAR1_MASK ,Mask for writable bits of BAR" bitfld.long 0x00 3. " BAR1_PREF ,Prefetchable" "Not prefetchable,Prefetchable" bitfld.long 0x00 1.--2. " BAR1_TYPE ,Type" "32-bit,,64-bit,?..." bitfld.long 0x00 0. " BAR1_MEM_IO ,MEM/IO space indicator" "Memory,IO" else group.long 0x28++0x03 line.long 0x00 "ATTR_10,PCIe Attribute Register 10" hexmask.long 0x00 2.--31. 1. " BAR1_MASK ,Mask for writable bits of BAR" bitfld.long 0x00 0. " BAR1_MEM_IO ,MEM/IO space indicator" "Memory,IO" endif if (((d.l(ad:0xFD480000+0x2C))&0x01)==0x00) group.long 0x2C++0x03 line.long 0x00 "ATTR_11,PCIe Attribute Register 11" hexmask.long 0x00 4.--31. 1. " BAR2_MASK ,Mask for writable bits of BAR" bitfld.long 0x00 3. " BAR2_PREF ,Prefetchable" "Not prefetchable,Prefetchable" bitfld.long 0x00 1.--2. " BAR2_TYPE ,Type" "32-bit,,64-bit,?..." bitfld.long 0x00 0. " BAR2_MEM_IO ,MEM/IO space indicator" "Memory,IO" else group.long 0x2C++0x03 line.long 0x00 "ATTR_11,PCIe Attribute Register 11" hexmask.long 0x00 2.--31. 1. " BAR2_MASK ,Mask for writable bits of BAR" bitfld.long 0x00 0. " BAR2_MEM_IO ,MEM/IO space indicator" "Memory,IO" endif if (((d.l(ad:0xFD480000+0x30))&0x01)==0x00) group.long 0x30++0x03 line.long 0x00 "ATTR_12,PCIe Attribute Register 12" hexmask.long 0x00 4.--31. 1. " BAR2_MASK ,Mask for writable bits of BAR" bitfld.long 0x00 3. " BAR2_PREF ,Prefetchable" "Not prefetchable,Prefetchable" bitfld.long 0x00 1.--2. " BAR2_TYPE ,Type" "32-bit,,64-bit,?..." bitfld.long 0x00 0. " BAR2_MEM_IO ,MEM/IO space indicator" "Memory,IO" else group.long 0x30++0x03 line.long 0x00 "ATTR_12,PCIe Attribute Register 12" hexmask.long 0x00 2.--31. 1. " BAR2_MASK ,Mask for writable bits of BAR" bitfld.long 0x00 0. " BAR2_MEM_IO ,MEM/IO space indicator" "Memory,IO" endif if (((d.l(ad:0xFD480000+0x34))&0x01)==0x00) group.long 0x34++0x03 line.long 0x00 "ATTR_13,PCIe Attribute Register 13" hexmask.long 0x00 4.--31. 1. " BAR3_MASK ,Mask for writable bits of BAR" bitfld.long 0x00 3. " BAR3_PREF ,Prefetchable" "Not prefetchable,Prefetchable" bitfld.long 0x00 1.--2. " BAR3_TYPE ,Type" "32-bit,,64-bit,?..." bitfld.long 0x00 0. " BAR3_MEM_IO ,MEM/IO space indicator" "Memory,IO" else group.long 0x34++0x03 line.long 0x00 "ATTR_13,PCIe Attribute Register 13" hexmask.long 0x00 2.--31. 1. " BAR3_MASK ,Mask for writable bits of BAR" bitfld.long 0x00 0. " BAR3_MEM_IO ,MEM/IO space indicator" "Memory,IO" endif if (((d.l(ad:0xFD480000+0x38))&0x01)==0x00) group.long 0x38++0x03 line.long 0x00 "ATTR_14,PCIe Attribute Register 14" hexmask.long 0x00 4.--31. 1. " BAR3_MASK ,Mask for writable bits of BAR" bitfld.long 0x00 3. " BAR3_PREF ,Prefetchable" "Not prefetchable,Prefetchable" bitfld.long 0x00 1.--2. " BAR3_TYPE ,Type" "32-bit,,64-bit,?..." bitfld.long 0x00 0. " BAR3_MEM_IO ,MEM/IO space indicator" "Memory,IO" else group.long 0x38++0x03 line.long 0x00 "ATTR_14,PCIe Attribute Register 14" hexmask.long 0x00 2.--31. 1. " BAR3_MASK ,Mask for writable bits of BAR" bitfld.long 0x00 0. " BAR3_MEM_IO ,MEM/IO space indicator" "Memory,IO" endif if (((d.l(ad:0xFD480000+0x3C))&0x01)==0x00) group.long 0x3C++0x03 line.long 0x00 "ATTR_15,PCIe Attribute Register 15" hexmask.long 0x00 4.--31. 1. " BAR4_MASK ,Mask for writable bits of BAR" bitfld.long 0x00 3. " BAR4_PREF ,Prefetchable" "Not prefetchable,Prefetchable" bitfld.long 0x00 1.--2. " BAR4_TYPE ,Type" "32-bit,,64-bit,?..." bitfld.long 0x00 0. " BAR4_MEM_IO ,MEM/IO space indicator" "Memory,IO" else group.long 0x3C++0x03 line.long 0x00 "ATTR_15,PCIe Attribute Register 15" hexmask.long 0x00 2.--31. 1. " BAR4_MASK ,Mask for writable bits of BAR" bitfld.long 0x00 0. " BAR4_MEM_IO ,MEM/IO space indicator" "Memory,IO" endif if (((d.l(ad:0xFD480000+0x40))&0x01)==0x00) group.long 0x40++0x03 line.long 0x00 "ATTR_16,PCIe Attribute Register 16" hexmask.long 0x00 4.--31. 1. " BAR4_MASK ,Mask for writable bits of BAR" bitfld.long 0x00 3. " BAR4_PREF ,Prefetchable" "Not prefetchable,Prefetchable" bitfld.long 0x00 1.--2. " BAR4_TYPE ,Type" "32-bit,,64-bit,?..." bitfld.long 0x00 0. " BAR4_MEM_IO ,MEM/IO space indicator" "Memory,IO" else group.long 0x40++0x03 line.long 0x00 "ATTR_16,PCIe Attribute Register 16" hexmask.long 0x00 2.--31. 1. " BAR4_MASK ,Mask for writable bits of BAR" bitfld.long 0x00 0. " BAR4_MEM_IO ,MEM/IO space indicator" "Memory,IO" endif if (((d.l(ad:0xFD480000+0x44))&0x01)==0x00) group.long 0x44++0x03 line.long 0x00 "ATTR_17,PCIe Attribute Register 17" hexmask.long 0x00 4.--31. 1. " BAR5_MASK ,Mask for writable bits of BAR" bitfld.long 0x00 3. " BAR5_PREF ,Prefetchable" "Not prefetchable,Prefetchable" bitfld.long 0x00 1.--2. " BAR5_TYPE ,Type" "32-bit,,64-bit,?..." bitfld.long 0x00 0. " BAR5_MEM_IO ,MEM/IO space indicator" "Memory,IO" else group.long 0x44++0x03 line.long 0x00 "ATTR_17,PCIe Attribute Register 17" hexmask.long 0x00 2.--31. 1. " BAR5_MASK ,Mask for writable bits of BAR" bitfld.long 0x00 0. " BAR5_MEM_IO ,MEM/IO space indicator" "Memory,IO" endif if (((d.l(ad:0xFD480000+0x48))&0x01)==0x00) group.long 0x48++0x03 line.long 0x00 "ATTR_18,PCIe Attribute Register 18" hexmask.long 0x00 4.--31. 1. " BAR5_MASK ,Mask for writable bits of BAR" bitfld.long 0x00 3. " BAR5_PREF ,Prefetchable" "Not prefetchable,Prefetchable" bitfld.long 0x00 1.--2. " BAR5_TYPE ,Type" "32-bit,,64-bit,?..." bitfld.long 0x00 0. " BAR5_MEM_IO ,MEM/IO space indicator" "Memory,IO" else group.long 0x48++0x03 line.long 0x00 "ATTR_18,PCIe Attribute Register 18" hexmask.long 0x00 2.--31. 1. " BAR5_MASK ,Mask for writable bits of BAR" bitfld.long 0x00 0. " BAR5_MEM_IO ,MEM/IO space indicator" "Memory,IO" endif textline " " group.long 0x4C++0x37 line.long 0x00 "ATTR_19,PCIe Attribute Register 19" hexmask.long.tbyte 0x00 11.--31. 1. " EXP_ROM_MASK ,Mask for writable bits of BAR" bitfld.long 0x00 0. " EXP_ROM_IMPL ,Expansion ROM implemented" "Not implemented,Implemented" line.long 0x04 "ATTR_20,PCIe Attribute Register 20" hexmask.long.tbyte 0x04 11.--31. 1. " EXP_ROM_MASK ,Mask for writable bits of BAR" bitfld.long 0x04 0. " EXP_ROM_IMPL ,Expansion ROM implemented" "Not implemented,Implemented" line.long 0x08 "ATTR_21,PCIe Attribute Register 21" hexmask.long.byte 0x08 0.--7. 1. " CAPABILITIES_PTR ,Pointer to the first capabilities structure location" line.long 0x0C "ATTR_22,PCIe Attribute Register 22" hexmask.long.word 0x0C 0.--15. 1. " CARDBUS_CIS_POINTER ,Pointer to CardBus data structure" line.long 0x10 "ATTR_23,PCIe Attribute Register 23" hexmask.long.word 0x10 0.--15. 1. " CARDBUS_CIS_POINTER ,Pointer to CardBus data structure" line.long 0x14 "ATTR_24,PCIe Attribute Register 24" hexmask.long.word 0x14 0.--15. 1. " CLASS_CODE ,Code identifying basic function, subclass and applicable programming interface" line.long 0x18 "ATTR_25,PCIe Attribute Register 25" bitfld.long 0x18 15. " DEV_CAP2_ATOMICOP_ROUTING_SUPP ,Atomic operations routing support" "Not supported,Supported" bitfld.long 0x18 14. " DEV_CAP2_ARI_FORWARDING_SUPP ,Ari forwarding support" "Not supported,Supported" textline " " bitfld.long 0x18 10.--13. " CPL_TIMEOUT_RANGES_SUPP ,Supported range of completion timeouts" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 9. " CPL_TIMEOUT_DIS_SUPP ,TRUE completion timeout disable support" "Not supported,Supported" textline " " bitfld.long 0x18 8. " CMD_INTX_IMPL ,INTX interrupt generation capable" "Not capable,Capable" hexmask.long.byte 0x18 0.--7. 1. " CLASS_CODE ,Code identifying basic function, subclass and applicable programming interface" line.long 0x1C "ATTR_26,PCIe Attribute Register 26" bitfld.long 0x1C 13. " DEV_CAP_EN_SLOT_PWR_LIMIT_VAL ,Permit captured slot power limit scale messages to program corresponding device capabilities value field" "Disabled,Enabled" bitfld.long 0x1C 12. " DEV_CAP_EN_SLOT_PWR_LIMIT_SCALE ,Permit captured slot power limit scale messages to program corresponding device capabilities scale field" "Disabled,Enabled" line.long 0x20 "ATTR_27,PCIe Attribute Register 27" bitfld.long 0x20 13. " DEV_CAP_ROLE_BASED_ERROR ,Compliant error reporting support" "Not supported,Supported" bitfld.long 0x20 11.--12. " DEV_CAP_PHANTOM_FUN_SUPP ,Phantom function support" "0,1,2,3" textline " " bitfld.long 0x20 8.--10. " DEV_CAP_MAX_PAYLOAD_SUPP ,Maximum payload supported" "0,1,2,3,4,5,6,7" bitfld.long 0x20 7. " TTR_DEV_CAP_FUN_LEVEL_RESET_CAP ,Function level reset capability" "Not capable,Capable" textline " " bitfld.long 0x20 3.--5. " DEV_CAP_ENDPT_L1_LAT ,Endpoint L1 acceptable latency" "0,1,2,3,4,5,6,7" bitfld.long 0x20 0.--2. " DEV_CAP_ENDPT_L0S_LAT ,Endpoint l0s acceptable latency" "0,1,2,3,4,5,6,7" line.long 0x24 "ATTR_28,PCIe Attribute Register 28" bitfld.long 0x24 8. " DEV_CNTL_AUX_PWR_SUPP ,Determines if device control[10] is writable" "Not writable,Writable" line.long 0x28 "ATTR_29,PCIe Attribute Register 29" hexmask.long.word 0x28 0.--11. 1. " DSN_BASE_PTR ,Byte address of the base of the device serial number DSN capability structure" line.long 0x2C "ATTR_30,PCIe Attribute Register 30" hexmask.long.word 0x2C 0.--15. 1. " DSN_CAP_ID ,Capability ID for DSN capability" line.long 0x30 "ATTR_31,PCIe Attribute Register 31" bitfld.long 0x30 12. " DSN_CAP_ON ,Indicates that the DSN structures exists" "Not exits,Exists" hexmask.long.word 0x30 0.--11. 1. " DSN_CAP_NEXTPTR ,Device serial number's capability's next capability offset pointer to the next item in the capabilities list" line.long 0x34 "ATTR_32,PCIe Attribute Register 32" bitfld.long 0x34 0.--3. " DSN_CAP_VERSION ,Indicates the device serial number structure version number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x88++0x133 line.long 0x00 "ATTR_34,PCIe Attribute Register 34" hexmask.long.byte 0x00 8.--15. 1. " INTERRUPT_PIN ,Indicates mapping for legacy interrupt messages" hexmask.long.byte 0x00 0.--7. 1. " HEADER_TYPE ,Specifies values to be transferred to header type register" line.long 0x04 "ATTR_35,PCIe Attribute Register 35" bitfld.long 0x04 15. " LINK_CAP_DLL_LINK_ACTIVE_REPORT_CAP ,Data link layer link active status notification is supported" "0,1" bitfld.long 0x04 14. " LINK_CAP_CLK_PWR_MGMT ,Set if the upstream port supports removal of reference clocks in L1 and L23" "0,1" textline " " bitfld.long 0x04 12.--13. " LINK_CAP_ASPM_SUPP ,Active state PM support" "No ASPM,L0s,,L0s/L1" bitfld.long 0x04 0. " INTERRUPT_STAT_AUTO ,Causes interrupt status to be set if a INTA assert message is sent via cfg_interrupt, and to be cleared if a INTA deassert message is sent" "Disabled,Enabled" line.long 0x08 "ATTR_36,PCIe Attribute Register 36" bitfld.long 0x08 12.--14. " LINK_CAP_L1_EXIT_LAT_COMCLK_GEN1 ,Exit latency from L1 state to be applied at 2.5G where a common clock is used" "0,1,2,3,4,5,6,7" bitfld.long 0x08 9.--11. " LINK_CAP_L0S_EXIT_LAT_GEN2 ,Exit latency from l0s state to be applied at 5G where separate clocks are used" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x08 6.--8. " LINK_CAP_L0S_EXIT_LAT_GEN1 ,Exit latency from l0s state to be applied at 2.5G where separate clocks are used" "0,1,2,3,4,5,6,7" bitfld.long 0x08 3.--5. " LINK_CAP_L0S_EXIT_LAT_COMCLK_GEN2 ,Exit latency from l0s state to be applied at 5G where a common clock is used." "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x08 0.--2. " LINK_CAP_L0S_EXIT_LAT_COMCLK_GEN1 ,Exit latency from l0s state to be applied at 2.5G where a common clock is used" "0,1,2,3,4,5,6,7" line.long 0x0C "ATTR_37,PCIe Attribute Register 37" bitfld.long 0x0C 14. " LINK_CAP_ASPM_OPT ,Sets the ASPM optionality compliance bit" "Not compliant,Compliant" bitfld.long 0x0C 10.--13. " LINK_CAP_MAX_LINK_SPEED ,Maximum link speed" ",2.5 GT/s,2.5/5.0 GT/s,?..." textline " " bitfld.long 0x0C 9. " LINK_CAP_LINK_BANDW_NOTIF_CAP ,Link bandwidth notification capability" "Not capable,Capable" bitfld.long 0x0C 6.--8. " LINK_CAP_L1_EXIT_LAT_GEN2 ,Sets the exit latency from L1 state to be applied at 5G where separate clocks are used" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x0C 3.--5. " LINK_CAP_L1_EXIT_LAT_GEN1 ,Sets the exit latency from L1 state to be applied at 2.5G where separate clocks are used" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 0.--2. " LINK_CAP_L1_EXIT_LAT_COMCLK_GEN2 ,Sets the exit latency from L1 state to be applied at 5G where a common clock is used" "0,1,2,3,4,5,6,7" line.long 0x10 "ATTR_38,PCIe Attribute Register 38" bitfld.long 0x10 9. " MPS_FORCE ,Use the MPS value on cfg_force_mps for checking the payload size of received TLPs and for replay/acknak timeouts" "No force,Force" bitfld.long 0x10 8. " LINK_STAT_SLOT_CLK_CFG ,Slot clock configuration" "0,1" textline " " bitfld.long 0x10 4.--7. " LINK_CTRL2_TARGET_LNK_SPD ,Upper limit on the speed advertised by the upstream component root" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 3. " LINK_CTRL2_HW_AUTONOM_SPD_DIS ,Disable hardware from changing the link speed for reasons other than reliability" "0,1" textline " " bitfld.long 0x10 2. " LINK_CTRL2_DEEMPHASIS ,Sets the de-emphasis level used by upstream component in 5.0 GT/s mode" "-6db,-3.5db" bitfld.long 0x10 1. " LINK_CONTROL_RCB ,Read completion boundary control" "64-bit,128-bit" textline " " bitfld.long 0x10 0. " LINK_CAP_SURPRISE_DOWN_ERR_CAP ,Support of detection and reporting of a surprise down event" "Not capable,Capable" line.long 0x14 "ATTR_39,PCIe Attribute Register 39" bitfld.long 0x14 8. " MSI_CAP_64_BIT_ADDR_CAP ,MSI 64-bit addressing capable" "Not capable,Capable" hexmask.long.byte 0x14 0.--7. 1. " MSI_BASE_PTR ,Byte address of the base of the message signaled interrupt MSI capability structure" line.long 0x18 "ATTR_40,PCIe Attribute Register 40" bitfld.long 0x18 9.--11. " MSI_CAP_MULTIMSGCAP ,Multiple message capable" "1,2,4,8,16,32,?..." bitfld.long 0x18 8. " MSI_CAP_MULTIMSG_EXT ,Multiple message capable extension" "Disabled,Enabled" hexmask.long.byte 0x18 0.--7. 1. " MSI_CAP_ID ,The capability identifier of MSI capability" line.long 0x1C "ATTR_41,PCIe Attribute Register 41" bitfld.long 0x1C 9. " MSI_CAP_PER_VECT_MASK_CAP ,MSI per-vector masking capable" "Not capable,Capable" bitfld.long 0x1C 8. " MSI_CAP_ON ,Indicates that the MSI structures exists" "Not present,Present" hexmask.long.byte 0x1C 0.--7. 1. " MSI_CAP_NEXTPTR ,MSI capability's next capability offset pointer to the next item in the capabilities list" line.long 0x20 "ATTR_42,PCIe Attribute Register 42" hexmask.long.byte 0x20 8.--15. 1. " MSIX_CAP_ID ,The capability identifier of MSI capability" hexmask.long.byte 0x20 0.--7. 1. " MSIX_BASE_PTR ,Byte address of the base of the MSI-X capability structure" line.long 0x24 "ATTR_43,PCIe Attribute Register 43" bitfld.long 0x24 9.--11. " MSIX_CAP_PBA_BIR ,MSI-X pending bit array BIR" "0,1,2,3,4,5,6,7" bitfld.long 0x24 8. " MSIX_CAP_ON ,Indicates that the MSIX structures exists" "0,1" hexmask.long.byte 0x24 0.--7. 1. " MSIX_CAP_NEXTPTR ,MSI-X capability's next capability offset pointer" line.long 0x28 "ATTR_44,PCIe Attribute Register 44" hexmask.long.word 0x28 0.--15. 1. " MSIX_CAP_PBA_OFFSET ,MSI-X pending bit array offset" line.long 0x2C "ATTR_45,PCIe Attribute Register 45" hexmask.long.word 0x2C 3.--15. 1. " MSIX_CAP_PBA_OFFSET ,MSI-X pending bit array offset" bitfld.long 0x2C 0.--2. " MSIX_CAP_TABLE_BIR ,MSI-X table BIR" "0,1,2,3,4,5,6,7" line.long 0x30 "ATTR_46,PCIe Attribute Register 46" hexmask.long.word 0x30 0.--15. 1. " MSIX_CAP_TABLE_OFFSET ,MSI-X table offset" line.long 0x34 "ATTR_47,PCIe Attribute Register 47" hexmask.long.word 0x34 0.--12. 1. " MSIX_CAP_TABLE_OFFSET ,MSI-X table offset" line.long 0x38 "ATTR_48,PCIe Attribute Register 48" hexmask.long.word 0x38 0.--10. 1. " MSIX_CAP_TABLE_SIZE ,MSI-X table size" line.long 0x3C "ATTR_49,PCIe Attribute Register 49" hexmask.long.byte 0x3C 8.--15. 1. " PCIE_CAP_CAP_ID ,Capability ID for express capability" hexmask.long.byte 0x3C 0.--7. 1. " PCIE_BASE_PTR ,Byte address of the base of the PCI express PCIe capability structure" line.long 0x40 "ATTR_50,PCIe Attribute Register 50" hexmask.long.byte 0x40 8.--15. 1. " PCIE_CAP_NEXTPTR ,PCIe capability's next capability offset" bitfld.long 0x40 4.--7. " PCIE_CAP_DEV_PORT_TYPE ,Device/port type" "PCIe endpoint,Legacy PCIe endpoint,,,Root port,Upstream port,Downstream port,PCIe to PCI/PCI-X bridge,PCI/PCI-X to PCIe bridge,?..." textline " " bitfld.long 0x40 0.--3. " PCIE_CAP_CAP_VER ,PCI-SIG defined PCI express capability structure version number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " line.long 0x44 "ATTR_51,PCIe Attribute Register 51" hexmask.long.byte 0x44 8.--15. 1. " PM_BASE_PTR ,Byte address of the base of the power management PM capability structure" bitfld.long 0x44 4.--7. " PCIE_REVISION ,PCIe revision" "1.0a,1.1,2.0,?..." bitfld.long 0x44 3. " PCIE_CAP_SLOT_IMPL ,Slot implemented" "Not implemented,Implemented" bitfld.long 0x44 0. " PCIE_CAP_ON ,Indicates that the PCIE structures exists" "Not present,Present" line.long 0x48 "ATTR_52,PCIe Attribute Register 52" hexmask.long.byte 0x48 6.--13. 1. " PM_CAP_ID ,The capability identifier of power management capability" bitfld.long 0x48 5. " PM_CAP_DSI ,Device specific initialization DSI" "Not initialization,Initialization" bitfld.long 0x48 4. " PM_CAP_D2SUPPORT ,D2 support" "Not supported,Supported" bitfld.long 0x48 3. " PM_CAP_D1SUPPORT ,D1 support" "Not supported,Supported" textline " " bitfld.long 0x48 0.--2. " PM_CAP_AUXCURRENT ,AUX current" "0,1,2,3,4,5,6,7" line.long 0x4C "ATTR_53,PCIe Attribute Register 53" bitfld.long 0x4C 14. " PM_CAP_PMESUPP[14] ,PME support - d3cold" "Not supported,Supported" bitfld.long 0x4C 13. " [13] ,PME support - d3hot" "Not supported,Supported" bitfld.long 0x4C 12. " [12] ,PME support - D2" "Not supported,Supported" bitfld.long 0x4C 11. " [11] ,PME support - D1" "Not supported,Supported" textline " " bitfld.long 0x4C 10. " [10] ,PME support - D0" "Not supported,Supported" bitfld.long 0x4C 9. " PM_CAP_PME_CLOCK ,Indicates that a PCI clock is required for PME generation" "Not required,Required" bitfld.long 0x4C 8. " PM_CAP_ON ,Indicates that the PM structures exists" "Not present,Present" hexmask.long.byte 0x4C 0.--7. 1. " PM_CAP_NEXTPTR ,PM capability's next capability offset" line.long 0x50 "ATTR_54,PCIe Attribute Register 54" bitfld.long 0x50 14.--15. " PM_DATA_SCALE4 ,Power management data scale register 4" "1.0x,0.1x,0.01x,0.001x" bitfld.long 0x50 12.--13. " PM_DATA_SCALE3 ,Power management data scale register 3" "1.0x,0.1x,0.01x,0.001x" bitfld.long 0x50 10.--11. " PM_DATA_SCALE2 ,Power management data scale register 2" "1.0x,0.1x,0.01x,0.001x" bitfld.long 0x50 8.--9. " PM_DATA_SCALE1 ,Power management data scale register 1" "1.0x,0.1x,0.01x,0.001x" textline " " bitfld.long 0x50 6.--7. " PM_DATA_SCALE0 ,Power management data scale register 0" "1.0x,0.1x,0.01x,0.001x" bitfld.long 0x50 5. " PM_CSR_NOSOFTRST ,Power management CSR [3] - no soft reset" "No,Yes" bitfld.long 0x50 4. " PM_CSR_BPCCEN ,Power management CSR [23] - bus power/clock control enable" "Disabled,Enabled" bitfld.long 0x50 3. " PM_CSR_B2B3 ,Power management CSR [22] - B2/B3" "B2,B3" textline " " bitfld.long 0x50 0.--2. " PM_CAP_VERSION ,The version of power management spec followed" "0,1,2,3,4,5,6,7" line.long 0x54 "ATTR_55,PCIe Attribute Register 55" hexmask.long.byte 0x54 6.--13. 1. " PM_DATA0 ,Power management data register 0" bitfld.long 0x54 4.--5. " PM_DATA_SCALE7 ,Power management data scale register 7" "1.0x,0.1x,0.01x,0.001x" bitfld.long 0x54 2.--3. " PM_DATA_SCALE6 ,Power management data scale register 6" "1.0x,0.1x,0.01x,0.001x" bitfld.long 0x54 0.--1. " PM_DATA_SCALE5 ,Power management data scale register 5" "1.0x,0.1x,0.01x,0.001x" line.long 0x58 "ATTR_56,PCIe Attribute Register 56" hexmask.long.byte 0x58 8.--15. 1. " PM_DATA2 ,Power management data register 2" hexmask.long.byte 0x58 0.--7. 1. " PM_DATA1 ,Power management data register 1" line.long 0x5C "ATTR_57,PCIe Attribute Register 57" hexmask.long.byte 0x5C 8.--15. 1. " PM_DATA4 ,Power management data register 4" hexmask.long.byte 0x5C 0.--7. 1. " PM_DATA3 ,Power management data register 3" line.long 0x60 "ATTR_58,PCIe Attribute Register 58" hexmask.long.byte 0x60 8.--15. 1. " PM_DATA6 ,Power management data register 6" hexmask.long.byte 0x60 0.--7. 1. " PM_DATA5 ,Power management data register 5" line.long 0x64 "ATTR_59,PCIe Attribute Register 59" hexmask.long.byte 0x64 0.--7. 1. " PM_DATA7 ,Power management data register 7" line.long 0x68 "ATTR_60,PCIe Attribute Register 60" hexmask.long.word 0x68 0.--11. 1. " RBAR_BASE_PTR ,Byte address of the base of the resizable BAR capability structure" line.long 0x6C "ATTR_61,PCIe Attribute Register 61" bitfld.long 0x6C 12. " RBAR_CAP_ON ,Indicates that the RBAR structures exists" "Not present,Present" hexmask.long.word 0x6C 0.--11. 1. " RBAR_CAP_NEXTPTR ,Resizable BAR capability's next capability offset" line.long 0x70 "ATTR_62,PCIe Attribute Register 62" hexmask.long.word 0x70 0.--15. 1. " RBAR_CAP_ID ,The capability identifier of resizable BAR capability" line.long 0x74 "ATTR_63,PCIe Attribute Register 63" bitfld.long 0x74 4.--6. " RBAR_NUM ,The number of resizable bars in the cap structure" "0,1,2,3,4,5,6,7" bitfld.long 0x74 0.--3. " RBAR_CAP_VERSION ,The version of resizable BAR capability followed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x78 "ATTR_64,PCIe Attribute Register 64" hexmask.long.word 0x78 0.--15. 1. " RBAR_CAP_SUP0 ,BAR size supported vector for resizable BAR capability register 0" line.long 0x7C "ATTR_65,PCIe Attribute Register 65" hexmask.long.word 0x7C 0.--15. 1. " RBAR_CAP_SUP0 ,BAR size supported vector for resizable BAR capability register 0" line.long 0x80 "ATTR_66,PCIe Attribute Register 66" hexmask.long.word 0x80 0.--15. 1. " RBAR_CAP_SUP1 ,BAR size supported vector for resizable BAR capability register 1" line.long 0x84 "ATTR_67,PCIe Attribute Register 67" hexmask.long.word 0x84 0.--15. 1. " RBAR_CAP_SUP1 ,BAR size supported vector for resizable BAR capability register 1" line.long 0x88 "ATTR_68,PCIe Attribute Register 68" hexmask.long.word 0x88 0.--15. 1. " RBAR_CAP_SUP2 ,BAR size supported vector for resizable BAR capability register 2" line.long 0x8C "ATTR_69,PCIe Attribute Register 69" hexmask.long.word 0x8C 0.--15. 1. " RBAR_CAP_SUP2 ,BAR size supported vector for resizable BAR capability register 2" line.long 0x90 "ATTR_70,PCIe Attribute Register 70" hexmask.long.word 0x90 0.--15. 1. " RBAR_CAP_SUP3 ,BAR size supported vector for resizable BAR capability register 3" line.long 0x94 "ATTR_71,PCIe Attribute Register 71" hexmask.long.word 0x94 0.--15. 1. " RBAR_CAP_SUP3 ,BAR size supported vector for resizable BAR capability register 3" line.long 0x98 "ATTR_72,PCIe Attribute Register 72" hexmask.long.word 0x98 0.--15. 1. " RBAR_CAP_SUP4 ,BAR size supported vector for resizable BAR capability register 4" line.long 0x9C "ATTR_73,PCIe Attribute Register 73" hexmask.long.word 0x9C 0.--15. 1. " RBAR_CAP_SUP4 ,BAR size supported vector for resizable BAR capability register 4" line.long 0xA0 "ATTR_74,PCIe Attribute Register 74" hexmask.long.word 0xA0 0.--15. 1. " RBAR_CAP_SUP5 ,BAR size supported vector for resizable BAR capability register 5" line.long 0xA4 "ATTR_75,PCIe Attribute Register 75" hexmask.long.word 0xA4 0.--15. 1. " RBAR_CAP_SUP5 ,BAR size supported vector for resizable BAR capability register 5" line.long 0xA8 "ATTR_76,PCIe Attribute Register 76" bitfld.long 0xA8 12.--14. " RBAR_CAP_INDEX4 ,BAR index value for resizable BAR control register 4" "0,1,2,3,4,5,6,7" bitfld.long 0xA8 9.--11. " RBAR_CAP_INDEX3 ,BAR index value for resizable BAR control register 3" "0,1,2,3,4,5,6,7" bitfld.long 0xA8 6.--8. " RBAR_CAP_INDEX2 ,BAR index value for resizable BAR control register 2" "0,1,2,3,4,5,6,7" bitfld.long 0xA8 3.--5. " RBAR_CAP_INDEX1 ,BAR index value for resizable BAR control register 1" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0xA8 0.--2. " RBAR_CAP_INDEX0 ,BAR index value for resizable BAR control register 0" "0,1,2,3,4,5,6,7" textline " " line.long 0xAC "ATTR_77,PCIe Attribute Register 77" bitfld.long 0xAC 8.--12. " RBAR_CAP_CTRL_ENCODEDBAR1 ,Initial value for the 2nd RBAR control BAR size field" "1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1024MB,2048MB,4096MB,8192MB,16384MB,32768MB,65536MB,131072MB,262144MB,524288MB,1048576MB,2097152MB,4194304MB,8388608MB,16777216MB,33554432MB,67108864MB,134217728MB,268435456MB,536870912MB,1073741824MB,2147483648MB" bitfld.long 0xAC 3.--7. " RBAR_CAP_CTRL_ENCODEDBAR0 ,Initial value for the 1st RBAR control BAR size field" "1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1024MB,2048MB,4096MB,8192MB,16384MB,32768MB,65536MB,131072MB,262144MB,524288MB,1048576MB,2097152MB,4194304MB,8388608MB,16777216MB,33554432MB,67108864MB,134217728MB,268435456MB,536870912MB,1073741824MB,2147483648MB" textline " " bitfld.long 0xAC 0.--2. " RBAR_CAP_INDEX5 ,BAR index value for resizable BAR control register 5" "0,1,2,3,4,5,6,7" line.long 0xB0 "ATTR_78,PCIe Attribute Register 78" bitfld.long 0xB0 10.--14. " RBAR_CAP_CTRL_ENCODEDBAR4 ,Initial value for the 5th RBAR control BAR size field" "1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1024MB,2048MB,4096MB,8192MB,16384MB,32768MB,65536MB,131072MB,262144MB,524288MB,1048576MB,2097152MB,4194304MB,8388608MB,16777216MB,33554432MB,67108864MB,134217728MB,268435456MB,536870912MB,1073741824MB,2147483648MB" bitfld.long 0xB0 5.--9. " RBAR_CAP_CTRL_ENCODEDBAR3 ,Initial value for the 4th RBAR control BAR size field" "1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1024MB,2048MB,4096MB,8192MB,16384MB,32768MB,65536MB,131072MB,262144MB,524288MB,1048576MB,2097152MB,4194304MB,8388608MB,16777216MB,33554432MB,67108864MB,134217728MB,268435456MB,536870912MB,1073741824MB,2147483648MB" textline " " bitfld.long 0xB0 0.--4. " RBAR_CAP_CTRL_ENCODEDBAR2 ,Initial value for the 3rd RBAR control BAR size field" "1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1024MB,2048MB,4096MB,8192MB,16384MB,32768MB,65536MB,131072MB,262144MB,524288MB,1048576MB,2097152MB,4194304MB,8388608MB,16777216MB,33554432MB,67108864MB,134217728MB,268435456MB,536870912MB,1073741824MB,2147483648MB" line.long 0xB4 "ATTR_79,PCIe Attribute Register 79" bitfld.long 0xB4 13. " SLOT_CAP_NO_CMD_COMPL_SUPP ,No command completed support" "No,Yes" bitfld.long 0xB4 12. " SLOT_CAP_MRL_SENSOR_PRESENT ,MRL sensor present" "Not present,Present" textline " " bitfld.long 0xB4 11. " SLOT_CAP_HOTPLUG_SURPRISE ,Hot-plug surprise" "Disabled,Enabled" bitfld.long 0xB4 10. " SLOT_CAP_HOTPLUG_CAP ,Hot-plug capable" "Not capable,Capable" textline " " bitfld.long 0xB4 9. " SLOT_CAP_ELEC_INTERLOCK_PRESENT ,Electromechanical interlock present" "Not present,Present" bitfld.long 0xB4 8. " SLOT_CAP_ATT_INDICATOR_PRESENT ,Attention indicator present" "Not present,Present" textline " " bitfld.long 0xB4 7. " SLOT_CAP_ATT_BUTTON_PRESENT ,Attention button present" "Not present,Present" bitfld.long 0xB4 5. " ROOT_CAP_CRS_SW_VIS ,CRS SW visibility" "Disabled,Enabled" textline " " bitfld.long 0xB4 0.--4. " RBAR_CAP_CTRL_ENCODEDBAR5 ,Initial value for the 6th RBAR control BAR size field" "1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1024MB,2048MB,4096MB,8192MB,16384MB,32768MB,65536MB,131072MB,262144MB,524288MB,1048576MB,2097152MB,4194304MB,8388608MB,16777216MB,33554432MB,67108864MB,134217728MB,268435456MB,536870912MB,1073741824MB,2147483648MB" line.long 0xB8 "ATTR_80,PCIe Attribute Register 80" bitfld.long 0xB8 14. " SLOT_CAP_PWR_INDICATOR_PRESENT ,Power indicator present" "Not present,Present" bitfld.long 0xB8 13. " SLOT_CAP_PWR_CONTROLLER_PRESENT ,Power controller present" "Not present,Present" textline " " hexmask.long.word 0xB8 0.--12. 1. " SLOT_CAP_PHYS_SLOT_NUM ,Physical slot number" line.long 0xBC "ATTR_81,PCIe Attribute Register 81" hexmask.long.byte 0xBC 2.--9. 1. " SLOT_CAP_SLOT_POWER_LIMIT_VAL ,Slot power limit value" bitfld.long 0xBC 0.--1. " SLOT_CAP_SLOT_POWER_LIMIT_SCALE ,Slot power limit scale" "1.0x,0.1x,0.01x,0.001x" line.long 0xC0 "ATTR_82,PCIe Attribute Register 82" hexmask.long.word 0xC0 0.--11. 1. " VC_BASE_PTR ,Byte address of the base of the virtual channel VC capability structure" line.long 0xC4 "ATTR_83,PCIe Attribute Register 83" bitfld.long 0xC4 12. " VC_CAP_ON ,Indicates that the VC structures exists" "Not present,Present" hexmask.long.word 0xC4 0.--11. 1. " VC_CAP_NEXTPTR ,Virtual channel capability's next capability offset" line.long 0xC8 "ATTR_84,PCIe Attribute Register 84" hexmask.long.word 0xC8 0.--15. 1. " VC_CAP_ID ,The capability identifier of virtual channel capability" line.long 0xCC "ATTR_85,PCIe Attribute Register 85" hexmask.long.word 0xCC 1.--12. 1. " VSEC_BASE_PTR ,Byte address of the base of the Vendor-Specific capability structure" bitfld.long 0xCC 0. " VC_CAP_REJ_SNOOP_TRANS ,Reject snoop transaction" "Disabled,Enabled" line.long 0xD0 "ATTR_86,PCIe Attribute Register 86" hexmask.long.word 0xD0 0.--15. 1. " VSEC_CAP_HDR_ID ,The vendor-defined ID number of the Vendor-Specific capability" line.long 0xD4 "ATTR_87,PCIe Attribute Register 87" bitfld.long 0xD4 12.--15. " VSEC_CAP_HDR_REVISION ,The revision of the Vendor-Specific capability followed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0xD4 0.--11. 1. " VSEC_CAP_HDR_LENGTH ,The length of the Vendor-Specific capability in bytes" line.long 0xD8 "ATTR_88,PCIe Attribute Register 88" hexmask.long.word 0xD8 0.--15. 1. " VSEC_CAP_ID ,The capability identifier of the Vendor-Specific capability" line.long 0xDC "ATTR_89,PCIe Attribute Register 89" bitfld.long 0xDC 13. " VSEC_CAP_ON ,Indicates that the VSEC structures exists" "Not present,Present" hexmask.long.word 0xDC 1.--12. 1. " VSEC_CAP_NEXTPTR ,VSEC's next capability offset pointer to the next item in the capabilities list" textline " " bitfld.long 0xDC 0. " VSEC_CAP_IS_LINK_VISIBLE ,VSEC structure visibility" "User-side,Link-side" line.long 0xE0 "ATTR_90,PCIe Attribute Register 90" bitfld.long 0xE0 0.--3. " VSEC_CAP_VERSION ,The version of the Vendor-Specific capability followed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xE4 "ATTR_91,PCIe Attribute Register 91" bitfld.long 0xE4 15. " LL_ACK_TIMEOUT_EN ,Enables the ACK/NAK latency timer to use the user-defined LL_ACK_TIMEOUT value" "Disabled,Enabled" hexmask.long.word 0xE4 0.--14. 1. " LL_ACK_TIMEOUT ,Sets a user-defined timeout for the ACK/NAK latency timer" line.long 0xE8 "ATTR_92,PCIe Attribute Register 92" bitfld.long 0xE8 0.--1. " LL_ACK_TIMEOUT_FUNC ,Defines how LL_ACK_TIMEOUT is to be used" "Absolute value,Addition,Substraction,?..." line.long 0xEC "ATTR_93,PCIe Attribute Register 93" bitfld.long 0xEC 15. " LL_REPLAY_TIMEOUT_EN ,Enables the replay timer to use the user-defined LL_REPLAY_TIMEOUT value" "Disabled,Enabled" hexmask.long.word 0xEC 0.--14. 1. " LL_REPLAY_TIMEOUT ,Sets a user-defined timeout for the replay timer" line.long 0xF0 "ATTR_94,PCIe Attribute Register 94" bitfld.long 0xF0 0.--1. " REPLAY_ACK_TIMEOUT_FUNC ,Defines how LL_REPLAY_TIMEOUT is to be used" "Absolute value,Addition,Substraction,?..." line.long 0xF4 "ATTR_95,PCIe Attribute Register 95" bitfld.long 0xF4 15. " PM_ASPML0S_TIMEOUT_EN ,Enables the ASPM L0S timer to use the user-defined PM_ASPML0S_TIMEOUT value" "Disabled,Enabled" hexmask.long.word 0xF4 0.--14. 1. " PM_ASPML0S_TIMEOUT ,Sets a user-defined timeout for the ASPM l0s timer" line.long 0xF8 "ATTR_96,PCIe Attribute Register 96" bitfld.long 0xF8 10. " INFER_EI[4] ,Add the inferred electrical idle behavior on loopback.active" "Disabled,Enabled" bitfld.long 0xF8 9. " [3] ,Add the inferred electrical idle behavior on recovery.speed" "Disabled,Enabled" bitfld.long 0xF8 8. " [2] ,Add the inferred electrical idle behavior on recovery.speed" "Disabled,Enabled" textline " " bitfld.long 0xF8 7. " [1] ,Add the inferred electrical idle behavior on recovery.RCVRCFG" "Disabled,Enabled" bitfld.long 0xF8 6. " [0] ,Add the inferred electrical idle behavior on L0" "Disabled,Enabled" textline " " bitfld.long 0xF8 5. " ENTER_RVRY_EI_L0 ,Enter recovery from the L0 state on EI inference" ",True" bitfld.long 0xF8 4. " DIS_SCRAMBLE ,Turn off scrambling of transmit data" "No,Yes" bitfld.long 0xF8 0.--1. " PM_ASPML0S_TIMEOUT_FUNC ,Defines how PM_ASPML0S_TIMEOUT is to be used" "Absolute value,Addition,Substraction,?..." line.long 0xFC "ATTR_97,PCIe Attribute Register 97" bitfld.long 0xFC 6.--11. " LTSSM_MAX_LINK_WIDTH ,Used by LTSSM to set maximum link width" ",X1,X2,,X4,,,,X8,?..." bitfld.long 0xFC 0.--5. " LINK_CAP_MAX_LINK_WIDTH ,Maximum link width" ",X1,X2,,X4,,,,X8,?..." line.long 0x100 "ATTR_98,PCIe Attribute Register 98" hexmask.long.byte 0x100 8.--15. 1. " N_FTS_COMCLK_GEN2 ,Number of FTS sequences in the TS1 ordered sets when the link configuration register shows that a common clock source is selected" hexmask.long.byte 0x100 0.--7. 1. " N_FTS_COMCLK_GEN1 ,Number of FTS sequences in the TS1 ordered sets when the link configuration register shows that a common clock source is selected" line.long 0x104 "ATTR_99,PCIe Attribute Register 99" hexmask.long.byte 0x104 8.--15. 1. " N_FTS_GEN2 ,Number of FTS sequences in the TS1 ordered sets when the link configuration register shows that a common clock source is not selected" hexmask.long.byte 0x104 0.--7. 1. " N_FTS_GEN1 ,Number of FTS sequences in the TS1 ordered sets when the link configuration register shows that a common clock source is not selected" line.long 0x108 "ATTR_100,PCIe Attribute Register 100" hexmask.long.byte 0x108 8.--15. 1. " DNSTREAM_LINK_NUM ,Link number that this device will advertise in TS1 and TS2 during link training" bitfld.long 0x108 7. " EXIT_LOOPBACK_ON_EI ,Allow LTSSM loopback slave at 2.5gt/s to exit from loopback.active on RX electrical idle" "Not alowed,Allowed" bitfld.long 0x108 6. " UPSTREAM_FACING ,Upstream-facing port" "Downstream,Upstream" textline " " bitfld.long 0x108 5. " UPCONFIG_CAPABLE ,Upconfigure capability enable" "Disabled,Enabled" bitfld.long 0x108 1.--3. " PL_AUTO_CONFIG ,Bypass link width negotiation in LTSSM configuration states" ",,,,X1,X2,X4,X8" line.long 0x10C "ATTR_101,PCIe Attribute Register 101" bitfld.long 0x10C 15. " EN_MSG_ROUTE[10] ,Enable the routing of pme_turn_off message TLP to the user through the TRN RX interface" "Disabled,Enabled" bitfld.long 0x10C 14. " [9] ,Enable the routing of unlock message TLP to the user through the TRN RX interface" "Disabled,Enabled" bitfld.long 0x10C 13. " [8] ,Enable the routing of PME_TO_ACK message TLP to the user through the TRN RX interface" "Disabled,Enabled" textline " " bitfld.long 0x10C 12. " [7] ,Enable the routing of PM_PME message TLP to the user through the TRN RX interface" "Disabled,Enabled" bitfld.long 0x10C 11. " [6] ,Enable the routing of INTD message TLP to the user through the TRN RX interface" "Disabled,Enabled" bitfld.long 0x10C 10. " [5] ,Enable the routing of INTC message TLP to the user through the TRN RX interface" "Disabled,Enabled" textline " " bitfld.long 0x10C 9. " [4] ,Enable the routing of INTB message TLP to the user through the TRN RX interface" "Disabled,Enabled" bitfld.long 0x10C 8. " [3] ,Enable the routing of INTA message TLP to the user through the TRN RX interface" "Disabled,Enabled" bitfld.long 0x10C 7. " [2] ,Enable the routing of ERR FATAL message TLP to the user through the TRN RX interface" "Disabled,Enabled" textline " " bitfld.long 0x10C 6. " [1] ,Enable the routing of ERR NONFATAL message TLP to the user through the TRN RX interface" "Disabled,Enabled" bitfld.long 0x10C 5. " [0] ,Enable the routing of ERR COR message TLP to the user through the TRN RX interface" "Disabled,Enabled" textline " " bitfld.long 0x10C 4. " DIS_RX_POISONED_RESP ,Disable error message and status bit response due to receiving a poisoned TLP" "No,Yes" bitfld.long 0x10C 3. " DIS_RX_TC_FILTER ,Disable TC filtering of received tlp's" "No,Yes" bitfld.long 0x10C 2. " DIS_ID_CHECK ,Disable checking for requester ID of received completions" "No,Yes" textline " " bitfld.long 0x10C 1. " DIS_BAR_FILTER ,Disable BAR filtering" "No,Yes" bitfld.long 0x10C 0. " DIS_ASPM_L1_TIMER ,Disable the internal timer that causes an upstream port enter into ASPM L1" "No,Yes" line.long 0x110 "ATTR_102,PCIe Attribute Register 102" bitfld.long 0x110 0. " EN_RX_TD_ECRC_TRIM ,Enable ECRC trimming" "Disabled,Enabled" line.long 0x114 "ATTR_103,PCIe Attribute Register 103" bitfld.long 0x114 5. " VC0_CPL_INFINITE ,The block will advertise infinite completions" ",True" bitfld.long 0x114 1.--4. " VC_CAP_VERSION ,The version of virtual channel capability followed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x118 "ATTR_104,PCIe Attribute Register 104" hexmask.long.word 0x118 0.--12. 1. " VC0_RX_RAM_LIMIT ,Receive ram limit address" line.long 0x11C "ATTR_105,PCIe Attribute Register 105" hexmask.long.word 0x11C 0.--10. 1. " VC0_TOTAL_CREDITS_CD ,Number of credits that should be advertised for completion data received on virtual channel 0" line.long 0x120 "ATTR_106,PCIe Attribute Register 106" hexmask.long.byte 0x120 7.--13. 1. " VC0_TOTAL_CREDITS_NPH ,Number of credits that should be advertised for Non-Posted headers received on virtual channel 0" hexmask.long.byte 0x120 0.--6. 1. " VC0_TOTAL_CREDITS_CH ,Number of credits that should be advertised for completion headers received on virtual channel 0" line.long 0x124 "ATTR_107,PCIe Attribute Register 107" hexmask.long.word 0x124 0.--10. 1. " VC0_TOTAL_CREDITS_NPD ,Number of credits that should be advertised for Non-Posted data received on virtual channel 0" line.long 0x128 "ATTR_108,PCIe Attribute Register 108" hexmask.long.word 0x128 0.--10. 1. " VC0_TOTAL_CREDITS_PD ,Number of credits that should be advertised for posted data received on virtual channel 0" line.long 0x12C "ATTR_109,PCIe Attribute Register 109" bitfld.long 0x12C 14. " RECRC_CHK_TRIM ,Enables td bit clear and ECRC trim on received tlp's" "Disabled,Enabled" bitfld.long 0x12C 12.--13. " RECRC_CHK ,Enables ECRC check on received tlp's" "Never,Always,,When enabled" textline " " bitfld.long 0x12C 7.--11. " VC0_TX_LASTPACKET ,Index of last packet buffer used by TX TLM" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x12C 0.--6. 1. " VC0_TOTAL_CREDITS_PH ,Number of credits that should be advertised for posted headers received on virtual channel 0" line.long 0x130 "ATTR_110,PCIe Attribute Register 110" bitfld.long 0x130 11.--15. " RP_AUTO_SPD_LOOPCNT ,Number of times RP tries to negotiate for the highest link speed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x130 9.--10. " RP_AUTO_SPD ,Number of times the device as root port tries to up speed" "Disabled,Rp_auto_spd_loopcntx10,Indefinitely,?..." bitfld.long 0x130 7. " TRN_NP_FC ,Enable the trn_rnp_req_n pin" "Disabled,Enabled" textline " " bitfld.long 0x130 2. " UR_INV_REQ ,Handle received ATS invalidate request messages as unsupported request" "Disabled,Enabled" bitfld.long 0x130 0.--1. " CFG_ECRC_ERR_CPLSTAT ,Control CMM handling of received config requests with ECRC errors" "No completion,UR,CA,?..." group.long 0x200++0x13 line.long 0x00 "ID,ID Register" hexmask.long.word 0x00 16.--31. 1. " CFG_VEND_ID ,Vendor ID for the pcie cap structure vendor ID field" hexmask.long.word 0x00 0.--15. 1. " CFG_DEV_ID ,Device ID for the the pcie cap structure device ID field" line.long 0x04 "SUBSYS_ID,SUBSYS ID Register" hexmask.long.word 0x04 16.--31. 1. " CFG_SUBSYS_VEND_ID ,Subsystem vendor ID for the pcie cap structure subsystem vendor ID field" hexmask.long.word 0x04 0.--15. 1. " CFG_SUBSYS_ID ,Subsystem ID for the the pcie cap structure subsystem ID field" line.long 0x08 "REV_ID,REV ID Register" hexmask.long.byte 0x08 0.--7. 1. " CFG_REV_ID ,Revision ID for the the pcie cap structure" line.long 0x0C "DSN_0,DSN Register 0" line.long 0x10 "DSN_1,DSN Register 1" group.long 0x218++0x03 line.long 0x00 "PM_CTRL,PM Control Register" rbitfld.long 0x00 3. " CFG_TRN_PENDING ,Sets the transactions pending bit in the device status register device_status[5]" "Not pending,Pending" bitfld.long 0x00 2. " CFG_PM_SEND_PME_TO ,Active-low signal causes core to to send turn off message" "Send,Not send" textline " " bitfld.long 0x00 1. " CFG_PM_TURNOFF_OK ,Active low power turn-off ready signal to notify the endpoint that it is safe for power to be turned off" "Send,Not send" bitfld.long 0x00 0. " CFG_PM_WAKE ,One-clock cycle active low pulse to generate and send a power management wake event message TLP to the upstream link partner" "Send,Not send" group.long 0x230++0x0B line.long 0x00 "EP_CTRL,EP Control Register" bitfld.long 0x00 1. " PL_UPSTREAM_DEEMPH_SRC ,De-emphasis used on the link at 5.0 gb/s speeds" "-6 db,-3.5 db" rbitfld.long 0x00 0. " PL_RECEIVED_HOT_RST ,Indicates In-Band hot reset has been received" "Not received,Received" line.long 0x04 "RP_CTRL,RP Control Register" bitfld.long 0x04 1. " PL_DOWNSTREAM_DEEMPH_SRC ,De-emphasis used on the link at 5.0 gb/s speeds" "From link partner,Selectable" bitfld.long 0x04 0. " PL_TRANSMIT_HOT_RST ,Direct the PCI expressroot port to transmit an In-Band hot reset" "Not transmitted,Transmitted" line.long 0x08 "PCIE_STATUS,PCIE Status Register" bitfld.long 0x08 1. " PHY_RDY ,Indication that pcie core has clocks running and is able to receive ECAM transactions" "Not ready,Ready" bitfld.long 0x08 0. " PCIE_LINK_UP ,Indication that pcie link is ready for transactions" "Down,Up" group.byte 0x300++0x00 line.byte 0x00 "MISC_CTRL,Misc Control Register" bitfld.byte 0x00 0. " SLVERR_ENABLE ,SLVERR enable/disable" "Disabled,Enabled" group.long 0x304++0x03 line.long 0x00 "ISR,Interrupt Status Register" eventfld.long 0x00 1. " PCIE_RESET ,Status for pcie reset" "No reset,Reset" eventfld.long 0x00 0. " ADDR_DECODE_ERR ,Status for an address decode error" "No error,Error" group.long 0x308++0x03 line.long 0x00 "IMR_SET/CLR,Interrupt Mask Register" setclrfld.long 0x00 1. 0x08 1. 0x04 1. " PCIE_RESET ,Mask for pcie reset" "Not masked,Masked" setclrfld.long 0x00 0. 0x08 0. 0x04 0. " ADDR_DECODE_ERR ,Mask for an address decode error" "Not masked,Masked" group.long 0x31C++0x03 line.long 0x00 "CB,ECO Register 1" bitfld.long 0x00 1. " CB1 ,RX valid filter enable" "Disabled,Enabled" width 0x0B tree.end tree "PMU_GLOBAL (PMU Global)" base ad:0xFFD80000 width 29. group.long 0x00++0x0B line.long 0x00 "GLOBAL_CNTRL,Global Control Register" rbitfld.long 0x00 16. " MB_SLEEP ,Sleep status of the MicroBlaze processor" "No sleep,Sleep" bitfld.long 0x00 12.--15. " WRITE_QOS ,QOS bits on AXI write transactions that are generated by the PMU" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " READ_QOS ,QOS bits on AXI read transactions that are generated by the PMU" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4. " FW_IS_PRESENT ,Upper-level software after a firmware is loaded into the PMU" "Not loaded,Loaded" textline " " bitfld.long 0x00 2. " COHERENT ,Route all accesses by the PMU to the FP domain to the APU through the ACP port" "Disabled,Enabled" bitfld.long 0x00 1. " SLVERR_ENABLE ,Slave error enable" "Disabled,Enabled" bitfld.long 0x00 0. " DONT_SLEEP ,Generate a wake to the processor when interrupts are disabled and the processor is in the sleep state" "Disabled,Enabled" line.long 0x04 "PS_CNTRL,PS Control Register" rbitfld.long 0x04 16. " PROG_GATE_STATUS ,Status for the prog_gate function stored in the PL domain" "Not gated,Gated" bitfld.long 0x04 1. " PROG_ENABLE ,Enable the propation of PROG signal to PL" "Disabled,Enabled" bitfld.long 0x04 0. " PROG_GATE ,Gate the propation of PROG signal to PL" "Not gated,Gated" textline " " line.long 0x08 "APU_PWR_STATUS_INIT,APU Power Status Init Register" bitfld.long 0x08 3. " ACPU3 ,Power status associated with ACPU3" "Normal cold reset,Power up after shutdown" bitfld.long 0x08 2. " ACPU2 ,Power status associated with ACPU2" "Normal cold reset,Power up after shutdown" bitfld.long 0x08 1. " ACPU1 ,Power status associated with ACPU1" "Normal cold reset,Power up after shutdown" bitfld.long 0x08 0. " ACPU0 ,Power status associated with ACPU0" "Normal cold reset,Power up after shutdown" textline " " group.long 0x10++0x03 line.long 0x00 "ADDR_ERROR_STATUS,Address Error Status Register" eventfld.long 0x00 0. " STATUS ,Status for an address decode error interrupt" "No error,Error" group.long 0x14++0x03 line.long 0x00 "ADDR_ERROR_INT_MASK_SET/CLR,Address Error Mask Register" setclrfld.long 0x00 0. 0x08 0. 0x04 0. " MASK ,Mask for an address decode error interrupt" "Not masked,Masked" group.long 0x30++0x1B line.long 0x00 "GLOBAL_GEN_STORAGE0,Global General Storage Register 0" line.long 0x04 "GLOBAL_GEN_STORAGE1,Global General Storage Register 1" line.long 0x08 "GLOBAL_GEN_STORAGE2,Global General Storage Register 2" line.long 0x0C "GLOBAL_GEN_STORAGE3,Global General Storage Register 3" line.long 0x10 "GLOBAL_GEN_STORAGE4,Global General Storage Register 4" line.long 0x14 "GLOBAL_GEN_STORAGE5,Global General Storage Register 5" line.long 0x18 "GLOBAL_GEN_STORAGE6,Global General Storage Register 6" group.long 0x50++0x1F line.long 0x00 "PERS_GLOB_GEN_STORAGE0,Persistent Global General Storage Register 0" line.long 0x04 "PERS_GLOB_GEN_STORAGE1,Persistent Global General Storage Register 1" line.long 0x08 "PERS_GLOB_GEN_STORAGE2,Persistent Global General Storage Register 2" line.long 0x0C "PERS_GLOB_GEN_STORAGE3,Persistent Global General Storage Register 3" line.long 0x10 "PERS_GLOB_GEN_STORAGE4,Persistent Global General Storage Register 4" line.long 0x14 "PERS_GLOB_GEN_STORAGE5,Persistent Global General Storage Register 5" line.long 0x18 "PERS_GLOB_GEN_STORAGE6,Persistent Global General Storage Register 6" line.long 0x1C "PERS_GLOB_GEN_STORAGE7,Persistent Global General Storage Register 7" group.long 0x70++0x03 line.long 0x00 "DDR_CNTRL,DDR Control Register" bitfld.long 0x00 0. " RET ,Enable the retention function of the DDRIOB" "Disabled,Enabled" rgroup.long 0x100++0x07 line.long 0x00 "PWR_STATE,Power Up Status Register" bitfld.long 0x00 23. " PL ,Power isolation state for PL" "Off,On" bitfld.long 0x00 22. " FP ,Power isolation state for FP domain" "Off,On" bitfld.long 0x00 21. " USB1 ,Power state for USB1" "Down,Up" bitfld.long 0x00 20. " USB0 ,Power state for USB0" "Down,Up" textline " " bitfld.long 0x00 19. " OCM_BANK3 ,Power state for ocm_bank3" "Down,Up" bitfld.long 0x00 18. " OCM_BANK2 ,Power state for ocm_bank2" "Down,Up" bitfld.long 0x00 17. " OCM_BANK1 ,Power state for ocm_bank1" "Down,Up" bitfld.long 0x00 16. " OCM_BANK0 ,Power state for ocm_bank0" "Down,Up" textline " " bitfld.long 0x00 15. " TCM1B ,Power state for TCM1B" "Down,Up" bitfld.long 0x00 14. " TCM1A ,Power state for TCM1A" "Down,Up" bitfld.long 0x00 13. " TCM0B ,Power state for TCM0B" "Down,Up" bitfld.long 0x00 12. " TCM0A ,Power state for TCM0A" "Down,Up" textline " " bitfld.long 0x00 11. " R5_1 ,Power state for R5_1" "Down,Up" bitfld.long 0x00 10. " R5_0 ,Power state for R5_0" "Down,Up" bitfld.long 0x00 7. " L2_BANK0 ,Power state for l2_bank0" "Down,Up" bitfld.long 0x00 5. " PP1 ,Power state for GPU PP1" "Down,Up" textline " " bitfld.long 0x00 4. " PP0 ,Power state for GPU PP0" "Down,Up" bitfld.long 0x00 3. " ACPU3 ,Power state for ACPU3" "Down,Up" bitfld.long 0x00 2. " ACPU2 ,Power state for ACPU2" "Down,Up" bitfld.long 0x00 1. " ACPU1 ,Power state for ACPU1" "Down,Up" textline " " bitfld.long 0x00 0. " ACPU0 ,Power state for ACPU0" "Down,Up" textline " " line.long 0x04 "AUX_PWR_STATE,Auxilliary Power-up Status Register" bitfld.long 0x04 31. " ACPU3_EMULATION ,Power emulation state for ACPU3" "No emulation,Emulation" bitfld.long 0x04 30. " ACPU2_EMULATION ,Power emulation state for ACPU2" "No emulation,Emulation" bitfld.long 0x04 29. " ACPU1_EMULATION ,Power emulation state for ACPU1" "No emulation,Emulation" bitfld.long 0x04 28. " ACPU0_EMULATION ,Power emulation state for ACPU0" "No emulation,Emulation" textline " " bitfld.long 0x04 27. " RPU_EMULATION ,Power emulation state for RPU" "No emulation,Emulation" bitfld.long 0x04 19. " OCM_BANK3 ,Retention state for ocm_bank3" "No retention,Retention" bitfld.long 0x04 18. " OCM_BANK2 ,Retention state for ocm_bank2" "No retention,Retention" bitfld.long 0x04 17. " OCM_BANK1 ,Retention state for ocm_bank1" "No retention,Retention" textline " " bitfld.long 0x04 16. " OCM_BANK0 ,Retention state for ocm_bank0" "No retention,Retention" bitfld.long 0x04 15. " TCM1B ,Retention state for TCM1B" "No retention,Retention" bitfld.long 0x04 14. " TCM1A ,Retention state for TCM1A" "No retention,Retention" bitfld.long 0x04 13. " TCM0B ,Retention state for TCM0B" "No retention,Retention" textline " " bitfld.long 0x04 12. " TCM0A ,Retention state for TCM0A" "No retention,Retention" bitfld.long 0x04 7. " L2_BANK0 ,Retention state for l2_bank0" "No retention,Retention" group.long 0x108++0x03 line.long 0x00 "RAM_RET_CNTRL,RAM Retention Request Register" bitfld.long 0x00 19. " OCM_BANK3 ,Retention control for ocm_bank3" "No retention,Retention" bitfld.long 0x00 18. " OCM_BANK2 ,Retention control for ocm_bank2" "No retention,Retention" bitfld.long 0x00 17. " OCM_BANK1 ,Retention control for ocm_bank1" "No retention,Retention" bitfld.long 0x00 16. " OCM_BANK0 ,Retention control for ocm_bank0" "No retention,Retention" textline " " bitfld.long 0x00 15. " TCM1B ,Retention control for TCM1B" "No retention,Retention" bitfld.long 0x00 14. " TCM1A ,Retention control for TCM1A" "No retention,Retention" bitfld.long 0x00 13. " TCM0B ,Retention control for TCM0B" "No retention,Retention" bitfld.long 0x00 12. " TCM0A ,Retention control for TCM0A" "No retention,Retention" textline " " bitfld.long 0x00 7. " L2_BANK0 ,Retention control for l2_bank0" "No retention,Retention" rgroup.long 0x10C++0x03 line.long 0x00 "PWR_SUPPLY_STATUS,Power Supply Status Register" bitfld.long 0x00 1. " VCC_INT ,Status of the VCC_INT supply" "Off,On" bitfld.long 0x00 0. " VCC_PSINTFP ,Status of the VCC_PSINTFP supply" "Off,On" textline " " group.long 0x110++0x03 line.long 0x00 "REQ_PWRUP_STATUS,Power-up Request Status Register" eventfld.long 0x00 23. " PL ,Power-up request status for PL" "No request,Request" eventfld.long 0x00 22. " FP ,Power-up request status for FP domain" "No request,Request" eventfld.long 0x00 21. " USB1 ,Power-up request status for USB1" "No request,Request" eventfld.long 0x00 20. " USB0 ,Power-up request status for USB0" "No request,Request" textline " " eventfld.long 0x00 19. " OCM_BANK3 ,Power-up request status for ocm_bank3" "No request,Request" eventfld.long 0x00 18. " OCM_BANK2 ,Power-up request status for ocm_bank2" "No request,Request" eventfld.long 0x00 17. " OCM_BANK1 ,Power-up request status for ocm_bank1" "No request,Request" eventfld.long 0x00 16. " OCM_BANK0 ,Power-up request status for ocm_bank0" "No request,Request" textline " " eventfld.long 0x00 15. " TCM1B ,Power-up request status for TCM0B" "No request,Request" eventfld.long 0x00 14. " TCM1A ,Power-up request status for TCM1A" "No request,Request" eventfld.long 0x00 13. " TCM0B ,Power-up request status for TCM0B" "No request,Request" eventfld.long 0x00 12. " TCM0A ,Power-up request status for TCM0A" "No request,Request" textline " " eventfld.long 0x00 10. " RPU ,Power-up request status for dual_r5" "No request,Request" eventfld.long 0x00 7. " L2_BANK0 ,Power-up request status for l2_bank0" "No request,Request" eventfld.long 0x00 5. " PP1 ,Power-up request status for GPU PP1" "No request,Request" eventfld.long 0x00 4. " PP0 ,Power-up request status for GPU PP0" "No request,Request" textline " " eventfld.long 0x00 3. " ACPU3 ,Power-up request status for ACPU3" "No request,Request" eventfld.long 0x00 2. " ACPU2 ,Power-up request status for ACPU2" "No request,Request" eventfld.long 0x00 1. " ACPU1 ,Power-up request status for ACPU1" "No request,Request" eventfld.long 0x00 0. " ACPU0 ,Power-up request status for ACPU0" "No request,Request" group.long 0x114++0x03 line.long 0x00 "REQ_PWRUP_INT_MASK_SET/CLR,Power-up Request Interrupt Mask Register" setclrfld.long 0x00 23. 0x08 23. 0x04 23. " PL ,Power-up request interrupt mask for PL" "Not masked,Masked" setclrfld.long 0x00 22. 0x08 22. 0x04 22. " FP ,Power-up request interrupt mask for FP domain" "Not masked,Masked" setclrfld.long 0x00 21. 0x08 21. 0x04 21. " USB1 ,Power-up request interrupt mask for USB1" "Not masked,Masked" setclrfld.long 0x00 20. 0x08 20. 0x04 20. " USB0 ,Power-up request interrupt mask for USB0" "Not masked,Masked" textline " " setclrfld.long 0x00 19. 0x08 19. 0x04 19. " OCM_BANK3 ,Power-up request interrupt mask for ocm_bank3" "Not masked,Masked" setclrfld.long 0x00 18. 0x08 18. 0x04 18. " OCM_BANK2 ,Power-up request interrupt mask for ocm_bank2" "Not masked,Masked" setclrfld.long 0x00 17. 0x08 17. 0x04 17. " OCM_BANK1 ,Power-up request interrupt mask for ocm_bank1" "Not masked,Masked" setclrfld.long 0x00 16. 0x08 16. 0x04 16. " OCM_BANK0 ,Power-up request interrupt mask for ocm_bank0" "Not masked,Masked" textline " " setclrfld.long 0x00 15. 0x08 15. 0x04 15. " TCM1B ,Power-up request interrupt mask for TCM0B" "Not masked,Masked" setclrfld.long 0x00 14. 0x08 14. 0x04 14. " TCM1A ,Power-up request interrupt mask for TCM1A" "Not masked,Masked" setclrfld.long 0x00 13. 0x08 13. 0x04 13. " TCM0B ,Power-up request interrupt mask for TCM0B" "Not masked,Masked" setclrfld.long 0x00 12. 0x08 12. 0x04 12. " TCM0A ,Power-up request interrupt mask for TCM0A" "Not masked,Masked" textline " " setclrfld.long 0x00 10. 0x08 10. 0x04 10. " RPU ,Power-up request interrupt mask for dual_r5" "Not masked,Masked" setclrfld.long 0x00 7. 0x08 7. 0x04 7. " L2_BANK0 ,Power-up request interrupt mask for l2_bank0" "Not masked,Masked" setclrfld.long 0x00 5. 0x08 5. 0x04 5. " PP1 ,Power-up request interrupt mask for GPU PP1" "Not masked,Masked" setclrfld.long 0x00 4. 0x08 4. 0x04 4. " PP0 ,Power-up request interrupt mask for GPU PP0" "Not masked,Masked" textline " " setclrfld.long 0x00 3. 0x08 3. 0x04 3. " ACPU3 ,Power-up request interrupt mask for ACPU3" "Not masked,Masked" setclrfld.long 0x00 2. 0x08 2. 0x04 2. " ACPU2 ,Power-up request interrupt mask for ACPU2" "Not masked,Masked" setclrfld.long 0x00 1. 0x08 1. 0x04 1. " ACPU1 ,Power-up request interrupt mask for ACPU1" "Not masked,Masked" setclrfld.long 0x00 0. 0x08 0. 0x04 0. " ACPU0 ,Power-up request interrupt mask for ACPU0" "Not masked,Masked" wgroup.long 0x120++0x03 line.long 0x00 "REQ_PWRUP_TRIG,Power-up Request Trigger Register" bitfld.long 0x00 23. " PL ,Power-up request status for PL" "No effect,Trigger" bitfld.long 0x00 22. " FP ,Power-up request status for FP domain" "No effect,Trigger" bitfld.long 0x00 21. " USB1 ,Power-up request status for USB1" "No effect,Trigger" bitfld.long 0x00 20. " USB0 ,Power-up request status for USB0" "No effect,Trigger" textline " " bitfld.long 0x00 19. " OCM_BANK3 ,Power-up request status for ocm_bank3" "No effect,Trigger" bitfld.long 0x00 18. " OCM_BANK2 ,Power-up request status for ocm_bank2" "No effect,Trigger" bitfld.long 0x00 17. " OCM_BANK1 ,Power-up request status for ocm_bank1" "No effect,Trigger" bitfld.long 0x00 16. " OCM_BANK0 ,Power-up request status for ocm_bank0" "No effect,Trigger" textline " " bitfld.long 0x00 15. " TCM1B ,Power-up request status for TCM0B" "No effect,Trigger" bitfld.long 0x00 14. " TCM1A ,Power-up request status for TCM1A" "No effect,Trigger" bitfld.long 0x00 13. " TCM0B ,Power-up request status for TCM0B" "No effect,Trigger" bitfld.long 0x00 12. " TCM0A ,Power-up request status for TCM0A" "No effect,Trigger" textline " " bitfld.long 0x00 10. " RPU ,Power-up request status for dual_r5" "No effect,Trigger" bitfld.long 0x00 7. " L2_BANK0 ,Power-up request status for l2_bank0" "No effect,Trigger" bitfld.long 0x00 5. " PP1 ,Power-up request status for GPU PP1" "No effect,Trigger" bitfld.long 0x00 4. " PP0 ,Power-up request status for GPU PP0" "No effect,Trigger" textline " " bitfld.long 0x00 3. " ACPU3 ,Power-up request status for ACPU3" "No effect,Trigger" bitfld.long 0x00 2. " ACPU2 ,Power-up request status for ACPU2" "No effect,Trigger" bitfld.long 0x00 1. " ACPU1 ,Power-up request status for ACPU1" "No effect,Trigger" bitfld.long 0x00 0. " ACPU0 ,Power-up request status for ACPU0" "No effect,Trigger" group.long 0x210++0x03 line.long 0x00 "REQ_PWRDWN_STATUS,Power-down Request Status Register" eventfld.long 0x00 23. " PL ,Power-down request status for PL" "No request,Request" eventfld.long 0x00 22. " FP ,Power-down request status for FP domain" "No request,Request" eventfld.long 0x00 21. " USB1 ,Power-down request status for USB1" "No request,Request" eventfld.long 0x00 20. " USB0 ,Power-down request status for USB0" "No request,Request" textline " " eventfld.long 0x00 19. " OCM_BANK3 ,Power-down request status for ocm_bank3" "No request,Request" eventfld.long 0x00 18. " OCM_BANK2 ,Power-down request status for ocm_bank2" "No request,Request" eventfld.long 0x00 17. " OCM_BANK1 ,Power-down request status for ocm_bank1" "No request,Request" eventfld.long 0x00 16. " OCM_BANK0 ,Power-down request status for ocm_bank0" "No request,Request" textline " " eventfld.long 0x00 15. " TCM1B ,Power-down request status for TCM0B" "No request,Request" eventfld.long 0x00 14. " TCM1A ,Power-down request status for TCM1A" "No request,Request" eventfld.long 0x00 13. " TCM0B ,Power-down request status for TCM0B" "No request,Request" eventfld.long 0x00 12. " TCM0A ,Power-down request status for TCM0A" "No request,Request" textline " " eventfld.long 0x00 10. " RPU ,Power-down request status for dual_r5" "No request,Request" eventfld.long 0x00 7. " L2_BANK0 ,Power-down request status for l2_bank0" "No request,Request" eventfld.long 0x00 5. " PP1 ,Power-down request status for GPU PP1" "No request,Request" eventfld.long 0x00 4. " PP0 ,Power-down request status for GPU PP0" "No request,Request" textline " " eventfld.long 0x00 3. " ACPU3 ,Power-down request status for ACPU3" "No request,Request" eventfld.long 0x00 2. " ACPU2 ,Power-down request status for ACPU2" "No request,Request" eventfld.long 0x00 1. " ACPU1 ,Power-down request status for ACPU1" "No request,Request" eventfld.long 0x00 0. " ACPU0 ,Power-down request status for ACPU0" "No request,Request" group.long 0x214++0x03 line.long 0x00 "REQ_PWRDWN_INT_MASK_SET/CLR,Power-down Request Interrupt Mask Register" setclrfld.long 0x00 23. 0x08 23. 0x04 23. " PL ,Power-down request interrupt mask for PL" "Not masked,Masked" setclrfld.long 0x00 22. 0x08 22. 0x04 22. " FP ,Power-down request interrupt mask for FP domain" "Not masked,Masked" setclrfld.long 0x00 21. 0x08 21. 0x04 21. " USB1 ,Power-down request interrupt mask for USB1" "Not masked,Masked" setclrfld.long 0x00 20. 0x08 20. 0x04 20. " USB0 ,Power-down request interrupt mask for USB0" "Not masked,Masked" textline " " setclrfld.long 0x00 19. 0x08 19. 0x04 19. " OCM_BANK3 ,Power-down request interrupt mask for ocm_bank3" "Not masked,Masked" setclrfld.long 0x00 18. 0x08 18. 0x04 18. " OCM_BANK2 ,Power-down request interrupt mask for ocm_bank2" "Not masked,Masked" setclrfld.long 0x00 17. 0x08 17. 0x04 17. " OCM_BANK1 ,Power-down request interrupt mask for ocm_bank1" "Not masked,Masked" setclrfld.long 0x00 16. 0x08 16. 0x04 16. " OCM_BANK0 ,Power-down request interrupt mask for ocm_bank0" "Not masked,Masked" textline " " setclrfld.long 0x00 15. 0x08 15. 0x04 15. " TCM1B ,Power-down request interrupt mask for TCM0B" "Not masked,Masked" setclrfld.long 0x00 14. 0x08 14. 0x04 14. " TCM1A ,Power-down request interrupt mask for TCM1A" "Not masked,Masked" setclrfld.long 0x00 13. 0x08 13. 0x04 13. " TCM0B ,Power-down request interrupt mask for TCM0B" "Not masked,Masked" setclrfld.long 0x00 12. 0x08 12. 0x04 12. " TCM0A ,Power-down request interrupt mask for TCM0A" "Not masked,Masked" textline " " setclrfld.long 0x00 10. 0x08 10. 0x04 10. " RPU ,Power-down request interrupt mask for dual_r5" "Not masked,Masked" setclrfld.long 0x00 7. 0x08 7. 0x04 7. " L2_BANK0 ,Power-down request interrupt mask for l2_bank0" "Not masked,Masked" setclrfld.long 0x00 5. 0x08 5. 0x04 5. " PP1 ,Power-down request interrupt mask for GPU PP1" "Not masked,Masked" setclrfld.long 0x00 4. 0x08 4. 0x04 4. " PP0 ,Power-down request interrupt mask for GPU PP0" "Not masked,Masked" textline " " setclrfld.long 0x00 3. 0x08 3. 0x04 3. " ACPU3 ,Power-down request interrupt mask for ACPU3" "Not masked,Masked" setclrfld.long 0x00 2. 0x08 2. 0x04 2. " ACPU2 ,Power-down request interrupt mask for ACPU2" "Not masked,Masked" setclrfld.long 0x00 1. 0x08 1. 0x04 1. " ACPU1 ,Power-down request interrupt mask for ACPU1" "Not masked,Masked" setclrfld.long 0x00 0. 0x08 0. 0x04 0. " ACPU0 ,Power-down request interrupt mask for ACPU0" "Not masked,Masked" wgroup.long 0x220++0x03 line.long 0x00 "REQ_PWRDWN_TRIG,Power-down Request Trigger Register" bitfld.long 0x00 23. " PL ,Power-down request status for PL" "No effect,Trigger" bitfld.long 0x00 22. " FP ,Power-down request status for FP domain" "No effect,Trigger" bitfld.long 0x00 21. " USB1 ,Power-down request status for USB1" "No effect,Trigger" bitfld.long 0x00 20. " USB0 ,Power-down request status for USB0" "No effect,Trigger" textline " " bitfld.long 0x00 19. " OCM_BANK3 ,Power-down request status for ocm_bank3" "No effect,Trigger" bitfld.long 0x00 18. " OCM_BANK2 ,Power-down request status for ocm_bank2" "No effect,Trigger" bitfld.long 0x00 17. " OCM_BANK1 ,Power-down request status for ocm_bank1" "No effect,Trigger" bitfld.long 0x00 16. " OCM_BANK0 ,Power-down request status for ocm_bank0" "No effect,Trigger" textline " " bitfld.long 0x00 15. " TCM1B ,Power-down request status for TCM0B" "No effect,Trigger" bitfld.long 0x00 14. " TCM1A ,Power-down request status for TCM1A" "No effect,Trigger" bitfld.long 0x00 13. " TCM0B ,Power-down request status for TCM0B" "No effect,Trigger" bitfld.long 0x00 12. " TCM0A ,Power-down request status for TCM0A" "No effect,Trigger" textline " " bitfld.long 0x00 10. " RPU ,Power-down request status for dual_r5" "No effect,Trigger" bitfld.long 0x00 7. " L2_BANK0 ,Power-down request status for l2_bank0" "No effect,Trigger" bitfld.long 0x00 5. " PP1 ,Power-down request status for GPU PP1" "No effect,Trigger" bitfld.long 0x00 4. " PP0 ,Power-down request status for GPU PP0" "No effect,Trigger" textline " " bitfld.long 0x00 3. " ACPU3 ,Power-down request status for ACPU3" "No effect,Trigger" bitfld.long 0x00 2. " ACPU2 ,Power-down request status for ACPU2" "No effect,Trigger" bitfld.long 0x00 1. " ACPU1 ,Power-down request status for ACPU1" "No effect,Trigger" bitfld.long 0x00 0. " ACPU0 ,Power-down request status for ACPU0" "No effect,Trigger" group.long 0x310++0x03 line.long 0x00 "REQ_ISO_STATUS,Isolation Request Status Register" eventfld.long 0x00 4. " FP_LOCKED ,Locked isolation request status for FP domain" "No request,Request" eventfld.long 0x00 2. " PL_NONPCAP ,Isolation request status for PL interface not associated with PCAP" "No request,Request" eventfld.long 0x00 1. " PL ,Isolation request status for PL" "No request,Request" eventfld.long 0x00 0. " FP ,Isolation request status for FP domain" "No request,Request" group.long 0x314++0x03 line.long 0x00 "REQ_ISO_INT_MASK_SET/CLR,Isolation Request Interrupt Mask Register" setclrfld.long 0x00 4. 0x08 4. 0x04 4. " FP_LOCKED ,Locked isolation request interrupt mask for FP domain" "Not masked,Masked" setclrfld.long 0x00 2. 0x08 2. 0x04 2. " PL_NONPCAP ,Isolation request interrupt mask for PL interface not associated with PCAP" "Not masked,Masked" setclrfld.long 0x00 1. 0x08 1. 0x04 1. " PL ,Isolation request interrupt mask for PL" "Not masked,Masked" setclrfld.long 0x00 0. 0x08 0. 0x04 0. " FP ,Isolation request interrupt mask for FP domain" "Not masked,Masked" wgroup.long 0x320++0x03 line.long 0x00 "REQ_ISO_TRIG,Isolation Request Trigger Register" bitfld.long 0x00 4. " FP_LOCKED ,Locked isolation request status for FP domain" "No effect,Trigger" bitfld.long 0x00 2. " PL_NONPCAP ,Isolation request status for PL interface not associated with PCAP" "No effect,Trigger" bitfld.long 0x00 1. " PL ,Isolation request status for PL" "No effect,Trigger" bitfld.long 0x00 0. " FP ,Isolation request status for FP domain" "No effect,Trigger" group.long 0x410++0x03 line.long 0x00 "REQ_SWRST_STATUS,Reset Request Status Register" eventfld.long 0x00 31. " PL ,Reset request status for PL" "No request,Request" eventfld.long 0x00 30. " FP ,Reset request status for FP domain" "No request,Request" eventfld.long 0x00 29. " LP ,Reset request status for LP domain" "No request,Request" eventfld.long 0x00 28. " PS_ONLY ,Reset request status for PS-Only" "No request,Request" textline " " eventfld.long 0x00 27. " IOU ,Reset request status for IOU" "No request,Request" eventfld.long 0x00 25. " USB1 ,Reset request status for USB1" "No request,Request" eventfld.long 0x00 24. " USB0 ,Reset request status for USB0" "No request,Request" eventfld.long 0x00 23. " GEM3 ,Reset request status for GEM3" "No request,Request" textline " " eventfld.long 0x00 22. " GEM2 ,Reset request status for GEM2" "No request,Request" eventfld.long 0x00 21. " GEM1 ,Reset request status for GEM1" "No request,Request" eventfld.long 0x00 20. " GEM0 ,Reset request status for GEM0" "No request,Request" eventfld.long 0x00 18. " RPU ,Reset request status for RPU Lock-step" "No request,Request" textline " " eventfld.long 0x00 17. " R5_1 ,Reset request status for R5_1" "No request,Request" eventfld.long 0x00 16. " R5_0 ,Reset request status for R5_0" "No request,Request" eventfld.long 0x00 12. " DISPLAY_PORT ,Reset request status for display port" "No request,Request" eventfld.long 0x00 10. " SATA ,Reset request status for SATA" "No request,Request" textline " " eventfld.long 0x00 9. " PCIE ,Reset request status for pcie" "No request,Request" eventfld.long 0x00 8. " GPU ,Reset request status for GPU" "No request,Request" eventfld.long 0x00 7. " PP1 ,Reset request status for GPU PP1" "No request,Request" eventfld.long 0x00 6. " PP0 ,Reset request status for GPU PP0" "No request,Request" textline " " eventfld.long 0x00 4. " APU ,Reset request status for APU" "No request,Request" eventfld.long 0x00 3. " ACPU3 ,Reset request status for ACPU3" "No request,Request" eventfld.long 0x00 2. " ACPU2 ,Reset request status for ACPU2" "No request,Request" eventfld.long 0x00 1. " ACPU1 ,Reset request status for ACPU1" "No request,Request" textline " " eventfld.long 0x00 0. " ACPU0 ,Reset request status for ACPU0" "No request,Request" group.long 0x414++0x03 line.long 0x00 "REQ_SWRST_INT_MASK_SET/CLR,Reset Request Interrupt Mask Register" setclrfld.long 0x00 31. 0x08 31. 0x04 31. " PL ,Reset request interrupt mask for PL" "Not masked,Masked" setclrfld.long 0x00 30. 0x08 30. 0x04 30. " FP ,Reset request interrupt mask for FP domain" "Not masked,Masked" setclrfld.long 0x00 29. 0x08 29. 0x04 29. " LP ,Reset request interrupt mask for LP domain" "Not masked,Masked" setclrfld.long 0x00 28. 0x08 28. 0x04 28. " PS_ONLY ,Reset request interrupt mask for PS-Only" "Not masked,Masked" textline " " setclrfld.long 0x00 27. 0x08 27. 0x04 27. " IOU ,Reset request interrupt mask for IOU" "Not masked,Masked" setclrfld.long 0x00 25. 0x08 25. 0x04 25. " USB1 ,Reset request interrupt mask for USB1" "Not masked,Masked" setclrfld.long 0x00 24. 0x08 24. 0x04 24. " USB0 ,Reset request interrupt mask for USB0" "Not masked,Masked" setclrfld.long 0x00 23. 0x08 23. 0x04 23. " GEM3 ,Reset request interrupt mask for GEM3" "Not masked,Masked" textline " " setclrfld.long 0x00 22. 0x08 22. 0x04 22. " GEM2 ,Reset request interrupt mask for GEM2" "Not masked,Masked" setclrfld.long 0x00 21. 0x08 21. 0x04 21. " GEM1 ,Reset request interrupt mask for GEM1" "Not masked,Masked" setclrfld.long 0x00 20. 0x08 20. 0x04 20. " GEM0 ,Reset request interrupt mask for GEM0" "Not masked,Masked" setclrfld.long 0x00 18. 0x08 18. 0x04 18. " RPU ,Reset request interrupt mask for RPU Lock-step" "Not masked,Masked" textline " " setclrfld.long 0x00 17. 0x08 17. 0x04 17. " R5_1 ,Reset request interrupt mask for R5_1" "Not masked,Masked" setclrfld.long 0x00 16. 0x08 16. 0x04 16. " R5_0 ,Reset request interrupt mask for R5_0" "Not masked,Masked" setclrfld.long 0x00 12. 0x08 12. 0x04 12. " DISPLAY_PORT ,Reset request interrupt mask for display port" "Not masked,Masked" setclrfld.long 0x00 10. 0x08 10. 0x04 10. " SATA ,Reset request interrupt mask for SATA" "Not masked,Masked" textline " " setclrfld.long 0x00 9. 0x08 9. 0x04 9. " PCIE ,Reset request interrupt mask for pcie" "Not masked,Masked" setclrfld.long 0x00 8. 0x08 8. 0x04 8. " GPU ,Reset request interrupt mask for GPU" "Not masked,Masked" setclrfld.long 0x00 7. 0x08 7. 0x04 7. " PP1 ,Reset request interrupt mask for GPU PP1" "Not masked,Masked" setclrfld.long 0x00 6. 0x08 6. 0x04 6. " PP0 ,Reset request interrupt mask for GPU PP0" "Not masked,Masked" textline " " setclrfld.long 0x00 4. 0x08 4. 0x04 4. " APU ,Reset request interrupt mask for APU" "Not masked,Masked" setclrfld.long 0x00 3. 0x08 3. 0x04 3. " ACPU3 ,Reset request interrupt mask for ACPU3" "Not masked,Masked" setclrfld.long 0x00 2. 0x08 2. 0x04 2. " ACPU2 ,Reset request interrupt mask for ACPU2" "Not masked,Masked" setclrfld.long 0x00 1. 0x08 1. 0x04 1. " ACPU1 ,Reset request interrupt mask for ACPU1" "Not masked,Masked" textline " " setclrfld.long 0x00 0. 0x08 0. 0x04 0. " ACPU0 ,Reset request interrupt mask for ACPU0" "Not masked,Masked" wgroup.long 0x420++0x03 line.long 0x00 "REQ_SWRST_TRIG,Reset Request Trigger Register" bitfld.long 0x00 31. " PL ,Reset request trigger for PL" "No effect,Trigger" bitfld.long 0x00 30. " FP ,Reset request trigger for FP domain" "No effect,Trigger" bitfld.long 0x00 29. " LP ,Reset request trigger for LP domain" "No effect,Trigger" bitfld.long 0x00 28. " PS_ONLY ,Reset request trigger for PS-Only" "No effect,Trigger" textline " " bitfld.long 0x00 27. " IOU ,Reset request trigger for IOU" "No effect,Trigger" bitfld.long 0x00 25. " USB1 ,Reset request trigger for USB1" "No effect,Trigger" bitfld.long 0x00 24. " USB0 ,Reset request trigger for USB0" "No effect,Trigger" bitfld.long 0x00 23. " GEM3 ,Reset request trigger for GEM3" "No effect,Trigger" textline " " bitfld.long 0x00 22. " GEM2 ,Reset request trigger for GEM2" "No effect,Trigger" bitfld.long 0x00 21. " GEM1 ,Reset request trigger for GEM1" "No effect,Trigger" bitfld.long 0x00 20. " GEM0 ,Reset request trigger for GEM0" "No effect,Trigger" bitfld.long 0x00 18. " RPU ,Reset request trigger for RPU Lock-step" "No effect,Trigger" textline " " bitfld.long 0x00 17. " R5_1 ,Reset request trigger for R5_1" "No effect,Trigger" bitfld.long 0x00 16. " R5_0 ,Reset request trigger for R5_0" "No effect,Trigger" bitfld.long 0x00 12. " DISPLAY_PORT ,Reset request trigger for display port" "No effect,Trigger" bitfld.long 0x00 10. " SATA ,Reset request trigger for SATA" "No effect,Trigger" textline " " bitfld.long 0x00 9. " PCIE ,Reset request trigger for pcie" "No effect,Trigger" bitfld.long 0x00 8. " GPU ,Reset request trigger for GPU" "No effect,Trigger" bitfld.long 0x00 7. " PP1 ,Reset request trigger for GPU PP1" "No effect,Trigger" bitfld.long 0x00 6. " PP0 ,Reset request trigger for GPU PP0" "No effect,Trigger" textline " " bitfld.long 0x00 4. " APU ,Reset request trigger for APU" "No effect,Trigger" bitfld.long 0x00 3. " ACPU3 ,Reset request trigger for ACPU3" "No effect,Trigger" bitfld.long 0x00 2. " ACPU2 ,Reset request trigger for ACPU2" "No effect,Trigger" bitfld.long 0x00 1. " ACPU1 ,Reset request trigger for ACPU1" "No effect,Trigger" textline " " bitfld.long 0x00 0. " ACPU0 ,Reset request trigger for ACPU0" "No effect,Trigger" group.long 0x510++0x03 line.long 0x00 "REQ_AUX_STATUS,Auxilliary Request Status Register" eventfld.long 0x00 17. " SERV_REQ_10 ,Auxilliary service request 10 status" "No request,Request" eventfld.long 0x00 16. " SERV_REQ_9 ,Auxilliary service request 9 status" "No request,Request" eventfld.long 0x00 13. " SERV_REQ_8 ,Auxilliary service request 8 status" "No request,Request" eventfld.long 0x00 12. " SERV_REQ_7 ,Auxilliary service request 7 status" "No request,Request" textline " " eventfld.long 0x00 10. " SERV_REQ_6 ,Auxilliary service request 6 status" "No request,Request" eventfld.long 0x00 7. " SERV_REQ_5 ,Auxilliary service request 5 status" "No request,Request" eventfld.long 0x00 6. " SERV_REQ_4 ,Auxilliary service request 4 status" "No request,Request" eventfld.long 0x00 3. " SERV_REQ_3 ,Auxilliary service request 3 status" "No request,Request" textline " " eventfld.long 0x00 2. " SERV_REQ_2 ,Auxilliary service request 2 status" "No request,Request" eventfld.long 0x00 1. " SERV_REQ_1 ,Auxilliary service request 1 status" "No request,Request" eventfld.long 0x00 0. " SERV_REQ_0 ,Auxilliary service request 0 status" "No request,Request" group.long 0x518++0x03 line.long 0x00 "REQ_AUX_INT_MASK_SET/CLR,Auxilliary Service Request Interrupt Mask Register" setclrfld.long 0x00 17. 0x08 17. 0x04 17. " SERV_REQ_10 ,Auxilliary service request 10 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 16. 0x08 16. 0x04 16. " SERV_REQ_9 ,Auxilliary service request 9 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 13. 0x08 13. 0x04 13. " SERV_REQ_8 ,Auxilliary service request 8 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 12. 0x08 12. 0x04 12. " SERV_REQ_7 ,Auxilliary service request 7 interrupt mask" "Not masked,Masked" textline " " setclrfld.long 0x00 10. 0x08 10. 0x04 10. " SERV_REQ_6 ,Auxilliary service request 6 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 7. 0x08 7. 0x04 7. " SERV_REQ_5 ,Auxilliary service request 5 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 6. 0x08 6. 0x04 6. " SERV_REQ_4 ,Auxilliary service request 4 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 3. 0x08 3. 0x04 3. " SERV_REQ_3 ,Auxilliary service request 3 interrupt mask" "Not masked,Masked" textline " " setclrfld.long 0x00 2. 0x08 2. 0x04 2. " SERV_REQ_2 ,Auxilliary service request 2 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 1. 0x08 1. 0x04 1. " SERV_REQ_1 ,Auxilliary service request 1 interrupt mask" "Not masked,Masked" setclrfld.long 0x00 0. 0x08 0. 0x04 0. " SERV_REQ_0 ,Auxilliary service request 0 interrupt mask" "Not masked,Masked" wgroup.long 0x520++0x03 line.long 0x00 "REQ_AUX_TRIG,Auxilliary Service Request Trigger Register" bitfld.long 0x00 17. " SERV_REQ_10 ,Auxilliary service request 10 trigger" "No effect,Trigger" bitfld.long 0x00 16. " SERV_REQ_9 ,Auxilliary service request 9 trigger" "No effect,Trigger" bitfld.long 0x00 13. " SERV_REQ_8 ,Auxilliary service request 8 trigger" "No effect,Trigger" bitfld.long 0x00 12. " SERV_REQ_7 ,Auxilliary service request 7 trigger" "No effect,Trigger" textline " " bitfld.long 0x00 10. " SERV_REQ_6 ,Auxilliary service request 6 trigger" "No effect,Trigger" bitfld.long 0x00 7. " SERV_REQ_5 ,Auxilliary service request 5 trigger" "No effect,Trigger" bitfld.long 0x00 6. " SERV_REQ_4 ,Auxilliary service request 4 trigger" "No effect,Trigger" bitfld.long 0x00 3. " SERV_REQ_3 ,Auxilliary service request 3 trigger" "No effect,Trigger" textline " " bitfld.long 0x00 2. " SERV_REQ_2 ,Auxilliary service request 2 trigger" "No effect,Trigger" bitfld.long 0x00 1. " SERV_REQ_1 ,Auxilliary service request 1 trigger" "No effect,Trigger" bitfld.long 0x00 0. " SERV_REQ_0 ,Auxilliary service request 0 trigger" "No effect,Trigger" rgroup.long 0x524++0x03 line.long 0x00 "LOGCLR_STATUS,Logic Clear Status Register" bitfld.long 0x00 17. " FP ,Logic clear status for FP domain besides a9s, GPU" "Fail,No fail" bitfld.long 0x00 16. " LP ,Logic clear status for LP domain besides PMU, RPU, and usbs" "Fail,No fail" bitfld.long 0x00 13. " USB1 ,Logic clear status for USB1" "Fail,No fail" bitfld.long 0x00 12. " USB0 ,Logic clear status for USB0" "Fail,No fail" textline " " bitfld.long 0x00 10. " RPU ,Logic clear status for dual_r5" "Fail,No fail" bitfld.long 0x00 7. " PP1 ,Logic clear status for GPU PP1" "Fail,No fail" bitfld.long 0x00 6. " PP0 ,Logic clear status for GPU PP0" "Fail,No fail" bitfld.long 0x00 3. " ACPU3 ,Logic clear status for ACPU3" "Fail,No fail" textline " " bitfld.long 0x00 2. " ACPU2 ,Logic clear status for ACPU2" "Fail,No fail" bitfld.long 0x00 1. " ACPU1 ,Logic clear status for ACPU1" "Fail,No fail" bitfld.long 0x00 0. " ACPU0 ,Logic clear status for ACPU0" "Fail,No fail" group.long 0x528++0x03 line.long 0x00 "CSU_BR_ERROR,CSU Bootrom Error Register" bitfld.long 0x00 31. " BR_ERROR ,Error recorded in the ERR_TYPE field" "No error,Error" hexmask.long.word 0x00 0.--15. 1. " ERR_TYPE ,Bootrom errors" rgroup.long 0x52C++0x03 line.long 0x00 "MB_FAULT_STATUS,Microblaze Fault Status Register" bitfld.long 0x00 31. " R_FFAIL[7] ,Fatal failure - uncorrectable error from RAM ECC" "No error,Error" bitfld.long 0x00 30. " [6] ,Fatal failure - self checking voter error" "No error,Error" bitfld.long 0x00 29. " [5] ,Fatal failure - self checking error for comparator between processor 2 and 3" "No error,Error" bitfld.long 0x00 28. " [4] ,Fatal failure - self checking error for comparator between processor 1 and 3" "No error,Error" textline " " bitfld.long 0x00 27. " [3] ,Fatal failure - self checking error for comparator between processor 1 and 2" "No error,Error" bitfld.long 0x00 26. " [2] ,Fatal failure - lockstep mismatch between processor 2 and 3" "No error,Error" bitfld.long 0x00 25. " [1] ,Fatal failure - lockstep mismatch between processor 1 and 3" "No error,Error" bitfld.long 0x00 24. " [0] ,Fatal failure - lockstep mismatch between processor 1 and 2" "No error,Error" textline " " bitfld.long 0x00 19. " R_SLEEP_RST ,Redundant fault-tolernace state machine: sleep reset" "No error,Error" bitfld.long 0x00 18. " R_LSFAIL[2] ,Lockstep first failure - lockstep mismatch between processor 2 and 3" "No error,Error" bitfld.long 0x00 17. " [1] ,Lockstep first failure - lockstep mismatch between processor 1 and 3" "No error,Error" bitfld.long 0x00 16. " [0] ,Lockstep first failure - lockstep mismatch between processor 1 and 2" "No error,Error" textline " " bitfld.long 0x00 15. " N_FFAIL[7] ,Fatal failure - uncorrectable error from RAM ECC" "No error,Error" bitfld.long 0x00 14. " [6] ,Fatal failure - self checking voter error" "No error,Error" bitfld.long 0x00 13. " [5] ,Fatal failure - self checking error for comparator between processor 2 and 3" "No error,Error" bitfld.long 0x00 12. " [4] ,Fatal failure - self checking error for comparator between processor 1 and 3" "No error,Error" textline " " bitfld.long 0x00 11. " [3] ,Fatal failure - self checking error for comparator between processor 1 and 2" "No error,Error" bitfld.long 0x00 10. " [2] ,Fatal failure - lockstep mismatch between processor 2 and 3" "No error,Error" bitfld.long 0x00 9. " [1] ,Fatal failure - lockstep mismatch between processor 2 and 3" "No error,Error" bitfld.long 0x00 8. " [0] ,Fatal failure - lockstep mismatch between processor 1 and 2" "No error,Error" textline " " bitfld.long 0x00 3. " N_SLEEP_RST ,Nominal fault-tolernace state machine: sleep reset." "No error,Error" bitfld.long 0x00 2. " N_LSFAIL[2] ,Lockstep first failure - lockstep mismatch between processor 2 and 3" "No error,Error" bitfld.long 0x00 1. " [1] ,Lockstep first failure - lockstep mismatch between processor 1 and 3" "No error,Error" bitfld.long 0x00 0. " [0] ,Lockstep first failure - lockstep mismatch between processor 1 and 2" "No error,Error" textline " " group.long 0x530++0x03 line.long 0x00 "ERROR_STATUS_1,Error Status Register 1" eventfld.long 0x00 31. " AUX3 ,Auxilliary error 3" "No error,Error" eventfld.long 0x00 30. " AUX2 ,Auxilliary error 2" "No error,Error" eventfld.long 0x00 29. " AUX1 ,Auxilliary error 1" "No error,Error" eventfld.long 0x00 28. " AUX0 ,Auxilliary error 0" "No error,Error" textline " " eventfld.long 0x00 27. " DFT ,Unexpected enablement of DFT features error" "No error,Error" eventfld.long 0x00 26. " CLK_MON ,Clock monitor error" "No error,Error" eventfld.long 0x00 25. " XMPU_FPS ,FPS XPMU error" "No error,Error" eventfld.long 0x00 24. " XMPU_LPS ,LPS XMPU error" "No error,Error" textline " " eventfld.long 0x00 23. " PWR_SUPPLY[7] ,Supply detection 7 failure error" "No error,Error" eventfld.long 0x00 22. " [6] ,Supply detection 6 failure error" "No error,Error" eventfld.long 0x00 21. " [5] ,Supply detection 5 failure error" "No error,Error" eventfld.long 0x00 20. " [4] ,Supply detection 4 failure error" "No error,Error" textline " " eventfld.long 0x00 19. " [3] ,Supply detection 3 failure error" "No error,Error" eventfld.long 0x00 18. " [2] ,Supply detection 2 failure error" "No error,Error" eventfld.long 0x00 17. " [1] ,Supply detection 1 failure error" "No error,Error" eventfld.long 0x00 16. " [0] ,Supply detection 0 failure error" "No error,Error" textline " " eventfld.long 0x00 13. " FPD_SWDT ,FPD system Watch-Dog timer error" "No error,Error" eventfld.long 0x00 12. " LPD_SWDT ,LPD system Watch-Dog timer error" "No error,Error" eventfld.long 0x00 9. " RPU_CCF ,RPU CCF error" "No error,Error" eventfld.long 0x00 7. " RPU_LS[1] ,RPU lockstep error from R5_1" "No error,Error" textline " " eventfld.long 0x00 6. " [0] ,RPU lockstep error from R5_0" "No error,Error" eventfld.long 0x00 5. " FPD_TEMP ,FPD temperature shutdown alert" "No error,Error" eventfld.long 0x00 4. " LPD_TEMP ,LPD temperature shutdown alert" "No error,Error" eventfld.long 0x00 3. " RPU1 ,RPU1 error including both correctable and uncorrectable errors" "No error,Error" textline " " eventfld.long 0x00 2. " RPU0 ,RPU0 error including both correctable and uncorrectable errors" "No error,Error" eventfld.long 0x00 1. " OCM_ECC ,OCM uncorrectable ECC error" "No error,Error" eventfld.long 0x00 0. " DDR_ECC ,DDR uncorrectable ECC error" "No error,Error" group.long 0x534++0x03 line.long 0x00 "ERROR_INT_MASK_1_SET/CLR,Error Register 1 Interrupt Mask Register" setclrfld.long 0x00 31. 0x08 31. 0x04 31. " AUX3 ,Auxilliary error 3" "Not masked,Masked" setclrfld.long 0x00 30. 0x08 30. 0x04 30. " AUX2 ,Auxilliary error 2" "Not masked,Masked" setclrfld.long 0x00 29. 0x08 29. 0x04 29. " AUX1 ,Auxilliary error 1" "Not masked,Masked" setclrfld.long 0x00 28. 0x08 28. 0x04 28. " AUX0 ,Auxilliary error 0" "Not masked,Masked" textline " " setclrfld.long 0x00 27. 0x08 27. 0x04 27. " DFT ,Unexpected enablement of DFT features error" "Not masked,Masked" setclrfld.long 0x00 26. 0x08 26. 0x04 26. " CLK_MON ,Clock monitor error" "Not masked,Masked" setclrfld.long 0x00 25. 0x08 25. 0x04 25. " XMPU_FPS ,FPS XPMU error" "Not masked,Masked" setclrfld.long 0x00 24. 0x08 24. 0x04 24. " XMPU_LPS ,LPS XMPU error" "Not masked,Masked" textline " " setclrfld.long 0x00 23. 0x08 23. 0x04 23. " PWR_SUPPLY[7] ,Supply detection 7 failure error" "Not masked,Masked" setclrfld.long 0x00 22. 0x08 22. 0x04 22. " [6] ,Supply detection 6 failure error" "Not masked,Masked" setclrfld.long 0x00 21. 0x08 21. 0x04 21. " [5] ,Supply detection 5 failure error" "Not masked,Masked" setclrfld.long 0x00 20. 0x08 20. 0x04 20. " [4] ,Supply detection 4 failure error" "Not masked,Masked" textline " " setclrfld.long 0x00 19. 0x08 19. 0x04 19. " [3] ,Supply detection 3 failure error" "Not masked,Masked" setclrfld.long 0x00 18. 0x08 18. 0x04 18. " [2] ,Supply detection 2 failure error" "Not masked,Masked" setclrfld.long 0x00 17. 0x08 17. 0x04 17. " [1] ,Supply detection 1 failure error" "Not masked,Masked" setclrfld.long 0x00 16. 0x08 16. 0x04 16. " [0] ,Supply detection 0 failure error" "Not masked,Masked" textline " " setclrfld.long 0x00 13. 0x08 13. 0x04 13. " FPD_SWDT ,FPD system Watch-Dog timer error" "Not masked,Masked" setclrfld.long 0x00 12. 0x08 12. 0x04 12. " LPD_SWDT ,LPD system Watch-Dog timer error" "Not masked,Masked" setclrfld.long 0x00 9. 0x08 9. 0x04 9. " RPU_CCF ,RPU CCF error" "Not masked,Masked" setclrfld.long 0x00 7. 0x08 7. 0x04 7. " RPU_LS[1] ,RPU lockstep error from R5_1" "Not masked,Masked" textline " " setclrfld.long 0x00 6. 0x08 6. 0x04 6. " [0] ,RPU lockstep error from R5_0" "Not masked,Masked" setclrfld.long 0x00 5. 0x08 5. 0x04 5. " FPD_TEMP ,FPD temperature shutdown alert" "Not masked,Masked" setclrfld.long 0x00 4. 0x08 4. 0x04 4. " LPD_TEMP ,LPD temperature shutdown alert" "Not masked,Masked" setclrfld.long 0x00 3. 0x08 3. 0x04 3. " RPU1 ,RPU1 error including both correctable and uncorrectable errors" "Not masked,Masked" textline " " setclrfld.long 0x00 2. 0x08 2. 0x04 2. " RPU0 ,RPU0 error including both correctable and uncorrectable errors" "Not masked,Masked" setclrfld.long 0x00 1. 0x08 1. 0x04 1. " OCM_ECC ,OCM uncorrectable ECC error" "Not masked,Masked" setclrfld.long 0x00 0. 0x08 0. 0x04 0. " DDR_ECC ,DDR uncorrectable ECC error" "Not masked,Masked" group.long 0x540++0x03 line.long 0x00 "ERROR_STATUS_2,Error Status Register 2" eventfld.long 0x00 26. " CSU_ROM ,Errors associated with CSU ROM" "No error,Error" eventfld.long 0x00 25. " PMU_PB ,Errors associated with PMU preboot" "No error,Error" eventfld.long 0x00 24. " PMU_SERVICE ,Errors associated with PMU ROM services" "No error,Error" eventfld.long 0x00 21. " PMU_FW[3] ,PMU firmware error 3" "No error,Error" textline " " eventfld.long 0x00 20. " [2] ,PMU firmware error 2" "No error,Error" eventfld.long 0x00 19. " [1] ,PMU firmware error 1" "No error,Error" eventfld.long 0x00 18. " [0] ,PMU firmware error 0" "No error,Error" eventfld.long 0x00 17. " PMU_UC ,Uncorrectable PMU error" "No error,Error" textline " " eventfld.long 0x00 16. " CSU ,CSU error" "No error,Error" eventfld.long 0x00 12. " PLL_LOCK[4] ,PLL lock error 4" "No error,Error" eventfld.long 0x00 11. " [3] ,PLL lock error 3" "No error,Error" eventfld.long 0x00 10. " [2] ,PLL lock error 2" "No error,Error" textline " " eventfld.long 0x00 9. " [1] ,PLL lock error 1" "No error,Error" eventfld.long 0x00 8. " [0] ,PLL lock error 0" "No error,Error" eventfld.long 0x00 5. " PL[3] ,PL generic error 3 passed to PS" "No error,Error" eventfld.long 0x00 4. " [2] ,PL generic error 2 passed to PS" "No error,Error" textline " " eventfld.long 0x00 3. " [1] ,PL generic error 1 passed to PS" "No error,Error" eventfld.long 0x00 2. " [0] ,PL generic error 0 passed to PS" "No error,Error" eventfld.long 0x00 1. " LPS_TO ,LPS_TO error" "No error,Error" eventfld.long 0x00 0. " FPS_TO ,FPS_TO error" "No error,Error" group.long 0x544++0x03 line.long 0x00 "ERROR_INT_MASK_2_SET/CLR,Error Register 2 Interrupt Mask Register" setclrfld.long 0x00 26. 0x08 26. 0x04 26. " CSU_ROM ,Errors associated with CSU ROM" "Not masked,Masked" setclrfld.long 0x00 25. 0x08 25. 0x04 25. " PMU_PB ,Errors associated with PMU preboot" "Not masked,Masked" setclrfld.long 0x00 24. 0x08 24. 0x04 24. " PMU_SERVICE ,Errors associated with PMU ROM services" "Not masked,Masked" setclrfld.long 0x00 21. 0x08 21. 0x04 21. " PMU_FW[3] ,PMU firmware error 3" "Not masked,Masked" textline " " setclrfld.long 0x00 20. 0x08 20. 0x04 20. " [2] ,PMU firmware error 2" "Not masked,Masked" setclrfld.long 0x00 19. 0x08 19. 0x04 19. " [1] ,PMU firmware error 1" "Not masked,Masked" setclrfld.long 0x00 18. 0x08 18. 0x04 18. " [0] ,PMU firmware error 0" "Not masked,Masked" setclrfld.long 0x00 17. 0x08 17. 0x04 17. " PMU_UC ,Uncorrectable PMU error" "Not masked,Masked" textline " " setclrfld.long 0x00 16. 0x08 16. 0x04 16. " CSU ,CSU error" "Not masked,Masked" setclrfld.long 0x00 12. 0x08 12. 0x04 12. " PLL_LOCK[4] ,PLL lock error 4" "Not masked,Masked" setclrfld.long 0x00 11. 0x08 11. 0x04 11. " [3] ,PLL lock error 3" "Not masked,Masked" setclrfld.long 0x00 10. 0x08 10. 0x04 10. " [2] ,PLL lock error 2" "Not masked,Masked" textline " " setclrfld.long 0x00 9. 0x08 9. 0x04 9. " [1] ,PLL lock error 1" "Not masked,Masked" setclrfld.long 0x00 8. 0x08 8. 0x04 8. " [0] ,PLL lock error 0" "Not masked,Masked" setclrfld.long 0x00 5. 0x08 5. 0x04 5. " PL[3] ,PL generic error 3 passed to PS" "Not masked,Masked" setclrfld.long 0x00 4. 0x08 4. 0x04 4. " [2] ,PL generic error 2 passed to PS" "Not masked,Masked" textline " " setclrfld.long 0x00 3. 0x08 3. 0x04 3. " [1] ,PL generic error 1 passed to PS" "Not masked,Masked" setclrfld.long 0x00 2. 0x08 2. 0x04 2. " [0] ,PL generic error 0 passed to PS" "Not masked,Masked" setclrfld.long 0x00 1. 0x08 1. 0x04 1. " LPS_TO ,LPS_TO error" "Not masked,Masked" setclrfld.long 0x00 0. 0x08 0. 0x04 0. " FPS_TO ,FPS_TO error" "Not masked,Masked" group.long 0x550++0x03 line.long 0x00 "ERROR_POR_MASK_1_SET/CLR,Error Register 1 POR Mask Register" setclrfld.long 0x00 31. 0x08 31. 0x04 31. " AUX3 ,Auxilliary error 3" "Not masked,Masked" setclrfld.long 0x00 30. 0x08 30. 0x04 30. " AUX2 ,Auxilliary error 2" "Not masked,Masked" setclrfld.long 0x00 29. 0x08 29. 0x04 29. " AUX1 ,Auxilliary error 1" "Not masked,Masked" setclrfld.long 0x00 28. 0x08 28. 0x04 28. " AUX0 ,Auxilliary error 0" "Not masked,Masked" textline " " setclrfld.long 0x00 27. 0x08 27. 0x04 27. " DFT ,Unexpected enablement of DFT features error" "Not masked,Masked" setclrfld.long 0x00 26. 0x08 26. 0x04 26. " CLK_MON ,Clock monitor error" "Not masked,Masked" setclrfld.long 0x00 25. 0x08 25. 0x04 25. " XMPU_FPS ,FPS XPMU error" "Not masked,Masked" setclrfld.long 0x00 24. 0x08 24. 0x04 24. " XMPU_LPS ,LPS XMPU error" "Not masked,Masked" textline " " setclrfld.long 0x00 23. 0x08 23. 0x04 23. " PWR_SUPPLY[7] ,Supply detection 7 failure error" "Not masked,Masked" setclrfld.long 0x00 22. 0x08 22. 0x04 22. " [6] ,Supply detection 6 failure error" "Not masked,Masked" setclrfld.long 0x00 21. 0x08 21. 0x04 21. " [5] ,Supply detection 5 failure error" "Not masked,Masked" setclrfld.long 0x00 20. 0x08 20. 0x04 20. " [4] ,Supply detection 4 failure error" "Not masked,Masked" textline " " setclrfld.long 0x00 19. 0x08 19. 0x04 19. " [3] ,Supply detection 3 failure error" "Not masked,Masked" setclrfld.long 0x00 18. 0x08 18. 0x04 18. " [2] ,Supply detection 2 failure error" "Not masked,Masked" setclrfld.long 0x00 17. 0x08 17. 0x04 17. " [1] ,Supply detection 1 failure error" "Not masked,Masked" setclrfld.long 0x00 16. 0x08 16. 0x04 16. " [0] ,Supply detection 0 failure error" "Not masked,Masked" textline " " setclrfld.long 0x00 13. 0x08 13. 0x04 13. " FPD_SWDT ,FPD system Watch-Dog timer error" "Not masked,Masked" setclrfld.long 0x00 12. 0x08 12. 0x04 12. " LPD_SWDT ,LPD system Watch-Dog timer error" "Not masked,Masked" setclrfld.long 0x00 9. 0x08 9. 0x04 9. " RPU_CCF ,RPU CCF error" "Not masked,Masked" setclrfld.long 0x00 7. 0x08 7. 0x04 7. " RPU_LS[1] ,RPU lockstep error from R5_1" "Not masked,Masked" textline " " setclrfld.long 0x00 6. 0x08 6. 0x04 6. " [0] ,RPU lockstep error from R5_0" "Not masked,Masked" setclrfld.long 0x00 5. 0x08 5. 0x04 5. " FPD_TEMP ,FPD temperature shutdown alert" "Not masked,Masked" setclrfld.long 0x00 4. 0x08 4. 0x04 4. " LPD_TEMP ,LPD temperature shutdown alert" "Not masked,Masked" setclrfld.long 0x00 3. 0x08 3. 0x04 3. " RPU1 ,RPU1 error including both correctable and uncorrectable errors" "Not masked,Masked" textline " " setclrfld.long 0x00 2. 0x08 2. 0x04 2. " RPU0 ,RPU0 error including both correctable and uncorrectable errors" "Not masked,Masked" setclrfld.long 0x00 1. 0x08 1. 0x04 1. " OCM_ECC ,OCM uncorrectable ECC error" "Not masked,Masked" setclrfld.long 0x00 0. 0x08 0. 0x04 0. " DDR_ECC ,DDR uncorrectable ECC error" "Not masked,Masked" group.long 0x55C++0x03 line.long 0x00 "ERROR_POR_MASK_2_SET/CLR,Error Register 2 POR Mask Register" setclrfld.long 0x00 26. 0x08 26. 0x04 26. " CSU_ROM ,Errors associated with CSU ROM" "Not masked,Masked" setclrfld.long 0x00 25. 0x08 25. 0x04 25. " PMU_PB ,Errors associated with PMU preboot" "Not masked,Masked" setclrfld.long 0x00 24. 0x08 24. 0x04 24. " PMU_SERVICE ,Errors associated with PMU ROM services" "Not masked,Masked" setclrfld.long 0x00 21. 0x08 21. 0x04 21. " PMU_FW[3] ,PMU firmware error 3" "Not masked,Masked" textline " " setclrfld.long 0x00 20. 0x08 20. 0x04 20. " [2] ,PMU firmware error 2" "Not masked,Masked" setclrfld.long 0x00 19. 0x08 19. 0x04 19. " [1] ,PMU firmware error 1" "Not masked,Masked" setclrfld.long 0x00 18. 0x08 18. 0x04 18. " [0] ,PMU firmware error 0" "Not masked,Masked" setclrfld.long 0x00 17. 0x08 17. 0x04 17. " PMU_UC ,Uncorrectable PMU error" "Not masked,Masked" textline " " setclrfld.long 0x00 16. 0x08 16. 0x04 16. " CSU ,CSU error" "Not masked,Masked" setclrfld.long 0x00 12. 0x08 12. 0x04 12. " PLL_LOCK[4] ,PLL lock error 4" "Not masked,Masked" setclrfld.long 0x00 11. 0x08 11. 0x04 11. " [3] ,PLL lock error 3" "Not masked,Masked" setclrfld.long 0x00 10. 0x08 10. 0x04 10. " [2] ,PLL lock error 2" "Not masked,Masked" textline " " setclrfld.long 0x00 9. 0x08 9. 0x04 9. " [1] ,PLL lock error 1" "Not masked,Masked" setclrfld.long 0x00 8. 0x08 8. 0x04 8. " [0] ,PLL lock error 0" "Not masked,Masked" setclrfld.long 0x00 5. 0x08 5. 0x04 5. " PL[3] ,PL generic error 3 passed to PS" "Not masked,Masked" setclrfld.long 0x00 4. 0x08 4. 0x04 4. " [2] ,PL generic error 2 passed to PS" "Not masked,Masked" textline " " setclrfld.long 0x00 3. 0x08 3. 0x04 3. " [1] ,PL generic error 1 passed to PS" "Not masked,Masked" setclrfld.long 0x00 2. 0x08 2. 0x04 2. " [0] ,PL generic error 0 passed to PS" "Not masked,Masked" setclrfld.long 0x00 1. 0x08 1. 0x04 1. " LPS_TO ,LPS_TO error" "Not masked,Masked" setclrfld.long 0x00 0. 0x08 0. 0x04 0. " FPS_TO ,FPS_TO error" "Not masked,Masked" group.long 0x568++0x03 line.long 0x00 "ERROR_SRST_MASK_1_SET/CLR,Error Register 1 SRST Mask Register" setclrfld.long 0x00 31. 0x08 31. 0x04 31. " AUX3 ,Auxilliary error 3" "Not masked,Masked" setclrfld.long 0x00 30. 0x08 30. 0x04 30. " AUX2 ,Auxilliary error 2" "Not masked,Masked" setclrfld.long 0x00 29. 0x08 29. 0x04 29. " AUX1 ,Auxilliary error 1" "Not masked,Masked" setclrfld.long 0x00 28. 0x08 28. 0x04 28. " AUX0 ,Auxilliary error 0" "Not masked,Masked" textline " " setclrfld.long 0x00 27. 0x08 27. 0x04 27. " DFT ,Unexpected enablement of DFT features error" "Not masked,Masked" setclrfld.long 0x00 26. 0x08 26. 0x04 26. " CLK_MON ,Clock monitor error" "Not masked,Masked" setclrfld.long 0x00 25. 0x08 25. 0x04 25. " XMPU_FPS ,FPS XPMU error" "Not masked,Masked" setclrfld.long 0x00 24. 0x08 24. 0x04 24. " XMPU_LPS ,LPS XMPU error" "Not masked,Masked" textline " " setclrfld.long 0x00 23. 0x08 23. 0x04 23. " PWR_SUPPLY[7] ,Supply detection 7 failure error" "Not masked,Masked" setclrfld.long 0x00 22. 0x08 22. 0x04 22. " [6] ,Supply detection 6 failure error" "Not masked,Masked" setclrfld.long 0x00 21. 0x08 21. 0x04 21. " [5] ,Supply detection 5 failure error" "Not masked,Masked" setclrfld.long 0x00 20. 0x08 20. 0x04 20. " [4] ,Supply detection 4 failure error" "Not masked,Masked" textline " " setclrfld.long 0x00 19. 0x08 19. 0x04 19. " [3] ,Supply detection 3 failure error" "Not masked,Masked" setclrfld.long 0x00 18. 0x08 18. 0x04 18. " [2] ,Supply detection 2 failure error" "Not masked,Masked" setclrfld.long 0x00 17. 0x08 17. 0x04 17. " [1] ,Supply detection 1 failure error" "Not masked,Masked" setclrfld.long 0x00 16. 0x08 16. 0x04 16. " [0] ,Supply detection 0 failure error" "Not masked,Masked" textline " " setclrfld.long 0x00 13. 0x08 13. 0x04 13. " FPD_SWDT ,FPD system Watch-Dog timer error" "Not masked,Masked" setclrfld.long 0x00 12. 0x08 12. 0x04 12. " LPD_SWDT ,LPD system Watch-Dog timer error" "Not masked,Masked" setclrfld.long 0x00 9. 0x08 9. 0x04 9. " RPU_CCF ,RPU CCF error" "Not masked,Masked" setclrfld.long 0x00 7. 0x08 7. 0x04 7. " RPU_LS[1] ,RPU lockstep error from R5_1" "Not masked,Masked" textline " " setclrfld.long 0x00 6. 0x08 6. 0x04 6. " [0] ,RPU lockstep error from R5_0" "Not masked,Masked" setclrfld.long 0x00 5. 0x08 5. 0x04 5. " FPD_TEMP ,FPD temperature shutdown alert" "Not masked,Masked" setclrfld.long 0x00 4. 0x08 4. 0x04 4. " LPD_TEMP ,LPD temperature shutdown alert" "Not masked,Masked" setclrfld.long 0x00 3. 0x08 3. 0x04 3. " RPU1 ,RPU1 error including both correctable and uncorrectable errors" "Not masked,Masked" textline " " setclrfld.long 0x00 2. 0x08 2. 0x04 2. " RPU0 ,RPU0 error including both correctable and uncorrectable errors" "Not masked,Masked" setclrfld.long 0x00 1. 0x08 1. 0x04 1. " OCM_ECC ,OCM uncorrectable ECC error" "Not masked,Masked" setclrfld.long 0x00 0. 0x08 0. 0x04 0. " DDR_ECC ,DDR uncorrectable ECC error" "Not masked,Masked" group.long 0x574++0x03 line.long 0x00 "ERROR_SRST_MASK_2_SET/CLR,Error Register 2 SRST Mask Register" setclrfld.long 0x00 26. 0x08 26. 0x04 26. " CSU_ROM ,Errors associated with CSU ROM" "Not masked,Masked" setclrfld.long 0x00 25. 0x08 25. 0x04 25. " PMU_PB ,Errors associated with PMU preboot" "Not masked,Masked" setclrfld.long 0x00 24. 0x08 24. 0x04 24. " PMU_SERVICE ,Errors associated with PMU ROM services" "Not masked,Masked" setclrfld.long 0x00 21. 0x08 21. 0x04 21. " PMU_FW[3] ,PMU firmware error 3" "Not masked,Masked" textline " " setclrfld.long 0x00 20. 0x08 20. 0x04 20. " [2] ,PMU firmware error 2" "Not masked,Masked" setclrfld.long 0x00 19. 0x08 19. 0x04 19. " [1] ,PMU firmware error 1" "Not masked,Masked" setclrfld.long 0x00 18. 0x08 18. 0x04 18. " [0] ,PMU firmware error 0" "Not masked,Masked" setclrfld.long 0x00 17. 0x08 17. 0x04 17. " PMU_UC ,Uncorrectable PMU error" "Not masked,Masked" textline " " setclrfld.long 0x00 16. 0x08 16. 0x04 16. " CSU ,CSU error" "Not masked,Masked" setclrfld.long 0x00 12. 0x08 12. 0x04 12. " PLL_LOCK[4] ,PLL lock error 4" "Not masked,Masked" setclrfld.long 0x00 11. 0x08 11. 0x04 11. " [3] ,PLL lock error 3" "Not masked,Masked" setclrfld.long 0x00 10. 0x08 10. 0x04 10. " [2] ,PLL lock error 2" "Not masked,Masked" textline " " setclrfld.long 0x00 9. 0x08 9. 0x04 9. " [1] ,PLL lock error 1" "Not masked,Masked" setclrfld.long 0x00 8. 0x08 8. 0x04 8. " [0] ,PLL lock error 0" "Not masked,Masked" setclrfld.long 0x00 5. 0x08 5. 0x04 5. " PL[3] ,PL generic error 3 passed to PS" "Not masked,Masked" setclrfld.long 0x00 4. 0x08 4. 0x04 4. " [2] ,PL generic error 2 passed to PS" "Not masked,Masked" textline " " setclrfld.long 0x00 3. 0x08 3. 0x04 3. " [1] ,PL generic error 1 passed to PS" "Not masked,Masked" setclrfld.long 0x00 2. 0x08 2. 0x04 2. " [0] ,PL generic error 0 passed to PS" "Not masked,Masked" setclrfld.long 0x00 1. 0x08 1. 0x04 1. " LPS_TO ,LPS_TO error" "Not masked,Masked" setclrfld.long 0x00 0. 0x08 0. 0x04 0. " FPS_TO ,FPS_TO error" "Not masked,Masked" group.long 0x580++0x03 line.long 0x00 "ERROR_SIG_MASK_1_SET/CLR,Error Register 1 Signal Mask Register" setclrfld.long 0x00 31. 0x08 31. 0x04 31. " AUX3 ,Auxilliary error 3" "Not masked,Masked" setclrfld.long 0x00 30. 0x08 30. 0x04 30. " AUX2 ,Auxilliary error 2" "Not masked,Masked" setclrfld.long 0x00 29. 0x08 29. 0x04 29. " AUX1 ,Auxilliary error 1" "Not masked,Masked" setclrfld.long 0x00 28. 0x08 28. 0x04 28. " AUX0 ,Auxilliary error 0" "Not masked,Masked" textline " " setclrfld.long 0x00 27. 0x08 27. 0x04 27. " DFT ,Unexpected enablement of DFT features error" "Not masked,Masked" setclrfld.long 0x00 26. 0x08 26. 0x04 26. " CLK_MON ,Clock monitor error" "Not masked,Masked" setclrfld.long 0x00 25. 0x08 25. 0x04 25. " XMPU_FPS ,FPS XPMU error" "Not masked,Masked" setclrfld.long 0x00 24. 0x08 24. 0x04 24. " XMPU_LPS ,LPS XMPU error" "Not masked,Masked" textline " " setclrfld.long 0x00 23. 0x08 23. 0x04 23. " PWR_SUPPLY[7] ,Supply detection 7 failure error" "Not masked,Masked" setclrfld.long 0x00 22. 0x08 22. 0x04 22. " [6] ,Supply detection 6 failure error" "Not masked,Masked" setclrfld.long 0x00 21. 0x08 21. 0x04 21. " [5] ,Supply detection 5 failure error" "Not masked,Masked" setclrfld.long 0x00 20. 0x08 20. 0x04 20. " [4] ,Supply detection 4 failure error" "Not masked,Masked" textline " " setclrfld.long 0x00 19. 0x08 19. 0x04 19. " [3] ,Supply detection 3 failure error" "Not masked,Masked" setclrfld.long 0x00 18. 0x08 18. 0x04 18. " [2] ,Supply detection 2 failure error" "Not masked,Masked" setclrfld.long 0x00 17. 0x08 17. 0x04 17. " [1] ,Supply detection 1 failure error" "Not masked,Masked" setclrfld.long 0x00 16. 0x08 16. 0x04 16. " [0] ,Supply detection 0 failure error" "Not masked,Masked" textline " " setclrfld.long 0x00 13. 0x08 13. 0x04 13. " FPD_SWDT ,FPD system Watch-Dog timer error" "Not masked,Masked" setclrfld.long 0x00 12. 0x08 12. 0x04 12. " LPD_SWDT ,LPD system Watch-Dog timer error" "Not masked,Masked" setclrfld.long 0x00 9. 0x08 9. 0x04 9. " RPU_CCF ,RPU CCF error" "Not masked,Masked" setclrfld.long 0x00 7. 0x08 7. 0x04 7. " RPU_LS[1] ,RPU lockstep error from R5_1" "Not masked,Masked" textline " " setclrfld.long 0x00 6. 0x08 6. 0x04 6. " [0] ,RPU lockstep error from R5_0" "Not masked,Masked" setclrfld.long 0x00 5. 0x08 5. 0x04 5. " FPD_TEMP ,FPD temperature shutdown alert" "Not masked,Masked" setclrfld.long 0x00 4. 0x08 4. 0x04 4. " LPD_TEMP ,LPD temperature shutdown alert" "Not masked,Masked" setclrfld.long 0x00 3. 0x08 3. 0x04 3. " RPU1 ,RPU1 error including both correctable and uncorrectable errors" "Not masked,Masked" textline " " setclrfld.long 0x00 2. 0x08 2. 0x04 2. " RPU0 ,RPU0 error including both correctable and uncorrectable errors" "Not masked,Masked" setclrfld.long 0x00 1. 0x08 1. 0x04 1. " OCM_ECC ,OCM uncorrectable ECC error" "Not masked,Masked" setclrfld.long 0x00 0. 0x08 0. 0x04 0. " DDR_ECC ,DDR uncorrectable ECC error" "Not masked,Masked" group.long 0x58C++0x03 line.long 0x00 "ERROR_SIG_MASK_2_SET/CLR,Error Register 2 Signal Mask Register" setclrfld.long 0x00 26. 0x08 26. 0x04 26. " CSU_ROM ,Errors associated with CSU ROM" "Not masked,Masked" setclrfld.long 0x00 25. 0x08 25. 0x04 25. " PMU_PB ,Errors associated with PMU preboot" "Not masked,Masked" setclrfld.long 0x00 24. 0x08 24. 0x04 24. " PMU_SERVICE ,Errors associated with PMU ROM services" "Not masked,Masked" setclrfld.long 0x00 21. 0x08 21. 0x04 21. " PMU_FW[3] ,PMU firmware error 3" "Not masked,Masked" textline " " setclrfld.long 0x00 20. 0x08 20. 0x04 20. " [2] ,PMU firmware error 2" "Not masked,Masked" setclrfld.long 0x00 19. 0x08 19. 0x04 19. " [1] ,PMU firmware error 1" "Not masked,Masked" setclrfld.long 0x00 18. 0x08 18. 0x04 18. " [0] ,PMU firmware error 0" "Not masked,Masked" setclrfld.long 0x00 17. 0x08 17. 0x04 17. " PMU_UC ,Uncorrectable PMU error" "Not masked,Masked" textline " " setclrfld.long 0x00 16. 0x08 16. 0x04 16. " CSU ,CSU error" "Not masked,Masked" setclrfld.long 0x00 12. 0x08 12. 0x04 12. " PLL_LOCK[4] ,PLL lock error 4" "Not masked,Masked" setclrfld.long 0x00 11. 0x08 11. 0x04 11. " [3] ,PLL lock error 3" "Not masked,Masked" setclrfld.long 0x00 10. 0x08 10. 0x04 10. " [2] ,PLL lock error 2" "Not masked,Masked" textline " " setclrfld.long 0x00 9. 0x08 9. 0x04 9. " [1] ,PLL lock error 1" "Not masked,Masked" setclrfld.long 0x00 8. 0x08 8. 0x04 8. " [0] ,PLL lock error 0" "Not masked,Masked" setclrfld.long 0x00 5. 0x08 5. 0x04 5. " PL[3] ,PL generic error 3 passed to PS" "Not masked,Masked" setclrfld.long 0x00 4. 0x08 4. 0x04 4. " [2] ,PL generic error 2 passed to PS" "Not masked,Masked" textline " " setclrfld.long 0x00 3. 0x08 3. 0x04 3. " [1] ,PL generic error 1 passed to PS" "Not masked,Masked" setclrfld.long 0x00 2. 0x08 2. 0x04 2. " [0] ,PL generic error 0 passed to PS" "Not masked,Masked" setclrfld.long 0x00 1. 0x08 1. 0x04 1. " LPS_TO ,LPS_TO error" "Not masked,Masked" setclrfld.long 0x00 0. 0x08 0. 0x04 0. " FPS_TO ,FPS_TO error" "Not masked,Masked" group.long 0x5A0++0x07 line.long 0x00 "ERROR_EN_1,Error Enable Register 1" bitfld.long 0x00 31. " AUX3 ,Auxilliary error 3" "Disabled,Enabled" bitfld.long 0x00 30. " AUX2 ,Auxilliary error 2" "Disabled,Enabled" bitfld.long 0x00 29. " AUX1 ,Auxilliary error 1" "Disabled,Enabled" bitfld.long 0x00 28. " AUX0 ,Auxilliary error 0" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " DFT ,Unexpected enablement of DFT features error" "Disabled,Enabled" bitfld.long 0x00 26. " CLK_MON ,Clock monitor error" "Disabled,Enabled" bitfld.long 0x00 25. " XMPU_FPS ,FPS XPMU error" "Disabled,Enabled" bitfld.long 0x00 24. " XMPU_LPS ,LPS XMPU error" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " PWR_SUPPLY[7] ,Supply detection 7 failure error" "Disabled,Enabled" bitfld.long 0x00 22. " [6] ,Supply detection 6 failure error" "Disabled,Enabled" bitfld.long 0x00 21. " [5] ,Supply detection 5 failure error" "Disabled,Enabled" bitfld.long 0x00 20. " [4] ,Supply detection 4 failure error" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " [3] ,Supply detection 3 failure error" "Disabled,Enabled" bitfld.long 0x00 18. " [2] ,Supply detection 2 failure error" "Disabled,Enabled" bitfld.long 0x00 17. " [1] ,Supply detection 1 failure error" "Disabled,Enabled" bitfld.long 0x00 16. " [0] ,Supply detection 0 failure error" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " FPD_SWDT ,FPD system Watch-Dog timer error" "Disabled,Enabled" bitfld.long 0x00 12. " LPD_SWDT ,LPD system Watch-Dog timer error" "Disabled,Enabled" bitfld.long 0x00 9. " RPU_CCF ,RPU CCF error" "Disabled,Enabled" bitfld.long 0x00 7. " RPU_LS[1] ,RPU lockstep error from R5_1" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " [0] ,RPU lockstep error from R5_0" "Disabled,Enabled" bitfld.long 0x00 5. " FPD_TEMP ,FPD temperature shutdown alert" "Disabled,Enabled" bitfld.long 0x00 4. " LPD_TEMP ,LPD temperature shutdown alert" "Disabled,Enabled" bitfld.long 0x00 3. " RPU1 ,RPU1 error including both correctable and uncorrectable errors" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " RPU0 ,RPU0 error including both correctable and uncorrectable errors" "Disabled,Enabled" bitfld.long 0x00 1. " OCM_ECC ,OCM uncorrectable ECC error" "Disabled,Enabled" bitfld.long 0x00 0. " DDR_ECC ,DDR uncorrectable ECC error" "Disabled,Enabled" line.long 0x04 "ERROR_EN_2,Error Enable Register 2" bitfld.long 0x04 26. " CSU_ROM ,Errors associated with CSU ROM" "Disabled,Enabled" bitfld.long 0x04 25. " PMU_PB ,Errors associated with PMU preboot" "Disabled,Enabled" bitfld.long 0x04 24. " PMU_SERVICE ,Errors associated with PMU ROM services" "Disabled,Enabled" bitfld.long 0x04 21. " PMU_FW[3] ,PMU firmware error 3" "Disabled,Enabled" textline " " bitfld.long 0x04 20. " [2] ,PMU firmware error 2" "Disabled,Enabled" bitfld.long 0x04 19. " [1] ,PMU firmware error 1" "Disabled,Enabled" bitfld.long 0x04 18. " [0] ,PMU firmware error 0" "Disabled,Enabled" bitfld.long 0x04 17. " PMU_UC ,Uncorrectable PMU error" "Disabled,Enabled" textline " " bitfld.long 0x04 16. " CSU ,CSU error" "Disabled,Enabled" bitfld.long 0x04 12. " PLL_LOCK[4] ,PLL lock error 4" "Disabled,Enabled" bitfld.long 0x04 11. " [3] ,PLL lock error 3" "Disabled,Enabled" bitfld.long 0x04 10. " [2] ,PLL lock error 2" "Disabled,Enabled" textline " " bitfld.long 0x04 9. " [1] ,PLL lock error 1" "Disabled,Enabled" bitfld.long 0x04 8. " [0] ,PLL lock error 0" "Disabled,Enabled" bitfld.long 0x04 5. " PL[3] ,PL generic error 3 passed to PS" "Disabled,Enabled" bitfld.long 0x04 4. " [2] ,PL generic error 2 passed to PS" "Disabled,Enabled" textline " " bitfld.long 0x04 3. " [1] ,PL generic error 1 passed to PS" "Disabled,Enabled" bitfld.long 0x04 2. " [0] ,PL generic error 0 passed to PS" "Disabled,Enabled" bitfld.long 0x04 1. " LPS_TO ,LPS_TO error" "Disabled,Enabled" bitfld.long 0x04 0. " FPS_TO ,FPS_TO error" "Disabled,Enabled" textline " " wgroup.long 0x600++0x03 line.long 0x00 "AIB_CNTRL,AIB Control Register" bitfld.long 0x00 3. " FPD_AFI_FS ,Request to isolate AFI slave interfaces on the FPD" "No request,Request" bitfld.long 0x00 2. " FPD_AFI_FM ,Request to isolate AFI master interfaces on the FPD" "No request,Request" bitfld.long 0x00 1. " LPD_AFI_FS ,Request to isolate AFI slave interfaces on the LPD" "No request,Request" bitfld.long 0x00 0. " LPD_AFI_FM ,Request to isolate AFI master interfaces on the LPD" "No request,Request" rgroup.long 0x604++0x03 line.long 0x00 "AIB_STATUS,AIB Status Register" bitfld.long 0x00 3. " FPD_AFI_FS ,Acknowledge to isolate AFI slave interfaces on the FPD" "No isolation,Isolation" bitfld.long 0x00 2. " FPD_AFI_FM ,Acknowledge to isolate AFI master interfaces on the FPD" "No isolation,Isolation" bitfld.long 0x00 1. " LPD_AFI_FS ,Acknowledge to isolate AFI slave interfaces on the LPD" "No isolation,Isolation" bitfld.long 0x00 0. " LPD_AFI_FM ,Acknowledge to isolate AFI master interfaces on the LPD" "No isolation,Isolation" group.long 0x608++0x03 line.long 0x00 "GLOBAL_RESET,Global Reset Register" bitfld.long 0x00 10. " PS_ONLY_RST ,PS_ONLY reset" "No reset,Reset" bitfld.long 0x00 9. " FPD_RST ,FPD reset" "No reset,Reset" bitfld.long 0x00 8. " RPU_LS_RST ,R5_0 or lockstep RPU reset" "No reset,Reset" rgroup.long 0x610++0x33 line.long 0x00 "ROM_VALIDATION_STATUS,ROM Validation Status Register" bitfld.long 0x00 1. " PASS ,ROM validation has passed" "Not passed,Passed" bitfld.long 0x00 0. " DONE ,ROM validation is completed" "Not done,Done" line.long 0x04 "ROM_VALIDATION_DIGEST_0,ROM Validation Digest Register 0" line.long 0x08 "ROM_VALIDATION_DIGEST_1,ROM Validation Digest Register 1" line.long 0x0C "ROM_VALIDATION_DIGEST_2,ROM Validation Digest Register 2" line.long 0x10 "ROM_VALIDATION_DIGEST_3,ROM Validation Digest Register 3" line.long 0x14 "ROM_VALIDATION_DIGEST_4,ROM Validation Digest Register 4" line.long 0x18 "ROM_VALIDATION_DIGEST_5,ROM Validation Digest Register 5" line.long 0x1C "ROM_VALIDATION_DIGEST_6,ROM Validation Digest Register 6" line.long 0x20 "ROM_VALIDATION_DIGEST_7,ROM Validation Digest Register 7" line.long 0x24 "ROM_VALIDATION_DIGEST_8,ROM Validation Digest Register 8" line.long 0x28 "ROM_VALIDATION_DIGEST_9,ROM Validation Digest Register 9" line.long 0x2C "ROM_VALIDATION_DIGEST_10,ROM Validation Digest Register 10" line.long 0x30 "ROM_VALIDATION_DIGEST_11,ROM Validation Digest Register 11" group.long 0x650++0x03 line.long 0x00 "SAFETY_GATE,Safety Gate Register" bitfld.long 0x00 2. " PMU_LOGCLR_EN ,PMU logic clear gate function" "Disabled,Enabled" bitfld.long 0x00 1. " LBIST_E ,LBIST gate function" "Disabled,Enabled" bitfld.long 0x00 0. " SCAN_EN ,Test scan mode enable function" "Disabled,Enabled" textline " " group.long 0x700++0x0B line.long 0x00 "MBIST_RST,MBIST Controllers Reset Register" bitfld.long 0x00 31. " REG[31] ,PCIE reset" "No reset,Reset" bitfld.long 0x00 30. " [30] ,SIOU reset" "No reset,Reset" bitfld.long 0x00 29. " [29] ,M400_1 reset" "No reset,Reset" bitfld.long 0x00 28. " [28] ,M400_0 reset" "No reset,Reset" textline " " bitfld.long 0x00 27. " [27] ,GPU reset" "No reset,Reset" bitfld.long 0x00 26. " [26] ,DDR reset" "No reset,Reset" bitfld.long 0x00 25. " [25] ,ACPU_3 reset" "No reset,Reset" bitfld.long 0x00 24. " [24] ,ACPU_2 reset" "No reset,Reset" textline " " bitfld.long 0x00 23. " [23] ,ACPU_1 reset" "No reset,Reset" bitfld.long 0x00 22. " [22] ,ACPU_0 reset" "No reset,Reset" bitfld.long 0x00 21. " [21] ,APU reset" "No reset,Reset" bitfld.long 0x00 20. " [20] ,AFI_5 reset" "No reset,Reset" textline " " bitfld.long 0x00 19. " [19] ,AFI_4 reset" "No reset,Reset" bitfld.long 0x00 18. " [18] ,AFI_3 reset" "No reset,Reset" bitfld.long 0x00 17. " [17] ,AFI_2 reset" "No reset,Reset" bitfld.long 0x00 16. " [16] ,AFI_1 reset" "No reset,Reset" textline " " bitfld.long 0x00 15. " [15] ,AFI_0 reset" "No reset,Reset" bitfld.long 0x00 14. " [14] ,FPD reset" "No reset,Reset" bitfld.long 0x00 13. " [13] ,PSS_CORE_TOP reset" "No reset,Reset" bitfld.long 0x00 12. " [12] ,OCM reset" "No reset,Reset" textline " " bitfld.long 0x00 11. " [11] ,AFI_LPD reset" "No reset,Reset" bitfld.long 0x00 10. " [10] ,USB1 reset" "No reset,Reset" bitfld.long 0x00 9. " [9] ,USB0 reset" "No reset,Reset" bitfld.long 0x00 8. " [8] ,RPU_TIEOFF_WRAPPER reset" "No reset,Reset" textline " " bitfld.long 0x00 7. " [7] ,RPU reset" "No reset,Reset" bitfld.long 0x00 6. " [6] ,IOU reset" "No reset,Reset" bitfld.long 0x00 5. " [5] ,GEM3 reset" "No reset,Reset" bitfld.long 0x00 4. " [4] ,GEM2 reset" "No reset,Reset" textline " " bitfld.long 0x00 3. " [3] ,GEM1 reset" "No reset,Reset" bitfld.long 0x00 2. " [2] ,GEM0 reset" "No reset,Reset" bitfld.long 0x00 1. " [1] ,CAN1 reset" "No reset,Reset" bitfld.long 0x00 0. " [0] ,CAN0 reset" "No reset,Reset" line.long 0x04 "MBIST_PG_EN,MBIST Controllers PG_EN Register" bitfld.long 0x04 31. " REG[31] ,PCIE PG_EN" "Disabled,Enabled" bitfld.long 0x04 30. " [30] ,SIOU PG_EN" "Disabled,Enabled" bitfld.long 0x04 29. " [29] ,M400_1 PG_EN" "Disabled,Enabled" bitfld.long 0x04 28. " [28] ,M400_0 PG_EN" "Disabled,Enabled" textline " " bitfld.long 0x04 27. " [27] ,GPU PG_EN" "Disabled,Enabled" bitfld.long 0x04 26. " [26] ,DDR PG_EN" "Disabled,Enabled" bitfld.long 0x04 25. " [25] ,ACPU_3 PG_EN" "Disabled,Enabled" bitfld.long 0x04 24. " [24] ,ACPU_2 PG_EN" "Disabled,Enabled" textline " " bitfld.long 0x04 23. " [23] ,ACPU_1 PG_EN" "Disabled,Enabled" bitfld.long 0x04 22. " [22] ,ACPU_0 PG_EN" "Disabled,Enabled" bitfld.long 0x04 21. " [21] ,APU PG_EN" "Disabled,Enabled" bitfld.long 0x04 20. " [20] ,AFI_5 PG_EN" "Disabled,Enabled" textline " " bitfld.long 0x04 19. " [19] ,AFI_4 PG_EN" "Disabled,Enabled" bitfld.long 0x04 18. " [18] ,AFI_3 PG_EN" "Disabled,Enabled" bitfld.long 0x04 17. " [17] ,AFI_2 PG_EN" "Disabled,Enabled" bitfld.long 0x04 16. " [16] ,AFI_1 PG_EN" "Disabled,Enabled" textline " " bitfld.long 0x04 15. " [15] ,AFI_0 PG_EN" "Disabled,Enabled" bitfld.long 0x04 14. " [14] ,FPD PG_EN" "Disabled,Enabled" bitfld.long 0x04 13. " [13] ,PSS_CORE_TOP PG_EN" "Disabled,Enabled" bitfld.long 0x04 12. " [12] ,OCM PG_EN" "Disabled,Enabled" textline " " bitfld.long 0x04 11. " [11] ,AFI_LPD PG_EN" "Disabled,Enabled" bitfld.long 0x04 10. " [10] ,USB1 PG_EN" "Disabled,Enabled" bitfld.long 0x04 9. " [9] ,USB0 PG_EN" "Disabled,Enabled" bitfld.long 0x04 8. " [8] ,RPU_TIEOFF_WRAPPER PG_EN" "Disabled,Enabled" textline " " bitfld.long 0x04 7. " [7] ,RPU PG_EN" "Disabled,Enabled" bitfld.long 0x04 6. " [6] ,IOU PG_EN" "Disabled,Enabled" bitfld.long 0x04 5. " [5] ,GEM3 PG_EN" "Disabled,Enabled" bitfld.long 0x04 4. " [4] ,GEM2 PG_EN" "Disabled,Enabled" textline " " bitfld.long 0x04 3. " [3] ,GEM1 PG_EN" "Disabled,Enabled" bitfld.long 0x04 2. " [2] ,GEM0 PG_EN" "Disabled,Enabled" bitfld.long 0x04 1. " [1] ,CAN1 PG_EN" "Disabled,Enabled" bitfld.long 0x04 0. " [0] ,CAN0 PG_EN" "Disabled,Enabled" line.long 0x08 "MBIST_SETUP,MBIST Controllers SETUP_1 Register" bitfld.long 0x08 31. " REG[31] ,PCIE SETUP_1 signal" "Low,High" bitfld.long 0x08 30. " [30] ,SIOU SETUP_1 signal" "Low,High" bitfld.long 0x08 29. " [29] ,M400_1 SETUP_1 signal" "Low,High" bitfld.long 0x08 28. " [28] ,M400_0 SETUP_1 signal" "Low,High" textline " " bitfld.long 0x08 27. " [27] ,GPU SETUP_1 signal" "Low,High" bitfld.long 0x08 26. " [26] ,DDR SETUP_1 signal" "Low,High" bitfld.long 0x08 25. " [25] ,ACPU_3 SETUP_1 signal" "Low,High" bitfld.long 0x08 24. " [24] ,ACPU_2 SETUP_1 signal" "Low,High" textline " " bitfld.long 0x08 23. " [23] ,ACPU_1 SETUP_1 signal" "Low,High" bitfld.long 0x08 22. " [22] ,ACPU_0 SETUP_1 signal" "Low,High" bitfld.long 0x08 21. " [21] ,APU SETUP_1 signal" "Low,High" bitfld.long 0x08 20. " [20] ,AFI_5 SETUP_1 signal" "Low,High" textline " " bitfld.long 0x08 19. " [19] ,AFI_4 SETUP_1 signal" "Low,High" bitfld.long 0x08 18. " [18] ,AFI_3 SETUP_1 signal" "Low,High" bitfld.long 0x08 17. " [17] ,AFI_2 SETUP_1 signal" "Low,High" bitfld.long 0x08 16. " [16] ,AFI_1 SETUP_1 signal" "Low,High" textline " " bitfld.long 0x08 15. " [15] ,AFI_0 SETUP_1 signal" "Low,High" bitfld.long 0x08 14. " [14] ,FPD SETUP_1 signal" "Low,High" bitfld.long 0x08 13. " [13] ,PSS_CORE_TOP SETUP_1 signal" "Low,High" bitfld.long 0x08 12. " [12] ,OCM SETUP_1 signal" "Low,High" textline " " bitfld.long 0x08 11. " [11] ,AFI_LPD SETUP_1 signal" "Low,High" bitfld.long 0x08 10. " [10] ,USB1 SETUP_1 signal" "Low,High" bitfld.long 0x08 9. " [9] ,USB0 SETUP_1 signal" "Low,High" bitfld.long 0x08 8. " [8] ,RPU_TIEOFF_WRAPPER SETUP_1 signal" "Low,High" textline " " bitfld.long 0x08 7. " [7] ,RPU SETUP_1 signal" "Low,High" bitfld.long 0x08 6. " [6] ,IOU SETUP_1 signal" "Low,High" bitfld.long 0x08 5. " [5] ,GEM3 SETUP_1 signal" "Low,High" bitfld.long 0x08 4. " [4] ,GEM2 SETUP_1 signal" "Low,High" textline " " bitfld.long 0x08 3. " [3] ,GEM1 SETUP_1 signal" "Low,High" bitfld.long 0x08 2. " [2] ,GEM0 SETUP_1 signal" "Low,High" bitfld.long 0x08 1. " [1] ,CAN1 SETUP_1 signal" "Low,High" bitfld.long 0x08 0. " [0] ,CAN0 SETUP_1 signal" "Low,High" rgroup.long 0x710++0x07 line.long 0x00 "MBIST_DONE,MBIST Controllers DONE Status Register" bitfld.long 0x00 31. " REG[31] ,PCIE DONE status" "Not done,Done" bitfld.long 0x00 30. " [30] ,SIOU DONE status" "Not done,Done" bitfld.long 0x00 29. " [29] ,M400_1 DONE status" "Not done,Done" bitfld.long 0x00 28. " [28] ,M400_0 DONE status" "Not done,Done" textline " " bitfld.long 0x00 27. " [27] ,GPU DONE status" "Not done,Done" bitfld.long 0x00 26. " [26] ,DDR DONE status" "Not done,Done" bitfld.long 0x00 25. " [25] ,ACPU_3 DONE status" "Not done,Done" bitfld.long 0x00 24. " [24] ,ACPU_2 DONE status" "Not done,Done" textline " " bitfld.long 0x00 23. " [23] ,ACPU_1 DONE status" "Not done,Done" bitfld.long 0x00 22. " [22] ,ACPU_0 DONE status" "Not done,Done" bitfld.long 0x00 21. " [21] ,APU DONE status" "Not done,Done" bitfld.long 0x00 20. " [20] ,AFI_5 DONE status" "Not done,Done" textline " " bitfld.long 0x00 19. " [19] ,AFI_4 DONE status" "Not done,Done" bitfld.long 0x00 18. " [18] ,AFI_3 DONE status" "Not done,Done" bitfld.long 0x00 17. " [17] ,AFI_2 DONE status" "Not done,Done" bitfld.long 0x00 16. " [16] ,AFI_1 DONE status" "Not done,Done" textline " " bitfld.long 0x00 15. " [15] ,AFI_0 DONE status" "Not done,Done" bitfld.long 0x00 14. " [14] ,FPD DONE status" "Not done,Done" bitfld.long 0x00 13. " [13] ,PSS_CORE_TOP DONE status" "Not done,Done" bitfld.long 0x00 12. " [12] ,OCM DONE status" "Not done,Done" textline " " bitfld.long 0x00 11. " [11] ,AFI_LPD DONE status" "Not done,Done" bitfld.long 0x00 10. " [10] ,USB1 DONE status" "Not done,Done" bitfld.long 0x00 9. " [9] ,USB0 DONE status" "Not done,Done" bitfld.long 0x00 8. " [8] ,RPU_TIEOFF_WRAPPER DONE status" "Not done,Done" textline " " bitfld.long 0x00 7. " [7] ,RPU DONE status" "Not done,Done" bitfld.long 0x00 6. " [6] ,IOU DONE status" "Not done,Done" bitfld.long 0x00 5. " [5] ,GEM3 DONE status" "Not done,Done" bitfld.long 0x00 4. " [4] ,GEM2 DONE status" "Not done,Done" textline " " bitfld.long 0x00 3. " [3] ,GEM1 DONE status" "Not done,Done" bitfld.long 0x00 2. " [2] ,GEM0 DONE status" "Not done,Done" bitfld.long 0x00 1. " [1] ,CAN1 DONE status" "Not done,Done" bitfld.long 0x00 0. " [0] ,CAN0 DONE status" "Not done,Done" line.long 0x04 "MBIST_GOOD,MBIST Controllers GOOD Status Register" bitfld.long 0x04 31. " REG[31] ,PCIE GOOD status" "Not good,Good" bitfld.long 0x04 30. " [30] ,SIOU GOOD status" "Not good,Good" bitfld.long 0x04 29. " [29] ,M400_1 GOOD status" "Not good,Good" bitfld.long 0x04 28. " [28] ,M400_0 GOOD status" "Not good,Good" textline " " bitfld.long 0x04 27. " [27] ,GPU GOOD status" "Not good,Good" bitfld.long 0x04 26. " [26] ,DDR GOOD status" "Not good,Good" bitfld.long 0x04 25. " [25] ,ACPU_3 GOOD status" "Not good,Good" bitfld.long 0x04 24. " [24] ,ACPU_2 GOOD status" "Not good,Good" textline " " bitfld.long 0x04 23. " [23] ,ACPU_1 GOOD status" "Not good,Good" bitfld.long 0x04 22. " [22] ,ACPU_0 GOOD status" "Not good,Good" bitfld.long 0x04 21. " [21] ,APU GOOD status" "Not good,Good" bitfld.long 0x04 20. " [20] ,AFI_5 GOOD status" "Not good,Good" textline " " bitfld.long 0x04 19. " [19] ,AFI_4 GOOD status" "Not good,Good" bitfld.long 0x04 18. " [18] ,AFI_3 GOOD status" "Not good,Good" bitfld.long 0x04 17. " [17] ,AFI_2 GOOD status" "Not good,Good" bitfld.long 0x04 16. " [16] ,AFI_1 GOOD status" "Not good,Good" textline " " bitfld.long 0x04 15. " [15] ,AFI_0 GOOD status" "Not good,Good" bitfld.long 0x04 14. " [14] ,FPD GOOD status" "Not good,Good" bitfld.long 0x04 13. " [13] ,PSS_CORE_TOP GOOD status" "Not good,Good" bitfld.long 0x04 12. " [12] ,OCM GOOD status" "Not good,Good" textline " " bitfld.long 0x04 11. " [11] ,AFI_LPD GOOD status" "Not good,Good" bitfld.long 0x04 10. " [10] ,USB1 GOOD status" "Not good,Good" bitfld.long 0x04 9. " [9] ,USB0 GOOD status" "Not good,Good" bitfld.long 0x04 8. " [8] ,RPU_TIEOFF_WRAPPER GOOD status" "Not good,Good" textline " " bitfld.long 0x04 7. " [7] ,RPU GOOD status" "Not good,Good" bitfld.long 0x04 6. " [6] ,IOU GOOD status" "Not good,Good" bitfld.long 0x04 5. " [5] ,GEM3 GOOD status" "Not good,Good" bitfld.long 0x04 4. " [4] ,GEM2 GOOD status" "Not good,Good" textline " " bitfld.long 0x04 3. " [3] ,GEM1 GOOD status" "Not good,Good" bitfld.long 0x04 2. " [2] ,GEM0 GOOD status" "Not good,Good" bitfld.long 0x04 1. " [1] ,CAN1 GOOD status" "Not good,Good" bitfld.long 0x04 0. " [0] ,CAN0 GOOD status" "Not good,Good" group.long 0x800++0x03 line.long 0x00 "SAFETY_CHK,Safety Check Register" width 0x0B tree.end tree "QSPI (Quad-SPI Controller)" base ad:0xFF0F0000 width 26. if (((d.l(ad:0xFF0F0000+0xA0)&0x80000000))==0x80000000)&&(((d.l(ad:0xFF0F0000+0x38)&0x20))==0x20) group.long 0x00++0x03 line.long 0x00 "CONFIG,SPI Configuration Register" bitfld.long 0x00 31. " LEG_FLSH ,Flash memory interface mode control" "Legacy SPI,Flash memory interface" bitfld.long 0x00 26. " ENDIAN ,Endian select" "Little,Big" bitfld.long 0x00 19. " HOLDB_DR ,HOLDB drive" "External pull,QSPI" textline " " bitfld.long 0x00 16. " MAN_START_COM ,Manual start command" "No effect,Start" bitfld.long 0x00 15. " MAN_START_EN ,Manual start enable" "Disabled,Enabled" bitfld.long 0x00 14. " MANUAL_CS ,Manual CS" "Auto,Manual" bitfld.long 0x00 10. " PCS ,Peripheral chip select line" "0,1" textline " " bitfld.long 0x00 6.--7. " FIFO_WIDTH ,FIFO width" ",,,32bits" bitfld.long 0x00 3.--5. " BAUD_RATE_DIV ,Master mode baud rate divisor" "/2,?..." bitfld.long 0x00 1.--2. " CLK_PH_CLK_POL ,Clock phase/clock polarity outside SPI word" "Active/low,,,Inactive/high" bitfld.long 0x00 0. " MODE_SEL ,Mode select" ",Master" elif (((d.l(ad:0xFF0F0000+0xA0)&0x80000000))==0x00)&&(((d.l(ad:0xFF0F0000+0x38)&0x20))==0x20) group.long 0x00++0x03 line.long 0x00 "CONFIG,SPI Configuration Register" bitfld.long 0x00 31. " LEG_FLSH ,Flash memory interface mode control" "Legacy SPI,Flash memory interface" bitfld.long 0x00 26. " ENDIAN ,Endian select" "Little,Big" textline " " bitfld.long 0x00 16. " MAN_START_COM ,Manual start command" "No effect,Start" bitfld.long 0x00 15. " MAN_START_EN ,Manual start enable" "Disabled,Enabled" bitfld.long 0x00 14. " MANUAL_CS ,Manual CS" "Auto,Manual" bitfld.long 0x00 10. " PCS ,Peripheral chip select line" "0,1" textline " " bitfld.long 0x00 6.--7. " FIFO_WIDTH ,FIFO width" ",,,32bits" bitfld.long 0x00 3.--5. " BAUD_RATE_DIV ,Master mode baud rate divisor" "/2,?..." bitfld.long 0x00 1.--2. " CLK_PH_CLK_POL ,Clock phase/clock polarity outside SPI word" "Active/low,,,Inactive/high" bitfld.long 0x00 0. " MODE_SEL ,Mode select" ",Master" elif (((d.l(ad:0xFF0F0000+0xA0)&0x80000000))==0x80000000)&&(((d.l(ad:0xFF0F0000+0x38)&0x20))==0x00) group.long 0x00++0x03 line.long 0x00 "CONFIG,SPI Configuration Register" bitfld.long 0x00 31. " LEG_FLSH ,Flash memory interface mode control" "Legacy SPI,Flash memory interface" bitfld.long 0x00 26. " ENDIAN ,Endian select" "Little,Big" bitfld.long 0x00 19. " HOLDB_DR ,HOLDB drive" "External pull,QSPI" textline " " bitfld.long 0x00 16. " MAN_START_COM ,Manual start command" "No effect,Start" bitfld.long 0x00 15. " MAN_START_EN ,Manual start enable" "Disabled,Enabled" bitfld.long 0x00 14. " MANUAL_CS ,Manual CS" "Auto,Manual" bitfld.long 0x00 10. " PCS ,Peripheral chip select line" "0,1" textline " " bitfld.long 0x00 6.--7. " FIFO_WIDTH ,FIFO width" ",,,32bits" bitfld.long 0x00 3.--5. " BAUD_RATE_DIV ,Master mode baud rate divisor" "/2,/4,/8,/16,/32,/64,/128,/256" bitfld.long 0x00 1.--2. " CLK_PH_CLK_POL ,Clock phase/clock polarity outside SPI word" "Active/low,,,Inactive/high" bitfld.long 0x00 0. " MODE_SEL ,Mode select" ",Master" else group.long 0x00++0x03 line.long 0x00 "CONFIG,SPI Configuration Register" bitfld.long 0x00 31. " LEG_FLSH ,Flash memory interface mode control" "Legacy SPI,Flash memory interface" bitfld.long 0x00 26. " ENDIAN ,Endian select" "Little,Big" textline " " bitfld.long 0x00 16. " MAN_START_COM ,Manual start command" "No effect,Start" bitfld.long 0x00 15. " MAN_START_EN ,Manual start enable" "Disabled,Enabled" bitfld.long 0x00 14. " MANUAL_CS ,Manual CS" "Auto,Manual" bitfld.long 0x00 10. " PCS ,Peripheral chip select line" "0,1" textline " " bitfld.long 0x00 6.--7. " FIFO_WIDTH ,FIFO width" ",,,32bits" bitfld.long 0x00 3.--5. " BAUD_RATE_DIV ,Master mode baud rate divisor" "/2,/4,/8,/16,/32,/64,/128,/256" bitfld.long 0x00 1.--2. " CLK_PH_CLK_POL ,Clock phase/clock polarity outside SPI word" "Active/low,,,Inactive/high" bitfld.long 0x00 0. " MODE_SEL ,Mode select" ",Master" endif textline " " hgroup.long 0x04++0x03 hide.long 0x00 "INTR_STATUS,SPI Interrupt Status Register" textfld " " in textline " " group.long 0x10++0x03 line.long 0x00 "INTRPT_MASK_SET/CLR,Interrupt Unmask Register" setclrfld.long 0x00 8. -0x04 8. -0x08 8. " TXFIFO_EMPTY ,TX FIFO empty enable" "Not masked,Masked" setclrfld.long 0x00 6. -0x04 6. -0x08 6. " TX_FIFO_UNDERFLOW ,TX FIFO underflow enable" "Not masked,Masked" setclrfld.long 0x00 5. -0x04 5. -0x08 5. " RX_FIFO_FULL ,RX FIFO full enable" "Not masked,Masked" setclrfld.long 0x00 4. -0x04 4. -0x08 4. " RX_FIFO_NOT_EMPTY ,RX FIFO not empty enable" "Not masked,Masked" textline " " setclrfld.long 0x00 3. -0x04 3. -0x08 3. " TX_FIFO_FULL ,TX FIFO full enable" "Not masked,Masked" setclrfld.long 0x00 2. -0x04 2. -0x08 2. " TX_FIFO_NOT_FULL ,TX FIFO not full enable" "Not masked,Masked" setclrfld.long 0x00 1. -0x04 1. -0x08 1. " MODE_FAIL ,Modefail interrupt enable" "Not masked,Masked" setclrfld.long 0x00 0. -0x04 0. -0x08 0. " RX_OVERFLOW ,Receive overflow interrupt enable" "Not masked,Masked" group.long 0x14++0x03 line.long 0x00 "EN,SPI Enable Register" bitfld.long 0x00 0. " SPI_EN ,SPI enable" "Disabled,Enabled" if (((d.l(ad:0xFF0F0000)&0x01))==0x01) group.long 0x18++0x03 line.long 0x00 "DELAY,Delay Register" hexmask.long.byte 0x00 24.--31. 1. " D_NSS ,Delay for the length that the master mode chip select outputs are de-asserted between words" hexmask.long.byte 0x00 16.--23. 1. " D_BTWN ,Delay between one chip select being de-activated and the activation of another" hexmask.long.byte 0x00 8.--15. 1. " D_AFTER ,Delay between last bit of current word and the first bit of the next word" hexmask.long.byte 0x00 0.--7. 1. " D_INT ,Delay between setting n_ss_out low and first bit transfer" else hgroup.long 0x18++0x03 hide.long 0x00 "DELAY,Delay Register" endif wgroup.long 0x1C++0x03 line.long 0x00 "TXD0,Transmit Data 0 Register" hgroup.long 0x20++0x03 hide.long 0x00 "RX_DATA,Receive Data Register" textfld " " in textline " " group.long 0x24++0x0F line.long 0x00 "SLAVE_IDLE_C,Slave Idle Count Register" hexmask.long.byte 0x00 0.--7. 1. " SLAVE_IDLE_C ,Slave idle count" line.long 0x04 "TX_THRES,TX_FIFO Threshold Register" line.long 0x08 "RX_THRES,RX FIFO Threshold Register" line.long 0x0C "GPIO,General Purpose Inputs And Autputs Register" bitfld.long 0x0C 0. " WP_N ,Write protect" "Not protected,Protected" group.long 0x38++0x03 line.long 0x00 "LPBK_DLY_ADJ,Loopback Master Clock Delay Adjustment Register" bitfld.long 0x00 5. " USE_LPBK ,Use external loopback master clock" "Disabled,Enabled" bitfld.long 0x00 3.--4. " DLY1 ,Delay adjustment" "0 ns,0.4 ns,0.8 ns,1.2 ns" bitfld.long 0x00 0.--2. " DLY0 ,Delay adjustment step" "0,1,2,3,4,5,6,7" wgroup.long 0x80++0x0B line.long 0x00 "TXD1,Transmit Data 1 Register" line.long 0x04 "TXD2,Transmit Data 2 Register" line.long 0x08 "TXD3,Transmit Data 3 Register" if (((d.l(ad:0xFF0F0000+0xA0))&0x2000000)==0x2000000) group.long 0xA0++0x03 line.long 0x00 "LQSPI_CFG,Configuration Register" bitfld.long 0x00 31. " LQ_MODE ,Linear quad SPI mode" "Disabled,Enabled" bitfld.long 0x00 30. " TWO_MEM ,Activate upper and lower memories" "Inactive,Active" bitfld.long 0x00 29. " SEP_BUS ,Separate memory bus" "Disabled,Enabled" bitfld.long 0x00 28. " U_PAGE ,Upper memory page" "Lower,Upper" textline " " bitfld.long 0x00 27. " ADDR_32BIT ,Address to the flash" "24 bits,27 bits" bitfld.long 0x00 25. " MODE_EN ,Enable MODE_BITS[23:16] to be sent" "Disabled,Enabled" bitfld.long 0x00 24. " MODE_ON ,Send instruction code for all read transfersor for only the very first read transfer" "All,First" hexmask.long.byte 0x00 16.--23. 1. " MODE_BITS ,Mode value for dual I/O or quad I/O for follow on read" textline " " hexmask.long.byte 0x00 0.--7. 1. " INST_CODE ,Read instruction code" else group.long 0xA0++0x03 line.long 0x00 "LQSPI_CFG,Configuration Register" bitfld.long 0x00 31. " LQ_MODE ,Linear quad SPI mode" "Disabled,Enabled" bitfld.long 0x00 30. " TWO_MEM ,Activate upper and lower memories" "Inactive,Active" bitfld.long 0x00 29. " SEP_BUS ,Separate memory bus" "Disabled,Enabled" bitfld.long 0x00 28. " U_PAGE ,Upper memory page" "Lower,Upper" textline " " bitfld.long 0x00 27. " ADDR_32BIT ,Address to the flash" "24 bits,27 bits" bitfld.long 0x00 25. " MODE_EN ,Enable MODE_BITS[23:16] to be sent" "Disabled,Enabled" textline " " hexmask.long.byte 0x00 0.--7. 1. " INST_CODE ,Read instruction code" endif rgroup.long 0xA4++0x03 line.long 0x00 "LQSPI_STS,Status Register" bitfld.long 0x00 2. " D_FSM_ERR ,Data FSM error" "No error,Error" bitfld.long 0x00 1. " WR_RECVD ,AXI write command received" "Not received,Received" if (((d.l(ad:0xFF0F0000+0xA0)&0x80000000))==0x80000000) group.long 0xC0++0x03 line.long 0x00 "CMND,Command Control Register" bitfld.long 0x00 20. " RXFIFO_DRAIN ,RXFIFO drain" "Not discarded,Discarded" bitfld.long 0x00 19. " RXFIFO_DRAIN_STAT ,RXFIFO drain" "Not discarded,Discarded" bitfld.long 0x00 16.--18. " PARTIAL_BYTE_LEN ,Partial byte length" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15. " EXT_ADD ,Byte addressing command" "Low,High" textline " " hexmask.long.byte 0x00 8.--14. 1. " RX_DISCARD ,Number of QSPI clocks for which the data need to be discarded before writing into RXFIFO" bitfld.long 0x00 2.--7. " DUMMY_CYCLES ,Dummy cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 1. " DMA_EN ,DMA enable" "Linear,?..." else group.long 0xC0++0x03 line.long 0x00 "CMND,Command Control Register" bitfld.long 0x00 20. " RXFIFO_DRAIN ,RXFIFO drain" "Not discarded,Discarded" bitfld.long 0x00 19. " RXFIFO_DRAIN_STAT ,RXFIFO drain" "Not discarded,Discarded" bitfld.long 0x00 16.--18. " PARTIAL_BYTE_LEN ,Partial byte length" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15. " EXT_ADD ,Byte addressing command" "Low,High" textline " " hexmask.long.byte 0x00 8.--14. 1. " RX_DISCARD ,Number of QSPI clocks for which the data need to be discarded before writing into RXFIFO" bitfld.long 0x00 2.--7. " DUMMY_CYCLES ,Dummy cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 1. " DMA_EN ,DMA enable" "IO,DMA" endif group.long 0xC4++0x07 line.long 0x00 "TRASNFER_SIZE,Transfer Size Register" hexmask.long 0x00 2.--28. 1. " SIZE ,Word aligned memory size" line.long 0x04 "DUMMY_CYCLE_EN,Dummy Cycles Enable Register" bitfld.long 0x04 0. " DUMMY_CYCLE_EN ,Dummy cycles enable" "Disabled,Enabled" group.long 0xFC++0x03 line.long 0x00 "MOD_ID,Module Identification Register" if (((d.l(ad:0xFF0F0000+0xA0)&0x80000000))==0x80000000)&&(((d.l(ad:0xFF0F0000+0x38)&0x20))==0x20) group.long 0x100++0x03 line.long 0x00 "GQSPI_CFG,GQSPI Configuration Register" bitfld.long 0x00 30.--31. " MODE_EN ,Flash memory interface mode control" "IO,DMA,?..." bitfld.long 0x00 29. " GEN_FIFO_START_MODE ,Start mode of generic FIFO" "Manual,Auto" bitfld.long 0x00 28. " START_GEN_FIFO ,Trigger generic FIFO command execution" "Disabled,Enabled" bitfld.long 0x00 26. " ENDIAN ,Endian select" "Little,Big" textline " " bitfld.long 0x00 20. " EN_POLL_TIMEOUT ,Poll timeout enable" "Disabled,Enabled" bitfld.long 0x00 19. " WP_HOLD ,HOLDB drive" "External pull,QSPI" bitfld.long 0x00 3.--5. " BAUD_RATE_DIV ,Master mode baud rate divisor" "/2,?..." bitfld.long 0x00 1.--2. " CLK_PH_CLK_POL ,Clock phase/clock polarity outside SPI word" "Active/low,,,Inactive/high" elif (((d.l(ad:0xFF0F0000+0xA0)&0x80000000))==0x00)&&(((d.l(ad:0xFF0F0000+0x38)&0x20))==0x20) group.long 0x100++0x03 line.long 0x00 "GQSPI_CFG,GQSPI Configuration Register" bitfld.long 0x00 30.--31. " MODE_EN ,Flash memory interface mode control" "IO,DMA,?..." bitfld.long 0x00 29. " GEN_FIFO_START_MODE ,Start mode of generic FIFO" "Manual,Auto" bitfld.long 0x00 28. " START_GEN_FIFO ,Trigger generic FIFO command execution" "Disabled,Enabled" bitfld.long 0x00 26. " ENDIAN ,Endian select" "Little,Big" textline " " bitfld.long 0x00 20. " EN_POLL_TIMEOUT ,Poll timeout enable" "Disabled,Enabled" bitfld.long 0x00 3.--5. " BAUD_RATE_DIV ,Master mode baud rate divisor" "/2,?..." bitfld.long 0x00 1.--2. " CLK_PH_CLK_POL ,Clock phase/clock polarity outside SPI word" "Active/low,,,Inactive/high" elif (((d.l(ad:0xFF0F0000+0xA0)&0x80000000))==0x80000000)&&(((d.l(ad:0xFF0F0000+0x38)&0x20))==0x00) group.long 0x100++0x03 line.long 0x00 "GQSPI_CFG,GQSPI Configuration Register" bitfld.long 0x00 30.--31. " MODE_EN ,Flash memory interface mode control" "IO,DMA,?..." bitfld.long 0x00 29. " GEN_FIFO_START_MODE ,Start mode of generic FIFO" "Manual,Auto" bitfld.long 0x00 28. " START_GEN_FIFO ,Trigger generic FIFO command execution" "Disabled,Enabled" bitfld.long 0x00 26. " ENDIAN ,Endian select" "Little,Big" textline " " bitfld.long 0x00 20. " EN_POLL_TIMEOUT ,Poll timeout enable" "Disabled,Enabled" bitfld.long 0x00 19. " WP_HOLD ,HOLDB drive" "External pull,QSPI" bitfld.long 0x00 3.--5. " BAUD_RATE_DIV ,Master mode baud rate divisor" "/2,/4,/8,/16,/32,/64,/128,/256" bitfld.long 0x00 1.--2. " CLK_PH_CLK_POL ,Clock phase/clock polarity outside SPI word" "Active/low,,,Inactive/high" else group.long 0x100++0x03 line.long 0x00 "GQSPI_CFG,GQSPI Configuration Register" bitfld.long 0x00 30.--31. " MODE_EN ,Flash memory interface mode control" "IO,DMA,?..." bitfld.long 0x00 29. " GEN_FIFO_START_MODE ,Start mode of generic FIFO" "Manual,Auto" bitfld.long 0x00 28. " START_GEN_FIFO ,Trigger generic FIFO command execution" "Disabled,Enabled" bitfld.long 0x00 26. " ENDIAN ,Endian select" "Little,Big" textline " " bitfld.long 0x00 20. " EN_POLL_TIMEOUT ,Poll timeout enable" "Disabled,Enabled" bitfld.long 0x00 3.--5. " BAUD_RATE_DIV ,Master mode baud rate divisor" "/2,/4,/8,/16,/32,/64,/128,/256" bitfld.long 0x00 1.--2. " CLK_PH_CLK_POL ,Clock phase/clock polarity outside SPI word" "Active/low,,,Inactive/high" endif hgroup.long 0x104++0x03 hide.long 0x00 "GQSPI_ISR,Generic QSPI Interrupt Status Register" in textline " " group.long 0x110++0x03 line.long 0x00 "GQSPI_IMASK_SET/CLR,GQSPI Interrupt Unmask Register" setclrfld.long 0x00 11. -0x04 11. -0x08 11. " RX_FIFO_EMPTY ,RX FIFO empty enable" "Not masked,Masked" setclrfld.long 0x00 10. -0x04 10. -0x08 10. " GEN_FIFO_FULL ,Generic FIFO full interrupt enable" "Not masked,Masked" setclrfld.long 0x00 9. -0x04 9. -0x08 9. " GEN_FIFO_NOT_FULL ,Generic FIFO not full interrupt enable" "Not masked,Masked" setclrfld.long 0x00 8. -0x04 8. -0x08 8. " TX_FIFO_EMPTY ,TX FIFO empty enable" "Not masked,Masked" textline " " setclrfld.long 0x00 7. -0x04 7. -0x08 7. " GEN_FIFO_EMPTY ,Generic FIFO empty interrupt enable" "Not masked,Masked" setclrfld.long 0x00 5. -0x04 5. -0x08 5. " RX_FIFO_FULL ,RX FIFO full enable" "Not masked,Masked" setclrfld.long 0x00 4. -0x04 4. -0x08 4. " RX_FIFO_NOT_EMPTY ,RX FIFO not empty enable" "Not masked,Masked" setclrfld.long 0x00 3. -0x04 3. -0x08 3. " TX_FIFO_FULL ,TX FIFO full enable" "Not masked,Masked" textline " " setclrfld.long 0x00 2. -0x04 2. -0x08 2. " TX_FIFO_NOT_FULL ,TX FIFO not full enable" "Not masked,Masked" setclrfld.long 0x00 1. -0x04 1. -0x08 1. " POLL_TIME_EXPIRE ,Poll time out counter expire interrupt enable" "Not masked,Masked" textline " " group.long 0x114++0x03 line.long 0x00 "GQSPI_EN,SPI Enable Register" bitfld.long 0x00 0. " GQSPI_EN ,GQSPI enable" "Disabled,Enabled" wgroup.long 0x11C++0x03 line.long 0x00 "GQSPI_TXD,GQSPI Transmit Data Register" hgroup.long 0x120++0x03 hide.long 0x00 "GQSPI_RXD,GQSPI Receive Data Register" in textline " " group.long 0x128++0x0B line.long 0x00 "GQSPI_TX_THRESH,GQSPI TX FIFO Threshold Level Register" bitfld.long 0x00 0.--5. " LEVEL_TX_FIFO ,Defines the level at which the TX FIFO not full interrupt is generated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "GQSPI_RX_THRESH,GQSPI RX FIFO Threshold Level Register" bitfld.long 0x04 0.--5. " LEVEL_RX_FIFO ,Defines the level at which the RX FIFO not empty interrupt is generated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x08 "GQSPI_GPIO,GQSPI GPIO For Write Protect Register" bitfld.long 0x08 0. " WP_N ,Write protect" "Not protected,Protected" group.long 0x138++0x03 line.long 0x00 "GQSPI_LPBK_DLY_ADJ,GQSPI Loopback Clock Delay Adjustment Register" bitfld.long 0x00 5. " USE_LPBK ,Use external loopback master clock" "Disabled,Enabled" bitfld.long 0x00 3.--4. " DLY1 ,Delay adjustment" "0 ns,0.4 ns,0.8 ns,1.2 ns" bitfld.long 0x00 0.--2. " DLY0 ,Delay adjustment step" "0,1,2,3,4,5,6,7" wgroup.long 0x140++0x03 line.long 0x00 "GQSPI_GEN_FIFO,GQSPI Generic FIFO Data Register" hexmask.long.tbyte 0x00 0.--19. 1. " GEN_DATA ,Data to generic FIFO, for instruction/command/address for read/write data transfer" group.long 0x144++0x03 line.long 0x00 "GQSPI_SEL,GQSPI Select Register" bitfld.long 0x00 0. " GEN_QSPI_SEL ,Generic QSPI controller select" "Legacy LQSPI,Generic QSPI" if (((d.l(ad:0xFF0F0000+0x100)&0xC0000000))==0x00) wgroup.long 0x14C++0x03 line.long 0x00 "GQSPI_FIFO_CTRL,GQSPI FIFO Control Register" bitfld.long 0x00 2. " RST_RX_FIFO ,Reset receive FIFO" "No reset,Reset" bitfld.long 0x00 1. " RST_TX_FIFO ,Reset transmit FIFO" "No reset,Reset" bitfld.long 0x00 0. " RST_GEN_FIFO ,Reset generic FIFO" "No reset,Reset" else wgroup.long 0x14C++0x03 line.long 0x00 "GQSPI_FIFO_CTRL,GQSPI FIFO Control Register" bitfld.long 0x00 1. " RST_TX_FIFO ,Reset transmit FIFO" "No reset,Reset" bitfld.long 0x00 0. " RST_GEN_FIFO ,Reset generic FIFO" "No reset,Reset" endif group.long 0x150++0x0B line.long 0x00 "GQSPI_GF_THRESH,GQSPI Generic FIFO Threshold Level Register" bitfld.long 0x00 0.--4. " LEVEL_GF_FIFO ,Defines the level at which the gen_fifo_not_full interrupt is generated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x04 "GQSPI_POLL_CFG,GQSPI Poll Configuration Register" bitfld.long 0x04 31. " EN_MASK_UPPER ,Enable upper data bus mask" "Disabled,Enabled" bitfld.long 0x04 30. " EN_MASK_LOWER ,Enable lower data bus mask" "Disabled,Enabled" hexmask.long.byte 0x04 8.--15. 1. " MASK_EN ,Data bus mask value during poll operation" hexmask.long.byte 0x04 0.--7. 1. " DATA_VALUE ,Poll data value" line.long 0x08 "GQSPI_P_TIMEOUT,GQSPI Poll Time Out Register" group.long 0x1F8++0x07 line.long 0x00 "QSPI_DATA_DLY_ADJ,QSPI RX Data Delay Register" bitfld.long 0x00 31. " USE_DATA_DLY ,Enable using delay elements in receive data path" "Disabled,Enabled" bitfld.long 0x00 28.--30. " DATA_DLY_ADJ ,Delay adjustment value" "0,1,2,3,4,5,6,7" line.long 0x04 "GQSPI_MOD_ID,GQSPI Module Identification Register" wgroup.long 0x800++0x07 line.long 0x00 "QSPIDMA_DST_ADDR,Destination Memory Address For DMA Stream Register" hexmask.long 0x00 2.--31. 0x04 " ADDR ,Destination memory address for DMA stream to memory data transfer" line.long 0x04 "QSPIDMA_DST_SIZE,DMA Transfer Payload For DMA Stream" hexmask.long 0x04 2.--28. 1. " SIZE ,Number of 4byte words of DMA transfer" group.long 0x808++0x07 line.long 0x00 "QSPIDMA_DST_STS,General DST DMA Status Register" bitfld.long 0x00 13.--15. " DONE_CNT ,Number of completed DST DMA transfers that have not been acknowledged by software" "None,1,2,3,4,5,6,7 or more" rbitfld.long 0x00 0. " BUSY ,QSPI DMA stream busy" "Not busy,Busy" line.long 0x04 "QSPIDMA_DST_CTRL,General DST DMA Control Register" hexmask.long.byte 0x04 25.--31. 1. " FIFO_LVL_HIT_THR ,Threshold level to assert DATA_OUT_FIFO_LEVEL_HIT signal" bitfld.long 0x04 24. " APB_ERR_RESP ,APB error response" "0,1" bitfld.long 0x04 23. " ENDIANNESS ,Endian status/outgoing AXI byte ordering flipping" "Not flipped,Flipped" bitfld.long 0x04 22. " AXI_BURST_TYPE ,Burst type" "INCR,AXI FIXED" textline " " hexmask.long.word 0x04 10.--21. 1. " TIMEOUT_VAL ,Timeout value" hexmask.long.byte 0x04 2.--9. 1. " FIFO_THRESH ,FIFO threshold" bitfld.long 0x04 1. " PAUSE_STRM ,Stop of data transfer to the internal DST" "Not stopped,Stopped" bitfld.long 0x04 0. " PAUSE_MEM ,Stop the issuing of new write commands to memory" "Not stopped,Stopped" textline " " group.long 0x814++0x03 line.long 0x00 "QSPIDMA_DST_I_STS,DST DMA Interrupt Status Register" eventfld.long 0x00 7. " FIFO_OVERFLOW ,DST_FIFO has overflowed" "No overflow,Overflow" eventfld.long 0x00 6. " INVALID_APB ,APB (Register) access to an unimplemented space" "Not occurred,Occurred" eventfld.long 0x00 5. " THRESH_HIT ,Watermark value reached by DST_FIFO" "Not reached,Reached" textline " " eventfld.long 0x00 4. " TIMEOUT_MEM ,Timeout counter#1 expiration" "Not expired,Expired" eventfld.long 0x00 3. " TIMEOUT_STRM ,Timeout counter#2 expiration" "Not expired,Expired" eventfld.long 0x00 2. " AXI_BRESP_ERR ,Memory write command for BRESP on AXI bus" "Not produced,Produced" eventfld.long 0x00 1. " DONE ,DMA command completed" "Not completed,Completed" group.long 0x820++0x03 line.long 0x00 "QSPIDMA_DST_MASK_SET/CLR,DST DMA Interrupt Mask Register" setclrfld.long 0x00 7. -0x04 7. -0x08 7. " FIFO_OVERFLOW ,DST_FIFO has overflowed" "Not masked,Masked" setclrfld.long 0x00 6. -0x04 6. -0x08 6. " INVALID_APB ,APB (Register) access to an unimplemented space" "Not masked,Masked" setclrfld.long 0x00 5. -0x04 5. -0x08 5. " THRESH_HIT ,Watermark value reached by DST_FIFO" "Not masked,Masked" textline " " setclrfld.long 0x00 4. -0x04 4. -0x08 4. " TIMEOUT_MEM ,Timeout counter#1 expiration" "Not masked,Masked" setclrfld.long 0x00 3. -0x04 3. -0x08 3. " TIMEOUT_STRM ,Timeout counter#2 expiration" "Not masked,Masked" setclrfld.long 0x00 2. -0x04 2. -0x08 2. " AXI_BRESP_ERR ,Memory write command for BRESP on AXI bus" "Not masked,Masked" setclrfld.long 0x00 1. -0x04 1. -0x08 1. " DONE ,DMA command completed" "Not masked,Masked" group.long 0x824++0x03 line.long 0x00 "QSPIDMA_DST_CTRL2,General DST DMA Control Register 2" bitfld.long 0x00 26. " AWCACHE[2] ,AWCACHE3 signal" "Low,High" bitfld.long 0x00 25. " [1] ,AWCACHE2 signal" "Low,High" bitfld.long 0x00 24. " [0] ,AWCACHE0 signal" "Low,High" textline " " bitfld.long 0x00 22. " TIMEOUT_EN ,Timeout counters enable" "Disabled,Enabled" hexmask.long.word 0x00 4.--15. 1. " TIMEOUT_PRE ,Prescaler value for the timeout in cycles" bitfld.long 0x00 0.--3. " MAX_OUTS_CMDS ,Control of the maximum allowed number of outstanding AXI write commands" "1,2,3,4,5,6,7,8,9,?..." wgroup.long 0x828++0x03 line.long 0x00 "QSPIDMA_DST_ADDR_MSB,Destination Memory Address For DMA Stream Register" hexmask.long.word 0x00 0.--11. 0x01 " ADDR_MSB ,Destination memory address" hgroup.long 0xFFC++0x03 hide.long 0x00 "QSPIDMA_FUTURE_ECO,Future Potential ECO Register" width 0x0B tree.end tree "RPU (Realtime Processing Unit)" base ad:0xFF9A0000 width 13. group.long 0x00++0x03 line.long 0x00 "GLBL_CNTL,Global Control Register For RPU" bitfld.long 0x00 10. " GIC_AXPROT ,GIC security extension" "Secure,Not secure" bitfld.long 0x00 8. " TCM_CLK_CNTL ,Gate clocks to tcms" "Not gated,Gated" bitfld.long 0x00 7. " TCM_WAIT ,Wait states in TCM access insert" "No wait state,Single cycle wait" bitfld.long 0x00 6. " TCM_COMB ,Combine R50 and R51 TCM together" "128KB-R5_0/R5_1,256KB/R5_0" textline " " bitfld.long 0x00 5. " TEINIT ,Exception handling state at reset" "ARM,Thumb" bitfld.long 0x00 4. " SLCLAMP ,Redundant processors output clamp" "Not clamped,Clamped" bitfld.long 0x00 3. " SLSPLIT ,R5 mode" "Lock,Split" bitfld.long 0x00 2. " DBGNOCLKSTOP ,CPU clocks stop" "Stopped,Not stopped" textline " " bitfld.long 0x00 1. " CFGIE ,Instruction side endianess" "Little,Big" bitfld.long 0x00 0. " CFGEE ,Data endianness value at reset" "Little,Big (Byte invariant)" rgroup.long 0x04++0x03 line.long 0x00 "GLBL_STATUS,Miscellaneous Status Information For RPU" bitfld.long 0x00 0. " DBGNOPWRDWN ,RPU debug mode" "Disabled,Enabled" group.long 0x08++0x07 line.long 0x00 "ERR_CNTL,Error Response Enable/disable Register" bitfld.long 0x00 0. " APB_ERR_RES ,Error response" "0,1" line.long 0x04 "RAM,RAM Extra Features Control Register" hexmask.long.byte 0x04 8.--15. 1. " RAMCONTROL1 ,Ramcontrol1 for controlling retention" hexmask.long.byte 0x04 0.--7. 1. " RAMCONTROL0 ,Ramcontrol0 for controlling retention" group.word 0x20++0x03 line.word 0x00 "RPU_ERR_INJ,RPU Error Injection Register" bitfld.word 0x00 15. " DCCMINP2[7] ,Inject and clear the fault in active processor bit 7" "Not injected,Injected" bitfld.word 0x00 14. " [6] ,Inject and clear the fault in active processor bit 6" "Not injected,Injected" bitfld.word 0x00 13. " [5] ,Inject and clear the fault in active processor bit 5" "Not injected,Injected" bitfld.word 0x00 12. " [4] ,Inject and clear the fault in active processor bit 4" "Not injected,Injected" textline " " bitfld.word 0x00 11. " [3] ,Inject and clear the fault in active processor bit 3" "Not injected,Injected" bitfld.word 0x00 10. " [2] ,Inject and clear the fault in active processor bit 2" "Not injected,Injected" bitfld.word 0x00 9. " [1] ,Inject and clear the fault in active processor bit 1" "Not injected,Injected" bitfld.word 0x00 8. " [0] ,Inject and clear the fault in active processor bit 0" "Not injected,Injected" textline " " bitfld.word 0x00 7. " DCCMINP[7] ,Inject and clear the fault in active processor bit 7" "Not injected,Injected" bitfld.word 0x00 6. " [6] ,Inject and clear the fault in active processor bit 6" "Not injected,Injected" bitfld.word 0x00 5. " [5] ,Inject and clear the fault in active processor bit 5" "Not injected,Injected" bitfld.word 0x00 4. " [4] ,Inject and clear the fault in active processor bit 4" "Not injected,Injected" textline " " bitfld.word 0x00 3. " [3] ,Inject and clear the fault in active processor bit 3" "Not injected,Injected" bitfld.word 0x00 2. " [2] ,Inject and clear the fault in active processor bit 2" "Not injected,Injected" bitfld.word 0x00 1. " [1] ,Inject and clear the fault in active processor bit 1" "Not injected,Injected" bitfld.word 0x00 0. " [0] ,Inject and clear the fault in active processor bit 0" "Not injected,Injected" group.long 0x24++0x03 line.long 0x00 "CCF_MASK,Common Cause Signal Mask Register" bitfld.long 0x00 7. " TEST_MBIST_MODE ,CCF MASK for MBIST enable" "Masked,Not masked" bitfld.long 0x00 6. " TEST_SCAN_MODE_LP ,CCF MASK for power island scan enable" "Masked,Not masked" bitfld.long 0x00 5. " TEST_SCAN_MODE ,CCF mask for scan enable" "Masked,Not masked" bitfld.long 0x00 4. " ISO ,CCF MASK for isolation enable" "Masked,Not masked" textline " " bitfld.long 0x00 3. " PGE ,CCF MASK for power island enable" "Masked,Not masked" bitfld.long 0x00 2. " R50_DBG_RST ,CCF MASK for R50 debug reset" "Masked,Not masked" bitfld.long 0x00 1. " R50_RST ,CCF mask for R50 CPU reset" "Masked,Not masked" bitfld.long 0x00 0. " PGE_RST ,CCF mask for power island reset" "Masked,Not masked" textline " " group.long 0x28++0x03 line.long 0x00 "INTR_0,RPU Interrupt Injection Register" bitfld.long 0x00 31. " SPI[31] ,Inject interrupt for GIC safety check bit 31" "Not injected,Injected" bitfld.long 0x00 30. " [30] ,Inject interrupt for GIC safety check bit 30" "Not injected,Injected" bitfld.long 0x00 29. " [29] ,Inject interrupt for GIC safety check bit 29" "Not injected,Injected" bitfld.long 0x00 28. " [28] ,Inject interrupt for GIC safety check bit 28" "Not injected,Injected" bitfld.long 0x00 27. " [27] ,Inject interrupt for GIC safety check bit 27" "Not injected,Injected" bitfld.long 0x00 26. " [26] ,Inject interrupt for GIC safety check bit 26" "Not injected,Injected" bitfld.long 0x00 25. " [25] ,Inject interrupt for GIC safety check bit 25" "Not injected,Injected" textline " " bitfld.long 0x00 24. " [24] ,Inject interrupt for GIC safety check bit 24" "Not injected,Injected" bitfld.long 0x00 23. " [23] ,Inject interrupt for GIC safety check bit 23" "Not injected,Injected" bitfld.long 0x00 22. " [22] ,Inject interrupt for GIC safety check bit 22" "Not injected,Injected" bitfld.long 0x00 21. " [21] ,Inject interrupt for GIC safety check bit 21" "Not injected,Injected" bitfld.long 0x00 20. " [20] ,Inject interrupt for GIC safety check bit 20" "Not injected,Injected" bitfld.long 0x00 19. " [19] ,Inject interrupt for GIC safety check bit 19" "Not injected,Injected" bitfld.long 0x00 18. " [18] ,Inject interrupt for GIC safety check bit 18" "Not injected,Injected" textline " " bitfld.long 0x00 17. " [17] ,Inject interrupt for GIC safety check bit 17" "Not injected,Injected" bitfld.long 0x00 16. " [16] ,Inject interrupt for GIC safety check bit 16" "Not injected,Injected" bitfld.long 0x00 15. " [15] ,Inject interrupt for GIC safety check bit 15" "Not injected,Injected" bitfld.long 0x00 14. " [14] ,Inject interrupt for GIC safety check bit 14" "Not injected,Injected" bitfld.long 0x00 13. " [13] ,Inject interrupt for GIC safety check bit 13" "Not injected,Injected" bitfld.long 0x00 12. " [12] ,Inject interrupt for GIC safety check bit 12" "Not injected,Injected" bitfld.long 0x00 11. " [11] ,Inject interrupt for GIC safety check bit 11" "Not injected,Injected" textline " " bitfld.long 0x00 10. " [10] ,Inject interrupt for GIC safety check bit 10" "Not injected,Injected" bitfld.long 0x00 9. " [9] ,Inject interrupt for GIC safety check bit 9" "Not injected,Injected" bitfld.long 0x00 8. " [8] ,Inject interrupt for GIC safety check bit 8" "Not injected,Injected" bitfld.long 0x00 7. " [7] ,Inject interrupt for GIC safety check bit 7" "Not injected,Injected" bitfld.long 0x00 6. " [6] ,Inject interrupt for GIC safety check bit 6" "Not injected,Injected" bitfld.long 0x00 5. " [5] ,Inject interrupt for GIC safety check bit 5" "Not injected,Injected" bitfld.long 0x00 4. " [4] ,Inject interrupt for GIC safety check bit 4" "Not injected,Injected" textline " " bitfld.long 0x00 3. " [3] ,Inject interrupt for GIC safety check bit 3" "Not injected,Injected" bitfld.long 0x00 2. " [2] ,Inject interrupt for GIC safety check bit 2" "Not injected,Injected" bitfld.long 0x00 1. " [1] ,Inject interrupt for GIC safety check bit 1" "Not injected,Injected" bitfld.long 0x00 0. " [0] ,Inject interrupt for GIC safety check bit 0" "Not injected,Injected" group.long (0x28+0x18)++0x03 line.long 0x00 "INTR_MASK_0,RPU Interrupt Injection Mask Register" bitfld.long 0x00 31. " SPI[31] ,Inject interrupt for GIC safety check mask bit 31" "Disabled,Enabled" bitfld.long 0x00 30. " [30] ,Inject interrupt for GIC safety check mask bit 30" "Disabled,Enabled" bitfld.long 0x00 29. " [29] ,Inject interrupt for GIC safety check mask bit 29" "Disabled,Enabled" bitfld.long 0x00 28. " [28] ,Inject interrupt for GIC safety check mask bit 28" "Disabled,Enabled" bitfld.long 0x00 27. " [27] ,Inject interrupt for GIC safety check mask bit 27" "Disabled,Enabled" bitfld.long 0x00 26. " [26] ,Inject interrupt for GIC safety check mask bit 26" "Disabled,Enabled" bitfld.long 0x00 25. " [25] ,Inject interrupt for GIC safety check mask bit 25" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " [24] ,Inject interrupt for GIC safety check mask bit 24" "Disabled,Enabled" bitfld.long 0x00 23. " [23] ,Inject interrupt for GIC safety check mask bit 23" "Disabled,Enabled" bitfld.long 0x00 22. " [22] ,Inject interrupt for GIC safety check mask bit 22" "Disabled,Enabled" bitfld.long 0x00 21. " [21] ,Inject interrupt for GIC safety check mask bit 21" "Disabled,Enabled" bitfld.long 0x00 20. " [20] ,Inject interrupt for GIC safety check mask bit 20" "Disabled,Enabled" bitfld.long 0x00 19. " [19] ,Inject interrupt for GIC safety check mask bit 19" "Disabled,Enabled" bitfld.long 0x00 18. " [18] ,Inject interrupt for GIC safety check mask bit 18" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " [17] ,Inject interrupt for GIC safety check mask bit 17" "Disabled,Enabled" bitfld.long 0x00 16. " [16] ,Inject interrupt for GIC safety check mask bit 16" "Disabled,Enabled" bitfld.long 0x00 15. " [15] ,Inject interrupt for GIC safety check mask bit 15" "Disabled,Enabled" bitfld.long 0x00 14. " [14] ,Inject interrupt for GIC safety check mask bit 14" "Disabled,Enabled" bitfld.long 0x00 13. " [13] ,Inject interrupt for GIC safety check mask bit 13" "Disabled,Enabled" bitfld.long 0x00 12. " [12] ,Inject interrupt for GIC safety check mask bit 12" "Disabled,Enabled" bitfld.long 0x00 11. " [11] ,Inject interrupt for GIC safety check mask bit 11" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " [10] ,Inject interrupt for GIC safety check mask bit 10" "Disabled,Enabled" bitfld.long 0x00 9. " [9] ,Inject interrupt for GIC safety check mask bit 9" "Disabled,Enabled" bitfld.long 0x00 8. " [8] ,Inject interrupt for GIC safety check mask bit 8" "Disabled,Enabled" bitfld.long 0x00 7. " [7] ,Inject interrupt for GIC safety check mask bit 7" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,Inject interrupt for GIC safety check mask bit 6" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,Inject interrupt for GIC safety check mask bit 5" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,Inject interrupt for GIC safety check mask bit 4" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " [3] ,Inject interrupt for GIC safety check mask bit 3" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,Inject interrupt for GIC safety check mask bit 2" "Disabled,Enabled" bitfld.long 0x00 1. " [1] ,Inject interrupt for GIC safety check mask bit 1" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Inject interrupt for GIC safety check mask bit 0" "Disabled,Enabled" group.long 0x2C++0x03 line.long 0x00 "INTR_1,RPU Interrupt Injection Register" bitfld.long 0x00 31. " SPI[31] ,Inject interrupt for GIC safety check bit 31" "Not injected,Injected" bitfld.long 0x00 30. " [30] ,Inject interrupt for GIC safety check bit 30" "Not injected,Injected" bitfld.long 0x00 29. " [29] ,Inject interrupt for GIC safety check bit 29" "Not injected,Injected" bitfld.long 0x00 28. " [28] ,Inject interrupt for GIC safety check bit 28" "Not injected,Injected" bitfld.long 0x00 27. " [27] ,Inject interrupt for GIC safety check bit 27" "Not injected,Injected" bitfld.long 0x00 26. " [26] ,Inject interrupt for GIC safety check bit 26" "Not injected,Injected" bitfld.long 0x00 25. " [25] ,Inject interrupt for GIC safety check bit 25" "Not injected,Injected" textline " " bitfld.long 0x00 24. " [24] ,Inject interrupt for GIC safety check bit 24" "Not injected,Injected" bitfld.long 0x00 23. " [23] ,Inject interrupt for GIC safety check bit 23" "Not injected,Injected" bitfld.long 0x00 22. " [22] ,Inject interrupt for GIC safety check bit 22" "Not injected,Injected" bitfld.long 0x00 21. " [21] ,Inject interrupt for GIC safety check bit 21" "Not injected,Injected" bitfld.long 0x00 20. " [20] ,Inject interrupt for GIC safety check bit 20" "Not injected,Injected" bitfld.long 0x00 19. " [19] ,Inject interrupt for GIC safety check bit 19" "Not injected,Injected" bitfld.long 0x00 18. " [18] ,Inject interrupt for GIC safety check bit 18" "Not injected,Injected" textline " " bitfld.long 0x00 17. " [17] ,Inject interrupt for GIC safety check bit 17" "Not injected,Injected" bitfld.long 0x00 16. " [16] ,Inject interrupt for GIC safety check bit 16" "Not injected,Injected" bitfld.long 0x00 15. " [15] ,Inject interrupt for GIC safety check bit 15" "Not injected,Injected" bitfld.long 0x00 14. " [14] ,Inject interrupt for GIC safety check bit 14" "Not injected,Injected" bitfld.long 0x00 13. " [13] ,Inject interrupt for GIC safety check bit 13" "Not injected,Injected" bitfld.long 0x00 12. " [12] ,Inject interrupt for GIC safety check bit 12" "Not injected,Injected" bitfld.long 0x00 11. " [11] ,Inject interrupt for GIC safety check bit 11" "Not injected,Injected" textline " " bitfld.long 0x00 10. " [10] ,Inject interrupt for GIC safety check bit 10" "Not injected,Injected" bitfld.long 0x00 9. " [9] ,Inject interrupt for GIC safety check bit 9" "Not injected,Injected" bitfld.long 0x00 8. " [8] ,Inject interrupt for GIC safety check bit 8" "Not injected,Injected" bitfld.long 0x00 7. " [7] ,Inject interrupt for GIC safety check bit 7" "Not injected,Injected" bitfld.long 0x00 6. " [6] ,Inject interrupt for GIC safety check bit 6" "Not injected,Injected" bitfld.long 0x00 5. " [5] ,Inject interrupt for GIC safety check bit 5" "Not injected,Injected" bitfld.long 0x00 4. " [4] ,Inject interrupt for GIC safety check bit 4" "Not injected,Injected" textline " " bitfld.long 0x00 3. " [3] ,Inject interrupt for GIC safety check bit 3" "Not injected,Injected" bitfld.long 0x00 2. " [2] ,Inject interrupt for GIC safety check bit 2" "Not injected,Injected" bitfld.long 0x00 1. " [1] ,Inject interrupt for GIC safety check bit 1" "Not injected,Injected" bitfld.long 0x00 0. " [0] ,Inject interrupt for GIC safety check bit 0" "Not injected,Injected" group.long (0x2C+0x18)++0x03 line.long 0x00 "INTR_MASK_1,RPU Interrupt Injection Mask Register" bitfld.long 0x00 31. " SPI[31] ,Inject interrupt for GIC safety check mask bit 31" "Disabled,Enabled" bitfld.long 0x00 30. " [30] ,Inject interrupt for GIC safety check mask bit 30" "Disabled,Enabled" bitfld.long 0x00 29. " [29] ,Inject interrupt for GIC safety check mask bit 29" "Disabled,Enabled" bitfld.long 0x00 28. " [28] ,Inject interrupt for GIC safety check mask bit 28" "Disabled,Enabled" bitfld.long 0x00 27. " [27] ,Inject interrupt for GIC safety check mask bit 27" "Disabled,Enabled" bitfld.long 0x00 26. " [26] ,Inject interrupt for GIC safety check mask bit 26" "Disabled,Enabled" bitfld.long 0x00 25. " [25] ,Inject interrupt for GIC safety check mask bit 25" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " [24] ,Inject interrupt for GIC safety check mask bit 24" "Disabled,Enabled" bitfld.long 0x00 23. " [23] ,Inject interrupt for GIC safety check mask bit 23" "Disabled,Enabled" bitfld.long 0x00 22. " [22] ,Inject interrupt for GIC safety check mask bit 22" "Disabled,Enabled" bitfld.long 0x00 21. " [21] ,Inject interrupt for GIC safety check mask bit 21" "Disabled,Enabled" bitfld.long 0x00 20. " [20] ,Inject interrupt for GIC safety check mask bit 20" "Disabled,Enabled" bitfld.long 0x00 19. " [19] ,Inject interrupt for GIC safety check mask bit 19" "Disabled,Enabled" bitfld.long 0x00 18. " [18] ,Inject interrupt for GIC safety check mask bit 18" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " [17] ,Inject interrupt for GIC safety check mask bit 17" "Disabled,Enabled" bitfld.long 0x00 16. " [16] ,Inject interrupt for GIC safety check mask bit 16" "Disabled,Enabled" bitfld.long 0x00 15. " [15] ,Inject interrupt for GIC safety check mask bit 15" "Disabled,Enabled" bitfld.long 0x00 14. " [14] ,Inject interrupt for GIC safety check mask bit 14" "Disabled,Enabled" bitfld.long 0x00 13. " [13] ,Inject interrupt for GIC safety check mask bit 13" "Disabled,Enabled" bitfld.long 0x00 12. " [12] ,Inject interrupt for GIC safety check mask bit 12" "Disabled,Enabled" bitfld.long 0x00 11. " [11] ,Inject interrupt for GIC safety check mask bit 11" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " [10] ,Inject interrupt for GIC safety check mask bit 10" "Disabled,Enabled" bitfld.long 0x00 9. " [9] ,Inject interrupt for GIC safety check mask bit 9" "Disabled,Enabled" bitfld.long 0x00 8. " [8] ,Inject interrupt for GIC safety check mask bit 8" "Disabled,Enabled" bitfld.long 0x00 7. " [7] ,Inject interrupt for GIC safety check mask bit 7" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,Inject interrupt for GIC safety check mask bit 6" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,Inject interrupt for GIC safety check mask bit 5" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,Inject interrupt for GIC safety check mask bit 4" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " [3] ,Inject interrupt for GIC safety check mask bit 3" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,Inject interrupt for GIC safety check mask bit 2" "Disabled,Enabled" bitfld.long 0x00 1. " [1] ,Inject interrupt for GIC safety check mask bit 1" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Inject interrupt for GIC safety check mask bit 0" "Disabled,Enabled" group.long 0x30++0x03 line.long 0x00 "INTR_2,RPU Interrupt Injection Register" bitfld.long 0x00 31. " SPI[31] ,Inject interrupt for GIC safety check bit 31" "Not injected,Injected" bitfld.long 0x00 30. " [30] ,Inject interrupt for GIC safety check bit 30" "Not injected,Injected" bitfld.long 0x00 29. " [29] ,Inject interrupt for GIC safety check bit 29" "Not injected,Injected" bitfld.long 0x00 28. " [28] ,Inject interrupt for GIC safety check bit 28" "Not injected,Injected" bitfld.long 0x00 27. " [27] ,Inject interrupt for GIC safety check bit 27" "Not injected,Injected" bitfld.long 0x00 26. " [26] ,Inject interrupt for GIC safety check bit 26" "Not injected,Injected" bitfld.long 0x00 25. " [25] ,Inject interrupt for GIC safety check bit 25" "Not injected,Injected" textline " " bitfld.long 0x00 24. " [24] ,Inject interrupt for GIC safety check bit 24" "Not injected,Injected" bitfld.long 0x00 23. " [23] ,Inject interrupt for GIC safety check bit 23" "Not injected,Injected" bitfld.long 0x00 22. " [22] ,Inject interrupt for GIC safety check bit 22" "Not injected,Injected" bitfld.long 0x00 21. " [21] ,Inject interrupt for GIC safety check bit 21" "Not injected,Injected" bitfld.long 0x00 20. " [20] ,Inject interrupt for GIC safety check bit 20" "Not injected,Injected" bitfld.long 0x00 19. " [19] ,Inject interrupt for GIC safety check bit 19" "Not injected,Injected" bitfld.long 0x00 18. " [18] ,Inject interrupt for GIC safety check bit 18" "Not injected,Injected" textline " " bitfld.long 0x00 17. " [17] ,Inject interrupt for GIC safety check bit 17" "Not injected,Injected" bitfld.long 0x00 16. " [16] ,Inject interrupt for GIC safety check bit 16" "Not injected,Injected" bitfld.long 0x00 15. " [15] ,Inject interrupt for GIC safety check bit 15" "Not injected,Injected" bitfld.long 0x00 14. " [14] ,Inject interrupt for GIC safety check bit 14" "Not injected,Injected" bitfld.long 0x00 13. " [13] ,Inject interrupt for GIC safety check bit 13" "Not injected,Injected" bitfld.long 0x00 12. " [12] ,Inject interrupt for GIC safety check bit 12" "Not injected,Injected" bitfld.long 0x00 11. " [11] ,Inject interrupt for GIC safety check bit 11" "Not injected,Injected" textline " " bitfld.long 0x00 10. " [10] ,Inject interrupt for GIC safety check bit 10" "Not injected,Injected" bitfld.long 0x00 9. " [9] ,Inject interrupt for GIC safety check bit 9" "Not injected,Injected" bitfld.long 0x00 8. " [8] ,Inject interrupt for GIC safety check bit 8" "Not injected,Injected" bitfld.long 0x00 7. " [7] ,Inject interrupt for GIC safety check bit 7" "Not injected,Injected" bitfld.long 0x00 6. " [6] ,Inject interrupt for GIC safety check bit 6" "Not injected,Injected" bitfld.long 0x00 5. " [5] ,Inject interrupt for GIC safety check bit 5" "Not injected,Injected" bitfld.long 0x00 4. " [4] ,Inject interrupt for GIC safety check bit 4" "Not injected,Injected" textline " " bitfld.long 0x00 3. " [3] ,Inject interrupt for GIC safety check bit 3" "Not injected,Injected" bitfld.long 0x00 2. " [2] ,Inject interrupt for GIC safety check bit 2" "Not injected,Injected" bitfld.long 0x00 1. " [1] ,Inject interrupt for GIC safety check bit 1" "Not injected,Injected" bitfld.long 0x00 0. " [0] ,Inject interrupt for GIC safety check bit 0" "Not injected,Injected" group.long (0x30+0x18)++0x03 line.long 0x00 "INTR_MASK_2,RPU Interrupt Injection Mask Register" bitfld.long 0x00 31. " SPI[31] ,Inject interrupt for GIC safety check mask bit 31" "Disabled,Enabled" bitfld.long 0x00 30. " [30] ,Inject interrupt for GIC safety check mask bit 30" "Disabled,Enabled" bitfld.long 0x00 29. " [29] ,Inject interrupt for GIC safety check mask bit 29" "Disabled,Enabled" bitfld.long 0x00 28. " [28] ,Inject interrupt for GIC safety check mask bit 28" "Disabled,Enabled" bitfld.long 0x00 27. " [27] ,Inject interrupt for GIC safety check mask bit 27" "Disabled,Enabled" bitfld.long 0x00 26. " [26] ,Inject interrupt for GIC safety check mask bit 26" "Disabled,Enabled" bitfld.long 0x00 25. " [25] ,Inject interrupt for GIC safety check mask bit 25" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " [24] ,Inject interrupt for GIC safety check mask bit 24" "Disabled,Enabled" bitfld.long 0x00 23. " [23] ,Inject interrupt for GIC safety check mask bit 23" "Disabled,Enabled" bitfld.long 0x00 22. " [22] ,Inject interrupt for GIC safety check mask bit 22" "Disabled,Enabled" bitfld.long 0x00 21. " [21] ,Inject interrupt for GIC safety check mask bit 21" "Disabled,Enabled" bitfld.long 0x00 20. " [20] ,Inject interrupt for GIC safety check mask bit 20" "Disabled,Enabled" bitfld.long 0x00 19. " [19] ,Inject interrupt for GIC safety check mask bit 19" "Disabled,Enabled" bitfld.long 0x00 18. " [18] ,Inject interrupt for GIC safety check mask bit 18" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " [17] ,Inject interrupt for GIC safety check mask bit 17" "Disabled,Enabled" bitfld.long 0x00 16. " [16] ,Inject interrupt for GIC safety check mask bit 16" "Disabled,Enabled" bitfld.long 0x00 15. " [15] ,Inject interrupt for GIC safety check mask bit 15" "Disabled,Enabled" bitfld.long 0x00 14. " [14] ,Inject interrupt for GIC safety check mask bit 14" "Disabled,Enabled" bitfld.long 0x00 13. " [13] ,Inject interrupt for GIC safety check mask bit 13" "Disabled,Enabled" bitfld.long 0x00 12. " [12] ,Inject interrupt for GIC safety check mask bit 12" "Disabled,Enabled" bitfld.long 0x00 11. " [11] ,Inject interrupt for GIC safety check mask bit 11" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " [10] ,Inject interrupt for GIC safety check mask bit 10" "Disabled,Enabled" bitfld.long 0x00 9. " [9] ,Inject interrupt for GIC safety check mask bit 9" "Disabled,Enabled" bitfld.long 0x00 8. " [8] ,Inject interrupt for GIC safety check mask bit 8" "Disabled,Enabled" bitfld.long 0x00 7. " [7] ,Inject interrupt for GIC safety check mask bit 7" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,Inject interrupt for GIC safety check mask bit 6" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,Inject interrupt for GIC safety check mask bit 5" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,Inject interrupt for GIC safety check mask bit 4" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " [3] ,Inject interrupt for GIC safety check mask bit 3" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,Inject interrupt for GIC safety check mask bit 2" "Disabled,Enabled" bitfld.long 0x00 1. " [1] ,Inject interrupt for GIC safety check mask bit 1" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Inject interrupt for GIC safety check mask bit 0" "Disabled,Enabled" group.long 0x34++0x03 line.long 0x00 "INTR_3,RPU Interrupt Injection Register" bitfld.long 0x00 31. " SPI[31] ,Inject interrupt for GIC safety check bit 31" "Not injected,Injected" bitfld.long 0x00 30. " [30] ,Inject interrupt for GIC safety check bit 30" "Not injected,Injected" bitfld.long 0x00 29. " [29] ,Inject interrupt for GIC safety check bit 29" "Not injected,Injected" bitfld.long 0x00 28. " [28] ,Inject interrupt for GIC safety check bit 28" "Not injected,Injected" bitfld.long 0x00 27. " [27] ,Inject interrupt for GIC safety check bit 27" "Not injected,Injected" bitfld.long 0x00 26. " [26] ,Inject interrupt for GIC safety check bit 26" "Not injected,Injected" bitfld.long 0x00 25. " [25] ,Inject interrupt for GIC safety check bit 25" "Not injected,Injected" textline " " bitfld.long 0x00 24. " [24] ,Inject interrupt for GIC safety check bit 24" "Not injected,Injected" bitfld.long 0x00 23. " [23] ,Inject interrupt for GIC safety check bit 23" "Not injected,Injected" bitfld.long 0x00 22. " [22] ,Inject interrupt for GIC safety check bit 22" "Not injected,Injected" bitfld.long 0x00 21. " [21] ,Inject interrupt for GIC safety check bit 21" "Not injected,Injected" bitfld.long 0x00 20. " [20] ,Inject interrupt for GIC safety check bit 20" "Not injected,Injected" bitfld.long 0x00 19. " [19] ,Inject interrupt for GIC safety check bit 19" "Not injected,Injected" bitfld.long 0x00 18. " [18] ,Inject interrupt for GIC safety check bit 18" "Not injected,Injected" textline " " bitfld.long 0x00 17. " [17] ,Inject interrupt for GIC safety check bit 17" "Not injected,Injected" bitfld.long 0x00 16. " [16] ,Inject interrupt for GIC safety check bit 16" "Not injected,Injected" bitfld.long 0x00 15. " [15] ,Inject interrupt for GIC safety check bit 15" "Not injected,Injected" bitfld.long 0x00 14. " [14] ,Inject interrupt for GIC safety check bit 14" "Not injected,Injected" bitfld.long 0x00 13. " [13] ,Inject interrupt for GIC safety check bit 13" "Not injected,Injected" bitfld.long 0x00 12. " [12] ,Inject interrupt for GIC safety check bit 12" "Not injected,Injected" bitfld.long 0x00 11. " [11] ,Inject interrupt for GIC safety check bit 11" "Not injected,Injected" textline " " bitfld.long 0x00 10. " [10] ,Inject interrupt for GIC safety check bit 10" "Not injected,Injected" bitfld.long 0x00 9. " [9] ,Inject interrupt for GIC safety check bit 9" "Not injected,Injected" bitfld.long 0x00 8. " [8] ,Inject interrupt for GIC safety check bit 8" "Not injected,Injected" bitfld.long 0x00 7. " [7] ,Inject interrupt for GIC safety check bit 7" "Not injected,Injected" bitfld.long 0x00 6. " [6] ,Inject interrupt for GIC safety check bit 6" "Not injected,Injected" bitfld.long 0x00 5. " [5] ,Inject interrupt for GIC safety check bit 5" "Not injected,Injected" bitfld.long 0x00 4. " [4] ,Inject interrupt for GIC safety check bit 4" "Not injected,Injected" textline " " bitfld.long 0x00 3. " [3] ,Inject interrupt for GIC safety check bit 3" "Not injected,Injected" bitfld.long 0x00 2. " [2] ,Inject interrupt for GIC safety check bit 2" "Not injected,Injected" bitfld.long 0x00 1. " [1] ,Inject interrupt for GIC safety check bit 1" "Not injected,Injected" bitfld.long 0x00 0. " [0] ,Inject interrupt for GIC safety check bit 0" "Not injected,Injected" group.long (0x34+0x18)++0x03 line.long 0x00 "INTR_MASK_3,RPU Interrupt Injection Mask Register" bitfld.long 0x00 31. " SPI[31] ,Inject interrupt for GIC safety check mask bit 31" "Disabled,Enabled" bitfld.long 0x00 30. " [30] ,Inject interrupt for GIC safety check mask bit 30" "Disabled,Enabled" bitfld.long 0x00 29. " [29] ,Inject interrupt for GIC safety check mask bit 29" "Disabled,Enabled" bitfld.long 0x00 28. " [28] ,Inject interrupt for GIC safety check mask bit 28" "Disabled,Enabled" bitfld.long 0x00 27. " [27] ,Inject interrupt for GIC safety check mask bit 27" "Disabled,Enabled" bitfld.long 0x00 26. " [26] ,Inject interrupt for GIC safety check mask bit 26" "Disabled,Enabled" bitfld.long 0x00 25. " [25] ,Inject interrupt for GIC safety check mask bit 25" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " [24] ,Inject interrupt for GIC safety check mask bit 24" "Disabled,Enabled" bitfld.long 0x00 23. " [23] ,Inject interrupt for GIC safety check mask bit 23" "Disabled,Enabled" bitfld.long 0x00 22. " [22] ,Inject interrupt for GIC safety check mask bit 22" "Disabled,Enabled" bitfld.long 0x00 21. " [21] ,Inject interrupt for GIC safety check mask bit 21" "Disabled,Enabled" bitfld.long 0x00 20. " [20] ,Inject interrupt for GIC safety check mask bit 20" "Disabled,Enabled" bitfld.long 0x00 19. " [19] ,Inject interrupt for GIC safety check mask bit 19" "Disabled,Enabled" bitfld.long 0x00 18. " [18] ,Inject interrupt for GIC safety check mask bit 18" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " [17] ,Inject interrupt for GIC safety check mask bit 17" "Disabled,Enabled" bitfld.long 0x00 16. " [16] ,Inject interrupt for GIC safety check mask bit 16" "Disabled,Enabled" bitfld.long 0x00 15. " [15] ,Inject interrupt for GIC safety check mask bit 15" "Disabled,Enabled" bitfld.long 0x00 14. " [14] ,Inject interrupt for GIC safety check mask bit 14" "Disabled,Enabled" bitfld.long 0x00 13. " [13] ,Inject interrupt for GIC safety check mask bit 13" "Disabled,Enabled" bitfld.long 0x00 12. " [12] ,Inject interrupt for GIC safety check mask bit 12" "Disabled,Enabled" bitfld.long 0x00 11. " [11] ,Inject interrupt for GIC safety check mask bit 11" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " [10] ,Inject interrupt for GIC safety check mask bit 10" "Disabled,Enabled" bitfld.long 0x00 9. " [9] ,Inject interrupt for GIC safety check mask bit 9" "Disabled,Enabled" bitfld.long 0x00 8. " [8] ,Inject interrupt for GIC safety check mask bit 8" "Disabled,Enabled" bitfld.long 0x00 7. " [7] ,Inject interrupt for GIC safety check mask bit 7" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,Inject interrupt for GIC safety check mask bit 6" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,Inject interrupt for GIC safety check mask bit 5" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,Inject interrupt for GIC safety check mask bit 4" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " [3] ,Inject interrupt for GIC safety check mask bit 3" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,Inject interrupt for GIC safety check mask bit 2" "Disabled,Enabled" bitfld.long 0x00 1. " [1] ,Inject interrupt for GIC safety check mask bit 1" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Inject interrupt for GIC safety check mask bit 0" "Disabled,Enabled" group.long 0x38++0x03 line.long 0x00 "INTR_4,RPU Interrupt Injection Register" bitfld.long 0x00 31. " SPI[31] ,Inject interrupt for GIC safety check bit 31" "Not injected,Injected" bitfld.long 0x00 30. " [30] ,Inject interrupt for GIC safety check bit 30" "Not injected,Injected" bitfld.long 0x00 29. " [29] ,Inject interrupt for GIC safety check bit 29" "Not injected,Injected" bitfld.long 0x00 28. " [28] ,Inject interrupt for GIC safety check bit 28" "Not injected,Injected" bitfld.long 0x00 27. " [27] ,Inject interrupt for GIC safety check bit 27" "Not injected,Injected" bitfld.long 0x00 26. " [26] ,Inject interrupt for GIC safety check bit 26" "Not injected,Injected" bitfld.long 0x00 25. " [25] ,Inject interrupt for GIC safety check bit 25" "Not injected,Injected" textline " " bitfld.long 0x00 24. " [24] ,Inject interrupt for GIC safety check bit 24" "Not injected,Injected" bitfld.long 0x00 23. " [23] ,Inject interrupt for GIC safety check bit 23" "Not injected,Injected" bitfld.long 0x00 22. " [22] ,Inject interrupt for GIC safety check bit 22" "Not injected,Injected" bitfld.long 0x00 21. " [21] ,Inject interrupt for GIC safety check bit 21" "Not injected,Injected" bitfld.long 0x00 20. " [20] ,Inject interrupt for GIC safety check bit 20" "Not injected,Injected" bitfld.long 0x00 19. " [19] ,Inject interrupt for GIC safety check bit 19" "Not injected,Injected" bitfld.long 0x00 18. " [18] ,Inject interrupt for GIC safety check bit 18" "Not injected,Injected" textline " " bitfld.long 0x00 17. " [17] ,Inject interrupt for GIC safety check bit 17" "Not injected,Injected" bitfld.long 0x00 16. " [16] ,Inject interrupt for GIC safety check bit 16" "Not injected,Injected" bitfld.long 0x00 15. " [15] ,Inject interrupt for GIC safety check bit 15" "Not injected,Injected" bitfld.long 0x00 14. " [14] ,Inject interrupt for GIC safety check bit 14" "Not injected,Injected" bitfld.long 0x00 13. " [13] ,Inject interrupt for GIC safety check bit 13" "Not injected,Injected" bitfld.long 0x00 12. " [12] ,Inject interrupt for GIC safety check bit 12" "Not injected,Injected" bitfld.long 0x00 11. " [11] ,Inject interrupt for GIC safety check bit 11" "Not injected,Injected" textline " " bitfld.long 0x00 10. " [10] ,Inject interrupt for GIC safety check bit 10" "Not injected,Injected" bitfld.long 0x00 9. " [9] ,Inject interrupt for GIC safety check bit 9" "Not injected,Injected" bitfld.long 0x00 8. " [8] ,Inject interrupt for GIC safety check bit 8" "Not injected,Injected" bitfld.long 0x00 7. " [7] ,Inject interrupt for GIC safety check bit 7" "Not injected,Injected" bitfld.long 0x00 6. " [6] ,Inject interrupt for GIC safety check bit 6" "Not injected,Injected" bitfld.long 0x00 5. " [5] ,Inject interrupt for GIC safety check bit 5" "Not injected,Injected" bitfld.long 0x00 4. " [4] ,Inject interrupt for GIC safety check bit 4" "Not injected,Injected" textline " " bitfld.long 0x00 3. " [3] ,Inject interrupt for GIC safety check bit 3" "Not injected,Injected" bitfld.long 0x00 2. " [2] ,Inject interrupt for GIC safety check bit 2" "Not injected,Injected" bitfld.long 0x00 1. " [1] ,Inject interrupt for GIC safety check bit 1" "Not injected,Injected" bitfld.long 0x00 0. " [0] ,Inject interrupt for GIC safety check bit 0" "Not injected,Injected" group.long (0x38+0x18)++0x03 line.long 0x00 "INTR_MASK_4,RPU Interrupt Injection Mask Register" bitfld.long 0x00 31. " SPI[31] ,Inject interrupt for GIC safety check mask bit 31" "Disabled,Enabled" bitfld.long 0x00 30. " [30] ,Inject interrupt for GIC safety check mask bit 30" "Disabled,Enabled" bitfld.long 0x00 29. " [29] ,Inject interrupt for GIC safety check mask bit 29" "Disabled,Enabled" bitfld.long 0x00 28. " [28] ,Inject interrupt for GIC safety check mask bit 28" "Disabled,Enabled" bitfld.long 0x00 27. " [27] ,Inject interrupt for GIC safety check mask bit 27" "Disabled,Enabled" bitfld.long 0x00 26. " [26] ,Inject interrupt for GIC safety check mask bit 26" "Disabled,Enabled" bitfld.long 0x00 25. " [25] ,Inject interrupt for GIC safety check mask bit 25" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " [24] ,Inject interrupt for GIC safety check mask bit 24" "Disabled,Enabled" bitfld.long 0x00 23. " [23] ,Inject interrupt for GIC safety check mask bit 23" "Disabled,Enabled" bitfld.long 0x00 22. " [22] ,Inject interrupt for GIC safety check mask bit 22" "Disabled,Enabled" bitfld.long 0x00 21. " [21] ,Inject interrupt for GIC safety check mask bit 21" "Disabled,Enabled" bitfld.long 0x00 20. " [20] ,Inject interrupt for GIC safety check mask bit 20" "Disabled,Enabled" bitfld.long 0x00 19. " [19] ,Inject interrupt for GIC safety check mask bit 19" "Disabled,Enabled" bitfld.long 0x00 18. " [18] ,Inject interrupt for GIC safety check mask bit 18" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " [17] ,Inject interrupt for GIC safety check mask bit 17" "Disabled,Enabled" bitfld.long 0x00 16. " [16] ,Inject interrupt for GIC safety check mask bit 16" "Disabled,Enabled" bitfld.long 0x00 15. " [15] ,Inject interrupt for GIC safety check mask bit 15" "Disabled,Enabled" bitfld.long 0x00 14. " [14] ,Inject interrupt for GIC safety check mask bit 14" "Disabled,Enabled" bitfld.long 0x00 13. " [13] ,Inject interrupt for GIC safety check mask bit 13" "Disabled,Enabled" bitfld.long 0x00 12. " [12] ,Inject interrupt for GIC safety check mask bit 12" "Disabled,Enabled" bitfld.long 0x00 11. " [11] ,Inject interrupt for GIC safety check mask bit 11" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " [10] ,Inject interrupt for GIC safety check mask bit 10" "Disabled,Enabled" bitfld.long 0x00 9. " [9] ,Inject interrupt for GIC safety check mask bit 9" "Disabled,Enabled" bitfld.long 0x00 8. " [8] ,Inject interrupt for GIC safety check mask bit 8" "Disabled,Enabled" bitfld.long 0x00 7. " [7] ,Inject interrupt for GIC safety check mask bit 7" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,Inject interrupt for GIC safety check mask bit 6" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,Inject interrupt for GIC safety check mask bit 5" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,Inject interrupt for GIC safety check mask bit 4" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " [3] ,Inject interrupt for GIC safety check mask bit 3" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,Inject interrupt for GIC safety check mask bit 2" "Disabled,Enabled" bitfld.long 0x00 1. " [1] ,Inject interrupt for GIC safety check mask bit 1" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Inject interrupt for GIC safety check mask bit 0" "Disabled,Enabled" textline " " group.long 0x54++0x03 line.long 0x00 "CCF_VAL,Common Cause Signal Value Register" bitfld.long 0x00 7. " TEST_MBIST_MODE ,Expected value of the TEST_MBIST_MODE" "Low,High" bitfld.long 0x00 6. " TEST_SCAN_MODE_LP ,Expected value of the TEST_SCAN_MODE_LP" "Low,High" bitfld.long 0x00 5. " TEST_SCAN_MODE ,Expected value of the TEST_SCAN_MODE" "Low,High" bitfld.long 0x00 4. " ISO ,Expected value of the ISO" "Low,High" textline " " bitfld.long 0x00 3. " PGE ,Expected value of the PGE" "Low,High" bitfld.long 0x00 2. " R50_DBG_RST ,Expected value of the R50_DBG_RST" "Low,High" bitfld.long 0x00 1. " R50_RST ,Expected value of the R50_RST" "Low,High" bitfld.long 0x00 0. " PGE_RST ,Expected value of the PGE_RST" "Low,High" group.long 0xF0++0x03 line.long 0x00 "SAFETY_CHK,RPU Safety Check Register" width 13. tree "RPU 0" group.long 0x100++0x03 line.long 0x00 "CFG,Configuration Parameters Specific To RPU0" bitfld.long 0x00 3. " CFGNMFI0 ,Non-maskable fast interrupts for R5 _0 enable" "Disabled,Enabled" bitfld.long 0x00 2. " VINITHI ,Executing form out of reset" "ATCM,OCM" bitfld.long 0x00 1. " COHERENT ,Accesses to peripherals with APU cache controller" "Disabled,Enabled" bitfld.long 0x00 0. " NCPUHALT ,Processor status" "Stopped,Running" rgroup.long (0x100+0x04)++0x03 line.long 0x00 "STATUS,R5_0 Status Register 0" bitfld.long 0x00 5. " NVALRESET ,Validation signal request for reset" "No reset,Reset" bitfld.long 0x00 4. " NVALIRQ ,Validation signal request for interrupt" "No interrupt,Interrupt" bitfld.long 0x00 3. " NVALFIQ ,Validation signal request for an fast interrupt" "No interrupt,Interrupt" bitfld.long 0x00 2. " NWFIPIPESTOPPED ,Mode of CPU caused WFI instruction/cpu pipeline status" "Standby mode/inactive,No standby mode/active" textline " " bitfld.long 0x00 1. " NWFEPIPESTOPPED ,Mode of CPU caused WFE instruction/cpu pipeline status" "Standby mode/inactive,No standby mode/active" bitfld.long 0x00 0. " NCLKSTOPPED ,Clock stop" "Stopped,Not stopped" group.long (0x100+0x08)++0x03 line.long 0x00 "PWRDWN,Power Down Request From R5s" bitfld.long 0x00 0. " EN ,Power up/power down" "Power up,Power down" group.long (0x100+0x14)++0x03 line.long 0x00 "ISR,Interrupt Status Register 0" eventfld.long 0x00 24. " FPUFC ,Masked floating-point underflow exception" "No exception,Exception" eventfld.long 0x00 23. " FPOFC ,Masked floating-point overflow exception" "No exception,Exception" eventfld.long 0x00 22. " FPIXC ,Masked floating-point inexact exception" "No exception,Exception" eventfld.long 0x00 21. " FPIXC ,Masked floating-point invalid operation exception" "No exception,Exception" textline " " eventfld.long 0x00 20. " FPIDC ,Masked floating-point input denormal exception" "No exception,Exception" eventfld.long 0x00 19. " FPDZC ,Masked floating-point divide-by-zero exception" "No exception,Exception" eventfld.long 0x00 18. " TCM_ASLV_CE ,TCM correctable ECC error reported by AXI slave interface" "No error,Error" eventfld.long 0x00 17. " TCM_ASLV_FAT ,TCM fatal ECC error reported by AXI slave interface" "No error,Error" textline " " eventfld.long 0x00 16. " TCM_LST_CE ,TCM correctable ECC error reported by prefetch unit" "No error,Error" eventfld.long 0x00 15. " TCM_PREFETCH_CE ,TCM correctable ECC error reported by load/store unit" "No error,Error" eventfld.long 0x00 14. " B1TCM_CE ,B1TCM single-bit ECC error" "No error,Error" eventfld.long 0x00 13. " B0TCM_CE ,B0TCM single-bit ECC error" "No error,Error" textline " " eventfld.long 0x00 12. " ATCM_CE ,ATCM single-bit ECC error" "No error,Error" eventfld.long 0x00 11. " B1TCM_UE ,B1TCM multi-bit ECC error" "No error,Error" eventfld.long 0x00 10. " B0TCM_UE ,B0TCM multi-bit ECC error" "No error,Error" eventfld.long 0x00 9. " ATCM_UE ,ATCM multi-bit ECC error" "No error,Error" textline " " eventfld.long 0x00 8. " DTAG_DIRTY_FAT ,Data cache tag/dirty RAM fatal ECC Error(From data-side or ACP)" "No error,Error" eventfld.long 0x00 7. " DDATA_FAT ,Data cache data RAM fatal ECC error" "No error,Error" eventfld.long 0x00 6. " TCM_LST_FAT ,TCM fatal ECC error reported from the load/store unit" "No error,Error" eventfld.long 0x00 5. " TCM_PREFETCH_FAT ,TCM fatal ECC error reported from the prefetch unit" "No error,Error" textline " " eventfld.long 0x00 4. " DDATA_CE ,Data cache data RAM correctable ECC error" "No error,Error" eventfld.long 0x00 3. " DTAG_DIRTY_CE ,Data cache tag or dirty RAM correctable error" "No error,Error" eventfld.long 0x00 2. " IDATA_CE ,Instruction cache data RAM correctable error" "No error,Error" eventfld.long 0x00 1. " ITAG_CE ,Instruction cache tag RAM correctable error" "No error,Error" textline " " eventfld.long 0x00 0. " APB_ERR ,PSLVE error detected on APB" "No error,Error" group.long (0x100+0x18)++0x03 line.long 0x00 "IMR_SET/CLR,Interrupt Mask Register 0" setclrfld.long 0x00 24. 0x04 24. 0x08 24. " FPUFC ,Masked floating-point underflow exception" "Masked,Not masked" setclrfld.long 0x00 23. 0x04 23. 0x08 23. " FPOFC ,Masked floating-point overflow exception" "Masked,Not masked" setclrfld.long 0x00 22. 0x04 22. 0x08 22. " FPIXC ,Masked floating-point inexact exception" "Masked,Not masked" setclrfld.long 0x00 21. 0x04 21. 0x08 21. " FPIXC ,Masked floating-point invalid operation exception" "Masked,Not masked" textline " " setclrfld.long 0x00 20. 0x04 20. 0x08 20. " FPIDC ,Masked floating-point input denormal exception" "Masked,Not masked" setclrfld.long 0x00 19. 0x04 19. 0x08 19. " FPDZC ,Masked floating-point divide-by-zero exception" "Masked,Not masked" setclrfld.long 0x00 18. 0x04 18. 0x08 18. " TCM_ASLV_CE ,TCM correctable ECC error reported by AXI slave interface" "Masked,Not masked" setclrfld.long 0x00 17. 0x04 17. 0x08 17. " TCM_ASLV_FAT ,TCM fatal ECC error reported by AXI slave interface" "Masked,Not masked" textline " " setclrfld.long 0x00 16. 0x04 16. 0x08 16. " TCM_LST_CE ,TCM correctable ECC error reported by prefetch unit" "Masked,Not masked" setclrfld.long 0x00 15. 0x04 15. 0x08 15. " TCM_PREFETCH_CE ,TCM correctable ECC error reported by load/store unit" "Masked,Not masked" setclrfld.long 0x00 14. 0x04 14. 0x08 14. " B1TCM_CE ,B1TCM single-bit ECC error" "Masked,Not masked" setclrfld.long 0x00 13. 0x04 13. 0x08 13. " B0TCM_CE ,B0TCM single-bit ECC error" "Masked,Not masked" textline " " setclrfld.long 0x00 12. 0x04 12. 0x08 12. " ATCM_CE ,ATCM single-bit ECC error" "Masked,Not masked" setclrfld.long 0x00 11. 0x04 11. 0x08 11. " B1TCM_UE ,B1TCM multi-bit ECC error" "Masked,Not masked" setclrfld.long 0x00 10. 0x04 10. 0x08 10. " B0TCM_UE ,B0TCM multi-bit ECC error" "Masked,Not masked" setclrfld.long 0x00 9. 0x04 9. 0x08 9. " ATCM_UE ,ATCM multi-bit ECC error" "Masked,Not masked" textline " " setclrfld.long 0x00 8. 0x04 8. 0x08 8. " DTAG_DIRTY_FAT ,Data cache tag/dirty RAM fatal ECC Error(From data-side or ACP)" "Masked,Not masked" setclrfld.long 0x00 7. 0x04 7. 0x08 7. " DDATA_FAT ,Data cache data RAM fatal ECC error" "Masked,Not masked" setclrfld.long 0x00 6. 0x04 6. 0x08 6. " TCM_LST_FAT ,TCM fatal ECC error reported from the load/store unit" "Masked,Not masked" setclrfld.long 0x00 5. 0x04 5. 0x08 5. " TCM_PREFETCH_FAT ,TCM fatal ECC error reported from the prefetch unit" "Masked,Not masked" textline " " setclrfld.long 0x00 4. 0x04 4. 0x08 4. " DDATA_CE ,Data cache data RAM correctable ECC error" "Masked,Not masked" setclrfld.long 0x00 3. 0x04 3. 0x08 3. " DTAG_DIRTY_CE ,Data cache tag or dirty RAM correctable error" "Masked,Not masked" setclrfld.long 0x00 2. 0x04 2. 0x08 2. " IDATA_CE ,Instruction cache data RAM correctable error" "Masked,Not masked" setclrfld.long 0x00 1. 0x04 1. 0x08 1. " ITAG_CE ,Instruction cache tag RAM correctable error" "Masked,Not masked" textline " " setclrfld.long 0x00 0. 0x04 0. 0x08 0. " APB_ERR ,PSLVE error detected on APB" "Masked,Not masked" group.long (0x100+0x24)++0x03 line.long 0x00 "SLV_BASE,Slave Base Address Register 0" hexmask.long.byte 0x00 0.--7. 0x01 " ADDR ,Slave address" group.long (0x100+0x28)++0x03 line.long 0x00 "AXI_OVER,RPU 0 AXI Override Register 0" bitfld.long 0x00 6.--9. " AWCACHE ,AWCACHE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 2.--5. " ARCACHE ,ARCACHE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 1. " AWCACHE_EN ,Override AXI AWCACHE bits with the AWCACHE bits" "AXI AWCACHE,APB AWCACHE" bitfld.long 0x00 0. " ARCACHE_EN ,Override AXI ARCACHE bits with the ARCACHE bits" "AXI AWCACHE,APB AWCACHE" tree.end tree "RPU 1" group.long 0x200++0x03 line.long 0x00 "CFG,Configuration Parameters Specific To RPU1" bitfld.long 0x00 3. " CFGNMFI1 ,Non-maskable fast interrupts for R5 _1 enable" "Disabled,Enabled" bitfld.long 0x00 2. " VINITHI ,Executing form out of reset" "ATCM,OCM" bitfld.long 0x00 1. " COHERENT ,Accesses to peripherals with APU cache controller" "Disabled,Enabled" bitfld.long 0x00 0. " NCPUHALT ,Processor status" "Stopped,Running" rgroup.long (0x200+0x04)++0x03 line.long 0x00 "STATUS,R5_1 Status Register 1" bitfld.long 0x00 5. " NVALRESET ,Validation signal request for reset" "No reset,Reset" bitfld.long 0x00 4. " NVALIRQ ,Validation signal request for interrupt" "No interrupt,Interrupt" bitfld.long 0x00 3. " NVALFIQ ,Validation signal request for an fast interrupt" "No interrupt,Interrupt" bitfld.long 0x00 2. " NWFIPIPESTOPPED ,Mode of CPU caused WFI instruction/cpu pipeline status" "Standby mode/inactive,No standby mode/active" textline " " bitfld.long 0x00 1. " NWFEPIPESTOPPED ,Mode of CPU caused WFE instruction/cpu pipeline status" "Standby mode/inactive,No standby mode/active" bitfld.long 0x00 0. " NCLKSTOPPED ,Clock stop" "Stopped,Not stopped" group.long (0x200+0x08)++0x03 line.long 0x00 "PWRDWN,Power Down Request From R5s" bitfld.long 0x00 0. " EN ,Power up/power down" "Power up,Power down" group.long (0x200+0x14)++0x03 line.long 0x00 "ISR,Interrupt Status Register 1" eventfld.long 0x00 24. " FPUFC ,Masked floating-point underflow exception" "No exception,Exception" eventfld.long 0x00 23. " FPOFC ,Masked floating-point overflow exception" "No exception,Exception" eventfld.long 0x00 22. " FPIXC ,Masked floating-point inexact exception" "No exception,Exception" eventfld.long 0x00 21. " FPIXC ,Masked floating-point invalid operation exception" "No exception,Exception" textline " " eventfld.long 0x00 20. " FPIDC ,Masked floating-point input denormal exception" "No exception,Exception" eventfld.long 0x00 19. " FPDZC ,Masked floating-point divide-by-zero exception" "No exception,Exception" eventfld.long 0x00 18. " TCM_ASLV_CE ,TCM correctable ECC error reported by AXI slave interface" "No error,Error" eventfld.long 0x00 17. " TCM_ASLV_FAT ,TCM fatal ECC error reported by AXI slave interface" "No error,Error" textline " " eventfld.long 0x00 16. " TCM_LST_CE ,TCM correctable ECC error reported by prefetch unit" "No error,Error" eventfld.long 0x00 15. " TCM_PREFETCH_CE ,TCM correctable ECC error reported by load/store unit" "No error,Error" eventfld.long 0x00 14. " B1TCM_CE ,B1TCM single-bit ECC error" "No error,Error" eventfld.long 0x00 13. " B0TCM_CE ,B0TCM single-bit ECC error" "No error,Error" textline " " eventfld.long 0x00 12. " ATCM_CE ,ATCM single-bit ECC error" "No error,Error" eventfld.long 0x00 11. " B1TCM_UE ,B1TCM multi-bit ECC error" "No error,Error" eventfld.long 0x00 10. " B0TCM_UE ,B0TCM multi-bit ECC error" "No error,Error" eventfld.long 0x00 9. " ATCM_UE ,ATCM multi-bit ECC error" "No error,Error" textline " " eventfld.long 0x00 8. " DTAG_DIRTY_FAT ,Data cache tag/dirty RAM fatal ECC Error(From data-side or ACP)" "No error,Error" eventfld.long 0x00 7. " DDATA_FAT ,Data cache data RAM fatal ECC error" "No error,Error" eventfld.long 0x00 6. " TCM_LST_FAT ,TCM fatal ECC error reported from the load/store unit" "No error,Error" eventfld.long 0x00 5. " TCM_PREFETCH_FAT ,TCM fatal ECC error reported from the prefetch unit" "No error,Error" textline " " eventfld.long 0x00 4. " DDATA_CE ,Data cache data RAM correctable ECC error" "No error,Error" eventfld.long 0x00 3. " DTAG_DIRTY_CE ,Data cache tag or dirty RAM correctable error" "No error,Error" eventfld.long 0x00 2. " IDATA_CE ,Instruction cache data RAM correctable error" "No error,Error" eventfld.long 0x00 1. " ITAG_CE ,Instruction cache tag RAM correctable error" "No error,Error" textline " " eventfld.long 0x00 0. " APB_ERR ,PSLVE error detected on APB" "No error,Error" group.long (0x200+0x18)++0x03 line.long 0x00 "IMR_SET/CLR,Interrupt Mask Register 1" setclrfld.long 0x00 24. 0x04 24. 0x08 24. " FPUFC ,Masked floating-point underflow exception" "Masked,Not masked" setclrfld.long 0x00 23. 0x04 23. 0x08 23. " FPOFC ,Masked floating-point overflow exception" "Masked,Not masked" setclrfld.long 0x00 22. 0x04 22. 0x08 22. " FPIXC ,Masked floating-point inexact exception" "Masked,Not masked" setclrfld.long 0x00 21. 0x04 21. 0x08 21. " FPIXC ,Masked floating-point invalid operation exception" "Masked,Not masked" textline " " setclrfld.long 0x00 20. 0x04 20. 0x08 20. " FPIDC ,Masked floating-point input denormal exception" "Masked,Not masked" setclrfld.long 0x00 19. 0x04 19. 0x08 19. " FPDZC ,Masked floating-point divide-by-zero exception" "Masked,Not masked" setclrfld.long 0x00 18. 0x04 18. 0x08 18. " TCM_ASLV_CE ,TCM correctable ECC error reported by AXI slave interface" "Masked,Not masked" setclrfld.long 0x00 17. 0x04 17. 0x08 17. " TCM_ASLV_FAT ,TCM fatal ECC error reported by AXI slave interface" "Masked,Not masked" textline " " setclrfld.long 0x00 16. 0x04 16. 0x08 16. " TCM_LST_CE ,TCM correctable ECC error reported by prefetch unit" "Masked,Not masked" setclrfld.long 0x00 15. 0x04 15. 0x08 15. " TCM_PREFETCH_CE ,TCM correctable ECC error reported by load/store unit" "Masked,Not masked" setclrfld.long 0x00 14. 0x04 14. 0x08 14. " B1TCM_CE ,B1TCM single-bit ECC error" "Masked,Not masked" setclrfld.long 0x00 13. 0x04 13. 0x08 13. " B0TCM_CE ,B0TCM single-bit ECC error" "Masked,Not masked" textline " " setclrfld.long 0x00 12. 0x04 12. 0x08 12. " ATCM_CE ,ATCM single-bit ECC error" "Masked,Not masked" setclrfld.long 0x00 11. 0x04 11. 0x08 11. " B1TCM_UE ,B1TCM multi-bit ECC error" "Masked,Not masked" setclrfld.long 0x00 10. 0x04 10. 0x08 10. " B0TCM_UE ,B0TCM multi-bit ECC error" "Masked,Not masked" setclrfld.long 0x00 9. 0x04 9. 0x08 9. " ATCM_UE ,ATCM multi-bit ECC error" "Masked,Not masked" textline " " setclrfld.long 0x00 8. 0x04 8. 0x08 8. " DTAG_DIRTY_FAT ,Data cache tag/dirty RAM fatal ECC Error(From data-side or ACP)" "Masked,Not masked" setclrfld.long 0x00 7. 0x04 7. 0x08 7. " DDATA_FAT ,Data cache data RAM fatal ECC error" "Masked,Not masked" setclrfld.long 0x00 6. 0x04 6. 0x08 6. " TCM_LST_FAT ,TCM fatal ECC error reported from the load/store unit" "Masked,Not masked" setclrfld.long 0x00 5. 0x04 5. 0x08 5. " TCM_PREFETCH_FAT ,TCM fatal ECC error reported from the prefetch unit" "Masked,Not masked" textline " " setclrfld.long 0x00 4. 0x04 4. 0x08 4. " DDATA_CE ,Data cache data RAM correctable ECC error" "Masked,Not masked" setclrfld.long 0x00 3. 0x04 3. 0x08 3. " DTAG_DIRTY_CE ,Data cache tag or dirty RAM correctable error" "Masked,Not masked" setclrfld.long 0x00 2. 0x04 2. 0x08 2. " IDATA_CE ,Instruction cache data RAM correctable error" "Masked,Not masked" setclrfld.long 0x00 1. 0x04 1. 0x08 1. " ITAG_CE ,Instruction cache tag RAM correctable error" "Masked,Not masked" textline " " setclrfld.long 0x00 0. 0x04 0. 0x08 0. " APB_ERR ,PSLVE error detected on APB" "Masked,Not masked" group.long (0x200+0x24)++0x03 line.long 0x00 "SLV_BASE,Slave Base Address Register 1" hexmask.long.byte 0x00 0.--7. 0x01 " ADDR ,Slave address" group.long (0x200+0x28)++0x03 line.long 0x00 "AXI_OVER,RPU 1 AXI Override Register 1" bitfld.long 0x00 6.--9. " AWCACHE ,AWCACHE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 2.--5. " ARCACHE ,ARCACHE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 1. " AWCACHE_EN ,Override AXI AWCACHE bits with the AWCACHE bits" "AXI AWCACHE,APB AWCACHE" bitfld.long 0x00 0. " ARCACHE_EN ,Override AXI ARCACHE bits with the ARCACHE bits" "AXI AWCACHE,APB AWCACHE" tree.end width 0x0B tree.end tree "RSA (RSA Module)" tree "RSA" base ad:0xFFCE002C width 17. wgroup.long 0x00++0x1B line.long 0x00 "WR_DATA_0,Write Data Register 0" line.long 0x04 "WR_DATA_1,Write Data Register 1" line.long 0x08 "WR_DATA_2,Write Data Register 2" line.long 0x0C "WR_DATA_3,Write Data Register 3" line.long 0x10 "WR_DATA_4,Write Data Register 4" line.long 0x14 "WR_DATA_5,Write Data Register 5" line.long 0x18 "WR_ADDR,Write Address Register" rgroup.long 0x1C++0x17 line.long 0x00 "RD_DATA_0,Read Data Register 0" line.long 0x04 "RD_DATA_1,Read Data Register 1" line.long 0x08 "RD_DATA_2,Read Data Register 2" line.long 0x0C "RD_DATA_3,Read Data Register 3" line.long 0x10 "RD_DATA_4,Read Data Register 4" line.long 0x14 "RD_DATA_5,Read Data Register 5" wgroup.long 0x34++0x03 line.long 0x00 "RD_ADDR,Read Address Register" group.long 0x38++0x07 line.long 0x00 "RSA_CFG,RSA Control Register" bitfld.long 0x00 2. " RD_ENDIANNESS ,Flip the incoming APB byte order" "Not flipped,Flipped" bitfld.long 0x00 1. " WR_ENDIANNESS ,Flip the incoming APB byte order" "Not flipped,Flipped" bitfld.long 0x00 0. " SLVERR_EN ,SLVERR enable/disable" "Disabled,Enabled" line.long 0x04 "RSA_ISR,RSA Interrupt Status Register" eventfld.long 0x04 0. " APB_SLVERR ,APB slave error" "No error,Error" group.long 0x40++0x03 line.long 0x00 "RSA_IMR_SET/CLR,RSA Interrupt Mask Register" setclrfld.long 0x00 0. 0x08 0. 0x04 0. " APB_SLVERR ,APB slave error interrupt mask" "Not masked,Masked" width 0x0B tree.end tree "RSA_CORE" base ad:0xFFCE0000 width 8. wgroup.long 0x10++0x03 line.long 0x00 "CTRL,RSA Control Register" bitfld.long 0x00 4.--7. " LEN_CODE ,Length code" "512,576,704,768,992,1024,1152,1408,1536,1984,2048,3072,4096,?..." bitfld.long 0x00 3. " DONE_CLR_ABORT ,Clear the done signal from STATUS, abort the current operation" "No clear,Clear" bitfld.long 0x00 0.--2. " OPCODE ,Operation code" "NOP,Exponentiation,Modulus,Multiplication,R*R mod M calculation,R*R mod M exponentiation,?..." rgroup.long 0x14++0x03 line.long 0x00 "STATUS,RRSA Status Register" bitfld.long 0x00 3.--7. " PROG_CNT ,Progress counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 2. " ERROR ,Error in the parameters" "No error,Error" bitfld.long 0x00 1. " BUSY ,Operation in progress" "Not busy,Busy" bitfld.long 0x00 0. " DONE ,Operation completed" "Not done,Done" wgroup.long 0x18++0x0F line.long 0x00 "MINV0,RSA MINV0 Register" hexmask.long.byte 0x00 0.--7. 1. " MINV0 ,Minv value of -1/modulus mod 2^32 (Lsb)" line.long 0x04 "MINV1,RSA MINV1 Register" hexmask.long.byte 0x04 0.--7. 1. " MINV1 ,Minv value of -1/modulus mod 2^32" line.long 0x08 "MINV2,RSA MINV2 Register" hexmask.long.byte 0x08 0.--7. 1. " MINV2 ,Minv value of -1/modulus mod 2^32" line.long 0x0C "MINV3,RSA MINV3 Register" hexmask.long.byte 0x0C 0.--7. 1. " MINV3 ,Minv value of -1/modulus mod 2^32 (Msb)" width 0x0B tree.end tree.end tree "RTC (Real-Time Clock)" base ad:0xFFA60000 width 29. wgroup.long 0x00++0x03 line.long 0x00 "SET_TIME_WRITE,Set Time Write Register" rgroup.long 0x04++0x03 line.long 0x00 "SET_TIME_READ,Set Time Read Register" wgroup.long 0x08++0x03 line.long 0x00 "CALIB_WRITE,Calibration Write Register" bitfld.long 0x00 20. " FRACTION_EN ,Compensation enable" "Disabled,Enabled" bitfld.long 0x00 16.--19. " FRACTION_DATA ,Compensation data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 0.--15. 1. " MAX_TICK ,Max tick value" rgroup.long 0x0C++0x03 line.long 0x00 "CALIB_READ,Calibration Read Register" bitfld.long 0x00 20. " FRACTION_EN ,Compensation enable" "Disabled,Enabled" bitfld.long 0x00 16.--19. " FRACTION_DATA ,Compensation data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 0.--15. 1. " MAX_TICK ,Max tick value" rgroup.long 0x10++0x03 line.long 0x00 "CURRENT_TIME,Current Time Register" rgroup.word 0x14++0x01 line.word 0x00 "CURRENT_TICK,Current Oscillator Ticks Register" group.long 0x18++0x03 line.long 0x00 "ALARM,Alarm Register" group.byte 0x20++0x00 line.byte 0x00 "RTC_INT_STATUS,Interrupt Status Register" eventfld.byte 0x00 1. " ALARM ,Alarm interrupt status" "No interrupt,Interrupt" eventfld.byte 0x00 0. " SECONDS ,Seconds interrupt status" "No interrupt,Interrupt" group.byte 0x24++0x00 line.byte 0x00 "RTC_INT_MASK_SET/CLR,RTC Interrupt Mask Register" setclrfld.byte 0x00 1. 0x08 1. 0x04 1. " ALARM ,Alarm interrupt mask" "Not masked,Masked" setclrfld.byte 0x00 0. 0x08 0. 0x04 0. " SECONDS ,Seconds interrupt mask" "Not masked,Masked" group.byte 0x30++0x00 line.byte 0x00 "ADDR_ERROR,Address Error Status Register" eventfld.byte 0x00 0. " STATUS ,Status for an address decode error interrupt" "No interrupt,Interrupt" group.byte 0x34++0x00 line.byte 0x00 "ADDR_ERROR_INT_MASK_SET/CLR,Address Error Interrupt Mask Register" setclrfld.byte 0x00 0. 0x08 0. 0x04 0. " MASK ,Mask for an address decode error interrupt" "Not masked,Masked" group.long 0x40++0x03 line.long 0x00 "CONTROL,Control Register" bitfld.long 0x00 31. " BATTERY_DIS ,RTC enable" "Disabled,Enabled" bitfld.long 0x00 25. " OSC_CNTRL[1] ,Crystal test enable" "Disabled,Enabled" bitfld.long 0x00 24. " [0] ,Crystal enable" "Disabled,Enabled" bitfld.long 0x00 0. " SLVERR_EN ,SLVERR enable/disable" "Disabled,Enabled" group.long 0x50++0x03 line.long 0x00 "SAFETY_CHK,Safety Check Register" width 0x0B tree.end tree "SATA (Serial ATA)" tree "SATA_AHCI_HBA" base ad:0xFD0C0000 width 11. rgroup.long 0x00++0x03 line.long 0x00 "CAP,HBA Capabilities Register" bitfld.long 0x00 31. " S64A ,64-bit addressing" "Not supported,Supported" bitfld.long 0x00 30. " SNCQ ,Native command queuing" "Not supported,Supported" bitfld.long 0x00 29. " SSNTF ,Snotification register" "Not supported,Supported" bitfld.long 0x00 28. " SMPS ,Mechanical presence switch" "Not supported,Supported" textline " " bitfld.long 0x00 27. " SSS ,Staggered Spin-up" "Not supported,Supported" bitfld.long 0x00 26. " SALP ,Aggressive link power management" "Not supported,Supported" bitfld.long 0x00 25. " SAL ,Activity LED" "Not supported,Supported" bitfld.long 0x00 24. " SCLO ,Command list override" "Not supported,Supported" textline " " bitfld.long 0x00 20.--23. " ISS ,Interface speed support" "1.5 Gbps,3 Gbps,6 Gbps,?..." bitfld.long 0x00 18. " SAM ,AHCI is the only mode supported, legacy is not supported" "No,Yes" bitfld.long 0x00 17. " SPM ,Port multiplier" "Not supported,Supported" bitfld.long 0x00 16. " FBSS ,FIS-based switching" "Not supported,Supported" textline " " bitfld.long 0x00 15. " PMD ,PIO multiple DRQ block" "Not supported,Supported" bitfld.long 0x00 14. " SSC ,Slumber state" "Not supported,Supported" bitfld.long 0x00 13. " PSC ,Partial state" "Not supported,Supported" bitfld.long 0x00 8.--12. " NCS ,Number of command slots" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" textline " " bitfld.long 0x00 7. " CCCS ,Command completion coalescing" "Not supported,Supported" bitfld.long 0x00 6. " EMS ,Enclosure management" "Not supported,Supported" bitfld.long 0x00 5. " SXS ,External SATA" "Not supported,Supported" bitfld.long 0x00 0.--4. " NP ,Number of ports" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" group.long 0x04++0x07 line.long 0x00 "CAP,HBA Capabilities Register" bitfld.long 0x00 31. " AE ,AHCI enable" "Disabled,Enabled" rbitfld.long 0x00 2. " MRSM ,MSI revert to single message" "Not occurred,Occurred" bitfld.long 0x00 1. " IE ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " HR ,HBA reset" "No reset,Reset" line.long 0x04 "IS,Interrupt Status Register" eventfld.long 0x04 31. " IPS[31] ,Port 31 interrupt pending status" "Not pending,Pending" eventfld.long 0x04 30. " [30] ,Port 30 interrupt pending status" "Not pending,Pending" eventfld.long 0x04 29. " [29] ,Port 29 interrupt pending status" "Not pending,Pending" eventfld.long 0x04 28. " [28] ,Port 28 interrupt pending status" "Not pending,Pending" textline " " eventfld.long 0x04 27. " [27] ,Port 27 interrupt pending status" "Not pending,Pending" eventfld.long 0x04 26. " [26] ,Port 26 interrupt pending status" "Not pending,Pending" eventfld.long 0x04 25. " [25] ,Port 25 interrupt pending status" "Not pending,Pending" eventfld.long 0x04 24. " [24] ,Port 24 interrupt pending status" "Not pending,Pending" textline " " eventfld.long 0x04 23. " [23] ,Port 23 interrupt pending status" "Not pending,Pending" eventfld.long 0x04 22. " [22] ,Port 22 interrupt pending status" "Not pending,Pending" eventfld.long 0x04 21. " [21] ,Port 21 interrupt pending status" "Not pending,Pending" eventfld.long 0x04 20. " [20] ,Port 20 interrupt pending status" "Not pending,Pending" textline " " eventfld.long 0x04 19. " [19] ,Port 19 interrupt pending status" "Not pending,Pending" eventfld.long 0x04 18. " [18] ,Port 18 interrupt pending status" "Not pending,Pending" eventfld.long 0x04 17. " [17] ,Port 17 interrupt pending status" "Not pending,Pending" eventfld.long 0x04 16. " [16] ,Port 16 interrupt pending status" "Not pending,Pending" textline " " eventfld.long 0x04 15. " [15] ,Port 15 interrupt pending status" "Not pending,Pending" eventfld.long 0x04 14. " [14] ,Port 14 interrupt pending status" "Not pending,Pending" eventfld.long 0x04 13. " [13] ,Port 13 interrupt pending status" "Not pending,Pending" eventfld.long 0x04 12. " [12] ,Port 12 interrupt pending status" "Not pending,Pending" textline " " eventfld.long 0x04 11. " [11] ,Port 11 interrupt pending status" "Not pending,Pending" eventfld.long 0x04 10. " [10] ,Port 10 interrupt pending status" "Not pending,Pending" eventfld.long 0x04 9. " [9] ,Port 9 interrupt pending status" "Not pending,Pending" eventfld.long 0x04 8. " [8] ,Port 8 interrupt pending status" "Not pending,Pending" textline " " eventfld.long 0x04 7. " [7] ,Port 7 interrupt pending status" "Not pending,Pending" eventfld.long 0x04 6. " [6] ,Port 6 interrupt pending status" "Not pending,Pending" eventfld.long 0x04 5. " [5] ,Port 5 interrupt pending status" "Not pending,Pending" eventfld.long 0x04 4. " [4] ,Port 4 interrupt pending status" "Not pending,Pending" textline " " eventfld.long 0x04 3. " [3] ,Port 3 interrupt pending status" "Not pending,Pending" eventfld.long 0x04 2. " [2] ,Port 2 interrupt pending status" "Not pending,Pending" eventfld.long 0x04 1. " [1] ,Port 1 interrupt pending status" "Not pending,Pending" eventfld.long 0x04 0. " [0] ,Port 0 interrupt pending status" "Not pending,Pending" rgroup.long 0x0C++0x07 line.long 0x00 "PI,Ports Implemented Register" bitfld.long 0x00 31. " PI[31] ,Port 31 implemented" "Not implemented,Implemented" bitfld.long 0x00 30. " [30] ,Port 30 implemented" "Not implemented,Implemented" bitfld.long 0x00 29. " [29] ,Port 29 implemented" "Not implemented,Implemented" bitfld.long 0x00 28. " [28] ,Port 28 implemented" "Not implemented,Implemented" textline " " bitfld.long 0x00 27. " [27] ,Port 27 implemented" "Not implemented,Implemented" bitfld.long 0x00 26. " [26] ,Port 26 implemented" "Not implemented,Implemented" bitfld.long 0x00 25. " [25] ,Port 25 implemented" "Not implemented,Implemented" bitfld.long 0x00 24. " [24] ,Port 24 implemented" "Not implemented,Implemented" textline " " bitfld.long 0x00 23. " [23] ,Port 23 implemented" "Not implemented,Implemented" bitfld.long 0x00 22. " [22] ,Port 22 implemented" "Not implemented,Implemented" bitfld.long 0x00 21. " [21] ,Port 21 implemented" "Not implemented,Implemented" bitfld.long 0x00 20. " [20] ,Port 20 implemented" "Not implemented,Implemented" textline " " bitfld.long 0x00 19. " [19] ,Port 19 implemented" "Not implemented,Implemented" bitfld.long 0x00 18. " [18] ,Port 18 implemented" "Not implemented,Implemented" bitfld.long 0x00 17. " [17] ,Port 17 implemented" "Not implemented,Implemented" bitfld.long 0x00 16. " [16] ,Port 16 implemented" "Not implemented,Implemented" textline " " bitfld.long 0x00 15. " [15] ,Port 15 implemented" "Not implemented,Implemented" bitfld.long 0x00 14. " [14] ,Port 14 implemented" "Not implemented,Implemented" bitfld.long 0x00 13. " [13] ,Port 13 implemented" "Not implemented,Implemented" bitfld.long 0x00 12. " [12] ,Port 12 implemented" "Not implemented,Implemented" textline " " bitfld.long 0x00 11. " [11] ,Port 11 implemented" "Not implemented,Implemented" bitfld.long 0x00 10. " [10] ,Port 10 implemented" "Not implemented,Implemented" bitfld.long 0x00 9. " [9] ,Port 9 implemented" "Not implemented,Implemented" bitfld.long 0x00 8. " [8] ,Port 8 implemented" "Not implemented,Implemented" textline " " bitfld.long 0x00 7. " [7] ,Port 7 implemented" "Not implemented,Implemented" bitfld.long 0x00 6. " [6] ,Port 6 implemented" "Not implemented,Implemented" bitfld.long 0x00 5. " [5] ,Port 5 implemented" "Not implemented,Implemented" bitfld.long 0x00 4. " [4] ,Port 4 implemented" "Not implemented,Implemented" textline " " bitfld.long 0x00 3. " [3] ,Port 3 implemented" "Not implemented,Implemented" bitfld.long 0x00 2. " [2] ,Port 2 implemented" "Not implemented,Implemented" bitfld.long 0x00 1. " [1] ,Port 1 implemented" "Not implemented,Implemented" bitfld.long 0x00 0. " [0] ,Port 0 implemented" "Not implemented,Implemented" line.long 0x04 "VS,AHCI Version Register" hexmask.long.word 0x04 16.--31. 1. " MJR ,Major version number" hexmask.long.word 0x04 0.--15. 1. " MNR ,Minor version number" group.long 0x14++0x07 line.long 0x00 "CCC_CTL,Command Completion Coalescing Control Register" hexmask.long.word 0x00 16.--31. 1. " TV ,Timeout value" hexmask.long.byte 0x00 8.--15. 1. " CC ,Command completions" rbitfld.long 0x00 3.--7. " INT ,Interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" line.long 0x04 "CCC_PORTS,Command Completion Coalescing Ports Register" bitfld.long 0x04 31. " PRT[31] ,Port 31" "Not included,Included" bitfld.long 0x04 30. " [30] ,Port 30" "Not included,Included" bitfld.long 0x04 29. " [29] ,Port 29" "Not included,Included" bitfld.long 0x04 28. " [28] ,Port 28" "Not included,Included" textline " " bitfld.long 0x04 27. " [27] ,Port 27" "Not included,Included" bitfld.long 0x04 26. " [26] ,Port 26" "Not included,Included" bitfld.long 0x04 25. " [25] ,Port 25" "Not included,Included" bitfld.long 0x04 24. " [24] ,Port 24" "Not included,Included" textline " " bitfld.long 0x04 23. " [23] ,Port 23" "Not included,Included" bitfld.long 0x04 22. " [22] ,Port 22" "Not included,Included" bitfld.long 0x04 21. " [21] ,Port 21" "Not included,Included" bitfld.long 0x04 20. " [20] ,Port 20" "Not included,Included" textline " " bitfld.long 0x04 19. " [19] ,Port 19" "Not included,Included" bitfld.long 0x04 18. " [18] ,Port 18" "Not included,Included" bitfld.long 0x04 17. " [17] ,Port 17" "Not included,Included" bitfld.long 0x04 16. " [16] ,Port 16" "Not included,Included" textline " " bitfld.long 0x04 15. " [15] ,Port 15" "Not included,Included" bitfld.long 0x04 14. " [14] ,Port 14" "Not included,Included" bitfld.long 0x04 13. " [13] ,Port 13" "Not included,Included" bitfld.long 0x04 12. " [12] ,Port 12" "Not included,Included" textline " " bitfld.long 0x04 11. " [11] ,Port 11" "Not included,Included" bitfld.long 0x04 10. " [10] ,Port 10" "Not included,Included" bitfld.long 0x04 9. " [9] ,Port 9" "Not included,Included" bitfld.long 0x04 8. " [8] ,Port 8" "Not included,Included" textline " " bitfld.long 0x04 7. " [7] ,Port 7" "Not included,Included" bitfld.long 0x04 6. " [6] ,Port 6" "Not included,Included" bitfld.long 0x04 5. " [5] ,Port 5" "Not included,Included" bitfld.long 0x04 4. " [4] ,Port 4" "Not included,Included" textline " " bitfld.long 0x04 3. " [3] ,Port 3" "Not included,Included" bitfld.long 0x04 2. " [2] ,Port 2" "Not included,Included" bitfld.long 0x04 1. " [1] ,Port 1" "Not included,Included" bitfld.long 0x04 0. " [0] ,Port 0" "Not included,Included" rgroup.long 0x1C++0x03 line.long 0x00 "EM_LOC,Enclosure Management Location Register" hexmask.long.word 0x00 16.--31. 1. " OFST ,Offset" hexmask.long.word 0x00 0.--15. 1. " SZ ,Buffer size" group.long 0x20++0x03 line.long 0x00 "EM_CTL,Enclosure Management Control Register" rbitfld.long 0x00 27. " ATTR_PM ,Port multiplier support" "Not supported,Supported" rbitfld.long 0x00 26. " ATTR_ALHD ,Activity LED hardware driven" "Not driven,Driven" rbitfld.long 0x00 25. " ATTR_XMT ,Transmit only" "Disabled,Enabled" rbitfld.long 0x00 24. " ATTR_SMB ,Single message buffer" "Disabled,Enabled" textline " " rbitfld.long 0x00 19. " SUPP_SGPIO ,SGPIO enclosure management messages" "Not supported,Supported" rbitfld.long 0x00 18. " SUPP_SES2 ,SES-2 enclosure management messages" "Not supported,Supported" rbitfld.long 0x00 17. " SUPP_SAFTE ,SAF-TE enclosure management messages" "Not supported,Supported" rbitfld.long 0x00 16. " SUPP_LED ,LED message types" "Not supported,Supported" textline " " bitfld.long 0x00 9. " CTL_RST ,Reset" "No reset,Reset" bitfld.long 0x00 8. " CTL_TM ,Transmit message" "No effect,Transmission" eventfld.long 0x00 0. " STS_MR ,Message received" "Not received,Received" rgroup.long 0x24++0x03 line.long 0x00 "CAP2,HBA Capabilities Extended Register" bitfld.long 0x00 5. " DESO ,DevSleep entrance from slumber only" "Disabled,Enabled" bitfld.long 0x00 4. " SADM ,Supports aggressive device sleep management" "Not supported,Supported" bitfld.long 0x00 3. " SDS ,Supports device sleep" "Not supported,Supported" bitfld.long 0x00 2. " APST ,Automatic partial to slumber transitions" "Not supported,Supported" textline " " bitfld.long 0x00 1. " NVMP ,NVMHCI present" "Not present,Present" bitfld.long 0x00 0. " BOH ,BIOS/OS handoff" "Not supported,Supported" group.long 0x28++0x03 line.long 0x00 "BOHC,BIOS/OS Handoff Control And Status Register" bitfld.long 0x00 4. " BB ,BIOS busy" "Not busy,Busy" eventfld.long 0x00 3. " OOC ,OS ownership change" "Not changed,Changed" bitfld.long 0x00 2. " SOOE ,SMI on OS ownership change enable" "Disabled,Enabled" bitfld.long 0x00 1. " OOS ,OS owned semaphore" "Not requested,Requested" textline " " bitfld.long 0x00 0. " BOS ,BIOS owned semaphore" "Not requested,Requested" width 0x0B tree.end tree "SATA_AHCI_PORT0_CNTRL" base ad:0xFD0C0100 width 11. group.long 0x00++0x1B line.long 0x00 "P$1CLB,Port $1 Command List Base Address Register" hexmask.long.tbyte 0x00 10.--31. 0x04 " CLB ,Command list base address" line.long 0x04 "P$1CLBU,Port $1 Command List Base Address Upper 32-bits Register" line.long 0x08 "P$1FB,Port $1 FIS Base Address Register" hexmask.long.tbyte 0x08 8.--31. 0x01 " FB ,FIS base address" line.long 0x0C "P$1FBU,Port $1 FIS Base Address Upper 32-bits Register" line.long 0x10 "P$1IS,Port $1 Interrupt Status Register" eventfld.long 0x10 31. " CPDS ,Cold port detect status" "No interrupt,Interrupt" eventfld.long 0x10 30. " TFES ,Task file error status" "No interrupt,Interrupt" eventfld.long 0x10 29. " HBFS ,Host bus fatal error status" "No interrupt,Interrupt" eventfld.long 0x10 28. " HBDS ,Host bus data error status" "No interrupt,Interrupt" textline " " eventfld.long 0x10 27. " IFS ,Interface fatal error status" "No interrupt,Interrupt" eventfld.long 0x10 26. " INFS ,Interface Non-fatal error status" "No interrupt,Interrupt" eventfld.long 0x10 24. " OFS ,Overflow status" "No interrupt,Interrupt" eventfld.long 0x10 23. " IPMS ,Incorrect port multiplier status" "No interrupt,Interrupt" textline " " rbitfld.long 0x10 22. " PRCS ,PhyRdy change status" "No interrupt,Interrupt" eventfld.long 0x10 7. " DMPS ,Device mechanical presence status" "No interrupt,Interrupt" rbitfld.long 0x10 6. " PCS ,Port connect change status" "No interrupt,Interrupt" eventfld.long 0x10 5. " DPS ,Descriptor processed" "No interrupt,Interrupt" textline " " rbitfld.long 0x10 4. " UFS ,Unknown FIS interrupt" "No interrupt,Interrupt" eventfld.long 0x10 3. " SDBS ,Set device bits interrupt" "No interrupt,Interrupt" eventfld.long 0x10 2. " DSS ,DMA setup FIS interrupt" "No interrupt,Interrupt" eventfld.long 0x10 1. " PSS ,PIO setup FIS interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x10 0. " DHRS ,Device to host register FIS interrupt" "No interrupt,Interrupt" line.long 0x14 "P$1IE,Port $1 Interrupt Enable Register" bitfld.long 0x14 31. " CPDE ,Cold presence detect enable" "Disabled,Enabled" bitfld.long 0x14 30. " TFEE ,Task file error enable" "Disabled,Enabled" bitfld.long 0x14 29. " HBFE ,Host bus fatal error enable" "Disabled,Enabled" bitfld.long 0x14 28. " HBDE ,Host bus data error enable" "Disabled,Enabled" textline " " bitfld.long 0x14 27. " IFE ,Interface fatal error enable" "Disabled,Enabled" bitfld.long 0x14 26. " INFE ,Interface Non-fatal error enable" "Disabled,Enabled" bitfld.long 0x14 24. " OFE ,Overflow enable" "Disabled,Enabled" bitfld.long 0x14 23. " IPME ,Incorrect port multiplier enable" "Disabled,Enabled" textline " " bitfld.long 0x14 22. " PRCE ,PhyRdy change interrupt enable" "Disabled,Enabled" bitfld.long 0x14 7. " DMPE ,Device mechanical presence enable" "Disabled,Enabled" bitfld.long 0x14 6. " PCE ,Port change interrupt enable" "Disabled,Enabled" bitfld.long 0x14 5. " DPE ,Descriptor processed interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x14 4. " UFE ,Unknown FIS interrupt enable" "Disabled,Enabled" bitfld.long 0x14 3. " SDBE ,Set device bits FIS interrupt enable" "Disabled,Enabled" bitfld.long 0x14 2. " DSE ,DMA setup FIS interrupt enable" "Disabled,Enabled" bitfld.long 0x14 1. " PSE ,PIO setup FIS interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x14 0. " DHRE ,Device to host register FIS interrupt enable" "Disabled,Enabled" line.long 0x18 "P$1CMD,Port $1 Command And Status Register" bitfld.long 0x18 28.--31. " ICC ,Interface communication control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 27. " ASP ,Aggressive slumber / partial" "Partial,Slumber" bitfld.long 0x18 26. " ALPE ,Aggressive link power management enable" "Disabled,Enabled" bitfld.long 0x18 25. " DLAE ,Drive LED on ATAPI enable" "Disabled,Enabled" textline " " bitfld.long 0x18 24. " ATAPI ,Device is ATAPI" "False,True" bitfld.long 0x18 23. " APSTE ,Automatic partial to slumber transitions enabled" "Disabled,Enabled" rbitfld.long 0x18 22. " FBSCP ,FIS-based switching capable port" "Not capable,Capable" rbitfld.long 0x18 21. " ESP ,External SATA port" "Not supported,Supported" textline " " rbitfld.long 0x18 20. " CPD ,Cold presence detection" "Not supported,Supported" rbitfld.long 0x18 19. " MPSP ,Mechanical presence switch attached to port" "Not supported,Supported" rbitfld.long 0x18 18. " HPCP ,Hot plug capable port" "Not capable,Capable" bitfld.long 0x18 17. " PMA ,Port multiplier attached" "Not attached,Attached" textline " " rbitfld.long 0x18 16. " CPS ,Cold presence state" "Not present,Present" rbitfld.long 0x18 15. " CR ,Command list running" "Not running,Running" rbitfld.long 0x18 14. " FR ,FIS receive running" "Not running,Running" rbitfld.long 0x18 13. " MPSS ,Mechanical presence switch state" "Closed,Open" textline " " rbitfld.long 0x18 8.--12. " CCS ,Current command slot" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x18 4. " FRE ,FIS receive enable" "Disabled,Enabled" bitfld.long 0x18 3. " CLO ,Command list override" "No effect,Override" rbitfld.long 0x18 2. " POD ,Power on device" "Disabled,Enabled" textline " " rbitfld.long 0x18 1. " SUD ,Spin-Up device" "Not started,Started" bitfld.long 0x18 0. " ST ,Start" "No start,Start" rgroup.long 0x20++0x0B line.long 0x00 "P$1TFD,Port $1 Task File Data Register" hexmask.long.byte 0x00 8.--15. 1. " ERR ,The latest copy of the task file error register" bitfld.long 0x00 7. " STS_BSY ,Indicates the interface is busy" "Not busy,Busy" bitfld.long 0x00 4.--6. " STS_CS1 ,Command specific" "0,1,2,3,4,5,6,7" bitfld.long 0x00 3. " STS_DRQ ,Indicates a data transfer is requested" "Not requested,Requested" textline " " bitfld.long 0x00 1.--2. " STS_CS ,Command specific" "0,1,2,3" bitfld.long 0x00 0. " STS_ERR ,Indicates an error during the transfer" "No error,Error" line.long 0x04 "P$1SIG,Port $1 Signature Register" hexmask.long.byte 0x04 24.--31. 1. " SIG_HI ,LBA high" hexmask.long.byte 0x04 16.--23. 1. " SIG_MID ,LBA mid" hexmask.long.byte 0x04 8.--15. 1. " SIG_LOW ,LBA low" hexmask.long.byte 0x04 0.--7. 1. " SIG_SC ,Sector count" line.long 0x08 "P$1SSTS,Port $1 Serial ATA Status Register" bitfld.long 0x08 8.--11. " IPM ,Interface power management" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 4.--7. " SPD ,Current interface speed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--3. " DET ,Device detection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x2C++0x1B line.long 0x00 "P$1SCTL,Port $1 Serial ATA Control Register" rbitfld.long 0x00 16.--19. " PMP ,Port multiplier port" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x00 12.--15. " SPM ,Interface power management transitions allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " IPM ,Interface power management" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " SPD ,Speed allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 0.--3. " DET ,Device detection initialization" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "P$1SERR,Port $1 Serial ATA Error Register" eventfld.long 0x04 26. " DIAG_X ,Exchanged" "Not changed,Changed" eventfld.long 0x04 25. " DIAG_F ,Unknown FIS type" "No error,Error" eventfld.long 0x04 24. " DIAG_T ,Transport state transition error" "No error,Error" eventfld.long 0x04 23. " DIAG_S ,Link sequence error" "No error,Error" textline " " eventfld.long 0x04 22. " DIAG_H ,Handshake error" "No error,Error" eventfld.long 0x04 21. " DIAG_C ,CRC error" "No error,Error" eventfld.long 0x04 20. " DIAG_D ,Disparity error" "No error,Error" eventfld.long 0x04 19. " DIAG_B ,10B to 8B decode error" "No error,Error" textline " " eventfld.long 0x04 18. " DIAG_W ,Comm wake" "Not detected,Detected" eventfld.long 0x04 17. " DIAG_I ,Phy internal error" "No error,Error" eventfld.long 0x04 16. " DIAG_N ,PhyRdy change" "Not changed,Changed" eventfld.long 0x04 11. " ERR_E ,Internal error" "No error,Error" textline " " eventfld.long 0x04 10. " ERR_P ,Protocol error" "No error,Error" eventfld.long 0x04 9. " ERR_C ,Persistent communication or data integrity error" "No error,Error" eventfld.long 0x04 8. " ERR_T ,Transient data integrity error" "No error,Error" eventfld.long 0x04 1. " ERR_M ,Recovered communications error" "No error,Error" textline " " eventfld.long 0x04 0. " ERR_I ,Recovered data integrity error" "No error,Error" line.long 0x08 "P$1SACT,Port $1 Serial ATA Active Register" bitfld.long 0x08 31. " DS[31] ,Port 31 active status" "Not active,Active" bitfld.long 0x08 30. " [30] ,Port 30 active status" "Not active,Active" bitfld.long 0x08 29. " [29] ,Port 29 active status" "Not active,Active" bitfld.long 0x08 28. " [28] ,Port 28 active status" "Not active,Active" textline " " bitfld.long 0x08 27. " [27] ,Port 27 active status" "Not active,Active" bitfld.long 0x08 26. " [26] ,Port 26 active status" "Not active,Active" bitfld.long 0x08 25. " [25] ,Port 25 active status" "Not active,Active" bitfld.long 0x08 24. " [24] ,Port 24 active status" "Not active,Active" textline " " bitfld.long 0x08 23. " [23] ,Port 23 active status" "Not active,Active" bitfld.long 0x08 22. " [22] ,Port 22 active status" "Not active,Active" bitfld.long 0x08 21. " [21] ,Port 21 active status" "Not active,Active" bitfld.long 0x08 20. " [20] ,Port 20 active status" "Not active,Active" textline " " bitfld.long 0x08 19. " [19] ,Port 19 active status" "Not active,Active" bitfld.long 0x08 18. " [18] ,Port 18 active status" "Not active,Active" bitfld.long 0x08 17. " [17] ,Port 17 active status" "Not active,Active" bitfld.long 0x08 16. " [16] ,Port 16 active status" "Not active,Active" textline " " bitfld.long 0x08 15. " [15] ,Port 15 active status" "Not active,Active" bitfld.long 0x08 14. " [14] ,Port 14 active status" "Not active,Active" bitfld.long 0x08 13. " [13] ,Port 13 active status" "Not active,Active" bitfld.long 0x08 12. " [12] ,Port 12 active status" "Not active,Active" textline " " bitfld.long 0x08 11. " [11] ,Port 11 active status" "Not active,Active" bitfld.long 0x08 10. " [10] ,Port 10 active status" "Not active,Active" bitfld.long 0x08 9. " [9] ,Port 9 active status" "Not active,Active" bitfld.long 0x08 8. " [8] ,Port 8 active status" "Not active,Active" textline " " bitfld.long 0x08 7. " [7] ,Port 7 active status" "Not active,Active" bitfld.long 0x08 6. " [6] ,Port 6 active status" "Not active,Active" bitfld.long 0x08 5. " [5] ,Port 5 active status" "Not active,Active" bitfld.long 0x08 4. " [4] ,Port 4 active status" "Not active,Active" textline " " bitfld.long 0x08 3. " [3] ,Port 3 active status" "Not active,Active" bitfld.long 0x08 2. " [2] ,Port 2 active status" "Not active,Active" bitfld.long 0x08 1. " [1] ,Port 1 active status" "Not active,Active" bitfld.long 0x08 0. " [0] ,Port 0 active status" "Not active,Active" line.long 0x0C "P$1CI,Port $1 Command Issue Register" bitfld.long 0x0C 31. " DS[31] ,Port 31 command issue" "Not issued,Issued" bitfld.long 0x0C 30. " [30] ,Port 30 command issue" "Not issued,Issued" bitfld.long 0x0C 29. " [29] ,Port 29 command issue" "Not issued,Issued" bitfld.long 0x0C 28. " [28] ,Port 28 command issue" "Not issued,Issued" textline " " bitfld.long 0x0C 27. " [27] ,Port 27 command issue" "Not issued,Issued" bitfld.long 0x0C 26. " [26] ,Port 26 command issue" "Not issued,Issued" bitfld.long 0x0C 25. " [25] ,Port 25 command issue" "Not issued,Issued" bitfld.long 0x0C 24. " [24] ,Port 24 command issue" "Not issued,Issued" textline " " bitfld.long 0x0C 23. " [23] ,Port 23 command issue" "Not issued,Issued" bitfld.long 0x0C 22. " [22] ,Port 22 command issue" "Not issued,Issued" bitfld.long 0x0C 21. " [21] ,Port 21 command issue" "Not issued,Issued" bitfld.long 0x0C 20. " [20] ,Port 20 command issue" "Not issued,Issued" textline " " bitfld.long 0x0C 19. " [19] ,Port 19 command issue" "Not issued,Issued" bitfld.long 0x0C 18. " [18] ,Port 18 command issue" "Not issued,Issued" bitfld.long 0x0C 17. " [17] ,Port 17 command issue" "Not issued,Issued" bitfld.long 0x0C 16. " [16] ,Port 16 command issue" "Not issued,Issued" textline " " bitfld.long 0x0C 15. " [15] ,Port 15 command issue" "Not issued,Issued" bitfld.long 0x0C 14. " [14] ,Port 14 command issue" "Not issued,Issued" bitfld.long 0x0C 13. " [13] ,Port 13 command issue" "Not issued,Issued" bitfld.long 0x0C 12. " [12] ,Port 12 command issue" "Not issued,Issued" textline " " bitfld.long 0x0C 11. " [11] ,Port 11 command issue" "Not issued,Issued" bitfld.long 0x0C 10. " [10] ,Port 10 command issue" "Not issued,Issued" bitfld.long 0x0C 9. " [9] ,Port 9 command issue" "Not issued,Issued" bitfld.long 0x0C 8. " [8] ,Port 8 command issue" "Not issued,Issued" textline " " bitfld.long 0x0C 7. " [7] ,Port 7 command issue" "Not issued,Issued" bitfld.long 0x0C 6. " [6] ,Port 6 command issue" "Not issued,Issued" bitfld.long 0x0C 5. " [5] ,Port 5 command issue" "Not issued,Issued" bitfld.long 0x0C 4. " [4] ,Port 4 command issue" "Not issued,Issued" textline " " bitfld.long 0x0C 3. " [3] ,Port 3 command issue" "Not issued,Issued" bitfld.long 0x0C 2. " [2] ,Port 2 command issue" "Not issued,Issued" bitfld.long 0x0C 1. " [1] ,Port 1 command issue" "Not issued,Issued" bitfld.long 0x0C 0. " [0] ,Port 0 command issue" "Not issued,Issued" line.long 0x10 "P$1SNTF,Port $1 Serial ATA Notification Register" eventfld.long 0x10 15. " PMN[15] ,PM port 15 notification" "Not issued,Issued" eventfld.long 0x10 14. " [14] ,PM port 14 notification" "Not issued,Issued" eventfld.long 0x10 13. " [13] ,PM port 13 notification" "Not issued,Issued" eventfld.long 0x10 12. " [12] ,PM port 12 notification" "Not issued,Issued" textline " " eventfld.long 0x10 11. " [11] ,PM port 11 notification" "Not issued,Issued" eventfld.long 0x10 10. " [10] ,PM port 10 notification" "Not issued,Issued" eventfld.long 0x10 9. " [9] ,PM port 9 notification" "Not issued,Issued" eventfld.long 0x10 8. " [8] ,PM port 8 notification" "Not issued,Issued" textline " " eventfld.long 0x10 7. " [7] ,PM port 7 notification" "Not issued,Issued" eventfld.long 0x10 6. " [6] ,PM port 6 notification" "Not issued,Issued" eventfld.long 0x10 5. " [5] ,PM port 5 notification" "Not issued,Issued" eventfld.long 0x10 4. " [4] ,PM port 4 notification" "Not issued,Issued" textline " " eventfld.long 0x10 3. " [3] ,PM port 3 notification" "Not issued,Issued" eventfld.long 0x10 2. " [2] ,PM port 2 notification" "Not issued,Issued" eventfld.long 0x10 1. " [1] ,PM port 1 notification" "Not issued,Issued" eventfld.long 0x10 0. " [0] ,PM port 0 notification" "Not issued,Issued" line.long 0x14 "P$1FBS,Port $1 FIS-based Switching Control Register" rbitfld.long 0x14 16.--19. " DWE ,Device with error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x14 12.--15. " ADO ,Active device optimization" ",,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x14 8.--11. " DEV ,Device to issue" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x14 2. " SDE ,Single device error" "No error,Error" textline " " bitfld.long 0x14 1. " DEC ,Device error clear" "No effect,Clear" bitfld.long 0x14 0. " EN ,Enable" "Disabled,Enabled" line.long 0x18 "P$1DEVSLP,Port $1 Device Sleep Register" rbitfld.long 0x18 25.--28. " DM ,DITO multiplier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x18 15.--24. 1. " DITO ,Device sleep idle timeout" bitfld.long 0x18 10.--14. " MDAT ,Minimum device sleep assertion time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x18 2.--9. 1. " DETO ,Device sleep exit timeout" textline " " rbitfld.long 0x18 1. " DSP ,Device sleep present" "Not supported,Supported" bitfld.long 0x18 0. " ADSE ,Aggressive device sleep enable" "Disabled,Enabled" group.long 0x70++0x03 line.long 0x00 "P$1PBERR,Port $1 BIST Error Register" eventfld.long 0x00 1. " BEOS ,BIST error one shot bit" "No error,Error" bitfld.long 0x00 0. " BERR ,BIST error" "No error,Error" rgroup.long 0x74++0x03 line.long 0x00 "P$1CMDS,Port $1 Command Status Error Register" bitfld.long 0x00 8.--11. " CQMS ,Command queue machine state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x00 0.--7. 1. " CS ,Command state" width 0x0B tree.end tree "SATA_AHCI_PORT1_CNTRL" base ad:0xFD0C0180 width 11. group.long 0x00++0x1B line.long 0x00 "P$1CLB,Port $1 Command List Base Address Register" hexmask.long.tbyte 0x00 10.--31. 0x04 " CLB ,Command list base address" line.long 0x04 "P$1CLBU,Port $1 Command List Base Address Upper 32-bits Register" line.long 0x08 "P$1FB,Port $1 FIS Base Address Register" hexmask.long.tbyte 0x08 8.--31. 0x01 " FB ,FIS base address" line.long 0x0C "P$1FBU,Port $1 FIS Base Address Upper 32-bits Register" line.long 0x10 "P$1IS,Port $1 Interrupt Status Register" eventfld.long 0x10 31. " CPDS ,Cold port detect status" "No interrupt,Interrupt" eventfld.long 0x10 30. " TFES ,Task file error status" "No interrupt,Interrupt" eventfld.long 0x10 29. " HBFS ,Host bus fatal error status" "No interrupt,Interrupt" eventfld.long 0x10 28. " HBDS ,Host bus data error status" "No interrupt,Interrupt" textline " " eventfld.long 0x10 27. " IFS ,Interface fatal error status" "No interrupt,Interrupt" eventfld.long 0x10 26. " INFS ,Interface Non-fatal error status" "No interrupt,Interrupt" eventfld.long 0x10 24. " OFS ,Overflow status" "No interrupt,Interrupt" eventfld.long 0x10 23. " IPMS ,Incorrect port multiplier status" "No interrupt,Interrupt" textline " " rbitfld.long 0x10 22. " PRCS ,PhyRdy change status" "No interrupt,Interrupt" eventfld.long 0x10 7. " DMPS ,Device mechanical presence status" "No interrupt,Interrupt" rbitfld.long 0x10 6. " PCS ,Port connect change status" "No interrupt,Interrupt" eventfld.long 0x10 5. " DPS ,Descriptor processed" "No interrupt,Interrupt" textline " " rbitfld.long 0x10 4. " UFS ,Unknown FIS interrupt" "No interrupt,Interrupt" eventfld.long 0x10 3. " SDBS ,Set device bits interrupt" "No interrupt,Interrupt" eventfld.long 0x10 2. " DSS ,DMA setup FIS interrupt" "No interrupt,Interrupt" eventfld.long 0x10 1. " PSS ,PIO setup FIS interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x10 0. " DHRS ,Device to host register FIS interrupt" "No interrupt,Interrupt" line.long 0x14 "P$1IE,Port $1 Interrupt Enable Register" bitfld.long 0x14 31. " CPDE ,Cold presence detect enable" "Disabled,Enabled" bitfld.long 0x14 30. " TFEE ,Task file error enable" "Disabled,Enabled" bitfld.long 0x14 29. " HBFE ,Host bus fatal error enable" "Disabled,Enabled" bitfld.long 0x14 28. " HBDE ,Host bus data error enable" "Disabled,Enabled" textline " " bitfld.long 0x14 27. " IFE ,Interface fatal error enable" "Disabled,Enabled" bitfld.long 0x14 26. " INFE ,Interface Non-fatal error enable" "Disabled,Enabled" bitfld.long 0x14 24. " OFE ,Overflow enable" "Disabled,Enabled" bitfld.long 0x14 23. " IPME ,Incorrect port multiplier enable" "Disabled,Enabled" textline " " bitfld.long 0x14 22. " PRCE ,PhyRdy change interrupt enable" "Disabled,Enabled" bitfld.long 0x14 7. " DMPE ,Device mechanical presence enable" "Disabled,Enabled" bitfld.long 0x14 6. " PCE ,Port change interrupt enable" "Disabled,Enabled" bitfld.long 0x14 5. " DPE ,Descriptor processed interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x14 4. " UFE ,Unknown FIS interrupt enable" "Disabled,Enabled" bitfld.long 0x14 3. " SDBE ,Set device bits FIS interrupt enable" "Disabled,Enabled" bitfld.long 0x14 2. " DSE ,DMA setup FIS interrupt enable" "Disabled,Enabled" bitfld.long 0x14 1. " PSE ,PIO setup FIS interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x14 0. " DHRE ,Device to host register FIS interrupt enable" "Disabled,Enabled" line.long 0x18 "P$1CMD,Port $1 Command And Status Register" bitfld.long 0x18 28.--31. " ICC ,Interface communication control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 27. " ASP ,Aggressive slumber / partial" "Partial,Slumber" bitfld.long 0x18 26. " ALPE ,Aggressive link power management enable" "Disabled,Enabled" bitfld.long 0x18 25. " DLAE ,Drive LED on ATAPI enable" "Disabled,Enabled" textline " " bitfld.long 0x18 24. " ATAPI ,Device is ATAPI" "False,True" bitfld.long 0x18 23. " APSTE ,Automatic partial to slumber transitions enabled" "Disabled,Enabled" rbitfld.long 0x18 22. " FBSCP ,FIS-based switching capable port" "Not capable,Capable" rbitfld.long 0x18 21. " ESP ,External SATA port" "Not supported,Supported" textline " " rbitfld.long 0x18 20. " CPD ,Cold presence detection" "Not supported,Supported" rbitfld.long 0x18 19. " MPSP ,Mechanical presence switch attached to port" "Not supported,Supported" rbitfld.long 0x18 18. " HPCP ,Hot plug capable port" "Not capable,Capable" bitfld.long 0x18 17. " PMA ,Port multiplier attached" "Not attached,Attached" textline " " rbitfld.long 0x18 16. " CPS ,Cold presence state" "Not present,Present" rbitfld.long 0x18 15. " CR ,Command list running" "Not running,Running" rbitfld.long 0x18 14. " FR ,FIS receive running" "Not running,Running" rbitfld.long 0x18 13. " MPSS ,Mechanical presence switch state" "Closed,Open" textline " " rbitfld.long 0x18 8.--12. " CCS ,Current command slot" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x18 4. " FRE ,FIS receive enable" "Disabled,Enabled" bitfld.long 0x18 3. " CLO ,Command list override" "No effect,Override" rbitfld.long 0x18 2. " POD ,Power on device" "Disabled,Enabled" textline " " rbitfld.long 0x18 1. " SUD ,Spin-Up device" "Not started,Started" bitfld.long 0x18 0. " ST ,Start" "No start,Start" rgroup.long 0x20++0x0B line.long 0x00 "P$1TFD,Port $1 Task File Data Register" hexmask.long.byte 0x00 8.--15. 1. " ERR ,The latest copy of the task file error register" bitfld.long 0x00 7. " STS_BSY ,Indicates the interface is busy" "Not busy,Busy" bitfld.long 0x00 4.--6. " STS_CS1 ,Command specific" "0,1,2,3,4,5,6,7" bitfld.long 0x00 3. " STS_DRQ ,Indicates a data transfer is requested" "Not requested,Requested" textline " " bitfld.long 0x00 1.--2. " STS_CS ,Command specific" "0,1,2,3" bitfld.long 0x00 0. " STS_ERR ,Indicates an error during the transfer" "No error,Error" line.long 0x04 "P$1SIG,Port $1 Signature Register" hexmask.long.byte 0x04 24.--31. 1. " SIG_HI ,LBA high" hexmask.long.byte 0x04 16.--23. 1. " SIG_MID ,LBA mid" hexmask.long.byte 0x04 8.--15. 1. " SIG_LOW ,LBA low" hexmask.long.byte 0x04 0.--7. 1. " SIG_SC ,Sector count" line.long 0x08 "P$1SSTS,Port $1 Serial ATA Status Register" bitfld.long 0x08 8.--11. " IPM ,Interface power management" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 4.--7. " SPD ,Current interface speed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--3. " DET ,Device detection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x2C++0x1B line.long 0x00 "P$1SCTL,Port $1 Serial ATA Control Register" rbitfld.long 0x00 16.--19. " PMP ,Port multiplier port" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x00 12.--15. " SPM ,Interface power management transitions allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " IPM ,Interface power management" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " SPD ,Speed allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 0.--3. " DET ,Device detection initialization" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "P$1SERR,Port $1 Serial ATA Error Register" eventfld.long 0x04 26. " DIAG_X ,Exchanged" "Not changed,Changed" eventfld.long 0x04 25. " DIAG_F ,Unknown FIS type" "No error,Error" eventfld.long 0x04 24. " DIAG_T ,Transport state transition error" "No error,Error" eventfld.long 0x04 23. " DIAG_S ,Link sequence error" "No error,Error" textline " " eventfld.long 0x04 22. " DIAG_H ,Handshake error" "No error,Error" eventfld.long 0x04 21. " DIAG_C ,CRC error" "No error,Error" eventfld.long 0x04 20. " DIAG_D ,Disparity error" "No error,Error" eventfld.long 0x04 19. " DIAG_B ,10B to 8B decode error" "No error,Error" textline " " eventfld.long 0x04 18. " DIAG_W ,Comm wake" "Not detected,Detected" eventfld.long 0x04 17. " DIAG_I ,Phy internal error" "No error,Error" eventfld.long 0x04 16. " DIAG_N ,PhyRdy change" "Not changed,Changed" eventfld.long 0x04 11. " ERR_E ,Internal error" "No error,Error" textline " " eventfld.long 0x04 10. " ERR_P ,Protocol error" "No error,Error" eventfld.long 0x04 9. " ERR_C ,Persistent communication or data integrity error" "No error,Error" eventfld.long 0x04 8. " ERR_T ,Transient data integrity error" "No error,Error" eventfld.long 0x04 1. " ERR_M ,Recovered communications error" "No error,Error" textline " " eventfld.long 0x04 0. " ERR_I ,Recovered data integrity error" "No error,Error" line.long 0x08 "P$1SACT,Port $1 Serial ATA Active Register" bitfld.long 0x08 31. " DS[31] ,Port 31 active status" "Not active,Active" bitfld.long 0x08 30. " [30] ,Port 30 active status" "Not active,Active" bitfld.long 0x08 29. " [29] ,Port 29 active status" "Not active,Active" bitfld.long 0x08 28. " [28] ,Port 28 active status" "Not active,Active" textline " " bitfld.long 0x08 27. " [27] ,Port 27 active status" "Not active,Active" bitfld.long 0x08 26. " [26] ,Port 26 active status" "Not active,Active" bitfld.long 0x08 25. " [25] ,Port 25 active status" "Not active,Active" bitfld.long 0x08 24. " [24] ,Port 24 active status" "Not active,Active" textline " " bitfld.long 0x08 23. " [23] ,Port 23 active status" "Not active,Active" bitfld.long 0x08 22. " [22] ,Port 22 active status" "Not active,Active" bitfld.long 0x08 21. " [21] ,Port 21 active status" "Not active,Active" bitfld.long 0x08 20. " [20] ,Port 20 active status" "Not active,Active" textline " " bitfld.long 0x08 19. " [19] ,Port 19 active status" "Not active,Active" bitfld.long 0x08 18. " [18] ,Port 18 active status" "Not active,Active" bitfld.long 0x08 17. " [17] ,Port 17 active status" "Not active,Active" bitfld.long 0x08 16. " [16] ,Port 16 active status" "Not active,Active" textline " " bitfld.long 0x08 15. " [15] ,Port 15 active status" "Not active,Active" bitfld.long 0x08 14. " [14] ,Port 14 active status" "Not active,Active" bitfld.long 0x08 13. " [13] ,Port 13 active status" "Not active,Active" bitfld.long 0x08 12. " [12] ,Port 12 active status" "Not active,Active" textline " " bitfld.long 0x08 11. " [11] ,Port 11 active status" "Not active,Active" bitfld.long 0x08 10. " [10] ,Port 10 active status" "Not active,Active" bitfld.long 0x08 9. " [9] ,Port 9 active status" "Not active,Active" bitfld.long 0x08 8. " [8] ,Port 8 active status" "Not active,Active" textline " " bitfld.long 0x08 7. " [7] ,Port 7 active status" "Not active,Active" bitfld.long 0x08 6. " [6] ,Port 6 active status" "Not active,Active" bitfld.long 0x08 5. " [5] ,Port 5 active status" "Not active,Active" bitfld.long 0x08 4. " [4] ,Port 4 active status" "Not active,Active" textline " " bitfld.long 0x08 3. " [3] ,Port 3 active status" "Not active,Active" bitfld.long 0x08 2. " [2] ,Port 2 active status" "Not active,Active" bitfld.long 0x08 1. " [1] ,Port 1 active status" "Not active,Active" bitfld.long 0x08 0. " [0] ,Port 0 active status" "Not active,Active" line.long 0x0C "P$1CI,Port $1 Command Issue Register" bitfld.long 0x0C 31. " DS[31] ,Port 31 command issue" "Not issued,Issued" bitfld.long 0x0C 30. " [30] ,Port 30 command issue" "Not issued,Issued" bitfld.long 0x0C 29. " [29] ,Port 29 command issue" "Not issued,Issued" bitfld.long 0x0C 28. " [28] ,Port 28 command issue" "Not issued,Issued" textline " " bitfld.long 0x0C 27. " [27] ,Port 27 command issue" "Not issued,Issued" bitfld.long 0x0C 26. " [26] ,Port 26 command issue" "Not issued,Issued" bitfld.long 0x0C 25. " [25] ,Port 25 command issue" "Not issued,Issued" bitfld.long 0x0C 24. " [24] ,Port 24 command issue" "Not issued,Issued" textline " " bitfld.long 0x0C 23. " [23] ,Port 23 command issue" "Not issued,Issued" bitfld.long 0x0C 22. " [22] ,Port 22 command issue" "Not issued,Issued" bitfld.long 0x0C 21. " [21] ,Port 21 command issue" "Not issued,Issued" bitfld.long 0x0C 20. " [20] ,Port 20 command issue" "Not issued,Issued" textline " " bitfld.long 0x0C 19. " [19] ,Port 19 command issue" "Not issued,Issued" bitfld.long 0x0C 18. " [18] ,Port 18 command issue" "Not issued,Issued" bitfld.long 0x0C 17. " [17] ,Port 17 command issue" "Not issued,Issued" bitfld.long 0x0C 16. " [16] ,Port 16 command issue" "Not issued,Issued" textline " " bitfld.long 0x0C 15. " [15] ,Port 15 command issue" "Not issued,Issued" bitfld.long 0x0C 14. " [14] ,Port 14 command issue" "Not issued,Issued" bitfld.long 0x0C 13. " [13] ,Port 13 command issue" "Not issued,Issued" bitfld.long 0x0C 12. " [12] ,Port 12 command issue" "Not issued,Issued" textline " " bitfld.long 0x0C 11. " [11] ,Port 11 command issue" "Not issued,Issued" bitfld.long 0x0C 10. " [10] ,Port 10 command issue" "Not issued,Issued" bitfld.long 0x0C 9. " [9] ,Port 9 command issue" "Not issued,Issued" bitfld.long 0x0C 8. " [8] ,Port 8 command issue" "Not issued,Issued" textline " " bitfld.long 0x0C 7. " [7] ,Port 7 command issue" "Not issued,Issued" bitfld.long 0x0C 6. " [6] ,Port 6 command issue" "Not issued,Issued" bitfld.long 0x0C 5. " [5] ,Port 5 command issue" "Not issued,Issued" bitfld.long 0x0C 4. " [4] ,Port 4 command issue" "Not issued,Issued" textline " " bitfld.long 0x0C 3. " [3] ,Port 3 command issue" "Not issued,Issued" bitfld.long 0x0C 2. " [2] ,Port 2 command issue" "Not issued,Issued" bitfld.long 0x0C 1. " [1] ,Port 1 command issue" "Not issued,Issued" bitfld.long 0x0C 0. " [0] ,Port 0 command issue" "Not issued,Issued" line.long 0x10 "P$1SNTF,Port $1 Serial ATA Notification Register" eventfld.long 0x10 15. " PMN[15] ,PM port 15 notification" "Not issued,Issued" eventfld.long 0x10 14. " [14] ,PM port 14 notification" "Not issued,Issued" eventfld.long 0x10 13. " [13] ,PM port 13 notification" "Not issued,Issued" eventfld.long 0x10 12. " [12] ,PM port 12 notification" "Not issued,Issued" textline " " eventfld.long 0x10 11. " [11] ,PM port 11 notification" "Not issued,Issued" eventfld.long 0x10 10. " [10] ,PM port 10 notification" "Not issued,Issued" eventfld.long 0x10 9. " [9] ,PM port 9 notification" "Not issued,Issued" eventfld.long 0x10 8. " [8] ,PM port 8 notification" "Not issued,Issued" textline " " eventfld.long 0x10 7. " [7] ,PM port 7 notification" "Not issued,Issued" eventfld.long 0x10 6. " [6] ,PM port 6 notification" "Not issued,Issued" eventfld.long 0x10 5. " [5] ,PM port 5 notification" "Not issued,Issued" eventfld.long 0x10 4. " [4] ,PM port 4 notification" "Not issued,Issued" textline " " eventfld.long 0x10 3. " [3] ,PM port 3 notification" "Not issued,Issued" eventfld.long 0x10 2. " [2] ,PM port 2 notification" "Not issued,Issued" eventfld.long 0x10 1. " [1] ,PM port 1 notification" "Not issued,Issued" eventfld.long 0x10 0. " [0] ,PM port 0 notification" "Not issued,Issued" line.long 0x14 "P$1FBS,Port $1 FIS-based Switching Control Register" rbitfld.long 0x14 16.--19. " DWE ,Device with error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x14 12.--15. " ADO ,Active device optimization" ",,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x14 8.--11. " DEV ,Device to issue" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x14 2. " SDE ,Single device error" "No error,Error" textline " " bitfld.long 0x14 1. " DEC ,Device error clear" "No effect,Clear" bitfld.long 0x14 0. " EN ,Enable" "Disabled,Enabled" line.long 0x18 "P$1DEVSLP,Port $1 Device Sleep Register" rbitfld.long 0x18 25.--28. " DM ,DITO multiplier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x18 15.--24. 1. " DITO ,Device sleep idle timeout" bitfld.long 0x18 10.--14. " MDAT ,Minimum device sleep assertion time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x18 2.--9. 1. " DETO ,Device sleep exit timeout" textline " " rbitfld.long 0x18 1. " DSP ,Device sleep present" "Not supported,Supported" bitfld.long 0x18 0. " ADSE ,Aggressive device sleep enable" "Disabled,Enabled" group.long 0x70++0x03 line.long 0x00 "P$1PBERR,Port $1 BIST Error Register" eventfld.long 0x00 1. " BEOS ,BIST error one shot bit" "No error,Error" bitfld.long 0x00 0. " BERR ,BIST error" "No error,Error" rgroup.long 0x74++0x03 line.long 0x00 "P$1CMDS,Port $1 Command Status Error Register" bitfld.long 0x00 8.--11. " CQMS ,Command queue machine state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x00 0.--7. 1. " CS ,Command state" width 0x0B tree.end tree "SATA_AHCI_VENDOR" base ad:0xFD0C00A0 width 7. group.long 0x00++0x3B line.long 0x00 "PCTRL,Port SERDES Control Register" rbitfld.long 0x00 31. " BSY ,Busy" "Not busy,Busy" bitfld.long 0x00 24. " SRI ,Read/write indicator to SERDES bus controller" "Read,Write" hexmask.long.byte 0x00 16.--23. 1. " SRWD ,SERDES read/write data" hexmask.long.word 0x00 0.--15. 1. " SAV ,SERDES address register value" line.long 0x04 "PCFG,Port Config Register" hexmask.long.byte 0x04 16.--22. 1. " TPSS ,Microsecond timer post scaler" bitfld.long 0x04 12.--14. " TPRS ,Microsecond timer pre scaler" "0,1,2,3,4,5,6,7" bitfld.long 0x04 8. " CISE ,Chained interrupt separation enabled" "Disabled,Enabled" bitfld.long 0x04 0.--5. " PAD ,Port address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x08 "PPCFG,Port PHY1CFG Register" bitfld.long 0x08 31. " ESDF ,Enable signal det filter" "Disabled,Enabled" bitfld.long 0x08 30. " ERSN ,Enable reset speed negotiation" "Disabled,Enabled" bitfld.long 0x08 29. " PSS ,PhyControl select SERDES slumber CMU during link slumber" "Disabled,Enabled" bitfld.long 0x08 28. " PSSO ,PhyControl select SERDES OOB or internally decoded OOB signaling as inputs" "Internal,SERDES" textline " " rbitfld.long 0x08 27. " STB ,Gen fixed clocks status bit" "Variable,Fixed" bitfld.long 0x08 26. " PBPNA ,PhyControl BIST pattern no aligns" "No,Yes" bitfld.long 0x08 25. " PBCE ,PhyControl BIST clear error" "No clear,Clear" bitfld.long 0x08 24. " PBPE ,PhyControl BIST pattern enable" "Disabled,Enabled" textline " " bitfld.long 0x08 21.--23. " PBPS ,PhyControl BIST pattern select" "0,1,2,3,4,5,6,7" bitfld.long 0x08 20. " FPR ,Force PHY ready" "No force,Force" bitfld.long 0x08 18. " SNR ,Speed negotiation rate" "Not fixed,Fixed to SPD" bitfld.long 0x08 17. " SNM ,Speed negotiation method" "Falling from fastest,Rising from gen1" textline " " hexmask.long.tbyte 0x08 0.--16. 1. " TTA ,Time period the controller transmits and waits for alignp during speed negotiation" line.long 0x0C "PP2C,Port PHY2CFG Register" hexmask.long.byte 0x0C 24.--31. 1. " CINMP ,COMINIT negate minimum period" hexmask.long.byte 0x0C 16.--23. 1. " CIBGN ,COMINIT burst gap nominal" hexmask.long.byte 0x0C 8.--15. 1. " CIBGMX ,COMINIT burst gap maximum" hexmask.long.byte 0x0C 0.--7. 1. " CIBGMN ,COMINIT burst gap minimum" line.long 0x10 "PP3C,Port PHY3CFG Register" hexmask.long.byte 0x10 24.--31. 1. " CWNMP ,COMWAKE negate minimum period" hexmask.long.byte 0x10 16.--23. 1. " CWBGN ,COMWAKE burst gap nominal" hexmask.long.byte 0x10 8.--15. 1. " CWBGMX ,COMWAKE burst gap maximum" hexmask.long.byte 0x10 0.--7. 1. " CWBGMN ,COMWAKE burst gap minimum" line.long 0x14 "PP4C,Port PHY4CFG Register" hexmask.long.byte 0x14 24.--31. 1. " PTST ,Partial to slumber timer value" hexmask.long.byte 0x14 16.--23. 1. " SFD ,Signal failure detection" hexmask.long.byte 0x14 8.--15. 1. " BNM ,COM burst nominal" hexmask.long.byte 0x14 0.--7. 1. " BMX ,COM burst maximum" line.long 0x18 "PP5C,Port PHY5CFG Register" hexmask.long.word 0x18 20.--31. 1. " RCT ,Rate change timer" hexmask.long.tbyte 0x18 0.--19. 1. " RIT ,Retry interval timer" line.long 0x1C "AXICC,AXI CACHE Control Register" bitfld.long 0x1C 29. " EARC ,Enable the ARCACHE" "Disabled,Enabled" bitfld.long 0x1C 24.--27. " AWCF ,Address write cache FIS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C 20.--23. " AWCD ,Address write cache data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C 16.--19. " AWCFD ,Address write cache final data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x1C 12.--15. " ARCP ,Address read cache PRD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C 8.--11. " ARCH ,Address read cache header" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C 4.--7. " ARCF ,Address read cache FIS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C 0.--3. " ARCA ,Address read cache ATAPI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x20 "PAXIC,Port AXI Config Register" bitfld.long 0x20 28. " ENZP ,Enable non zero 4MB PRD entries" "Disabled,Enabled" bitfld.long 0x20 27. " AXIPT ,AXI parity type" "Even,Odd" bitfld.long 0x20 26. " AXIPE ,AXI parity enable" "Disabled,Enabled" bitfld.long 0x20 25. " AAO ,Allow address overwrite" "Not allowed,Allowed" textline " " bitfld.long 0x20 24. " ECM ,Enable the context management" "Disabled,Enabled" bitfld.long 0x20 20.--23. " OTL ,Outstanding transfer limit" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x20 16.--19. " MARIDD ,Memory address read ID for data transfers" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x20 12.--15. " MARID ,Memory address read ID for non data transfers" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x20 8.--11. " MAWIDD ,Memory address write ID for data transfers" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x20 4.--7. " MAWID ,Memory address write ID for non data transfers" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x20 0.--1. " ADBW ,AXI data bus width" "0,1,2,3" line.long 0x24 "AXIPC,AXI PROT Control Register" bitfld.long 0x24 29. " EARP ,Enable the ARPROT" "Disabled,Enabled" bitfld.long 0x24 28. " EAWP ,Enable the AWPROT" "Disabled,Enabled" bitfld.long 0x24 24.--26. " AWPF ,Address write prot FIS" "0,1,2,3,4,5,6,7" bitfld.long 0x24 20.--22. " AWPD ,Address write prot data" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x24 16.--18. " AWPFD ,Address write prot final data" "0,1,2,3,4,5,6,7" bitfld.long 0x24 12.--14. " ARPP ,Address read prot PRD" "0,1,2,3,4,5,6,7" bitfld.long 0x24 8.--10. " ARPH ,Address read prot header" "0,1,2,3,4,5,6,7" bitfld.long 0x24 4.--6. " ARPF ,Address read prot FIS" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x24 0.--2. " ARPD ,Address read prot data" "0,1,2,3,4,5,6,7" line.long 0x28 "PTC,Port Trans Config Register" bitfld.long 0x28 9. " ITM ,Initialise transport memories" "Zeroing,Reset" bitfld.long 0x28 8. " ENBD ,Enable back down" "Disabled,Enabled" hexmask.long.byte 0x28 0.--6. 1. " RXWM ,RxWaterMark" line.long 0x2C "PTS,Port Trans Status Register" bitfld.long 0x2C 4.--8. " TXSM ,Tx state machine" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x2C 0.--3. " RXSM ,Rx state machine" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x30 "PLC,Port Link Config Register" bitfld.long 0x30 27.--31. " PMPRA ,Power management primitive rate acknowledge" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x30 26. " POE ,Primitive override enable" "Disabled,Enabled" hexmask.long.word 0x30 16.--25. 1. " PRT ,Phy ready timer" hexmask.long.byte 0x30 8.--15. 1. " AIR ,Align insertion rate" textline " " bitfld.long 0x30 7. " EPNRT ,Enable phy not ready timer" "Disabled,Enabled" bitfld.long 0x30 6. " S4A ,Send 4 aligns" "Not sent,Sent" bitfld.long 0x30 5. " RXSE ,Rx scramble enable" "Disabled,Enabled" bitfld.long 0x30 4. " TXSE ,Tx scramble enable" "Disabled,Enabled" textline " " bitfld.long 0x30 3. " TXPJ ,Tx prim junk" "Disabled,Enabled" bitfld.long 0x30 2. " TXC ,Tx cont" "Disabled,Enabled" bitfld.long 0x30 1. " RXBC ,Rx bad CRC" "Disabled,Enabled" bitfld.long 0x30 0. " TXBC ,Tx bad CRC" "Disabled,Enabled" line.long 0x34 "PLC1,Port Link Config 1 Register" bitfld.long 0x34 6. " CD ,Data character or primitive" "Data,Primitive" bitfld.long 0x34 0.--5. " POS ,Primitive override state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x38 "PLC2,Port Link Config 2 Register" rgroup.long 0x3C++0x03 line.long 0x00 "PLS,Port Link Status Register" bitfld.long 0x00 28.--31. " SVN ,SATA version" ",GEN1,GEN2,GEN3,?..." bitfld.long 0x00 24.--27. " DMB ,DMA master bus type" "AHB,AXI,?..." bitfld.long 0x00 20.--23. " DMBW ,DMA master bus width" "32-bit,64-bit,128-bit,?..." hexmask.long.byte 0x00 12.--19. 1. " SRRN ,SATA RTL revision number" textline " " bitfld.long 0x00 0.--5. " LLS ,LAT_LINK_STATE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x40++0x0B line.long 0x00 "PLS,Port Link Status 1 Register" hexmask.long.byte 0x00 24.--31. 1. " KCEC ,Kchar error count" hexmask.long.byte 0x00 16.--23. 1. " PIEC ,Phy internal error count" hexmask.long.byte 0x00 8.--15. 1. " CEC ,Code error count" hexmask.long.byte 0x00 0.--7. 1. " DEC ,Disparity error count" line.long 0x04 "PCMDC,Port CMD Config Register" bitfld.long 0x04 29. " TSVIE ,TrustZone slave ID violation interrupt enable" "Disabled,Enabled" eventfld.long 0x04 28. " TSVI ,TrustZone slave ID violation interrupt" "No interrupt,Interrupt" hexmask.long.word 0x04 12.--27. 1. " TSVT ,TrustZone slave ID of violating transaction" bitfld.long 0x04 1. " ETLL ,Enable transport layer loopback" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " ETLLB ,Enable transport layer loopback in the BIST L mode" "Disabled,Enabled" line.long 0x08 "PPCS,Port Phy Control Status Register" rbitfld.long 0x08 30.--31. " PHYCE ,Current 2 bit code error" "0,1,2,3" rbitfld.long 0x08 28.--29. " PHYDE ,Current 2 bit disparity error" "0,1,2,3" rbitfld.long 0x08 27. " PHYKC ,Current 1 bit K character" "0,1" hexmask.long.word 0x08 11.--26. 1. " PHYD ,Current 16 bit data" textline " " eventfld.long 0x08 10. " CCAC ,Comma alignment change" "Not changed,Changed" rbitfld.long 0x08 5.--9. " CCA ,Current comma alignment" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rbitfld.long 0x08 0.--4. " PCTRLS ,Phy control state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x4C++0x03 line.long 0x00 "AMS,AXI Master Status Register" bitfld.long 0x00 7.--11. " AMS1 ,AXI master state 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 2.--6. " AMS0 ,AXI master state 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 1. " WAS ,Write arbiter state" "0,1" bitfld.long 0x00 0. " RAS ,Read arbiter state" "0,1" group.long 0x50++0x03 line.long 0x00 "AMS,Timer Prescalar Value Register" hexmask.long.word 0x00 0.--12. 1. " TPS ,Timer prescalar value" width 0x0B tree.end tree.end tree "SDIO (SD3.0/SDIO3.0/MMC4.51 Host Controller)" tree "SD0" base ad:0xFF160000 width 18. group.word 0x00++0x05 line.word 0x00 "SDMASYSADDRLO,Physical System Memory Address For DMA Transfers Register (Lower 16-bits)" line.word 0x02 "SDMASYSADDRHI,Physical System Memory Address For DMA Transfers Register (Higher 16-bits)" line.word 0x04 "BLKS,Block Size Register" bitfld.word 0x04 12.--14. " SDMA_BUFBOUND ,SDMA buffer boundary" "4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB" hexmask.word 0x04 0.--11. 1. " XFER_BLCKS ,Block size for block data transfers for CMD17 CMD18 CMD24 CMD25 and CMD53" if (((d.w(ad:0xFF160000+0x0C)&0x02))==0x02) group.word 0x06++0x01 line.word 0x00 "BLCKCOUNT,Block Count Register" else hgroup.word 0x06++0x01 hide.word 0x00 "BLCKCOUNT,Block Count Register" endif group.word 0x08++0x07 line.word 0x00 "COMMAND_ARG1LO,Lower Bits Of SD Command Argument Register" line.word 0x02 "COMMAND_ARG1HI,Higher Bits Of SD Command Argument Register" line.word 0x04 "TRANSFMOD,Data Transfers Operations Control Register" bitfld.word 0x04 5. " XFERMODE_MULTIBLKSEL ,Multiple block data transfers enable" "Single block,Multiple block" bitfld.word 0x04 4. " XFERMODE_DATAXFERDIR ,Direction of data transfers" "Write Host-Card,Read Card-Host" textline " " bitfld.word 0x04 2.--3. " XFERMODE_AUTOCMDENA ,Auto command functions" "Auto command disabled,Auto CMD12 enabled,Auto CMD23 enabled,?..." bitfld.word 0x04 1. " XFERMODE_BLKCNTENA ,Block count register enable" "Disabled,Enabled" textline " " bitfld.word 0x04 0. " XFERMODE_DMAENABLE ,DMA enable" "Disabled,Enabled" line.word 0x06 "COMMAND,Program Command For Host Controller Register" bitfld.word 0x06 8.--13. " CMDINDEX ,Command number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x06 6.--7. " CMDTYPE ,Command type" "Normal,Suspend,Resume,Abort" textline " " bitfld.word 0x06 5. " DATAPRESENT ,Data present" "Not present,Present" bitfld.word 0x06 4. " INDEXCHKENA ,Index field check" "Disabled,Enabled" textline " " bitfld.word 0x06 3. " CRCCHKENA ,CRC field check" "Disabled,Enabled" bitfld.word 0x06 0.--1. " RESPONSETYPR ,Response type select" "No response,136,48,48-check busy" rgroup.word 0x10++0x01 line.word 0x00 "RESPONSE0,SD Card Response Register 0" rgroup.word 0x12++0x01 line.word 0x00 "RESPONSE1,SD Card Response Register 1" rgroup.word 0x14++0x01 line.word 0x00 "RESPONSE2,SD Card Response Register 2" rgroup.word 0x16++0x01 line.word 0x00 "RESPONSE3,SD Card Response Register 3" rgroup.word 0x18++0x01 line.word 0x00 "RESPONSE4,SD Card Response Register 4" rgroup.word 0x1A++0x01 line.word 0x00 "RESPONSE5,SD Card Response Register 5" rgroup.word 0x1C++0x01 line.word 0x00 "RESPONSE6,SD Card Response Register 6" rgroup.word 0x1E++0x01 line.word 0x00 "RESPONSE7,SD Card Response Register 7" group.long 0x20++0x03 line.long 0x00 "DATAPORT,Internal Buffer Access Register" rgroup.long 0x24++0x03 line.long 0x00 "PRESENTSTATE,Status Of The Host Controller Register" bitfld.long 0x00 28. " SDIF_DAT7IN_DSYNC ,DAT 7 status" "Low,High" bitfld.long 0x00 27. " SDIF_DAT6IN_DSYNC ,DAT 6 status" "Low,High" textline " " bitfld.long 0x00 26. " SDIF_DAT5IN_DSYNC ,DAT 5 status" "Low,High" bitfld.long 0x00 25. " SDIF_DAT4IN_DSYNC ,DAT 4 status" "Low,High" textline " " bitfld.long 0x00 24. " SDIF_CMDIN_DSYNC ,CMD status" "Low,High" bitfld.long 0x00 23. " SDIF_DAT3IN_DSYNC ,DAT 3 status" "Low,High" textline " " bitfld.long 0x00 22. " SDIF_DAT2IN_DSYNC ,DAT 2 status" "Low,High" bitfld.long 0x00 21. " SDIF_DAT1IN_DSYNC ,DAT 1 status" "Low,High" textline " " bitfld.long 0x00 20. " SDIF_DAT0IN_DSYNC ,DAT 0 status" "Low,High" bitfld.long 0x00 19. " SDIF_WP_DSYNC ,Write protect switch" "Protected,Enabled" textline " " bitfld.long 0x00 18. " SDIF_CD_N_DSYNC ,Card status" "Not presented,Presented" bitfld.long 0x00 17. " SDHCCARDDET_STATSTABL_DSYNC ,Card detect pin level" "Not stable,Stable" textline " " bitfld.long 0x00 16. " SDHCCARDDET_INSERTED_DSYNC ,SD card insert" "Not inserted,Inserted" bitfld.long 0x00 11. " SDHCDMACTRL_PIOBUFRDENA ,Non-DMA read transfers status" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " SDHCDMACTRL_PIOBUFWRENA ,Non-DMA write transfers status" "Disabled,Enabled" bitfld.long 0x00 9. " SDHCDMACTRL_RDXFERACT ,Read transfer completion status detection" "No valid data,Transferring data" textline " " bitfld.long 0x00 8. " SDHCDMACTRL_WRXFERACT ,Write transfer active status" "No valid data,Transferring data" bitfld.long 0x00 3. " SDHCSDCTRL_RETUNINGREQ_DSYNC ,Sampling clock" "Fixed/well tuned,Needs re-tuning" textline " " bitfld.long 0x00 2. " SDHCDMACTRL_DATALINEACT ,DAT line on SD bus status" "Inactive,Active" bitfld.long 0x00 1. " PRESENTSTATE_INHIBITDAT ,Present state" "Can issue,Cannot issue" textline " " bitfld.long 0x00 0. " PRESENTSTATE_INHIBITCMD ,Command inhibit" "Can issue,Cannot issue" if (((d.b(ad:0xFF160000+0x28)&0x80))==0x80)&&(((d.l(ad:0xFF160000+0x40)&0xC0000000))!=0x80000000) group.byte 0x28++0x00 line.byte 0x00 "HOSTCTRL1,Host Control 1 Register" bitfld.byte 0x00 7. " CDSIGSEL ,Card detect signal selection" "SDCD#,Test level" bitfld.byte 0x00 6. " CDTESTLEVEL ,Card test level" "No card,Card inserted" textline " " bitfld.byte 0x00 5. " EXTDATAWID ,Bus width mode control" "Data transfer width,8-bit" bitfld.byte 0x00 3.--4. " DMASEL ,DMA mode select" "SDMA,32 bit ADMA1,32 bit ADMA2,64 bit ADMA2" textline " " bitfld.byte 0x00 2. " HISPEEDENA ,High speed support enable" "Normal,High" bitfld.byte 0x00 1. " DATWID ,HC data width mode" "1-bit,4-bit" textline " " bitfld.byte 0x00 0. " LEDCTRL ,LED control" "OFF,ON" elif (((d.b(ad:0xFF160000+0x28)&0x80))==0x80)&&(((d.l(ad:0xFF160000+0x40)&0xC0000000))==0x80000000) group.byte 0x28++0x00 line.byte 0x00 "HOSTCTRL1,Host Control 1 Register" bitfld.byte 0x00 7. " CDSIGSEL ,Card detect signal selection" "SDCD#,Test level" bitfld.byte 0x00 6. " CDTESTLEVEL ,Card test level" "No card,Card inserted" textline " " textfld " " bitfld.byte 0x00 3.--4. " DMASEL ,DMA mode select" "SDMA,32 bit ADMA1,32 bit ADMA2,64 bit ADMA2" textline " " bitfld.byte 0x00 2. " HISPEEDENA ,High speed support enable" "Normal,High" bitfld.byte 0x00 1. " DATWID ,HC data width mode" "1-bit,4-bit" textline " " bitfld.byte 0x00 0. " LEDCTRL ,LED control" "OFF,ON" elif (((d.b(ad:0xFF160000+0x28)&0x80))!=0x80)&&(((d.l(ad:0xFF160000+0x40)&0xC0000000))!=0x80000000) group.byte 0x28++0x00 line.byte 0x00 "HOSTCTRL1,Host Control 1 Register" bitfld.byte 0x00 7. " CDSIGSEL ,Card detect signal selection" "SDCD#,Test level" textline " " bitfld.byte 0x00 5. " EXTDATWID ,Bus width mode control" "Data transfer width,8-bit" bitfld.byte 0x00 3.--4. " DMASEL ,DMA mode select" "SDMA,32 bit ADMA1,32 bit ADMA2,64 bit ADMA2" textline " " bitfld.byte 0x00 2. " HISPEEDENA ,High speed support enable" "Normal,High" bitfld.byte 0x00 1. " DATWID ,HC data width mode" "1-bit,4-bit" textline " " bitfld.byte 0x00 0. " LEDCTRL ,LED control" "OFF,ON" elif (((d.b(ad:0xFF160000+0x28)&0x80))!=0x80)&&(((d.l(ad:0xFF160000+0x40)&0xC0000000))==0x80000000) group.byte 0x28++0x00 line.byte 0x00 "HOSTCTRL1,Host Control 1 Register" bitfld.byte 0x00 7. " CDSIGSEL ,Card detect signal selection" "SDCD#,Test level" textline " " textfld " " bitfld.byte 0x00 3.--4. " DMASEL ,DMA mode select" "SDMA,32 bit ADMA1,32 bit ADMA2,64 bit ADMA2" textline " " bitfld.byte 0x00 2. " HISPEEDENA ,High speed support enable" "Normal,High" bitfld.byte 0x00 1. " DATWID ,HC data width mode" "1-bit,4-bit" textline " " bitfld.byte 0x00 0. " LEDCTRL ,LED control" "OFF,ON" endif group.byte 0x29++0x00 line.byte 0x00 "PWRCTRL,SD Bus Power And Voltage Level Program Register" bitfld.byte 0x00 4. " EMMC_HWRESET ,Hardware reset signal" "No reset,Reset" bitfld.byte 0x00 1.--3. " SDBUSVOLT ,SD-bus voltage level select" ",,,,,1.8V,3.0V,3.3V" textline " " bitfld.byte 0x00 0. " SDBUSPWR ,SD bus power" "OFF,ON" if (((d.b(ad:0xFF160000+0x028)&0x02))==0x02) group.byte 0x2A++0x00 line.byte 0x00 "BLGCTRL,Block Gap Control Register" bitfld.byte 0x00 7. " BACKENA ,Boot acknowledge from eMMC card" "Not wait,Wait" bitfld.byte 0x00 6. " ALTBMODE ,Boot code access in alternative mode" "Stop,Start" textline " " bitfld.byte 0x00 5. " BENABLE ,Boot code access" "Stop,Start" bitfld.byte 0x00 4. " SPIMODE ,Mode select" "SD mode,SPI mode" textline " " bitfld.byte 0x00 3. " INT ,Block gap control interrupt" "No interrupt,Interrupt" bitfld.byte 0x00 2. " RDWAITCTRL ,Read-Wait control" "Disabled,Enabled" textline " " bitfld.byte 0x00 1. " CON ,Stopped transaction restart" "Ignore,Restart" bitfld.byte 0x00 0. " STATBLKGAP ,Transaction stop at the next gap" "Transfer,Stop" else group.byte 0x2A++0x00 line.byte 0x00 "BLGCTRL,Block Gap Control Register" bitfld.byte 0x00 7. " BACKENA ,Boot acknowledge from eMMC card" "Not wait,Wait" bitfld.byte 0x00 6. " ALTBMODE ,Boot code access in alternative mode" "Stop,Start" textline " " bitfld.byte 0x00 5. " BENABLE ,Boot code access" "Stop,Start" bitfld.byte 0x00 4. " SPIMODE ,Mode select" "SD mode,SPI mode" textline " " textfld " " bitfld.byte 0x00 2. " RDWAITCTRL ,Read-Wait control" "Disabled,Enabled" textline " " bitfld.byte 0x00 1. " CON ,Stopped transaction restart" "Ignore,Restart" bitfld.byte 0x00 0. " STATBLKGAP ,Transaction stop at the next gap" "Transfer,Stop" endif group.byte 0x2B++0x00 line.byte 0x00 "WAUPCTRL,Wakeup Functionality Program Register" bitfld.byte 0x00 2. " CARDREMOVAL ,Card removal wakeup enable" "Disabled,Enabled" bitfld.byte 0x00 1. " CARDINSERT ,Card insertion wakeup enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 0. " CARDINT ,Card interrupt wakeup enable" "Disabled,Enabled" group.word 0x2C++0x01 line.word 0x00 "CLCKCTRL,Clock Control,clock Control Register" hexmask.word.byte 0x00 8.--15. 1. " SDCLKFREQSEL ,SDCLK pin frequency select" bitfld.word 0x00 6.--7. " SDCLKFREQS_UB ,SDCLK pin frequency select - upper bits" "0,1,2,3" textline " " bitfld.word 0x00 5. " CLKGENSEL ,Clock generator mode" "Divided,Programmable" bitfld.word 0x00 2. " SDCLKENA ,Clock control enable" "Disabled,Enabled" textline " " rbitfld.word 0x00 1. " SDHCCLKGE_I_DSYNC ,SD clock status" "Not ready,Ready" bitfld.word 0x00 0. " INTCLKENA ,HC status" "Stop,Oscillate" textline " " group.byte 0x2E++0x01 line.byte 0x00 "TIMEOUTCONTROL,Data Timeout Counter Value Register" bitfld.byte 0x00 0.--3. " TIMEOUT_CTRVAL ,Timeout value" "TMCLK * 2^13,TMCLK * 2^14,,,,,,,,,,,,,TMCLK * 2^27,?..." line.byte 0x01 "SOFTWARERESET,Software Reset" eventfld.byte 0x01 2. " DATA ,Software reset for data" "No reset,Reset" eventfld.byte 0x01 1. " CMMAND ,Software reset for command" "No reset,Reset" eventfld.byte 0x01 0. " ALL ,Software reset for all" "No reset,Reset" group.word 0x30++0x0B line.word 0x00 "NORMALINTRSTS,Interrupt Status Register" rbitfld.word 0x00 15. " ERRINTRSTS ,Error interrupt status" "No error,Error" eventfld.word 0x00 14. " BOOTCOMPLETE ,Boot operation terminate" "Not terminated,Terminated" eventfld.word 0x00 13. " RCVBOOTACK ,Boot acknowledge receive" "Not received,Received" textline " " rbitfld.word 0x00 12. " RETUNINGEVENT ,Re-Tuning request status" "Not required,Required" rbitfld.word 0x00 11. " INTC ,Interrupt C" "No interrupt,Interrupt" rbitfld.word 0x00 10. " INTB ,Interrupt B" "No interrupt,Interrupt" textline " " rbitfld.word 0x00 9. " INTA ,Interrupt A" "No interrupt,Interrupt" rbitfld.word 0x00 8. " CARDINTSTS ,Card interrupt" "No interrupt,Interrupt" eventfld.word 0x00 7. " CARDREMSTS ,Card remove status" "Not removed,Removed" textline " " eventfld.word 0x00 6. " CARDINSSTS ,Card insert status" "Not inserted,Inserted" eventfld.word 0x00 5. " BUFRDREADY ,Buffer read enable" "Not ready,Ready" eventfld.word 0x00 4. " BUFWRREADY ,Buffer write enable" "Not ready,Ready" textline " " eventfld.word 0x00 3. " DMAINTERRUPT ,DMA interrupt" "No interrupt,Interrupt" eventfld.word 0x00 2. " BLKGAPEVENT ,Block gap event" "Not occurred,Occurred" eventfld.word 0x00 1. " XFERCOMPLETE ,Data transfer" "Not completed,Completed" textline " " eventfld.word 0x00 0. " CMDCOMPLETE ,Command complete status" "Not completed,Completed" line.word 0x02 "ERRORINTRSTS,Error Interrupt Status Register" eventfld.word 0x02 12. " HOSTERROR ,Host error" "No error,Error" eventfld.word 0x02 9. " ADMAERROR ,ADMA transfer error" "No error,Error" eventfld.word 0x02 8. " AUTOCMDERROR ,Auto command error" "No error,Error" textline " " eventfld.word 0x02 7. " CURRLIMITERROR ,Current limit error" "No error,Error" eventfld.word 0x02 6. " DATAENDBITERROR ,Data end bit error" "No error,Error" eventfld.word 0x02 5. " DATACRCERROR ,Data CRC error" "No error,Error" textline " " eventfld.word 0x02 4. " DATATIMEOUTERROR ,Data timeout error" "No error,Error" eventfld.word 0x02 3. " CMDINDEXERROR ,CMD index error" "No error,Error" eventfld.word 0x02 2. " CMDENDBITERROR ,CMD end bit error" "No error,Error" textline " " eventfld.word 0x02 1. " CMDCRCBITERROR ,CMD CRC error" "No error,Error" eventfld.word 0x02 0. " CMDTIMEOUTERROR ,CDM timeout error" "No error,Error" textline " " line.word 0x04 "NORMALINTRSTSENA,Normal Interrupt Status Register Enable Register" rbitfld.word 0x04 15. " ENABLEREGBIT[15] ,Normal interrupt status bit 15" "Masked,Not masked" bitfld.word 0x04 14. " [14] ,Normal interrupt status bit 14" "Masked,Not masked" bitfld.word 0x04 13. " [13] ,Normal interrupt status bit 13" "Masked,Not masked" bitfld.word 0x04 12. " [12] ,Normal interrupt status bit 12" "Masked,Not masked" textline " " bitfld.word 0x04 11. " [11] ,Normal interrupt status bit 11" "Masked,Not masked" bitfld.word 0x04 10. " [10] ,Normal interrupt status bit 10" "Masked,Not masked" bitfld.word 0x04 9. " [9] ,Normal interrupt status bit 9" "Masked,Not masked" textline " " bitfld.word 0x04 8. " CARDINTSTSENA ,Card interrupt status enable" "Masked,Not masked" bitfld.word 0x04 7. " CARDREMSTSENA ,Card remove status enable" "Masked,Not masked" bitfld.word 0x04 6. " CARDINSSTSENA ,Card insert status enable" "Masked,Not masked" textline " " bitfld.word 0x04 5. " ENABLEREGBIT[5] ,Normal interrupt status bit 5" "Masked,Not masked" bitfld.word 0x04 4. " [4] ,Normal interrupt status bit 4" "Masked,Not masked" bitfld.word 0x04 3. " [3] ,Normal interrupt status bit 3" "Masked,Not masked" textline " " bitfld.word 0x04 2. " [2] ,Normal interrupt status bit 2" "Masked,Not masked" bitfld.word 0x04 1. " [1] ,Normal interrupt status bit 1" "Masked,Not masked" bitfld.word 0x04 0. " [0] ,Normal interrupt status bit 0" "Masked,Not masked" line.word 0x06 "ERRORINTRSTSENA,Error Interrupt Status Register" bitfld.word 0x06 12. " ERRINTRSTS_ENABLEREGBIT[12] ,Error interrupt status enable" "Masked,Not masked" bitfld.word 0x06 10. " [10] ,Error interrupt status enable" "Masked,Not masked" bitfld.word 0x06 9. " [9] ,Error interrupt status enable" "Masked,Not masked" bitfld.word 0x06 8. " [8] ,Error interrupt status enable" "Masked,Not masked" textline " " bitfld.word 0x06 7. " [7] ,Error interrupt status enable" "Masked,Not masked" bitfld.word 0x06 6. " [6] ,Error interrupt status enable" "Masked,Not masked" bitfld.word 0x06 5. " [5] ,Error interrupt status enable" "Masked,Not masked" bitfld.word 0x06 4. " [4] ,Error interrupt status enable" "Masked,Not masked" textline " " bitfld.word 0x06 3. " [3] ,Error interrupt status enable" "Masked,Not masked" bitfld.word 0x06 2. " [2] ,Error interrupt status enable" "Masked,Not masked" bitfld.word 0x06 1. " [1] ,Error interrupt status enable" "Masked,Not masked" bitfld.word 0x06 0. " [0] ,Error interrupt status enable" "Masked,Not masked" line.word 0x08 "NORMALINTRSIGENA,Normal Interrupt Signal Register" rbitfld.word 0x08 15. " NORMINTRSIG_ENABLEREGBIT[15] ,Normal interrupt signal bit 15" "Masked,Not masked" bitfld.word 0x08 14. " [14] ,Normal interrupt signal bit 14" "Masked,Not masked" bitfld.word 0x08 13. " [13] ,Normal interrupt signal bit 13" "Masked,Not masked" bitfld.word 0x08 12. " [12] ,Normal interrupt signal bit 12" "Masked,Not masked" textline " " bitfld.word 0x08 11. " [11] ,Normal interrupt signal bit 11" "Masked,Not masked" bitfld.word 0x08 10. " [10] ,Normal interrupt signal bit 10" "Masked,Not masked" bitfld.word 0x08 9. " [9] ,Normal interrupt signal bit 9" "Masked,Not masked" bitfld.word 0x08 8. " [8] ,Normal interrupt signal bit 8" "Masked,Not masked" textline " " bitfld.word 0x08 7. " [7] ,Normal interrupt signal bit 7" "Masked,Not masked" bitfld.word 0x08 6. " [6] ,Normal interrupt signal bit 6" "Masked,Not masked" bitfld.word 0x08 5. " [5] ,Normal interrupt signal bit 5" "Masked,Not masked" bitfld.word 0x08 4. " [4] ,Normal interrupt signal bit 4" "Masked,Not masked" textline " " bitfld.word 0x08 3. " [3] ,Normal interrupt signal bit 3" "Masked,Not masked" bitfld.word 0x08 2. " [2] ,Normal interrupt signal bit 2" "Masked,Not masked" bitfld.word 0x08 1. " [1] ,Normal interrupt signal bit 1" "Masked,Not masked" bitfld.word 0x08 0. " [0] ,Normal interrupt signal bit 0" "Masked,Not masked" line.word 0x0A "ERRORINTRSIGENA,Error Interrupt Signal Register" rbitfld.word 0x0A 12. " ERRINTRSIG_ENABLEREGBIT[12] ,Error interrupt signal bit 12" "Masked,Not masked" bitfld.word 0x0A 10. " [10] ,Error interrupt signal bit 10" "Masked,Not masked" bitfld.word 0x0A 9. " [9] ,Error interrupt signal bit 9" "Masked,Not masked" bitfld.word 0x0A 8. " [8] ,Error interrupt signal bit 8" "Masked,Not masked" textline " " bitfld.word 0x0A 7. " [7] ,Error interrupt signal bit 7" "Masked,Not masked" bitfld.word 0x0A 6. " [6] ,Error interrupt signal bit 6" "Masked,Not masked" bitfld.word 0x0A 5. " [5] ,Error interrupt signal bit 5" "Masked,Not masked" bitfld.word 0x0A 4. " [4] ,Error interrupt signal bit 4" "Masked,Not masked" textline " " bitfld.word 0x0A 3. " [3] ,Error interrupt signal bit 3" "Masked,Not masked" bitfld.word 0x0A 2. " [2] ,Error interrupt signal bit 2" "Masked,Not masked" bitfld.word 0x0A 1. " [1] ,Error interrupt signal bit 1" "Masked,Not masked" bitfld.word 0x0A 0. " [0] ,Error interrupt signal bit 0" "Masked,Not masked" textline " " rgroup.word 0x3C++0x01 line.word 0x00 "AUTOCMDERRSTS,Auto CMD Error Status Register" bitfld.word 0x00 7. " NEXTERROR ,Next error" "No error,Error" bitfld.word 0x00 4. " INDEXERROR ,Index error" "No error,Error" bitfld.word 0x00 3. " ENDBITERROR ,End bit error" "No error,Error" textline " " bitfld.word 0x00 2. " CRCERROR ,CRC error" "No error,Error" bitfld.word 0x00 1. " TIMEOUTERROR ,Time out error" "No error,Error" bitfld.word 0x00 0. " NOTEXECERROR ,No execution error" "No error,Error" group.word 0x3E++0x01 line.word 0x00 "HOSTCONTROL2,Host Control 2 Register" bitfld.word 0x00 15. " PRESETVALUEEN ,Preset value enable" "Host driver,Host controller" bitfld.word 0x00 14. " ASYNCHINTREN ,Asynchronous interrupt enable" "Disabled,Enabled" bitfld.word 0x00 7. " SAMPLINGCLKSEL ,Sampling clock select" "Fixed clock,Tuned clock" textline " " bitfld.word 0x00 6. " EXE ,Execute tuning" "Not tuned/completed,Execute tuning" bitfld.word 0x00 4.--5. " DRIVERSTREN ,Driver strength (Driver type)" "B,A,C,D" bitfld.word 0x00 3. " 1P8VSIGNALLINGENA ,Signalling voltage" "3.3V,1.8V" textline " " bitfld.word 0x00 0.--2. " UHSMODESEL ,UHS mode select" "SDR12,SDR25,SDR50,SDR104,DDR50,?..." rgroup.long 0x40++0x03 line.long 0x00 "CAPABILITIES,Host Controller Implementation Register (part 1)" bitfld.long 0x00 30.--31. " SLOTTYPE ,Slot type" "Removable card,Embedded 1-Device,Shared bus,?..." bitfld.long 0x00 29. " ASYINTSUP ,Asynchronous interrupt support" "Not supported,Supported" bitfld.long 0x00 28. " 64BITSUPPORT ,64bit system bus support" "Not supported,Supported" textline " " bitfld.long 0x00 26. " 1P8VOLTSUPPORT ,1.8V HC support" "Not supported,Supported" bitfld.long 0x00 25. " 3P0VOLTSUPPORT ,3.0V HC support" "Not supported,Supported" bitfld.long 0x00 24. " 3P3VOLTSUPPORT ,3.3V HC support" "Not supported,Supported" textline " " bitfld.long 0x00 23. " SUSPRESSUPPORT ,HC suspend/resume support" "Not supported,Supported" bitfld.long 0x00 22. " SDMASUPPORT ,SDMA support" "Not supported,Supported" bitfld.long 0x00 21. " HIGHSPEEDSUPPORT ,High speed mode support" "Not supported,Supported" textline " " bitfld.long 0x00 19. " ADMA2SUPPORT ,ADMA2 support" "Not supported,Supported" bitfld.long 0x00 18. " 8BITSUPPORT ,Extended media bus support" "Not supported,Supported" bitfld.long 0x00 16.--17. " MAXBLKLEN ,Maximum block size" "512byte,1024byte,2048byte,4096byte" textline " " hexmask.long.byte 0x00 8.--15. 1. " BASECLKFREQ ,Base clock frequency" bitfld.long 0x00 7. " TIMEOUTCLKUNIT ,Timeout clock unit" "KHz,MHz" bitfld.long 0x00 0.--5. " TIMEOUTCLKFREQ ,Timeout clock frequency (KHz/MHz)" "Other source,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" rgroup.long 0x44++0x03 line.long 0x00 "CAPABILITIES,Host Controller Implementation Register (part 2)" bitfld.long 0x00 25. " SPIBLKMODE ,SPI block mode support" "Nor supported,Supported" bitfld.long 0x00 24. " SPISUPPORT ,SPI mode support" "Nor supported,Supported" hexmask.long.byte 0x00 16.--23. 1. " CLCKMUL ,Clock multiplier" textline " " bitfld.long 0x00 14.--15. " RETUNINGMODES ,Re-tuning mode" "Mode 1,Mode 2,Mode 3,?..." bitfld.long 0x00 13. " TUNINGFORSDR50 ,Tuning for SDR50" "Not required,Required" bitfld.long 0x00 8.--11. " RETUNINGTIMERCNT ,Initial re-tuning timer value for modes 1 to 3 (Seconds)" "Other source,1,2,4,8,16,32,64,128,256,512,1024,?..." textline " " bitfld.long 0x00 6. " DDRIVERSUP ,Driver type D support" "Not supported,Supported" bitfld.long 0x00 5. " CDRIVERSUPPORT ,Driver type C support" "Not supported,Supported" bitfld.long 0x00 4. " ADRIVERSUPPORT ,Driver type A support" "Not supported,Supported" textline " " bitfld.long 0x00 2. " DDR50SUPPORT ,DDR50 support" "Not supported,Supported" bitfld.long 0x00 1. " SDR104SUPPORT ,SDR104 support" "Not supported,Supported" bitfld.long 0x00 0. " SDR50SUPPORT ,SDR50 support" "Not supported,Supported" rgroup.long 0x48++0x03 line.long 0x00 "MAXCURRENTCAP,Maximum Current Capability Register" hexmask.long.byte 0x00 16.--23. 1. " MAXCURRENT1P8V ,Maximum current capability for 1.8V" hexmask.long.byte 0x00 8.--15. 1. " MAXCURRENT3P0V ,Maximum current capability for 3.0V" hexmask.long.byte 0x00 0.--7. 1. " MAXCURRENT3P3V ,Maximum current capability for 3.3V" wgroup.word 0x50++0x01 line.word 0x00 "FEERR_ST,Force Event For Auto CMD Error Status Register" bitfld.word 0x00 7. " FCMDNIBACMD_12ERR ,Force event for command not issued by AUTO CMD12 error" "No interrupt,Interrupt" bitfld.word 0x00 4. " INDEXERR ,Force event for AUTO CMD index error" "No interrupt,Interrupt" bitfld.word 0x00 3. " ENDBITERR ,Force event for AUTO CMD end bit error" "No interrupt,Interrupt" textline " " bitfld.word 0x00 2. " CRCERR ,Force event for AUTO CMD CRC error" "No interrupt,Interrupt" bitfld.word 0x00 1. " TIMEOUTERR ,Force event for AUTO CMD timeout error" "No interrupt,Interrupt" bitfld.word 0x00 0. " NOTEXEC ,Force event for AUTO CMD12 not executed" "No interrupt,Interrupt" group.word 0x52++0x01 line.word 0x00 "FEF_ERRINTSTS,Force Event For Error Interrupt Status Register" rbitfld.word 0x00 10. " TUNINGERR ,Force event for tuning error" "No interrupt,Interrupt" bitfld.word 0x00 9. " ADMAERR ,Force event for ADMA error" "No interrupt,Interrupt" bitfld.word 0x00 8. " AUTOCMDERR ,Force event for auto CMD error" "No interrupt,Interrupt" textline " " bitfld.word 0x00 7. " CURRLIMERR ,Force event for current limit error" "No interrupt,Interrupt" bitfld.word 0x00 6. " DATENDBITERR ,Force event for data end bit error" "No interrupt,Interrupt" bitfld.word 0x00 5. " DATCRCERR ,Force event for data CRC error" "No interrupt,Interrupt" textline " " bitfld.word 0x00 4. " DATTIMEOUTERR ,Force event for data timeout error" "No interrupt,Interrupt" bitfld.word 0x00 3. " CMDINDEXERR ,Force event for command index error" "No interrupt,Interrupt" bitfld.word 0x00 2. " CMDENDBITERR ,Force event for command end bit error" "No interrupt,Interrupt" textline " " bitfld.word 0x00 1. " CMDCRCERR ,Force event for command CRC error" "No interrupt,Interrupt" bitfld.word 0x00 0. " CMDTIMEOUTERR ,Force event for CMD timeout error" "No interrupt,Interrupt" rgroup.byte 0x54++0x00 line.byte 0x00 "ADMAERRSTS,ADMA Error Status Register" bitfld.byte 0x00 2. " ADMALENMIMATCHERR ,Length mismatche error" "No error,Error" bitfld.byte 0x00 0.--1. " ADMAERRSTS_ADMAERRORSTATE ,ADMA state on data transfer error" "ST_STOP,ST_FDS,,ST_TFR" group.word 0x58++0x01 line.word 0x00 "ADMASYSADDR0,Physical Address Used For ADMA Data Transfer Register 0" group.word 0x5A++0x01 line.word 0x00 "ADMASYSADDR1,Physical Address Used For ADMA Data Transfer Register 1" group.word 0x5C++0x01 line.word 0x00 "ADMASYSADDR2,Physical Address Used For ADMA Data Transfer Register 2" group.word 0x5E++0x01 line.word 0x00 "ADMASYSADDR3,Physical Address Used For ADMA Data Transfer Register 3" if (((d.w(ad:0xFF160000+0x3E)&0x08))==0x00) rgroup.word 0x60++0x01 line.word 0x00 "PRESETVALUE0,Preset Value 0 Register" bitfld.word 0x00 14.--15. " DRIVER_STRSELVAL ,Driver strength select value " "Driver type B,Driver type A,Driver type C,Driver type D" bitfld.word 0x00 10. " CLCK_GENSELVAL ,Clock generator select value" "Compatible clock,Programmable clock" hexmask.word 0x00 0.--9. 1. " SDCLK_FREQSELVAL ,SDCLK frequency select value" else rgroup.word 0x60++0x01 line.word 0x00 "PRESETVALUE0,Preset Value 0 Register" bitfld.word 0x00 10. " CLCK_GENSELVAL ,Clock generator select value" "Compatible clock,Programmable clock" hexmask.word 0x00 0.--9. 1. " SDCLK_FREQSELVAL ,SDCLK frequency select value" endif if (((d.w(ad:0xFF160000+0x3E)&0x08))==0x00) rgroup.word 0x62++0x01 line.word 0x00 "PRESETVALUE1,Preset Value 1 Register" bitfld.word 0x00 14.--15. " DRIVER_STRSELVAL ,Driver strength select value for Default Speed" "Driver type B,Driver type A,Driver type C,Driver type D" bitfld.word 0x00 10. " CLCK_GENSELVAL ,Clock generator select value" "Compatible clock,Programmable clock" hexmask.word 0x00 0.--9. 1. " SDCLK_FREQSELVAL ,SDCLK frequency select value" else rgroup.word 0x62++0x01 line.word 0x00 "PRESETVALUE1,Preset Value 1 Register" bitfld.word 0x00 10. " CLCK_GENSELVAL ,Clock generator select value" "Compatible clock,Programmable clock" hexmask.word 0x00 0.--9. 1. " SDCLK_FREQSELVAL ,SDCLK frequency select value" endif if (((d.w(ad:0xFF160000+0x3E)&0x08))==0x00) rgroup.word 0x64++0x01 line.word 0x00 "PRESETVALUE2,Preset Value 2 Register" bitfld.word 0x00 14.--15. " DRIVER_STRSELVAL ,Driver strength select value for High Speed" "Driver type B,Driver type A,Driver type C,Driver type D" bitfld.word 0x00 10. " CLCK_GENSELVAL ,Clock generator select value" "Compatible clock,Programmable clock" hexmask.word 0x00 0.--9. 1. " SDCLK_FREQSELVAL ,SDCLK frequency select value" else rgroup.word 0x64++0x01 line.word 0x00 "PRESETVALUE2,Preset Value 2 Register" bitfld.word 0x00 10. " CLCK_GENSELVAL ,Clock generator select value" "Compatible clock,Programmable clock" hexmask.word 0x00 0.--9. 1. " SDCLK_FREQSELVAL ,SDCLK frequency select value" endif if (((d.w(ad:0xFF160000+0x3E)&0x08))==0x00) rgroup.word 0x66++0x01 line.word 0x00 "PRESETVALUE3,Preset Value 3 Register" bitfld.word 0x00 14.--15. " DRIVER_STRSELVAL ,Driver strength select value for SDR12" "Driver type B,Driver type A,Driver type C,Driver type D" bitfld.word 0x00 10. " CLCK_GENSELVAL ,Clock generator select value" "Compatible clock,Programmable clock" hexmask.word 0x00 0.--9. 1. " SDCLK_FREQSELVAL ,SDCLK frequency select value" else rgroup.word 0x66++0x01 line.word 0x00 "PRESETVALUE3,Preset Value 3 Register" bitfld.word 0x00 10. " CLCK_GENSELVAL ,Clock generator select value" "Compatible clock,Programmable clock" hexmask.word 0x00 0.--9. 1. " SDCLK_FREQSELVAL ,SDCLK frequency select value" endif if (((d.w(ad:0xFF160000+0x3E)&0x08))==0x00) rgroup.word 0x68++0x01 line.word 0x00 "PRESETVALUE4,Preset Value 4 Register" bitfld.word 0x00 14.--15. " DRIVER_STRSELVAL ,Driver strength select value for SDR25" "Driver type B,Driver type A,Driver type C,Driver type D" bitfld.word 0x00 10. " CLCK_GENSELVAL ,Clock generator select value" "Compatible clock,Programmable clock" hexmask.word 0x00 0.--9. 1. " SDCLK_FREQSELVAL ,SDCLK frequency select value" else rgroup.word 0x68++0x01 line.word 0x00 "PRESETVALUE4,Preset Value 4 Register" bitfld.word 0x00 10. " CLCK_GENSELVAL ,Clock generator select value" "Compatible clock,Programmable clock" hexmask.word 0x00 0.--9. 1. " SDCLK_FREQSELVAL ,SDCLK frequency select value" endif if (((d.w(ad:0xFF160000+0x3E)&0x08))==0x00) rgroup.word 0x6A++0x01 line.word 0x00 "PRESETVALUE5,Preset Value 5 Register" bitfld.word 0x00 14.--15. " DRIVER_STRSELVAL ,Driver strength select value for SDR50" "Driver type B,Driver type A,Driver type C,Driver type D" bitfld.word 0x00 10. " CLCK_GENSELVAL ,Clock generator select value" "Compatible clock,Programmable clock" hexmask.word 0x00 0.--9. 1. " SDCLK_FREQSELVAL ,SDCLK frequency select value" else rgroup.word 0x6A++0x01 line.word 0x00 "PRESETVALUE5,Preset Value 5 Register" bitfld.word 0x00 10. " CLCK_GENSELVAL ,Clock generator select value" "Compatible clock,Programmable clock" hexmask.word 0x00 0.--9. 1. " SDCLK_FREQSELVAL ,SDCLK frequency select value" endif if (((d.w(ad:0xFF160000+0x3E)&0x08))==0x00) rgroup.word 0x6C++0x01 line.word 0x00 "PRESETVALUE6,Preset Value 6 Register" bitfld.word 0x00 14.--15. " DRIVER_STRSELVAL ,Driver strength select value for SDR 104" "Driver type B,Driver type A,Driver type C,Driver type D" bitfld.word 0x00 10. " CLCK_GENSELVAL ,Clock generator select value" "Compatible clock,Programmable clock" hexmask.word 0x00 0.--9. 1. " SDCLK_FREQSELVAL ,SDCLK frequency select value" else rgroup.word 0x6C++0x01 line.word 0x00 "PRESETVALUE6,Preset Value 6 Register" bitfld.word 0x00 10. " CLCK_GENSELVAL ,Clock generator select value" "Compatible clock,Programmable clock" hexmask.word 0x00 0.--9. 1. " SDCLK_FREQSELVAL ,SDCLK frequency select value" endif if (((d.w(ad:0xFF160000+0x3E)&0x08))==0x00) rgroup.word 0x6E++0x01 line.word 0x00 "PRESETVALUE7,Preset Value 7 Register" bitfld.word 0x00 14.--15. " DRIVER_STRSELVAL ,Driver strength select value for DDR50" "Driver type B,Driver type A,Driver type C,Driver type D" bitfld.word 0x00 10. " CLCK_GENSELVAL ,Clock generator select value" "Compatible clock,Programmable clock" hexmask.word 0x00 0.--9. 1. " SDCLK_FREQSELVAL ,SDCLK frequency select value" else rgroup.word 0x6E++0x01 line.word 0x00 "PRESETVALUE7,Preset Value 7 Register" bitfld.word 0x00 10. " CLCK_GENSELVAL ,Clock generator select value" "Compatible clock,Programmable clock" hexmask.word 0x00 0.--9. 1. " SDCLK_FREQSELVAL ,SDCLK frequency select value" endif group.long 0x70++0x03 line.long 0x00 "BOOTTIMEOUTCNT,Boot Timeout Value Counter Program Register" textline " " rgroup.word 0xFC++0x03 line.word 0x00 "SLOTINTRSTS,Interrupt Signal For Each Slot Read Register" bitfld.word 0x00 7. " SLOTINTRSTS[7] ,Logical OR of interrupt signal and wakeup signal for slot 7" "No interrupt,Interrupt" bitfld.word 0x00 6. " [6] ,Logical OR of interrupt signal and wakeup signal for slot 6" "No interrupt,Interrupt" bitfld.word 0x00 5. " [5] ,Logical OR of interrupt signal and wakeup signal for slot 5" "No interrupt,Interrupt" bitfld.word 0x00 4. " [4] ,Logical OR of interrupt signal and wakeup signal for slot 4" "No interrupt,Interrupt" textline " " bitfld.word 0x00 3. " [3] ,Logical OR of interrupt signal and wakeup signal for slot 3" "No interrupt,Interrupt" bitfld.word 0x00 2. " [2] ,Logical OR of interrupt signal and wakeup signal for slot 2" "No interrupt,Interrupt" bitfld.word 0x00 1. " [1] ,Logical OR of interrupt signal and wakeup signal for slot 1" "No interrupt,Interrupt" bitfld.word 0x00 0. " [0] ,Logical OR of interrupt signal and wakeup signal for slot 0" "No interrupt,Interrupt" line.word 0x02 "HOSTCVER,Host Controller Version Register" hexmask.word.byte 0x02 8.--15. 1. " SDHC_VENVERNUM ,Vendor version number" hexmask.word.byte 0x02 0.--7. 1. " SPEC_VER_NUM ,Specification version number" width 0x0B tree.end tree "SD1" base ad:0xFF170000 width 18. group.word 0x00++0x05 line.word 0x00 "SDMASYSADDRLO,Physical System Memory Address For DMA Transfers Register (Lower 16-bits)" line.word 0x02 "SDMASYSADDRHI,Physical System Memory Address For DMA Transfers Register (Higher 16-bits)" line.word 0x04 "BLKS,Block Size Register" bitfld.word 0x04 12.--14. " SDMA_BUFBOUND ,SDMA buffer boundary" "4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB" hexmask.word 0x04 0.--11. 1. " XFER_BLCKS ,Block size for block data transfers for CMD17 CMD18 CMD24 CMD25 and CMD53" if (((d.w(ad:0xFF170000+0x0C)&0x02))==0x02) group.word 0x06++0x01 line.word 0x00 "BLCKCOUNT,Block Count Register" else hgroup.word 0x06++0x01 hide.word 0x00 "BLCKCOUNT,Block Count Register" endif group.word 0x08++0x07 line.word 0x00 "COMMAND_ARG1LO,Lower Bits Of SD Command Argument Register" line.word 0x02 "COMMAND_ARG1HI,Higher Bits Of SD Command Argument Register" line.word 0x04 "TRANSFMOD,Data Transfers Operations Control Register" bitfld.word 0x04 5. " XFERMODE_MULTIBLKSEL ,Multiple block data transfers enable" "Single block,Multiple block" bitfld.word 0x04 4. " XFERMODE_DATAXFERDIR ,Direction of data transfers" "Write Host-Card,Read Card-Host" textline " " bitfld.word 0x04 2.--3. " XFERMODE_AUTOCMDENA ,Auto command functions" "Auto command disabled,Auto CMD12 enabled,Auto CMD23 enabled,?..." bitfld.word 0x04 1. " XFERMODE_BLKCNTENA ,Block count register enable" "Disabled,Enabled" textline " " bitfld.word 0x04 0. " XFERMODE_DMAENABLE ,DMA enable" "Disabled,Enabled" line.word 0x06 "COMMAND,Program Command For Host Controller Register" bitfld.word 0x06 8.--13. " CMDINDEX ,Command number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x06 6.--7. " CMDTYPE ,Command type" "Normal,Suspend,Resume,Abort" textline " " bitfld.word 0x06 5. " DATAPRESENT ,Data present" "Not present,Present" bitfld.word 0x06 4. " INDEXCHKENA ,Index field check" "Disabled,Enabled" textline " " bitfld.word 0x06 3. " CRCCHKENA ,CRC field check" "Disabled,Enabled" bitfld.word 0x06 0.--1. " RESPONSETYPR ,Response type select" "No response,136,48,48-check busy" rgroup.word 0x10++0x01 line.word 0x00 "RESPONSE0,SD Card Response Register 0" rgroup.word 0x12++0x01 line.word 0x00 "RESPONSE1,SD Card Response Register 1" rgroup.word 0x14++0x01 line.word 0x00 "RESPONSE2,SD Card Response Register 2" rgroup.word 0x16++0x01 line.word 0x00 "RESPONSE3,SD Card Response Register 3" rgroup.word 0x18++0x01 line.word 0x00 "RESPONSE4,SD Card Response Register 4" rgroup.word 0x1A++0x01 line.word 0x00 "RESPONSE5,SD Card Response Register 5" rgroup.word 0x1C++0x01 line.word 0x00 "RESPONSE6,SD Card Response Register 6" rgroup.word 0x1E++0x01 line.word 0x00 "RESPONSE7,SD Card Response Register 7" group.long 0x20++0x03 line.long 0x00 "DATAPORT,Internal Buffer Access Register" rgroup.long 0x24++0x03 line.long 0x00 "PRESENTSTATE,Status Of The Host Controller Register" bitfld.long 0x00 28. " SDIF_DAT7IN_DSYNC ,DAT 7 status" "Low,High" bitfld.long 0x00 27. " SDIF_DAT6IN_DSYNC ,DAT 6 status" "Low,High" textline " " bitfld.long 0x00 26. " SDIF_DAT5IN_DSYNC ,DAT 5 status" "Low,High" bitfld.long 0x00 25. " SDIF_DAT4IN_DSYNC ,DAT 4 status" "Low,High" textline " " bitfld.long 0x00 24. " SDIF_CMDIN_DSYNC ,CMD status" "Low,High" bitfld.long 0x00 23. " SDIF_DAT3IN_DSYNC ,DAT 3 status" "Low,High" textline " " bitfld.long 0x00 22. " SDIF_DAT2IN_DSYNC ,DAT 2 status" "Low,High" bitfld.long 0x00 21. " SDIF_DAT1IN_DSYNC ,DAT 1 status" "Low,High" textline " " bitfld.long 0x00 20. " SDIF_DAT0IN_DSYNC ,DAT 0 status" "Low,High" bitfld.long 0x00 19. " SDIF_WP_DSYNC ,Write protect switch" "Protected,Enabled" textline " " bitfld.long 0x00 18. " SDIF_CD_N_DSYNC ,Card status" "Not presented,Presented" bitfld.long 0x00 17. " SDHCCARDDET_STATSTABL_DSYNC ,Card detect pin level" "Not stable,Stable" textline " " bitfld.long 0x00 16. " SDHCCARDDET_INSERTED_DSYNC ,SD card insert" "Not inserted,Inserted" bitfld.long 0x00 11. " SDHCDMACTRL_PIOBUFRDENA ,Non-DMA read transfers status" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " SDHCDMACTRL_PIOBUFWRENA ,Non-DMA write transfers status" "Disabled,Enabled" bitfld.long 0x00 9. " SDHCDMACTRL_RDXFERACT ,Read transfer completion status detection" "No valid data,Transferring data" textline " " bitfld.long 0x00 8. " SDHCDMACTRL_WRXFERACT ,Write transfer active status" "No valid data,Transferring data" bitfld.long 0x00 3. " SDHCSDCTRL_RETUNINGREQ_DSYNC ,Sampling clock" "Fixed/well tuned,Needs re-tuning" textline " " bitfld.long 0x00 2. " SDHCDMACTRL_DATALINEACT ,DAT line on SD bus status" "Inactive,Active" bitfld.long 0x00 1. " PRESENTSTATE_INHIBITDAT ,Present state" "Can issue,Cannot issue" textline " " bitfld.long 0x00 0. " PRESENTSTATE_INHIBITCMD ,Command inhibit" "Can issue,Cannot issue" if (((d.b(ad:0xFF170000+0x28)&0x80))==0x80)&&(((d.l(ad:0xFF170000+0x40)&0xC0000000))!=0x80000000) group.byte 0x28++0x00 line.byte 0x00 "HOSTCTRL1,Host Control 1 Register" bitfld.byte 0x00 7. " CDSIGSEL ,Card detect signal selection" "SDCD#,Test level" bitfld.byte 0x00 6. " CDTESTLEVEL ,Card test level" "No card,Card inserted" textline " " bitfld.byte 0x00 5. " EXTDATAWID ,Bus width mode control" "Data transfer width,8-bit" bitfld.byte 0x00 3.--4. " DMASEL ,DMA mode select" "SDMA,32 bit ADMA1,32 bit ADMA2,64 bit ADMA2" textline " " bitfld.byte 0x00 2. " HISPEEDENA ,High speed support enable" "Normal,High" bitfld.byte 0x00 1. " DATWID ,HC data width mode" "1-bit,4-bit" textline " " bitfld.byte 0x00 0. " LEDCTRL ,LED control" "OFF,ON" elif (((d.b(ad:0xFF170000+0x28)&0x80))==0x80)&&(((d.l(ad:0xFF170000+0x40)&0xC0000000))==0x80000000) group.byte 0x28++0x00 line.byte 0x00 "HOSTCTRL1,Host Control 1 Register" bitfld.byte 0x00 7. " CDSIGSEL ,Card detect signal selection" "SDCD#,Test level" bitfld.byte 0x00 6. " CDTESTLEVEL ,Card test level" "No card,Card inserted" textline " " textfld " " bitfld.byte 0x00 3.--4. " DMASEL ,DMA mode select" "SDMA,32 bit ADMA1,32 bit ADMA2,64 bit ADMA2" textline " " bitfld.byte 0x00 2. " HISPEEDENA ,High speed support enable" "Normal,High" bitfld.byte 0x00 1. " DATWID ,HC data width mode" "1-bit,4-bit" textline " " bitfld.byte 0x00 0. " LEDCTRL ,LED control" "OFF,ON" elif (((d.b(ad:0xFF170000+0x28)&0x80))!=0x80)&&(((d.l(ad:0xFF170000+0x40)&0xC0000000))!=0x80000000) group.byte 0x28++0x00 line.byte 0x00 "HOSTCTRL1,Host Control 1 Register" bitfld.byte 0x00 7. " CDSIGSEL ,Card detect signal selection" "SDCD#,Test level" textline " " bitfld.byte 0x00 5. " EXTDATWID ,Bus width mode control" "Data transfer width,8-bit" bitfld.byte 0x00 3.--4. " DMASEL ,DMA mode select" "SDMA,32 bit ADMA1,32 bit ADMA2,64 bit ADMA2" textline " " bitfld.byte 0x00 2. " HISPEEDENA ,High speed support enable" "Normal,High" bitfld.byte 0x00 1. " DATWID ,HC data width mode" "1-bit,4-bit" textline " " bitfld.byte 0x00 0. " LEDCTRL ,LED control" "OFF,ON" elif (((d.b(ad:0xFF170000+0x28)&0x80))!=0x80)&&(((d.l(ad:0xFF170000+0x40)&0xC0000000))==0x80000000) group.byte 0x28++0x00 line.byte 0x00 "HOSTCTRL1,Host Control 1 Register" bitfld.byte 0x00 7. " CDSIGSEL ,Card detect signal selection" "SDCD#,Test level" textline " " textfld " " bitfld.byte 0x00 3.--4. " DMASEL ,DMA mode select" "SDMA,32 bit ADMA1,32 bit ADMA2,64 bit ADMA2" textline " " bitfld.byte 0x00 2. " HISPEEDENA ,High speed support enable" "Normal,High" bitfld.byte 0x00 1. " DATWID ,HC data width mode" "1-bit,4-bit" textline " " bitfld.byte 0x00 0. " LEDCTRL ,LED control" "OFF,ON" endif group.byte 0x29++0x00 line.byte 0x00 "PWRCTRL,SD Bus Power And Voltage Level Program Register" bitfld.byte 0x00 4. " EMMC_HWRESET ,Hardware reset signal" "No reset,Reset" bitfld.byte 0x00 1.--3. " SDBUSVOLT ,SD-bus voltage level select" ",,,,,1.8V,3.0V,3.3V" textline " " bitfld.byte 0x00 0. " SDBUSPWR ,SD bus power" "OFF,ON" if (((d.b(ad:0xFF170000+0x028)&0x02))==0x02) group.byte 0x2A++0x00 line.byte 0x00 "BLGCTRL,Block Gap Control Register" bitfld.byte 0x00 7. " BACKENA ,Boot acknowledge from eMMC card" "Not wait,Wait" bitfld.byte 0x00 6. " ALTBMODE ,Boot code access in alternative mode" "Stop,Start" textline " " bitfld.byte 0x00 5. " BENABLE ,Boot code access" "Stop,Start" bitfld.byte 0x00 4. " SPIMODE ,Mode select" "SD mode,SPI mode" textline " " bitfld.byte 0x00 3. " INT ,Block gap control interrupt" "No interrupt,Interrupt" bitfld.byte 0x00 2. " RDWAITCTRL ,Read-Wait control" "Disabled,Enabled" textline " " bitfld.byte 0x00 1. " CON ,Stopped transaction restart" "Ignore,Restart" bitfld.byte 0x00 0. " STATBLKGAP ,Transaction stop at the next gap" "Transfer,Stop" else group.byte 0x2A++0x00 line.byte 0x00 "BLGCTRL,Block Gap Control Register" bitfld.byte 0x00 7. " BACKENA ,Boot acknowledge from eMMC card" "Not wait,Wait" bitfld.byte 0x00 6. " ALTBMODE ,Boot code access in alternative mode" "Stop,Start" textline " " bitfld.byte 0x00 5. " BENABLE ,Boot code access" "Stop,Start" bitfld.byte 0x00 4. " SPIMODE ,Mode select" "SD mode,SPI mode" textline " " textfld " " bitfld.byte 0x00 2. " RDWAITCTRL ,Read-Wait control" "Disabled,Enabled" textline " " bitfld.byte 0x00 1. " CON ,Stopped transaction restart" "Ignore,Restart" bitfld.byte 0x00 0. " STATBLKGAP ,Transaction stop at the next gap" "Transfer,Stop" endif group.byte 0x2B++0x00 line.byte 0x00 "WAUPCTRL,Wakeup Functionality Program Register" bitfld.byte 0x00 2. " CARDREMOVAL ,Card removal wakeup enable" "Disabled,Enabled" bitfld.byte 0x00 1. " CARDINSERT ,Card insertion wakeup enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 0. " CARDINT ,Card interrupt wakeup enable" "Disabled,Enabled" group.word 0x2C++0x01 line.word 0x00 "CLCKCTRL,Clock Control,clock Control Register" hexmask.word.byte 0x00 8.--15. 1. " SDCLKFREQSEL ,SDCLK pin frequency select" bitfld.word 0x00 6.--7. " SDCLKFREQS_UB ,SDCLK pin frequency select - upper bits" "0,1,2,3" textline " " bitfld.word 0x00 5. " CLKGENSEL ,Clock generator mode" "Divided,Programmable" bitfld.word 0x00 2. " SDCLKENA ,Clock control enable" "Disabled,Enabled" textline " " rbitfld.word 0x00 1. " SDHCCLKGE_I_DSYNC ,SD clock status" "Not ready,Ready" bitfld.word 0x00 0. " INTCLKENA ,HC status" "Stop,Oscillate" textline " " group.byte 0x2E++0x01 line.byte 0x00 "TIMEOUTCONTROL,Data Timeout Counter Value Register" bitfld.byte 0x00 0.--3. " TIMEOUT_CTRVAL ,Timeout value" "TMCLK * 2^13,TMCLK * 2^14,,,,,,,,,,,,,TMCLK * 2^27,?..." line.byte 0x01 "SOFTWARERESET,Software Reset" eventfld.byte 0x01 2. " DATA ,Software reset for data" "No reset,Reset" eventfld.byte 0x01 1. " CMMAND ,Software reset for command" "No reset,Reset" eventfld.byte 0x01 0. " ALL ,Software reset for all" "No reset,Reset" group.word 0x30++0x0B line.word 0x00 "NORMALINTRSTS,Interrupt Status Register" rbitfld.word 0x00 15. " ERRINTRSTS ,Error interrupt status" "No error,Error" eventfld.word 0x00 14. " BOOTCOMPLETE ,Boot operation terminate" "Not terminated,Terminated" eventfld.word 0x00 13. " RCVBOOTACK ,Boot acknowledge receive" "Not received,Received" textline " " rbitfld.word 0x00 12. " RETUNINGEVENT ,Re-Tuning request status" "Not required,Required" rbitfld.word 0x00 11. " INTC ,Interrupt C" "No interrupt,Interrupt" rbitfld.word 0x00 10. " INTB ,Interrupt B" "No interrupt,Interrupt" textline " " rbitfld.word 0x00 9. " INTA ,Interrupt A" "No interrupt,Interrupt" rbitfld.word 0x00 8. " CARDINTSTS ,Card interrupt" "No interrupt,Interrupt" eventfld.word 0x00 7. " CARDREMSTS ,Card remove status" "Not removed,Removed" textline " " eventfld.word 0x00 6. " CARDINSSTS ,Card insert status" "Not inserted,Inserted" eventfld.word 0x00 5. " BUFRDREADY ,Buffer read enable" "Not ready,Ready" eventfld.word 0x00 4. " BUFWRREADY ,Buffer write enable" "Not ready,Ready" textline " " eventfld.word 0x00 3. " DMAINTERRUPT ,DMA interrupt" "No interrupt,Interrupt" eventfld.word 0x00 2. " BLKGAPEVENT ,Block gap event" "Not occurred,Occurred" eventfld.word 0x00 1. " XFERCOMPLETE ,Data transfer" "Not completed,Completed" textline " " eventfld.word 0x00 0. " CMDCOMPLETE ,Command complete status" "Not completed,Completed" line.word 0x02 "ERRORINTRSTS,Error Interrupt Status Register" eventfld.word 0x02 12. " HOSTERROR ,Host error" "No error,Error" eventfld.word 0x02 9. " ADMAERROR ,ADMA transfer error" "No error,Error" eventfld.word 0x02 8. " AUTOCMDERROR ,Auto command error" "No error,Error" textline " " eventfld.word 0x02 7. " CURRLIMITERROR ,Current limit error" "No error,Error" eventfld.word 0x02 6. " DATAENDBITERROR ,Data end bit error" "No error,Error" eventfld.word 0x02 5. " DATACRCERROR ,Data CRC error" "No error,Error" textline " " eventfld.word 0x02 4. " DATATIMEOUTERROR ,Data timeout error" "No error,Error" eventfld.word 0x02 3. " CMDINDEXERROR ,CMD index error" "No error,Error" eventfld.word 0x02 2. " CMDENDBITERROR ,CMD end bit error" "No error,Error" textline " " eventfld.word 0x02 1. " CMDCRCBITERROR ,CMD CRC error" "No error,Error" eventfld.word 0x02 0. " CMDTIMEOUTERROR ,CDM timeout error" "No error,Error" textline " " line.word 0x04 "NORMALINTRSTSENA,Normal Interrupt Status Register Enable Register" rbitfld.word 0x04 15. " ENABLEREGBIT[15] ,Normal interrupt status bit 15" "Masked,Not masked" bitfld.word 0x04 14. " [14] ,Normal interrupt status bit 14" "Masked,Not masked" bitfld.word 0x04 13. " [13] ,Normal interrupt status bit 13" "Masked,Not masked" bitfld.word 0x04 12. " [12] ,Normal interrupt status bit 12" "Masked,Not masked" textline " " bitfld.word 0x04 11. " [11] ,Normal interrupt status bit 11" "Masked,Not masked" bitfld.word 0x04 10. " [10] ,Normal interrupt status bit 10" "Masked,Not masked" bitfld.word 0x04 9. " [9] ,Normal interrupt status bit 9" "Masked,Not masked" textline " " bitfld.word 0x04 8. " CARDINTSTSENA ,Card interrupt status enable" "Masked,Not masked" bitfld.word 0x04 7. " CARDREMSTSENA ,Card remove status enable" "Masked,Not masked" bitfld.word 0x04 6. " CARDINSSTSENA ,Card insert status enable" "Masked,Not masked" textline " " bitfld.word 0x04 5. " ENABLEREGBIT[5] ,Normal interrupt status bit 5" "Masked,Not masked" bitfld.word 0x04 4. " [4] ,Normal interrupt status bit 4" "Masked,Not masked" bitfld.word 0x04 3. " [3] ,Normal interrupt status bit 3" "Masked,Not masked" textline " " bitfld.word 0x04 2. " [2] ,Normal interrupt status bit 2" "Masked,Not masked" bitfld.word 0x04 1. " [1] ,Normal interrupt status bit 1" "Masked,Not masked" bitfld.word 0x04 0. " [0] ,Normal interrupt status bit 0" "Masked,Not masked" line.word 0x06 "ERRORINTRSTSENA,Error Interrupt Status Register" bitfld.word 0x06 12. " ERRINTRSTS_ENABLEREGBIT[12] ,Error interrupt status enable" "Masked,Not masked" bitfld.word 0x06 10. " [10] ,Error interrupt status enable" "Masked,Not masked" bitfld.word 0x06 9. " [9] ,Error interrupt status enable" "Masked,Not masked" bitfld.word 0x06 8. " [8] ,Error interrupt status enable" "Masked,Not masked" textline " " bitfld.word 0x06 7. " [7] ,Error interrupt status enable" "Masked,Not masked" bitfld.word 0x06 6. " [6] ,Error interrupt status enable" "Masked,Not masked" bitfld.word 0x06 5. " [5] ,Error interrupt status enable" "Masked,Not masked" bitfld.word 0x06 4. " [4] ,Error interrupt status enable" "Masked,Not masked" textline " " bitfld.word 0x06 3. " [3] ,Error interrupt status enable" "Masked,Not masked" bitfld.word 0x06 2. " [2] ,Error interrupt status enable" "Masked,Not masked" bitfld.word 0x06 1. " [1] ,Error interrupt status enable" "Masked,Not masked" bitfld.word 0x06 0. " [0] ,Error interrupt status enable" "Masked,Not masked" line.word 0x08 "NORMALINTRSIGENA,Normal Interrupt Signal Register" rbitfld.word 0x08 15. " NORMINTRSIG_ENABLEREGBIT[15] ,Normal interrupt signal bit 15" "Masked,Not masked" bitfld.word 0x08 14. " [14] ,Normal interrupt signal bit 14" "Masked,Not masked" bitfld.word 0x08 13. " [13] ,Normal interrupt signal bit 13" "Masked,Not masked" bitfld.word 0x08 12. " [12] ,Normal interrupt signal bit 12" "Masked,Not masked" textline " " bitfld.word 0x08 11. " [11] ,Normal interrupt signal bit 11" "Masked,Not masked" bitfld.word 0x08 10. " [10] ,Normal interrupt signal bit 10" "Masked,Not masked" bitfld.word 0x08 9. " [9] ,Normal interrupt signal bit 9" "Masked,Not masked" bitfld.word 0x08 8. " [8] ,Normal interrupt signal bit 8" "Masked,Not masked" textline " " bitfld.word 0x08 7. " [7] ,Normal interrupt signal bit 7" "Masked,Not masked" bitfld.word 0x08 6. " [6] ,Normal interrupt signal bit 6" "Masked,Not masked" bitfld.word 0x08 5. " [5] ,Normal interrupt signal bit 5" "Masked,Not masked" bitfld.word 0x08 4. " [4] ,Normal interrupt signal bit 4" "Masked,Not masked" textline " " bitfld.word 0x08 3. " [3] ,Normal interrupt signal bit 3" "Masked,Not masked" bitfld.word 0x08 2. " [2] ,Normal interrupt signal bit 2" "Masked,Not masked" bitfld.word 0x08 1. " [1] ,Normal interrupt signal bit 1" "Masked,Not masked" bitfld.word 0x08 0. " [0] ,Normal interrupt signal bit 0" "Masked,Not masked" line.word 0x0A "ERRORINTRSIGENA,Error Interrupt Signal Register" rbitfld.word 0x0A 12. " ERRINTRSIG_ENABLEREGBIT[12] ,Error interrupt signal bit 12" "Masked,Not masked" bitfld.word 0x0A 10. " [10] ,Error interrupt signal bit 10" "Masked,Not masked" bitfld.word 0x0A 9. " [9] ,Error interrupt signal bit 9" "Masked,Not masked" bitfld.word 0x0A 8. " [8] ,Error interrupt signal bit 8" "Masked,Not masked" textline " " bitfld.word 0x0A 7. " [7] ,Error interrupt signal bit 7" "Masked,Not masked" bitfld.word 0x0A 6. " [6] ,Error interrupt signal bit 6" "Masked,Not masked" bitfld.word 0x0A 5. " [5] ,Error interrupt signal bit 5" "Masked,Not masked" bitfld.word 0x0A 4. " [4] ,Error interrupt signal bit 4" "Masked,Not masked" textline " " bitfld.word 0x0A 3. " [3] ,Error interrupt signal bit 3" "Masked,Not masked" bitfld.word 0x0A 2. " [2] ,Error interrupt signal bit 2" "Masked,Not masked" bitfld.word 0x0A 1. " [1] ,Error interrupt signal bit 1" "Masked,Not masked" bitfld.word 0x0A 0. " [0] ,Error interrupt signal bit 0" "Masked,Not masked" textline " " rgroup.word 0x3C++0x01 line.word 0x00 "AUTOCMDERRSTS,Auto CMD Error Status Register" bitfld.word 0x00 7. " NEXTERROR ,Next error" "No error,Error" bitfld.word 0x00 4. " INDEXERROR ,Index error" "No error,Error" bitfld.word 0x00 3. " ENDBITERROR ,End bit error" "No error,Error" textline " " bitfld.word 0x00 2. " CRCERROR ,CRC error" "No error,Error" bitfld.word 0x00 1. " TIMEOUTERROR ,Time out error" "No error,Error" bitfld.word 0x00 0. " NOTEXECERROR ,No execution error" "No error,Error" group.word 0x3E++0x01 line.word 0x00 "HOSTCONTROL2,Host Control 2 Register" bitfld.word 0x00 15. " PRESETVALUEEN ,Preset value enable" "Host driver,Host controller" bitfld.word 0x00 14. " ASYNCHINTREN ,Asynchronous interrupt enable" "Disabled,Enabled" bitfld.word 0x00 7. " SAMPLINGCLKSEL ,Sampling clock select" "Fixed clock,Tuned clock" textline " " bitfld.word 0x00 6. " EXE ,Execute tuning" "Not tuned/completed,Execute tuning" bitfld.word 0x00 4.--5. " DRIVERSTREN ,Driver strength (Driver type)" "B,A,C,D" bitfld.word 0x00 3. " 1P8VSIGNALLINGENA ,Signalling voltage" "3.3V,1.8V" textline " " bitfld.word 0x00 0.--2. " UHSMODESEL ,UHS mode select" "SDR12,SDR25,SDR50,SDR104,DDR50,?..." rgroup.long 0x40++0x03 line.long 0x00 "CAPABILITIES,Host Controller Implementation Register (part 1)" bitfld.long 0x00 30.--31. " SLOTTYPE ,Slot type" "Removable card,Embedded 1-Device,Shared bus,?..." bitfld.long 0x00 29. " ASYINTSUP ,Asynchronous interrupt support" "Not supported,Supported" bitfld.long 0x00 28. " 64BITSUPPORT ,64bit system bus support" "Not supported,Supported" textline " " bitfld.long 0x00 26. " 1P8VOLTSUPPORT ,1.8V HC support" "Not supported,Supported" bitfld.long 0x00 25. " 3P0VOLTSUPPORT ,3.0V HC support" "Not supported,Supported" bitfld.long 0x00 24. " 3P3VOLTSUPPORT ,3.3V HC support" "Not supported,Supported" textline " " bitfld.long 0x00 23. " SUSPRESSUPPORT ,HC suspend/resume support" "Not supported,Supported" bitfld.long 0x00 22. " SDMASUPPORT ,SDMA support" "Not supported,Supported" bitfld.long 0x00 21. " HIGHSPEEDSUPPORT ,High speed mode support" "Not supported,Supported" textline " " bitfld.long 0x00 19. " ADMA2SUPPORT ,ADMA2 support" "Not supported,Supported" bitfld.long 0x00 18. " 8BITSUPPORT ,Extended media bus support" "Not supported,Supported" bitfld.long 0x00 16.--17. " MAXBLKLEN ,Maximum block size" "512byte,1024byte,2048byte,4096byte" textline " " hexmask.long.byte 0x00 8.--15. 1. " BASECLKFREQ ,Base clock frequency" bitfld.long 0x00 7. " TIMEOUTCLKUNIT ,Timeout clock unit" "KHz,MHz" bitfld.long 0x00 0.--5. " TIMEOUTCLKFREQ ,Timeout clock frequency (KHz/MHz)" "Other source,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" rgroup.long 0x44++0x03 line.long 0x00 "CAPABILITIES,Host Controller Implementation Register (part 2)" bitfld.long 0x00 25. " SPIBLKMODE ,SPI block mode support" "Nor supported,Supported" bitfld.long 0x00 24. " SPISUPPORT ,SPI mode support" "Nor supported,Supported" hexmask.long.byte 0x00 16.--23. 1. " CLCKMUL ,Clock multiplier" textline " " bitfld.long 0x00 14.--15. " RETUNINGMODES ,Re-tuning mode" "Mode 1,Mode 2,Mode 3,?..." bitfld.long 0x00 13. " TUNINGFORSDR50 ,Tuning for SDR50" "Not required,Required" bitfld.long 0x00 8.--11. " RETUNINGTIMERCNT ,Initial re-tuning timer value for modes 1 to 3 (Seconds)" "Other source,1,2,4,8,16,32,64,128,256,512,1024,?..." textline " " bitfld.long 0x00 6. " DDRIVERSUP ,Driver type D support" "Not supported,Supported" bitfld.long 0x00 5. " CDRIVERSUPPORT ,Driver type C support" "Not supported,Supported" bitfld.long 0x00 4. " ADRIVERSUPPORT ,Driver type A support" "Not supported,Supported" textline " " bitfld.long 0x00 2. " DDR50SUPPORT ,DDR50 support" "Not supported,Supported" bitfld.long 0x00 1. " SDR104SUPPORT ,SDR104 support" "Not supported,Supported" bitfld.long 0x00 0. " SDR50SUPPORT ,SDR50 support" "Not supported,Supported" rgroup.long 0x48++0x03 line.long 0x00 "MAXCURRENTCAP,Maximum Current Capability Register" hexmask.long.byte 0x00 16.--23. 1. " MAXCURRENT1P8V ,Maximum current capability for 1.8V" hexmask.long.byte 0x00 8.--15. 1. " MAXCURRENT3P0V ,Maximum current capability for 3.0V" hexmask.long.byte 0x00 0.--7. 1. " MAXCURRENT3P3V ,Maximum current capability for 3.3V" wgroup.word 0x50++0x01 line.word 0x00 "FEERR_ST,Force Event For Auto CMD Error Status Register" bitfld.word 0x00 7. " FCMDNIBACMD_12ERR ,Force event for command not issued by AUTO CMD12 error" "No interrupt,Interrupt" bitfld.word 0x00 4. " INDEXERR ,Force event for AUTO CMD index error" "No interrupt,Interrupt" bitfld.word 0x00 3. " ENDBITERR ,Force event for AUTO CMD end bit error" "No interrupt,Interrupt" textline " " bitfld.word 0x00 2. " CRCERR ,Force event for AUTO CMD CRC error" "No interrupt,Interrupt" bitfld.word 0x00 1. " TIMEOUTERR ,Force event for AUTO CMD timeout error" "No interrupt,Interrupt" bitfld.word 0x00 0. " NOTEXEC ,Force event for AUTO CMD12 not executed" "No interrupt,Interrupt" group.word 0x52++0x01 line.word 0x00 "FEF_ERRINTSTS,Force Event For Error Interrupt Status Register" rbitfld.word 0x00 10. " TUNINGERR ,Force event for tuning error" "No interrupt,Interrupt" bitfld.word 0x00 9. " ADMAERR ,Force event for ADMA error" "No interrupt,Interrupt" bitfld.word 0x00 8. " AUTOCMDERR ,Force event for auto CMD error" "No interrupt,Interrupt" textline " " bitfld.word 0x00 7. " CURRLIMERR ,Force event for current limit error" "No interrupt,Interrupt" bitfld.word 0x00 6. " DATENDBITERR ,Force event for data end bit error" "No interrupt,Interrupt" bitfld.word 0x00 5. " DATCRCERR ,Force event for data CRC error" "No interrupt,Interrupt" textline " " bitfld.word 0x00 4. " DATTIMEOUTERR ,Force event for data timeout error" "No interrupt,Interrupt" bitfld.word 0x00 3. " CMDINDEXERR ,Force event for command index error" "No interrupt,Interrupt" bitfld.word 0x00 2. " CMDENDBITERR ,Force event for command end bit error" "No interrupt,Interrupt" textline " " bitfld.word 0x00 1. " CMDCRCERR ,Force event for command CRC error" "No interrupt,Interrupt" bitfld.word 0x00 0. " CMDTIMEOUTERR ,Force event for CMD timeout error" "No interrupt,Interrupt" rgroup.byte 0x54++0x00 line.byte 0x00 "ADMAERRSTS,ADMA Error Status Register" bitfld.byte 0x00 2. " ADMALENMIMATCHERR ,Length mismatche error" "No error,Error" bitfld.byte 0x00 0.--1. " ADMAERRSTS_ADMAERRORSTATE ,ADMA state on data transfer error" "ST_STOP,ST_FDS,,ST_TFR" group.word 0x58++0x01 line.word 0x00 "ADMASYSADDR0,Physical Address Used For ADMA Data Transfer Register 0" group.word 0x5A++0x01 line.word 0x00 "ADMASYSADDR1,Physical Address Used For ADMA Data Transfer Register 1" group.word 0x5C++0x01 line.word 0x00 "ADMASYSADDR2,Physical Address Used For ADMA Data Transfer Register 2" group.word 0x5E++0x01 line.word 0x00 "ADMASYSADDR3,Physical Address Used For ADMA Data Transfer Register 3" if (((d.w(ad:0xFF170000+0x3E)&0x08))==0x00) rgroup.word 0x60++0x01 line.word 0x00 "PRESETVALUE0,Preset Value 0 Register" bitfld.word 0x00 14.--15. " DRIVER_STRSELVAL ,Driver strength select value " "Driver type B,Driver type A,Driver type C,Driver type D" bitfld.word 0x00 10. " CLCK_GENSELVAL ,Clock generator select value" "Compatible clock,Programmable clock" hexmask.word 0x00 0.--9. 1. " SDCLK_FREQSELVAL ,SDCLK frequency select value" else rgroup.word 0x60++0x01 line.word 0x00 "PRESETVALUE0,Preset Value 0 Register" bitfld.word 0x00 10. " CLCK_GENSELVAL ,Clock generator select value" "Compatible clock,Programmable clock" hexmask.word 0x00 0.--9. 1. " SDCLK_FREQSELVAL ,SDCLK frequency select value" endif if (((d.w(ad:0xFF170000+0x3E)&0x08))==0x00) rgroup.word 0x62++0x01 line.word 0x00 "PRESETVALUE1,Preset Value 1 Register" bitfld.word 0x00 14.--15. " DRIVER_STRSELVAL ,Driver strength select value for Default Speed" "Driver type B,Driver type A,Driver type C,Driver type D" bitfld.word 0x00 10. " CLCK_GENSELVAL ,Clock generator select value" "Compatible clock,Programmable clock" hexmask.word 0x00 0.--9. 1. " SDCLK_FREQSELVAL ,SDCLK frequency select value" else rgroup.word 0x62++0x01 line.word 0x00 "PRESETVALUE1,Preset Value 1 Register" bitfld.word 0x00 10. " CLCK_GENSELVAL ,Clock generator select value" "Compatible clock,Programmable clock" hexmask.word 0x00 0.--9. 1. " SDCLK_FREQSELVAL ,SDCLK frequency select value" endif if (((d.w(ad:0xFF170000+0x3E)&0x08))==0x00) rgroup.word 0x64++0x01 line.word 0x00 "PRESETVALUE2,Preset Value 2 Register" bitfld.word 0x00 14.--15. " DRIVER_STRSELVAL ,Driver strength select value for High Speed" "Driver type B,Driver type A,Driver type C,Driver type D" bitfld.word 0x00 10. " CLCK_GENSELVAL ,Clock generator select value" "Compatible clock,Programmable clock" hexmask.word 0x00 0.--9. 1. " SDCLK_FREQSELVAL ,SDCLK frequency select value" else rgroup.word 0x64++0x01 line.word 0x00 "PRESETVALUE2,Preset Value 2 Register" bitfld.word 0x00 10. " CLCK_GENSELVAL ,Clock generator select value" "Compatible clock,Programmable clock" hexmask.word 0x00 0.--9. 1. " SDCLK_FREQSELVAL ,SDCLK frequency select value" endif if (((d.w(ad:0xFF170000+0x3E)&0x08))==0x00) rgroup.word 0x66++0x01 line.word 0x00 "PRESETVALUE3,Preset Value 3 Register" bitfld.word 0x00 14.--15. " DRIVER_STRSELVAL ,Driver strength select value for SDR12" "Driver type B,Driver type A,Driver type C,Driver type D" bitfld.word 0x00 10. " CLCK_GENSELVAL ,Clock generator select value" "Compatible clock,Programmable clock" hexmask.word 0x00 0.--9. 1. " SDCLK_FREQSELVAL ,SDCLK frequency select value" else rgroup.word 0x66++0x01 line.word 0x00 "PRESETVALUE3,Preset Value 3 Register" bitfld.word 0x00 10. " CLCK_GENSELVAL ,Clock generator select value" "Compatible clock,Programmable clock" hexmask.word 0x00 0.--9. 1. " SDCLK_FREQSELVAL ,SDCLK frequency select value" endif if (((d.w(ad:0xFF170000+0x3E)&0x08))==0x00) rgroup.word 0x68++0x01 line.word 0x00 "PRESETVALUE4,Preset Value 4 Register" bitfld.word 0x00 14.--15. " DRIVER_STRSELVAL ,Driver strength select value for SDR25" "Driver type B,Driver type A,Driver type C,Driver type D" bitfld.word 0x00 10. " CLCK_GENSELVAL ,Clock generator select value" "Compatible clock,Programmable clock" hexmask.word 0x00 0.--9. 1. " SDCLK_FREQSELVAL ,SDCLK frequency select value" else rgroup.word 0x68++0x01 line.word 0x00 "PRESETVALUE4,Preset Value 4 Register" bitfld.word 0x00 10. " CLCK_GENSELVAL ,Clock generator select value" "Compatible clock,Programmable clock" hexmask.word 0x00 0.--9. 1. " SDCLK_FREQSELVAL ,SDCLK frequency select value" endif if (((d.w(ad:0xFF170000+0x3E)&0x08))==0x00) rgroup.word 0x6A++0x01 line.word 0x00 "PRESETVALUE5,Preset Value 5 Register" bitfld.word 0x00 14.--15. " DRIVER_STRSELVAL ,Driver strength select value for SDR50" "Driver type B,Driver type A,Driver type C,Driver type D" bitfld.word 0x00 10. " CLCK_GENSELVAL ,Clock generator select value" "Compatible clock,Programmable clock" hexmask.word 0x00 0.--9. 1. " SDCLK_FREQSELVAL ,SDCLK frequency select value" else rgroup.word 0x6A++0x01 line.word 0x00 "PRESETVALUE5,Preset Value 5 Register" bitfld.word 0x00 10. " CLCK_GENSELVAL ,Clock generator select value" "Compatible clock,Programmable clock" hexmask.word 0x00 0.--9. 1. " SDCLK_FREQSELVAL ,SDCLK frequency select value" endif if (((d.w(ad:0xFF170000+0x3E)&0x08))==0x00) rgroup.word 0x6C++0x01 line.word 0x00 "PRESETVALUE6,Preset Value 6 Register" bitfld.word 0x00 14.--15. " DRIVER_STRSELVAL ,Driver strength select value for SDR 104" "Driver type B,Driver type A,Driver type C,Driver type D" bitfld.word 0x00 10. " CLCK_GENSELVAL ,Clock generator select value" "Compatible clock,Programmable clock" hexmask.word 0x00 0.--9. 1. " SDCLK_FREQSELVAL ,SDCLK frequency select value" else rgroup.word 0x6C++0x01 line.word 0x00 "PRESETVALUE6,Preset Value 6 Register" bitfld.word 0x00 10. " CLCK_GENSELVAL ,Clock generator select value" "Compatible clock,Programmable clock" hexmask.word 0x00 0.--9. 1. " SDCLK_FREQSELVAL ,SDCLK frequency select value" endif if (((d.w(ad:0xFF170000+0x3E)&0x08))==0x00) rgroup.word 0x6E++0x01 line.word 0x00 "PRESETVALUE7,Preset Value 7 Register" bitfld.word 0x00 14.--15. " DRIVER_STRSELVAL ,Driver strength select value for DDR50" "Driver type B,Driver type A,Driver type C,Driver type D" bitfld.word 0x00 10. " CLCK_GENSELVAL ,Clock generator select value" "Compatible clock,Programmable clock" hexmask.word 0x00 0.--9. 1. " SDCLK_FREQSELVAL ,SDCLK frequency select value" else rgroup.word 0x6E++0x01 line.word 0x00 "PRESETVALUE7,Preset Value 7 Register" bitfld.word 0x00 10. " CLCK_GENSELVAL ,Clock generator select value" "Compatible clock,Programmable clock" hexmask.word 0x00 0.--9. 1. " SDCLK_FREQSELVAL ,SDCLK frequency select value" endif group.long 0x70++0x03 line.long 0x00 "BOOTTIMEOUTCNT,Boot Timeout Value Counter Program Register" textline " " rgroup.word 0xFC++0x03 line.word 0x00 "SLOTINTRSTS,Interrupt Signal For Each Slot Read Register" bitfld.word 0x00 7. " SLOTINTRSTS[7] ,Logical OR of interrupt signal and wakeup signal for slot 7" "No interrupt,Interrupt" bitfld.word 0x00 6. " [6] ,Logical OR of interrupt signal and wakeup signal for slot 6" "No interrupt,Interrupt" bitfld.word 0x00 5. " [5] ,Logical OR of interrupt signal and wakeup signal for slot 5" "No interrupt,Interrupt" bitfld.word 0x00 4. " [4] ,Logical OR of interrupt signal and wakeup signal for slot 4" "No interrupt,Interrupt" textline " " bitfld.word 0x00 3. " [3] ,Logical OR of interrupt signal and wakeup signal for slot 3" "No interrupt,Interrupt" bitfld.word 0x00 2. " [2] ,Logical OR of interrupt signal and wakeup signal for slot 2" "No interrupt,Interrupt" bitfld.word 0x00 1. " [1] ,Logical OR of interrupt signal and wakeup signal for slot 1" "No interrupt,Interrupt" bitfld.word 0x00 0. " [0] ,Logical OR of interrupt signal and wakeup signal for slot 0" "No interrupt,Interrupt" line.word 0x02 "HOSTCVER,Host Controller Version Register" hexmask.word.byte 0x02 8.--15. 1. " SDHC_VENVERNUM ,Vendor version number" hexmask.word.byte 0x02 0.--7. 1. " SPEC_VER_NUM ,Specification version number" width 0x0B tree.end tree.end tree "SERDES (Serializer/deserializer)" base ad:0xFD400000 width 28. group.long (0x0+0x34)++0x03 line.long 0x00 "L0_TX_ANA_TM_13,Override For MPHY TX Tristate And Polarity Inversion Register" bitfld.long 0x00 3. " TX_SWAP_POLARITY ,Polarity inversion" "Not inverted,Inverted" bitfld.long 0x00 2. " FORCE_TX_SWAP_POLARITY ,Polarity inversion enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MPHY_TX_TRISTATE ,MPHY TX tristate" "Disabled,Enabled" bitfld.long 0x00 0. " FORCE_MPHY_TX_TRISTATE ,MPHY TX tristate enable" "Disabled,Enabled" group.long (0x0+0x48)++0x03 line.long 0x00 "L0_TX_ANA_TM_18,Override For PIPE TX de-emphasis Register" hexmask.long.byte 0x00 0.--7. 1. " PIPE_TX_DEEMPH_7_0 ,PIPE TX de-emphasis" group.long (0x0+0xF4)++0x03 line.long 0x00 "L0_TX_DIG_TM_61,MPHY PLL Gear And Bypass Scrambler Register" bitfld.long 0x00 6.--7. " MPHY_PLL_GEAR ,MPHY's PLL gear" "Gear 1,Gear 2,Gear 3,?..." bitfld.long 0x00 3. " BYPASS_ENC ,Encoder bypass signal enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " BYPASS_SCRAM ,Bypass scrambler signal" "Disabled,Enabled" bitfld.long 0x00 0. " FORCE_BYPASS_SCRAM ,Scrambler bypass signal enable" "Disabled,Enabled" group.long (0x0+0x1D4)++0x07 line.long 0x00 "L0_TX_ANA_TM_117,PCIe-4x, PCIe-2x, And DP-2x Enable Register" bitfld.long 0x00 5. " TX_PCIE_4X_CFG_EN ,PCIe 4x multilane mode" "Disabled,Enabled" bitfld.long 0x00 4. " FORCE_TX_PCIE_4X_CFG_EN ,Test register force for enabling/disabling PCIe 4x multilane mode" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " TX_PCIE_2X_CFG_EN ,PCIe 2x multilane mode" "Disabled,Enabled" bitfld.long 0x00 2. " FORCE_TX_PCIE_2X_CFG_EN ,Test register force for enabling/disabling PCIe 2x multilane mode" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " TX_DP_MULTILANE_CFG_EN ,DP multilane mode" "Disabled,Enabled" bitfld.long 0x00 0. " FORCE_TX_DP_MULTILANE_CFG_EN ,Test register force for enabling/disabling DP multilane mode" "Disabled,Enabled" line.long 0x04 "L0_TX_ANA_TM_118,TX Deemphasis Override Enable Register" bitfld.long 0x04 3. " FORCE_TX_DEEMPH_17_12 ,Test register force for enabling/disabling TX deemphasis bits <17:12>" "Disabled,Enabled" bitfld.long 0x04 2. " FORCE_TX_DEEMPH_11_6 ,Test register force for enabling/disabling TX deemphasis bits <11:6>" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " FORCE_TX_DEEMPH_5_0 ,Test register force for enabling/disabling TX deemphasis bits <5:0>" "Disabled,Enabled" bitfld.long 0x04 0. " FORCE_TX_DEEMPH_17_0 ,Test register force for enabling/disabling TX deemphasis bits <17:0>" "Disabled,Enabled" if (((d.l(ad:0xFD400000+0xB00+0x0)&0xF0))==0x00) group.long (0x0+0xB00)++0x03 line.long 0x00 "L0_TXPMA_ST_0,Opmode Info Register" bitfld.long 0x00 4.--7. " TX_PHY_MODE ,PHY mode" "PCIe,USB3,SATA,,SGMII,DP,,,MPHY,?..." bitfld.long 0x00 0.--3. " TX_PHY_GEAR ,PHY gear" ",Gen1,Gen2,Gen3,?..." elif (((d.l(ad:0xFD400000+0xB00+0x0)&0xF0))==0x10)||(((d.l(ad:0xFD400000+0xB00+0x0)&0xF0))==0x40) group.long (0x0+0xB00)++0x03 line.long 0x00 "L0_TXPMA_ST_0,Opmode Info Register" bitfld.long 0x00 4.--7. " TX_PHY_MODE ,PHY mode" "PCIe,USB3,SATA,,SGMII,DP,,,MPHY,?..." bitfld.long 0x00 0.--3. " TX_PHY_GEAR ,PHY gear" "SS data,?..." elif (((d.l(ad:0xFD400000+0xB00+0x0)&0xF0))==0x20) group.long (0x0+0xB00)++0x03 line.long 0x00 "L0_TXPMA_ST_0,Opmode Info Register" bitfld.long 0x00 4.--7. " TX_PHY_MODE ,PHY mode" "PCIe,USB3,SATA,,SGMII,DP,,,MPHY,?..." bitfld.long 0x00 0.--3. " TX_PHY_GEAR ,PHY gear" ",G1,G2,G3,?..." elif (((d.l(ad:0xFD400000+0xB00+0x0)&0xF0))==0x50) group.long (0x0+0xB00)++0x03 line.long 0x00 "L0_TXPMA_ST_0,Opmode Info Register" bitfld.long 0x00 4.--7. " TX_PHY_MODE ,PHY mode" "PCIe,USB3,SATA,,SGMII,DP,,,MPHY,?..." bitfld.long 0x00 0.--3. " TX_PHY_GEAR ,PHY gear" ",RBR,HBR,HBR2,?..." elif (((d.l(ad:0xFD400000+0xB00+0x0)&0xF0))==0x80) group.long (0x0+0xB00)++0x03 line.long 0x00 "L0_TXPMA_ST_0,Opmode Info Register" bitfld.long 0x00 4.--7. " TX_PHY_MODE ,PHY mode" "PCIe,USB3,SATA,,SGMII,DP,,,MPHY,?..." bitfld.long 0x00 0.--3. " TX_PHY_GEAR ,PHY gear" ",LS,G1A,G1B,G2A,G2B,G3A,G3B,?..." else group.long (0x0+0xB00)++0x03 line.long 0x00 "L0_TXPMA_ST_0,Opmode Info Register" bitfld.long 0x00 4.--7. " TX_PHY_MODE ,PHY mode" "PCIe,USB3,SATA,,SGMII,DP,,,MPHY,?..." endif rgroup.long (0x0+0xB0C)++0x03 line.long 0x00 "L0_TXPMA_ST_3,Lower Segment DN Resistor Calibration Code Register" bitfld.long 0x00 6.--7. " ANA_ST3_7_6_SPARE ,SPARE" "0,1,2,3" bitfld.long 0x00 0.--5. " TX_LSEG_DN_RESCAL_CODE ,Lower segment DN resistor calibration code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" rgroup.long (0x0+0xB10)++0x03 line.long 0x00 "L0_TXPMA_ST_4,Upper Segment DP Resistor Calibration Code Register" bitfld.long 0x00 6.--7. " ANA_ST4_7_6_SPARE ,SPARE" "0,1,2,3" bitfld.long 0x00 0.--5. " TX_USEG_DP_RESCAL_CODE ,Upper segment DP resistor calibration code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long (0x0+0xCB4)++0x03 line.long 0x00 "L0_TXPMD_TM_45,Post Or Pre Or Main DP Path Selection Register" bitfld.long 0x00 5. " DP_TM_TX_DP_EN_POST2_PATH ,Enable/disable DP post2 path" "Disabled,Enabled" bitfld.long 0x00 4. " DP_TM_TX_OVRD_DP_EN_POST2_PATH ,Override enable/disable of DP post2 path" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " DP_TM_TX_DP_EN_POST1_PATH ,Enable/disable DP post1 path" "Disabled,Enabled" bitfld.long 0x00 2. " DP_TM_TX_OVRD_DP_EN_POST1_PATH ,Override enable/disable of DP post1 path" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " DP_TM_TX_DP_EN_MAIN_PATH ,Enable/disable DP main path" "Disabled,Enabled" bitfld.long 0x00 0. " DP_TM_TX_OVRD_DP_EN_MAIN_PATH ,Override enable/disable of DP main path" "Disabled,Enabled" group.long (0x0+0xCC0)++0x03 line.long 0x00 "L0_TXPMD_TM_48,Margining Factor Register" bitfld.long 0x00 5. " TM_FORCE_RES_MARG_FACTOR ,Enable/disable test register force for margining factore value" "Disabled,Enabled" bitfld.long 0x00 0.--4. " TM_RES_MARG_FACTOR ,Margining factor value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long (0x0+0x106C)++0x03 line.long 0x00 "L0_TM_DIG_6,Data Path Test Modes In Decoder And Descram Register" bitfld.long 0x00 6. " FORCE_BYPASS_ON_ERR ,Enable bypass for <7:0> TM_DIG_CTRL_7" "Disabled,Enabled" bitfld.long 0x00 5. " SUPPRESS_ERR ,Suppress error in 8b10b decoder" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " BYPASS_OHC ,Bypass ONE HOT CODER" "Disabled,Enabled" bitfld.long 0x00 3. " BYPASS_DECODER ,Bypass 8b10b decoder" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " FORCE_BYPASS_DEC ,Enable bypass for <3> TM_DIG_CTRL_6" "Disabled,Enabled" bitfld.long 0x00 1. " BYPASS_DESCRAM ,Bypass descrambler" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " FORCE_BYPASS_DESCRAM ,Enable bypass for <1> TM_DIG_CTRL_6" "Disabled,Enabled" group.long (0x0+0x10CC)++0x03 line.long 0x00 "L0_TM_AUX_0,Spare Register" hexmask.long.byte 0x00 0.--7. 1. " SPARE ,Spare" group.long (0x0+0x2094)++0x03 line.long 0x00 "L0_TM_PLL_DIG_37,Test Mode Register 37" hexmask.long.byte 0x00 5.--7. 1. " TM_COARSE_CODE_SAT_VAL_LSB ,Bits [2:0] of coarse code saturation value lsbs" bitfld.long 0x00 4. " TM_EN_COARSE_SATUR ,Enable/disable coarse code saturation limiting logic" "Disabled,Enabled" textline " " bitfld.long 0x00 2.--3. " W_SPARE_OUTPUTS ,Output spare ports going to PLL PMA" "0,1,2,3" bitfld.long 0x00 1. " TM_FORCE_EN_IP_DIV_BYP ,Enable/disable test mode force to control ip_divider bypass" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " TM_EN_IP_DIV_BYP ,Forced value of ip_divider bypass" "Disabled,Enabled" group.long (0x0+0x2360)++0x03 line.long 0x00 "L0_PLL_FBDIV_FRAC_3_MSB,Fractional Feedback Division Control And Fractional Value For Feedback Division Bits 26:24 Register" bitfld.long 0x00 6. " TM_FORCE_EN_FRAC ,Enable test mode force on fractional mode enable" "Disabled,Enabled" bitfld.long 0x00 5. " TM_EN_FRAC ,Forced value of fractional mode enable" "Disabled,Enabled" textline " " hexmask.long.byte 0x00 0.--2. 1. " FBDIV_FRAC_3_MSB ,Fractional value for feedback division [26:24]" group.long (0x0+0x2368)++0x17 line.long 0x00 "L0_PLL_SS_STEPS_0_LSB,Spread Spectrum No Of Steps Lsb Register" hexmask.long.byte 0x00 0.--7. 1. " SS_NUM_OF_STEPS_0_LSB ,Spread spectrum no of steps [7:0]" line.long 0x04 "L0_PLL_SS_STEPS_1_MSB,Spread Spectrum No Of Steps Msb Register" hexmask.long.byte 0x04 0.--2. 1. " SS_NUM_OF_STEPS_1_MSB ,Spread spectrum no of steps [10:8]" line.long 0x08 "L0_PPLL_SS_STEP_SIZE_0_LSB,Step Size For Spread Spectrum Register 0" hexmask.long.byte 0x08 0.--7. 1. " SS_STEP_SIZE_0_LSB ,Step size for spread spectrum [7:0]" line.long 0x0C "L0_PPLL_SS_STEP_SIZE_1,Step Size For Spread Spectrum Register 1" hexmask.long.byte 0x0C 0.--7. 1. " SS_STEP_SIZE_1 ,Step size for spread spectrum [15:8]" line.long 0x10 "L0_PPLL_SS_STEP_SIZE_2,Step Size For Spread Spectrum Register 2" hexmask.long.byte 0x10 0.--7. 1. " SS_STEP_SIZE_2 ,Step size for spread spectrum [23:16]" line.long 0x14 "L0_PPLL_SS_STEP_SIZE_3,Step Size For Spread Spectrum Register 3" bitfld.long 0x14 7. " TM_FORCE_EN_SS ,Enable test mode forcing on enable spread spectrum" "Disabled,Enabled" bitfld.long 0x14 6. " TM_EN_SS ,Test mode forced value of enable spread spectrum" "Disabled,Enabled" textline " " bitfld.long 0x14 5. " FORCE_SS_NUM_OF_STEPS ,Enable/disable test mode force on SS no of steps" "Disabled,Enabled" bitfld.long 0x14 4. " FORCE_SS_STEP_SIZE ,Enable/disable test mode force on SS step size" "Disabled,Enabled" textline " " bitfld.long 0x14 2.--3. " SS_SPREAD_TYPE ,Spread type for spread spectrum" "Down,Up,Center,?..." hexmask.long.byte 0x14 0.--1. 1. " SS_STEP_SIZE_3_MSB ,Step size for spread spectrum [25:24]" rgroup.long (0x0+0x23E4)++0x03 line.long 0x00 "L0_PLL_STATUS_READ_1,PLL Status Read Register 1" bitfld.long 0x00 5. " PLL_START_LOOP_STAT_RD ,Status read value of PLL start loop" "No loop,Loop" bitfld.long 0x00 4. " PLL_LOCK_STAT_RD ,Status read value of PLL lock" "Not locked,Locked" textline " " bitfld.long 0x00 3. " PLL_COARSE_DONE_STAT_RD ,Status read value of PLL coarse done" "Not done,Done" hexmask.long.byte 0x00 0.--2. 1. " PLL_COARSE_CODE_MSB_STAT_RD ,Status read value of PLL coarse code [10:8]" group.long (0x0+0x2860)++0x0F line.long 0x00 "L0_L0_REF_CLK_SEL,Lane0 Ref Clock Selection Register" bitfld.long 0x00 7. " L0_REF_CLK_LCL_SEL ,Lane 0 ref clock local mux select" "Ref clock,Slicer" bitfld.long 0x00 3. " L0_REF_CLK_SEL_3 ,Select lane 3 slicer output from ref clock network" "Not selected,Selected" textline " " bitfld.long 0x00 2. " L0_REF_CLK_SEL_2 ,Select lane 2 slicer output from ref clock network" "Not selected,Selected" bitfld.long 0x00 1. " L0_REF_CLK_SEL_1 ,Select lane 1 slicer output from ref clock network" "Not selected,Selected" textline " " bitfld.long 0x00 0. " L0_REF_CLK_SEL_0 ,Select lane 0 slicer output from ref clock network" "Not selected,Selected" line.long 0x04 "L0_L1_REF_CLK_SEL,Lane1 Ref Clock Selection Register" bitfld.long 0x04 7. " L1_REF_CLK_LCL_SEL ,Lane 1 ref clock local mux select" "Ref clock,Slicer" bitfld.long 0x04 3. " L1_REF_CLK_SEL_3 ,Select lane 3 slicer output from ref clock network" "Not selected,Selected" textline " " bitfld.long 0x04 2. " L1_REF_CLK_SEL_2 ,Select lane 2 slicer output from ref clock network" "Not selected,Selected" bitfld.long 0x04 1. " L1_REF_CLK_SEL_1 ,Select lane 1 slicer output from ref clock network" "Not selected,Selected" textline " " bitfld.long 0x04 0. " L1_REF_CLK_SEL_0 ,Select lane 0 slicer output from ref clock network" "Not selected,Selected" line.long 0x08 "L0_L2_REF_CLK_SEL,Lane2 Ref Clock Selection Register" bitfld.long 0x08 7. " L2_REF_CLK_LCL_SEL ,Lane 2 ref clock local mux select" "Ref clock,Slicer" bitfld.long 0x08 3. " L2_REF_CLK_SEL_3 ,Select lane 3 slicer output from ref clock network" "Not selected,Selected" textline " " bitfld.long 0x08 2. " L2_REF_CLK_SEL_2 ,Select lane 2 slicer output from ref clock network" "Not selected,Selected" bitfld.long 0x08 1. " L2_REF_CLK_SEL_1 ,Select lane 1 slicer output from ref clock network" "Not selected,Selected" textline " " bitfld.long 0x08 0. " L2_REF_CLK_SEL_0 ,Select lane 0 slicer output from ref clock network" "Not selected,Selected" line.long 0x0C "L0_L3_REF_CLK_SEL,Lane3 Ref Clock Selection Register" bitfld.long 0x0C 7. " L3_REF_CLK_LCL_SEL ,Lane 3 ref clock local mux select" "Ref clock,Slicer" bitfld.long 0x0C 3. " L3_REF_CLK_SEL_3 ,Select lane 3 slicer output from ref clock network" "Not selected,Selected" textline " " bitfld.long 0x0C 2. " L3_REF_CLK_SEL_2 ,Select lane 2 slicer output from ref clock network" "Not selected,Selected" bitfld.long 0x0C 1. " L3_REF_CLK_SEL_1 ,Select lane 1 slicer output from ref clock network" "Not selected,Selected" textline " " bitfld.long 0x0C 0. " L3_REF_CLK_SEL_0 ,Select lane 0 slicer output from ref clock network" "Not selected,Selected" group.long (0x4000+0x34)++0x03 line.long 0x00 "L1_TX_ANA_TM_13,Override For MPHY TX Tristate And Polarity Inversion Register" bitfld.long 0x00 3. " TX_SWAP_POLARITY ,Polarity inversion" "Not inverted,Inverted" bitfld.long 0x00 2. " FORCE_TX_SWAP_POLARITY ,Polarity inversion enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MPHY_TX_TRISTATE ,MPHY TX tristate" "Disabled,Enabled" bitfld.long 0x00 0. " FORCE_MPHY_TX_TRISTATE ,MPHY TX tristate enable" "Disabled,Enabled" group.long (0x4000+0x48)++0x03 line.long 0x00 "L1_TX_ANA_TM_18,Override For PIPE TX de-emphasis Register" hexmask.long.byte 0x00 0.--7. 1. " PIPE_TX_DEEMPH_7_0 ,PIPE TX de-emphasis" group.long (0x4000+0xF4)++0x03 line.long 0x00 "L1_TX_DIG_TM_61,MPHY PLL Gear And Bypass Scrambler Register" bitfld.long 0x00 6.--7. " MPHY_PLL_GEAR ,MPHY's PLL gear" "Gear 1,Gear 2,Gear 3,?..." bitfld.long 0x00 3. " BYPASS_ENC ,Encoder bypass signal enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " BYPASS_SCRAM ,Bypass scrambler signal" "Disabled,Enabled" bitfld.long 0x00 0. " FORCE_BYPASS_SCRAM ,Scrambler bypass signal enable" "Disabled,Enabled" group.long (0x4000+0x1D4)++0x07 line.long 0x00 "L1_TX_ANA_TM_117,PCIe-4x, PCIe-2x, And DP-2x Enable Register" bitfld.long 0x00 5. " TX_PCIE_4X_CFG_EN ,PCIe 4x multilane mode" "Disabled,Enabled" bitfld.long 0x00 4. " FORCE_TX_PCIE_4X_CFG_EN ,Test register force for enabling/disabling PCIe 4x multilane mode" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " TX_PCIE_2X_CFG_EN ,PCIe 2x multilane mode" "Disabled,Enabled" bitfld.long 0x00 2. " FORCE_TX_PCIE_2X_CFG_EN ,Test register force for enabling/disabling PCIe 2x multilane mode" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " TX_DP_MULTILANE_CFG_EN ,DP multilane mode" "Disabled,Enabled" bitfld.long 0x00 0. " FORCE_TX_DP_MULTILANE_CFG_EN ,Test register force for enabling/disabling DP multilane mode" "Disabled,Enabled" line.long 0x04 "L1_TX_ANA_TM_118,TX Deemphasis Override Enable Register" bitfld.long 0x04 3. " FORCE_TX_DEEMPH_17_12 ,Test register force for enabling/disabling TX deemphasis bits <17:12>" "Disabled,Enabled" bitfld.long 0x04 2. " FORCE_TX_DEEMPH_11_6 ,Test register force for enabling/disabling TX deemphasis bits <11:6>" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " FORCE_TX_DEEMPH_5_0 ,Test register force for enabling/disabling TX deemphasis bits <5:0>" "Disabled,Enabled" bitfld.long 0x04 0. " FORCE_TX_DEEMPH_17_0 ,Test register force for enabling/disabling TX deemphasis bits <17:0>" "Disabled,Enabled" if (((d.l(ad:0xFD400000+0xB00+0x4000)&0xF0))==0x00) group.long (0x4000+0xB00)++0x03 line.long 0x00 "L1_TXPMA_ST_0,Opmode Info Register" bitfld.long 0x00 4.--7. " TX_PHY_MODE ,PHY mode" "PCIe,USB3,SATA,,SGMII,DP,,,MPHY,?..." bitfld.long 0x00 0.--3. " TX_PHY_GEAR ,PHY gear" ",Gen1,Gen2,Gen3,?..." elif (((d.l(ad:0xFD400000+0xB00+0x4000)&0xF0))==0x10)||(((d.l(ad:0xFD400000+0xB00+0x4000)&0xF0))==0x40) group.long (0x4000+0xB00)++0x03 line.long 0x00 "L1_TXPMA_ST_0,Opmode Info Register" bitfld.long 0x00 4.--7. " TX_PHY_MODE ,PHY mode" "PCIe,USB3,SATA,,SGMII,DP,,,MPHY,?..." bitfld.long 0x00 0.--3. " TX_PHY_GEAR ,PHY gear" "SS data,?..." elif (((d.l(ad:0xFD400000+0xB00+0x4000)&0xF0))==0x20) group.long (0x4000+0xB00)++0x03 line.long 0x00 "L1_TXPMA_ST_0,Opmode Info Register" bitfld.long 0x00 4.--7. " TX_PHY_MODE ,PHY mode" "PCIe,USB3,SATA,,SGMII,DP,,,MPHY,?..." bitfld.long 0x00 0.--3. " TX_PHY_GEAR ,PHY gear" ",G1,G2,G3,?..." elif (((d.l(ad:0xFD400000+0xB00+0x4000)&0xF0))==0x50) group.long (0x4000+0xB00)++0x03 line.long 0x00 "L1_TXPMA_ST_0,Opmode Info Register" bitfld.long 0x00 4.--7. " TX_PHY_MODE ,PHY mode" "PCIe,USB3,SATA,,SGMII,DP,,,MPHY,?..." bitfld.long 0x00 0.--3. " TX_PHY_GEAR ,PHY gear" ",RBR,HBR,HBR2,?..." elif (((d.l(ad:0xFD400000+0xB00+0x4000)&0xF0))==0x80) group.long (0x4000+0xB00)++0x03 line.long 0x00 "L1_TXPMA_ST_0,Opmode Info Register" bitfld.long 0x00 4.--7. " TX_PHY_MODE ,PHY mode" "PCIe,USB3,SATA,,SGMII,DP,,,MPHY,?..." bitfld.long 0x00 0.--3. " TX_PHY_GEAR ,PHY gear" ",LS,G1A,G1B,G2A,G2B,G3A,G3B,?..." else group.long (0x4000+0xB00)++0x03 line.long 0x00 "L1_TXPMA_ST_0,Opmode Info Register" bitfld.long 0x00 4.--7. " TX_PHY_MODE ,PHY mode" "PCIe,USB3,SATA,,SGMII,DP,,,MPHY,?..." endif rgroup.long (0x4000+0xB10)++0x03 line.long 0x00 "L1_TXPMA_ST_4,Upper Segment DP Resistor Calibration Code Register" bitfld.long 0x00 6.--7. " ANA_ST4_7_6_SPARE ,SPARE" "0,1,2,3" bitfld.long 0x00 0.--5. " TX_USEG_DP_RESCAL_CODE ,Upper segment DP resistor calibration code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long (0x4000+0xCB4)++0x03 line.long 0x00 "L1_TXPMD_TM_45,Post Or Pre Or Main DP Path Selection Register" bitfld.long 0x00 5. " DP_TM_TX_DP_EN_POST2_PATH ,Enable/disable DP post2 path" "Disabled,Enabled" bitfld.long 0x00 4. " DP_TM_TX_OVRD_DP_EN_POST2_PATH ,Override enable/disable of DP post2 path" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " DP_TM_TX_DP_EN_POST1_PATH ,Enable/disable DP post1 path" "Disabled,Enabled" bitfld.long 0x00 2. " DP_TM_TX_OVRD_DP_EN_POST1_PATH ,Override enable/disable of DP post1 path" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " DP_TM_TX_DP_EN_MAIN_PATH ,Enable/disable DP main path" "Disabled,Enabled" bitfld.long 0x00 0. " DP_TM_TX_OVRD_DP_EN_MAIN_PATH ,Override enable/disable of DP main path" "Disabled,Enabled" group.long (0x4000+0xCC0)++0x03 line.long 0x00 "L1_TXPMD_TM_48,Margining Factor Register" bitfld.long 0x00 5. " TM_FORCE_RES_MARG_FACTOR ,Enable/disable test register force for margining factore value" "Disabled,Enabled" bitfld.long 0x00 0.--4. " TM_RES_MARG_FACTOR ,Margining factor value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long (0x4000+0x106C)++0x03 line.long 0x00 "L1_TM_DIG_6,Data Path Test Modes In Decoder And Descram Register" bitfld.long 0x00 6. " FORCE_BYPASS_ON_ERR ,Enable bypass for <7:0> TM_DIG_CTRL_7" "Disabled,Enabled" bitfld.long 0x00 5. " SUPPRESS_ERR ,Suppress error in 8b10b decoder" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " BYPASS_OHC ,Bypass ONE HOT CODER" "Disabled,Enabled" bitfld.long 0x00 3. " BYPASS_DECODER ,Bypass 8b10b decoder" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " FORCE_BYPASS_DEC ,Enable bypass for <3> TM_DIG_CTRL_6" "Disabled,Enabled" bitfld.long 0x00 1. " BYPASS_DESCRAM ,Bypass descrambler" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " FORCE_BYPASS_DESCRAM ,Enable bypass for <1> TM_DIG_CTRL_6" "Disabled,Enabled" group.long (0x4000+0x10CC)++0x03 line.long 0x00 "L1_TM_AUX_0,Spare Register" hexmask.long.byte 0x00 0.--7. 1. " SPARE ,Spare" group.long (0x4000+0x2094)++0x03 line.long 0x00 "L1_TM_PLL_DIG_37,Test Mode Register 37" hexmask.long.byte 0x00 5.--7. 1. " TM_COARSE_CODE_SAT_VAL_LSB ,Bits [2:0] of coarse code saturation value lsbs" bitfld.long 0x00 4. " TM_EN_COARSE_SATUR ,Enable/disable coarse code saturation limiting logic" "Disabled,Enabled" textline " " bitfld.long 0x00 2.--3. " W_SPARE_OUTPUTS ,Output spare ports going to PLL PMA" "0,1,2,3" bitfld.long 0x00 1. " TM_FORCE_EN_IP_DIV_BYP ,Enable/disable test mode force to control ip_divider bypass" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " TM_EN_IP_DIV_BYP ,Forced value of ip_divider bypass" "Disabled,Enabled" group.long (0x4000+0x2360)++0x03 line.long 0x00 "L1_PLL_FBDIV_FRAC_3_MSB,Fractional Feedback Division Control And Fractional Value For Feedback Division Bits 26:24 Register" bitfld.long 0x00 6. " TM_FORCE_EN_FRAC ,Enable test mode force on fractional mode enable" "Disabled,Enabled" bitfld.long 0x00 5. " TM_EN_FRAC ,Forced value of fractional mode enable" "Disabled,Enabled" textline " " hexmask.long.byte 0x00 0.--2. 1. " FBDIV_FRAC_3_MSB ,Fractional value for feedback division [26:24]" group.long (0x4000+0x2368)++0x17 line.long 0x00 "L1_PLL_SS_STEPS_0_LSB,Spread Spectrum No Of Steps Lsb Register" hexmask.long.byte 0x00 0.--7. 1. " SS_NUM_OF_STEPS_0_LSB ,Spread spectrum no of steps [7:0]" line.long 0x04 "L1_PLL_SS_STEPS_1_MSB,Spread Spectrum No Of Steps Msb Register" hexmask.long.byte 0x04 0.--2. 1. " SS_NUM_OF_STEPS_1_MSB ,Spread spectrum no of steps [10:8]" line.long 0x08 "L1_PPLL_SS_STEP_SIZE_0_LSB,Step Size For Spread Spectrum Register 0" hexmask.long.byte 0x08 0.--7. 1. " SS_STEP_SIZE_0_LSB ,Step size for spread spectrum [7:0]" line.long 0x0C "L1_PPLL_SS_STEP_SIZE_1,Step Size For Spread Spectrum Register 1" hexmask.long.byte 0x0C 0.--7. 1. " SS_STEP_SIZE_1 ,Step size for spread spectrum [15:8]" line.long 0x10 "L1_PPLL_SS_STEP_SIZE_2,Step Size For Spread Spectrum Register 2" hexmask.long.byte 0x10 0.--7. 1. " SS_STEP_SIZE_2 ,Step size for spread spectrum [23:16]" line.long 0x14 "L1_PPLL_SS_STEP_SIZE_3,Step Size For Spread Spectrum Register 3" bitfld.long 0x14 7. " TM_FORCE_EN_SS ,Enable test mode forcing on enable spread spectrum" "Disabled,Enabled" bitfld.long 0x14 6. " TM_EN_SS ,Test mode forced value of enable spread spectrum" "Disabled,Enabled" textline " " bitfld.long 0x14 5. " FORCE_SS_NUM_OF_STEPS ,Enable/disable test mode force on SS no of steps" "Disabled,Enabled" bitfld.long 0x14 4. " FORCE_SS_STEP_SIZE ,Enable/disable test mode force on SS step size" "Disabled,Enabled" textline " " bitfld.long 0x14 2.--3. " SS_SPREAD_TYPE ,Spread type for spread spectrum" "Down,Up,Center,?..." hexmask.long.byte 0x14 0.--1. 1. " SS_STEP_SIZE_3_MSB ,Step size for spread spectrum [25:24]" rgroup.long (0x4000+0x23E4)++0x03 line.long 0x00 "L1_PLL_STATUS_READ_1,PLL Status Read Register 1" bitfld.long 0x00 5. " PLL_START_LOOP_STAT_RD ,Status read value of PLL start loop" "No loop,Loop" bitfld.long 0x00 4. " PLL_LOCK_STAT_RD ,Status read value of PLL lock" "Not locked,Locked" textline " " bitfld.long 0x00 3. " PLL_COARSE_DONE_STAT_RD ,Status read value of PLL coarse done" "Not done,Done" hexmask.long.byte 0x00 0.--2. 1. " PLL_COARSE_CODE_MSB_STAT_RD ,Status read value of PLL coarse code [10:8]" group.long (0x8000+0x34)++0x03 line.long 0x00 "L2_TX_ANA_TM_13,Override For MPHY TX Tristate And Polarity Inversion Register" bitfld.long 0x00 3. " TX_SWAP_POLARITY ,Polarity inversion" "Not inverted,Inverted" bitfld.long 0x00 2. " FORCE_TX_SWAP_POLARITY ,Polarity inversion enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MPHY_TX_TRISTATE ,MPHY TX tristate" "Disabled,Enabled" bitfld.long 0x00 0. " FORCE_MPHY_TX_TRISTATE ,MPHY TX tristate enable" "Disabled,Enabled" group.long (0x8000+0x48)++0x03 line.long 0x00 "L2_TX_ANA_TM_18,Override For PIPE TX de-emphasis Register" hexmask.long.byte 0x00 0.--7. 1. " PIPE_TX_DEEMPH_7_0 ,PIPE TX de-emphasis" group.long (0x8000+0xF4)++0x03 line.long 0x00 "L2_TX_DIG_TM_61,MPHY PLL Gear And Bypass Scrambler Register" bitfld.long 0x00 6.--7. " MPHY_PLL_GEAR ,MPHY's PLL gear" "Gear 1,Gear 2,Gear 3,?..." bitfld.long 0x00 3. " BYPASS_ENC ,Encoder bypass signal enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " BYPASS_SCRAM ,Bypass scrambler signal" "Disabled,Enabled" bitfld.long 0x00 0. " FORCE_BYPASS_SCRAM ,Scrambler bypass signal enable" "Disabled,Enabled" group.long (0x8000+0x1D4)++0x07 line.long 0x00 "L2_TX_ANA_TM_117,PCIe-4x, PCIe-2x, And DP-2x Enable Register" bitfld.long 0x00 5. " TX_PCIE_4X_CFG_EN ,PCIe 4x multilane mode" "Disabled,Enabled" bitfld.long 0x00 4. " FORCE_TX_PCIE_4X_CFG_EN ,Test register force for enabling/disabling PCIe 4x multilane mode" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " TX_PCIE_2X_CFG_EN ,PCIe 2x multilane mode" "Disabled,Enabled" bitfld.long 0x00 2. " FORCE_TX_PCIE_2X_CFG_EN ,Test register force for enabling/disabling PCIe 2x multilane mode" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " TX_DP_MULTILANE_CFG_EN ,DP multilane mode" "Disabled,Enabled" bitfld.long 0x00 0. " FORCE_TX_DP_MULTILANE_CFG_EN ,Test register force for enabling/disabling DP multilane mode" "Disabled,Enabled" line.long 0x04 "L2_TX_ANA_TM_118,TX Deemphasis Override Enable Register" bitfld.long 0x04 3. " FORCE_TX_DEEMPH_17_12 ,Test register force for enabling/disabling TX deemphasis bits <17:12>" "Disabled,Enabled" bitfld.long 0x04 2. " FORCE_TX_DEEMPH_11_6 ,Test register force for enabling/disabling TX deemphasis bits <11:6>" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " FORCE_TX_DEEMPH_5_0 ,Test register force for enabling/disabling TX deemphasis bits <5:0>" "Disabled,Enabled" bitfld.long 0x04 0. " FORCE_TX_DEEMPH_17_0 ,Test register force for enabling/disabling TX deemphasis bits <17:0>" "Disabled,Enabled" if (((d.l(ad:0xFD400000+0xB00+0x8000)&0xF0))==0x00) group.long (0x8000+0xB00)++0x03 line.long 0x00 "L2_TXPMA_ST_0,Opmode Info Register" bitfld.long 0x00 4.--7. " TX_PHY_MODE ,PHY mode" "PCIe,USB3,SATA,,SGMII,DP,,,MPHY,?..." bitfld.long 0x00 0.--3. " TX_PHY_GEAR ,PHY gear" ",Gen1,Gen2,Gen3,?..." elif (((d.l(ad:0xFD400000+0xB00+0x8000)&0xF0))==0x10)||(((d.l(ad:0xFD400000+0xB00+0x8000)&0xF0))==0x40) group.long (0x8000+0xB00)++0x03 line.long 0x00 "L2_TXPMA_ST_0,Opmode Info Register" bitfld.long 0x00 4.--7. " TX_PHY_MODE ,PHY mode" "PCIe,USB3,SATA,,SGMII,DP,,,MPHY,?..." bitfld.long 0x00 0.--3. " TX_PHY_GEAR ,PHY gear" "SS data,?..." elif (((d.l(ad:0xFD400000+0xB00+0x8000)&0xF0))==0x20) group.long (0x8000+0xB00)++0x03 line.long 0x00 "L2_TXPMA_ST_0,Opmode Info Register" bitfld.long 0x00 4.--7. " TX_PHY_MODE ,PHY mode" "PCIe,USB3,SATA,,SGMII,DP,,,MPHY,?..." bitfld.long 0x00 0.--3. " TX_PHY_GEAR ,PHY gear" ",G1,G2,G3,?..." elif (((d.l(ad:0xFD400000+0xB00+0x8000)&0xF0))==0x50) group.long (0x8000+0xB00)++0x03 line.long 0x00 "L2_TXPMA_ST_0,Opmode Info Register" bitfld.long 0x00 4.--7. " TX_PHY_MODE ,PHY mode" "PCIe,USB3,SATA,,SGMII,DP,,,MPHY,?..." bitfld.long 0x00 0.--3. " TX_PHY_GEAR ,PHY gear" ",RBR,HBR,HBR2,?..." elif (((d.l(ad:0xFD400000+0xB00+0x8000)&0xF0))==0x80) group.long (0x8000+0xB00)++0x03 line.long 0x00 "L2_TXPMA_ST_0,Opmode Info Register" bitfld.long 0x00 4.--7. " TX_PHY_MODE ,PHY mode" "PCIe,USB3,SATA,,SGMII,DP,,,MPHY,?..." bitfld.long 0x00 0.--3. " TX_PHY_GEAR ,PHY gear" ",LS,G1A,G1B,G2A,G2B,G3A,G3B,?..." else group.long (0x8000+0xB00)++0x03 line.long 0x00 "L2_TXPMA_ST_0,Opmode Info Register" bitfld.long 0x00 4.--7. " TX_PHY_MODE ,PHY mode" "PCIe,USB3,SATA,,SGMII,DP,,,MPHY,?..." endif rgroup.long (0x8000+0xB10)++0x03 line.long 0x00 "L2_TXPMA_ST_4,Upper Segment DP Resistor Calibration Code Register" bitfld.long 0x00 6.--7. " ANA_ST4_7_6_SPARE ,SPARE" "0,1,2,3" bitfld.long 0x00 0.--5. " TX_USEG_DP_RESCAL_CODE ,Upper segment DP resistor calibration code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long (0x8000+0xCB4)++0x03 line.long 0x00 "L2_TXPMD_TM_45,Post Or Pre Or Main DP Path Selection Register" bitfld.long 0x00 5. " DP_TM_TX_DP_EN_POST2_PATH ,Enable/disable DP post2 path" "Disabled,Enabled" bitfld.long 0x00 4. " DP_TM_TX_OVRD_DP_EN_POST2_PATH ,Override enable/disable of DP post2 path" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " DP_TM_TX_DP_EN_POST1_PATH ,Enable/disable DP post1 path" "Disabled,Enabled" bitfld.long 0x00 2. " DP_TM_TX_OVRD_DP_EN_POST1_PATH ,Override enable/disable of DP post1 path" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " DP_TM_TX_DP_EN_MAIN_PATH ,Enable/disable DP main path" "Disabled,Enabled" bitfld.long 0x00 0. " DP_TM_TX_OVRD_DP_EN_MAIN_PATH ,Override enable/disable of DP main path" "Disabled,Enabled" group.long (0x8000+0xCC0)++0x03 line.long 0x00 "L2_TXPMD_TM_48,Margining Factor Register" bitfld.long 0x00 5. " TM_FORCE_RES_MARG_FACTOR ,Enable/disable test register force for margining factore value" "Disabled,Enabled" bitfld.long 0x00 0.--4. " TM_RES_MARG_FACTOR ,Margining factor value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long (0x8000+0x106C)++0x03 line.long 0x00 "L2_TM_DIG_6,Data Path Test Modes In Decoder And Descram Register" bitfld.long 0x00 6. " FORCE_BYPASS_ON_ERR ,Enable bypass for <7:0> TM_DIG_CTRL_7" "Disabled,Enabled" bitfld.long 0x00 5. " SUPPRESS_ERR ,Suppress error in 8b10b decoder" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " BYPASS_OHC ,Bypass ONE HOT CODER" "Disabled,Enabled" bitfld.long 0x00 3. " BYPASS_DECODER ,Bypass 8b10b decoder" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " FORCE_BYPASS_DEC ,Enable bypass for <3> TM_DIG_CTRL_6" "Disabled,Enabled" bitfld.long 0x00 1. " BYPASS_DESCRAM ,Bypass descrambler" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " FORCE_BYPASS_DESCRAM ,Enable bypass for <1> TM_DIG_CTRL_6" "Disabled,Enabled" group.long (0x8000+0x10CC)++0x03 line.long 0x00 "L2_TM_AUX_0,Spare Register" hexmask.long.byte 0x00 0.--7. 1. " SPARE ,Spare" group.long (0x8000+0x2094)++0x03 line.long 0x00 "L2_TM_PLL_DIG_37,Test Mode Register 37" hexmask.long.byte 0x00 5.--7. 1. " TM_COARSE_CODE_SAT_VAL_LSB ,Bits [2:0] of coarse code saturation value lsbs" bitfld.long 0x00 4. " TM_EN_COARSE_SATUR ,Enable/disable coarse code saturation limiting logic" "Disabled,Enabled" textline " " bitfld.long 0x00 2.--3. " W_SPARE_OUTPUTS ,Output spare ports going to PLL PMA" "0,1,2,3" bitfld.long 0x00 1. " TM_FORCE_EN_IP_DIV_BYP ,Enable/disable test mode force to control ip_divider bypass" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " TM_EN_IP_DIV_BYP ,Forced value of ip_divider bypass" "Disabled,Enabled" group.long (0x8000+0x2360)++0x03 line.long 0x00 "L2_PLL_FBDIV_FRAC_3_MSB,Fractional Feedback Division Control And Fractional Value For Feedback Division Bits 26:24 Register" bitfld.long 0x00 6. " TM_FORCE_EN_FRAC ,Enable test mode force on fractional mode enable" "Disabled,Enabled" bitfld.long 0x00 5. " TM_EN_FRAC ,Forced value of fractional mode enable" "Disabled,Enabled" textline " " hexmask.long.byte 0x00 0.--2. 1. " FBDIV_FRAC_3_MSB ,Fractional value for feedback division [26:24]" group.long (0x8000+0x2368)++0x17 line.long 0x00 "L2_PLL_SS_STEPS_0_LSB,Spread Spectrum No Of Steps Lsb Register" hexmask.long.byte 0x00 0.--7. 1. " SS_NUM_OF_STEPS_0_LSB ,Spread spectrum no of steps [7:0]" line.long 0x04 "L2_PLL_SS_STEPS_1_MSB,Spread Spectrum No Of Steps Msb Register" hexmask.long.byte 0x04 0.--2. 1. " SS_NUM_OF_STEPS_1_MSB ,Spread spectrum no of steps [10:8]" line.long 0x08 "L2_PPLL_SS_STEP_SIZE_0_LSB,Step Size For Spread Spectrum Register 0" hexmask.long.byte 0x08 0.--7. 1. " SS_STEP_SIZE_0_LSB ,Step size for spread spectrum [7:0]" line.long 0x0C "L2_PPLL_SS_STEP_SIZE_1,Step Size For Spread Spectrum Register 1" hexmask.long.byte 0x0C 0.--7. 1. " SS_STEP_SIZE_1 ,Step size for spread spectrum [15:8]" line.long 0x10 "L2_PPLL_SS_STEP_SIZE_2,Step Size For Spread Spectrum Register 2" hexmask.long.byte 0x10 0.--7. 1. " SS_STEP_SIZE_2 ,Step size for spread spectrum [23:16]" line.long 0x14 "L2_PPLL_SS_STEP_SIZE_3,Step Size For Spread Spectrum Register 3" bitfld.long 0x14 7. " TM_FORCE_EN_SS ,Enable test mode forcing on enable spread spectrum" "Disabled,Enabled" bitfld.long 0x14 6. " TM_EN_SS ,Test mode forced value of enable spread spectrum" "Disabled,Enabled" textline " " bitfld.long 0x14 5. " FORCE_SS_NUM_OF_STEPS ,Enable/disable test mode force on SS no of steps" "Disabled,Enabled" bitfld.long 0x14 4. " FORCE_SS_STEP_SIZE ,Enable/disable test mode force on SS step size" "Disabled,Enabled" textline " " bitfld.long 0x14 2.--3. " SS_SPREAD_TYPE ,Spread type for spread spectrum" "Down,Up,Center,?..." hexmask.long.byte 0x14 0.--1. 1. " SS_STEP_SIZE_3_MSB ,Step size for spread spectrum [25:24]" rgroup.long (0x8000+0x23E4)++0x03 line.long 0x00 "L2_PLL_STATUS_READ_1,PLL Status Read Register 1" bitfld.long 0x00 5. " PLL_START_LOOP_STAT_RD ,Status read value of PLL start loop" "No loop,Loop" bitfld.long 0x00 4. " PLL_LOCK_STAT_RD ,Status read value of PLL lock" "Not locked,Locked" textline " " bitfld.long 0x00 3. " PLL_COARSE_DONE_STAT_RD ,Status read value of PLL coarse done" "Not done,Done" hexmask.long.byte 0x00 0.--2. 1. " PLL_COARSE_CODE_MSB_STAT_RD ,Status read value of PLL coarse code [10:8]" group.long (0xC000+0x34)++0x03 line.long 0x00 "L3_TX_ANA_TM_13,Override For MPHY TX Tristate And Polarity Inversion Register" bitfld.long 0x00 3. " TX_SWAP_POLARITY ,Polarity inversion" "Not inverted,Inverted" bitfld.long 0x00 2. " FORCE_TX_SWAP_POLARITY ,Polarity inversion enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MPHY_TX_TRISTATE ,MPHY TX tristate" "Disabled,Enabled" bitfld.long 0x00 0. " FORCE_MPHY_TX_TRISTATE ,MPHY TX tristate enable" "Disabled,Enabled" group.long (0xC000+0x48)++0x03 line.long 0x00 "L3_TX_ANA_TM_18,Override For PIPE TX de-emphasis Register" hexmask.long.byte 0x00 0.--7. 1. " PIPE_TX_DEEMPH_7_0 ,PIPE TX de-emphasis" group.long (0xC000+0xF4)++0x03 line.long 0x00 "L3_TX_DIG_TM_61,MPHY PLL Gear And Bypass Scrambler Register" bitfld.long 0x00 6.--7. " MPHY_PLL_GEAR ,MPHY's PLL gear" "Gear 1,Gear 2,Gear 3,?..." bitfld.long 0x00 3. " BYPASS_ENC ,Encoder bypass signal enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " BYPASS_SCRAM ,Bypass scrambler signal" "Disabled,Enabled" bitfld.long 0x00 0. " FORCE_BYPASS_SCRAM ,Scrambler bypass signal enable" "Disabled,Enabled" group.long (0xC000+0x1D4)++0x07 line.long 0x00 "L3_TX_ANA_TM_117,PCIe-4x, PCIe-2x, And DP-2x Enable Register" bitfld.long 0x00 5. " TX_PCIE_4X_CFG_EN ,PCIe 4x multilane mode" "Disabled,Enabled" bitfld.long 0x00 4. " FORCE_TX_PCIE_4X_CFG_EN ,Test register force for enabling/disabling PCIe 4x multilane mode" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " TX_PCIE_2X_CFG_EN ,PCIe 2x multilane mode" "Disabled,Enabled" bitfld.long 0x00 2. " FORCE_TX_PCIE_2X_CFG_EN ,Test register force for enabling/disabling PCIe 2x multilane mode" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " TX_DP_MULTILANE_CFG_EN ,DP multilane mode" "Disabled,Enabled" bitfld.long 0x00 0. " FORCE_TX_DP_MULTILANE_CFG_EN ,Test register force for enabling/disabling DP multilane mode" "Disabled,Enabled" line.long 0x04 "L3_TX_ANA_TM_118,TX Deemphasis Override Enable Register" bitfld.long 0x04 3. " FORCE_TX_DEEMPH_17_12 ,Test register force for enabling/disabling TX deemphasis bits <17:12>" "Disabled,Enabled" bitfld.long 0x04 2. " FORCE_TX_DEEMPH_11_6 ,Test register force for enabling/disabling TX deemphasis bits <11:6>" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " FORCE_TX_DEEMPH_5_0 ,Test register force for enabling/disabling TX deemphasis bits <5:0>" "Disabled,Enabled" bitfld.long 0x04 0. " FORCE_TX_DEEMPH_17_0 ,Test register force for enabling/disabling TX deemphasis bits <17:0>" "Disabled,Enabled" if (((d.l(ad:0xFD400000+0xB00+0xC000)&0xF0))==0x00) group.long (0xC000+0xB00)++0x03 line.long 0x00 "L3_TXPMA_ST_0,Opmode Info Register" bitfld.long 0x00 4.--7. " TX_PHY_MODE ,PHY mode" "PCIe,USB3,SATA,,SGMII,DP,,,MPHY,?..." bitfld.long 0x00 0.--3. " TX_PHY_GEAR ,PHY gear" ",Gen1,Gen2,Gen3,?..." elif (((d.l(ad:0xFD400000+0xB00+0xC000)&0xF0))==0x10)||(((d.l(ad:0xFD400000+0xB00+0xC000)&0xF0))==0x40) group.long (0xC000+0xB00)++0x03 line.long 0x00 "L3_TXPMA_ST_0,Opmode Info Register" bitfld.long 0x00 4.--7. " TX_PHY_MODE ,PHY mode" "PCIe,USB3,SATA,,SGMII,DP,,,MPHY,?..." bitfld.long 0x00 0.--3. " TX_PHY_GEAR ,PHY gear" "SS data,?..." elif (((d.l(ad:0xFD400000+0xB00+0xC000)&0xF0))==0x20) group.long (0xC000+0xB00)++0x03 line.long 0x00 "L3_TXPMA_ST_0,Opmode Info Register" bitfld.long 0x00 4.--7. " TX_PHY_MODE ,PHY mode" "PCIe,USB3,SATA,,SGMII,DP,,,MPHY,?..." bitfld.long 0x00 0.--3. " TX_PHY_GEAR ,PHY gear" ",G1,G2,G3,?..." elif (((d.l(ad:0xFD400000+0xB00+0xC000)&0xF0))==0x50) group.long (0xC000+0xB00)++0x03 line.long 0x00 "L3_TXPMA_ST_0,Opmode Info Register" bitfld.long 0x00 4.--7. " TX_PHY_MODE ,PHY mode" "PCIe,USB3,SATA,,SGMII,DP,,,MPHY,?..." bitfld.long 0x00 0.--3. " TX_PHY_GEAR ,PHY gear" ",RBR,HBR,HBR2,?..." elif (((d.l(ad:0xFD400000+0xB00+0xC000)&0xF0))==0x80) group.long (0xC000+0xB00)++0x03 line.long 0x00 "L3_TXPMA_ST_0,Opmode Info Register" bitfld.long 0x00 4.--7. " TX_PHY_MODE ,PHY mode" "PCIe,USB3,SATA,,SGMII,DP,,,MPHY,?..." bitfld.long 0x00 0.--3. " TX_PHY_GEAR ,PHY gear" ",LS,G1A,G1B,G2A,G2B,G3A,G3B,?..." else group.long (0xC000+0xB00)++0x03 line.long 0x00 "L3_TXPMA_ST_0,Opmode Info Register" bitfld.long 0x00 4.--7. " TX_PHY_MODE ,PHY mode" "PCIe,USB3,SATA,,SGMII,DP,,,MPHY,?..." endif rgroup.long (0xC000+0xB10)++0x03 line.long 0x00 "L3_TXPMA_ST_4,Upper Segment DP Resistor Calibration Code Register" bitfld.long 0x00 6.--7. " ANA_ST4_7_6_SPARE ,SPARE" "0,1,2,3" bitfld.long 0x00 0.--5. " TX_USEG_DP_RESCAL_CODE ,Upper segment DP resistor calibration code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long (0xC000+0xCB4)++0x03 line.long 0x00 "L3_TXPMD_TM_45,Post Or Pre Or Main DP Path Selection Register" bitfld.long 0x00 5. " DP_TM_TX_DP_EN_POST2_PATH ,Enable/disable DP post2 path" "Disabled,Enabled" bitfld.long 0x00 4. " DP_TM_TX_OVRD_DP_EN_POST2_PATH ,Override enable/disable of DP post2 path" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " DP_TM_TX_DP_EN_POST1_PATH ,Enable/disable DP post1 path" "Disabled,Enabled" bitfld.long 0x00 2. " DP_TM_TX_OVRD_DP_EN_POST1_PATH ,Override enable/disable of DP post1 path" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " DP_TM_TX_DP_EN_MAIN_PATH ,Enable/disable DP main path" "Disabled,Enabled" bitfld.long 0x00 0. " DP_TM_TX_OVRD_DP_EN_MAIN_PATH ,Override enable/disable of DP main path" "Disabled,Enabled" group.long (0xC000+0xCC0)++0x03 line.long 0x00 "L3_TXPMD_TM_48,Margining Factor Register" bitfld.long 0x00 5. " TM_FORCE_RES_MARG_FACTOR ,Enable/disable test register force for margining factore value" "Disabled,Enabled" bitfld.long 0x00 0.--4. " TM_RES_MARG_FACTOR ,Margining factor value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long (0xC000+0x106C)++0x03 line.long 0x00 "L3_TM_DIG_6,Data Path Test Modes In Decoder And Descram Register" bitfld.long 0x00 6. " FORCE_BYPASS_ON_ERR ,Enable bypass for <7:0> TM_DIG_CTRL_7" "Disabled,Enabled" bitfld.long 0x00 5. " SUPPRESS_ERR ,Suppress error in 8b10b decoder" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " BYPASS_OHC ,Bypass ONE HOT CODER" "Disabled,Enabled" bitfld.long 0x00 3. " BYPASS_DECODER ,Bypass 8b10b decoder" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " FORCE_BYPASS_DEC ,Enable bypass for <3> TM_DIG_CTRL_6" "Disabled,Enabled" bitfld.long 0x00 1. " BYPASS_DESCRAM ,Bypass descrambler" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " FORCE_BYPASS_DESCRAM ,Enable bypass for <1> TM_DIG_CTRL_6" "Disabled,Enabled" group.long (0xC000+0x10CC)++0x03 line.long 0x00 "L3_TM_AUX_0,Spare Register" hexmask.long.byte 0x00 0.--7. 1. " SPARE ,Spare" group.long (0xC000+0x2094)++0x03 line.long 0x00 "L3_TM_PLL_DIG_37,Test Mode Register 37" hexmask.long.byte 0x00 5.--7. 1. " TM_COARSE_CODE_SAT_VAL_LSB ,Bits [2:0] of coarse code saturation value lsbs" bitfld.long 0x00 4. " TM_EN_COARSE_SATUR ,Enable/disable coarse code saturation limiting logic" "Disabled,Enabled" textline " " bitfld.long 0x00 2.--3. " W_SPARE_OUTPUTS ,Output spare ports going to PLL PMA" "0,1,2,3" bitfld.long 0x00 1. " TM_FORCE_EN_IP_DIV_BYP ,Enable/disable test mode force to control ip_divider bypass" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " TM_EN_IP_DIV_BYP ,Forced value of ip_divider bypass" "Disabled,Enabled" group.long (0xC000+0x2360)++0x03 line.long 0x00 "L3_PLL_FBDIV_FRAC_3_MSB,Fractional Feedback Division Control And Fractional Value For Feedback Division Bits 26:24 Register" bitfld.long 0x00 6. " TM_FORCE_EN_FRAC ,Enable test mode force on fractional mode enable" "Disabled,Enabled" bitfld.long 0x00 5. " TM_EN_FRAC ,Forced value of fractional mode enable" "Disabled,Enabled" textline " " hexmask.long.byte 0x00 0.--2. 1. " FBDIV_FRAC_3_MSB ,Fractional value for feedback division [26:24]" group.long (0xC000+0x2368)++0x17 line.long 0x00 "L3_PLL_SS_STEPS_0_LSB,Spread Spectrum No Of Steps Lsb Register" hexmask.long.byte 0x00 0.--7. 1. " SS_NUM_OF_STEPS_0_LSB ,Spread spectrum no of steps [7:0]" line.long 0x04 "L3_PLL_SS_STEPS_1_MSB,Spread Spectrum No Of Steps Msb Register" hexmask.long.byte 0x04 0.--2. 1. " SS_NUM_OF_STEPS_1_MSB ,Spread spectrum no of steps [10:8]" line.long 0x08 "L3_PPLL_SS_STEP_SIZE_0_LSB,Step Size For Spread Spectrum Register 0" hexmask.long.byte 0x08 0.--7. 1. " SS_STEP_SIZE_0_LSB ,Step size for spread spectrum [7:0]" line.long 0x0C "L3_PPLL_SS_STEP_SIZE_1,Step Size For Spread Spectrum Register 1" hexmask.long.byte 0x0C 0.--7. 1. " SS_STEP_SIZE_1 ,Step size for spread spectrum [15:8]" line.long 0x10 "L3_PPLL_SS_STEP_SIZE_2,Step Size For Spread Spectrum Register 2" hexmask.long.byte 0x10 0.--7. 1. " SS_STEP_SIZE_2 ,Step size for spread spectrum [23:16]" line.long 0x14 "L3_PPLL_SS_STEP_SIZE_3,Step Size For Spread Spectrum Register 3" bitfld.long 0x14 7. " TM_FORCE_EN_SS ,Enable test mode forcing on enable spread spectrum" "Disabled,Enabled" bitfld.long 0x14 6. " TM_EN_SS ,Test mode forced value of enable spread spectrum" "Disabled,Enabled" textline " " bitfld.long 0x14 5. " FORCE_SS_NUM_OF_STEPS ,Enable/disable test mode force on SS no of steps" "Disabled,Enabled" bitfld.long 0x14 4. " FORCE_SS_STEP_SIZE ,Enable/disable test mode force on SS step size" "Disabled,Enabled" textline " " bitfld.long 0x14 2.--3. " SS_SPREAD_TYPE ,Spread type for spread spectrum" "Down,Up,Center,?..." hexmask.long.byte 0x14 0.--1. 1. " SS_STEP_SIZE_3_MSB ,Step size for spread spectrum [25:24]" rgroup.long (0xC000+0x23E4)++0x03 line.long 0x00 "L3_PLL_STATUS_READ_1,PLL Status Read Register 1" bitfld.long 0x00 5. " PLL_START_LOOP_STAT_RD ,Status read value of PLL start loop" "No loop,Loop" bitfld.long 0x00 4. " PLL_LOCK_STAT_RD ,Status read value of PLL lock" "Not locked,Locked" textline " " bitfld.long 0x00 3. " PLL_COARSE_DONE_STAT_RD ,Status read value of PLL coarse done" "Not done,Done" hexmask.long.byte 0x00 0.--2. 1. " PLL_COARSE_CODE_MSB_STAT_RD ,Status read value of PLL coarse code [10:8]" group.long (0xC000+0x2C48)++0x07 line.long 0x00 "L3_TM_CALIB_DIG18,Calib Dig Control 4 Register" bitfld.long 0x00 7. " PIPE_NSW_CODE_OR_2 ,Bit 2 override for o_calib_pipe_nsw_code" "0,1" bitfld.long 0x00 6. " PIPE_NSW_CODE_OR_1 ,Bit 1 override for o_calib_pipe_nsw_code" "0,1" textline " " bitfld.long 0x00 5. " PIPE_NSW_CODE_OR_0 ,MSB override for o_calib_pipe_nsw_code" "0,1" bitfld.long 0x00 4. " TM_OR_PIPE_NSW_CODE ,TM override for o_calib_pipe_nsw_code" "0,1" textline " " bitfld.long 0x00 3. " FORCE_EN_PIPE_NSW ,Force o_en_pipe_psw" "0,1" bitfld.long 0x00 2. " TM_OR_EN_PIPE_NSW ,TM override for o_calib_en_pipe_nsw" "0,1" textline " " bitfld.long 0x00 1. " USB2_CODE_OR_4 ,MSB override for o_calib_usb2_code" "0,1" bitfld.long 0x00 0. " USB2_CODE_OR_3 ,Bit 3 override for o_calib_usb2_code" "0,1" line.long 0x04 "L3_TM_CALIB_DIG19,Calib Dig Control 5 Register" bitfld.long 0x04 7. " PIPE_PSW_CODE_OR_1 ,Bit 1 override for o_calib_pipe_psw_code" "0,1" bitfld.long 0x04 6. " PIPE_PSW_CODE_OR_0 ,Bit 0 override for o_calib_pipe_psw_code" "0,1" textline " " bitfld.long 0x04 5. " TM_OR_PIPE_PSW_CODE ,TM override for o_calib_pipe_nsw_code" "0,1" bitfld.long 0x04 4. " FORCE_EN_PIPE_PSW ,Force o_en_pipe_pse" "0,1" textline " " bitfld.long 0x04 3. " TM_OR_EN_PIPE_PSW ,TM override for o_calib_en_pipe_nsw" "0,1" bitfld.long 0x04 2. " PIPE_NSW_CODE_OR_5 ,MSB override for o_calib_pipe_nsw_code" "0,1" textline " " bitfld.long 0x04 1. " PIPE_NSW_CODE_OR_4 ,Bit 4 override for o_calib_pipe_nsw_code" "0,1" bitfld.long 0x04 0. " PIPE_NSW_CODE_OR_3 ,Bit 3 override for o_calib_pipe_nsw_code" "0,1" rgroup.long (0xC000+0x2F14)++0x03 line.long 0x00 "L3_CALIB_DONE_STATUS,Calib Done Status Register" bitfld.long 0x00 1. " CALIB_DONE_STATUS ,Calib done status" "Not done,Done" bitfld.long 0x00 0. " CALIB_COMP_OUT_STATUS ,Comp out status" "Not done,Done" group.long 0x10000++0x03 line.long 0x00 "PLL_REF_SEL0,PLL0 Reference Selection Register" bitfld.long 0x00 0.--4. " PLLREFSEL0 ,PLL0 reference selection" "5 MHz,9.6 MHz,10 MHz,12 MHz,13 MHz,19.2 MHz,20 MHz,24 MHz,26 MHz,27 MHz,38.4 MHz,40 MHz,52 MHz,100 MHz,108 MHz,125 MHz,135 MHz,150 MHz,?..." group.long 0x10004++0x03 line.long 0x00 "PLL_REF_SEL1,PLL1 Reference Selection Register" bitfld.long 0x00 0.--4. " PLLREFSEL1 ,PLL1 reference selection" "5 MHz,9.6 MHz,10 MHz,12 MHz,13 MHz,19.2 MHz,20 MHz,24 MHz,26 MHz,27 MHz,38.4 MHz,40 MHz,52 MHz,100 MHz,108 MHz,125 MHz,135 MHz,150 MHz,?..." group.long 0x10008++0x03 line.long 0x00 "PLL_REF_SEL2,PLL2 Reference Selection Register" bitfld.long 0x00 0.--4. " PLLREFSEL2 ,PLL2 reference selection" "5 MHz,9.6 MHz,10 MHz,12 MHz,13 MHz,19.2 MHz,20 MHz,24 MHz,26 MHz,27 MHz,38.4 MHz,40 MHz,52 MHz,100 MHz,108 MHz,125 MHz,135 MHz,150 MHz,?..." group.long 0x1000C++0x03 line.long 0x00 "PLL_REF_SEL3,PLL3 Reference Selection Register" bitfld.long 0x00 0.--4. " PLLREFSEL3 ,PLL3 reference selection" "5 MHz,9.6 MHz,10 MHz,12 MHz,13 MHz,19.2 MHz,20 MHz,24 MHz,26 MHz,27 MHz,38.4 MHz,40 MHz,52 MHz,100 MHz,108 MHz,125 MHz,135 MHz,150 MHz,?..." group.long 0x10010++0x07 line.long 0x00 "ICM_CFG0,ICM Configuration Register 0" bitfld.long 0x00 4.--6. " L1_ICM_CFG ,UPHY lane 1 protocol configuration" "PowerDown,PCIe.1,Sata1,USB0,DP.0,SGMII1,?..." bitfld.long 0x00 0.--2. " L0_ICM_CFG ,UPHY lane 0 protocol configuration" "PowerDown,PCIe.0,Sata0,USB0,DP.1,SGMII0,?..." line.long 0x04 "ICM_CFG1,ICM Configuration Register 1" bitfld.long 0x04 4.--6. " L3_ICM_CFG ,UPHY lane 3 protocol configuration" "PowerDown,PCIe.3,Sata1,USB1,DP.0,SGMII3,?..." bitfld.long 0x04 0.--2. " L2_ICM_CFG ,UPHY lane 2 protocol configuration" "PowerDown,PCIe.1,Sata0,USB0,DP.1,SGMII2,?..." group.long 0x10040++0x07 line.long 0x00 "TX_PROT_BUS_WIDTH,Tx Data Bus Width Control Register" bitfld.long 0x00 6.--7. " L3_TX_PROT_BUSWIDTH ,Lane 3 tx data bus width" "10-bit,20-bit,40-bit,?..." bitfld.long 0x00 4.--5. " L2_TX_PROT_BUSWIDTH ,Lane 2 tx data bus width" "10-bit,20-bit,40-bit,?..." textline " " bitfld.long 0x00 2.--3. " L1_TX_PROT_BUSWIDTH ,Lane 1 tx data bus width" "10-bit,20-bit,40-bit,?..." bitfld.long 0x00 0.--1. " L0_TX_PROT_BUSWIDTH ,Lane 0 tx data bus width" "10-bit,20-bit,40-bit,?..." line.long 0x04 "TX_PROT_BUS_WIDTH,Tx Data Bus Width Control Register" bitfld.long 0x04 6.--7. " L3_RX_PROT_BUSWIDTH ,Lane 3 rx data bus width" "10-bit,20-bit,40-bit,?..." bitfld.long 0x04 4.--5. " L2_RX_PROT_BUSWIDTH ,Lane 2 rx data bus width" "10-bit,20-bit,40-bit,?..." textline " " bitfld.long 0x04 2.--3. " L1_RX_PROT_BUSWIDTH ,Lane 1 rx data bus width" "10-bit,20-bit,40-bit,?..." bitfld.long 0x04 0.--1. " L0_RX_PROT_BUSWIDTH ,Lane 0 rx data bus width" "10-bit,20-bit,40-bit,?..." width 0x0B tree.end tree "SIOU (Serial Input Output Unit)" base ad:0xFD3D0000 width 17. group.byte 0x00++0x00 line.byte 0x00 "REG_CTRL,Miscellaneous Control Functions" bitfld.byte 0x00 0. " SLVERR_ENABLE ,Enable/disable SLVERR during address decode failure" "Disabled,Enabled" group.byte 0x04++0x00 line.byte 0x00 "IR_STATUS,Interrupt Status Register" eventfld.byte 0x00 0. " ADDR_DECODE_ERR ,Status for an address decode error interrupt" "No interrupt,Interrupt" group.byte 0x08++0x00 line.byte 0x00 "IR_MASK_SET/CLR,Interrupt Mask Register" setclrfld.byte 0x00 0. 0x08 0. 0x04 0. " ADDR_DECODE_ERR ,Mask for an address decode error interrupt" "Not masked,Masked" group.long 0x100++0x03 line.long 0x00 "SATA_MISC_CTRL,Misc Controls For SATA" bitfld.long 0x00 0.--1. " SATA_PM_CLK_SEL ,Sata PM clock control select" "0,1,2,3" group.long 0x410++0x03 line.long 0x00 "CRX_CTRL,Clock And Reset Blocks Control" bitfld.long 0x00 0.--1. " REFCLK_SEL ,Number of refclk to be forwarded to clock and reset blocks of the PS" "0,1,2,3" group.long 0x430++0x03 line.long 0x00 "DP_STC_CLKCTRL,STC Clock Control" bitfld.long 0x00 10. " REFSEL ,Divider output select" "Bypass,No bypass" bitfld.long 0x00 8.--9. " LANESEL ,STC clock source lane refclk select" "0,1,2,3" bitfld.long 0x00 7. " UPTOG ,Pulse bit after divisor value change" "Not changed,Changed" bitfld.long 0x00 1.--6. " DIVISOR ,Divisor value for the divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0. " SOFT_RST ,Reset for the clock divider" "No reset,Reset" width 0x0B tree.end tree "SPI (SPI Controller)" tree "SPI 0" base ad:0xFF040000 width 21. if ((d.l(ad:0xFF040000)&0x4000)==0x4000) group.long 0x00++0x03 line.long 0x00 "CONFIG,SPI Configuration Register" bitfld.long 0x00 17. " MODEFAIL_GEN_EN ,ModeFail generation enable" "Disabled,Enabled" bitfld.long 0x00 16. " MAN_START_COM ,Manual start command" "No effect,Start" bitfld.long 0x00 15. " MAN_START_EN ,Manual start enable" "Disabled,Enabled" bitfld.long 0x00 14. " MANUAL_CS ,Manual CS" "Auto,Manual" textline " " bitfld.long 0x00 10.--13. " CS ,Peripheral chip select lines" "Slave 0,Slave 1,Slave 0,Slave 2,Slave 0,Slave 1,Slave 0,,Slave 0,Slave 1,Slave 0,Slave 2,Slave 0,Slave 1,Slave 0,Not selected" bitfld.long 0x00 9. " PERI_SEL ,Peripheral select decode" "1 of 3,Allow ext. 3-to-8" bitfld.long 0x00 8. " REF_CLK ,Master reference clock select" "SPI REFCLK,Not supported" bitfld.long 0x00 3.--5. " BAUD_RATE_DIV ,Master mode baud rate divisor control" "Not supported,/4,/8,/16,/32,/64,/128,/256" textline " " bitfld.long 0x00 2. " CLK_PH ,Clock phase" "Active,Inactive" bitfld.long 0x00 1. " CLK_POL ,Clock polarity outside SPI word" "Low,High" bitfld.long 0x00 0. " MODE_SEL ,Mode select" "Slave,Master" textline " " else group.long 0x00++0x03 line.long 0x00 "CONFIG,SPI Configuration Register" bitfld.long 0x00 17. " MODEFAIL_GEN_EN ,ModeFail generation enable" "Disabled,Enabled" bitfld.long 0x00 16. " MAN_START_COM ,Manual start command" "No effect,Start" bitfld.long 0x00 15. " MAN_START_EN ,Manual start enable" "Disabled,Enabled" bitfld.long 0x00 14. " MANUAL_CS ,Manual CS" "Auto,Manual" textline " " textfld " " bitfld.long 0x00 9. " PERI_SEL ,Peripheral select decode" "1 of 3,Allow ext. 3-to-8" bitfld.long 0x00 8. " REF_CLK ,Master reference clock select" "SPI REFCLK,Not supported" bitfld.long 0x00 3.--5. " BAUD_RATE_DIV ,Master mode baud rate divisor control" "Not supported,/4,/8,/16,/32,/64,/128,/256" textline " " bitfld.long 0x00 2. " CLK_PH ,Clock phase" "Active,Inactive" bitfld.long 0x00 1. " CLK_POL ,Clock polarity outside SPI word" "Low,High" bitfld.long 0x00 0. " MODE_SEL ,Mode select" "Slave,Master" textline " " endif hgroup.long 0x04++0x03 hide.long 0x00 "INTR_STATUS,SPI Interrupt Status Register" textfld " " in textline " " group.long 0x10++0x03 line.long 0x00 "INTRPT_MASK_SET/CLR,Interrupt Mask Register" setclrfld.long 0x00 6. -0x08 6. -0x04 6. " TX_FIFO_UNDERFLOW ,TX FIFO underflow enable" "Disabled,Enabled" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " RX_FIFO_FULL ,RX FIFO full enable" "Disabled,Enabled" setclrfld.long 0x00 4. -0x08 4. -0x04 4. " RX_FIFO_NOT_EMPTY ,RX FIFO not empty enable" "Disabled,Enabled" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " TX_FIFO_FULL ,TX FIFO full enable" "Disabled,Enabled" textline " " setclrfld.long 0x00 2. -0x08 2. -0x04 2. " TX_FIFO_NOT_FULL ,TX FIFO not full enable" "Disabled,Enabled" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " MODE_FAIL ,ModeFail interrupt enable" "Disabled,Enabled" setclrfld.long 0x00 0. -0x08 0. -0x04 0. " RX_OVERFLOW ,Receive overflow interrupt enable" "Disabled,Enabled" group.long 0x14++0x07 line.long 0x00 "EN,SPI Enable Register" bitfld.long 0x00 0. " SPI_EN ,SPI enable" "Disabled,Enabled" line.long 0x04 "DELAY,Delay Register" hexmask.long.byte 0x04 24.--31. 1. " D_NSS ,Delay for the length that the master mode chip select outputs are de-asserted between words when CPHA=0" hexmask.long.byte 0x04 16.--23. 1. " D_BTWN ,Delay between one chip select being de-activated and the activation of another" hexmask.long.byte 0x04 8.--15. 1. " D_AFTER ,Delay between last bit of current word and the first bit of the next word" hexmask.long.byte 0x04 0.--7. 1. " D_INT ,Added delay between setting n_ss_out low and first bit transfer" wgroup.long 0x1C++0x03 line.long 0x00 "TX_DATA,Transmit Data Register" hexmask.long.byte 0x00 0.--7. 1. " TX_FIFO_DATA ,Data to TX FIFO" hgroup.long 0x20++0x03 hide.long 0x00 "RX_DATA,Receive Data Register" in group.long 0x24++0x0B line.long 0x00 "SLAVE_IDLE_COUNT,Slave Idle Count Register" hexmask.long.byte 0x00 0.--7. 1. " SLAVE_IDLE_COUNT ,Slave idle counter" line.long 0x04 "TX_THRES,TX FIFO Threshold Register" line.long 0x08 "RX_THRES,RX FIFO Threshold Register" rgroup.long 0xFC++0x03 line.long 0x00 "MOD_ID,Module ID Register" hexmask.long 0x00 0.--24. 1. " MODULE_ID ,Module ID number" width 0x0B tree.end tree "SPI 1" base ad:0xFF050000 width 21. if ((d.l(ad:0xFF050000)&0x4000)==0x4000) group.long 0x00++0x03 line.long 0x00 "CONFIG,SPI Configuration Register" bitfld.long 0x00 17. " MODEFAIL_GEN_EN ,ModeFail generation enable" "Disabled,Enabled" bitfld.long 0x00 16. " MAN_START_COM ,Manual start command" "No effect,Start" bitfld.long 0x00 15. " MAN_START_EN ,Manual start enable" "Disabled,Enabled" bitfld.long 0x00 14. " MANUAL_CS ,Manual CS" "Auto,Manual" textline " " bitfld.long 0x00 10.--13. " CS ,Peripheral chip select lines" "Slave 0,Slave 1,Slave 0,Slave 2,Slave 0,Slave 1,Slave 0,,Slave 0,Slave 1,Slave 0,Slave 2,Slave 0,Slave 1,Slave 0,Not selected" bitfld.long 0x00 9. " PERI_SEL ,Peripheral select decode" "1 of 3,Allow ext. 3-to-8" bitfld.long 0x00 8. " REF_CLK ,Master reference clock select" "SPI REFCLK,Not supported" bitfld.long 0x00 3.--5. " BAUD_RATE_DIV ,Master mode baud rate divisor control" "Not supported,/4,/8,/16,/32,/64,/128,/256" textline " " bitfld.long 0x00 2. " CLK_PH ,Clock phase" "Active,Inactive" bitfld.long 0x00 1. " CLK_POL ,Clock polarity outside SPI word" "Low,High" bitfld.long 0x00 0. " MODE_SEL ,Mode select" "Slave,Master" textline " " else group.long 0x00++0x03 line.long 0x00 "CONFIG,SPI Configuration Register" bitfld.long 0x00 17. " MODEFAIL_GEN_EN ,ModeFail generation enable" "Disabled,Enabled" bitfld.long 0x00 16. " MAN_START_COM ,Manual start command" "No effect,Start" bitfld.long 0x00 15. " MAN_START_EN ,Manual start enable" "Disabled,Enabled" bitfld.long 0x00 14. " MANUAL_CS ,Manual CS" "Auto,Manual" textline " " textfld " " bitfld.long 0x00 9. " PERI_SEL ,Peripheral select decode" "1 of 3,Allow ext. 3-to-8" bitfld.long 0x00 8. " REF_CLK ,Master reference clock select" "SPI REFCLK,Not supported" bitfld.long 0x00 3.--5. " BAUD_RATE_DIV ,Master mode baud rate divisor control" "Not supported,/4,/8,/16,/32,/64,/128,/256" textline " " bitfld.long 0x00 2. " CLK_PH ,Clock phase" "Active,Inactive" bitfld.long 0x00 1. " CLK_POL ,Clock polarity outside SPI word" "Low,High" bitfld.long 0x00 0. " MODE_SEL ,Mode select" "Slave,Master" textline " " endif hgroup.long 0x04++0x03 hide.long 0x00 "INTR_STATUS,SPI Interrupt Status Register" textfld " " in textline " " group.long 0x10++0x03 line.long 0x00 "INTRPT_MASK_SET/CLR,Interrupt Mask Register" setclrfld.long 0x00 6. -0x08 6. -0x04 6. " TX_FIFO_UNDERFLOW ,TX FIFO underflow enable" "Disabled,Enabled" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " RX_FIFO_FULL ,RX FIFO full enable" "Disabled,Enabled" setclrfld.long 0x00 4. -0x08 4. -0x04 4. " RX_FIFO_NOT_EMPTY ,RX FIFO not empty enable" "Disabled,Enabled" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " TX_FIFO_FULL ,TX FIFO full enable" "Disabled,Enabled" textline " " setclrfld.long 0x00 2. -0x08 2. -0x04 2. " TX_FIFO_NOT_FULL ,TX FIFO not full enable" "Disabled,Enabled" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " MODE_FAIL ,ModeFail interrupt enable" "Disabled,Enabled" setclrfld.long 0x00 0. -0x08 0. -0x04 0. " RX_OVERFLOW ,Receive overflow interrupt enable" "Disabled,Enabled" group.long 0x14++0x07 line.long 0x00 "EN,SPI Enable Register" bitfld.long 0x00 0. " SPI_EN ,SPI enable" "Disabled,Enabled" line.long 0x04 "DELAY,Delay Register" hexmask.long.byte 0x04 24.--31. 1. " D_NSS ,Delay for the length that the master mode chip select outputs are de-asserted between words when CPHA=0" hexmask.long.byte 0x04 16.--23. 1. " D_BTWN ,Delay between one chip select being de-activated and the activation of another" hexmask.long.byte 0x04 8.--15. 1. " D_AFTER ,Delay between last bit of current word and the first bit of the next word" hexmask.long.byte 0x04 0.--7. 1. " D_INT ,Added delay between setting n_ss_out low and first bit transfer" wgroup.long 0x1C++0x03 line.long 0x00 "TX_DATA,Transmit Data Register" hexmask.long.byte 0x00 0.--7. 1. " TX_FIFO_DATA ,Data to TX FIFO" hgroup.long 0x20++0x03 hide.long 0x00 "RX_DATA,Receive Data Register" in group.long 0x24++0x0B line.long 0x00 "SLAVE_IDLE_COUNT,Slave Idle Count Register" hexmask.long.byte 0x00 0.--7. 1. " SLAVE_IDLE_COUNT ,Slave idle counter" line.long 0x04 "TX_THRES,TX FIFO Threshold Register" line.long 0x08 "RX_THRES,RX FIFO Threshold Register" rgroup.long 0xFC++0x03 line.long 0x00 "MOD_ID,Module ID Register" hexmask.long 0x00 0.--24. 1. " MODULE_ID ,Module ID number" width 0x0B tree.end tree.end tree "TTC (Triple Timer Counter)" tree "TTC0" base ad:0xFF110000 width 23. group.byte 0x0++0x00 line.byte 0x00 "CLOCK_CONTROL_1,Clock 1 Control Register" bitfld.byte 0x00 6. " EX_E ,External Clock Edge" "Positive,Negative" bitfld.byte 0x00 5. " C_SRC ,Clock Source" "pclk,ext_clk" bitfld.byte 0x00 1.--4. " PS_V ,Prescale value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.byte 0x00 0. " PS_EN ,Prescale enable" "Disabled,Enabled" group.byte 0x4++0x00 line.byte 0x00 "CLOCK_CONTROL_2,Clock 2 Control Register" bitfld.byte 0x00 6. " EX_E ,External Clock Edge" "Positive,Negative" bitfld.byte 0x00 5. " C_SRC ,Clock Source" "pclk,ext_clk" bitfld.byte 0x00 1.--4. " PS_V ,Prescale value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.byte 0x00 0. " PS_EN ,Prescale enable" "Disabled,Enabled" group.byte 0x8++0x00 line.byte 0x00 "CLOCK_CONTROL_3,Clock 3 Control Register" bitfld.byte 0x00 6. " EX_E ,External Clock Edge" "Positive,Negative" bitfld.byte 0x00 5. " C_SRC ,Clock Source" "pclk,ext_clk" bitfld.byte 0x00 1.--4. " PS_V ,Prescale value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.byte 0x00 0. " PS_EN ,Prescale enable" "Disabled,Enabled" group.byte 0xC++0x00 line.byte 0x00 "COUNTER_CONTROL_1,Clock 1 Operational Mode And Reset Register" bitfld.byte 0x00 6. " WAVE_POL ,Waveform polarity" "Positive,Negative" bitfld.byte 0x00 5. " WAVE_EN ,Output waveform enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RST ,Counter reset" "No reset,Reset" bitfld.byte 0x00 3. " MATCH ,Register Match mode" "Disabled,Enabled" textline " " bitfld.byte 0x00 2. " DEC ,Decrement" "Disabled,Enabled" bitfld.byte 0x00 1. " INT ,Interval Mode" "Disabled,Enabled" bitfld.byte 0x00 0. " DIS ,Disable counter" "No,Yes" group.byte 0x10++0x00 line.byte 0x00 "COUNTER_CONTROL_2,Clock 2 Operational Mode And Reset Register" bitfld.byte 0x00 6. " WAVE_POL ,Waveform polarity" "Positive,Negative" bitfld.byte 0x00 5. " WAVE_EN ,Output waveform enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RST ,Counter reset" "No reset,Reset" bitfld.byte 0x00 3. " MATCH ,Register Match mode" "Disabled,Enabled" textline " " bitfld.byte 0x00 2. " DEC ,Decrement" "Disabled,Enabled" bitfld.byte 0x00 1. " INT ,Interval Mode" "Disabled,Enabled" bitfld.byte 0x00 0. " DIS ,Disable counter" "No,Yes" group.byte 0x14++0x00 line.byte 0x00 "COUNTER_CONTROL_3,Clock 3 Operational Mode And Reset Register" bitfld.byte 0x00 6. " WAVE_POL ,Waveform polarity" "Positive,Negative" bitfld.byte 0x00 5. " WAVE_EN ,Output waveform enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RST ,Counter reset" "No reset,Reset" bitfld.byte 0x00 3. " MATCH ,Register Match mode" "Disabled,Enabled" textline " " bitfld.byte 0x00 2. " DEC ,Decrement" "Disabled,Enabled" bitfld.byte 0x00 1. " INT ,Interval Mode" "Disabled,Enabled" bitfld.byte 0x00 0. " DIS ,Disable counter" "No,Yes" sif (cpuis("ZYNQ-ULTRASCALE+*")) rgroup.long 0x18++0x03 line.long 0x00 "COUNTER_VALUE_1,Current 1 Counter Value Register" rgroup.long 0x1C++0x03 line.long 0x00 "COUNTER_VALUE_2,Current 2 Counter Value Register" rgroup.long 0x20++0x03 line.long 0x00 "COUNTER_VALUE_3,Current 3 Counter Value Register" group.long 0x24++0x03 line.long 0x00 "INTERVAL_COUNTER_1,Current 1 Interval Value Register" group.long 0x28++0x03 line.long 0x00 "INTERVAL_COUNTER_2,Current 2 Interval Value Register" group.long 0x2C++0x03 line.long 0x00 "INTERVAL_COUNTER_3,Current 3 Interval Value Register" group.long 0x30++0x03 line.long 0x00 "MATCH_1_COUNTER_1,Current 1 Match Value Register" group.long 0x34++0x03 line.long 0x00 "MATCH_1_COUNTER_2,Current 2 Match Value Register" group.long 0x38++0x03 line.long 0x00 "MATCH_1_COUNTER_3,Current 3 Match Value Register" group.long 0x3C++0x03 line.long 0x00 "MATCH_2_COUNTER_1,Current 1 Match Value Register" group.long 0x40++0x03 line.long 0x00 "MATCH_2_COUNTER_2,Current 2 Match Value Register" group.long 0x44++0x03 line.long 0x00 "MATCH_2_COUNTER_3,Current 3 Match Value Register" group.long 0x48++0x03 line.long 0x00 "MATCH_3_COUNTER_1,Current 1 Match Value Register" group.long 0x4C++0x03 line.long 0x00 "MATCH_3_COUNTER_2,Current 2 Match Value Register" group.long 0x50++0x03 line.long 0x00 "MATCH_3_COUNTER_3,Current 3 Match Value Register" hgroup.byte 0x54++0x00 hide.byte 0x00 "INTERRUPT_REGISTER_1,Counter 1 Interrupt Register" in hgroup.byte 0x58++0x00 hide.byte 0x00 "INTERRUPT_REGISTER_2,Counter 2 Interrupt Register" in hgroup.byte 0x5C++0x00 hide.byte 0x00 "INTERRUPT_REGISTER_3,Counter 3 Interrupt Register" in else rgroup.word 0x18++0x01 line.word 0x00 "COUNTER_VALUE_1,Current 1 Counter Value Register" rgroup.word 0x1C++0x01 line.word 0x00 "COUNTER_VALUE_2,Current 2 Counter Value Register" rgroup.word 0x20++0x01 line.word 0x00 "COUNTER_VALUE_3,Current 3 Counter Value Register" group.word 0x24++0x01 line.word 0x00 "INTERVAL_COUNTER_1,Current 1 Interval Value Register" group.word 0x28++0x01 line.word 0x00 "INTERVAL_COUNTER_2,Current 2 Interval Value Register" group.word 0x2C++0x01 line.word 0x00 "INTERVAL_COUNTER_3,Current 3 Interval Value Register" group.word 0x30++0x01 line.word 0x00 "MATCH_1_COUNTER_1,Current 1 Match Value Register" group.word 0x34++0x01 line.word 0x00 "MATCH_1_COUNTER_2,Current 2 Match Value Register" group.word 0x38++0x01 line.word 0x00 "MATCH_1_COUNTER_3,Current 3 Match Value Register" group.word 0x3C++0x01 line.word 0x00 "MATCH_2_COUNTER_1,Current 1 Match Value Register" group.word 0x40++0x01 line.word 0x00 "MATCH_2_COUNTER_2,Current 2 Match Value Register" group.word 0x44++0x01 line.word 0x00 "MATCH_2_COUNTER_3,Current 3 Match Value Register" group.word 0x48++0x01 line.word 0x00 "MATCH_3_COUNTER_1,Current 1 Match Value Register" group.word 0x4C++0x01 line.word 0x00 "MATCH_3_COUNTER_2,Current 2 Match Value Register" group.word 0x50++0x01 line.word 0x00 "MATCH_3_COUNTER_3,Current 3 Match Value Register" rgroup.byte 0x54++0x00 line.byte 0x00 "INTERRUPT_REGISTER_1,Counter 1 Interrupt Register" bitfld.byte 0x00 5. " EV ,Event timer overflow interrupt" "No interrupt,Interrupt" bitfld.byte 0x00 4. " OV ,Counter overflow" "No interrupt,Interrupt" bitfld.byte 0x00 3. " M3 ,Match 3 interrupt" "No interrupt,Interrupt" bitfld.byte 0x00 2. " M2 ,Match 2 interrupt" "No interrupt,Interrupt" textline " " bitfld.byte 0x00 1. " M1 ,Match 1 interrupt" "No interrupt,Interrupt" bitfld.byte 0x00 0. " IV ,Interval interrupt" "No interrupt,Interrupt" rgroup.byte 0x58++0x00 line.byte 0x00 "INTERRUPT_REGISTER_2,Counter 2 Interrupt Register" bitfld.byte 0x00 5. " EV ,Event timer overflow interrupt" "No interrupt,Interrupt" bitfld.byte 0x00 4. " OV ,Counter overflow" "No interrupt,Interrupt" bitfld.byte 0x00 3. " M3 ,Match 3 interrupt" "No interrupt,Interrupt" bitfld.byte 0x00 2. " M2 ,Match 2 interrupt" "No interrupt,Interrupt" textline " " bitfld.byte 0x00 1. " M1 ,Match 1 interrupt" "No interrupt,Interrupt" bitfld.byte 0x00 0. " IV ,Interval interrupt" "No interrupt,Interrupt" rgroup.byte 0x5C++0x00 line.byte 0x00 "INTERRUPT_REGISTER_3,Counter 3 Interrupt Register" bitfld.byte 0x00 5. " EV ,Event timer overflow interrupt" "No interrupt,Interrupt" bitfld.byte 0x00 4. " OV ,Counter overflow" "No interrupt,Interrupt" bitfld.byte 0x00 3. " M3 ,Match 3 interrupt" "No interrupt,Interrupt" bitfld.byte 0x00 2. " M2 ,Match 2 interrupt" "No interrupt,Interrupt" textline " " bitfld.byte 0x00 1. " M1 ,Match 1 interrupt" "No interrupt,Interrupt" bitfld.byte 0x00 0. " IV ,Interval interrupt" "No interrupt,Interrupt" endif group.byte 0x60++0x00 line.byte 0x00 "INTERRUPT_ENABLE_1,Counter 1 Interrupt Enable Register" bitfld.byte 0x00 5. " IEN[5] ,Event timer overflow interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 4. " IEN[4] ,Counter overflow enable" "Disabled,Enabled" bitfld.byte 0x00 3. " IEN[3] ,Match 3 interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 2. " IEN[2] ,Match 2 interrupt enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 1. " IEN[1] ,Match 1 interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 0. " IEN[0] ,Interval interrupt enable" "Disabled,Enabled" group.byte 0x64++0x00 line.byte 0x00 "INTERRUPT_ENABLE_2,Counter 2 Interrupt Enable Register" bitfld.byte 0x00 5. " IEN[5] ,Event timer overflow interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 4. " IEN[4] ,Counter overflow enable" "Disabled,Enabled" bitfld.byte 0x00 3. " IEN[3] ,Match 3 interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 2. " IEN[2] ,Match 2 interrupt enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 1. " IEN[1] ,Match 1 interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 0. " IEN[0] ,Interval interrupt enable" "Disabled,Enabled" group.byte 0x68++0x00 line.byte 0x00 "INTERRUPT_ENABLE_3,Counter 3 Interrupt Enable Register" bitfld.byte 0x00 5. " IEN[5] ,Event timer overflow interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 4. " IEN[4] ,Counter overflow enable" "Disabled,Enabled" bitfld.byte 0x00 3. " IEN[3] ,Match 3 interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 2. " IEN[2] ,Match 2 interrupt enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 1. " IEN[1] ,Match 1 interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 0. " IEN[0] ,Interval interrupt enable" "Disabled,Enabled" sif (cpuis("ZYNQ-ULTRASCALE+*")) group.byte 0x6C++0x00 line.byte 0x00 "EVENT_CONTROL_TIMER_1,Timer 1 Event Control Register" bitfld.byte 0x00 3. " E_TM ,Test Mode" "Disabled,Enabled" bitfld.byte 0x00 2. " E_OV ,Timer overflow counter" "Disabled,Enabled" bitfld.byte 0x00 1. " E_LO ,Timer count level" "High,Low" bitfld.byte 0x00 0. " E_EN ,Enable timer" "Disabled,Enabled" group.byte 0x70++0x00 line.byte 0x00 "EVENT_CONTROL_TIMER_2,Timer 2 Event Control Register" bitfld.byte 0x00 3. " E_TM ,Test Mode" "Disabled,Enabled" bitfld.byte 0x00 2. " E_OV ,Timer overflow counter" "Disabled,Enabled" bitfld.byte 0x00 1. " E_LO ,Timer count level" "High,Low" bitfld.byte 0x00 0. " E_EN ,Enable timer" "Disabled,Enabled" group.byte 0x74++0x00 line.byte 0x00 "EVENT_CONTROL_TIMER_3,Timer 3 Event Control Register" bitfld.byte 0x00 3. " E_TM ,Test Mode" "Disabled,Enabled" bitfld.byte 0x00 2. " E_OV ,Timer overflow counter" "Disabled,Enabled" bitfld.byte 0x00 1. " E_LO ,Timer count level" "High,Low" bitfld.byte 0x00 0. " E_EN ,Enable timer" "Disabled,Enabled" rgroup.long 0x78++0x03 line.long 0x00 "EVENT_REGISTER_1,Timer 1 Event Register" rgroup.long 0x7C++0x03 line.long 0x00 "EVENT_REGISTER_2,Timer 2 Event Register" rgroup.long 0x80++0x03 line.long 0x00 "EVENT_REGISTER_3,Timer 3 Event Register" else group.byte 0x6C++0x00 line.byte 0x00 "EVENT_CONTROL_TIMER_1,Timer 1 Event Control Register" bitfld.byte 0x00 3. " E_OV ,Timer overflow counter" "Disabled,Enabled" bitfld.byte 0x00 1. " E_LO ,Timer count level" "High,Low" bitfld.byte 0x00 0. " E_EN ,Enable timer" "Disabled,Enabled" group.byte 0x70++0x00 line.byte 0x00 "EVENT_CONTROL_TIMER_2,Timer 2 Event Control Register" bitfld.byte 0x00 3. " E_OV ,Timer overflow counter" "Disabled,Enabled" bitfld.byte 0x00 1. " E_LO ,Timer count level" "High,Low" bitfld.byte 0x00 0. " E_EN ,Enable timer" "Disabled,Enabled" group.byte 0x74++0x00 line.byte 0x00 "EVENT_CONTROL_TIMER_3,Timer 3 Event Control Register" bitfld.byte 0x00 3. " E_OV ,Timer overflow counter" "Disabled,Enabled" bitfld.byte 0x00 1. " E_LO ,Timer count level" "High,Low" bitfld.byte 0x00 0. " E_EN ,Enable timer" "Disabled,Enabled" rgroup.word 0x78++0x01 line.word 0x00 "EVENT_REGISTER_1,Timer 1 Event Register" rgroup.word 0x7C++0x01 line.word 0x00 "EVENT_REGISTER_2,Timer 2 Event Register" rgroup.word 0x80++0x01 line.word 0x00 "EVENT_REGISTER_3,Timer 3 Event Register" endif width 11. tree.end tree "TTC1" base ad:0xFF120000 width 23. group.byte 0x0++0x00 line.byte 0x00 "CLOCK_CONTROL_1,Clock 1 Control Register" bitfld.byte 0x00 6. " EX_E ,External Clock Edge" "Positive,Negative" bitfld.byte 0x00 5. " C_SRC ,Clock Source" "pclk,ext_clk" bitfld.byte 0x00 1.--4. " PS_V ,Prescale value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.byte 0x00 0. " PS_EN ,Prescale enable" "Disabled,Enabled" group.byte 0x4++0x00 line.byte 0x00 "CLOCK_CONTROL_2,Clock 2 Control Register" bitfld.byte 0x00 6. " EX_E ,External Clock Edge" "Positive,Negative" bitfld.byte 0x00 5. " C_SRC ,Clock Source" "pclk,ext_clk" bitfld.byte 0x00 1.--4. " PS_V ,Prescale value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.byte 0x00 0. " PS_EN ,Prescale enable" "Disabled,Enabled" group.byte 0x8++0x00 line.byte 0x00 "CLOCK_CONTROL_3,Clock 3 Control Register" bitfld.byte 0x00 6. " EX_E ,External Clock Edge" "Positive,Negative" bitfld.byte 0x00 5. " C_SRC ,Clock Source" "pclk,ext_clk" bitfld.byte 0x00 1.--4. " PS_V ,Prescale value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.byte 0x00 0. " PS_EN ,Prescale enable" "Disabled,Enabled" group.byte 0xC++0x00 line.byte 0x00 "COUNTER_CONTROL_1,Clock 1 Operational Mode And Reset Register" bitfld.byte 0x00 6. " WAVE_POL ,Waveform polarity" "Positive,Negative" bitfld.byte 0x00 5. " WAVE_EN ,Output waveform enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RST ,Counter reset" "No reset,Reset" bitfld.byte 0x00 3. " MATCH ,Register Match mode" "Disabled,Enabled" textline " " bitfld.byte 0x00 2. " DEC ,Decrement" "Disabled,Enabled" bitfld.byte 0x00 1. " INT ,Interval Mode" "Disabled,Enabled" bitfld.byte 0x00 0. " DIS ,Disable counter" "No,Yes" group.byte 0x10++0x00 line.byte 0x00 "COUNTER_CONTROL_2,Clock 2 Operational Mode And Reset Register" bitfld.byte 0x00 6. " WAVE_POL ,Waveform polarity" "Positive,Negative" bitfld.byte 0x00 5. " WAVE_EN ,Output waveform enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RST ,Counter reset" "No reset,Reset" bitfld.byte 0x00 3. " MATCH ,Register Match mode" "Disabled,Enabled" textline " " bitfld.byte 0x00 2. " DEC ,Decrement" "Disabled,Enabled" bitfld.byte 0x00 1. " INT ,Interval Mode" "Disabled,Enabled" bitfld.byte 0x00 0. " DIS ,Disable counter" "No,Yes" group.byte 0x14++0x00 line.byte 0x00 "COUNTER_CONTROL_3,Clock 3 Operational Mode And Reset Register" bitfld.byte 0x00 6. " WAVE_POL ,Waveform polarity" "Positive,Negative" bitfld.byte 0x00 5. " WAVE_EN ,Output waveform enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RST ,Counter reset" "No reset,Reset" bitfld.byte 0x00 3. " MATCH ,Register Match mode" "Disabled,Enabled" textline " " bitfld.byte 0x00 2. " DEC ,Decrement" "Disabled,Enabled" bitfld.byte 0x00 1. " INT ,Interval Mode" "Disabled,Enabled" bitfld.byte 0x00 0. " DIS ,Disable counter" "No,Yes" sif (cpuis("ZYNQ-ULTRASCALE+*")) rgroup.long 0x18++0x03 line.long 0x00 "COUNTER_VALUE_1,Current 1 Counter Value Register" rgroup.long 0x1C++0x03 line.long 0x00 "COUNTER_VALUE_2,Current 2 Counter Value Register" rgroup.long 0x20++0x03 line.long 0x00 "COUNTER_VALUE_3,Current 3 Counter Value Register" group.long 0x24++0x03 line.long 0x00 "INTERVAL_COUNTER_1,Current 1 Interval Value Register" group.long 0x28++0x03 line.long 0x00 "INTERVAL_COUNTER_2,Current 2 Interval Value Register" group.long 0x2C++0x03 line.long 0x00 "INTERVAL_COUNTER_3,Current 3 Interval Value Register" group.long 0x30++0x03 line.long 0x00 "MATCH_1_COUNTER_1,Current 1 Match Value Register" group.long 0x34++0x03 line.long 0x00 "MATCH_1_COUNTER_2,Current 2 Match Value Register" group.long 0x38++0x03 line.long 0x00 "MATCH_1_COUNTER_3,Current 3 Match Value Register" group.long 0x3C++0x03 line.long 0x00 "MATCH_2_COUNTER_1,Current 1 Match Value Register" group.long 0x40++0x03 line.long 0x00 "MATCH_2_COUNTER_2,Current 2 Match Value Register" group.long 0x44++0x03 line.long 0x00 "MATCH_2_COUNTER_3,Current 3 Match Value Register" group.long 0x48++0x03 line.long 0x00 "MATCH_3_COUNTER_1,Current 1 Match Value Register" group.long 0x4C++0x03 line.long 0x00 "MATCH_3_COUNTER_2,Current 2 Match Value Register" group.long 0x50++0x03 line.long 0x00 "MATCH_3_COUNTER_3,Current 3 Match Value Register" hgroup.byte 0x54++0x00 hide.byte 0x00 "INTERRUPT_REGISTER_1,Counter 1 Interrupt Register" in hgroup.byte 0x58++0x00 hide.byte 0x00 "INTERRUPT_REGISTER_2,Counter 2 Interrupt Register" in hgroup.byte 0x5C++0x00 hide.byte 0x00 "INTERRUPT_REGISTER_3,Counter 3 Interrupt Register" in else rgroup.word 0x18++0x01 line.word 0x00 "COUNTER_VALUE_1,Current 1 Counter Value Register" rgroup.word 0x1C++0x01 line.word 0x00 "COUNTER_VALUE_2,Current 2 Counter Value Register" rgroup.word 0x20++0x01 line.word 0x00 "COUNTER_VALUE_3,Current 3 Counter Value Register" group.word 0x24++0x01 line.word 0x00 "INTERVAL_COUNTER_1,Current 1 Interval Value Register" group.word 0x28++0x01 line.word 0x00 "INTERVAL_COUNTER_2,Current 2 Interval Value Register" group.word 0x2C++0x01 line.word 0x00 "INTERVAL_COUNTER_3,Current 3 Interval Value Register" group.word 0x30++0x01 line.word 0x00 "MATCH_1_COUNTER_1,Current 1 Match Value Register" group.word 0x34++0x01 line.word 0x00 "MATCH_1_COUNTER_2,Current 2 Match Value Register" group.word 0x38++0x01 line.word 0x00 "MATCH_1_COUNTER_3,Current 3 Match Value Register" group.word 0x3C++0x01 line.word 0x00 "MATCH_2_COUNTER_1,Current 1 Match Value Register" group.word 0x40++0x01 line.word 0x00 "MATCH_2_COUNTER_2,Current 2 Match Value Register" group.word 0x44++0x01 line.word 0x00 "MATCH_2_COUNTER_3,Current 3 Match Value Register" group.word 0x48++0x01 line.word 0x00 "MATCH_3_COUNTER_1,Current 1 Match Value Register" group.word 0x4C++0x01 line.word 0x00 "MATCH_3_COUNTER_2,Current 2 Match Value Register" group.word 0x50++0x01 line.word 0x00 "MATCH_3_COUNTER_3,Current 3 Match Value Register" rgroup.byte 0x54++0x00 line.byte 0x00 "INTERRUPT_REGISTER_1,Counter 1 Interrupt Register" bitfld.byte 0x00 5. " EV ,Event timer overflow interrupt" "No interrupt,Interrupt" bitfld.byte 0x00 4. " OV ,Counter overflow" "No interrupt,Interrupt" bitfld.byte 0x00 3. " M3 ,Match 3 interrupt" "No interrupt,Interrupt" bitfld.byte 0x00 2. " M2 ,Match 2 interrupt" "No interrupt,Interrupt" textline " " bitfld.byte 0x00 1. " M1 ,Match 1 interrupt" "No interrupt,Interrupt" bitfld.byte 0x00 0. " IV ,Interval interrupt" "No interrupt,Interrupt" rgroup.byte 0x58++0x00 line.byte 0x00 "INTERRUPT_REGISTER_2,Counter 2 Interrupt Register" bitfld.byte 0x00 5. " EV ,Event timer overflow interrupt" "No interrupt,Interrupt" bitfld.byte 0x00 4. " OV ,Counter overflow" "No interrupt,Interrupt" bitfld.byte 0x00 3. " M3 ,Match 3 interrupt" "No interrupt,Interrupt" bitfld.byte 0x00 2. " M2 ,Match 2 interrupt" "No interrupt,Interrupt" textline " " bitfld.byte 0x00 1. " M1 ,Match 1 interrupt" "No interrupt,Interrupt" bitfld.byte 0x00 0. " IV ,Interval interrupt" "No interrupt,Interrupt" rgroup.byte 0x5C++0x00 line.byte 0x00 "INTERRUPT_REGISTER_3,Counter 3 Interrupt Register" bitfld.byte 0x00 5. " EV ,Event timer overflow interrupt" "No interrupt,Interrupt" bitfld.byte 0x00 4. " OV ,Counter overflow" "No interrupt,Interrupt" bitfld.byte 0x00 3. " M3 ,Match 3 interrupt" "No interrupt,Interrupt" bitfld.byte 0x00 2. " M2 ,Match 2 interrupt" "No interrupt,Interrupt" textline " " bitfld.byte 0x00 1. " M1 ,Match 1 interrupt" "No interrupt,Interrupt" bitfld.byte 0x00 0. " IV ,Interval interrupt" "No interrupt,Interrupt" endif group.byte 0x60++0x00 line.byte 0x00 "INTERRUPT_ENABLE_1,Counter 1 Interrupt Enable Register" bitfld.byte 0x00 5. " IEN[5] ,Event timer overflow interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 4. " IEN[4] ,Counter overflow enable" "Disabled,Enabled" bitfld.byte 0x00 3. " IEN[3] ,Match 3 interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 2. " IEN[2] ,Match 2 interrupt enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 1. " IEN[1] ,Match 1 interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 0. " IEN[0] ,Interval interrupt enable" "Disabled,Enabled" group.byte 0x64++0x00 line.byte 0x00 "INTERRUPT_ENABLE_2,Counter 2 Interrupt Enable Register" bitfld.byte 0x00 5. " IEN[5] ,Event timer overflow interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 4. " IEN[4] ,Counter overflow enable" "Disabled,Enabled" bitfld.byte 0x00 3. " IEN[3] ,Match 3 interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 2. " IEN[2] ,Match 2 interrupt enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 1. " IEN[1] ,Match 1 interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 0. " IEN[0] ,Interval interrupt enable" "Disabled,Enabled" group.byte 0x68++0x00 line.byte 0x00 "INTERRUPT_ENABLE_3,Counter 3 Interrupt Enable Register" bitfld.byte 0x00 5. " IEN[5] ,Event timer overflow interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 4. " IEN[4] ,Counter overflow enable" "Disabled,Enabled" bitfld.byte 0x00 3. " IEN[3] ,Match 3 interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 2. " IEN[2] ,Match 2 interrupt enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 1. " IEN[1] ,Match 1 interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 0. " IEN[0] ,Interval interrupt enable" "Disabled,Enabled" sif (cpuis("ZYNQ-ULTRASCALE+*")) group.byte 0x6C++0x00 line.byte 0x00 "EVENT_CONTROL_TIMER_1,Timer 1 Event Control Register" bitfld.byte 0x00 3. " E_TM ,Test Mode" "Disabled,Enabled" bitfld.byte 0x00 2. " E_OV ,Timer overflow counter" "Disabled,Enabled" bitfld.byte 0x00 1. " E_LO ,Timer count level" "High,Low" bitfld.byte 0x00 0. " E_EN ,Enable timer" "Disabled,Enabled" group.byte 0x70++0x00 line.byte 0x00 "EVENT_CONTROL_TIMER_2,Timer 2 Event Control Register" bitfld.byte 0x00 3. " E_TM ,Test Mode" "Disabled,Enabled" bitfld.byte 0x00 2. " E_OV ,Timer overflow counter" "Disabled,Enabled" bitfld.byte 0x00 1. " E_LO ,Timer count level" "High,Low" bitfld.byte 0x00 0. " E_EN ,Enable timer" "Disabled,Enabled" group.byte 0x74++0x00 line.byte 0x00 "EVENT_CONTROL_TIMER_3,Timer 3 Event Control Register" bitfld.byte 0x00 3. " E_TM ,Test Mode" "Disabled,Enabled" bitfld.byte 0x00 2. " E_OV ,Timer overflow counter" "Disabled,Enabled" bitfld.byte 0x00 1. " E_LO ,Timer count level" "High,Low" bitfld.byte 0x00 0. " E_EN ,Enable timer" "Disabled,Enabled" rgroup.long 0x78++0x03 line.long 0x00 "EVENT_REGISTER_1,Timer 1 Event Register" rgroup.long 0x7C++0x03 line.long 0x00 "EVENT_REGISTER_2,Timer 2 Event Register" rgroup.long 0x80++0x03 line.long 0x00 "EVENT_REGISTER_3,Timer 3 Event Register" else group.byte 0x6C++0x00 line.byte 0x00 "EVENT_CONTROL_TIMER_1,Timer 1 Event Control Register" bitfld.byte 0x00 3. " E_OV ,Timer overflow counter" "Disabled,Enabled" bitfld.byte 0x00 1. " E_LO ,Timer count level" "High,Low" bitfld.byte 0x00 0. " E_EN ,Enable timer" "Disabled,Enabled" group.byte 0x70++0x00 line.byte 0x00 "EVENT_CONTROL_TIMER_2,Timer 2 Event Control Register" bitfld.byte 0x00 3. " E_OV ,Timer overflow counter" "Disabled,Enabled" bitfld.byte 0x00 1. " E_LO ,Timer count level" "High,Low" bitfld.byte 0x00 0. " E_EN ,Enable timer" "Disabled,Enabled" group.byte 0x74++0x00 line.byte 0x00 "EVENT_CONTROL_TIMER_3,Timer 3 Event Control Register" bitfld.byte 0x00 3. " E_OV ,Timer overflow counter" "Disabled,Enabled" bitfld.byte 0x00 1. " E_LO ,Timer count level" "High,Low" bitfld.byte 0x00 0. " E_EN ,Enable timer" "Disabled,Enabled" rgroup.word 0x78++0x01 line.word 0x00 "EVENT_REGISTER_1,Timer 1 Event Register" rgroup.word 0x7C++0x01 line.word 0x00 "EVENT_REGISTER_2,Timer 2 Event Register" rgroup.word 0x80++0x01 line.word 0x00 "EVENT_REGISTER_3,Timer 3 Event Register" endif width 11. tree.end tree "TTC2" base ad:0xFF130000 width 23. group.byte 0x0++0x00 line.byte 0x00 "CLOCK_CONTROL_1,Clock 1 Control Register" bitfld.byte 0x00 6. " EX_E ,External Clock Edge" "Positive,Negative" bitfld.byte 0x00 5. " C_SRC ,Clock Source" "pclk,ext_clk" bitfld.byte 0x00 1.--4. " PS_V ,Prescale value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.byte 0x00 0. " PS_EN ,Prescale enable" "Disabled,Enabled" group.byte 0x4++0x00 line.byte 0x00 "CLOCK_CONTROL_2,Clock 2 Control Register" bitfld.byte 0x00 6. " EX_E ,External Clock Edge" "Positive,Negative" bitfld.byte 0x00 5. " C_SRC ,Clock Source" "pclk,ext_clk" bitfld.byte 0x00 1.--4. " PS_V ,Prescale value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.byte 0x00 0. " PS_EN ,Prescale enable" "Disabled,Enabled" group.byte 0x8++0x00 line.byte 0x00 "CLOCK_CONTROL_3,Clock 3 Control Register" bitfld.byte 0x00 6. " EX_E ,External Clock Edge" "Positive,Negative" bitfld.byte 0x00 5. " C_SRC ,Clock Source" "pclk,ext_clk" bitfld.byte 0x00 1.--4. " PS_V ,Prescale value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.byte 0x00 0. " PS_EN ,Prescale enable" "Disabled,Enabled" group.byte 0xC++0x00 line.byte 0x00 "COUNTER_CONTROL_1,Clock 1 Operational Mode And Reset Register" bitfld.byte 0x00 6. " WAVE_POL ,Waveform polarity" "Positive,Negative" bitfld.byte 0x00 5. " WAVE_EN ,Output waveform enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RST ,Counter reset" "No reset,Reset" bitfld.byte 0x00 3. " MATCH ,Register Match mode" "Disabled,Enabled" textline " " bitfld.byte 0x00 2. " DEC ,Decrement" "Disabled,Enabled" bitfld.byte 0x00 1. " INT ,Interval Mode" "Disabled,Enabled" bitfld.byte 0x00 0. " DIS ,Disable counter" "No,Yes" group.byte 0x10++0x00 line.byte 0x00 "COUNTER_CONTROL_2,Clock 2 Operational Mode And Reset Register" bitfld.byte 0x00 6. " WAVE_POL ,Waveform polarity" "Positive,Negative" bitfld.byte 0x00 5. " WAVE_EN ,Output waveform enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RST ,Counter reset" "No reset,Reset" bitfld.byte 0x00 3. " MATCH ,Register Match mode" "Disabled,Enabled" textline " " bitfld.byte 0x00 2. " DEC ,Decrement" "Disabled,Enabled" bitfld.byte 0x00 1. " INT ,Interval Mode" "Disabled,Enabled" bitfld.byte 0x00 0. " DIS ,Disable counter" "No,Yes" group.byte 0x14++0x00 line.byte 0x00 "COUNTER_CONTROL_3,Clock 3 Operational Mode And Reset Register" bitfld.byte 0x00 6. " WAVE_POL ,Waveform polarity" "Positive,Negative" bitfld.byte 0x00 5. " WAVE_EN ,Output waveform enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RST ,Counter reset" "No reset,Reset" bitfld.byte 0x00 3. " MATCH ,Register Match mode" "Disabled,Enabled" textline " " bitfld.byte 0x00 2. " DEC ,Decrement" "Disabled,Enabled" bitfld.byte 0x00 1. " INT ,Interval Mode" "Disabled,Enabled" bitfld.byte 0x00 0. " DIS ,Disable counter" "No,Yes" sif (cpuis("ZYNQ-ULTRASCALE+*")) rgroup.long 0x18++0x03 line.long 0x00 "COUNTER_VALUE_1,Current 1 Counter Value Register" rgroup.long 0x1C++0x03 line.long 0x00 "COUNTER_VALUE_2,Current 2 Counter Value Register" rgroup.long 0x20++0x03 line.long 0x00 "COUNTER_VALUE_3,Current 3 Counter Value Register" group.long 0x24++0x03 line.long 0x00 "INTERVAL_COUNTER_1,Current 1 Interval Value Register" group.long 0x28++0x03 line.long 0x00 "INTERVAL_COUNTER_2,Current 2 Interval Value Register" group.long 0x2C++0x03 line.long 0x00 "INTERVAL_COUNTER_3,Current 3 Interval Value Register" group.long 0x30++0x03 line.long 0x00 "MATCH_1_COUNTER_1,Current 1 Match Value Register" group.long 0x34++0x03 line.long 0x00 "MATCH_1_COUNTER_2,Current 2 Match Value Register" group.long 0x38++0x03 line.long 0x00 "MATCH_1_COUNTER_3,Current 3 Match Value Register" group.long 0x3C++0x03 line.long 0x00 "MATCH_2_COUNTER_1,Current 1 Match Value Register" group.long 0x40++0x03 line.long 0x00 "MATCH_2_COUNTER_2,Current 2 Match Value Register" group.long 0x44++0x03 line.long 0x00 "MATCH_2_COUNTER_3,Current 3 Match Value Register" group.long 0x48++0x03 line.long 0x00 "MATCH_3_COUNTER_1,Current 1 Match Value Register" group.long 0x4C++0x03 line.long 0x00 "MATCH_3_COUNTER_2,Current 2 Match Value Register" group.long 0x50++0x03 line.long 0x00 "MATCH_3_COUNTER_3,Current 3 Match Value Register" hgroup.byte 0x54++0x00 hide.byte 0x00 "INTERRUPT_REGISTER_1,Counter 1 Interrupt Register" in hgroup.byte 0x58++0x00 hide.byte 0x00 "INTERRUPT_REGISTER_2,Counter 2 Interrupt Register" in hgroup.byte 0x5C++0x00 hide.byte 0x00 "INTERRUPT_REGISTER_3,Counter 3 Interrupt Register" in else rgroup.word 0x18++0x01 line.word 0x00 "COUNTER_VALUE_1,Current 1 Counter Value Register" rgroup.word 0x1C++0x01 line.word 0x00 "COUNTER_VALUE_2,Current 2 Counter Value Register" rgroup.word 0x20++0x01 line.word 0x00 "COUNTER_VALUE_3,Current 3 Counter Value Register" group.word 0x24++0x01 line.word 0x00 "INTERVAL_COUNTER_1,Current 1 Interval Value Register" group.word 0x28++0x01 line.word 0x00 "INTERVAL_COUNTER_2,Current 2 Interval Value Register" group.word 0x2C++0x01 line.word 0x00 "INTERVAL_COUNTER_3,Current 3 Interval Value Register" group.word 0x30++0x01 line.word 0x00 "MATCH_1_COUNTER_1,Current 1 Match Value Register" group.word 0x34++0x01 line.word 0x00 "MATCH_1_COUNTER_2,Current 2 Match Value Register" group.word 0x38++0x01 line.word 0x00 "MATCH_1_COUNTER_3,Current 3 Match Value Register" group.word 0x3C++0x01 line.word 0x00 "MATCH_2_COUNTER_1,Current 1 Match Value Register" group.word 0x40++0x01 line.word 0x00 "MATCH_2_COUNTER_2,Current 2 Match Value Register" group.word 0x44++0x01 line.word 0x00 "MATCH_2_COUNTER_3,Current 3 Match Value Register" group.word 0x48++0x01 line.word 0x00 "MATCH_3_COUNTER_1,Current 1 Match Value Register" group.word 0x4C++0x01 line.word 0x00 "MATCH_3_COUNTER_2,Current 2 Match Value Register" group.word 0x50++0x01 line.word 0x00 "MATCH_3_COUNTER_3,Current 3 Match Value Register" rgroup.byte 0x54++0x00 line.byte 0x00 "INTERRUPT_REGISTER_1,Counter 1 Interrupt Register" bitfld.byte 0x00 5. " EV ,Event timer overflow interrupt" "No interrupt,Interrupt" bitfld.byte 0x00 4. " OV ,Counter overflow" "No interrupt,Interrupt" bitfld.byte 0x00 3. " M3 ,Match 3 interrupt" "No interrupt,Interrupt" bitfld.byte 0x00 2. " M2 ,Match 2 interrupt" "No interrupt,Interrupt" textline " " bitfld.byte 0x00 1. " M1 ,Match 1 interrupt" "No interrupt,Interrupt" bitfld.byte 0x00 0. " IV ,Interval interrupt" "No interrupt,Interrupt" rgroup.byte 0x58++0x00 line.byte 0x00 "INTERRUPT_REGISTER_2,Counter 2 Interrupt Register" bitfld.byte 0x00 5. " EV ,Event timer overflow interrupt" "No interrupt,Interrupt" bitfld.byte 0x00 4. " OV ,Counter overflow" "No interrupt,Interrupt" bitfld.byte 0x00 3. " M3 ,Match 3 interrupt" "No interrupt,Interrupt" bitfld.byte 0x00 2. " M2 ,Match 2 interrupt" "No interrupt,Interrupt" textline " " bitfld.byte 0x00 1. " M1 ,Match 1 interrupt" "No interrupt,Interrupt" bitfld.byte 0x00 0. " IV ,Interval interrupt" "No interrupt,Interrupt" rgroup.byte 0x5C++0x00 line.byte 0x00 "INTERRUPT_REGISTER_3,Counter 3 Interrupt Register" bitfld.byte 0x00 5. " EV ,Event timer overflow interrupt" "No interrupt,Interrupt" bitfld.byte 0x00 4. " OV ,Counter overflow" "No interrupt,Interrupt" bitfld.byte 0x00 3. " M3 ,Match 3 interrupt" "No interrupt,Interrupt" bitfld.byte 0x00 2. " M2 ,Match 2 interrupt" "No interrupt,Interrupt" textline " " bitfld.byte 0x00 1. " M1 ,Match 1 interrupt" "No interrupt,Interrupt" bitfld.byte 0x00 0. " IV ,Interval interrupt" "No interrupt,Interrupt" endif group.byte 0x60++0x00 line.byte 0x00 "INTERRUPT_ENABLE_1,Counter 1 Interrupt Enable Register" bitfld.byte 0x00 5. " IEN[5] ,Event timer overflow interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 4. " IEN[4] ,Counter overflow enable" "Disabled,Enabled" bitfld.byte 0x00 3. " IEN[3] ,Match 3 interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 2. " IEN[2] ,Match 2 interrupt enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 1. " IEN[1] ,Match 1 interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 0. " IEN[0] ,Interval interrupt enable" "Disabled,Enabled" group.byte 0x64++0x00 line.byte 0x00 "INTERRUPT_ENABLE_2,Counter 2 Interrupt Enable Register" bitfld.byte 0x00 5. " IEN[5] ,Event timer overflow interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 4. " IEN[4] ,Counter overflow enable" "Disabled,Enabled" bitfld.byte 0x00 3. " IEN[3] ,Match 3 interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 2. " IEN[2] ,Match 2 interrupt enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 1. " IEN[1] ,Match 1 interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 0. " IEN[0] ,Interval interrupt enable" "Disabled,Enabled" group.byte 0x68++0x00 line.byte 0x00 "INTERRUPT_ENABLE_3,Counter 3 Interrupt Enable Register" bitfld.byte 0x00 5. " IEN[5] ,Event timer overflow interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 4. " IEN[4] ,Counter overflow enable" "Disabled,Enabled" bitfld.byte 0x00 3. " IEN[3] ,Match 3 interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 2. " IEN[2] ,Match 2 interrupt enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 1. " IEN[1] ,Match 1 interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 0. " IEN[0] ,Interval interrupt enable" "Disabled,Enabled" sif (cpuis("ZYNQ-ULTRASCALE+*")) group.byte 0x6C++0x00 line.byte 0x00 "EVENT_CONTROL_TIMER_1,Timer 1 Event Control Register" bitfld.byte 0x00 3. " E_TM ,Test Mode" "Disabled,Enabled" bitfld.byte 0x00 2. " E_OV ,Timer overflow counter" "Disabled,Enabled" bitfld.byte 0x00 1. " E_LO ,Timer count level" "High,Low" bitfld.byte 0x00 0. " E_EN ,Enable timer" "Disabled,Enabled" group.byte 0x70++0x00 line.byte 0x00 "EVENT_CONTROL_TIMER_2,Timer 2 Event Control Register" bitfld.byte 0x00 3. " E_TM ,Test Mode" "Disabled,Enabled" bitfld.byte 0x00 2. " E_OV ,Timer overflow counter" "Disabled,Enabled" bitfld.byte 0x00 1. " E_LO ,Timer count level" "High,Low" bitfld.byte 0x00 0. " E_EN ,Enable timer" "Disabled,Enabled" group.byte 0x74++0x00 line.byte 0x00 "EVENT_CONTROL_TIMER_3,Timer 3 Event Control Register" bitfld.byte 0x00 3. " E_TM ,Test Mode" "Disabled,Enabled" bitfld.byte 0x00 2. " E_OV ,Timer overflow counter" "Disabled,Enabled" bitfld.byte 0x00 1. " E_LO ,Timer count level" "High,Low" bitfld.byte 0x00 0. " E_EN ,Enable timer" "Disabled,Enabled" rgroup.long 0x78++0x03 line.long 0x00 "EVENT_REGISTER_1,Timer 1 Event Register" rgroup.long 0x7C++0x03 line.long 0x00 "EVENT_REGISTER_2,Timer 2 Event Register" rgroup.long 0x80++0x03 line.long 0x00 "EVENT_REGISTER_3,Timer 3 Event Register" else group.byte 0x6C++0x00 line.byte 0x00 "EVENT_CONTROL_TIMER_1,Timer 1 Event Control Register" bitfld.byte 0x00 3. " E_OV ,Timer overflow counter" "Disabled,Enabled" bitfld.byte 0x00 1. " E_LO ,Timer count level" "High,Low" bitfld.byte 0x00 0. " E_EN ,Enable timer" "Disabled,Enabled" group.byte 0x70++0x00 line.byte 0x00 "EVENT_CONTROL_TIMER_2,Timer 2 Event Control Register" bitfld.byte 0x00 3. " E_OV ,Timer overflow counter" "Disabled,Enabled" bitfld.byte 0x00 1. " E_LO ,Timer count level" "High,Low" bitfld.byte 0x00 0. " E_EN ,Enable timer" "Disabled,Enabled" group.byte 0x74++0x00 line.byte 0x00 "EVENT_CONTROL_TIMER_3,Timer 3 Event Control Register" bitfld.byte 0x00 3. " E_OV ,Timer overflow counter" "Disabled,Enabled" bitfld.byte 0x00 1. " E_LO ,Timer count level" "High,Low" bitfld.byte 0x00 0. " E_EN ,Enable timer" "Disabled,Enabled" rgroup.word 0x78++0x01 line.word 0x00 "EVENT_REGISTER_1,Timer 1 Event Register" rgroup.word 0x7C++0x01 line.word 0x00 "EVENT_REGISTER_2,Timer 2 Event Register" rgroup.word 0x80++0x01 line.word 0x00 "EVENT_REGISTER_3,Timer 3 Event Register" endif width 11. tree.end tree "TTC3" base ad:0xFF140000 width 23. group.byte 0x0++0x00 line.byte 0x00 "CLOCK_CONTROL_1,Clock 1 Control Register" bitfld.byte 0x00 6. " EX_E ,External Clock Edge" "Positive,Negative" bitfld.byte 0x00 5. " C_SRC ,Clock Source" "pclk,ext_clk" bitfld.byte 0x00 1.--4. " PS_V ,Prescale value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.byte 0x00 0. " PS_EN ,Prescale enable" "Disabled,Enabled" group.byte 0x4++0x00 line.byte 0x00 "CLOCK_CONTROL_2,Clock 2 Control Register" bitfld.byte 0x00 6. " EX_E ,External Clock Edge" "Positive,Negative" bitfld.byte 0x00 5. " C_SRC ,Clock Source" "pclk,ext_clk" bitfld.byte 0x00 1.--4. " PS_V ,Prescale value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.byte 0x00 0. " PS_EN ,Prescale enable" "Disabled,Enabled" group.byte 0x8++0x00 line.byte 0x00 "CLOCK_CONTROL_3,Clock 3 Control Register" bitfld.byte 0x00 6. " EX_E ,External Clock Edge" "Positive,Negative" bitfld.byte 0x00 5. " C_SRC ,Clock Source" "pclk,ext_clk" bitfld.byte 0x00 1.--4. " PS_V ,Prescale value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.byte 0x00 0. " PS_EN ,Prescale enable" "Disabled,Enabled" group.byte 0xC++0x00 line.byte 0x00 "COUNTER_CONTROL_1,Clock 1 Operational Mode And Reset Register" bitfld.byte 0x00 6. " WAVE_POL ,Waveform polarity" "Positive,Negative" bitfld.byte 0x00 5. " WAVE_EN ,Output waveform enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RST ,Counter reset" "No reset,Reset" bitfld.byte 0x00 3. " MATCH ,Register Match mode" "Disabled,Enabled" textline " " bitfld.byte 0x00 2. " DEC ,Decrement" "Disabled,Enabled" bitfld.byte 0x00 1. " INT ,Interval Mode" "Disabled,Enabled" bitfld.byte 0x00 0. " DIS ,Disable counter" "No,Yes" group.byte 0x10++0x00 line.byte 0x00 "COUNTER_CONTROL_2,Clock 2 Operational Mode And Reset Register" bitfld.byte 0x00 6. " WAVE_POL ,Waveform polarity" "Positive,Negative" bitfld.byte 0x00 5. " WAVE_EN ,Output waveform enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RST ,Counter reset" "No reset,Reset" bitfld.byte 0x00 3. " MATCH ,Register Match mode" "Disabled,Enabled" textline " " bitfld.byte 0x00 2. " DEC ,Decrement" "Disabled,Enabled" bitfld.byte 0x00 1. " INT ,Interval Mode" "Disabled,Enabled" bitfld.byte 0x00 0. " DIS ,Disable counter" "No,Yes" group.byte 0x14++0x00 line.byte 0x00 "COUNTER_CONTROL_3,Clock 3 Operational Mode And Reset Register" bitfld.byte 0x00 6. " WAVE_POL ,Waveform polarity" "Positive,Negative" bitfld.byte 0x00 5. " WAVE_EN ,Output waveform enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RST ,Counter reset" "No reset,Reset" bitfld.byte 0x00 3. " MATCH ,Register Match mode" "Disabled,Enabled" textline " " bitfld.byte 0x00 2. " DEC ,Decrement" "Disabled,Enabled" bitfld.byte 0x00 1. " INT ,Interval Mode" "Disabled,Enabled" bitfld.byte 0x00 0. " DIS ,Disable counter" "No,Yes" sif (cpuis("ZYNQ-ULTRASCALE+*")) rgroup.long 0x18++0x03 line.long 0x00 "COUNTER_VALUE_1,Current 1 Counter Value Register" rgroup.long 0x1C++0x03 line.long 0x00 "COUNTER_VALUE_2,Current 2 Counter Value Register" rgroup.long 0x20++0x03 line.long 0x00 "COUNTER_VALUE_3,Current 3 Counter Value Register" group.long 0x24++0x03 line.long 0x00 "INTERVAL_COUNTER_1,Current 1 Interval Value Register" group.long 0x28++0x03 line.long 0x00 "INTERVAL_COUNTER_2,Current 2 Interval Value Register" group.long 0x2C++0x03 line.long 0x00 "INTERVAL_COUNTER_3,Current 3 Interval Value Register" group.long 0x30++0x03 line.long 0x00 "MATCH_1_COUNTER_1,Current 1 Match Value Register" group.long 0x34++0x03 line.long 0x00 "MATCH_1_COUNTER_2,Current 2 Match Value Register" group.long 0x38++0x03 line.long 0x00 "MATCH_1_COUNTER_3,Current 3 Match Value Register" group.long 0x3C++0x03 line.long 0x00 "MATCH_2_COUNTER_1,Current 1 Match Value Register" group.long 0x40++0x03 line.long 0x00 "MATCH_2_COUNTER_2,Current 2 Match Value Register" group.long 0x44++0x03 line.long 0x00 "MATCH_2_COUNTER_3,Current 3 Match Value Register" group.long 0x48++0x03 line.long 0x00 "MATCH_3_COUNTER_1,Current 1 Match Value Register" group.long 0x4C++0x03 line.long 0x00 "MATCH_3_COUNTER_2,Current 2 Match Value Register" group.long 0x50++0x03 line.long 0x00 "MATCH_3_COUNTER_3,Current 3 Match Value Register" hgroup.byte 0x54++0x00 hide.byte 0x00 "INTERRUPT_REGISTER_1,Counter 1 Interrupt Register" in hgroup.byte 0x58++0x00 hide.byte 0x00 "INTERRUPT_REGISTER_2,Counter 2 Interrupt Register" in hgroup.byte 0x5C++0x00 hide.byte 0x00 "INTERRUPT_REGISTER_3,Counter 3 Interrupt Register" in else rgroup.word 0x18++0x01 line.word 0x00 "COUNTER_VALUE_1,Current 1 Counter Value Register" rgroup.word 0x1C++0x01 line.word 0x00 "COUNTER_VALUE_2,Current 2 Counter Value Register" rgroup.word 0x20++0x01 line.word 0x00 "COUNTER_VALUE_3,Current 3 Counter Value Register" group.word 0x24++0x01 line.word 0x00 "INTERVAL_COUNTER_1,Current 1 Interval Value Register" group.word 0x28++0x01 line.word 0x00 "INTERVAL_COUNTER_2,Current 2 Interval Value Register" group.word 0x2C++0x01 line.word 0x00 "INTERVAL_COUNTER_3,Current 3 Interval Value Register" group.word 0x30++0x01 line.word 0x00 "MATCH_1_COUNTER_1,Current 1 Match Value Register" group.word 0x34++0x01 line.word 0x00 "MATCH_1_COUNTER_2,Current 2 Match Value Register" group.word 0x38++0x01 line.word 0x00 "MATCH_1_COUNTER_3,Current 3 Match Value Register" group.word 0x3C++0x01 line.word 0x00 "MATCH_2_COUNTER_1,Current 1 Match Value Register" group.word 0x40++0x01 line.word 0x00 "MATCH_2_COUNTER_2,Current 2 Match Value Register" group.word 0x44++0x01 line.word 0x00 "MATCH_2_COUNTER_3,Current 3 Match Value Register" group.word 0x48++0x01 line.word 0x00 "MATCH_3_COUNTER_1,Current 1 Match Value Register" group.word 0x4C++0x01 line.word 0x00 "MATCH_3_COUNTER_2,Current 2 Match Value Register" group.word 0x50++0x01 line.word 0x00 "MATCH_3_COUNTER_3,Current 3 Match Value Register" rgroup.byte 0x54++0x00 line.byte 0x00 "INTERRUPT_REGISTER_1,Counter 1 Interrupt Register" bitfld.byte 0x00 5. " EV ,Event timer overflow interrupt" "No interrupt,Interrupt" bitfld.byte 0x00 4. " OV ,Counter overflow" "No interrupt,Interrupt" bitfld.byte 0x00 3. " M3 ,Match 3 interrupt" "No interrupt,Interrupt" bitfld.byte 0x00 2. " M2 ,Match 2 interrupt" "No interrupt,Interrupt" textline " " bitfld.byte 0x00 1. " M1 ,Match 1 interrupt" "No interrupt,Interrupt" bitfld.byte 0x00 0. " IV ,Interval interrupt" "No interrupt,Interrupt" rgroup.byte 0x58++0x00 line.byte 0x00 "INTERRUPT_REGISTER_2,Counter 2 Interrupt Register" bitfld.byte 0x00 5. " EV ,Event timer overflow interrupt" "No interrupt,Interrupt" bitfld.byte 0x00 4. " OV ,Counter overflow" "No interrupt,Interrupt" bitfld.byte 0x00 3. " M3 ,Match 3 interrupt" "No interrupt,Interrupt" bitfld.byte 0x00 2. " M2 ,Match 2 interrupt" "No interrupt,Interrupt" textline " " bitfld.byte 0x00 1. " M1 ,Match 1 interrupt" "No interrupt,Interrupt" bitfld.byte 0x00 0. " IV ,Interval interrupt" "No interrupt,Interrupt" rgroup.byte 0x5C++0x00 line.byte 0x00 "INTERRUPT_REGISTER_3,Counter 3 Interrupt Register" bitfld.byte 0x00 5. " EV ,Event timer overflow interrupt" "No interrupt,Interrupt" bitfld.byte 0x00 4. " OV ,Counter overflow" "No interrupt,Interrupt" bitfld.byte 0x00 3. " M3 ,Match 3 interrupt" "No interrupt,Interrupt" bitfld.byte 0x00 2. " M2 ,Match 2 interrupt" "No interrupt,Interrupt" textline " " bitfld.byte 0x00 1. " M1 ,Match 1 interrupt" "No interrupt,Interrupt" bitfld.byte 0x00 0. " IV ,Interval interrupt" "No interrupt,Interrupt" endif group.byte 0x60++0x00 line.byte 0x00 "INTERRUPT_ENABLE_1,Counter 1 Interrupt Enable Register" bitfld.byte 0x00 5. " IEN[5] ,Event timer overflow interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 4. " IEN[4] ,Counter overflow enable" "Disabled,Enabled" bitfld.byte 0x00 3. " IEN[3] ,Match 3 interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 2. " IEN[2] ,Match 2 interrupt enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 1. " IEN[1] ,Match 1 interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 0. " IEN[0] ,Interval interrupt enable" "Disabled,Enabled" group.byte 0x64++0x00 line.byte 0x00 "INTERRUPT_ENABLE_2,Counter 2 Interrupt Enable Register" bitfld.byte 0x00 5. " IEN[5] ,Event timer overflow interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 4. " IEN[4] ,Counter overflow enable" "Disabled,Enabled" bitfld.byte 0x00 3. " IEN[3] ,Match 3 interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 2. " IEN[2] ,Match 2 interrupt enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 1. " IEN[1] ,Match 1 interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 0. " IEN[0] ,Interval interrupt enable" "Disabled,Enabled" group.byte 0x68++0x00 line.byte 0x00 "INTERRUPT_ENABLE_3,Counter 3 Interrupt Enable Register" bitfld.byte 0x00 5. " IEN[5] ,Event timer overflow interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 4. " IEN[4] ,Counter overflow enable" "Disabled,Enabled" bitfld.byte 0x00 3. " IEN[3] ,Match 3 interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 2. " IEN[2] ,Match 2 interrupt enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 1. " IEN[1] ,Match 1 interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 0. " IEN[0] ,Interval interrupt enable" "Disabled,Enabled" sif (cpuis("ZYNQ-ULTRASCALE+*")) group.byte 0x6C++0x00 line.byte 0x00 "EVENT_CONTROL_TIMER_1,Timer 1 Event Control Register" bitfld.byte 0x00 3. " E_TM ,Test Mode" "Disabled,Enabled" bitfld.byte 0x00 2. " E_OV ,Timer overflow counter" "Disabled,Enabled" bitfld.byte 0x00 1. " E_LO ,Timer count level" "High,Low" bitfld.byte 0x00 0. " E_EN ,Enable timer" "Disabled,Enabled" group.byte 0x70++0x00 line.byte 0x00 "EVENT_CONTROL_TIMER_2,Timer 2 Event Control Register" bitfld.byte 0x00 3. " E_TM ,Test Mode" "Disabled,Enabled" bitfld.byte 0x00 2. " E_OV ,Timer overflow counter" "Disabled,Enabled" bitfld.byte 0x00 1. " E_LO ,Timer count level" "High,Low" bitfld.byte 0x00 0. " E_EN ,Enable timer" "Disabled,Enabled" group.byte 0x74++0x00 line.byte 0x00 "EVENT_CONTROL_TIMER_3,Timer 3 Event Control Register" bitfld.byte 0x00 3. " E_TM ,Test Mode" "Disabled,Enabled" bitfld.byte 0x00 2. " E_OV ,Timer overflow counter" "Disabled,Enabled" bitfld.byte 0x00 1. " E_LO ,Timer count level" "High,Low" bitfld.byte 0x00 0. " E_EN ,Enable timer" "Disabled,Enabled" rgroup.long 0x78++0x03 line.long 0x00 "EVENT_REGISTER_1,Timer 1 Event Register" rgroup.long 0x7C++0x03 line.long 0x00 "EVENT_REGISTER_2,Timer 2 Event Register" rgroup.long 0x80++0x03 line.long 0x00 "EVENT_REGISTER_3,Timer 3 Event Register" else group.byte 0x6C++0x00 line.byte 0x00 "EVENT_CONTROL_TIMER_1,Timer 1 Event Control Register" bitfld.byte 0x00 3. " E_OV ,Timer overflow counter" "Disabled,Enabled" bitfld.byte 0x00 1. " E_LO ,Timer count level" "High,Low" bitfld.byte 0x00 0. " E_EN ,Enable timer" "Disabled,Enabled" group.byte 0x70++0x00 line.byte 0x00 "EVENT_CONTROL_TIMER_2,Timer 2 Event Control Register" bitfld.byte 0x00 3. " E_OV ,Timer overflow counter" "Disabled,Enabled" bitfld.byte 0x00 1. " E_LO ,Timer count level" "High,Low" bitfld.byte 0x00 0. " E_EN ,Enable timer" "Disabled,Enabled" group.byte 0x74++0x00 line.byte 0x00 "EVENT_CONTROL_TIMER_3,Timer 3 Event Control Register" bitfld.byte 0x00 3. " E_OV ,Timer overflow counter" "Disabled,Enabled" bitfld.byte 0x00 1. " E_LO ,Timer count level" "High,Low" bitfld.byte 0x00 0. " E_EN ,Enable timer" "Disabled,Enabled" rgroup.word 0x78++0x01 line.word 0x00 "EVENT_REGISTER_1,Timer 1 Event Register" rgroup.word 0x7C++0x01 line.word 0x00 "EVENT_REGISTER_2,Timer 2 Event Register" rgroup.word 0x80++0x01 line.word 0x00 "EVENT_REGISTER_3,Timer 3 Event Register" endif width 11. tree.end tree.end tree "UART (UART Controller)" tree "UART 0" base ad:0xFF000000 width 22. group.long 0x00++0x07 line.long 0x00 "CONTROL,UART Control Register" bitfld.long 0x00 8. " STPBRK ,Stop transmitter break" "No effect,Stopped" bitfld.long 0x00 7. " STTBRK ,Start transmitter break" "No effect,Started" bitfld.long 0x00 6. " RSTTO ,Restart receiver timeout counter" "No effect,Restarted" textline " " bitfld.long 0x00 5. " TXDIS ,Transmit disable" "No,Yes" bitfld.long 0x00 4. " TXEN ,Transmit enable" "Disabled,Enabled" bitfld.long 0x00 3. " RXDIS ,Receive disable" "No,Yes" bitfld.long 0x00 2. " RXEN ,Receive enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " TXRES ,Software reset for TX data path" "No reset,Reset" bitfld.long 0x00 0. " RXRES ,Software reset for RX data path" "No reset,Reset" line.long 0x04 "MODE,UART Mode Register" bitfld.long 0x04 12.--13. " WSIZE ,Configure the size of FIFO access from the APB" "1 or 2 bytes,1 byte,2 bytes,4 bytes" bitfld.long 0x04 8.--9. " CHMODE ,Channel mode" "Normal,Automatic echo,Local loopback,Remote loopback" bitfld.long 0x04 6.--7. " NBSTOP ,Number of stop bits" "1 stop bit,1.5 stop bits,2 stop bits," textline " " bitfld.long 0x04 3.--5. " PAR ,Parity type select" "Even,Odd,Space,Mark,No parity,No parity,No parity,No parity" bitfld.long 0x04 1.--2. " CHRL ,Character length select" "8 bits,8 bits,7 bits,6 bits" bitfld.long 0x04 0. " CLKS ,Clock source select" "UART_REF_CLK,UART_REF_CLK/8" group.long 0x10++0x03 line.long 0x00 "INTRPT_MASK_SET/CLR,Interrupt Mask Register" setclrfld.long 0x00 13. -0x08 13. -0x04 13. " RBRK ,Receiver break detect interrupt mask" "Disabled,Enabled" setclrfld.long 0x00 12. -0x08 12. -0x04 12. " TOVR ,Transmitter FIFO overflow interrupt mask" "Disabled,Enabled" setclrfld.long 0x00 11. -0x08 11. -0x04 11. " TNFUL ,Transmitter FIFO nearly full interrupt mask" "Disabled,Enabled" setclrfld.long 0x00 10. -0x08 10. -0x04 10. " TTRIG ,Transmitter FIFO trigger interrupt mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 9. -0x08 9. -0x04 9. " DMSI ,Delta modem status indicator interrupt mask" "Disabled,Enabled" setclrfld.long 0x00 8. -0x08 8. -0x04 8. " TIMEOUT ,Receiver timeout error interrupt mask" "Disabled,Enabled" setclrfld.long 0x00 7. -0x08 7. -0x04 7. " PARE ,Receiver parity error interrupt mask" "Disabled,Enabled" setclrfld.long 0x00 6. -0x08 6. -0x04 6. " FRAME ,Receiver framing error interrupt mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 5. -0x08 5. -0x04 5. " ROVR ,Receiver overflow error interrupt mask" "Disabled,Enabled" setclrfld.long 0x00 4. -0x08 4. -0x04 4. " TFUL ,Transmitter FIFO full interrupt mask" "Disabled,Enabled" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " TEMPTY ,Transmitter FIFO empty interrupt mask" "Disabled,Enabled" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " RFUL ,Receiver FIFO full interrupt mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. -0x08 1. -0x04 1. " REMPTY ,Receiver FIFO empty interrupt mask" "Disabled,Enabled" setclrfld.long 0x00 0. -0x08 0. -0x04 0. " RTRIG ,Receiver FIFO trigger interrupt mask" "Disabled,Enabled" group.long 0x14++0x17 line.long 0x00 "CHNL_INT_STS,Channel Interrupt Status Register" eventfld.long 0x00 13. " RBRK ,Receiver break detect interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 12. " TOVR ,Transmitter FIFO overflow interrupt mask status" "No interrupt,Interrupt" eventfld.long 0x00 11. " TNFUL ,Transmitter FIFO nearly Full interrupt mask status" "No interrupt,Interrupt" eventfld.long 0x00 10. " TTRIG ,Transmitter FIFO trigger interrupt mask status" "No interrupt,Interrupt" textline " " eventfld.long 0x00 9. " DMSI ,Delta modem status indicator interrupt mask status" "No interrupt,Interrupt" eventfld.long 0x00 8. " TIMEOUT ,Receiver timeout error interrupt mask status" "No interrupt,Interrupt" eventfld.long 0x00 7. " PARE ,Receiver parity error interrupt mask status" "No interrupt,Interrupt" eventfld.long 0x00 6. " FRAME ,Receiver framing error interrupt mask status" "No interrupt,Interrupt" textline " " eventfld.long 0x00 5. " ROVR ,Receiver overflow error interrupt mask status" "No interrupt,Interrupt" eventfld.long 0x00 4. " TFUL ,Transmitter FIFO full interrupt mask status" "No interrupt,Interrupt" eventfld.long 0x00 3. " TEMPTY ,Transmitter FIFO empty interrupt mask status" "No interrupt,Interrupt" eventfld.long 0x00 2. " RFUL ,Receiver FIFO full interrupt mask status" "No interrupt,Interrupt" textline " " eventfld.long 0x00 1. " REMPTY ,Receiver FIFO empty interrupt mask status" "No interrupt,Interrupt" eventfld.long 0x00 0. " RTRIG ,Receiver FIFO trigger interrupt mask status" "No interrupt,Interrupt" line.long 0x04 "BAUD_RATE_GEN,Baud Rate Divider Register" hexmask.long.word 0x04 0.--15. 1. " CD ,Baud rate clock divisor value" line.long 0x08 "RCVR_TIMEOUT,Receiver Timeout Register" hexmask.long.byte 0x08 0.--7. 1. " RTO ,Receiver timeout value" line.long 0x0c "RCVR_FIFO_TRIGGER_L0,Receiver FIFO Trigger Level Register" bitfld.long 0x0c 0.--5. " RTRIG ,Receiver FIFO trigger level value (bytes)" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x10 "MODEM_CTRL,Modem Control Register" bitfld.long 0x10 5. " FCM ,Automatic flow control mode" "Disabled,Enabled" bitfld.long 0x10 1. " RTS ,Request to send output control" "Force to 1,Force to 0" bitfld.long 0x10 0. " DTR ,Data terminal ready" "Forced to 1,Forced to 0" line.long 0x014 "MODEM_STS,Modem Status Register" bitfld.long 0x14 8. " FCMS ,Flow control mode" "Disabled,Enabled" rbitfld.long 0x14 7. " DCD ,Data carrier detect input status" "High,Low" rbitfld.long 0x14 6. " RI ,Ring indicator input status" "High,Low" rbitfld.long 0x14 5. " DSR ,Data set ready input status" "High,Low" textline " " rbitfld.long 0x14 4. " CTS ,Clear to send input status" "High,Low" eventfld.long 0x14 3. " DDCD ,Delta data carrier detect status" "Not changed,Changed" eventfld.long 0x14 2. " TERI ,Trailing edge ring indicator status" "Not occurred,Occurred" eventfld.long 0x14 1. " DDSR ,Delta data set ready status" "Not changed,Changed" textline " " eventfld.long 0x14 0. " DCTS ,Delta clear to send status" "Not changed,Changed" textline " " rgroup.long 0x2C++0x03 line.long 0x00 "CHANNEL_STS,Channel Status Register" bitfld.long 0x00 14. " TNFUL ,Transmitter FIFO nearly full continuous status" "More than 1 byte unused,1 byte unused" bitfld.long 0x00 13. " TTRIG ,Transmitter FIFO trigger continuous status" "Less than TTRIG,Greater or equal to TTRIG" bitfld.long 0x00 12. " FDELT ,Receiver flow delay trigger continuous status" "Less than FDEL,Greater or equal to FDEL" textline " " bitfld.long 0x00 11. " TACTIVE ,Transmitter state machine active status" "Inactive,Active" bitfld.long 0x00 10. " RACTIVE ,Receiver state machine active status" "Inactive,Active" bitfld.long 0x00 4. " TFUL ,Transmitter FIFO full continuous status" "Not full,Full" textline " " bitfld.long 0x00 3. " TEMPTY ,Transmitter FIFO empty continuous status" "Not empty,Empty" bitfld.long 0x00 2. " RFUL ,Receiver FIFO full continuous status" "Not full,Full" bitfld.long 0x00 1. " REMPTY ,Receiver FIFO empty continuous status" "Not empty,Empty" textline " " bitfld.long 0x00 0. " RTRIG ,Receiver FIFO trigger continuous status" "Less than RTRIG,Greater or equal to RTRIG" textline " " hgroup.long 0x30++0x3 hide.long 0x00 "TX_RX_FIFO0,Transmit and Receive FIFO Register" textfld " " in textline " " group.long 0x34++0x07 line.long 0x00 "BAUD_RATE_DIVIDER,Baud Rate Divider Register" hexmask.long.byte 0x00 0.--7. 1. " BDIV ,Baud rate divider value" line.long 0x04 "FLOW_DELAY,Flow Control Delay Register" bitfld.long 0x04 0.--5. " FDEL ,RX FIFO trigger level for UA_NRTS de-assertion (bytes)" "Disabled,Disabled,Disabled,Disabled,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x44++0x03 line.long 0x00 "TX_FIFO_TRIGGER_L0,Transmitter FIFO Trigger Level Register" bitfld.long 0x00 0.--5. " TTRIG ,Transmitter FIFO trigger level (bytes)" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x48++0x03 line.long 0x00 "RX_FIFO_BYTE_STATUS,RX FIFO Byte Status Register" bitfld.long 0x00 11. " BYTE3_BREAK ,Break condition of the byte 3 in RX FIFO" "Not detected,Detected" bitfld.long 0x00 10. " BYTE3_FRM_ERR ,Frame error of the byte 3 in RX FIFO" "No error,Error" bitfld.long 0x00 9. " BYTE3_PAR_ERR ,Parity error of the byte 3 in RX FIFO" "No error,Error" textline " " bitfld.long 0x00 8. " BYTE2_BREAK ,Break condition of the byte 2 in RX FIFO" "Not detected,Detected" bitfld.long 0x00 7. " BYTE2_FRM_ERR ,Frame error of the byte 2 in RX FIFO" "No error,Error" bitfld.long 0x00 6. " BYTE2_PAR_ERR ,Parity error of the byte 2 in RX FIFO" "No error,Error" textline " " bitfld.long 0x00 5. " BYTE1_BREAK ,Break condition of the byte 1 in RX FIFO" "Not detected,Detected" bitfld.long 0x00 4. " BYTE1_FRM_ERR ,Frame error of the byte 1 in RX FIFO" "No error,Error" bitfld.long 0x00 3. " BYTE1_PAR_ERR ,Parity error of the byte 1 in RX FIFO" "No error,Error" textline " " bitfld.long 0x00 2. " BYTE0_BREAK ,Break condition of the byte 0 in RX FIFO" "Not detected,Detected" bitfld.long 0x00 1. " BYTE0_FRM_ERR ,Frame error of the byte 0 in RX FIFO" "No error,Error" bitfld.long 0x00 0. " BYTE0_PAR_ERR ,Parity error of the byte 0 in RX FIFO" "No error,Error" width 0x0B tree.end tree "UART 1" base ad:0xFF010000 width 22. group.long 0x00++0x07 line.long 0x00 "CONTROL,UART Control Register" bitfld.long 0x00 8. " STPBRK ,Stop transmitter break" "No effect,Stopped" bitfld.long 0x00 7. " STTBRK ,Start transmitter break" "No effect,Started" bitfld.long 0x00 6. " RSTTO ,Restart receiver timeout counter" "No effect,Restarted" textline " " bitfld.long 0x00 5. " TXDIS ,Transmit disable" "No,Yes" bitfld.long 0x00 4. " TXEN ,Transmit enable" "Disabled,Enabled" bitfld.long 0x00 3. " RXDIS ,Receive disable" "No,Yes" bitfld.long 0x00 2. " RXEN ,Receive enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " TXRES ,Software reset for TX data path" "No reset,Reset" bitfld.long 0x00 0. " RXRES ,Software reset for RX data path" "No reset,Reset" line.long 0x04 "MODE,UART Mode Register" bitfld.long 0x04 12.--13. " WSIZE ,Configure the size of FIFO access from the APB" "1 or 2 bytes,1 byte,2 bytes,4 bytes" bitfld.long 0x04 8.--9. " CHMODE ,Channel mode" "Normal,Automatic echo,Local loopback,Remote loopback" bitfld.long 0x04 6.--7. " NBSTOP ,Number of stop bits" "1 stop bit,1.5 stop bits,2 stop bits," textline " " bitfld.long 0x04 3.--5. " PAR ,Parity type select" "Even,Odd,Space,Mark,No parity,No parity,No parity,No parity" bitfld.long 0x04 1.--2. " CHRL ,Character length select" "8 bits,8 bits,7 bits,6 bits" bitfld.long 0x04 0. " CLKS ,Clock source select" "UART_REF_CLK,UART_REF_CLK/8" group.long 0x10++0x03 line.long 0x00 "INTRPT_MASK_SET/CLR,Interrupt Mask Register" setclrfld.long 0x00 13. -0x08 13. -0x04 13. " RBRK ,Receiver break detect interrupt mask" "Disabled,Enabled" setclrfld.long 0x00 12. -0x08 12. -0x04 12. " TOVR ,Transmitter FIFO overflow interrupt mask" "Disabled,Enabled" setclrfld.long 0x00 11. -0x08 11. -0x04 11. " TNFUL ,Transmitter FIFO nearly full interrupt mask" "Disabled,Enabled" setclrfld.long 0x00 10. -0x08 10. -0x04 10. " TTRIG ,Transmitter FIFO trigger interrupt mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 9. -0x08 9. -0x04 9. " DMSI ,Delta modem status indicator interrupt mask" "Disabled,Enabled" setclrfld.long 0x00 8. -0x08 8. -0x04 8. " TIMEOUT ,Receiver timeout error interrupt mask" "Disabled,Enabled" setclrfld.long 0x00 7. -0x08 7. -0x04 7. " PARE ,Receiver parity error interrupt mask" "Disabled,Enabled" setclrfld.long 0x00 6. -0x08 6. -0x04 6. " FRAME ,Receiver framing error interrupt mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 5. -0x08 5. -0x04 5. " ROVR ,Receiver overflow error interrupt mask" "Disabled,Enabled" setclrfld.long 0x00 4. -0x08 4. -0x04 4. " TFUL ,Transmitter FIFO full interrupt mask" "Disabled,Enabled" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " TEMPTY ,Transmitter FIFO empty interrupt mask" "Disabled,Enabled" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " RFUL ,Receiver FIFO full interrupt mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. -0x08 1. -0x04 1. " REMPTY ,Receiver FIFO empty interrupt mask" "Disabled,Enabled" setclrfld.long 0x00 0. -0x08 0. -0x04 0. " RTRIG ,Receiver FIFO trigger interrupt mask" "Disabled,Enabled" group.long 0x14++0x17 line.long 0x00 "CHNL_INT_STS,Channel Interrupt Status Register" eventfld.long 0x00 13. " RBRK ,Receiver break detect interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 12. " TOVR ,Transmitter FIFO overflow interrupt mask status" "No interrupt,Interrupt" eventfld.long 0x00 11. " TNFUL ,Transmitter FIFO nearly Full interrupt mask status" "No interrupt,Interrupt" eventfld.long 0x00 10. " TTRIG ,Transmitter FIFO trigger interrupt mask status" "No interrupt,Interrupt" textline " " eventfld.long 0x00 9. " DMSI ,Delta modem status indicator interrupt mask status" "No interrupt,Interrupt" eventfld.long 0x00 8. " TIMEOUT ,Receiver timeout error interrupt mask status" "No interrupt,Interrupt" eventfld.long 0x00 7. " PARE ,Receiver parity error interrupt mask status" "No interrupt,Interrupt" eventfld.long 0x00 6. " FRAME ,Receiver framing error interrupt mask status" "No interrupt,Interrupt" textline " " eventfld.long 0x00 5. " ROVR ,Receiver overflow error interrupt mask status" "No interrupt,Interrupt" eventfld.long 0x00 4. " TFUL ,Transmitter FIFO full interrupt mask status" "No interrupt,Interrupt" eventfld.long 0x00 3. " TEMPTY ,Transmitter FIFO empty interrupt mask status" "No interrupt,Interrupt" eventfld.long 0x00 2. " RFUL ,Receiver FIFO full interrupt mask status" "No interrupt,Interrupt" textline " " eventfld.long 0x00 1. " REMPTY ,Receiver FIFO empty interrupt mask status" "No interrupt,Interrupt" eventfld.long 0x00 0. " RTRIG ,Receiver FIFO trigger interrupt mask status" "No interrupt,Interrupt" line.long 0x04 "BAUD_RATE_GEN,Baud Rate Divider Register" hexmask.long.word 0x04 0.--15. 1. " CD ,Baud rate clock divisor value" line.long 0x08 "RCVR_TIMEOUT,Receiver Timeout Register" hexmask.long.byte 0x08 0.--7. 1. " RTO ,Receiver timeout value" line.long 0x0c "RCVR_FIFO_TRIGGER_L0,Receiver FIFO Trigger Level Register" bitfld.long 0x0c 0.--5. " RTRIG ,Receiver FIFO trigger level value (bytes)" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x10 "MODEM_CTRL,Modem Control Register" bitfld.long 0x10 5. " FCM ,Automatic flow control mode" "Disabled,Enabled" bitfld.long 0x10 1. " RTS ,Request to send output control" "Force to 1,Force to 0" bitfld.long 0x10 0. " DTR ,Data terminal ready" "Forced to 1,Forced to 0" line.long 0x014 "MODEM_STS,Modem Status Register" bitfld.long 0x14 8. " FCMS ,Flow control mode" "Disabled,Enabled" rbitfld.long 0x14 7. " DCD ,Data carrier detect input status" "High,Low" rbitfld.long 0x14 6. " RI ,Ring indicator input status" "High,Low" rbitfld.long 0x14 5. " DSR ,Data set ready input status" "High,Low" textline " " rbitfld.long 0x14 4. " CTS ,Clear to send input status" "High,Low" eventfld.long 0x14 3. " DDCD ,Delta data carrier detect status" "Not changed,Changed" eventfld.long 0x14 2. " TERI ,Trailing edge ring indicator status" "Not occurred,Occurred" eventfld.long 0x14 1. " DDSR ,Delta data set ready status" "Not changed,Changed" textline " " eventfld.long 0x14 0. " DCTS ,Delta clear to send status" "Not changed,Changed" textline " " rgroup.long 0x2C++0x03 line.long 0x00 "CHANNEL_STS,Channel Status Register" bitfld.long 0x00 14. " TNFUL ,Transmitter FIFO nearly full continuous status" "More than 1 byte unused,1 byte unused" bitfld.long 0x00 13. " TTRIG ,Transmitter FIFO trigger continuous status" "Less than TTRIG,Greater or equal to TTRIG" bitfld.long 0x00 12. " FDELT ,Receiver flow delay trigger continuous status" "Less than FDEL,Greater or equal to FDEL" textline " " bitfld.long 0x00 11. " TACTIVE ,Transmitter state machine active status" "Inactive,Active" bitfld.long 0x00 10. " RACTIVE ,Receiver state machine active status" "Inactive,Active" bitfld.long 0x00 4. " TFUL ,Transmitter FIFO full continuous status" "Not full,Full" textline " " bitfld.long 0x00 3. " TEMPTY ,Transmitter FIFO empty continuous status" "Not empty,Empty" bitfld.long 0x00 2. " RFUL ,Receiver FIFO full continuous status" "Not full,Full" bitfld.long 0x00 1. " REMPTY ,Receiver FIFO empty continuous status" "Not empty,Empty" textline " " bitfld.long 0x00 0. " RTRIG ,Receiver FIFO trigger continuous status" "Less than RTRIG,Greater or equal to RTRIG" textline " " hgroup.long 0x30++0x3 hide.long 0x00 "TX_RX_FIFO0,Transmit and Receive FIFO Register" textfld " " in textline " " group.long 0x34++0x07 line.long 0x00 "BAUD_RATE_DIVIDER,Baud Rate Divider Register" hexmask.long.byte 0x00 0.--7. 1. " BDIV ,Baud rate divider value" line.long 0x04 "FLOW_DELAY,Flow Control Delay Register" bitfld.long 0x04 0.--5. " FDEL ,RX FIFO trigger level for UA_NRTS de-assertion (bytes)" "Disabled,Disabled,Disabled,Disabled,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x44++0x03 line.long 0x00 "TX_FIFO_TRIGGER_L0,Transmitter FIFO Trigger Level Register" bitfld.long 0x00 0.--5. " TTRIG ,Transmitter FIFO trigger level (bytes)" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x48++0x03 line.long 0x00 "RX_FIFO_BYTE_STATUS,RX FIFO Byte Status Register" bitfld.long 0x00 11. " BYTE3_BREAK ,Break condition of the byte 3 in RX FIFO" "Not detected,Detected" bitfld.long 0x00 10. " BYTE3_FRM_ERR ,Frame error of the byte 3 in RX FIFO" "No error,Error" bitfld.long 0x00 9. " BYTE3_PAR_ERR ,Parity error of the byte 3 in RX FIFO" "No error,Error" textline " " bitfld.long 0x00 8. " BYTE2_BREAK ,Break condition of the byte 2 in RX FIFO" "Not detected,Detected" bitfld.long 0x00 7. " BYTE2_FRM_ERR ,Frame error of the byte 2 in RX FIFO" "No error,Error" bitfld.long 0x00 6. " BYTE2_PAR_ERR ,Parity error of the byte 2 in RX FIFO" "No error,Error" textline " " bitfld.long 0x00 5. " BYTE1_BREAK ,Break condition of the byte 1 in RX FIFO" "Not detected,Detected" bitfld.long 0x00 4. " BYTE1_FRM_ERR ,Frame error of the byte 1 in RX FIFO" "No error,Error" bitfld.long 0x00 3. " BYTE1_PAR_ERR ,Parity error of the byte 1 in RX FIFO" "No error,Error" textline " " bitfld.long 0x00 2. " BYTE0_BREAK ,Break condition of the byte 0 in RX FIFO" "Not detected,Detected" bitfld.long 0x00 1. " BYTE0_FRM_ERR ,Frame error of the byte 0 in RX FIFO" "No error,Error" bitfld.long 0x00 0. " BYTE0_PAR_ERR ,Parity error of the byte 0 in RX FIFO" "No error,Error" width 0x0B tree.end tree.end tree "USB3_REGS (Universal Serial Bus 3.0)" tree "USB3_0" base ad:0xFF9D0000 width 17. rgroup.long 0x00++0x07 line.long 0x00 "CUR_PWR_ST,Indicates Current Power State Of The Core" bitfld.long 0x00 2.--3. " U2PMU ,U2PMU power state" "U0,,,U3" bitfld.long 0x00 0.--1. " U3PMU ,U3PMU power state" "U0,,,U3" line.long 0x04 "CONNECT_ST,Indicates If USB3 Always ON Block Has Connection" bitfld.long 0x04 1. " U2PMU ,USB2 always ON block has at least one connection to host or device" "Not connected,Connected" bitfld.long 0x04 0. " U3PMU ,USB3 always ON block has at least one connection to host or device" "Not connected,Connected" ; line.long 0x08 "LOGIC_ANLZ_TR,Logic analyzer trace bus output for debug purpose" ; line.long 0x0C "LOGIC_ANLZ_TR_EXT,Logic analyzer trace bus output for debug purpose" ; line.long 0x10 "DBG_U2PMU,Debug output signals from USB2 always ON block[31:0]" ; line.long 0x14 "DBG_U2PMU_EXT1,Debug output signals from USB2 always ON block[63:32]" ; line.long 0x18 "DBG_U2PMU_EXT2,Debug output signals from USB2 always ON block[67:64]" ; hexmask.long.byte 0x18 0.--3. 1. " BIT_67_64 ,U2 always ON block debug signal bus [67:64]" ; line.long 0x1C "DBG_U3PMU,Debug output signals from USB3 always ON block[31:0]" ; line.long 0x20 "DBG_U3PMU_EXT,Debug output signals from USB3 always ON block[38:32]" ; hexmask.long.byte 0x20 0.--6. 1. " BIT_38_32 ,U3 always on block debug signal bus [38:32]" ; ; line.long 0x24 "DBG_SNPS,Synopsys internal debug bus[31:0]" ; line.long 0x28 "DBG_SNPS_EXT,Synopsys internal debug bus[63:32]" ; line.long 0x2C "GPIO_OUT,General purpose output bus" ; hexmask.long.word 0x2C 0.--15. 1. " BITS ,Can be used for application specific purpose or debug" ; textline " " group.long 0x30++0x13 line.long 0x00 "BUS_FILTER,Disables Internal Bus Filters Enabled By DWC_USB3_EN_BUS_FILTERS" bitfld.long 0x00 0.--3. " BYPASS ,Bypass" "No,Yes,?..." line.long 0x04 "PME_EN,Enable Signal For PME_GENERATION" bitfld.long 0x04 0. " BIT ,Enable signal for PME_GENERATION" "Disabled,Enabled" line.long 0x08 "PORT,Device Characteristics" bitfld.long 0x08 2. " PWR_CTRL_PRSNT ,Port power switch" "Not present,Present" bitfld.long 0x08 0.--1. " PERM_ATTACH ,Device permanently attached to port" "Not attached,Attached,?..." line.long 0x0C "PMU_USB,Power State Transition Request By PMU To USB" bitfld.long 0x0C 0.--1. " PWR_ST_REQ ,Power state requested by software" "D0,,,D3" line.long 0x10 "JITTER_ADJUST,High Speed Jitter Adjustment" hexmask.long.byte 0x10 0.--5. 1. " FLADJ ,Frame length adjustment register" ;group.long 0x44++0x03 ; line.long 0x14 "GPIO_IN,General purpose input bus" ; hexmask.long.word 0x14 0.--15. 1. " BITS ,Can be used for Application specific purpose or debug" group.long 0x48++0x07 line.long 0x00 "PWR_CONFIG_USB3,USB3 PHY Power Config" hexmask.long 0x00 0.--29. 1. " STRAP ,Array of fixed values that indicates which PHY signal may be used to detect connect/disconnect" line.long 0x04 "PWR_CONFIG_USB2,USB2 PHY Power Config" hexmask.long 0x04 0.--29. 1. " STRAP ,Array of fixed values that indicates which PHY signal may be used to detect connect/disconnect" rgroup.long 0x50++0x03 line.long 0x00 "HOST,Current BELT Value" hexmask.long.word 0x00 0.--11. 1. " CUR_BELT ,Minimum value if all received tolerance value (Host mode)" ;group.long 0x54++0x13 ; line.long 0x00 "EMA,EMA signal for USB3 RAMs" ; bitfld.long 0x00 3.--5. " B ,EMB signal" "0,1,2,3,4,5,6,7" ; textline " " ; bitfld.long 0x00 0.--2. " A ,EMA signal" "0,1,2,3,4,5,6,7" ; line.long 0x04 "BIGENDIAN,Big or little endian" ; bitfld.long 0x04 0. " GS ,Endian selection" "Little,Big" group.long 0x5C++0x0B line.long 0x00 "COHERENCY,Coherency Purpose" bitfld.long 0x00 0. " USB ,Coherency mode" "Disabled,Enabled" line.long 0x04 "REG_CTRL,REG_CTRL" bitfld.long 0x04 0. " SLVERR_ENABLE ,SLVERR enable/disable" "Disabled,Enabled" line.long 0x08 "IR_STATUS,IR_STATUS" eventfld.long 0x08 1. " HOST_SYS_ERR ,Status for an host system error interrupt" "No interrupt,Interrupt" eventfld.long 0x08 0. " ADDR_DEC_ERR ,Status for an address decode error interrupt" "No interrupt,Interrupt" group.long 0x68++0x03 line.long 0x00 "IR_MASK_SET/CLR,IR_MASK" setclrfld.long 0x00 1. 0x04 1. 0x08 1. " HOST_SYS_ERR ,Mask for an host system error interrupt" "Not masked,Masked" setclrfld.long 0x00 0. 0x04 0. 0x08 0. " ADDR_DEC_ERR ,Mask for an address decode error interrupt" "Not masked,Masked" group.long 0x7C++0x07 line.long 0x00 "FPD_PIPE_CLK,Fpd Pipe Clk" bitfld.long 0x00 0. " OPTION ,PIPE clock select" "Serdes,Suspend clk" line.long 0x04 "FPD_POWER_PRSNT,Fpd Power Present" bitfld.long 0x04 0. " OPTION ,PIPE power present" "Present,Not present" width 0x0B tree.end tree "USB3_1" base ad:0xFF9E0000 width 17. rgroup.long 0x00++0x07 line.long 0x00 "CUR_PWR_ST,Indicates Current Power State Of The Core" bitfld.long 0x00 2.--3. " U2PMU ,U2PMU power state" "U0,,,U3" bitfld.long 0x00 0.--1. " U3PMU ,U3PMU power state" "U0,,,U3" line.long 0x04 "CONNECT_ST,Indicates If USB3 Always ON Block Has Connection" bitfld.long 0x04 1. " U2PMU ,USB2 always ON block has at least one connection to host or device" "Not connected,Connected" bitfld.long 0x04 0. " U3PMU ,USB3 always ON block has at least one connection to host or device" "Not connected,Connected" ; line.long 0x08 "LOGIC_ANLZ_TR,Logic analyzer trace bus output for debug purpose" ; line.long 0x0C "LOGIC_ANLZ_TR_EXT,Logic analyzer trace bus output for debug purpose" ; line.long 0x10 "DBG_U2PMU,Debug output signals from USB2 always ON block[31:0]" ; line.long 0x14 "DBG_U2PMU_EXT1,Debug output signals from USB2 always ON block[63:32]" ; line.long 0x18 "DBG_U2PMU_EXT2,Debug output signals from USB2 always ON block[67:64]" ; hexmask.long.byte 0x18 0.--3. 1. " BIT_67_64 ,U2 always ON block debug signal bus [67:64]" ; line.long 0x1C "DBG_U3PMU,Debug output signals from USB3 always ON block[31:0]" ; line.long 0x20 "DBG_U3PMU_EXT,Debug output signals from USB3 always ON block[38:32]" ; hexmask.long.byte 0x20 0.--6. 1. " BIT_38_32 ,U3 always on block debug signal bus [38:32]" ; ; line.long 0x24 "DBG_SNPS,Synopsys internal debug bus[31:0]" ; line.long 0x28 "DBG_SNPS_EXT,Synopsys internal debug bus[63:32]" ; line.long 0x2C "GPIO_OUT,General purpose output bus" ; hexmask.long.word 0x2C 0.--15. 1. " BITS ,Can be used for application specific purpose or debug" ; textline " " group.long 0x30++0x13 line.long 0x00 "BUS_FILTER,Disables Internal Bus Filters Enabled By DWC_USB3_EN_BUS_FILTERS" bitfld.long 0x00 0.--3. " BYPASS ,Bypass" "No,Yes,?..." line.long 0x04 "PME_EN,Enable Signal For PME_GENERATION" bitfld.long 0x04 0. " BIT ,Enable signal for PME_GENERATION" "Disabled,Enabled" line.long 0x08 "PORT,Device Characteristics" bitfld.long 0x08 2. " PWR_CTRL_PRSNT ,Port power switch" "Not present,Present" bitfld.long 0x08 0.--1. " PERM_ATTACH ,Device permanently attached to port" "Not attached,Attached,?..." line.long 0x0C "PMU_USB,Power State Transition Request By PMU To USB" bitfld.long 0x0C 0.--1. " PWR_ST_REQ ,Power state requested by software" "D0,,,D3" line.long 0x10 "JITTER_ADJUST,High Speed Jitter Adjustment" hexmask.long.byte 0x10 0.--5. 1. " FLADJ ,Frame length adjustment register" ;group.long 0x44++0x03 ; line.long 0x14 "GPIO_IN,General purpose input bus" ; hexmask.long.word 0x14 0.--15. 1. " BITS ,Can be used for Application specific purpose or debug" group.long 0x48++0x07 line.long 0x00 "PWR_CONFIG_USB3,USB3 PHY Power Config" hexmask.long 0x00 0.--29. 1. " STRAP ,Array of fixed values that indicates which PHY signal may be used to detect connect/disconnect" line.long 0x04 "PWR_CONFIG_USB2,USB2 PHY Power Config" hexmask.long 0x04 0.--29. 1. " STRAP ,Array of fixed values that indicates which PHY signal may be used to detect connect/disconnect" rgroup.long 0x50++0x03 line.long 0x00 "HOST,Current BELT Value" hexmask.long.word 0x00 0.--11. 1. " CUR_BELT ,Minimum value if all received tolerance value (Host mode)" ;group.long 0x54++0x13 ; line.long 0x00 "EMA,EMA signal for USB3 RAMs" ; bitfld.long 0x00 3.--5. " B ,EMB signal" "0,1,2,3,4,5,6,7" ; textline " " ; bitfld.long 0x00 0.--2. " A ,EMA signal" "0,1,2,3,4,5,6,7" ; line.long 0x04 "BIGENDIAN,Big or little endian" ; bitfld.long 0x04 0. " GS ,Endian selection" "Little,Big" group.long 0x5C++0x0B line.long 0x00 "COHERENCY,Coherency Purpose" bitfld.long 0x00 0. " USB ,Coherency mode" "Disabled,Enabled" line.long 0x04 "REG_CTRL,REG_CTRL" bitfld.long 0x04 0. " SLVERR_ENABLE ,SLVERR enable/disable" "Disabled,Enabled" line.long 0x08 "IR_STATUS,IR_STATUS" eventfld.long 0x08 1. " HOST_SYS_ERR ,Status for an host system error interrupt" "No interrupt,Interrupt" eventfld.long 0x08 0. " ADDR_DEC_ERR ,Status for an address decode error interrupt" "No interrupt,Interrupt" group.long 0x68++0x03 line.long 0x00 "IR_MASK_SET/CLR,IR_MASK" setclrfld.long 0x00 1. 0x04 1. 0x08 1. " HOST_SYS_ERR ,Mask for an host system error interrupt" "Not masked,Masked" setclrfld.long 0x00 0. 0x04 0. 0x08 0. " ADDR_DEC_ERR ,Mask for an address decode error interrupt" "Not masked,Masked" group.long 0x7C++0x07 line.long 0x00 "FPD_PIPE_CLK,Fpd Pipe Clk" bitfld.long 0x00 0. " OPTION ,PIPE clock select" "Serdes,Suspend clk" line.long 0x04 "FPD_POWER_PRSNT,Fpd Power Present" bitfld.long 0x04 0. " OPTION ,PIPE power present" "Present,Not present" width 0x0B tree.end tree.end tree "USB3 (USB 2.0/3.0 Host, Device, and OTG Controller)" tree "USB3_0_XHCI" base ad:0xFE200000 width 16. rgroup.long 0x00++0x03 "XHCI Host Registers" line.long 0x00 "CAPLENGTH,Capability Register Length" hexmask.long.word 0x00 16.--31. 1. " HCIVERSION ,HC interface version number" hexmask.long.byte 0x00 0.--7. 1. " CAPLENGTH ,Capability registers length" rgroup.long 0x04++0x17 line.long 0x00 "HCSPARAMS1,Structural Parameters 1 Register" hexmask.long.byte 0x00 24.--31. 1. " MAXPORTS ,Number of ports" hexmask.long.word 0x00 8.--18. 1. " MAXINTERS ,Number of interrupters" hexmask.long.byte 0x00 0.--7. 1. " MAXSLOTS ,Number of device slots" line.long 0x04 "HCSPARAMS2,Structural Parameters 2 Register" bitfld.long 0x04 27.--31. " MSB ,Max scratchpad buffers" ",1,2,3,4,?..." bitfld.long 0x04 26. " SPR ,Scratchpad restore" "Not used,Used" bitfld.long 0x04 21.--25. " MSB_HI ,Max scratchpad buffers hi" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 4.--7. " ERSTMAX ,Event ring segment table max" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 0.--3. " IST ,Isochronous scheduling threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "HCSPARAMS3,Structural Parameters 3 Register" hexmask.long.word 0x08 16.--31. 1. " U2DEL ,U2 device exit latency" hexmask.long.byte 0x08 0.--7. 1. " U1DEL ,U1 device exit latency" line.long 0x0C "HCCPARAMS1,Capability Parameters 1 Register" hexmask.long.word 0x0C 16.--31. 1. " XECP ,XHCI extended capabilities pointer" bitfld.long 0x0C 12.--15. " MAXPSASIZE ,Maximum primary stream array size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 11. " CFC ,Contiguous frame ID capability" "Not capable,Capable" bitfld.long 0x0C 10. " SEC ,Stopped EDLTA capability" "Not capable,Capable" textline " " bitfld.long 0x0C 9. " SPC ,Short packet capability" "Not capable,Capable" bitfld.long 0x0C 8. " PAE ,Parse all event data" "Just first,All" bitfld.long 0x0C 7. " NSS ,No secondary SID support" "Not supported,Supported" bitfld.long 0x0C 6. " LTC ,Latency tolerance messaging capability" "Not capable,Capable" textline " " bitfld.long 0x0C 5. " LHRC ,Light HC reset capability" "Not capable,Capable" bitfld.long 0x0C 4. " PIND ,Port indicators" "Not contained,Port status/control" bitfld.long 0x0C 3. " PPC ,Port power control" "Not contained,Contained" bitfld.long 0x0C 2. " CSZ ,Context size" "32-byte,64-byte" textline " " bitfld.long 0x0C 1. " BNC ,BW negotiation capability" "Not capable,Capable" bitfld.long 0x0C 0. " AC64 ,64-bit addressing capability" "32-bit,64-bit" line.long 0x10 "DBOFF,Doorbell Offset" hexmask.long 0x10 2.--31. 0x04 " DAOFF ,Doorbell array offset" line.long 0x14 "RTSOFF,Runtime Register Space Offset" hexmask.long 0x14 5.--31. 0x20 " RRSOFF ,Runtime register space offset" rgroup.long 0x1C++0x03 line.long 0x00 "HCCPARAMS2,Capability Parameters 2 Register" bitfld.long 0x00 5. " CIC ,Configuration information capability" "Not capable,Capable" bitfld.long 0x00 4. " LEC ,Large ESIT payload capability" "Not capable,Capable" bitfld.long 0x00 3. " CTC ,Compliance transition capability" "Not capable,Capable" bitfld.long 0x00 2. " FSC ,Force save context capability" "Not capable,Capable" textline " " bitfld.long 0x00 1. " CMC ,Configure endpoint command max exit latency too large capability" "Not capable,Capable" bitfld.long 0x00 0. " U3C ,U3 entry capability" "Not capable,Capable" group.long 0x20++0x07 line.long 0x00 "USBCMD,USB Command Register" bitfld.long 0x00 13. " CME ,CEM enable" "Disabled,Enabled" bitfld.long 0x00 11. " EU3S ,Enable U3 MFINDEX stop" "Disabled,Enabled" bitfld.long 0x00 10. " EWE ,Enable wrap event" "Disabled,Enabled" bitfld.long 0x00 9. " CRS ,Controller restore state" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " CSS ,Controller save state" "Disabled,Enabled" bitfld.long 0x00 7. " LHCRST ,Light host controller reset" "Reset,No reset" bitfld.long 0x00 3. " HSEE ,Host system error enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTE ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " HCRST ,Host controller reset" "No reset,Reset" bitfld.long 0x00 0. " R_S ,Run/stop" "Stop,Run" line.long 0x04 "USBSTS,USB Status Register" rbitfld.long 0x04 12. " HCE ,Host controller error" "No error,Error" rbitfld.long 0x04 11. " CNR ,Controller not ready" "Ready,Not ready" rbitfld.long 0x04 9. " RSS ,Restore state status" "Not occurred,Occurred" rbitfld.long 0x04 8. " SSS ,Save state status" "Low,High" textline " " eventfld.long 0x04 4. " PCD ,Port change detect" "Not detected,Detected" eventfld.long 0x04 3. " EINT ,Event interrupt" "No interrupt,Interrupt" eventfld.long 0x04 2. " HSE ,Host system error" "No error,Error" rbitfld.long 0x04 0. " HCH ,HC halted" "Not halted,Halted" rgroup.long 0x28++0x03 line.long 0x00 "PAGESIZE,Page Size Register" hexmask.long.word 0x00 0.--15. 1. " PAGESIZE ,Xhcs system page size" group.long 0x34++0x03 line.long 0x00 "DNCTRL,Device Notification Control Register" bitfld.long 0x00 15. " N15 ,Notification enable 15" "Disabled,Enabled" bitfld.long 0x00 14. " N14 ,Notification enable 14" "Disabled,Enabled" bitfld.long 0x00 13. " N13 ,Notification enable 13" "Disabled,Enabled" bitfld.long 0x00 12. " N12 ,Notification enable 12" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " N11 ,Notification enable 11" "Disabled,Enabled" bitfld.long 0x00 10. " N10 ,Notification enable 10" "Disabled,Enabled" bitfld.long 0x00 9. " N9 ,Notification enable 9" "Disabled,Enabled" bitfld.long 0x00 8. " N8 ,Notification enable 8" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " N7 ,Notification enable 7" "Disabled,Enabled" bitfld.long 0x00 6. " N6 ,Notification enable 6" "Disabled,Enabled" bitfld.long 0x00 5. " N5 ,Notification enable 5" "Disabled,Enabled" bitfld.long 0x00 4. " N4 ,Notification enable 4" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " N3 ,Notification enable 3" "Disabled,Enabled" bitfld.long 0x00 2. " N2 ,Notification enable 2" "Disabled,Enabled" bitfld.long 0x00 1. " N1 ,Notification enable 1" "Disabled,Enabled" bitfld.long 0x00 0. " N0 ,Notification enable 0" "Disabled,Enabled" group.quad 0x38++0x07 line.quad 0x00 "CRCR,Command Ring Register" hexmask.quad 0x00 6.--63. 1. " CMD_RING_PNTR ,Command ring pointer" rbitfld.quad 0x00 3. " CRR ,Command ring running" "No,Yes" bitfld.quad 0x00 2. " CA ,Command abort" "Not aborted,Aborted" bitfld.quad 0x00 1. " CS ,Command stop" "Not stopped,Stopped" textline " " bitfld.quad 0x00 0. " RCS ,Ring cycle state" "Low,High" group.quad 0x50++0x07 line.quad 0x00 "DCBAPP,Device Context Bass Address Array Register" hexmask.quad 0x00 6.--63. 0x40 " DCBAP ,Device context base address array pointer" group.long 0x58++0x03 line.long 0x00 "CONFIG,XHCI Configuration Register" bitfld.long 0x00 9. " CIE ,Configuration information enable" "Disabled,Enabled" bitfld.long 0x00 8. " U3E ,U3 entry enable" "Disabled,Enabled" hexmask.long.byte 0x00 0.--7. 1. " MAXSLOTSEN ,Max device slots enable" group.long 0x420++0x07 line.long 0x00 "PORTSC20,USB2 Port Status And Control Register" rbitfld.long 0x00 30. " DR ,Device removable" "Removable,Non-removable" bitfld.long 0x00 27. " WOE ,Wake on Over-current enable" "Disabled,Enabled" bitfld.long 0x00 26. " WDE ,Wake on disconnect enable" "Disabled,Enabled" bitfld.long 0x00 25. " WCE ,Wake on connect enable" "Disabled,Enabled" textline " " rbitfld.long 0x00 24. " CAS ,Cold attach status" "Low,High" eventfld.long 0x00 22. " PLC ,Port link state change" "Not changed,Changed" eventfld.long 0x00 21. " PRC ,Port reset change" "Not changed,Changed" eventfld.long 0x00 20. " OCC ,Over-current change" "Not changed,Changed" textline " " eventfld.long 0x00 19. " WRC ,Warm port reset change" "Not changed,Changed" eventfld.long 0x00 18. " PEC ,Port enable/disable change" "Not changed,Changed" eventfld.long 0x00 17. " CSC ,Connect status change" "Not changed,Changed" bitfld.long 0x00 16. " LWS ,Port link state write strobe" "Disabled,Enabled" textline " " bitfld.long 0x00 14.--15. " PIC ,Port indicator control" "Off,Amber,Green,Undefined" rbitfld.long 0x00 10.--13. " PS ,Port speed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 9. " PP ,Port power" "Off,On" bitfld.long 0x00 5.--8. " PLS ,Port link state" "U0,U1,U2,U3,Disabled,Rxdetect,Inactive,Polling,Recovery,Hot reset,Compliance,Test,,,,Resume" textline " " bitfld.long 0x00 4. " PR ,Port reset" "No reset,Reset" rbitfld.long 0x00 3. " OCA ,Over-current active" "Not active,Active" eventfld.long 0x00 1. " PED ,Port enable" "Disabled,Enabled" rbitfld.long 0x00 0. " CCS ,Current connect status" "Not connected,Connected" line.long 0x04 "PORTMSC20,USB2 Port Power Management Status And Control Register" bitfld.long 0x04 28.--31. " PRTTSTCTRL ,Port test control - test mode" "Disabled,J_STATE,K_STATE,SE0_NAK,Packet,FORCE_ENABLE,,,,,,,,,,Control error" bitfld.long 0x04 16. " HLE ,Hardware LPM enable" "Disabled,Enabled" hexmask.long.byte 0x04 8.--15. 1. " L1DSLOT ,L1 device slot" textline " " bitfld.long 0x04 4.--7. " HIRD ,Host initiated resume duration" "50us,125us,200us,275us,350us,425us,500us,575us,650us,725us,800us,875us,950us,1025us,1100us,1175us" bitfld.long 0x04 3. " RWE ,Remote wake enable" "Disabled,Enabled" bitfld.long 0x04 0.--2. " L1S ,L1 status" "Invalid,Success,Not yet,Not supported,Timeout/error,?..." group.long 0x42C++0x03 line.long 0x00 "PORTHLPMC20,USB2 Port Hardware LPM Control Register" bitfld.long 0x00 10.--13. " HIRDD ,Best effort service latency deep" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x00 2.--9. 1. " L1_TIMEOUT ,L1 timeout" bitfld.long 0x00 0.--1. " HIRDM ,Host initiated resume duration mode" "HIRD,HIRDD/HIRD,?..." group.long 0x430++0x07 line.long 0x00 "PORTSC30,USB3 Port Status And Control Register" bitfld.long 0x00 31. " WPR ,Warm port reset" "No effect,Reset" rbitfld.long 0x00 30. " DR ,Device removable" "Removable,Non-removable" bitfld.long 0x00 27. " WOE ,Wake on Over-current enable" "Disabled,Enabled" bitfld.long 0x00 26. " WDE ,Wake on disconnect enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " WCE ,Wake on connect enable" "Disabled,Enabled" rbitfld.long 0x00 24. " CAS ,Cold attach status" "Low,High" eventfld.long 0x00 23. " CEC ,Port config error change" "No error,Error" eventfld.long 0x00 22. " PLC ,Port link state change" "Not changed,Changed" textline " " eventfld.long 0x00 21. " PRC ,Port reset change" "Not changed,Changed" eventfld.long 0x00 20. " OCC ,Over-current change" "Not changed,Changed" eventfld.long 0x00 19. " WRC ,Warm port reset change" "Not changed,Changed" eventfld.long 0x00 18. " PEC ,Port enable/disable change" "Not changed,Changed" textline " " eventfld.long 0x00 17. " CSC ,Connect status change" "Not changed,Changed" bitfld.long 0x00 16. " LWS ,Port link state write strobe" "Disabled,Enabled" bitfld.long 0x00 14.--15. " PIC ,Port indicator control" "Off,Amber,Green,Undefined" rbitfld.long 0x00 10.--13. " PS ,Port speed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 9. " PP ,Port power" "Off,On" bitfld.long 0x00 5.--8. " PLS ,Port link state" "U0,U1,U2,U3,Disabled,Rxdetect,Inactive,Polling,Recovery,Hot reset,Compliance,Test,,,,Resume" bitfld.long 0x00 4. " PR ,Port reset" "No reset,Reset" rbitfld.long 0x00 3. " OCA ,Over-current active" "Not active,Active" textline " " eventfld.long 0x00 1. " PED ,Port enable" "Disabled,Enabled" rbitfld.long 0x00 0. " CCS ,Current connect status" "Not connected,Connected" line.long 0x04 "PORTMSC30,USB3 Port PM Status And Control 1 Register" bitfld.long 0x04 16. " FLA ,Force link PM accept" "Not asserted,Asserted" hexmask.long.byte 0x04 8.--15. 1. " U2T ,U2 timeout" hexmask.long.byte 0x04 0.--7. 1. " U1T ,U1 timeout" rgroup.long 0x438++0x03 line.long 0x00 "PORTLI1,USB3 Port Link Info Register" hexmask.long.word 0x00 0.--15. 1. " LEC ,Link error count" rgroup.long 0x440++0x03 line.long 0x00 "MFINDEX,Microframe Index Register" hexmask.long.word 0x00 0.--13. 1. " MI ,Microframe index" group.long 0x460++0x0B line.long 0x00 "IMAN_0,Interrupter Management Register" bitfld.long 0x00 1. " IE ,Interrupt enable" "Disabled,Enabled" eventfld.long 0x00 0. " IP ,Interrupt pending" "No interrupt,Interrupt" line.long 0x04 "IMOD_0,Interrupter Moderation Register" hexmask.long.word 0x04 16.--31. 1. " IMODC ,Interrupt moderation counter" hexmask.long.word 0x04 0.--15. 1. " IMODI ,Interrupt moderation interval" line.long 0x08 "ERSTSZ_0,Event Ring Segment Table Size Register" hexmask.long.word 0x08 0.--15. 1. " ERSTSZ ,Event ring segment table size" group.quad (0x460+0x10)++0x0F line.quad 0x00 "ERSTBA_0,Debug Capability Event Ring Segment Table Base Address Register" hexmask.quad 0x00 6.--63. 0x40 " ERSTBA ,Event ring segment table base address" line.quad 0x08 "ERDP_0,Debug Capability Event Ring Dequeue Pointer Register" hexmask.quad 0x08 4.--63. 0x10 " DP ,Event ring dequeue pointer" bitfld.quad 0x08 3. " EHB ,Event handler busy" "Not busy,Busy" bitfld.quad 0x08 0.--2. " DESI ,Dequeue ERST segment index" "0,1,2,3,4,5,6,7" group.long 0x480++0x0B line.long 0x00 "IMAN_1,Interrupter Management Register" bitfld.long 0x00 1. " IE ,Interrupt enable" "Disabled,Enabled" eventfld.long 0x00 0. " IP ,Interrupt pending" "No interrupt,Interrupt" line.long 0x04 "IMOD_1,Interrupter Moderation Register" hexmask.long.word 0x04 16.--31. 1. " IMODC ,Interrupt moderation counter" hexmask.long.word 0x04 0.--15. 1. " IMODI ,Interrupt moderation interval" line.long 0x08 "ERSTSZ_1,Event Ring Segment Table Size Register" hexmask.long.word 0x08 0.--15. 1. " ERSTSZ ,Event ring segment table size" group.quad (0x480+0x10)++0x0F line.quad 0x00 "ERSTBA_1,Debug Capability Event Ring Segment Table Base Address Register" hexmask.quad 0x00 6.--63. 0x40 " ERSTBA ,Event ring segment table base address" line.quad 0x08 "ERDP_1,Debug Capability Event Ring Dequeue Pointer Register" hexmask.quad 0x08 4.--63. 0x10 " DP ,Event ring dequeue pointer" bitfld.quad 0x08 3. " EHB ,Event handler busy" "Not busy,Busy" bitfld.quad 0x08 0.--2. " DESI ,Dequeue ERST segment index" "0,1,2,3,4,5,6,7" group.long 0x4A0++0x0B line.long 0x00 "IMAN_2,Interrupter Management Register" bitfld.long 0x00 1. " IE ,Interrupt enable" "Disabled,Enabled" eventfld.long 0x00 0. " IP ,Interrupt pending" "No interrupt,Interrupt" line.long 0x04 "IMOD_2,Interrupter Moderation Register" hexmask.long.word 0x04 16.--31. 1. " IMODC ,Interrupt moderation counter" hexmask.long.word 0x04 0.--15. 1. " IMODI ,Interrupt moderation interval" line.long 0x08 "ERSTSZ_2,Event Ring Segment Table Size Register" hexmask.long.word 0x08 0.--15. 1. " ERSTSZ ,Event ring segment table size" group.quad (0x4A0+0x10)++0x0F line.quad 0x00 "ERSTBA_2,Debug Capability Event Ring Segment Table Base Address Register" hexmask.quad 0x00 6.--63. 0x40 " ERSTBA ,Event ring segment table base address" line.quad 0x08 "ERDP_2,Debug Capability Event Ring Dequeue Pointer Register" hexmask.quad 0x08 4.--63. 0x10 " DP ,Event ring dequeue pointer" bitfld.quad 0x08 3. " EHB ,Event handler busy" "Not busy,Busy" bitfld.quad 0x08 0.--2. " DESI ,Dequeue ERST segment index" "0,1,2,3,4,5,6,7" group.long 0x4C0++0x0B line.long 0x00 "IMAN_3,Interrupter Management Register" bitfld.long 0x00 1. " IE ,Interrupt enable" "Disabled,Enabled" eventfld.long 0x00 0. " IP ,Interrupt pending" "No interrupt,Interrupt" line.long 0x04 "IMOD_3,Interrupter Moderation Register" hexmask.long.word 0x04 16.--31. 1. " IMODC ,Interrupt moderation counter" hexmask.long.word 0x04 0.--15. 1. " IMODI ,Interrupt moderation interval" line.long 0x08 "ERSTSZ_3,Event Ring Segment Table Size Register" hexmask.long.word 0x08 0.--15. 1. " ERSTSZ ,Event ring segment table size" group.quad (0x4C0+0x10)++0x0F line.quad 0x00 "ERSTBA_3,Debug Capability Event Ring Segment Table Base Address Register" hexmask.quad 0x00 6.--63. 0x40 " ERSTBA ,Event ring segment table base address" line.quad 0x08 "ERDP_3,Debug Capability Event Ring Dequeue Pointer Register" hexmask.quad 0x08 4.--63. 0x10 " DP ,Event ring dequeue pointer" bitfld.quad 0x08 3. " EHB ,Event handler busy" "Not busy,Busy" bitfld.quad 0x08 0.--2. " DESI ,Dequeue ERST segment index" "0,1,2,3,4,5,6,7" width 6. tree "Doorbell Registers 0--63" group.long 0x4E0++0x03 line.long 0x00 "DB0,Doorbell Register 0" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x4E4++0x03 line.long 0x00 "DB1,Doorbell Register 1" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x4E8++0x03 line.long 0x00 "DB2,Doorbell Register 2" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x4EC++0x03 line.long 0x00 "DB3,Doorbell Register 3" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x4F0++0x03 line.long 0x00 "DB4,Doorbell Register 4" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x4F4++0x03 line.long 0x00 "DB5,Doorbell Register 5" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x4F8++0x03 line.long 0x00 "DB6,Doorbell Register 6" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x4FC++0x03 line.long 0x00 "DB7,Doorbell Register 7" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x500++0x03 line.long 0x00 "DB8,Doorbell Register 8" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x504++0x03 line.long 0x00 "DB9,Doorbell Register 9" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x508++0x03 line.long 0x00 "DB10,Doorbell Register 10" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x50C++0x03 line.long 0x00 "DB11,Doorbell Register 11" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x510++0x03 line.long 0x00 "DB12,Doorbell Register 12" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x514++0x03 line.long 0x00 "DB13,Doorbell Register 13" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x518++0x03 line.long 0x00 "DB14,Doorbell Register 14" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x51C++0x03 line.long 0x00 "DB15,Doorbell Register 15" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x520++0x03 line.long 0x00 "DB16,Doorbell Register 16" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x524++0x03 line.long 0x00 "DB17,Doorbell Register 17" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x528++0x03 line.long 0x00 "DB18,Doorbell Register 18" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x52C++0x03 line.long 0x00 "DB19,Doorbell Register 19" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x530++0x03 line.long 0x00 "DB20,Doorbell Register 20" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x534++0x03 line.long 0x00 "DB21,Doorbell Register 21" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x538++0x03 line.long 0x00 "DB22,Doorbell Register 22" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x53C++0x03 line.long 0x00 "DB23,Doorbell Register 23" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x540++0x03 line.long 0x00 "DB24,Doorbell Register 24" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x544++0x03 line.long 0x00 "DB25,Doorbell Register 25" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x548++0x03 line.long 0x00 "DB26,Doorbell Register 26" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x54C++0x03 line.long 0x00 "DB27,Doorbell Register 27" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x550++0x03 line.long 0x00 "DB28,Doorbell Register 28" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x554++0x03 line.long 0x00 "DB29,Doorbell Register 29" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x558++0x03 line.long 0x00 "DB30,Doorbell Register 30" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x55C++0x03 line.long 0x00 "DB31,Doorbell Register 31" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x560++0x03 line.long 0x00 "DB32,Doorbell Register 32" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x564++0x03 line.long 0x00 "DB33,Doorbell Register 33" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x568++0x03 line.long 0x00 "DB34,Doorbell Register 34" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x56C++0x03 line.long 0x00 "DB35,Doorbell Register 35" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x570++0x03 line.long 0x00 "DB36,Doorbell Register 36" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x574++0x03 line.long 0x00 "DB37,Doorbell Register 37" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x578++0x03 line.long 0x00 "DB38,Doorbell Register 38" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x57C++0x03 line.long 0x00 "DB39,Doorbell Register 39" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x580++0x03 line.long 0x00 "DB40,Doorbell Register 40" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x584++0x03 line.long 0x00 "DB41,Doorbell Register 41" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x588++0x03 line.long 0x00 "DB42,Doorbell Register 42" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x58C++0x03 line.long 0x00 "DB43,Doorbell Register 43" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x590++0x03 line.long 0x00 "DB44,Doorbell Register 44" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x594++0x03 line.long 0x00 "DB45,Doorbell Register 45" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x598++0x03 line.long 0x00 "DB46,Doorbell Register 46" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x59C++0x03 line.long 0x00 "DB47,Doorbell Register 47" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x5A0++0x03 line.long 0x00 "DB48,Doorbell Register 48" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x5A4++0x03 line.long 0x00 "DB49,Doorbell Register 49" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x5A8++0x03 line.long 0x00 "DB50,Doorbell Register 50" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x5AC++0x03 line.long 0x00 "DB51,Doorbell Register 51" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x5B0++0x03 line.long 0x00 "DB52,Doorbell Register 52" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x5B4++0x03 line.long 0x00 "DB53,Doorbell Register 53" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x5B8++0x03 line.long 0x00 "DB54,Doorbell Register 54" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x5BC++0x03 line.long 0x00 "DB55,Doorbell Register 55" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x5C0++0x03 line.long 0x00 "DB56,Doorbell Register 56" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x5C4++0x03 line.long 0x00 "DB57,Doorbell Register 57" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x5C8++0x03 line.long 0x00 "DB58,Doorbell Register 58" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x5CC++0x03 line.long 0x00 "DB59,Doorbell Register 59" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x5D0++0x03 line.long 0x00 "DB60,Doorbell Register 60" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x5D4++0x03 line.long 0x00 "DB61,Doorbell Register 61" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x5D8++0x03 line.long 0x00 "DB62,Doorbell Register 62" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x5DC++0x03 line.long 0x00 "DB63,Doorbell Register 63" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" tree.end width 16. textline " " group.long 0x8E0++0x07 line.long 0x00 "USBLEGSUP,USB Legacy Support Capability Register" bitfld.long 0x00 24. " HCOSOS ,HC OS owned semaphore" "Not owned,Owned" bitfld.long 0x00 16. " HCBOS ,HC BIOS owned semaphore" "Not owned,Owned" hexmask.long.byte 0x00 8.--15. 1. " NCP ,Next capability pointer" hexmask.long.byte 0x00 0.--7. 1. " CID ,Capability ID" line.long 0x04 "USBLEGCTLSTS,USB Legacy Support Control And Status Register" bitfld.long 0x04 31. " SB ,SMI on BAR" "Not written,Written" bitfld.long 0x04 30. " SPC ,SMI on PCI command" "Not written,Written" eventfld.long 0x04 29. " SOSOC ,SMI on OS ownership change" "Disabled,Enabled" rbitfld.long 0x04 20. " SHSE ,SMI on host system error" "No error,Error" textline " " rbitfld.long 0x04 16. " SEI ,SMI on event interrupt" "No interrupt,Interrupt" bitfld.long 0x04 15. " SBE ,SMI on BAR enable" "Disabled,Enabled" bitfld.long 0x04 14. " SPCE ,SMI on PCI command enable" "Disabled,Enabled" bitfld.long 0x04 13. " SOSOCE ,SMI on OS ownership change enable" "Disabled,Enabled" textline " " bitfld.long 0x04 4. " SMIHSEE ,SMI on host system error enable" "Disabled,Enabled" bitfld.long 0x04 0. " USBSE ,USB SMI enable" "Disabled,Enabled" rgroup.long 0x8F0++0x0F line.long 0x00 "SUPTPRT2_DW0,XHCI Supported Protocol Capability Data Word 0" hexmask.long.byte 0x00 24.--31. 1. " MAJOR ,Major revision" hexmask.long.byte 0x00 16.--23. 1. " MINOR ,Minor revision" hexmask.long.byte 0x00 8.--15. 1. " NCP ,Next capability pointer" hexmask.long.byte 0x00 0.--7. 1. " CID ,Capability ID" line.long 0x04 "SUPTPRT2_DW1,XHCI Supported Protocol Capability Data Word 1" line.long 0x08 "SUPTPRT2_DW2,XHCI Supported Protocol Capability Data Word 2" bitfld.long 0x08 28.--31. " PSIC ,Product speed ID count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 25.--27. " MHD ,Hub depth" "0,1,2,3,4,5,6,7" bitfld.long 0x08 20. " BLC ,BESL LPM capability" "HIRD,BESL" bitfld.long 0x08 19. " HLC ,Hardware LPM capability" "Not capable,Capable" textline " " bitfld.long 0x08 18. " IHI ,Integrated hub implemented" "Not implemented,Implemented" bitfld.long 0x08 17. " HSO ,High-speed only" "False,True" hexmask.long.byte 0x08 8.--15. 1. " CPC ,Compatible port count" hexmask.long.byte 0x08 0.--7. 1. " CPO ,Compatible port offset" line.long 0x0C "SUPTPRT2_DW3,XHCI Supported Protocol Capability Data Word 3" bitfld.long 0x0C 0.--4. " PROTCL_SLT_TY ,Protocol slot type" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x900++0x0F line.long 0x00 "SUPTPRT3_DW0,XHCI Supported Protocol Capability Data Word 0" hexmask.long.byte 0x00 24.--31. 1. " MAJOR ,Major revision" hexmask.long.byte 0x00 16.--23. 1. " MINOR ,Minor revision" hexmask.long.byte 0x00 8.--15. 1. " NCP ,Next capability pointer" hexmask.long.byte 0x00 0.--7. 1. " CID ,Capability ID" line.long 0x04 "SUPTPRT3_DW1,XHCI Supported Protocol Capability Data Word 1" line.long 0x08 "SUPTPRT2_DW2,XHCI Supported Protocol Capability Data Word 2" bitfld.long 0x08 25.--27. " MHD ,Hub depth" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x08 8.--15. 1. " CPC ,Compatible port count" hexmask.long.byte 0x08 0.--7. 1. " CPO ,Compatible port offset" line.long 0x0C "SUPTPRT2_DW3,XHCI Supported Protocol Capability Data Word 3" bitfld.long 0x0C 0.--4. " PROTCL_SLT_TY ,Protocol slot type" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x910++0x03 line.long 0x00 "DCID,Debug Capability ID Register" bitfld.long 0x00 16.--20. " DCERSTMAX ,Debug capability event ring segment table max" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 8.--15. 0x01 " NCP ,Next capability pointer" hexmask.long.byte 0x00 0.--7. 0x01 " CID ,Capability ID" group.long 0x914++0x07 line.long 0x00 "DCDB,Debug Capability Doorbell Register" hexmask.long.byte 0x00 8.--15. 1. " DT ,Doorbell target" line.long 0x04 "DCERSTSZ,Debug Capability Event Ring Segment Table Size Register" hexmask.long.word 0x04 0.--15. 1. " ERSTSZ ,Event ring segment table size" group.quad 0x920++0x0F line.quad 0x00 "DCERSTBA,Debug Capability Event Ring Segment Table Base Address Register" hexmask.quad 0x00 4.--63. 0x10 " ERSTBA ,Event ring segment table base address" line.quad 0x08 "DCERDP,Debug Capability Event Ring Dequeue Pointer Register" hexmask.quad 0x08 4.--63. 0x10 " DP ,Dequeue pointer" bitfld.quad 0x08 0.--2. " DESI ,Dequeue ERST segment index" "0,1,2,3,4,5,6,7" group.long 0x930++0x03 line.long 0x00 "DCCTRL,Debug Capability Control Register" bitfld.long 0x00 31. " DCE ,Debug capability enable" "Disabled,Enabled" hexmask.long.byte 0x00 24.--30. 0x01 " DA ,Device address" hexmask.long.byte 0x00 16.--23. 1. " DMBS ,Debug max burst size" bitfld.long 0x00 4. " DRC ,Dbc run change" "Not changed,Changed" textline " " bitfld.long 0x00 3. " HIT ,Halt IN TR" "No,Yes" bitfld.long 0x00 2. " HOT ,Halt OUT TR" "No,Yes" bitfld.long 0x00 1. " LSE ,Link status event enable" "Disabled,Enabled" bitfld.long 0x00 0. " DCR ,Dbc run" "Disabled,Enabled" rgroup.long 0x934++0x03 line.long 0x00 "DCST,Debug Capability ST Register" hexmask.long.byte 0x00 24.--31. 1. " DPN ,Debug port number" bitfld.long 0x00 1. " SBR ,Dbc system bus rese" "No reset,Reset" bitfld.long 0x00 0. " ER ,Event ring not empty" "Empty,Not empty" group.long 0x938++0x03 line.long 0x00 "DCPORTSC,Debug Capability Port Status Change Register" eventfld.long 0x00 23. " CEC ,Port config error change" "No error,Error" eventfld.long 0x00 22. " PLC ,Port link status change" "Not changed,Changed" eventfld.long 0x00 21. " PRC ,Port reset change" "Not changed,Changed" eventfld.long 0x00 17. " CSC ,Connect status change" "Not changed,Changed" textline " " rbitfld.long 0x00 10.--13. " PS ,Port speed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x00 5.--8. " PLS ,Port link state" "U0,U1,U2,U3,Disabled,Rxdetect,Inactive,Polling,Recovery,Hot reset,?..." rbitfld.long 0x00 4. " PR ,Port reset" "No reset,Reset" bitfld.long 0x00 1. " PED ,Port enabled" "Disabled,Enabled" textline " " rbitfld.long 0x00 0. " CCS ,Current connect status" "Not connected,Connected" group.quad 0x940++0x07 line.quad 0x00 "DCCP,Debug Capability Context Pointer Register" hexmask.quad 0x00 4.--63. 1. " DCCP ,Debug capability context pointer" group.long 0x948++0x07 line.long 0x00 "DCDDI1,Debug Capability Device Descriptor Info Register 1" hexmask.long.word 0x00 16.--31. 1. " VID ,Vender ID" hexmask.long.byte 0x00 0.--7. 1. " DBCP ,Dbc protocol" line.long 0x04 "DCDDI2,Debug Capability Device Descriptor Info Register 2" hexmask.long.word 0x04 16.--31. 1. " DR ,Device revision" hexmask.long.word 0x04 0.--15. 1. " PID ,Product ID" group.long 0xC100++0x07 "Global Registers" line.long 0x00 "GSBUSCFG0,Global Soc Bus Configuration Register 0" bitfld.long 0x00 28.--31. " DATRDREQINFO ,DATRDREQINFO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. " DESRDREQINFO ,DESRDREQINFO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. " DATWRREQINFO ,DATWRREQINFO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " DESWRREQINFO ,DESWRREQINFO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 11. " DATBIGEND ,Data access is big endian" "Little endian,Big endian" bitfld.long 0x00 10. " DESBIGEND ,Descriptor access is big endian" "Little endian,Big endian" bitfld.long 0x00 7. " INCR256BRSTENA ,INCR256 burst type enable input to BUS-GM" "Disabled,Enabled" bitfld.long 0x00 6. " INCR128BRSTENA ,INCR128 burst type enable input to BUS-GM" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " INCR64BRSTENA ,INCR64 burst type enable input to BUS-GM" "Disabled,Enabled" bitfld.long 0x00 4. " INCR32BRSTENA ,INCR32 burst type enable input to BUS-GM" "Disabled,Enabled" bitfld.long 0x00 3. " INCR16BRSTENA ,INCR16 burst type enable input to BUS-GM" "Disabled,Enabled" bitfld.long 0x00 2. " INCR8BRSTENA ,INCR8 burst type enable input to BUS-GM" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " INCR4BRSTENA ,INCR4 burst type enable input to BUS-GM" "Disabled,Enabled" bitfld.long 0x00 0. " INCRBRSTENA ,Undefined length INCR burst type enable" "Disabled,Enabled" line.long 0x04 "GSBUSCFG1,Global Soc Bus Configuration Register 1" bitfld.long 0x04 12. " EN1KPAGE ,1k page boundary enable" "Disabled,Enabled" bitfld.long 0x04 8.--11. " PIPETRANSLIMIT ,AXI pipelined transfers burst request limit" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" if (((d.l(ad:0xFE200000+0xC118))&0x03)!=0x01) hgroup.long 0xC108++0x03 hide.long 0x00 "GTXTHRCFG,Global TX Threshold Control Register" else if (((d.l(ad:0xFE200000+0xC108))&0x20000000)==0x20000000) group.long 0xC108++0x03 line.long 0x00 "GTXTHRCFG,Global TX Threshold Control Register" bitfld.long 0x00 29. " USBTXPKTCNTSEL ,USB transmit packet count enable" "Disabled,Enabled" bitfld.long 0x00 24.--27. " USBTXPKTCNT ,USB transmit packet count" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x00 16.--23. 1. " USBMAXTXBURSTS ,USB maximum TX burst size" else group.long 0xC108++0x03 line.long 0x00 "GTXTHRCFG,Global TX Threshold Control Register" bitfld.long 0x00 29. " USBTXPKTCNTSEL ,USB transmit packet count enable" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " USBMAXTXBURSTS ,USB maximum TX burst size" endif endif if (((d.l(ad:0xFE200000+0xC10C))&0x20000000)==0x20000000) group.long 0xC10C++0x03 line.long 0x00 "GRXTHRCFG,Global RX Threshold Control Register" bitfld.long 0x00 29. " USBRXPKTCNTSEL ,USB receive packet count enable" "Disabled,Enabled" bitfld.long 0x00 24.--27. " USBRXPKTCNT ,USB transmit packet count" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x00 19.--23. 1. " USBMAXRXBURSTSIZE ,USB maximum receive burst size" else group.long 0xC10C++0x03 line.long 0x00 "GRXTHRCFG,Global RX Threshold Control Register" bitfld.long 0x00 29. " USBRXPKTCNTSEL ,USB receive packet count enable" "Disabled,Enabled" endif if (((d.l(ad:0xFE200000+0xC118))&0x03)==0x00) group.long 0xC110++0x03 line.long 0x00 "GCTL,Global Common Register" hexmask.long.word 0x00 19.--31. 1. " PWRDNSCALE ,Power down scale" bitfld.long 0x00 18. " MASTERFILTBYPASS ,Master filter bypass" "Disabled,Enabled" bitfld.long 0x00 17. " BYPSSETADDR ,Bypass set address" "Disabled,Enabled" bitfld.long 0x00 16. " U2RSTECN ,Three device attempts to connect" "Disabled,Enabled" textline " " bitfld.long 0x00 14.--15. " FRMSCLDWN ,Scale down device view" "1024 bytes,512 bytes,256 bytes,128 bytes" bitfld.long 0x00 12.--13. " PRTCAPDIR ,Port capability direction" ",Host,Device,OTG" bitfld.long 0x00 11. " CORESOFTRESET ,Core soft reset" "No reset,Reset" bitfld.long 0x00 10. " SOFITPSYNC ,UTMI/ULPI PHY on the first port status" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " U1U2TIMERSCALE ,Disable U1/U2 timer scaledown" "No,Yes" bitfld.long 0x00 8. " DEBUGATTACH ,Debug attach" "Disabled,Enabled" bitfld.long 0x00 6.--7. " RAMCLKSEL ,RAM clock select" "Bus clock,Pipe clock,Pipe/2,Mac2_clk" bitfld.long 0x00 4.--5. " SCALEDOWN ,Scale-Down mode" "Disabled,Enabled,Enabled,Enable 0/1bits" textline " " bitfld.long 0x00 3. " DISSCRAMBLE ,Disable scrambling" "No,Yes" bitfld.long 0x00 2. " U2EXIT_LFPS ,U2EXIT_LFPS" "248ns,8us" bitfld.long 0x00 1. " GBLHIBERNATIONEN ,Hibernation at the global level enable" "Disabled,Enabled" bitfld.long 0x00 0. " DSBLCLKGTNG ,Disable clock gating" "No,Yes" else group.long 0xC110++0x03 line.long 0x00 "GCTL,Global Common Register" hexmask.long.word 0x00 19.--31. 1. " PWRDNSCALE ,Power down scale" bitfld.long 0x00 18. " MASTERFILTBYPASS ,Master filter bypass" "Disabled,Enabled" bitfld.long 0x00 17. " BYPSSETADDR ,Bypass set address" "Disabled,Enabled" textline " " bitfld.long 0x00 14.--15. " FRMSCLDWN ,Scale down device view" "1024 bytes,512 bytes,256 bytes,128 bytes" bitfld.long 0x00 12.--13. " PRTCAPDIR ,Port capability direction" ",Host,Device,OTG" bitfld.long 0x00 11. " CORESOFTRESET ,Core soft reset" "No reset,Reset" bitfld.long 0x00 10. " SOFITPSYNC ,UTMI/ULPI PHY on the first port status" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " U1U2TIMERSCALE ,Disable U1/U2 timer scaledown" "Disabled,Enabled" bitfld.long 0x00 8. " DEBUGATTACH ,Debug attach" "Disabled,Enabled" textfld " " bitfld.long 0x00 4.--5. " SCALEDOWN ,Scale-Down mode" "Disabled,1,2,Enable 0/1bits" textline " " bitfld.long 0x00 3. " DISSCRAMBLE ,Disable scrambling" "No,Yes" bitfld.long 0x00 2. " U2EXIT_LFPS ,U2EXIT_LFPS" "248ns,8us" bitfld.long 0x00 1. " GBLHIBERNATIONEN ,Hibernation at the global level enable" "Disabled,Enabled" bitfld.long 0x00 0. " DSBLCLKGTNG ,Disable clock gating" "No,Yes" endif group.long 0xC114++0x03 line.long 0x00 "GPMSTS,Global Power Management Status Register" bitfld.long 0x00 28.--31. " PORTSEL ,Port number selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x00 16. " LCS ,Last connection state" "Not detected,Detected" rbitfld.long 0x00 15. " U3-DD ,Disconnect detected" "Not detected,Detected" rbitfld.long 0x00 14. " U3-CD ,Connect detected" "Not detected,Detected" textline " " rbitfld.long 0x00 13. " U3-RD ,Resume detected" "Not detected,Detected" rbitfld.long 0x00 12. " U3-OD ,Overcurrent detected" "Not detected,Detected" rbitfld.long 0x00 9. " U2-DD ,Resume detected changed" "Not detected,Detected" rbitfld.long 0x00 8. " U2-RD ,USB reset detected" "Not detected,Detected" textline " " rbitfld.long 0x00 7. " U2-UID ,ULPI interrupt detected" "Not detected,Detected" rbitfld.long 0x00 6. " U2-SRD ,SRP request detected" "Not detected,Detected" rbitfld.long 0x00 5. " U2-ICD ,ID change detected" "Not detected,Detected" rbitfld.long 0x00 4. " U2-LCS ,Last connection state" "Not detected,Detected" textline " " rbitfld.long 0x00 3. " U2-DD ,Disconnect detected" "Not detected,Detected" rbitfld.long 0x00 2. " U2-CD ,Connect detected" "Not detected,Detected" rbitfld.long 0x00 1. " U2-RD ,Resume detected" "Not detected,Detected" rbitfld.long 0x00 0. " U2-OD ,Overcurrent detected" "Not detected,Detected" rgroup.long 0xC118++0x03 line.long 0x00 "GSTS,Global Status Register" hexmask.long.word 0x00 20.--31. 1. " CBELT ,Minimum value of all received device BELT values" bitfld.long 0x00 11. " SSIC_IP ,SSIC interrupt pending" "No interrupt,Interrupt" bitfld.long 0x00 10. " OTG_IP ,OTG interrupt pending" "No interrupt,Interrupt" bitfld.long 0x00 9. " BC_IP ,Battery charger interrupt pending" "No interrupt,Interrupt" textline " " bitfld.long 0x00 8. " ADP_IP ,ADP interrupt pending" "No interrupt,Interrupt" bitfld.long 0x00 7. " HOST_IP ,Host interrupt pending" "No interrupt,Interrupt" bitfld.long 0x00 6. " DEVICE_IP ,Device interrupt pending" "No interrupt,Interrupt" bitfld.long 0x00 5. " CSRTIMEOUT ,CSR timeout" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " BUSERRADDRVLD ,Bus error address valid" "Not valid,Valid" bitfld.long 0x00 0.--1. " CURMOD ,Current mode of operation" "Device,Host,?..." if (((d.l(ad:0xFE200000+0xC118))&0x01)==0x00) group.long 0xC11C++0x03 line.long 0x00 "GUCTL1,Global User Control Register 1" bitfld.long 0x00 29. " FILTER_SE0_FSLS_EOP ,Enable FS/LS SE0 filtering for 2 clocks for detecting EOP" "Disabled,Enabled" bitfld.long 0x00 28. " TX_IPGAP_LINECHK_DIS ,Disable linestate check during HS transmit" "No,Yes" bitfld.long 0x00 27. " DEV_TRB_OUT_SPR_IND ,Enable short packet status indication in the OT TRB" "Disabled,Enabled" bitfld.long 0x00 26. " DEV_FORCE_20CLKFOR_30CLK ,Force 2.0 clock in 2.0 mode" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " P3_IN_U2 ,Enable P3 power state when the superspeed link is in U2" "Disabled,Enabled" bitfld.long 0x00 24. " DEV_L1_EXIT_BY_HW ,Enable device L1 hardware exit logic" "Disabled,Enabled" bitfld.long 0x00 21.--23. " IP_GAP_ADD_ON ,USB 2.0 MAC inter packet gap add value" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20. " DEV_LSP_TAIL_LOCK_DIS ,Disable device lsp lock logic for tail TRB update" "No,Yes" textline " " bitfld.long 0x00 19. " NAK_PER_ENH_FS ,Enable performance enhancement for FS async endpoints in the presence of naks" "Disabled,Enabled" bitfld.long 0x00 18. " NAK_PER_ENH ,Enable performance enhancement for HS sync endpoints in the presence of naks" "Disabled,Enabled" textline " " textfld " " bitfld.long 0x00 10. " RES_TRMS_XCVRSEL_UN ,Resume termsel xcvrsel unify" "Disabled,Enabled" textline " " textfld " " bitfld.long 0x00 2. " HC_PARCHK_DIS ,Host parameter check disable" "No,Yes" bitfld.long 0x00 1. " OVRLD_L1_SUSP_COM ,PHY stops the port clock during L1 sleep condition" "Not occurred,Occurred" else if (((d.l(ad:0xFE200000+0xC11C))&0x100)==0x100) group.long 0xC11C++0x03 line.long 0x00 "GUCTL1,Global User Control Register 1" bitfld.long 0x00 29. " FILTER_SE0_FSLS_EOP ,Enable FS/LS SE0 filtering for 2 clocks for detecting EOP" "Disabled,Enabled" bitfld.long 0x00 28. " TX_IPGAP_LINECHK_DIS ,Disable linestate check during HS transmit" "No,Yes" textline " " bitfld.long 0x00 25. " P3_IN_U2 ,Enable P3 power state when the superspeed link is in U2" "Disabled,Enabled" textfld " " bitfld.long 0x00 21.--23. " IP_GAP_ADD_ON ,USB 2.0 MAC inter packet gap add value" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20. " DEV_LSP_TAIL_LOCK_DIS ,Disable device lsp lock logic for tail TRB update" "No,Yes" textline " " bitfld.long 0x00 19. " NAK_PER_ENH_FS ,Enable performance enhancement for FS async endpoints in the presence of naks" "Disabled,Enabled" bitfld.long 0x00 18. " NAK_PER_ENH ,Enable performance enhancement for HS sync endpoints in the presence of naks" "Disabled,Enabled" bitfld.long 0x00 17. " PARKMODE_DIS_SS ,Disable the SS bus instances in park mode" "No,Yes" bitfld.long 0x00 16. " PARKMODE_DIS_HS ,Disable the HS bus instances park mode" "No,Yes" textline " " bitfld.long 0x00 15. " PARKMODE_DI_FSLS ,Parkmode FSLS disable" "No,Yes" bitfld.long 0x00 10. " RES_TRMS_XCVRSEL_UN ,Resume termsel xcvrsel unify" "Disabled,Enabled" bitfld.long 0x00 8. " L1STENFORHOST ,HIRD/BESL comparison value" ">=,Less" bitfld.long 0x00 4.--7. " L1STHDFORHOST ,L1_SUSP_THRLD_FOR_HOST" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 3. " HC_ERRATA_ENABLE ,Host ELD enable" "Disabled,Enabled" bitfld.long 0x00 2. " HC_PARCHK_DIS ,Host parameter check disable" "No,Yes" bitfld.long 0x00 1. " OVRLD_L1_SUSP_COM ,PHY stops the port clock during L1 sleep condition" "Not occurred,Occurred" bitfld.long 0x00 0. " LOA_FILTER_EN ,USB 2.0 port babble check" "Not checked,Checked" else group.long 0xC11C++0x03 line.long 0x00 "GUCTL1,Global User Control Register 1" bitfld.long 0x00 29. " FILTER_SE0_FSLS_EOP ,Enable FS/LS SE0 filtering for 2 clocks for detecting EOP" "Disabled,Enabled" bitfld.long 0x00 28. " TX_IPGAP_LINECHK_DIS ,Disable linestate check during HS transmit" "No,Yes" textline " " bitfld.long 0x00 25. " P3_IN_U2 ,Enable P3 power state when the superspeed link is in U2" "Disabled,Enabled" textfld " " bitfld.long 0x00 21.--23. " IP_GAP_ADD_ON ,USB 2.0 MAC inter packet gap add value" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20. " DEV_LSP_TAIL_LOCK_DIS ,Disable device lsp lock logic for tail TRB update" "No,Yes" textline " " bitfld.long 0x00 19. " NAK_PER_ENH_FS ,Enable performance enhancement for FS async endpoints in the presence of naks" "Disabled,Enabled" bitfld.long 0x00 18. " NAK_PER_ENH ,Enable performance enhancement for HS sync endpoints in the presence of naks" "Disabled,Enabled" bitfld.long 0x00 17. " PARKMODE_DIS_SS ,Disable the SS bus instances in park mode" "No,Yes" bitfld.long 0x00 16. " PARKMODE_DIS_HS ,Disable the HS bus instances park mode" "No,Yes" textline " " bitfld.long 0x00 15. " PARKMODE_DI_FSLS ,Parkmode FSLS disable" "No,Yes" bitfld.long 0x00 10. " RES_TRMS_XCVRSEL_UN ,Resume termsel xcvrsel unify" "Disabled,Enabled" bitfld.long 0x00 8. " L1STENFORHOST ,HIRD/BESL comparison value" ">=,Less" textline " " bitfld.long 0x00 3. " HC_ERRATA_ENABLE ,Host ELD enable" "Disabled,Enabled" bitfld.long 0x00 2. " HC_PARCHK_DIS ,Host parameter check disable" "No,Yes" bitfld.long 0x00 1. " OVRLD_L1_SUSP_COM ,PHY stops the port clock during L1 sleep condition" "Not occurred,Occurred" bitfld.long 0x00 0. " LOA_FILTER_EN ,USB 2.0 port babble check" "Not checked,Checked" endif endif rgroup.long 0xC120++0x03 line.long 0x00 "GSNPSID,Global Synopsys ID Register" hexmask.long.word 0x00 16.--31. 1. " CIN ,Core identification number" hexmask.long.word 0x00 0.--15. 1. " RE ,Release number" group.long 0xC124++0x07 line.long 0x00 "GGPIO,Global General Purpose Input/output Register" hexmask.long.word 0x00 16.--31. 1. " GPO ,General purpose output" hexmask.long.word 0x00 0.--15. 1. " GPI ,General purpose input" line.long 0x04 "GUID,Global User ID Register" if (((d.l(ad:0xFE200000+0xC118))&0x01)==0x00) group.long 0xC12C++0x03 line.long 0x00 "GUCTL,Global User Control Register" hexmask.long.word 0x00 22.--31. 1. " REFCLKPER ,The period of REF_CLK in nanoseconds" bitfld.long 0x00 21. " NOEXTRDL ,No extra delay between SOF and the first packet" "2microseconds,No wait" bitfld.long 0x00 17. " SPRSCTRLTRANSEN ,Sparse control transaction enable" "Disabled,Enabled" textline " " textfld " " bitfld.long 0x00 14. " HINAREN ,Host IN auto retry" "Disabled,Enabled" bitfld.long 0x00 13. " ENOVERLAPCHK ,Enable check for LFPS overlap during remote ux exit" "Disabled,Enabled" bitfld.long 0x00 12. " EXTCAPSUPPTEN ,External extended capability support enable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " ITEXTRFSBODI ,Insert extra delay between FS bulk OUT transactions" "Disabled,Enabled" bitfld.long 0x00 9.--10. " DTCT ,Device timeout coarse tuning" "DTFT,500 usec,1.5 msec,6.5 msec" hexmask.long.word 0x00 0.--8. 1. " DTFT ,Device timeout fine tuning" else group.long 0xC12C++0x03 line.long 0x00 "GUCTL,Global User Control Register" hexmask.long.word 0x00 22.--31. 1. " REFCLKPER ,The period of REF_CLK in nanoseconds" bitfld.long 0x00 21. " NOEXTRDL ,No extra delay between SOF and the first packet" "2microseconds,No wait" bitfld.long 0x00 17. " SPRSCTRLTRANSEN ,Sparse control transaction enable" "Disabled,Enabled" bitfld.long 0x00 16. " RESBWHSEPS ,Bandwidth relaxed to 85% to accommodate two high speed enable" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " CMDEVADDR ,Compliance mode for device address" "Slot ID,Incremented" bitfld.long 0x00 14. " HINAREN ,Host IN auto retry" "Disabled,Enabled" bitfld.long 0x00 13. " ENOVERLAPCHK ,Enable check for LFPS overlap during remote ux exit" "Disabled,Enabled" bitfld.long 0x00 12. " EXTCAPSUPPTEN ,External extended capability support enable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " ITEXTRFSBODI ,Insert extra delay between FS bulk OUT transactions" "Disabled,Enabled" bitfld.long 0x00 9.--10. " DTCT ,Device timeout coarse tuning" "DTFT,500 usec,1.5 msec,6.5 msec" hexmask.long.word 0x00 0.--8. 1. " DTFT ,Device timeout fine tuning" endif textline " " rgroup.long 0xC130++0x1F line.long 0x00 "GBUSERRADDRLO,Global Soc Bus Error Address Register - Low" line.long 0x04 "GBUSERRADDRHI,Global Soc Bus Error Address Register - High" line.long 0x08 "GPRTBIMAPLO,Global Port - SS USB Instance Mapping Register - Low" bitfld.long 0x08 28.--31. " BINUM_[8] ,FS USB instance number for port 8" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 24.--27. " [7] ,FS USB instance number for port 7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 20.--23. " [6] ,FS USB instance number for port 6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 16.--19. " [5] ,FS USB instance number for port 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 12.--15. " [4] ,FS USB instance number for port 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 8.--11. " [3] ,FS USB instance number for port 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 4.--7. " [2] ,FS USB instance number for port 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--3. " [1] ,FS USB instance number for port 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x0C "GPRTBIMAPHI,Global Port - SS USB Instance Mapping Register - High" bitfld.long 0x0C 24.--27. " BINUM[15] ,FS USB instance number for port 15" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 20.--23. " [14] ,FS USB instance number for port 14" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 16.--19. " [13] ,FS USB instance number for port 13" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 12.--15. " [12] ,FS USB instance number for port 12" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 8.--11. " [11] ,FS USB instance number for port 11" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 4.--7. " [10] ,FS USB instance number for port 10" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 0.--3. " [9] ,FS USB instance number for port 9" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " line.long 0x10 "GHWPARAMS0,Global Hardware Parameters Register 0" hexmask.long.byte 0x10 24.--31. 1. " GHWPARAMS0_[24-31] ,DWC_USB3_AWIDTH" hexmask.long.byte 0x10 16.--23. 1. " [16-23] ,DWC_USB3_SDWIDTH" hexmask.long.byte 0x10 8.--15. 1. " [8-15] ,DWC_USB3_MDWIDTH" bitfld.long 0x10 6.--7. " [6-7] ,DWC_USB3_SBUS_TYPE" "0,1,2,3" textline " " bitfld.long 0x10 3.--5. " [3-5] ,DWC_USB3_MBUS_TYPE" "0,1,2,3,4,5,6,7" bitfld.long 0x10 0.--2. " [2-0] ,DWC_USB3_MODE" "0,1,2,3,4,5,6,7" line.long 0x14 "GHWPARAMS1,Global Hardware Parameters Register 1" bitfld.long 0x14 31. " GHWPARAMS1_[31] ,DWC_USB3_EN_DBC" "0,1" bitfld.long 0x14 30. " [30] ,DWC_USB3_RM_OPT_FEATURES" "0,1" bitfld.long 0x14 28. " [28] ,DWC_USB3_RAM_BUS_CLKS_SYNC" "0,1" bitfld.long 0x14 27. " [27] ,DWC_USB3_MAC_RAM_CLKS_SYNC" "0,1" textline " " bitfld.long 0x14 26. " [26] ,DWC_USB3_MAC_PHY_CLKS_SYNC" "0,1" bitfld.long 0x14 24.--25. " [24-25] ,DWC_USB3_EN_PWROPT" "0,1,2,3" bitfld.long 0x14 23. " [23] ,DWC_USB3_SPRAM_TYP" "0,1" bitfld.long 0x14 21.--22. " [21-22] ,DWC_USB3_NUM_RAMS" "0,1,2,3" textline " " bitfld.long 0x14 15.--20. " [15-20] ,DWC_USB3_DEVICE_NUM_INT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x14 12.--14. " [12-14] ,DWC_USB3_ASPACEWIDTH" "0,1,2,3,4,5,6,7" bitfld.long 0x14 9.--11. " [9-11] ,DWC_USB3_REQINFOWIDTH" "0,1,2,3,4,5,6,7" bitfld.long 0x14 6.--8. " [6-8] ,DWC_USB3_DATAINFOWIDTH" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x14 3.--5. " [3-5] ,DWC_USB3_BURSTWIDTH-1" "0,1,2,3,4,5,6,7" bitfld.long 0x14 0.--2. " [0-2] ,DWC_USB3_IDWIDTH-1" "0,1,2,3,4,5,6,7" line.long 0x18 "GHWPARAMS2,Global Hardware Parameters Register 2" line.long 0x1C "GHWPARAMS3,Global Hardware Parameters Register 3" hexmask.long.byte 0x1C 23.--30. 1. " GHWPARAMS3_[23_31] ,DWC_USB3_CACHE_TOTAL_XFER_RESOURCES" bitfld.long 0x1C 18.--22. " [18-22] ,DWC_USB3_NUM_IN_EPS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x1C 12.--17. " [12-17] ,DWC_USB3_NUM_EPS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x1C 11. " [11] ,DWC_USB3_ULPI_CARKIT" "0,1" textline " " bitfld.long 0x1C 10. " [10] ,DWC_USB3_VENDOR_CTL_INTERFACE" "0,1" bitfld.long 0x1C 6.--7. " [6-7] ,DWC_USB3_HSPHY_DWIDTH" "0,1,2,3" bitfld.long 0x1C 4.--5. " [4-5] ,DWC_USB3_FSPHY_INTERFACE" "0,1,2,3" bitfld.long 0x1C 2.--3. " [2-3] ,DWC_USB3_HSPHY_INTERFACE" "0,1,2,3" textline " " bitfld.long 0x1C 0.--1. " [0-1] ,DWC_USB3_SSPHY_INTERFACE" "0,1,2,3" rgroup.long 0xC150++0x0F line.long 0x00 "GHWPARAMS4,Global Hardware Parameters Register 4" bitfld.long 0x00 28.--31. " GHWPARAMS4_[28-31] ,DWC_USB3_BMU_LSP_DEPTH" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. " [24-27] ,DWC_USB3_BMU_PTL_DEPTH-1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 23. " [23] ,DWC_USB3_EN_ISOC_SUPT" "0,1" bitfld.long 0x00 21. " [21] ,DWC_USB3_EXT_BUFF_CONTROL" "0,1" textline " " bitfld.long 0x00 17.--20. " [17-20] ,DWC_USB3_NUM_SS_USB_INSTANCES" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 13.--16. " [13-16] ,Number of external scratchpad buffers" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12. " [12] ,DWC_USB3_EN_SSIC" "0,1" bitfld.long 0x00 11. " [11] ,Synopsys M-PHY or a Third-Party M-PHY is used with SSIC ports" "Synopsys,Third-party" textline " " bitfld.long 0x00 9.--10. " [9-10] ,DWC_USB3_SSIC_GEAR parameter" ",HS-G1,HS-G2,HS-G3" bitfld.long 0x00 7.--8. " [7-8] ,DWC_USB3_SSIC_NUM_LANE parameter value" ",1 lane,?..." bitfld.long 0x00 0.--5. " [0-5] ,DWC_USB3_CACHE_TRBS_PER_TRANSFER" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "GHWPARAMS5,Global Hardware Parameters Register 5" bitfld.long 0x04 22.--27. " GHWPARAMS5_[22-27] ,DWC_USB3_DFQ_FIFO_DEPTH" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 16.--21. " [16-21] ,DWC_USB3_DWQ_FIFO_DEPTH" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 10.--15. " [10-15] ,DWC_USB3_TXQ_FIFO_DEPTH" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 4.--9. " [4-9] ,DWC_USB3_RXQ_FIFO_DEPTH" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x04 0.--3. " [0-3] ,DWC_USB3_BMU_BUSGM_DEPTH" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " line.long 0x08 "GHWPARAMS6,Global Hardware Parameters Register 6" hexmask.long.word 0x08 16.--31. 1. " GHWPARAMS6_31_16 ,DWC_USB3_RAM0_DEPTH" bitfld.long 0x08 15. " BUSFLTRSSUPPORT ,DWC_USB3_EN_BUS_FILTERS" "0,1" bitfld.long 0x08 14. " BCSUPPORT ,DWC_USB3_EN_BC" "0,1" bitfld.long 0x08 13. " OTG_SS_SUPPORT ,OTG 3.0 support enabled" "Disabled,Enabled" textline " " bitfld.long 0x08 12. " ADPSUPPORT ,DWC_USB3_EN_ADP" "0,1" bitfld.long 0x08 11. " HNPSUPPORT ,RSP/HNP support enabled" "Disabled,Enabled" bitfld.long 0x08 10. " SRPSUPPORT ,SRP support enabled" "Disabled,Enabled" bitfld.long 0x08 7. " GHWPARAMS6_7 ,DWC_USB3_EN_FPGA" "0,1" textline " " bitfld.long 0x08 6. " GHWPARAMS6_6 ,DWC_USB3_EN_DBG_PORTS" "0,1" bitfld.long 0x08 0.--5. " GHWPARAMS6_5_0 ,DWC_USB3_PSQ_FIFO_DEPTH" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x0C "GHWPARAMS7,Global Hardware Parameters Register 7" hexmask.long.word 0x0C 16.--31. 1. " GHWPARAMS7_31_16 ,DWC_USB3_RAM2_DEPTH" hexmask.long.word 0x0C 0.--15. 1. " GHWPARAMS7_15_0 ,DWC_USB3_RAM1_DEPTH" group.long 0xC160++0x03 line.long 0x00 "GDBGFIFOSPACE,Global Debug Queue/FIFO Space Available Register" hexmask.long.word 0x00 16.--31. 1. " SPACE_AVAILABLE ,Space available" hexmask.long.word 0x00 0.--8. 1. " FIFO_QUEUE_SELECT ,FIFO/queue select" rgroup.long 0xC164++0x03 line.long 0x00 "GDBGLTSSM,Global Debug LTSSM Register" bitfld.long 0x00 30. " RXELECIDLE ,RX elecidle" "0,1" bitfld.long 0x00 29. " X3_XS_SWAPPING ,X3_XS_SWAPPING" "0,1" bitfld.long 0x00 28. " X3_DS_HOST_SHUTDOWN ,X3_DS_HOST_SHUTDOWN" "0,1" bitfld.long 0x00 27. " PRTDIRECTION ,Port direction" "Upstream,Downstream" textline " " bitfld.long 0x00 26. " LTDBTIMEOUT ,LTDB timeout" "0,1" bitfld.long 0x00 22.--25. " LTDBLINKSTATE ,LTDB link state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 18.--21. " LTDBSUBSTATE ,LTDB Sub-State" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 17. " ELASTICBUFFERMODE ,Elastic buffer mode" "0,1" textline " " bitfld.long 0x00 16. " TXELECLDLE ,TX elec idle" "0,1" bitfld.long 0x00 15. " RXPOLARITY ,RX polarity" "0,1" bitfld.long 0x00 14. " TXDETRXLOOPBACK ,TX detect rx/loopback" "0,1" bitfld.long 0x00 11.--13. " LTDBPHYCMDSTATE ,LTSSM PHY command state" "PHY_IDLE,PHY_DET,PHY_DET_3,PHY_PWR_DLY,PHY_PWR_A,PHY_PWR_B,?..." textline " " bitfld.long 0x00 9.--10. " POWERDOWN ,POWERDOWN" "0,1,2,3" bitfld.long 0x00 8. " RXEQTRAIN ,Rxeq train" "0,1" bitfld.long 0x00 6.--7. " TXDEEMPHASIS ,TXDEEMPHASIS" "0,1,2,3" bitfld.long 0x00 3.--5. " LTDBCLKSTATE ,LTSSM clock state" "CLK_NORM,CLK_TO_P3,CLK_WAIT1,CLK_P3,CLK_TO_P0,CLK_WAIT2,?..." textline " " bitfld.long 0x00 2. " TXSWING ,TX swing" "0,1" bitfld.long 0x00 1. " RXTERMINATION ,RX termination" "0,1" bitfld.long 0x00 0. " TXONESZEROS ,TX ones/zeros" "0,1" rgroup.long 0xC168++0x07 line.long 0x00 "GDBGLNMCC,Global Debug LNMCC Register" hexmask.long.word 0x00 0.--8. 1. " LNMCC_BERC ,Error rate information for the port selected in the GDBGFIFOSPACE" line.long 0x04 "GDBGBMU,Global Debug BMU Register" hexmask.long.tbyte 0x04 8.--31. 1. " BMU_BCU ,BMU_BCU debug information" bitfld.long 0x04 4.--7. " BMU_DCU ,BMU_DCU debug information" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. " BMU_CCU ,BMU_CCU debug information" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0xC170++0x03 line.long 0x00 "GDBGLSPMUX_HST,Internal Global Debug LSP MUX Register" hexmask.long.byte 0x00 16.--23. 1. " LOGIC_ANALYZER_TRACE ,LOGIC_ANALYZER_TRACE port MUX select" hexmask.long.word 0x00 0.--13. 1. " HOSTSELECT ,Device LSP select selects" rgroup.long 0xC174++0x0B line.long 0x00 "GDBGLSP,Global Debug LSP Register" line.long 0x04 "GDBGEPINFO0,Global Debug Endpoint Information Register 0" line.long 0x08 "GDBGEPINFO1,Global Debug Endpoint Information Register 1" rgroup.long 0xC180++0x07 line.long 0x00 "GPRTBIMAP_HSLO,High Speed Port To Bus Instance Mapping Register" bitfld.long 0x00 28.--31. " BINUM_[8] ,HS USB instance number for port 8 Application-programmable ID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. " [7] ,HS USB instance number for port 7 Application-programmable ID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. " [6] ,HS USB instance number for port 6 Application-programmable ID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " [5] ,HS USB instance number for port 5 Application-programmable ID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " [4] ,HS USB instance number for port 4 Application-programmable ID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " [3] ,HS USB instance number for port 3 Application-programmable ID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " [2] ,HS USB instance number for port 2 Application-programmable ID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " [1] ,HS USB instance number for port 1 Application-programmable ID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "GPRTBIMAP_HSHI,Global Port High Speed To Bus Instance Mapping Register" bitfld.long 0x04 24.--27. " BINUM_[15] ,HS USB instance number for port 15 Application-programmable ID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 20.--23. " [14] ,HS USB instance number for port 14 Application-programmable ID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 16.--19. " [13] ,HS USB instance number for port 13 Application-programmable ID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 12.--15. " [12] ,HS USB instance number for port 12 Application-programmable ID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 8.--11. " [11] ,HS USB instance number for port 11 Application-programmable ID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 4.--7. " [10] ,HS USB instance number for port 10 Application-programmable ID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. " [9] ,HS USB instance number for port 9 Application-programmable ID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0xC188++0x03 line.long 0x00 "GPRTBIMAP_FSLO,Full Speed Port To Bus Instance Mapping Register" rbitfld.long 0x00 28.--31. " BINUM_[8] ,FS USB instance number for port 8 Application-programmable ID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x00 24.--27. " [7] ,FS USB instance number for port 7 Application-programmable ID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x00 20.--23. " [6] ,FS USB instance number for port 6 Application-programmable ID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x00 16.--19. " [5] ,FS USB instance number for port 5 Application-programmable ID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x00 12.--15. " [4] ,FS USB instance number for port 4 Application-programmable ID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x00 8.--11. " [3] ,FS USB instance number for port 3 Application-programmable ID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x00 4.--7. " [2] ,FS USB instance number for port 2 Application-programmable ID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " [1] ,FS USB instance number for port 1 Application-programmable ID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long 0xC18C++0x03 line.long 0x00 "GPRTBIMAP_FSHI,Full Speed Port To Bus Instance Mapping Register" bitfld.long 0x00 24.--27. " BINUM_[15] ,FS USB instance number for port 15 Application-programmable ID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. " [14] ,FS USB instance number for port 14 Application-programmable ID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " [13] ,FS USB instance number for port 13 Application-programmable ID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " [12] ,FS USB instance number for port 12 Application-programmable ID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " [11] ,FS USB instance number for port 11 Application-programmable ID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " [10] ,FS USB instance number for port 10 Application-programmable ID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " [9] ,FK USB instance number for port 9 Application-programmable ID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " if (((d.l(ad:0xFE200000+0xC118))&0x01)==0x00) if (((d.l(ad:0xFE200000+0xC14C))&0x0C)==(0x0C||0x08)) group.long 0xC200++0x03 line.long 0x00 "GUSB2PHYCFG,Global USB2 PHY Configuration Register" bitfld.long 0x00 31. " PHYSOFTRST ,PHY soft reset" "No reset,Reset" bitfld.long 0x00 30. " U2_FREECLK_EXISTS ,Free-running PHY clock existence" "Not exist,Exist" textfld " " rbitfld.long 0x00 27.--28. " HSIC_CON_WIDTH_ADJ ,Connect duration for the HSIC" "0,1,2,3" textline " " rbitfld.long 0x00 26. " INV_SEL_HSIC ,HSIC enable" "Disabled,Enabled" bitfld.long 0x00 18. " ULPIEXTVBUSIND ,ULPI external VBUS indicator" "Internal,External" textline " " bitfld.long 0x00 17. " ULPIEXTVBUSDRV ,ULPI external VBUS drive" "Internal,External" bitfld.long 0x00 15. " ULPIAUTORES ,ULPI auto resume" "Disabled,Enabled" bitfld.long 0x00 10.--13. " USBTRDTIM ,USB 2.0 turnaround time" ",,,,,16-bit UTMI+,,,,8-bit UTMI+/ULPI,?..." bitfld.long 0x00 9. " XCVRDLY ,Transceiver delay" "No delay,Delay" textline " " bitfld.long 0x00 8. " ENBLSLPM ,Enable UTMI sleep" "Disabled,Enabled" bitfld.long 0x00 7. " PHYSEL ,USB 2.0 High-Speed PHY or USB 1.1 Full-Speed serial transceiver select" "High-speed,?..." bitfld.long 0x00 6. " SUSPENDUSB20 ,Suspend USB2.0 HS/FS/LS PHY" "Not suspended,Suspended" rbitfld.long 0x00 5. " FSINTF ,Full-Speed serial interface select" "6-pin,3-pin" textline " " rbitfld.long 0x00 4. " ULPI_UTMI_SEL ,ULPI or UTMI+ select" "UTMI+,ULPI" bitfld.long 0x00 3. " PHYIF ,PHY interface" "8 bits,16 bits" bitfld.long 0x00 0.--2. " TOUTCAL ,HS/FS timeout calibration" "0,1,2,3,4,5,6,7" else group.long 0xC200++0x03 line.long 0x00 "GUSB2PHYCFG,Global USB2 PHY Configuration Register" bitfld.long 0x00 31. " PHYSOFTRST ,PHY soft reset" "No reset,Reset" bitfld.long 0x00 30. " U2_FREECLK_EXISTS ,Free-running PHY clock existence" "Not exist,Exist" textfld " " rbitfld.long 0x00 27.--28. " HSIC_CON_WIDTH_ADJ ,Connect duration for the HSIC" "0,1,2,3" textline " " rbitfld.long 0x00 26. " INV_SEL_HSIC ,HSIC enable" "Disabled,Enabled" textline " " textfld " " bitfld.long 0x00 10.--13. " USBTRDTIM ,USB 2.0 turnaround time" ",,,,,16-bit UTMI+,,,,8-bit UTMI+/ULPI,?..." bitfld.long 0x00 9. " XCVRDLY ,Transceiver delay" "No delay,Delay" textline " " bitfld.long 0x00 8. " ENBLSLPM ,Enable UTMI sleep" "Disabled,Enabled" bitfld.long 0x00 7. " PHYSEL ,USB 2.0 High-Speed PHY or USB 1.1 Full-Speed serial transceiver select" "High-speed,?..." bitfld.long 0x00 6. " SUSPENDUSB20 ,Suspend USB2.0 HS/FS/LS PHY" "Not suspended,Suspended" rbitfld.long 0x00 5. " FSINTF ,Full-Speed serial interface select" "6-pin,3-pin" textline " " rbitfld.long 0x00 4. " ULPI_UTMI_SEL ,ULPI or UTMI+ select" "UTMI+,ULPI" bitfld.long 0x00 3. " PHYIF ,PHY interface" "8 bits,16 bits" bitfld.long 0x00 0.--2. " TOUTCAL ,HS/FS timeout calibration" "0,1,2,3,4,5,6,7" endif else if (((d.l(ad:0xFE200000+0xC14C))&0x0C)==(0x0C||0x08)) group.long 0xC200++0x03 line.long 0x00 "GUSB2PHYCFG,Global USB2 PHY Configuration Register" bitfld.long 0x00 31. " PHYSOFTRST ,PHY soft reset" "No reset,Reset" bitfld.long 0x00 30. " U2_FREECLK_EXISTS ,Free-running PHY clock existence" "Not exist,Exist" bitfld.long 0x00 29. " ULPI_LPM_OPMODE_CHK ,Support the LPM over ULPI without NOPID token to the ULPI PHY" "Not supported,Supported" rbitfld.long 0x00 27.--28. " HSIC_CON_WIDTH_ADJ ,Connect duration for the HSIC" "0,1,2,3" textline " " rbitfld.long 0x00 26. " INV_SEL_HSIC ,HSIC enable" "Disabled,Enabled" bitfld.long 0x00 22.--24. " LSTRD ,LS turnaround time" "2 bit,2.5 bit,3 bit,3.5 bit,4 bit,4.5 bit,5 bit,5.5 bit" bitfld.long 0x00 19.--21. " LSIPD ,LS Inter-Packet time" "2 bit,2.5 bit,3 bit,3.5 bit,4 bit,4.5 bit,5 bit,5.5 bit" bitfld.long 0x00 18. " ULPIEXTVBUSIND ,ULPI external VBUS indicator" "Internal,External" textline " " bitfld.long 0x00 17. " ULPIEXTVBUSDRV ,ULPI external VBUS drive" "Internal,External" bitfld.long 0x00 15. " ULPIAUTORES ,ULPI auto resume" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " ENBLSLPM ,Enable UTMI sleep" "Disabled,Enabled" bitfld.long 0x00 7. " PHYSEL ,USB 2.0 High-Speed PHY or USB 1.1 Full-Speed serial transceiver select" "High-speed,?..." bitfld.long 0x00 6. " SUSPENDUSB20 ,Suspend USB2.0 HS/FS/LS PHY" "Not suspended,Suspended" rbitfld.long 0x00 5. " FSINTF ,Full-Speed serial interface select" "6-pin,3-pin" textline " " rbitfld.long 0x00 4. " ULPI_UTMI_SEL ,ULPI or UTMI+ select" "UTMI+,ULPI" bitfld.long 0x00 3. " PHYIF ,PHY interface" "8 bits,16 bits" bitfld.long 0x00 0.--2. " TOUTCAL ,HS/FS timeout calibration" "0,1,2,3,4,5,6,7" else group.long 0xC200++0x03 line.long 0x00 "GUSB2PHYCFG,Global USB2 PHY Configuration Register" bitfld.long 0x00 31. " PHYSOFTRST ,PHY soft reset" "No reset,Reset" bitfld.long 0x00 30. " U2_FREECLK_EXISTS ,Free-running PHY clock existence" "Not exist,Exist" textfld " " rbitfld.long 0x00 27.--28. " HSIC_CON_WIDTH_ADJ ,Connect duration for the HSIC" "0,1,2,3" textline " " rbitfld.long 0x00 26. " INV_SEL_HSIC ,HSIC enable" "Disabled,Enabled" bitfld.long 0x00 22.--24. " LSTRD ,LS turnaround time" "2 bit,2.5 bit,3 bit,3.5 bit,4 bit,4.5 bit,5 bit,5.5 bit" bitfld.long 0x00 19.--21. " LSIPD ,LS Inter-Packet time" "2 bit,2.5 bit,3 bit,3.5 bit,4 bit,4.5 bit,5 bit,5.5 bit" textline " " textline " " bitfld.long 0x00 8. " ENBLSLPM ,Enable UTMI sleep" "Disabled,Enabled" bitfld.long 0x00 7. " PHYSEL ,USB 2.0 High-Speed PHY or USB 1.1 Full-Speed serial transceiver select" "High-speed,?..." bitfld.long 0x00 6. " SUSPENDUSB20 ,Suspend USB2.0 HS/FS/LS PHY" "Not suspended,Suspended" rbitfld.long 0x00 5. " FSINTF ,Full-Speed serial interface select" "6-pin,3-pin" textline " " rbitfld.long 0x00 4. " ULPI_UTMI_SEL ,ULPI or UTMI+ select" "UTMI+,ULPI" bitfld.long 0x00 3. " PHYIF ,PHY interface" "8 bits,16 bits" bitfld.long 0x00 0.--2. " TOUTCAL ,HS/FS timeout calibration" "0,1,2,3,4,5,6,7" endif endif if (((d.l(ad:0xFE200000+0xC200))&0x10)==0x10) group.long 0xC280++0x03 line.long 0x00 "GUSB2PACC_ULPI,GUSB2PHYACC_ULPI" rbitfld.long 0x00 26. " DISUIPIDRVR ,DISUIPIDRVR" "0,1" bitfld.long 0x00 25. " NEWREGREQ ,New register request" "Not requested,Requested" rbitfld.long 0x00 24. " VSTSDONE ,VSTSDONE" "0,1" bitfld.long 0x00 23. " VSTSBSY ,VSTSBSY" "0,1" textline " " bitfld.long 0x00 22. " REGWR ,Register write" "Read,Write" bitfld.long 0x00 16.--21. " REGADDR ,Register address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x00 8.--15. 0x01 " EXTREGADDR ,EXTREGADDR" hexmask.long.byte 0x00 0.--7. 1. " REGDATA ,Register data" else group.long 0xC280++0x03 line.long 0x00 "GUSB2PACC_ULPI,GUSB2PHYACC_ULPI" rbitfld.long 0x00 26. " DISUIPIDRVR ,DISUIPIDRVR" "0,1" bitfld.long 0x00 25. " NEWREGREQ ,New register request" "Not requested,Requested" rbitfld.long 0x00 24. " VSTSDONE ,VSTSDONE" "0,1" bitfld.long 0x00 23. " VSTSBSY ,VSTSBSY" "0,1" textline " " textfld " " hexmask.long.byte 0x00 8.--15. 0x01 " EXTREGADDR ,EXTREGADDR" hexmask.long.byte 0x00 0.--7. 1. " REGDATA ,Register data" endif if (((d.l(ad:0xFE200000+0xC150))&0x1000)==0x1000) group.long 0xC2C0++0x03 line.long 0x00 "GUSB3PIPECTL,Global USB3 PIPE Control" bitfld.long 0x00 31. " PHYSOFTRST ,PHY soft reset" "No reset,Reset" bitfld.long 0x00 30. " HSTPRTCMPL ,Enables placing the SS port link into a compliance state" "Disabled,Enabled" bitfld.long 0x00 29. " U2SSINACTP3OK ,P3 OK for u2/ssinactive" "P2,P3" bitfld.long 0x00 28. " DISRXDETP3 ,Disabled receiver detection in P3" "No,Yes" textline " " bitfld.long 0x00 27. " UX_EXIT_IN_PX ,Ux exit in px" "P0,P1/P2/P3" bitfld.long 0x00 26. " PING_ENH_EN ,Ping enhancement enable" "Disabled,Enabled" bitfld.long 0x00 25. " U1U2EXITF_RCV ,U1U2 exit fail to recovery" "Disabled,Enabled" bitfld.long 0x00 24. " REQUEST_P1P2P3 ,Control the systematic request of P1/P2/P3 for U1/U2/U3" "Not requested,Requested" textline " " bitfld.long 0x00 23. " STARTRXDETU3RXDET ,Start receiver detection in u3/rx.detect" "Disabled,Enabled" bitfld.long 0x00 22. " DISRXDETU3RXD ,Disable receiver detection in u3/rx.detect" "No,Yes" bitfld.long 0x00 19.--21. " P1P2P3DELAY ,Delay P1P2P3" "0,1,2,3,4,5,6,7" bitfld.long 0x00 18. " DELAYP1TRANS ,Delay PHY power change from P0 to P1/P2/P3" "Not checking,Checking" textline " " bitfld.long 0x00 17. " SUSPENDENABLE ,Suspend enable for USB3.0 SS PHY" "Disabled,Enabled" rbitfld.long 0x00 15.--16. " DATWIDTH ,PIPE data width" "32 bits,16 bits,8 bits,?..." bitfld.long 0x00 14. " ABORTRXDETINU2 ,Abort RX detect in U2" "Not aborted,Aborted" bitfld.long 0x00 13. " SKIPRXDET ,Skip RX detect" "Not skipped,Skipped" textline " " bitfld.long 0x00 12. " LFPSP0ALGN ,LFPS P0 align" "Not asserted,Asserted" bitfld.long 0x00 11. " P3P2TRANOK ,P3-to-P2 transitions OK" "Not ok,Ok" bitfld.long 0x00 10. " P3EXSIGP2 ,P3 exit signal in P2" "Not changed,Changed" bitfld.long 0x00 9. " LFPSFILT ,LFPS filter" "Not ignored,Ignored" textline " " bitfld.long 0x00 8. " RX_DET_LFPSC ,Disable a 400us delay to start polling LFPS after RX_DETECT" "No,Yes" bitfld.long 0x00 7. " SSICEN ,USB3 SSIC enable" "Disabled,Enabled" bitfld.long 0x00 6. " TXSWING ,TX swing" "0,1" bitfld.long 0x00 3.--5. " TXMARGIN ,TX margin" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 1.--2. " TXDEEMPHASIS ,TX deemphasis" "0,1,2,3" bitfld.long 0x00 0. " ELASTICBUFMODE ,Elastic buffer mode" "0,1" else group.long 0xC2C0++0x03 line.long 0x00 "GUSB3PIPECTL,Global USB3 PIPE Control" bitfld.long 0x00 31. " PHYSOFTRST ,PHY soft reset" "No reset,Reset" bitfld.long 0x00 30. " HSTPRTCMPL ,Enables placing the SS port link into a compliance state" "Disabled,Enabled" bitfld.long 0x00 29. " U2SSINACTP3OK ,P3 OK for u2/ssinactive" "P2,P3" bitfld.long 0x00 28. " DISRXDETP3 ,Disabled receiver detection in P3" "No,Yes" textline " " bitfld.long 0x00 27. " UX_EXIT_IN_PX ,Ux exit in px" "P0,P1/P2/P3" bitfld.long 0x00 26. " PING_ENH_EN ,Ping enhancement enable" "Disabled,Enabled" bitfld.long 0x00 25. " U1U2EXITF_RCV ,U1u2exitfail to recovery" "Disabled,Enabled" bitfld.long 0x00 24. " REQUEST_P1P2P3 ,Control the systematic request of P1/P2/P3 for U1/U2/U3" "Not requested,Requested" textline " " bitfld.long 0x00 23. " STARTRXDETU3RXDET ,Start receiver detection in u3/rx.detect" "Disabled,Enabled" bitfld.long 0x00 22. " DISRXDETU3RXD ,Disable receiver detection in u3/rx.det" "No,Yes" bitfld.long 0x00 19.--21. " P1P2P3DELAY ,Delay P1P2P3" "0,1,2,3,4,5,6,7" bitfld.long 0x00 18. " DELAYP1TRANS ,Delay PHY power change from P0 to P1/P2/P3" "Not checking,Checking" textline " " bitfld.long 0x00 17. " SUSPENDENABLE ,Suspend enable for USB3.0 SS PHY" "Disabled,Enabled" rbitfld.long 0x00 15.--16. " DATWIDTH ,PIPE data width" "32 bits,16 bits,8 bits,?..." bitfld.long 0x00 14. " ABORTRXDETINU2 ,Abort RX detect in U2" "Not aborted,Aborted" bitfld.long 0x00 13. " SKIPRXDET ,Skip RX detect" "Not skipped,Skipped" textline " " bitfld.long 0x00 12. " LFPSP0ALGN ,LFPS P0 align" "Not asserted,Asserted" bitfld.long 0x00 11. " P3P2TRANOK ,P3-to-P2 transitions OK" "Not ok,Ok" bitfld.long 0x00 10. " P3EXSIGP2 ,P3 exit signal in P2" "Not changed,Changed" bitfld.long 0x00 9. " LFPSFILT ,LFPS filter" "Not ignored,Ignored" textline " " bitfld.long 0x00 8. " RX_DET_LFPSC ,Disable a 400us delay to start polling LFPS after RX_DETECT" "No,Yes" textfld " " bitfld.long 0x00 6. " TXSWING ,TX swing" "0,1" bitfld.long 0x00 3.--5. " TXMARGIN ,TX margin" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 1.--2. " TXDEEMPHASIS ,TX deemphasis" "0,1,2,3" bitfld.long 0x00 0. " ELASTICBUFMODE ,Elastic buffer mode" "0,1" endif group.long 0xC300++0x03 line.long 0x00 "GTXFIFOSIZ0,Global Transmit FIFO Size 0 FIFO Mapping In RAM1" hexmask.long.word 0x00 16.--31. 1. " TXFSTADDR ,Transmit FIFO RAM start address" hexmask.long.word 0x00 0.--15. 1. " TXFDEP ,Transmit FIFO depth" group.long 0xC304++0x03 line.long 0x00 "GTXFIFOSIZ1,Global Transmit FIFO Size 1 FIFO Mapping In RAM1" hexmask.long.word 0x00 16.--31. 1. " TXFSTADDR ,Transmit FIFO RAM start address" hexmask.long.word 0x00 0.--15. 1. " TXFDEP ,Transmit FIFO depth" group.long 0xC308++0x03 line.long 0x00 "GTXFIFOSIZ2,Global Transmit FIFO Size 2 FIFO Mapping In RAM1" hexmask.long.word 0x00 16.--31. 1. " TXFSTADDR ,Transmit FIFO RAM start address" hexmask.long.word 0x00 0.--15. 1. " TXFDEP ,Transmit FIFO depth" group.long 0xC30C++0x03 line.long 0x00 "GTXFIFOSIZ3,Global Transmit FIFO Size 3 FIFO Mapping In RAM1" hexmask.long.word 0x00 16.--31. 1. " TXFSTADDR ,Transmit FIFO RAM start address" hexmask.long.word 0x00 0.--15. 1. " TXFDEP ,Transmit FIFO depth" group.long 0xC310++0x03 line.long 0x00 "GTXFIFOSIZ4,Global Transmit FIFO Size 4 FIFO Mapping In RAM1" hexmask.long.word 0x00 16.--31. 1. " TXFSTADDR ,Transmit FIFO RAM start address" hexmask.long.word 0x00 0.--15. 1. " TXFDEP ,Transmit FIFO depth" group.long 0xC314++0x03 line.long 0x00 "GTXFIFOSIZ5,Global Transmit FIFO Size 5 FIFO Mapping In RAM1" hexmask.long.word 0x00 16.--31. 1. " TXFSTADDR ,Transmit FIFO RAM start address" hexmask.long.word 0x00 0.--15. 1. " TXFDEP ,Transmit FIFO depth" group.long 0xC380++0x0B line.long 0x00 "GRXFIFOSIZ0,Global Receive FIFO Size 0 FIFO Mapping In RAM0" hexmask.long.word 0x00 16.--31. 1. " RXFSTADDR ,Receive FIFO RAM start address" hexmask.long.word 0x00 0.--15. 1. " RXFDEP ,Receive FIFO depth" line.long 0x04 "GRXFIFOSIZ1,Global Receive FIFO Size 1 FIFO Mapping In RAM0" hexmask.long.word 0x04 16.--31. 1. " RXFSTADDR ,Receive FIFO RAM start address" hexmask.long.word 0x04 0.--15. 1. " RXFDEP ,Receive FIFO depth" line.long 0x08 "GRXFIFOSIZ2,Global Receive FIFO Size 2 FIFO Mapping In RAM0" hexmask.long.word 0x08 16.--31. 1. " RXFSTADDR ,Receive FIFO RAM start address" hexmask.long.word 0x08 0.--15. 1. " RXFDEP ,Receive FIFO depth" group.long 0xC400++0x0F line.long 0x00 "GEVNTADRLO_0,Global Event Buffer Address (Low) Register" line.long 0x04 "GEVNTADRHI_0,Global Event Buffer Address (High) Register" line.long 0x08 "GEVNTSIZ_0,Global Event Buffer Size Register" bitfld.long 0x08 31. " EVNTINTRPTMASK ,Event interrupt mask" "Not masked,Masked" hexmask.long.word 0x08 0.--15. 1. " EVENTSIZ ,Event buffer size" line.long 0x0C "GEVNTCOUNT_0,Global Event Buffer Count Register" hexmask.long.word 0x0C 0.--15. 1. " EVNTCOUNT ,Event count" group.long 0xC410++0x0F line.long 0x00 "GEVNTADRLO_1,Global Event Buffer Address (Low) Register" line.long 0x04 "GEVNTADRHI_1,Global Event Buffer Address (High) Register" line.long 0x08 "GEVNTSIZ_1,Global Event Buffer Size Register" bitfld.long 0x08 31. " EVNTINTRPTMASK ,Event interrupt mask" "Not masked,Masked" hexmask.long.word 0x08 0.--15. 1. " EVENTSIZ ,Event buffer size" line.long 0x0C "GEVNTCOUNT_1,Global Event Buffer Count Register" hexmask.long.word 0x0C 0.--15. 1. " EVNTCOUNT ,Event count" group.long 0xC420++0x0F line.long 0x00 "GEVNTADRLO_2,Global Event Buffer Address (Low) Register" line.long 0x04 "GEVNTADRHI_2,Global Event Buffer Address (High) Register" line.long 0x08 "GEVNTSIZ_2,Global Event Buffer Size Register" bitfld.long 0x08 31. " EVNTINTRPTMASK ,Event interrupt mask" "Not masked,Masked" hexmask.long.word 0x08 0.--15. 1. " EVENTSIZ ,Event buffer size" line.long 0x0C "GEVNTCOUNT_2,Global Event Buffer Count Register" hexmask.long.word 0x0C 0.--15. 1. " EVNTCOUNT ,Event count" group.long 0xC430++0x0F line.long 0x00 "GEVNTADRLO_3,Global Event Buffer Address (Low) Register" line.long 0x04 "GEVNTADRHI_3,Global Event Buffer Address (High) Register" line.long 0x08 "GEVNTSIZ_3,Global Event Buffer Size Register" bitfld.long 0x08 31. " EVNTINTRPTMASK ,Event interrupt mask" "Not masked,Masked" hexmask.long.word 0x08 0.--15. 1. " EVENTSIZ ,Event buffer size" line.long 0x0C "GEVNTCOUNT_3,Global Event Buffer Count Register" hexmask.long.word 0x0C 0.--15. 1. " EVNTCOUNT ,Event count" rgroup.long 0xC600++0x03 line.long 0x00 "GHWPARAMS8,Global Hardware Parameters 8" if (((d.l(ad:0xFE200000+0xC118))&0x01)==0x00) group.long 0xC610++0x03 line.long 0x00 "GTXFIFOPRIDEV,Global Device TX FIFO DMA Priority Register" bitfld.long 0x00 5. " GTXFIFOPRIDEV_[5] ,Device TXFIFO priority 5" "Low,High" bitfld.long 0x00 4. " [4] ,Device TXFIFO priority 4" "Low,High" bitfld.long 0x00 3. " [3] ,Device TXFIFO priority 3" "Low,High" bitfld.long 0x00 2. " [2] ,Device TXFIFO priority 2" "Low,High" bitfld.long 0x00 1. " [1] ,Device TXFIFO priority 1" "Low,High" bitfld.long 0x00 0. " [0] ,Device TXFIFO priority 0" "Low,High" else hgroup.long 0xC610++0x03 hide.long 0x00 "GTXFIFOPRIDEV,Global Device TX FIFO DMA Priority Register" endif if (((d.l(ad:0xFE200000+0xC118))&0x01)==0x01) group.long 0xC618++0x0F line.long 0x00 "GTXFIFOPRIHST,Global Host TX FIFO DMA Priority Register" bitfld.long 0x00 3. " GTXFIFOPRIHST_[3] ,Host TX FIFO priority" "Low,High" bitfld.long 0x00 2. " [2] ,Host TX FIFO priority" "Low,High" bitfld.long 0x00 1. " [1] ,Host TX FIFO priority" "Low,High" bitfld.long 0x00 0. " [0] ,Host TX FIFO priority" "Low,High" line.long 0x04 "GRXFIFOPRIHST,Global Host RX FIFO DMA Priority Register" bitfld.long 0x04 2. " GRXFIFOPRIHST_[2] ,Host RX FIFO priority" "Low,High" bitfld.long 0x04 1. " [1] ,Host RX FIFO priority" "Low,High" bitfld.long 0x04 0. " [0] ,Host RX FIFO priority" "Low,High" textline " " line.long 0x08 "GFIFOPRIDBC,Global Host Debug Capability DMA Priority Register" bitfld.long 0x08 0.--1. " GFIFOPRIDBC ,Host dbc DMA priority" ",Normal,Low,High" line.long 0x0C "GDMAHLRATIO,Global Host FIFO DMA High-Low Priority Ratio Register" bitfld.long 0x0C 8.--12. " HSTRXFIFO ,Host RXFIFO DMA High-Low priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0C 0.--4. " HSTTXFIFO ,Host TXFIFO DMA High-Low priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else hgroup.long 0xC618++0x0F hide.long 0x00 "GTXFIFOPRIHST,Global Host TX FIFO DMA Priority Register" hide.long 0x04 "GRXFIFOPRIHST,Global Host RX FIFO DMA Priority Register" textline " " hide.long 0x08 "GFIFOPRIDBC,Global Host Debug Capability DMA Priority Register" hide.long 0x0C "GDMAHLRATIO,Global Host FIFO DMA High-Low Priority Ratio Register" endif group.long 0xC630++0x03 line.long 0x00 "GFLADJ,Global Frame Length Adjustment Register" bitfld.long 0x00 31. " REFCLK_DECR_PLS1 ,Fractional component of 240/REF_FREQUENCY is greater than or equal to 0.5" "Below,>=0.5" hexmask.long.byte 0x00 24.--30. 1. " REFCLK_240MHZ_DECR ,Decrement value that the controller applies for each REF_CLK" bitfld.long 0x00 23. " REFCLK_LPM_SEL ,Enable the functionality of running SOF/ITP counters on the REF_CLK" "Disabled,Enabled" hexmask.long.word 0x00 8.--21. 1. " REFCLK_FLADJ ,Frame length adjustment" textline " " bitfld.long 0x00 7. " 30MHZ_SDBND_SEL ,Selects whether to use the input signal FLADJ_30MHZ_REG or the GFLADJ" "FLADJ_30MHZ_REG,GFLADJ_30MHZ" bitfld.long 0x00 0.--5. " 30MHZ ,Frame length adjustment" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" if (((d.l(ad:0xFE200000+0xC118))&0x01)==0x01)&&(((d.l(ad:0xFE200000+0x930))&0x80000000)==0x80000000) group.long 0xC700++0x03 "Device Registers" line.long 0x00 "DCFG,Device Configuration Register" bitfld.long 0x00 23. " IGNSTRMPP ,Ignore stream PP" "Not ignored,Ignored" bitfld.long 0x00 22. " LPMCAP ,LPM capable enable" "Disabled,Enabled" bitfld.long 0x00 17.--21. " NUMP ,Number of receive buffers" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 12.--16. " INTRNUM ,Interrupt/eventq number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " hexmask.long.word 0x00 3.--9. 0x08 " DEVADDR ,Device address" bitfld.long 0x00 0.--2. " DEVSPD ,Device speed" "High-speed,Full-speed,,,Superspeed,?..." else group.long 0xC700++0x03 "Device Registers" line.long 0x00 "DCFG,Device Configuration Register" bitfld.long 0x00 23. " IGNSTRMPP ,Ignore stream PP" "Not ignored,Ignored" bitfld.long 0x00 22. " LPMCAP ,LPM capable enable" "Disabled,Enabled" textfld " " bitfld.long 0x00 12.--16. " INTRNUM ,Interrupt/eventq number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " hexmask.long.word 0x00 3.--9. 0x08 " DEVADDR ,Device address" bitfld.long 0x00 0.--2. " DEVSPD ,Device speed" "High-speed,Full-speed,,,Superspeed,?..." endif group.long 0xC704++0x07 line.long 0x00 "DCTL,Device Control Register" bitfld.long 0x00 31. " RUNSTOP ,Stop/run" "Stopped,Started" bitfld.long 0x00 30. " CSFTRST ,Core soft reset" "No reset,Reset" bitfld.long 0x00 28. " HIRDTHRES_4 ,Host-initiated resume duration (Hird) threshold assertion enable" "Disabled,Enabled" bitfld.long 0x00 24.--27. " HIRDTHRES_TIME ,HIRD threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 20.--23. " LPM_NYET_THR ,LPM NYET threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 19. " KEEPCONNECT ,Enable save and restore programming model by preventing the core from disconnecting from the host" "Disabled,Enabled" bitfld.long 0x00 18. " L1HIBERNATIONEN ,L1 hibernation enable" "Disabled,Enabled" bitfld.long 0x00 17. " CRS ,Controller restore state" "Not restored,Restored" textline " " bitfld.long 0x00 16. " CSS ,Controller save state" "Not saved,Saved" bitfld.long 0x00 12. " INITU2ENA ,Initiate U2 enable" "Disabled,Enabled" bitfld.long 0x00 11. " ACCEPTU2ENA ,Accept U2 enable" "Disabled,Enabled" bitfld.long 0x00 10. " INITU1ENA ,Initiate U1 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " ACCEPTU1ENA ,Accept U1 enable" "Disabled,Enabled" bitfld.long 0x00 5.--8. " ULSTCHNGREQ ,Usb/link state change request" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 1.--4. " TSTCTL ,Test control" "Disabled,J_mode,K_mode,Se0_nak_mode,Packet_mode,Force_enable_mode,?..." line.long 0x04 "DEVTEN,Device Event Enable Register" bitfld.long 0x04 12. " VENDEVTSTRCVDEN ,Vendor device test LMP received event enable" "Disabled,Enabled" bitfld.long 0x04 9. " ERRTICERREVTEN ,Erratic error event enable" "Disabled,Enabled" bitfld.long 0x04 7. " SOFTEVTEN ,Start of (U)frame enable" "Disabled,Enabled" bitfld.long 0x04 6. " U3L2L1SUSPEN ,U3/L2-L1 suspend event enable" "Disabled,Enabled" textline " " bitfld.long 0x04 5. " HIBERNREQEVTEN ,Enables the generation of the hibernation request event" "Disabled,Enabled" bitfld.long 0x04 4. " WKUPEVTEN ,Resume/remote wakeup detected event enable" "Disabled,Enabled" bitfld.long 0x04 3. " ULSTCNGEN ,Usb/link state change event enable" "Disabled,Enabled" bitfld.long 0x04 2. " CONNECTDONEEVTEN ,Connection done enable" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " USBRSTEVTEN ,USB reset enable" "Disabled,Enabled" bitfld.long 0x04 0. " DISSCONNEVTEN ,Disconnect detected event enable" "Disabled,Enabled" if (((d.l(ad:0xFE200000+0xC70C))&0x07)==0x04) if (((d.l(ad:0xFE200000+0xC144))&0x3000000)==0x2000000)&&(((d.l(ad:0xFE200000+0xC110))&0x02)==0x02) rgroup.long 0xC70C++0x03 line.long 0x00 "DSTS,Device Status Register" bitfld.long 0x00 29. " DCNRD ,Device controller not ready" "Ready,Not ready" textline " " bitfld.long 0x00 25. " RSS ,RSS restore state status" "Restored,Not restored" bitfld.long 0x00 24. " SSS ,SSS save state status" "Saved,Not saved" bitfld.long 0x00 23. " COREIDLE ,Core idle status" "Not idle,Idle" bitfld.long 0x00 22. " DEVCTRLHLT ,Device controller halted" "Not halted,Halted" textline " " bitfld.long 0x00 18.--21. " USBLNKST ,Usb/link state" "U0,U1,U2,U3,,RX_DET,SS_INACT,POLL,RECOV,HRESET,CMPLY,LPBK,,,,Resume/Reset" bitfld.long 0x00 17. " RXFIFOEMPTY ,RX FIFO empty" "Not empty,Empty" hexmask.long.word 0x00 3.--16. 1. " SOFFN ,Frame/microframe number of the received SOF" bitfld.long 0x00 0.--2. " CONNECTSPD ,Connection speed" "High-speed,Full-speed,Low-speed,Full-speed,Superspeed,?..." else rgroup.long 0xC70C++0x03 line.long 0x00 "DSTS,Device Status Register" textline " " bitfld.long 0x00 25. " RSS ,RSS restore state status" "Restored,Not restored" bitfld.long 0x00 24. " SSS ,SSS save state status" "Saved,Not saved" bitfld.long 0x00 23. " COREIDLE ,Core idle status" "Not idle,Idle" bitfld.long 0x00 22. " DEVCTRLHLT ,Device controller halted" "Not halted,Halted" textline " " bitfld.long 0x00 18.--21. " USBLNKST ,Usb/link state" "U0,U1,U2,U3,,RX_DET,SS_INACT,POLL,RECOV,HRESET,CMPLY,LPBK,,,,Resume/Reset" bitfld.long 0x00 17. " RXFIFOEMPTY ,RX FIFO empty" "Not empty,Empty" hexmask.long.word 0x00 3.--16. 1. " SOFFN ,Frame/microframe number of the received SOF" bitfld.long 0x00 0.--2. " CONNECTSPD ,Connection speed" "High-speed,Full-speed,Low-speed,Full-speed,Superspeed,?..." endif else if (((d.l(ad:0xFE200000+0xC144))&0x3000000)==0x2000000)&&(((d.l(ad:0xFE200000+0xC110))&0x02)==0x02) rgroup.long 0xC70C++0x03 line.long 0x00 "DSTS,Device Status Register" bitfld.long 0x00 29. " DCNRD ,Device controller not ready" "Ready,Not ready" textline " " bitfld.long 0x00 25. " RSS ,RSS restore state status" "Restored,Not restored" bitfld.long 0x00 24. " SSS ,SSS save state status" "Saved,Not saved" bitfld.long 0x00 23. " COREIDLE ,Core idle status" "Not idle,Idle" bitfld.long 0x00 22. " DEVCTRLHLT ,Device controller halted" "Not halted,Halted" textline " " bitfld.long 0x00 18.--21. " USBLNKST ,Usb/link state" "On,,Sleep,Suspend,Disconnected,,,,,,,,,,Reset,Resume" bitfld.long 0x00 17. " RXFIFOEMPTY ,RX FIFO empty" "Not empty,Empty" hexmask.long.word 0x00 3.--16. 1. " SOFFN ,Frame/microframe number of the received SOF" bitfld.long 0x00 0.--2. " CONNECTSPD ,Connection speed" "High-speed,Full-speed,Low-speed,Full-speed,Superspeed,?..." elif (((d.l(ad:0xFE200000+0xC144))&0x3000000)!=0x2000000)&&(((d.l(ad:0xFE200000+0xC110))&0x02)==0x02) rgroup.long 0xC70C++0x03 line.long 0x00 "DSTS,Device Status Register" textline " " bitfld.long 0x00 25. " RSS ,RSS restore state status" "Restored,Not restored" bitfld.long 0x00 24. " SSS ,SSS save state status" "Saved,Not saved" bitfld.long 0x00 23. " COREIDLE ,Core idle status" "Not idle,Idle" bitfld.long 0x00 22. " DEVCTRLHLT ,Device controller halted" "Not halted,Halted" textline " " bitfld.long 0x00 18.--21. " USBLNKST ,Usb/link state" "On,,Sleep,Suspend,Disconnected,,,,,,,,,,Reset,Resume" bitfld.long 0x00 17. " RXFIFOEMPTY ,RX FIFO empty" "Not empty,Empty" hexmask.long.word 0x00 3.--16. 1. " SOFFN ,Frame/microframe number of the received SOF" bitfld.long 0x00 0.--2. " CONNECTSPD ,Connection speed" "High-speed,Full-speed,Low-speed,Full-speed,Superspeed,?..." else rgroup.long 0xC70C++0x03 line.long 0x00 "DSTS,Device Status Register" textline " " bitfld.long 0x00 25. " RSS ,RSS restore state status" "Restored,Not restored" bitfld.long 0x00 24. " SSS ,SSS save state status" "Saved,Not saved" bitfld.long 0x00 23. " COREIDLE ,Core idle status" "Not idle,Idle" bitfld.long 0x00 22. " DEVCTRLHLT ,Device controller halted" "Not halted,Halted" textline " " bitfld.long 0x00 18.--21. " USBLNKST ,Usb/link state" "On,,Sleep,Suspend,Disconnected,Early suspend,?..." bitfld.long 0x00 17. " RXFIFOEMPTY ,RX FIFO empty" "Not empty,Empty" hexmask.long.word 0x00 3.--16. 1. " SOFFN ,Frame/microframe number of the received SOF" bitfld.long 0x00 0.--2. " CONNECTSPD ,Connection speed" "High-speed,Full-speed,Low-speed,Full-speed,Superspeed,?..." endif endif group.long 0xC710++0x07 line.long 0x00 "DGCMDPAR,Device Generic Command Parameter Register" line.long 0x04 "DGCMD,Device Generic Command Register" rbitfld.long 0x04 12.--15. " CMDSTATUS ,Command status" "Success,Error,?..." bitfld.long 0x04 10. " CMDACT ,Command active" "Not active,Ongoing" bitfld.long 0x04 8. " CMDIOC ,Command interrupt on complete" "Disabled,Enabled" hexmask.long.byte 0x04 0.--7. 1. " CMDTYP ,Command type" textline " " group.long 0xC720++0x03 line.long 0x00 "DALEPENA,Device Active USB Endpoint Enable Register" bitfld.long 0x00 31. " USBACTEP[15_IN] ,USB activate endpoint 15 IN" "Disabled,Enabled" bitfld.long 0x00 30. " [15_OUT] ,USB activate endpoint 15 OUT" "Disabled,Enabled" bitfld.long 0x00 29. " [14_IN] ,USB activate endpoint 14 IN" "Disabled,Enabled" bitfld.long 0x00 28. " [14_OUT] ,USB activate endpoint 14 OUT" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " [13_IN] ,USB activate endpoint 13 IN" "Disabled,Enabled" bitfld.long 0x00 26. " [13_OUT] ,USB activate endpoint 13 OUT" "Disabled,Enabled" bitfld.long 0x00 25. " [12_IN] ,USB activate endpoint 12 IN" "Disabled,Enabled" bitfld.long 0x00 24. " [12_OUT] ,USB activate endpoint 12 OUT" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " [11_IN] ,USB activate endpoint 11 IN" "Disabled,Enabled" bitfld.long 0x00 22. " [11_OUT] ,USB activate endpoint 11 OUT" "Disabled,Enabled" bitfld.long 0x00 21. " [10_IN] ,USB activate endpoint 10 IN" "Disabled,Enabled" bitfld.long 0x00 20. " [10_OUT] ,USB activate endpoint 10 OUT" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " [9_IN] ,USB activate endpoint 9 IN" "Disabled,Enabled" bitfld.long 0x00 18. " [9_OUT] ,USB activate endpoint 9 OUT" "Disabled,Enabled" bitfld.long 0x00 17. " [8_IN] ,USB activate endpoint 8 IN" "Disabled,Enabled" bitfld.long 0x00 16. " [8_OUT] ,USB activate endpoint 8 OUT" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " [7_IN] ,USB activate endpoint 7 IN" "Disabled,Enabled" bitfld.long 0x00 14. " [7_OUT] ,USB activate endpoint 7 OUT" "Disabled,Enabled" bitfld.long 0x00 13. " [6_IN] ,USB activate endpoint 6 IN" "Disabled,Enabled" bitfld.long 0x00 12. " [6_OUT] ,USB activate endpoint 6 OUT" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " [5_IN] ,USB activate endpoint 5 IN" "Disabled,Enabled" bitfld.long 0x00 10. " [5_OUT] ,USB activate endpoint 5 OUT" "Disabled,Enabled" bitfld.long 0x00 9. " [4_IN] ,USB activate endpoint 4 IN" "Disabled,Enabled" bitfld.long 0x00 8. " [4_OUT] ,USB activate endpoint 4 OUT" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " [3_IN] ,USB activate endpoint 3 IN" "Disabled,Enabled" bitfld.long 0x00 6. " [3_OUT] ,USB activate endpoint 3 OUT" "Disabled,Enabled" bitfld.long 0x00 5. " [2_IN] ,USB activate endpoint 2 IN" "Disabled,Enabled" bitfld.long 0x00 4. " [2_OUT] ,USB activate endpoint 2 OUT" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " [1_IN] ,USB activate endpoint 1 IN" "Disabled,Enabled" bitfld.long 0x00 2. " [1_OUT] ,USB activate endpoint 1 OUT" "Disabled,Enabled" bitfld.long 0x00 1. " [0_IN] ,USB activate endpoint 0 IN (Control)" "Disabled,Enabled" bitfld.long 0x00 0. " [0_OUT] ,USB activate endpoint 0 OUT (Control)" "Disabled,Enabled" width 15. tree "Device Physical Endpoint Command Registers" group.long 0xC800++0x0B line.long 0x00 "DEPCMDPAR2_0,Device Physical Endpoint-0 Command Parameter 2 Register" line.long 0x04 "DEPCMDPAR1_0,Device Physical Endpoint-0 Command Parameter 1 Register" line.long 0x08 "DEPCMDPAR0_0,Device Physical Endpoint-0 Command Parameter 0 Register" if (((d.l(ad:0xFE200000+0xC800+0x0C))&0x0F)==(0x06||0x08||0x05)) group.long (0xC800+0x0C)++0x03 line.long 0x00 "DEPCMD_0,Device Physical Endpoint-0 Command" hexmask.long.word 0x00 16.--31. 1. " COMMANDPARAM ,Command parameters" bitfld.long 0x00 12.--15. " CMDSTATUS ,Command completion status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. " HIPRI_FORCERM ,Highpriority/forcerm" "No effect,Clear" textline " " bitfld.long 0x00 10. " CMDACT ,Command active" "Disabled,Enabled" bitfld.long 0x00 8. " CMDIOC ,Command interrupt on complete" "Disabled,Enabled" bitfld.long 0x00 0.--3. " CMDTYP ,Command type" ",Endpoint conf.,Transfer resource,Get endpoint state,Set stall,Clear stall,Start transfer,Update transfer,End transfer,Start new config.,?..." else group.long (0xC800+0x0C)++0x03 line.long 0x00 "DEPCMD_0,Device Physical Endpoint-0 Command" hexmask.long.word 0x00 16.--31. 1. " COMMANDPARAM ,Command parameters" bitfld.long 0x00 12.--15. " CMDSTATUS ,Command completion status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10. " CMDACT ,Command active" "Disabled,Enabled" bitfld.long 0x00 8. " CMDIOC ,Command interrupt on complete" "Disabled,Enabled" bitfld.long 0x00 0.--3. " CMDTYP ,Command type" ",Endpoint conf.,Transfer resource,Get endpoint state,Set stall,Clear stall,Start transfer,Update transfer,End transfer,Start new config.,?..." endif group.long 0xC810++0x0B line.long 0x00 "DEPCMDPAR2_1,Device Physical Endpoint-1 Command Parameter 2 Register" line.long 0x04 "DEPCMDPAR1_1,Device Physical Endpoint-1 Command Parameter 1 Register" line.long 0x08 "DEPCMDPAR0_1,Device Physical Endpoint-1 Command Parameter 0 Register" if (((d.l(ad:0xFE200000+0xC810+0x0C))&0x0F)==(0x06||0x08||0x05)) group.long (0xC810+0x0C)++0x03 line.long 0x00 "DEPCMD_1,Device Physical Endpoint-1 Command" hexmask.long.word 0x00 16.--31. 1. " COMMANDPARAM ,Command parameters" bitfld.long 0x00 12.--15. " CMDSTATUS ,Command completion status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. " HIPRI_FORCERM ,Highpriority/forcerm" "No effect,Clear" textline " " bitfld.long 0x00 10. " CMDACT ,Command active" "Disabled,Enabled" bitfld.long 0x00 8. " CMDIOC ,Command interrupt on complete" "Disabled,Enabled" bitfld.long 0x00 0.--3. " CMDTYP ,Command type" ",Endpoint conf.,Transfer resource,Get endpoint state,Set stall,Clear stall,Start transfer,Update transfer,End transfer,Start new config.,?..." else group.long (0xC810+0x0C)++0x03 line.long 0x00 "DEPCMD_1,Device Physical Endpoint-1 Command" hexmask.long.word 0x00 16.--31. 1. " COMMANDPARAM ,Command parameters" bitfld.long 0x00 12.--15. " CMDSTATUS ,Command completion status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10. " CMDACT ,Command active" "Disabled,Enabled" bitfld.long 0x00 8. " CMDIOC ,Command interrupt on complete" "Disabled,Enabled" bitfld.long 0x00 0.--3. " CMDTYP ,Command type" ",Endpoint conf.,Transfer resource,Get endpoint state,Set stall,Clear stall,Start transfer,Update transfer,End transfer,Start new config.,?..." endif group.long 0xC820++0x0B line.long 0x00 "DEPCMDPAR2_2,Device Physical Endpoint-2 Command Parameter 2 Register" line.long 0x04 "DEPCMDPAR1_2,Device Physical Endpoint-2 Command Parameter 1 Register" line.long 0x08 "DEPCMDPAR0_2,Device Physical Endpoint-2 Command Parameter 0 Register" if (((d.l(ad:0xFE200000+0xC820+0x0C))&0x0F)==(0x06||0x08||0x05)) group.long (0xC820+0x0C)++0x03 line.long 0x00 "DEPCMD_2,Device Physical Endpoint-2 Command" hexmask.long.word 0x00 16.--31. 1. " COMMANDPARAM ,Command parameters" bitfld.long 0x00 12.--15. " CMDSTATUS ,Command completion status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. " HIPRI_FORCERM ,Highpriority/forcerm" "No effect,Clear" textline " " bitfld.long 0x00 10. " CMDACT ,Command active" "Disabled,Enabled" bitfld.long 0x00 8. " CMDIOC ,Command interrupt on complete" "Disabled,Enabled" bitfld.long 0x00 0.--3. " CMDTYP ,Command type" ",Endpoint conf.,Transfer resource,Get endpoint state,Set stall,Clear stall,Start transfer,Update transfer,End transfer,Start new config.,?..." else group.long (0xC820+0x0C)++0x03 line.long 0x00 "DEPCMD_2,Device Physical Endpoint-2 Command" hexmask.long.word 0x00 16.--31. 1. " COMMANDPARAM ,Command parameters" bitfld.long 0x00 12.--15. " CMDSTATUS ,Command completion status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10. " CMDACT ,Command active" "Disabled,Enabled" bitfld.long 0x00 8. " CMDIOC ,Command interrupt on complete" "Disabled,Enabled" bitfld.long 0x00 0.--3. " CMDTYP ,Command type" ",Endpoint conf.,Transfer resource,Get endpoint state,Set stall,Clear stall,Start transfer,Update transfer,End transfer,Start new config.,?..." endif group.long 0xC830++0x0B line.long 0x00 "DEPCMDPAR2_3,Device Physical Endpoint-3 Command Parameter 2 Register" line.long 0x04 "DEPCMDPAR1_3,Device Physical Endpoint-3 Command Parameter 1 Register" line.long 0x08 "DEPCMDPAR0_3,Device Physical Endpoint-3 Command Parameter 0 Register" if (((d.l(ad:0xFE200000+0xC830+0x0C))&0x0F)==(0x06||0x08||0x05)) group.long (0xC830+0x0C)++0x03 line.long 0x00 "DEPCMD_3,Device Physical Endpoint-3 Command" hexmask.long.word 0x00 16.--31. 1. " COMMANDPARAM ,Command parameters" bitfld.long 0x00 12.--15. " CMDSTATUS ,Command completion status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. " HIPRI_FORCERM ,Highpriority/forcerm" "No effect,Clear" textline " " bitfld.long 0x00 10. " CMDACT ,Command active" "Disabled,Enabled" bitfld.long 0x00 8. " CMDIOC ,Command interrupt on complete" "Disabled,Enabled" bitfld.long 0x00 0.--3. " CMDTYP ,Command type" ",Endpoint conf.,Transfer resource,Get endpoint state,Set stall,Clear stall,Start transfer,Update transfer,End transfer,Start new config.,?..." else group.long (0xC830+0x0C)++0x03 line.long 0x00 "DEPCMD_3,Device Physical Endpoint-3 Command" hexmask.long.word 0x00 16.--31. 1. " COMMANDPARAM ,Command parameters" bitfld.long 0x00 12.--15. " CMDSTATUS ,Command completion status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10. " CMDACT ,Command active" "Disabled,Enabled" bitfld.long 0x00 8. " CMDIOC ,Command interrupt on complete" "Disabled,Enabled" bitfld.long 0x00 0.--3. " CMDTYP ,Command type" ",Endpoint conf.,Transfer resource,Get endpoint state,Set stall,Clear stall,Start transfer,Update transfer,End transfer,Start new config.,?..." endif group.long 0xC840++0x0B line.long 0x00 "DEPCMDPAR2_4,Device Physical Endpoint-4 Command Parameter 2 Register" line.long 0x04 "DEPCMDPAR1_4,Device Physical Endpoint-4 Command Parameter 1 Register" line.long 0x08 "DEPCMDPAR0_4,Device Physical Endpoint-4 Command Parameter 0 Register" if (((d.l(ad:0xFE200000+0xC840+0x0C))&0x0F)==(0x06||0x08||0x05)) group.long (0xC840+0x0C)++0x03 line.long 0x00 "DEPCMD_4,Device Physical Endpoint-4 Command" hexmask.long.word 0x00 16.--31. 1. " COMMANDPARAM ,Command parameters" bitfld.long 0x00 12.--15. " CMDSTATUS ,Command completion status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. " HIPRI_FORCERM ,Highpriority/forcerm" "No effect,Clear" textline " " bitfld.long 0x00 10. " CMDACT ,Command active" "Disabled,Enabled" bitfld.long 0x00 8. " CMDIOC ,Command interrupt on complete" "Disabled,Enabled" bitfld.long 0x00 0.--3. " CMDTYP ,Command type" ",Endpoint conf.,Transfer resource,Get endpoint state,Set stall,Clear stall,Start transfer,Update transfer,End transfer,Start new config.,?..." else group.long (0xC840+0x0C)++0x03 line.long 0x00 "DEPCMD_4,Device Physical Endpoint-4 Command" hexmask.long.word 0x00 16.--31. 1. " COMMANDPARAM ,Command parameters" bitfld.long 0x00 12.--15. " CMDSTATUS ,Command completion status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10. " CMDACT ,Command active" "Disabled,Enabled" bitfld.long 0x00 8. " CMDIOC ,Command interrupt on complete" "Disabled,Enabled" bitfld.long 0x00 0.--3. " CMDTYP ,Command type" ",Endpoint conf.,Transfer resource,Get endpoint state,Set stall,Clear stall,Start transfer,Update transfer,End transfer,Start new config.,?..." endif group.long 0xC850++0x0B line.long 0x00 "DEPCMDPAR2_5,Device Physical Endpoint-5 Command Parameter 2 Register" line.long 0x04 "DEPCMDPAR1_5,Device Physical Endpoint-5 Command Parameter 1 Register" line.long 0x08 "DEPCMDPAR0_5,Device Physical Endpoint-5 Command Parameter 0 Register" if (((d.l(ad:0xFE200000+0xC850+0x0C))&0x0F)==(0x06||0x08||0x05)) group.long (0xC850+0x0C)++0x03 line.long 0x00 "DEPCMD_5,Device Physical Endpoint-5 Command" hexmask.long.word 0x00 16.--31. 1. " COMMANDPARAM ,Command parameters" bitfld.long 0x00 12.--15. " CMDSTATUS ,Command completion status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. " HIPRI_FORCERM ,Highpriority/forcerm" "No effect,Clear" textline " " bitfld.long 0x00 10. " CMDACT ,Command active" "Disabled,Enabled" bitfld.long 0x00 8. " CMDIOC ,Command interrupt on complete" "Disabled,Enabled" bitfld.long 0x00 0.--3. " CMDTYP ,Command type" ",Endpoint conf.,Transfer resource,Get endpoint state,Set stall,Clear stall,Start transfer,Update transfer,End transfer,Start new config.,?..." else group.long (0xC850+0x0C)++0x03 line.long 0x00 "DEPCMD_5,Device Physical Endpoint-5 Command" hexmask.long.word 0x00 16.--31. 1. " COMMANDPARAM ,Command parameters" bitfld.long 0x00 12.--15. " CMDSTATUS ,Command completion status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10. " CMDACT ,Command active" "Disabled,Enabled" bitfld.long 0x00 8. " CMDIOC ,Command interrupt on complete" "Disabled,Enabled" bitfld.long 0x00 0.--3. " CMDTYP ,Command type" ",Endpoint conf.,Transfer resource,Get endpoint state,Set stall,Clear stall,Start transfer,Update transfer,End transfer,Start new config.,?..." endif group.long 0xC860++0x0B line.long 0x00 "DEPCMDPAR2_6,Device Physical Endpoint-6 Command Parameter 2 Register" line.long 0x04 "DEPCMDPAR1_6,Device Physical Endpoint-6 Command Parameter 1 Register" line.long 0x08 "DEPCMDPAR0_6,Device Physical Endpoint-6 Command Parameter 0 Register" if (((d.l(ad:0xFE200000+0xC860+0x0C))&0x0F)==(0x06||0x08||0x05)) group.long (0xC860+0x0C)++0x03 line.long 0x00 "DEPCMD_6,Device Physical Endpoint-6 Command" hexmask.long.word 0x00 16.--31. 1. " COMMANDPARAM ,Command parameters" bitfld.long 0x00 12.--15. " CMDSTATUS ,Command completion status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. " HIPRI_FORCERM ,Highpriority/forcerm" "No effect,Clear" textline " " bitfld.long 0x00 10. " CMDACT ,Command active" "Disabled,Enabled" bitfld.long 0x00 8. " CMDIOC ,Command interrupt on complete" "Disabled,Enabled" bitfld.long 0x00 0.--3. " CMDTYP ,Command type" ",Endpoint conf.,Transfer resource,Get endpoint state,Set stall,Clear stall,Start transfer,Update transfer,End transfer,Start new config.,?..." else group.long (0xC860+0x0C)++0x03 line.long 0x00 "DEPCMD_6,Device Physical Endpoint-6 Command" hexmask.long.word 0x00 16.--31. 1. " COMMANDPARAM ,Command parameters" bitfld.long 0x00 12.--15. " CMDSTATUS ,Command completion status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10. " CMDACT ,Command active" "Disabled,Enabled" bitfld.long 0x00 8. " CMDIOC ,Command interrupt on complete" "Disabled,Enabled" bitfld.long 0x00 0.--3. " CMDTYP ,Command type" ",Endpoint conf.,Transfer resource,Get endpoint state,Set stall,Clear stall,Start transfer,Update transfer,End transfer,Start new config.,?..." endif group.long 0xC870++0x0B line.long 0x00 "DEPCMDPAR2_7,Device Physical Endpoint-7 Command Parameter 2 Register" line.long 0x04 "DEPCMDPAR1_7,Device Physical Endpoint-7 Command Parameter 1 Register" line.long 0x08 "DEPCMDPAR0_7,Device Physical Endpoint-7 Command Parameter 0 Register" if (((d.l(ad:0xFE200000+0xC870+0x0C))&0x0F)==(0x06||0x08||0x05)) group.long (0xC870+0x0C)++0x03 line.long 0x00 "DEPCMD_7,Device Physical Endpoint-7 Command" hexmask.long.word 0x00 16.--31. 1. " COMMANDPARAM ,Command parameters" bitfld.long 0x00 12.--15. " CMDSTATUS ,Command completion status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. " HIPRI_FORCERM ,Highpriority/forcerm" "No effect,Clear" textline " " bitfld.long 0x00 10. " CMDACT ,Command active" "Disabled,Enabled" bitfld.long 0x00 8. " CMDIOC ,Command interrupt on complete" "Disabled,Enabled" bitfld.long 0x00 0.--3. " CMDTYP ,Command type" ",Endpoint conf.,Transfer resource,Get endpoint state,Set stall,Clear stall,Start transfer,Update transfer,End transfer,Start new config.,?..." else group.long (0xC870+0x0C)++0x03 line.long 0x00 "DEPCMD_7,Device Physical Endpoint-7 Command" hexmask.long.word 0x00 16.--31. 1. " COMMANDPARAM ,Command parameters" bitfld.long 0x00 12.--15. " CMDSTATUS ,Command completion status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10. " CMDACT ,Command active" "Disabled,Enabled" bitfld.long 0x00 8. " CMDIOC ,Command interrupt on complete" "Disabled,Enabled" bitfld.long 0x00 0.--3. " CMDTYP ,Command type" ",Endpoint conf.,Transfer resource,Get endpoint state,Set stall,Clear stall,Start transfer,Update transfer,End transfer,Start new config.,?..." endif group.long 0xC880++0x0B line.long 0x00 "DEPCMDPAR2_8,Device Physical Endpoint-8 Command Parameter 2 Register" line.long 0x04 "DEPCMDPAR1_8,Device Physical Endpoint-8 Command Parameter 1 Register" line.long 0x08 "DEPCMDPAR0_8,Device Physical Endpoint-8 Command Parameter 0 Register" if (((d.l(ad:0xFE200000+0xC880+0x0C))&0x0F)==(0x06||0x08||0x05)) group.long (0xC880+0x0C)++0x03 line.long 0x00 "DEPCMD_8,Device Physical Endpoint-8 Command" hexmask.long.word 0x00 16.--31. 1. " COMMANDPARAM ,Command parameters" bitfld.long 0x00 12.--15. " CMDSTATUS ,Command completion status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. " HIPRI_FORCERM ,Highpriority/forcerm" "No effect,Clear" textline " " bitfld.long 0x00 10. " CMDACT ,Command active" "Disabled,Enabled" bitfld.long 0x00 8. " CMDIOC ,Command interrupt on complete" "Disabled,Enabled" bitfld.long 0x00 0.--3. " CMDTYP ,Command type" ",Endpoint conf.,Transfer resource,Get endpoint state,Set stall,Clear stall,Start transfer,Update transfer,End transfer,Start new config.,?..." else group.long (0xC880+0x0C)++0x03 line.long 0x00 "DEPCMD_8,Device Physical Endpoint-8 Command" hexmask.long.word 0x00 16.--31. 1. " COMMANDPARAM ,Command parameters" bitfld.long 0x00 12.--15. " CMDSTATUS ,Command completion status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10. " CMDACT ,Command active" "Disabled,Enabled" bitfld.long 0x00 8. " CMDIOC ,Command interrupt on complete" "Disabled,Enabled" bitfld.long 0x00 0.--3. " CMDTYP ,Command type" ",Endpoint conf.,Transfer resource,Get endpoint state,Set stall,Clear stall,Start transfer,Update transfer,End transfer,Start new config.,?..." endif group.long 0xC890++0x0B line.long 0x00 "DEPCMDPAR2_9,Device Physical Endpoint-9 Command Parameter 2 Register" line.long 0x04 "DEPCMDPAR1_9,Device Physical Endpoint-9 Command Parameter 1 Register" line.long 0x08 "DEPCMDPAR0_9,Device Physical Endpoint-9 Command Parameter 0 Register" if (((d.l(ad:0xFE200000+0xC890+0x0C))&0x0F)==(0x06||0x08||0x05)) group.long (0xC890+0x0C)++0x03 line.long 0x00 "DEPCMD_9,Device Physical Endpoint-9 Command" hexmask.long.word 0x00 16.--31. 1. " COMMANDPARAM ,Command parameters" bitfld.long 0x00 12.--15. " CMDSTATUS ,Command completion status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. " HIPRI_FORCERM ,Highpriority/forcerm" "No effect,Clear" textline " " bitfld.long 0x00 10. " CMDACT ,Command active" "Disabled,Enabled" bitfld.long 0x00 8. " CMDIOC ,Command interrupt on complete" "Disabled,Enabled" bitfld.long 0x00 0.--3. " CMDTYP ,Command type" ",Endpoint conf.,Transfer resource,Get endpoint state,Set stall,Clear stall,Start transfer,Update transfer,End transfer,Start new config.,?..." else group.long (0xC890+0x0C)++0x03 line.long 0x00 "DEPCMD_9,Device Physical Endpoint-9 Command" hexmask.long.word 0x00 16.--31. 1. " COMMANDPARAM ,Command parameters" bitfld.long 0x00 12.--15. " CMDSTATUS ,Command completion status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10. " CMDACT ,Command active" "Disabled,Enabled" bitfld.long 0x00 8. " CMDIOC ,Command interrupt on complete" "Disabled,Enabled" bitfld.long 0x00 0.--3. " CMDTYP ,Command type" ",Endpoint conf.,Transfer resource,Get endpoint state,Set stall,Clear stall,Start transfer,Update transfer,End transfer,Start new config.,?..." endif group.long 0xC8A0++0x0B line.long 0x00 "DEPCMDPAR2_10,Device Physical Endpoint-10 Command Parameter 2 Register" line.long 0x04 "DEPCMDPAR1_10,Device Physical Endpoint-10 Command Parameter 1 Register" line.long 0x08 "DEPCMDPAR0_10,Device Physical Endpoint-10 Command Parameter 0 Register" if (((d.l(ad:0xFE200000+0xC8A0+0x0C))&0x0F)==(0x06||0x08||0x05)) group.long (0xC8A0+0x0C)++0x03 line.long 0x00 "DEPCMD_10,Device Physical Endpoint-10 Command" hexmask.long.word 0x00 16.--31. 1. " COMMANDPARAM ,Command parameters" bitfld.long 0x00 12.--15. " CMDSTATUS ,Command completion status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. " HIPRI_FORCERM ,Highpriority/forcerm" "No effect,Clear" textline " " bitfld.long 0x00 10. " CMDACT ,Command active" "Disabled,Enabled" bitfld.long 0x00 8. " CMDIOC ,Command interrupt on complete" "Disabled,Enabled" bitfld.long 0x00 0.--3. " CMDTYP ,Command type" ",Endpoint conf.,Transfer resource,Get endpoint state,Set stall,Clear stall,Start transfer,Update transfer,End transfer,Start new config.,?..." else group.long (0xC8A0+0x0C)++0x03 line.long 0x00 "DEPCMD_10,Device Physical Endpoint-10 Command" hexmask.long.word 0x00 16.--31. 1. " COMMANDPARAM ,Command parameters" bitfld.long 0x00 12.--15. " CMDSTATUS ,Command completion status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10. " CMDACT ,Command active" "Disabled,Enabled" bitfld.long 0x00 8. " CMDIOC ,Command interrupt on complete" "Disabled,Enabled" bitfld.long 0x00 0.--3. " CMDTYP ,Command type" ",Endpoint conf.,Transfer resource,Get endpoint state,Set stall,Clear stall,Start transfer,Update transfer,End transfer,Start new config.,?..." endif group.long 0xC8B0++0x0B line.long 0x00 "DEPCMDPAR2_11,Device Physical Endpoint-11 Command Parameter 2 Register" line.long 0x04 "DEPCMDPAR1_11,Device Physical Endpoint-11 Command Parameter 1 Register" line.long 0x08 "DEPCMDPAR0_11,Device Physical Endpoint-11 Command Parameter 0 Register" if (((d.l(ad:0xFE200000+0xC8B0+0x0C))&0x0F)==(0x06||0x08||0x05)) group.long (0xC8B0+0x0C)++0x03 line.long 0x00 "DEPCMD_11,Device Physical Endpoint-11 Command" hexmask.long.word 0x00 16.--31. 1. " COMMANDPARAM ,Command parameters" bitfld.long 0x00 12.--15. " CMDSTATUS ,Command completion status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. " HIPRI_FORCERM ,Highpriority/forcerm" "No effect,Clear" textline " " bitfld.long 0x00 10. " CMDACT ,Command active" "Disabled,Enabled" bitfld.long 0x00 8. " CMDIOC ,Command interrupt on complete" "Disabled,Enabled" bitfld.long 0x00 0.--3. " CMDTYP ,Command type" ",Endpoint conf.,Transfer resource,Get endpoint state,Set stall,Clear stall,Start transfer,Update transfer,End transfer,Start new config.,?..." else group.long (0xC8B0+0x0C)++0x03 line.long 0x00 "DEPCMD_11,Device Physical Endpoint-11 Command" hexmask.long.word 0x00 16.--31. 1. " COMMANDPARAM ,Command parameters" bitfld.long 0x00 12.--15. " CMDSTATUS ,Command completion status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10. " CMDACT ,Command active" "Disabled,Enabled" bitfld.long 0x00 8. " CMDIOC ,Command interrupt on complete" "Disabled,Enabled" bitfld.long 0x00 0.--3. " CMDTYP ,Command type" ",Endpoint conf.,Transfer resource,Get endpoint state,Set stall,Clear stall,Start transfer,Update transfer,End transfer,Start new config.,?..." endif tree.end width 16. textline " " group.long 0xCC00++0x07 "OTG And Battery Charger Registers" line.long 0x00 "OCFG,OTG Configuration" bitfld.long 0x00 5. " DISPRTPWRCUTOFF ,OTG disable port power cut off" "No,Yes" bitfld.long 0x00 4. " OTGHIBDISMASK ,OTG hibernation disable mask" "Masked,Not masked" bitfld.long 0x00 3. " OTGSFTRSTMSK ,OTG soft reset mask" "Not masked,Masked" textline " " bitfld.long 0x00 2. " OTG_VERSION ,OTG version" "0,1" bitfld.long 0x00 1. " HNPCAP ,RSP/HNP capability enable" "Disabled,Enabled" bitfld.long 0x00 0. " SRPCAP ,SRP capability enable" "Disabled,Enabled" line.long 0x04 "OCTL,OTG Control Register" bitfld.long 0x04 7. " OTG3_GOERR ,Core's LTSSM error state during OTG 3.0 RSP" "Disabled,Enabled" bitfld.long 0x04 6. " PERIMODE ,Peripheral mode" "Host,Peripheral" bitfld.long 0x04 5. " PRTPWRCTL ,Port power control" "Switched off,Initiated" textline " " bitfld.long 0x04 4. " HNPREQ ,HNP request" "Not requested,Requested" bitfld.long 0x04 3. " SESREQ ,Session request" "Not requested,Requested" bitfld.long 0x04 2. " TERMSELDLPULSE ,Termselect data line pulse" "UTMI_TXVALID,UTMI_TERMSEL" textline " " bitfld.long 0x04 1. " DEVSETHNPEN ,Device set RSP/HNP enable" "Disabled,Enabled" bitfld.long 0x04 0. " HSTSETHNPEN ,Host set RSP/HNP enable" "Disabled,Enabled" if (((d.l(ad:0xFE200000+0xCC08))&0x80000000)==0x00) group.long 0xCC08++0x03 line.long 0x00 "OEVT,OTG Events Register" rbitfld.long 0x00 31. " DEVICEMODE ,Device mode" "A-device,B-device" eventfld.long 0x00 27. " OTGXHCIRUNSTPSETEVNT ,OTG host run stop set event" "Not occurred,Occurred" eventfld.long 0x00 26. " OTGDEVRUNSTPSETEVNT ,OTG device run stop set event" "Not occurred,Occurred" textline " " eventfld.long 0x00 25. " OTGHIBENTRYEVNT ,OTG hibernation entry event" "Not occurred,Occurred" eventfld.long 0x00 24. " OTGCONIDSTSCHNGEVNT ,Connector ID status change event" "Not changed,Changed" eventfld.long 0x00 23. " HRRCONFNOTIFEVNT ,Host role request confirm notifier event" "Not confirmed,Confirmed" textline " " eventfld.long 0x00 22. " HRRINITNOTIFEVNT ,Host role request initiate notifier event" "Not initiated,Initiated" eventfld.long 0x00 21. " OTGADEVIDLEEVNT ,A-Device A-IDLE event set" "Not idle,Idle" eventfld.long 0x00 20. " OTGADEVBHOSTENDEVNT ,A-Device B-Host end event" "Not completed,Completed" textline " " eventfld.long 0x00 19. " OTGADEVHOSTEVNT ,A-Device host event" "Not entered,Entered" eventfld.long 0x00 18. " OTGADEVHNPCHNGEVNT ,A-Device HNP change event" "Not changed,Changed" eventfld.long 0x00 17. " OTGADEVSRPDETEVNT ,SRP detect event set" "Not detected,Detected" textline " " eventfld.long 0x00 16. " OTGADEVSESSENDDETEVNT ,Session end detected event" "Not detected,Detected" rbitfld.long 0x00 3. " BSESVLD ,Device mode transceiver status" "Not valid,Valid" rbitfld.long 0x00 2. " HSTNEGSTS ,Host negotiation status" "Failed,Succeed" textline " " rbitfld.long 0x00 1. " SESREQSTS ,Session request status" "Low,High" eventfld.long 0x00 0. " OEVTERROR ,OTG event error" "No error,Error" group.long 0xCC0C++0x03 line.long 0x00 "OEVTEN,OTG Events Enable Register" bitfld.long 0x00 27. " OTGXHCIRUNSTPSETEVNTEN ,OTG host run stop set event enable" "Disabled,Enabled" bitfld.long 0x00 26. " OTGDEVRUNSTPSETEVNTEN ,OTG device run stop set event enable" "Disabled,Enabled" bitfld.long 0x00 25. " OTGHIBENTRYEVNTEN ,OTG hibernation entry event enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " OTGCONIDSTSCHNGEVNTEN ,Connector ID status change event" "Not changed,Changed" bitfld.long 0x00 23. " HRRCONFNOTIFEVNTEN ,Hrrconfnotif event enable" "Disabled,Enabled" bitfld.long 0x00 22. " HRRINITNOTIFEVNTEN ,Hrrinitnotif event enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " OTGADEVIDLEEVNTEN ,A-Device A-IDLE event" "Disabled,Enabled" bitfld.long 0x00 20. " OTGADEVBHOSTENDEVNTEN ,A-Device B-Host end event enable" "Disabled,Enabled" bitfld.long 0x00 19. " OTGADEVHOSTEVNTEN ,A-Device host event enable" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " OTGADEVHNPCHNGEVNTEN ,A-device HNP change detected event enable" "Disabled,Enabled" bitfld.long 0x00 17. " OTGADEVSRPDETEVNTEN ,SRP detect event enable" "Disabled,Enabled" bitfld.long 0x00 16. " OTGADEVSESSENDDETEVNTEN ,Session end detected event enable" "Disabled,Enabled" else group.long 0xCC08++0x03 line.long 0x00 "OEVT,OTG Events Register" rbitfld.long 0x00 31. " DEVICEMODE ,Device mode" "A-device,B-device" eventfld.long 0x00 27. " OTGXHCIRUNSTPSETEVNT ,OTG host run stop set event" "Not occurred,Occurred" eventfld.long 0x00 26. " OTGDEVRUNSTPSETEVNT ,OTG device run stop set event" "Not occurred,Occurred" textline " " eventfld.long 0x00 25. " OTGHIBENTRYEVNT ,OTG hibernation entry event" "Not occurred,Occurred" eventfld.long 0x00 24. " OTGCONIDSTSCHNGEVNT ,Connector ID status change event" "Not changed,Changed" eventfld.long 0x00 23. " HRRCONFNOTIFEVNT ,Host role request confirm notifier event" "Not confirmed,Confirmed" textline " " eventfld.long 0x00 22. " HRRINITNOTIFEVNT ,Host role request initiate notifier event" "Not initiated,Initiated" eventfld.long 0x00 11. " OTGBDEVBHOSTENDEVNT ,B-Device B-Host end event" "Not completed,Completed" eventfld.long 0x00 10. " OTGBDEVHNPCHNGEVNT ,B-Dev HNP change event" "Not changed,Changed" textline " " eventfld.long 0x00 9. " OTGBDEVSESSVLDDETEVNT ,Session valid detected event" "Not succeeded,Succeeded" eventfld.long 0x00 8. " OTGBDEVVBUSCHNGEVNT ,Vbus change event" "Not changed,Changed" rbitfld.long 0x00 3. " BSESVLD ,Device mode transceiver status" "Not valid,Valid" textline " " rbitfld.long 0x00 2. " HSTNEGSTS ,Host negotiation status" "Failed,Succeed" rbitfld.long 0x00 1. " SESREQSTS ,Session request status" "Low,High" eventfld.long 0x00 0. " OEVTERROR ,OTG event error" "No error,Error" group.long 0xCC0C++0x03 line.long 0x00 "OEVTEN,OTG Events Enable Register" bitfld.long 0x00 27. " OTGXHCIRUNSTPSETEVNTEN ,OTG host run stop set event enable" "Disabled,Enabled" bitfld.long 0x00 26. " OTGDEVRUNSTPSETEVNTEN ,OTG device run stop set event enable" "Disabled,Enabled" bitfld.long 0x00 25. " OTGHIBENTRYEVNTEN ,OTG hibernation entry event enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " OTGCONIDSTSCHNGEVNTEN ,Connector ID status change event" "Not changed,Changed" bitfld.long 0x00 23. " HRRCONFNOTIFEVNTEN ,Hrrconfnotif event enable" "Disabled,Enabled" bitfld.long 0x00 22. " HRRINITNOTIFEVNTEN ,Hrrinitnotif event enable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " OTGBDEVBHOSTENDEVNTEN ,B-Device B-Host end event enable" "Disabled,Enabled" bitfld.long 0x00 10. " OTGBDEVHNPCHNGEVNTEN ,B-Device HNP change event enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " OTGBDEVSESSVLDDETEVNTEN ,B-device session valid detected event enable" "Disabled,Enabled" bitfld.long 0x00 8. " OTGBDEVVBUSCHNGEVNTEN ,B-Device VBUS change event enable" "Disabled,Enabled" endif rgroup.long 0xCC10++0x03 line.long 0x00 "OSTS,OTG Status Register" bitfld.long 0x00 13. " DEVRUNSTP ,Status of the run/stop bit in the DCTL register" "Stopped,Started" bitfld.long 0x00 12. " XHCIRUNSTP ,OTG host run stop set event" "Stop,Run" bitfld.long 0x00 8.--11. " OTGSTATE ,Current state of the OTG state machine" "A_idle,,A_WAIT_BCON,A_WAIT_VFALL,A_VBUS_ERR,A_HOST,A_SUSPEND,A_WAIT_PPWR,B_IDLE,B_SRP_INIT,B_PERIPHERAL,B_WAIT_ACON,B_HOST,A_WAIT_SWITCH,B_WAIT_SWITCH,?..." textline " " bitfld.long 0x00 4. " PERIPHERALSTATE ,OTG state" "Host,Peripheral" bitfld.long 0x00 3. " XHCIPRTPOWER ,Reflects the PORTSC.PP bit in the xhci register" "Off,On" bitfld.long 0x00 2. " BSESVLD ,B-Session valid" "Not valid,Valid" textline " " bitfld.long 0x00 1. " ASESVLD ,Host mode transceiver status" "Not valid,Valid" bitfld.long 0x00 0. " CONIDSTS ,Connector ID status" "A-device,B-device" group.long 0xCC28++0x03 line.long 0x00 "ADPEVT,ADP Event Register" eventfld.long 0x00 28. " ADPPRBEVNT ,ADP probe event" "Not occurred,Occurred" eventfld.long 0x00 27. " ADPSNSEVNT ,ADP sense event" "Not occurred,Occurred" eventfld.long 0x00 26. " ADPTMOUTEVNT ,ADP timeout event" "Not occurred,Occurred" textline " " eventfld.long 0x00 25. " ADPRSTCMPLTEVNT ,ADP reset command successful" "Not successful,Successful" hexmask.long.word 0x00 0.--15. 1. " RTIM ,RAMP TIME" width 0x0B tree.end tree "USB3_1_XHCI" base ad:0xFE300000 width 16. rgroup.long 0x00++0x03 "XHCI Host Registers" line.long 0x00 "CAPLENGTH,Capability Register Length" hexmask.long.word 0x00 16.--31. 1. " HCIVERSION ,HC interface version number" hexmask.long.byte 0x00 0.--7. 1. " CAPLENGTH ,Capability registers length" rgroup.long 0x04++0x17 line.long 0x00 "HCSPARAMS1,Structural Parameters 1 Register" hexmask.long.byte 0x00 24.--31. 1. " MAXPORTS ,Number of ports" hexmask.long.word 0x00 8.--18. 1. " MAXINTERS ,Number of interrupters" hexmask.long.byte 0x00 0.--7. 1. " MAXSLOTS ,Number of device slots" line.long 0x04 "HCSPARAMS2,Structural Parameters 2 Register" bitfld.long 0x04 27.--31. " MSB ,Max scratchpad buffers" ",1,2,3,4,?..." bitfld.long 0x04 26. " SPR ,Scratchpad restore" "Not used,Used" bitfld.long 0x04 21.--25. " MSB_HI ,Max scratchpad buffers hi" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 4.--7. " ERSTMAX ,Event ring segment table max" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 0.--3. " IST ,Isochronous scheduling threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "HCSPARAMS3,Structural Parameters 3 Register" hexmask.long.word 0x08 16.--31. 1. " U2DEL ,U2 device exit latency" hexmask.long.byte 0x08 0.--7. 1. " U1DEL ,U1 device exit latency" line.long 0x0C "HCCPARAMS1,Capability Parameters 1 Register" hexmask.long.word 0x0C 16.--31. 1. " XECP ,XHCI extended capabilities pointer" bitfld.long 0x0C 12.--15. " MAXPSASIZE ,Maximum primary stream array size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 11. " CFC ,Contiguous frame ID capability" "Not capable,Capable" bitfld.long 0x0C 10. " SEC ,Stopped EDLTA capability" "Not capable,Capable" textline " " bitfld.long 0x0C 9. " SPC ,Short packet capability" "Not capable,Capable" bitfld.long 0x0C 8. " PAE ,Parse all event data" "Just first,All" bitfld.long 0x0C 7. " NSS ,No secondary SID support" "Not supported,Supported" bitfld.long 0x0C 6. " LTC ,Latency tolerance messaging capability" "Not capable,Capable" textline " " bitfld.long 0x0C 5. " LHRC ,Light HC reset capability" "Not capable,Capable" bitfld.long 0x0C 4. " PIND ,Port indicators" "Not contained,Port status/control" bitfld.long 0x0C 3. " PPC ,Port power control" "Not contained,Contained" bitfld.long 0x0C 2. " CSZ ,Context size" "32-byte,64-byte" textline " " bitfld.long 0x0C 1. " BNC ,BW negotiation capability" "Not capable,Capable" bitfld.long 0x0C 0. " AC64 ,64-bit addressing capability" "32-bit,64-bit" line.long 0x10 "DBOFF,Doorbell Offset" hexmask.long 0x10 2.--31. 0x04 " DAOFF ,Doorbell array offset" line.long 0x14 "RTSOFF,Runtime Register Space Offset" hexmask.long 0x14 5.--31. 0x20 " RRSOFF ,Runtime register space offset" rgroup.long 0x1C++0x03 line.long 0x00 "HCCPARAMS2,Capability Parameters 2 Register" bitfld.long 0x00 5. " CIC ,Configuration information capability" "Not capable,Capable" bitfld.long 0x00 4. " LEC ,Large ESIT payload capability" "Not capable,Capable" bitfld.long 0x00 3. " CTC ,Compliance transition capability" "Not capable,Capable" bitfld.long 0x00 2. " FSC ,Force save context capability" "Not capable,Capable" textline " " bitfld.long 0x00 1. " CMC ,Configure endpoint command max exit latency too large capability" "Not capable,Capable" bitfld.long 0x00 0. " U3C ,U3 entry capability" "Not capable,Capable" group.long 0x20++0x07 line.long 0x00 "USBCMD,USB Command Register" bitfld.long 0x00 13. " CME ,CEM enable" "Disabled,Enabled" bitfld.long 0x00 11. " EU3S ,Enable U3 MFINDEX stop" "Disabled,Enabled" bitfld.long 0x00 10. " EWE ,Enable wrap event" "Disabled,Enabled" bitfld.long 0x00 9. " CRS ,Controller restore state" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " CSS ,Controller save state" "Disabled,Enabled" bitfld.long 0x00 7. " LHCRST ,Light host controller reset" "Reset,No reset" bitfld.long 0x00 3. " HSEE ,Host system error enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTE ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " HCRST ,Host controller reset" "No reset,Reset" bitfld.long 0x00 0. " R_S ,Run/stop" "Stop,Run" line.long 0x04 "USBSTS,USB Status Register" rbitfld.long 0x04 12. " HCE ,Host controller error" "No error,Error" rbitfld.long 0x04 11. " CNR ,Controller not ready" "Ready,Not ready" rbitfld.long 0x04 9. " RSS ,Restore state status" "Not occurred,Occurred" rbitfld.long 0x04 8. " SSS ,Save state status" "Low,High" textline " " eventfld.long 0x04 4. " PCD ,Port change detect" "Not detected,Detected" eventfld.long 0x04 3. " EINT ,Event interrupt" "No interrupt,Interrupt" eventfld.long 0x04 2. " HSE ,Host system error" "No error,Error" rbitfld.long 0x04 0. " HCH ,HC halted" "Not halted,Halted" rgroup.long 0x28++0x03 line.long 0x00 "PAGESIZE,Page Size Register" hexmask.long.word 0x00 0.--15. 1. " PAGESIZE ,Xhcs system page size" group.long 0x34++0x03 line.long 0x00 "DNCTRL,Device Notification Control Register" bitfld.long 0x00 15. " N15 ,Notification enable 15" "Disabled,Enabled" bitfld.long 0x00 14. " N14 ,Notification enable 14" "Disabled,Enabled" bitfld.long 0x00 13. " N13 ,Notification enable 13" "Disabled,Enabled" bitfld.long 0x00 12. " N12 ,Notification enable 12" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " N11 ,Notification enable 11" "Disabled,Enabled" bitfld.long 0x00 10. " N10 ,Notification enable 10" "Disabled,Enabled" bitfld.long 0x00 9. " N9 ,Notification enable 9" "Disabled,Enabled" bitfld.long 0x00 8. " N8 ,Notification enable 8" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " N7 ,Notification enable 7" "Disabled,Enabled" bitfld.long 0x00 6. " N6 ,Notification enable 6" "Disabled,Enabled" bitfld.long 0x00 5. " N5 ,Notification enable 5" "Disabled,Enabled" bitfld.long 0x00 4. " N4 ,Notification enable 4" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " N3 ,Notification enable 3" "Disabled,Enabled" bitfld.long 0x00 2. " N2 ,Notification enable 2" "Disabled,Enabled" bitfld.long 0x00 1. " N1 ,Notification enable 1" "Disabled,Enabled" bitfld.long 0x00 0. " N0 ,Notification enable 0" "Disabled,Enabled" group.quad 0x38++0x07 line.quad 0x00 "CRCR,Command Ring Register" hexmask.quad 0x00 6.--63. 1. " CMD_RING_PNTR ,Command ring pointer" rbitfld.quad 0x00 3. " CRR ,Command ring running" "No,Yes" bitfld.quad 0x00 2. " CA ,Command abort" "Not aborted,Aborted" bitfld.quad 0x00 1. " CS ,Command stop" "Not stopped,Stopped" textline " " bitfld.quad 0x00 0. " RCS ,Ring cycle state" "Low,High" group.quad 0x50++0x07 line.quad 0x00 "DCBAPP,Device Context Bass Address Array Register" hexmask.quad 0x00 6.--63. 0x40 " DCBAP ,Device context base address array pointer" group.long 0x58++0x03 line.long 0x00 "CONFIG,XHCI Configuration Register" bitfld.long 0x00 9. " CIE ,Configuration information enable" "Disabled,Enabled" bitfld.long 0x00 8. " U3E ,U3 entry enable" "Disabled,Enabled" hexmask.long.byte 0x00 0.--7. 1. " MAXSLOTSEN ,Max device slots enable" group.long 0x420++0x07 line.long 0x00 "PORTSC20,USB2 Port Status And Control Register" rbitfld.long 0x00 30. " DR ,Device removable" "Removable,Non-removable" bitfld.long 0x00 27. " WOE ,Wake on Over-current enable" "Disabled,Enabled" bitfld.long 0x00 26. " WDE ,Wake on disconnect enable" "Disabled,Enabled" bitfld.long 0x00 25. " WCE ,Wake on connect enable" "Disabled,Enabled" textline " " rbitfld.long 0x00 24. " CAS ,Cold attach status" "Low,High" eventfld.long 0x00 22. " PLC ,Port link state change" "Not changed,Changed" eventfld.long 0x00 21. " PRC ,Port reset change" "Not changed,Changed" eventfld.long 0x00 20. " OCC ,Over-current change" "Not changed,Changed" textline " " eventfld.long 0x00 19. " WRC ,Warm port reset change" "Not changed,Changed" eventfld.long 0x00 18. " PEC ,Port enable/disable change" "Not changed,Changed" eventfld.long 0x00 17. " CSC ,Connect status change" "Not changed,Changed" bitfld.long 0x00 16. " LWS ,Port link state write strobe" "Disabled,Enabled" textline " " bitfld.long 0x00 14.--15. " PIC ,Port indicator control" "Off,Amber,Green,Undefined" rbitfld.long 0x00 10.--13. " PS ,Port speed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 9. " PP ,Port power" "Off,On" bitfld.long 0x00 5.--8. " PLS ,Port link state" "U0,U1,U2,U3,Disabled,Rxdetect,Inactive,Polling,Recovery,Hot reset,Compliance,Test,,,,Resume" textline " " bitfld.long 0x00 4. " PR ,Port reset" "No reset,Reset" rbitfld.long 0x00 3. " OCA ,Over-current active" "Not active,Active" eventfld.long 0x00 1. " PED ,Port enable" "Disabled,Enabled" rbitfld.long 0x00 0. " CCS ,Current connect status" "Not connected,Connected" line.long 0x04 "PORTMSC20,USB2 Port Power Management Status And Control Register" bitfld.long 0x04 28.--31. " PRTTSTCTRL ,Port test control - test mode" "Disabled,J_STATE,K_STATE,SE0_NAK,Packet,FORCE_ENABLE,,,,,,,,,,Control error" bitfld.long 0x04 16. " HLE ,Hardware LPM enable" "Disabled,Enabled" hexmask.long.byte 0x04 8.--15. 1. " L1DSLOT ,L1 device slot" textline " " bitfld.long 0x04 4.--7. " HIRD ,Host initiated resume duration" "50us,125us,200us,275us,350us,425us,500us,575us,650us,725us,800us,875us,950us,1025us,1100us,1175us" bitfld.long 0x04 3. " RWE ,Remote wake enable" "Disabled,Enabled" bitfld.long 0x04 0.--2. " L1S ,L1 status" "Invalid,Success,Not yet,Not supported,Timeout/error,?..." group.long 0x42C++0x03 line.long 0x00 "PORTHLPMC20,USB2 Port Hardware LPM Control Register" bitfld.long 0x00 10.--13. " HIRDD ,Best effort service latency deep" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x00 2.--9. 1. " L1_TIMEOUT ,L1 timeout" bitfld.long 0x00 0.--1. " HIRDM ,Host initiated resume duration mode" "HIRD,HIRDD/HIRD,?..." group.long 0x430++0x07 line.long 0x00 "PORTSC30,USB3 Port Status And Control Register" bitfld.long 0x00 31. " WPR ,Warm port reset" "No effect,Reset" rbitfld.long 0x00 30. " DR ,Device removable" "Removable,Non-removable" bitfld.long 0x00 27. " WOE ,Wake on Over-current enable" "Disabled,Enabled" bitfld.long 0x00 26. " WDE ,Wake on disconnect enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " WCE ,Wake on connect enable" "Disabled,Enabled" rbitfld.long 0x00 24. " CAS ,Cold attach status" "Low,High" eventfld.long 0x00 23. " CEC ,Port config error change" "No error,Error" eventfld.long 0x00 22. " PLC ,Port link state change" "Not changed,Changed" textline " " eventfld.long 0x00 21. " PRC ,Port reset change" "Not changed,Changed" eventfld.long 0x00 20. " OCC ,Over-current change" "Not changed,Changed" eventfld.long 0x00 19. " WRC ,Warm port reset change" "Not changed,Changed" eventfld.long 0x00 18. " PEC ,Port enable/disable change" "Not changed,Changed" textline " " eventfld.long 0x00 17. " CSC ,Connect status change" "Not changed,Changed" bitfld.long 0x00 16. " LWS ,Port link state write strobe" "Disabled,Enabled" bitfld.long 0x00 14.--15. " PIC ,Port indicator control" "Off,Amber,Green,Undefined" rbitfld.long 0x00 10.--13. " PS ,Port speed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 9. " PP ,Port power" "Off,On" bitfld.long 0x00 5.--8. " PLS ,Port link state" "U0,U1,U2,U3,Disabled,Rxdetect,Inactive,Polling,Recovery,Hot reset,Compliance,Test,,,,Resume" bitfld.long 0x00 4. " PR ,Port reset" "No reset,Reset" rbitfld.long 0x00 3. " OCA ,Over-current active" "Not active,Active" textline " " eventfld.long 0x00 1. " PED ,Port enable" "Disabled,Enabled" rbitfld.long 0x00 0. " CCS ,Current connect status" "Not connected,Connected" line.long 0x04 "PORTMSC30,USB3 Port PM Status And Control 1 Register" bitfld.long 0x04 16. " FLA ,Force link PM accept" "Not asserted,Asserted" hexmask.long.byte 0x04 8.--15. 1. " U2T ,U2 timeout" hexmask.long.byte 0x04 0.--7. 1. " U1T ,U1 timeout" rgroup.long 0x438++0x03 line.long 0x00 "PORTLI1,USB3 Port Link Info Register" hexmask.long.word 0x00 0.--15. 1. " LEC ,Link error count" rgroup.long 0x440++0x03 line.long 0x00 "MFINDEX,Microframe Index Register" hexmask.long.word 0x00 0.--13. 1. " MI ,Microframe index" group.long 0x460++0x0B line.long 0x00 "IMAN_0,Interrupter Management Register" bitfld.long 0x00 1. " IE ,Interrupt enable" "Disabled,Enabled" eventfld.long 0x00 0. " IP ,Interrupt pending" "No interrupt,Interrupt" line.long 0x04 "IMOD_0,Interrupter Moderation Register" hexmask.long.word 0x04 16.--31. 1. " IMODC ,Interrupt moderation counter" hexmask.long.word 0x04 0.--15. 1. " IMODI ,Interrupt moderation interval" line.long 0x08 "ERSTSZ_0,Event Ring Segment Table Size Register" hexmask.long.word 0x08 0.--15. 1. " ERSTSZ ,Event ring segment table size" group.quad (0x460+0x10)++0x0F line.quad 0x00 "ERSTBA_0,Debug Capability Event Ring Segment Table Base Address Register" hexmask.quad 0x00 6.--63. 0x40 " ERSTBA ,Event ring segment table base address" line.quad 0x08 "ERDP_0,Debug Capability Event Ring Dequeue Pointer Register" hexmask.quad 0x08 4.--63. 0x10 " DP ,Event ring dequeue pointer" bitfld.quad 0x08 3. " EHB ,Event handler busy" "Not busy,Busy" bitfld.quad 0x08 0.--2. " DESI ,Dequeue ERST segment index" "0,1,2,3,4,5,6,7" group.long 0x480++0x0B line.long 0x00 "IMAN_1,Interrupter Management Register" bitfld.long 0x00 1. " IE ,Interrupt enable" "Disabled,Enabled" eventfld.long 0x00 0. " IP ,Interrupt pending" "No interrupt,Interrupt" line.long 0x04 "IMOD_1,Interrupter Moderation Register" hexmask.long.word 0x04 16.--31. 1. " IMODC ,Interrupt moderation counter" hexmask.long.word 0x04 0.--15. 1. " IMODI ,Interrupt moderation interval" line.long 0x08 "ERSTSZ_1,Event Ring Segment Table Size Register" hexmask.long.word 0x08 0.--15. 1. " ERSTSZ ,Event ring segment table size" group.quad (0x480+0x10)++0x0F line.quad 0x00 "ERSTBA_1,Debug Capability Event Ring Segment Table Base Address Register" hexmask.quad 0x00 6.--63. 0x40 " ERSTBA ,Event ring segment table base address" line.quad 0x08 "ERDP_1,Debug Capability Event Ring Dequeue Pointer Register" hexmask.quad 0x08 4.--63. 0x10 " DP ,Event ring dequeue pointer" bitfld.quad 0x08 3. " EHB ,Event handler busy" "Not busy,Busy" bitfld.quad 0x08 0.--2. " DESI ,Dequeue ERST segment index" "0,1,2,3,4,5,6,7" group.long 0x4A0++0x0B line.long 0x00 "IMAN_2,Interrupter Management Register" bitfld.long 0x00 1. " IE ,Interrupt enable" "Disabled,Enabled" eventfld.long 0x00 0. " IP ,Interrupt pending" "No interrupt,Interrupt" line.long 0x04 "IMOD_2,Interrupter Moderation Register" hexmask.long.word 0x04 16.--31. 1. " IMODC ,Interrupt moderation counter" hexmask.long.word 0x04 0.--15. 1. " IMODI ,Interrupt moderation interval" line.long 0x08 "ERSTSZ_2,Event Ring Segment Table Size Register" hexmask.long.word 0x08 0.--15. 1. " ERSTSZ ,Event ring segment table size" group.quad (0x4A0+0x10)++0x0F line.quad 0x00 "ERSTBA_2,Debug Capability Event Ring Segment Table Base Address Register" hexmask.quad 0x00 6.--63. 0x40 " ERSTBA ,Event ring segment table base address" line.quad 0x08 "ERDP_2,Debug Capability Event Ring Dequeue Pointer Register" hexmask.quad 0x08 4.--63. 0x10 " DP ,Event ring dequeue pointer" bitfld.quad 0x08 3. " EHB ,Event handler busy" "Not busy,Busy" bitfld.quad 0x08 0.--2. " DESI ,Dequeue ERST segment index" "0,1,2,3,4,5,6,7" group.long 0x4C0++0x0B line.long 0x00 "IMAN_3,Interrupter Management Register" bitfld.long 0x00 1. " IE ,Interrupt enable" "Disabled,Enabled" eventfld.long 0x00 0. " IP ,Interrupt pending" "No interrupt,Interrupt" line.long 0x04 "IMOD_3,Interrupter Moderation Register" hexmask.long.word 0x04 16.--31. 1. " IMODC ,Interrupt moderation counter" hexmask.long.word 0x04 0.--15. 1. " IMODI ,Interrupt moderation interval" line.long 0x08 "ERSTSZ_3,Event Ring Segment Table Size Register" hexmask.long.word 0x08 0.--15. 1. " ERSTSZ ,Event ring segment table size" group.quad (0x4C0+0x10)++0x0F line.quad 0x00 "ERSTBA_3,Debug Capability Event Ring Segment Table Base Address Register" hexmask.quad 0x00 6.--63. 0x40 " ERSTBA ,Event ring segment table base address" line.quad 0x08 "ERDP_3,Debug Capability Event Ring Dequeue Pointer Register" hexmask.quad 0x08 4.--63. 0x10 " DP ,Event ring dequeue pointer" bitfld.quad 0x08 3. " EHB ,Event handler busy" "Not busy,Busy" bitfld.quad 0x08 0.--2. " DESI ,Dequeue ERST segment index" "0,1,2,3,4,5,6,7" width 6. tree "Doorbell Registers 0--63" group.long 0x4E0++0x03 line.long 0x00 "DB0,Doorbell Register 0" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x4E4++0x03 line.long 0x00 "DB1,Doorbell Register 1" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x4E8++0x03 line.long 0x00 "DB2,Doorbell Register 2" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x4EC++0x03 line.long 0x00 "DB3,Doorbell Register 3" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x4F0++0x03 line.long 0x00 "DB4,Doorbell Register 4" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x4F4++0x03 line.long 0x00 "DB5,Doorbell Register 5" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x4F8++0x03 line.long 0x00 "DB6,Doorbell Register 6" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x4FC++0x03 line.long 0x00 "DB7,Doorbell Register 7" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x500++0x03 line.long 0x00 "DB8,Doorbell Register 8" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x504++0x03 line.long 0x00 "DB9,Doorbell Register 9" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x508++0x03 line.long 0x00 "DB10,Doorbell Register 10" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x50C++0x03 line.long 0x00 "DB11,Doorbell Register 11" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x510++0x03 line.long 0x00 "DB12,Doorbell Register 12" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x514++0x03 line.long 0x00 "DB13,Doorbell Register 13" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x518++0x03 line.long 0x00 "DB14,Doorbell Register 14" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x51C++0x03 line.long 0x00 "DB15,Doorbell Register 15" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x520++0x03 line.long 0x00 "DB16,Doorbell Register 16" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x524++0x03 line.long 0x00 "DB17,Doorbell Register 17" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x528++0x03 line.long 0x00 "DB18,Doorbell Register 18" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x52C++0x03 line.long 0x00 "DB19,Doorbell Register 19" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x530++0x03 line.long 0x00 "DB20,Doorbell Register 20" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x534++0x03 line.long 0x00 "DB21,Doorbell Register 21" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x538++0x03 line.long 0x00 "DB22,Doorbell Register 22" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x53C++0x03 line.long 0x00 "DB23,Doorbell Register 23" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x540++0x03 line.long 0x00 "DB24,Doorbell Register 24" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x544++0x03 line.long 0x00 "DB25,Doorbell Register 25" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x548++0x03 line.long 0x00 "DB26,Doorbell Register 26" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x54C++0x03 line.long 0x00 "DB27,Doorbell Register 27" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x550++0x03 line.long 0x00 "DB28,Doorbell Register 28" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x554++0x03 line.long 0x00 "DB29,Doorbell Register 29" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x558++0x03 line.long 0x00 "DB30,Doorbell Register 30" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x55C++0x03 line.long 0x00 "DB31,Doorbell Register 31" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x560++0x03 line.long 0x00 "DB32,Doorbell Register 32" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x564++0x03 line.long 0x00 "DB33,Doorbell Register 33" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x568++0x03 line.long 0x00 "DB34,Doorbell Register 34" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x56C++0x03 line.long 0x00 "DB35,Doorbell Register 35" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x570++0x03 line.long 0x00 "DB36,Doorbell Register 36" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x574++0x03 line.long 0x00 "DB37,Doorbell Register 37" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x578++0x03 line.long 0x00 "DB38,Doorbell Register 38" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x57C++0x03 line.long 0x00 "DB39,Doorbell Register 39" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x580++0x03 line.long 0x00 "DB40,Doorbell Register 40" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x584++0x03 line.long 0x00 "DB41,Doorbell Register 41" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x588++0x03 line.long 0x00 "DB42,Doorbell Register 42" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x58C++0x03 line.long 0x00 "DB43,Doorbell Register 43" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x590++0x03 line.long 0x00 "DB44,Doorbell Register 44" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x594++0x03 line.long 0x00 "DB45,Doorbell Register 45" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x598++0x03 line.long 0x00 "DB46,Doorbell Register 46" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x59C++0x03 line.long 0x00 "DB47,Doorbell Register 47" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x5A0++0x03 line.long 0x00 "DB48,Doorbell Register 48" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x5A4++0x03 line.long 0x00 "DB49,Doorbell Register 49" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x5A8++0x03 line.long 0x00 "DB50,Doorbell Register 50" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x5AC++0x03 line.long 0x00 "DB51,Doorbell Register 51" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x5B0++0x03 line.long 0x00 "DB52,Doorbell Register 52" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x5B4++0x03 line.long 0x00 "DB53,Doorbell Register 53" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x5B8++0x03 line.long 0x00 "DB54,Doorbell Register 54" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x5BC++0x03 line.long 0x00 "DB55,Doorbell Register 55" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x5C0++0x03 line.long 0x00 "DB56,Doorbell Register 56" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x5C4++0x03 line.long 0x00 "DB57,Doorbell Register 57" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x5C8++0x03 line.long 0x00 "DB58,Doorbell Register 58" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x5CC++0x03 line.long 0x00 "DB59,Doorbell Register 59" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x5D0++0x03 line.long 0x00 "DB60,Doorbell Register 60" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x5D4++0x03 line.long 0x00 "DB61,Doorbell Register 61" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x5D8++0x03 line.long 0x00 "DB62,Doorbell Register 62" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" group.long 0x5DC++0x03 line.long 0x00 "DB63,Doorbell Register 63" hexmask.long.word 0x00 16.--31. 1. " DB_STREAM_ID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DB_TARGET ,Doorbell target" tree.end width 16. textline " " group.long 0x8E0++0x07 line.long 0x00 "USBLEGSUP,USB Legacy Support Capability Register" bitfld.long 0x00 24. " HCOSOS ,HC OS owned semaphore" "Not owned,Owned" bitfld.long 0x00 16. " HCBOS ,HC BIOS owned semaphore" "Not owned,Owned" hexmask.long.byte 0x00 8.--15. 1. " NCP ,Next capability pointer" hexmask.long.byte 0x00 0.--7. 1. " CID ,Capability ID" line.long 0x04 "USBLEGCTLSTS,USB Legacy Support Control And Status Register" bitfld.long 0x04 31. " SB ,SMI on BAR" "Not written,Written" bitfld.long 0x04 30. " SPC ,SMI on PCI command" "Not written,Written" eventfld.long 0x04 29. " SOSOC ,SMI on OS ownership change" "Disabled,Enabled" rbitfld.long 0x04 20. " SHSE ,SMI on host system error" "No error,Error" textline " " rbitfld.long 0x04 16. " SEI ,SMI on event interrupt" "No interrupt,Interrupt" bitfld.long 0x04 15. " SBE ,SMI on BAR enable" "Disabled,Enabled" bitfld.long 0x04 14. " SPCE ,SMI on PCI command enable" "Disabled,Enabled" bitfld.long 0x04 13. " SOSOCE ,SMI on OS ownership change enable" "Disabled,Enabled" textline " " bitfld.long 0x04 4. " SMIHSEE ,SMI on host system error enable" "Disabled,Enabled" bitfld.long 0x04 0. " USBSE ,USB SMI enable" "Disabled,Enabled" rgroup.long 0x8F0++0x0F line.long 0x00 "SUPTPRT2_DW0,XHCI Supported Protocol Capability Data Word 0" hexmask.long.byte 0x00 24.--31. 1. " MAJOR ,Major revision" hexmask.long.byte 0x00 16.--23. 1. " MINOR ,Minor revision" hexmask.long.byte 0x00 8.--15. 1. " NCP ,Next capability pointer" hexmask.long.byte 0x00 0.--7. 1. " CID ,Capability ID" line.long 0x04 "SUPTPRT2_DW1,XHCI Supported Protocol Capability Data Word 1" line.long 0x08 "SUPTPRT2_DW2,XHCI Supported Protocol Capability Data Word 2" bitfld.long 0x08 28.--31. " PSIC ,Product speed ID count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 25.--27. " MHD ,Hub depth" "0,1,2,3,4,5,6,7" bitfld.long 0x08 20. " BLC ,BESL LPM capability" "HIRD,BESL" bitfld.long 0x08 19. " HLC ,Hardware LPM capability" "Not capable,Capable" textline " " bitfld.long 0x08 18. " IHI ,Integrated hub implemented" "Not implemented,Implemented" bitfld.long 0x08 17. " HSO ,High-speed only" "False,True" hexmask.long.byte 0x08 8.--15. 1. " CPC ,Compatible port count" hexmask.long.byte 0x08 0.--7. 1. " CPO ,Compatible port offset" line.long 0x0C "SUPTPRT2_DW3,XHCI Supported Protocol Capability Data Word 3" bitfld.long 0x0C 0.--4. " PROTCL_SLT_TY ,Protocol slot type" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x900++0x0F line.long 0x00 "SUPTPRT3_DW0,XHCI Supported Protocol Capability Data Word 0" hexmask.long.byte 0x00 24.--31. 1. " MAJOR ,Major revision" hexmask.long.byte 0x00 16.--23. 1. " MINOR ,Minor revision" hexmask.long.byte 0x00 8.--15. 1. " NCP ,Next capability pointer" hexmask.long.byte 0x00 0.--7. 1. " CID ,Capability ID" line.long 0x04 "SUPTPRT3_DW1,XHCI Supported Protocol Capability Data Word 1" line.long 0x08 "SUPTPRT2_DW2,XHCI Supported Protocol Capability Data Word 2" bitfld.long 0x08 25.--27. " MHD ,Hub depth" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x08 8.--15. 1. " CPC ,Compatible port count" hexmask.long.byte 0x08 0.--7. 1. " CPO ,Compatible port offset" line.long 0x0C "SUPTPRT2_DW3,XHCI Supported Protocol Capability Data Word 3" bitfld.long 0x0C 0.--4. " PROTCL_SLT_TY ,Protocol slot type" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x910++0x03 line.long 0x00 "DCID,Debug Capability ID Register" bitfld.long 0x00 16.--20. " DCERSTMAX ,Debug capability event ring segment table max" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 8.--15. 0x01 " NCP ,Next capability pointer" hexmask.long.byte 0x00 0.--7. 0x01 " CID ,Capability ID" group.long 0x914++0x07 line.long 0x00 "DCDB,Debug Capability Doorbell Register" hexmask.long.byte 0x00 8.--15. 1. " DT ,Doorbell target" line.long 0x04 "DCERSTSZ,Debug Capability Event Ring Segment Table Size Register" hexmask.long.word 0x04 0.--15. 1. " ERSTSZ ,Event ring segment table size" group.quad 0x920++0x0F line.quad 0x00 "DCERSTBA,Debug Capability Event Ring Segment Table Base Address Register" hexmask.quad 0x00 4.--63. 0x10 " ERSTBA ,Event ring segment table base address" line.quad 0x08 "DCERDP,Debug Capability Event Ring Dequeue Pointer Register" hexmask.quad 0x08 4.--63. 0x10 " DP ,Dequeue pointer" bitfld.quad 0x08 0.--2. " DESI ,Dequeue ERST segment index" "0,1,2,3,4,5,6,7" group.long 0x930++0x03 line.long 0x00 "DCCTRL,Debug Capability Control Register" bitfld.long 0x00 31. " DCE ,Debug capability enable" "Disabled,Enabled" hexmask.long.byte 0x00 24.--30. 0x01 " DA ,Device address" hexmask.long.byte 0x00 16.--23. 1. " DMBS ,Debug max burst size" bitfld.long 0x00 4. " DRC ,Dbc run change" "Not changed,Changed" textline " " bitfld.long 0x00 3. " HIT ,Halt IN TR" "No,Yes" bitfld.long 0x00 2. " HOT ,Halt OUT TR" "No,Yes" bitfld.long 0x00 1. " LSE ,Link status event enable" "Disabled,Enabled" bitfld.long 0x00 0. " DCR ,Dbc run" "Disabled,Enabled" rgroup.long 0x934++0x03 line.long 0x00 "DCST,Debug Capability ST Register" hexmask.long.byte 0x00 24.--31. 1. " DPN ,Debug port number" bitfld.long 0x00 1. " SBR ,Dbc system bus rese" "No reset,Reset" bitfld.long 0x00 0. " ER ,Event ring not empty" "Empty,Not empty" group.long 0x938++0x03 line.long 0x00 "DCPORTSC,Debug Capability Port Status Change Register" eventfld.long 0x00 23. " CEC ,Port config error change" "No error,Error" eventfld.long 0x00 22. " PLC ,Port link status change" "Not changed,Changed" eventfld.long 0x00 21. " PRC ,Port reset change" "Not changed,Changed" eventfld.long 0x00 17. " CSC ,Connect status change" "Not changed,Changed" textline " " rbitfld.long 0x00 10.--13. " PS ,Port speed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x00 5.--8. " PLS ,Port link state" "U0,U1,U2,U3,Disabled,Rxdetect,Inactive,Polling,Recovery,Hot reset,?..." rbitfld.long 0x00 4. " PR ,Port reset" "No reset,Reset" bitfld.long 0x00 1. " PED ,Port enabled" "Disabled,Enabled" textline " " rbitfld.long 0x00 0. " CCS ,Current connect status" "Not connected,Connected" group.quad 0x940++0x07 line.quad 0x00 "DCCP,Debug Capability Context Pointer Register" hexmask.quad 0x00 4.--63. 1. " DCCP ,Debug capability context pointer" group.long 0x948++0x07 line.long 0x00 "DCDDI1,Debug Capability Device Descriptor Info Register 1" hexmask.long.word 0x00 16.--31. 1. " VID ,Vender ID" hexmask.long.byte 0x00 0.--7. 1. " DBCP ,Dbc protocol" line.long 0x04 "DCDDI2,Debug Capability Device Descriptor Info Register 2" hexmask.long.word 0x04 16.--31. 1. " DR ,Device revision" hexmask.long.word 0x04 0.--15. 1. " PID ,Product ID" group.long 0xC100++0x07 "Global Registers" line.long 0x00 "GSBUSCFG0,Global Soc Bus Configuration Register 0" bitfld.long 0x00 28.--31. " DATRDREQINFO ,DATRDREQINFO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. " DESRDREQINFO ,DESRDREQINFO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. " DATWRREQINFO ,DATWRREQINFO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " DESWRREQINFO ,DESWRREQINFO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 11. " DATBIGEND ,Data access is big endian" "Little endian,Big endian" bitfld.long 0x00 10. " DESBIGEND ,Descriptor access is big endian" "Little endian,Big endian" bitfld.long 0x00 7. " INCR256BRSTENA ,INCR256 burst type enable input to BUS-GM" "Disabled,Enabled" bitfld.long 0x00 6. " INCR128BRSTENA ,INCR128 burst type enable input to BUS-GM" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " INCR64BRSTENA ,INCR64 burst type enable input to BUS-GM" "Disabled,Enabled" bitfld.long 0x00 4. " INCR32BRSTENA ,INCR32 burst type enable input to BUS-GM" "Disabled,Enabled" bitfld.long 0x00 3. " INCR16BRSTENA ,INCR16 burst type enable input to BUS-GM" "Disabled,Enabled" bitfld.long 0x00 2. " INCR8BRSTENA ,INCR8 burst type enable input to BUS-GM" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " INCR4BRSTENA ,INCR4 burst type enable input to BUS-GM" "Disabled,Enabled" bitfld.long 0x00 0. " INCRBRSTENA ,Undefined length INCR burst type enable" "Disabled,Enabled" line.long 0x04 "GSBUSCFG1,Global Soc Bus Configuration Register 1" bitfld.long 0x04 12. " EN1KPAGE ,1k page boundary enable" "Disabled,Enabled" bitfld.long 0x04 8.--11. " PIPETRANSLIMIT ,AXI pipelined transfers burst request limit" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" if (((d.l(ad:0xFE300000+0xC118))&0x03)!=0x01) hgroup.long 0xC108++0x03 hide.long 0x00 "GTXTHRCFG,Global TX Threshold Control Register" else if (((d.l(ad:0xFE300000+0xC108))&0x20000000)==0x20000000) group.long 0xC108++0x03 line.long 0x00 "GTXTHRCFG,Global TX Threshold Control Register" bitfld.long 0x00 29. " USBTXPKTCNTSEL ,USB transmit packet count enable" "Disabled,Enabled" bitfld.long 0x00 24.--27. " USBTXPKTCNT ,USB transmit packet count" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x00 16.--23. 1. " USBMAXTXBURSTS ,USB maximum TX burst size" else group.long 0xC108++0x03 line.long 0x00 "GTXTHRCFG,Global TX Threshold Control Register" bitfld.long 0x00 29. " USBTXPKTCNTSEL ,USB transmit packet count enable" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " USBMAXTXBURSTS ,USB maximum TX burst size" endif endif if (((d.l(ad:0xFE300000+0xC10C))&0x20000000)==0x20000000) group.long 0xC10C++0x03 line.long 0x00 "GRXTHRCFG,Global RX Threshold Control Register" bitfld.long 0x00 29. " USBRXPKTCNTSEL ,USB receive packet count enable" "Disabled,Enabled" bitfld.long 0x00 24.--27. " USBRXPKTCNT ,USB transmit packet count" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x00 19.--23. 1. " USBMAXRXBURSTSIZE ,USB maximum receive burst size" else group.long 0xC10C++0x03 line.long 0x00 "GRXTHRCFG,Global RX Threshold Control Register" bitfld.long 0x00 29. " USBRXPKTCNTSEL ,USB receive packet count enable" "Disabled,Enabled" endif if (((d.l(ad:0xFE300000+0xC118))&0x03)==0x00) group.long 0xC110++0x03 line.long 0x00 "GCTL,Global Common Register" hexmask.long.word 0x00 19.--31. 1. " PWRDNSCALE ,Power down scale" bitfld.long 0x00 18. " MASTERFILTBYPASS ,Master filter bypass" "Disabled,Enabled" bitfld.long 0x00 17. " BYPSSETADDR ,Bypass set address" "Disabled,Enabled" bitfld.long 0x00 16. " U2RSTECN ,Three device attempts to connect" "Disabled,Enabled" textline " " bitfld.long 0x00 14.--15. " FRMSCLDWN ,Scale down device view" "1024 bytes,512 bytes,256 bytes,128 bytes" bitfld.long 0x00 12.--13. " PRTCAPDIR ,Port capability direction" ",Host,Device,OTG" bitfld.long 0x00 11. " CORESOFTRESET ,Core soft reset" "No reset,Reset" bitfld.long 0x00 10. " SOFITPSYNC ,UTMI/ULPI PHY on the first port status" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " U1U2TIMERSCALE ,Disable U1/U2 timer scaledown" "No,Yes" bitfld.long 0x00 8. " DEBUGATTACH ,Debug attach" "Disabled,Enabled" bitfld.long 0x00 6.--7. " RAMCLKSEL ,RAM clock select" "Bus clock,Pipe clock,Pipe/2,Mac2_clk" bitfld.long 0x00 4.--5. " SCALEDOWN ,Scale-Down mode" "Disabled,Enabled,Enabled,Enable 0/1bits" textline " " bitfld.long 0x00 3. " DISSCRAMBLE ,Disable scrambling" "No,Yes" bitfld.long 0x00 2. " U2EXIT_LFPS ,U2EXIT_LFPS" "248ns,8us" bitfld.long 0x00 1. " GBLHIBERNATIONEN ,Hibernation at the global level enable" "Disabled,Enabled" bitfld.long 0x00 0. " DSBLCLKGTNG ,Disable clock gating" "No,Yes" else group.long 0xC110++0x03 line.long 0x00 "GCTL,Global Common Register" hexmask.long.word 0x00 19.--31. 1. " PWRDNSCALE ,Power down scale" bitfld.long 0x00 18. " MASTERFILTBYPASS ,Master filter bypass" "Disabled,Enabled" bitfld.long 0x00 17. " BYPSSETADDR ,Bypass set address" "Disabled,Enabled" textline " " bitfld.long 0x00 14.--15. " FRMSCLDWN ,Scale down device view" "1024 bytes,512 bytes,256 bytes,128 bytes" bitfld.long 0x00 12.--13. " PRTCAPDIR ,Port capability direction" ",Host,Device,OTG" bitfld.long 0x00 11. " CORESOFTRESET ,Core soft reset" "No reset,Reset" bitfld.long 0x00 10. " SOFITPSYNC ,UTMI/ULPI PHY on the first port status" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " U1U2TIMERSCALE ,Disable U1/U2 timer scaledown" "Disabled,Enabled" bitfld.long 0x00 8. " DEBUGATTACH ,Debug attach" "Disabled,Enabled" textfld " " bitfld.long 0x00 4.--5. " SCALEDOWN ,Scale-Down mode" "Disabled,1,2,Enable 0/1bits" textline " " bitfld.long 0x00 3. " DISSCRAMBLE ,Disable scrambling" "No,Yes" bitfld.long 0x00 2. " U2EXIT_LFPS ,U2EXIT_LFPS" "248ns,8us" bitfld.long 0x00 1. " GBLHIBERNATIONEN ,Hibernation at the global level enable" "Disabled,Enabled" bitfld.long 0x00 0. " DSBLCLKGTNG ,Disable clock gating" "No,Yes" endif group.long 0xC114++0x03 line.long 0x00 "GPMSTS,Global Power Management Status Register" bitfld.long 0x00 28.--31. " PORTSEL ,Port number selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x00 16. " LCS ,Last connection state" "Not detected,Detected" rbitfld.long 0x00 15. " U3-DD ,Disconnect detected" "Not detected,Detected" rbitfld.long 0x00 14. " U3-CD ,Connect detected" "Not detected,Detected" textline " " rbitfld.long 0x00 13. " U3-RD ,Resume detected" "Not detected,Detected" rbitfld.long 0x00 12. " U3-OD ,Overcurrent detected" "Not detected,Detected" rbitfld.long 0x00 9. " U2-DD ,Resume detected changed" "Not detected,Detected" rbitfld.long 0x00 8. " U2-RD ,USB reset detected" "Not detected,Detected" textline " " rbitfld.long 0x00 7. " U2-UID ,ULPI interrupt detected" "Not detected,Detected" rbitfld.long 0x00 6. " U2-SRD ,SRP request detected" "Not detected,Detected" rbitfld.long 0x00 5. " U2-ICD ,ID change detected" "Not detected,Detected" rbitfld.long 0x00 4. " U2-LCS ,Last connection state" "Not detected,Detected" textline " " rbitfld.long 0x00 3. " U2-DD ,Disconnect detected" "Not detected,Detected" rbitfld.long 0x00 2. " U2-CD ,Connect detected" "Not detected,Detected" rbitfld.long 0x00 1. " U2-RD ,Resume detected" "Not detected,Detected" rbitfld.long 0x00 0. " U2-OD ,Overcurrent detected" "Not detected,Detected" rgroup.long 0xC118++0x03 line.long 0x00 "GSTS,Global Status Register" hexmask.long.word 0x00 20.--31. 1. " CBELT ,Minimum value of all received device BELT values" bitfld.long 0x00 11. " SSIC_IP ,SSIC interrupt pending" "No interrupt,Interrupt" bitfld.long 0x00 10. " OTG_IP ,OTG interrupt pending" "No interrupt,Interrupt" bitfld.long 0x00 9. " BC_IP ,Battery charger interrupt pending" "No interrupt,Interrupt" textline " " bitfld.long 0x00 8. " ADP_IP ,ADP interrupt pending" "No interrupt,Interrupt" bitfld.long 0x00 7. " HOST_IP ,Host interrupt pending" "No interrupt,Interrupt" bitfld.long 0x00 6. " DEVICE_IP ,Device interrupt pending" "No interrupt,Interrupt" bitfld.long 0x00 5. " CSRTIMEOUT ,CSR timeout" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " BUSERRADDRVLD ,Bus error address valid" "Not valid,Valid" bitfld.long 0x00 0.--1. " CURMOD ,Current mode of operation" "Device,Host,?..." if (((d.l(ad:0xFE300000+0xC118))&0x01)==0x00) group.long 0xC11C++0x03 line.long 0x00 "GUCTL1,Global User Control Register 1" bitfld.long 0x00 29. " FILTER_SE0_FSLS_EOP ,Enable FS/LS SE0 filtering for 2 clocks for detecting EOP" "Disabled,Enabled" bitfld.long 0x00 28. " TX_IPGAP_LINECHK_DIS ,Disable linestate check during HS transmit" "No,Yes" bitfld.long 0x00 27. " DEV_TRB_OUT_SPR_IND ,Enable short packet status indication in the OT TRB" "Disabled,Enabled" bitfld.long 0x00 26. " DEV_FORCE_20CLKFOR_30CLK ,Force 2.0 clock in 2.0 mode" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " P3_IN_U2 ,Enable P3 power state when the superspeed link is in U2" "Disabled,Enabled" bitfld.long 0x00 24. " DEV_L1_EXIT_BY_HW ,Enable device L1 hardware exit logic" "Disabled,Enabled" bitfld.long 0x00 21.--23. " IP_GAP_ADD_ON ,USB 2.0 MAC inter packet gap add value" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20. " DEV_LSP_TAIL_LOCK_DIS ,Disable device lsp lock logic for tail TRB update" "No,Yes" textline " " bitfld.long 0x00 19. " NAK_PER_ENH_FS ,Enable performance enhancement for FS async endpoints in the presence of naks" "Disabled,Enabled" bitfld.long 0x00 18. " NAK_PER_ENH ,Enable performance enhancement for HS sync endpoints in the presence of naks" "Disabled,Enabled" textline " " textfld " " bitfld.long 0x00 10. " RES_TRMS_XCVRSEL_UN ,Resume termsel xcvrsel unify" "Disabled,Enabled" textline " " textfld " " bitfld.long 0x00 2. " HC_PARCHK_DIS ,Host parameter check disable" "No,Yes" bitfld.long 0x00 1. " OVRLD_L1_SUSP_COM ,PHY stops the port clock during L1 sleep condition" "Not occurred,Occurred" else if (((d.l(ad:0xFE300000+0xC11C))&0x100)==0x100) group.long 0xC11C++0x03 line.long 0x00 "GUCTL1,Global User Control Register 1" bitfld.long 0x00 29. " FILTER_SE0_FSLS_EOP ,Enable FS/LS SE0 filtering for 2 clocks for detecting EOP" "Disabled,Enabled" bitfld.long 0x00 28. " TX_IPGAP_LINECHK_DIS ,Disable linestate check during HS transmit" "No,Yes" textline " " bitfld.long 0x00 25. " P3_IN_U2 ,Enable P3 power state when the superspeed link is in U2" "Disabled,Enabled" textfld " " bitfld.long 0x00 21.--23. " IP_GAP_ADD_ON ,USB 2.0 MAC inter packet gap add value" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20. " DEV_LSP_TAIL_LOCK_DIS ,Disable device lsp lock logic for tail TRB update" "No,Yes" textline " " bitfld.long 0x00 19. " NAK_PER_ENH_FS ,Enable performance enhancement for FS async endpoints in the presence of naks" "Disabled,Enabled" bitfld.long 0x00 18. " NAK_PER_ENH ,Enable performance enhancement for HS sync endpoints in the presence of naks" "Disabled,Enabled" bitfld.long 0x00 17. " PARKMODE_DIS_SS ,Disable the SS bus instances in park mode" "No,Yes" bitfld.long 0x00 16. " PARKMODE_DIS_HS ,Disable the HS bus instances park mode" "No,Yes" textline " " bitfld.long 0x00 15. " PARKMODE_DI_FSLS ,Parkmode FSLS disable" "No,Yes" bitfld.long 0x00 10. " RES_TRMS_XCVRSEL_UN ,Resume termsel xcvrsel unify" "Disabled,Enabled" bitfld.long 0x00 8. " L1STENFORHOST ,HIRD/BESL comparison value" ">=,Less" bitfld.long 0x00 4.--7. " L1STHDFORHOST ,L1_SUSP_THRLD_FOR_HOST" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 3. " HC_ERRATA_ENABLE ,Host ELD enable" "Disabled,Enabled" bitfld.long 0x00 2. " HC_PARCHK_DIS ,Host parameter check disable" "No,Yes" bitfld.long 0x00 1. " OVRLD_L1_SUSP_COM ,PHY stops the port clock during L1 sleep condition" "Not occurred,Occurred" bitfld.long 0x00 0. " LOA_FILTER_EN ,USB 2.0 port babble check" "Not checked,Checked" else group.long 0xC11C++0x03 line.long 0x00 "GUCTL1,Global User Control Register 1" bitfld.long 0x00 29. " FILTER_SE0_FSLS_EOP ,Enable FS/LS SE0 filtering for 2 clocks for detecting EOP" "Disabled,Enabled" bitfld.long 0x00 28. " TX_IPGAP_LINECHK_DIS ,Disable linestate check during HS transmit" "No,Yes" textline " " bitfld.long 0x00 25. " P3_IN_U2 ,Enable P3 power state when the superspeed link is in U2" "Disabled,Enabled" textfld " " bitfld.long 0x00 21.--23. " IP_GAP_ADD_ON ,USB 2.0 MAC inter packet gap add value" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20. " DEV_LSP_TAIL_LOCK_DIS ,Disable device lsp lock logic for tail TRB update" "No,Yes" textline " " bitfld.long 0x00 19. " NAK_PER_ENH_FS ,Enable performance enhancement for FS async endpoints in the presence of naks" "Disabled,Enabled" bitfld.long 0x00 18. " NAK_PER_ENH ,Enable performance enhancement for HS sync endpoints in the presence of naks" "Disabled,Enabled" bitfld.long 0x00 17. " PARKMODE_DIS_SS ,Disable the SS bus instances in park mode" "No,Yes" bitfld.long 0x00 16. " PARKMODE_DIS_HS ,Disable the HS bus instances park mode" "No,Yes" textline " " bitfld.long 0x00 15. " PARKMODE_DI_FSLS ,Parkmode FSLS disable" "No,Yes" bitfld.long 0x00 10. " RES_TRMS_XCVRSEL_UN ,Resume termsel xcvrsel unify" "Disabled,Enabled" bitfld.long 0x00 8. " L1STENFORHOST ,HIRD/BESL comparison value" ">=,Less" textline " " bitfld.long 0x00 3. " HC_ERRATA_ENABLE ,Host ELD enable" "Disabled,Enabled" bitfld.long 0x00 2. " HC_PARCHK_DIS ,Host parameter check disable" "No,Yes" bitfld.long 0x00 1. " OVRLD_L1_SUSP_COM ,PHY stops the port clock during L1 sleep condition" "Not occurred,Occurred" bitfld.long 0x00 0. " LOA_FILTER_EN ,USB 2.0 port babble check" "Not checked,Checked" endif endif rgroup.long 0xC120++0x03 line.long 0x00 "GSNPSID,Global Synopsys ID Register" hexmask.long.word 0x00 16.--31. 1. " CIN ,Core identification number" hexmask.long.word 0x00 0.--15. 1. " RE ,Release number" group.long 0xC124++0x07 line.long 0x00 "GGPIO,Global General Purpose Input/output Register" hexmask.long.word 0x00 16.--31. 1. " GPO ,General purpose output" hexmask.long.word 0x00 0.--15. 1. " GPI ,General purpose input" line.long 0x04 "GUID,Global User ID Register" if (((d.l(ad:0xFE300000+0xC118))&0x01)==0x00) group.long 0xC12C++0x03 line.long 0x00 "GUCTL,Global User Control Register" hexmask.long.word 0x00 22.--31. 1. " REFCLKPER ,The period of REF_CLK in nanoseconds" bitfld.long 0x00 21. " NOEXTRDL ,No extra delay between SOF and the first packet" "2microseconds,No wait" bitfld.long 0x00 17. " SPRSCTRLTRANSEN ,Sparse control transaction enable" "Disabled,Enabled" textline " " textfld " " bitfld.long 0x00 14. " HINAREN ,Host IN auto retry" "Disabled,Enabled" bitfld.long 0x00 13. " ENOVERLAPCHK ,Enable check for LFPS overlap during remote ux exit" "Disabled,Enabled" bitfld.long 0x00 12. " EXTCAPSUPPTEN ,External extended capability support enable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " ITEXTRFSBODI ,Insert extra delay between FS bulk OUT transactions" "Disabled,Enabled" bitfld.long 0x00 9.--10. " DTCT ,Device timeout coarse tuning" "DTFT,500 usec,1.5 msec,6.5 msec" hexmask.long.word 0x00 0.--8. 1. " DTFT ,Device timeout fine tuning" else group.long 0xC12C++0x03 line.long 0x00 "GUCTL,Global User Control Register" hexmask.long.word 0x00 22.--31. 1. " REFCLKPER ,The period of REF_CLK in nanoseconds" bitfld.long 0x00 21. " NOEXTRDL ,No extra delay between SOF and the first packet" "2microseconds,No wait" bitfld.long 0x00 17. " SPRSCTRLTRANSEN ,Sparse control transaction enable" "Disabled,Enabled" bitfld.long 0x00 16. " RESBWHSEPS ,Bandwidth relaxed to 85% to accommodate two high speed enable" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " CMDEVADDR ,Compliance mode for device address" "Slot ID,Incremented" bitfld.long 0x00 14. " HINAREN ,Host IN auto retry" "Disabled,Enabled" bitfld.long 0x00 13. " ENOVERLAPCHK ,Enable check for LFPS overlap during remote ux exit" "Disabled,Enabled" bitfld.long 0x00 12. " EXTCAPSUPPTEN ,External extended capability support enable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " ITEXTRFSBODI ,Insert extra delay between FS bulk OUT transactions" "Disabled,Enabled" bitfld.long 0x00 9.--10. " DTCT ,Device timeout coarse tuning" "DTFT,500 usec,1.5 msec,6.5 msec" hexmask.long.word 0x00 0.--8. 1. " DTFT ,Device timeout fine tuning" endif textline " " rgroup.long 0xC130++0x1F line.long 0x00 "GBUSERRADDRLO,Global Soc Bus Error Address Register - Low" line.long 0x04 "GBUSERRADDRHI,Global Soc Bus Error Address Register - High" line.long 0x08 "GPRTBIMAPLO,Global Port - SS USB Instance Mapping Register - Low" bitfld.long 0x08 28.--31. " BINUM_[8] ,FS USB instance number for port 8" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 24.--27. " [7] ,FS USB instance number for port 7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 20.--23. " [6] ,FS USB instance number for port 6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 16.--19. " [5] ,FS USB instance number for port 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 12.--15. " [4] ,FS USB instance number for port 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 8.--11. " [3] ,FS USB instance number for port 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 4.--7. " [2] ,FS USB instance number for port 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--3. " [1] ,FS USB instance number for port 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x0C "GPRTBIMAPHI,Global Port - SS USB Instance Mapping Register - High" bitfld.long 0x0C 24.--27. " BINUM[15] ,FS USB instance number for port 15" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 20.--23. " [14] ,FS USB instance number for port 14" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 16.--19. " [13] ,FS USB instance number for port 13" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 12.--15. " [12] ,FS USB instance number for port 12" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 8.--11. " [11] ,FS USB instance number for port 11" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 4.--7. " [10] ,FS USB instance number for port 10" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 0.--3. " [9] ,FS USB instance number for port 9" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " line.long 0x10 "GHWPARAMS0,Global Hardware Parameters Register 0" hexmask.long.byte 0x10 24.--31. 1. " GHWPARAMS0_[24-31] ,DWC_USB3_AWIDTH" hexmask.long.byte 0x10 16.--23. 1. " [16-23] ,DWC_USB3_SDWIDTH" hexmask.long.byte 0x10 8.--15. 1. " [8-15] ,DWC_USB3_MDWIDTH" bitfld.long 0x10 6.--7. " [6-7] ,DWC_USB3_SBUS_TYPE" "0,1,2,3" textline " " bitfld.long 0x10 3.--5. " [3-5] ,DWC_USB3_MBUS_TYPE" "0,1,2,3,4,5,6,7" bitfld.long 0x10 0.--2. " [2-0] ,DWC_USB3_MODE" "0,1,2,3,4,5,6,7" line.long 0x14 "GHWPARAMS1,Global Hardware Parameters Register 1" bitfld.long 0x14 31. " GHWPARAMS1_[31] ,DWC_USB3_EN_DBC" "0,1" bitfld.long 0x14 30. " [30] ,DWC_USB3_RM_OPT_FEATURES" "0,1" bitfld.long 0x14 28. " [28] ,DWC_USB3_RAM_BUS_CLKS_SYNC" "0,1" bitfld.long 0x14 27. " [27] ,DWC_USB3_MAC_RAM_CLKS_SYNC" "0,1" textline " " bitfld.long 0x14 26. " [26] ,DWC_USB3_MAC_PHY_CLKS_SYNC" "0,1" bitfld.long 0x14 24.--25. " [24-25] ,DWC_USB3_EN_PWROPT" "0,1,2,3" bitfld.long 0x14 23. " [23] ,DWC_USB3_SPRAM_TYP" "0,1" bitfld.long 0x14 21.--22. " [21-22] ,DWC_USB3_NUM_RAMS" "0,1,2,3" textline " " bitfld.long 0x14 15.--20. " [15-20] ,DWC_USB3_DEVICE_NUM_INT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x14 12.--14. " [12-14] ,DWC_USB3_ASPACEWIDTH" "0,1,2,3,4,5,6,7" bitfld.long 0x14 9.--11. " [9-11] ,DWC_USB3_REQINFOWIDTH" "0,1,2,3,4,5,6,7" bitfld.long 0x14 6.--8. " [6-8] ,DWC_USB3_DATAINFOWIDTH" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x14 3.--5. " [3-5] ,DWC_USB3_BURSTWIDTH-1" "0,1,2,3,4,5,6,7" bitfld.long 0x14 0.--2. " [0-2] ,DWC_USB3_IDWIDTH-1" "0,1,2,3,4,5,6,7" line.long 0x18 "GHWPARAMS2,Global Hardware Parameters Register 2" line.long 0x1C "GHWPARAMS3,Global Hardware Parameters Register 3" hexmask.long.byte 0x1C 23.--30. 1. " GHWPARAMS3_[23_31] ,DWC_USB3_CACHE_TOTAL_XFER_RESOURCES" bitfld.long 0x1C 18.--22. " [18-22] ,DWC_USB3_NUM_IN_EPS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x1C 12.--17. " [12-17] ,DWC_USB3_NUM_EPS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x1C 11. " [11] ,DWC_USB3_ULPI_CARKIT" "0,1" textline " " bitfld.long 0x1C 10. " [10] ,DWC_USB3_VENDOR_CTL_INTERFACE" "0,1" bitfld.long 0x1C 6.--7. " [6-7] ,DWC_USB3_HSPHY_DWIDTH" "0,1,2,3" bitfld.long 0x1C 4.--5. " [4-5] ,DWC_USB3_FSPHY_INTERFACE" "0,1,2,3" bitfld.long 0x1C 2.--3. " [2-3] ,DWC_USB3_HSPHY_INTERFACE" "0,1,2,3" textline " " bitfld.long 0x1C 0.--1. " [0-1] ,DWC_USB3_SSPHY_INTERFACE" "0,1,2,3" rgroup.long 0xC150++0x0F line.long 0x00 "GHWPARAMS4,Global Hardware Parameters Register 4" bitfld.long 0x00 28.--31. " GHWPARAMS4_[28-31] ,DWC_USB3_BMU_LSP_DEPTH" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. " [24-27] ,DWC_USB3_BMU_PTL_DEPTH-1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 23. " [23] ,DWC_USB3_EN_ISOC_SUPT" "0,1" bitfld.long 0x00 21. " [21] ,DWC_USB3_EXT_BUFF_CONTROL" "0,1" textline " " bitfld.long 0x00 17.--20. " [17-20] ,DWC_USB3_NUM_SS_USB_INSTANCES" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 13.--16. " [13-16] ,Number of external scratchpad buffers" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12. " [12] ,DWC_USB3_EN_SSIC" "0,1" bitfld.long 0x00 11. " [11] ,Synopsys M-PHY or a Third-Party M-PHY is used with SSIC ports" "Synopsys,Third-party" textline " " bitfld.long 0x00 9.--10. " [9-10] ,DWC_USB3_SSIC_GEAR parameter" ",HS-G1,HS-G2,HS-G3" bitfld.long 0x00 7.--8. " [7-8] ,DWC_USB3_SSIC_NUM_LANE parameter value" ",1 lane,?..." bitfld.long 0x00 0.--5. " [0-5] ,DWC_USB3_CACHE_TRBS_PER_TRANSFER" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "GHWPARAMS5,Global Hardware Parameters Register 5" bitfld.long 0x04 22.--27. " GHWPARAMS5_[22-27] ,DWC_USB3_DFQ_FIFO_DEPTH" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 16.--21. " [16-21] ,DWC_USB3_DWQ_FIFO_DEPTH" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 10.--15. " [10-15] ,DWC_USB3_TXQ_FIFO_DEPTH" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 4.--9. " [4-9] ,DWC_USB3_RXQ_FIFO_DEPTH" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x04 0.--3. " [0-3] ,DWC_USB3_BMU_BUSGM_DEPTH" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " line.long 0x08 "GHWPARAMS6,Global Hardware Parameters Register 6" hexmask.long.word 0x08 16.--31. 1. " GHWPARAMS6_31_16 ,DWC_USB3_RAM0_DEPTH" bitfld.long 0x08 15. " BUSFLTRSSUPPORT ,DWC_USB3_EN_BUS_FILTERS" "0,1" bitfld.long 0x08 14. " BCSUPPORT ,DWC_USB3_EN_BC" "0,1" bitfld.long 0x08 13. " OTG_SS_SUPPORT ,OTG 3.0 support enabled" "Disabled,Enabled" textline " " bitfld.long 0x08 12. " ADPSUPPORT ,DWC_USB3_EN_ADP" "0,1" bitfld.long 0x08 11. " HNPSUPPORT ,RSP/HNP support enabled" "Disabled,Enabled" bitfld.long 0x08 10. " SRPSUPPORT ,SRP support enabled" "Disabled,Enabled" bitfld.long 0x08 7. " GHWPARAMS6_7 ,DWC_USB3_EN_FPGA" "0,1" textline " " bitfld.long 0x08 6. " GHWPARAMS6_6 ,DWC_USB3_EN_DBG_PORTS" "0,1" bitfld.long 0x08 0.--5. " GHWPARAMS6_5_0 ,DWC_USB3_PSQ_FIFO_DEPTH" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x0C "GHWPARAMS7,Global Hardware Parameters Register 7" hexmask.long.word 0x0C 16.--31. 1. " GHWPARAMS7_31_16 ,DWC_USB3_RAM2_DEPTH" hexmask.long.word 0x0C 0.--15. 1. " GHWPARAMS7_15_0 ,DWC_USB3_RAM1_DEPTH" group.long 0xC160++0x03 line.long 0x00 "GDBGFIFOSPACE,Global Debug Queue/FIFO Space Available Register" hexmask.long.word 0x00 16.--31. 1. " SPACE_AVAILABLE ,Space available" hexmask.long.word 0x00 0.--8. 1. " FIFO_QUEUE_SELECT ,FIFO/queue select" rgroup.long 0xC164++0x03 line.long 0x00 "GDBGLTSSM,Global Debug LTSSM Register" bitfld.long 0x00 30. " RXELECIDLE ,RX elecidle" "0,1" bitfld.long 0x00 29. " X3_XS_SWAPPING ,X3_XS_SWAPPING" "0,1" bitfld.long 0x00 28. " X3_DS_HOST_SHUTDOWN ,X3_DS_HOST_SHUTDOWN" "0,1" bitfld.long 0x00 27. " PRTDIRECTION ,Port direction" "Upstream,Downstream" textline " " bitfld.long 0x00 26. " LTDBTIMEOUT ,LTDB timeout" "0,1" bitfld.long 0x00 22.--25. " LTDBLINKSTATE ,LTDB link state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 18.--21. " LTDBSUBSTATE ,LTDB Sub-State" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 17. " ELASTICBUFFERMODE ,Elastic buffer mode" "0,1" textline " " bitfld.long 0x00 16. " TXELECLDLE ,TX elec idle" "0,1" bitfld.long 0x00 15. " RXPOLARITY ,RX polarity" "0,1" bitfld.long 0x00 14. " TXDETRXLOOPBACK ,TX detect rx/loopback" "0,1" bitfld.long 0x00 11.--13. " LTDBPHYCMDSTATE ,LTSSM PHY command state" "PHY_IDLE,PHY_DET,PHY_DET_3,PHY_PWR_DLY,PHY_PWR_A,PHY_PWR_B,?..." textline " " bitfld.long 0x00 9.--10. " POWERDOWN ,POWERDOWN" "0,1,2,3" bitfld.long 0x00 8. " RXEQTRAIN ,Rxeq train" "0,1" bitfld.long 0x00 6.--7. " TXDEEMPHASIS ,TXDEEMPHASIS" "0,1,2,3" bitfld.long 0x00 3.--5. " LTDBCLKSTATE ,LTSSM clock state" "CLK_NORM,CLK_TO_P3,CLK_WAIT1,CLK_P3,CLK_TO_P0,CLK_WAIT2,?..." textline " " bitfld.long 0x00 2. " TXSWING ,TX swing" "0,1" bitfld.long 0x00 1. " RXTERMINATION ,RX termination" "0,1" bitfld.long 0x00 0. " TXONESZEROS ,TX ones/zeros" "0,1" rgroup.long 0xC168++0x07 line.long 0x00 "GDBGLNMCC,Global Debug LNMCC Register" hexmask.long.word 0x00 0.--8. 1. " LNMCC_BERC ,Error rate information for the port selected in the GDBGFIFOSPACE" line.long 0x04 "GDBGBMU,Global Debug BMU Register" hexmask.long.tbyte 0x04 8.--31. 1. " BMU_BCU ,BMU_BCU debug information" bitfld.long 0x04 4.--7. " BMU_DCU ,BMU_DCU debug information" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. " BMU_CCU ,BMU_CCU debug information" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0xC170++0x03 line.long 0x00 "GDBGLSPMUX_HST,Internal Global Debug LSP MUX Register" hexmask.long.byte 0x00 16.--23. 1. " LOGIC_ANALYZER_TRACE ,LOGIC_ANALYZER_TRACE port MUX select" hexmask.long.word 0x00 0.--13. 1. " HOSTSELECT ,Device LSP select selects" rgroup.long 0xC174++0x0B line.long 0x00 "GDBGLSP,Global Debug LSP Register" line.long 0x04 "GDBGEPINFO0,Global Debug Endpoint Information Register 0" line.long 0x08 "GDBGEPINFO1,Global Debug Endpoint Information Register 1" rgroup.long 0xC180++0x07 line.long 0x00 "GPRTBIMAP_HSLO,High Speed Port To Bus Instance Mapping Register" bitfld.long 0x00 28.--31. " BINUM_[8] ,HS USB instance number for port 8 Application-programmable ID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. " [7] ,HS USB instance number for port 7 Application-programmable ID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. " [6] ,HS USB instance number for port 6 Application-programmable ID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " [5] ,HS USB instance number for port 5 Application-programmable ID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " [4] ,HS USB instance number for port 4 Application-programmable ID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " [3] ,HS USB instance number for port 3 Application-programmable ID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " [2] ,HS USB instance number for port 2 Application-programmable ID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " [1] ,HS USB instance number for port 1 Application-programmable ID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "GPRTBIMAP_HSHI,Global Port High Speed To Bus Instance Mapping Register" bitfld.long 0x04 24.--27. " BINUM_[15] ,HS USB instance number for port 15 Application-programmable ID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 20.--23. " [14] ,HS USB instance number for port 14 Application-programmable ID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 16.--19. " [13] ,HS USB instance number for port 13 Application-programmable ID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 12.--15. " [12] ,HS USB instance number for port 12 Application-programmable ID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 8.--11. " [11] ,HS USB instance number for port 11 Application-programmable ID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 4.--7. " [10] ,HS USB instance number for port 10 Application-programmable ID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. " [9] ,HS USB instance number for port 9 Application-programmable ID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0xC188++0x03 line.long 0x00 "GPRTBIMAP_FSLO,Full Speed Port To Bus Instance Mapping Register" rbitfld.long 0x00 28.--31. " BINUM_[8] ,FS USB instance number for port 8 Application-programmable ID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x00 24.--27. " [7] ,FS USB instance number for port 7 Application-programmable ID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x00 20.--23. " [6] ,FS USB instance number for port 6 Application-programmable ID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x00 16.--19. " [5] ,FS USB instance number for port 5 Application-programmable ID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x00 12.--15. " [4] ,FS USB instance number for port 4 Application-programmable ID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x00 8.--11. " [3] ,FS USB instance number for port 3 Application-programmable ID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x00 4.--7. " [2] ,FS USB instance number for port 2 Application-programmable ID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " [1] ,FS USB instance number for port 1 Application-programmable ID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long 0xC18C++0x03 line.long 0x00 "GPRTBIMAP_FSHI,Full Speed Port To Bus Instance Mapping Register" bitfld.long 0x00 24.--27. " BINUM_[15] ,FS USB instance number for port 15 Application-programmable ID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. " [14] ,FS USB instance number for port 14 Application-programmable ID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " [13] ,FS USB instance number for port 13 Application-programmable ID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " [12] ,FS USB instance number for port 12 Application-programmable ID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " [11] ,FS USB instance number for port 11 Application-programmable ID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " [10] ,FS USB instance number for port 10 Application-programmable ID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " [9] ,FK USB instance number for port 9 Application-programmable ID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " if (((d.l(ad:0xFE300000+0xC118))&0x01)==0x00) if (((d.l(ad:0xFE300000+0xC14C))&0x0C)==(0x0C||0x08)) group.long 0xC200++0x03 line.long 0x00 "GUSB2PHYCFG,Global USB2 PHY Configuration Register" bitfld.long 0x00 31. " PHYSOFTRST ,PHY soft reset" "No reset,Reset" bitfld.long 0x00 30. " U2_FREECLK_EXISTS ,Free-running PHY clock existence" "Not exist,Exist" textfld " " rbitfld.long 0x00 27.--28. " HSIC_CON_WIDTH_ADJ ,Connect duration for the HSIC" "0,1,2,3" textline " " rbitfld.long 0x00 26. " INV_SEL_HSIC ,HSIC enable" "Disabled,Enabled" bitfld.long 0x00 18. " ULPIEXTVBUSIND ,ULPI external VBUS indicator" "Internal,External" textline " " bitfld.long 0x00 17. " ULPIEXTVBUSDRV ,ULPI external VBUS drive" "Internal,External" bitfld.long 0x00 15. " ULPIAUTORES ,ULPI auto resume" "Disabled,Enabled" bitfld.long 0x00 10.--13. " USBTRDTIM ,USB 2.0 turnaround time" ",,,,,16-bit UTMI+,,,,8-bit UTMI+/ULPI,?..." bitfld.long 0x00 9. " XCVRDLY ,Transceiver delay" "No delay,Delay" textline " " bitfld.long 0x00 8. " ENBLSLPM ,Enable UTMI sleep" "Disabled,Enabled" bitfld.long 0x00 7. " PHYSEL ,USB 2.0 High-Speed PHY or USB 1.1 Full-Speed serial transceiver select" "High-speed,?..." bitfld.long 0x00 6. " SUSPENDUSB20 ,Suspend USB2.0 HS/FS/LS PHY" "Not suspended,Suspended" rbitfld.long 0x00 5. " FSINTF ,Full-Speed serial interface select" "6-pin,3-pin" textline " " rbitfld.long 0x00 4. " ULPI_UTMI_SEL ,ULPI or UTMI+ select" "UTMI+,ULPI" bitfld.long 0x00 3. " PHYIF ,PHY interface" "8 bits,16 bits" bitfld.long 0x00 0.--2. " TOUTCAL ,HS/FS timeout calibration" "0,1,2,3,4,5,6,7" else group.long 0xC200++0x03 line.long 0x00 "GUSB2PHYCFG,Global USB2 PHY Configuration Register" bitfld.long 0x00 31. " PHYSOFTRST ,PHY soft reset" "No reset,Reset" bitfld.long 0x00 30. " U2_FREECLK_EXISTS ,Free-running PHY clock existence" "Not exist,Exist" textfld " " rbitfld.long 0x00 27.--28. " HSIC_CON_WIDTH_ADJ ,Connect duration for the HSIC" "0,1,2,3" textline " " rbitfld.long 0x00 26. " INV_SEL_HSIC ,HSIC enable" "Disabled,Enabled" textline " " textfld " " bitfld.long 0x00 10.--13. " USBTRDTIM ,USB 2.0 turnaround time" ",,,,,16-bit UTMI+,,,,8-bit UTMI+/ULPI,?..." bitfld.long 0x00 9. " XCVRDLY ,Transceiver delay" "No delay,Delay" textline " " bitfld.long 0x00 8. " ENBLSLPM ,Enable UTMI sleep" "Disabled,Enabled" bitfld.long 0x00 7. " PHYSEL ,USB 2.0 High-Speed PHY or USB 1.1 Full-Speed serial transceiver select" "High-speed,?..." bitfld.long 0x00 6. " SUSPENDUSB20 ,Suspend USB2.0 HS/FS/LS PHY" "Not suspended,Suspended" rbitfld.long 0x00 5. " FSINTF ,Full-Speed serial interface select" "6-pin,3-pin" textline " " rbitfld.long 0x00 4. " ULPI_UTMI_SEL ,ULPI or UTMI+ select" "UTMI+,ULPI" bitfld.long 0x00 3. " PHYIF ,PHY interface" "8 bits,16 bits" bitfld.long 0x00 0.--2. " TOUTCAL ,HS/FS timeout calibration" "0,1,2,3,4,5,6,7" endif else if (((d.l(ad:0xFE300000+0xC14C))&0x0C)==(0x0C||0x08)) group.long 0xC200++0x03 line.long 0x00 "GUSB2PHYCFG,Global USB2 PHY Configuration Register" bitfld.long 0x00 31. " PHYSOFTRST ,PHY soft reset" "No reset,Reset" bitfld.long 0x00 30. " U2_FREECLK_EXISTS ,Free-running PHY clock existence" "Not exist,Exist" bitfld.long 0x00 29. " ULPI_LPM_OPMODE_CHK ,Support the LPM over ULPI without NOPID token to the ULPI PHY" "Not supported,Supported" rbitfld.long 0x00 27.--28. " HSIC_CON_WIDTH_ADJ ,Connect duration for the HSIC" "0,1,2,3" textline " " rbitfld.long 0x00 26. " INV_SEL_HSIC ,HSIC enable" "Disabled,Enabled" bitfld.long 0x00 22.--24. " LSTRD ,LS turnaround time" "2 bit,2.5 bit,3 bit,3.5 bit,4 bit,4.5 bit,5 bit,5.5 bit" bitfld.long 0x00 19.--21. " LSIPD ,LS Inter-Packet time" "2 bit,2.5 bit,3 bit,3.5 bit,4 bit,4.5 bit,5 bit,5.5 bit" bitfld.long 0x00 18. " ULPIEXTVBUSIND ,ULPI external VBUS indicator" "Internal,External" textline " " bitfld.long 0x00 17. " ULPIEXTVBUSDRV ,ULPI external VBUS drive" "Internal,External" bitfld.long 0x00 15. " ULPIAUTORES ,ULPI auto resume" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " ENBLSLPM ,Enable UTMI sleep" "Disabled,Enabled" bitfld.long 0x00 7. " PHYSEL ,USB 2.0 High-Speed PHY or USB 1.1 Full-Speed serial transceiver select" "High-speed,?..." bitfld.long 0x00 6. " SUSPENDUSB20 ,Suspend USB2.0 HS/FS/LS PHY" "Not suspended,Suspended" rbitfld.long 0x00 5. " FSINTF ,Full-Speed serial interface select" "6-pin,3-pin" textline " " rbitfld.long 0x00 4. " ULPI_UTMI_SEL ,ULPI or UTMI+ select" "UTMI+,ULPI" bitfld.long 0x00 3. " PHYIF ,PHY interface" "8 bits,16 bits" bitfld.long 0x00 0.--2. " TOUTCAL ,HS/FS timeout calibration" "0,1,2,3,4,5,6,7" else group.long 0xC200++0x03 line.long 0x00 "GUSB2PHYCFG,Global USB2 PHY Configuration Register" bitfld.long 0x00 31. " PHYSOFTRST ,PHY soft reset" "No reset,Reset" bitfld.long 0x00 30. " U2_FREECLK_EXISTS ,Free-running PHY clock existence" "Not exist,Exist" textfld " " rbitfld.long 0x00 27.--28. " HSIC_CON_WIDTH_ADJ ,Connect duration for the HSIC" "0,1,2,3" textline " " rbitfld.long 0x00 26. " INV_SEL_HSIC ,HSIC enable" "Disabled,Enabled" bitfld.long 0x00 22.--24. " LSTRD ,LS turnaround time" "2 bit,2.5 bit,3 bit,3.5 bit,4 bit,4.5 bit,5 bit,5.5 bit" bitfld.long 0x00 19.--21. " LSIPD ,LS Inter-Packet time" "2 bit,2.5 bit,3 bit,3.5 bit,4 bit,4.5 bit,5 bit,5.5 bit" textline " " textline " " bitfld.long 0x00 8. " ENBLSLPM ,Enable UTMI sleep" "Disabled,Enabled" bitfld.long 0x00 7. " PHYSEL ,USB 2.0 High-Speed PHY or USB 1.1 Full-Speed serial transceiver select" "High-speed,?..." bitfld.long 0x00 6. " SUSPENDUSB20 ,Suspend USB2.0 HS/FS/LS PHY" "Not suspended,Suspended" rbitfld.long 0x00 5. " FSINTF ,Full-Speed serial interface select" "6-pin,3-pin" textline " " rbitfld.long 0x00 4. " ULPI_UTMI_SEL ,ULPI or UTMI+ select" "UTMI+,ULPI" bitfld.long 0x00 3. " PHYIF ,PHY interface" "8 bits,16 bits" bitfld.long 0x00 0.--2. " TOUTCAL ,HS/FS timeout calibration" "0,1,2,3,4,5,6,7" endif endif if (((d.l(ad:0xFE300000+0xC200))&0x10)==0x10) group.long 0xC280++0x03 line.long 0x00 "GUSB2PACC_ULPI,GUSB2PHYACC_ULPI" rbitfld.long 0x00 26. " DISUIPIDRVR ,DISUIPIDRVR" "0,1" bitfld.long 0x00 25. " NEWREGREQ ,New register request" "Not requested,Requested" rbitfld.long 0x00 24. " VSTSDONE ,VSTSDONE" "0,1" bitfld.long 0x00 23. " VSTSBSY ,VSTSBSY" "0,1" textline " " bitfld.long 0x00 22. " REGWR ,Register write" "Read,Write" bitfld.long 0x00 16.--21. " REGADDR ,Register address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x00 8.--15. 0x01 " EXTREGADDR ,EXTREGADDR" hexmask.long.byte 0x00 0.--7. 1. " REGDATA ,Register data" else group.long 0xC280++0x03 line.long 0x00 "GUSB2PACC_ULPI,GUSB2PHYACC_ULPI" rbitfld.long 0x00 26. " DISUIPIDRVR ,DISUIPIDRVR" "0,1" bitfld.long 0x00 25. " NEWREGREQ ,New register request" "Not requested,Requested" rbitfld.long 0x00 24. " VSTSDONE ,VSTSDONE" "0,1" bitfld.long 0x00 23. " VSTSBSY ,VSTSBSY" "0,1" textline " " textfld " " hexmask.long.byte 0x00 8.--15. 0x01 " EXTREGADDR ,EXTREGADDR" hexmask.long.byte 0x00 0.--7. 1. " REGDATA ,Register data" endif if (((d.l(ad:0xFE300000+0xC150))&0x1000)==0x1000) group.long 0xC2C0++0x03 line.long 0x00 "GUSB3PIPECTL,Global USB3 PIPE Control" bitfld.long 0x00 31. " PHYSOFTRST ,PHY soft reset" "No reset,Reset" bitfld.long 0x00 30. " HSTPRTCMPL ,Enables placing the SS port link into a compliance state" "Disabled,Enabled" bitfld.long 0x00 29. " U2SSINACTP3OK ,P3 OK for u2/ssinactive" "P2,P3" bitfld.long 0x00 28. " DISRXDETP3 ,Disabled receiver detection in P3" "No,Yes" textline " " bitfld.long 0x00 27. " UX_EXIT_IN_PX ,Ux exit in px" "P0,P1/P2/P3" bitfld.long 0x00 26. " PING_ENH_EN ,Ping enhancement enable" "Disabled,Enabled" bitfld.long 0x00 25. " U1U2EXITF_RCV ,U1U2 exit fail to recovery" "Disabled,Enabled" bitfld.long 0x00 24. " REQUEST_P1P2P3 ,Control the systematic request of P1/P2/P3 for U1/U2/U3" "Not requested,Requested" textline " " bitfld.long 0x00 23. " STARTRXDETU3RXDET ,Start receiver detection in u3/rx.detect" "Disabled,Enabled" bitfld.long 0x00 22. " DISRXDETU3RXD ,Disable receiver detection in u3/rx.detect" "No,Yes" bitfld.long 0x00 19.--21. " P1P2P3DELAY ,Delay P1P2P3" "0,1,2,3,4,5,6,7" bitfld.long 0x00 18. " DELAYP1TRANS ,Delay PHY power change from P0 to P1/P2/P3" "Not checking,Checking" textline " " bitfld.long 0x00 17. " SUSPENDENABLE ,Suspend enable for USB3.0 SS PHY" "Disabled,Enabled" rbitfld.long 0x00 15.--16. " DATWIDTH ,PIPE data width" "32 bits,16 bits,8 bits,?..." bitfld.long 0x00 14. " ABORTRXDETINU2 ,Abort RX detect in U2" "Not aborted,Aborted" bitfld.long 0x00 13. " SKIPRXDET ,Skip RX detect" "Not skipped,Skipped" textline " " bitfld.long 0x00 12. " LFPSP0ALGN ,LFPS P0 align" "Not asserted,Asserted" bitfld.long 0x00 11. " P3P2TRANOK ,P3-to-P2 transitions OK" "Not ok,Ok" bitfld.long 0x00 10. " P3EXSIGP2 ,P3 exit signal in P2" "Not changed,Changed" bitfld.long 0x00 9. " LFPSFILT ,LFPS filter" "Not ignored,Ignored" textline " " bitfld.long 0x00 8. " RX_DET_LFPSC ,Disable a 400us delay to start polling LFPS after RX_DETECT" "No,Yes" bitfld.long 0x00 7. " SSICEN ,USB3 SSIC enable" "Disabled,Enabled" bitfld.long 0x00 6. " TXSWING ,TX swing" "0,1" bitfld.long 0x00 3.--5. " TXMARGIN ,TX margin" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 1.--2. " TXDEEMPHASIS ,TX deemphasis" "0,1,2,3" bitfld.long 0x00 0. " ELASTICBUFMODE ,Elastic buffer mode" "0,1" else group.long 0xC2C0++0x03 line.long 0x00 "GUSB3PIPECTL,Global USB3 PIPE Control" bitfld.long 0x00 31. " PHYSOFTRST ,PHY soft reset" "No reset,Reset" bitfld.long 0x00 30. " HSTPRTCMPL ,Enables placing the SS port link into a compliance state" "Disabled,Enabled" bitfld.long 0x00 29. " U2SSINACTP3OK ,P3 OK for u2/ssinactive" "P2,P3" bitfld.long 0x00 28. " DISRXDETP3 ,Disabled receiver detection in P3" "No,Yes" textline " " bitfld.long 0x00 27. " UX_EXIT_IN_PX ,Ux exit in px" "P0,P1/P2/P3" bitfld.long 0x00 26. " PING_ENH_EN ,Ping enhancement enable" "Disabled,Enabled" bitfld.long 0x00 25. " U1U2EXITF_RCV ,U1u2exitfail to recovery" "Disabled,Enabled" bitfld.long 0x00 24. " REQUEST_P1P2P3 ,Control the systematic request of P1/P2/P3 for U1/U2/U3" "Not requested,Requested" textline " " bitfld.long 0x00 23. " STARTRXDETU3RXDET ,Start receiver detection in u3/rx.detect" "Disabled,Enabled" bitfld.long 0x00 22. " DISRXDETU3RXD ,Disable receiver detection in u3/rx.det" "No,Yes" bitfld.long 0x00 19.--21. " P1P2P3DELAY ,Delay P1P2P3" "0,1,2,3,4,5,6,7" bitfld.long 0x00 18. " DELAYP1TRANS ,Delay PHY power change from P0 to P1/P2/P3" "Not checking,Checking" textline " " bitfld.long 0x00 17. " SUSPENDENABLE ,Suspend enable for USB3.0 SS PHY" "Disabled,Enabled" rbitfld.long 0x00 15.--16. " DATWIDTH ,PIPE data width" "32 bits,16 bits,8 bits,?..." bitfld.long 0x00 14. " ABORTRXDETINU2 ,Abort RX detect in U2" "Not aborted,Aborted" bitfld.long 0x00 13. " SKIPRXDET ,Skip RX detect" "Not skipped,Skipped" textline " " bitfld.long 0x00 12. " LFPSP0ALGN ,LFPS P0 align" "Not asserted,Asserted" bitfld.long 0x00 11. " P3P2TRANOK ,P3-to-P2 transitions OK" "Not ok,Ok" bitfld.long 0x00 10. " P3EXSIGP2 ,P3 exit signal in P2" "Not changed,Changed" bitfld.long 0x00 9. " LFPSFILT ,LFPS filter" "Not ignored,Ignored" textline " " bitfld.long 0x00 8. " RX_DET_LFPSC ,Disable a 400us delay to start polling LFPS after RX_DETECT" "No,Yes" textfld " " bitfld.long 0x00 6. " TXSWING ,TX swing" "0,1" bitfld.long 0x00 3.--5. " TXMARGIN ,TX margin" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 1.--2. " TXDEEMPHASIS ,TX deemphasis" "0,1,2,3" bitfld.long 0x00 0. " ELASTICBUFMODE ,Elastic buffer mode" "0,1" endif group.long 0xC300++0x03 line.long 0x00 "GTXFIFOSIZ0,Global Transmit FIFO Size 0 FIFO Mapping In RAM1" hexmask.long.word 0x00 16.--31. 1. " TXFSTADDR ,Transmit FIFO RAM start address" hexmask.long.word 0x00 0.--15. 1. " TXFDEP ,Transmit FIFO depth" group.long 0xC304++0x03 line.long 0x00 "GTXFIFOSIZ1,Global Transmit FIFO Size 1 FIFO Mapping In RAM1" hexmask.long.word 0x00 16.--31. 1. " TXFSTADDR ,Transmit FIFO RAM start address" hexmask.long.word 0x00 0.--15. 1. " TXFDEP ,Transmit FIFO depth" group.long 0xC308++0x03 line.long 0x00 "GTXFIFOSIZ2,Global Transmit FIFO Size 2 FIFO Mapping In RAM1" hexmask.long.word 0x00 16.--31. 1. " TXFSTADDR ,Transmit FIFO RAM start address" hexmask.long.word 0x00 0.--15. 1. " TXFDEP ,Transmit FIFO depth" group.long 0xC30C++0x03 line.long 0x00 "GTXFIFOSIZ3,Global Transmit FIFO Size 3 FIFO Mapping In RAM1" hexmask.long.word 0x00 16.--31. 1. " TXFSTADDR ,Transmit FIFO RAM start address" hexmask.long.word 0x00 0.--15. 1. " TXFDEP ,Transmit FIFO depth" group.long 0xC310++0x03 line.long 0x00 "GTXFIFOSIZ4,Global Transmit FIFO Size 4 FIFO Mapping In RAM1" hexmask.long.word 0x00 16.--31. 1. " TXFSTADDR ,Transmit FIFO RAM start address" hexmask.long.word 0x00 0.--15. 1. " TXFDEP ,Transmit FIFO depth" group.long 0xC314++0x03 line.long 0x00 "GTXFIFOSIZ5,Global Transmit FIFO Size 5 FIFO Mapping In RAM1" hexmask.long.word 0x00 16.--31. 1. " TXFSTADDR ,Transmit FIFO RAM start address" hexmask.long.word 0x00 0.--15. 1. " TXFDEP ,Transmit FIFO depth" group.long 0xC380++0x0B line.long 0x00 "GRXFIFOSIZ0,Global Receive FIFO Size 0 FIFO Mapping In RAM0" hexmask.long.word 0x00 16.--31. 1. " RXFSTADDR ,Receive FIFO RAM start address" hexmask.long.word 0x00 0.--15. 1. " RXFDEP ,Receive FIFO depth" line.long 0x04 "GRXFIFOSIZ1,Global Receive FIFO Size 1 FIFO Mapping In RAM0" hexmask.long.word 0x04 16.--31. 1. " RXFSTADDR ,Receive FIFO RAM start address" hexmask.long.word 0x04 0.--15. 1. " RXFDEP ,Receive FIFO depth" line.long 0x08 "GRXFIFOSIZ2,Global Receive FIFO Size 2 FIFO Mapping In RAM0" hexmask.long.word 0x08 16.--31. 1. " RXFSTADDR ,Receive FIFO RAM start address" hexmask.long.word 0x08 0.--15. 1. " RXFDEP ,Receive FIFO depth" group.long 0xC400++0x0F line.long 0x00 "GEVNTADRLO_0,Global Event Buffer Address (Low) Register" line.long 0x04 "GEVNTADRHI_0,Global Event Buffer Address (High) Register" line.long 0x08 "GEVNTSIZ_0,Global Event Buffer Size Register" bitfld.long 0x08 31. " EVNTINTRPTMASK ,Event interrupt mask" "Not masked,Masked" hexmask.long.word 0x08 0.--15. 1. " EVENTSIZ ,Event buffer size" line.long 0x0C "GEVNTCOUNT_0,Global Event Buffer Count Register" hexmask.long.word 0x0C 0.--15. 1. " EVNTCOUNT ,Event count" group.long 0xC410++0x0F line.long 0x00 "GEVNTADRLO_1,Global Event Buffer Address (Low) Register" line.long 0x04 "GEVNTADRHI_1,Global Event Buffer Address (High) Register" line.long 0x08 "GEVNTSIZ_1,Global Event Buffer Size Register" bitfld.long 0x08 31. " EVNTINTRPTMASK ,Event interrupt mask" "Not masked,Masked" hexmask.long.word 0x08 0.--15. 1. " EVENTSIZ ,Event buffer size" line.long 0x0C "GEVNTCOUNT_1,Global Event Buffer Count Register" hexmask.long.word 0x0C 0.--15. 1. " EVNTCOUNT ,Event count" group.long 0xC420++0x0F line.long 0x00 "GEVNTADRLO_2,Global Event Buffer Address (Low) Register" line.long 0x04 "GEVNTADRHI_2,Global Event Buffer Address (High) Register" line.long 0x08 "GEVNTSIZ_2,Global Event Buffer Size Register" bitfld.long 0x08 31. " EVNTINTRPTMASK ,Event interrupt mask" "Not masked,Masked" hexmask.long.word 0x08 0.--15. 1. " EVENTSIZ ,Event buffer size" line.long 0x0C "GEVNTCOUNT_2,Global Event Buffer Count Register" hexmask.long.word 0x0C 0.--15. 1. " EVNTCOUNT ,Event count" group.long 0xC430++0x0F line.long 0x00 "GEVNTADRLO_3,Global Event Buffer Address (Low) Register" line.long 0x04 "GEVNTADRHI_3,Global Event Buffer Address (High) Register" line.long 0x08 "GEVNTSIZ_3,Global Event Buffer Size Register" bitfld.long 0x08 31. " EVNTINTRPTMASK ,Event interrupt mask" "Not masked,Masked" hexmask.long.word 0x08 0.--15. 1. " EVENTSIZ ,Event buffer size" line.long 0x0C "GEVNTCOUNT_3,Global Event Buffer Count Register" hexmask.long.word 0x0C 0.--15. 1. " EVNTCOUNT ,Event count" rgroup.long 0xC600++0x03 line.long 0x00 "GHWPARAMS8,Global Hardware Parameters 8" if (((d.l(ad:0xFE300000+0xC118))&0x01)==0x00) group.long 0xC610++0x03 line.long 0x00 "GTXFIFOPRIDEV,Global Device TX FIFO DMA Priority Register" bitfld.long 0x00 5. " GTXFIFOPRIDEV_[5] ,Device TXFIFO priority 5" "Low,High" bitfld.long 0x00 4. " [4] ,Device TXFIFO priority 4" "Low,High" bitfld.long 0x00 3. " [3] ,Device TXFIFO priority 3" "Low,High" bitfld.long 0x00 2. " [2] ,Device TXFIFO priority 2" "Low,High" bitfld.long 0x00 1. " [1] ,Device TXFIFO priority 1" "Low,High" bitfld.long 0x00 0. " [0] ,Device TXFIFO priority 0" "Low,High" else hgroup.long 0xC610++0x03 hide.long 0x00 "GTXFIFOPRIDEV,Global Device TX FIFO DMA Priority Register" endif if (((d.l(ad:0xFE300000+0xC118))&0x01)==0x01) group.long 0xC618++0x0F line.long 0x00 "GTXFIFOPRIHST,Global Host TX FIFO DMA Priority Register" bitfld.long 0x00 3. " GTXFIFOPRIHST_[3] ,Host TX FIFO priority" "Low,High" bitfld.long 0x00 2. " [2] ,Host TX FIFO priority" "Low,High" bitfld.long 0x00 1. " [1] ,Host TX FIFO priority" "Low,High" bitfld.long 0x00 0. " [0] ,Host TX FIFO priority" "Low,High" line.long 0x04 "GRXFIFOPRIHST,Global Host RX FIFO DMA Priority Register" bitfld.long 0x04 2. " GRXFIFOPRIHST_[2] ,Host RX FIFO priority" "Low,High" bitfld.long 0x04 1. " [1] ,Host RX FIFO priority" "Low,High" bitfld.long 0x04 0. " [0] ,Host RX FIFO priority" "Low,High" textline " " line.long 0x08 "GFIFOPRIDBC,Global Host Debug Capability DMA Priority Register" bitfld.long 0x08 0.--1. " GFIFOPRIDBC ,Host dbc DMA priority" ",Normal,Low,High" line.long 0x0C "GDMAHLRATIO,Global Host FIFO DMA High-Low Priority Ratio Register" bitfld.long 0x0C 8.--12. " HSTRXFIFO ,Host RXFIFO DMA High-Low priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0C 0.--4. " HSTTXFIFO ,Host TXFIFO DMA High-Low priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else hgroup.long 0xC618++0x0F hide.long 0x00 "GTXFIFOPRIHST,Global Host TX FIFO DMA Priority Register" hide.long 0x04 "GRXFIFOPRIHST,Global Host RX FIFO DMA Priority Register" textline " " hide.long 0x08 "GFIFOPRIDBC,Global Host Debug Capability DMA Priority Register" hide.long 0x0C "GDMAHLRATIO,Global Host FIFO DMA High-Low Priority Ratio Register" endif group.long 0xC630++0x03 line.long 0x00 "GFLADJ,Global Frame Length Adjustment Register" bitfld.long 0x00 31. " REFCLK_DECR_PLS1 ,Fractional component of 240/REF_FREQUENCY is greater than or equal to 0.5" "Below,>=0.5" hexmask.long.byte 0x00 24.--30. 1. " REFCLK_240MHZ_DECR ,Decrement value that the controller applies for each REF_CLK" bitfld.long 0x00 23. " REFCLK_LPM_SEL ,Enable the functionality of running SOF/ITP counters on the REF_CLK" "Disabled,Enabled" hexmask.long.word 0x00 8.--21. 1. " REFCLK_FLADJ ,Frame length adjustment" textline " " bitfld.long 0x00 7. " 30MHZ_SDBND_SEL ,Selects whether to use the input signal FLADJ_30MHZ_REG or the GFLADJ" "FLADJ_30MHZ_REG,GFLADJ_30MHZ" bitfld.long 0x00 0.--5. " 30MHZ ,Frame length adjustment" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" if (((d.l(ad:0xFE300000+0xC118))&0x01)==0x01)&&(((d.l(ad:0xFE300000+0x930))&0x80000000)==0x80000000) group.long 0xC700++0x03 "Device Registers" line.long 0x00 "DCFG,Device Configuration Register" bitfld.long 0x00 23. " IGNSTRMPP ,Ignore stream PP" "Not ignored,Ignored" bitfld.long 0x00 22. " LPMCAP ,LPM capable enable" "Disabled,Enabled" bitfld.long 0x00 17.--21. " NUMP ,Number of receive buffers" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 12.--16. " INTRNUM ,Interrupt/eventq number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " hexmask.long.word 0x00 3.--9. 0x08 " DEVADDR ,Device address" bitfld.long 0x00 0.--2. " DEVSPD ,Device speed" "High-speed,Full-speed,,,Superspeed,?..." else group.long 0xC700++0x03 "Device Registers" line.long 0x00 "DCFG,Device Configuration Register" bitfld.long 0x00 23. " IGNSTRMPP ,Ignore stream PP" "Not ignored,Ignored" bitfld.long 0x00 22. " LPMCAP ,LPM capable enable" "Disabled,Enabled" textfld " " bitfld.long 0x00 12.--16. " INTRNUM ,Interrupt/eventq number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " hexmask.long.word 0x00 3.--9. 0x08 " DEVADDR ,Device address" bitfld.long 0x00 0.--2. " DEVSPD ,Device speed" "High-speed,Full-speed,,,Superspeed,?..." endif group.long 0xC704++0x07 line.long 0x00 "DCTL,Device Control Register" bitfld.long 0x00 31. " RUNSTOP ,Stop/run" "Stopped,Started" bitfld.long 0x00 30. " CSFTRST ,Core soft reset" "No reset,Reset" bitfld.long 0x00 28. " HIRDTHRES_4 ,Host-initiated resume duration (Hird) threshold assertion enable" "Disabled,Enabled" bitfld.long 0x00 24.--27. " HIRDTHRES_TIME ,HIRD threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 20.--23. " LPM_NYET_THR ,LPM NYET threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 19. " KEEPCONNECT ,Enable save and restore programming model by preventing the core from disconnecting from the host" "Disabled,Enabled" bitfld.long 0x00 18. " L1HIBERNATIONEN ,L1 hibernation enable" "Disabled,Enabled" bitfld.long 0x00 17. " CRS ,Controller restore state" "Not restored,Restored" textline " " bitfld.long 0x00 16. " CSS ,Controller save state" "Not saved,Saved" bitfld.long 0x00 12. " INITU2ENA ,Initiate U2 enable" "Disabled,Enabled" bitfld.long 0x00 11. " ACCEPTU2ENA ,Accept U2 enable" "Disabled,Enabled" bitfld.long 0x00 10. " INITU1ENA ,Initiate U1 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " ACCEPTU1ENA ,Accept U1 enable" "Disabled,Enabled" bitfld.long 0x00 5.--8. " ULSTCHNGREQ ,Usb/link state change request" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 1.--4. " TSTCTL ,Test control" "Disabled,J_mode,K_mode,Se0_nak_mode,Packet_mode,Force_enable_mode,?..." line.long 0x04 "DEVTEN,Device Event Enable Register" bitfld.long 0x04 12. " VENDEVTSTRCVDEN ,Vendor device test LMP received event enable" "Disabled,Enabled" bitfld.long 0x04 9. " ERRTICERREVTEN ,Erratic error event enable" "Disabled,Enabled" bitfld.long 0x04 7. " SOFTEVTEN ,Start of (U)frame enable" "Disabled,Enabled" bitfld.long 0x04 6. " U3L2L1SUSPEN ,U3/L2-L1 suspend event enable" "Disabled,Enabled" textline " " bitfld.long 0x04 5. " HIBERNREQEVTEN ,Enables the generation of the hibernation request event" "Disabled,Enabled" bitfld.long 0x04 4. " WKUPEVTEN ,Resume/remote wakeup detected event enable" "Disabled,Enabled" bitfld.long 0x04 3. " ULSTCNGEN ,Usb/link state change event enable" "Disabled,Enabled" bitfld.long 0x04 2. " CONNECTDONEEVTEN ,Connection done enable" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " USBRSTEVTEN ,USB reset enable" "Disabled,Enabled" bitfld.long 0x04 0. " DISSCONNEVTEN ,Disconnect detected event enable" "Disabled,Enabled" if (((d.l(ad:0xFE300000+0xC70C))&0x07)==0x04) if (((d.l(ad:0xFE300000+0xC144))&0x3000000)==0x2000000)&&(((d.l(ad:0xFE300000+0xC110))&0x02)==0x02) rgroup.long 0xC70C++0x03 line.long 0x00 "DSTS,Device Status Register" bitfld.long 0x00 29. " DCNRD ,Device controller not ready" "Ready,Not ready" textline " " bitfld.long 0x00 25. " RSS ,RSS restore state status" "Restored,Not restored" bitfld.long 0x00 24. " SSS ,SSS save state status" "Saved,Not saved" bitfld.long 0x00 23. " COREIDLE ,Core idle status" "Not idle,Idle" bitfld.long 0x00 22. " DEVCTRLHLT ,Device controller halted" "Not halted,Halted" textline " " bitfld.long 0x00 18.--21. " USBLNKST ,Usb/link state" "U0,U1,U2,U3,,RX_DET,SS_INACT,POLL,RECOV,HRESET,CMPLY,LPBK,,,,Resume/Reset" bitfld.long 0x00 17. " RXFIFOEMPTY ,RX FIFO empty" "Not empty,Empty" hexmask.long.word 0x00 3.--16. 1. " SOFFN ,Frame/microframe number of the received SOF" bitfld.long 0x00 0.--2. " CONNECTSPD ,Connection speed" "High-speed,Full-speed,Low-speed,Full-speed,Superspeed,?..." else rgroup.long 0xC70C++0x03 line.long 0x00 "DSTS,Device Status Register" textline " " bitfld.long 0x00 25. " RSS ,RSS restore state status" "Restored,Not restored" bitfld.long 0x00 24. " SSS ,SSS save state status" "Saved,Not saved" bitfld.long 0x00 23. " COREIDLE ,Core idle status" "Not idle,Idle" bitfld.long 0x00 22. " DEVCTRLHLT ,Device controller halted" "Not halted,Halted" textline " " bitfld.long 0x00 18.--21. " USBLNKST ,Usb/link state" "U0,U1,U2,U3,,RX_DET,SS_INACT,POLL,RECOV,HRESET,CMPLY,LPBK,,,,Resume/Reset" bitfld.long 0x00 17. " RXFIFOEMPTY ,RX FIFO empty" "Not empty,Empty" hexmask.long.word 0x00 3.--16. 1. " SOFFN ,Frame/microframe number of the received SOF" bitfld.long 0x00 0.--2. " CONNECTSPD ,Connection speed" "High-speed,Full-speed,Low-speed,Full-speed,Superspeed,?..." endif else if (((d.l(ad:0xFE300000+0xC144))&0x3000000)==0x2000000)&&(((d.l(ad:0xFE300000+0xC110))&0x02)==0x02) rgroup.long 0xC70C++0x03 line.long 0x00 "DSTS,Device Status Register" bitfld.long 0x00 29. " DCNRD ,Device controller not ready" "Ready,Not ready" textline " " bitfld.long 0x00 25. " RSS ,RSS restore state status" "Restored,Not restored" bitfld.long 0x00 24. " SSS ,SSS save state status" "Saved,Not saved" bitfld.long 0x00 23. " COREIDLE ,Core idle status" "Not idle,Idle" bitfld.long 0x00 22. " DEVCTRLHLT ,Device controller halted" "Not halted,Halted" textline " " bitfld.long 0x00 18.--21. " USBLNKST ,Usb/link state" "On,,Sleep,Suspend,Disconnected,,,,,,,,,,Reset,Resume" bitfld.long 0x00 17. " RXFIFOEMPTY ,RX FIFO empty" "Not empty,Empty" hexmask.long.word 0x00 3.--16. 1. " SOFFN ,Frame/microframe number of the received SOF" bitfld.long 0x00 0.--2. " CONNECTSPD ,Connection speed" "High-speed,Full-speed,Low-speed,Full-speed,Superspeed,?..." elif (((d.l(ad:0xFE300000+0xC144))&0x3000000)!=0x2000000)&&(((d.l(ad:0xFE300000+0xC110))&0x02)==0x02) rgroup.long 0xC70C++0x03 line.long 0x00 "DSTS,Device Status Register" textline " " bitfld.long 0x00 25. " RSS ,RSS restore state status" "Restored,Not restored" bitfld.long 0x00 24. " SSS ,SSS save state status" "Saved,Not saved" bitfld.long 0x00 23. " COREIDLE ,Core idle status" "Not idle,Idle" bitfld.long 0x00 22. " DEVCTRLHLT ,Device controller halted" "Not halted,Halted" textline " " bitfld.long 0x00 18.--21. " USBLNKST ,Usb/link state" "On,,Sleep,Suspend,Disconnected,,,,,,,,,,Reset,Resume" bitfld.long 0x00 17. " RXFIFOEMPTY ,RX FIFO empty" "Not empty,Empty" hexmask.long.word 0x00 3.--16. 1. " SOFFN ,Frame/microframe number of the received SOF" bitfld.long 0x00 0.--2. " CONNECTSPD ,Connection speed" "High-speed,Full-speed,Low-speed,Full-speed,Superspeed,?..." else rgroup.long 0xC70C++0x03 line.long 0x00 "DSTS,Device Status Register" textline " " bitfld.long 0x00 25. " RSS ,RSS restore state status" "Restored,Not restored" bitfld.long 0x00 24. " SSS ,SSS save state status" "Saved,Not saved" bitfld.long 0x00 23. " COREIDLE ,Core idle status" "Not idle,Idle" bitfld.long 0x00 22. " DEVCTRLHLT ,Device controller halted" "Not halted,Halted" textline " " bitfld.long 0x00 18.--21. " USBLNKST ,Usb/link state" "On,,Sleep,Suspend,Disconnected,Early suspend,?..." bitfld.long 0x00 17. " RXFIFOEMPTY ,RX FIFO empty" "Not empty,Empty" hexmask.long.word 0x00 3.--16. 1. " SOFFN ,Frame/microframe number of the received SOF" bitfld.long 0x00 0.--2. " CONNECTSPD ,Connection speed" "High-speed,Full-speed,Low-speed,Full-speed,Superspeed,?..." endif endif group.long 0xC710++0x07 line.long 0x00 "DGCMDPAR,Device Generic Command Parameter Register" line.long 0x04 "DGCMD,Device Generic Command Register" rbitfld.long 0x04 12.--15. " CMDSTATUS ,Command status" "Success,Error,?..." bitfld.long 0x04 10. " CMDACT ,Command active" "Not active,Ongoing" bitfld.long 0x04 8. " CMDIOC ,Command interrupt on complete" "Disabled,Enabled" hexmask.long.byte 0x04 0.--7. 1. " CMDTYP ,Command type" textline " " group.long 0xC720++0x03 line.long 0x00 "DALEPENA,Device Active USB Endpoint Enable Register" bitfld.long 0x00 31. " USBACTEP[15_IN] ,USB activate endpoint 15 IN" "Disabled,Enabled" bitfld.long 0x00 30. " [15_OUT] ,USB activate endpoint 15 OUT" "Disabled,Enabled" bitfld.long 0x00 29. " [14_IN] ,USB activate endpoint 14 IN" "Disabled,Enabled" bitfld.long 0x00 28. " [14_OUT] ,USB activate endpoint 14 OUT" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " [13_IN] ,USB activate endpoint 13 IN" "Disabled,Enabled" bitfld.long 0x00 26. " [13_OUT] ,USB activate endpoint 13 OUT" "Disabled,Enabled" bitfld.long 0x00 25. " [12_IN] ,USB activate endpoint 12 IN" "Disabled,Enabled" bitfld.long 0x00 24. " [12_OUT] ,USB activate endpoint 12 OUT" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " [11_IN] ,USB activate endpoint 11 IN" "Disabled,Enabled" bitfld.long 0x00 22. " [11_OUT] ,USB activate endpoint 11 OUT" "Disabled,Enabled" bitfld.long 0x00 21. " [10_IN] ,USB activate endpoint 10 IN" "Disabled,Enabled" bitfld.long 0x00 20. " [10_OUT] ,USB activate endpoint 10 OUT" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " [9_IN] ,USB activate endpoint 9 IN" "Disabled,Enabled" bitfld.long 0x00 18. " [9_OUT] ,USB activate endpoint 9 OUT" "Disabled,Enabled" bitfld.long 0x00 17. " [8_IN] ,USB activate endpoint 8 IN" "Disabled,Enabled" bitfld.long 0x00 16. " [8_OUT] ,USB activate endpoint 8 OUT" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " [7_IN] ,USB activate endpoint 7 IN" "Disabled,Enabled" bitfld.long 0x00 14. " [7_OUT] ,USB activate endpoint 7 OUT" "Disabled,Enabled" bitfld.long 0x00 13. " [6_IN] ,USB activate endpoint 6 IN" "Disabled,Enabled" bitfld.long 0x00 12. " [6_OUT] ,USB activate endpoint 6 OUT" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " [5_IN] ,USB activate endpoint 5 IN" "Disabled,Enabled" bitfld.long 0x00 10. " [5_OUT] ,USB activate endpoint 5 OUT" "Disabled,Enabled" bitfld.long 0x00 9. " [4_IN] ,USB activate endpoint 4 IN" "Disabled,Enabled" bitfld.long 0x00 8. " [4_OUT] ,USB activate endpoint 4 OUT" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " [3_IN] ,USB activate endpoint 3 IN" "Disabled,Enabled" bitfld.long 0x00 6. " [3_OUT] ,USB activate endpoint 3 OUT" "Disabled,Enabled" bitfld.long 0x00 5. " [2_IN] ,USB activate endpoint 2 IN" "Disabled,Enabled" bitfld.long 0x00 4. " [2_OUT] ,USB activate endpoint 2 OUT" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " [1_IN] ,USB activate endpoint 1 IN" "Disabled,Enabled" bitfld.long 0x00 2. " [1_OUT] ,USB activate endpoint 1 OUT" "Disabled,Enabled" bitfld.long 0x00 1. " [0_IN] ,USB activate endpoint 0 IN (Control)" "Disabled,Enabled" bitfld.long 0x00 0. " [0_OUT] ,USB activate endpoint 0 OUT (Control)" "Disabled,Enabled" width 15. tree "Device Physical Endpoint Command Registers" group.long 0xC800++0x0B line.long 0x00 "DEPCMDPAR2_0,Device Physical Endpoint-0 Command Parameter 2 Register" line.long 0x04 "DEPCMDPAR1_0,Device Physical Endpoint-0 Command Parameter 1 Register" line.long 0x08 "DEPCMDPAR0_0,Device Physical Endpoint-0 Command Parameter 0 Register" if (((d.l(ad:0xFE300000+0xC800+0x0C))&0x0F)==(0x06||0x08||0x05)) group.long (0xC800+0x0C)++0x03 line.long 0x00 "DEPCMD_0,Device Physical Endpoint-0 Command" hexmask.long.word 0x00 16.--31. 1. " COMMANDPARAM ,Command parameters" bitfld.long 0x00 12.--15. " CMDSTATUS ,Command completion status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. " HIPRI_FORCERM ,Highpriority/forcerm" "No effect,Clear" textline " " bitfld.long 0x00 10. " CMDACT ,Command active" "Disabled,Enabled" bitfld.long 0x00 8. " CMDIOC ,Command interrupt on complete" "Disabled,Enabled" bitfld.long 0x00 0.--3. " CMDTYP ,Command type" ",Endpoint conf.,Transfer resource,Get endpoint state,Set stall,Clear stall,Start transfer,Update transfer,End transfer,Start new config.,?..." else group.long (0xC800+0x0C)++0x03 line.long 0x00 "DEPCMD_0,Device Physical Endpoint-0 Command" hexmask.long.word 0x00 16.--31. 1. " COMMANDPARAM ,Command parameters" bitfld.long 0x00 12.--15. " CMDSTATUS ,Command completion status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10. " CMDACT ,Command active" "Disabled,Enabled" bitfld.long 0x00 8. " CMDIOC ,Command interrupt on complete" "Disabled,Enabled" bitfld.long 0x00 0.--3. " CMDTYP ,Command type" ",Endpoint conf.,Transfer resource,Get endpoint state,Set stall,Clear stall,Start transfer,Update transfer,End transfer,Start new config.,?..." endif group.long 0xC810++0x0B line.long 0x00 "DEPCMDPAR2_1,Device Physical Endpoint-1 Command Parameter 2 Register" line.long 0x04 "DEPCMDPAR1_1,Device Physical Endpoint-1 Command Parameter 1 Register" line.long 0x08 "DEPCMDPAR0_1,Device Physical Endpoint-1 Command Parameter 0 Register" if (((d.l(ad:0xFE300000+0xC810+0x0C))&0x0F)==(0x06||0x08||0x05)) group.long (0xC810+0x0C)++0x03 line.long 0x00 "DEPCMD_1,Device Physical Endpoint-1 Command" hexmask.long.word 0x00 16.--31. 1. " COMMANDPARAM ,Command parameters" bitfld.long 0x00 12.--15. " CMDSTATUS ,Command completion status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. " HIPRI_FORCERM ,Highpriority/forcerm" "No effect,Clear" textline " " bitfld.long 0x00 10. " CMDACT ,Command active" "Disabled,Enabled" bitfld.long 0x00 8. " CMDIOC ,Command interrupt on complete" "Disabled,Enabled" bitfld.long 0x00 0.--3. " CMDTYP ,Command type" ",Endpoint conf.,Transfer resource,Get endpoint state,Set stall,Clear stall,Start transfer,Update transfer,End transfer,Start new config.,?..." else group.long (0xC810+0x0C)++0x03 line.long 0x00 "DEPCMD_1,Device Physical Endpoint-1 Command" hexmask.long.word 0x00 16.--31. 1. " COMMANDPARAM ,Command parameters" bitfld.long 0x00 12.--15. " CMDSTATUS ,Command completion status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10. " CMDACT ,Command active" "Disabled,Enabled" bitfld.long 0x00 8. " CMDIOC ,Command interrupt on complete" "Disabled,Enabled" bitfld.long 0x00 0.--3. " CMDTYP ,Command type" ",Endpoint conf.,Transfer resource,Get endpoint state,Set stall,Clear stall,Start transfer,Update transfer,End transfer,Start new config.,?..." endif group.long 0xC820++0x0B line.long 0x00 "DEPCMDPAR2_2,Device Physical Endpoint-2 Command Parameter 2 Register" line.long 0x04 "DEPCMDPAR1_2,Device Physical Endpoint-2 Command Parameter 1 Register" line.long 0x08 "DEPCMDPAR0_2,Device Physical Endpoint-2 Command Parameter 0 Register" if (((d.l(ad:0xFE300000+0xC820+0x0C))&0x0F)==(0x06||0x08||0x05)) group.long (0xC820+0x0C)++0x03 line.long 0x00 "DEPCMD_2,Device Physical Endpoint-2 Command" hexmask.long.word 0x00 16.--31. 1. " COMMANDPARAM ,Command parameters" bitfld.long 0x00 12.--15. " CMDSTATUS ,Command completion status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. " HIPRI_FORCERM ,Highpriority/forcerm" "No effect,Clear" textline " " bitfld.long 0x00 10. " CMDACT ,Command active" "Disabled,Enabled" bitfld.long 0x00 8. " CMDIOC ,Command interrupt on complete" "Disabled,Enabled" bitfld.long 0x00 0.--3. " CMDTYP ,Command type" ",Endpoint conf.,Transfer resource,Get endpoint state,Set stall,Clear stall,Start transfer,Update transfer,End transfer,Start new config.,?..." else group.long (0xC820+0x0C)++0x03 line.long 0x00 "DEPCMD_2,Device Physical Endpoint-2 Command" hexmask.long.word 0x00 16.--31. 1. " COMMANDPARAM ,Command parameters" bitfld.long 0x00 12.--15. " CMDSTATUS ,Command completion status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10. " CMDACT ,Command active" "Disabled,Enabled" bitfld.long 0x00 8. " CMDIOC ,Command interrupt on complete" "Disabled,Enabled" bitfld.long 0x00 0.--3. " CMDTYP ,Command type" ",Endpoint conf.,Transfer resource,Get endpoint state,Set stall,Clear stall,Start transfer,Update transfer,End transfer,Start new config.,?..." endif group.long 0xC830++0x0B line.long 0x00 "DEPCMDPAR2_3,Device Physical Endpoint-3 Command Parameter 2 Register" line.long 0x04 "DEPCMDPAR1_3,Device Physical Endpoint-3 Command Parameter 1 Register" line.long 0x08 "DEPCMDPAR0_3,Device Physical Endpoint-3 Command Parameter 0 Register" if (((d.l(ad:0xFE300000+0xC830+0x0C))&0x0F)==(0x06||0x08||0x05)) group.long (0xC830+0x0C)++0x03 line.long 0x00 "DEPCMD_3,Device Physical Endpoint-3 Command" hexmask.long.word 0x00 16.--31. 1. " COMMANDPARAM ,Command parameters" bitfld.long 0x00 12.--15. " CMDSTATUS ,Command completion status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. " HIPRI_FORCERM ,Highpriority/forcerm" "No effect,Clear" textline " " bitfld.long 0x00 10. " CMDACT ,Command active" "Disabled,Enabled" bitfld.long 0x00 8. " CMDIOC ,Command interrupt on complete" "Disabled,Enabled" bitfld.long 0x00 0.--3. " CMDTYP ,Command type" ",Endpoint conf.,Transfer resource,Get endpoint state,Set stall,Clear stall,Start transfer,Update transfer,End transfer,Start new config.,?..." else group.long (0xC830+0x0C)++0x03 line.long 0x00 "DEPCMD_3,Device Physical Endpoint-3 Command" hexmask.long.word 0x00 16.--31. 1. " COMMANDPARAM ,Command parameters" bitfld.long 0x00 12.--15. " CMDSTATUS ,Command completion status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10. " CMDACT ,Command active" "Disabled,Enabled" bitfld.long 0x00 8. " CMDIOC ,Command interrupt on complete" "Disabled,Enabled" bitfld.long 0x00 0.--3. " CMDTYP ,Command type" ",Endpoint conf.,Transfer resource,Get endpoint state,Set stall,Clear stall,Start transfer,Update transfer,End transfer,Start new config.,?..." endif group.long 0xC840++0x0B line.long 0x00 "DEPCMDPAR2_4,Device Physical Endpoint-4 Command Parameter 2 Register" line.long 0x04 "DEPCMDPAR1_4,Device Physical Endpoint-4 Command Parameter 1 Register" line.long 0x08 "DEPCMDPAR0_4,Device Physical Endpoint-4 Command Parameter 0 Register" if (((d.l(ad:0xFE300000+0xC840+0x0C))&0x0F)==(0x06||0x08||0x05)) group.long (0xC840+0x0C)++0x03 line.long 0x00 "DEPCMD_4,Device Physical Endpoint-4 Command" hexmask.long.word 0x00 16.--31. 1. " COMMANDPARAM ,Command parameters" bitfld.long 0x00 12.--15. " CMDSTATUS ,Command completion status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. " HIPRI_FORCERM ,Highpriority/forcerm" "No effect,Clear" textline " " bitfld.long 0x00 10. " CMDACT ,Command active" "Disabled,Enabled" bitfld.long 0x00 8. " CMDIOC ,Command interrupt on complete" "Disabled,Enabled" bitfld.long 0x00 0.--3. " CMDTYP ,Command type" ",Endpoint conf.,Transfer resource,Get endpoint state,Set stall,Clear stall,Start transfer,Update transfer,End transfer,Start new config.,?..." else group.long (0xC840+0x0C)++0x03 line.long 0x00 "DEPCMD_4,Device Physical Endpoint-4 Command" hexmask.long.word 0x00 16.--31. 1. " COMMANDPARAM ,Command parameters" bitfld.long 0x00 12.--15. " CMDSTATUS ,Command completion status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10. " CMDACT ,Command active" "Disabled,Enabled" bitfld.long 0x00 8. " CMDIOC ,Command interrupt on complete" "Disabled,Enabled" bitfld.long 0x00 0.--3. " CMDTYP ,Command type" ",Endpoint conf.,Transfer resource,Get endpoint state,Set stall,Clear stall,Start transfer,Update transfer,End transfer,Start new config.,?..." endif group.long 0xC850++0x0B line.long 0x00 "DEPCMDPAR2_5,Device Physical Endpoint-5 Command Parameter 2 Register" line.long 0x04 "DEPCMDPAR1_5,Device Physical Endpoint-5 Command Parameter 1 Register" line.long 0x08 "DEPCMDPAR0_5,Device Physical Endpoint-5 Command Parameter 0 Register" if (((d.l(ad:0xFE300000+0xC850+0x0C))&0x0F)==(0x06||0x08||0x05)) group.long (0xC850+0x0C)++0x03 line.long 0x00 "DEPCMD_5,Device Physical Endpoint-5 Command" hexmask.long.word 0x00 16.--31. 1. " COMMANDPARAM ,Command parameters" bitfld.long 0x00 12.--15. " CMDSTATUS ,Command completion status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. " HIPRI_FORCERM ,Highpriority/forcerm" "No effect,Clear" textline " " bitfld.long 0x00 10. " CMDACT ,Command active" "Disabled,Enabled" bitfld.long 0x00 8. " CMDIOC ,Command interrupt on complete" "Disabled,Enabled" bitfld.long 0x00 0.--3. " CMDTYP ,Command type" ",Endpoint conf.,Transfer resource,Get endpoint state,Set stall,Clear stall,Start transfer,Update transfer,End transfer,Start new config.,?..." else group.long (0xC850+0x0C)++0x03 line.long 0x00 "DEPCMD_5,Device Physical Endpoint-5 Command" hexmask.long.word 0x00 16.--31. 1. " COMMANDPARAM ,Command parameters" bitfld.long 0x00 12.--15. " CMDSTATUS ,Command completion status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10. " CMDACT ,Command active" "Disabled,Enabled" bitfld.long 0x00 8. " CMDIOC ,Command interrupt on complete" "Disabled,Enabled" bitfld.long 0x00 0.--3. " CMDTYP ,Command type" ",Endpoint conf.,Transfer resource,Get endpoint state,Set stall,Clear stall,Start transfer,Update transfer,End transfer,Start new config.,?..." endif group.long 0xC860++0x0B line.long 0x00 "DEPCMDPAR2_6,Device Physical Endpoint-6 Command Parameter 2 Register" line.long 0x04 "DEPCMDPAR1_6,Device Physical Endpoint-6 Command Parameter 1 Register" line.long 0x08 "DEPCMDPAR0_6,Device Physical Endpoint-6 Command Parameter 0 Register" if (((d.l(ad:0xFE300000+0xC860+0x0C))&0x0F)==(0x06||0x08||0x05)) group.long (0xC860+0x0C)++0x03 line.long 0x00 "DEPCMD_6,Device Physical Endpoint-6 Command" hexmask.long.word 0x00 16.--31. 1. " COMMANDPARAM ,Command parameters" bitfld.long 0x00 12.--15. " CMDSTATUS ,Command completion status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. " HIPRI_FORCERM ,Highpriority/forcerm" "No effect,Clear" textline " " bitfld.long 0x00 10. " CMDACT ,Command active" "Disabled,Enabled" bitfld.long 0x00 8. " CMDIOC ,Command interrupt on complete" "Disabled,Enabled" bitfld.long 0x00 0.--3. " CMDTYP ,Command type" ",Endpoint conf.,Transfer resource,Get endpoint state,Set stall,Clear stall,Start transfer,Update transfer,End transfer,Start new config.,?..." else group.long (0xC860+0x0C)++0x03 line.long 0x00 "DEPCMD_6,Device Physical Endpoint-6 Command" hexmask.long.word 0x00 16.--31. 1. " COMMANDPARAM ,Command parameters" bitfld.long 0x00 12.--15. " CMDSTATUS ,Command completion status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10. " CMDACT ,Command active" "Disabled,Enabled" bitfld.long 0x00 8. " CMDIOC ,Command interrupt on complete" "Disabled,Enabled" bitfld.long 0x00 0.--3. " CMDTYP ,Command type" ",Endpoint conf.,Transfer resource,Get endpoint state,Set stall,Clear stall,Start transfer,Update transfer,End transfer,Start new config.,?..." endif group.long 0xC870++0x0B line.long 0x00 "DEPCMDPAR2_7,Device Physical Endpoint-7 Command Parameter 2 Register" line.long 0x04 "DEPCMDPAR1_7,Device Physical Endpoint-7 Command Parameter 1 Register" line.long 0x08 "DEPCMDPAR0_7,Device Physical Endpoint-7 Command Parameter 0 Register" if (((d.l(ad:0xFE300000+0xC870+0x0C))&0x0F)==(0x06||0x08||0x05)) group.long (0xC870+0x0C)++0x03 line.long 0x00 "DEPCMD_7,Device Physical Endpoint-7 Command" hexmask.long.word 0x00 16.--31. 1. " COMMANDPARAM ,Command parameters" bitfld.long 0x00 12.--15. " CMDSTATUS ,Command completion status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. " HIPRI_FORCERM ,Highpriority/forcerm" "No effect,Clear" textline " " bitfld.long 0x00 10. " CMDACT ,Command active" "Disabled,Enabled" bitfld.long 0x00 8. " CMDIOC ,Command interrupt on complete" "Disabled,Enabled" bitfld.long 0x00 0.--3. " CMDTYP ,Command type" ",Endpoint conf.,Transfer resource,Get endpoint state,Set stall,Clear stall,Start transfer,Update transfer,End transfer,Start new config.,?..." else group.long (0xC870+0x0C)++0x03 line.long 0x00 "DEPCMD_7,Device Physical Endpoint-7 Command" hexmask.long.word 0x00 16.--31. 1. " COMMANDPARAM ,Command parameters" bitfld.long 0x00 12.--15. " CMDSTATUS ,Command completion status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10. " CMDACT ,Command active" "Disabled,Enabled" bitfld.long 0x00 8. " CMDIOC ,Command interrupt on complete" "Disabled,Enabled" bitfld.long 0x00 0.--3. " CMDTYP ,Command type" ",Endpoint conf.,Transfer resource,Get endpoint state,Set stall,Clear stall,Start transfer,Update transfer,End transfer,Start new config.,?..." endif group.long 0xC880++0x0B line.long 0x00 "DEPCMDPAR2_8,Device Physical Endpoint-8 Command Parameter 2 Register" line.long 0x04 "DEPCMDPAR1_8,Device Physical Endpoint-8 Command Parameter 1 Register" line.long 0x08 "DEPCMDPAR0_8,Device Physical Endpoint-8 Command Parameter 0 Register" if (((d.l(ad:0xFE300000+0xC880+0x0C))&0x0F)==(0x06||0x08||0x05)) group.long (0xC880+0x0C)++0x03 line.long 0x00 "DEPCMD_8,Device Physical Endpoint-8 Command" hexmask.long.word 0x00 16.--31. 1. " COMMANDPARAM ,Command parameters" bitfld.long 0x00 12.--15. " CMDSTATUS ,Command completion status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. " HIPRI_FORCERM ,Highpriority/forcerm" "No effect,Clear" textline " " bitfld.long 0x00 10. " CMDACT ,Command active" "Disabled,Enabled" bitfld.long 0x00 8. " CMDIOC ,Command interrupt on complete" "Disabled,Enabled" bitfld.long 0x00 0.--3. " CMDTYP ,Command type" ",Endpoint conf.,Transfer resource,Get endpoint state,Set stall,Clear stall,Start transfer,Update transfer,End transfer,Start new config.,?..." else group.long (0xC880+0x0C)++0x03 line.long 0x00 "DEPCMD_8,Device Physical Endpoint-8 Command" hexmask.long.word 0x00 16.--31. 1. " COMMANDPARAM ,Command parameters" bitfld.long 0x00 12.--15. " CMDSTATUS ,Command completion status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10. " CMDACT ,Command active" "Disabled,Enabled" bitfld.long 0x00 8. " CMDIOC ,Command interrupt on complete" "Disabled,Enabled" bitfld.long 0x00 0.--3. " CMDTYP ,Command type" ",Endpoint conf.,Transfer resource,Get endpoint state,Set stall,Clear stall,Start transfer,Update transfer,End transfer,Start new config.,?..." endif group.long 0xC890++0x0B line.long 0x00 "DEPCMDPAR2_9,Device Physical Endpoint-9 Command Parameter 2 Register" line.long 0x04 "DEPCMDPAR1_9,Device Physical Endpoint-9 Command Parameter 1 Register" line.long 0x08 "DEPCMDPAR0_9,Device Physical Endpoint-9 Command Parameter 0 Register" if (((d.l(ad:0xFE300000+0xC890+0x0C))&0x0F)==(0x06||0x08||0x05)) group.long (0xC890+0x0C)++0x03 line.long 0x00 "DEPCMD_9,Device Physical Endpoint-9 Command" hexmask.long.word 0x00 16.--31. 1. " COMMANDPARAM ,Command parameters" bitfld.long 0x00 12.--15. " CMDSTATUS ,Command completion status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. " HIPRI_FORCERM ,Highpriority/forcerm" "No effect,Clear" textline " " bitfld.long 0x00 10. " CMDACT ,Command active" "Disabled,Enabled" bitfld.long 0x00 8. " CMDIOC ,Command interrupt on complete" "Disabled,Enabled" bitfld.long 0x00 0.--3. " CMDTYP ,Command type" ",Endpoint conf.,Transfer resource,Get endpoint state,Set stall,Clear stall,Start transfer,Update transfer,End transfer,Start new config.,?..." else group.long (0xC890+0x0C)++0x03 line.long 0x00 "DEPCMD_9,Device Physical Endpoint-9 Command" hexmask.long.word 0x00 16.--31. 1. " COMMANDPARAM ,Command parameters" bitfld.long 0x00 12.--15. " CMDSTATUS ,Command completion status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10. " CMDACT ,Command active" "Disabled,Enabled" bitfld.long 0x00 8. " CMDIOC ,Command interrupt on complete" "Disabled,Enabled" bitfld.long 0x00 0.--3. " CMDTYP ,Command type" ",Endpoint conf.,Transfer resource,Get endpoint state,Set stall,Clear stall,Start transfer,Update transfer,End transfer,Start new config.,?..." endif group.long 0xC8A0++0x0B line.long 0x00 "DEPCMDPAR2_10,Device Physical Endpoint-10 Command Parameter 2 Register" line.long 0x04 "DEPCMDPAR1_10,Device Physical Endpoint-10 Command Parameter 1 Register" line.long 0x08 "DEPCMDPAR0_10,Device Physical Endpoint-10 Command Parameter 0 Register" if (((d.l(ad:0xFE300000+0xC8A0+0x0C))&0x0F)==(0x06||0x08||0x05)) group.long (0xC8A0+0x0C)++0x03 line.long 0x00 "DEPCMD_10,Device Physical Endpoint-10 Command" hexmask.long.word 0x00 16.--31. 1. " COMMANDPARAM ,Command parameters" bitfld.long 0x00 12.--15. " CMDSTATUS ,Command completion status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. " HIPRI_FORCERM ,Highpriority/forcerm" "No effect,Clear" textline " " bitfld.long 0x00 10. " CMDACT ,Command active" "Disabled,Enabled" bitfld.long 0x00 8. " CMDIOC ,Command interrupt on complete" "Disabled,Enabled" bitfld.long 0x00 0.--3. " CMDTYP ,Command type" ",Endpoint conf.,Transfer resource,Get endpoint state,Set stall,Clear stall,Start transfer,Update transfer,End transfer,Start new config.,?..." else group.long (0xC8A0+0x0C)++0x03 line.long 0x00 "DEPCMD_10,Device Physical Endpoint-10 Command" hexmask.long.word 0x00 16.--31. 1. " COMMANDPARAM ,Command parameters" bitfld.long 0x00 12.--15. " CMDSTATUS ,Command completion status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10. " CMDACT ,Command active" "Disabled,Enabled" bitfld.long 0x00 8. " CMDIOC ,Command interrupt on complete" "Disabled,Enabled" bitfld.long 0x00 0.--3. " CMDTYP ,Command type" ",Endpoint conf.,Transfer resource,Get endpoint state,Set stall,Clear stall,Start transfer,Update transfer,End transfer,Start new config.,?..." endif group.long 0xC8B0++0x0B line.long 0x00 "DEPCMDPAR2_11,Device Physical Endpoint-11 Command Parameter 2 Register" line.long 0x04 "DEPCMDPAR1_11,Device Physical Endpoint-11 Command Parameter 1 Register" line.long 0x08 "DEPCMDPAR0_11,Device Physical Endpoint-11 Command Parameter 0 Register" if (((d.l(ad:0xFE300000+0xC8B0+0x0C))&0x0F)==(0x06||0x08||0x05)) group.long (0xC8B0+0x0C)++0x03 line.long 0x00 "DEPCMD_11,Device Physical Endpoint-11 Command" hexmask.long.word 0x00 16.--31. 1. " COMMANDPARAM ,Command parameters" bitfld.long 0x00 12.--15. " CMDSTATUS ,Command completion status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. " HIPRI_FORCERM ,Highpriority/forcerm" "No effect,Clear" textline " " bitfld.long 0x00 10. " CMDACT ,Command active" "Disabled,Enabled" bitfld.long 0x00 8. " CMDIOC ,Command interrupt on complete" "Disabled,Enabled" bitfld.long 0x00 0.--3. " CMDTYP ,Command type" ",Endpoint conf.,Transfer resource,Get endpoint state,Set stall,Clear stall,Start transfer,Update transfer,End transfer,Start new config.,?..." else group.long (0xC8B0+0x0C)++0x03 line.long 0x00 "DEPCMD_11,Device Physical Endpoint-11 Command" hexmask.long.word 0x00 16.--31. 1. " COMMANDPARAM ,Command parameters" bitfld.long 0x00 12.--15. " CMDSTATUS ,Command completion status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10. " CMDACT ,Command active" "Disabled,Enabled" bitfld.long 0x00 8. " CMDIOC ,Command interrupt on complete" "Disabled,Enabled" bitfld.long 0x00 0.--3. " CMDTYP ,Command type" ",Endpoint conf.,Transfer resource,Get endpoint state,Set stall,Clear stall,Start transfer,Update transfer,End transfer,Start new config.,?..." endif tree.end width 16. textline " " group.long 0xCC00++0x07 "OTG And Battery Charger Registers" line.long 0x00 "OCFG,OTG Configuration" bitfld.long 0x00 5. " DISPRTPWRCUTOFF ,OTG disable port power cut off" "No,Yes" bitfld.long 0x00 4. " OTGHIBDISMASK ,OTG hibernation disable mask" "Masked,Not masked" bitfld.long 0x00 3. " OTGSFTRSTMSK ,OTG soft reset mask" "Not masked,Masked" textline " " bitfld.long 0x00 2. " OTG_VERSION ,OTG version" "0,1" bitfld.long 0x00 1. " HNPCAP ,RSP/HNP capability enable" "Disabled,Enabled" bitfld.long 0x00 0. " SRPCAP ,SRP capability enable" "Disabled,Enabled" line.long 0x04 "OCTL,OTG Control Register" bitfld.long 0x04 7. " OTG3_GOERR ,Core's LTSSM error state during OTG 3.0 RSP" "Disabled,Enabled" bitfld.long 0x04 6. " PERIMODE ,Peripheral mode" "Host,Peripheral" bitfld.long 0x04 5. " PRTPWRCTL ,Port power control" "Switched off,Initiated" textline " " bitfld.long 0x04 4. " HNPREQ ,HNP request" "Not requested,Requested" bitfld.long 0x04 3. " SESREQ ,Session request" "Not requested,Requested" bitfld.long 0x04 2. " TERMSELDLPULSE ,Termselect data line pulse" "UTMI_TXVALID,UTMI_TERMSEL" textline " " bitfld.long 0x04 1. " DEVSETHNPEN ,Device set RSP/HNP enable" "Disabled,Enabled" bitfld.long 0x04 0. " HSTSETHNPEN ,Host set RSP/HNP enable" "Disabled,Enabled" if (((d.l(ad:0xFE300000+0xCC08))&0x80000000)==0x00) group.long 0xCC08++0x03 line.long 0x00 "OEVT,OTG Events Register" rbitfld.long 0x00 31. " DEVICEMODE ,Device mode" "A-device,B-device" eventfld.long 0x00 27. " OTGXHCIRUNSTPSETEVNT ,OTG host run stop set event" "Not occurred,Occurred" eventfld.long 0x00 26. " OTGDEVRUNSTPSETEVNT ,OTG device run stop set event" "Not occurred,Occurred" textline " " eventfld.long 0x00 25. " OTGHIBENTRYEVNT ,OTG hibernation entry event" "Not occurred,Occurred" eventfld.long 0x00 24. " OTGCONIDSTSCHNGEVNT ,Connector ID status change event" "Not changed,Changed" eventfld.long 0x00 23. " HRRCONFNOTIFEVNT ,Host role request confirm notifier event" "Not confirmed,Confirmed" textline " " eventfld.long 0x00 22. " HRRINITNOTIFEVNT ,Host role request initiate notifier event" "Not initiated,Initiated" eventfld.long 0x00 21. " OTGADEVIDLEEVNT ,A-Device A-IDLE event set" "Not idle,Idle" eventfld.long 0x00 20. " OTGADEVBHOSTENDEVNT ,A-Device B-Host end event" "Not completed,Completed" textline " " eventfld.long 0x00 19. " OTGADEVHOSTEVNT ,A-Device host event" "Not entered,Entered" eventfld.long 0x00 18. " OTGADEVHNPCHNGEVNT ,A-Device HNP change event" "Not changed,Changed" eventfld.long 0x00 17. " OTGADEVSRPDETEVNT ,SRP detect event set" "Not detected,Detected" textline " " eventfld.long 0x00 16. " OTGADEVSESSENDDETEVNT ,Session end detected event" "Not detected,Detected" rbitfld.long 0x00 3. " BSESVLD ,Device mode transceiver status" "Not valid,Valid" rbitfld.long 0x00 2. " HSTNEGSTS ,Host negotiation status" "Failed,Succeed" textline " " rbitfld.long 0x00 1. " SESREQSTS ,Session request status" "Low,High" eventfld.long 0x00 0. " OEVTERROR ,OTG event error" "No error,Error" group.long 0xCC0C++0x03 line.long 0x00 "OEVTEN,OTG Events Enable Register" bitfld.long 0x00 27. " OTGXHCIRUNSTPSETEVNTEN ,OTG host run stop set event enable" "Disabled,Enabled" bitfld.long 0x00 26. " OTGDEVRUNSTPSETEVNTEN ,OTG device run stop set event enable" "Disabled,Enabled" bitfld.long 0x00 25. " OTGHIBENTRYEVNTEN ,OTG hibernation entry event enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " OTGCONIDSTSCHNGEVNTEN ,Connector ID status change event" "Not changed,Changed" bitfld.long 0x00 23. " HRRCONFNOTIFEVNTEN ,Hrrconfnotif event enable" "Disabled,Enabled" bitfld.long 0x00 22. " HRRINITNOTIFEVNTEN ,Hrrinitnotif event enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " OTGADEVIDLEEVNTEN ,A-Device A-IDLE event" "Disabled,Enabled" bitfld.long 0x00 20. " OTGADEVBHOSTENDEVNTEN ,A-Device B-Host end event enable" "Disabled,Enabled" bitfld.long 0x00 19. " OTGADEVHOSTEVNTEN ,A-Device host event enable" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " OTGADEVHNPCHNGEVNTEN ,A-device HNP change detected event enable" "Disabled,Enabled" bitfld.long 0x00 17. " OTGADEVSRPDETEVNTEN ,SRP detect event enable" "Disabled,Enabled" bitfld.long 0x00 16. " OTGADEVSESSENDDETEVNTEN ,Session end detected event enable" "Disabled,Enabled" else group.long 0xCC08++0x03 line.long 0x00 "OEVT,OTG Events Register" rbitfld.long 0x00 31. " DEVICEMODE ,Device mode" "A-device,B-device" eventfld.long 0x00 27. " OTGXHCIRUNSTPSETEVNT ,OTG host run stop set event" "Not occurred,Occurred" eventfld.long 0x00 26. " OTGDEVRUNSTPSETEVNT ,OTG device run stop set event" "Not occurred,Occurred" textline " " eventfld.long 0x00 25. " OTGHIBENTRYEVNT ,OTG hibernation entry event" "Not occurred,Occurred" eventfld.long 0x00 24. " OTGCONIDSTSCHNGEVNT ,Connector ID status change event" "Not changed,Changed" eventfld.long 0x00 23. " HRRCONFNOTIFEVNT ,Host role request confirm notifier event" "Not confirmed,Confirmed" textline " " eventfld.long 0x00 22. " HRRINITNOTIFEVNT ,Host role request initiate notifier event" "Not initiated,Initiated" eventfld.long 0x00 11. " OTGBDEVBHOSTENDEVNT ,B-Device B-Host end event" "Not completed,Completed" eventfld.long 0x00 10. " OTGBDEVHNPCHNGEVNT ,B-Dev HNP change event" "Not changed,Changed" textline " " eventfld.long 0x00 9. " OTGBDEVSESSVLDDETEVNT ,Session valid detected event" "Not succeeded,Succeeded" eventfld.long 0x00 8. " OTGBDEVVBUSCHNGEVNT ,Vbus change event" "Not changed,Changed" rbitfld.long 0x00 3. " BSESVLD ,Device mode transceiver status" "Not valid,Valid" textline " " rbitfld.long 0x00 2. " HSTNEGSTS ,Host negotiation status" "Failed,Succeed" rbitfld.long 0x00 1. " SESREQSTS ,Session request status" "Low,High" eventfld.long 0x00 0. " OEVTERROR ,OTG event error" "No error,Error" group.long 0xCC0C++0x03 line.long 0x00 "OEVTEN,OTG Events Enable Register" bitfld.long 0x00 27. " OTGXHCIRUNSTPSETEVNTEN ,OTG host run stop set event enable" "Disabled,Enabled" bitfld.long 0x00 26. " OTGDEVRUNSTPSETEVNTEN ,OTG device run stop set event enable" "Disabled,Enabled" bitfld.long 0x00 25. " OTGHIBENTRYEVNTEN ,OTG hibernation entry event enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " OTGCONIDSTSCHNGEVNTEN ,Connector ID status change event" "Not changed,Changed" bitfld.long 0x00 23. " HRRCONFNOTIFEVNTEN ,Hrrconfnotif event enable" "Disabled,Enabled" bitfld.long 0x00 22. " HRRINITNOTIFEVNTEN ,Hrrinitnotif event enable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " OTGBDEVBHOSTENDEVNTEN ,B-Device B-Host end event enable" "Disabled,Enabled" bitfld.long 0x00 10. " OTGBDEVHNPCHNGEVNTEN ,B-Device HNP change event enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " OTGBDEVSESSVLDDETEVNTEN ,B-device session valid detected event enable" "Disabled,Enabled" bitfld.long 0x00 8. " OTGBDEVVBUSCHNGEVNTEN ,B-Device VBUS change event enable" "Disabled,Enabled" endif rgroup.long 0xCC10++0x03 line.long 0x00 "OSTS,OTG Status Register" bitfld.long 0x00 13. " DEVRUNSTP ,Status of the run/stop bit in the DCTL register" "Stopped,Started" bitfld.long 0x00 12. " XHCIRUNSTP ,OTG host run stop set event" "Stop,Run" bitfld.long 0x00 8.--11. " OTGSTATE ,Current state of the OTG state machine" "A_idle,,A_WAIT_BCON,A_WAIT_VFALL,A_VBUS_ERR,A_HOST,A_SUSPEND,A_WAIT_PPWR,B_IDLE,B_SRP_INIT,B_PERIPHERAL,B_WAIT_ACON,B_HOST,A_WAIT_SWITCH,B_WAIT_SWITCH,?..." textline " " bitfld.long 0x00 4. " PERIPHERALSTATE ,OTG state" "Host,Peripheral" bitfld.long 0x00 3. " XHCIPRTPOWER ,Reflects the PORTSC.PP bit in the xhci register" "Off,On" bitfld.long 0x00 2. " BSESVLD ,B-Session valid" "Not valid,Valid" textline " " bitfld.long 0x00 1. " ASESVLD ,Host mode transceiver status" "Not valid,Valid" bitfld.long 0x00 0. " CONIDSTS ,Connector ID status" "A-device,B-device" group.long 0xCC28++0x03 line.long 0x00 "ADPEVT,ADP Event Register" eventfld.long 0x00 28. " ADPPRBEVNT ,ADP probe event" "Not occurred,Occurred" eventfld.long 0x00 27. " ADPSNSEVNT ,ADP sense event" "Not occurred,Occurred" eventfld.long 0x00 26. " ADPTMOUTEVNT ,ADP timeout event" "Not occurred,Occurred" textline " " eventfld.long 0x00 25. " ADPRSTCMPLTEVNT ,ADP reset command successful" "Not successful,Successful" hexmask.long.word 0x00 0.--15. 1. " RTIM ,RAMP TIME" width 0x0B tree.end tree.end tree "VCU (Video Codec Unit)" tree "VCU_SLCR" base ad:0xA0040000 width 19. group.long 0x00++0x03 line.long 0x00 "VCU_ERR_CTRL,Error Response Enable/disable Register" bitfld.long 0x00 0. " APB_ERR_RES ,Pslverr value after access on unimplemented space" "0,1" rgroup.long 0x14++0x03 line.long 0x00 "VCU_ERR_CTRL,VCU Version Control Register" bitfld.long 0x00 0.--3. " CTRL ,Version control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.byte 0x20++0x00 line.byte 0x00 "CRL_WPROT,CRL SLCR Write Protection Register" bitfld.byte 0x00 0. " ACTIVE ,Write protection" "Not protected,Protected" group.long 0x24++0x07 line.long 0x00 "VCU_PLL_CTRL,PLL Basic Control Register" hexmask.long.byte 0x00 8.--14. 1. " FBDIV ,Integer portion of the feedback divider to the PLL" bitfld.long 0x00 3. " BYPASS ,PLL clock bypass" "Disabled,Enabled" bitfld.long 0x00 2. " PCTRL_POR_IN ,Drives pctrl_por_b_in pin of PLL" "Low,High" bitfld.long 0x00 1. " PSS_PWR_POR ,Drives pss_pwr_por_b pin of PLL" "Low,High" textline " " bitfld.long 0x00 0. " RESET ,Asserts reset to the PLL" "No reset,Reset" line.long 0x04 "VCU_PLL_CFG,Helper Data Register" hexmask.long.byte 0x04 25.--31. 1. " LOCK_DLY ,Lock circuit configuration settings for lock windowsize" hexmask.long.word 0x04 13.--22. 1. " LOCK_CNT ,Lock circuit counter setting" bitfld.long 0x04 10.--11. " LFHF ,PLL loop filter high frequency capacitor control" "0,1,2,3" bitfld.long 0x04 5.--8. " CP ,PLL charge pump control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 0.--3. " RES ,PLL loop filter resistor control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x30++0x13 line.long 0x00 "ALG_ENC_CORE_CTRL,Reference Clock Control Register" bitfld.long 0x00 12. " CLKACT ,Clock active signal" "Not active,Active" bitfld.long 0x00 4.--9. " DIVISOR0 ,6 bit divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0. " SRCSEL ,Encoder core clock source" "PL,VCU PLL" line.long 0x04 "ALG_ENC_MCU_CTRL,Reference Clock Control Register" bitfld.long 0x04 12. " CLKACT ,Clock active signal" "Not active,Active" bitfld.long 0x04 4.--9. " DIVISOR0 ,6 bit divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 0. " SRCSEL ,Encoder core clock source" "PL,VCU PLL" line.long 0x08 "ALG_DEC_CORE_CTRL,Reference Clock Control Register" bitfld.long 0x08 12. " CLKACT ,Clock active signal" "Not active,Active" bitfld.long 0x08 4.--9. " DIVISOR0 ,6 bit divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x08 0. " SRCSEL ,Encoder core clock source" "PL,VCU PLL" line.long 0x0C "ALG_DEC_MCU_CTRL,Reference Clock Control Register" bitfld.long 0x0C 12. " CLKACT ,Clock active signal" "Not active,Active" bitfld.long 0x0C 4.--9. " DIVISOR0 ,6 bit divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x0C 0. " SRCSEL ,Encoder core clock source" "PL,VCU PLL" line.long 0x10 "ALG_VCU_AXI_CTRL,Reference Clock Control Register" bitfld.long 0x10 17. " MCU_CLK_SEL ,MCU clock select" "Encoder,Decoder" bitfld.long 0x10 16. " CORE_CLK_SEL ,Core clock select" "Encoder,Decoder" bitfld.long 0x10 15. " MCU_CLKACT ,MCU clock active signal" "Disabled,Enabled" bitfld.long 0x10 14. " DEC_CLKACT ,Decoder clock active signal" "Disabled,Enabled" textline " " bitfld.long 0x10 13. " ENC_CACHE_CLKACT ,Encoder cache clock active signal" "Disabled,Enabled" bitfld.long 0x10 12. " ENC_CLKACT ,Encoder clock active signal" "Disabled,Enabled" rgroup.long 0x60++0x03 line.long 0x00 "PLL_STATUS,PLL Status Register" bitfld.long 0x00 3. " PLL_STABLE ,PLL stability status" "Not stable,Stable" bitfld.long 0x00 0. " PLL_LOCK ,PLL lock status" "Not locked,Locked" group.long 0x70++0x03 line.long 0x00 "VCU_ISR,Interrupt Status Register" eventfld.long 0x00 19. " APM3_FIFO3_OVFL ,Overflow on 2nd read latency measurement FIFO" "Not occurred,Occurred" eventfld.long 0x00 18. " APM3_FIFO2_OVFL ,Overflow on 1st read latency measurement FIFO" "Not occurred,Occurred" eventfld.long 0x00 17. " APM3_FIFO1_OVFL ,Overflow on 2nd write latency measurement FIFO" "Not occurred,Occurred" eventfld.long 0x00 16. " APM3_FIFO0_OVFL ,Overflow on 1st write latency measurement FIFO" "Not occurred,Occurred" textline " " eventfld.long 0x00 15. " APM3_RESULT_VALID ,Timing window completion interrupt" "No interrupt,Interrupt" eventfld.long 0x00 14. " APM2_FIFO3_OVFL ,Overflow on 2nd read latency measurement FIFO" "Not occurred,Occurred" eventfld.long 0x00 13. " APM2_FIFO2_OVFL ,Overflow on 1st read latency measurement FIFO" "Not occurred,Occurred" eventfld.long 0x00 12. " APM2_FIFO1_OVFL ,Overflow on 2nd write latency measurement FIFO" "Not occurred,Occurred" textline " " eventfld.long 0x00 11. " APM2_FIFO0_OVFL ,Overflow on 1st write latency measurement FIFO" "Not occurred,Occurred" eventfld.long 0x00 10. " APM2_RESULT_VALID ,Timing window completion interrupt" "No interrupt,Interrupt" eventfld.long 0x00 9. " APM1_FIFO3_OVFL ,Overflow on 2nd read latency measurement FIFO" "Not occurred,Occurred" eventfld.long 0x00 8. " APM1_FIFO2_OVFL ,Overflow on 1st read latency measurement FIFO" "Not occurred,Occurred" textline " " eventfld.long 0x00 7. " APM1_FIFO1_OVFL ,Overflow on 2nd write latency measurement FIFO" "Not occurred,Occurred" eventfld.long 0x00 6. " APM1_FIFO0_OVFL ,Overflow on 1st write latency measurement FIFO" "Not occurred,Occurred" eventfld.long 0x00 5. " APM1_RESULT_VALID ,Timing window completion interrupt" "No interrupt,Interrupt" eventfld.long 0x00 4. " APM0_FIFO3_OVFL ,Overflow on 2nd read latency measurement FIFO" "Not occurred,Occurred" textline " " eventfld.long 0x00 3. " APM0_FIFO2_OVFL ,Overflow on 1st read latency measurement FIFO" "Not occurred,Occurred" eventfld.long 0x00 2. " APM0_FIFO1_OVFL ,Overflow on 2nd write latency measurement FIFO" "Not occurred,Occurred" eventfld.long 0x00 1. " APM0_FIFO0_OVFL ,Overflow on 1st write latency measurement FIFO" "Not occurred,Occurred" eventfld.long 0x00 0. " APM0_RESULT_VALID ,Timing window completion interrupt" "No interrupt,Interrupt" group.long 0x74++0x03 line.long 0x00 "VCU_IMR_SET/CLR,Interrupt Mask Register" setclrfld.long 0x00 19. 0x08 19. 0x04 19. " APM3_FIFO3_OVFL ,Overflow on 2nd read latency measurement FIFO" "Not masked,Masked" setclrfld.long 0x00 18. 0x08 18. 0x04 18. " APM3_FIFO2_OVFL ,Overflow on 1st read latency measurement FIFO" "Not masked,Masked" setclrfld.long 0x00 17. 0x08 17. 0x04 17. " APM3_FIFO1_OVFL ,Overflow on 2nd write latency measurement FIFO" "Not masked,Masked" setclrfld.long 0x00 16. 0x08 16. 0x04 16. " APM3_FIFO0_OVFL ,Overflow on 1st write latency measurement FIFO" "Not masked,Masked" textline " " setclrfld.long 0x00 15. 0x08 15. 0x04 15. " APM3_RESULT_VALID ,Timing window completion interrupt" "Not masked,Masked" setclrfld.long 0x00 14. 0x08 14. 0x04 14. " APM2_FIFO3_OVFL ,Overflow on 2nd read latency measurement FIFO" "Not masked,Masked" setclrfld.long 0x00 13. 0x08 13. 0x04 13. " APM2_FIFO2_OVFL ,Overflow on 1st read latency measurement FIFO" "Not masked,Masked" setclrfld.long 0x00 12. 0x08 12. 0x04 12. " APM2_FIFO1_OVFL ,Overflow on 2nd write latency measurement FIFO" "Not masked,Masked" textline " " setclrfld.long 0x00 11. 0x08 11. 0x04 11. " APM2_FIFO0_OVFL ,Overflow on 1st write latency measurement FIFO" "Not masked,Masked" setclrfld.long 0x00 10. 0x08 10. 0x04 10. " APM2_RESULT_VALID ,Timing window completion interrupt" "Not masked,Masked" setclrfld.long 0x00 9. 0x08 9. 0x04 9. " APM1_FIFO3_OVFL ,Overflow on 2nd read latency measurement FIFO" "Not masked,Masked" setclrfld.long 0x00 8. 0x08 8. 0x04 8. " APM1_FIFO2_OVFL ,Overflow on 1st read latency measurement FIFO" "Not masked,Masked" textline " " setclrfld.long 0x00 7. 0x08 7. 0x04 7. " APM1_FIFO1_OVFL ,Overflow on 2nd write latency measurement FIFO" "Not masked,Masked" setclrfld.long 0x00 6. 0x08 6. 0x04 6. " APM1_FIFO0_OVFL ,Overflow on 1st write latency measurement FIFO" "Not masked,Masked" setclrfld.long 0x00 5. 0x08 5. 0x04 5. " APM1_RESULT_VALID ,Timing window completion interrupt" "Not masked,Masked" setclrfld.long 0x00 4. 0x08 4. 0x04 4. " APM0_FIFO3_OVFL ,Overflow on 2nd read latency measurement FIFO" "Not masked,Masked" textline " " setclrfld.long 0x00 3. 0x08 3. 0x04 3. " APM0_FIFO2_OVFL ,Overflow on 1st read latency measurement FIFO" "Not masked,Masked" setclrfld.long 0x00 2. 0x08 2. 0x04 2. " APM0_FIFO1_OVFL ,Overflow on 2nd write latency measurement FIFO" "Not masked,Masked" setclrfld.long 0x00 1. 0x08 1. 0x04 1. " APM0_FIFO0_OVFL ,Overflow on 1st write latency measurement FIFO" "Not masked,Masked" setclrfld.long 0x00 0. 0x08 0. 0x04 0. " APM0_RESULT_VALID ,Timing window completion interrupt" "Not masked,Masked" textline " " width 16. tree "APM0 Registers" group.long 0x100++0x0B line.long 0x00 "APM0_CFG,APM0 Config Register" bitfld.long 0x00 28.--31. " RD_ID_LAT_FF1 ,Read ID considered for latency calculation in 2nd read FIFO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. " WR_ID_LAT_FF1 ,Write ID considered for latency calculation in 2nd write FIFO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. " RD_ID_LAT_FF0 ,Read ID considered for latency calculation in 1st read FIFO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " WR_ID_LAT_FF0 ,Write ID considered for latency calculation in 1st write FIFO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 7. " SEL_RD_ID_LAT_FF1 ,Considere rd_lat_id for latency calculation" "Rd_lat_id,All ids" bitfld.long 0x00 6. " SEL_WR_ID_LAT_FF1 ,Considere wr_lat_id for latency calculation" "Wr_lat_id,All ids" bitfld.long 0x00 5. " SEL_RD_ID_LAT_FF0 ,Considere rd_lat_id for latency calculation" "Rd_lat_id,All ids" bitfld.long 0x00 4. " SEL_WR_ID_LAT_FF0 ,Considere wr_lat_id for latency calculation" "Wr_lat_id,All ids" textline " " bitfld.long 0x00 2. " MODE ,Timing mode" "Continuous,Burst" bitfld.long 0x00 1. " ENABLE ,APM enable" "Disabled,Enabled" line.long 0x04 "APM0_TIMER,APM0 Timer Register" line.long 0x08 "APM0_TRG,APM0 Trigger Register" bitfld.long 0x08 0. " START_STOP ,Start/stop trigger for operating timing mode 2 in figure 3 of specification" "Stop,Start" rgroup.long (0x100+0x0C)++0x63 line.long 0x00 "APM0_RESULT0,APM0 Result 0 Register" line.long 0x04 "APM0_RESULT1,APM0 Result 1 Register" line.long 0x08 "APM0_RESULT2,APM0 Result 2 Register" line.long 0x0C "APM0_RESULT3,APM0 Result 3 Register" line.long 0x10 "APM0_RESULT4,APM0 Result 4 Register" bitfld.long 0x10 31. " VALIDITY_CHECK ,Validity check" "Low,High" hexmask.long 0x10 0.--27. 1. " ACCUM_WR_LAT0 ,28 lsbs of accumulated write latency for 1st FIFO over configured timing window" line.long 0x14 "APM0_RESULT5,APM0 Result 5 Register" bitfld.long 0x14 31. " VALIDITY_CHECK ,Validity check" "Low,High" hexmask.long.tbyte 0x14 0.--16. 1. " ACCUM_WR_LAT0 ,17 msbs of accumulated write latency for 1st FIFO over configured timing window" line.long 0x18 "APM0_RESULT6,APM0 Result 6 Register" bitfld.long 0x18 31. " VALIDITY_CHECK ,Validity check" "Low,High" hexmask.long.word 0x18 0.--15. 1. " COUNT_WR_LAT0 ,15 lsbs of number of latencies added to get accum_wr_lat0" line.long 0x1C "APM0_RESULT7,APM0 Result 7 Register" bitfld.long 0x1C 31. " VALIDITY_CHECK ,Validity check" "Low,High" hexmask.long.word 0x1C 0.--15. 1. " COUNT_WR_LAT0 ,15 msbs of number of latencies added to get accum_wr_lat0" line.long 0x20 "APM0_RESULT8,APM0 Result 8 Register" bitfld.long 0x20 31. " VALIDITY_CHECK ,Validity check" "Low,High" hexmask.long 0x20 0.--27. 1. " ACCUM_RD_LAT0 ,28 lsbs of accumulated read latency for 1st FIFO over configured timing window" line.long 0x24 "APM0_RESULT9,APM0 Result 9 Register" bitfld.long 0x24 31. " VALIDITY_CHECK ,Validity check" "Low,High" hexmask.long.tbyte 0x24 0.--16. 1. " ACCUM_RD_LAT0 ,17 msbs of accumulated read latency for 1st FIFO over configured timing window" line.long 0x28 "APM0_RESULT10,APM0 Result 10 Register" bitfld.long 0x28 31. " VALIDITY_CHECK ,Validity check" "Low,High" hexmask.long.word 0x28 0.--15. 1. " COUNT_RD_LAT0 ,15 lsbs of number of latencies added to get accum_rd_lat0" line.long 0x2C "APM0_RESULT11,APM0 Result 11 Register" bitfld.long 0x2C 31. " VALIDITY_CHECK ,Validity check" "Low,High" hexmask.long.word 0x2C 0.--15. 1. " COUNT_RD_LAT0 ,15 msbs of number of latencies added to get accum_rd_lat0" line.long 0x30 "APM0_RESULT12,APM0 Result 12 Register" bitfld.long 0x30 31. " VALIDITY_CHECK ,Validity check" "Low,High" hexmask.long 0x30 0.--27. 1. " ACCUM_WR_LAT1 ,28 lsbs of accumulated write latency for 2nd FIFO over configured timing window" line.long 0x34 "APM0_RESULT13,APM0 Result 13 Register" bitfld.long 0x34 31. " VALIDITY_CHECK ,Validity check" "Low,High" hexmask.long.tbyte 0x34 0.--16. 1. " ACCUM_WR_LAT1 ,17 msbs of accumulated write latency for 2nd FIFO over configured timing window" line.long 0x38 "APM0_RESULT14,APM0 Result 14 Register" bitfld.long 0x38 31. " VALIDITY_CHECK ,Validity check" "Low,High" hexmask.long.word 0x38 0.--15. 1. " COUNT_WR_LAT1 ,15 lsbs of number of latencies added to get accum_wr_lat1" line.long 0x3C "APM0_RESULT15,APM0 Result 15 Register" bitfld.long 0x3C 31. " VALIDITY_CHECK ,Validity check" "Low,High" hexmask.long.word 0x3C 0.--15. 1. " COUNT_WR_LAT1 ,15 msbs of number of latencies added to get accum_wr_lat1" line.long 0x40 "APM0_RESULT16,APM0 Result 16 Register" bitfld.long 0x40 31. " VALIDITY_CHECK ,Validity check" "Low,High" hexmask.long 0x40 0.--27. 1. " ACCUM_RD_LAT1 ,28 lsbs of accumulated read latency for 2nd FIFO over configured timing window" line.long 0x44 "APM0_RESULT17,APM0 Result 17 Register" bitfld.long 0x44 31. " VALIDITY_CHECK ,Validity check" "Low,High" hexmask.long.tbyte 0x44 0.--16. 1. " ACCUM_RD_LAT1 ,17 msbs of accumulated read latency for 2nd FIFO over configured timing window" line.long 0x48 "APM0_RESULT18,APM0 Result 18 Register" bitfld.long 0x48 31. " VALIDITY_CHECK ,Validity check" "Low,High" hexmask.long.tbyte 0x48 0.--16. 1. " ACCUM_RD_LAT1 ,17 msbs of accumulated read latency for 2nd FIFO over configured timing window" line.long 0x4C "APM0_RESULT19,APM0 Result 19 Register" bitfld.long 0x4C 31. " VALIDITY_CHECK ,Validity check" "Low,High" hexmask.long.word 0x4C 0.--15. 1. " COUNT_RD_LAT1 ,15 msbs of number of latencies added to get accum_rd_lat1" line.long 0x50 "APM0_RESULT20,APM0 Result 20 Register" bitfld.long 0x50 31. " VALIDITY_CHECK ,Validity check" "Low,High" hexmask.long.word 0x50 16.--28. 1. " MIN_WR_LAT0 ,Minimum write latency for 1st FIFO over configured timing window" hexmask.long.word 0x50 0.--12. 1. " MAX_WR_LAT0 ,Maximum write latency for 1st FIFO over configured timing window" line.long 0x54 "APM0_RESULT21,APM0 Result 21 Register" bitfld.long 0x54 31. " VALIDITY_CHECK ,Validity check" "Low,High" hexmask.long.word 0x54 16.--28. 1. " MIN_RD_LAT0 ,Minimum read latency for 1st FIFO over configured timing window" hexmask.long.word 0x54 0.--12. 1. " MAX_RD_LAT0 ,Maximum read latency for 1st FIFO over configured timing window" line.long 0x58 "APM0_RESULT22,APM0 Result 22 Register" bitfld.long 0x58 31. " VALIDITY_CHECK ,Validity check" "Low,High" hexmask.long.word 0x58 16.--28. 1. " MIN_WR_LAT1 ,Minimum write latency for 2nd FIFO over configured timing window" hexmask.long.word 0x58 0.--12. 1. " MAX_WR_LAT1 ,Maximum write latency for 2nd FIFO over configured timing window" line.long 0x5C "APM0_RESULT23,APM0 Result 23 Register" bitfld.long 0x5C 31. " VALIDITY_CHECK ,Validity check" "Low,High" hexmask.long.word 0x5C 16.--28. 1. " MIN_RD_LAT1 ,Minimum read latency for 2nd FIFO over configured timing window" hexmask.long.word 0x5C 0.--12. 1. " MAX_RD_LAT1 ,Maximum read latency for 2nd FIFO over configured timing window" line.long 0x60 "APM0_RESULT24,APM0 Result 24 Register" hexmask.long.byte 0x60 24.--30. 1. " RD_FIFO1_SAMPLE_PRESENT ,No. Of samples present in 2nd read latency measurement FIFO" hexmask.long.byte 0x60 16.--22. 1. " RD_FIFO0_SAMPLE_PRESENT ,No. Of samples present in 1st read latency measurement FIFO" hexmask.long.byte 0x60 8.--14. 1. " WR_FIFO1_SAMPLE_PRESENT ,No. Of samples present in 2nd write latency measurement FIFO" hexmask.long.byte 0x60 0.--6. 1. " WR_FIFO0_SAMPLE_PRESENT ,No. Of samples present in 1st write latency measurement FIFO" tree.end tree "APM1 Registers" group.long 0x200++0x0B line.long 0x00 "APM1_CFG,APM1 Config Register" bitfld.long 0x00 28.--31. " RD_ID_LAT_FF1 ,Read ID considered for latency calculation in 2nd read FIFO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. " WR_ID_LAT_FF1 ,Write ID considered for latency calculation in 2nd write FIFO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. " RD_ID_LAT_FF0 ,Read ID considered for latency calculation in 1st read FIFO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " WR_ID_LAT_FF0 ,Write ID considered for latency calculation in 1st write FIFO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 7. " SEL_RD_ID_LAT_FF1 ,Considere rd_lat_id for latency calculation" "Rd_lat_id,All ids" bitfld.long 0x00 6. " SEL_WR_ID_LAT_FF1 ,Considere wr_lat_id for latency calculation" "Wr_lat_id,All ids" bitfld.long 0x00 5. " SEL_RD_ID_LAT_FF0 ,Considere rd_lat_id for latency calculation" "Rd_lat_id,All ids" bitfld.long 0x00 4. " SEL_WR_ID_LAT_FF0 ,Considere wr_lat_id for latency calculation" "Wr_lat_id,All ids" textline " " bitfld.long 0x00 2. " MODE ,Timing mode" "Continuous,Burst" bitfld.long 0x00 1. " ENABLE ,APM enable" "Disabled,Enabled" line.long 0x04 "APM1_TIMER,APM1 Timer Register" line.long 0x08 "APM1_TRG,APM1 Trigger Register" bitfld.long 0x08 0. " START_STOP ,Start/stop trigger for operating timing mode 2 in figure 3 of specification" "Stop,Start" rgroup.long (0x200+0x0C)++0x63 line.long 0x00 "APM1_RESULT0,APM1 Result 0 Register" line.long 0x04 "APM1_RESULT1,APM1 Result 1 Register" line.long 0x08 "APM1_RESULT2,APM1 Result 2 Register" line.long 0x0C "APM1_RESULT3,APM1 Result 3 Register" line.long 0x10 "APM1_RESULT4,APM1 Result 4 Register" bitfld.long 0x10 31. " VALIDITY_CHECK ,Validity check" "Low,High" hexmask.long 0x10 0.--27. 1. " ACCUM_WR_LAT0 ,28 lsbs of accumulated write latency for 1st FIFO over configured timing window" line.long 0x14 "APM1_RESULT5,APM1 Result 5 Register" bitfld.long 0x14 31. " VALIDITY_CHECK ,Validity check" "Low,High" hexmask.long.tbyte 0x14 0.--16. 1. " ACCUM_WR_LAT0 ,17 msbs of accumulated write latency for 1st FIFO over configured timing window" line.long 0x18 "APM1_RESULT6,APM1 Result 6 Register" bitfld.long 0x18 31. " VALIDITY_CHECK ,Validity check" "Low,High" hexmask.long.word 0x18 0.--15. 1. " COUNT_WR_LAT0 ,15 lsbs of number of latencies added to get accum_wr_lat0" line.long 0x1C "APM1_RESULT7,APM1 Result 7 Register" bitfld.long 0x1C 31. " VALIDITY_CHECK ,Validity check" "Low,High" hexmask.long.word 0x1C 0.--15. 1. " COUNT_WR_LAT0 ,15 msbs of number of latencies added to get accum_wr_lat0" line.long 0x20 "APM1_RESULT8,APM1 Result 8 Register" bitfld.long 0x20 31. " VALIDITY_CHECK ,Validity check" "Low,High" hexmask.long 0x20 0.--27. 1. " ACCUM_RD_LAT0 ,28 lsbs of accumulated read latency for 1st FIFO over configured timing window" line.long 0x24 "APM1_RESULT9,APM1 Result 9 Register" bitfld.long 0x24 31. " VALIDITY_CHECK ,Validity check" "Low,High" hexmask.long.tbyte 0x24 0.--16. 1. " ACCUM_RD_LAT0 ,17 msbs of accumulated read latency for 1st FIFO over configured timing window" line.long 0x28 "APM1_RESULT10,APM1 Result 10 Register" bitfld.long 0x28 31. " VALIDITY_CHECK ,Validity check" "Low,High" hexmask.long.word 0x28 0.--15. 1. " COUNT_RD_LAT0 ,15 lsbs of number of latencies added to get accum_rd_lat0" line.long 0x2C "APM1_RESULT11,APM1 Result 11 Register" bitfld.long 0x2C 31. " VALIDITY_CHECK ,Validity check" "Low,High" hexmask.long.word 0x2C 0.--15. 1. " COUNT_RD_LAT0 ,15 msbs of number of latencies added to get accum_rd_lat0" line.long 0x30 "APM1_RESULT12,APM1 Result 12 Register" bitfld.long 0x30 31. " VALIDITY_CHECK ,Validity check" "Low,High" hexmask.long 0x30 0.--27. 1. " ACCUM_WR_LAT1 ,28 lsbs of accumulated write latency for 2nd FIFO over configured timing window" line.long 0x34 "APM1_RESULT13,APM1 Result 13 Register" bitfld.long 0x34 31. " VALIDITY_CHECK ,Validity check" "Low,High" hexmask.long.tbyte 0x34 0.--16. 1. " ACCUM_WR_LAT1 ,17 msbs of accumulated write latency for 2nd FIFO over configured timing window" line.long 0x38 "APM1_RESULT14,APM1 Result 14 Register" bitfld.long 0x38 31. " VALIDITY_CHECK ,Validity check" "Low,High" hexmask.long.word 0x38 0.--15. 1. " COUNT_WR_LAT1 ,15 lsbs of number of latencies added to get accum_wr_lat1" line.long 0x3C "APM1_RESULT15,APM1 Result 15 Register" bitfld.long 0x3C 31. " VALIDITY_CHECK ,Validity check" "Low,High" hexmask.long.word 0x3C 0.--15. 1. " COUNT_WR_LAT1 ,15 msbs of number of latencies added to get accum_wr_lat1" line.long 0x40 "APM1_RESULT16,APM1 Result 16 Register" bitfld.long 0x40 31. " VALIDITY_CHECK ,Validity check" "Low,High" hexmask.long 0x40 0.--27. 1. " ACCUM_RD_LAT1 ,28 lsbs of accumulated read latency for 2nd FIFO over configured timing window" line.long 0x44 "APM1_RESULT17,APM1 Result 17 Register" bitfld.long 0x44 31. " VALIDITY_CHECK ,Validity check" "Low,High" hexmask.long.tbyte 0x44 0.--16. 1. " ACCUM_RD_LAT1 ,17 msbs of accumulated read latency for 2nd FIFO over configured timing window" line.long 0x48 "APM1_RESULT18,APM1 Result 18 Register" bitfld.long 0x48 31. " VALIDITY_CHECK ,Validity check" "Low,High" hexmask.long.tbyte 0x48 0.--16. 1. " ACCUM_RD_LAT1 ,17 msbs of accumulated read latency for 2nd FIFO over configured timing window" line.long 0x4C "APM1_RESULT19,APM1 Result 19 Register" bitfld.long 0x4C 31. " VALIDITY_CHECK ,Validity check" "Low,High" hexmask.long.word 0x4C 0.--15. 1. " COUNT_RD_LAT1 ,15 msbs of number of latencies added to get accum_rd_lat1" line.long 0x50 "APM1_RESULT20,APM1 Result 20 Register" bitfld.long 0x50 31. " VALIDITY_CHECK ,Validity check" "Low,High" hexmask.long.word 0x50 16.--28. 1. " MIN_WR_LAT0 ,Minimum write latency for 1st FIFO over configured timing window" hexmask.long.word 0x50 0.--12. 1. " MAX_WR_LAT0 ,Maximum write latency for 1st FIFO over configured timing window" line.long 0x54 "APM1_RESULT21,APM1 Result 21 Register" bitfld.long 0x54 31. " VALIDITY_CHECK ,Validity check" "Low,High" hexmask.long.word 0x54 16.--28. 1. " MIN_RD_LAT0 ,Minimum read latency for 1st FIFO over configured timing window" hexmask.long.word 0x54 0.--12. 1. " MAX_RD_LAT0 ,Maximum read latency for 1st FIFO over configured timing window" line.long 0x58 "APM1_RESULT22,APM1 Result 22 Register" bitfld.long 0x58 31. " VALIDITY_CHECK ,Validity check" "Low,High" hexmask.long.word 0x58 16.--28. 1. " MIN_WR_LAT1 ,Minimum write latency for 2nd FIFO over configured timing window" hexmask.long.word 0x58 0.--12. 1. " MAX_WR_LAT1 ,Maximum write latency for 2nd FIFO over configured timing window" line.long 0x5C "APM1_RESULT23,APM1 Result 23 Register" bitfld.long 0x5C 31. " VALIDITY_CHECK ,Validity check" "Low,High" hexmask.long.word 0x5C 16.--28. 1. " MIN_RD_LAT1 ,Minimum read latency for 2nd FIFO over configured timing window" hexmask.long.word 0x5C 0.--12. 1. " MAX_RD_LAT1 ,Maximum read latency for 2nd FIFO over configured timing window" line.long 0x60 "APM1_RESULT24,APM1 Result 24 Register" hexmask.long.byte 0x60 24.--30. 1. " RD_FIFO1_SAMPLE_PRESENT ,No. Of samples present in 2nd read latency measurement FIFO" hexmask.long.byte 0x60 16.--22. 1. " RD_FIFO0_SAMPLE_PRESENT ,No. Of samples present in 1st read latency measurement FIFO" hexmask.long.byte 0x60 8.--14. 1. " WR_FIFO1_SAMPLE_PRESENT ,No. Of samples present in 2nd write latency measurement FIFO" hexmask.long.byte 0x60 0.--6. 1. " WR_FIFO0_SAMPLE_PRESENT ,No. Of samples present in 1st write latency measurement FIFO" tree.end tree "APM2 Registers" group.long 0x300++0x0B line.long 0x00 "APM2_CFG,APM2 Config Register" bitfld.long 0x00 28.--31. " RD_ID_LAT_FF1 ,Read ID considered for latency calculation in 2nd read FIFO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. " WR_ID_LAT_FF1 ,Write ID considered for latency calculation in 2nd write FIFO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. " RD_ID_LAT_FF0 ,Read ID considered for latency calculation in 1st read FIFO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " WR_ID_LAT_FF0 ,Write ID considered for latency calculation in 1st write FIFO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 7. " SEL_RD_ID_LAT_FF1 ,Considere rd_lat_id for latency calculation" "Rd_lat_id,All ids" bitfld.long 0x00 6. " SEL_WR_ID_LAT_FF1 ,Considere wr_lat_id for latency calculation" "Wr_lat_id,All ids" bitfld.long 0x00 5. " SEL_RD_ID_LAT_FF0 ,Considere rd_lat_id for latency calculation" "Rd_lat_id,All ids" bitfld.long 0x00 4. " SEL_WR_ID_LAT_FF0 ,Considere wr_lat_id for latency calculation" "Wr_lat_id,All ids" textline " " bitfld.long 0x00 2. " MODE ,Timing mode" "Continuous,Burst" bitfld.long 0x00 1. " ENABLE ,APM enable" "Disabled,Enabled" line.long 0x04 "APM2_TIMER,APM2 Timer Register" line.long 0x08 "APM2_TRG,APM2 Trigger Register" bitfld.long 0x08 0. " START_STOP ,Start/stop trigger for operating timing mode 2 in figure 3 of specification" "Stop,Start" rgroup.long (0x300+0x0C)++0x63 line.long 0x00 "APM2_RESULT0,APM2 Result 0 Register" line.long 0x04 "APM2_RESULT1,APM2 Result 1 Register" line.long 0x08 "APM2_RESULT2,APM2 Result 2 Register" line.long 0x0C "APM2_RESULT3,APM2 Result 3 Register" line.long 0x10 "APM2_RESULT4,APM2 Result 4 Register" bitfld.long 0x10 31. " VALIDITY_CHECK ,Validity check" "Low,High" hexmask.long 0x10 0.--27. 1. " ACCUM_WR_LAT0 ,28 lsbs of accumulated write latency for 1st FIFO over configured timing window" line.long 0x14 "APM2_RESULT5,APM2 Result 5 Register" bitfld.long 0x14 31. " VALIDITY_CHECK ,Validity check" "Low,High" hexmask.long.tbyte 0x14 0.--16. 1. " ACCUM_WR_LAT0 ,17 msbs of accumulated write latency for 1st FIFO over configured timing window" line.long 0x18 "APM2_RESULT6,APM2 Result 6 Register" bitfld.long 0x18 31. " VALIDITY_CHECK ,Validity check" "Low,High" hexmask.long.word 0x18 0.--15. 1. " COUNT_WR_LAT0 ,15 lsbs of number of latencies added to get accum_wr_lat0" line.long 0x1C "APM2_RESULT7,APM2 Result 7 Register" bitfld.long 0x1C 31. " VALIDITY_CHECK ,Validity check" "Low,High" hexmask.long.word 0x1C 0.--15. 1. " COUNT_WR_LAT0 ,15 msbs of number of latencies added to get accum_wr_lat0" line.long 0x20 "APM2_RESULT8,APM2 Result 8 Register" bitfld.long 0x20 31. " VALIDITY_CHECK ,Validity check" "Low,High" hexmask.long 0x20 0.--27. 1. " ACCUM_RD_LAT0 ,28 lsbs of accumulated read latency for 1st FIFO over configured timing window" line.long 0x24 "APM2_RESULT9,APM2 Result 9 Register" bitfld.long 0x24 31. " VALIDITY_CHECK ,Validity check" "Low,High" hexmask.long.tbyte 0x24 0.--16. 1. " ACCUM_RD_LAT0 ,17 msbs of accumulated read latency for 1st FIFO over configured timing window" line.long 0x28 "APM2_RESULT10,APM2 Result 10 Register" bitfld.long 0x28 31. " VALIDITY_CHECK ,Validity check" "Low,High" hexmask.long.word 0x28 0.--15. 1. " COUNT_RD_LAT0 ,15 lsbs of number of latencies added to get accum_rd_lat0" line.long 0x2C "APM2_RESULT11,APM2 Result 11 Register" bitfld.long 0x2C 31. " VALIDITY_CHECK ,Validity check" "Low,High" hexmask.long.word 0x2C 0.--15. 1. " COUNT_RD_LAT0 ,15 msbs of number of latencies added to get accum_rd_lat0" line.long 0x30 "APM2_RESULT12,APM2 Result 12 Register" bitfld.long 0x30 31. " VALIDITY_CHECK ,Validity check" "Low,High" hexmask.long 0x30 0.--27. 1. " ACCUM_WR_LAT1 ,28 lsbs of accumulated write latency for 2nd FIFO over configured timing window" line.long 0x34 "APM2_RESULT13,APM2 Result 13 Register" bitfld.long 0x34 31. " VALIDITY_CHECK ,Validity check" "Low,High" hexmask.long.tbyte 0x34 0.--16. 1. " ACCUM_WR_LAT1 ,17 msbs of accumulated write latency for 2nd FIFO over configured timing window" line.long 0x38 "APM2_RESULT14,APM2 Result 14 Register" bitfld.long 0x38 31. " VALIDITY_CHECK ,Validity check" "Low,High" hexmask.long.word 0x38 0.--15. 1. " COUNT_WR_LAT1 ,15 lsbs of number of latencies added to get accum_wr_lat1" line.long 0x3C "APM2_RESULT15,APM2 Result 15 Register" bitfld.long 0x3C 31. " VALIDITY_CHECK ,Validity check" "Low,High" hexmask.long.word 0x3C 0.--15. 1. " COUNT_WR_LAT1 ,15 msbs of number of latencies added to get accum_wr_lat1" line.long 0x40 "APM2_RESULT16,APM2 Result 16 Register" bitfld.long 0x40 31. " VALIDITY_CHECK ,Validity check" "Low,High" hexmask.long 0x40 0.--27. 1. " ACCUM_RD_LAT1 ,28 lsbs of accumulated read latency for 2nd FIFO over configured timing window" line.long 0x44 "APM2_RESULT17,APM2 Result 17 Register" bitfld.long 0x44 31. " VALIDITY_CHECK ,Validity check" "Low,High" hexmask.long.tbyte 0x44 0.--16. 1. " ACCUM_RD_LAT1 ,17 msbs of accumulated read latency for 2nd FIFO over configured timing window" line.long 0x48 "APM2_RESULT18,APM2 Result 18 Register" bitfld.long 0x48 31. " VALIDITY_CHECK ,Validity check" "Low,High" hexmask.long.tbyte 0x48 0.--16. 1. " ACCUM_RD_LAT1 ,17 msbs of accumulated read latency for 2nd FIFO over configured timing window" line.long 0x4C "APM2_RESULT19,APM2 Result 19 Register" bitfld.long 0x4C 31. " VALIDITY_CHECK ,Validity check" "Low,High" hexmask.long.word 0x4C 0.--15. 1. " COUNT_RD_LAT1 ,15 msbs of number of latencies added to get accum_rd_lat1" line.long 0x50 "APM2_RESULT20,APM2 Result 20 Register" bitfld.long 0x50 31. " VALIDITY_CHECK ,Validity check" "Low,High" hexmask.long.word 0x50 16.--28. 1. " MIN_WR_LAT0 ,Minimum write latency for 1st FIFO over configured timing window" hexmask.long.word 0x50 0.--12. 1. " MAX_WR_LAT0 ,Maximum write latency for 1st FIFO over configured timing window" line.long 0x54 "APM2_RESULT21,APM2 Result 21 Register" bitfld.long 0x54 31. " VALIDITY_CHECK ,Validity check" "Low,High" hexmask.long.word 0x54 16.--28. 1. " MIN_RD_LAT0 ,Minimum read latency for 1st FIFO over configured timing window" hexmask.long.word 0x54 0.--12. 1. " MAX_RD_LAT0 ,Maximum read latency for 1st FIFO over configured timing window" line.long 0x58 "APM2_RESULT22,APM2 Result 22 Register" bitfld.long 0x58 31. " VALIDITY_CHECK ,Validity check" "Low,High" hexmask.long.word 0x58 16.--28. 1. " MIN_WR_LAT1 ,Minimum write latency for 2nd FIFO over configured timing window" hexmask.long.word 0x58 0.--12. 1. " MAX_WR_LAT1 ,Maximum write latency for 2nd FIFO over configured timing window" line.long 0x5C "APM2_RESULT23,APM2 Result 23 Register" bitfld.long 0x5C 31. " VALIDITY_CHECK ,Validity check" "Low,High" hexmask.long.word 0x5C 16.--28. 1. " MIN_RD_LAT1 ,Minimum read latency for 2nd FIFO over configured timing window" hexmask.long.word 0x5C 0.--12. 1. " MAX_RD_LAT1 ,Maximum read latency for 2nd FIFO over configured timing window" line.long 0x60 "APM2_RESULT24,APM2 Result 24 Register" hexmask.long.byte 0x60 24.--30. 1. " RD_FIFO1_SAMPLE_PRESENT ,No. Of samples present in 2nd read latency measurement FIFO" hexmask.long.byte 0x60 16.--22. 1. " RD_FIFO0_SAMPLE_PRESENT ,No. Of samples present in 1st read latency measurement FIFO" hexmask.long.byte 0x60 8.--14. 1. " WR_FIFO1_SAMPLE_PRESENT ,No. Of samples present in 2nd write latency measurement FIFO" hexmask.long.byte 0x60 0.--6. 1. " WR_FIFO0_SAMPLE_PRESENT ,No. Of samples present in 1st write latency measurement FIFO" tree.end tree "APM3 Registers" group.long 0x400++0x0B line.long 0x00 "APM3_CFG,APM3 Config Register" bitfld.long 0x00 28.--31. " RD_ID_LAT_FF1 ,Read ID considered for latency calculation in 2nd read FIFO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. " WR_ID_LAT_FF1 ,Write ID considered for latency calculation in 2nd write FIFO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. " RD_ID_LAT_FF0 ,Read ID considered for latency calculation in 1st read FIFO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " WR_ID_LAT_FF0 ,Write ID considered for latency calculation in 1st write FIFO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 7. " SEL_RD_ID_LAT_FF1 ,Considere rd_lat_id for latency calculation" "Rd_lat_id,All ids" bitfld.long 0x00 6. " SEL_WR_ID_LAT_FF1 ,Considere wr_lat_id for latency calculation" "Wr_lat_id,All ids" bitfld.long 0x00 5. " SEL_RD_ID_LAT_FF0 ,Considere rd_lat_id for latency calculation" "Rd_lat_id,All ids" bitfld.long 0x00 4. " SEL_WR_ID_LAT_FF0 ,Considere wr_lat_id for latency calculation" "Wr_lat_id,All ids" textline " " bitfld.long 0x00 2. " MODE ,Timing mode" "Continuous,Burst" bitfld.long 0x00 1. " ENABLE ,APM enable" "Disabled,Enabled" line.long 0x04 "APM3_TIMER,APM3 Timer Register" line.long 0x08 "APM3_TRG,APM3 Trigger Register" bitfld.long 0x08 0. " START_STOP ,Start/stop trigger for operating timing mode 2 in figure 3 of specification" "Stop,Start" rgroup.long (0x400+0x0C)++0x63 line.long 0x00 "APM3_RESULT0,APM3 Result 0 Register" line.long 0x04 "APM3_RESULT1,APM3 Result 1 Register" line.long 0x08 "APM3_RESULT2,APM3 Result 2 Register" line.long 0x0C "APM3_RESULT3,APM3 Result 3 Register" line.long 0x10 "APM3_RESULT4,APM3 Result 4 Register" bitfld.long 0x10 31. " VALIDITY_CHECK ,Validity check" "Low,High" hexmask.long 0x10 0.--27. 1. " ACCUM_WR_LAT0 ,28 lsbs of accumulated write latency for 1st FIFO over configured timing window" line.long 0x14 "APM3_RESULT5,APM3 Result 5 Register" bitfld.long 0x14 31. " VALIDITY_CHECK ,Validity check" "Low,High" hexmask.long.tbyte 0x14 0.--16. 1. " ACCUM_WR_LAT0 ,17 msbs of accumulated write latency for 1st FIFO over configured timing window" line.long 0x18 "APM3_RESULT6,APM3 Result 6 Register" bitfld.long 0x18 31. " VALIDITY_CHECK ,Validity check" "Low,High" hexmask.long.word 0x18 0.--15. 1. " COUNT_WR_LAT0 ,15 lsbs of number of latencies added to get accum_wr_lat0" line.long 0x1C "APM3_RESULT7,APM3 Result 7 Register" bitfld.long 0x1C 31. " VALIDITY_CHECK ,Validity check" "Low,High" hexmask.long.word 0x1C 0.--15. 1. " COUNT_WR_LAT0 ,15 msbs of number of latencies added to get accum_wr_lat0" line.long 0x20 "APM3_RESULT8,APM3 Result 8 Register" bitfld.long 0x20 31. " VALIDITY_CHECK ,Validity check" "Low,High" hexmask.long 0x20 0.--27. 1. " ACCUM_RD_LAT0 ,28 lsbs of accumulated read latency for 1st FIFO over configured timing window" line.long 0x24 "APM3_RESULT9,APM3 Result 9 Register" bitfld.long 0x24 31. " VALIDITY_CHECK ,Validity check" "Low,High" hexmask.long.tbyte 0x24 0.--16. 1. " ACCUM_RD_LAT0 ,17 msbs of accumulated read latency for 1st FIFO over configured timing window" line.long 0x28 "APM3_RESULT10,APM3 Result 10 Register" bitfld.long 0x28 31. " VALIDITY_CHECK ,Validity check" "Low,High" hexmask.long.word 0x28 0.--15. 1. " COUNT_RD_LAT0 ,15 lsbs of number of latencies added to get accum_rd_lat0" line.long 0x2C "APM3_RESULT11,APM3 Result 11 Register" bitfld.long 0x2C 31. " VALIDITY_CHECK ,Validity check" "Low,High" hexmask.long.word 0x2C 0.--15. 1. " COUNT_RD_LAT0 ,15 msbs of number of latencies added to get accum_rd_lat0" line.long 0x30 "APM3_RESULT12,APM3 Result 12 Register" bitfld.long 0x30 31. " VALIDITY_CHECK ,Validity check" "Low,High" hexmask.long 0x30 0.--27. 1. " ACCUM_WR_LAT1 ,28 lsbs of accumulated write latency for 2nd FIFO over configured timing window" line.long 0x34 "APM3_RESULT13,APM3 Result 13 Register" bitfld.long 0x34 31. " VALIDITY_CHECK ,Validity check" "Low,High" hexmask.long.tbyte 0x34 0.--16. 1. " ACCUM_WR_LAT1 ,17 msbs of accumulated write latency for 2nd FIFO over configured timing window" line.long 0x38 "APM3_RESULT14,APM3 Result 14 Register" bitfld.long 0x38 31. " VALIDITY_CHECK ,Validity check" "Low,High" hexmask.long.word 0x38 0.--15. 1. " COUNT_WR_LAT1 ,15 lsbs of number of latencies added to get accum_wr_lat1" line.long 0x3C "APM3_RESULT15,APM3 Result 15 Register" bitfld.long 0x3C 31. " VALIDITY_CHECK ,Validity check" "Low,High" hexmask.long.word 0x3C 0.--15. 1. " COUNT_WR_LAT1 ,15 msbs of number of latencies added to get accum_wr_lat1" line.long 0x40 "APM3_RESULT16,APM3 Result 16 Register" bitfld.long 0x40 31. " VALIDITY_CHECK ,Validity check" "Low,High" hexmask.long 0x40 0.--27. 1. " ACCUM_RD_LAT1 ,28 lsbs of accumulated read latency for 2nd FIFO over configured timing window" line.long 0x44 "APM3_RESULT17,APM3 Result 17 Register" bitfld.long 0x44 31. " VALIDITY_CHECK ,Validity check" "Low,High" hexmask.long.tbyte 0x44 0.--16. 1. " ACCUM_RD_LAT1 ,17 msbs of accumulated read latency for 2nd FIFO over configured timing window" line.long 0x48 "APM3_RESULT18,APM3 Result 18 Register" bitfld.long 0x48 31. " VALIDITY_CHECK ,Validity check" "Low,High" hexmask.long.tbyte 0x48 0.--16. 1. " ACCUM_RD_LAT1 ,17 msbs of accumulated read latency for 2nd FIFO over configured timing window" line.long 0x4C "APM3_RESULT19,APM3 Result 19 Register" bitfld.long 0x4C 31. " VALIDITY_CHECK ,Validity check" "Low,High" hexmask.long.word 0x4C 0.--15. 1. " COUNT_RD_LAT1 ,15 msbs of number of latencies added to get accum_rd_lat1" line.long 0x50 "APM3_RESULT20,APM3 Result 20 Register" bitfld.long 0x50 31. " VALIDITY_CHECK ,Validity check" "Low,High" hexmask.long.word 0x50 16.--28. 1. " MIN_WR_LAT0 ,Minimum write latency for 1st FIFO over configured timing window" hexmask.long.word 0x50 0.--12. 1. " MAX_WR_LAT0 ,Maximum write latency for 1st FIFO over configured timing window" line.long 0x54 "APM3_RESULT21,APM3 Result 21 Register" bitfld.long 0x54 31. " VALIDITY_CHECK ,Validity check" "Low,High" hexmask.long.word 0x54 16.--28. 1. " MIN_RD_LAT0 ,Minimum read latency for 1st FIFO over configured timing window" hexmask.long.word 0x54 0.--12. 1. " MAX_RD_LAT0 ,Maximum read latency for 1st FIFO over configured timing window" line.long 0x58 "APM3_RESULT22,APM3 Result 22 Register" bitfld.long 0x58 31. " VALIDITY_CHECK ,Validity check" "Low,High" hexmask.long.word 0x58 16.--28. 1. " MIN_WR_LAT1 ,Minimum write latency for 2nd FIFO over configured timing window" hexmask.long.word 0x58 0.--12. 1. " MAX_WR_LAT1 ,Maximum write latency for 2nd FIFO over configured timing window" line.long 0x5C "APM3_RESULT23,APM3 Result 23 Register" bitfld.long 0x5C 31. " VALIDITY_CHECK ,Validity check" "Low,High" hexmask.long.word 0x5C 16.--28. 1. " MIN_RD_LAT1 ,Minimum read latency for 2nd FIFO over configured timing window" hexmask.long.word 0x5C 0.--12. 1. " MAX_RD_LAT1 ,Maximum read latency for 2nd FIFO over configured timing window" line.long 0x60 "APM3_RESULT24,APM3 Result 24 Register" hexmask.long.byte 0x60 24.--30. 1. " RD_FIFO1_SAMPLE_PRESENT ,No. Of samples present in 2nd read latency measurement FIFO" hexmask.long.byte 0x60 16.--22. 1. " RD_FIFO0_SAMPLE_PRESENT ,No. Of samples present in 1st read latency measurement FIFO" hexmask.long.byte 0x60 8.--14. 1. " WR_FIFO1_SAMPLE_PRESENT ,No. Of samples present in 2nd write latency measurement FIFO" hexmask.long.byte 0x60 0.--6. 1. " WR_FIFO0_SAMPLE_PRESENT ,No. Of samples present in 1st write latency measurement FIFO" tree.end width 0x0B tree.end tree "ALG_VCU_DEC_TOP" base ad:0xA0020000 width 21. wgroup.long 0x9000++0x03 line.long 0x00 "MCU_RESET,MCU Subsystem Reset Register" bitfld.long 0x00 1. " MCUREGSOFTRST ,MCU registers soft reset" "No reset,Reset" bitfld.long 0x00 0. " MCUSOFTRESET ,MCU soft reset" "No reset,Reset" group.long 0x9004++0x03 line.long 0x00 "MCU_RESET_MODE,MCU Reset Mode Register" bitfld.long 0x00 0.--1. " MCURESETMODE ,MCU reset mode" "Execution start,Sleep,Debug halt,?..." rgroup.long 0x9008++0x03 line.long 0x00 "MCU_STA,MCU Status Register" bitfld.long 0x00 0. " MCUSLPSTAT ,MCU sleep status" "Not sleep mode,Sleep mode" group.long 0x900C++0x13 line.long 0x00 "MCU_WAKEUP,MCU Wake-up Register" bitfld.long 0x00 0. " MCUWAKEUP ,MCU wake-up" "No wake-up,Wake-up" line.long 0x04 "MCU_ADDR_OFFSET_IC0,MCU Instruction Cache Address Offset 0 Register" line.long 0x08 "MCU_ADDR_OFFSET_IC1,MCU Instruction Cache Address Offset 1 Register" line.long 0x0C "MCU_ADDR_OFFSET_DC0,MCU Data Cache Address Offset 0 Register" line.long 0x10 "MCU_ADDR_OFFSET_DC1,MCU Data Cache Address Offset 1 Register" wgroup.long 0x9100++0x03 line.long 0x00 "ITC_MCU_IRQ,MCU Interrupt Trigger Register" bitfld.long 0x00 0. " MCUINTTRIG ,MCU interrupt trigger" "No interrupt,Interrupt" group.long 0x9104++0x03 line.long 0x00 "ITC_CPU_IRQ_MSK,CPU Interrupt Mask Register" bitfld.long 0x00 7. " EXTIRQ1INTMASK ,EXTIRQ1 interrupt mask" "Masked,Not masked" bitfld.long 0x00 6. " EXTIRQ0INTMASK ,EXTIRQ0 interrupt mask" "Masked,Not masked" bitfld.long 0x00 5. " RRESP1INTMASK ,RRESP1 interrupt mask" "Masked,Not masked" bitfld.long 0x00 4. " BRESP1INTMASK ,BRESP1 interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x00 3. " RRESP0INTMASK ,RRESP0 interrupt mask" "Masked,Not masked" bitfld.long 0x00 2. " BRESP0INTMASK ,BRESP0 interrupt mask" "Masked,Not masked" bitfld.long 0x00 0. " MCUTOCPUINTMASK ,MCU-to-CPU interrupt mask" "Masked,Not masked" wgroup.long 0x9108++0x03 line.long 0x00 "ITC_CPU_IRQ_CLR,CPU Interrupt Clear Register" bitfld.long 0x00 7. " EXTIRQ1INTCLR ,EXTIRQ1 interrupt clear" "No effect,Clear" bitfld.long 0x00 6. " EXTIRQ0INTCLR ,EXTIRQ0 interrupt clear" "No effect,Clear" bitfld.long 0x00 5. " RRESP1INTCLR ,RRESP1 interrupt clear" "No effect,Clear" bitfld.long 0x00 4. " BRESP1INTCLR ,BRESP1 interrupt clear" "No effect,Clear" textline " " bitfld.long 0x00 3. " RRESP0INTCLR ,RRESP0 interrupt clear" "No effect,Clear" bitfld.long 0x00 2. " BRESP0INTCLR ,BRESP0 interrupt clear" "No effect,Clear" bitfld.long 0x00 0. " MCUTOCPUINTCLR ,MCU-to-CPU interrupt clear" "No effect,Clear" rgroup.long 0x910C++0x03 line.long 0x00 "ITC_CPU_IRQ_STA,CPU Interrupt Status Register" bitfld.long 0x00 7. " EXTIRQ1INTSTAT ,EXTIRQ1 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 6. " EXTIRQ0INTSTAT ,EXTIRQ0 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 5. " RRESP1INTSTAT ,RRESP1 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 4. " BRESP1INTSTAT ,BRESP1 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 3. " RRESP0INTSTAT ,RRESP0 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 2. " BRESP0INTSTAT ,BRESP0 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 0. " MCUTOCPUINTSTAT ,MCU-to-CPU interrupt status" "No interrupt,Interrupt" group.long 0x9204++0x07 line.long 0x00 "AXI_BW,AXI Bandwidth Measurement Window Register" line.long 0x04 "AXI_ADDR_OFFSET_IP,Video Data Address Offset Register" rgroup.long 0x9210++0x0F line.long 0x00 "AXI_RBW0,AXI Read Bandwidth Status Register 0" line.long 0x04 "AXI_RBW1,AXI Read Bandwidth Status Register 1" line.long 0x08 "AXI_WBW0,AXI Write Bandwidth Status Register 0" line.long 0x0C "AXI_WBW1,AXI Write Bandwidth Status Register 1" group.long 0x9220++0x07 line.long 0x00 "AXI_RBL0,AXI Read Bandwidth Limiter 0 Register" hexmask.long.word 0x00 16.--31. 1. " AXIREADBWLIMTHR0 ,Port 0 read bandwidth limiter threshold" hexmask.long.word 0x00 0.--15. 1. " AXIREADBWLIMWIN0 ,Port 0 read bandwidth limiter window" line.long 0x04 "AXI_RBL1,AXI Read Bandwidth Limiter 1 Register" hexmask.long.word 0x04 16.--31. 1. " AXIREADBWLIMTHR0 ,Port 1 read bandwidth limiter threshold" hexmask.long.word 0x04 0.--15. 1. " AXIREADBWLIMWIN0 ,Port 1 read bandwidth limiter window" width 0x0B tree.end tree "ALG_VCU_ENC_TOP" base ad:0xA0000000 width 21. wgroup.long 0x9000++0x03 line.long 0x00 "MCU_RESET,MCU Subsystem Reset Register" bitfld.long 0x00 1. " MCUREGSOFTRST ,MCU registers soft reset" "No reset,Reset" bitfld.long 0x00 0. " MCUSOFTRESET ,MCU soft reset" "No reset,Reset" group.long 0x9004++0x03 line.long 0x00 "MCU_RESET_MODE,MCU Reset Mode Register" bitfld.long 0x00 0.--1. " MCURESETMODE ,MCU reset mode" "Execution start,Sleep,Debug halt,?..." rgroup.long 0x9008++0x03 line.long 0x00 "MCU_STA,MCU Status Register" bitfld.long 0x00 0. " MCUSLPSTAT ,MCU sleep status" "Not sleep mode,Sleep mode" group.long 0x900C++0x13 line.long 0x00 "MCU_WAKEUP,MCU Wake-up Register" bitfld.long 0x00 0. " MCUWAKEUP ,MCU wake-up" "No wake-up,Wake-up" line.long 0x04 "MCU_ADDR_OFFSET_IC0,MCU Instruction Cache Address Offset 0 Register" line.long 0x08 "MCU_ADDR_OFFSET_IC1,MCU Instruction Cache Address Offset 1 Register" line.long 0x0C "MCU_ADDR_OFFSET_DC0,MCU Data Cache Address Offset 0 Register" line.long 0x10 "MCU_ADDR_OFFSET_DC1,MCU Data Cache Address Offset 1 Register" wgroup.long 0x9100++0x03 line.long 0x00 "ITC_MCU_IRQ,MCU Interrupt Trigger Register" bitfld.long 0x00 0. " MCUINTTRIG ,MCU interrupt trigger" "No interrupt,Interrupt" group.long 0x9104++0x03 line.long 0x00 "ITC_CPU_IRQ_MSK,CPU Interrupt Mask Register" bitfld.long 0x00 7. " EXTIRQ1INTMASK ,EXTIRQ1 interrupt mask" "Masked,Not masked" bitfld.long 0x00 6. " EXTIRQ0INTMASK ,EXTIRQ0 interrupt mask" "Masked,Not masked" bitfld.long 0x00 5. " RRESP1INTMASK ,RRESP1 interrupt mask" "Masked,Not masked" bitfld.long 0x00 4. " BRESP1INTMASK ,BRESP1 interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x00 3. " RRESP0INTMASK ,RRESP0 interrupt mask" "Masked,Not masked" bitfld.long 0x00 2. " BRESP0INTMASK ,BRESP0 interrupt mask" "Masked,Not masked" bitfld.long 0x00 0. " MCUTOCPUINTMASK ,MCU-to-CPU interrupt mask" "Masked,Not masked" wgroup.long 0x9108++0x03 line.long 0x00 "ITC_CPU_IRQ_CLR,CPU Interrupt Clear Register" bitfld.long 0x00 7. " EXTIRQ1INTCLR ,EXTIRQ1 interrupt clear" "No effect,Clear" bitfld.long 0x00 6. " EXTIRQ0INTCLR ,EXTIRQ0 interrupt clear" "No effect,Clear" bitfld.long 0x00 5. " RRESP1INTCLR ,RRESP1 interrupt clear" "No effect,Clear" bitfld.long 0x00 4. " BRESP1INTCLR ,BRESP1 interrupt clear" "No effect,Clear" textline " " bitfld.long 0x00 3. " RRESP0INTCLR ,RRESP0 interrupt clear" "No effect,Clear" bitfld.long 0x00 2. " BRESP0INTCLR ,BRESP0 interrupt clear" "No effect,Clear" bitfld.long 0x00 0. " MCUTOCPUINTCLR ,MCU-to-CPU interrupt clear" "No effect,Clear" rgroup.long 0x910C++0x03 line.long 0x00 "ITC_CPU_IRQ_STA,CPU Interrupt Status Register" bitfld.long 0x00 7. " EXTIRQ1INTSTAT ,EXTIRQ1 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 6. " EXTIRQ0INTSTAT ,EXTIRQ0 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 5. " RRESP1INTSTAT ,RRESP1 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 4. " BRESP1INTSTAT ,BRESP1 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 3. " RRESP0INTSTAT ,RRESP0 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 2. " BRESP0INTSTAT ,BRESP0 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 0. " MCUTOCPUINTSTAT ,MCU-to-CPU interrupt status" "No interrupt,Interrupt" group.long 0x9204++0x07 line.long 0x00 "AXI_BW,AXI Bandwidth Measurement Window Register" line.long 0x04 "AXI_ADDR_OFFSET_IP,Video Data Address Offset Register" rgroup.long 0x9210++0x0F line.long 0x00 "AXI_RBW0,AXI Read Bandwidth Status Register 0" line.long 0x04 "AXI_RBW1,AXI Read Bandwidth Status Register 1" line.long 0x08 "AXI_WBW0,AXI Write Bandwidth Status Register 0" line.long 0x0C "AXI_WBW1,AXI Write Bandwidth Status Register 1" group.long 0x9220++0x07 line.long 0x00 "AXI_RBL0,AXI Read Bandwidth Limiter 0 Register" hexmask.long.word 0x00 16.--31. 1. " AXIREADBWLIMTHR0 ,Port 0 read bandwidth limiter threshold" hexmask.long.word 0x00 0.--15. 1. " AXIREADBWLIMWIN0 ,Port 0 read bandwidth limiter window" line.long 0x04 "AXI_RBL1,AXI Read Bandwidth Limiter 1 Register" hexmask.long.word 0x04 16.--31. 1. " AXIREADBWLIMTHR0 ,Port 1 read bandwidth limiter threshold" hexmask.long.word 0x04 0.--15. 1. " AXIREADBWLIMWIN0 ,Port 1 read bandwidth limiter window" width 0x0B tree.end tree.end textline " "