; -------------------------------------------------------------------------------- ; @Title: MEC170x On-Chip Peripherals ; @Props: Released ; @Author: DAS, DLI, PAM ; @Changelog: 2019-08-21 DLI ; @Manufacturer: Microchip Technology Inc. ; @Doc: MEC170x-Data-Sheet-DS00002206E.pdf (Rev. DS00002206E, 2019-13-03) ; 00002379A.pdf (Rev. DS00002379A, 2017-24-02) ; @Chip: MEC1701HC1SZ, MEC1701QC2SZ, MEC1701QC2TN, MEC1703KF2SZ, MEC1703KP2XY, ; MEC1703QC2XY, MEC1703QF2SZ, MEC1704QC2SZ, MEC1705QC2SZ ; @Core: Cortex-M4F ; @Copyright: (C) 1989-2021 Lauterbach GmbH, licensed for use with TRACE32(R) only ; -------------------------------------------------------------------------------- ; $Id: permec170x.per 17736 2024-04-08 09:26:07Z kwisniewski $ ; Known Problems: ; MODULE REGISTER DESCRIPTION ; PCR PCR_POWER_RESET_STATUS_REGISTER Incorrect doubled descriptions of same bit 11 in reference manual ; (implemented if statement with POWER_RESET_CONTROL_REGISTER to solve the problem) ; SF PUBLIC_KEY_ENGINE The registers are not listed as mentioned in chapter 47.11.1 ; RANDOM_NUMBER_GENERATOR ; HASH_ENGINE ; SYMMETRIC_ENCRYPTION_ENGINE ; eSPI MEMORY COMPONENT REGISTERS Missing registers in chapter 10.7.2, these are shown in register map on page 143-144 ; RTC Wrong base address (400F3778h) in table 3.7 on page 143 ; Basic Timer TIMER_STATUS_REGISTER Too much reserved memory space, bit 0 is duplicated ; TIMER_INT_ENABLE_REGISTER ; TACH TACHX_HIGH_LIMIT_REGISTER Missing "X" character by the hexmask description (TACH_HIGH_LIMIT), ; should be TACHX_HIGH_LIMIT as in the TACHX_LOW_LIMIT_REGISTER (TACHX_LOW_LIMIT) ; RPM-PWM Interface FAN_STATUS_REGISTER Wrong description of the bit "1" ; I2C/SMBUS INTERFACE ALL No additional documentation for registers. Found only: 00002379A.pdf ; EC Subsystem Registers SRAMCR Different offset addresses between register summary table and register description ; LPC TEST No enough space in memory for second TEST register on 0x400F3124 address ; LPC MAILBOX - EMI2 6-bytes registers has been implemented as three 2-bytes registers to avoid address errors ; EC Subsystem Registers AHBECR Register size doesn't match register map offset tree.close "Core Registers (Cortex-M4F)" AUTOINDENT.PUSH AUTOINDENT.OFF tree "System Control" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 12. group.long 0x08++0x03 line.long 0x00 "ACTLR,Auxiliary Control Register" bitfld.long 0x00 9. " DISFPCA ,Disables lazy stacking of floating point context" "No,Yes" bitfld.long 0x00 8. " DISOOFP ,Disables floating point instructions completing" "No,Yes" bitfld.long 0x00 2. " DISFOLD ,Disables folding of IT instructions" "No,Yes" textline " " bitfld.long 0x00 1. " DISDEFWBUF ,Disables write buffer use during default memory map accesses" "No,Yes" bitfld.long 0x00 0. " DISMCYCINT ,Disables interruption of multi-cycle instructions" "No,Yes" group.long 0x10++0x0B line.long 0x00 "SYST_CSR,SysTick Control and Status Register" rbitfld.long 0x00 16. " COUNTFLAG ,Counter Flag" "Not counted,Counted" bitfld.long 0x00 2. " CLKSOURCE ,SysTick clock source" "External,Core" bitfld.long 0x00 1. " TICKINT ,SysTick Handler" "No SysTick,SysTick" textline " " bitfld.long 0x00 0. " ENABLE ,Counter Enable" "Disabled,Enabled" line.long 0x04 "SYST_RVR,SysTick Reload Value Register" hexmask.long.tbyte 0x04 0.--23. 1. " RELOAD ,The value to load into the SYST_CVR when the counter reaches 0" line.long 0x08 "SYST_CVR,SysTick Current Value Register" rgroup.long 0x1C++0x03 line.long 0x00 "SYST_CALIB,SysTick Calibration Value Register" bitfld.long 0x00 31. " NOREF ,Indicates whether the implementation defined reference clock is implemented" "Implemented,Not implemented" bitfld.long 0x00 30. " SKEW ,Indicates whether the 10ms calibration value is exact" "Exact,Inexact" hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Holds a reload value to be used for 10ms (100Hz) timing" rgroup.long 0xD00++0x03 line.long 0x00 "CPUID,CPU ID Base Register" hexmask.long.byte 0x00 24.--31. 1. " IMPLEMENTER ,Implementer Code" bitfld.long 0x00 20.--23. " VARIANT ,Indicates processor revision" "Revision 0,?..." bitfld.long 0x00 16.--19. " ARCHITECTURE ,Architecture" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.word 0x00 4.--15. 1. " PARTNO ,Indicates part number" bitfld.long 0x00 0.--3. " REVISION ,Indicates patch release" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0xD04++0x23 line.long 0x00 "ICSR,Interrupt Control State Register" bitfld.long 0x00 31. " NMIPENDSET ,Set Pending NMI Bit" "Inactive,Active" bitfld.long 0x00 28. " PENDSVSET ,Set Pending pendSV Bit" "Not pending,Pending" bitfld.long 0x00 27. " PENDSVCLR ,Removes the pending status of the PendSV exception" "No effect,Removed" textline " " bitfld.long 0x00 26. " PENDSTSET ,Set Pending SysTick Bit" "Not pending,Pending" bitfld.long 0x00 25. " PENDSTCLR ,Clear Pending SysTick Bit" "No effect,Removed" bitfld.long 0x00 23. " ISRPREEMPT ,Use Only at Debug Time" "Not active,Active" textline " " bitfld.long 0x00 22. " ISRPENDING ,Indicates whether an external interrupt" "Not pending,Pending" hexmask.long.word 0x00 12.--20. 1. " VECTPENDING ,Pending ISR Number Field" bitfld.long 0x00 11. " RETTOBASE ,Interrupt Exception" "Active,Not active" textline " " hexmask.long.word 0x00 0.--8. 1. " VECTACTIVE ,The exception number of the current executing exception" line.long 0x04 "VTOR,Vector Table Offset Register" hexmask.long 0x04 7.--31. 0x80 " TBLOFF ,Vector table address" line.long 0x08 "AIRCR,Application Interrupt and Reset Control Register" hexmask.long.word 0x08 16.--31. 1. " VECTKEY ,Register Key" rbitfld.long 0x08 15. " ENDIANESS ,Data endianness Bit" "Little,Big" bitfld.long 0x08 8.--10. " PRIGROUP ,Interrupt Priority Grouping Field" "[7:1]/[0],[7:2]/[1:0],[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]" textline " " bitfld.long 0x08 2. " SYSRESETREQ ,System Reset Request" "Not requested,Requested" bitfld.long 0x08 1. " VECTCLRACTIVE ,Clear Active Vector Bit" "No effect,Clear" bitfld.long 0x08 0. " VECTRESET ,System Reset" "No effect,Reset" line.long 0x0C "SCR,System Control Register" bitfld.long 0x0C 4. " SEVONPEND ,Determines whether an interrupt transition from inactive state to pending state is a wakeup event" "Not wakeup,Wakeup" bitfld.long 0x0C 2. " SLEEPDEEP ,Provides a qualifying hint indicating that waking from sleep might take longer" "Not deep sleep,Deep sleep" bitfld.long 0x0C 1. " SLEEPONEXIT ,Determines whether, on an exit from an ISR that returns to the base level of execution priority, the processor enters a sleep state" "Disabled,Enabled" line.long 0x10 "CCR,Configuration Control Register" bitfld.long 0x10 18. " BP ,Branch prediction enable bit" "Disabled,Enabled" bitfld.long 0x10 17. " IC ,Instruction cache enable bit" "Disabled,Enabled" bitfld.long 0x10 16. " DC ,Cache enable bit" "Disabled,Enabled" textline " " bitfld.long 0x10 9. " STKALIGN ,8-byte Stack Frame Alignment" "4-byte/no adjustment,8-byte/adjustment" bitfld.long 0x10 8. " BFHFNMIGN ,Enable NMI and Hard Fault and FAULTMASK to Ignore Bus Fault" "Disabled,Enabled" bitfld.long 0x10 4. " DIV_0_TRP ,Trap Divide by Zero" "Disabled,Enabled" textline " " bitfld.long 0x10 3. " UNALIGN_TRP ,Trap for Unaligned Access" "Disabled,Enabled" bitfld.long 0x10 1. " USERSETMPEND ,Controls whether unprivileged software can access the STIR" "Denied,Allowed" bitfld.long 0x10 0. " NONEBASETHRDENA ,Control Entry to Thread Mode" "Only from last exception,Any level" line.long 0x14 "SHPR1,SSystem Handler Priority Register 1" hexmask.long.byte 0x14 24.--31. 1. " PRI_7 ,Priority of System Handler 7" hexmask.long.byte 0x14 16.--23. 1. " PRI_6 ,Priority of system handler 6(UsageFault)" hexmask.long.byte 0x14 8.--15. 1. " PRI_5 ,Priority of system handler 5(BusFault)" textline " " hexmask.long.byte 0x14 0.--7. 1. " PRI_4 ,Priority of system handler 4(MemManage)" line.long 0x18 "SHPR2,System Handler Priority Register 2" hexmask.long.byte 0x18 24.--31. 1. " PRI_11 ,Priority of system handler 11(SVCall)" hexmask.long.byte 0x18 16.--23. 1. " PRI_10 ,Priority of System Handler 10" hexmask.long.byte 0x18 8.--15. 1. " PRI_9 ,Priority of System Handler 9" textline " " hexmask.long.byte 0x18 0.--7. 1. " PRI_8 ,Priority of System Handler 8" line.long 0x1C "SHPR3,System Handler Priority Register 3" hexmask.long.byte 0x1C 24.--31. 1. " PRI_15 ,Priority of System Handler 15(SysTick)" hexmask.long.byte 0x1C 16.--23. 1. " PRI_14 ,Priority of System Handler 14(PendSV)" hexmask.long.byte 0x1C 8.--15. 1. " PRI_13 ,Priority of System Handler 13" textline " " hexmask.long.byte 0x1C 0.--7. 1. " PRI_12 ,Priority of System Handler 12(DebugMonitor)" line.long 0x20 "SHCSR,System Handler Control and State Register" bitfld.long 0x20 18. " USGFAULTENA ,Enable UsageFault" "Disabled,Enabled" bitfld.long 0x20 17. " BUSFAULTENA ,Enable BusFault" "Disabled,Enabled" bitfld.long 0x20 16. " MEMFAULTENA ,Enable MemManage fault" "Disabled,Enabled" textline " " bitfld.long 0x20 15. " SVCALLPENDED ,SVCall is pending" "Not pending,Pending" bitfld.long 0x20 14. " BUSFAULTPENDED ,BusFault is pending" "Not pending,Pending" bitfld.long 0x20 13. " MEMFAULTPENDED ,MemManage is pending" "Not pending,Pending" textline " " bitfld.long 0x20 12. " USGFAULTPENDED ,UsageFault is pending" "Not pending,Pending" bitfld.long 0x20 11. " SYSTICKACT ,SysTick is Active" "Not active,Active" bitfld.long 0x20 10. " PENDSVACT ,PendSV is Active" "Not active,Active" textline " " bitfld.long 0x20 8. " MONITORACT ,Monitor is Active" "Not active,Active" bitfld.long 0x20 7. " SVCALLACT ,SVCall is Active" "Not active,Active" bitfld.long 0x20 3. " USGFAULTACT ,UsageFault is Active" "Not active,Active" textline " " bitfld.long 0x20 1. " BUSFAULTACT ,BusFault is Active" "Not active,Active" bitfld.long 0x20 0. " MEMFAULTACT ,MemManage is Active" "Not active,Active" group.byte 0xD28++0x1 line.byte 0x00 "MMFSR,MemManage Status Register" bitfld.byte 0x00 7. " MMARVALID ,Address Valid Flag" "Not valid,Valid" bitfld.byte 0x00 5. " MLSPERR ,A MemManage fault occurred during FP lazy state preservation" "Not occurred,Occurred" bitfld.byte 0x00 4. " MSTKERR ,tacking Access Violations" "Not occurred,Occurred" textline " " bitfld.byte 0x00 3. " MUNSTKERR ,Unstack Access Violations" "Not occurred,Occurred" bitfld.byte 0x00 1. " DACCVIOL ,Data Access Violation" "Not occurred,Occurred" bitfld.byte 0x00 0. " IACCVIOL ,Instruction Access Violation" "Not occurred,Occurred" line.byte 0x01 "BFSR,Bus Fault Status Register" bitfld.byte 0x01 7. " BFARVALID ,Address Valid Flag" "Not valid,Valid" bitfld.byte 0x01 5. " LSPERR ,A bus fault occurred during FP lazy state preservation" "Not occurred,Occurred" bitfld.byte 0x01 4. " STKERR ,Derived bus fault(exception entry)" "Not occurred,Occurred" textline " " bitfld.byte 0x01 3. " UNSTKERR ,Derived bus fault(exception return)" "Not occurred,Occurred" bitfld.byte 0x01 2. " IMPRECISERR ,Imprecise data access error" "Not occurred,Occurred" bitfld.byte 0x01 1. " PRECISERR ,Precise data access error" "Not occurred,Occurred" textline " " bitfld.byte 0x01 0. " IBUSERR ,Bus fault on an instruction prefetch" "Not occurred,Occurred" group.word 0xD2A++0x1 line.word 0x00 "USAFAULT,Usage Fault Status Register" bitfld.word 0x00 9. " DIVBYZERO ,Divide by zero error" "No error,Error" bitfld.word 0x00 8. " UNALIGNED ,Unaligned access error" "No error,Error" bitfld.word 0x00 3. " NOCP ,A coprocessor access error" "No error,Error" textline " " bitfld.word 0x00 2. " INVPC ,An integrity check error" "No error,Error" bitfld.word 0x00 1. " INVSTATE ,Invalid Combination of EPSR and Instruction" "No error,Error" bitfld.word 0x00 0. " UNDEFINSTR ,Undefined instruction error" "No error,Error" group.long 0xD2C++0x07 line.long 0x00 "HFSR,Hard Fault Status Register" bitfld.long 0x00 31. " DEBUGEVT ,Indicates when a Debug event has occurred" "Not occurred,Occurred" bitfld.long 0x00 30. " FORCED ,Indicates that a fault with configurable priority" "Not occurred,Occurred" bitfld.long 0x00 1. " VECTTBL ,Indicates when a fault has occurred because of a vector table read error on exception processing" "Not occurred,Occurred" line.long 0x04 "DFSR,Debug Fault Status Register" bitfld.long 0x04 4. " EXTERNAL ,Indicates a debug event generated because of the assertion of EDBGRQ" "Not asserted,Asserted" bitfld.long 0x04 3. " VCATCH ,Vector Catch Flag" "Not occurred,Occurred" bitfld.long 0x04 2. " DWTTRAP ,Indicates a debug event generated by the DWT" "Not occurred,Occurred" textline " " bitfld.long 0x04 1. " BKPT ,BKPT Flag" "Not executed,Executed" bitfld.long 0x04 0. " HALTED ,Indicates a debug event generated by either" "Not requested,Requested" group.long 0xD34++0x0B line.long 0x00 "MMFAR,MemManage Fault Address Register" line.long 0x04 "BFAR,BusFault Address Register" line.long 0x08 "AFSR,Auxiliary Fault Status Register" group.long 0xD88++0x03 line.long 0x00 "CPACR,Coprocessor Access Control Register" bitfld.long 0x00 22.--23. " CP11 ,Access privileges for coprocessor 11" "Access denied,Privileged only,Reserved,Full access" bitfld.long 0x00 20.--21. " CP10 ,Access privileges for coprocessor 10" "Access denied,Privileged only,Reserved,Full access" bitfld.long 0x00 14.--15. " CP7 ,Access privileges for coprocessor 7" "Access denied,Privileged only,Reserved,Full access" textline " " bitfld.long 0x00 12.--13. " CP6 ,Access privileges for coprocessor 6" "Access denied,Privileged only,Reserved,Full access" bitfld.long 0x00 10.--11. " CP5 ,Access privileges for coprocessor 5" "Access denied,Privileged only,Reserved,Full access" bitfld.long 0x00 8.--9. " CP4 ,Access privileges for coprocessor 4" "Access denied,Privileged only,Reserved,Full access" textline " " bitfld.long 0x00 6.--7. " CP3 ,Access privileges for coprocessor 3" "Access denied,Privileged only,Reserved,Full access" bitfld.long 0x00 4.--5. " CP2 ,Access privileges for coprocessor 2" "Access denied,Privileged only,Reserved,Full access" bitfld.long 0x00 2.--3. " CP1 ,Access privileges for coprocessor 1" "Access denied,Privileged only,Reserved,Full access" textline " " bitfld.long 0x00 0.--1. " CP0 ,Access privileges for coprocessor 0" "Access denied,Privileged only,Reserved,Full access" wgroup.long 0xF00++0x03 line.long 0x00 "STIR,Software Trigger Interrupt Register" hexmask.long.word 0x00 0.--8. 1. " INTID ,Indicates the interrupt to be triggered" width 10. tree "Feature Registers" rgroup.long 0xD40++0x0B line.long 0x00 "ID_PFR0,Processor Feature Register 0" bitfld.long 0x00 4.--7. " STATE1 ,Thumb instruction set support" ",,,Supported,?..." bitfld.long 0x00 0.--3. " STATE0 ,ARM instruction set support" "Not supported,?..." line.long 0x04 "ID_PFR1,Processor Feature Register 1" bitfld.long 0x04 8.--11. " MPROF ,M profile programmers' model" ",,2-stack,?..." line.long 0x08 "ID_DFR0,Debug Feature Register 0" bitfld.long 0x08 20.--23. " DBGMOD ,Support for memory-mapped debug model for M profile processors" "Not supported,Supported,?..." hgroup.long 0xD4C++0x03 hide.long 0x00 "ID_AFR0,Auxiliary Feature Register 0" rgroup.long 0xD50++0x03 line.long 0x00 "ID_MMFR0,Memory Model Feature Register 0" bitfld.long 0x00 20.--23. " AUXREG ,Indicates the support for Auxiliary registers" "Not supported,ACTLR only,?..." bitfld.long 0x00 16.--19. " TCMSUP ,Indicates the support for Tightly Coupled Memory (TCM)" "Not supported,Supported,?..." bitfld.long 0x00 12.--15. " SHRLEV ,Indicates the number of shareability levels implemented" "Level 1,?..." textline " " bitfld.long 0x00 8.--11. " OUTMSHR ,Indicates the outermost shareability domain implemented" "Non-cacheable,,,,,,,,,,,,,,,Ignored" bitfld.long 0x00 4.--7. " PMSASUP ,Indicates support for a PMSA" "Not supported,,,PMSAv7,?..." hgroup.long 0xD54++0x03 hide.long 0x00 "ID_MMFR1,Memory Model Feature Register 1" rgroup.long 0xD58++0x03 line.long 0x00 "ID_MMFR2,Memory Model Feature Register 2" bitfld.long 0x00 24.--27. " WFISTALL ,Indicates the support for Wait For Interrupt (WFI) stalling" "Not supported,Supported,?..." rgroup.long 0xD60++0x13 line.long 0x00 "ID_ISAR0,Instruction Set Attributes Register 0" bitfld.long 0x00 24.--27. " DIVIDE ,Indicates the supported divide instructions" "Not supported,SDIV/UDIV,?..." bitfld.long 0x00 20.--23. " DEBUG ,Indicates the supported debug instructions" "Not supported,BKPT,?..." bitfld.long 0x00 16.--19. " COPROC ,Indicates the supported coprocessor instructions" "Not supported,CDP/LDC/MCR/STC,CDP2/LDC2/MCR2/STC2,MCRR/MRRC,MCRR2/MRRC2,?..." textline " " bitfld.long 0x00 12.--15. " CMPBRANCH ,Indicates the supported combined compare and branch instructions" "Not supported,CBNZ/CBZ,?..." bitfld.long 0x00 8.--11. " BITFIELD ,Indicates the supported bitfield instructions" "Not supported,BFC/BFI/SBFX/UBFX,?..." bitfld.long 0x00 4.--7. " BITCOUNT ,Indicates the supported bit counting instructions" "Not supported,CLZ,?..." line.long 0x04 "ID_ISAR1,Instruction Set Attributes Register 1" bitfld.long 0x04 24.--27. " INTERWORK ,Indicates the supported Interworking instructions" "Not supported,BX,BX/BLX,?..." bitfld.long 0x04 20.--23. " IMMEDIATE ,Indicates the support for data-processing instructions with long immediates" "Not supported,ADDW/MOVW/MOVT/SUBW,?..." bitfld.long 0x04 16.--19. " IFTHEN ,Indicates the supported IfThen instructions" "Not supported,IT,?..." textline " " bitfld.long 0x04 12.--15. " EXTEND ,Indicates the supported Extend instructions" "Not supported,Supported,Supported,?..." line.long 0x08 "ID_ISAR2,Instruction Set Attributes Register 2" bitfld.long 0x08 24.--27. " REVERSAL ,Indicates the supported reversal instructions" "Not supported,REV/REV16/REVSH,REV/REV16/REVSH/RBIT,?..." bitfld.long 0x08 20.--23. " MULTU ,Indicates the supported advanced unsigned multiply instructions" "Not supported,UMULL/UMLAL,UMULL/UMLAL/UMAAL,?..." bitfld.long 0x08 16.--19. " MULTS ,Indicates the supported advanced signed multiply instructions" "Not supported,Supported,Supported,Supported,?..." textline " " bitfld.long 0x08 12.--15. " MULT ,Indicates the supported additional multiply instructions" "Not supported,MLA,MLA/MLS,?..." bitfld.long 0x08 8.--11. " MULTIACCESSINT ,Indicates the support for multi-access interruptible instructions" "Not supported,LDM/STM restartable,LDM/STM continuable,?..." bitfld.long 0x08 4.--7. " MEMHINT ,Indicates the supported memory hint instructions" "Not supported,,,PLD/PLI,?..." textline " " bitfld.long 0x08 0.--3. " LOADSTORE ,Indicates the supported additional load and store instructions" "Not supported,LDRD/STRD,?..." line.long 0x0C "ID_ISAR3,Instruction Set Attributes Register 3" bitfld.long 0x0C 24.--27. " TRUENOP ,Indicates the support for a true NOP instruction" "Not supported,Supported,?..." bitfld.long 0x0C 20.--23. " THUMBCOPY ,Indicates the supported non flag-setting MOV instructions" "Not supported,Supported,?..." bitfld.long 0x0C 16.--19. " TABBRANCH ,Indicates the supported Table Branch instructions" "Not supported,TBB/TBH,?..." textline " " bitfld.long 0x0C 12.--15. " SYNCHPRIM ,Indicates the supported Table Branch instructions" "Not supported,Supported,Supported,Supported,?..." bitfld.long 0x0C 8.--11. " SVC ,Indicates the supported SVC instructions" "Not supported,SVC,?..." bitfld.long 0x0C 4.--7. " SIMD ,Indicates the supported SIMD instructions" "Not supported,Supported,,Supported,?..." textline " " bitfld.long 0x0C 0.--3. " SATURATE ,Indicates the supported Saturate instructions" "Not supported,QADD/QDADD/QDSUB/QSUB,?..." line.long 0x10 "ID_ISAR4,Instruction Set Attributes Register 4" bitfld.long 0x10 24.--27. " PSR_M ,Indicates the supported M profile instructions to modify the PSRs" "Not supported,Supported,?..." bitfld.long 0x10 20.--23. " SYNCHPRIMFRAC ,Indicates the supported M profile instructions to modify the PSRs" "Not supported,Supported,Supported,Supported,?..." bitfld.long 0x10 16.--19. " BARRIER ,Indicates the supported Barrier instructions" "Not supported,DMB/DSB/ISB,?..." textline " " bitfld.long 0x10 8.--11. " WRITEBACK ,Indicates the support for writeback addressing modes" "Basic support,Full support,?..." bitfld.long 0x10 4.--7. " WITHSHIFTS ,Indicates the support for instructions with shifts" "MOV/shift,Shift LSL 0-3,,Shift other,?..." bitfld.long 0x10 0.--3. " UNPRIV ,Indicates the supported unprivileged instructions" "Not supported,LDRBT/LDRT/STRBT/STRT,LDRBT/LDRT/STRBT/STRT/LDRHT/LDRSBT/LDRSHTSTRHT,?..." tree.end width 6. tree "CoreSight Identification Registers" rgroup.long 0xFE0++0x0F line.long 0x00 "PID0,Peripheral ID0" hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]" line.long 0x04 "PID1,Peripheral ID1" hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]" hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]" line.long 0x08 "PID2,Peripheral ID2" hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision" bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC" hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]" line.long 0x0C "PID3,Peripheral ID3" hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field" hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block" rgroup.long 0xFD0++0x03 line.long 0x00 "PID4,Peripheral Identification Register 4" hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count" hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code" rgroup.long 0xFF0++0x0F line.long 0x00 "CID0,Component ID0 (Preamble)" line.long 0x04 "CID1,Component ID1" hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class" hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble" line.long 0x08 "CID2,Component ID2" line.long 0x0C "CID3,Component ID3" tree.end width 0x0B else newline textline "COREDEBUG component base address not specified" newline endif tree.end tree "Memory Protection Unit" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 15. rgroup.long 0xD90++0x03 line.long 0x00 "MPU_TYPE,MPU Type Register" bitfld.long 0x00 16.--23. " IREGION ,Instruction region" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..." bitfld.long 0x00 8.--15. " DREGION ,Number of regions supported by the MPU" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..." bitfld.long 0x00 0. " SEPARATE ,Indicates support for separate instruction and data address maps" "Not supported,Supported" group.long 0xD94++0x03 line.long 0x00 "MPU_CTRL,MPU Control Register" bitfld.long 0x00 2. " PRIVDEFENA ,Enables the default memory map as a background region for privileged access" "Disabled,Enabled" bitfld.long 0x00 1. " HFNMIENA ,Handlers executing with priority less than 0 access memory with the MPU enabled or with the MPU disabled" "MPU disabled,MPU enabled" bitfld.long 0x00 0. " ENABLE ,Enables the MPU" "Disabled,Enabled" group.long 0xD98++0x03 line.long 0x00 "MPU_RNR,MPU Region Number Register" hexmask.long.byte 0x00 0.--7. 1. " REGION ,Indicates the memory region accessed by MPU_RBAR and MPU_RASR" tree.close "MPU regions" if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x0 group.long 0xD9C++0x03 "Region 0" saveout 0xD98 %l 0x0 line.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x0 line.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 0 (not implemented)" saveout 0xD98 %l 0x0 hide.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x0 hide.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x1 group.long 0xD9C++0x03 "Region 1" saveout 0xD98 %l 0x1 line.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x1 line.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 1 (not implemented)" saveout 0xD98 %l 0x1 hide.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x1 hide.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x2 group.long 0xD9C++0x03 "Region 2" saveout 0xD98 %l 0x2 line.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x2 line.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 2 (not implemented)" saveout 0xD98 %l 0x2 hide.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x2 hide.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x3 group.long 0xD9C++0x03 "Region 3" saveout 0xD98 %l 0x3 line.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x3 line.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 3 (not implemented)" saveout 0xD98 %l 0x3 hide.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x3 hide.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x4 group.long 0xD9C++0x03 "Region 4" saveout 0xD98 %l 0x4 line.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x4 line.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 4 (not implemented)" saveout 0xD98 %l 0x4 hide.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x4 hide.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x5 group.long 0xD9C++0x03 "Region 5" saveout 0xD98 %l 0x5 line.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x5 line.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 5 (not implemented)" saveout 0xD98 %l 0x5 hide.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x5 hide.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x6 group.long 0xD9C++0x03 "Region 6" saveout 0xD98 %l 0x6 line.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x6 line.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 6 (not implemented)" saveout 0xD98 %l 0x6 hide.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x6 hide.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x7 group.long 0xD9C++0x03 "Region 7" saveout 0xD98 %l 0x7 line.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x7 line.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 7 (not implemented)" saveout 0xD98 %l 0x7 hide.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x7 hide.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x8 group.long 0xD9C++0x03 "Region 8" saveout 0xD98 %l 0x8 line.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x8 line.long 0x00 "MPU_RASR8,MPU Region Attribute and Size Register 8" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 8 (not implemented)" saveout 0xD98 %l 0x8 hide.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x8 hide.long 0x00 "MPU_RASR8,MPU Region Attribute and Size Register 8" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x9 group.long 0xD9C++0x03 "Region 9" saveout 0xD98 %l 0x9 line.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x9 line.long 0x00 "MPU_RASR9,MPU Region Attribute and Size Register 9" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 9 (not implemented)" saveout 0xD98 %l 0x9 hide.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x9 hide.long 0x00 "MPU_RASR9,MPU Region Attribute and Size Register 9" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xA group.long 0xD9C++0x03 "Region 10" saveout 0xD98 %l 0xA line.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0xA line.long 0x00 "MPU_RASR10,MPU Region Attribute and Size Register 10" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 10 (not implemented)" saveout 0xD98 %l 0xA hide.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xA hide.long 0x00 "MPU_RASR10,MPU Region Attribute and Size Register 10" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xB group.long 0xD9C++0x03 "Region 11" saveout 0xD98 %l 0xB line.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0xB line.long 0x00 "MPU_RASR11,MPU Region Attribute and Size Register 11" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 11 (not implemented)" saveout 0xD98 %l 0xB hide.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xB hide.long 0x00 "MPU_RASR11,MPU Region Attribute and Size Register 11" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xC group.long 0xD9C++0x03 "Region 12" saveout 0xD98 %l 0xC line.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0xC line.long 0x00 "MPU_RASR12,MPU Region Attribute and Size Register 12" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 12 (not implemented)" saveout 0xD98 %l 0xC hide.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xC hide.long 0x00 "MPU_RASR12,MPU Region Attribute and Size Register 12" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xD group.long 0xD9C++0x03 "Region 13" saveout 0xD98 %l 0xD line.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0xD line.long 0x00 "MPU_RASR13,MPU Region Attribute and Size Register 13" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 13 (not implemented)" saveout 0xD98 %l 0xD hide.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xD hide.long 0x00 "MPU_RASR13,MPU Region Attribute and Size Register 13" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xE group.long 0xD9C++0x03 "Region 14" saveout 0xD98 %l 0xE line.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0xE line.long 0x00 "MPU_RASR14,MPU Region Attribute and Size Register 14" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 14 (not implemented)" saveout 0xD98 %l 0xE hide.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xE hide.long 0x00 "MPU_RASR14,MPU Region Attribute and Size Register 14" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xF group.long 0xD9C++0x03 "Region 15" saveout 0xD98 %l 0xF line.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0xF line.long 0x00 "MPU_RASR15,MPU Region Attribute and Size Register 15" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 15 (not implemented)" saveout 0xD98 %l 0xF hide.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xF hide.long 0x00 "MPU_RASR15,MPU Region Attribute and Size Register 15" textline " " textline " " endif tree.end width 0x0b else newline textline "COREDEBUG component base address not specified" newline endif tree.end tree "Nested Vectored Interrupt Controller" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 6. rgroup.long 0x04++0x03 line.long 0x00 "ICTR,Interrupt Controller Type Register" bitfld.long 0x00 0.--3. " INTLINESNUM ,Total Number of Interrupt" "0-32,33-64,65-96,97-128,129-160,161-192,193-224,225-240,?..." tree "Interrupt Enable Registers" width 23. if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00) group.long 0x100++0x03 line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01) group.long 0x100++0x7 line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02) group.long 0x100++0x0B line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03) group.long 0x100++0x0F line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04) group.long 0x100++0x13 line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05) group.long 0x100++0x17 line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06) group.long 0x100++0x1B line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x18 31. 0x18 31. 0x98 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 30. 0x18 30. 0x98 30. " ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 29. 0x18 29. 0x98 29. " ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 28. 0x18 28. 0x98 28. " ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 27. 0x18 27. 0x98 27. " ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 26. 0x18 26. 0x98 26. " ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 25. 0x18 25. 0x98 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 24. 0x18 24. 0x98 24. " ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 23. 0x18 23. 0x98 23. " ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 22. 0x18 22. 0x98 22. " ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 21. 0x18 21. 0x98 21. " ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 20. 0x18 20. 0x98 20. " ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 19. 0x18 19. 0x98 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 18. 0x18 18. 0x98 18. " ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 17. 0x18 17. 0x98 17. " ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 16. 0x18 16. 0x98 16. " ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 15. 0x18 15. 0x98 15. " ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 14. 0x18 14. 0x98 14. " ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 13. 0x18 13. 0x98 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 12. 0x18 12. 0x98 12. " ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 11. 0x18 11. 0x98 11. " ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 10. 0x18 10. 0x98 10. " ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 9. 0x18 9. 0x98 9. " ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 8. 0x18 8. 0x98 8. " ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 7. 0x18 7. 0x98 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 6. 0x18 6. 0x98 6. " ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 5. 0x18 5. 0x98 5. " ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 4. 0x18 4. 0x98 4. " ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 3. 0x18 3. 0x98 3. " ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 2. 0x18 2. 0x98 2. " ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 1. 0x18 1. 0x98 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 0. 0x18 0. 0x98 0. " ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07) group.long 0x100++0x1F line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x18 31. 0x18 31. 0x98 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 30. 0x18 30. 0x98 30. " ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 29. 0x18 29. 0x98 29. " ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 28. 0x18 28. 0x98 28. " ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 27. 0x18 27. 0x98 27. " ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 26. 0x18 26. 0x98 26. " ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 25. 0x18 25. 0x98 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 24. 0x18 24. 0x98 24. " ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 23. 0x18 23. 0x98 23. " ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 22. 0x18 22. 0x98 22. " ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 21. 0x18 21. 0x98 21. " ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 20. 0x18 20. 0x98 20. " ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 19. 0x18 19. 0x98 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 18. 0x18 18. 0x98 18. " ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 17. 0x18 17. 0x98 17. " ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 16. 0x18 16. 0x98 16. " ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 15. 0x18 15. 0x98 15. " ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 14. 0x18 14. 0x98 14. " ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 13. 0x18 13. 0x98 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 12. 0x18 12. 0x98 12. " ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 11. 0x18 11. 0x98 11. " ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 10. 0x18 10. 0x98 10. " ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 9. 0x18 9. 0x98 9. " ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 8. 0x18 8. 0x98 8. " ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 7. 0x18 7. 0x98 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 6. 0x18 6. 0x98 6. " ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 5. 0x18 5. 0x98 5. " ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 4. 0x18 4. 0x98 4. " ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 3. 0x18 3. 0x98 3. " ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 2. 0x18 2. 0x98 2. " ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 1. 0x18 1. 0x98 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 0. 0x18 0. 0x98 0. " ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x1c "IRQ224_239_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x1c 15. 0x1c 15. 0x9c 15. " ENA239 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 14. 0x1c 14. 0x9c 14. " ENA238 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 13. 0x1c 13. 0x9c 13. " ENA237 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 12. 0x1c 12. 0x9c 12. " ENA236 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 11. 0x1c 11. 0x9c 11. " ENA235 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 10. 0x1c 10. 0x9c 10. " ENA234 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x1c 9. 0x1c 9. 0x9c 9. " ENA233 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 8. 0x1c 8. 0x9c 8. " ENA232 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 7. 0x1c 7. 0x9c 7. " ENA231 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 6. 0x1c 6. 0x9c 6. " ENA230 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 5. 0x1c 5. 0x9c 5. " ENA229 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 4. 0x1c 4. 0x9c 4. " ENA228 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x1c 3. 0x1c 3. 0x9c 3. " ENA227 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 2. 0x1c 2. 0x9c 2. " ENA226 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 1. 0x1c 1. 0x9c 1. " ENA225 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 0. 0x1c 0. 0x9c 0. " ENA224 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" else hgroup.long 0x100++0x1F hide.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" hide.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" hide.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" hide.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" hide.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register" hide.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register" hide.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register" hide.long 0x1c "IRQ224_239_EN_SET/CLR,Interrupt Enable Register" endif tree.end tree "Interrupt Pending Registers" width 23. if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00) group.long 0x200++0x03 line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01) group.long 0x200++0x07 line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02) group.long 0x200++0x0B line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03) group.long 0x200++0x0F line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04) group.long 0x200++0x13 line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05) group.long 0x200++0x17 line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06) group.long 0x200++0x1B line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x18 31. 0x18 31. 0x98 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 30. 0x18 30. 0x98 30. " PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 29. 0x18 29. 0x98 29. " PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 28. 0x18 28. 0x98 28. " PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 27. 0x18 27. 0x98 27. " PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 26. 0x18 26. 0x98 26. " PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 25. 0x18 25. 0x98 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 24. 0x18 24. 0x98 24. " PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 23. 0x18 23. 0x98 23. " PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 22. 0x18 22. 0x98 22. " PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 21. 0x18 21. 0x98 21. " PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 20. 0x18 20. 0x98 20. " PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 19. 0x18 19. 0x98 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 18. 0x18 18. 0x98 18. " PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 17. 0x18 17. 0x98 17. " PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 16. 0x18 16. 0x98 16. " PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 15. 0x18 15. 0x98 15. " PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 14. 0x18 14. 0x98 14. " PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 13. 0x18 13. 0x98 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 12. 0x18 12. 0x98 12. " PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 11. 0x18 11. 0x98 11. " PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 10. 0x18 10. 0x98 10. " PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 9. 0x18 9. 0x98 9. " PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 8. 0x18 8. 0x98 8. " PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 7. 0x18 7. 0x98 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 6. 0x18 6. 0x98 6. " PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 5. 0x18 5. 0x98 5. " PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 4. 0x18 4. 0x98 4. " PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 3. 0x18 3. 0x98 3. " PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 2. 0x18 2. 0x98 2. " PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 1. 0x18 1. 0x98 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 0. 0x18 0. 0x98 0. " PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07) group.long 0x200++0x1F line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x18 31. 0x18 31. 0x98 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 30. 0x18 30. 0x98 30. " PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 29. 0x18 29. 0x98 29. " PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 28. 0x18 28. 0x98 28. " PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 27. 0x18 27. 0x98 27. " PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 26. 0x18 26. 0x98 26. " PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 25. 0x18 25. 0x98 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 24. 0x18 24. 0x98 24. " PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 23. 0x18 23. 0x98 23. " PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 22. 0x18 22. 0x98 22. " PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 21. 0x18 21. 0x98 21. " PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 20. 0x18 20. 0x98 20. " PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 19. 0x18 19. 0x98 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 18. 0x18 18. 0x98 18. " PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 17. 0x18 17. 0x98 17. " PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 16. 0x18 16. 0x98 16. " PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 15. 0x18 15. 0x98 15. " PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 14. 0x18 14. 0x98 14. " PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 13. 0x18 13. 0x98 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 12. 0x18 12. 0x98 12. " PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 11. 0x18 11. 0x98 11. " PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 10. 0x18 10. 0x98 10. " PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 9. 0x18 9. 0x98 9. " PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 8. 0x18 8. 0x98 8. " PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 7. 0x18 7. 0x98 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 6. 0x18 6. 0x98 6. " PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 5. 0x18 5. 0x98 5. " PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 4. 0x18 4. 0x98 4. " PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 3. 0x18 3. 0x98 3. " PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 2. 0x18 2. 0x98 2. " PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 1. 0x18 1. 0x98 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 0. 0x18 0. 0x98 0. " PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x1c "IRQ224_239_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x1c 15. 0x1c 15. 0x9c 15. " PEN239 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 14. 0x1c 14. 0x9c 14. " PEN238 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 13. 0x1c 13. 0x9c 13. " PEN237 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 12. 0x1c 12. 0x9c 12. " PEN236 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 11. 0x1c 11. 0x9c 11. " PEN235 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 10. 0x1c 10. 0x9c 10. " PEN234 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x1c 9. 0x1c 9. 0x9c 9. " PEN233 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 8. 0x1c 8. 0x9c 8. " PEN232 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 7. 0x1c 7. 0x9c 7. " PEN231 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 6. 0x1c 6. 0x9c 6. " PEN230 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 5. 0x1c 5. 0x9c 5. " PEN229 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 4. 0x1c 4. 0x9c 4. " PEN228 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x1c 3. 0x1c 3. 0x9c 3. " PEN227 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 2. 0x1c 2. 0x9c 2. " PEN226 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 1. 0x1c 1. 0x9c 1. " PEN225 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 0. 0x1c 0. 0x9c 0. " PEN224 ,Interrupt Set/Clear Pending" "Not pending,Pending" else hgroup.long 0x200++0x1F hide.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x1c "IRQ224_239_PEN_SET/CLR,Interrupt Pending Register" endif tree.end tree "Interrupt Active Bit Registers" width 9. if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00) rgroup.long 0x300++0x03 line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01) rgroup.long 0x300++0x07 line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02) rgroup.long 0x300++0x0B line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" line.long 0x08 "ACTIVE3,Active Bit Register 3" bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03) rgroup.long 0x300++0x0F line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" line.long 0x08 "ACTIVE3,Active Bit Register 3" bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active" line.long 0x0c "ACTIVE4,Active Bit Register 4" bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04) rgroup.long 0x300++0x13 line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" line.long 0x08 "ACTIVE3,Active Bit Register 3" bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active" line.long 0x0c "ACTIVE4,Active Bit Register 4" bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active" line.long 0x10 "ACTIVE5,Active Bit Register 5" bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05) rgroup.long 0x300++0x17 line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" line.long 0x08 "ACTIVE3,Active Bit Register 3" bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active" line.long 0x0c "ACTIVE4,Active Bit Register 4" bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active" line.long 0x10 "ACTIVE5,Active Bit Register 5" bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active" line.long 0x14 "ACTIVE6,Active Bit Register 6" bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06) rgroup.long 0x300++0x1B line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" line.long 0x08 "ACTIVE3,Active Bit Register 3" bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active" line.long 0x0c "ACTIVE4,Active Bit Register 4" bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active" line.long 0x10 "ACTIVE5,Active Bit Register 5" bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active" line.long 0x14 "ACTIVE6,Active Bit Register 6" bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active" line.long 0x18 "ACTIVE7,Active Bit Register 7" bitfld.long 0x18 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 30. " ACTIVE222 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 29. " ACTIVE221 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 28. " ACTIVE220 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 27. " ACTIVE219 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 26. " ACTIVE218 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 24. " ACTIVE216 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 23. " ACTIVE215 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 22. " ACTIVE214 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 21. " ACTIVE213 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 20. " ACTIVE212 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 18. " ACTIVE210 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 17. " ACTIVE209 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 16. " ACTIVE208 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 15. " ACTIVE207 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 14. " ACTIVE206 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 12. " ACTIVE204 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 11. " ACTIVE203 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 10. " ACTIVE202 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 9. " ACTIVE201 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 8. " ACTIVE200 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 6. " ACTIVE198 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 5. " ACTIVE197 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 4. " ACTIVE196 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 3. " ACTIVE195 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 2. " ACTIVE194 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 0. " ACTIVE192 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07) rgroup.long 0x300++0x1F line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" line.long 0x08 "ACTIVE3,Active Bit Register 3" bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active" line.long 0x0c "ACTIVE4,Active Bit Register 4" bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active" line.long 0x10 "ACTIVE5,Active Bit Register 5" bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active" line.long 0x14 "ACTIVE6,Active Bit Register 6" bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active" line.long 0x18 "ACTIVE7,Active Bit Register 7" bitfld.long 0x18 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 30. " ACTIVE222 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 29. " ACTIVE221 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 28. " ACTIVE220 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 27. " ACTIVE219 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 26. " ACTIVE218 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 24. " ACTIVE216 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 23. " ACTIVE215 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 22. " ACTIVE214 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 21. " ACTIVE213 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 20. " ACTIVE212 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 18. " ACTIVE210 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 17. " ACTIVE209 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 16. " ACTIVE208 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 15. " ACTIVE207 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 14. " ACTIVE206 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 12. " ACTIVE204 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 11. " ACTIVE203 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 10. " ACTIVE202 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 9. " ACTIVE201 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 8. " ACTIVE200 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 6. " ACTIVE198 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 5. " ACTIVE197 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 4. " ACTIVE196 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 3. " ACTIVE195 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 2. " ACTIVE194 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 0. " ACTIVE192 ,Interrupt Active Flag" "Not active,Active" line.long 0x1c "ACTIVE8,Active Bit Register 8" bitfld.long 0x1c 15. " ACTIVE239 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 14. " ACTIVE238 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 13. " ACTIVE237 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 12. " ACTIVE236 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 11. " ACTIVE235 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 10. " ACTIVE234 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x1c 9. " ACTIVE233 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 8. " ACTIVE232 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 7. " ACTIVE231 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 6. " ACTIVE230 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 5. " ACTIVE229 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 4. " ACTIVE228 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x1c 3. " ACTIVE227 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 2. " ACTIVE226 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 1. " ACTIVE225 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 0. " ACTIVE224 ,Interrupt Active Flag" "Not active,Active" else hgroup.long 0x300++0x1F hide.long 0x00 "ACTIVE1,Active Bit Register 1" hide.long 0x04 "ACTIVE2,Active Bit Register 2" hide.long 0x08 "ACTIVE3,Active Bit Register 3" hide.long 0x0c "ACTIVE4,Active Bit Register 4" hide.long 0x10 "ACTIVE5,Active Bit Register 5" hide.long 0x14 "ACTIVE6,Active Bit Register 6" hide.long 0x18 "ACTIVE7,Active Bit Register 7" hide.long 0x1c "ACTIVE8,Active Bit Register 8" endif tree.end tree "Interrupt Priority Registers" if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00) group.long 0x400++0x1F line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01) group.long 0x400++0x3F line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02) group.long 0x400++0x5F line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" line.long 0x40 "IPR16,Interrupt Priority Register" hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority" hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority" hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority" hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority" line.long 0x44 "IPR17,Interrupt Priority Register" hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority" hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority" hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority" hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority" line.long 0x48 "IPR18,Interrupt Priority Register" hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority" hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority" hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority" hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority" line.long 0x4C "IPR19,Interrupt Priority Register" hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority" hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority" hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority" hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority" line.long 0x50 "IPR20,Interrupt Priority Register" hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority" hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority" hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority" hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority" line.long 0x54 "IPR21,Interrupt Priority Register" hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority" hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority" hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority" hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority" line.long 0x58 "IPR22,Interrupt Priority Register" hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority" hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority" hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority" hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority" line.long 0x5C "IPR23,Interrupt Priority Register" hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority" hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority" hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority" hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03) group.long 0x400++0x7F line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" line.long 0x40 "IPR16,Interrupt Priority Register" hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority" hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority" hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority" hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority" line.long 0x44 "IPR17,Interrupt Priority Register" hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority" hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority" hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority" hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority" line.long 0x48 "IPR18,Interrupt Priority Register" hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority" hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority" hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority" hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority" line.long 0x4C "IPR19,Interrupt Priority Register" hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority" hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority" hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority" hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority" line.long 0x50 "IPR20,Interrupt Priority Register" hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority" hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority" hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority" hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority" line.long 0x54 "IPR21,Interrupt Priority Register" hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority" hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority" hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority" hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority" line.long 0x58 "IPR22,Interrupt Priority Register" hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority" hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority" hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority" hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority" line.long 0x5C "IPR23,Interrupt Priority Register" hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority" hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority" hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority" hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority" line.long 0x60 "IPR24,Interrupt Priority Register" hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority" hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority" hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority" hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority" line.long 0x64 "IPR25,Interrupt Priority Register" hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority" hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority" hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority" hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority" line.long 0x68 "IPR26,Interrupt Priority Register" hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority" hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority" hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority" hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority" line.long 0x6C "IPR27,Interrupt Priority Register" hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority" hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority" hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority" hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority" line.long 0x70 "IPR28,Interrupt Priority Register" hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority" hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority" hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority" hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority" line.long 0x74 "IPR29,Interrupt Priority Register" hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority" hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority" hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority" hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority" line.long 0x78 "IPR30,Interrupt Priority Register" hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority" hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority" hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority" hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority" line.long 0x7C "IPR31,Interrupt Priority Register" hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority" hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority" hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority" hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04) group.long 0x400++0x9F line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" line.long 0x40 "IPR16,Interrupt Priority Register" hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority" hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority" hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority" hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority" line.long 0x44 "IPR17,Interrupt Priority Register" hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority" hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority" hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority" hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority" line.long 0x48 "IPR18,Interrupt Priority Register" hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority" hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority" hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority" hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority" line.long 0x4C "IPR19,Interrupt Priority Register" hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority" hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority" hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority" hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority" line.long 0x50 "IPR20,Interrupt Priority Register" hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority" hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority" hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority" hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority" line.long 0x54 "IPR21,Interrupt Priority Register" hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority" hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority" hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority" hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority" line.long 0x58 "IPR22,Interrupt Priority Register" hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority" hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority" hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority" hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority" line.long 0x5C "IPR23,Interrupt Priority Register" hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority" hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority" hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority" hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority" line.long 0x60 "IPR24,Interrupt Priority Register" hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority" hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority" hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority" hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority" line.long 0x64 "IPR25,Interrupt Priority Register" hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority" hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority" hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority" hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority" line.long 0x68 "IPR26,Interrupt Priority Register" hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority" hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority" hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority" hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority" line.long 0x6C "IPR27,Interrupt Priority Register" hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority" hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority" hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority" hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority" line.long 0x70 "IPR28,Interrupt Priority Register" hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority" hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority" hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority" hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority" line.long 0x74 "IPR29,Interrupt Priority Register" hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority" hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority" hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority" hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority" line.long 0x78 "IPR30,Interrupt Priority Register" hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority" hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority" hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority" hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority" line.long 0x7C "IPR31,Interrupt Priority Register" hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority" hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority" hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority" hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority" line.long 0x80 "IPR32,Interrupt Priority Register" hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority" hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority" hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority" hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority" line.long 0x84 "IPR33,Interrupt Priority Register" hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority" hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority" hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority" hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority" line.long 0x88 "IPR34,Interrupt Priority Register" hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority" hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority" hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority" hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority" line.long 0x8C "IPR35,Interrupt Priority Register" hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority" hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority" hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority" hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority" line.long 0x90 "IPR36,Interrupt Priority Register" hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority" hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority" hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority" hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority" line.long 0x94 "IPR37,Interrupt Priority Register" hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority" hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority" hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority" hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority" line.long 0x98 "IPR38,Interrupt Priority Register" hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority" hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority" hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority" hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority" line.long 0x9C "IPR39,Interrupt Priority Register" hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority" hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority" hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority" hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05) group.long 0x400++0xBF line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" line.long 0x40 "IPR16,Interrupt Priority Register" hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority" hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority" hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority" hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority" line.long 0x44 "IPR17,Interrupt Priority Register" hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority" hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority" hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority" hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority" line.long 0x48 "IPR18,Interrupt Priority Register" hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority" hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority" hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority" hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority" line.long 0x4C "IPR19,Interrupt Priority Register" hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority" hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority" hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority" hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority" line.long 0x50 "IPR20,Interrupt Priority Register" hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority" hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority" hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority" hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority" line.long 0x54 "IPR21,Interrupt Priority Register" hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority" hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority" hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority" hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority" line.long 0x58 "IPR22,Interrupt Priority Register" hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority" hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority" hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority" hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority" line.long 0x5C "IPR23,Interrupt Priority Register" hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority" hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority" hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority" hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority" line.long 0x60 "IPR24,Interrupt Priority Register" hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority" hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority" hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority" hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority" line.long 0x64 "IPR25,Interrupt Priority Register" hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority" hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority" hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority" hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority" line.long 0x68 "IPR26,Interrupt Priority Register" hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority" hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority" hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority" hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority" line.long 0x6C "IPR27,Interrupt Priority Register" hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority" hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority" hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority" hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority" line.long 0x70 "IPR28,Interrupt Priority Register" hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority" hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority" hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority" hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority" line.long 0x74 "IPR29,Interrupt Priority Register" hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority" hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority" hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority" hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority" line.long 0x78 "IPR30,Interrupt Priority Register" hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority" hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority" hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority" hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority" line.long 0x7C "IPR31,Interrupt Priority Register" hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority" hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority" hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority" hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority" line.long 0x80 "IPR32,Interrupt Priority Register" hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority" hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority" hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority" hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority" line.long 0x84 "IPR33,Interrupt Priority Register" hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority" hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority" hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority" hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority" line.long 0x88 "IPR34,Interrupt Priority Register" hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority" hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority" hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority" hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority" line.long 0x8C "IPR35,Interrupt Priority Register" hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority" hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority" hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority" hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority" line.long 0x90 "IPR36,Interrupt Priority Register" hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority" hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority" hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority" hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority" line.long 0x94 "IPR37,Interrupt Priority Register" hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority" hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority" hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority" hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority" line.long 0x98 "IPR38,Interrupt Priority Register" hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority" hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority" hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority" hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority" line.long 0x9C "IPR39,Interrupt Priority Register" hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority" hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority" hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority" hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority" line.long 0xA0 "IPR40,Interrupt Priority Register" hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority" hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority" hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority" hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority" line.long 0xA4 "IPR41,Interrupt Priority Register" hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority" hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority" hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority" hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority" line.long 0xA8 "IPR42,Interrupt Priority Register" hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority" hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority" hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority" hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority" line.long 0xAC "IPR43,Interrupt Priority Register" hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority" hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority" hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority" hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority" line.long 0xB0 "IPR44,Interrupt Priority Register" hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority" hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority" hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority" hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority" line.long 0xB4 "IPR45,Interrupt Priority Register" hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority" hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority" hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority" hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority" line.long 0xB8 "IPR46,Interrupt Priority Register" hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority" hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority" hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority" hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority" line.long 0xBC "IPR47,Interrupt Priority Register" hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority" hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority" hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority" hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06) group.long 0x400++0xDF line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" line.long 0x40 "IPR16,Interrupt Priority Register" hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority" hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority" hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority" hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority" line.long 0x44 "IPR17,Interrupt Priority Register" hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority" hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority" hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority" hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority" line.long 0x48 "IPR18,Interrupt Priority Register" hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority" hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority" hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority" hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority" line.long 0x4C "IPR19,Interrupt Priority Register" hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority" hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority" hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority" hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority" line.long 0x50 "IPR20,Interrupt Priority Register" hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority" hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority" hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority" hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority" line.long 0x54 "IPR21,Interrupt Priority Register" hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority" hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority" hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority" hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority" line.long 0x58 "IPR22,Interrupt Priority Register" hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority" hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority" hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority" hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority" line.long 0x5C "IPR23,Interrupt Priority Register" hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority" hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority" hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority" hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority" line.long 0x60 "IPR24,Interrupt Priority Register" hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority" hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority" hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority" hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority" line.long 0x64 "IPR25,Interrupt Priority Register" hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority" hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority" hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority" hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority" line.long 0x68 "IPR26,Interrupt Priority Register" hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority" hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority" hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority" hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority" line.long 0x6C "IPR27,Interrupt Priority Register" hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority" hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority" hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority" hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority" line.long 0x70 "IPR28,Interrupt Priority Register" hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority" hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority" hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority" hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority" line.long 0x74 "IPR29,Interrupt Priority Register" hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority" hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority" hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority" hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority" line.long 0x78 "IPR30,Interrupt Priority Register" hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority" hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority" hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority" hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority" line.long 0x7C "IPR31,Interrupt Priority Register" hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority" hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority" hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority" hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority" line.long 0x80 "IPR32,Interrupt Priority Register" hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority" hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority" hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority" hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority" line.long 0x84 "IPR33,Interrupt Priority Register" hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority" hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority" hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority" hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority" line.long 0x88 "IPR34,Interrupt Priority Register" hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority" hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority" hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority" hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority" line.long 0x8C "IPR35,Interrupt Priority Register" hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority" hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority" hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority" hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority" line.long 0x90 "IPR36,Interrupt Priority Register" hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority" hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority" hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority" hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority" line.long 0x94 "IPR37,Interrupt Priority Register" hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority" hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority" hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority" hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority" line.long 0x98 "IPR38,Interrupt Priority Register" hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority" hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority" hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority" hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority" line.long 0x9C "IPR39,Interrupt Priority Register" hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority" hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority" hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority" hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority" line.long 0xA0 "IPR40,Interrupt Priority Register" hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority" hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority" hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority" hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority" line.long 0xA4 "IPR41,Interrupt Priority Register" hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority" hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority" hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority" hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority" line.long 0xA8 "IPR42,Interrupt Priority Register" hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority" hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority" hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority" hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority" line.long 0xAC "IPR43,Interrupt Priority Register" hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority" hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority" hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority" hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority" line.long 0xB0 "IPR44,Interrupt Priority Register" hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority" hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority" hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority" hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority" line.long 0xB4 "IPR45,Interrupt Priority Register" hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority" hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority" hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority" hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority" line.long 0xB8 "IPR46,Interrupt Priority Register" hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority" hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority" hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority" hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority" line.long 0xBC "IPR47,Interrupt Priority Register" hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority" hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority" hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority" hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority" line.long 0xC0 "IPR48,Interrupt Priority Register" hexmask.long.byte 0xC0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority" hexmask.long.byte 0xC0 16.--23. 1. " PRI_194 ,Interrupt 194 Priority" hexmask.long.byte 0xC0 8.--15. 1. " PRI_193 ,Interrupt 193 Priority" hexmask.long.byte 0xC0 0.--7. 1. " PRI_192 ,Interrupt 192 Priority" line.long 0xC4 "IPR49,Interrupt Priority Register" hexmask.long.byte 0xC4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority" hexmask.long.byte 0xC4 16.--23. 1. " PRI_198 ,Interrupt 198 Priority" hexmask.long.byte 0xC4 8.--15. 1. " PRI_197 ,Interrupt 197 Priority" hexmask.long.byte 0xC4 0.--7. 1. " PRI_196 ,Interrupt 196 Priority" line.long 0xC8 "IPR50,Interrupt Priority Register" hexmask.long.byte 0xC8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority" hexmask.long.byte 0xC8 16.--23. 1. " PRI_202 ,Interrupt 202 Priority" hexmask.long.byte 0xC8 8.--15. 1. " PRI_201 ,Interrupt 201 Priority" hexmask.long.byte 0xC8 0.--7. 1. " PRI_200 ,Interrupt 200 Priority" line.long 0xCC "IPR51,Interrupt Priority Register" hexmask.long.byte 0xCC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority" hexmask.long.byte 0xCC 16.--23. 1. " PRI_206 ,Interrupt 206 Priority" hexmask.long.byte 0xCC 8.--15. 1. " PRI_205 ,Interrupt 205 Priority" hexmask.long.byte 0xCC 0.--7. 1. " PRI_204 ,Interrupt 204 Priority" line.long 0xD0 "IPR52,Interrupt Priority Register" hexmask.long.byte 0xD0 24.--31. 1. " PRI_211 ,Interrupt 211 Priority" hexmask.long.byte 0xD0 16.--23. 1. " PRI_210 ,Interrupt 210 Priority" hexmask.long.byte 0xD0 8.--15. 1. " PRI_209 ,Interrupt 209 Priority" hexmask.long.byte 0xD0 0.--7. 1. " PRI_208 ,Interrupt 208 Priority" line.long 0xD4 "IPR53,Interrupt Priority Register" hexmask.long.byte 0xD4 24.--31. 1. " PRI_215 ,Interrupt 215 Priority" hexmask.long.byte 0xD4 16.--23. 1. " PRI_214 ,Interrupt 214 Priority" hexmask.long.byte 0xD4 8.--15. 1. " PRI_213 ,Interrupt 213 Priority" hexmask.long.byte 0xD4 0.--7. 1. " PRI_212 ,Interrupt 212 Priority" line.long 0xD8 "IPR54,Interrupt Priority Register" hexmask.long.byte 0xD8 24.--31. 1. " PRI_219 ,Interrupt 219 Priority" hexmask.long.byte 0xD8 16.--23. 1. " PRI_218 ,Interrupt 218 Priority" hexmask.long.byte 0xD8 8.--15. 1. " PRI_217 ,Interrupt 217 Priority" hexmask.long.byte 0xD8 0.--7. 1. " PRI_216 ,Interrupt 216 Priority" line.long 0xDC "IPR55,Interrupt Priority Register" hexmask.long.byte 0xDC 24.--31. 1. " PRI_223 ,Interrupt 223 Priority" hexmask.long.byte 0xDC 16.--23. 1. " PRI_222 ,Interrupt 222 Priority" hexmask.long.byte 0xDC 8.--15. 1. " PRI_221 ,Interrupt 221 Priority" hexmask.long.byte 0xDC 0.--7. 1. " PRI_220 ,Interrupt 220 Priority" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07) group.long 0x400++0xEF line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" line.long 0x40 "IPR16,Interrupt Priority Register" hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority" hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority" hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority" hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority" line.long 0x44 "IPR17,Interrupt Priority Register" hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority" hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority" hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority" hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority" line.long 0x48 "IPR18,Interrupt Priority Register" hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority" hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority" hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority" hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority" line.long 0x4C "IPR19,Interrupt Priority Register" hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority" hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority" hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority" hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority" line.long 0x50 "IPR20,Interrupt Priority Register" hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority" hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority" hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority" hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority" line.long 0x54 "IPR21,Interrupt Priority Register" hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority" hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority" hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority" hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority" line.long 0x58 "IPR22,Interrupt Priority Register" hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority" hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority" hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority" hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority" line.long 0x5C "IPR23,Interrupt Priority Register" hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority" hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority" hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority" hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority" line.long 0x60 "IPR24,Interrupt Priority Register" hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority" hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority" hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority" hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority" line.long 0x64 "IPR25,Interrupt Priority Register" hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority" hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority" hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority" hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority" line.long 0x68 "IPR26,Interrupt Priority Register" hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority" hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority" hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority" hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority" line.long 0x6C "IPR27,Interrupt Priority Register" hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority" hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority" hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority" hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority" line.long 0x70 "IPR28,Interrupt Priority Register" hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority" hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority" hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority" hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority" line.long 0x74 "IPR29,Interrupt Priority Register" hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority" hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority" hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority" hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority" line.long 0x78 "IPR30,Interrupt Priority Register" hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority" hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority" hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority" hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority" line.long 0x7C "IPR31,Interrupt Priority Register" hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority" hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority" hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority" hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority" line.long 0x80 "IPR32,Interrupt Priority Register" hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority" hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority" hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority" hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority" line.long 0x84 "IPR33,Interrupt Priority Register" hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority" hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority" hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority" hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority" line.long 0x88 "IPR34,Interrupt Priority Register" hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority" hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority" hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority" hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority" line.long 0x8C "IPR35,Interrupt Priority Register" hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority" hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority" hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority" hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority" line.long 0x90 "IPR36,Interrupt Priority Register" hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority" hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority" hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority" hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority" line.long 0x94 "IPR37,Interrupt Priority Register" hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority" hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority" hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority" hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority" line.long 0x98 "IPR38,Interrupt Priority Register" hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority" hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority" hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority" hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority" line.long 0x9C "IPR39,Interrupt Priority Register" hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority" hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority" hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority" hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority" line.long 0xA0 "IPR40,Interrupt Priority Register" hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority" hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority" hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority" hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority" line.long 0xA4 "IPR41,Interrupt Priority Register" hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority" hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority" hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority" hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority" line.long 0xA8 "IPR42,Interrupt Priority Register" hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority" hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority" hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority" hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority" line.long 0xAC "IPR43,Interrupt Priority Register" hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority" hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority" hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority" hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority" line.long 0xB0 "IPR44,Interrupt Priority Register" hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority" hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority" hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority" hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority" line.long 0xB4 "IPR45,Interrupt Priority Register" hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority" hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority" hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority" hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority" line.long 0xB8 "IPR46,Interrupt Priority Register" hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority" hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority" hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority" hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority" line.long 0xBC "IPR47,Interrupt Priority Register" hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority" hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority" hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority" hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority" line.long 0xC0 "IPR48,Interrupt Priority Register" hexmask.long.byte 0xC0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority" hexmask.long.byte 0xC0 16.--23. 1. " PRI_194 ,Interrupt 194 Priority" hexmask.long.byte 0xC0 8.--15. 1. " PRI_193 ,Interrupt 193 Priority" hexmask.long.byte 0xC0 0.--7. 1. " PRI_192 ,Interrupt 192 Priority" line.long 0xC4 "IPR49,Interrupt Priority Register" hexmask.long.byte 0xC4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority" hexmask.long.byte 0xC4 16.--23. 1. " PRI_198 ,Interrupt 198 Priority" hexmask.long.byte 0xC4 8.--15. 1. " PRI_197 ,Interrupt 197 Priority" hexmask.long.byte 0xC4 0.--7. 1. " PRI_196 ,Interrupt 196 Priority" line.long 0xC8 "IPR50,Interrupt Priority Register" hexmask.long.byte 0xC8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority" hexmask.long.byte 0xC8 16.--23. 1. " PRI_202 ,Interrupt 202 Priority" hexmask.long.byte 0xC8 8.--15. 1. " PRI_201 ,Interrupt 201 Priority" hexmask.long.byte 0xC8 0.--7. 1. " PRI_200 ,Interrupt 200 Priority" line.long 0xCC "IPR51,Interrupt Priority Register" hexmask.long.byte 0xCC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority" hexmask.long.byte 0xCC 16.--23. 1. " PRI_206 ,Interrupt 206 Priority" hexmask.long.byte 0xCC 8.--15. 1. " PRI_205 ,Interrupt 205 Priority" hexmask.long.byte 0xCC 0.--7. 1. " PRI_204 ,Interrupt 204 Priority" line.long 0xD0 "IPR52,Interrupt Priority Register" hexmask.long.byte 0xD0 24.--31. 1. " PRI_211 ,Interrupt 211 Priority" hexmask.long.byte 0xD0 16.--23. 1. " PRI_210 ,Interrupt 210 Priority" hexmask.long.byte 0xD0 8.--15. 1. " PRI_209 ,Interrupt 209 Priority" hexmask.long.byte 0xD0 0.--7. 1. " PRI_208 ,Interrupt 208 Priority" line.long 0xD4 "IPR53,Interrupt Priority Register" hexmask.long.byte 0xD4 24.--31. 1. " PRI_215 ,Interrupt 215 Priority" hexmask.long.byte 0xD4 16.--23. 1. " PRI_214 ,Interrupt 214 Priority" hexmask.long.byte 0xD4 8.--15. 1. " PRI_213 ,Interrupt 213 Priority" hexmask.long.byte 0xD4 0.--7. 1. " PRI_212 ,Interrupt 212 Priority" line.long 0xD8 "IPR54,Interrupt Priority Register" hexmask.long.byte 0xD8 24.--31. 1. " PRI_219 ,Interrupt 219 Priority" hexmask.long.byte 0xD8 16.--23. 1. " PRI_218 ,Interrupt 218 Priority" hexmask.long.byte 0xD8 8.--15. 1. " PRI_217 ,Interrupt 217 Priority" hexmask.long.byte 0xD8 0.--7. 1. " PRI_216 ,Interrupt 216 Priority" line.long 0xDC "IPR55,Interrupt Priority Register" hexmask.long.byte 0xDC 24.--31. 1. " PRI_223 ,Interrupt 223 Priority" hexmask.long.byte 0xDC 16.--23. 1. " PRI_222 ,Interrupt 222 Priority" hexmask.long.byte 0xDC 8.--15. 1. " PRI_221 ,Interrupt 221 Priority" hexmask.long.byte 0xDC 0.--7. 1. " PRI_220 ,Interrupt 220 Priority" line.long 0xE0 "IPR56,Interrupt Priority Register" hexmask.long.byte 0xE0 24.--31. 1. " PRI_227 ,Interrupt 227 Priority" hexmask.long.byte 0xE0 16.--23. 1. " PRI_226 ,Interrupt 226 Priority" hexmask.long.byte 0xE0 8.--15. 1. " PRI_225 ,Interrupt 225 Priority" hexmask.long.byte 0xE0 0.--7. 1. " PRI_224 ,Interrupt 224 Priority" line.long 0xE4 "IPR57,Interrupt Priority Register" hexmask.long.byte 0xE4 24.--31. 1. " PRI_231 ,Interrupt 231 Priority" hexmask.long.byte 0xE4 16.--23. 1. " PRI_230 ,Interrupt 230 Priority" hexmask.long.byte 0xE4 8.--15. 1. " PRI_229 ,Interrupt 229 Priority" hexmask.long.byte 0xE4 0.--7. 1. " PRI_228 ,Interrupt 228 Priority" line.long 0xE8 "IPR58,Interrupt Priority Register" hexmask.long.byte 0xE8 24.--31. 1. " PRI_235 ,Interrupt 235 Priority" hexmask.long.byte 0xE8 16.--23. 1. " PRI_234 ,Interrupt 234 Priority" hexmask.long.byte 0xE8 8.--15. 1. " PRI_233 ,Interrupt 233 Priority" hexmask.long.byte 0xE8 0.--7. 1. " PRI_232 ,Interrupt 232 Priority" line.long 0xEC "IPR59,Interrupt Priority Register" hexmask.long.byte 0xEC 24.--31. 1. " PRI_239 ,Interrupt 239 Priority" hexmask.long.byte 0xEC 16.--23. 1. " PRI_238 ,Interrupt 238 Priority" hexmask.long.byte 0xEC 8.--15. 1. " PRI_237 ,Interrupt 237 Priority" hexmask.long.byte 0xEC 0.--7. 1. " PRI_236 ,Interrupt 236 Priority" else hgroup.long 0x400++0xEF hide.long 0x0 "IPR0,Interrupt Priority Register" hide.long 0x4 "IPR1,Interrupt Priority Register" hide.long 0x8 "IPR2,Interrupt Priority Register" hide.long 0xC "IPR3,Interrupt Priority Register" hide.long 0x10 "IPR4,Interrupt Priority Register" hide.long 0x14 "IPR5,Interrupt Priority Register" hide.long 0x18 "IPR6,Interrupt Priority Register" hide.long 0x1C "IPR7,Interrupt Priority Register" hide.long 0x20 "IPR8,Interrupt Priority Register" hide.long 0x24 "IPR9,Interrupt Priority Register" hide.long 0x28 "IPR10,Interrupt Priority Register" hide.long 0x2C "IPR11,Interrupt Priority Register" hide.long 0x30 "IPR12,Interrupt Priority Register" hide.long 0x34 "IPR13,Interrupt Priority Register" hide.long 0x38 "IPR14,Interrupt Priority Register" hide.long 0x3C "IPR15,Interrupt Priority Register" hide.long 0x40 "IPR16,Interrupt Priority Register" hide.long 0x44 "IPR17,Interrupt Priority Register" hide.long 0x48 "IPR18,Interrupt Priority Register" hide.long 0x4C "IPR19,Interrupt Priority Register" hide.long 0x50 "IPR20,Interrupt Priority Register" hide.long 0x54 "IPR21,Interrupt Priority Register" hide.long 0x58 "IPR22,Interrupt Priority Register" hide.long 0x5C "IPR23,Interrupt Priority Register" hide.long 0x60 "IPR24,Interrupt Priority Register" hide.long 0x64 "IPR25,Interrupt Priority Register" hide.long 0x68 "IPR26,Interrupt Priority Register" hide.long 0x6C "IPR27,Interrupt Priority Register" hide.long 0x70 "IPR28,Interrupt Priority Register" hide.long 0x74 "IPR29,Interrupt Priority Register" hide.long 0x78 "IPR30,Interrupt Priority Register" hide.long 0x7C "IPR31,Interrupt Priority Register" hide.long 0x80 "IPR32,Interrupt Priority Register" hide.long 0x84 "IPR33,Interrupt Priority Register" hide.long 0x88 "IPR34,Interrupt Priority Register" hide.long 0x8C "IPR35,Interrupt Priority Register" hide.long 0x90 "IPR36,Interrupt Priority Register" hide.long 0x94 "IPR37,Interrupt Priority Register" hide.long 0x98 "IPR38,Interrupt Priority Register" hide.long 0x9C "IPR39,Interrupt Priority Register" hide.long 0xA0 "IPR40,Interrupt Priority Register" hide.long 0xA4 "IPR41,Interrupt Priority Register" hide.long 0xA8 "IPR42,Interrupt Priority Register" hide.long 0xAC "IPR43,Interrupt Priority Register" hide.long 0xB0 "IPR44,Interrupt Priority Register" hide.long 0xB4 "IPR45,Interrupt Priority Register" hide.long 0xB8 "IPR46,Interrupt Priority Register" hide.long 0xBC "IPR47,Interrupt Priority Register" hide.long 0xC0 "IPR48,Interrupt Priority Register" hide.long 0xC4 "IPR49,Interrupt Priority Register" hide.long 0xC8 "IPR50,Interrupt Priority Register" hide.long 0xCC "IPR51,Interrupt Priority Register" hide.long 0xD0 "IPR52,Interrupt Priority Register" hide.long 0xD4 "IPR53,Interrupt Priority Register" hide.long 0xD8 "IPR54,Interrupt Priority Register" hide.long 0xDC "IPR55,Interrupt Priority Register" hide.long 0xE0 "IPR56,Interrupt Priority Register" hide.long 0xE4 "IPR57,Interrupt Priority Register" hide.long 0xE8 "IPR58,Interrupt Priority Register" hide.long 0xEC "IPR59,Interrupt Priority Register" endif tree.end width 0x0b else newline textline "COREDEBUG component base address not specified" newline endif tree.end sif CORENAME()=="CORTEXM4F" tree "Floating-point Unit (FPU)" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 8. group.long 0xF34++0x0B line.long 0x00 "FPCCR,Floating-Point Context Control Register" bitfld.long 0x00 31. " ASPEN ,Execution of a floating-point instruction sets the CONTROL.FPCA bit to 1" "Disabled,Enabled" bitfld.long 0x00 30. " LSPEN ,Enables lazy context save of FP state" "Disabled,Enabled" bitfld.long 0x00 8. " MONRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the DebugMonitor exception to pending" "Not able,Able" textline " " bitfld.long 0x00 6. " BFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the BusFault exception to pending" "Not able,Able" bitfld.long 0x00 5. " MMRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the MemManage exception to pending" "Not able,Able" bitfld.long 0x00 4. " HFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the HardFault exception to pending" "Not able,Able" textline " " bitfld.long 0x00 3. " THREAD ,Indicates the processor mode when it allocated the FP stack frame" "Handler,Thread" bitfld.long 0x00 1. " USER ,Indicates the privilege level of the software executing" "Privileged,Unprivileged" bitfld.long 0x00 0. " LSPACT ,Indicates whether Lazy preservation of the FP state is active" "Not active,Active" line.long 0x04 "FPCAR,Floating-Point Context Address Register" hexmask.long 0x04 3.--31. 0x8 " ADDRESS ,The location of the unpopulated floating-point register space allocated on an exception stack frame" line.long 0x08 "FPDSCR,Floating-Point Default Status Control Register" bitfld.long 0x08 26. " AHP ,Default value for FPSCR.AHP" "IEEE 754-2008,Alternative" bitfld.long 0x08 25. " DN ,Default value for FPSCR.DN" "NaN operands,Any operation" bitfld.long 0x08 24. " FZ ,Default value for FPSCR.FZ" "No Flush mode,Flush mode" textline " " bitfld.long 0x08 22.--23. " RMODE ,Default value for FPSCR.RMode" "Round to Nearest,Round towards Plus Infinity,Round towards Minus Infinity,Round towards Zero" rgroup.long 0xF40++0x07 line.long 0x00 "MVFR0,Media and FP Feature Register 0" bitfld.long 0x00 28.--31. " FPRNDMOD ,Indicates the rounding modes supported by the FP floating-point hardware" ",All supported,?..." bitfld.long 0x00 24.--27. " SRTERR ,Indicates the hardware support for FP short vectors" "Not supported,?..." bitfld.long 0x00 20.--23. " SQRROOT ,Indicates the hardware support for FP square root operations" ",Supported,?..." textline " " bitfld.long 0x00 16.--19. " DIV ,Indicates the hardware support for FP divide operations" ",Supported,?..." bitfld.long 0x00 12.--15. " FPEXTRP ,Indicates whether the FP hardware implementation supports exception trapping" "Not supported,?..." bitfld.long 0x00 8.--11. " DBLPREC ,Indicates the hardware support for FP double_precision operations" "Not supported,,Supported,?..." textline " " bitfld.long 0x00 4.--7. " SNGLPREC ,Indicates the hardware support for FP single-precision operations" ",,Supported,?..." bitfld.long 0x00 0.--3. " A_SIMD ,Indicates the size of the FP register bank" ",Supported-16x64-bit,?..." line.long 0x04 "MVFR1,Media and FP Feature Register 1" bitfld.long 0x04 28.--31. " FP_FUSED_MAC ,Indicates whether the FP supports fused multiply accumulate operations" ",Supported,?..." bitfld.long 0x04 24.--27. " FP_HPFP ,Indicates whether the FP supports half-precision and double-precision floating-point conversion instructions" ",Half-single,Half-single and half-double,?..." textline " " bitfld.long 0x04 4.--7. " D_NAN ,Indicates whether the FP hardware implementation supports only the Default NaN mode" ",NaN propagation,?..." bitfld.long 0x04 0.--3. " FTZ_MODE ,Indicates whether the FP hardware implementation supports only the Flush-to-Zero mode of operation" ",Full denorm. num. arit.,?..." width 0xB else newline textline "COREDEBUG component base address not specified" newline endif tree.end endif tree "Debug" tree "Core Debug" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 7. group.long 0xD30++0x03 line.long 0x00 "DFSR,Debug Fault Status Register" eventfld.long 0x00 4. " EXTERNAL ,Indicates a debug event generated because of the assertion of an external debug request" "Not generated,Generated" eventfld.long 0x00 3. " VCATCH ,Indicates triggering of a Vector catch" "Not triggered,Triggered" eventfld.long 0x00 2. " DWTTRAP ,Indicates a debug event generated by the DWT" "Not generated,Generated" newline eventfld.long 0x00 1. " BKPT ,Indicates a debug event generated by BKPT instruction execution or a breakpoint match in FPB" "Not generated,Generated" eventfld.long 0x00 0. " HALTED ,Indicates a debug event generated by either a C_HALT or C_STEP request, triggered by a write to the DHCSR or a step request triggered by setting DEMCR.MON_STEP to 1" "Not generated,Generated" newline hgroup.long 0xDF0++0x03 hide.long 0x00 "DHCSR,Debug Halting Control and Status Register" in newline wgroup.long 0xDF4++0x03 line.long 0x00 "DCRSR,Debug Core Register Selector Register" bitfld.long 0x00 16. " REGWNR ,Register Read/Write" "Read,Write" hexmask.long.byte 0x00 0.--6. 1. " REGSEL ,Specifies the ARM core register or special-purpose register or Floating-point extension register" group.long 0xDF8++0x03 line.long 0x00 "DCRDR,Debug Core Register Data Register" if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDFC))&0x10000)==0x10000) group.long 0xDFC++0x03 line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register" bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled" bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1" bitfld.long 0x00 18. " MON_STEP ,Setting this bit to 1 makes the step request pending" "No step,Step" newline bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending" bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled" bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled" newline bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap" "Disabled,Enabled" bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled" bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled" newline bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled" bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled" bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled" newline bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled" else group.long 0xDFC++0x03 line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register" bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled" bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1" newline bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending" bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled" bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled" newline bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap" "Disabled,Enabled" bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled" bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled" newline bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled" bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled" bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled" newline bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled" endif width 0x0B else newline textline "COREDEBUG component base address not specified" newline endif tree.end tree "Flash Patch and Breakpoint Unit (FPB)" sif COMPonent.AVAILABLE("FPB") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1)) width 10. group.long 0x00++0x07 line.long 0x00 "FP_CTRL,Flash Patch Control Register" bitfld.long 0x00 28.--31. " REV ,Flash Patch Breakpoint architecture revision" "Version 1,Version 2,?..." rbitfld.long 0x00 4.--7. 12.--14. " NUM_CODE ,The number of instruction address comparators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64,65,66,67,68,69,70,71,72,73,74,75,76,77,78,79,80,81,82,83,84,85,86,87,88,89,90,91,92,93,94,95,96,97,98,99,100,101,102,103,104,105,106,107,108,109,110,111,112,113,114,115,116,117,118,119,120,121,122,123,124,125,126,127" bitfld.long 0x00 1. " KEY ,Key Field" "Low,High" bitfld.long 0x00 0. " ENABLE ,Flash Patch Unit Enable" "Disabled,Enabled" textline "" line.long 0x04 "FP_REMAP,Flash Patch Remap Register" bitfld.long 0x04 29. " RMPSPT ,Indicates whether the FPB unit supports flash patch remap" "Not supported,SRAM region" hexmask.long.tbyte 0x04 5.--28. 0x20 " REMAP ,Remap Base Address Field" if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00) group.long 0x8++0x03 line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0" bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address" bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000) if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x8))&0x01)==0x00) group.long 0x8++0x03 line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" else group.long 0x8++0x03 line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0" hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" endif endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00) group.long 0xC++0x03 line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1" bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address" bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000) if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0xC))&0x01)==0x00) group.long 0xC++0x03 line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" else group.long 0xC++0x03 line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1" hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" endif endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00) group.long 0x10++0x03 line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2" bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address" bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000) if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x10))&0x01)==0x00) group.long 0x10++0x03 line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" else group.long 0x10++0x03 line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2" hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" endif endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00) group.long 0x14++0x03 line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3" bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address" bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000) if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x14))&0x01)==0x00) group.long 0x14++0x03 line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" else group.long 0x14++0x03 line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3" hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" endif endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00) group.long 0x18++0x03 line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4" bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address" bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000) if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x18))&0x01)==0x00) group.long 0x18++0x03 line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" else group.long 0x18++0x03 line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4" hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" endif endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00) group.long 0x1C++0x03 line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5" bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address" bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000) if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x1C))&0x01)==0x00) group.long 0x1C++0x03 line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" else group.long 0x1C++0x03 line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5" hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" endif endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00) group.long 0x20++0x03 line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6" bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address" bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000) if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x20))&0x01)==0x00) group.long 0x20++0x03 line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" else group.long 0x20++0x03 line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6" hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" endif endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00) group.long 0x24++0x03 line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7" bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address" bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000) if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x24))&0x01)==0x00) group.long 0x24++0x03 line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" else group.long 0x24++0x03 line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7" hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" endif endif width 6. tree "CoreSight Identification Registers" rgroup.long 0xFE0++0x0F line.long 0x00 "PID0,Peripheral ID0" hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]" line.long 0x04 "PID1,Peripheral ID1" hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]" hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]" line.long 0x08 "PID2,Peripheral ID2" hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision" bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC" hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]" line.long 0x0c "PID3,Peripheral ID3" hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field" hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block" rgroup.long 0xFD0++0x03 line.long 0x00 "PID4,Peripheral Identification Register 4" hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count" hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code" rgroup.long 0xFF0++0x0F line.long 0x00 "CID0,Component ID0 (Preamble)" line.long 0x04 "CID1,Component ID1" hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class" hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble" line.long 0x08 "CID2,Component ID2" line.long 0x0c "CID3,Component ID3" tree.end width 0xB else newline textline "FPB component base address not specified" newline endif tree.end tree "Data Watchpoint and Trace Unit (DWT)" sif COMPonent.AVAILABLE("DWT") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1)) width 15. group.long 0x00++0x1B line.long 0x00 "DWT_CTRL,Control Register" rbitfld.long 0x00 28.--31. " NUMCOMP ,Number of comparators implemented" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x00 27. " NOTRCPKT ,Shows whether the implementation supports trace sampling and exception tracing" "Supported,Not supported" rbitfld.long 0x00 26. " NOEXTTRIG ,Shows whether the implementation includes external match signals" "Supported,Not supported" textline " " rbitfld.long 0x00 25. " NOCYCCNT ,Shows whether the implementation supports a cycle counter" "Supported,Not supported" rbitfld.long 0x00 24. " NOPRFCNT ,Shows whether the implementation supports the profiling counters" "Supported,Not supported" bitfld.long 0x00 22. " CYCEVTENA ,Enables POSTCNT underflow Event counter packets generation" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " FOLDEVTENA ,Enables generation of the Folded-instruction counter overflow event" "Disabled,Enabled" bitfld.long 0x00 20. " LSUEVTENA ,Enables generation of the LSU counter overflow event" "Disabled,Enabled" bitfld.long 0x00 19. " SLEEPEVTENA ,Enables generation of the Sleep counter overflow event" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " EXCEVTENA ,Enables generation of the Exception overhead counter overflow event" "Disabled,Enabled" bitfld.long 0x00 17. " CPIEVTENA ,Enables generation of the CPI counter overflow event" "Disabled,Enabled" bitfld.long 0x00 16. " EXCTRCENA ,Enables generation of exception trace" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " PCSAMPLEENA ,Enables use of POSTCNT counter as a timer for Periodic PC sample packet generation" "Disabled,Enabled" bitfld.long 0x00 10.--11. " SYNCTAP ,Selects the position of the synchronization packet counter tap on the CYCCNT counter" "Disabled,CYCCNT[24],CYCCNT[26],CYCCNT[28]" bitfld.long 0x00 9. " CYCTAP ,Selects the position of the POSTCNT tap on the CYCCNT counter" "CYCCNT[6],CYCCNT[10]" textline " " bitfld.long 0x00 5.--8. " POSTINIT ,Initial value for the POSTCNT counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 1.--4. " POSTPRESET ,Reload value for the POSTCNT counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0. " CYCCNTENA ,Enables CYCCNT" "Disabled,Enabled" line.long 0x04 "DWT_CYCCNT,Cycle Count Register" line.long 0x08 "DWT_CPICNT,CPI Count Register" hexmask.long.byte 0x08 0.--7. 1. " CPICNT ,The base CPI counter" line.long 0x0c "DWT_EXCCNT,Exception Overhead Count Register" hexmask.long.byte 0x0c 0.--7. 1. " EXCCNT ,The exception overhead counter" line.long 0x10 "DWT_SLEEPCNT,Sleep Count Register" hexmask.long.byte 0x10 0.--7. 1. " SLEEPCNT ,Sleep Counter" line.long 0x14 "DWT_LSUCNT,LSU Count Register" hexmask.long.byte 0x14 0.--7. 1. " LSUCNT ,Load-store counter" line.long 0x18 "DWT_FOLDCNT,Folded-instruction Count Register" hexmask.long.byte 0x18 0.--7. 1. " FOLDCNT ,Folded-instruction counter" rgroup.long 0x1C++0x03 line.long 0x00 "DWT_PCSR,Program Counter Sample register" textline " " group.long 0x20++0x07 line.long 0x00 "DWT_COMP0,DWT Comparator Register 0" line.long 0x04 "DWT_MASK0,DWT Mask Registers 0" bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x28))&0x1A0)==0x20) group.long 0x28++0x03 line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled" bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE" elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x28))&0x1A0)==0x00) group.long 0x28++0x03 line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled" bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE" elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x28))&0x180)==0x80) group.long 0x28++0x03 line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled" bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet,UNPREDICTABLE,UNPREDICTABLE,Generate watchpoint debug event,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,CMPMATCH[N] event,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE" else group.long 0x28++0x03 line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled" bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE" endif group.long (0x30)++0x07 line.long 0x00 "DWT_COMP1,DWT Comparator Register 1" line.long 0x04 "DWT_MASK1,DWT Mask Registers 1" bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08))&0x120)==0x20) group.long (0x30+0x08)++0x03 line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE" elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08))&0x120)==0x00) group.long (0x30+0x08)++0x03 line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE" else group.long (0x30+0x08)++0x03 line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " EMITRANGE ,Enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE" endif group.long (0x40)++0x07 line.long 0x00 "DWT_COMP2,DWT Comparator Register 2" line.long 0x04 "DWT_MASK2,DWT Mask Registers 2" bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08))&0x120)==0x20) group.long (0x40+0x08)++0x03 line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE" elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08))&0x120)==0x00) group.long (0x40+0x08)++0x03 line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE" else group.long (0x40+0x08)++0x03 line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " EMITRANGE ,Enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE" endif group.long (0x50)++0x07 line.long 0x00 "DWT_COMP3,DWT Comparator Register 3" line.long 0x04 "DWT_MASK3,DWT Mask Registers 3" bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08))&0x120)==0x20) group.long (0x50+0x08)++0x03 line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE" elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08))&0x120)==0x00) group.long (0x50+0x08)++0x03 line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE" else group.long (0x50+0x08)++0x03 line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " EMITRANGE ,Enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE" endif width 6. tree "CoreSight Identification Registers" rgroup.long 0xFE0++0x0F line.long 0x00 "PID0,Peripheral ID0" hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]" line.long 0x04 "PID1,Peripheral ID1" hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]" hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]" line.long 0x08 "PID2,Peripheral ID2" hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision" bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC" hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]" line.long 0x0c "PID3,Peripheral ID3" hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field" hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block" rgroup.long 0xFD0++0x03 line.long 0x00 "PID4,Peripheral Identification Register 4" hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count" hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code" rgroup.long 0xFF0++0x0F line.long 0x00 "CID0,Component ID0 (Preamble)" line.long 0x04 "CID1,Component ID1" hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class" hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble" line.long 0x08 "CID2,Component ID2" line.long 0x0c "CID3,Component ID3" tree.end width 0x0B else newline textline "DWT component base address not specified" newline endif tree.end tree.end AUTOINDENT.POP tree.end config 16. 8. tree "PCR (Power Clocks and Resets)" base ad:0x40080100 width 25. group.long 0x30++0x13 line.long 0x00 "SLEEP_ENABLE_0,Sleep Enable 0 Register" bitfld.long 0x00 2. " ISPI_SLEEP_ENABLE ,ISPI sleep enable" "Disabled,Enabled" bitfld.long 0x00 1. " EFUSE_SLEEP_ENABLE ,eFuse sleep enable" "Disabled,Enabled" newline rbitfld.long 0x00 0. " TEST_SLEEP_ENABLE ,Test sleep enable" "Disabled,Enabled" line.long 0x04 "SLEEP_ENABLE_1,Sleep Enable 1 Register" bitfld.long 0x04 31. " BTIMER16_SLEEP_ENABLE[1] ,Basic timer 16 instance 1 sleep enable" "Disabled,Enabled" bitfld.long 0x04 30. " [0] ,Basic timer 16 instance 0 sleep enable" "Disabled,Enabled" newline bitfld.long 0x04 29. " EC_REGISTER_BANK_SLEEP_ENABLE ,EC register bank sleep enable" "Disabled,Enabled" bitfld.long 0x04 27. " PWM_SLEEP_ENABLE[8] ,PWM instance 8 sleep enable" "Disabled,Enabled" newline bitfld.long 0x04 26. " [7] ,PWM instance 7 sleep enable" "Disabled,Enabled" bitfld.long 0x04 25. " [6] ,PWM instance 6 sleep enable" "Disabled,Enabled" newline bitfld.long 0x04 24. " [5] ,PWM instance 5 sleep enable" "Disabled,Enabled" bitfld.long 0x04 23. " [4] ,PWM instance 4 sleep enable" "Disabled,Enabled" newline bitfld.long 0x04 22. " [3] ,PWM instance 3 sleep enable" "Disabled,Enabled" bitfld.long 0x04 21. " [2] ,PWM instance 2 sleep enable" "Disabled,Enabled" newline bitfld.long 0x04 20. " [1] ,PWM instance 1 sleep enable" "Disabled,Enabled" bitfld.long 0x04 12. " TACH_SLEEP_ENABLE[2] ,Tach instance 2 sleep enable" "Disabled,Enabled" newline bitfld.long 0x04 11. " [1] ,Tach instance 1 sleep enable" "Disabled,Enabled" bitfld.long 0x04 10. " SMB-I2C[0] ,SMB-I2C instance 0 sleep enable" "Disabled,Enabled" newline bitfld.long 0x04 9. " WDT_SLEEP_ENABLE ,WDT sleep enable" "Disabled,Enabled" bitfld.long 0x04 8. " PROCESSOR_SLEEP_ENABLE ,Processor sleep enable" "Disabled,Enabled" newline bitfld.long 0x04 7. " TFDP_SLEEP_ENABLE ,TFDP sleep enable" "Disabled,Enabled" bitfld.long 0x04 6. " DMA_SLEEP_ENABLE ,DMA sleep enable" "Disabled,Enabled" newline bitfld.long 0x04 5. " PMC_SLEEP_ENABLE ,PMC sleep enable" "Disabled,Enabled" bitfld.long 0x04 4. " PWM_SLEEP_ENABLE[0] ,PWM instance 0 sleep enable" "Disabled,Enabled" newline bitfld.long 0x04 2. " TACH_SLEEP_ENABLE[0] ,TACH instance 0 sleep enable" "Disabled,Enabled" bitfld.long 0x04 1. " PECI_SLEEP_ENABLE ,PECI sleep enable" "Disabled,Enabled" newline bitfld.long 0x04 0. " INTERRUPT_SLEEP_ENABLE ,Interrupt sleep enable" "Disabled,Enabled" line.long 0x08 "SLEEP_ENABLE_2,Sleep Enable 2 Register" bitfld.long 0x08 26. " PORT80_SLEEP_ENABLE[1] ,Port 80 instance 1 sleep enable" "Disabled,Enabled" bitfld.long 0x08 25. " [0] ,Port 80 instance 0 sleep enable" "Disabled,Enabled" newline bitfld.long 0x08 23. " ACPI_EC_SLEEP_ENABLE[4] ,ACPI EC instance 4 sleep enable" "Disabled,Enabled" bitfld.long 0x08 22. " [3] ,ACPI EC instance 3 sleep enable" "Disabled,Enabled" newline bitfld.long 0x08 21. " [2] ,ACPI EC instance 2 sleep enable" "Disabled,Enabled" bitfld.long 0x08 19. " ESPI_SLEEP_ENABLE ,ESPI sleep enable" "Disabled,Enabled" newline bitfld.long 0x08 18. " RTC_SLEEP_ENABLE ,RTC sleep enable" "Disabled,Enabled" bitfld.long 0x08 17. " MAILBOX_SLEEP_ENABLE ,Mailbox sleep enable" "Disabled,Enabled" newline bitfld.long 0x08 16. " 8042EMU_SLEEP_ENABLE ,8042 emulation sleep enable" "Disabled,Enabled" bitfld.long 0x08 15. " ACPI_PM1_SLEEP_ENABLE ,ACPI PM1 sleep enable" "Disabled,Enabled" newline bitfld.long 0x08 14. " ACPI_EC_SLEEP_ENABLE[1] ,ACPI EC instance 1 sleep enable" "Disabled,Enabled" bitfld.long 0x08 13. " [0] ,ACPI EC instance 0 sleep enable" "Disabled,Enabled" newline bitfld.long 0x08 12. " GLOBAL_CONFIG_SLEEP_ENABLE ,Global configuration sleep enable" "Disabled,Enabled" bitfld.long 0x08 2. " UART_SLEEP_ENABLE[1] ,UART instance 1 sleep enable" "Disabled,Enabled" newline bitfld.long 0x08 1. " [0] ,UART instance 0 sleep enable" "Disabled,Enabled" bitfld.long 0x08 0. " LPC_SLEEP_ENABLE[0] ,LPC sleep enable" "Disabled,Enabled" line.long 0x0C "SLEEP_ENABLE_3,Sleep Enable 3 Register" bitfld.long 0x0C 31. " PWM_SLEEP_ENABLE[9] ,PWM instance 9 sleep enable" "Disabled,Enabled" bitfld.long 0x0C 30. " CC_TIMER_SLEEP_ENABLE ,Capture compare timer sleep enable" "Disabled,Enabled" newline bitfld.long 0x0C 29. " HTIMER_SLEEP_ENABLE[1] ,Hibernation timer instance 1 sleep enable" "Disabled,Enabled" bitfld.long 0x0C 25. " LED_SLEEP_ENABLE[3] ,LED instance 3 sleep enable" "Disabled,Enabled" newline bitfld.long 0x0C 24. " BTIMER32_SLEEP_ENABLE[1] ,Basic timer 32 instance 1 sleep enable" "Disabled,Enabled" bitfld.long 0x0C 23. " [0] ,Basic timer 32 instance 0 sleep enable" "Disabled,Enabled" newline bitfld.long 0x0C 22. " BTIMER16_SLEEP_ENABLE[3] ,Basic timer 16 instance 3 sleep enable" "Disabled,Enabled" bitfld.long 0x0C 21. " [2] ,Basic timer 16 instance 2 sleep enable" "Disabled,Enabled" newline bitfld.long 0x0C 20. " GP_SPI_SLEEP_ENABLE[1] ,GP-SPI instance 1 sleep enable" "Disabled,Enabled" bitfld.long 0x0C 19. " BC_MASTER_SLEEP_ENABLE[0] ,BC master instance 0 sleep enable" "Disabled,Enabled" newline bitfld.long 0x0C 18. " LED_SLEEP_ENABLE[2] ,LED instance 2 sleep enable" "Disabled,Enabled" bitfld.long 0x0C 17. " [1] ,LED instance 1 sleep enable" "Disabled,Enabled" newline bitfld.long 0x0C 16. " [0] ,LED instance 0 sleep enable" "Disabled,Enabled" bitfld.long 0x0C 15. " SMB-I2C_SLEEP_ENABLE[3] ,SMB-I2C instance 3 sleep enable" "Disabled,Enabled" newline bitfld.long 0x0C 14. " [2] ,SMB-I2C instance 2 sleep enable" "Disabled,Enabled" bitfld.long 0x0C 13. " [1] ,SMB-I2C instance 1 sleep enable" "Disabled,Enabled" newline bitfld.long 0x0C 12. " RPM2PWM_SLEEP_ENABLE[0] ,RPM2PWM instance 0 sleep enable" "Disabled,Enabled" bitfld.long 0x0C 11. " KEYSCAN_SLEEP_ENABLE ,Keyscan sleep enable" "Disabled,Enabled" newline bitfld.long 0x0C 10. " HTIMER_SLEEP_ENABLE[0] ,Hibernation timer instance 0 sleep enable" "Disabled,Enabled" bitfld.long 0x0C 9. " GP_SPI_SLEEP_ENABLE[0] ,GP-SPI instance 0 sleep enable" "Disabled,Enabled" newline bitfld.long 0x0C 7. " PS2_SLEEP_ENABLE[2] ,PS2 instance 2 sleep enable" "Disabled,Enabled" bitfld.long 0x0C 6. " [1] ,PS2 instance 1 sleep enable" "Disabled,Enabled" newline bitfld.long 0x0C 5. " [0] ,PS2 instance 0 sleep enable" "Disabled,Enabled" bitfld.long 0x0C 3. " ADC_SLEEP_ENABLE ,ADC sleep enable" "Disabled,Enabled" line.long 0x10 "SLEEP_ENABLE_4,Sleep Enable 4 Register" bitfld.long 0x10 14. " EEPROM_SLEEP_ENABLE ,EEPROM sleep enable" "Disabled,Enabled" bitfld.long 0x10 12. " RC_ID_SLEEP_ENABLE[2] ,RC ID instance 2 sleep enable" "Disabled,Enabled" newline bitfld.long 0x10 11. " [1] ,RC ID instance 1 sleep enable" "Disabled,Enabled" bitfld.long 0x10 10. " [0] ,RC ID instance 0 sleep enable" "Disabled,Enabled" newline bitfld.long 0x10 9. " BC_MASTER_SLEEP_ENABLE[1] ,BC master instance 1 sleep enable" "Disabled,Enabled" bitfld.long 0x10 8. " QSPI_MASTER_SLEEP_ENABLE[1] ,Quad SPI master sleep enable" "Disabled,Enabled" newline bitfld.long 0x10 7. " RPM2PWM_SLEEP_ENABLE[1] ,RPM2PWM instance 1 sleep enable" "Disabled,Enabled" bitfld.long 0x10 6. " RTOS_TIMER_SLEEP_ENABLE ,RTOS timer sleep enable" "Disabled,Enabled" newline bitfld.long 0x10 5. " 16B_CT_SLEEP_ENABLE[3] ,16-bit counter/timer instance 3 sleep enable" "Disabled,Enabled" bitfld.long 0x10 4. " [2] ,16-bit counter/timer instance 2 sleep enable" "Disabled,Enabled" newline bitfld.long 0x10 3. " [1] ,16-bit counter/timer instance 1 sleep enable" "Disabled,Enabled" bitfld.long 0x10 2. " [0] ,16-bit counter/timer instance 0 sleep enable" "Disabled,Enabled" newline bitfld.long 0x10 1. " PWM_SLEEP_ENABLE[11] ,PWM instance 11 sleep enable" "Disabled,Enabled" bitfld.long 0x10 0. " PWM_SLEEP_ENABLE[10] ,PWM instance 10 sleep enable" "Disabled,Enabled" rgroup.long 0x50++0x13 line.long 0x00 "CLOCK_REQUIRE_0,Clock require 0 Register" bitfld.long 0x00 2. " ISPI_CLOCK_REQUIRE ,ISPI clock require" "Not required,Required" bitfld.long 0x00 1. " EFUSE_CLOCK_REQUIRE ,eFuse clock require" "Not required,Required" line.long 0x04 "CLOCK_REQUIRE_1,Clock require 1 Register" bitfld.long 0x04 31. " BTIMER16_CLOCK_REQUIRE[1] ,Basic timer 16 instance 1 clock require" "Not required,Required" bitfld.long 0x04 30. " [0] ,Basic timer 16 instance 0 clock require" "Not required,Required" newline bitfld.long 0x04 29. " EC_REGISTER_BANK_CLOCK_REQUIRE ,EC register bank clock require" "Not required,Required" bitfld.long 0x04 27. " PWM_CLOCK_REQUIRE[8] ,PWM instance 8 clock require" "Not required,Required" newline bitfld.long 0x04 26. " [7] ,PWM instance 7 clock require" "Not required,Required" bitfld.long 0x04 25. " [6] ,PWM instance 6 clock require" "Not required,Required" newline bitfld.long 0x04 24. " [5] ,PWM instance 5 clock require" "Not required,Required" bitfld.long 0x04 23. " [4] ,PWM instance 4 clock require" "Not required,Required" newline bitfld.long 0x04 22. " [3] ,PWM instance 3 clock require" "Not required,Required" bitfld.long 0x04 21. " [2] ,PWM instance 2 clock require" "Not required,Required" newline bitfld.long 0x04 20. " [1] ,PWM instance 1 clock require" "Not required,Required" bitfld.long 0x04 12. " TACH_CLOCK_REQUIRE[2] ,Tach instance 2 clock require" "Not required,Required" newline bitfld.long 0x04 11. " [1] ,Tach instance 1 clock require" "Not required,Required" bitfld.long 0x04 10. " SMB-I2C[0] ,SMB-I2C instance 0 clock require" "Not required,Required" newline bitfld.long 0x04 9. " WDT_CLOCK_REQUIRE ,WDT clock require" "Not required,Required" bitfld.long 0x04 8. " PROCESSOR_CLOCK_REQUIRE ,Processor clock require" "Not required,Required" newline bitfld.long 0x04 7. " TFDP_CLOCK_REQUIRE ,TFDP clock require" "Not required,Required" bitfld.long 0x04 6. " DMA_CLOCK_REQUIRE ,DMA clock require" "Not required,Required" newline bitfld.long 0x04 5. " PMC_CLOCK_REQUIRE ,PMC clock require" "Not required,Required" bitfld.long 0x04 4. " PWM_CLOCK_REQUIRE[0] ,PWM instance 0 clock require" "Not required,Required" newline bitfld.long 0x04 2. " TACH_CLOCK_REQUIRE[0] ,TACH instance 0 clock require" "Not required,Required" bitfld.long 0x04 1. " PECI_CLOCK_REQUIRE ,PECI clock require" "Not required,Required" newline bitfld.long 0x04 0. " INTERRUPT_CLOCK_REQUIRE ,Interrupt clock require" "Not required,Required" line.long 0x08 "CLOCK_REQUIRE_2,Clock require 2 Register" bitfld.long 0x08 26. " PORT80_CLOCK_REQUIRE[1] ,Port 80 instance 1 clock require" "Not required,Required" bitfld.long 0x08 25. " [0] ,Port 80 instance 0 clock require" "Not required,Required" newline bitfld.long 0x08 23. " ACPI_EC_CLOCK_REQUIRE[4] ,ACPI EC instance 4 clock require" "Not required,Required" bitfld.long 0x08 22. " [3] ,ACPI EC instance 3 clock require" "Not required,Required" newline bitfld.long 0x08 21. " [2] ,ACPI EC instance 2 clock require" "Not required,Required" bitfld.long 0x08 19. " ESPI_CLOCK_REQUIRE ,ESPI clock require" "Not required,Required" newline bitfld.long 0x08 18. " RTC_CLOCK_REQUIRE ,RTC clock require" "Not required,Required" bitfld.long 0x08 17. " MAILBOX_CLOCK_REQUIRE ,Mailbox clock require" "Not required,Required" newline bitfld.long 0x08 16. " 8042EMU_CLOCK_REQUIRE ,8042 emulation clock require" "Not required,Required" bitfld.long 0x08 15. " ACPI_PM1_CLOCK_REQUIRE ,ACPI PM1 clock require" "Not required,Required" newline bitfld.long 0x08 14. " ACPI_EC_CLOCK_REQUIRE[1] ,ACPI EC instance 1 clock require" "Not required,Required" bitfld.long 0x08 13. " [0] ,ACPI EC instance 0 clock require" "Not required,Required" newline bitfld.long 0x08 12. " GLOBAL_CONFIG_CLOCK_REQUIRE ,Global configuration clock require" "Not required,Required" bitfld.long 0x08 2. " UART_CLOCK_REQUIRE[1] ,UART instance 1 clock require" "Not required,Required" newline bitfld.long 0x08 1. " [0] ,UART instance 0 clock require" "Not required,Required" bitfld.long 0x08 0. " LPC_CLOCK_REQUIRE[0] ,LPC clock require" "Not required,Required" line.long 0x0C "CLOCK_REQUIRE_3,Clock require 3 Register" bitfld.long 0x0C 31. " PWM_CLOCK_REQUIRE[9] ,PWM instance 9 clock require" "Not required,Required" bitfld.long 0x0C 30. " CC_TIMER_CLOCK_REQUIRE ,Capture compare timer clock require" "Not required,Required" newline bitfld.long 0x0C 29. " HTIMER_CLOCK_REQUIRE[1] ,Hibernation timer instance 1 clock require" "Not required,Required" bitfld.long 0x0C 25. " LED_CLOCK_REQUIRE[3] ,LED instance 3 clock require" "Not required,Required" newline bitfld.long 0x0C 24. " BTIMER32_CLOCK_REQUIRE[1] ,Basic timer 32 instance 1 clock require" "Not required,Required" bitfld.long 0x0C 23. " [0] ,Basic timer 32 instance 0 clock require" "Not required,Required" newline bitfld.long 0x0C 22. " BTIMER16_CLOCK_REQUIRE[3] ,Basic timer 16 instance 3 clock require" "Not required,Required" bitfld.long 0x0C 21. " [2] ,Basic timer 16 instance 2 clock require" "Not required,Required" newline bitfld.long 0x0C 20. " GP_SPI_CLOCK_REQUIRE[1] ,GP-SPI instance 1 clock require" "Not required,Required" bitfld.long 0x0C 19. " BC_MASTER_CLOCK_REQUIRE[0] ,BC master instance 0 clock require" "Not required,Required" newline bitfld.long 0x0C 18. " LED_CLOCK_REQUIRE[2] ,LED instance 2 clock require" "Not required,Required" bitfld.long 0x0C 17. " [1] ,LED instance 1 clock require" "Not required,Required" newline bitfld.long 0x0C 16. " [0] ,LED instance 0 clock require" "Not required,Required" bitfld.long 0x0C 15. " SMB-I2C_CLOCK_REQUIRE[3] ,SMB-I2C instance 3 clock require" "Not required,Required" newline bitfld.long 0x0C 14. " [2] ,SMB-I2C instance 2 clock require" "Not required,Required" bitfld.long 0x0C 13. " [1] ,SMB-I2C instance 1 clock require" "Not required,Required" newline bitfld.long 0x0C 12. " RPM2PWM_CLOCK_REQUIRE[0] ,RPM2PWM instance 0 clock require" "Not required,Required" bitfld.long 0x0C 11. " KEYSCAN_CLOCK_REQUIRE ,Keyscan clock require" "Not required,Required" newline bitfld.long 0x0C 10. " HTIMER_CLOCK_REQUIRE[0] ,Hibernation timer instance 0 clock require" "Not required,Required" bitfld.long 0x0C 9. " GP_SPI_CLOCK_REQUIRE[0] ,GP-SPI instance 0 clock require" "Not required,Required" newline bitfld.long 0x0C 7. " PS2_CLOCK_REQUIRE[2] ,PS2 instance 2 clock require" "Not required,Required" bitfld.long 0x0C 6. " [1] ,PS2 instance 1 clock require" "Not required,Required" newline bitfld.long 0x0C 5. " [0] ,PS2 instance 0 clock require" "Not required,Required" bitfld.long 0x0C 3. " ADC_CLOCK_REQUIRE ,ADC clock require" "Not required,Required" line.long 0x10 "CLOCK_REQUIRE_4,Clock require 4 Register" bitfld.long 0x10 14. " EEPROM_CLOCK_REQUIRE ,EEPROM clock require" "Not required,Required" bitfld.long 0x10 12. " RC_ID_CLOCK_REQUIRE[2] ,RC ID instance 2 clock require" "Not required,Required" newline bitfld.long 0x10 11. " [1] ,RC ID instance 1 clock require" "Not required,Required" bitfld.long 0x10 10. " [0] ,RC ID instance 0 clock require" "Not required,Required" newline bitfld.long 0x10 9. " BC_MASTER_CLOCK_REQUIRE[1] ,BC master instance 1 clock require" "Not required,Required" bitfld.long 0x10 8. " QSPI_MASTER_CLOCK_REQUIRE[1] ,Quad SPI master clock require" "Not required,Required" newline bitfld.long 0x10 7. " RPM2PWM_CLOCK_REQUIRE[1] ,RPM2PWM instance 1 clock require" "Not required,Required" bitfld.long 0x10 6. " RTOS_TIMER_CLOCK_REQUIRE ,RTOS timer clock require" "Not required,Required" newline bitfld.long 0x10 5. " 16B_CT_CLOCK_REQUIRE[3] ,16-bit counter/timer instance 3 clock require" "Not required,Required" bitfld.long 0x10 4. " [2] ,16-bit counter/timer instance 2 clock require" "Not required,Required" newline bitfld.long 0x10 3. " [1] ,16-bit counter/timer instance 1 clock require" "Not required,Required" bitfld.long 0x10 2. " [0] ,16-bit counter/timer instance 0 clock require" "Not required,Required" newline bitfld.long 0x10 1. " PWM_CLOCK_REQUIRE[11] ,PWM instance 11 clock require" "Not required,Required" bitfld.long 0x10 0. " PWM_CLOCK_REQUIRE[10] ,PWM instance 10 clock require" "Not required,Required" group.long 0x70++0x13 line.long 0x00 "RESET_ENABLE_0,Reset enable 0 Register" bitfld.long 0x00 2. " ISPI_RESET_ENABLE ,ISPI reset enable" "Disabled,Enabled" bitfld.long 0x00 1. " EFUSE_RESET_ENABLE ,eFuse reset enable" "Disabled,Enabled" line.long 0x04 "RESET_ENABLE_1,Reset enable 1 Register" bitfld.long 0x04 31. " BTIMER16_RESET_ENABLE[1] ,Basic timer 16 instance 1 reset enable" "Disabled,Enabled" bitfld.long 0x04 30. " [0] ,Basic timer 16 instance 0 reset enable" "Disabled,Enabled" newline bitfld.long 0x04 29. " EC_REGISTER_BANK_RESET_ENABLE ,EC register bank reset enable" "Disabled,Enabled" bitfld.long 0x04 27. " PWM_RESET_ENABLE[8] ,PWM instance 8 reset enable" "Disabled,Enabled" newline bitfld.long 0x04 26. " [7] ,PWM instance 7 reset enable" "Disabled,Enabled" bitfld.long 0x04 25. " [6] ,PWM instance 6 reset enable" "Disabled,Enabled" newline bitfld.long 0x04 24. " [5] ,PWM instance 5 reset enable" "Disabled,Enabled" bitfld.long 0x04 23. " [4] ,PWM instance 4 reset enable" "Disabled,Enabled" newline bitfld.long 0x04 22. " [3] ,PWM instance 3 reset enable" "Disabled,Enabled" bitfld.long 0x04 21. " [2] ,PWM instance 2 reset enable" "Disabled,Enabled" newline bitfld.long 0x04 20. " [1] ,PWM instance 1 reset enable" "Disabled,Enabled" bitfld.long 0x04 12. " TACH_RESET_ENABLE[2] ,Tach instance 2 reset enable" "Disabled,Enabled" newline bitfld.long 0x04 11. " [1] ,Tach instance 1 reset enable" "Disabled,Enabled" bitfld.long 0x04 10. " SMB-I2C[0] ,SMB-I2C instance 0 reset enable" "Disabled,Enabled" newline bitfld.long 0x04 9. " WDT_RESET_ENABLE ,WDT reset enable" "Disabled,Enabled" bitfld.long 0x04 8. " PROCESSOR_RESET_ENABLE ,Processor reset enable" "Disabled,Enabled" newline bitfld.long 0x04 7. " TFDP_RESET_ENABLE ,TFDP reset enable" "Disabled,Enabled" bitfld.long 0x04 6. " DMA_RESET_ENABLE ,DMA reset enable" "Disabled,Enabled" newline bitfld.long 0x04 5. " PMC_RESET_ENABLE ,PMC reset enable" "Disabled,Enabled" bitfld.long 0x04 4. " PWM_RESET_ENABLE[0] ,PWM instance 0 reset enable" "Disabled,Enabled" newline bitfld.long 0x04 2. " TACH_RESET_ENABLE[0] ,TACH instance 0 reset enable" "Disabled,Enabled" bitfld.long 0x04 1. " PECI_RESET_ENABLE ,PECI reset enable" "Disabled,Enabled" newline bitfld.long 0x04 0. " INTERRUPT_RESET_ENABLE ,Interrupt reset enable" "Disabled,Enabled" line.long 0x08 "RESET_ENABLE_2,Reset enable 2 Register" bitfld.long 0x08 26. " PORT80_RESET_ENABLE[1] ,Port 80 instance 1 reset enable" "Disabled,Enabled" bitfld.long 0x08 25. " [0] ,Port 80 instance 0 reset enable" "Disabled,Enabled" newline bitfld.long 0x08 23. " ACPI_EC_RESET_ENABLE[4] ,ACPI EC instance 4 reset enable" "Disabled,Enabled" bitfld.long 0x08 22. " [3] ,ACPI EC instance 3 reset enable" "Disabled,Enabled" newline bitfld.long 0x08 21. " [2] ,ACPI EC instance 2 reset enable" "Disabled,Enabled" bitfld.long 0x08 19. " ESPI_RESET_ENABLE ,ESPI reset enable" "Disabled,Enabled" newline bitfld.long 0x08 18. " RTC_RESET_ENABLE ,RTC reset enable" "Disabled,Enabled" bitfld.long 0x08 17. " MAILBOX_RESET_ENABLE ,Mailbox reset enable" "Disabled,Enabled" newline bitfld.long 0x08 16. " 8042EMU_RESET_ENABLE ,8042 emulation reset enable" "Disabled,Enabled" bitfld.long 0x08 15. " ACPI_PM1_RESET_ENABLE ,ACPI PM1 reset enable" "Disabled,Enabled" newline bitfld.long 0x08 14. " ACPI_EC_RESET_ENABLE[1] ,ACPI EC instance 1 reset enable" "Disabled,Enabled" bitfld.long 0x08 13. " [0] ,ACPI EC instance 0 reset enable" "Disabled,Enabled" newline bitfld.long 0x08 12. " GLOBAL_CONFIG_RESET_ENABLE ,Global configuration reset enable" "Disabled,Enabled" bitfld.long 0x08 2. " UART_RESET_ENABLE[1] ,UART instance 1 reset enable" "Disabled,Enabled" newline bitfld.long 0x08 1. " [0] ,UART instance 0 reset enable" "Disabled,Enabled" bitfld.long 0x08 0. " LPC_RESET_ENABLE[0] ,LPC reset enable" "Disabled,Enabled" line.long 0x0C "RESET_ENABLE_3,Reset enable 3 Register" bitfld.long 0x0C 31. " PWM_RESET_ENABLE[9] ,PWM instance 9 reset enable" "Disabled,Enabled" bitfld.long 0x0C 30. " CC_TIMER_RESET_ENABLE ,Capture compare timer reset enable" "Disabled,Enabled" newline bitfld.long 0x0C 29. " HTIMER_RESET_ENABLE[1] ,Hibernation timer instance 1 reset enable" "Disabled,Enabled" bitfld.long 0x0C 25. " LED_RESET_ENABLE[3] ,LED instance 3 reset enable" "Disabled,Enabled" newline bitfld.long 0x0C 24. " BTIMER32_RESET_ENABLE[1] ,Basic timer 32 instance 1 reset enable" "Disabled,Enabled" bitfld.long 0x0C 23. " [0] ,Basic timer 32 instance 0 reset enable" "Disabled,Enabled" newline bitfld.long 0x0C 22. " BTIMER16_RESET_ENABLE[3] ,Basic timer 16 instance 3 reset enable" "Disabled,Enabled" bitfld.long 0x0C 21. " [2] ,Basic timer 16 instance 2 reset enable" "Disabled,Enabled" newline bitfld.long 0x0C 20. " GP_SPI_RESET_ENABLE[1] ,GP-SPI instance 1 reset enable" "Disabled,Enabled" bitfld.long 0x0C 19. " BC_MASTER_RESET_ENABLE[0] ,BC master instance 0 reset enable" "Disabled,Enabled" newline bitfld.long 0x0C 18. " LED_RESET_ENABLE[2] ,LED instance 2 reset enable" "Disabled,Enabled" bitfld.long 0x0C 17. " [1] ,LED instance 1 reset enable" "Disabled,Enabled" newline bitfld.long 0x0C 16. " [0] ,LED instance 0 reset enable" "Disabled,Enabled" bitfld.long 0x0C 15. " SMB-I2C_RESET_ENABLE[3] ,SMB-I2C instance 3 reset enable" "Disabled,Enabled" newline bitfld.long 0x0C 14. " [2] ,SMB-I2C instance 2 reset enable" "Disabled,Enabled" bitfld.long 0x0C 13. " [1] ,SMB-I2C instance 1 reset enable" "Disabled,Enabled" newline bitfld.long 0x0C 12. " RPM2PWM_RESET_ENABLE[0] ,RPM2PWM instance 0 reset enable" "Disabled,Enabled" bitfld.long 0x0C 11. " KEYSCAN_RESET_ENABLE ,Keyscan reset enable" "Disabled,Enabled" newline bitfld.long 0x0C 10. " HTIMER_RESET_ENABLE[0] ,Hibernation timer instance 0 reset enable" "Disabled,Enabled" bitfld.long 0x0C 9. " GP_SPI_RESET_ENABLE[0] ,GP-SPI instance 0 reset enable" "Disabled,Enabled" newline bitfld.long 0x0C 7. " PS2_RESET_ENABLE[2] ,PS2 instance 2 reset enable" "Disabled,Enabled" bitfld.long 0x0C 6. " [1] ,PS2 instance 1 reset enable" "Disabled,Enabled" newline bitfld.long 0x0C 5. " [0] ,PS2 instance 0 reset enable" "Disabled,Enabled" bitfld.long 0x0C 3. " ADC_RESET_ENABLE ,ADC reset enable" "Disabled,Enabled" line.long 0x10 "RESET_ENABLE_4,Reset enable 4 Register" bitfld.long 0x10 14. " EEPROM_RESET_ENABLE ,EEPROM reset enable" "Disabled,Enabled" bitfld.long 0x10 12. " RC_ID_RESET_ENABLE[2] ,RC ID instance 2 reset enable" "Disabled,Enabled" newline bitfld.long 0x10 11. " [1] ,RC ID instance 1 reset enable" "Disabled,Enabled" bitfld.long 0x10 10. " [0] ,RC ID instance 0 reset enable" "Disabled,Enabled" newline bitfld.long 0x10 9. " BC_MASTER_RESET_ENABLE[1] ,BC master instance 1 reset enable" "Disabled,Enabled" bitfld.long 0x10 8. " QSPI_MASTER_RESET_ENABLE[1] ,Quad SPI master reset enable" "Disabled,Enabled" newline bitfld.long 0x10 7. " RPM2PWM_RESET_ENABLE[1] ,RPM2PWM instance 1 reset enable" "Disabled,Enabled" bitfld.long 0x10 6. " RTOS_TIMER_RESET_ENABLE ,RTOS timer reset enable" "Disabled,Enabled" newline bitfld.long 0x10 5. " 16B_CT_RESET_ENABLE[3] ,16-bit counter/timer instance 3 reset enable" "Disabled,Enabled" bitfld.long 0x10 4. " [2] ,16-bit counter/timer instance 2 reset enable" "Disabled,Enabled" newline bitfld.long 0x10 3. " [1] ,16-bit counter/timer instance 1 reset enable" "Disabled,Enabled" bitfld.long 0x10 2. " [0] ,16-bit counter/timer instance 0 reset enable" "Disabled,Enabled" newline bitfld.long 0x10 1. " PWM_RESET_ENABLE[11] ,PWM instance 11 reset enable" "Disabled,Enabled" bitfld.long 0x10 0. " PWM_RESET_ENABLE[10] ,PWM instance 10 reset enable" "Disabled,Enabled" group.long 0x00++0x0B line.long 0x00 "SYSTEM_SLEEP_CONTROL,System Sleep Control Register" bitfld.long 0x00 3. " SLEEP_ALL_ENABLE ,Sleep all enable" "Disabled,Enabled" rbitfld.long 0x00 2. " TEST ,Test" "0,1" newline bitfld.long 0x00 0. " SLEEP_MODE ,Sleep mode" "Light,Heavy" line.long 0x04 "PROCESSOR_CLOCK_CONTROL,Processor Clock Control Register" hexmask.long.byte 0x04 0.--7. 1. " PROCESSOR_CLOCK_DIVIDE ,Processor clock divide" line.long 0x08 "SLOW_CLOCK_CONTROL,Slow Clock Control Register" hexmask.long.word 0x08 0.--9. 1. " SLOW_CLOCK_DIVIDE ,Slow clock divide" rgroup.long 0x0C++0x03 line.long 0x00 "OSCILLATOR_ID,Oscillator ID Register" bitfld.long 0x00 8. " PLL_LOCK ,Phase lock loop lock status" "Not locked,Locked" hexmask.long.byte 0x00 0.--7. 1. " TEST ,Test field" if (((per.l(ad:0x40080100+0x14))&0x100)==0x00) rgroup.long 0x10++0x03 line.long 0x00 "PCR_POWER_RESET_STATUS,PCR Power Reset Status Register" bitfld.long 0x00 11. " ESPI_CLK_ACTIVE ,ESPI clock input state" "Not present,Present" bitfld.long 0x00 10. " 32K_ACTIVE ,32K clock input state" "Not present,Present" newline bitfld.long 0x00 7. " JTAG_RST# ,JTAG_RST# pin state" "Low,High" bitfld.long 0x00 6. " RESET_SYS_STATUS ,RESET_SYS value" "Not occurred,Occurred" newline bitfld.long 0x00 5. " VBAT_RESET_STATUS ,RESET_VBAT status" "Not occurred,Occurred" bitfld.long 0x00 3. " RESET_HOST_STATUS ,RESET_VCC status" "Not active,Active" newline bitfld.long 0x00 2. " VCC_PWRGD_STATUS ,VCC_PWRGD status" "Not asserted,Asserted" else rgroup.long 0x10++0x03 line.long 0x00 "PCR_POWER_RESET_STATUS,PCR Power Reset Status Register" bitfld.long 0x00 11. " PCI_CLK_ACTIVE ,PCI clock input state" "Not present,Present" bitfld.long 0x00 10. " 32K_ACTIVE ,32K clock input state" "Not present,Present" newline bitfld.long 0x00 7. " JTAG_RST# ,JTAG_RST# pin state" "Low,High" bitfld.long 0x00 6. " RESET_SYS_STATUS ,RESET_SYS value" "Not occurred,Occurred" newline bitfld.long 0x00 5. " VBAT_RESET_STATUS ,RESET_VBAT status" "Not occurred,Occurred" bitfld.long 0x00 3. " RESET_HOST_STATUS ,RESET_VCC status" "Not active,Active" newline bitfld.long 0x00 2. " VCC_PWRGD_STATUS ,VCC_PWRGD status" "Not asserted,Asserted" endif if (((per.l(ad:0x40080100+0x10))&0x04)==0x00) group.long 0x14++0x03 line.long 0x00 "POWER_RESET_CONTROL,Power Reset Control Register" bitfld.long 0x00 8. " HOST_RESET_SELECT ,Reset signal platform" "eSPI_PLTRST#,LRESET#" rbitfld.long 0x00 0. " PWR_INV ,VCC power valid" "No,Yes" else group.long 0x14++0x03 line.long 0x00 "POWER_RESET_CONTROL,Power Reset Control Register" bitfld.long 0x00 8. " HOST_RESET_SELECT ,Reset signal platform" "eSPI_PLTRST#,LRESET#" bitfld.long 0x00 0. " PWR_INV ,VCC power valid" "No,Yes" endif wgroup.long 0x18++0x03 line.long 0x00 "SYSTEM_RESET,System Reset Register" bitfld.long 0x00 8. " SOFT_SYS_RESET ,Reset device (RESEST_SYS)" "No reset,Reset" width 0x0B tree.end tree "DMA (Internal DMA Controller)" base ad:0x40002400 width 5. group.byte 0x00++0x00 line.byte 0x00 "MCR,Main Control Register" bitfld.byte 0x00 1. " SOFT_RESET ,Soft reset the entire module" "No effect,Reset" bitfld.byte 0x00 0. " ACTIVATE ,Enable the block operation" "No effect,Set" rgroup.long 0x04++0x03 line.long 0x00 "DPR,Data Packet Register" width 0x0B tree "Channel 0" base ad:0x40002440 width 11. group.byte 0x00++0x00 line.byte 0x00 "CH0AR,Channel 0 Activate Register" bitfld.byte 0x00 0. " CHANNEL_ACTIVATE ,Enable this channel for operation" "Disabled,Enabled" group.long 0x04++0x0B line.long 0x00 "CH0MSAR,Channel 0 Memory Start Address Register" line.long 0x04 "CH0MEAR,Channel 0 Memory End Address Register" line.long 0x08 "CH0DA,Channel 0 Device Address" if (((per.l(ad:0x40002440+0x10))&0x80001)==0x00001) group.long 0x10++0x03 line.long 0x00 "CH0CR,Channel 0 Control Register" bitfld.long 0x00 25. " TRANSFER_ABORT ,Abort the current transfer on DMA channel" "Not aborted,Aborted" newline bitfld.long 0x00 20.--22. " TRANSFER_SIZE ,The transfer size in bytes of each data packet transfer" "1 byte,2 bytes,4 bytes,?..." bitfld.long 0x00 19. " DISABLE_HARDWARE_FLOW_CONTROL ,Disable hardware flow register" "Yes,No" newline bitfld.long 0x00 18. " LOCK_CHANNEL ,Lock the arbitration of the channel arbiter" ",Lock" bitfld.long 0x00 17. " INCREMENT_DEVICE_ADDRESS ,Increment device address" "Not incremented,Incremented" newline bitfld.long 0x00 16. " INCREMENT_MEMORY_ADDRESS ,Increment memory address" "Not incremented,Incremented" hexmask.long.byte 0x00 9.--15. 1. " HARDWARE_FLOW_CONTROL_DEVICE ,Connected channel as HFC master" newline bitfld.long 0x00 8. " TRANSFER_DIRECTION ,Determines the direction of the DMA transfer" "MEMORY_START_ADDRESS->DEVICE_ADDRESS,DEVICE_ADDRESS->MEMORY_START_ADDRESS" rbitfld.long 0x00 5. " BUSY ,Busy indicator for DMA channel" "Not busy,Busy" newline rbitfld.long 0x00 2. " DONE ,Channel control register is done" "Not done,Done" rbitfld.long 0x00 1. " REQUEST ,Transfer request from the master device" "Not requested,Requested" newline bitfld.long 0x00 0. " RUN ,Control run field" "Disabled,Enabled" elif (((per.l(ad:0x40002440+0x10))&0x80000)==0x00) group.long 0x10++0x03 line.long 0x00 "CH0CR,Channel 0 Control Register" bitfld.long 0x00 25. " TRANSFER_ABORT ,Abort the current transfer on DMA channel" "Not aborted,Aborted" newline bitfld.long 0x00 20.--22. " TRANSFER_SIZE ,The transfer size in bytes of each data packet transfer" "1 byte,2 bytes,4 bytes,?..." bitfld.long 0x00 19. " DISABLE_HARDWARE_FLOW_CONTROL ,Disable hardware flow register" "Yes,No" newline bitfld.long 0x00 18. " LOCK_CHANNEL ,Lock the arbitration of the channel arbiter" ",Lock" bitfld.long 0x00 17. " INCREMENT_DEVICE_ADDRESS ,Increment device address" "Not incremented,Incremented" newline bitfld.long 0x00 16. " INCREMENT_MEMORY_ADDRESS ,Increment memory address" "Not incremented,Incremented" hexmask.long.byte 0x00 9.--15. 1. " HARDWARE_FLOW_CONTROL_DEVICE ,Connected channel as HFC master" newline bitfld.long 0x00 8. " TRANSFER_DIRECTION ,Determines the direction of the DMA transfer" "MEMORY_START_ADDRESS->DEVICE_ADDRESS,DEVICE_ADDRESS->MEMORY_START_ADDRESS" rbitfld.long 0x00 5. " BUSY ,Busy indicator for DMA channel" "Not busy,Busy" newline rbitfld.long 0x00 1. " REQUEST ,Transfer request from the master device" "Not requested,Requested" newline bitfld.long 0x00 0. " RUN ,Control run field" "Disabled,Enabled" else group.long 0x10++0x03 line.long 0x00 "CH0CR,Channel 0 Control Register" bitfld.long 0x00 25. " TRANSFER_ABORT ,Abort the current transfer on DMA channel" "Not aborted,Aborted" bitfld.long 0x00 24. " TRANSFER_GO ,Start a transfer under the firmware flow control" "No effect,Started" newline bitfld.long 0x00 20.--22. " TRANSFER_SIZE ,The transfer size in bytes of each data packet transfer" "1 byte,2 bytes,4 bytes,?..." bitfld.long 0x00 19. " DISABLE_HARDWARE_FLOW_CONTROL ,Disable hardware flow register" "Yes,No" newline bitfld.long 0x00 18. " LOCK_CHANNEL ,Lock the arbitration of the channel arbiter" ",Lock" bitfld.long 0x00 17. " INCREMENT_DEVICE_ADDRESS ,Increment device address" "Not incremented,Incremented" newline bitfld.long 0x00 16. " INCREMENT_MEMORY_ADDRESS ,Increment memory address" "Not incremented,Incremented" hexmask.long.byte 0x00 9.--15. 1. " HARDWARE_FLOW_CONTROL_DEVICE ,Connected channel as HFC master" newline bitfld.long 0x00 8. " TRANSFER_DIRECTION ,Determines the direction of the DMA transfer" "MEMORY_START_ADDRESS->DEVICE_ADDRESS,DEVICE_ADDRESS->MEMORY_START_ADDRESS" rbitfld.long 0x00 5. " BUSY ,Busy indicator for DMA channel" "Not busy,Busy" newline bitfld.long 0x00 1. " REQUEST ,Transfer request from the master device" "Not requested,Requested" endif group.byte 0x14++0x00 line.byte 0x00 "CH0ISR,Channel 0 Interrupt Status Register" eventfld.byte 0x00 2. " STATUS_DONE ,Complete a transfer successfully" "Not done,Done" eventfld.byte 0x00 1. " STATUS_FLOW_CONTROL ,Encounter a hardware flow control request" "No HFC event,HFC" newline eventfld.byte 0x00 0. " STATUS_BUS_ERROR ,Detect over the internal 32-bit bus" "No error,Error" group.byte 0x18++0x00 line.byte 0x00 "CH0IER,Channel 0 Interrupt Enable Register" bitfld.byte 0x00 2. " STATUS_ENABLE_DONE ,Interrupt enable for STATUS_DONE" "Disabled,Enabled" bitfld.byte 0x00 1. " STATUS_ENABLE_FLOW_CONTROL_ERROR ,Interrupt enable for STATUS_FLOW_CONTROL" "Disabled,Enabled" newline bitfld.byte 0x00 0. " STATUS_ENABLE_BUS_ERROR ,Interrupt enable for STATUS_BUS_ERROR" "Disabled,Enabled" rgroup.long 0x1C++0x03 line.long 0x00 "TEST,TEST" group.long 0x20++0x07 line.long 0x00 "CH0CRCER,Channel 0 CRC Enable Register" bitfld.long 0x00 1. " CRC_POST_TRANSFER_ENABLE ,Enables the transfer of the calculated CRC-32" "Disabled,Enabled" bitfld.long 0x00 0. " CRC_MODE ,Calculation of CRC-32 enable" "Disabled,Enabled" line.long 0x04 "CH0CRCDR,Channel 0 CRC Data Register" if (((per.l(ad:0x40002440+0x20))&0x02)==0x02) group.long 0x28++0x03 line.long 0x00 "CH0CRCPSR,Channel 0 CRC Post Status Register" rbitfld.long 0x00 3. " CRC_DATA_READY ,Post-transfer status" "Completed,In processing" bitfld.long 0x00 2. " CRC_DATA_DONE ,Post-transfer is done" "Not done,Done" newline rbitfld.long 0x00 1. " CRC_RUNNING ,Starts the post-transfer" "Completed,Started" rbitfld.long 0x00 0. " CRC_DONE ,Complete CRC calculation" "Not done,Done" else rgroup.long 0x28++0x03 line.long 0x00 "CH0CRCPSR,Channel 0 CRC Post Status Register" bitfld.long 0x00 3. " CRC_DATA_READY ,Processing the post-transfer" "Completed,In processing" bitfld.long 0x00 2. " CRC_DATA_DONE ,Complete the post-transfer" "Not done,Done" newline bitfld.long 0x00 1. " CRC_RUNNING ,Starts the post-transfer" "Completed,Started" bitfld.long 0x00 0. " CRC_DONE ,Complete CRC calculation" "Not done,Done" endif rgroup.long 0x2C++0x03 line.long 0x00 "TEST,TEST" width 0x0B tree.end tree "Channel 1" base ad:0x40002480 width 11. group.byte 0x00++0x00 line.byte 0x00 "CH1AR,Channel 1 Activate Register" bitfld.byte 0x00 0. " CHANNEL_ACTIVATE ,Enable this channel for operation" "Disabled,Enabled" group.long 0x04++0x0B line.long 0x00 "CH1MSAR,Channel 1 Memory Start Address Register" line.long 0x04 "CH1MEAR,Channel 1 Memory End Address Register" line.long 0x08 "CH1DA,Channel 1 Device Address" if (((per.l(ad:0x40002480+0x10))&0x80001)==0x00001) group.long 0x10++0x03 line.long 0x00 "CH1CR,Channel 1 Control Register" bitfld.long 0x00 25. " TRANSFER_ABORT ,Abort the current transfer on DMA channel" "Not aborted,Aborted" newline bitfld.long 0x00 20.--22. " TRANSFER_SIZE ,The transfer size in bytes of each data packet transfer" "1 byte,2 bytes,4 bytes,?..." bitfld.long 0x00 19. " DISABLE_HARDWARE_FLOW_CONTROL ,Disable hardware flow register" "Yes,No" newline bitfld.long 0x00 18. " LOCK_CHANNEL ,Lock the arbitration of the channel arbiter" ",Lock" bitfld.long 0x00 17. " INCREMENT_DEVICE_ADDRESS ,Increment device address" "Not incremented,Incremented" newline bitfld.long 0x00 16. " INCREMENT_MEMORY_ADDRESS ,Increment memory address" "Not incremented,Incremented" hexmask.long.byte 0x00 9.--15. 1. " HARDWARE_FLOW_CONTROL_DEVICE ,Connected channel as HFC master" newline bitfld.long 0x00 8. " TRANSFER_DIRECTION ,Determines the direction of the DMA transfer" "MEMORY_START_ADDRESS->DEVICE_ADDRESS,DEVICE_ADDRESS->MEMORY_START_ADDRESS" rbitfld.long 0x00 5. " BUSY ,Busy indicator for DMA channel" "Not busy,Busy" newline rbitfld.long 0x00 2. " DONE ,Channel control register is done" "Not done,Done" rbitfld.long 0x00 1. " REQUEST ,Transfer request from the master device" "Not requested,Requested" newline bitfld.long 0x00 0. " RUN ,Control run field" "Disabled,Enabled" elif (((per.l(ad:0x40002480+0x10))&0x80000)==0x00) group.long 0x10++0x03 line.long 0x00 "CH1CR,Channel 1 Control Register" bitfld.long 0x00 25. " TRANSFER_ABORT ,Abort the current transfer on DMA channel" "Not aborted,Aborted" newline bitfld.long 0x00 20.--22. " TRANSFER_SIZE ,The transfer size in bytes of each data packet transfer" "1 byte,2 bytes,4 bytes,?..." bitfld.long 0x00 19. " DISABLE_HARDWARE_FLOW_CONTROL ,Disable hardware flow register" "Yes,No" newline bitfld.long 0x00 18. " LOCK_CHANNEL ,Lock the arbitration of the channel arbiter" ",Lock" bitfld.long 0x00 17. " INCREMENT_DEVICE_ADDRESS ,Increment device address" "Not incremented,Incremented" newline bitfld.long 0x00 16. " INCREMENT_MEMORY_ADDRESS ,Increment memory address" "Not incremented,Incremented" hexmask.long.byte 0x00 9.--15. 1. " HARDWARE_FLOW_CONTROL_DEVICE ,Connected channel as HFC master" newline bitfld.long 0x00 8. " TRANSFER_DIRECTION ,Determines the direction of the DMA transfer" "MEMORY_START_ADDRESS->DEVICE_ADDRESS,DEVICE_ADDRESS->MEMORY_START_ADDRESS" rbitfld.long 0x00 5. " BUSY ,Busy indicator for DMA channel" "Not busy,Busy" newline rbitfld.long 0x00 1. " REQUEST ,Transfer request from the master device" "Not requested,Requested" newline bitfld.long 0x00 0. " RUN ,Control run field" "Disabled,Enabled" else group.long 0x10++0x03 line.long 0x00 "CH1CR,Channel 1 Control Register" bitfld.long 0x00 25. " TRANSFER_ABORT ,Abort the current transfer on DMA channel" "Not aborted,Aborted" bitfld.long 0x00 24. " TRANSFER_GO ,Start a transfer under the firmware flow control" "No effect,Started" newline bitfld.long 0x00 20.--22. " TRANSFER_SIZE ,The transfer size in bytes of each data packet transfer" "1 byte,2 bytes,4 bytes,?..." bitfld.long 0x00 19. " DISABLE_HARDWARE_FLOW_CONTROL ,Disable hardware flow register" "Yes,No" newline bitfld.long 0x00 18. " LOCK_CHANNEL ,Lock the arbitration of the channel arbiter" ",Lock" bitfld.long 0x00 17. " INCREMENT_DEVICE_ADDRESS ,Increment device address" "Not incremented,Incremented" newline bitfld.long 0x00 16. " INCREMENT_MEMORY_ADDRESS ,Increment memory address" "Not incremented,Incremented" hexmask.long.byte 0x00 9.--15. 1. " HARDWARE_FLOW_CONTROL_DEVICE ,Connected channel as HFC master" newline bitfld.long 0x00 8. " TRANSFER_DIRECTION ,Determines the direction of the DMA transfer" "MEMORY_START_ADDRESS->DEVICE_ADDRESS,DEVICE_ADDRESS->MEMORY_START_ADDRESS" rbitfld.long 0x00 5. " BUSY ,Busy indicator for DMA channel" "Not busy,Busy" newline bitfld.long 0x00 1. " REQUEST ,Transfer request from the master device" "Not requested,Requested" endif group.byte 0x14++0x00 line.byte 0x00 "CH1ISR,Channel 1 Interrupt Status Register" eventfld.byte 0x00 2. " STATUS_DONE ,Complete a transfer successfully" "Not done,Done" eventfld.byte 0x00 1. " STATUS_FLOW_CONTROL ,Encounter a hardware flow control request" "No HFC event,HFC" newline eventfld.byte 0x00 0. " STATUS_BUS_ERROR ,Detect over the internal 32-bit bus" "No error,Error" group.byte 0x18++0x00 line.byte 0x00 "CH1IER,Channel 1 Interrupt Enable Register" bitfld.byte 0x00 2. " STATUS_ENABLE_DONE ,Interrupt enable for STATUS_DONE" "Disabled,Enabled" bitfld.byte 0x00 1. " STATUS_ENABLE_FLOW_CONTROL_ERROR ,Interrupt enable for STATUS_FLOW_CONTROL" "Disabled,Enabled" newline bitfld.byte 0x00 0. " STATUS_ENABLE_BUS_ERROR ,Interrupt enable for STATUS_BUS_ERROR" "Disabled,Enabled" rgroup.long 0x1C++0x03 line.long 0x00 "TEST,TEST" group.long 0x20++0x07 line.long 0x00 "CH1FER,Channel 1 Fill Enable Register" bitfld.long 0x00 0. " FILL_MODE_ENABLE ,Calculation of CRC-32 enable" "Disabled,Enabled" line.long 0x04 "CH1FDR,Channel 1 Fill Data Register" rgroup.long 0x28++0x03 line.long 0x00 "CH1FSR,Channel 1 Fill Status Register" bitfld.long 0x00 1. " FILL_RUNNING ,Fill operation status" "Completed,Started" bitfld.long 0x00 0. " FILL_DONE ,Complete fill operation" "Not done,Done" rgroup.long 0x2C++0x03 line.long 0x00 "TEST,TEST" width 0x0B tree.end tree "Channel 2" base ad:0x400024C0 width 11. group.byte 0x00++0x00 line.byte 0x00 "CH2AR,Channel 2 Activate Register" bitfld.byte 0x00 0. " CHANNEL_ACTIVATE ,Enable this channel for operation" "Disabled,Enabled" group.long 0x04++0x0B line.long 0x00 "CH2MSAR,Channel 2 Memory Start Address Register" line.long 0x04 "CH2MEAR,Channel 2 Memory End Address Register" line.long 0x08 "CH2DA,Channel 2 Device Address" if (((per.l(ad:0x400024C0+0x10))&0x80001)==0x00001) group.long 0x10++0x03 line.long 0x00 "CH2CR,Channel 2 Control Register" bitfld.long 0x00 25. " TRANSFER_ABORT ,Abort the current transfer on DMA channel" "Not aborted,Aborted" newline bitfld.long 0x00 20.--22. " TRANSFER_SIZE ,The transfer size in bytes of each data packet transfer" "1 byte,2 bytes,4 bytes,?..." bitfld.long 0x00 19. " DISABLE_HARDWARE_FLOW_CONTROL ,Disable hardware flow register" "Yes,No" newline bitfld.long 0x00 18. " LOCK_CHANNEL ,Lock the arbitration of the channel arbiter" ",Lock" bitfld.long 0x00 17. " INCREMENT_DEVICE_ADDRESS ,Increment device address" "Not incremented,Incremented" newline bitfld.long 0x00 16. " INCREMENT_MEMORY_ADDRESS ,Increment memory address" "Not incremented,Incremented" hexmask.long.byte 0x00 9.--15. 1. " HARDWARE_FLOW_CONTROL_DEVICE ,Connected channel as HFC master" newline bitfld.long 0x00 8. " TRANSFER_DIRECTION ,Determines the direction of the DMA transfer" "MEMORY_START_ADDRESS->DEVICE_ADDRESS,DEVICE_ADDRESS->MEMORY_START_ADDRESS" rbitfld.long 0x00 5. " BUSY ,Busy indicator for DMA channel" "Not busy,Busy" newline rbitfld.long 0x00 2. " DONE ,Channel control register is done" "Not done,Done" rbitfld.long 0x00 1. " REQUEST ,Transfer request from the master device" "Not requested,Requested" newline bitfld.long 0x00 0. " RUN ,Control run field" "Disabled,Enabled" elif (((per.l(ad:0x400024C0+0x10))&0x80000)==0x00) group.long 0x10++0x03 line.long 0x00 "CH2CR,Channel 2 Control Register" bitfld.long 0x00 25. " TRANSFER_ABORT ,Abort the current transfer on DMA channel" "Not aborted,Aborted" newline bitfld.long 0x00 20.--22. " TRANSFER_SIZE ,The transfer size in bytes of each data packet transfer" "1 byte,2 bytes,4 bytes,?..." bitfld.long 0x00 19. " DISABLE_HARDWARE_FLOW_CONTROL ,Disable hardware flow register" "Yes,No" newline bitfld.long 0x00 18. " LOCK_CHANNEL ,Lock the arbitration of the channel arbiter" ",Lock" bitfld.long 0x00 17. " INCREMENT_DEVICE_ADDRESS ,Increment device address" "Not incremented,Incremented" newline bitfld.long 0x00 16. " INCREMENT_MEMORY_ADDRESS ,Increment memory address" "Not incremented,Incremented" hexmask.long.byte 0x00 9.--15. 1. " HARDWARE_FLOW_CONTROL_DEVICE ,Connected channel as HFC master" newline bitfld.long 0x00 8. " TRANSFER_DIRECTION ,Determines the direction of the DMA transfer" "MEMORY_START_ADDRESS->DEVICE_ADDRESS,DEVICE_ADDRESS->MEMORY_START_ADDRESS" rbitfld.long 0x00 5. " BUSY ,Busy indicator for DMA channel" "Not busy,Busy" newline rbitfld.long 0x00 1. " REQUEST ,Transfer request from the master device" "Not requested,Requested" newline bitfld.long 0x00 0. " RUN ,Control run field" "Disabled,Enabled" else group.long 0x10++0x03 line.long 0x00 "CH2CR,Channel 2 Control Register" bitfld.long 0x00 25. " TRANSFER_ABORT ,Abort the current transfer on DMA channel" "Not aborted,Aborted" bitfld.long 0x00 24. " TRANSFER_GO ,Start a transfer under the firmware flow control" "No effect,Started" newline bitfld.long 0x00 20.--22. " TRANSFER_SIZE ,The transfer size in bytes of each data packet transfer" "1 byte,2 bytes,4 bytes,?..." bitfld.long 0x00 19. " DISABLE_HARDWARE_FLOW_CONTROL ,Disable hardware flow register" "Yes,No" newline bitfld.long 0x00 18. " LOCK_CHANNEL ,Lock the arbitration of the channel arbiter" ",Lock" bitfld.long 0x00 17. " INCREMENT_DEVICE_ADDRESS ,Increment device address" "Not incremented,Incremented" newline bitfld.long 0x00 16. " INCREMENT_MEMORY_ADDRESS ,Increment memory address" "Not incremented,Incremented" hexmask.long.byte 0x00 9.--15. 1. " HARDWARE_FLOW_CONTROL_DEVICE ,Connected channel as HFC master" newline bitfld.long 0x00 8. " TRANSFER_DIRECTION ,Determines the direction of the DMA transfer" "MEMORY_START_ADDRESS->DEVICE_ADDRESS,DEVICE_ADDRESS->MEMORY_START_ADDRESS" rbitfld.long 0x00 5. " BUSY ,Busy indicator for DMA channel" "Not busy,Busy" newline bitfld.long 0x00 1. " REQUEST ,Transfer request from the master device" "Not requested,Requested" endif group.byte 0x14++0x00 line.byte 0x00 "CH2ISR,Channel 2 Interrupt Status Register" eventfld.byte 0x00 2. " STATUS_DONE ,Complete a transfer successfully" "Not done,Done" eventfld.byte 0x00 1. " STATUS_FLOW_CONTROL ,Encounter a hardware flow control request" "No HFC event,HFC" newline eventfld.byte 0x00 0. " STATUS_BUS_ERROR ,Detect over the internal 32-bit bus" "No error,Error" group.byte 0x18++0x00 line.byte 0x00 "CH2IER,Channel 2 Interrupt Enable Register" bitfld.byte 0x00 2. " STATUS_ENABLE_DONE ,Interrupt enable for STATUS_DONE" "Disabled,Enabled" bitfld.byte 0x00 1. " STATUS_ENABLE_FLOW_CONTROL_ERROR ,Interrupt enable for STATUS_FLOW_CONTROL" "Disabled,Enabled" newline bitfld.byte 0x00 0. " STATUS_ENABLE_BUS_ERROR ,Interrupt enable for STATUS_BUS_ERROR" "Disabled,Enabled" rgroup.long 0x1C++0x03 line.long 0x00 "TEST,TEST" width 0x0B tree.end tree "Channel 3" base ad:0x40002500 width 11. group.byte 0x00++0x00 line.byte 0x00 "CH3AR,Channel 3 Activate Register" bitfld.byte 0x00 0. " CHANNEL_ACTIVATE ,Enable this channel for operation" "Disabled,Enabled" group.long 0x04++0x0B line.long 0x00 "CH3MSAR,Channel 3 Memory Start Address Register" line.long 0x04 "CH3MEAR,Channel 3 Memory End Address Register" line.long 0x08 "CH3DA,Channel 3 Device Address" if (((per.l(ad:0x40002500+0x10))&0x80001)==0x00001) group.long 0x10++0x03 line.long 0x00 "CH3CR,Channel 3 Control Register" bitfld.long 0x00 25. " TRANSFER_ABORT ,Abort the current transfer on DMA channel" "Not aborted,Aborted" newline bitfld.long 0x00 20.--22. " TRANSFER_SIZE ,The transfer size in bytes of each data packet transfer" "1 byte,2 bytes,4 bytes,?..." bitfld.long 0x00 19. " DISABLE_HARDWARE_FLOW_CONTROL ,Disable hardware flow register" "Yes,No" newline bitfld.long 0x00 18. " LOCK_CHANNEL ,Lock the arbitration of the channel arbiter" ",Lock" bitfld.long 0x00 17. " INCREMENT_DEVICE_ADDRESS ,Increment device address" "Not incremented,Incremented" newline bitfld.long 0x00 16. " INCREMENT_MEMORY_ADDRESS ,Increment memory address" "Not incremented,Incremented" hexmask.long.byte 0x00 9.--15. 1. " HARDWARE_FLOW_CONTROL_DEVICE ,Connected channel as HFC master" newline bitfld.long 0x00 8. " TRANSFER_DIRECTION ,Determines the direction of the DMA transfer" "MEMORY_START_ADDRESS->DEVICE_ADDRESS,DEVICE_ADDRESS->MEMORY_START_ADDRESS" rbitfld.long 0x00 5. " BUSY ,Busy indicator for DMA channel" "Not busy,Busy" newline rbitfld.long 0x00 2. " DONE ,Channel control register is done" "Not done,Done" rbitfld.long 0x00 1. " REQUEST ,Transfer request from the master device" "Not requested,Requested" newline bitfld.long 0x00 0. " RUN ,Control run field" "Disabled,Enabled" elif (((per.l(ad:0x40002500+0x10))&0x80000)==0x00) group.long 0x10++0x03 line.long 0x00 "CH3CR,Channel 3 Control Register" bitfld.long 0x00 25. " TRANSFER_ABORT ,Abort the current transfer on DMA channel" "Not aborted,Aborted" newline bitfld.long 0x00 20.--22. " TRANSFER_SIZE ,The transfer size in bytes of each data packet transfer" "1 byte,2 bytes,4 bytes,?..." bitfld.long 0x00 19. " DISABLE_HARDWARE_FLOW_CONTROL ,Disable hardware flow register" "Yes,No" newline bitfld.long 0x00 18. " LOCK_CHANNEL ,Lock the arbitration of the channel arbiter" ",Lock" bitfld.long 0x00 17. " INCREMENT_DEVICE_ADDRESS ,Increment device address" "Not incremented,Incremented" newline bitfld.long 0x00 16. " INCREMENT_MEMORY_ADDRESS ,Increment memory address" "Not incremented,Incremented" hexmask.long.byte 0x00 9.--15. 1. " HARDWARE_FLOW_CONTROL_DEVICE ,Connected channel as HFC master" newline bitfld.long 0x00 8. " TRANSFER_DIRECTION ,Determines the direction of the DMA transfer" "MEMORY_START_ADDRESS->DEVICE_ADDRESS,DEVICE_ADDRESS->MEMORY_START_ADDRESS" rbitfld.long 0x00 5. " BUSY ,Busy indicator for DMA channel" "Not busy,Busy" newline rbitfld.long 0x00 1. " REQUEST ,Transfer request from the master device" "Not requested,Requested" newline bitfld.long 0x00 0. " RUN ,Control run field" "Disabled,Enabled" else group.long 0x10++0x03 line.long 0x00 "CH3CR,Channel 3 Control Register" bitfld.long 0x00 25. " TRANSFER_ABORT ,Abort the current transfer on DMA channel" "Not aborted,Aborted" bitfld.long 0x00 24. " TRANSFER_GO ,Start a transfer under the firmware flow control" "No effect,Started" newline bitfld.long 0x00 20.--22. " TRANSFER_SIZE ,The transfer size in bytes of each data packet transfer" "1 byte,2 bytes,4 bytes,?..." bitfld.long 0x00 19. " DISABLE_HARDWARE_FLOW_CONTROL ,Disable hardware flow register" "Yes,No" newline bitfld.long 0x00 18. " LOCK_CHANNEL ,Lock the arbitration of the channel arbiter" ",Lock" bitfld.long 0x00 17. " INCREMENT_DEVICE_ADDRESS ,Increment device address" "Not incremented,Incremented" newline bitfld.long 0x00 16. " INCREMENT_MEMORY_ADDRESS ,Increment memory address" "Not incremented,Incremented" hexmask.long.byte 0x00 9.--15. 1. " HARDWARE_FLOW_CONTROL_DEVICE ,Connected channel as HFC master" newline bitfld.long 0x00 8. " TRANSFER_DIRECTION ,Determines the direction of the DMA transfer" "MEMORY_START_ADDRESS->DEVICE_ADDRESS,DEVICE_ADDRESS->MEMORY_START_ADDRESS" rbitfld.long 0x00 5. " BUSY ,Busy indicator for DMA channel" "Not busy,Busy" newline bitfld.long 0x00 1. " REQUEST ,Transfer request from the master device" "Not requested,Requested" endif group.byte 0x14++0x00 line.byte 0x00 "CH3ISR,Channel 3 Interrupt Status Register" eventfld.byte 0x00 2. " STATUS_DONE ,Complete a transfer successfully" "Not done,Done" eventfld.byte 0x00 1. " STATUS_FLOW_CONTROL ,Encounter a hardware flow control request" "No HFC event,HFC" newline eventfld.byte 0x00 0. " STATUS_BUS_ERROR ,Detect over the internal 32-bit bus" "No error,Error" group.byte 0x18++0x00 line.byte 0x00 "CH3IER,Channel 3 Interrupt Enable Register" bitfld.byte 0x00 2. " STATUS_ENABLE_DONE ,Interrupt enable for STATUS_DONE" "Disabled,Enabled" bitfld.byte 0x00 1. " STATUS_ENABLE_FLOW_CONTROL_ERROR ,Interrupt enable for STATUS_FLOW_CONTROL" "Disabled,Enabled" newline bitfld.byte 0x00 0. " STATUS_ENABLE_BUS_ERROR ,Interrupt enable for STATUS_BUS_ERROR" "Disabled,Enabled" rgroup.long 0x1C++0x03 line.long 0x00 "TEST,TEST" width 0x0B tree.end tree "Channel 4" base ad:0x40002540 width 11. group.byte 0x00++0x00 line.byte 0x00 "CH4AR,Channel 4 Activate Register" bitfld.byte 0x00 0. " CHANNEL_ACTIVATE ,Enable this channel for operation" "Disabled,Enabled" group.long 0x04++0x0B line.long 0x00 "CH4MSAR,Channel 4 Memory Start Address Register" line.long 0x04 "CH4MEAR,Channel 4 Memory End Address Register" line.long 0x08 "CH4DA,Channel 4 Device Address" if (((per.l(ad:0x40002540+0x10))&0x80001)==0x00001) group.long 0x10++0x03 line.long 0x00 "CH4CR,Channel 4 Control Register" bitfld.long 0x00 25. " TRANSFER_ABORT ,Abort the current transfer on DMA channel" "Not aborted,Aborted" newline bitfld.long 0x00 20.--22. " TRANSFER_SIZE ,The transfer size in bytes of each data packet transfer" "1 byte,2 bytes,4 bytes,?..." bitfld.long 0x00 19. " DISABLE_HARDWARE_FLOW_CONTROL ,Disable hardware flow register" "Yes,No" newline bitfld.long 0x00 18. " LOCK_CHANNEL ,Lock the arbitration of the channel arbiter" ",Lock" bitfld.long 0x00 17. " INCREMENT_DEVICE_ADDRESS ,Increment device address" "Not incremented,Incremented" newline bitfld.long 0x00 16. " INCREMENT_MEMORY_ADDRESS ,Increment memory address" "Not incremented,Incremented" hexmask.long.byte 0x00 9.--15. 1. " HARDWARE_FLOW_CONTROL_DEVICE ,Connected channel as HFC master" newline bitfld.long 0x00 8. " TRANSFER_DIRECTION ,Determines the direction of the DMA transfer" "MEMORY_START_ADDRESS->DEVICE_ADDRESS,DEVICE_ADDRESS->MEMORY_START_ADDRESS" rbitfld.long 0x00 5. " BUSY ,Busy indicator for DMA channel" "Not busy,Busy" newline rbitfld.long 0x00 2. " DONE ,Channel control register is done" "Not done,Done" rbitfld.long 0x00 1. " REQUEST ,Transfer request from the master device" "Not requested,Requested" newline bitfld.long 0x00 0. " RUN ,Control run field" "Disabled,Enabled" elif (((per.l(ad:0x40002540+0x10))&0x80000)==0x00) group.long 0x10++0x03 line.long 0x00 "CH4CR,Channel 4 Control Register" bitfld.long 0x00 25. " TRANSFER_ABORT ,Abort the current transfer on DMA channel" "Not aborted,Aborted" newline bitfld.long 0x00 20.--22. " TRANSFER_SIZE ,The transfer size in bytes of each data packet transfer" "1 byte,2 bytes,4 bytes,?..." bitfld.long 0x00 19. " DISABLE_HARDWARE_FLOW_CONTROL ,Disable hardware flow register" "Yes,No" newline bitfld.long 0x00 18. " LOCK_CHANNEL ,Lock the arbitration of the channel arbiter" ",Lock" bitfld.long 0x00 17. " INCREMENT_DEVICE_ADDRESS ,Increment device address" "Not incremented,Incremented" newline bitfld.long 0x00 16. " INCREMENT_MEMORY_ADDRESS ,Increment memory address" "Not incremented,Incremented" hexmask.long.byte 0x00 9.--15. 1. " HARDWARE_FLOW_CONTROL_DEVICE ,Connected channel as HFC master" newline bitfld.long 0x00 8. " TRANSFER_DIRECTION ,Determines the direction of the DMA transfer" "MEMORY_START_ADDRESS->DEVICE_ADDRESS,DEVICE_ADDRESS->MEMORY_START_ADDRESS" rbitfld.long 0x00 5. " BUSY ,Busy indicator for DMA channel" "Not busy,Busy" newline rbitfld.long 0x00 1. " REQUEST ,Transfer request from the master device" "Not requested,Requested" newline bitfld.long 0x00 0. " RUN ,Control run field" "Disabled,Enabled" else group.long 0x10++0x03 line.long 0x00 "CH4CR,Channel 4 Control Register" bitfld.long 0x00 25. " TRANSFER_ABORT ,Abort the current transfer on DMA channel" "Not aborted,Aborted" bitfld.long 0x00 24. " TRANSFER_GO ,Start a transfer under the firmware flow control" "No effect,Started" newline bitfld.long 0x00 20.--22. " TRANSFER_SIZE ,The transfer size in bytes of each data packet transfer" "1 byte,2 bytes,4 bytes,?..." bitfld.long 0x00 19. " DISABLE_HARDWARE_FLOW_CONTROL ,Disable hardware flow register" "Yes,No" newline bitfld.long 0x00 18. " LOCK_CHANNEL ,Lock the arbitration of the channel arbiter" ",Lock" bitfld.long 0x00 17. " INCREMENT_DEVICE_ADDRESS ,Increment device address" "Not incremented,Incremented" newline bitfld.long 0x00 16. " INCREMENT_MEMORY_ADDRESS ,Increment memory address" "Not incremented,Incremented" hexmask.long.byte 0x00 9.--15. 1. " HARDWARE_FLOW_CONTROL_DEVICE ,Connected channel as HFC master" newline bitfld.long 0x00 8. " TRANSFER_DIRECTION ,Determines the direction of the DMA transfer" "MEMORY_START_ADDRESS->DEVICE_ADDRESS,DEVICE_ADDRESS->MEMORY_START_ADDRESS" rbitfld.long 0x00 5. " BUSY ,Busy indicator for DMA channel" "Not busy,Busy" newline bitfld.long 0x00 1. " REQUEST ,Transfer request from the master device" "Not requested,Requested" endif group.byte 0x14++0x00 line.byte 0x00 "CH4ISR,Channel 4 Interrupt Status Register" eventfld.byte 0x00 2. " STATUS_DONE ,Complete a transfer successfully" "Not done,Done" eventfld.byte 0x00 1. " STATUS_FLOW_CONTROL ,Encounter a hardware flow control request" "No HFC event,HFC" newline eventfld.byte 0x00 0. " STATUS_BUS_ERROR ,Detect over the internal 32-bit bus" "No error,Error" group.byte 0x18++0x00 line.byte 0x00 "CH4IER,Channel 4 Interrupt Enable Register" bitfld.byte 0x00 2. " STATUS_ENABLE_DONE ,Interrupt enable for STATUS_DONE" "Disabled,Enabled" bitfld.byte 0x00 1. " STATUS_ENABLE_FLOW_CONTROL_ERROR ,Interrupt enable for STATUS_FLOW_CONTROL" "Disabled,Enabled" newline bitfld.byte 0x00 0. " STATUS_ENABLE_BUS_ERROR ,Interrupt enable for STATUS_BUS_ERROR" "Disabled,Enabled" rgroup.long 0x1C++0x03 line.long 0x00 "TEST,TEST" width 0x0B tree.end tree "Channel 5" base ad:0x40002580 width 11. group.byte 0x00++0x00 line.byte 0x00 "CH5AR,Channel 5 Activate Register" bitfld.byte 0x00 0. " CHANNEL_ACTIVATE ,Enable this channel for operation" "Disabled,Enabled" group.long 0x04++0x0B line.long 0x00 "CH5MSAR,Channel 5 Memory Start Address Register" line.long 0x04 "CH5MEAR,Channel 5 Memory End Address Register" line.long 0x08 "CH5DA,Channel 5 Device Address" if (((per.l(ad:0x40002580+0x10))&0x80001)==0x00001) group.long 0x10++0x03 line.long 0x00 "CH5CR,Channel 5 Control Register" bitfld.long 0x00 25. " TRANSFER_ABORT ,Abort the current transfer on DMA channel" "Not aborted,Aborted" newline bitfld.long 0x00 20.--22. " TRANSFER_SIZE ,The transfer size in bytes of each data packet transfer" "1 byte,2 bytes,4 bytes,?..." bitfld.long 0x00 19. " DISABLE_HARDWARE_FLOW_CONTROL ,Disable hardware flow register" "Yes,No" newline bitfld.long 0x00 18. " LOCK_CHANNEL ,Lock the arbitration of the channel arbiter" ",Lock" bitfld.long 0x00 17. " INCREMENT_DEVICE_ADDRESS ,Increment device address" "Not incremented,Incremented" newline bitfld.long 0x00 16. " INCREMENT_MEMORY_ADDRESS ,Increment memory address" "Not incremented,Incremented" hexmask.long.byte 0x00 9.--15. 1. " HARDWARE_FLOW_CONTROL_DEVICE ,Connected channel as HFC master" newline bitfld.long 0x00 8. " TRANSFER_DIRECTION ,Determines the direction of the DMA transfer" "MEMORY_START_ADDRESS->DEVICE_ADDRESS,DEVICE_ADDRESS->MEMORY_START_ADDRESS" rbitfld.long 0x00 5. " BUSY ,Busy indicator for DMA channel" "Not busy,Busy" newline rbitfld.long 0x00 2. " DONE ,Channel control register is done" "Not done,Done" rbitfld.long 0x00 1. " REQUEST ,Transfer request from the master device" "Not requested,Requested" newline bitfld.long 0x00 0. " RUN ,Control run field" "Disabled,Enabled" elif (((per.l(ad:0x40002580+0x10))&0x80000)==0x00) group.long 0x10++0x03 line.long 0x00 "CH5CR,Channel 5 Control Register" bitfld.long 0x00 25. " TRANSFER_ABORT ,Abort the current transfer on DMA channel" "Not aborted,Aborted" newline bitfld.long 0x00 20.--22. " TRANSFER_SIZE ,The transfer size in bytes of each data packet transfer" "1 byte,2 bytes,4 bytes,?..." bitfld.long 0x00 19. " DISABLE_HARDWARE_FLOW_CONTROL ,Disable hardware flow register" "Yes,No" newline bitfld.long 0x00 18. " LOCK_CHANNEL ,Lock the arbitration of the channel arbiter" ",Lock" bitfld.long 0x00 17. " INCREMENT_DEVICE_ADDRESS ,Increment device address" "Not incremented,Incremented" newline bitfld.long 0x00 16. " INCREMENT_MEMORY_ADDRESS ,Increment memory address" "Not incremented,Incremented" hexmask.long.byte 0x00 9.--15. 1. " HARDWARE_FLOW_CONTROL_DEVICE ,Connected channel as HFC master" newline bitfld.long 0x00 8. " TRANSFER_DIRECTION ,Determines the direction of the DMA transfer" "MEMORY_START_ADDRESS->DEVICE_ADDRESS,DEVICE_ADDRESS->MEMORY_START_ADDRESS" rbitfld.long 0x00 5. " BUSY ,Busy indicator for DMA channel" "Not busy,Busy" newline rbitfld.long 0x00 1. " REQUEST ,Transfer request from the master device" "Not requested,Requested" newline bitfld.long 0x00 0. " RUN ,Control run field" "Disabled,Enabled" else group.long 0x10++0x03 line.long 0x00 "CH5CR,Channel 5 Control Register" bitfld.long 0x00 25. " TRANSFER_ABORT ,Abort the current transfer on DMA channel" "Not aborted,Aborted" bitfld.long 0x00 24. " TRANSFER_GO ,Start a transfer under the firmware flow control" "No effect,Started" newline bitfld.long 0x00 20.--22. " TRANSFER_SIZE ,The transfer size in bytes of each data packet transfer" "1 byte,2 bytes,4 bytes,?..." bitfld.long 0x00 19. " DISABLE_HARDWARE_FLOW_CONTROL ,Disable hardware flow register" "Yes,No" newline bitfld.long 0x00 18. " LOCK_CHANNEL ,Lock the arbitration of the channel arbiter" ",Lock" bitfld.long 0x00 17. " INCREMENT_DEVICE_ADDRESS ,Increment device address" "Not incremented,Incremented" newline bitfld.long 0x00 16. " INCREMENT_MEMORY_ADDRESS ,Increment memory address" "Not incremented,Incremented" hexmask.long.byte 0x00 9.--15. 1. " HARDWARE_FLOW_CONTROL_DEVICE ,Connected channel as HFC master" newline bitfld.long 0x00 8. " TRANSFER_DIRECTION ,Determines the direction of the DMA transfer" "MEMORY_START_ADDRESS->DEVICE_ADDRESS,DEVICE_ADDRESS->MEMORY_START_ADDRESS" rbitfld.long 0x00 5. " BUSY ,Busy indicator for DMA channel" "Not busy,Busy" newline bitfld.long 0x00 1. " REQUEST ,Transfer request from the master device" "Not requested,Requested" endif group.byte 0x14++0x00 line.byte 0x00 "CH5ISR,Channel 5 Interrupt Status Register" eventfld.byte 0x00 2. " STATUS_DONE ,Complete a transfer successfully" "Not done,Done" eventfld.byte 0x00 1. " STATUS_FLOW_CONTROL ,Encounter a hardware flow control request" "No HFC event,HFC" newline eventfld.byte 0x00 0. " STATUS_BUS_ERROR ,Detect over the internal 32-bit bus" "No error,Error" group.byte 0x18++0x00 line.byte 0x00 "CH5IER,Channel 5 Interrupt Enable Register" bitfld.byte 0x00 2. " STATUS_ENABLE_DONE ,Interrupt enable for STATUS_DONE" "Disabled,Enabled" bitfld.byte 0x00 1. " STATUS_ENABLE_FLOW_CONTROL_ERROR ,Interrupt enable for STATUS_FLOW_CONTROL" "Disabled,Enabled" newline bitfld.byte 0x00 0. " STATUS_ENABLE_BUS_ERROR ,Interrupt enable for STATUS_BUS_ERROR" "Disabled,Enabled" rgroup.long 0x1C++0x03 line.long 0x00 "TEST,TEST" width 0x0B tree.end tree "Channel 6" base ad:0x400025C0 width 11. group.byte 0x00++0x00 line.byte 0x00 "CH6AR,Channel 6 Activate Register" bitfld.byte 0x00 0. " CHANNEL_ACTIVATE ,Enable this channel for operation" "Disabled,Enabled" group.long 0x04++0x0B line.long 0x00 "CH6MSAR,Channel 6 Memory Start Address Register" line.long 0x04 "CH6MEAR,Channel 6 Memory End Address Register" line.long 0x08 "CH6DA,Channel 6 Device Address" if (((per.l(ad:0x400025C0+0x10))&0x80001)==0x00001) group.long 0x10++0x03 line.long 0x00 "CH6CR,Channel 6 Control Register" bitfld.long 0x00 25. " TRANSFER_ABORT ,Abort the current transfer on DMA channel" "Not aborted,Aborted" newline bitfld.long 0x00 20.--22. " TRANSFER_SIZE ,The transfer size in bytes of each data packet transfer" "1 byte,2 bytes,4 bytes,?..." bitfld.long 0x00 19. " DISABLE_HARDWARE_FLOW_CONTROL ,Disable hardware flow register" "Yes,No" newline bitfld.long 0x00 18. " LOCK_CHANNEL ,Lock the arbitration of the channel arbiter" ",Lock" bitfld.long 0x00 17. " INCREMENT_DEVICE_ADDRESS ,Increment device address" "Not incremented,Incremented" newline bitfld.long 0x00 16. " INCREMENT_MEMORY_ADDRESS ,Increment memory address" "Not incremented,Incremented" hexmask.long.byte 0x00 9.--15. 1. " HARDWARE_FLOW_CONTROL_DEVICE ,Connected channel as HFC master" newline bitfld.long 0x00 8. " TRANSFER_DIRECTION ,Determines the direction of the DMA transfer" "MEMORY_START_ADDRESS->DEVICE_ADDRESS,DEVICE_ADDRESS->MEMORY_START_ADDRESS" rbitfld.long 0x00 5. " BUSY ,Busy indicator for DMA channel" "Not busy,Busy" newline rbitfld.long 0x00 2. " DONE ,Channel control register is done" "Not done,Done" rbitfld.long 0x00 1. " REQUEST ,Transfer request from the master device" "Not requested,Requested" newline bitfld.long 0x00 0. " RUN ,Control run field" "Disabled,Enabled" elif (((per.l(ad:0x400025C0+0x10))&0x80000)==0x00) group.long 0x10++0x03 line.long 0x00 "CH6CR,Channel 6 Control Register" bitfld.long 0x00 25. " TRANSFER_ABORT ,Abort the current transfer on DMA channel" "Not aborted,Aborted" newline bitfld.long 0x00 20.--22. " TRANSFER_SIZE ,The transfer size in bytes of each data packet transfer" "1 byte,2 bytes,4 bytes,?..." bitfld.long 0x00 19. " DISABLE_HARDWARE_FLOW_CONTROL ,Disable hardware flow register" "Yes,No" newline bitfld.long 0x00 18. " LOCK_CHANNEL ,Lock the arbitration of the channel arbiter" ",Lock" bitfld.long 0x00 17. " INCREMENT_DEVICE_ADDRESS ,Increment device address" "Not incremented,Incremented" newline bitfld.long 0x00 16. " INCREMENT_MEMORY_ADDRESS ,Increment memory address" "Not incremented,Incremented" hexmask.long.byte 0x00 9.--15. 1. " HARDWARE_FLOW_CONTROL_DEVICE ,Connected channel as HFC master" newline bitfld.long 0x00 8. " TRANSFER_DIRECTION ,Determines the direction of the DMA transfer" "MEMORY_START_ADDRESS->DEVICE_ADDRESS,DEVICE_ADDRESS->MEMORY_START_ADDRESS" rbitfld.long 0x00 5. " BUSY ,Busy indicator for DMA channel" "Not busy,Busy" newline rbitfld.long 0x00 1. " REQUEST ,Transfer request from the master device" "Not requested,Requested" newline bitfld.long 0x00 0. " RUN ,Control run field" "Disabled,Enabled" else group.long 0x10++0x03 line.long 0x00 "CH6CR,Channel 6 Control Register" bitfld.long 0x00 25. " TRANSFER_ABORT ,Abort the current transfer on DMA channel" "Not aborted,Aborted" bitfld.long 0x00 24. " TRANSFER_GO ,Start a transfer under the firmware flow control" "No effect,Started" newline bitfld.long 0x00 20.--22. " TRANSFER_SIZE ,The transfer size in bytes of each data packet transfer" "1 byte,2 bytes,4 bytes,?..." bitfld.long 0x00 19. " DISABLE_HARDWARE_FLOW_CONTROL ,Disable hardware flow register" "Yes,No" newline bitfld.long 0x00 18. " LOCK_CHANNEL ,Lock the arbitration of the channel arbiter" ",Lock" bitfld.long 0x00 17. " INCREMENT_DEVICE_ADDRESS ,Increment device address" "Not incremented,Incremented" newline bitfld.long 0x00 16. " INCREMENT_MEMORY_ADDRESS ,Increment memory address" "Not incremented,Incremented" hexmask.long.byte 0x00 9.--15. 1. " HARDWARE_FLOW_CONTROL_DEVICE ,Connected channel as HFC master" newline bitfld.long 0x00 8. " TRANSFER_DIRECTION ,Determines the direction of the DMA transfer" "MEMORY_START_ADDRESS->DEVICE_ADDRESS,DEVICE_ADDRESS->MEMORY_START_ADDRESS" rbitfld.long 0x00 5. " BUSY ,Busy indicator for DMA channel" "Not busy,Busy" newline bitfld.long 0x00 1. " REQUEST ,Transfer request from the master device" "Not requested,Requested" endif group.byte 0x14++0x00 line.byte 0x00 "CH6ISR,Channel 6 Interrupt Status Register" eventfld.byte 0x00 2. " STATUS_DONE ,Complete a transfer successfully" "Not done,Done" eventfld.byte 0x00 1. " STATUS_FLOW_CONTROL ,Encounter a hardware flow control request" "No HFC event,HFC" newline eventfld.byte 0x00 0. " STATUS_BUS_ERROR ,Detect over the internal 32-bit bus" "No error,Error" group.byte 0x18++0x00 line.byte 0x00 "CH6IER,Channel 6 Interrupt Enable Register" bitfld.byte 0x00 2. " STATUS_ENABLE_DONE ,Interrupt enable for STATUS_DONE" "Disabled,Enabled" bitfld.byte 0x00 1. " STATUS_ENABLE_FLOW_CONTROL_ERROR ,Interrupt enable for STATUS_FLOW_CONTROL" "Disabled,Enabled" newline bitfld.byte 0x00 0. " STATUS_ENABLE_BUS_ERROR ,Interrupt enable for STATUS_BUS_ERROR" "Disabled,Enabled" rgroup.long 0x1C++0x03 line.long 0x00 "TEST,TEST" width 0x0B tree.end tree "Channel 7" base ad:0x40002600 width 11. group.byte 0x00++0x00 line.byte 0x00 "CH7AR,Channel 7 Activate Register" bitfld.byte 0x00 0. " CHANNEL_ACTIVATE ,Enable this channel for operation" "Disabled,Enabled" group.long 0x04++0x0B line.long 0x00 "CH7MSAR,Channel 7 Memory Start Address Register" line.long 0x04 "CH7MEAR,Channel 7 Memory End Address Register" line.long 0x08 "CH7DA,Channel 7 Device Address" if (((per.l(ad:0x40002600+0x10))&0x80001)==0x00001) group.long 0x10++0x03 line.long 0x00 "CH7CR,Channel 7 Control Register" bitfld.long 0x00 25. " TRANSFER_ABORT ,Abort the current transfer on DMA channel" "Not aborted,Aborted" newline bitfld.long 0x00 20.--22. " TRANSFER_SIZE ,The transfer size in bytes of each data packet transfer" "1 byte,2 bytes,4 bytes,?..." bitfld.long 0x00 19. " DISABLE_HARDWARE_FLOW_CONTROL ,Disable hardware flow register" "Yes,No" newline bitfld.long 0x00 18. " LOCK_CHANNEL ,Lock the arbitration of the channel arbiter" ",Lock" bitfld.long 0x00 17. " INCREMENT_DEVICE_ADDRESS ,Increment device address" "Not incremented,Incremented" newline bitfld.long 0x00 16. " INCREMENT_MEMORY_ADDRESS ,Increment memory address" "Not incremented,Incremented" hexmask.long.byte 0x00 9.--15. 1. " HARDWARE_FLOW_CONTROL_DEVICE ,Connected channel as HFC master" newline bitfld.long 0x00 8. " TRANSFER_DIRECTION ,Determines the direction of the DMA transfer" "MEMORY_START_ADDRESS->DEVICE_ADDRESS,DEVICE_ADDRESS->MEMORY_START_ADDRESS" rbitfld.long 0x00 5. " BUSY ,Busy indicator for DMA channel" "Not busy,Busy" newline rbitfld.long 0x00 2. " DONE ,Channel control register is done" "Not done,Done" rbitfld.long 0x00 1. " REQUEST ,Transfer request from the master device" "Not requested,Requested" newline bitfld.long 0x00 0. " RUN ,Control run field" "Disabled,Enabled" elif (((per.l(ad:0x40002600+0x10))&0x80000)==0x00) group.long 0x10++0x03 line.long 0x00 "CH7CR,Channel 7 Control Register" bitfld.long 0x00 25. " TRANSFER_ABORT ,Abort the current transfer on DMA channel" "Not aborted,Aborted" newline bitfld.long 0x00 20.--22. " TRANSFER_SIZE ,The transfer size in bytes of each data packet transfer" "1 byte,2 bytes,4 bytes,?..." bitfld.long 0x00 19. " DISABLE_HARDWARE_FLOW_CONTROL ,Disable hardware flow register" "Yes,No" newline bitfld.long 0x00 18. " LOCK_CHANNEL ,Lock the arbitration of the channel arbiter" ",Lock" bitfld.long 0x00 17. " INCREMENT_DEVICE_ADDRESS ,Increment device address" "Not incremented,Incremented" newline bitfld.long 0x00 16. " INCREMENT_MEMORY_ADDRESS ,Increment memory address" "Not incremented,Incremented" hexmask.long.byte 0x00 9.--15. 1. " HARDWARE_FLOW_CONTROL_DEVICE ,Connected channel as HFC master" newline bitfld.long 0x00 8. " TRANSFER_DIRECTION ,Determines the direction of the DMA transfer" "MEMORY_START_ADDRESS->DEVICE_ADDRESS,DEVICE_ADDRESS->MEMORY_START_ADDRESS" rbitfld.long 0x00 5. " BUSY ,Busy indicator for DMA channel" "Not busy,Busy" newline rbitfld.long 0x00 1. " REQUEST ,Transfer request from the master device" "Not requested,Requested" newline bitfld.long 0x00 0. " RUN ,Control run field" "Disabled,Enabled" else group.long 0x10++0x03 line.long 0x00 "CH7CR,Channel 7 Control Register" bitfld.long 0x00 25. " TRANSFER_ABORT ,Abort the current transfer on DMA channel" "Not aborted,Aborted" bitfld.long 0x00 24. " TRANSFER_GO ,Start a transfer under the firmware flow control" "No effect,Started" newline bitfld.long 0x00 20.--22. " TRANSFER_SIZE ,The transfer size in bytes of each data packet transfer" "1 byte,2 bytes,4 bytes,?..." bitfld.long 0x00 19. " DISABLE_HARDWARE_FLOW_CONTROL ,Disable hardware flow register" "Yes,No" newline bitfld.long 0x00 18. " LOCK_CHANNEL ,Lock the arbitration of the channel arbiter" ",Lock" bitfld.long 0x00 17. " INCREMENT_DEVICE_ADDRESS ,Increment device address" "Not incremented,Incremented" newline bitfld.long 0x00 16. " INCREMENT_MEMORY_ADDRESS ,Increment memory address" "Not incremented,Incremented" hexmask.long.byte 0x00 9.--15. 1. " HARDWARE_FLOW_CONTROL_DEVICE ,Connected channel as HFC master" newline bitfld.long 0x00 8. " TRANSFER_DIRECTION ,Determines the direction of the DMA transfer" "MEMORY_START_ADDRESS->DEVICE_ADDRESS,DEVICE_ADDRESS->MEMORY_START_ADDRESS" rbitfld.long 0x00 5. " BUSY ,Busy indicator for DMA channel" "Not busy,Busy" newline bitfld.long 0x00 1. " REQUEST ,Transfer request from the master device" "Not requested,Requested" endif group.byte 0x14++0x00 line.byte 0x00 "CH7ISR,Channel 7 Interrupt Status Register" eventfld.byte 0x00 2. " STATUS_DONE ,Complete a transfer successfully" "Not done,Done" eventfld.byte 0x00 1. " STATUS_FLOW_CONTROL ,Encounter a hardware flow control request" "No HFC event,HFC" newline eventfld.byte 0x00 0. " STATUS_BUS_ERROR ,Detect over the internal 32-bit bus" "No error,Error" group.byte 0x18++0x00 line.byte 0x00 "CH7IER,Channel 7 Interrupt Enable Register" bitfld.byte 0x00 2. " STATUS_ENABLE_DONE ,Interrupt enable for STATUS_DONE" "Disabled,Enabled" bitfld.byte 0x00 1. " STATUS_ENABLE_FLOW_CONTROL_ERROR ,Interrupt enable for STATUS_FLOW_CONTROL" "Disabled,Enabled" newline bitfld.byte 0x00 0. " STATUS_ENABLE_BUS_ERROR ,Interrupt enable for STATUS_BUS_ERROR" "Disabled,Enabled" rgroup.long 0x1C++0x03 line.long 0x00 "TEST,TEST" width 0x0B tree.end tree "Channel 8" base ad:0x40002640 width 11. group.byte 0x00++0x00 line.byte 0x00 "CH8AR,Channel 8 Activate Register" bitfld.byte 0x00 0. " CHANNEL_ACTIVATE ,Enable this channel for operation" "Disabled,Enabled" group.long 0x04++0x0B line.long 0x00 "CH8MSAR,Channel 8 Memory Start Address Register" line.long 0x04 "CH8MEAR,Channel 8 Memory End Address Register" line.long 0x08 "CH8DA,Channel 8 Device Address" if (((per.l(ad:0x40002640+0x10))&0x80001)==0x00001) group.long 0x10++0x03 line.long 0x00 "CH8CR,Channel 8 Control Register" bitfld.long 0x00 25. " TRANSFER_ABORT ,Abort the current transfer on DMA channel" "Not aborted,Aborted" newline bitfld.long 0x00 20.--22. " TRANSFER_SIZE ,The transfer size in bytes of each data packet transfer" "1 byte,2 bytes,4 bytes,?..." bitfld.long 0x00 19. " DISABLE_HARDWARE_FLOW_CONTROL ,Disable hardware flow register" "Yes,No" newline bitfld.long 0x00 18. " LOCK_CHANNEL ,Lock the arbitration of the channel arbiter" ",Lock" bitfld.long 0x00 17. " INCREMENT_DEVICE_ADDRESS ,Increment device address" "Not incremented,Incremented" newline bitfld.long 0x00 16. " INCREMENT_MEMORY_ADDRESS ,Increment memory address" "Not incremented,Incremented" hexmask.long.byte 0x00 9.--15. 1. " HARDWARE_FLOW_CONTROL_DEVICE ,Connected channel as HFC master" newline bitfld.long 0x00 8. " TRANSFER_DIRECTION ,Determines the direction of the DMA transfer" "MEMORY_START_ADDRESS->DEVICE_ADDRESS,DEVICE_ADDRESS->MEMORY_START_ADDRESS" rbitfld.long 0x00 5. " BUSY ,Busy indicator for DMA channel" "Not busy,Busy" newline rbitfld.long 0x00 2. " DONE ,Channel control register is done" "Not done,Done" rbitfld.long 0x00 1. " REQUEST ,Transfer request from the master device" "Not requested,Requested" newline bitfld.long 0x00 0. " RUN ,Control run field" "Disabled,Enabled" elif (((per.l(ad:0x40002640+0x10))&0x80000)==0x00) group.long 0x10++0x03 line.long 0x00 "CH8CR,Channel 8 Control Register" bitfld.long 0x00 25. " TRANSFER_ABORT ,Abort the current transfer on DMA channel" "Not aborted,Aborted" newline bitfld.long 0x00 20.--22. " TRANSFER_SIZE ,The transfer size in bytes of each data packet transfer" "1 byte,2 bytes,4 bytes,?..." bitfld.long 0x00 19. " DISABLE_HARDWARE_FLOW_CONTROL ,Disable hardware flow register" "Yes,No" newline bitfld.long 0x00 18. " LOCK_CHANNEL ,Lock the arbitration of the channel arbiter" ",Lock" bitfld.long 0x00 17. " INCREMENT_DEVICE_ADDRESS ,Increment device address" "Not incremented,Incremented" newline bitfld.long 0x00 16. " INCREMENT_MEMORY_ADDRESS ,Increment memory address" "Not incremented,Incremented" hexmask.long.byte 0x00 9.--15. 1. " HARDWARE_FLOW_CONTROL_DEVICE ,Connected channel as HFC master" newline bitfld.long 0x00 8. " TRANSFER_DIRECTION ,Determines the direction of the DMA transfer" "MEMORY_START_ADDRESS->DEVICE_ADDRESS,DEVICE_ADDRESS->MEMORY_START_ADDRESS" rbitfld.long 0x00 5. " BUSY ,Busy indicator for DMA channel" "Not busy,Busy" newline rbitfld.long 0x00 1. " REQUEST ,Transfer request from the master device" "Not requested,Requested" newline bitfld.long 0x00 0. " RUN ,Control run field" "Disabled,Enabled" else group.long 0x10++0x03 line.long 0x00 "CH8CR,Channel 8 Control Register" bitfld.long 0x00 25. " TRANSFER_ABORT ,Abort the current transfer on DMA channel" "Not aborted,Aborted" bitfld.long 0x00 24. " TRANSFER_GO ,Start a transfer under the firmware flow control" "No effect,Started" newline bitfld.long 0x00 20.--22. " TRANSFER_SIZE ,The transfer size in bytes of each data packet transfer" "1 byte,2 bytes,4 bytes,?..." bitfld.long 0x00 19. " DISABLE_HARDWARE_FLOW_CONTROL ,Disable hardware flow register" "Yes,No" newline bitfld.long 0x00 18. " LOCK_CHANNEL ,Lock the arbitration of the channel arbiter" ",Lock" bitfld.long 0x00 17. " INCREMENT_DEVICE_ADDRESS ,Increment device address" "Not incremented,Incremented" newline bitfld.long 0x00 16. " INCREMENT_MEMORY_ADDRESS ,Increment memory address" "Not incremented,Incremented" hexmask.long.byte 0x00 9.--15. 1. " HARDWARE_FLOW_CONTROL_DEVICE ,Connected channel as HFC master" newline bitfld.long 0x00 8. " TRANSFER_DIRECTION ,Determines the direction of the DMA transfer" "MEMORY_START_ADDRESS->DEVICE_ADDRESS,DEVICE_ADDRESS->MEMORY_START_ADDRESS" rbitfld.long 0x00 5. " BUSY ,Busy indicator for DMA channel" "Not busy,Busy" newline bitfld.long 0x00 1. " REQUEST ,Transfer request from the master device" "Not requested,Requested" endif group.byte 0x14++0x00 line.byte 0x00 "CH8ISR,Channel 8 Interrupt Status Register" eventfld.byte 0x00 2. " STATUS_DONE ,Complete a transfer successfully" "Not done,Done" eventfld.byte 0x00 1. " STATUS_FLOW_CONTROL ,Encounter a hardware flow control request" "No HFC event,HFC" newline eventfld.byte 0x00 0. " STATUS_BUS_ERROR ,Detect over the internal 32-bit bus" "No error,Error" group.byte 0x18++0x00 line.byte 0x00 "CH8IER,Channel 8 Interrupt Enable Register" bitfld.byte 0x00 2. " STATUS_ENABLE_DONE ,Interrupt enable for STATUS_DONE" "Disabled,Enabled" bitfld.byte 0x00 1. " STATUS_ENABLE_FLOW_CONTROL_ERROR ,Interrupt enable for STATUS_FLOW_CONTROL" "Disabled,Enabled" newline bitfld.byte 0x00 0. " STATUS_ENABLE_BUS_ERROR ,Interrupt enable for STATUS_BUS_ERROR" "Disabled,Enabled" rgroup.long 0x1C++0x03 line.long 0x00 "TEST,TEST" width 0x0B tree.end tree "Channel 9" base ad:0x40002680 width 11. group.byte 0x00++0x00 line.byte 0x00 "CH9AR,Channel 9 Activate Register" bitfld.byte 0x00 0. " CHANNEL_ACTIVATE ,Enable this channel for operation" "Disabled,Enabled" group.long 0x04++0x0B line.long 0x00 "CH9MSAR,Channel 9 Memory Start Address Register" line.long 0x04 "CH9MEAR,Channel 9 Memory End Address Register" line.long 0x08 "CH9DA,Channel 9 Device Address" if (((per.l(ad:0x40002680+0x10))&0x80001)==0x00001) group.long 0x10++0x03 line.long 0x00 "CH9CR,Channel 9 Control Register" bitfld.long 0x00 25. " TRANSFER_ABORT ,Abort the current transfer on DMA channel" "Not aborted,Aborted" newline bitfld.long 0x00 20.--22. " TRANSFER_SIZE ,The transfer size in bytes of each data packet transfer" "1 byte,2 bytes,4 bytes,?..." bitfld.long 0x00 19. " DISABLE_HARDWARE_FLOW_CONTROL ,Disable hardware flow register" "Yes,No" newline bitfld.long 0x00 18. " LOCK_CHANNEL ,Lock the arbitration of the channel arbiter" ",Lock" bitfld.long 0x00 17. " INCREMENT_DEVICE_ADDRESS ,Increment device address" "Not incremented,Incremented" newline bitfld.long 0x00 16. " INCREMENT_MEMORY_ADDRESS ,Increment memory address" "Not incremented,Incremented" hexmask.long.byte 0x00 9.--15. 1. " HARDWARE_FLOW_CONTROL_DEVICE ,Connected channel as HFC master" newline bitfld.long 0x00 8. " TRANSFER_DIRECTION ,Determines the direction of the DMA transfer" "MEMORY_START_ADDRESS->DEVICE_ADDRESS,DEVICE_ADDRESS->MEMORY_START_ADDRESS" rbitfld.long 0x00 5. " BUSY ,Busy indicator for DMA channel" "Not busy,Busy" newline rbitfld.long 0x00 2. " DONE ,Channel control register is done" "Not done,Done" rbitfld.long 0x00 1. " REQUEST ,Transfer request from the master device" "Not requested,Requested" newline bitfld.long 0x00 0. " RUN ,Control run field" "Disabled,Enabled" elif (((per.l(ad:0x40002680+0x10))&0x80000)==0x00) group.long 0x10++0x03 line.long 0x00 "CH9CR,Channel 9 Control Register" bitfld.long 0x00 25. " TRANSFER_ABORT ,Abort the current transfer on DMA channel" "Not aborted,Aborted" newline bitfld.long 0x00 20.--22. " TRANSFER_SIZE ,The transfer size in bytes of each data packet transfer" "1 byte,2 bytes,4 bytes,?..." bitfld.long 0x00 19. " DISABLE_HARDWARE_FLOW_CONTROL ,Disable hardware flow register" "Yes,No" newline bitfld.long 0x00 18. " LOCK_CHANNEL ,Lock the arbitration of the channel arbiter" ",Lock" bitfld.long 0x00 17. " INCREMENT_DEVICE_ADDRESS ,Increment device address" "Not incremented,Incremented" newline bitfld.long 0x00 16. " INCREMENT_MEMORY_ADDRESS ,Increment memory address" "Not incremented,Incremented" hexmask.long.byte 0x00 9.--15. 1. " HARDWARE_FLOW_CONTROL_DEVICE ,Connected channel as HFC master" newline bitfld.long 0x00 8. " TRANSFER_DIRECTION ,Determines the direction of the DMA transfer" "MEMORY_START_ADDRESS->DEVICE_ADDRESS,DEVICE_ADDRESS->MEMORY_START_ADDRESS" rbitfld.long 0x00 5. " BUSY ,Busy indicator for DMA channel" "Not busy,Busy" newline rbitfld.long 0x00 1. " REQUEST ,Transfer request from the master device" "Not requested,Requested" newline bitfld.long 0x00 0. " RUN ,Control run field" "Disabled,Enabled" else group.long 0x10++0x03 line.long 0x00 "CH9CR,Channel 9 Control Register" bitfld.long 0x00 25. " TRANSFER_ABORT ,Abort the current transfer on DMA channel" "Not aborted,Aborted" bitfld.long 0x00 24. " TRANSFER_GO ,Start a transfer under the firmware flow control" "No effect,Started" newline bitfld.long 0x00 20.--22. " TRANSFER_SIZE ,The transfer size in bytes of each data packet transfer" "1 byte,2 bytes,4 bytes,?..." bitfld.long 0x00 19. " DISABLE_HARDWARE_FLOW_CONTROL ,Disable hardware flow register" "Yes,No" newline bitfld.long 0x00 18. " LOCK_CHANNEL ,Lock the arbitration of the channel arbiter" ",Lock" bitfld.long 0x00 17. " INCREMENT_DEVICE_ADDRESS ,Increment device address" "Not incremented,Incremented" newline bitfld.long 0x00 16. " INCREMENT_MEMORY_ADDRESS ,Increment memory address" "Not incremented,Incremented" hexmask.long.byte 0x00 9.--15. 1. " HARDWARE_FLOW_CONTROL_DEVICE ,Connected channel as HFC master" newline bitfld.long 0x00 8. " TRANSFER_DIRECTION ,Determines the direction of the DMA transfer" "MEMORY_START_ADDRESS->DEVICE_ADDRESS,DEVICE_ADDRESS->MEMORY_START_ADDRESS" rbitfld.long 0x00 5. " BUSY ,Busy indicator for DMA channel" "Not busy,Busy" newline bitfld.long 0x00 1. " REQUEST ,Transfer request from the master device" "Not requested,Requested" endif group.byte 0x14++0x00 line.byte 0x00 "CH9ISR,Channel 9 Interrupt Status Register" eventfld.byte 0x00 2. " STATUS_DONE ,Complete a transfer successfully" "Not done,Done" eventfld.byte 0x00 1. " STATUS_FLOW_CONTROL ,Encounter a hardware flow control request" "No HFC event,HFC" newline eventfld.byte 0x00 0. " STATUS_BUS_ERROR ,Detect over the internal 32-bit bus" "No error,Error" group.byte 0x18++0x00 line.byte 0x00 "CH9IER,Channel 9 Interrupt Enable Register" bitfld.byte 0x00 2. " STATUS_ENABLE_DONE ,Interrupt enable for STATUS_DONE" "Disabled,Enabled" bitfld.byte 0x00 1. " STATUS_ENABLE_FLOW_CONTROL_ERROR ,Interrupt enable for STATUS_FLOW_CONTROL" "Disabled,Enabled" newline bitfld.byte 0x00 0. " STATUS_ENABLE_BUS_ERROR ,Interrupt enable for STATUS_BUS_ERROR" "Disabled,Enabled" rgroup.long 0x1C++0x03 line.long 0x00 "TEST,TEST" width 0x0B tree.end tree "Channel 10" base ad:0x400026C0 width 11. group.byte 0x00++0x00 line.byte 0x00 "CH10AR,Channel 10 Activate Register" bitfld.byte 0x00 0. " CHANNEL_ACTIVATE ,Enable this channel for operation" "Disabled,Enabled" group.long 0x04++0x0B line.long 0x00 "CH10MSAR,Channel 10 Memory Start Address Register" line.long 0x04 "CH10MEAR,Channel 10 Memory End Address Register" line.long 0x08 "CH10DA,Channel 10 Device Address" if (((per.l(ad:0x400026C0+0x10))&0x80001)==0x00001) group.long 0x10++0x03 line.long 0x00 "CH10CR,Channel 10 Control Register" bitfld.long 0x00 25. " TRANSFER_ABORT ,Abort the current transfer on DMA channel" "Not aborted,Aborted" newline bitfld.long 0x00 20.--22. " TRANSFER_SIZE ,The transfer size in bytes of each data packet transfer" "1 byte,2 bytes,4 bytes,?..." bitfld.long 0x00 19. " DISABLE_HARDWARE_FLOW_CONTROL ,Disable hardware flow register" "Yes,No" newline bitfld.long 0x00 18. " LOCK_CHANNEL ,Lock the arbitration of the channel arbiter" ",Lock" bitfld.long 0x00 17. " INCREMENT_DEVICE_ADDRESS ,Increment device address" "Not incremented,Incremented" newline bitfld.long 0x00 16. " INCREMENT_MEMORY_ADDRESS ,Increment memory address" "Not incremented,Incremented" hexmask.long.byte 0x00 9.--15. 1. " HARDWARE_FLOW_CONTROL_DEVICE ,Connected channel as HFC master" newline bitfld.long 0x00 8. " TRANSFER_DIRECTION ,Determines the direction of the DMA transfer" "MEMORY_START_ADDRESS->DEVICE_ADDRESS,DEVICE_ADDRESS->MEMORY_START_ADDRESS" rbitfld.long 0x00 5. " BUSY ,Busy indicator for DMA channel" "Not busy,Busy" newline rbitfld.long 0x00 2. " DONE ,Channel control register is done" "Not done,Done" rbitfld.long 0x00 1. " REQUEST ,Transfer request from the master device" "Not requested,Requested" newline bitfld.long 0x00 0. " RUN ,Control run field" "Disabled,Enabled" elif (((per.l(ad:0x400026C0+0x10))&0x80000)==0x00) group.long 0x10++0x03 line.long 0x00 "CH10CR,Channel 10 Control Register" bitfld.long 0x00 25. " TRANSFER_ABORT ,Abort the current transfer on DMA channel" "Not aborted,Aborted" newline bitfld.long 0x00 20.--22. " TRANSFER_SIZE ,The transfer size in bytes of each data packet transfer" "1 byte,2 bytes,4 bytes,?..." bitfld.long 0x00 19. " DISABLE_HARDWARE_FLOW_CONTROL ,Disable hardware flow register" "Yes,No" newline bitfld.long 0x00 18. " LOCK_CHANNEL ,Lock the arbitration of the channel arbiter" ",Lock" bitfld.long 0x00 17. " INCREMENT_DEVICE_ADDRESS ,Increment device address" "Not incremented,Incremented" newline bitfld.long 0x00 16. " INCREMENT_MEMORY_ADDRESS ,Increment memory address" "Not incremented,Incremented" hexmask.long.byte 0x00 9.--15. 1. " HARDWARE_FLOW_CONTROL_DEVICE ,Connected channel as HFC master" newline bitfld.long 0x00 8. " TRANSFER_DIRECTION ,Determines the direction of the DMA transfer" "MEMORY_START_ADDRESS->DEVICE_ADDRESS,DEVICE_ADDRESS->MEMORY_START_ADDRESS" rbitfld.long 0x00 5. " BUSY ,Busy indicator for DMA channel" "Not busy,Busy" newline rbitfld.long 0x00 1. " REQUEST ,Transfer request from the master device" "Not requested,Requested" newline bitfld.long 0x00 0. " RUN ,Control run field" "Disabled,Enabled" else group.long 0x10++0x03 line.long 0x00 "CH10CR,Channel 10 Control Register" bitfld.long 0x00 25. " TRANSFER_ABORT ,Abort the current transfer on DMA channel" "Not aborted,Aborted" bitfld.long 0x00 24. " TRANSFER_GO ,Start a transfer under the firmware flow control" "No effect,Started" newline bitfld.long 0x00 20.--22. " TRANSFER_SIZE ,The transfer size in bytes of each data packet transfer" "1 byte,2 bytes,4 bytes,?..." bitfld.long 0x00 19. " DISABLE_HARDWARE_FLOW_CONTROL ,Disable hardware flow register" "Yes,No" newline bitfld.long 0x00 18. " LOCK_CHANNEL ,Lock the arbitration of the channel arbiter" ",Lock" bitfld.long 0x00 17. " INCREMENT_DEVICE_ADDRESS ,Increment device address" "Not incremented,Incremented" newline bitfld.long 0x00 16. " INCREMENT_MEMORY_ADDRESS ,Increment memory address" "Not incremented,Incremented" hexmask.long.byte 0x00 9.--15. 1. " HARDWARE_FLOW_CONTROL_DEVICE ,Connected channel as HFC master" newline bitfld.long 0x00 8. " TRANSFER_DIRECTION ,Determines the direction of the DMA transfer" "MEMORY_START_ADDRESS->DEVICE_ADDRESS,DEVICE_ADDRESS->MEMORY_START_ADDRESS" rbitfld.long 0x00 5. " BUSY ,Busy indicator for DMA channel" "Not busy,Busy" newline bitfld.long 0x00 1. " REQUEST ,Transfer request from the master device" "Not requested,Requested" endif group.byte 0x14++0x00 line.byte 0x00 "CH10ISR,Channel 10 Interrupt Status Register" eventfld.byte 0x00 2. " STATUS_DONE ,Complete a transfer successfully" "Not done,Done" eventfld.byte 0x00 1. " STATUS_FLOW_CONTROL ,Encounter a hardware flow control request" "No HFC event,HFC" newline eventfld.byte 0x00 0. " STATUS_BUS_ERROR ,Detect over the internal 32-bit bus" "No error,Error" group.byte 0x18++0x00 line.byte 0x00 "CH10IER,Channel 10 Interrupt Enable Register" bitfld.byte 0x00 2. " STATUS_ENABLE_DONE ,Interrupt enable for STATUS_DONE" "Disabled,Enabled" bitfld.byte 0x00 1. " STATUS_ENABLE_FLOW_CONTROL_ERROR ,Interrupt enable for STATUS_FLOW_CONTROL" "Disabled,Enabled" newline bitfld.byte 0x00 0. " STATUS_ENABLE_BUS_ERROR ,Interrupt enable for STATUS_BUS_ERROR" "Disabled,Enabled" rgroup.long 0x1C++0x03 line.long 0x00 "TEST,TEST" width 0x0B tree.end tree "Channel 11" base ad:0x40002700 width 11. group.byte 0x00++0x00 line.byte 0x00 "CH11AR,Channel 11 Activate Register" bitfld.byte 0x00 0. " CHANNEL_ACTIVATE ,Enable this channel for operation" "Disabled,Enabled" group.long 0x04++0x0B line.long 0x00 "CH11MSAR,Channel 11 Memory Start Address Register" line.long 0x04 "CH11MEAR,Channel 11 Memory End Address Register" line.long 0x08 "CH11DA,Channel 11 Device Address" if (((per.l(ad:0x40002700+0x10))&0x80001)==0x00001) group.long 0x10++0x03 line.long 0x00 "CH11CR,Channel 11 Control Register" bitfld.long 0x00 25. " TRANSFER_ABORT ,Abort the current transfer on DMA channel" "Not aborted,Aborted" newline bitfld.long 0x00 20.--22. " TRANSFER_SIZE ,The transfer size in bytes of each data packet transfer" "1 byte,2 bytes,4 bytes,?..." bitfld.long 0x00 19. " DISABLE_HARDWARE_FLOW_CONTROL ,Disable hardware flow register" "Yes,No" newline bitfld.long 0x00 18. " LOCK_CHANNEL ,Lock the arbitration of the channel arbiter" ",Lock" bitfld.long 0x00 17. " INCREMENT_DEVICE_ADDRESS ,Increment device address" "Not incremented,Incremented" newline bitfld.long 0x00 16. " INCREMENT_MEMORY_ADDRESS ,Increment memory address" "Not incremented,Incremented" hexmask.long.byte 0x00 9.--15. 1. " HARDWARE_FLOW_CONTROL_DEVICE ,Connected channel as HFC master" newline bitfld.long 0x00 8. " TRANSFER_DIRECTION ,Determines the direction of the DMA transfer" "MEMORY_START_ADDRESS->DEVICE_ADDRESS,DEVICE_ADDRESS->MEMORY_START_ADDRESS" rbitfld.long 0x00 5. " BUSY ,Busy indicator for DMA channel" "Not busy,Busy" newline rbitfld.long 0x00 2. " DONE ,Channel control register is done" "Not done,Done" rbitfld.long 0x00 1. " REQUEST ,Transfer request from the master device" "Not requested,Requested" newline bitfld.long 0x00 0. " RUN ,Control run field" "Disabled,Enabled" elif (((per.l(ad:0x40002700+0x10))&0x80000)==0x00) group.long 0x10++0x03 line.long 0x00 "CH11CR,Channel 11 Control Register" bitfld.long 0x00 25. " TRANSFER_ABORT ,Abort the current transfer on DMA channel" "Not aborted,Aborted" newline bitfld.long 0x00 20.--22. " TRANSFER_SIZE ,The transfer size in bytes of each data packet transfer" "1 byte,2 bytes,4 bytes,?..." bitfld.long 0x00 19. " DISABLE_HARDWARE_FLOW_CONTROL ,Disable hardware flow register" "Yes,No" newline bitfld.long 0x00 18. " LOCK_CHANNEL ,Lock the arbitration of the channel arbiter" ",Lock" bitfld.long 0x00 17. " INCREMENT_DEVICE_ADDRESS ,Increment device address" "Not incremented,Incremented" newline bitfld.long 0x00 16. " INCREMENT_MEMORY_ADDRESS ,Increment memory address" "Not incremented,Incremented" hexmask.long.byte 0x00 9.--15. 1. " HARDWARE_FLOW_CONTROL_DEVICE ,Connected channel as HFC master" newline bitfld.long 0x00 8. " TRANSFER_DIRECTION ,Determines the direction of the DMA transfer" "MEMORY_START_ADDRESS->DEVICE_ADDRESS,DEVICE_ADDRESS->MEMORY_START_ADDRESS" rbitfld.long 0x00 5. " BUSY ,Busy indicator for DMA channel" "Not busy,Busy" newline rbitfld.long 0x00 1. " REQUEST ,Transfer request from the master device" "Not requested,Requested" newline bitfld.long 0x00 0. " RUN ,Control run field" "Disabled,Enabled" else group.long 0x10++0x03 line.long 0x00 "CH11CR,Channel 11 Control Register" bitfld.long 0x00 25. " TRANSFER_ABORT ,Abort the current transfer on DMA channel" "Not aborted,Aborted" bitfld.long 0x00 24. " TRANSFER_GO ,Start a transfer under the firmware flow control" "No effect,Started" newline bitfld.long 0x00 20.--22. " TRANSFER_SIZE ,The transfer size in bytes of each data packet transfer" "1 byte,2 bytes,4 bytes,?..." bitfld.long 0x00 19. " DISABLE_HARDWARE_FLOW_CONTROL ,Disable hardware flow register" "Yes,No" newline bitfld.long 0x00 18. " LOCK_CHANNEL ,Lock the arbitration of the channel arbiter" ",Lock" bitfld.long 0x00 17. " INCREMENT_DEVICE_ADDRESS ,Increment device address" "Not incremented,Incremented" newline bitfld.long 0x00 16. " INCREMENT_MEMORY_ADDRESS ,Increment memory address" "Not incremented,Incremented" hexmask.long.byte 0x00 9.--15. 1. " HARDWARE_FLOW_CONTROL_DEVICE ,Connected channel as HFC master" newline bitfld.long 0x00 8. " TRANSFER_DIRECTION ,Determines the direction of the DMA transfer" "MEMORY_START_ADDRESS->DEVICE_ADDRESS,DEVICE_ADDRESS->MEMORY_START_ADDRESS" rbitfld.long 0x00 5. " BUSY ,Busy indicator for DMA channel" "Not busy,Busy" newline bitfld.long 0x00 1. " REQUEST ,Transfer request from the master device" "Not requested,Requested" endif group.byte 0x14++0x00 line.byte 0x00 "CH11ISR,Channel 11 Interrupt Status Register" eventfld.byte 0x00 2. " STATUS_DONE ,Complete a transfer successfully" "Not done,Done" eventfld.byte 0x00 1. " STATUS_FLOW_CONTROL ,Encounter a hardware flow control request" "No HFC event,HFC" newline eventfld.byte 0x00 0. " STATUS_BUS_ERROR ,Detect over the internal 32-bit bus" "No error,Error" group.byte 0x18++0x00 line.byte 0x00 "CH11IER,Channel 11 Interrupt Enable Register" bitfld.byte 0x00 2. " STATUS_ENABLE_DONE ,Interrupt enable for STATUS_DONE" "Disabled,Enabled" bitfld.byte 0x00 1. " STATUS_ENABLE_FLOW_CONTROL_ERROR ,Interrupt enable for STATUS_FLOW_CONTROL" "Disabled,Enabled" newline bitfld.byte 0x00 0. " STATUS_ENABLE_BUS_ERROR ,Interrupt enable for STATUS_BUS_ERROR" "Disabled,Enabled" rgroup.long 0x1C++0x03 line.long 0x00 "TEST,TEST" width 0x0B tree.end tree "Channel 12" base ad:0x40002740 width 11. group.byte 0x00++0x00 line.byte 0x00 "CH12AR,Channel 12 Activate Register" bitfld.byte 0x00 0. " CHANNEL_ACTIVATE ,Enable this channel for operation" "Disabled,Enabled" group.long 0x04++0x0B line.long 0x00 "CH12MSAR,Channel 12 Memory Start Address Register" line.long 0x04 "CH12MEAR,Channel 12 Memory End Address Register" line.long 0x08 "CH12DA,Channel 12 Device Address" if (((per.l(ad:0x40002740+0x10))&0x80001)==0x00001) group.long 0x10++0x03 line.long 0x00 "CH12CR,Channel 12 Control Register" bitfld.long 0x00 25. " TRANSFER_ABORT ,Abort the current transfer on DMA channel" "Not aborted,Aborted" newline bitfld.long 0x00 20.--22. " TRANSFER_SIZE ,The transfer size in bytes of each data packet transfer" "1 byte,2 bytes,4 bytes,?..." bitfld.long 0x00 19. " DISABLE_HARDWARE_FLOW_CONTROL ,Disable hardware flow register" "Yes,No" newline bitfld.long 0x00 18. " LOCK_CHANNEL ,Lock the arbitration of the channel arbiter" ",Lock" bitfld.long 0x00 17. " INCREMENT_DEVICE_ADDRESS ,Increment device address" "Not incremented,Incremented" newline bitfld.long 0x00 16. " INCREMENT_MEMORY_ADDRESS ,Increment memory address" "Not incremented,Incremented" hexmask.long.byte 0x00 9.--15. 1. " HARDWARE_FLOW_CONTROL_DEVICE ,Connected channel as HFC master" newline bitfld.long 0x00 8. " TRANSFER_DIRECTION ,Determines the direction of the DMA transfer" "MEMORY_START_ADDRESS->DEVICE_ADDRESS,DEVICE_ADDRESS->MEMORY_START_ADDRESS" rbitfld.long 0x00 5. " BUSY ,Busy indicator for DMA channel" "Not busy,Busy" newline rbitfld.long 0x00 2. " DONE ,Channel control register is done" "Not done,Done" rbitfld.long 0x00 1. " REQUEST ,Transfer request from the master device" "Not requested,Requested" newline bitfld.long 0x00 0. " RUN ,Control run field" "Disabled,Enabled" elif (((per.l(ad:0x40002740+0x10))&0x80000)==0x00) group.long 0x10++0x03 line.long 0x00 "CH12CR,Channel 12 Control Register" bitfld.long 0x00 25. " TRANSFER_ABORT ,Abort the current transfer on DMA channel" "Not aborted,Aborted" newline bitfld.long 0x00 20.--22. " TRANSFER_SIZE ,The transfer size in bytes of each data packet transfer" "1 byte,2 bytes,4 bytes,?..." bitfld.long 0x00 19. " DISABLE_HARDWARE_FLOW_CONTROL ,Disable hardware flow register" "Yes,No" newline bitfld.long 0x00 18. " LOCK_CHANNEL ,Lock the arbitration of the channel arbiter" ",Lock" bitfld.long 0x00 17. " INCREMENT_DEVICE_ADDRESS ,Increment device address" "Not incremented,Incremented" newline bitfld.long 0x00 16. " INCREMENT_MEMORY_ADDRESS ,Increment memory address" "Not incremented,Incremented" hexmask.long.byte 0x00 9.--15. 1. " HARDWARE_FLOW_CONTROL_DEVICE ,Connected channel as HFC master" newline bitfld.long 0x00 8. " TRANSFER_DIRECTION ,Determines the direction of the DMA transfer" "MEMORY_START_ADDRESS->DEVICE_ADDRESS,DEVICE_ADDRESS->MEMORY_START_ADDRESS" rbitfld.long 0x00 5. " BUSY ,Busy indicator for DMA channel" "Not busy,Busy" newline rbitfld.long 0x00 1. " REQUEST ,Transfer request from the master device" "Not requested,Requested" newline bitfld.long 0x00 0. " RUN ,Control run field" "Disabled,Enabled" else group.long 0x10++0x03 line.long 0x00 "CH12CR,Channel 12 Control Register" bitfld.long 0x00 25. " TRANSFER_ABORT ,Abort the current transfer on DMA channel" "Not aborted,Aborted" bitfld.long 0x00 24. " TRANSFER_GO ,Start a transfer under the firmware flow control" "No effect,Started" newline bitfld.long 0x00 20.--22. " TRANSFER_SIZE ,The transfer size in bytes of each data packet transfer" "1 byte,2 bytes,4 bytes,?..." bitfld.long 0x00 19. " DISABLE_HARDWARE_FLOW_CONTROL ,Disable hardware flow register" "Yes,No" newline bitfld.long 0x00 18. " LOCK_CHANNEL ,Lock the arbitration of the channel arbiter" ",Lock" bitfld.long 0x00 17. " INCREMENT_DEVICE_ADDRESS ,Increment device address" "Not incremented,Incremented" newline bitfld.long 0x00 16. " INCREMENT_MEMORY_ADDRESS ,Increment memory address" "Not incremented,Incremented" hexmask.long.byte 0x00 9.--15. 1. " HARDWARE_FLOW_CONTROL_DEVICE ,Connected channel as HFC master" newline bitfld.long 0x00 8. " TRANSFER_DIRECTION ,Determines the direction of the DMA transfer" "MEMORY_START_ADDRESS->DEVICE_ADDRESS,DEVICE_ADDRESS->MEMORY_START_ADDRESS" rbitfld.long 0x00 5. " BUSY ,Busy indicator for DMA channel" "Not busy,Busy" newline bitfld.long 0x00 1. " REQUEST ,Transfer request from the master device" "Not requested,Requested" endif group.byte 0x14++0x00 line.byte 0x00 "CH12ISR,Channel 12 Interrupt Status Register" eventfld.byte 0x00 2. " STATUS_DONE ,Complete a transfer successfully" "Not done,Done" eventfld.byte 0x00 1. " STATUS_FLOW_CONTROL ,Encounter a hardware flow control request" "No HFC event,HFC" newline eventfld.byte 0x00 0. " STATUS_BUS_ERROR ,Detect over the internal 32-bit bus" "No error,Error" group.byte 0x18++0x00 line.byte 0x00 "CH12IER,Channel 12 Interrupt Enable Register" bitfld.byte 0x00 2. " STATUS_ENABLE_DONE ,Interrupt enable for STATUS_DONE" "Disabled,Enabled" bitfld.byte 0x00 1. " STATUS_ENABLE_FLOW_CONTROL_ERROR ,Interrupt enable for STATUS_FLOW_CONTROL" "Disabled,Enabled" newline bitfld.byte 0x00 0. " STATUS_ENABLE_BUS_ERROR ,Interrupt enable for STATUS_BUS_ERROR" "Disabled,Enabled" rgroup.long 0x1C++0x03 line.long 0x00 "TEST,TEST" width 0x0B tree.end tree "Channel 13" base ad:0x40002780 width 11. group.byte 0x00++0x00 line.byte 0x00 "CH13AR,Channel 13 Activate Register" bitfld.byte 0x00 0. " CHANNEL_ACTIVATE ,Enable this channel for operation" "Disabled,Enabled" group.long 0x04++0x0B line.long 0x00 "CH13MSAR,Channel 13 Memory Start Address Register" line.long 0x04 "CH13MEAR,Channel 13 Memory End Address Register" line.long 0x08 "CH13DA,Channel 13 Device Address" if (((per.l(ad:0x40002780+0x10))&0x80001)==0x00001) group.long 0x10++0x03 line.long 0x00 "CH13CR,Channel 13 Control Register" bitfld.long 0x00 25. " TRANSFER_ABORT ,Abort the current transfer on DMA channel" "Not aborted,Aborted" newline bitfld.long 0x00 20.--22. " TRANSFER_SIZE ,The transfer size in bytes of each data packet transfer" "1 byte,2 bytes,4 bytes,?..." bitfld.long 0x00 19. " DISABLE_HARDWARE_FLOW_CONTROL ,Disable hardware flow register" "Yes,No" newline bitfld.long 0x00 18. " LOCK_CHANNEL ,Lock the arbitration of the channel arbiter" ",Lock" bitfld.long 0x00 17. " INCREMENT_DEVICE_ADDRESS ,Increment device address" "Not incremented,Incremented" newline bitfld.long 0x00 16. " INCREMENT_MEMORY_ADDRESS ,Increment memory address" "Not incremented,Incremented" hexmask.long.byte 0x00 9.--15. 1. " HARDWARE_FLOW_CONTROL_DEVICE ,Connected channel as HFC master" newline bitfld.long 0x00 8. " TRANSFER_DIRECTION ,Determines the direction of the DMA transfer" "MEMORY_START_ADDRESS->DEVICE_ADDRESS,DEVICE_ADDRESS->MEMORY_START_ADDRESS" rbitfld.long 0x00 5. " BUSY ,Busy indicator for DMA channel" "Not busy,Busy" newline rbitfld.long 0x00 2. " DONE ,Channel control register is done" "Not done,Done" rbitfld.long 0x00 1. " REQUEST ,Transfer request from the master device" "Not requested,Requested" newline bitfld.long 0x00 0. " RUN ,Control run field" "Disabled,Enabled" elif (((per.l(ad:0x40002780+0x10))&0x80000)==0x00) group.long 0x10++0x03 line.long 0x00 "CH13CR,Channel 13 Control Register" bitfld.long 0x00 25. " TRANSFER_ABORT ,Abort the current transfer on DMA channel" "Not aborted,Aborted" newline bitfld.long 0x00 20.--22. " TRANSFER_SIZE ,The transfer size in bytes of each data packet transfer" "1 byte,2 bytes,4 bytes,?..." bitfld.long 0x00 19. " DISABLE_HARDWARE_FLOW_CONTROL ,Disable hardware flow register" "Yes,No" newline bitfld.long 0x00 18. " LOCK_CHANNEL ,Lock the arbitration of the channel arbiter" ",Lock" bitfld.long 0x00 17. " INCREMENT_DEVICE_ADDRESS ,Increment device address" "Not incremented,Incremented" newline bitfld.long 0x00 16. " INCREMENT_MEMORY_ADDRESS ,Increment memory address" "Not incremented,Incremented" hexmask.long.byte 0x00 9.--15. 1. " HARDWARE_FLOW_CONTROL_DEVICE ,Connected channel as HFC master" newline bitfld.long 0x00 8. " TRANSFER_DIRECTION ,Determines the direction of the DMA transfer" "MEMORY_START_ADDRESS->DEVICE_ADDRESS,DEVICE_ADDRESS->MEMORY_START_ADDRESS" rbitfld.long 0x00 5. " BUSY ,Busy indicator for DMA channel" "Not busy,Busy" newline rbitfld.long 0x00 1. " REQUEST ,Transfer request from the master device" "Not requested,Requested" newline bitfld.long 0x00 0. " RUN ,Control run field" "Disabled,Enabled" else group.long 0x10++0x03 line.long 0x00 "CH13CR,Channel 13 Control Register" bitfld.long 0x00 25. " TRANSFER_ABORT ,Abort the current transfer on DMA channel" "Not aborted,Aborted" bitfld.long 0x00 24. " TRANSFER_GO ,Start a transfer under the firmware flow control" "No effect,Started" newline bitfld.long 0x00 20.--22. " TRANSFER_SIZE ,The transfer size in bytes of each data packet transfer" "1 byte,2 bytes,4 bytes,?..." bitfld.long 0x00 19. " DISABLE_HARDWARE_FLOW_CONTROL ,Disable hardware flow register" "Yes,No" newline bitfld.long 0x00 18. " LOCK_CHANNEL ,Lock the arbitration of the channel arbiter" ",Lock" bitfld.long 0x00 17. " INCREMENT_DEVICE_ADDRESS ,Increment device address" "Not incremented,Incremented" newline bitfld.long 0x00 16. " INCREMENT_MEMORY_ADDRESS ,Increment memory address" "Not incremented,Incremented" hexmask.long.byte 0x00 9.--15. 1. " HARDWARE_FLOW_CONTROL_DEVICE ,Connected channel as HFC master" newline bitfld.long 0x00 8. " TRANSFER_DIRECTION ,Determines the direction of the DMA transfer" "MEMORY_START_ADDRESS->DEVICE_ADDRESS,DEVICE_ADDRESS->MEMORY_START_ADDRESS" rbitfld.long 0x00 5. " BUSY ,Busy indicator for DMA channel" "Not busy,Busy" newline bitfld.long 0x00 1. " REQUEST ,Transfer request from the master device" "Not requested,Requested" endif group.byte 0x14++0x00 line.byte 0x00 "CH13ISR,Channel 13 Interrupt Status Register" eventfld.byte 0x00 2. " STATUS_DONE ,Complete a transfer successfully" "Not done,Done" eventfld.byte 0x00 1. " STATUS_FLOW_CONTROL ,Encounter a hardware flow control request" "No HFC event,HFC" newline eventfld.byte 0x00 0. " STATUS_BUS_ERROR ,Detect over the internal 32-bit bus" "No error,Error" group.byte 0x18++0x00 line.byte 0x00 "CH13IER,Channel 13 Interrupt Enable Register" bitfld.byte 0x00 2. " STATUS_ENABLE_DONE ,Interrupt enable for STATUS_DONE" "Disabled,Enabled" bitfld.byte 0x00 1. " STATUS_ENABLE_FLOW_CONTROL_ERROR ,Interrupt enable for STATUS_FLOW_CONTROL" "Disabled,Enabled" newline bitfld.byte 0x00 0. " STATUS_ENABLE_BUS_ERROR ,Interrupt enable for STATUS_BUS_ERROR" "Disabled,Enabled" rgroup.long 0x1C++0x03 line.long 0x00 "TEST,TEST" width 0x0B tree.end tree.end tree "EC (Interrupt Aggregator)" base ad:0x4000E000 width 16. group.long 0x00++0x03 line.long 0x00 "GIRQ8_SET/CLR,GRIQ Register 8 Set/Clear" setclrfld.long 0x00 29. 0x04 29. 0x0C 29. " GIRQ8[29] ,Enable or disable interrupt bit 29 in GIRQ8 register" "Disabled,Enabled" setclrfld.long 0x00 29. 0x04 29. 0x0C 29. " [29] ,Enable or disable interrupt bit 29 in GIRQ8 register" "Disabled,Enabled" setclrfld.long 0x00 28. 0x04 28. 0x0C 28. " [28] ,Enable or disable interrupt bit 28 in GIRQ8 register" "Disabled,Enabled" setclrfld.long 0x00 27. 0x04 27. 0x0C 27. " [27] ,Enable or disable interrupt bit 27 in GIRQ8 register" "Disabled,Enabled" newline setclrfld.long 0x00 26. 0x04 26. 0x0C 26. " [26] ,Enable or disable interrupt bit 26 in GIRQ8 register" "Disabled,Enabled" setclrfld.long 0x00 25. 0x04 25. 0x0C 25. " [25] ,Enable or disable interrupt bit 25 in GIRQ8 register" "Disabled,Enabled" setclrfld.long 0x00 24. 0x04 24. 0x0C 24. " [24] ,Enable or disable interrupt bit 24 in GIRQ8 register" "Disabled,Enabled" setclrfld.long 0x00 23. 0x04 23. 0x0C 23. " [23] ,Enable or disable interrupt bit 23 in GIRQ8 register" "Disabled,Enabled" newline setclrfld.long 0x00 22. 0x04 22. 0x0C 22. " [22] ,Enable or disable interrupt bit 22 in GIRQ8 register" "Disabled,Enabled" setclrfld.long 0x00 21. 0x04 21. 0x0C 21. " [21] ,Enable or disable interrupt bit 21 in GIRQ8 register" "Disabled,Enabled" setclrfld.long 0x00 20. 0x04 20. 0x0C 20. " [20] ,Enable or disable interrupt bit 20 in GIRQ8 register" "Disabled,Enabled" setclrfld.long 0x00 19. 0x04 19. 0x0C 19. " [19] ,Enable or disable interrupt bit 19 in GIRQ8 register" "Disabled,Enabled" newline setclrfld.long 0x00 18. 0x04 18. 0x0C 18. " [18] ,Enable or disable interrupt bit 18 in GIRQ8 register" "Disabled,Enabled" setclrfld.long 0x00 17. 0x04 17. 0x0C 17. " [17] ,Enable or disable interrupt bit 17 in GIRQ8 register" "Disabled,Enabled" setclrfld.long 0x00 16. 0x04 16. 0x0C 16. " [16] ,Enable or disable interrupt bit 16 in GIRQ8 register" "Disabled,Enabled" setclrfld.long 0x00 15. 0x04 15. 0x0C 15. " [15] ,Enable or disable interrupt bit 15 in GIRQ8 register" "Disabled,Enabled" newline setclrfld.long 0x00 14. 0x04 14. 0x0C 14. " [14] ,Enable or disable interrupt bit 14 in GIRQ8 register" "Disabled,Enabled" setclrfld.long 0x00 13. 0x04 13. 0x0C 13. " [13] ,Enable or disable interrupt bit 13 in GIRQ8 register" "Disabled,Enabled" setclrfld.long 0x00 12. 0x04 12. 0x0C 12. " [12] ,Enable or disable interrupt bit 12 in GIRQ8 register" "Disabled,Enabled" setclrfld.long 0x00 11. 0x04 11. 0x0C 11. " [11] ,Enable or disable interrupt bit 11 in GIRQ8 register" "Disabled,Enabled" newline setclrfld.long 0x00 10. 0x04 10. 0x0C 10. " [10] ,Enable or disable interrupt bit 10 in GIRQ8 register" "Disabled,Enabled" setclrfld.long 0x00 9. 0x04 9. 0x0C 9. " [9] ,Enable or disable interrupt bit 9 in GIRQ8 register" "Disabled,Enabled" setclrfld.long 0x00 8. 0x04 8. 0x0C 8. " [8] ,Enable or disable interrupt bit 8 in GIRQ8 register" "Disabled,Enabled" setclrfld.long 0x00 7. 0x04 7. 0x0C 7. " [7] ,Enable or disable interrupt bit 7 in GIRQ8 register" "Disabled,Enabled" newline setclrfld.long 0x00 6. 0x04 6. 0x0C 6. " [6] ,Enable or disable interrupt bit 6 in GIRQ8 register" "Disabled,Enabled" setclrfld.long 0x00 5. 0x04 5. 0x0C 5. " [5] ,Enable or disable interrupt bit 5 in GIRQ8 register" "Disabled,Enabled" setclrfld.long 0x00 4. 0x04 4. 0x0C 4. " [4] ,Enable or disable interrupt bit 4 in GIRQ8 register" "Disabled,Enabled" setclrfld.long 0x00 3. 0x04 3. 0x0C 3. " [3] ,Enable or disable interrupt bit 3 in GIRQ8 register" "Disabled,Enabled" newline setclrfld.long 0x00 2. 0x04 2. 0x0C 2. " [2] ,Enable or disable interrupt bit 2 in GIRQ8 register" "Disabled,Enabled" setclrfld.long 0x00 1. 0x04 1. 0x0C 1. " [1] ,Enable or disable interrupt bit 1 in GIRQ8 register" "Disabled,Enabled" setclrfld.long 0x00 0. 0x04 0. 0x0C 0. " [0] ,Enable or disable interrupt bit 0 in GIRQ8 register" "Disabled,Enabled" rgroup.long 0x08++0x03 line.long 0x00 "GIRQ8RR,GIRQ8 Result Register 8" eventfld.long 0x00 29. " GIRQ8_RESULT[29] ,Corresponding interrupt in the GIRQ8 source register" "No effect,Disabled" eventfld.long 0x00 28. " [28] ,Corresponding interrupt in the GIRQ8 source register" "No effect,Disabled" eventfld.long 0x00 27. " [27] ,Corresponding interrupt in the GIRQ8 source register" "No effect,Disabled" eventfld.long 0x00 26. " [26] ,Corresponding interrupt in the GIRQ8 source register" "No effect,Disabled" newline eventfld.long 0x00 25. " [25] ,Corresponding interrupt in the GIRQ8 source register" "No effect,Disabled" eventfld.long 0x00 24. " [24] ,Corresponding interrupt in the GIRQ8 source register" "No effect,Disabled" eventfld.long 0x00 22. " [22] ,Corresponding interrupt in the GIRQ8 source register" "No effect,Disabled" eventfld.long 0x00 21. " [21] ,Corresponding interrupt in the GIRQ8 source register" "No effect,Disabled" newline eventfld.long 0x00 20. " [20] ,Corresponding interrupt in the GIRQ8 source register" "No effect,Disabled" eventfld.long 0x00 19. " [19] ,Corresponding interrupt in the GIRQ8 source register" "No effect,Disabled" eventfld.long 0x00 18. " [18] ,Corresponding interrupt in the GIRQ8 source register" "No effect,Disabled" eventfld.long 0x00 17. " [17] ,Corresponding interrupt in the GIRQ8 source register" "No effect,Disabled" newline eventfld.long 0x00 16. " [16] ,Corresponding interrupt in the GIRQ8 source register" "No effect,Disabled" eventfld.long 0x00 15. " [15] ,Corresponding interrupt in the GIRQ8 source register" "No effect,Disabled" eventfld.long 0x00 14. " [14] ,Corresponding interrupt in the GIRQ8 source register" "No effect,Disabled" eventfld.long 0x00 13. " [13] ,Corresponding interrupt in the GIRQ8 source register" "No effect,Disabled" newline eventfld.long 0x00 12. " [12] ,Corresponding interrupt in the GIRQ8 source register" "No effect,Disabled" eventfld.long 0x00 11. " [11] ,Corresponding interrupt in the GIRQ8 source register" "No effect,Disabled" eventfld.long 0x00 10. " [10] ,Corresponding interrupt in the GIRQ8 source register" "No effect,Disabled" eventfld.long 0x00 9. " [9] ,Corresponding interrupt in the GIRQ8 source register" "No effect,Disabled" newline eventfld.long 0x00 8. " [8] ,Corresponding interrupt in the GIRQ8 source register" "No effect,Disabled" eventfld.long 0x00 7. " [7] ,Corresponding interrupt in the GIRQ8 source register" "No effect,Disabled" eventfld.long 0x00 6. " [6] ,Corresponding interrupt in the GIRQ8 source register" "No effect,Disabled" eventfld.long 0x00 5. " [5] ,Corresponding interrupt in the GIRQ8 source register" "No effect,Disabled" newline eventfld.long 0x00 4. " [4] ,Corresponding interrupt in the GIRQ8 source register" "No effect,Disabled" eventfld.long 0x00 3. " [3] ,Corresponding interrupt in the GIRQ8 source register" "No effect,Disabled" eventfld.long 0x00 2. " [2] ,Corresponding interrupt in the GIRQ8 source register" "No effect,Disabled" eventfld.long 0x00 1. " [1] ,Corresponding interrupt in the GIRQ8 source register" "No effect,Disabled" newline eventfld.long 0x00 0. " [0] ,Corresponding interrupt in the GIRQ8 source register" "No effect,Disabled" group.long 0x14++0x03 line.long 0x00 "GIRQ9_SET/CLR,GRIQ Register 9 Set/Clear" setclrfld.long 0x00 29. 0x04 29. 0x0C 29. " GIRQ9[29] ,Enable or disable interrupt bit 29 in GIRQ9 register" "Disabled,Enabled" setclrfld.long 0x00 28. 0x04 28. 0x0C 28. " [28] ,Enable or disable interrupt bit 28 in GIRQ9 register" "Disabled,Enabled" setclrfld.long 0x00 27. 0x04 27. 0x0C 27. " [27] ,Enable or disable interrupt bit 27 in GIRQ9 register" "Disabled,Enabled" setclrfld.long 0x00 26. 0x04 26. 0x0C 26. " [26] ,Enable or disable interrupt bit 26 in GIRQ9 register" "Disabled,Enabled" newline setclrfld.long 0x00 25. 0x04 25. 0x0C 25. " [25] ,Enable or disable interrupt bit 25 in GIRQ9 register" "Disabled,Enabled" setclrfld.long 0x00 24. 0x04 24. 0x0C 24. " [24] ,Enable or disable interrupt bit 24 in GIRQ9 register" "Disabled,Enabled" setclrfld.long 0x00 23. 0x04 23. 0x0C 23. " [23] ,Enable or disable interrupt bit 23 in GIRQ9 register" "Disabled,Enabled" setclrfld.long 0x00 22. 0x04 22. 0x0C 22. " [22] ,Enable or disable interrupt bit 22 in GIRQ9 register" "Disabled,Enabled" newline setclrfld.long 0x00 21. 0x04 21. 0x0C 21. " [21] ,Enable or disable interrupt bit 21 in GIRQ9 register" "Disabled,Enabled" setclrfld.long 0x00 20. 0x04 20. 0x0C 20. " [20] ,Enable or disable interrupt bit 20 in GIRQ9 register" "Disabled,Enabled" setclrfld.long 0x00 19. 0x04 19. 0x0C 19. " [19] ,Enable or disable interrupt bit 19 in GIRQ9 register" "Disabled,Enabled" setclrfld.long 0x00 18. 0x04 18. 0x0C 18. " [18] ,Enable or disable interrupt bit 18 in GIRQ9 register" "Disabled,Enabled" newline setclrfld.long 0x00 17. 0x04 17. 0x0C 17. " [17] ,Enable or disable interrupt bit 17 in GIRQ9 register" "Disabled,Enabled" setclrfld.long 0x00 16. 0x04 16. 0x0C 16. " [16] ,Enable or disable interrupt bit 16 in GIRQ9 register" "Disabled,Enabled" setclrfld.long 0x00 15. 0x04 15. 0x0C 15. " [15] ,Enable or disable interrupt bit 15 in GIRQ9 register" "Disabled,Enabled" setclrfld.long 0x00 14. 0x04 14. 0x0C 14. " [14] ,Enable or disable interrupt bit 14 in GIRQ9 register" "Disabled,Enabled" newline setclrfld.long 0x00 13. 0x04 13. 0x0C 13. " [13] ,Enable or disable interrupt bit 13 in GIRQ9 register" "Disabled,Enabled" setclrfld.long 0x00 12. 0x04 12. 0x0C 12. " [12] ,Enable or disable interrupt bit 12 in GIRQ9 register" "Disabled,Enabled" setclrfld.long 0x00 11. 0x04 11. 0x0C 11. " [11] ,Enable or disable interrupt bit 11 in GIRQ9 register" "Disabled,Enabled" setclrfld.long 0x00 10. 0x04 10. 0x0C 10. " [10] ,Enable or disable interrupt bit 10 in GIRQ9 register" "Disabled,Enabled" newline setclrfld.long 0x00 9. 0x04 9. 0x0C 9. " [9] ,Enable or disable interrupt bit 9 in GIRQ9 register" "Disabled,Enabled" setclrfld.long 0x00 8. 0x04 8. 0x0C 8. " [8] ,Enable or disable interrupt bit 8 in GIRQ9 register" "Disabled,Enabled" setclrfld.long 0x00 7. 0x04 7. 0x0C 7. " [7] ,Enable or disable interrupt bit 7 in GIRQ9 register" "Disabled,Enabled" setclrfld.long 0x00 6. 0x04 6. 0x0C 6. " [6] ,Enable or disable interrupt bit 6 in GIRQ9 register" "Disabled,Enabled" newline setclrfld.long 0x00 5. 0x04 5. 0x0C 5. " [5] ,Enable or disable interrupt bit 5 in GIRQ9 register" "Disabled,Enabled" setclrfld.long 0x00 4. 0x04 4. 0x0C 4. " [4] ,Enable or disable interrupt bit 4 in GIRQ9 register" "Disabled,Enabled" setclrfld.long 0x00 3. 0x04 3. 0x0C 3. " [3] ,Enable or disable interrupt bit 3 in GIRQ9 register" "Disabled,Enabled" setclrfld.long 0x00 2. 0x04 2. 0x0C 2. " [2] ,Enable or disable interrupt bit 2 in GIRQ9 register" "Disabled,Enabled" newline setclrfld.long 0x00 1. 0x04 1. 0x0C 1. " [1] ,Enable or disable interrupt bit 1 in GIRQ9 register" "Disabled,Enabled" setclrfld.long 0x00 0. 0x04 0. 0x0C 0. " [0] ,Enable or disable interrupt bit 0 in GIRQ9 register" "Disabled,Enabled" rgroup.long 0x1C++0x03 line.long 0x00 "GIRQ9RR,GIRQ9 Result Register 9" eventfld.long 0x00 29. " GIRQ9_RESULT[29] ,Corresponding interrupt in the GIRQ9 source register" "No effect,Disabled" eventfld.long 0x00 28. " [28] ,Corresponding interrupt in the GIRQ9 source register" "No effect,Disabled" eventfld.long 0x00 27. " [27] ,Corresponding interrupt in the GIRQ9 source register" "No effect,Disabled" eventfld.long 0x00 26. " [26] ,Corresponding interrupt in the GIRQ9 source register" "No effect,Disabled" newline eventfld.long 0x00 25. " [25] ,Corresponding interrupt in the GIRQ9 source register" "No effect,Disabled" eventfld.long 0x00 24. " [24] ,Corresponding interrupt in the GIRQ9 source register" "No effect,Disabled" eventfld.long 0x00 23. " [23] ,Corresponding interrupt in the GIRQ9 source register" "No effect,Disabled" eventfld.long 0x00 22. " [22] ,Corresponding interrupt in the GIRQ9 source register" "No effect,Disabled" newline eventfld.long 0x00 21. " [21] ,Corresponding interrupt in the GIRQ9 source register" "No effect,Disabled" eventfld.long 0x00 20. " [20] ,Corresponding interrupt in the GIRQ9 source register" "No effect,Disabled" eventfld.long 0x00 19. " [19] ,Corresponding interrupt in the GIRQ9 source register" "No effect,Disabled" eventfld.long 0x00 18. " [18] ,Corresponding interrupt in the GIRQ9 source register" "No effect,Disabled" newline eventfld.long 0x00 17. " [17] ,Corresponding interrupt in the GIRQ9 source register" "No effect,Disabled" eventfld.long 0x00 16. " [16] ,Corresponding interrupt in the GIRQ9 source register" "No effect,Disabled" eventfld.long 0x00 13. " [13] ,Corresponding interrupt in the GIRQ9 source register" "No effect,Disabled" eventfld.long 0x00 12. " [12] ,Corresponding interrupt in the GIRQ9 source register" "No effect,Disabled" newline eventfld.long 0x00 11. " [11] ,Corresponding interrupt in the GIRQ9 source register" "No effect,Disabled" eventfld.long 0x00 10. " [10] ,Corresponding interrupt in the GIRQ9 source register" "No effect,Disabled" eventfld.long 0x00 9. " [9] ,Corresponding interrupt in the GIRQ9 source register" "No effect,Disabled" eventfld.long 0x00 8. " [8] ,Corresponding interrupt in the GIRQ9 source register" "No effect,Disabled" newline eventfld.long 0x00 7. " [7] ,Corresponding interrupt in the GIRQ9 source register" "No effect,Disabled" eventfld.long 0x00 6. " [6] ,Corresponding interrupt in the GIRQ9 source register" "No effect,Disabled" eventfld.long 0x00 5. " [5] ,Corresponding interrupt in the GIRQ9 source register" "No effect,Disabled" eventfld.long 0x00 4. " [4] ,Corresponding interrupt in the GIRQ9 source register" "No effect,Disabled" newline eventfld.long 0x00 2. " [2] ,Corresponding interrupt in the GIRQ9 source register" "No effect,Disabled" eventfld.long 0x00 1. " [1] ,Corresponding interrupt in the GIRQ9 source register" "No effect,Disabled" eventfld.long 0x00 0. " [0] ,Corresponding interrupt in the GIRQ9 source register" "No effect,Disabled" group.long 0x28++0x03 line.long 0x00 "GIRQ10_SET/CLR,GIRQ Register 10 Set/Clear" setclrfld.long 0x00 29. 0x04 29. 0x0C 29. " GIRQ10[29] ,Enable or disable interrupt bit 29 in GIRQ10 register" "Disabled,Enabled" setclrfld.long 0x00 28. 0x04 28. 0x0C 28. " [28] ,Enable or disable interrupt bit 28 in GIRQ10 register" "Disabled,Enabled" setclrfld.long 0x00 27. 0x04 27. 0x0C 27. " [27] ,Enable or disable interrupt bit 27 in GIRQ10 register" "Disabled,Enabled" setclrfld.long 0x00 26. 0x04 26. 0x0C 26. " [26] ,Enable or disable interrupt bit 26 in GIRQ10 register" "Disabled,Enabled" newline setclrfld.long 0x00 25. 0x04 25. 0x0C 25. " [25] ,Enable or disable interrupt bit 25 in GIRQ10 register" "Disabled,Enabled" setclrfld.long 0x00 24. 0x04 24. 0x0C 24. " [24] ,Enable or disable interrupt bit 24 in GIRQ10 register" "Disabled,Enabled" setclrfld.long 0x00 23. 0x04 23. 0x0C 23. " [23] ,Enable or disable interrupt bit 23 in GIRQ10 register" "Disabled,Enabled" setclrfld.long 0x00 22. 0x04 22. 0x0C 22. " [22] ,Enable or disable interrupt bit 22 in GIRQ10 register" "Disabled,Enabled" newline setclrfld.long 0x00 21. 0x04 21. 0x0C 21. " [21] ,Enable or disable interrupt bit 21 in GIRQ10 register" "Disabled,Enabled" setclrfld.long 0x00 20. 0x04 20. 0x0C 20. " [20] ,Enable or disable interrupt bit 20 in GIRQ10 register" "Disabled,Enabled" setclrfld.long 0x00 19. 0x04 19. 0x0C 19. " [19] ,Enable or disable interrupt bit 19 in GIRQ10 register" "Disabled,Enabled" setclrfld.long 0x00 18. 0x04 18. 0x0C 18. " [18] ,Enable or disable interrupt bit 18 in GIRQ10 register" "Disabled,Enabled" newline setclrfld.long 0x00 17. 0x04 17. 0x0C 17. " [17] ,Enable or disable interrupt bit 17 in GIRQ10 register" "Disabled,Enabled" setclrfld.long 0x00 16. 0x04 16. 0x0C 16. " [16] ,Enable or disable interrupt bit 16 in GIRQ10 register" "Disabled,Enabled" setclrfld.long 0x00 15. 0x04 15. 0x0C 15. " [15] ,Enable or disable interrupt bit 15 in GIRQ10 register" "Disabled,Enabled" setclrfld.long 0x00 14. 0x04 14. 0x0C 14. " [14] ,Enable or disable interrupt bit 14 in GIRQ10 register" "Disabled,Enabled" newline setclrfld.long 0x00 13. 0x04 13. 0x0C 13. " [13] ,Enable or disable interrupt bit 13 in GIRQ10 register" "Disabled,Enabled" setclrfld.long 0x00 12. 0x04 12. 0x0C 12. " [12] ,Enable or disable interrupt bit 12 in GIRQ10 register" "Disabled,Enabled" setclrfld.long 0x00 11. 0x04 11. 0x0C 11. " [11] ,Enable or disable interrupt bit 11 in GIRQ10 register" "Disabled,Enabled" setclrfld.long 0x00 10. 0x04 10. 0x0C 10. " [10] ,Enable or disable interrupt bit 10 in GIRQ10 register" "Disabled,Enabled" newline setclrfld.long 0x00 9. 0x04 9. 0x0C 9. " [9] ,Enable or disable interrupt bit 9 in GIRQ10 register" "Disabled,Enabled" setclrfld.long 0x00 8. 0x04 8. 0x0C 8. " [8] ,Enable or disable interrupt bit 8 in GIRQ10 register" "Disabled,Enabled" setclrfld.long 0x00 7. 0x04 7. 0x0C 7. " [7] ,Enable or disable interrupt bit 7 in GIRQ10 register" "Disabled,Enabled" setclrfld.long 0x00 6. 0x04 6. 0x0C 6. " [6] ,Enable or disable interrupt bit 6 in GIRQ10 register" "Disabled,Enabled" newline setclrfld.long 0x00 5. 0x04 5. 0x0C 5. " [5] ,Enable or disable interrupt bit 5 in GIRQ10 register" "Disabled,Enabled" setclrfld.long 0x00 4. 0x04 4. 0x0C 4. " [4] ,Enable or disable interrupt bit 4 in GIRQ10 register" "Disabled,Enabled" setclrfld.long 0x00 3. 0x04 3. 0x0C 3. " [3] ,Enable or disable interrupt bit 3 in GIRQ10 register" "Disabled,Enabled" setclrfld.long 0x00 2. 0x04 2. 0x0C 2. " [2] ,Enable or disable interrupt bit 2 in GIRQ10 register" "Disabled,Enabled" newline setclrfld.long 0x00 1. 0x04 1. 0x0C 1. " [1] ,Enable or disable interrupt bit 1 in GIRQ10 register" "Disabled,Enabled" setclrfld.long 0x00 0. 0x04 0. 0x0C 0. " [0] ,Enable or disable interrupt bit 0 in GIRQ10 register" "Disabled,Enabled" rgroup.long 0x30++0x03 line.long 0x00 "GIRQ10RR,GIRQ10 Result Register 10" eventfld.long 0x00 27. " GIRQ10_RESULT[27] ,Corresponding interrupt in the GIRQ10 source register" "No effect,Disabled" eventfld.long 0x00 26. " [26] ,Corresponding interrupt in the GIRQ10 source register" "No effect,Disabled" eventfld.long 0x00 25. " [25] ,Corresponding interrupt in the GIRQ10 source register" "No effect,Disabled" eventfld.long 0x00 24. " [24] ,Corresponding interrupt in the GIRQ10 source register" "No effect,Disabled" newline eventfld.long 0x00 23. " [23] ,Corresponding interrupt in the GIRQ10 source register" "No effect,Disabled" eventfld.long 0x00 22. " [22] ,Corresponding interrupt in the GIRQ10 source register" "No effect,Disabled" eventfld.long 0x00 21. " [21] ,Corresponding interrupt in the GIRQ10 source register" "No effect,Disabled" eventfld.long 0x00 20. " [20] ,Corresponding interrupt in the GIRQ10 source register" "No effect,Disabled" newline eventfld.long 0x00 19. " [19] ,Corresponding interrupt in the GIRQ10 source register" "No effect,Disabled" eventfld.long 0x00 18. " [18] ,Corresponding interrupt in the GIRQ10 source register" "No effect,Disabled" eventfld.long 0x00 17. " [17] ,Corresponding interrupt in the GIRQ10 source register" "No effect,Disabled" eventfld.long 0x00 16. " [16] ,Corresponding interrupt in the GIRQ10 source register" "No effect,Disabled" newline eventfld.long 0x00 15. " [15] ,Corresponding interrupt in the GIRQ10 source register" "No effect,Disabled" eventfld.long 0x00 14. " [14] ,Corresponding interrupt in the GIRQ10 source register" "No effect,Disabled" eventfld.long 0x00 13. " [13] ,Corresponding interrupt in the GIRQ10 source register" "No effect,Disabled" eventfld.long 0x00 12. " [12] ,Corresponding interrupt in the GIRQ10 source register" "No effect,Disabled" newline eventfld.long 0x00 11. " [11] ,Corresponding interrupt in the GIRQ10 source register" "No effect,Disabled" eventfld.long 0x00 10. " [10] ,Corresponding interrupt in the GIRQ10 source register" "No effect,Disabled" eventfld.long 0x00 9. " [9] ,Corresponding interrupt in the GIRQ10 source register" "No effect,Disabled" eventfld.long 0x00 8. " [8] ,Corresponding interrupt in the GIRQ10 source register" "No effect,Disabled" newline eventfld.long 0x00 7. " [7] ,Corresponding interrupt in the GIRQ10 source register" "No effect,Disabled" eventfld.long 0x00 6. " [6] ,Corresponding interrupt in the GIRQ10 source register" "No effect,Disabled" eventfld.long 0x00 5. " [5] ,Corresponding interrupt in the GIRQ10 source register" "No effect,Disabled" eventfld.long 0x00 4. " [4] ,Corresponding interrupt in the GIRQ10 source register" "No effect,Disabled" newline eventfld.long 0x00 3. " [3] ,Corresponding interrupt in the GIRQ10 source register" "No effect,Disabled" eventfld.long 0x00 2. " [2] ,Corresponding interrupt in the GIRQ10 source register" "No effect,Disabled" eventfld.long 0x00 1. " [1] ,Corresponding interrupt in the GIRQ10 source register" "No effect,Disabled" eventfld.long 0x00 0. " [0] ,Corresponding interrupt in the GIRQ10 source register" "No effect,Disabled" group.long 0x3C++0x03 line.long 0x00 "GIRQ11_SET/CLR,GRIQ Register 11 Set/Clear" setclrfld.long 0x00 29. 0x04 29. 0x0C 29. " GIRQ11[29] ,Enable or disable interrupt bit 29 in GIRQ11 register" "Disabled,Enabled" setclrfld.long 0x00 28. 0x04 28. 0x0C 28. " [28] ,Enable or disable interrupt bit 28 in GIRQ11 register" "Disabled,Enabled" setclrfld.long 0x00 27. 0x04 27. 0x0C 27. " [27] ,Enable or disable interrupt bit 27 in GIRQ11 register" "Disabled,Enabled" setclrfld.long 0x00 26. 0x04 26. 0x0C 26. " [26] ,Enable or disable interrupt bit 26 in GIRQ11 register" "Disabled,Enabled" newline setclrfld.long 0x00 25. 0x04 25. 0x0C 25. " [25] ,Enable or disable interrupt bit 25 in GIRQ11 register" "Disabled,Enabled" setclrfld.long 0x00 24. 0x04 24. 0x0C 24. " [24] ,Enable or disable interrupt bit 24 in GIRQ11 register" "Disabled,Enabled" setclrfld.long 0x00 23. 0x04 23. 0x0C 23. " [23] ,Enable or disable interrupt bit 23 in GIRQ11 register" "Disabled,Enabled" setclrfld.long 0x00 22. 0x04 22. 0x0C 22. " [22] ,Enable or disable interrupt bit 22 in GIRQ11 register" "Disabled,Enabled" newline setclrfld.long 0x00 21. 0x04 21. 0x0C 21. " [21] ,Enable or disable interrupt bit 21 in GIRQ11 register" "Disabled,Enabled" setclrfld.long 0x00 20. 0x04 20. 0x0C 20. " [20] ,Enable or disable interrupt bit 20 in GIRQ11 register" "Disabled,Enabled" setclrfld.long 0x00 19. 0x04 19. 0x0C 19. " [19] ,Enable or disable interrupt bit 19 in GIRQ11 register" "Disabled,Enabled" setclrfld.long 0x00 18. 0x04 18. 0x0C 18. " [18] ,Enable or disable interrupt bit 18 in GIRQ11 register" "Disabled,Enabled" newline setclrfld.long 0x00 17. 0x04 17. 0x0C 17. " [17] ,Enable or disable interrupt bit 17 in GIRQ11 register" "Disabled,Enabled" setclrfld.long 0x00 16. 0x04 16. 0x0C 16. " [16] ,Enable or disable interrupt bit 16 in GIRQ11 register" "Disabled,Enabled" setclrfld.long 0x00 15. 0x04 15. 0x0C 15. " [15] ,Enable or disable interrupt bit 15 in GIRQ11 register" "Disabled,Enabled" setclrfld.long 0x00 14. 0x04 14. 0x0C 14. " [14] ,Enable or disable interrupt bit 14 in GIRQ11 register" "Disabled,Enabled" newline setclrfld.long 0x00 13. 0x04 13. 0x0C 13. " [13] ,Enable or disable interrupt bit 13 in GIRQ11 register" "Disabled,Enabled" setclrfld.long 0x00 12. 0x04 12. 0x0C 12. " [12] ,Enable or disable interrupt bit 12 in GIRQ11 register" "Disabled,Enabled" setclrfld.long 0x00 11. 0x04 11. 0x0C 11. " [11] ,Enable or disable interrupt bit 11 in GIRQ11 register" "Disabled,Enabled" setclrfld.long 0x00 10. 0x04 10. 0x0C 10. " [10] ,Enable or disable interrupt bit 10 in GIRQ11 register" "Disabled,Enabled" newline setclrfld.long 0x00 9. 0x04 9. 0x0C 9. " [9] ,Enable or disable interrupt bit 9 in GIRQ11 register" "Disabled,Enabled" setclrfld.long 0x00 8. 0x04 8. 0x0C 8. " [8] ,Enable or disable interrupt bit 8 in GIRQ11 register" "Disabled,Enabled" setclrfld.long 0x00 7. 0x04 7. 0x0C 7. " [7] ,Enable or disable interrupt bit 7 in GIRQ11 register" "Disabled,Enabled" setclrfld.long 0x00 6. 0x04 6. 0x0C 6. " [6] ,Enable or disable interrupt bit 6 in GIRQ11 register" "Disabled,Enabled" newline setclrfld.long 0x00 5. 0x04 5. 0x0C 5. " [5] ,Enable or disable interrupt bit 5 in GIRQ11 register" "Disabled,Enabled" setclrfld.long 0x00 4. 0x04 4. 0x0C 4. " [4] ,Enable or disable interrupt bit 4 in GIRQ11 register" "Disabled,Enabled" setclrfld.long 0x00 3. 0x04 3. 0x0C 3. " [3] ,Enable or disable interrupt bit 3 in GIRQ11 register" "Disabled,Enabled" setclrfld.long 0x00 2. 0x04 2. 0x0C 2. " [2] ,Enable or disable interrupt bit 2 in GIRQ11 register" "Disabled,Enabled" newline setclrfld.long 0x00 1. 0x04 1. 0x0C 1. " [1] ,Enable or disable interrupt bit 1 in GIRQ11 register" "Disabled,Enabled" setclrfld.long 0x00 0. 0x04 0. 0x0C 0. " [0] ,Enable or disable interrupt bit 0 in GIRQ11 register" "Disabled,Enabled" rgroup.long 0x44++0x03 line.long 0x00 "GIRQ11RR,GIRQ11 Result Register 11" eventfld.long 0x00 30. " GIRQ11_RESULT[30] ,Corresponding interrupt in the GIRQ11 source register" "No effect,Disabled" eventfld.long 0x00 29. " [29] ,Corresponding interrupt in the GIRQ11 source register" "No effect,Disabled" eventfld.long 0x00 28. " [28] ,Corresponding interrupt in the GIRQ11 source register" "No effect,Disabled" eventfld.long 0x00 27. " [27] ,Corresponding interrupt in the GIRQ11 source register" "No effect,Disabled" newline eventfld.long 0x00 26. " [26] ,Corresponding interrupt in the GIRQ11 source register" "No effect,Disabled" eventfld.long 0x00 25. " [25] ,Corresponding interrupt in the GIRQ11 source register" "No effect,Disabled" eventfld.long 0x00 24. " [24] ,Corresponding interrupt in the GIRQ11 source register" "No effect,Disabled" eventfld.long 0x00 23. " [23] ,Corresponding interrupt in the GIRQ11 source register" "No effect,Disabled" newline eventfld.long 0x00 22. " [22] ,Corresponding interrupt in the GIRQ11 source register" "No effect,Disabled" eventfld.long 0x00 21. " [21] ,Corresponding interrupt in the GIRQ11 source register" "No effect,Disabled" eventfld.long 0x00 20. " [20] ,Corresponding interrupt in the GIRQ11 source register" "No effect,Disabled" eventfld.long 0x00 19. " [19] ,Corresponding interrupt in the GIRQ11 source register" "No effect,Disabled" newline eventfld.long 0x00 18. " [18] ,Corresponding interrupt in the GIRQ11 source register" "No effect,Disabled" eventfld.long 0x00 17. " [17] ,Corresponding interrupt in the GIRQ11 source register" "No effect,Disabled" eventfld.long 0x00 16. " [16] ,Corresponding interrupt in the GIRQ11 source register" "No effect,Disabled" eventfld.long 0x00 15. " [15] ,Corresponding interrupt in the GIRQ11 source register" "No effect,Disabled" newline eventfld.long 0x00 14. " [14] ,Corresponding interrupt in the GIRQ11 source register" "No effect,Disabled" eventfld.long 0x00 13. " [13] ,Corresponding interrupt in the GIRQ11 source register" "No effect,Disabled" eventfld.long 0x00 12. " [12] ,Corresponding interrupt in the GIRQ11 source register" "No effect,Disabled" eventfld.long 0x00 11. " [11] ,Corresponding interrupt in the GIRQ11 source register" "No effect,Disabled" newline eventfld.long 0x00 10. " [10] ,Corresponding interrupt in the GIRQ11 source register" "No effect,Disabled" eventfld.long 0x00 9. " [9] ,Corresponding interrupt in the GIRQ11 source register" "No effect,Disabled" eventfld.long 0x00 8. " [8] ,Corresponding interrupt in the GIRQ11 source register" "No effect,Disabled" eventfld.long 0x00 7. " [7] ,Corresponding interrupt in the GIRQ11 source register" "No effect,Disabled" newline eventfld.long 0x00 6. " [6] ,Corresponding interrupt in the GIRQ11 source register" "No effect,Disabled" eventfld.long 0x00 5. " [5] ,Corresponding interrupt in the GIRQ11 source register" "No effect,Disabled" eventfld.long 0x00 4. " [4] ,Corresponding interrupt in the GIRQ11 source register" "No effect,Disabled" eventfld.long 0x00 3. " [3] ,Corresponding interrupt in the GIRQ11 source register" "No effect,Disabled" newline eventfld.long 0x00 2. " [2] ,Corresponding interrupt in the GIRQ11 source register" "No effect,Disabled" eventfld.long 0x00 1. " [1] ,Corresponding interrupt in the GIRQ11 source register" "No effect,Disabled" eventfld.long 0x00 0. " [0] ,Corresponding interrupt in the GIRQ11 source register" "No effect,Disabled" group.long 0x50++0x03 line.long 0x00 "GIRQ12_SET/CLR,GRIQ Register 12 Set/Clear" setclrfld.long 0x00 29. 0x04 29. 0x0C 29. " GIRQ12[29] ,Enable or disable interrupt bit 29 in GIRQ12 register" "Disabled,Enabled" setclrfld.long 0x00 28. 0x04 28. 0x0C 28. " [28] ,Enable or disable interrupt bit 28 in GIRQ12 register" "Disabled,Enabled" setclrfld.long 0x00 27. 0x04 27. 0x0C 27. " [27] ,Enable or disable interrupt bit 27 in GIRQ12 register" "Disabled,Enabled" setclrfld.long 0x00 26. 0x04 26. 0x0C 26. " [26] ,Enable or disable interrupt bit 26 in GIRQ12 register" "Disabled,Enabled" newline setclrfld.long 0x00 25. 0x04 25. 0x0C 25. " [25] ,Enable or disable interrupt bit 25 in GIRQ12 register" "Disabled,Enabled" setclrfld.long 0x00 24. 0x04 24. 0x0C 24. " [24] ,Enable or disable interrupt bit 24 in GIRQ12 register" "Disabled,Enabled" setclrfld.long 0x00 23. 0x04 23. 0x0C 23. " [23] ,Enable or disable interrupt bit 23 in GIRQ12 register" "Disabled,Enabled" setclrfld.long 0x00 22. 0x04 22. 0x0C 22. " [22] ,Enable or disable interrupt bit 22 in GIRQ12 register" "Disabled,Enabled" newline setclrfld.long 0x00 21. 0x04 21. 0x0C 21. " [21] ,Enable or disable interrupt bit 21 in GIRQ12 register" "Disabled,Enabled" setclrfld.long 0x00 20. 0x04 20. 0x0C 20. " [20] ,Enable or disable interrupt bit 20 in GIRQ12 register" "Disabled,Enabled" setclrfld.long 0x00 19. 0x04 19. 0x0C 19. " [19] ,Enable or disable interrupt bit 19 in GIRQ12 register" "Disabled,Enabled" setclrfld.long 0x00 18. 0x04 18. 0x0C 18. " [18] ,Enable or disable interrupt bit 18 in GIRQ12 register" "Disabled,Enabled" newline setclrfld.long 0x00 17. 0x04 17. 0x0C 17. " [17] ,Enable or disable interrupt bit 17 in GIRQ12 register" "Disabled,Enabled" setclrfld.long 0x00 16. 0x04 16. 0x0C 16. " [16] ,Enable or disable interrupt bit 16 in GIRQ12 register" "Disabled,Enabled" setclrfld.long 0x00 15. 0x04 15. 0x0C 15. " [15] ,Enable or disable interrupt bit 15 in GIRQ12 register" "Disabled,Enabled" setclrfld.long 0x00 14. 0x04 14. 0x0C 14. " [14] ,Enable or disable interrupt bit 14 in GIRQ12 register" "Disabled,Enabled" newline setclrfld.long 0x00 13. 0x04 13. 0x0C 13. " [13] ,Enable or disable interrupt bit 13 in GIRQ12 register" "Disabled,Enabled" setclrfld.long 0x00 12. 0x04 12. 0x0C 12. " [12] ,Enable or disable interrupt bit 12 in GIRQ12 register" "Disabled,Enabled" setclrfld.long 0x00 11. 0x04 11. 0x0C 11. " [11] ,Enable or disable interrupt bit 11 in GIRQ12 register" "Disabled,Enabled" setclrfld.long 0x00 10. 0x04 10. 0x0C 10. " [10] ,Enable or disable interrupt bit 10 in GIRQ12 register" "Disabled,Enabled" newline setclrfld.long 0x00 9. 0x04 9. 0x0C 9. " [9] ,Enable or disable interrupt bit 9 in GIRQ12 register" "Disabled,Enabled" setclrfld.long 0x00 8. 0x04 8. 0x0C 8. " [8] ,Enable or disable interrupt bit 8 in GIRQ12 register" "Disabled,Enabled" setclrfld.long 0x00 7. 0x04 7. 0x0C 7. " [7] ,Enable or disable interrupt bit 7 in GIRQ12 register" "Disabled,Enabled" setclrfld.long 0x00 6. 0x04 6. 0x0C 6. " [6] ,Enable or disable interrupt bit 6 in GIRQ12 register" "Disabled,Enabled" newline setclrfld.long 0x00 5. 0x04 5. 0x0C 5. " [5] ,Enable or disable interrupt bit 5 in GIRQ12 register" "Disabled,Enabled" setclrfld.long 0x00 4. 0x04 4. 0x0C 4. " [4] ,Enable or disable interrupt bit 4 in GIRQ12 register" "Disabled,Enabled" setclrfld.long 0x00 3. 0x04 3. 0x0C 3. " [3] ,Enable or disable interrupt bit 3 in GIRQ12 register" "Disabled,Enabled" setclrfld.long 0x00 2. 0x04 2. 0x0C 2. " [2] ,Enable or disable interrupt bit 2 in GIRQ12 register" "Disabled,Enabled" newline setclrfld.long 0x00 1. 0x04 1. 0x0C 1. " [1] ,Enable or disable interrupt bit 1 in GIRQ12 register" "Disabled,Enabled" setclrfld.long 0x00 0. 0x04 0. 0x0C 0. " [0] ,Enable or disable interrupt bit 0 in GIRQ12 register" "Disabled,Enabled" rgroup.long 0x58++0x03 line.long 0x00 "GIRQ12RR,GIRQ12 Result Register 12" eventfld.long 0x00 28. " GIRQ12_RESULT[28] ,Corresponding interrupt in the GIRQ12 source register" "No effect,Disabled" eventfld.long 0x00 27. " [27] ,Corresponding interrupt in the GIRQ12 source register" "No effect,Disabled" eventfld.long 0x00 25. " [25] ,Corresponding interrupt in the GIRQ12 source register" "No effect,Disabled" eventfld.long 0x00 24. " [24] ,Corresponding interrupt in the GIRQ12 source register" "No effect,Disabled" newline eventfld.long 0x00 23. " [23] ,Corresponding interrupt in the GIRQ12 source register" "No effect,Disabled" eventfld.long 0x00 22. " [22] ,Corresponding interrupt in the GIRQ12 source register" "No effect,Disabled" eventfld.long 0x00 21. " [21] ,Corresponding interrupt in the GIRQ12 source register" "No effect,Disabled" eventfld.long 0x00 20. " [20] ,Corresponding interrupt in the GIRQ12 source register" "No effect,Disabled" newline eventfld.long 0x00 19. " [19] ,Corresponding interrupt in the GIRQ12 source register" "No effect,Disabled" eventfld.long 0x00 18. " [18] ,Corresponding interrupt in the GIRQ12 source register" "No effect,Disabled" eventfld.long 0x00 17. " [17] ,Corresponding interrupt in the GIRQ12 source register" "No effect,Disabled" eventfld.long 0x00 15. " [15] ,Corresponding interrupt in the GIRQ12 source register" "No effect,Disabled" newline eventfld.long 0x00 14. " [14] ,Corresponding interrupt in the GIRQ12 source register" "No effect,Disabled" eventfld.long 0x00 13. " [13] ,Corresponding interrupt in the GIRQ12 source register" "No effect,Disabled" eventfld.long 0x00 12. " [12] ,Corresponding interrupt in the GIRQ12 source register" "No effect,Disabled" eventfld.long 0x00 11. " [11] ,Corresponding interrupt in the GIRQ12 source register" "No effect,Disabled" newline eventfld.long 0x00 10. " [10] ,Corresponding interrupt in the GIRQ12 source register" "No effect,Disabled" eventfld.long 0x00 9. " [9] ,Corresponding interrupt in the GIRQ12 source register" "No effect,Disabled" eventfld.long 0x00 8. " [8] ,Corresponding interrupt in the GIRQ12 source register" "No effect,Disabled" eventfld.long 0x00 7. " [7] ,Corresponding interrupt in the GIRQ12 source register" "No effect,Disabled" newline eventfld.long 0x00 6. " [6] ,Corresponding interrupt in the GIRQ12 source register" "No effect,Disabled" eventfld.long 0x00 5. " [5] ,Corresponding interrupt in the GIRQ12 source register" "No effect,Disabled" eventfld.long 0x00 4. " [4] ,Corresponding interrupt in the GIRQ12 source register" "No effect,Disabled" eventfld.long 0x00 3. " [3] ,Corresponding interrupt in the GIRQ12 source register" "No effect,Disabled" newline eventfld.long 0x00 2. " [2] ,Corresponding interrupt in the GIRQ12 source register" "No effect,Disabled" eventfld.long 0x00 1. " [1] ,Corresponding interrupt in the GIRQ12 source register" "No effect,Disabled" eventfld.long 0x00 0. " [0] ,Corresponding interrupt in the GIRQ12 source register" "No effect,Disabled" group.long 0x64++0x03 line.long 0x00 "GIRQ13_SET/CLR,GRIQ Register 13 Set/Clear" setclrfld.long 0x00 3. 0x04 3. 0x0C 3. " GIRQ13[3] ,Enable or disable interrupt bit 3 in GIRQ13 register" "Disabled,Enabled" setclrfld.long 0x00 2. 0x04 2. 0x0C 2. " [2] ,Enable or disable interrupt bit 2 in GIRQ13 register" "Disabled,Enabled" setclrfld.long 0x00 1. 0x04 1. 0x0C 1. " [1] ,Enable or disable interrupt bit 1 in GIRQ13 register" "Disabled,Enabled" setclrfld.long 0x00 0. 0x04 0. 0x0C 0. " [0] ,Enable or disable interrupt bit 0 in GIRQ13 register" "Disabled,Enabled" rgroup.long 0x6C++0x03 line.long 0x00 "GIRQ13RR,GIRQ13 Result Register 13" bitfld.long 0x00 3. " GIRQ13_RESULT[3] ,Corresponding interrupt in the GIRQ13 source register" "No effect,Disabled" bitfld.long 0x00 2. " [2] ,Corresponding interrupt in the GIRQ13 source register" "No effect,Disabled" bitfld.long 0x00 1. " [1] ,Corresponding interrupt in the GIRQ13 source register" "No effect,Disabled" bitfld.long 0x00 0. " [0] ,Corresponding interrupt in the GIRQ13 source register" "No effect,Disabled" group.long 0x78++0x03 line.long 0x00 "GIRQ14_SET/CLR,GRIQ Register 14 Set/Clear" setclrfld.long 0x00 13. 0x04 13. 0x0C 13. " GIRQ14[13] ,Enable or disable interrupt bit 13 in GIRQ14 register" "Disabled,Enabled" setclrfld.long 0x00 12. 0x04 12. 0x0C 12. " [12] ,Enable or disable interrupt bit 12 in GIRQ14 register" "Disabled,Enabled" setclrfld.long 0x00 11. 0x04 11. 0x0C 11. " [11] ,Enable or disable interrupt bit 11 in GIRQ14 register" "Disabled,Enabled" setclrfld.long 0x00 10. 0x04 10. 0x0C 10. " [10] ,Enable or disable interrupt bit 10 in GIRQ14 register" "Disabled,Enabled" newline setclrfld.long 0x00 9. 0x04 9. 0x0C 9. " [9] ,Enable or disable interrupt bit 9 in GIRQ14 register" "Disabled,Enabled" setclrfld.long 0x00 8. 0x04 8. 0x0C 8. " [8] ,Enable or disable interrupt bit 8 in GIRQ14 register" "Disabled,Enabled" setclrfld.long 0x00 7. 0x04 7. 0x0C 7. " [7] ,Enable or disable interrupt bit 7 in GIRQ14 register" "Disabled,Enabled" setclrfld.long 0x00 6. 0x04 6. 0x0C 6. " [6] ,Enable or disable interrupt bit 6 in GIRQ14 register" "Disabled,Enabled" newline setclrfld.long 0x00 5. 0x04 5. 0x0C 5. " [5] ,Enable or disable interrupt bit 5 in GIRQ14 register" "Disabled,Enabled" setclrfld.long 0x00 4. 0x04 4. 0x0C 4. " [4] ,Enable or disable interrupt bit 4 in GIRQ14 register" "Disabled,Enabled" setclrfld.long 0x00 3. 0x04 3. 0x0C 3. " [3] ,Enable or disable interrupt bit 3 in GIRQ14 register" "Disabled,Enabled" setclrfld.long 0x00 2. 0x04 2. 0x0C 2. " [2] ,Enable or disable interrupt bit 2 in GIRQ14 register" "Disabled,Enabled" newline setclrfld.long 0x00 1. 0x04 1. 0x0C 1. " [1] ,Enable or disable interrupt bit 1 in GIRQ14 register" "Disabled,Enabled" setclrfld.long 0x00 0. 0x04 0. 0x0C 0. " [0] ,Enable or disable interrupt bit 0 in GIRQ14 register" "Disabled,Enabled" rgroup.long 0x80++0x03 line.long 0x00 "GIRQ14RR,GIRQ14 Result Register 14" bitfld.long 0x00 13. " GIRQ14_RESULT[13] ,Corresponding interrupt in the GIRQ14 source register" "No effect,Disabled" bitfld.long 0x00 12. " [12] ,Corresponding interrupt in the GIRQ14 source register" "No effect,Disabled" bitfld.long 0x00 11. " [11] ,Corresponding interrupt in the GIRQ14 source register" "No effect,Disabled" bitfld.long 0x00 10. " [10] ,Corresponding interrupt in the GIRQ14 source register" "No effect,Disabled" newline bitfld.long 0x00 9. " [9] ,Corresponding interrupt in the GIRQ14 source register" "No effect,Disabled" bitfld.long 0x00 8. " [8] ,Corresponding interrupt in the GIRQ14 source register" "No effect,Disabled" bitfld.long 0x00 7. " [7] ,Corresponding interrupt in the GIRQ14 source register" "No effect,Disabled" bitfld.long 0x00 6. " [6] ,Corresponding interrupt in the GIRQ14 source register" "No effect,Disabled" newline bitfld.long 0x00 5. " [5] ,Corresponding interrupt in the GIRQ14 source register" "No effect,Disabled" bitfld.long 0x00 4. " [4] ,Corresponding interrupt in the GIRQ14 source register" "No effect,Disabled" bitfld.long 0x00 3. " [3] ,Corresponding interrupt in the GIRQ14 source register" "No effect,Disabled" bitfld.long 0x00 2. " [2] ,Corresponding interrupt in the GIRQ14 source register" "No effect,Disabled" newline bitfld.long 0x00 1. " [1] ,Corresponding interrupt in the GIRQ14 source register" "No effect,Disabled" bitfld.long 0x00 0. " [0] ,Corresponding interrupt in the GIRQ14 source register" "No effect,Disabled" group.long 0x8C++0x03 line.long 0x00 "GIRQ15_SET/CLR,GRIQ Register 15 Set/Clear" setclrfld.long 0x00 24. 0x04 24. 0x0C 24. " GIRQ15[24] ,Enable or disable interrupt bit 24 in GIRQ15 register" "Disabled,Enabled" setclrfld.long 0x00 23. 0x04 23. 0x0C 23. " [23] ,Enable or disable interrupt bit 23 in GIRQ15 register" "Disabled,Enabled" setclrfld.long 0x00 22. 0x04 22. 0x0C 22. " [22] ,Enable or disable interrupt bit 22 in GIRQ15 register" "Disabled,Enabled" setclrfld.long 0x00 21. 0x04 21. 0x0C 21. " [21] ,Enable or disable interrupt bit 21 in GIRQ15 register" "Disabled,Enabled" newline setclrfld.long 0x00 20. 0x04 20. 0x0C 20. " [20] ,Enable or disable interrupt bit 20 in GIRQ15 register" "Disabled,Enabled" setclrfld.long 0x00 19. 0x04 19. 0x0C 19. " [19] ,Enable or disable interrupt bit 19 in GIRQ15 register" "Disabled,Enabled" setclrfld.long 0x00 18. 0x04 18. 0x0C 18. " [18] ,Enable or disable interrupt bit 18 in GIRQ15 register" "Disabled,Enabled" setclrfld.long 0x00 17. 0x04 17. 0x0C 17. " [17] ,Enable or disable interrupt bit 17 in GIRQ15 register" "Disabled,Enabled" newline setclrfld.long 0x00 16. 0x04 16. 0x0C 16. " [16] ,Enable or disable interrupt bit 16 in GIRQ15 register" "Disabled,Enabled" setclrfld.long 0x00 15. 0x04 15. 0x0C 15. " [15] ,Enable or disable interrupt bit 15 in GIRQ15 register" "Disabled,Enabled" setclrfld.long 0x00 14. 0x04 14. 0x0C 14. " [14] ,Enable or disable interrupt bit 14 in GIRQ15 register" "Disabled,Enabled" setclrfld.long 0x00 13. 0x04 13. 0x0C 13. " [13] ,Enable or disable interrupt bit 13 in GIRQ15 register" "Disabled,Enabled" newline setclrfld.long 0x00 12. 0x04 12. 0x0C 12. " [12] ,Enable or disable interrupt bit 12 in GIRQ15 register" "Disabled,Enabled" setclrfld.long 0x00 11. 0x04 11. 0x0C 11. " [11] ,Enable or disable interrupt bit 11 in GIRQ15 register" "Disabled,Enabled" setclrfld.long 0x00 10. 0x04 10. 0x0C 10. " [10] ,Enable or disable interrupt bit 10 in GIRQ15 register" "Disabled,Enabled" setclrfld.long 0x00 9. 0x04 9. 0x0C 9. " [9] ,Enable or disable interrupt bit 9 in GIRQ15 register" "Disabled,Enabled" newline setclrfld.long 0x00 8. 0x04 8. 0x0C 8. " [8] ,Enable or disable interrupt bit 8 in GIRQ15 register" "Disabled,Enabled" setclrfld.long 0x00 7. 0x04 7. 0x0C 7. " [7] ,Enable or disable interrupt bit 7 in GIRQ15 register" "Disabled,Enabled" setclrfld.long 0x00 6. 0x04 6. 0x0C 6. " [6] ,Enable or disable interrupt bit 6 in GIRQ15 register" "Disabled,Enabled" setclrfld.long 0x00 5. 0x04 5. 0x0C 5. " [5] ,Enable or disable interrupt bit 5 in GIRQ15 register" "Disabled,Enabled" newline setclrfld.long 0x00 4. 0x04 4. 0x0C 4. " [4] ,Enable or disable interrupt bit 4 in GIRQ15 register" "Disabled,Enabled" setclrfld.long 0x00 3. 0x04 3. 0x0C 3. " [3] ,Enable or disable interrupt bit 3 in GIRQ15 register" "Disabled,Enabled" setclrfld.long 0x00 2. 0x04 2. 0x0C 2. " [2] ,Enable or disable interrupt bit 2 in GIRQ15 register" "Disabled,Enabled" setclrfld.long 0x00 1. 0x04 1. 0x0C 1. " [1] ,Enable or disable interrupt bit 1 in GIRQ15 register" "Disabled,Enabled" newline setclrfld.long 0x00 0. 0x04 0. 0x0C 0. " [0] ,Enable or disable interrupt bit 0 in GIRQ15 register" "Disabled,Enabled" rgroup.long 0x94++0x03 line.long 0x00 "GIRQ15RR,GIRQ15 Result Register 15" bitfld.long 0x00 24. " GIRQ15_RESULT[24] ,Corresponding interrupt in the GIRQ15 source register" "No effect,Disabled" bitfld.long 0x00 23. " [23] ,Corresponding interrupt in the GIRQ15 source register" "No effect,Disabled" bitfld.long 0x00 22. " [22] ,Corresponding interrupt in the GIRQ15 source register" "No effect,Disabled" bitfld.long 0x00 20. " [20] ,Corresponding interrupt in the GIRQ15 source register" "No effect,Disabled" newline bitfld.long 0x00 19. " [19] ,Corresponding interrupt in the GIRQ15 source register" "No effect,Disabled" bitfld.long 0x00 18. " [18] ,Corresponding interrupt in the GIRQ15 source register" "No effect,Disabled" bitfld.long 0x00 17. " [17] ,Corresponding interrupt in the GIRQ15 source register" "No effect,Disabled" bitfld.long 0x00 16. " [16] ,Corresponding interrupt in the GIRQ15 source register" "No effect,Disabled" newline bitfld.long 0x00 15. " [15] ,Corresponding interrupt in the GIRQ15 source register" "No effect,Disabled" bitfld.long 0x00 14. " [14] ,Corresponding interrupt in the GIRQ15 source register" "No effect,Disabled" bitfld.long 0x00 13. " [13] ,Corresponding interrupt in the GIRQ15 source register" "No effect,Disabled" bitfld.long 0x00 12. " [12] ,Corresponding interrupt in the GIRQ15 source register" "No effect,Disabled" newline bitfld.long 0x00 11. " [11] ,Corresponding interrupt in the GIRQ15 source register" "No effect,Disabled" bitfld.long 0x00 10. " [10] ,Corresponding interrupt in the GIRQ15 source register" "No effect,Disabled" bitfld.long 0x00 9. " [9] ,Corresponding interrupt in the GIRQ15 source register" "No effect,Disabled" bitfld.long 0x00 8. " [8] ,Corresponding interrupt in the GIRQ15 source register" "No effect,Disabled" newline bitfld.long 0x00 7. " [7] ,Corresponding interrupt in the GIRQ15 source register" "No effect,Disabled" bitfld.long 0x00 6. " [6] ,Corresponding interrupt in the GIRQ15 source register" "No effect,Disabled" bitfld.long 0x00 5. " [5] ,Corresponding interrupt in the GIRQ15 source register" "No effect,Disabled" bitfld.long 0x00 4. " [4] ,Corresponding interrupt in the GIRQ15 source register" "No effect,Disabled" newline bitfld.long 0x00 3. " [3] ,Corresponding interrupt in the GIRQ15 source register" "No effect,Disabled" bitfld.long 0x00 2. " [2] ,Corresponding interrupt in the GIRQ15 source register" "No effect,Disabled" bitfld.long 0x00 1. " [1] ,Corresponding interrupt in the GIRQ15 source register" "No effect,Disabled" bitfld.long 0x00 0. " [0] ,Corresponding interrupt in the GIRQ15 source register" "No effect,Disabled" group.long 0xA0++0x03 line.long 0x00 "GIRQ16_SET/CLR,GRIQ Register 16 Set/Clear" setclrfld.long 0x00 4. 0x04 4. 0x0C 4. " GIRQ16[4] ,Enable or disable interrupt bit 4 in GIRQ16 register" "Disabled,Enabled" setclrfld.long 0x00 3. 0x04 3. 0x0C 3. " [3] ,Enable or disable interrupt bit 3 in GIRQ16 register" "Disabled,Enabled" setclrfld.long 0x00 2. 0x04 2. 0x0C 2. " [2] ,Enable or disable interrupt bit 2 in GIRQ16 register" "Disabled,Enabled" setclrfld.long 0x00 1. 0x04 1. 0x0C 1. " [1] ,Enable or disable interrupt bit 1 in GIRQ16 register" "Disabled,Enabled" newline setclrfld.long 0x00 0. 0x04 0. 0x0C 0. " [0] ,Enable or disable interrupt bit 0 in GIRQ16 register" "Disabled,Enabled" rgroup.long 0xA8++0x03 line.long 0x00 "GIRQ16RR,GIRQ16 Result Register 16" bitfld.long 0x00 4. " GIRQ16_RESULT[4] ,Corresponding interrupt in the GIRQ16 source register" "No effect,Disabled" bitfld.long 0x00 3. " [3] ,Corresponding interrupt in the GIRQ16 source register" "No effect,Disabled" bitfld.long 0x00 2. " [2] ,Corresponding interrupt in the GIRQ16 source register" "No effect,Disabled" bitfld.long 0x00 1. " [1] ,Corresponding interrupt in the GIRQ16 source register" "No effect,Disabled" newline bitfld.long 0x00 0. " [0] ,Corresponding interrupt in the GIRQ16 source register" "No effect,Disabled" group.long 0xB4++0x03 line.long 0x00 "GIRQ17_SET/CLR,GRIQ Register 17 Set/Clear" setclrfld.long 0x00 28. 0x04 28. 0x0C 28. " GIRQ17[28] ,Enable or disable interrupt bit 28 in GIRQ17 register" "Disabled,Enabled" setclrfld.long 0x00 27. 0x04 27. 0x0C 27. " [27] ,Enable or disable interrupt bit 27 in GIRQ17 register" "Disabled,Enabled" setclrfld.long 0x00 26. 0x04 26. 0x0C 26. " [26] ,Enable or disable interrupt bit 26 in GIRQ17 register" "Disabled,Enabled" setclrfld.long 0x00 25. 0x04 25. 0x0C 25. " [25] ,Enable or disable interrupt bit 25 in GIRQ17 register" "Disabled,Enabled" newline setclrfld.long 0x00 24. 0x04 24. 0x0C 24. " [24] ,Enable or disable interrupt bit 24 in GIRQ17 register" "Disabled,Enabled" setclrfld.long 0x00 23. 0x04 23. 0x0C 23. " [23] ,Enable or disable interrupt bit 23 in GIRQ17 register" "Disabled,Enabled" setclrfld.long 0x00 22. 0x04 22. 0x0C 22. " [22] ,Enable or disable interrupt bit 22 in GIRQ17 register" "Disabled,Enabled" setclrfld.long 0x00 21. 0x04 21. 0x0C 21. " [21] ,Enable or disable interrupt bit 21 in GIRQ17 register" "Disabled,Enabled" newline setclrfld.long 0x00 20. 0x04 20. 0x0C 20. " [20] ,Enable or disable interrupt bit 20 in GIRQ17 register" "Disabled,Enabled" setclrfld.long 0x00 19. 0x04 19. 0x0C 19. " [19] ,Enable or disable interrupt bit 19 in GIRQ17 register" "Disabled,Enabled" setclrfld.long 0x00 18. 0x04 18. 0x0C 18. " [18] ,Enable or disable interrupt bit 18 in GIRQ17 register" "Disabled,Enabled" setclrfld.long 0x00 17. 0x04 17. 0x0C 17. " [17] ,Enable or disable interrupt bit 17 in GIRQ17 register" "Disabled,Enabled" newline setclrfld.long 0x00 16. 0x04 16. 0x0C 16. " [16] ,Enable or disable interrupt bit 16 in GIRQ17 register" "Disabled,Enabled" setclrfld.long 0x00 15. 0x04 15. 0x0C 15. " [15] ,Enable or disable interrupt bit 15 in GIRQ17 register" "Disabled,Enabled" setclrfld.long 0x00 14. 0x04 14. 0x0C 14. " [14] ,Enable or disable interrupt bit 14 in GIRQ17 register" "Disabled,Enabled" setclrfld.long 0x00 13. 0x04 13. 0x0C 13. " [13] ,Enable or disable interrupt bit 13 in GIRQ17 register" "Disabled,Enabled" newline setclrfld.long 0x00 12. 0x04 12. 0x0C 12. " [12] ,Enable or disable interrupt bit 12 in GIRQ17 register" "Disabled,Enabled" setclrfld.long 0x00 11. 0x04 11. 0x0C 11. " [11] ,Enable or disable interrupt bit 11 in GIRQ17 register" "Disabled,Enabled" setclrfld.long 0x00 10. 0x04 10. 0x0C 10. " [10] ,Enable or disable interrupt bit 10 in GIRQ17 register" "Disabled,Enabled" setclrfld.long 0x00 9. 0x04 9. 0x0C 9. " [9] ,Enable or disable interrupt bit 9 in GIRQ17 register" "Disabled,Enabled" newline setclrfld.long 0x00 8. 0x04 8. 0x0C 8. " [8] ,Enable or disable interrupt bit 8 in GIRQ17 register" "Disabled,Enabled" setclrfld.long 0x00 7. 0x04 7. 0x0C 7. " [7] ,Enable or disable interrupt bit 7 in GIRQ17 register" "Disabled,Enabled" setclrfld.long 0x00 6. 0x04 6. 0x0C 6. " [6] ,Enable or disable interrupt bit 6 in GIRQ17 register" "Disabled,Enabled" setclrfld.long 0x00 5. 0x04 5. 0x0C 5. " [5] ,Enable or disable interrupt bit 5 in GIRQ17 register" "Disabled,Enabled" newline setclrfld.long 0x00 4. 0x04 4. 0x0C 4. " [4] ,Enable or disable interrupt bit 4 in GIRQ17 register" "Disabled,Enabled" setclrfld.long 0x00 3. 0x04 3. 0x0C 3. " [3] ,Enable or disable interrupt bit 3 in GIRQ17 register" "Disabled,Enabled" setclrfld.long 0x00 2. 0x04 2. 0x0C 2. " [2] ,Enable or disable interrupt bit 2 in GIRQ17 register" "Disabled,Enabled" setclrfld.long 0x00 1. 0x04 1. 0x0C 1. " [1] ,Enable or disable interrupt bit 1 in GIRQ17 register" "Disabled,Enabled" newline setclrfld.long 0x00 0. 0x04 0. 0x0C 0. " [0] ,Enable or disable interrupt bit 0 in GIRQ17 register" "Disabled,Enabled" rgroup.long 0xBC++0x03 line.long 0x00 "GIRQ17RR,GIRQ17 Result Register 17" bitfld.long 0x00 28. " GIRQ17_RESULT[28] ,Corresponding interrupt in the GIRQ17 source register" "No effect,Disabled" bitfld.long 0x00 27. " [27] ,Corresponding interrupt in the GIRQ17 source register" "No effect,Disabled" bitfld.long 0x00 26. " [26] ,Corresponding interrupt in the GIRQ17 source register" "No effect,Disabled" bitfld.long 0x00 25. " [25] ,Corresponding interrupt in the GIRQ17 source register" "No effect,Disabled" newline bitfld.long 0x00 16. " [16] ,Corresponding interrupt in the GIRQ17 source register" "No effect,Disabled" bitfld.long 0x00 15. " [15] ,Corresponding interrupt in the GIRQ17 source register" "No effect,Disabled" bitfld.long 0x00 14. " [14] ,Corresponding interrupt in the GIRQ17 source register" "No effect,Disabled" bitfld.long 0x00 13. " [13] ,Corresponding interrupt in the GIRQ17 source register" "No effect,Disabled" newline bitfld.long 0x00 12. " [12] ,Corresponding interrupt in the GIRQ17 source register" "No effect,Disabled" bitfld.long 0x00 11. " [11] ,Corresponding interrupt in the GIRQ17 source register" "No effect,Disabled" bitfld.long 0x00 10. " [10] ,Corresponding interrupt in the GIRQ17 source register" "No effect,Disabled" bitfld.long 0x00 9. " [9] ,Corresponding interrupt in the GIRQ17 source register" "No effect,Disabled" newline bitfld.long 0x00 8. " [8] ,Corresponding interrupt in the GIRQ17 source register" "No effect,Disabled" bitfld.long 0x00 7. " [7] ,Corresponding interrupt in the GIRQ17 source register" "No effect,Disabled" bitfld.long 0x00 6. " [6] ,Corresponding interrupt in the GIRQ17 source register" "No effect,Disabled" bitfld.long 0x00 5. " [5] ,Corresponding interrupt in the GIRQ17 source register" "No effect,Disabled" newline bitfld.long 0x00 4. " [4] ,Corresponding interrupt in the GIRQ17 source register" "No effect,Disabled" bitfld.long 0x00 3. " [3] ,Corresponding interrupt in the GIRQ17 source register" "No effect,Disabled" bitfld.long 0x00 2. " [2] ,Corresponding interrupt in the GIRQ17 source register" "No effect,Disabled" bitfld.long 0x00 1. " [1] ,Corresponding interrupt in the GIRQ17 source register" "No effect,Disabled" newline bitfld.long 0x00 0. " [0] ,Corresponding interrupt in the GIRQ17 source register" "No effect,Disabled" group.long 0xC8++0x03 line.long 0x00 "GIRQ18_SET/CLR,GRIQ Register 18 Set/Clear" setclrfld.long 0x00 28. 0x04 28. 0x0C 28. " GIRQ18[28] ,Enable or disable interrupt bit 28 in GIRQ18 register" "Disabled,Enabled" setclrfld.long 0x00 27. 0x04 27. 0x0C 27. " [27] ,Enable or disable interrupt bit 27 in GIRQ18 register" "Disabled,Enabled" setclrfld.long 0x00 26. 0x04 26. 0x0C 26. " [26] ,Enable or disable interrupt bit 26 in GIRQ18 register" "Disabled,Enabled" setclrfld.long 0x00 25. 0x04 25. 0x0C 25. " [25] ,Enable or disable interrupt bit 25 in GIRQ18 register" "Disabled,Enabled" newline setclrfld.long 0x00 24. 0x04 24. 0x0C 24. " [24] ,Enable or disable interrupt bit 24 in GIRQ18 register" "Disabled,Enabled" setclrfld.long 0x00 23. 0x04 23. 0x0C 23. " [23] ,Enable or disable interrupt bit 23 in GIRQ18 register" "Disabled,Enabled" setclrfld.long 0x00 22. 0x04 22. 0x0C 22. " [22] ,Enable or disable interrupt bit 22 in GIRQ18 register" "Disabled,Enabled" setclrfld.long 0x00 21. 0x04 21. 0x0C 21. " [21] ,Enable or disable interrupt bit 21 in GIRQ18 register" "Disabled,Enabled" newline setclrfld.long 0x00 20. 0x04 20. 0x0C 20. " [20] ,Enable or disable interrupt bit 20 in GIRQ18 register" "Disabled,Enabled" setclrfld.long 0x00 19. 0x04 19. 0x0C 19. " [19] ,Enable or disable interrupt bit 19 in GIRQ18 register" "Disabled,Enabled" setclrfld.long 0x00 18. 0x04 18. 0x0C 18. " [18] ,Enable or disable interrupt bit 18 in GIRQ18 register" "Disabled,Enabled" setclrfld.long 0x00 17. 0x04 17. 0x0C 17. " [17] ,Enable or disable interrupt bit 17 in GIRQ18 register" "Disabled,Enabled" newline setclrfld.long 0x00 16. 0x04 16. 0x0C 16. " [16] ,Enable or disable interrupt bit 16 in GIRQ18 register" "Disabled,Enabled" setclrfld.long 0x00 15. 0x04 15. 0x0C 15. " [15] ,Enable or disable interrupt bit 15 in GIRQ18 register" "Disabled,Enabled" setclrfld.long 0x00 14. 0x04 14. 0x0C 14. " [14] ,Enable or disable interrupt bit 14 in GIRQ18 register" "Disabled,Enabled" setclrfld.long 0x00 13. 0x04 13. 0x0C 13. " [13] ,Enable or disable interrupt bit 13 in GIRQ18 register" "Disabled,Enabled" newline setclrfld.long 0x00 12. 0x04 12. 0x0C 12. " [12] ,Enable or disable interrupt bit 12 in GIRQ18 register" "Disabled,Enabled" setclrfld.long 0x00 11. 0x04 11. 0x0C 11. " [11] ,Enable or disable interrupt bit 11 in GIRQ18 register" "Disabled,Enabled" setclrfld.long 0x00 10. 0x04 10. 0x0C 10. " [10] ,Enable or disable interrupt bit 10 in GIRQ18 register" "Disabled,Enabled" setclrfld.long 0x00 9. 0x04 9. 0x0C 9. " [9] ,Enable or disable interrupt bit 9 in GIRQ18 register" "Disabled,Enabled" newline setclrfld.long 0x00 8. 0x04 8. 0x0C 8. " [8] ,Enable or disable interrupt bit 8 in GIRQ18 register" "Disabled,Enabled" setclrfld.long 0x00 7. 0x04 7. 0x0C 7. " [7] ,Enable or disable interrupt bit 7 in GIRQ18 register" "Disabled,Enabled" setclrfld.long 0x00 6. 0x04 6. 0x0C 6. " [6] ,Enable or disable interrupt bit 6 in GIRQ18 register" "Disabled,Enabled" setclrfld.long 0x00 5. 0x04 5. 0x0C 5. " [5] ,Enable or disable interrupt bit 5 in GIRQ18 register" "Disabled,Enabled" newline setclrfld.long 0x00 4. 0x04 4. 0x0C 4. " [4] ,Enable or disable interrupt bit 4 in GIRQ18 register" "Disabled,Enabled" setclrfld.long 0x00 3. 0x04 3. 0x0C 3. " [3] ,Enable or disable interrupt bit 3 in GIRQ18 register" "Disabled,Enabled" setclrfld.long 0x00 2. 0x04 2. 0x0C 2. " [2] ,Enable or disable interrupt bit 2 in GIRQ18 register" "Disabled,Enabled" setclrfld.long 0x00 1. 0x04 1. 0x0C 1. " [1] ,Enable or disable interrupt bit 1 in GIRQ18 register" "Disabled,Enabled" newline setclrfld.long 0x00 0. 0x04 0. 0x0C 0. " [0] ,Enable or disable interrupt bit 0 in GIRQ18 register" "Disabled,Enabled" rgroup.long 0xD0++0x03 line.long 0x00 "GIRQ18RR,GIRQ18 Result Register 18" bitfld.long 0x00 13. " GIRQ18_RESULT[13] ,Corresponding interrupt in the GIRQ18 source register" "No effect,Disabled" bitfld.long 0x00 12. " [12] ,Corresponding interrupt in the GIRQ18 source register" "No effect,Disabled" bitfld.long 0x00 11. " [11] ,Corresponding interrupt in the GIRQ18 source register" "No effect,Disabled" bitfld.long 0x00 10. " [10] ,Corresponding interrupt in the GIRQ18 source register" "No effect,Disabled" newline bitfld.long 0x00 9. " [9] ,Corresponding interrupt in the GIRQ18 source register" "No effect,Disabled" bitfld.long 0x00 8. " [8] ,Corresponding interrupt in the GIRQ18 source register" "No effect,Disabled" bitfld.long 0x00 7. " [7] ,Corresponding interrupt in the GIRQ18 source register" "No effect,Disabled" bitfld.long 0x00 6. " [6] ,Corresponding interrupt in the GIRQ18 source register" "No effect,Disabled" newline bitfld.long 0x00 5. " [5] ,Corresponding interrupt in the GIRQ18 source register" "No effect,Disabled" bitfld.long 0x00 4. " [4] ,Corresponding interrupt in the GIRQ18 source register" "No effect,Disabled" bitfld.long 0x00 3. " [3] ,Corresponding interrupt in the GIRQ18 source register" "No effect,Disabled" bitfld.long 0x00 2. " [2] ,Corresponding interrupt in the GIRQ18 source register" "No effect,Disabled" newline bitfld.long 0x00 1. " [1] ,Corresponding interrupt in the GIRQ18 source register" "No effect,Disabled" bitfld.long 0x00 0. " [0] ,Corresponding interrupt in the GIRQ18 source register" "No effect,Disabled" group.long 0xDC++0x03 line.long 0x00 "GIRQ19_SET/CLR,GRIQ Register 19 Set/Clear" setclrfld.long 0x00 8. 0x04 8. 0x0C 8. " GIRQ19[8] ,Enable or disable interrupt bit 8 in GIRQ19 register" "Disabled,Enabled" setclrfld.long 0x00 7. 0x04 7. 0x0C 7. " [7] ,Enable or disable interrupt bit 7 in GIRQ19 register" "Disabled,Enabled" setclrfld.long 0x00 6. 0x04 6. 0x0C 6. " [6] ,Enable or disable interrupt bit 6 in GIRQ19 register" "Disabled,Enabled" setclrfld.long 0x00 5. 0x04 5. 0x0C 5. " [5] ,Enable or disable interrupt bit 5 in GIRQ19 register" "Disabled,Enabled" newline setclrfld.long 0x00 4. 0x04 4. 0x0C 4. " [4] ,Enable or disable interrupt bit 4 in GIRQ19 register" "Disabled,Enabled" setclrfld.long 0x00 3. 0x04 3. 0x0C 3. " [3] ,Enable or disable interrupt bit 3 in GIRQ19 register" "Disabled,Enabled" setclrfld.long 0x00 2. 0x04 2. 0x0C 2. " [2] ,Enable or disable interrupt bit 2 in GIRQ19 register" "Disabled,Enabled" setclrfld.long 0x00 1. 0x04 1. 0x0C 1. " [1] ,Enable or disable interrupt bit 1 in GIRQ19 register" "Disabled,Enabled" newline setclrfld.long 0x00 0. 0x04 0. 0x0C 0. " [0] ,Enable or disable interrupt bit 0 in GIRQ19 register" "Disabled,Enabled" rgroup.long 0xE4++0x03 line.long 0x00 "GIRQ19RR,GIRQ19 Result Register 19" bitfld.long 0x00 8. " GIRQ19_RESULT[8] ,Corresponding interrupt in the GIRQ19 source register" "No effect,Disabled" bitfld.long 0x00 7. " [7] ,Corresponding interrupt in the GIRQ19 source register" "No effect,Disabled" bitfld.long 0x00 6. " [6] ,Corresponding interrupt in the GIRQ19 source register" "No effect,Disabled" bitfld.long 0x00 5. " [5] ,Corresponding interrupt in the GIRQ19 source register" "No effect,Disabled" newline bitfld.long 0x00 4. " [4] ,Corresponding interrupt in the GIRQ19 source register" "No effect,Disabled" bitfld.long 0x00 3. " [3] ,Corresponding interrupt in the GIRQ19 source register" "No effect,Disabled" bitfld.long 0x00 2. " [2] ,Corresponding interrupt in the GIRQ19 source register" "No effect,Disabled" bitfld.long 0x00 1. " [1] ,Corresponding interrupt in the GIRQ19 source register" "No effect,Disabled" newline bitfld.long 0x00 0. " [0] ,Corresponding interrupt in the GIRQ19 source register" "No effect,Disabled" group.long 0xF0++0x03 line.long 0x00 "GIRQ20_SET/CLR,GRIQ Register 20 Set/Clear" setclrfld.long 0x00 8. 0x04 8. 0x0C 8. " GIRQ20[8] ,Enable or disable interrupt bit 8 in GIRQ20 register" "Disabled,Enabled" setclrfld.long 0x00 7. 0x04 7. 0x0C 7. " [7] ,Enable or disable interrupt bit 7 in GIRQ20 register" "Disabled,Enabled" setclrfld.long 0x00 6. 0x04 6. 0x0C 6. " [6] ,Enable or disable interrupt bit 6 in GIRQ20 register" "Disabled,Enabled" setclrfld.long 0x00 5. 0x04 5. 0x0C 5. " [5] ,Enable or disable interrupt bit 5 in GIRQ20 register" "Disabled,Enabled" newline setclrfld.long 0x00 4. 0x04 4. 0x0C 4. " [4] ,Enable or disable interrupt bit 4 in GIRQ20 register" "Disabled,Enabled" setclrfld.long 0x00 3. 0x04 3. 0x0C 3. " [3] ,Enable or disable interrupt bit 3 in GIRQ20 register" "Disabled,Enabled" setclrfld.long 0x00 2. 0x04 2. 0x0C 2. " [2] ,Enable or disable interrupt bit 2 in GIRQ20 register" "Disabled,Enabled" setclrfld.long 0x00 1. 0x04 1. 0x0C 1. " [1] ,Enable or disable interrupt bit 1 in GIRQ20 register" "Disabled,Enabled" newline setclrfld.long 0x00 0. 0x04 0. 0x0C 0. " [0] ,Enable or disable interrupt bit 0 in GIRQ20 register" "Disabled,Enabled" rgroup.long 0xF8++0x03 line.long 0x00 "GIRQ20RR,GIRQ20 Result Register 20" bitfld.long 0x00 8. " GIRQ20_RESULT[8] ,Corresponding interrupt in the GIRQ20 source register" "No effect,Disabled" bitfld.long 0x00 7. " [7] ,Corresponding interrupt in the GIRQ20 source register" "No effect,Disabled" bitfld.long 0x00 6. " [6] ,Corresponding interrupt in the GIRQ20 source register" "No effect,Disabled" bitfld.long 0x00 5. " [5] ,Corresponding interrupt in the GIRQ20 source register" "No effect,Disabled" newline bitfld.long 0x00 4. " [4] ,Corresponding interrupt in the GIRQ20 source register" "No effect,Disabled" bitfld.long 0x00 3. " [3] ,Corresponding interrupt in the GIRQ20 source register" "No effect,Disabled" bitfld.long 0x00 2. " [2] ,Corresponding interrupt in the GIRQ20 source register" "No effect,Disabled" bitfld.long 0x00 1. " [1] ,Corresponding interrupt in the GIRQ20 source register" "No effect,Disabled" newline bitfld.long 0x00 0. " [0] ,Corresponding interrupt in the GIRQ20 source register" "No effect,Disabled" group.long 0x104++0x03 line.long 0x00 "GIRQ21_SET/CLR,GRIQ Register 21 Set/Clear" setclrfld.long 0x00 25. 0x04 25. 0x0C 25. " GIRQ21[25] ,Enable or disable interrupt bit 25 in GIRQ21 register" "Disabled,Enabled" setclrfld.long 0x00 24. 0x04 24. 0x0C 24. " [24] ,Enable or disable interrupt bit 24 in GIRQ21 register" "Disabled,Enabled" setclrfld.long 0x00 23. 0x04 23. 0x0C 23. " [23] ,Enable or disable interrupt bit 23 in GIRQ21 register" "Disabled,Enabled" setclrfld.long 0x00 22. 0x04 22. 0x0C 22. " [22] ,Enable or disable interrupt bit 22 in GIRQ21 register" "Disabled,Enabled" newline setclrfld.long 0x00 21. 0x04 21. 0x0C 21. " [21] ,Enable or disable interrupt bit 21 in GIRQ21 register" "Disabled,Enabled" setclrfld.long 0x00 20. 0x04 20. 0x0C 20. " [20] ,Enable or disable interrupt bit 20 in GIRQ21 register" "Disabled,Enabled" setclrfld.long 0x00 19. 0x04 19. 0x0C 19. " [19] ,Enable or disable interrupt bit 19 in GIRQ21 register" "Disabled,Enabled" setclrfld.long 0x00 18. 0x04 18. 0x0C 18. " [18] ,Enable or disable interrupt bit 18 in GIRQ21 register" "Disabled,Enabled" newline setclrfld.long 0x00 17. 0x04 17. 0x0C 17. " [17] ,Enable or disable interrupt bit 17 in GIRQ21 register" "Disabled,Enabled" setclrfld.long 0x00 16. 0x04 16. 0x0C 16. " [16] ,Enable or disable interrupt bit 16 in GIRQ21 register" "Disabled,Enabled" setclrfld.long 0x00 15. 0x04 15. 0x0C 15. " [15] ,Enable or disable interrupt bit 15 in GIRQ21 register" "Disabled,Enabled" setclrfld.long 0x00 14. 0x04 14. 0x0C 14. " [14] ,Enable or disable interrupt bit 14 in GIRQ21 register" "Disabled,Enabled" newline setclrfld.long 0x00 13. 0x04 13. 0x0C 13. " [13] ,Enable or disable interrupt bit 13 in GIRQ21 register" "Disabled,Enabled" setclrfld.long 0x00 12. 0x04 12. 0x0C 12. " [12] ,Enable or disable interrupt bit 12 in GIRQ21 register" "Disabled,Enabled" setclrfld.long 0x00 11. 0x04 11. 0x0C 11. " [11] ,Enable or disable interrupt bit 11 in GIRQ21 register" "Disabled,Enabled" setclrfld.long 0x00 10. 0x04 10. 0x0C 10. " [10] ,Enable or disable interrupt bit 10 in GIRQ21 register" "Disabled,Enabled" newline setclrfld.long 0x00 9. 0x04 9. 0x0C 9. " [9] ,Enable or disable interrupt bit 9 in GIRQ21 register" "Disabled,Enabled" setclrfld.long 0x00 8. 0x04 8. 0x0C 8. " [8] ,Enable or disable interrupt bit 8 in GIRQ21 register" "Disabled,Enabled" setclrfld.long 0x00 7. 0x04 7. 0x0C 7. " [7] ,Enable or disable interrupt bit 7 in GIRQ21 register" "Disabled,Enabled" setclrfld.long 0x00 6. 0x04 6. 0x0C 6. " [6] ,Enable or disable interrupt bit 6 in GIRQ21 register" "Disabled,Enabled" newline setclrfld.long 0x00 5. 0x04 5. 0x0C 5. " [5] ,Enable or disable interrupt bit 5 in GIRQ21 register" "Disabled,Enabled" setclrfld.long 0x00 4. 0x04 4. 0x0C 4. " [4] ,Enable or disable interrupt bit 4 in GIRQ21 register" "Disabled,Enabled" setclrfld.long 0x00 3. 0x04 3. 0x0C 3. " [3] ,Enable or disable interrupt bit 3 in GIRQ21 register" "Disabled,Enabled" setclrfld.long 0x00 2. 0x04 2. 0x0C 2. " [2] ,Enable or disable interrupt bit 2 in GIRQ21 register" "Disabled,Enabled" newline setclrfld.long 0x00 1. 0x04 1. 0x0C 1. " [1] ,Enable or disable interrupt bit 1 in GIRQ21 register" "Disabled,Enabled" setclrfld.long 0x00 0. 0x04 0. 0x0C 0. " [0] ,Enable or disable interrupt bit 0 in GIRQ21 register" "Disabled,Enabled" rgroup.long 0x10C++0x03 line.long 0x00 "GIRQ21RR,GIRQ21 Result Register 21" eventfld.long 0x00 25. " GIRQ21_RESULT[25] ,Corresponding interrupt in the GIRQ21 source register" "No effect,Disabled" eventfld.long 0x00 22. " [22] ,Corresponding interrupt in the GIRQ21 source register" "No effect,Disabled" eventfld.long 0x00 21. " [21] ,Corresponding interrupt in the GIRQ21 source register" "No effect,Disabled" eventfld.long 0x00 20. " [20] ,Corresponding interrupt in the GIRQ21 source register" "No effect,Disabled" newline eventfld.long 0x00 19. " [19] ,Corresponding interrupt in the GIRQ21 source register" "No effect,Disabled" eventfld.long 0x00 18. " [18] ,Corresponding interrupt in the GIRQ21 source register" "No effect,Disabled" eventfld.long 0x00 17. " [17] ,Corresponding interrupt in the GIRQ21 source register" "No effect,Disabled" eventfld.long 0x00 16. " [16] ,Corresponding interrupt in the GIRQ21 source register" "No effect,Disabled" newline eventfld.long 0x00 15. " [15] ,Corresponding interrupt in the GIRQ21 source register" "No effect,Disabled" eventfld.long 0x00 14. " [14] ,Corresponding interrupt in the GIRQ21 source register" "No effect,Disabled" eventfld.long 0x00 13. " [13] ,Corresponding interrupt in the GIRQ21 source register" "No effect,Disabled" eventfld.long 0x00 12. " [12] ,Corresponding interrupt in the GIRQ21 source register" "No effect,Disabled" newline eventfld.long 0x00 11. " [11] ,Corresponding interrupt in the GIRQ21 source register" "No effect,Disabled" eventfld.long 0x00 9. " [9] ,Corresponding interrupt in the GIRQ21 source register" "No effect,Disabled" eventfld.long 0x00 8. " [8] ,Corresponding interrupt in the GIRQ21 source register" "No effect,Disabled" eventfld.long 0x00 6. " [6] ,Corresponding interrupt in the GIRQ21 source register" "No effect,Disabled" newline eventfld.long 0x00 5. " [5] ,Corresponding interrupt in the GIRQ21 source register" "No effect,Disabled" eventfld.long 0x00 4. " [4] ,Corresponding interrupt in the GIRQ21 source register" "No effect,Disabled" eventfld.long 0x00 3. " [3] ,Corresponding interrupt in the GIRQ21 source register" "No effect,Disabled" eventfld.long 0x00 2. " [2] ,Corresponding interrupt in the GIRQ21 source register" "No effect,Disabled" newline eventfld.long 0x00 1. " [1] ,Corresponding interrupt in the GIRQ21 source register" "No effect,Disabled" eventfld.long 0x00 0. " [0] ,Corresponding interrupt in the GIRQ21 source register" "No effect,Disabled" group.long 0x118++0x03 line.long 0x00 "GIRQ22_SET/CLR,GRIQ Register 22 Set/Clear" setclrfld.long 0x00 9. 0x04 9. 0x0C 9. " GIRQ22[9] ,Enable or disable interrupt bit 9 in GIRQ22 register" "Disabled,Enabled" setclrfld.long 0x00 4. 0x04 4. 0x0C 4. " [4] ,Enable or disable interrupt bit 4 in GIRQ22 register" "Disabled,Enabled" setclrfld.long 0x00 3. 0x04 3. 0x0C 3. " [3] ,Enable or disable interrupt bit 3 in GIRQ22 register" "Disabled,Enabled" setclrfld.long 0x00 2. 0x04 2. 0x0C 2. " [2] ,Enable or disable interrupt bit 2 in GIRQ22 register" "Disabled,Enabled" newline setclrfld.long 0x00 1. 0x04 1. 0x0C 1. " [1] ,Enable or disable interrupt bit 1 in GIRQ22 register" "Disabled,Enabled" setclrfld.long 0x00 0. 0x04 0. 0x0C 0. " [0] ,Enable or disable interrupt bit 0 in GIRQ22 register" "Disabled,Enabled" rgroup.long 0x120++0x03 line.long 0x00 "GIRQ22RR,GIRQ22 Result Register 22" eventfld.long 0x00 9. " GIRQ22_RESULT[9] ,Corresponding interrupt in the GIRQ22 source register" "No effect,Disabled" eventfld.long 0x00 4. " [4] ,Corresponding interrupt in the GIRQ22 source register" "No effect,Disabled" eventfld.long 0x00 3. " [3] ,Corresponding interrupt in the GIRQ22 source register" "No effect,Disabled" eventfld.long 0x00 2. " [2] ,Corresponding interrupt in the GIRQ22 source register" "No effect,Disabled" newline eventfld.long 0x00 1. " [1] ,Corresponding interrupt in the GIRQ22 source register" "No effect,Disabled" eventfld.long 0x00 0. " [0] ,Corresponding interrupt in the GIRQ22 source register" "No effect,Disabled" group.long 0x12C++0x03 line.long 0x00 "GIRQ23_SET/CLR,GRIQ Register 23 Set/Clear" setclrfld.long 0x00 18. 0x04 18. 0x0C 18. " GIRQ23[18] ,Enable or disable interrupt bit 18 in GIRQ23 register" "Disabled,Enabled" setclrfld.long 0x00 17. 0x04 17. 0x0C 17. " [17] ,Enable or disable interrupt bit 17 in GIRQ23 register" "Disabled,Enabled" setclrfld.long 0x00 16. 0x04 16. 0x0C 16. " [16] ,Enable or disable interrupt bit 16 in GIRQ23 register" "Disabled,Enabled" setclrfld.long 0x00 15. 0x04 15. 0x0C 15. " [15] ,Enable or disable interrupt bit 15 in GIRQ23 register" "Disabled,Enabled" newline setclrfld.long 0x00 14. 0x04 14. 0x0C 14. " [14] ,Enable or disable interrupt bit 14 in GIRQ23 register" "Disabled,Enabled" setclrfld.long 0x00 13. 0x04 13. 0x0C 13. " [13] ,Enable or disable interrupt bit 13 in GIRQ23 register" "Disabled,Enabled" setclrfld.long 0x00 12. 0x04 12. 0x0C 12. " [12] ,Enable or disable interrupt bit 12 in GIRQ23 register" "Disabled,Enabled" setclrfld.long 0x00 11. 0x04 11. 0x0C 11. " [11] ,Enable or disable interrupt bit 11 in GIRQ23 register" "Disabled,Enabled" newline setclrfld.long 0x00 10. 0x04 10. 0x0C 10. " [10] ,Enable or disable interrupt bit 10 in GIRQ23 register" "Disabled,Enabled" setclrfld.long 0x00 9. 0x04 9. 0x0C 9. " [9] ,Enable or disable interrupt bit 9 in GIRQ23 register" "Disabled,Enabled" setclrfld.long 0x00 8. 0x04 8. 0x0C 8. " [8] ,Enable or disable interrupt bit 8 in GIRQ23 register" "Disabled,Enabled" setclrfld.long 0x00 7. 0x04 7. 0x0C 7. " [7] ,Enable or disable interrupt bit 7 in GIRQ23 register" "Disabled,Enabled" newline setclrfld.long 0x00 6. 0x04 6. 0x0C 6. " [6] ,Enable or disable interrupt bit 6 in GIRQ23 register" "Disabled,Enabled" setclrfld.long 0x00 5. 0x04 5. 0x0C 5. " [5] ,Enable or disable interrupt bit 5 in GIRQ23 register" "Disabled,Enabled" setclrfld.long 0x00 4. 0x04 4. 0x0C 4. " [4] ,Enable or disable interrupt bit 4 in GIRQ23 register" "Disabled,Enabled" setclrfld.long 0x00 3. 0x04 3. 0x0C 3. " [3] ,Enable or disable interrupt bit 3 in GIRQ23 register" "Disabled,Enabled" newline setclrfld.long 0x00 2. 0x04 2. 0x0C 2. " [2] ,Enable or disable interrupt bit 2 in GIRQ23 register" "Disabled,Enabled" setclrfld.long 0x00 1. 0x04 1. 0x0C 1. " [1] ,Enable or disable interrupt bit 1 in GIRQ23 register" "Disabled,Enabled" setclrfld.long 0x00 0. 0x04 0. 0x0C 0. " [0] ,Enable or disable interrupt bit 0 in GIRQ23 register" "Disabled,Enabled" rgroup.long 0x138++0x03 line.long 0x00 "GIRQ23RR,GIRQ23 Result Register 23" bitfld.long 0x00 18. " GIRQ23_RESULT[18] ,Corresponding interrupt in the GIRQ23 source register" "No effect,Disabled" bitfld.long 0x00 17. " [17] ,Corresponding interrupt in the GIRQ23 source register" "No effect,Disabled" bitfld.long 0x00 16. " [16] ,Corresponding interrupt in the GIRQ23 source register" "No effect,Disabled" bitfld.long 0x00 15. " [15] ,Corresponding interrupt in the GIRQ23 source register" "No effect,Disabled" newline bitfld.long 0x00 14. " [14] ,Corresponding interrupt in the GIRQ23 source register" "No effect,Disabled" bitfld.long 0x00 13. " [13] ,Corresponding interrupt in the GIRQ23 source register" "No effect,Disabled" bitfld.long 0x00 12. " [12] ,Corresponding interrupt in the GIRQ23 source register" "No effect,Disabled" bitfld.long 0x00 11. " [11] ,Corresponding interrupt in the GIRQ23 source register" "No effect,Disabled" newline bitfld.long 0x00 10. " [10] ,Corresponding interrupt in the GIRQ23 source register" "No effect,Disabled" bitfld.long 0x00 9. " [9] ,Corresponding interrupt in the GIRQ23 source register" "No effect,Disabled" bitfld.long 0x00 8. " [8] ,Corresponding interrupt in the GIRQ23 source register" "No effect,Disabled" bitfld.long 0x00 7. " [7] ,Corresponding interrupt in the GIRQ23 source register" "No effect,Disabled" newline bitfld.long 0x00 6. " [6] ,Corresponding interrupt in the GIRQ23 source register" "No effect,Disabled" bitfld.long 0x00 5. " [5] ,Corresponding interrupt in the GIRQ23 source register" "No effect,Disabled" bitfld.long 0x00 4. " [4] ,Corresponding interrupt in the GIRQ23 source register" "No effect,Disabled" bitfld.long 0x00 3. " [3] ,Corresponding interrupt in the GIRQ23 source register" "No effect,Disabled" newline bitfld.long 0x00 2. " [2] ,Corresponding interrupt in the GIRQ23 source register" "No effect,Disabled" bitfld.long 0x00 1. " [1] ,Corresponding interrupt in the GIRQ23 source register" "No effect,Disabled" bitfld.long 0x00 0. " [0] ,Corresponding interrupt in the GIRQ23 source register" "No effect,Disabled" group.long 0x140++0x03 line.long 0x00 "GIRQ24_SET/CLR,GRIQ Register 24 Set/Clear" setclrfld.long 0x00 27. 0x04 27. 0x0C 27. " GIRQ24[27] ,Enable or disable interrupt bit 27 in GIRQ24 register" "Disabled,Enabled" setclrfld.long 0x00 26. 0x04 26. 0x0C 26. " [26] ,Enable or disable interrupt bit 26 in GIRQ24 register" "Disabled,Enabled" setclrfld.long 0x00 25. 0x04 25. 0x0C 25. " [25] ,Enable or disable interrupt bit 25 in GIRQ24 register" "Disabled,Enabled" setclrfld.long 0x00 24. 0x04 24. 0x0C 24. " [24] ,Enable or disable interrupt bit 24 in GIRQ24 register" "Disabled,Enabled" newline setclrfld.long 0x00 23. 0x04 23. 0x0C 23. " [23] ,Enable or disable interrupt bit 23 in GIRQ24 register" "Disabled,Enabled" setclrfld.long 0x00 22. 0x04 22. 0x0C 22. " [22] ,Enable or disable interrupt bit 22 in GIRQ24 register" "Disabled,Enabled" setclrfld.long 0x00 21. 0x04 21. 0x0C 21. " [21] ,Enable or disable interrupt bit 21 in GIRQ24 register" "Disabled,Enabled" setclrfld.long 0x00 20. 0x04 20. 0x0C 20. " [20] ,Enable or disable interrupt bit 20 in GIRQ24 register" "Disabled,Enabled" newline setclrfld.long 0x00 19. 0x04 19. 0x0C 19. " [19] ,Enable or disable interrupt bit 19 in GIRQ24 register" "Disabled,Enabled" setclrfld.long 0x00 18. 0x04 18. 0x0C 18. " [18] ,Enable or disable interrupt bit 18 in GIRQ24 register" "Disabled,Enabled" setclrfld.long 0x00 17. 0x04 17. 0x0C 17. " [17] ,Enable or disable interrupt bit 17 in GIRQ24 register" "Disabled,Enabled" setclrfld.long 0x00 16. 0x04 16. 0x0C 16. " [16] ,Enable or disable interrupt bit 16 in GIRQ24 register" "Disabled,Enabled" newline setclrfld.long 0x00 15. 0x04 15. 0x0C 15. " [15] ,Enable or disable interrupt bit 15 in GIRQ24 register" "Disabled,Enabled" setclrfld.long 0x00 14. 0x04 14. 0x0C 14. " [14] ,Enable or disable interrupt bit 14 in GIRQ24 register" "Disabled,Enabled" setclrfld.long 0x00 13. 0x04 13. 0x0C 13. " [13] ,Enable or disable interrupt bit 13 in GIRQ24 register" "Disabled,Enabled" setclrfld.long 0x00 12. 0x04 12. 0x0C 12. " [12] ,Enable or disable interrupt bit 12 in GIRQ24 register" "Disabled,Enabled" newline setclrfld.long 0x00 11. 0x04 11. 0x0C 11. " [11] ,Enable or disable interrupt bit 11 in GIRQ24 register" "Disabled,Enabled" setclrfld.long 0x00 10. 0x04 10. 0x0C 10. " [10] ,Enable or disable interrupt bit 10 in GIRQ24 register" "Disabled,Enabled" setclrfld.long 0x00 9. 0x04 9. 0x0C 9. " [9] ,Enable or disable interrupt bit 9 in GIRQ24 register" "Disabled,Enabled" setclrfld.long 0x00 8. 0x04 8. 0x0C 8. " [8] ,Enable or disable interrupt bit 8 in GIRQ24 register" "Disabled,Enabled" newline setclrfld.long 0x00 7. 0x04 7. 0x0C 7. " [7] ,Enable or disable interrupt bit 7 in GIRQ24 register" "Disabled,Enabled" setclrfld.long 0x00 6. 0x04 6. 0x0C 6. " [6] ,Enable or disable interrupt bit 6 in GIRQ24 register" "Disabled,Enabled" setclrfld.long 0x00 5. 0x04 5. 0x0C 5. " [5] ,Enable or disable interrupt bit 5 in GIRQ24 register" "Disabled,Enabled" setclrfld.long 0x00 4. 0x04 4. 0x0C 4. " [4] ,Enable or disable interrupt bit 4 in GIRQ24 register" "Disabled,Enabled" newline setclrfld.long 0x00 3. 0x04 3. 0x0C 3. " [3] ,Enable or disable interrupt bit 3 in GIRQ24 register" "Disabled,Enabled" setclrfld.long 0x00 2. 0x04 2. 0x0C 2. " [2] ,Enable or disable interrupt bit 2 in GIRQ24 register" "Disabled,Enabled" setclrfld.long 0x00 1. 0x04 1. 0x0C 1. " [1] ,Enable or disable interrupt bit 1 in GIRQ24 register" "Disabled,Enabled" setclrfld.long 0x00 0. 0x04 0. 0x0C 0. " [0] ,Enable or disable interrupt bit 0 in GIRQ24 register" "Disabled,Enabled" rgroup.long 0x148++0x03 line.long 0x00 "GIRQ24RR,GIRQ24 Result Register 24" eventfld.long 0x00 27. " GIRQ24_RESULT[27] ,Corresponding interrupt in the GIRQ24 source register" "No effect,Disabled" eventfld.long 0x00 26. " [26] ,Corresponding interrupt in the GIRQ24 source register" "No effect,Disabled" eventfld.long 0x00 25. " [25] ,Corresponding interrupt in the GIRQ24 source register" "No effect,Disabled" eventfld.long 0x00 24. " [24] ,Corresponding interrupt in the GIRQ24 source register" "No effect,Disabled" newline eventfld.long 0x00 23. " [23] ,Corresponding interrupt in the GIRQ24 source register" "No effect,Disabled" eventfld.long 0x00 22. " [22] ,Corresponding interrupt in the GIRQ24 source register" "No effect,Disabled" eventfld.long 0x00 21. " [21] ,Corresponding interrupt in the GIRQ24 source register" "No effect,Disabled" eventfld.long 0x00 20. " [20] ,Corresponding interrupt in the GIRQ24 source register" "No effect,Disabled" newline eventfld.long 0x00 19. " [19] ,Corresponding interrupt in the GIRQ24 source register" "No effect,Disabled" eventfld.long 0x00 18. " [18] ,Corresponding interrupt in the GIRQ24 source register" "No effect,Disabled" eventfld.long 0x00 17. " [17] ,Corresponding interrupt in the GIRQ24 source register" "No effect,Disabled" eventfld.long 0x00 16. " [16] ,Corresponding interrupt in the GIRQ24 source register" "No effect,Disabled" newline eventfld.long 0x00 15. " [15] ,Corresponding interrupt in the GIRQ24 source register" "No effect,Disabled" eventfld.long 0x00 14. " [14] ,Corresponding interrupt in the GIRQ24 source register" "No effect,Disabled" eventfld.long 0x00 13. " [13] ,Corresponding interrupt in the GIRQ24 source register" "No effect,Disabled" eventfld.long 0x00 12. " [12] ,Corresponding interrupt in the GIRQ24 source register" "No effect,Disabled" newline eventfld.long 0x00 11. " [11] ,Corresponding interrupt in the GIRQ24 source register" "No effect,Disabled" eventfld.long 0x00 10. " [10] ,Corresponding interrupt in the GIRQ24 source register" "No effect,Disabled" eventfld.long 0x00 9. " [9] ,Corresponding interrupt in the GIRQ24 source register" "No effect,Disabled" eventfld.long 0x00 8. " [8] ,Corresponding interrupt in the GIRQ24 source register" "No effect,Disabled" newline eventfld.long 0x00 7. " [7] ,Corresponding interrupt in the GIRQ24 source register" "No effect,Disabled" eventfld.long 0x00 6. " [6] ,Corresponding interrupt in the GIRQ24 source register" "No effect,Disabled" eventfld.long 0x00 5. " [5] ,Corresponding interrupt in the GIRQ24 source register" "No effect,Disabled" eventfld.long 0x00 4. " [4] ,Corresponding interrupt in the GIRQ24 source register" "No effect,Disabled" newline eventfld.long 0x00 3. " [3] ,Corresponding interrupt in the GIRQ24 source register" "No effect,Disabled" eventfld.long 0x00 2. " [2] ,Corresponding interrupt in the GIRQ24 source register" "No effect,Disabled" eventfld.long 0x00 1. " [1] ,Corresponding interrupt in the GIRQ24 source register" "No effect,Disabled" eventfld.long 0x00 0. " [0] ,Corresponding interrupt in the GIRQ24 source register" "No effect,Disabled" group.long 0x154++0x03 line.long 0x00 "GIRQ25_SET/CLR,GRIQ Register 25 Set/Clear" setclrfld.long 0x00 15. 0x04 15. 0x0C 15. " GIRQ25[15] ,Enable or disable interrupt bit 15 in GIRQ25 register" "Disabled,Enabled" setclrfld.long 0x00 14. 0x04 14. 0x0C 14. " [14] ,Enable or disable interrupt bit 14 in GIRQ25 register" "Disabled,Enabled" setclrfld.long 0x00 13. 0x04 13. 0x0C 13. " [13] ,Enable or disable interrupt bit 13 in GIRQ25 register" "Disabled,Enabled" setclrfld.long 0x00 12. 0x04 12. 0x0C 12. " [12] ,Enable or disable interrupt bit 12 in GIRQ25 register" "Disabled,Enabled" newline setclrfld.long 0x00 11. 0x04 11. 0x0C 11. " [11] ,Enable or disable interrupt bit 11 in GIRQ25 register" "Disabled,Enabled" setclrfld.long 0x00 10. 0x04 10. 0x0C 10. " [10] ,Enable or disable interrupt bit 10 in GIRQ25 register" "Disabled,Enabled" setclrfld.long 0x00 9. 0x04 9. 0x0C 9. " [9] ,Enable or disable interrupt bit 9 in GIRQ25 register" "Disabled,Enabled" setclrfld.long 0x00 8. 0x04 8. 0x0C 8. " [8] ,Enable or disable interrupt bit 8 in GIRQ25 register" "Disabled,Enabled" newline setclrfld.long 0x00 7. 0x04 7. 0x0C 7. " [7] ,Enable or disable interrupt bit 7 in GIRQ25 register" "Disabled,Enabled" setclrfld.long 0x00 6. 0x04 6. 0x0C 6. " [6] ,Enable or disable interrupt bit 6 in GIRQ25 register" "Disabled,Enabled" setclrfld.long 0x00 5. 0x04 5. 0x0C 5. " [5] ,Enable or disable interrupt bit 5 in GIRQ25 register" "Disabled,Enabled" setclrfld.long 0x00 4. 0x04 4. 0x0C 4. " [4] ,Enable or disable interrupt bit 4 in GIRQ25 register" "Disabled,Enabled" newline setclrfld.long 0x00 3. 0x04 3. 0x0C 3. " [3] ,Enable or disable interrupt bit 3 in GIRQ25 register" "Disabled,Enabled" setclrfld.long 0x00 2. 0x04 2. 0x0C 2. " [2] ,Enable or disable interrupt bit 2 in GIRQ25 register" "Disabled,Enabled" setclrfld.long 0x00 1. 0x04 1. 0x0C 1. " [1] ,Enable or disable interrupt bit 1 in GIRQ25 register" "Disabled,Enabled" setclrfld.long 0x00 0. 0x04 0. 0x0C 0. " [0] ,Enable or disable interrupt bit 0 in GIRQ25 register" "Disabled,Enabled" rgroup.long 0x15C++0x03 line.long 0x00 "GIRQ25RR,GIRQ25 Result Register 25" eventfld.long 0x00 15. " GIRQ25_RESULT[15] ,Corresponding interrupt in the GIRQ25 source register" "No effect,Disabled" eventfld.long 0x00 14. " [14] ,Corresponding interrupt in the GIRQ25 source register" "No effect,Disabled" eventfld.long 0x00 13. " [13] ,Corresponding interrupt in the GIRQ25 source register" "No effect,Disabled" eventfld.long 0x00 12. " [12] ,Corresponding interrupt in the GIRQ25 source register" "No effect,Disabled" newline eventfld.long 0x00 11. " [11] ,Corresponding interrupt in the GIRQ25 source register" "No effect,Disabled" eventfld.long 0x00 10. " [10] ,Corresponding interrupt in the GIRQ25 source register" "No effect,Disabled" eventfld.long 0x00 9. " [9] ,Corresponding interrupt in the GIRQ25 source register" "No effect,Disabled" eventfld.long 0x00 8. " [8] ,Corresponding interrupt in the GIRQ25 source register" "No effect,Disabled" newline eventfld.long 0x00 7. " [7] ,Corresponding interrupt in the GIRQ25 source register" "No effect,Disabled" eventfld.long 0x00 6. " [6] ,Corresponding interrupt in the GIRQ25 source register" "No effect,Disabled" eventfld.long 0x00 5. " [5] ,Corresponding interrupt in the GIRQ25 source register" "No effect,Disabled" eventfld.long 0x00 4. " [4] ,Corresponding interrupt in the GIRQ25 source register" "No effect,Disabled" newline eventfld.long 0x00 3. " [3] ,Corresponding interrupt in the GIRQ25 source register" "No effect,Disabled" eventfld.long 0x00 2. " [2] ,Corresponding interrupt in the GIRQ25 source register" "No effect,Disabled" eventfld.long 0x00 1. " [1] ,Corresponding interrupt in the GIRQ25 source register" "No effect,Disabled" eventfld.long 0x00 0. " [0] ,Corresponding interrupt in the GIRQ25 source register" "No effect,Disabled" group.long 0x168++0x03 line.long 0x00 "GIRQ26_SET/CLR,GRIQ Register 26 Set/Clear" setclrfld.long 0x00 30. 0x04 30. 0x0C 30. " GIRQ26[30] ,Enable or disable interrupt bit 30 in GIRQ26 register" "Disabled,Enabled" setclrfld.long 0x00 29. 0x04 29. 0x0C 29. " [29] ,Enable or disable interrupt bit 29 in GIRQ26 register" "Disabled,Enabled" setclrfld.long 0x00 28. 0x04 28. 0x0C 28. " [28] ,Enable or disable interrupt bit 28 in GIRQ26 register" "Disabled,Enabled" setclrfld.long 0x00 27. 0x04 27. 0x0C 27. " [27] ,Enable or disable interrupt bit 27 in GIRQ26 register" "Disabled,Enabled" newline setclrfld.long 0x00 26. 0x04 26. 0x0C 26. " [26] ,Enable or disable interrupt bit 26 in GIRQ26 register" "Disabled,Enabled" setclrfld.long 0x00 25. 0x04 25. 0x0C 25. " [25] ,Enable or disable interrupt bit 25 in GIRQ26 register" "Disabled,Enabled" setclrfld.long 0x00 24. 0x04 24. 0x0C 24. " [24] ,Enable or disable interrupt bit 24 in GIRQ26 register" "Disabled,Enabled" setclrfld.long 0x00 23. 0x04 23. 0x0C 23. " [23] ,Enable or disable interrupt bit 23 in GIRQ26 register" "Disabled,Enabled" newline setclrfld.long 0x00 22. 0x04 22. 0x0C 22. " [22] ,Enable or disable interrupt bit 22 in GIRQ26 register" "Disabled,Enabled" setclrfld.long 0x00 21. 0x04 21. 0x0C 21. " [21] ,Enable or disable interrupt bit 21 in GIRQ26 register" "Disabled,Enabled" setclrfld.long 0x00 20. 0x04 20. 0x0C 20. " [20] ,Enable or disable interrupt bit 20 in GIRQ26 register" "Disabled,Enabled" setclrfld.long 0x00 19. 0x04 19. 0x0C 19. " [19] ,Enable or disable interrupt bit 19 in GIRQ26 register" "Disabled,Enabled" newline setclrfld.long 0x00 18. 0x04 18. 0x0C 18. " [18] ,Enable or disable interrupt bit 18 in GIRQ26 register" "Disabled,Enabled" setclrfld.long 0x00 17. 0x04 17. 0x0C 17. " [17] ,Enable or disable interrupt bit 17 in GIRQ26 register" "Disabled,Enabled" setclrfld.long 0x00 16. 0x04 16. 0x0C 16. " [16] ,Enable or disable interrupt bit 16 in GIRQ26 register" "Disabled,Enabled" setclrfld.long 0x00 15. 0x04 15. 0x0C 15. " [15] ,Enable or disable interrupt bit 15 in GIRQ26 register" "Disabled,Enabled" newline setclrfld.long 0x00 14. 0x04 14. 0x0C 14. " [14] ,Enable or disable interrupt bit 14 in GIRQ26 register" "Disabled,Enabled" setclrfld.long 0x00 13. 0x04 13. 0x0C 13. " [13] ,Enable or disable interrupt bit 13 in GIRQ26 register" "Disabled,Enabled" setclrfld.long 0x00 12. 0x04 12. 0x0C 12. " [12] ,Enable or disable interrupt bit 12 in GIRQ26 register" "Disabled,Enabled" setclrfld.long 0x00 11. 0x04 11. 0x0C 11. " [11] ,Enable or disable interrupt bit 11 in GIRQ26 register" "Disabled,Enabled" newline setclrfld.long 0x00 10. 0x04 10. 0x0C 10. " [10] ,Enable or disable interrupt bit 10 in GIRQ26 register" "Disabled,Enabled" setclrfld.long 0x00 9. 0x04 9. 0x0C 9. " [9] ,Enable or disable interrupt bit 9 in GIRQ26 register" "Disabled,Enabled" setclrfld.long 0x00 8. 0x04 8. 0x0C 8. " [8] ,Enable or disable interrupt bit 8 in GIRQ26 register" "Disabled,Enabled" setclrfld.long 0x00 7. 0x04 7. 0x0C 7. " [7] ,Enable or disable interrupt bit 7 in GIRQ26 register" "Disabled,Enabled" newline setclrfld.long 0x00 6. 0x04 6. 0x0C 6. " [6] ,Enable or disable interrupt bit 6 in GIRQ26 register" "Disabled,Enabled" setclrfld.long 0x00 5. 0x04 5. 0x0C 5. " [5] ,Enable or disable interrupt bit 5 in GIRQ26 register" "Disabled,Enabled" setclrfld.long 0x00 4. 0x04 4. 0x0C 4. " [4] ,Enable or disable interrupt bit 4 in GIRQ26 register" "Disabled,Enabled" setclrfld.long 0x00 3. 0x04 3. 0x0C 3. " [3] ,Enable or disable interrupt bit 3 in GIRQ26 register" "Disabled,Enabled" newline setclrfld.long 0x00 2. 0x04 2. 0x0C 2. " [2] ,Enable or disable interrupt bit 2 in GIRQ26 register" "Disabled,Enabled" setclrfld.long 0x00 1. 0x04 1. 0x0C 1. " [1] ,Enable or disable interrupt bit 1 in GIRQ26 register" "Disabled,Enabled" setclrfld.long 0x00 0. 0x04 0. 0x0C 0. " [0] ,Enable or disable interrupt bit 0 in GIRQ26 register" "Disabled,Enabled" rgroup.long 0x174++0x03 line.long 0x00 "GIRQ26RR,GIRQ26 Result Register 26" eventfld.long 0x00 30. " GIRQ26_RESULT[30] ,Corresponding interrupt in the GIRQ26 source register" "No effect,Disabled" eventfld.long 0x00 29. " [29] ,Corresponding interrupt in the GIRQ26 source register" "No effect,Disabled" eventfld.long 0x00 28. " [28] ,Corresponding interrupt in the GIRQ26 source register" "No effect,Disabled" eventfld.long 0x00 27. " [27] ,Corresponding interrupt in the GIRQ26 source register" "No effect,Disabled" newline eventfld.long 0x00 26. " [26] ,Corresponding interrupt in the GIRQ26 source register" "No effect,Disabled" eventfld.long 0x00 25. " [25] ,Corresponding interrupt in the GIRQ26 source register" "No effect,Disabled" eventfld.long 0x00 24. " [24] ,Corresponding interrupt in the GIRQ26 source register" "No effect,Disabled" eventfld.long 0x00 23. " [23] ,Corresponding interrupt in the GIRQ26 source register" "No effect,Disabled" newline eventfld.long 0x00 22. " [22] ,Corresponding interrupt in the GIRQ26 source register" "No effect,Disabled" eventfld.long 0x00 21. " [21] ,Corresponding interrupt in the GIRQ26 source register" "No effect,Disabled" eventfld.long 0x00 20. " [20] ,Corresponding interrupt in the GIRQ26 source register" "No effect,Disabled" eventfld.long 0x00 19. " [19] ,Corresponding interrupt in the GIRQ26 source register" "No effect,Disabled" newline eventfld.long 0x00 18. " [18] ,Corresponding interrupt in the GIRQ26 source register" "No effect,Disabled" eventfld.long 0x00 17. " [17] ,Corresponding interrupt in the GIRQ26 source register" "No effect,Disabled" eventfld.long 0x00 16. " [16] ,Corresponding interrupt in the GIRQ26 source register" "No effect,Disabled" eventfld.long 0x00 12. " [12] ,Corresponding interrupt in the GIRQ26 source register" "No effect,Disabled" newline eventfld.long 0x00 11. " [11] ,Corresponding interrupt in the GIRQ26 source register" "No effect,Disabled" eventfld.long 0x00 8. " [8] ,Corresponding interrupt in the GIRQ26 source register" "No effect,Disabled" eventfld.long 0x00 6. " [6] ,Corresponding interrupt in the GIRQ26 source register" "No effect,Disabled" eventfld.long 0x00 5. " [5] ,Corresponding interrupt in the GIRQ26 source register" "No effect,Disabled" newline eventfld.long 0x00 4. " [4] ,Corresponding interrupt in the GIRQ26 source register" "No effect,Disabled" eventfld.long 0x00 3. " [3] ,Corresponding interrupt in the GIRQ26 source register" "No effect,Disabled" eventfld.long 0x00 2. " [2] ,Corresponding interrupt in the GIRQ26 source register" "No effect,Disabled" eventfld.long 0x00 1. " [1] ,Corresponding interrupt in the GIRQ26 source register" "No effect,Disabled" newline eventfld.long 0x00 0. " [0] ,Corresponding interrupt in the GIRQ26 source register" "No effect,Disabled" group.long 0x200++0x03 line.long 0x00 "BESR_SET/CLR,Block Enable Register Set/Clear" setclrfld.long 0x00 26. 0x00 26. 0x04 26. " IRQ_VECTOR[26] ,Assert an interrupt event at GIRQ26 register" "Disabled,Enabled" setclrfld.long 0x00 25. 0x00 25. 0x04 25. " [25] ,Assert an interrupt event at GIRQ26 register" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x04 24. " [24] ,Assert an interrupt event at GIRQ26 register" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x04 23. " [23] ,Assert an interrupt event at GIRQ26 register" "Disabled,Enabled" newline setclrfld.long 0x00 22. 0x00 22. 0x04 22. " [22] ,Assert an interrupt event at GIRQ26 register" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x04 21. " [21] ,Assert an interrupt event at GIRQ26 register" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x04 20. " [20] ,Assert an interrupt event at GIRQ26 register" "Disabled,Enabled" setclrfld.long 0x00 19. 0x00 19. 0x04 19. " [19] ,Assert an interrupt event at GIRQ26 register" "Disabled,Enabled" newline setclrfld.long 0x00 18. 0x00 18. 0x04 18. " [18] ,Assert an interrupt event at GIRQ26 register" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x04 17. " [17] ,Assert an interrupt event at GIRQ26 register" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x04 16. " [16] ,Assert an interrupt event at GIRQ26 register" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x04 15. " [15] ,Assert an interrupt event at GIRQ26 register" "Disabled,Enabled" newline setclrfld.long 0x00 14. 0x00 14. 0x04 14. " [14] ,Assert an interrupt event at GIRQ26 register" "Disabled,Enabled" setclrfld.long 0x00 13. 0x00 13. 0x04 13. " [13] ,Assert an interrupt event at GIRQ26 register" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x04 12. " [12] ,Assert an interrupt event at GIRQ26 register" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x04 11. " [11] ,Assert an interrupt event at GIRQ26 register" "Disabled,Enabled" newline setclrfld.long 0x00 10. 0x00 10. 0x04 10. " [10] ,Assert an interrupt event at GIRQ26 register" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x04 9. " [9] ,Assert an interrupt event at GIRQ26 register" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x04 8. " [8] ,Assert an interrupt event at GIRQ26 register" "Disabled,Enabled" width 0x0B tree.end tree "LPC (LPC Interface)" tree "LPC CONFIG (LPC Configuration)" base ad:0x400F3300 width 18. group.byte 0x30++0x00 line.byte 0x00 "AC,Activate Register" bitfld.byte 0x00 0. " ACTIVATE ,Activate and power up for logical device" "Deactivated,Activated" if (((per.b(ad:0x400F3300+0x40))&0x80)==0x80) group.byte 0x40++0x00 line.byte 0x00 "IRQ0,Serial IRQ0 Configuration Register" bitfld.byte 0x00 7. " SELECT ,Select interrupt signal for the logical device" "0,1" bitfld.byte 0x00 6. " DEVICE ,SERIRQ disable" "No,Yes" bitfld.byte 0x00 0.--5. " FRAME ,Select the logical device" "Mailbox,Keyboard controller,,,,,,,,,,,,,,,EM interface 0,EM interface 1,EM interface 2,?..." else group.byte 0x40++0x00 line.byte 0x00 "IRQ0,Serial IRQ0 Configuration Register" bitfld.byte 0x00 7. " SELECT ,Select interrupt signal for the logical device" "0,1" bitfld.byte 0x00 6. " DEVICE ,SERIRQ disable" "No,Yes" bitfld.byte 0x00 0.--5. " FRAME ,Select the logical device" "Mailbox,Keyboard controller,ACPI-EC 0,ACPI-EC 1,ACPI-EC 2,ACPI-EC 3,ACPI-EC 4,,,UART 0,UART 1,,LPC interface 0,,,,EM interface 0,EM interface 1,EM interface 2,RTC,?..." endif if (((per.b(ad:0x400F3300+0x41))&0x80)==0x80) group.byte 0x41++0x00 line.byte 0x00 "IRQ1,Serial IRQ1 Configuration Register" bitfld.byte 0x00 7. " SELECT ,Select interrupt signal for the logical device" "0,1" bitfld.byte 0x00 6. " DEVICE ,SERIRQ disable" "No,Yes" bitfld.byte 0x00 0.--5. " FRAME ,Select the logical device" "Mailbox,Keyboard controller,,,,,,,,,,,,,,,EM interface 0,EM interface 1,EM interface 2,?..." else group.byte 0x41++0x00 line.byte 0x00 "IRQ1,Serial IRQ1 Configuration Register" bitfld.byte 0x00 7. " SELECT ,Select interrupt signal for the logical device" "0,1" bitfld.byte 0x00 6. " DEVICE ,SERIRQ disable" "No,Yes" bitfld.byte 0x00 0.--5. " FRAME ,Select the logical device" "Mailbox,Keyboard controller,ACPI-EC 0,ACPI-EC 1,ACPI-EC 2,ACPI-EC 3,ACPI-EC 4,,,UART 0,UART 1,,LPC interface 0,,,,EM interface 0,EM interface 1,EM interface 2,RTC,?..." endif if (((per.b(ad:0x400F3300+0x42))&0x80)==0x80) group.byte 0x42++0x00 line.byte 0x00 "IRQ2,Serial IRQ2 Configuration Register" bitfld.byte 0x00 7. " SELECT ,Select interrupt signal for the logical device" "0,1" bitfld.byte 0x00 6. " DEVICE ,SERIRQ disable" "No,Yes" bitfld.byte 0x00 0.--5. " FRAME ,Select the logical device" "Mailbox,Keyboard controller,,,,,,,,,,,,,,,EM interface 0,EM interface 1,EM interface 2,?..." else group.byte 0x42++0x00 line.byte 0x00 "IRQ2,Serial IRQ2 Configuration Register" bitfld.byte 0x00 7. " SELECT ,Select interrupt signal for the logical device" "0,1" bitfld.byte 0x00 6. " DEVICE ,SERIRQ disable" "No,Yes" bitfld.byte 0x00 0.--5. " FRAME ,Select the logical device" "Mailbox,Keyboard controller,ACPI-EC 0,ACPI-EC 1,ACPI-EC 2,ACPI-EC 3,ACPI-EC 4,,,UART 0,UART 1,,LPC interface 0,,,,EM interface 0,EM interface 1,EM interface 2,RTC,?..." endif if (((per.b(ad:0x400F3300+0x43))&0x80)==0x80) group.byte 0x43++0x00 line.byte 0x00 "IRQ3,Serial IRQ3 Configuration Register" bitfld.byte 0x00 7. " SELECT ,Select interrupt signal for the logical device" "0,1" bitfld.byte 0x00 6. " DEVICE ,SERIRQ disable" "No,Yes" bitfld.byte 0x00 0.--5. " FRAME ,Select the logical device" "Mailbox,Keyboard controller,,,,,,,,,,,,,,,EM interface 0,EM interface 1,EM interface 2,?..." else group.byte 0x43++0x00 line.byte 0x00 "IRQ3,Serial IRQ3 Configuration Register" bitfld.byte 0x00 7. " SELECT ,Select interrupt signal for the logical device" "0,1" bitfld.byte 0x00 6. " DEVICE ,SERIRQ disable" "No,Yes" bitfld.byte 0x00 0.--5. " FRAME ,Select the logical device" "Mailbox,Keyboard controller,ACPI-EC 0,ACPI-EC 1,ACPI-EC 2,ACPI-EC 3,ACPI-EC 4,,,UART 0,UART 1,,LPC interface 0,,,,EM interface 0,EM interface 1,EM interface 2,RTC,?..." endif if (((per.b(ad:0x400F3300+0x44))&0x80)==0x80) group.byte 0x44++0x00 line.byte 0x00 "IRQ4,Serial IRQ4 Configuration Register" bitfld.byte 0x00 7. " SELECT ,Select interrupt signal for the logical device" "0,1" bitfld.byte 0x00 6. " DEVICE ,SERIRQ disable" "No,Yes" bitfld.byte 0x00 0.--5. " FRAME ,Select the logical device" "Mailbox,Keyboard controller,,,,,,,,,,,,,,,EM interface 0,EM interface 1,EM interface 2,?..." else group.byte 0x44++0x00 line.byte 0x00 "IRQ4,Serial IRQ4 Configuration Register" bitfld.byte 0x00 7. " SELECT ,Select interrupt signal for the logical device" "0,1" bitfld.byte 0x00 6. " DEVICE ,SERIRQ disable" "No,Yes" bitfld.byte 0x00 0.--5. " FRAME ,Select the logical device" "Mailbox,Keyboard controller,ACPI-EC 0,ACPI-EC 1,ACPI-EC 2,ACPI-EC 3,ACPI-EC 4,,,UART 0,UART 1,,LPC interface 0,,,,EM interface 0,EM interface 1,EM interface 2,RTC,?..." endif if (((per.b(ad:0x400F3300+0x45))&0x80)==0x80) group.byte 0x45++0x00 line.byte 0x00 "IRQ5,Serial IRQ5 Configuration Register" bitfld.byte 0x00 7. " SELECT ,Select interrupt signal for the logical device" "0,1" bitfld.byte 0x00 6. " DEVICE ,SERIRQ disable" "No,Yes" bitfld.byte 0x00 0.--5. " FRAME ,Select the logical device" "Mailbox,Keyboard controller,,,,,,,,,,,,,,,EM interface 0,EM interface 1,EM interface 2,?..." else group.byte 0x45++0x00 line.byte 0x00 "IRQ5,Serial IRQ5 Configuration Register" bitfld.byte 0x00 7. " SELECT ,Select interrupt signal for the logical device" "0,1" bitfld.byte 0x00 6. " DEVICE ,SERIRQ disable" "No,Yes" bitfld.byte 0x00 0.--5. " FRAME ,Select the logical device" "Mailbox,Keyboard controller,ACPI-EC 0,ACPI-EC 1,ACPI-EC 2,ACPI-EC 3,ACPI-EC 4,,,UART 0,UART 1,,LPC interface 0,,,,EM interface 0,EM interface 1,EM interface 2,RTC,?..." endif if (((per.b(ad:0x400F3300+0x46))&0x80)==0x80) group.byte 0x46++0x00 line.byte 0x00 "IRQ6,Serial IRQ6 Configuration Register" bitfld.byte 0x00 7. " SELECT ,Select interrupt signal for the logical device" "0,1" bitfld.byte 0x00 6. " DEVICE ,SERIRQ disable" "No,Yes" bitfld.byte 0x00 0.--5. " FRAME ,Select the logical device" "Mailbox,Keyboard controller,,,,,,,,,,,,,,,EM interface 0,EM interface 1,EM interface 2,?..." else group.byte 0x46++0x00 line.byte 0x00 "IRQ6,Serial IRQ6 Configuration Register" bitfld.byte 0x00 7. " SELECT ,Select interrupt signal for the logical device" "0,1" bitfld.byte 0x00 6. " DEVICE ,SERIRQ disable" "No,Yes" bitfld.byte 0x00 0.--5. " FRAME ,Select the logical device" "Mailbox,Keyboard controller,ACPI-EC 0,ACPI-EC 1,ACPI-EC 2,ACPI-EC 3,ACPI-EC 4,,,UART 0,UART 1,,LPC interface 0,,,,EM interface 0,EM interface 1,EM interface 2,RTC,?..." endif if (((per.b(ad:0x400F3300+0x47))&0x80)==0x80) group.byte 0x47++0x00 line.byte 0x00 "IRQ7,Serial IRQ7 Configuration Register" bitfld.byte 0x00 7. " SELECT ,Select interrupt signal for the logical device" "0,1" bitfld.byte 0x00 6. " DEVICE ,SERIRQ disable" "No,Yes" bitfld.byte 0x00 0.--5. " FRAME ,Select the logical device" "Mailbox,Keyboard controller,,,,,,,,,,,,,,,EM interface 0,EM interface 1,EM interface 2,?..." else group.byte 0x47++0x00 line.byte 0x00 "IRQ7,Serial IRQ7 Configuration Register" bitfld.byte 0x00 7. " SELECT ,Select interrupt signal for the logical device" "0,1" bitfld.byte 0x00 6. " DEVICE ,SERIRQ disable" "No,Yes" bitfld.byte 0x00 0.--5. " FRAME ,Select the logical device" "Mailbox,Keyboard controller,ACPI-EC 0,ACPI-EC 1,ACPI-EC 2,ACPI-EC 3,ACPI-EC 4,,,UART 0,UART 1,,LPC interface 0,,,,EM interface 0,EM interface 1,EM interface 2,RTC,?..." endif if (((per.b(ad:0x400F3300+0x48))&0x80)==0x80) group.byte 0x48++0x00 line.byte 0x00 "IRQ8,Serial IRQ8 Configuration Register" bitfld.byte 0x00 7. " SELECT ,Select interrupt signal for the logical device" "0,1" bitfld.byte 0x00 6. " DEVICE ,SERIRQ disable" "No,Yes" bitfld.byte 0x00 0.--5. " FRAME ,Select the logical device" "Mailbox,Keyboard controller,,,,,,,,,,,,,,,EM interface 0,EM interface 1,EM interface 2,?..." else group.byte 0x48++0x00 line.byte 0x00 "IRQ8,Serial IRQ8 Configuration Register" bitfld.byte 0x00 7. " SELECT ,Select interrupt signal for the logical device" "0,1" bitfld.byte 0x00 6. " DEVICE ,SERIRQ disable" "No,Yes" bitfld.byte 0x00 0.--5. " FRAME ,Select the logical device" "Mailbox,Keyboard controller,ACPI-EC 0,ACPI-EC 1,ACPI-EC 2,ACPI-EC 3,ACPI-EC 4,,,UART 0,UART 1,,LPC interface 0,,,,EM interface 0,EM interface 1,EM interface 2,RTC,?..." endif if (((per.b(ad:0x400F3300+0x49))&0x80)==0x80) group.byte 0x49++0x00 line.byte 0x00 "IRQ9,Serial IRQ9 Configuration Register" bitfld.byte 0x00 7. " SELECT ,Select interrupt signal for the logical device" "0,1" bitfld.byte 0x00 6. " DEVICE ,SERIRQ disable" "No,Yes" bitfld.byte 0x00 0.--5. " FRAME ,Select the logical device" "Mailbox,Keyboard controller,,,,,,,,,,,,,,,EM interface 0,EM interface 1,EM interface 2,?..." else group.byte 0x49++0x00 line.byte 0x00 "IRQ9,Serial IRQ9 Configuration Register" bitfld.byte 0x00 7. " SELECT ,Select interrupt signal for the logical device" "0,1" bitfld.byte 0x00 6. " DEVICE ,SERIRQ disable" "No,Yes" bitfld.byte 0x00 0.--5. " FRAME ,Select the logical device" "Mailbox,Keyboard controller,ACPI-EC 0,ACPI-EC 1,ACPI-EC 2,ACPI-EC 3,ACPI-EC 4,,,UART 0,UART 1,,LPC interface 0,,,,EM interface 0,EM interface 1,EM interface 2,RTC,?..." endif if (((per.b(ad:0x400F3300+0x4A))&0x80)==0x80) group.byte 0x4A++0x00 line.byte 0x00 "IRQ10,Serial IRQ10 Configuration Register" bitfld.byte 0x00 7. " SELECT ,Select interrupt signal for the logical device" "0,1" bitfld.byte 0x00 6. " DEVICE ,SERIRQ disable" "No,Yes" bitfld.byte 0x00 0.--5. " FRAME ,Select the logical device" "Mailbox,Keyboard controller,,,,,,,,,,,,,,,EM interface 0,EM interface 1,EM interface 2,?..." else group.byte 0x4A++0x00 line.byte 0x00 "IRQ10,Serial IRQ10 Configuration Register" bitfld.byte 0x00 7. " SELECT ,Select interrupt signal for the logical device" "0,1" bitfld.byte 0x00 6. " DEVICE ,SERIRQ disable" "No,Yes" bitfld.byte 0x00 0.--5. " FRAME ,Select the logical device" "Mailbox,Keyboard controller,ACPI-EC 0,ACPI-EC 1,ACPI-EC 2,ACPI-EC 3,ACPI-EC 4,,,UART 0,UART 1,,LPC interface 0,,,,EM interface 0,EM interface 1,EM interface 2,RTC,?..." endif if (((per.b(ad:0x400F3300+0x4B))&0x80)==0x80) group.byte 0x4B++0x00 line.byte 0x00 "IRQ11,Serial IRQ11 Configuration Register" bitfld.byte 0x00 7. " SELECT ,Select interrupt signal for the logical device" "0,1" bitfld.byte 0x00 6. " DEVICE ,SERIRQ disable" "No,Yes" bitfld.byte 0x00 0.--5. " FRAME ,Select the logical device" "Mailbox,Keyboard controller,,,,,,,,,,,,,,,EM interface 0,EM interface 1,EM interface 2,?..." else group.byte 0x4B++0x00 line.byte 0x00 "IRQ11,Serial IRQ11 Configuration Register" bitfld.byte 0x00 7. " SELECT ,Select interrupt signal for the logical device" "0,1" bitfld.byte 0x00 6. " DEVICE ,SERIRQ disable" "No,Yes" bitfld.byte 0x00 0.--5. " FRAME ,Select the logical device" "Mailbox,Keyboard controller,ACPI-EC 0,ACPI-EC 1,ACPI-EC 2,ACPI-EC 3,ACPI-EC 4,,,UART 0,UART 1,,LPC interface 0,,,,EM interface 0,EM interface 1,EM interface 2,RTC,?..." endif if (((per.b(ad:0x400F3300+0x4C))&0x80)==0x80) group.byte 0x4C++0x00 line.byte 0x00 "IRQ12,Serial IRQ12 Configuration Register" bitfld.byte 0x00 7. " SELECT ,Select interrupt signal for the logical device" "0,1" bitfld.byte 0x00 6. " DEVICE ,SERIRQ disable" "No,Yes" bitfld.byte 0x00 0.--5. " FRAME ,Select the logical device" "Mailbox,Keyboard controller,,,,,,,,,,,,,,,EM interface 0,EM interface 1,EM interface 2,?..." else group.byte 0x4C++0x00 line.byte 0x00 "IRQ12,Serial IRQ12 Configuration Register" bitfld.byte 0x00 7. " SELECT ,Select interrupt signal for the logical device" "0,1" bitfld.byte 0x00 6. " DEVICE ,SERIRQ disable" "No,Yes" bitfld.byte 0x00 0.--5. " FRAME ,Select the logical device" "Mailbox,Keyboard controller,ACPI-EC 0,ACPI-EC 1,ACPI-EC 2,ACPI-EC 3,ACPI-EC 4,,,UART 0,UART 1,,LPC interface 0,,,,EM interface 0,EM interface 1,EM interface 2,RTC,?..." endif if (((per.b(ad:0x400F3300+0x4D))&0x80)==0x80) group.byte 0x4D++0x00 line.byte 0x00 "IRQ13,Serial IRQ13 Configuration Register" bitfld.byte 0x00 7. " SELECT ,Select interrupt signal for the logical device" "0,1" bitfld.byte 0x00 6. " DEVICE ,SERIRQ disable" "No,Yes" bitfld.byte 0x00 0.--5. " FRAME ,Select the logical device" "Mailbox,Keyboard controller,,,,,,,,,,,,,,,EM interface 0,EM interface 1,EM interface 2,?..." else group.byte 0x4D++0x00 line.byte 0x00 "IRQ13,Serial IRQ13 Configuration Register" bitfld.byte 0x00 7. " SELECT ,Select interrupt signal for the logical device" "0,1" bitfld.byte 0x00 6. " DEVICE ,SERIRQ disable" "No,Yes" bitfld.byte 0x00 0.--5. " FRAME ,Select the logical device" "Mailbox,Keyboard controller,ACPI-EC 0,ACPI-EC 1,ACPI-EC 2,ACPI-EC 3,ACPI-EC 4,,,UART 0,UART 1,,LPC interface 0,,,,EM interface 0,EM interface 1,EM interface 2,RTC,?..." endif if (((per.b(ad:0x400F3300+0x4E))&0x80)==0x80) group.byte 0x4E++0x00 line.byte 0x00 "IRQ14,Serial IRQ14 Configuration Register" bitfld.byte 0x00 7. " SELECT ,Select interrupt signal for the logical device" "0,1" bitfld.byte 0x00 6. " DEVICE ,SERIRQ disable" "No,Yes" bitfld.byte 0x00 0.--5. " FRAME ,Select the logical device" "Mailbox,Keyboard controller,,,,,,,,,,,,,,,EM interface 0,EM interface 1,EM interface 2,?..." else group.byte 0x4E++0x00 line.byte 0x00 "IRQ14,Serial IRQ14 Configuration Register" bitfld.byte 0x00 7. " SELECT ,Select interrupt signal for the logical device" "0,1" bitfld.byte 0x00 6. " DEVICE ,SERIRQ disable" "No,Yes" bitfld.byte 0x00 0.--5. " FRAME ,Select the logical device" "Mailbox,Keyboard controller,ACPI-EC 0,ACPI-EC 1,ACPI-EC 2,ACPI-EC 3,ACPI-EC 4,,,UART 0,UART 1,,LPC interface 0,,,,EM interface 0,EM interface 1,EM interface 2,RTC,?..." endif if (((per.b(ad:0x400F3300+0x4F))&0x80)==0x80) group.byte 0x4F++0x00 line.byte 0x00 "IRQ15,Serial IRQ15 Configuration Register" bitfld.byte 0x00 7. " SELECT ,Select interrupt signal for the logical device" "0,1" bitfld.byte 0x00 6. " DEVICE ,SERIRQ disable" "No,Yes" bitfld.byte 0x00 0.--5. " FRAME ,Select the logical device" "Mailbox,Keyboard controller,,,,,,,,,,,,,,,EM interface 0,EM interface 1,EM interface 2,?..." else group.byte 0x4F++0x00 line.byte 0x00 "IRQ15,Serial IRQ15 Configuration Register" bitfld.byte 0x00 7. " SELECT ,Select interrupt signal for the logical device" "0,1" bitfld.byte 0x00 6. " DEVICE ,SERIRQ disable" "No,Yes" bitfld.byte 0x00 0.--5. " FRAME ,Select the logical device" "Mailbox,Keyboard controller,ACPI-EC 0,ACPI-EC 1,ACPI-EC 2,ACPI-EC 3,ACPI-EC 4,,,UART 0,UART 1,,LPC interface 0,,,,EM interface 0,EM interface 1,EM interface 2,RTC,?..." endif group.long 0x60++0x47 "I/O Base Address Registers" line.long 0x00 "LPCI,LPC Interface" hexmask.long.word 0x00 16.--31. 0x01 " LPC_HOST_ADDRESS ,LPC host address" bitfld.long 0x00 15. " VALID ,BAR validation and participate" "Ignored,Valid" rbitfld.long 0x00 8.--13. " FRAME ,Specify a logical device frame number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x00 0.--7. 1. " MASK ,Mask off address bits in LPC I/O and host address" line.long 0x04 "MAILBOX,Mailbox" hexmask.long.word 0x04 16.--31. 0x01 " LPC_HOST_ADDRESS ,LPC host address" bitfld.long 0x04 15. " VALID ,BAR validation and participate" "Ignored,Valid" rbitfld.long 0x04 8.--13. " FRAME ,Specify a logical device frame number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x04 0.--7. 1. " MASK ,Mask off address bits in LPC I/O and host address" line.long 0x08 "EKBC,8042 Emulated Keyboard Controller" hexmask.long.word 0x08 16.--31. 0x01 " LPC_HOST_ADDRESS ,LPC host address" bitfld.long 0x08 15. " VALID ,BAR validation and participate" "Ignored,Valid" rbitfld.long 0x08 8.--13. " FRAME ,Specify a logical device frame number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 0.--7. 1. " MASK ,Mask off address bits in LPC I/O and host address" line.long 0x0C "ACPIECCH0,ACPI EC Channel 0" hexmask.long.word 0x0C 16.--31. 0x01 " LPC_HOST_ADDRESS ,LPC host address" bitfld.long 0x0C 15. " VALID ,BAR validation and participate" "Ignored,Valid" bitfld.long 0x0C 8.--13. " FRAME ,Specify a logical device frame number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x0C 0.--7. 1. " MASK ,Mask off address bits in LPC I/O and host address" line.long 0x10 "ACPIECCH1,ACPI EC Channel 1" hexmask.long.word 0x10 16.--31. 0x01 " LPC_HOST_ADDRESS ,LPC host address" bitfld.long 0x10 15. " VALID ,BAR validation and participate" "Ignored,Valid" rbitfld.long 0x10 8.--13. " FRAME ,Specify a logical device frame number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x10 0.--7. 1. " MASK ,Mask off address bits in LPC I/O and Host address" line.long 0x14 "ACPIECCH2,ACPI EC Channel 2" hexmask.long.word 0x14 16.--31. 0x01 " LPC_HOST_ADDRESS ,LPC host address" bitfld.long 0x14 15. " VALID ,BAR validation and participate" "Ignored,Valid" rbitfld.long 0x14 8.--13. " FRAME ,Specify a logical device frame number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x14 0.--7. 1. " MASK ,Mask off address bits in LPC I/O and host address" line.long 0x18 "ACPIECCH3,ACPI EC Channel 3" hexmask.long.word 0x18 16.--31. 0x01 " LPC_HOST_ADDRESS ,LPC host address" bitfld.long 0x18 15. " VALID ,BAR validation and participate" "Ignored,Valid" rbitfld.long 0x18 8.--13. " FRAME ,Specify a logical device frame number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x18 0.--7. 1. " MASK ,Mask off address bits in LPC I/O and host address" line.long 0x1C "ACPIECCH4,ACPI EC Channel 4" hexmask.long.word 0x1C 16.--31. 0x01 " LPC_HOST_ADDRESS ,LPC host address" bitfld.long 0x1C 15. " VALID ,BAR validation and participate" "Ignored,Valid" rbitfld.long 0x1C 8.--13. " FRAME ,Specify a logical device frame number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x1C 0.--7. 1. " MASK ,Mask off address bits in LPC I/O and host address" line.long 0x20 "ACPIPM1,ACPI PM 1" hexmask.long.word 0x20 16.--31. 0x01 " LPC_HOST_ADDRESS ,LPC host address" bitfld.long 0x20 15. " VALID ,BAR validation and participate" "Ignored,Valid" rbitfld.long 0x20 8.--13. " FRAME ,Specify a logical device frame number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x20 0.--7. 1. " MASK ,Mask off address bits in LPC I/O and host address" line.long 0x24 "LEGACY,Legacy" hexmask.long.word 0x24 16.--31. 0x01 " LPC_HOST_ADDRESS ,LPC host address" bitfld.long 0x24 15. " VALID ,BAR validation and participate" "Ignored,Valid" rbitfld.long 0x24 8.--13. " FRAME ,Specify a logical device frame number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x24 0.--7. 1. " MASK ,Mask off address bits in LPC I/O and host address" line.long 0x28 "UART0,UART 0" hexmask.long.word 0x28 16.--31. 0x01 " LPC_HOST_ADDRESS ,LPC host address" bitfld.long 0x28 15. " VALID ,BAR validation and participate" "Ignored,Valid" rbitfld.long 0x28 8.--13. " FRAME ,Specify a logical device frame number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x28 0.--7. 1. " MASK ,Mask off address bits in LPC I/O and host address" line.long 0x2C "UART1,UART 1" hexmask.long.word 0x2C 16.--31. 0x01 " LPC_HOST_ADDRESS ,LPC host address" bitfld.long 0x2C 15. " VALID ,BAR validation and participate" "Ignored,Valid" rbitfld.long 0x2C 8.--13. " FRAME ,Specify a logical device frame number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x2C 0.--7. 1. " MASK ,Mask off address bits in LPC I/O and host address" line.long 0x30 "EMI0,Embedded Memory Interface 0" hexmask.long.word 0x30 16.--31. 0x01 " LPC_HOST_ADDRESS ,LPC host address" bitfld.long 0x30 15. " VALID ,BAR validation and participate" "Ignored,Valid" rbitfld.long 0x30 8.--13. " FRAME ,Specify a logical device frame number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x30 0.--7. 1. " MASK ,Mask off address bits in LPC I/O and host address" line.long 0x34 "EMI1,Embedded Memory Interface 1" hexmask.long.word 0x34 16.--31. 0x01 " LPC_HOST_ADDRESS ,LPC host address" bitfld.long 0x34 15. " VALID ,BAR validation and participate" "Ignored,Valid" rbitfld.long 0x34 8.--13. " FRAME ,Specify a logical device frame number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x34 0.--7. 1. " MASK ,Mask off address bits in LPC I/O and host address" line.long 0x38 "EMI2,Embedded Memory Interface 2" hexmask.long.word 0x38 16.--31. 0x01 " LPC_HOST_ADDRESS ,LPC host address" bitfld.long 0x38 15. " VALID ,BAR validation and participate" "Ignored,Valid" rbitfld.long 0x38 8.--13. " FRAME ,Specify a logical device frame number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x38 0.--7. 1. " MASK ,Mask off address bits in LPC I/O and host address" line.long 0x3C "BIOSDP0,BIOS Debug Port 0" hexmask.long.word 0x3C 16.--31. 0x01 " LPC_HOST_ADDRESS ,LPC host address" bitfld.long 0x3C 15. " VALID ,BAR validation and participate" "Ignored,Valid" rbitfld.long 0x3C 8.--13. " FRAME ,Specify a logical device frame number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x3C 0.--7. 1. " MASK ,Mask off address bits in LPC I/O and host address" line.long 0x40 "BIOSDP1,BIOS Debug Port 1" hexmask.long.word 0x40 16.--31. 0x01 " LPC_HOST_ADDRESS ,LPC host address" bitfld.long 0x40 15. " VALID ,BAR validation and participate" "Ignored,Valid" rbitfld.long 0x40 8.--13. " FRAME ,Specify a logical device frame number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x40 0.--7. 1. " MASK ,Mask off address bits in LPC I/O and host address" line.long 0x44 "RTC,Real Time Clock" hexmask.long.word 0x44 16.--31. 0x01 " LPC_HOST_ADDRESS ,LPC host address" bitfld.long 0x44 15. " VALID ,BAR validation and participate" "Ignored,Valid" rbitfld.long 0x44 8.--13. " FRAME ,Specify a logical device frame number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x44 0.--7. 1. " MASK ,Mask off address bits in LPC I/O and host address" group.quad 0xB0++0x0F "SRAM Base Address Registers" line.quad 0x00 "SRAMBAR0,SRAM BAR 0" hexmask.quad.long 0x00 32.--63. 0x01 " LPC_HOST_ADDRESS ,LPC memory addresses" bitfld.quad 0x00 7. " VALID ,SRAM memory BAR is valid" "Ignored,Valid" line.quad 0x08 "SRAMBAR1,SRAM BAR 1" hexmask.quad.long 0x08 32.--63. 0x01 " LPC_HOST_ADDRESS ,LPC memory addresses" bitfld.quad 0x08 7. " VALID ,SRAM memory BAR is valid" "Ignored,Valid" group.word 0xC0++0x35 line.word 0x00 "MAILBOX[0:15],Mailbox Register [0:15]" bitfld.word 0x00 15. " VALID ,BAR validation and participate" "Ignored,Valid" rbitfld.word 0x00 8.--13. " FRAME ,Specify a logical device frame number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.word.byte 0x00 0.--7. 1. " MASK ,Mask off address bits in LPC I/O and host address" line.word 0x02 "MAILBOX[16:31],Mailbox Register [16:31]" line.word 0x04 "MAILBOX[32:47],Mailbox Register [32:47]" group.word 0xC6++0x05 line.word 0x00 "ACPIECCH0[0:15],ACPI EC Channel 0 Register [0:15]" bitfld.word 0x00 15. " VALID ,BAR validation and participate" "Ignored,Valid" rbitfld.word 0x00 8.--13. " FRAME ,Specify a logical device frame number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.word.byte 0x00 0.--7. 1. " MASK ,Mask off address bits in LPC I/O and host address" line.word 0x02 "ACPIECCH0[16:31],ACPI EC Channel 0 Register [16:31]" line.word 0x04 "ACPIECCH0[32:47],ACPI EC Channel 0 Register [32:47]" group.word 0xCC++0x05 line.word 0x00 "ACPIECCH1[0:15],ACPI EC Channel 1 Register [0:15]" bitfld.word 0x00 15. " VALID ,BAR validation and participate" "Ignored,Valid" rbitfld.word 0x00 8.--13. " FRAME ,Specify a logical device frame number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.word.byte 0x00 0.--7. 1. " MASK ,Mask off address bits in LPC I/O and host address" line.word 0x02 "ACPIECCH1[16:31],ACPI EC Channel 1 Register [16:31]" line.word 0x04 "ACPIECCH1[32:47],ACPI EC Channel 1 Register [32:47]" group.word 0xD2++0x05 line.word 0x00 "ACPIECCH2[0:15],ACPI EC Channel 2 Register [0:15]" bitfld.word 0x00 15. " VALID ,BAR validation and participate" "Ignored,Valid" rbitfld.word 0x00 8.--13. " FRAME ,Specify a logical device frame number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.word.byte 0x00 0.--7. 1. " MASK ,Mask off address bits in LPC I/O and host address" line.word 0x02 "ACPIECCH2[16:31],ACPI EC Channel 2 Register [16:31]" line.word 0x04 "ACPIECCH2[32:47],ACPI EC Channel 2 Register [32:47]" group.word 0xD8++0x05 line.word 0x00 "ACPIECCH3[0:15],ACPI EC Channel 3 Register [0:15]" bitfld.word 0x00 15. " VALID ,BAR validation and participate" "Ignored,Valid" rbitfld.word 0x00 8.--13. " FRAME ,Specify a logical device frame number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.word.byte 0x00 0.--7. 1. " MASK ,Mask off address bits in LPC I/O and host address" line.word 0x02 "ACPIECCH3[16:31],ACPI EC Channel 3 Register [16:31]" line.word 0x04 "ACPIECCH3[32:47],ACPI EC Channel 3 Register [32:47]" group.word 0xDE++0x05 line.word 0x00 "ACPIECCH4[0:15],ACPI EC Channel 4 Register [0:15]" bitfld.word 0x00 15. " VALID ,BAR validation and participate" "Ignored,Valid" rbitfld.word 0x00 8.--13. " FRAME ,Specify a logical device frame number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.word.byte 0x00 0.--7. 1. " MASK ,Mask off address bits in LPC I/O and host address" line.word 0x02 "ACPIECCH4[16:31],ACPI EC Channel 4 Register [16:31]" line.word 0x04 "ACPIECCH4[32:47],ACPI EC Channel 4 Register [32:47]" group.word 0xE4++0x05 line.word 0x00 "EMI0[0:15],Embedded Memory Interface 0 Register [0:15]" bitfld.word 0x00 15. " VALID ,BAR validation and participate" "Ignored,Valid" rbitfld.word 0x00 8.--13. " FRAME ,Specify a logical device frame number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.word.byte 0x00 0.--7. 1. " MASK ,Mask off address bits in LPC I/O and host address" line.word 0x02 "EMI0[16:31],Embedded Memory Interface 0 Register [16:31]" line.word 0x04 "EMI0[32:47],Embedded Memory Interface 0 Register [32:47]" group.word 0xEA++0x05 line.word 0x00 "EMI1[0:15],Embedded Memory Interface 1 Register [0:15]" bitfld.word 0x00 15. " VALID ,BAR validation and participate" "Ignored,Valid" rbitfld.word 0x00 8.--13. " FRAME ,Specify a logical device frame number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.word.byte 0x00 0.--7. 1. " MASK ,Mask off address bits in LPC I/O and host address" line.word 0x02 "EMI1[16:31],Embedded Memory Interface 1 Register [16:31]" line.word 0x04 "EMI1[32:47],Embedded Memory Interface 1 Register [32:47]" group.word 0xF0++0x05 line.word 0x00 "EMI2[0:15],Embedded Memory Interface 2 Register [0:15]" bitfld.word 0x00 15. " VALID ,BAR validation and participate" "Ignored,Valid" rbitfld.word 0x00 8.--13. " FRAME ,Specify a logical device frame number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.word.byte 0x00 0.--7. 1. " MASK ,Mask off address bits in LPC I/O and host address" line.word 0x02 "EMI2[16:31],Embedded Memory Interface 2 Register [16:31]" line.word 0x04 "EMI2[32:47],Embedded Memory Interface 2 Register [32:47]" width 0x0B tree.end tree "EC (Embedded Controller)" base ad:0x400F3000 width 11. rgroup.long 0x104++0x03 line.long 0x00 "BMR,Bus Monitor Register" bitfld.long 0x00 1. " LRESET_STATUS ,Reflects the state of the LRESET# input pin" "Deasserted,Asserted" bitfld.long 0x00 0. " TEST ,TEST" "0,1" group.long 0x108++0x0B line.long 0x00 "HBER,Host Bus Error Register" hexmask.long.tbyte 0x00 8.--31. 0x01 " ERROR_ADDRESS ,24-bit internal address of every LPC transaction" eventfld.long 0x00 5. " DMA_ERR ,DMA error flag" "No error,Error" eventfld.long 0x00 4. " CONFIG_ERR ,Config error flag" "No error,Error" newline eventfld.long 0x00 3. " RUNTIME_ERR ,Runtime error flag" "No error,Error" eventfld.long 0x00 2. " BAR_CONFLICT ,BAR conflict occurs on an LPC address" "No error,Error" eventfld.long 0x00 1. " EN_INTERNAL_ERR ,Conflict two BARS match the same LPC I/O address" "No error,Error" newline eventfld.long 0x00 0. " LPC_INTERNAL_ERR ,Conflict/Internal bus error occurs as a result of LPC access" "No error,Error" line.long 0x04 "ECSERIRQR,EC SERIRQ Register" bitfld.long 0x04 0. " EC_IRQ ,Embedded controller interrupt" "No interrupt,Interrupt" newline line.long 0x08 "ECCCR,EC Clock Control Register" rbitfld.long 0x08 2. " TEST ,TEST" "0,1" bitfld.long 0x08 0.--1. " CLOCK_CONTROL ,Clock sleep mode" "LPCPD# is low,CLKRUN# is high,Every LPC transaction,Inhibited when host interface active" rgroup.long 0x114++0x07 line.long 0x00 "MCHPTR,MCHP Test Register" hexmask.long.byte 0x00 0.--7. 1. " TEST ,TEST" line.long 0x04 "MCHPTR,MCHP Test Register" bitfld.long 0x04 1. " TEST ,TEST" "0,1" bitfld.long 0x04 0. " TEST ,TEST" "0,1" group.quad 0x120++0x07 line.quad 0x00 "BARIR,BAR Inhibit Register" rgroup.long 0x128++0x07 line.long 0x00 "TEST,TEST" line.long 0x04 "TEST,TEST" group.word 0x130++0x01 line.word 0x00 "LPCBARIR,BAR Init Register" group.long 0x1F8++0x07 "SRAM Base Address Registers" line.long 0x00 "SRAMBAR0,SRAM BAR 0" hexmask.long.tbyte 0x00 8.--31. 1. " AHB_BASE ,24 bits define base of a region in AHB address space" bitfld.long 0x00 7. " INHIBIT ,Host access to the memory block" "AHB base/size,Inhibited" line.long 0x04 "SRAMBAR0,SRAM BAR 0" hexmask.long.tbyte 0x04 8.--31. 1. " AHB_BASE ,24 bits define base of a region in AHB address space" bitfld.long 0x04 7. " INHIBIT ,Host access to the memory block" "AHB base/size,Inhibited" width 0x0B tree.end tree.end tree "eSPI (Enhanced Serial Peripheral Interface)" tree "eSPI I/O Component" base ad:0x400F3400 width 27. tree "EC PRIVATE REGISTERS" tree "Peripheral Channel" group.long 0x100++0x03 line.long 0x00 "PCLCR,Peripheral Channel Last Cycle Register" group.long 0x10C++0x03 line.long 0x00 "PCEAR,Peripheral Channel Error Address Register" group.long 0x114++0x07 line.long 0x00 "PCSR,Peripheral Channel Status Register" line.long 0x04 "PCIER,Peripheral Channel Interrupt Enable Register" group.long 0x120++0x03 line.long 0x00 "BAR_INHIBIT_REGISTER,BAR Inhibit Register" group.long 0x128++0x07 line.long 0x00 "eSPI_BAR_INIT_REGISTER,eSPI BAR Init Register" line.long 0x04 "EC_IRQ_REGISTER,EC IRQ Register" rgroup.long 0x130++0x03 line.long 0x00 "TEST,Test Register" group.long 0x134++0x4B line.long 0x00 "eSPI_I/O_COMPONENT,eSPI I/O Component" line.long 0x04 "eSPI_MEMORY_COMPONENT,eSPI Memory Component" line.long 0x08 "MAILBOX,Mailbox" line.long 0x0C "8042_EMU_KYBD_CNTRLR,8042 Emulated Keyboard Controller" line.long 0x10 "ACPI_EC_CHANN_0,ACPI EC Channel 0" line.long 0x14 "ACPI_EC_CHANN_1,ACPI EC Channel 1" line.long 0x18 "ACPI_EC_CHANN_2,ACPI EC Channel 2" line.long 0x1C "ACPI_EC_CHANN_3,ACPI EC Channel 3" line.long 0x20 "ACPI_EC_CHANN_4,ACPI EC Channel 4" line.long 0x24 "ACPI_PM1,ACPI PM1" line.long 0x28 "LEGACY(FAST_KYBD),Legacy (Fast Keyboard)" line.long 0x2C "UART_0,UART 0" line.long 0x30 "UART_1,UART 1" line.long 0x34 "EMI_0,Embedded Memory Interface 0" line.long 0x38 "EMI_1,Embedded Memory Interface 1" line.long 0x3C "EMI_2,Embedded Memory Interface 2" line.long 0x40 "BIOS_DEBUG_PORT_0,BIOS Debug Port (Port 80) 0" line.long 0x44 "BIOS_DEBUG_PORT_1,BIOS Debug Port (Port 80) 1" line.long 0x48 "RTC,Real Time Clock" group.long 0x220++0x0F line.long 0x00 "LTR_PSR,LTR Peripheral Status Register" line.long 0x04 "LTR_PER,LTR Peripheral Enable Register" line.long 0x08 "LTR_PCR,LTR Peripheral Control Register" line.long 0x0C "LTR_PMR,LTR Peripheral Message Register" tree.end tree "OOB Channel" group.long 0x240++0x03 line.long 0x00 "OOB_CRAR,OOB Channel Receive Address Register" group.long 0x248++0x03 line.long 0x00 "OOB_CTAR,OOB Channel Transmit Address Register" group.long 0x250++0x1F line.long 0x00 "OOB_CRLR,OOB Channel Receive Length Register" line.long 0x04 "OOB_CTLR,OOB Channel Transmit Length Register" line.long 0x08 "OOB_CRCR,OOB Channel Receive Control Register" line.long 0x0C "OOB_CRIER,OOB Channel Receive Interrupt Enable Register" line.long 0x10 "OOB_CRSR,OOB Channel Receive Status Register" line.long 0x14 "OOB_CTCR,OOB Channel Transmit Control Register" line.long 0x18 "OOB_CTIER,OOB Channel Transmit Interrupt Enable Register" line.long 0x1C "OOB_CTSR,OOB Channel Transmit Status Register" tree.end tree "Flash Channel" group.long 0x280++0x03 line.long 0x00 "FACFAR,Flash Access Channel Flash Address Register" group.long 0x288++0x03 line.long 0x00 "FACBAR,Flash Access Channel Buffer Address Register" group.long 0x290++0x13 line.long 0x00 "FACTLR,Flash Access Channel Transfer Length Register" line.long 0x04 "FACCR,Flash Access Channel Control Register" line.long 0x08 "FACIER,Flash Access Channel Interrupt Enable Register" line.long 0x0C "FACCR,Flash Access Channel Configuration Register" line.long 0x10 "FACSR,Flash Access Channel Status Register" tree.end tree "Virtual Wire Channel" group.long 0x2B0++0x03 line.long 0x00 "VWS,Virtual Wire Status" tree.end tree "eSPI Global" group.byte 0x2E0++0x0C line.byte 0x00 "eSPI_C_ID_REG,eSPI Capabilities ID Register" line.byte 0x01 "eSPI_CGC_0_REG,eSPI Capabilities Global Capabilities 0 Register" line.byte 0x02 "eSPI_CGC_1_REG,eSPI Capabilities Global Capabilities 1 Register" line.byte 0x03 "eSPI_PCC_REG,eSPI Peripheral Channel Capabilities Register" line.byte 0x04 "eSPI_VWCC_REG,eSPI Virtual Wire Channel Capabilities Register" line.byte 0x05 "eSPI_OOB_CC_REG,eSPI OOB Channel Capabilities Register" line.byte 0x06 "eSPI_FCC_REG,eSPI Flash Channel Capabilities Register" line.byte 0x07 "eSPI_PCR_REG,eSPI Peripheral Channel Ready Register" line.byte 0x08 "eSPI_OOB_CR_REG,eSPI OOB Channel Ready Register" line.byte 0x09 "eSPI_FCR_REG,eSPI Flash Channel Ready Register" line.byte 0x0A "eSPI_RIS_REG,eSPI Reset Interrupt Status Register" line.byte 0x0B "eSPI_RIE_REG,eSPI Reset Interrupt Enable Register" line.byte 0x0C "PLTRST_SRC_REG,PLTRST Source Register" rgroup.quad 0x10++0x0F line.quad 0x00 "TEST,Test Register" line.quad 0x08 "TEST,Test Register" tree.end tree.end tree "CONFIGURATION REGISTERS" tree "Peripheral Channel" group.long 0x330++0x4F line.long 0x00 "eSPI_ACT_REG,eSPI Activate Register" line.long 0x04 "eSPI_I/O_COMPONENT,eSPI I/O Component" line.long 0x08 "eSPI_MEMORY_COMPONENT,eSPI Memory Component" line.long 0x0C "MAILBOX,Mailbox" line.long 0x10 "8042_EMU_KYBD_CNTRLR,8042 Emulated Keyboard Controller" line.long 0x14 "ACPI_EC_CHANN_0,ACPI EC Channel 0" line.long 0x18 "ACPI_EC_CHANN_1,ACPI EC Channel 1" line.long 0x1C "ACPI_EC_CHANN_2,ACPI EC Channel 2" line.long 0x20 "ACPI_EC_CHANN_3,ACPI EC Channel 3" line.long 0x24 "ACPI_EC_CHANN_4,ACPI EC Channel 4" line.long 0x28 "ACPI_PM1,ACPI PM1" line.long 0x2C "LEGACY(FAST_KYBD),Legacy (Fast Keyboard)" line.long 0x30 "UART_0,UART 0" line.long 0x34 "UART_1,UART 1" line.long 0x38 "EMI_0,Embedded Memory Interface 0" line.long 0x3C "EMI_1,Embedded Memory Interface 1" line.long 0x40 "EMI_2,Embedded Memory Interface 2" line.long 0x44 "BIOS_DEBUG_PORT_0,BIOS Debug Port (Port 80) 0" line.long 0x48 "BIOS_DEBUG_PORT_1,BIOS Debug Port (Port 80) 1" line.long 0x4C "RTC,Real Time Clock" tree.end tree "Virtual Wire Channel" group.byte 0x3AC++0x12 line.byte 0x00 "MBX_Host_SIRQ,Mailbox SERIRQ 0" line.byte 0x01 "MBX_Host_SMI,Mailbox SERIRQ 1" line.byte 0x02 "KIRQ,8042 SERIRQ 0" line.byte 0x03 "MIRQ,8042 SERIRQ 1" line.byte 0x04 "EC_OBE_INST_0_IRQ,ACPI EC 0 SERIRQ" line.byte 0x05 "EC_OBE_INST_1_IRQ,ACPI EC 1 SERIRQ" line.byte 0x06 "EC_OBE_INST_2_IRQ,ACPI EC 2 SERIRQ" line.byte 0x07 "EC_OBE_INST_3_IRQ,ACPI EC 3 SERIRQ" line.byte 0x08 "EC_OBE_INST_4_IRQ,ACPI EC 4 SERIRQ" line.byte 0x09 "UART_INST_0_IRQ,UART 0 SERIRQ" line.byte 0x0A "UART_INST_1_IRQ,UART 1 SERIRQ" line.byte 0x0B "EMI_HOST_EVENT_INST_0_IRQ,EMI 0 SERIRQ 0" line.byte 0x0C "EMI_EC_TO_HOST_INST_0_IRQ,EMI 0 SERIRQ 1" line.byte 0x0D "EMI_HOST_EVENT_INST_1_IRQ,EMI 1 SERIRQ 0" line.byte 0x0E "EMI_EC_TO_HOST_INST_1_IRQ,EMI 1 SERIRQ 1" line.byte 0x0F "EMI_HOST_EVENT_INST_2_IRQ,EMI 2 SERIRQ 0" line.byte 0x10 "EMI_EC_TO_HOST_INST_2_IRQ,EMI 2 SERIRQ 1" line.byte 0x11 "RTC_IRQ,RTC SERIRQ" line.byte 0x12 "EC_IRQ,EC SERIRQ" group.long 0x3F0++0x03 line.long 0x00 "eSPI_VIRT_WIRE_ERR,eSPI Virtual Wire Errors" tree.end tree.end width 0x0B tree.end tree "eSPI Memory Component" base ad:0x400F3800 width 19. group.word 0x130++0x05 "EC-Only" line.word 0x00 "MAILBOX[0:15],Mailbox Register [0:15]" bitfld.word 0x00 15. " VALID ,BAR validation and participate" "Ignored,Valid" rbitfld.word 0x00 8.--13. " FRAME ,Specify a logical device frame number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.word.byte 0x00 0.--7. 1. " MASK ,Mask off address bits in LPC I/O and host address" line.word 0x02 "MAILBOX[16:31],Mailbox Register [16:31]" line.word 0x04 "MAILBOX[32:47],Mailbox Register [32:47]" group.word 0x13A++0x05 line.word 0x00 "ACPIECCH0[0:15],ACPI EC Channel 0 Register [0:15]" bitfld.word 0x00 15. " VALID ,BAR validation and participate" "Ignored,Valid" rbitfld.word 0x00 8.--13. " FRAME ,Specify a logical device frame number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.word.byte 0x00 0.--7. 1. " MASK ,Mask off address bits in LPC I/O and host address" line.word 0x02 "ACPIECCH0[16:31],ACPI EC Channel 0 Register [16:31]" line.word 0x04 "ACPIECCH0[32:47],ACPI EC Channel 0 Register [32:47]" group.word 0x144++0x05 line.word 0x00 "ACPIECCH1[0:15],ACPI EC Channel 1 Register [0:15]" bitfld.word 0x00 15. " VALID ,BAR validation and participate" "Ignored,Valid" rbitfld.word 0x00 8.--13. " FRAME ,Specify a logical device frame number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.word.byte 0x00 0.--7. 1. " MASK ,Mask off address bits in LPC I/O and host address" line.word 0x02 "ACPIECCH1[16:31],ACPI EC Channel 1 Register [16:31]" line.word 0x04 "ACPIECCH1[32:47],ACPI EC Channel 1 Register [32:47]" group.word 0x14E++0x05 line.word 0x00 "ACPIECCH2[0:15],ACPI EC Channel 2 Register [0:15]" bitfld.word 0x00 15. " VALID ,BAR validation and participate" "Ignored,Valid" rbitfld.word 0x00 8.--13. " FRAME ,Specify a logical device frame number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.word.byte 0x00 0.--7. 1. " MASK ,Mask off address bits in LPC I/O and host address" line.word 0x02 "ACPIECCH2[16:31],ACPI EC Channel 2 Register [16:31]" line.word 0x04 "ACPIECCH2[32:47],ACPI EC Channel 2 Register [32:47]" group.word 0x158++0x05 line.word 0x00 "ACPIECCH3[0:15],ACPI EC Channel 3 Register [0:15]" bitfld.word 0x00 15. " VALID ,BAR validation and participate" "Ignored,Valid" rbitfld.word 0x00 8.--13. " FRAME ,Specify a logical device frame number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.word.byte 0x00 0.--7. 1. " MASK ,Mask off address bits in LPC I/O and host address" line.word 0x02 "ACPIECCH3[16:31],ACPI EC Channel 3 Register [16:31]" line.word 0x04 "ACPIECCH3[32:47],ACPI EC Channel 3 Register [32:47]" group.word 0x162++0x05 line.word 0x00 "ACPIECCH4[0:15],ACPI EC Channel 4 Register [0:15]" bitfld.word 0x00 15. " VALID ,BAR validation and participate" "Ignored,Valid" rbitfld.word 0x00 8.--13. " FRAME ,Specify a logical device frame number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.word.byte 0x00 0.--7. 1. " MASK ,Mask off address bits in LPC I/O and host address" line.word 0x02 "ACPIECCH4[16:31],ACPI EC Channel 4 Register [16:31]" line.word 0x04 "ACPIECCH4[32:47],ACPI EC Channel 4 Register [32:47]" group.word 0x16C++0x05 line.word 0x00 "EMI0[0:15],Embedded Memory Interface 0 Register [0:15]" bitfld.word 0x00 15. " VALID ,BAR validation and participate" "Ignored,Valid" rbitfld.word 0x00 8.--13. " FRAME ,Specify a logical device frame number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.word.byte 0x00 0.--7. 1. " MASK ,Mask off address bits in LPC I/O and host address" line.word 0x02 "EMI0[16:31],Embedded Memory Interface 0 Register [16:31]" line.word 0x04 "EMI0[32:47],Embedded Memory Interface 0 Register [32:47]" group.word 0x176++0x05 line.word 0x00 "EMI1[0:15],Embedded Memory Interface 1 Register [0:15]" bitfld.word 0x00 15. " VALID ,BAR validation and participate" "Ignored,Valid" rbitfld.word 0x00 8.--13. " FRAME ,Specify a logical device frame number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.word.byte 0x00 0.--7. 1. " MASK ,Mask off address bits in LPC I/O and host address" line.word 0x02 "EMI1[16:31],Embedded Memory Interface 1 Register [16:31]" line.word 0x04 "EMI1[32:47],Embedded Memory Interface 1 Register [32:47]" group.word 0x180++0x05 line.word 0x00 "EMI2[0:15],Embedded Memory Interface 2 Register [0:15]" bitfld.word 0x00 15. " VALID ,BAR validation and participate" "Ignored,Valid" rbitfld.word 0x00 8.--13. " FRAME ,Specify a logical device frame number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.word.byte 0x00 0.--7. 1. " MASK ,Mask off address bits in LPC I/O and host address" line.word 0x02 "EMI2[16:31],Embedded Memory Interface 2 Register [16:31]" line.word 0x04 "EMI2[32:47],Embedded Memory Interface 2 Register [32:47]" group.word 0x1AC++0x01 line.word 0x00 "SRAM_BAR_0[0:15],SRAM Base Address Register 0 [0:15]" bitfld.word 0x00 4.--7. " SIZE ,Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 1.--2. " ACCESS ,Access" "0,1,2,3" bitfld.word 0x00 0. " VALID ,Valid" "0,1" group.long 0x1B0++0x03 line.long 0x00 "SRAM_BAR_0[16:47],SRAM Base Address Register 0 [16:47]" group.word 0x1B6++0x01 line.word 0x00 "SRAM_BAR_1[0:15],SRAM Base Address Register 1 [0:15]" bitfld.word 0x00 4.--7. " SIZE ,Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 1.--2. " ACCESS ,Access" "0,1,2,3" bitfld.word 0x00 0. " VALID ,Valid" "0,1" group.long 0x1B8++0x03 line.long 0x00 "SRAM_BAR_1[16:47],SRAM Base Address Register 1 [16:47]" width 35. group.long 0x200++0x0B "BUS MSTR" line.long 0x00 "BUS_MSTR_STAT_REGISTER,Bus Master Status Register" line.long 0x04 "BUS_MSTR_IR_EN_REGISTER,Bus Master Interrupt Enable Register" line.long 0x08 "BUS_MSTR_CONFIG_REGISTER,Bus Master Configuration Register" group.long 0x210++0x13 line.long 0x00 "BUS_MSTR_1_CNTRL_REG,Bus Master 1 Control Register" line.long 0x04 "BUS_MSTR_1_HOST_ADDR_REG[0:31],Bus Master 1 Host Address Register [0:31]" line.word 0x08 "BUS_MSTR_1_HOST_ADDR_REG[32:63],Bus Master 1 Host Address Register [32:63]" line.word 0x0C "BUS_MSTR_1_INTRNL_ADDR_REG[0:31],Bus Master 1 Internal Address Register [0:31]" line.word 0x10 "BUS_MSTR_1_INTRNL_ADDR_REG[32:63],Bus Master 1 Internal Address Register [32:63]" group.long 0x224++0x13 line.long 0x00 "BUS_MSTR_2_CNTRL_REG,Bus Master 2 Control Register" line.long 0x04 "BUS_MSTR_2_HOST_ADDR_REG[0:31],Bus Master 2 Host Address Register [0:31]" line.word 0x08 "BUS_MSTR_2_HOST_ADDR_REG[32:63],Bus Master 2 Host Address Register [32:63]" line.word 0x0C "BUS_MSTR_2_INTRNL_ADDR_REG[0:31],Bus Master 2 Internal Address Register [0:31]" line.word 0x10 "BUS_MSTR_2_INTRNL_ADDR_REG[32:63],Bus Master 2 Internal Address Register [32:63]" width 20. group.long 0x330++0x07 "EC" line.long 0x00 "MAILBOX_BAR[0:31],Mailbox BAR Register [0:31]" line.long 0x04 "MAILBOX_BAR[32:63],Mailbox BAR Register [32:63]" group.word 0x338++0x01 line.word 0x00 "MAILBOX_BAR[64:79],Mailbox BAR Register [64:79]" group.word 0x33A++0x05 line.word 0x00 "ACPIECCH0[0:15],ACPI EC Channel 0 Register [0:15]" bitfld.word 0x00 15. " VALID ,BAR validation and participate" "Ignored,Valid" rbitfld.word 0x00 8.--13. " FRAME ,Specify a logical device frame number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.word.byte 0x00 0.--7. 1. " MASK ,Mask off address bits in LPC I/O and host address" line.word 0x02 "ACPIECCH0[16:31],ACPI EC Channel 0 Register [16:31]" line.word 0x04 "ACPIECCH0[32:47],ACPI EC Channel 0 Register [32:47]" group.word 0x344++0x05 line.word 0x00 "ACPIECCH1[0:15],ACPI EC Channel 1 Register [0:15]" bitfld.word 0x00 15. " VALID ,BAR validation and participate" "Ignored,Valid" rbitfld.word 0x00 8.--13. " FRAME ,Specify a logical device frame number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.word.byte 0x00 0.--7. 1. " MASK ,Mask off address bits in LPC I/O and host address" line.word 0x02 "ACPIECCH1[16:31],ACPI EC Channel 1 Register [16:31]" line.word 0x04 "ACPIECCH1[32:47],ACPI EC Channel 1 Register [32:47]" group.word 0x34E++0x05 line.word 0x00 "ACPIECCH2[0:15],ACPI EC Channel 2 Register [0:15]" bitfld.word 0x00 15. " VALID ,BAR validation and participate" "Ignored,Valid" rbitfld.word 0x00 8.--13. " FRAME ,Specify a logical device frame number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.word.byte 0x00 0.--7. 1. " MASK ,Mask off address bits in LPC I/O and host address" line.word 0x02 "ACPIECCH2[16:31],ACPI EC Channel 2 Register [16:31]" line.word 0x04 "ACPIECCH2[32:47],ACPI EC Channel 2 Register [32:47]" group.word 0x358++0x05 line.word 0x00 "ACPIECCH3[0:15],ACPI EC Channel 3 Register [0:15]" bitfld.word 0x00 15. " VALID ,BAR validation and participate" "Ignored,Valid" rbitfld.word 0x00 8.--13. " FRAME ,Specify a logical device frame number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.word.byte 0x00 0.--7. 1. " MASK ,Mask off address bits in LPC I/O and host address" line.word 0x02 "ACPIECCH3[16:31],ACPI EC Channel 3 Register [16:31]" line.word 0x04 "ACPIECCH3[32:47],ACPI EC Channel 3 Register [32:47]" group.word 0x362++0x05 line.word 0x00 "ACPIECCH4[0:15],ACPI EC Channel 4 Register [0:15]" bitfld.word 0x00 15. " VALID ,BAR validation and participate" "Ignored,Valid" rbitfld.word 0x00 8.--13. " FRAME ,Specify a logical device frame number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.word.byte 0x00 0.--7. 1. " MASK ,Mask off address bits in LPC I/O and host address" line.word 0x02 "ACPIECCH4[16:31],ACPI EC Channel 4 Register [16:31]" line.word 0x04 "ACPIECCH4[32:47],ACPI EC Channel 4 Register [32:47]" group.word 0x36C++0x05 line.word 0x00 "EMI0[0:15],Embedded Memory Interface 0 Register [0:15]" bitfld.word 0x00 15. " VALID ,BAR validation and participate" "Ignored,Valid" rbitfld.word 0x00 8.--13. " FRAME ,Specify a logical device frame number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.word.byte 0x00 0.--7. 1. " MASK ,Mask off address bits in LPC I/O and host address" line.word 0x02 "EMI0[16:31],Embedded Memory Interface 0 Register [16:31]" line.word 0x04 "EMI0[32:47],Embedded Memory Interface 0 Register [32:47]" group.word 0x376++0x05 line.word 0x00 "EMI1[0:15],Embedded Memory Interface 1 Register [0:15]" bitfld.word 0x00 15. " VALID ,BAR validation and participate" "Ignored,Valid" rbitfld.word 0x00 8.--13. " FRAME ,Specify a logical device frame number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.word.byte 0x00 0.--7. 1. " MASK ,Mask off address bits in LPC I/O and host address" line.word 0x02 "EMI1[16:31],Embedded Memory Interface 1 Register [16:31]" line.word 0x04 "EMI1[32:47],Embedded Memory Interface 1 Register [32:47]" group.word 0x380++0x05 line.word 0x00 "EMI2[0:15],Embedded Memory Interface 2 Register [0:15]" bitfld.word 0x00 15. " VALID ,BAR validation and participate" "Ignored,Valid" rbitfld.word 0x00 8.--13. " FRAME ,Specify a logical device frame number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.word.byte 0x00 0.--7. 1. " MASK ,Mask off address bits in LPC I/O and host address" line.word 0x02 "EMI2[16:31],Embedded Memory Interface 2 Register [16:31]" line.word 0x04 "EMI2[32:47],Embedded Memory Interface 2 Register [32:47]" group.word 0x3AC++0x01 line.word 0x00 "SRAM_BAR_0[0:15],SRAM Base Address Register 0 [0:15]" bitfld.word 0x00 4.--7. " SIZE ,Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 1.--2. " ACCESS ,Access" "0,1,2,3" bitfld.word 0x00 0. " VALID ,Valid" "0,1" group.long 0x3B0++0x03 line.long 0x00 "SRAM_BAR_0[16:47],SRAM Base Address Register 0 [16:47]" group.word 0x3B6++0x01 line.word 0x00 "SRAM_BAR_1[0:15],SRAM Base Address Register 1 [0:15]" bitfld.word 0x00 4.--7. " SIZE ,Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 1.--2. " ACCESS ,Access" "0,1,2,3" bitfld.word 0x00 0. " VALID ,Valid" "0,1" group.long 0x3B8++0x03 line.long 0x00 "SRAM_BAR_1[16:47],SRAM Base Address Register 1 [16:47]" width 0x0B tree.end tree "eSPI Virtual Wire Component" base ad:0x400F9C00 width 15. tree "MASTER-TO-SLAVE REGISTERS" group.long 0x00++0x83 line.long 0x00 "MSVW00[00:31],Master To Slave Virtual Wire 00 Register [00:31]" line.long 0x04 "MSVW00[32:63],Master To Slave Virtual Wire 00 Register [32:63]" line.long 0x08 "MSVW00[64:95],Master To Slave Virtual Wire 00 Register [64:95]" line.long 0x0C "MSVW01[00:31],Master To Slave Virtual Wire 01 Register [00:31]" line.long 0x10 "MSVW01[32:63],Master To Slave Virtual Wire 01 Register [32:63]" line.long 0x14 "MSVW01[64:95],Master To Slave Virtual Wire 01 Register [64:95]" line.long 0x18 "MSVW02[00:31],Master To Slave Virtual Wire 02 Register [00:31]" line.long 0x1C "MSVW02[32:63],Master To Slave Virtual Wire 02 Register [32:63]" line.long 0x20 "MSVW02[64:95],Master To Slave Virtual Wire 02 Register [64:95]" line.long 0x24 "MSVW03[00:31],Master To Slave Virtual Wire 03 Register [00:31]" line.long 0x28 "MSVW03[32:63],Master To Slave Virtual Wire 03 Register [32:63]" line.long 0x2C "MSVW03[64:95],Master To Slave Virtual Wire 03 Register [64:95]" line.long 0x30 "MSVW04[00:31],Master To Slave Virtual Wire 04 Register [00:31]" line.long 0x34 "MSVW04[32:63],Master To Slave Virtual Wire 04 Register [32:63]" line.long 0x38 "MSVW04[64:95],Master To Slave Virtual Wire 04 Register [64:95]" line.long 0x3C "MSVW05[00:31],Master To Slave Virtual Wire 05 Register [00:31]" line.long 0x40 "MSVW05[32:63],Master To Slave Virtual Wire 05 Register [32:63]" line.long 0x44 "MSVW05[64:95],Master To Slave Virtual Wire 05 Register [64:95]" line.long 0x48 "MSVW06[00:31],Master To Slave Virtual Wire 06 Register [00:31]" line.long 0x4C "MSVW06[32:63],Master To Slave Virtual Wire 06 Register [32:63]" line.long 0x50 "MSVW06[64:95],Master To Slave Virtual Wire 06 Register [64:95]" line.long 0x54 "MSVW07[00:31],Master To Slave Virtual Wire 07 Register [00:31]" line.long 0x58 "MSVW07[32:63],Master To Slave Virtual Wire 07 Register [32:63]" line.long 0x5C "MSVW07[64:95],Master To Slave Virtual Wire 07 Register [64:95]" line.long 0x60 "MSVW08[00:31],Master To Slave Virtual Wire 08 Register [00:31]" line.long 0x64 "MSVW08[32:63],Master To Slave Virtual Wire 08 Register [32:63]" line.long 0x68 "MSVW08[64:95],Master To Slave Virtual Wire 08 Register [64:95]" line.long 0x6C "MSVW09[00:31],Master To Slave Virtual Wire 09 Register [00:31]" line.long 0x70 "MSVW09[32:63],Master To Slave Virtual Wire 09 Register [32:63]" line.long 0x74 "MSVW09[64:95],Master To Slave Virtual Wire 09 Register [64:95]" line.long 0x78 "MSVW10[00:31],Master To Slave Virtual Wire 10 Register [00:31]" line.long 0x7C "MSVW10[32:63],Master To Slave Virtual Wire 10 Register [32:63]" line.long 0x80 "MSVW10[64:95],Master To Slave Virtual Wire 10 Register [64:95]" tree.end tree "SLAVE-TO-MASTERC REGISTERS" group.quad 0x200++0x57 line.quad 0x00 "SMVW00,Slave To Master Virtual Wire 00 Register" line.quad 0x08 "SMVW01,Slave To Master Virtual Wire 01 Register" line.quad 0x10 "SMVW02,Slave To Master Virtual Wire 02 Register" line.quad 0x18 "SMVW03,Slave To Master Virtual Wire 03 Register" line.quad 0x20 "SMVW04,Slave To Master Virtual Wire 04 Register" line.quad 0x28 "SMVW05,Slave To Master Virtual Wire 05 Register" line.quad 0x30 "SMVW06,Slave To Master Virtual Wire 06 Register" line.quad 0x38 "SMVW07,Slave To Master Virtual Wire 07 Register" line.quad 0x40 "SMVW08,Slave To Master Virtual Wire 08 Register" line.quad 0x48 "SMVW09,Slave To Master Virtual Wire 09 Register" line.quad 0x50 "SMVW010,Slave To Master Virtual Wire 10 Register" rgroup.word 0x1F0++0x03 line.word 0x00 "TEST_0,Test Register 0" line.word 0x02 "TEST_1,Test Register 1" rgroup.word 0x1F8++0x03 line.word 0x00 "TEST_2,Test Register 2" line.word 0x02 "TEST_3,Test Register 3" tree.end width 0x0B tree.end tree.end tree "8042 Emulated Keyboard Controller" base ad:0x400F0400 width 32. tree "Configuration Registers" group.byte 0x330++0x00 line.byte 0x00 "ACTIVATE_REGISTER,Activate Register" bitfld.byte 0x00 0. " ACTIVATE ,8042 interface status" "Inactive,Functional" tree.end tree "Runtime Registers" wgroup.byte 0x00++0x00 line.byte 0x00 "HOST_EC_DATA,Host Embedded Controller Data Register" hexmask.byte 0x00 0.--7. 1. " WRITE_DATA ,Write data" wgroup.byte 0x04++0x00 line.byte 0x00 "CMD_REGISTER,Command Register" hexmask.byte 0x00 0.--7. 1. " WRITE_CMD ,Write command" rgroup.byte 0x00++0x00 line.byte 0x00 "EC_HOST_DATA/AUX_DATA_REGISTER,EC Host Data/Aux Data Register" hexmask.byte 0x00 0.--7. 1. " READ_DATA ,Read data" rgroup.byte 0x04++0x00 line.byte 0x00 "KYBD_STAT_R_REGISTER,Keyboard Status Read Register" bitfld.byte 0x00 6.--7. " UD2 ,User-defined data" "0,1,2,3" bitfld.byte 0x00 5. " AUXOBF ,Auxiliary output buffer full" "EC Data Register,EC AUX Data Register" bitfld.byte 0x00 4. " UD1 ,User-defined data" "0,1" newline bitfld.byte 0x00 3. " C/D ,Command data" "Data,Command" bitfld.byte 0x00 2. " UD0 ,User-defined data" "0,1" bitfld.byte 0x00 1. " IBF ,Input buffer full (read or write data to HOST_EC Data/CMD Register)" "Read,Write" newline bitfld.byte 0x00 0. " OBF ,Output buffer full (read or write data to EC_HOST Data/AUX Data Register)" "Read,Write" tree.end tree "EC Registers" rgroup.byte 0x100++0x00 line.byte 0x00 "HOST2EC_DATA_REGISTER,Host To EC Data Register" hexmask.byte 0x00 0.--7. 1. " HOST2EC_DATA ,Host to EC data" wgroup.byte 0x100++0x00 line.byte 0x00 "EC_DATA_REGISTER,EC Data Register" hexmask.byte 0x00 0.--7. 1. " EC_DATA ,EC data" group.byte 0x104++0x00 line.byte 0x00 "EC_KYBD_STAT_REGISTER,EC Keyboard Status Register" bitfld.byte 0x00 6.--7. " UD2 ,User-defined data" "0,1,2,3" bitfld.byte 0x00 5. " AUXOBF ,Auxiliary output buffer full" "EC Data Register,EC AUX Data Register" bitfld.byte 0x00 4. " UD1 ,User-defined data" "0,1" newline rbitfld.byte 0x00 3. " C/D ,Command data" "Data,Command" bitfld.byte 0x00 2. " UD0 ,User-defined data" "0,1" rbitfld.byte 0x00 1. " IBF ,Input buffer full (read or write data to HOST_EC Data/CMD Register)" "Read,Write" newline rbitfld.byte 0x00 0. " OBF ,Output buffer full (read or write data to EC_HOST Data/AUX Data Register)" "Read,Write" if (((per.b(ad:0x400F0400+0x04))&0x01)==0x00) group.byte 0x108++0x00 line.byte 0x00 "KYBD_CNTRL_REGISTER,Keyboard Control Register" bitfld.byte 0x00 7. " AUXH ,AUX in hardware" "Not modified,Modified" bitfld.byte 0x00 6. " UD5 ,User-defined data" "0,1" bitfld.byte 0x00 5. " OBFEN ,KIRQ and MIRQ driving" "Not driven,Driven" newline bitfld.byte 0x00 3.--4. " UD4 ,User-defined data" "0,1,2,3" bitfld.byte 0x00 2. " PCOBFEN ,PCOBF value" "EC_DATA_REGISTER,PCOBF_REGISTER" bitfld.byte 0x00 1. " SAEN ,Software-assist enable" "Disabled,Enabled" newline bitfld.byte 0x00 0. " UD3 ,User-defined data" "0,1" else group.byte 0x108++0x00 line.byte 0x00 "KYBD_CNTRL_REGISTER,Keyboard Control Register" bitfld.byte 0x00 7. " AUXH ,AUX in hardware" "Not modified,Modified" bitfld.byte 0x00 6. " UD5 ,User-defined data" "0,1" rbitfld.byte 0x00 5. " OBFEN ,KIRQ and MIRQ driving" "Not driven,Driven" newline bitfld.byte 0x00 3.--4. " UD4 ,User-defined data" "0,1,2,3" bitfld.byte 0x00 2. " PCOBFEN ,PCOBF value" "EC_DATA_REGISTER,PCOBF_REGISTER" bitfld.byte 0x00 1. " SAEN ,Software-assist enable" "Disabled,Enabled" newline bitfld.byte 0x00 0. " UD3 ,User-defined data" "0,1" endif wgroup.byte 0x10C++0x00 line.byte 0x00 "EC_AUX_DATA_REGISTER,EC Aux Data Register" hexmask.byte 0x00 0.--7. 1. " EC_AUX_DATA ,EC aux data" group.byte 0x114++0x00 line.byte 0x00 "PCOBF_REGISTER,PCOBF Register" bitfld.byte 0x00 0. " PCOBF ,Status of writes to HOST2EC register" "HOST read,KIRQ" tree.end width 0x0B tree "Legacy Port92/GATEA20 Registers" base ad:0x400F2000 width 26. tree "Configuration Registers" group.byte 0x330++0x00 line.byte 0x00 "PORT_92_ENABLE_REGISTER,Port 92 Enable Register" bitfld.byte 0x00 0. " P92_EN ,Port 92 register enable" "Disabled,Enabled" tree.end tree "Runtime Registers" group.byte 0x00++0x00 line.byte 0x00 "PORT_92_REGISTER,Port 92 Register" bitfld.byte 0x00 1. " ALT_GATE_A20 ,ALT_A20 state" "Low,High" bitfld.byte 0x00 0. " ALT_CPU_RESET ,ALT CPU reset" "No reset,Reset" tree.end tree "EC Registers" group.byte 0x100++0x00 line.byte 0x00 "GATEA20_CONTROL_REGISTER,GATEA20 Control Register" bitfld.byte 0x00 0. " GATEA20 ,GATEA20 state" "Low,High" wgroup.byte 0x108++0x00 line.byte 0x00 "SETGA20L_REGISTER,SETGA20L Register" hexmask.byte 0x00 0.--7. 1. " SETGA20L ,SETGA20L" wgroup.byte 0x10C++0x00 line.byte 0x00 "RSTGA20L_REGISTER,RSTGA20L Register" hexmask.byte 0x00 0.--7. 1. " RSTGA20L ,RSTGA20L" tree.end width 0x0B tree.end tree.end tree "ACPI-ECI (Advanced Configuration and Power Interface)" tree "Channel 0" base ad:0x400F0800 width 15. group.byte 0x0++0x00 line.byte 0x00 "ACPIOSDRB0R0,ACPI OS Data Register Byte 0 Register" group.byte 0x1++0x00 line.byte 0x00 "ACPIOSDRB0R1,ACPI OS Data Register Byte 1 Register" group.byte 0x2++0x00 line.byte 0x00 "ACPIOSDRB0R2,ACPI OS Data Register Byte 2 Register" group.byte 0x3++0x00 line.byte 0x00 "ACPIOSDRB0R3,ACPI OS Data Register Byte 3 Register" wgroup.byte 0x04++0x00 line.byte 0x00 "ACPIOSCR,ACPI OS Command Register" rgroup.byte 0x04++0x01 line.byte 0x00 "OSSOSR,OS Status OS Register" bitfld.byte 0x00 7. " UD0B ,User defined" "Not occurred,Occurred" bitfld.byte 0x00 6. " SMI_EVT ,ACPI_EC-maintained software flag set when an SMI event is pending" "Not pending,Pending" bitfld.byte 0x00 5. " SCI_EVT ,ACPI_EC-maintained software flag set when an SCI event is pending" "Not pending,Pending" bitfld.byte 0x00 4. " BURST ,Set when the ACPI_EC is in Burst Mode for polled command processing" "Not occurred,Occurred" newline bitfld.byte 0x00 3. " CMD ,Set when the OS2EC data EC byte 0 register contains a command byte written into ACPI OS command Register" "Not occurred,Occurred" bitfld.byte 0x00 2. " UD1B ,User defined" "Not occurred,Occurred" bitfld.byte 0x00 1. " IBF ,Input buffer full" "Not full,Full" bitfld.byte 0x00 0. " OBF ,Output buffer full" "Not full,Full" line.byte 0x01 "OSBCR,OS Byte Control Register" bitfld.byte 0x01 0. " FOUR_BYTE_ACCESS ,Accesses four bytes through the ACPI-OS DATA BYTES" "One byte,Four bytes" group.byte 0x108++0x00 line.byte 0x00 "OS2ECDECB0R,OS2EC Data EC Byte 0 Register" group.byte 0x109++0x00 line.byte 0x00 "OS2ECDECB1R,OS2EC Data EC Byte 1 Register" group.byte 0x10A++0x00 line.byte 0x00 "OS2ECDECB2R,OS2EC Data EC Byte 2 Register" group.byte 0x10B++0x00 line.byte 0x00 "OS2ECDECB3R,OS2EC Data EC Byte 3 Register" group.byte 0x100++0x00 line.byte 0x00 "EC2OSDECB0R,EC2OS Data EC Byte 0 Register" group.byte 0x101++0x00 line.byte 0x00 "EC2OSDECB1R,EC2OS Data EC Byte 1 Register" group.byte 0x102++0x00 line.byte 0x00 "EC2OSDECB2R,EC2OS Data EC Byte 2 Register" group.byte 0x103++0x00 line.byte 0x00 "EC2OSDECB3R,EC2OS Data EC Byte 3 Register" group.byte 0x104++0x01 line.byte 0x00 "ECSR,EC Status Register" bitfld.byte 0x00 7. " UD0A ,User defined" "Not occurred,Occurred" bitfld.byte 0x00 6. " SMI_EVT ,Set when an SMI event is pending" "Not pending,Pending" bitfld.byte 0x00 5. " SCI_EVT ,Set when an SMI event is pending" "Not pending,Pending" bitfld.byte 0x00 4. " BURST ,Set when the ACPI_EC is in Burst Mode for polled command processing" "Not occurred,Occurred" newline rbitfld.byte 0x00 3. " CMD ,Set when the OS2EC data EC byte 0 register contains a command byte written into ACPI OS command register" "Data byte written,Command byte written" bitfld.byte 0x00 2. " UD1A ,User defined" "Not occurred,Occurred" rbitfld.byte 0x00 1. " IBF ,Input buffer full" "Not full,Full" rbitfld.byte 0x00 0. " OBF ,Output buffer full" "Not full,Full" line.byte 0x01 "ECBCR,EC Byte Control Register" bitfld.byte 0x01 0. " FOUR_BYTE_ACCESS ,Accesses four bytes through the ACPI-OS DATA BYTES" "No access,Access" width 0x0B tree.end tree "Channel 1" base ad:0x400F0C00 width 15. group.byte 0x0++0x00 line.byte 0x00 "ACPIOSDRB0R0,ACPI OS Data Register Byte 0 Register" group.byte 0x1++0x00 line.byte 0x00 "ACPIOSDRB0R1,ACPI OS Data Register Byte 1 Register" group.byte 0x2++0x00 line.byte 0x00 "ACPIOSDRB0R2,ACPI OS Data Register Byte 2 Register" group.byte 0x3++0x00 line.byte 0x00 "ACPIOSDRB0R3,ACPI OS Data Register Byte 3 Register" wgroup.byte 0x04++0x00 line.byte 0x00 "ACPIOSCR,ACPI OS Command Register" rgroup.byte 0x04++0x01 line.byte 0x00 "OSSOSR,OS Status OS Register" bitfld.byte 0x00 7. " UD0B ,User defined" "Not occurred,Occurred" bitfld.byte 0x00 6. " SMI_EVT ,ACPI_EC-maintained software flag set when an SMI event is pending" "Not pending,Pending" bitfld.byte 0x00 5. " SCI_EVT ,ACPI_EC-maintained software flag set when an SCI event is pending" "Not pending,Pending" bitfld.byte 0x00 4. " BURST ,Set when the ACPI_EC is in Burst Mode for polled command processing" "Not occurred,Occurred" newline bitfld.byte 0x00 3. " CMD ,Set when the OS2EC data EC byte 0 register contains a command byte written into ACPI OS command Register" "Not occurred,Occurred" bitfld.byte 0x00 2. " UD1B ,User defined" "Not occurred,Occurred" bitfld.byte 0x00 1. " IBF ,Input buffer full" "Not full,Full" bitfld.byte 0x00 0. " OBF ,Output buffer full" "Not full,Full" line.byte 0x01 "OSBCR,OS Byte Control Register" bitfld.byte 0x01 0. " FOUR_BYTE_ACCESS ,Accesses four bytes through the ACPI-OS DATA BYTES" "One byte,Four bytes" group.byte 0x108++0x00 line.byte 0x00 "OS2ECDECB0R,OS2EC Data EC Byte 0 Register" group.byte 0x109++0x00 line.byte 0x00 "OS2ECDECB1R,OS2EC Data EC Byte 1 Register" group.byte 0x10A++0x00 line.byte 0x00 "OS2ECDECB2R,OS2EC Data EC Byte 2 Register" group.byte 0x10B++0x00 line.byte 0x00 "OS2ECDECB3R,OS2EC Data EC Byte 3 Register" group.byte 0x100++0x00 line.byte 0x00 "EC2OSDECB0R,EC2OS Data EC Byte 0 Register" group.byte 0x101++0x00 line.byte 0x00 "EC2OSDECB1R,EC2OS Data EC Byte 1 Register" group.byte 0x102++0x00 line.byte 0x00 "EC2OSDECB2R,EC2OS Data EC Byte 2 Register" group.byte 0x103++0x00 line.byte 0x00 "EC2OSDECB3R,EC2OS Data EC Byte 3 Register" group.byte 0x104++0x01 line.byte 0x00 "ECSR,EC Status Register" bitfld.byte 0x00 7. " UD0A ,User defined" "Not occurred,Occurred" bitfld.byte 0x00 6. " SMI_EVT ,Set when an SMI event is pending" "Not pending,Pending" bitfld.byte 0x00 5. " SCI_EVT ,Set when an SMI event is pending" "Not pending,Pending" bitfld.byte 0x00 4. " BURST ,Set when the ACPI_EC is in Burst Mode for polled command processing" "Not occurred,Occurred" newline rbitfld.byte 0x00 3. " CMD ,Set when the OS2EC data EC byte 0 register contains a command byte written into ACPI OS command register" "Data byte written,Command byte written" bitfld.byte 0x00 2. " UD1A ,User defined" "Not occurred,Occurred" rbitfld.byte 0x00 1. " IBF ,Input buffer full" "Not full,Full" rbitfld.byte 0x00 0. " OBF ,Output buffer full" "Not full,Full" line.byte 0x01 "ECBCR,EC Byte Control Register" bitfld.byte 0x01 0. " FOUR_BYTE_ACCESS ,Accesses four bytes through the ACPI-OS DATA BYTES" "No access,Access" width 0x0B tree.end tree "Channel 2" base ad:0x400F1000 width 15. group.byte 0x0++0x00 line.byte 0x00 "ACPIOSDRB0R0,ACPI OS Data Register Byte 0 Register" group.byte 0x1++0x00 line.byte 0x00 "ACPIOSDRB0R1,ACPI OS Data Register Byte 1 Register" group.byte 0x2++0x00 line.byte 0x00 "ACPIOSDRB0R2,ACPI OS Data Register Byte 2 Register" group.byte 0x3++0x00 line.byte 0x00 "ACPIOSDRB0R3,ACPI OS Data Register Byte 3 Register" wgroup.byte 0x04++0x00 line.byte 0x00 "ACPIOSCR,ACPI OS Command Register" rgroup.byte 0x04++0x01 line.byte 0x00 "OSSOSR,OS Status OS Register" bitfld.byte 0x00 7. " UD0B ,User defined" "Not occurred,Occurred" bitfld.byte 0x00 6. " SMI_EVT ,ACPI_EC-maintained software flag set when an SMI event is pending" "Not pending,Pending" bitfld.byte 0x00 5. " SCI_EVT ,ACPI_EC-maintained software flag set when an SCI event is pending" "Not pending,Pending" bitfld.byte 0x00 4. " BURST ,Set when the ACPI_EC is in Burst Mode for polled command processing" "Not occurred,Occurred" newline bitfld.byte 0x00 3. " CMD ,Set when the OS2EC data EC byte 0 register contains a command byte written into ACPI OS command Register" "Not occurred,Occurred" bitfld.byte 0x00 2. " UD1B ,User defined" "Not occurred,Occurred" bitfld.byte 0x00 1. " IBF ,Input buffer full" "Not full,Full" bitfld.byte 0x00 0. " OBF ,Output buffer full" "Not full,Full" line.byte 0x01 "OSBCR,OS Byte Control Register" bitfld.byte 0x01 0. " FOUR_BYTE_ACCESS ,Accesses four bytes through the ACPI-OS DATA BYTES" "One byte,Four bytes" group.byte 0x108++0x00 line.byte 0x00 "OS2ECDECB0R,OS2EC Data EC Byte 0 Register" group.byte 0x109++0x00 line.byte 0x00 "OS2ECDECB1R,OS2EC Data EC Byte 1 Register" group.byte 0x10A++0x00 line.byte 0x00 "OS2ECDECB2R,OS2EC Data EC Byte 2 Register" group.byte 0x10B++0x00 line.byte 0x00 "OS2ECDECB3R,OS2EC Data EC Byte 3 Register" group.byte 0x100++0x00 line.byte 0x00 "EC2OSDECB0R,EC2OS Data EC Byte 0 Register" group.byte 0x101++0x00 line.byte 0x00 "EC2OSDECB1R,EC2OS Data EC Byte 1 Register" group.byte 0x102++0x00 line.byte 0x00 "EC2OSDECB2R,EC2OS Data EC Byte 2 Register" group.byte 0x103++0x00 line.byte 0x00 "EC2OSDECB3R,EC2OS Data EC Byte 3 Register" group.byte 0x104++0x01 line.byte 0x00 "ECSR,EC Status Register" bitfld.byte 0x00 7. " UD0A ,User defined" "Not occurred,Occurred" bitfld.byte 0x00 6. " SMI_EVT ,Set when an SMI event is pending" "Not pending,Pending" bitfld.byte 0x00 5. " SCI_EVT ,Set when an SMI event is pending" "Not pending,Pending" bitfld.byte 0x00 4. " BURST ,Set when the ACPI_EC is in Burst Mode for polled command processing" "Not occurred,Occurred" newline rbitfld.byte 0x00 3. " CMD ,Set when the OS2EC data EC byte 0 register contains a command byte written into ACPI OS command register" "Data byte written,Command byte written" bitfld.byte 0x00 2. " UD1A ,User defined" "Not occurred,Occurred" rbitfld.byte 0x00 1. " IBF ,Input buffer full" "Not full,Full" rbitfld.byte 0x00 0. " OBF ,Output buffer full" "Not full,Full" line.byte 0x01 "ECBCR,EC Byte Control Register" bitfld.byte 0x01 0. " FOUR_BYTE_ACCESS ,Accesses four bytes through the ACPI-OS DATA BYTES" "No access,Access" width 0x0B tree.end tree "Channel 3" base ad:0x400F1400 width 15. group.byte 0x0++0x00 line.byte 0x00 "ACPIOSDRB0R0,ACPI OS Data Register Byte 0 Register" group.byte 0x1++0x00 line.byte 0x00 "ACPIOSDRB0R1,ACPI OS Data Register Byte 1 Register" group.byte 0x2++0x00 line.byte 0x00 "ACPIOSDRB0R2,ACPI OS Data Register Byte 2 Register" group.byte 0x3++0x00 line.byte 0x00 "ACPIOSDRB0R3,ACPI OS Data Register Byte 3 Register" wgroup.byte 0x04++0x00 line.byte 0x00 "ACPIOSCR,ACPI OS Command Register" rgroup.byte 0x04++0x01 line.byte 0x00 "OSSOSR,OS Status OS Register" bitfld.byte 0x00 7. " UD0B ,User defined" "Not occurred,Occurred" bitfld.byte 0x00 6. " SMI_EVT ,ACPI_EC-maintained software flag set when an SMI event is pending" "Not pending,Pending" bitfld.byte 0x00 5. " SCI_EVT ,ACPI_EC-maintained software flag set when an SCI event is pending" "Not pending,Pending" bitfld.byte 0x00 4. " BURST ,Set when the ACPI_EC is in Burst Mode for polled command processing" "Not occurred,Occurred" newline bitfld.byte 0x00 3. " CMD ,Set when the OS2EC data EC byte 0 register contains a command byte written into ACPI OS command Register" "Not occurred,Occurred" bitfld.byte 0x00 2. " UD1B ,User defined" "Not occurred,Occurred" bitfld.byte 0x00 1. " IBF ,Input buffer full" "Not full,Full" bitfld.byte 0x00 0. " OBF ,Output buffer full" "Not full,Full" line.byte 0x01 "OSBCR,OS Byte Control Register" bitfld.byte 0x01 0. " FOUR_BYTE_ACCESS ,Accesses four bytes through the ACPI-OS DATA BYTES" "One byte,Four bytes" group.byte 0x108++0x00 line.byte 0x00 "OS2ECDECB0R,OS2EC Data EC Byte 0 Register" group.byte 0x109++0x00 line.byte 0x00 "OS2ECDECB1R,OS2EC Data EC Byte 1 Register" group.byte 0x10A++0x00 line.byte 0x00 "OS2ECDECB2R,OS2EC Data EC Byte 2 Register" group.byte 0x10B++0x00 line.byte 0x00 "OS2ECDECB3R,OS2EC Data EC Byte 3 Register" group.byte 0x100++0x00 line.byte 0x00 "EC2OSDECB0R,EC2OS Data EC Byte 0 Register" group.byte 0x101++0x00 line.byte 0x00 "EC2OSDECB1R,EC2OS Data EC Byte 1 Register" group.byte 0x102++0x00 line.byte 0x00 "EC2OSDECB2R,EC2OS Data EC Byte 2 Register" group.byte 0x103++0x00 line.byte 0x00 "EC2OSDECB3R,EC2OS Data EC Byte 3 Register" group.byte 0x104++0x01 line.byte 0x00 "ECSR,EC Status Register" bitfld.byte 0x00 7. " UD0A ,User defined" "Not occurred,Occurred" bitfld.byte 0x00 6. " SMI_EVT ,Set when an SMI event is pending" "Not pending,Pending" bitfld.byte 0x00 5. " SCI_EVT ,Set when an SMI event is pending" "Not pending,Pending" bitfld.byte 0x00 4. " BURST ,Set when the ACPI_EC is in Burst Mode for polled command processing" "Not occurred,Occurred" newline rbitfld.byte 0x00 3. " CMD ,Set when the OS2EC data EC byte 0 register contains a command byte written into ACPI OS command register" "Data byte written,Command byte written" bitfld.byte 0x00 2. " UD1A ,User defined" "Not occurred,Occurred" rbitfld.byte 0x00 1. " IBF ,Input buffer full" "Not full,Full" rbitfld.byte 0x00 0. " OBF ,Output buffer full" "Not full,Full" line.byte 0x01 "ECBCR,EC Byte Control Register" bitfld.byte 0x01 0. " FOUR_BYTE_ACCESS ,Accesses four bytes through the ACPI-OS DATA BYTES" "No access,Access" width 0x0B tree.end tree "Channel 4" base ad:0x400F1800 width 15. group.byte 0x0++0x00 line.byte 0x00 "ACPIOSDRB0R0,ACPI OS Data Register Byte 0 Register" group.byte 0x1++0x00 line.byte 0x00 "ACPIOSDRB0R1,ACPI OS Data Register Byte 1 Register" group.byte 0x2++0x00 line.byte 0x00 "ACPIOSDRB0R2,ACPI OS Data Register Byte 2 Register" group.byte 0x3++0x00 line.byte 0x00 "ACPIOSDRB0R3,ACPI OS Data Register Byte 3 Register" wgroup.byte 0x04++0x00 line.byte 0x00 "ACPIOSCR,ACPI OS Command Register" rgroup.byte 0x04++0x01 line.byte 0x00 "OSSOSR,OS Status OS Register" bitfld.byte 0x00 7. " UD0B ,User defined" "Not occurred,Occurred" bitfld.byte 0x00 6. " SMI_EVT ,ACPI_EC-maintained software flag set when an SMI event is pending" "Not pending,Pending" bitfld.byte 0x00 5. " SCI_EVT ,ACPI_EC-maintained software flag set when an SCI event is pending" "Not pending,Pending" bitfld.byte 0x00 4. " BURST ,Set when the ACPI_EC is in Burst Mode for polled command processing" "Not occurred,Occurred" newline bitfld.byte 0x00 3. " CMD ,Set when the OS2EC data EC byte 0 register contains a command byte written into ACPI OS command Register" "Not occurred,Occurred" bitfld.byte 0x00 2. " UD1B ,User defined" "Not occurred,Occurred" bitfld.byte 0x00 1. " IBF ,Input buffer full" "Not full,Full" bitfld.byte 0x00 0. " OBF ,Output buffer full" "Not full,Full" line.byte 0x01 "OSBCR,OS Byte Control Register" bitfld.byte 0x01 0. " FOUR_BYTE_ACCESS ,Accesses four bytes through the ACPI-OS DATA BYTES" "One byte,Four bytes" group.byte 0x108++0x00 line.byte 0x00 "OS2ECDECB0R,OS2EC Data EC Byte 0 Register" group.byte 0x109++0x00 line.byte 0x00 "OS2ECDECB1R,OS2EC Data EC Byte 1 Register" group.byte 0x10A++0x00 line.byte 0x00 "OS2ECDECB2R,OS2EC Data EC Byte 2 Register" group.byte 0x10B++0x00 line.byte 0x00 "OS2ECDECB3R,OS2EC Data EC Byte 3 Register" group.byte 0x100++0x00 line.byte 0x00 "EC2OSDECB0R,EC2OS Data EC Byte 0 Register" group.byte 0x101++0x00 line.byte 0x00 "EC2OSDECB1R,EC2OS Data EC Byte 1 Register" group.byte 0x102++0x00 line.byte 0x00 "EC2OSDECB2R,EC2OS Data EC Byte 2 Register" group.byte 0x103++0x00 line.byte 0x00 "EC2OSDECB3R,EC2OS Data EC Byte 3 Register" group.byte 0x104++0x01 line.byte 0x00 "ECSR,EC Status Register" bitfld.byte 0x00 7. " UD0A ,User defined" "Not occurred,Occurred" bitfld.byte 0x00 6. " SMI_EVT ,Set when an SMI event is pending" "Not pending,Pending" bitfld.byte 0x00 5. " SCI_EVT ,Set when an SMI event is pending" "Not pending,Pending" bitfld.byte 0x00 4. " BURST ,Set when the ACPI_EC is in Burst Mode for polled command processing" "Not occurred,Occurred" newline rbitfld.byte 0x00 3. " CMD ,Set when the OS2EC data EC byte 0 register contains a command byte written into ACPI OS command register" "Data byte written,Command byte written" bitfld.byte 0x00 2. " UD1A ,User defined" "Not occurred,Occurred" rbitfld.byte 0x00 1. " IBF ,Input buffer full" "Not full,Full" rbitfld.byte 0x00 0. " OBF ,Output buffer full" "Not full,Full" line.byte 0x01 "ECBCR,EC Byte Control Register" bitfld.byte 0x01 0. " FOUR_BYTE_ACCESS ,Accesses four bytes through the ACPI-OS DATA BYTES" "No access,Access" width 0x0B tree.end tree.end tree "ACPI PM1 Block" base ad:0x400F1C00 width 12. hgroup.byte 0x00++0x00 hide.byte 0x00 "PM1S1R,Power Management 1 Status 1 Register" group.byte 0x01++0x00 line.byte 0x00 "PM1S2R,Power Management 1 Status 2 Register" eventfld.byte 0x00 7. " WAK_STS ,WAK_STS" "0,1" eventfld.byte 0x00 3. " PWRBTNOR_STS ,Power button override event status" "0,1" eventfld.byte 0x00 2. " RTC_STS ,RTC status" "0,1" eventfld.byte 0x00 1. " SLPBTN_STS ,Sleep button status" "0,1" eventfld.byte 0x00 0. " PWRBTN_STS ,Power button status" "0,1" hgroup.byte 0x02++0x00 hide.byte 0x00 "PM1E1R,Power Management 1 Enable 1 Register" group.byte 0x03++0x00 line.byte 0x00 "PM1E2R,Power Management 1 Enable 2 Register" bitfld.byte 0x00 2. " RTC_EN ,RTC enable" "Disabled,Enabled" bitfld.byte 0x00 1. " SLPBTN_EN ,Sleep button enable" "Disabled,Enabled" bitfld.byte 0x00 0. " PWRBTN_EN ,Power button enable" "Disabled,Enabled" hgroup.byte 0x04++0x00 hide.byte 0x00 "PM1C1R,Power Management 1 Control 1 Register" group.byte 0x05++0x00 line.byte 0x00 "PM1C2R,Power Management 1 Control 2 Register" eventfld.byte 0x00 5. " SLP_EN ,Sleep enable" "No effect,Clears" bitfld.byte 0x00 2.--4. " SLP_TYP ,SLP_TYP" "0,1,2,3,4,5,6,7" bitfld.byte 0x00 1. " PWRBTNOR_EN ,Power button override enable" "0,1" hgroup.byte 0x06++0x00 hide.byte 0x00 "PM2C1R,Power Management 2 Control 1 Register" hgroup.byte 0x07++0x00 hide.byte 0x00 "PM2C2R,Power Management 2 Control 2 Register" group.byte 0x10++0x00 "EC Register" line.byte 0x00 "EC_PM_STSR,EC_PM_STS Register" hexmask.byte 0x00 1.--7. 1. " UD ,UD" bitfld.byte 0x00 0. " EC_SCI_STS ,EC_SCI_STS" "No interrupt,Interrupt" width 0x0B tree.end tree "EMI (Embedded Memory Interface)" tree "Instance 0" base ad:0x400F4000 width 34. tree "Runtime Registers" group.byte 0x00++0x03 line.byte 0x00 "HOST-TO-EC_MAILBOX_REGISTER_0,Host-to-EC Mailbox Register 0" line.byte 0x01 "EC-TO-HOST_MAILBOX_REGISTER_0,EC-to-Host Mailbox Register 0" line.byte 0x02 "EC_ADDRESS_MSB_REGISTER_0,EC Address MSB Register 0" bitfld.byte 0x02 2.--7. " EC_ADDRESS_MSB ,EC address MSB(EC address bits [15:0])" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.byte 0x02 0.--1. " ACCESS_TYPE ,Access type" "8-bit,16-bit,32-bit,Auto-increment 32-bit" line.byte 0x03 "EC_ADDRESS_MSB_REGISTER_0,EC Address MSB Register 0" bitfld.byte 0x03 7. " REGION ,32-bit internal address space segment of Memory Base Address N Register" "0,1" hexmask.byte 0x03 0.--6. 0x01 " EC_ADDRESS_MSB ,EC_Address bits[14:8]" group.byte 0x4++0x00 line.byte 0x00 "EC_DATA_BYTE_0_REGISTER_0,EC Data Byte 0 Register 0" group.byte 0x5++0x00 line.byte 0x00 "EC_DATA_BYTE_1_REGISTER_0,EC Data Byte 1 Register 0" group.byte 0x6++0x00 line.byte 0x00 "EC_DATA_BYTE_2_REGISTER_0,EC Data Byte 2 Register 0" group.byte 0x7++0x00 line.byte 0x00 "EC_DATA_BYTE_3_REGISTER_0,EC Data Byte 3 Register 0" group.byte 0x08++0x04 line.byte 0x00 "INTERRUPT_SRC_LSB_REGISTER_0,Interrupt Source LSB Register 0" eventfld.byte 0x00 7. " EC_SWI_LSB[7] ,EC software interrupt least significant bit[7]" "No interrupt,Interrupt" eventfld.byte 0x00 6. " [6] ,EC software interrupt least significant bit[6]" "No interrupt,Interrupt" eventfld.byte 0x00 5. " [5] ,EC software interrupt least significant bit[5]" "No interrupt,Interrupt" eventfld.byte 0x00 4. " [4] ,EC software interrupt least significant bit[4]" "No interrupt,Interrupt" newline eventfld.byte 0x00 3. " [3] ,EC software interrupt least significant bit[3]" "No interrupt,Interrupt" eventfld.byte 0x00 2. " [2] ,EC software interrupt least significant bit[2]" "No interrupt,Interrupt" eventfld.byte 0x00 1. " [1] ,EC software interrupt least significant bit[1]" "No interrupt,Interrupt" rbitfld.byte 0x00 0. " EC_WR ,EC mailbox write" "Not written,Written" line.byte 0x01 "INTERRUPT_SRC_MSB_REGISTER_0,Interrupt Source MSB Register 0" eventfld.byte 0x01 7. " EC_SWI_MSB[7] ,EC software interrupt most significant bit[7]" "No interrupt,Interrupt" eventfld.byte 0x01 6. " [6] ,EC software interrupt most significant bit[6]" "No interrupt,Interrupt" eventfld.byte 0x01 5. " [5] ,EC software interrupt most significant bit[5]" "No interrupt,Interrupt" eventfld.byte 0x01 4. " [4] ,EC software interrupt most significant bit[4]" "No interrupt,Interrupt" newline eventfld.byte 0x01 3. " [3] ,EC software interrupt most significant bit[3]" "No interrupt,Interrupt" eventfld.byte 0x01 2. " [2] ,EC software interrupt most significant bit[2]" "No interrupt,Interrupt" eventfld.byte 0x01 1. " [1] ,EC software interrupt most significant bit[1]" "No interrupt,Interrupt" eventfld.byte 0x01 0. " [0] ,EC software interrupt most significant bit[0]" "No interrupt,Interrupt" line.byte 0x02 "INTERRUPT_MSK_LSB_REGISTER_0,Interrupt Mask LSB Register 0" bitfld.byte 0x02 7. " EC_SWI_EN_LSB[7] ,EC software interrupt enable least significant bit[7]" "Disabled,Enabled" bitfld.byte 0x02 6. " [6] ,EC software interrupt enable least significant bit[6]" "Disabled,Enabled" bitfld.byte 0x02 5. " [5] ,EC software interrupt enable least significant bit[5]" "Disabled,Enabled" bitfld.byte 0x02 4. " [4] ,EC software interrupt enable least significant bit[4]" "Disabled,Enabled" newline bitfld.byte 0x02 3. " [3] ,EC software interrupt enable least significant bit[3]" "Disabled,Enabled" bitfld.byte 0x02 2. " [2] ,EC software interrupt enable least significant bit[2]" "Disabled,Enabled" bitfld.byte 0x02 1. " [1] ,EC software interrupt enable least significant bit[1]" "Disabled,Enabled" rbitfld.byte 0x02 0. " TEST ,TEST" "0,1" line.byte 0x03 "INTERRUPT_MSK_MSB_REGISTER_0,Interrupt Mask MSB Register 0" bitfld.byte 0x03 7. " EC_SWI_EN_MSB[7] ,EC software interrupt enable most significant bit[7]" "Disabled,Enabled" bitfld.byte 0x03 6. " [6] ,EC software interrupt enable most significant bit[6]" "Disabled,Enabled" bitfld.byte 0x03 5. " [5] ,EC software interrupt enable most significant bit[5]" "Disabled,Enabled" bitfld.byte 0x03 4. " [4] ,EC software interrupt enable most significant bit[4]" "Disabled,Enabled" newline bitfld.byte 0x03 3. " [3] ,EC software interrupt enable most significant bit[3]" "Disabled,Enabled" bitfld.byte 0x03 2. " [2] ,EC software interrupt enable most significant bit[2]" "Disabled,Enabled" bitfld.byte 0x03 1. " [1] ,EC software interrupt enable most significant bit[1]" "Disabled,Enabled" bitfld.byte 0x03 0. " [0] ,EC software interrupt enable most significant bit[0]" "Disabled,Enabled" line.byte 0x04 "APPLICATION_ID_REGISTER_0,Application ID Register 0" tree.end tree "EC Registers" group.byte 0x100++0x01 line.byte 0x00 "HOST-TO-EC_MAILBOX_REGISTER_0,Host-to-EC Mailbox Register 0" line.byte 0x01 "EC-TO-HOST_MAILBOX_REGISTER_0,EC-to-Host Mailbox Register 0" group.long 0x104++0x03 line.long 0x00 "MEM_BASE_ADDR_0_REGISTER_0,Memory Base Address 0 Register 0" hexmask.long 0x00 2.--31. 0x04 " MEMORY_BASE_ADDRESS_0 ,Memory base address 0" group.word 0x108++0x03 line.word 0x00 "MEM_READ_LIMIT_0_REGISTER_0,Memory Read Limit 0 Register 0" hexmask.word 0x00 2.--14. 1. " MEM_READ_LIMIT_0 ,Memory read limit 0" line.word 0x02 "MEM_WRITE_LIMIT_0_REGISTER_0,Memory write limit 0 Register 0" hexmask.word 0x02 2.--14. 1. " MEM_WRITE_LIMIT_0 ,Memory write limit 0" group.long 0x10C++0x03 line.long 0x00 "MEM_BASE_ADDR_1_REGISTER_0,Memory Base Address 1 Register 0" hexmask.long 0x00 2.--31. 0x04 " MEMORY_BASE_ADDRESS_1 ,Memory base address 1" group.word 0x110++0x03 line.word 0x00 "MEM_READ_LIMIT_1_REGISTER_0,Memory Read Limit 1 Register 0" hexmask.word 0x00 2.--14. 1. " MEM_READ_LIMIT_1 ,Memory read limit 1" line.word 0x02 "MEM_WRITE_LIMIT_1_REGISTER_0,Memory write limit 1 Register 0" hexmask.word 0x02 2.--14. 1. " MEM_WRITE_LIMIT_1 ,Memory write limit 1" group.word 0x114++0x03 line.word 0x00 "IR_SET_REGISTER_0,Interrupt Set Register 0" bitfld.word 0x00 15. " EC_SWI_SET[15] ,EC software interrupt bit 15 set" "No interrupt,Interrupt" bitfld.word 0x00 14. " [14] ,EC software interrupt bit 14 set" "No interrupt,Interrupt" bitfld.word 0x00 13. " [13] ,EC software interrupt bit 13 set" "No interrupt,Interrupt" bitfld.word 0x00 12. " [12] ,EC software interrupt bit 12 set" "No interrupt,Interrupt" newline bitfld.word 0x00 11. " [11] ,EC software interrupt bit 11 set" "No interrupt,Interrupt" bitfld.word 0x00 10. " [10] ,EC software interrupt bit 10 set" "No interrupt,Interrupt" bitfld.word 0x00 9. " [9] ,EC software interrupt bit 9 set" "No interrupt,Interrupt" bitfld.word 0x00 8. " [8] ,EC software interrupt bit 8 set" "No interrupt,Interrupt" newline bitfld.word 0x00 7. " [7] ,EC software interrupt bit 7 set" "No interrupt,Interrupt" bitfld.word 0x00 6. " [6] ,EC software interrupt bit 6 set" "No interrupt,Interrupt" bitfld.word 0x00 5. " [5] ,EC software interrupt bit 5 set" "No interrupt,Interrupt" bitfld.word 0x00 4. " [4] ,EC software interrupt bit 4 set" "No interrupt,Interrupt" newline bitfld.word 0x00 3. " [3] ,EC software interrupt bit 3 set" "No interrupt,Interrupt" bitfld.word 0x00 2. " [2] ,EC software interrupt bit 2 set" "No interrupt,Interrupt" bitfld.word 0x00 1. " [1] ,EC software interrupt bit 1 set" "No interrupt,Interrupt" line.word 0x02 "HOST_CLR_ENABLE_REGISTER_0,Host Clear Enable Register 0" bitfld.word 0x02 15. " HOST_CLR_ENABLE[15] ,Host clear bit 15 enable" "Disabled,Enabled" bitfld.word 0x02 14. " [14] ,Host clear bit 14 enable" "Disabled,Enabled" bitfld.word 0x02 13. " [13] ,Host clear bit 13 enable" "Disabled,Enabled" bitfld.word 0x02 12. " [12] ,Host clear bit 12 enable" "Disabled,Enabled" newline bitfld.word 0x02 11. " [11] ,Host clear bit 11 enable" "Disabled,Enabled" bitfld.word 0x02 10. " [10] ,Host clear bit 10 enable" "Disabled,Enabled" bitfld.word 0x02 9. " [9] ,Host clear bit 9 enable" "Disabled,Enabled" bitfld.word 0x02 8. " [8] ,Host clear bit 8 enable" "Disabled,Enabled" newline bitfld.word 0x02 7. " [7] ,Host clear bit 7 enable" "Disabled,Enabled" bitfld.word 0x02 6. " [6] ,Host clear bit 6 enable" "Disabled,Enabled" bitfld.word 0x02 5. " [5] ,Host clear bit 5 enable" "Disabled,Enabled" bitfld.word 0x02 4. " [4] ,Host clear bit 4 enable" "Disabled,Enabled" newline bitfld.word 0x02 3. " [3] ,Host clear bit 3 enable" "Disabled,Enabled" bitfld.word 0x02 2. " [2] ,Host clear bit 2 enable" "Disabled,Enabled" bitfld.word 0x02 1. " [1] ,Host clear bit 1 enable" "Disabled,Enabled" tree.end width 0x0B tree.end tree "Instance 1" base ad:0x400F4400 width 34. tree "Runtime Registers" group.byte 0x00++0x03 line.byte 0x00 "HOST-TO-EC_MAILBOX_REGISTER_1,Host-to-EC Mailbox Register 1" line.byte 0x01 "EC-TO-HOST_MAILBOX_REGISTER_1,EC-to-Host Mailbox Register 1" line.byte 0x02 "EC_ADDRESS_MSB_REGISTER_1,EC Address MSB Register 1" bitfld.byte 0x02 2.--7. " EC_ADDRESS_MSB ,EC address MSB(EC address bits [15:0])" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.byte 0x02 0.--1. " ACCESS_TYPE ,Access type" "8-bit,16-bit,32-bit,Auto-increment 32-bit" line.byte 0x03 "EC_ADDRESS_MSB_REGISTER_1,EC Address MSB Register 1" bitfld.byte 0x03 7. " REGION ,32-bit internal address space segment of Memory Base Address N Register" "0,1" hexmask.byte 0x03 0.--6. 0x01 " EC_ADDRESS_MSB ,EC_Address bits[14:8]" group.byte 0x4++0x00 line.byte 0x00 "EC_DATA_BYTE_0_REGISTER_1,EC Data Byte 0 Register 1" group.byte 0x5++0x00 line.byte 0x00 "EC_DATA_BYTE_1_REGISTER_1,EC Data Byte 1 Register 1" group.byte 0x6++0x00 line.byte 0x00 "EC_DATA_BYTE_2_REGISTER_1,EC Data Byte 2 Register 1" group.byte 0x7++0x00 line.byte 0x00 "EC_DATA_BYTE_3_REGISTER_1,EC Data Byte 3 Register 1" group.byte 0x08++0x04 line.byte 0x00 "INTERRUPT_SRC_LSB_REGISTER_1,Interrupt Source LSB Register 1" eventfld.byte 0x00 7. " EC_SWI_LSB[7] ,EC software interrupt least significant bit[7]" "No interrupt,Interrupt" eventfld.byte 0x00 6. " [6] ,EC software interrupt least significant bit[6]" "No interrupt,Interrupt" eventfld.byte 0x00 5. " [5] ,EC software interrupt least significant bit[5]" "No interrupt,Interrupt" eventfld.byte 0x00 4. " [4] ,EC software interrupt least significant bit[4]" "No interrupt,Interrupt" newline eventfld.byte 0x00 3. " [3] ,EC software interrupt least significant bit[3]" "No interrupt,Interrupt" eventfld.byte 0x00 2. " [2] ,EC software interrupt least significant bit[2]" "No interrupt,Interrupt" eventfld.byte 0x00 1. " [1] ,EC software interrupt least significant bit[1]" "No interrupt,Interrupt" rbitfld.byte 0x00 0. " EC_WR ,EC mailbox write" "Not written,Written" line.byte 0x01 "INTERRUPT_SRC_MSB_REGISTER_1,Interrupt Source MSB Register 1" eventfld.byte 0x01 7. " EC_SWI_MSB[7] ,EC software interrupt most significant bit[7]" "No interrupt,Interrupt" eventfld.byte 0x01 6. " [6] ,EC software interrupt most significant bit[6]" "No interrupt,Interrupt" eventfld.byte 0x01 5. " [5] ,EC software interrupt most significant bit[5]" "No interrupt,Interrupt" eventfld.byte 0x01 4. " [4] ,EC software interrupt most significant bit[4]" "No interrupt,Interrupt" newline eventfld.byte 0x01 3. " [3] ,EC software interrupt most significant bit[3]" "No interrupt,Interrupt" eventfld.byte 0x01 2. " [2] ,EC software interrupt most significant bit[2]" "No interrupt,Interrupt" eventfld.byte 0x01 1. " [1] ,EC software interrupt most significant bit[1]" "No interrupt,Interrupt" eventfld.byte 0x01 0. " [0] ,EC software interrupt most significant bit[0]" "No interrupt,Interrupt" line.byte 0x02 "INTERRUPT_MSK_LSB_REGISTER_1,Interrupt Mask LSB Register 1" bitfld.byte 0x02 7. " EC_SWI_EN_LSB[7] ,EC software interrupt enable least significant bit[7]" "Disabled,Enabled" bitfld.byte 0x02 6. " [6] ,EC software interrupt enable least significant bit[6]" "Disabled,Enabled" bitfld.byte 0x02 5. " [5] ,EC software interrupt enable least significant bit[5]" "Disabled,Enabled" bitfld.byte 0x02 4. " [4] ,EC software interrupt enable least significant bit[4]" "Disabled,Enabled" newline bitfld.byte 0x02 3. " [3] ,EC software interrupt enable least significant bit[3]" "Disabled,Enabled" bitfld.byte 0x02 2. " [2] ,EC software interrupt enable least significant bit[2]" "Disabled,Enabled" bitfld.byte 0x02 1. " [1] ,EC software interrupt enable least significant bit[1]" "Disabled,Enabled" rbitfld.byte 0x02 0. " TEST ,TEST" "0,1" line.byte 0x03 "INTERRUPT_MSK_MSB_REGISTER_1,Interrupt Mask MSB Register 1" bitfld.byte 0x03 7. " EC_SWI_EN_MSB[7] ,EC software interrupt enable most significant bit[7]" "Disabled,Enabled" bitfld.byte 0x03 6. " [6] ,EC software interrupt enable most significant bit[6]" "Disabled,Enabled" bitfld.byte 0x03 5. " [5] ,EC software interrupt enable most significant bit[5]" "Disabled,Enabled" bitfld.byte 0x03 4. " [4] ,EC software interrupt enable most significant bit[4]" "Disabled,Enabled" newline bitfld.byte 0x03 3. " [3] ,EC software interrupt enable most significant bit[3]" "Disabled,Enabled" bitfld.byte 0x03 2. " [2] ,EC software interrupt enable most significant bit[2]" "Disabled,Enabled" bitfld.byte 0x03 1. " [1] ,EC software interrupt enable most significant bit[1]" "Disabled,Enabled" bitfld.byte 0x03 0. " [0] ,EC software interrupt enable most significant bit[0]" "Disabled,Enabled" line.byte 0x04 "APPLICATION_ID_REGISTER_1,Application ID Register 1" tree.end tree "EC Registers" group.byte 0x100++0x01 line.byte 0x00 "HOST-TO-EC_MAILBOX_REGISTER_1,Host-to-EC Mailbox Register 1" line.byte 0x01 "EC-TO-HOST_MAILBOX_REGISTER_1,EC-to-Host Mailbox Register 1" group.long 0x104++0x03 line.long 0x00 "MEM_BASE_ADDR_0_REGISTER_1,Memory Base Address 0 Register 1" hexmask.long 0x00 2.--31. 0x04 " MEMORY_BASE_ADDRESS_0 ,Memory base address 0" group.word 0x108++0x03 line.word 0x00 "MEM_READ_LIMIT_0_REGISTER_1,Memory Read Limit 0 Register 1" hexmask.word 0x00 2.--14. 1. " MEM_READ_LIMIT_0 ,Memory read limit 0" line.word 0x02 "MEM_WRITE_LIMIT_0_REGISTER_1,Memory write limit 0 Register 1" hexmask.word 0x02 2.--14. 1. " MEM_WRITE_LIMIT_0 ,Memory write limit 0" group.long 0x10C++0x03 line.long 0x00 "MEM_BASE_ADDR_1_REGISTER_1,Memory Base Address 1 Register 1" hexmask.long 0x00 2.--31. 0x04 " MEMORY_BASE_ADDRESS_1 ,Memory base address 1" group.word 0x110++0x03 line.word 0x00 "MEM_READ_LIMIT_1_REGISTER_1,Memory Read Limit 1 Register 1" hexmask.word 0x00 2.--14. 1. " MEM_READ_LIMIT_1 ,Memory read limit 1" line.word 0x02 "MEM_WRITE_LIMIT_1_REGISTER_1,Memory write limit 1 Register 1" hexmask.word 0x02 2.--14. 1. " MEM_WRITE_LIMIT_1 ,Memory write limit 1" group.word 0x114++0x03 line.word 0x00 "IR_SET_REGISTER_1,Interrupt Set Register 1" bitfld.word 0x00 15. " EC_SWI_SET[15] ,EC software interrupt bit 15 set" "No interrupt,Interrupt" bitfld.word 0x00 14. " [14] ,EC software interrupt bit 14 set" "No interrupt,Interrupt" bitfld.word 0x00 13. " [13] ,EC software interrupt bit 13 set" "No interrupt,Interrupt" bitfld.word 0x00 12. " [12] ,EC software interrupt bit 12 set" "No interrupt,Interrupt" newline bitfld.word 0x00 11. " [11] ,EC software interrupt bit 11 set" "No interrupt,Interrupt" bitfld.word 0x00 10. " [10] ,EC software interrupt bit 10 set" "No interrupt,Interrupt" bitfld.word 0x00 9. " [9] ,EC software interrupt bit 9 set" "No interrupt,Interrupt" bitfld.word 0x00 8. " [8] ,EC software interrupt bit 8 set" "No interrupt,Interrupt" newline bitfld.word 0x00 7. " [7] ,EC software interrupt bit 7 set" "No interrupt,Interrupt" bitfld.word 0x00 6. " [6] ,EC software interrupt bit 6 set" "No interrupt,Interrupt" bitfld.word 0x00 5. " [5] ,EC software interrupt bit 5 set" "No interrupt,Interrupt" bitfld.word 0x00 4. " [4] ,EC software interrupt bit 4 set" "No interrupt,Interrupt" newline bitfld.word 0x00 3. " [3] ,EC software interrupt bit 3 set" "No interrupt,Interrupt" bitfld.word 0x00 2. " [2] ,EC software interrupt bit 2 set" "No interrupt,Interrupt" bitfld.word 0x00 1. " [1] ,EC software interrupt bit 1 set" "No interrupt,Interrupt" line.word 0x02 "HOST_CLR_ENABLE_REGISTER_1,Host Clear Enable Register 1" bitfld.word 0x02 15. " HOST_CLR_ENABLE[15] ,Host clear bit 15 enable" "Disabled,Enabled" bitfld.word 0x02 14. " [14] ,Host clear bit 14 enable" "Disabled,Enabled" bitfld.word 0x02 13. " [13] ,Host clear bit 13 enable" "Disabled,Enabled" bitfld.word 0x02 12. " [12] ,Host clear bit 12 enable" "Disabled,Enabled" newline bitfld.word 0x02 11. " [11] ,Host clear bit 11 enable" "Disabled,Enabled" bitfld.word 0x02 10. " [10] ,Host clear bit 10 enable" "Disabled,Enabled" bitfld.word 0x02 9. " [9] ,Host clear bit 9 enable" "Disabled,Enabled" bitfld.word 0x02 8. " [8] ,Host clear bit 8 enable" "Disabled,Enabled" newline bitfld.word 0x02 7. " [7] ,Host clear bit 7 enable" "Disabled,Enabled" bitfld.word 0x02 6. " [6] ,Host clear bit 6 enable" "Disabled,Enabled" bitfld.word 0x02 5. " [5] ,Host clear bit 5 enable" "Disabled,Enabled" bitfld.word 0x02 4. " [4] ,Host clear bit 4 enable" "Disabled,Enabled" newline bitfld.word 0x02 3. " [3] ,Host clear bit 3 enable" "Disabled,Enabled" bitfld.word 0x02 2. " [2] ,Host clear bit 2 enable" "Disabled,Enabled" bitfld.word 0x02 1. " [1] ,Host clear bit 1 enable" "Disabled,Enabled" tree.end width 0x0B tree.end tree "Instance 2" base ad:0x400F4800 width 34. tree "Runtime Registers" group.byte 0x00++0x03 line.byte 0x00 "HOST-TO-EC_MAILBOX_REGISTER_2,Host-to-EC Mailbox Register 2" line.byte 0x01 "EC-TO-HOST_MAILBOX_REGISTER_2,EC-to-Host Mailbox Register 2" line.byte 0x02 "EC_ADDRESS_MSB_REGISTER_2,EC Address MSB Register 2" bitfld.byte 0x02 2.--7. " EC_ADDRESS_MSB ,EC address MSB(EC address bits [15:0])" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.byte 0x02 0.--1. " ACCESS_TYPE ,Access type" "8-bit,16-bit,32-bit,Auto-increment 32-bit" line.byte 0x03 "EC_ADDRESS_MSB_REGISTER_2,EC Address MSB Register 2" bitfld.byte 0x03 7. " REGION ,32-bit internal address space segment of Memory Base Address N Register" "0,1" hexmask.byte 0x03 0.--6. 0x01 " EC_ADDRESS_MSB ,EC_Address bits[14:8]" group.byte 0x4++0x00 line.byte 0x00 "EC_DATA_BYTE_0_REGISTER_2,EC Data Byte 0 Register 2" group.byte 0x5++0x00 line.byte 0x00 "EC_DATA_BYTE_1_REGISTER_2,EC Data Byte 1 Register 2" group.byte 0x6++0x00 line.byte 0x00 "EC_DATA_BYTE_2_REGISTER_2,EC Data Byte 2 Register 2" group.byte 0x7++0x00 line.byte 0x00 "EC_DATA_BYTE_3_REGISTER_2,EC Data Byte 3 Register 2" group.byte 0x08++0x04 line.byte 0x00 "INTERRUPT_SRC_LSB_REGISTER_2,Interrupt Source LSB Register 2" eventfld.byte 0x00 7. " EC_SWI_LSB[7] ,EC software interrupt least significant bit[7]" "No interrupt,Interrupt" eventfld.byte 0x00 6. " [6] ,EC software interrupt least significant bit[6]" "No interrupt,Interrupt" eventfld.byte 0x00 5. " [5] ,EC software interrupt least significant bit[5]" "No interrupt,Interrupt" eventfld.byte 0x00 4. " [4] ,EC software interrupt least significant bit[4]" "No interrupt,Interrupt" newline eventfld.byte 0x00 3. " [3] ,EC software interrupt least significant bit[3]" "No interrupt,Interrupt" eventfld.byte 0x00 2. " [2] ,EC software interrupt least significant bit[2]" "No interrupt,Interrupt" eventfld.byte 0x00 1. " [1] ,EC software interrupt least significant bit[1]" "No interrupt,Interrupt" rbitfld.byte 0x00 0. " EC_WR ,EC mailbox write" "Not written,Written" line.byte 0x01 "INTERRUPT_SRC_MSB_REGISTER_2,Interrupt Source MSB Register 2" eventfld.byte 0x01 7. " EC_SWI_MSB[7] ,EC software interrupt most significant bit[7]" "No interrupt,Interrupt" eventfld.byte 0x01 6. " [6] ,EC software interrupt most significant bit[6]" "No interrupt,Interrupt" eventfld.byte 0x01 5. " [5] ,EC software interrupt most significant bit[5]" "No interrupt,Interrupt" eventfld.byte 0x01 4. " [4] ,EC software interrupt most significant bit[4]" "No interrupt,Interrupt" newline eventfld.byte 0x01 3. " [3] ,EC software interrupt most significant bit[3]" "No interrupt,Interrupt" eventfld.byte 0x01 2. " [2] ,EC software interrupt most significant bit[2]" "No interrupt,Interrupt" eventfld.byte 0x01 1. " [1] ,EC software interrupt most significant bit[1]" "No interrupt,Interrupt" eventfld.byte 0x01 0. " [0] ,EC software interrupt most significant bit[0]" "No interrupt,Interrupt" line.byte 0x02 "INTERRUPT_MSK_LSB_REGISTER_2,Interrupt Mask LSB Register 2" bitfld.byte 0x02 7. " EC_SWI_EN_LSB[7] ,EC software interrupt enable least significant bit[7]" "Disabled,Enabled" bitfld.byte 0x02 6. " [6] ,EC software interrupt enable least significant bit[6]" "Disabled,Enabled" bitfld.byte 0x02 5. " [5] ,EC software interrupt enable least significant bit[5]" "Disabled,Enabled" bitfld.byte 0x02 4. " [4] ,EC software interrupt enable least significant bit[4]" "Disabled,Enabled" newline bitfld.byte 0x02 3. " [3] ,EC software interrupt enable least significant bit[3]" "Disabled,Enabled" bitfld.byte 0x02 2. " [2] ,EC software interrupt enable least significant bit[2]" "Disabled,Enabled" bitfld.byte 0x02 1. " [1] ,EC software interrupt enable least significant bit[1]" "Disabled,Enabled" rbitfld.byte 0x02 0. " TEST ,TEST" "0,1" line.byte 0x03 "INTERRUPT_MSK_MSB_REGISTER_2,Interrupt Mask MSB Register 2" bitfld.byte 0x03 7. " EC_SWI_EN_MSB[7] ,EC software interrupt enable most significant bit[7]" "Disabled,Enabled" bitfld.byte 0x03 6. " [6] ,EC software interrupt enable most significant bit[6]" "Disabled,Enabled" bitfld.byte 0x03 5. " [5] ,EC software interrupt enable most significant bit[5]" "Disabled,Enabled" bitfld.byte 0x03 4. " [4] ,EC software interrupt enable most significant bit[4]" "Disabled,Enabled" newline bitfld.byte 0x03 3. " [3] ,EC software interrupt enable most significant bit[3]" "Disabled,Enabled" bitfld.byte 0x03 2. " [2] ,EC software interrupt enable most significant bit[2]" "Disabled,Enabled" bitfld.byte 0x03 1. " [1] ,EC software interrupt enable most significant bit[1]" "Disabled,Enabled" bitfld.byte 0x03 0. " [0] ,EC software interrupt enable most significant bit[0]" "Disabled,Enabled" line.byte 0x04 "APPLICATION_ID_REGISTER_2,Application ID Register 2" tree.end tree "EC Registers" group.byte 0x100++0x01 line.byte 0x00 "HOST-TO-EC_MAILBOX_REGISTER_2,Host-to-EC Mailbox Register 2" line.byte 0x01 "EC-TO-HOST_MAILBOX_REGISTER_2,EC-to-Host Mailbox Register 2" group.long 0x104++0x03 line.long 0x00 "MEM_BASE_ADDR_0_REGISTER_2,Memory Base Address 0 Register 2" hexmask.long 0x00 2.--31. 0x04 " MEMORY_BASE_ADDRESS_0 ,Memory base address 0" group.word 0x108++0x03 line.word 0x00 "MEM_READ_LIMIT_0_REGISTER_2,Memory Read Limit 0 Register 2" hexmask.word 0x00 2.--14. 1. " MEM_READ_LIMIT_0 ,Memory read limit 0" line.word 0x02 "MEM_WRITE_LIMIT_0_REGISTER_2,Memory write limit 0 Register 2" hexmask.word 0x02 2.--14. 1. " MEM_WRITE_LIMIT_0 ,Memory write limit 0" group.long 0x10C++0x03 line.long 0x00 "MEM_BASE_ADDR_1_REGISTER_2,Memory Base Address 1 Register 2" hexmask.long 0x00 2.--31. 0x04 " MEMORY_BASE_ADDRESS_1 ,Memory base address 1" group.word 0x110++0x03 line.word 0x00 "MEM_READ_LIMIT_1_REGISTER_2,Memory Read Limit 1 Register 2" hexmask.word 0x00 2.--14. 1. " MEM_READ_LIMIT_1 ,Memory read limit 1" line.word 0x02 "MEM_WRITE_LIMIT_1_REGISTER_2,Memory write limit 1 Register 2" hexmask.word 0x02 2.--14. 1. " MEM_WRITE_LIMIT_1 ,Memory write limit 1" group.word 0x114++0x03 line.word 0x00 "IR_SET_REGISTER_2,Interrupt Set Register 2" bitfld.word 0x00 15. " EC_SWI_SET[15] ,EC software interrupt bit 15 set" "No interrupt,Interrupt" bitfld.word 0x00 14. " [14] ,EC software interrupt bit 14 set" "No interrupt,Interrupt" bitfld.word 0x00 13. " [13] ,EC software interrupt bit 13 set" "No interrupt,Interrupt" bitfld.word 0x00 12. " [12] ,EC software interrupt bit 12 set" "No interrupt,Interrupt" newline bitfld.word 0x00 11. " [11] ,EC software interrupt bit 11 set" "No interrupt,Interrupt" bitfld.word 0x00 10. " [10] ,EC software interrupt bit 10 set" "No interrupt,Interrupt" bitfld.word 0x00 9. " [9] ,EC software interrupt bit 9 set" "No interrupt,Interrupt" bitfld.word 0x00 8. " [8] ,EC software interrupt bit 8 set" "No interrupt,Interrupt" newline bitfld.word 0x00 7. " [7] ,EC software interrupt bit 7 set" "No interrupt,Interrupt" bitfld.word 0x00 6. " [6] ,EC software interrupt bit 6 set" "No interrupt,Interrupt" bitfld.word 0x00 5. " [5] ,EC software interrupt bit 5 set" "No interrupt,Interrupt" bitfld.word 0x00 4. " [4] ,EC software interrupt bit 4 set" "No interrupt,Interrupt" newline bitfld.word 0x00 3. " [3] ,EC software interrupt bit 3 set" "No interrupt,Interrupt" bitfld.word 0x00 2. " [2] ,EC software interrupt bit 2 set" "No interrupt,Interrupt" bitfld.word 0x00 1. " [1] ,EC software interrupt bit 1 set" "No interrupt,Interrupt" line.word 0x02 "HOST_CLR_ENABLE_REGISTER_2,Host Clear Enable Register 2" bitfld.word 0x02 15. " HOST_CLR_ENABLE[15] ,Host clear bit 15 enable" "Disabled,Enabled" bitfld.word 0x02 14. " [14] ,Host clear bit 14 enable" "Disabled,Enabled" bitfld.word 0x02 13. " [13] ,Host clear bit 13 enable" "Disabled,Enabled" bitfld.word 0x02 12. " [12] ,Host clear bit 12 enable" "Disabled,Enabled" newline bitfld.word 0x02 11. " [11] ,Host clear bit 11 enable" "Disabled,Enabled" bitfld.word 0x02 10. " [10] ,Host clear bit 10 enable" "Disabled,Enabled" bitfld.word 0x02 9. " [9] ,Host clear bit 9 enable" "Disabled,Enabled" bitfld.word 0x02 8. " [8] ,Host clear bit 8 enable" "Disabled,Enabled" newline bitfld.word 0x02 7. " [7] ,Host clear bit 7 enable" "Disabled,Enabled" bitfld.word 0x02 6. " [6] ,Host clear bit 6 enable" "Disabled,Enabled" bitfld.word 0x02 5. " [5] ,Host clear bit 5 enable" "Disabled,Enabled" bitfld.word 0x02 4. " [4] ,Host clear bit 4 enable" "Disabled,Enabled" newline bitfld.word 0x02 3. " [3] ,Host clear bit 3 enable" "Disabled,Enabled" bitfld.word 0x02 2. " [2] ,Host clear bit 2 enable" "Disabled,Enabled" bitfld.word 0x02 1. " [1] ,Host clear bit 1 enable" "Disabled,Enabled" tree.end width 0x0B tree.end tree.end tree "MBX (Mailbox Interface)" base ad:0x400F0000 width 14. group.byte 0x00++0x01 "Runtime Registers" line.byte 0x00 "INDEX,INDEX Register" line.byte 0x01 "DATA,DATA Register" group.byte 0x100++0x00 "EC Registers" line.byte 0x00 "HOST_TO_ECMBX,HOST_TO_EC Mailbox Register" hgroup.byte 0x104++0x00 hide.byte 0x00 "EC_TO_HOSTMBX,EC_TO_HOST Mailbox Register" group.byte 0x108++0x00 line.byte 0x00 "SMIISR,SMI Interrupt Source Register" bitfld.byte 0x00 7. " EC_SWI[7] ,EC software interrupt 7" "No interrupt,Interrupt" bitfld.byte 0x00 6. " [6] ,EC software interrupt 6" "No interrupt,Interrupt" bitfld.byte 0x00 5. " [5] ,EC software interrupt 5" "No interrupt,Interrupt" bitfld.byte 0x00 4. " [4] ,EC software interrupt 4" "No interrupt,Interrupt" newline bitfld.byte 0x00 3. " [3] ,EC software interrupt 3" "No interrupt,Interrupt" bitfld.byte 0x00 2. " [2] ,EC software interrupt 2" "No interrupt,Interrupt" bitfld.byte 0x00 1. " [1] ,EC software interrupt 1" "No interrupt,Interrupt" group.byte 0x10C++0x00 line.byte 0x00 "SMIIMR,SMI Interrupt Source Register" bitfld.byte 0x00 7. " EC_SWI_EN[7] ,EC software interrupt 7 enable" "Disabled,Enabled" bitfld.byte 0x00 6. " [6] ,EC software interrupt 6 enable" "Disabled,Enabled" bitfld.byte 0x00 5. " [5] ,EC software interrupt 5 enable" "Disabled,Enabled" bitfld.byte 0x00 4. " [4] ,EC software interrupt 4 enable" "Disabled,Enabled" newline bitfld.byte 0x00 3. " [3] ,EC software interrupt 3 enable" "Disabled,Enabled" bitfld.byte 0x00 2. " [2] ,EC software interrupt 2 enable" "Disabled,Enabled" bitfld.byte 0x00 1. " [1] ,EC software interrupt 1 enable" "Disabled,Enabled" bitfld.byte 0x00 0. " EC_WR_EN ,EC mailbox write interrupt enable" "Disabled,Enabled" group.byte 0x110++0x00 line.byte 0x00 "MBRR[0],Mailbox Register [0]" group.byte 0x111++0x00 line.byte 0x00 "MBRR[1],Mailbox Register [1]" group.byte 0x112++0x00 line.byte 0x00 "MBRR[2],Mailbox Register [2]" group.byte 0x113++0x00 line.byte 0x00 "MBRR[3],Mailbox Register [3]" group.byte 0x114++0x00 line.byte 0x00 "MBRR[4],Mailbox Register [4]" group.byte 0x115++0x00 line.byte 0x00 "MBRR[5],Mailbox Register [5]" group.byte 0x116++0x00 line.byte 0x00 "MBRR[6],Mailbox Register [6]" group.byte 0x117++0x00 line.byte 0x00 "MBRR[7],Mailbox Register [7]" group.byte 0x118++0x00 line.byte 0x00 "MBRR[8],Mailbox Register [8]" group.byte 0x119++0x00 line.byte 0x00 "MBRR[9],Mailbox Register [9]" group.byte 0x11A++0x00 line.byte 0x00 "MBRR[10],Mailbox Register [10]" group.byte 0x11B++0x00 line.byte 0x00 "MBRR[11],Mailbox Register [11]" group.byte 0x11C++0x00 line.byte 0x00 "MBRR[12],Mailbox Register [12]" group.byte 0x11D++0x00 line.byte 0x00 "MBRR[13],Mailbox Register [13]" group.byte 0x11E++0x00 line.byte 0x00 "MBRR[14],Mailbox Register [14]" group.byte 0x11F++0x00 line.byte 0x00 "MBRR[15],Mailbox Register [15]" group.byte 0x120++0x00 line.byte 0x00 "MBRR[16],Mailbox Register [16]" group.byte 0x121++0x00 line.byte 0x00 "MBRR[17],Mailbox Register [17]" group.byte 0x122++0x00 line.byte 0x00 "MBRR[18],Mailbox Register [18]" group.byte 0x123++0x00 line.byte 0x00 "MBRR[19],Mailbox Register [19]" group.byte 0x124++0x00 line.byte 0x00 "MBRR[20],Mailbox Register [20]" group.byte 0x125++0x00 line.byte 0x00 "MBRR[21],Mailbox Register [21]" group.byte 0x126++0x00 line.byte 0x00 "MBRR[22],Mailbox Register [22]" group.byte 0x127++0x00 line.byte 0x00 "MBRR[23],Mailbox Register [23]" group.byte 0x128++0x00 line.byte 0x00 "MBRR[24],Mailbox Register [24]" group.byte 0x129++0x00 line.byte 0x00 "MBRR[25],Mailbox Register [25]" group.byte 0x12A++0x00 line.byte 0x00 "MBRR[26],Mailbox Register [26]" group.byte 0x12B++0x00 line.byte 0x00 "MBRR[27],Mailbox Register [27]" group.byte 0x12C++0x00 line.byte 0x00 "MBRR[28],Mailbox Register [28]" group.byte 0x12D++0x00 line.byte 0x00 "MBRR[29],Mailbox Register [29]" group.byte 0x12E++0x00 line.byte 0x00 "MBRR[30],Mailbox Register [30]" group.byte 0x12F++0x00 line.byte 0x00 "MBRR[31],Mailbox Register [31]" width 0x0B tree.end tree "UART (Universal Asynchronous Receiver/Transmitter)" tree "Channel 0" base ad:0x400F2400 width 10. if (((per.b(ad:0x400F2400+0x03))&0x80)==0x00) rgroup.byte 0x00++0x00 line.byte 0x00 "RBR,Receive Buffer Register" wgroup.byte 0x00++0x00 line.byte 0x00 "TBR,Transmit Buffer Register" else group.byte 0x01++0x00 line.byte 0x00 "IER,Interrupt Enable Register" bitfld.byte 0x00 3. " EMSI ,Enables MODEM status interrupt" "Disabled,Enabled" bitfld.byte 0x00 2. " ELSI ,Enables received line status interrupt" "Disabled,Enabled" bitfld.byte 0x00 1. " ETHREI ,Enables transmitter holding register empty interrupt" "Disabled,Enabled" newline bitfld.byte 0x00 0. " ERDAI ,Enables received data available interrupt and timeout interrupts in the FIFO mode" "Disabled,Enabled" group.byte 0x00++0x01 line.byte 0x00 "PBRGLSBR,Programmable Baud Rate Generator LSB Register" line.byte 0x01 "PBRGMSBR,Programmable Baud Rate Generator MSB Register" bitfld.byte 0x01 7. " BAUD_CLK_SEL ,Derived frequency clock" "1.8432MHz,24MHz" hexmask.byte 0x01 0.--6. 1. " BAUD_RATE_DIVISOR_MSB ,Baud rate divisor MSB" endif wgroup.byte 0x02++0x00 line.byte 0x00 "FIFOCR,FIFO control register" bitfld.byte 0x00 6.--7. " RECV_FIFO_TRIGGER_LEVEL ,Used to set the trigger level for the RCVR FIFO interrupt" "1,4,8,14" bitfld.byte 0x00 3. " DMA_MODE_SELECT ,Writing to this bit has no effect on the operation of the UART" "0,1" bitfld.byte 0x00 2. " CLEAR_XMIT_FIFO ,Setting this bit clears all bytes in the XMIT FIFO and resets its counter logic to 0" "Disable,Enable" newline bitfld.byte 0x00 1. " CLEAR_RECV_FIFO ,Clears all bytes in the RCVR FIFO and resets its counter logic to 0" "Not clear,Clear" bitfld.byte 0x00 0. " EXRF ,Enable XMIT and RECV FIFO" "Disable,Enable" rgroup.byte 0x02++0x00 line.byte 0x00 "IIR,Interrupt Identification Register" bitfld.byte 0x00 6.--7. " FIFO_EN ,Set when the FIFO control register bit 0 equals 1" "0,1,2,3" bitfld.byte 0x00 0.--3. " INTID/IPEND ,Writing to this bit has no effect on the operation of the UART" "Modem,None,Transmitter Holding register empty,,,Received data available,Transmitter holding register empty/Receiver line status,,Character timeout indication,,,,Character timeout indication,?..." if (((per.b(ad:0x400F2400+0x03))&0x03)==0x00) if (((per.b(ad:0x400F2400+0x03))&0x38)==0x38) group.byte 0x03++0x00 line.byte 0x00 "LCR,Line ControL Register" bitfld.byte 0x00 7. " DLAB ,Divisor latch access bit" "Disabled,Enabled" bitfld.byte 0x00 6. " BREAK_CONTROL ,Enables the serial port to alert a terminal in a communications system" "Disabled,Enabled" bitfld.byte 0x00 5. " STICK_PARITY ,Stick parity bit" "Space,?..." newline bitfld.byte 0x00 4. " PARITY_SELECT ,Even parity select bit" "Not parity,Parity" bitfld.byte 0x00 3. " ENABLE_PARITY ,Parity enable bit" "Disabled,Enabled" bitfld.byte 0x00 2. " STOP_BITS ,Number of stop bits in each transmitted or received serial character" "1 bit,1.5 bit" newline bitfld.byte 0x00 0.--1. " WORD_LENGTH ,Number of bits in each transmitted or received serial character" "5 bits,6 bits,7 bits,8 bits" elif (((per.b(ad:0x400F2400+0x03))&0x38)==0x28) group.byte 0x03++0x00 line.byte 0x00 "LCR,Line ControL Register" bitfld.byte 0x00 7. " DLAB ,Divisor latch access bit" "Disabled,Enabled" bitfld.byte 0x00 6. " BREAK_CONTROL ,Enables the serial port to alert a terminal in a communications system" "Disabled,Enabled" bitfld.byte 0x00 5. " STICK_PARITY ,Stick parity bit" ",Mark" newline bitfld.byte 0x00 4. " PARITY_SELECT ,Even parity select bit" "Not parity,Parity" bitfld.byte 0x00 3. " ENABLE_PARITY ,Parity enable bit" "Disabled,Enabled" bitfld.byte 0x00 2. " STOP_BITS ,Number of stop bits in each transmitted or received serial character" "1 bit,1.5 bit" newline bitfld.byte 0x00 0.--1. " WORD_LENGTH ,Number of bits in each transmitted or received serial character" "5 bits,6 bits,7 bits,8 bits" else group.byte 0x03++0x00 line.byte 0x00 "LCR,Line ControL Register" bitfld.byte 0x00 7. " DLAB ,Divisor latch access bit" "Disabled,Enabled" bitfld.byte 0x00 6. " BREAK_CONTROL ,Enables the serial port to alert a terminal in a communications system" "Disabled,Enabled" bitfld.byte 0x00 5. " STICK_PARITY ,Stick parity bit" "Space,Mark" newline bitfld.byte 0x00 4. " PARITY_SELECT ,Even parity select bit" "Not parity,Parity" bitfld.byte 0x00 3. " ENABLE_PARITY ,Parity enable bit" "Disabled,Enabled" bitfld.byte 0x00 2. " STOP_BITS ,Number of stop bits in each transmitted or received serial character" "1 bit,1.5 bit" newline bitfld.byte 0x00 0.--1. " WORD_LENGTH ,Number of bits in each transmitted or received serial character" "5 bits,6 bits,7 bits,8 bits" endif else if (((per.b(ad:0x400F2400+0x03))&0x38)==0x38) group.byte 0x03++0x00 line.byte 0x00 "LCR,Line ControL Register" bitfld.byte 0x00 7. " DLAB ,Divisor latch access bit" "Disabled,Enabled" bitfld.byte 0x00 6. " BREAK_CONTROL ,Enables the serial port to alert a terminal in a communications system" "Disabled,Enabled" bitfld.byte 0x00 5. " STICK_PARITY ,Stick parity bit" "Space,?..." newline bitfld.byte 0x00 4. " PARITY_SELECT ,Even parity select bit" "Not parity,Parity" bitfld.byte 0x00 3. " ENABLE_PARITY ,Parity enable bit" "Disabled,Enabled" bitfld.byte 0x00 2. " STOP_BITS ,Number of stop bits in each transmitted or received serial character" "1 bit,2 bits" newline bitfld.byte 0x00 0.--1. " WORD_LENGTH ,Number of bits in each transmitted or received serial character" "5 bits,6 bits,7 bits,8 bits" elif (((per.b(ad:0x400F2400+0x03))&0x38)==0x28) group.byte 0x03++0x00 line.byte 0x00 "LCR,Line ControL Register" bitfld.byte 0x00 7. " DLAB ,Divisor latch access bit" "Disabled,Enabled" bitfld.byte 0x00 6. " BREAK_CONTROL ,Enables the serial port to alert a terminal in a communications system" "Disabled,Enabled" bitfld.byte 0x00 5. " STICK_PARITY ,Stick parity bit" ",Mark" newline bitfld.byte 0x00 4. " PARITY_SELECT ,Even parity select bit" "Not parity,Parity" bitfld.byte 0x00 3. " ENABLE_PARITY ,Parity enable bit" "Disabled,Enabled" bitfld.byte 0x00 2. " STOP_BITS ,Number of stop bits in each transmitted or received serial character" "1 bit,2 bits" newline bitfld.byte 0x00 0.--1. " WORD_LENGTH ,Number of bits in each transmitted or received serial character" "5 bits,6 bits,7 bits,8 bits" else group.byte 0x03++0x00 line.byte 0x00 "LCR,Line ControL Register" bitfld.byte 0x00 7. " DLAB ,Divisor latch access bit" "Disabled,Enabled" bitfld.byte 0x00 6. " BREAK_CONTROL ,Enables the serial port to alert a terminal in a communications system" "Disabled,Enabled" bitfld.byte 0x00 5. " STICK_PARITY ,Stick parity bit" "Space,Mark" newline bitfld.byte 0x00 4. " PARITY_SELECT ,Even parity select bit" "Not parity,Parity" bitfld.byte 0x00 3. " ENABLE_PARITY ,Parity enable bit" "Disabled,Enabled" bitfld.byte 0x00 2. " STOP_BITS ,Number of stop bits in each transmitted or received serial character" "1 bit,2 bits" newline bitfld.byte 0x00 0.--1. " WORD_LENGTH ,Number of bits in each transmitted or received serial character" "5 bits,6 bits,7 bits,8 bits" endif endif group.byte 0x04++0x00 line.byte 0x00 "MCR,Modem Control Register" bitfld.byte 0x00 4. " LOOPBACK ,Provides the loopback feature for diagnostic testing of the Serial Port" "Not provided,Provided" bitfld.byte 0x00 3. " OUT2 ,Output 2 bit used to enable an UART interrupt" "Disabled,Enabled" bitfld.byte 0x00 2. " OUT1 ,This bit controls the Output 1" "Disabled,Enabled" newline bitfld.byte 0x00 1. " RTS ,Controls the Request to send (RTS#) output" "Forced to logic 1,Forced to logic 0" bitfld.byte 0x00 0. " DTR ,Controls the Data terminal ready (DTR#) output" "Forced to logic 1,Forced to logic 0" rgroup.byte 0x05++0x01 line.byte 0x00 "LSR,Line Status Register" bitfld.byte 0x00 7. " FIFO_ERROR ,Errors in the FIFO" "No occurred,Occurred" bitfld.byte 0x00 6. " TRANSMIT_ERROR ,Empty transmitter holding register and transmitter shift register" "Not empty,Empty" bitfld.byte 0x00 5. " TRANSMIT_EMPTY ,If empty then serial port is ready to accept data" "Not empty,Empty" newline bitfld.byte 0x00 4. " BREAK_INTERRUPT ,Break interrupt" "No occurred,Occurred" bitfld.byte 0x00 3. " FRAME_ERROR ,Valid stop bit" "Valid,Not valid" bitfld.byte 0x00 2. " PARITY_ERROR ,Correct even or odd parity selected bit" "No occurred,Occurred" newline bitfld.byte 0x00 1. " OVERRUN_ERROR ,Overrun error in the receiver buffer register" "Not occurred,Occurred" bitfld.byte 0x00 0. " DATA_READY ,Ready incoming data" "Not ready,Ready" line.byte 0x01 "MSR,Modem Status Register" bitfld.byte 0x01 7. " DCD ,Complement of the data carrier detect (DCD#) input" "Disabled,Enabled" bitfld.byte 0x01 6. " RI ,Complement of the Ring Indicator (RI#) input" "Disabled,Enabled" bitfld.byte 0x01 5. " DSR ,Complement of the Data Set Ready (DSR#) input" "Forced to logic 1,Forced to logic 0" newline bitfld.byte 0x01 4. " CTS ,Complement of the Clear To Send (CTS#) input" "Forced to logic 1,Forced to logic 0" bitfld.byte 0x01 3. " DCD ,Delta data carrier detect indicates that the DCD# input to the chip has changed state" "0,1" bitfld.byte 0x01 2. " RI ,Trailing edge of ring indicator (TERI)" "0,1" newline bitfld.byte 0x01 1. " DSR ,Delta data set ready (DDSR)" "0,1" bitfld.byte 0x01 0. " CTS ,Delta clear to send (DCTS)" "0,1" group.byte 0x07++0x00 line.byte 0x00 "SR,Scratchpad Register" group.byte 0x330++0x00 line.byte 0x00 "AR,Activate Register" bitfld.byte 0x00 0. " ACTIVATE ,UART logical device is powered and functional" "Not active,Active" group.byte 0x3F0++0x00 line.byte 0x00 "CSR,Configuration Select Register" bitfld.byte 0x00 2. " POLARITY ,Inverts UART_TX and IART_RX pins" "Not inverted,Inverted" bitfld.byte 0x00 1. " POWER ,Deriving RESET reset signal" "RESET_SYS,RESET_VCC" newline bitfld.byte 0x00 0. " CLK_SRC ,Deriving UART baud clock" "Internal clock sources,External clock source" width 0x0B tree.end tree "Channel 1" base ad:0x400F2800 width 10. if (((per.b(ad:0x400F2800+0x03))&0x80)==0x00) rgroup.byte 0x00++0x00 line.byte 0x00 "RBR,Receive Buffer Register" wgroup.byte 0x00++0x00 line.byte 0x00 "TBR,Transmit Buffer Register" else group.byte 0x01++0x00 line.byte 0x00 "IER,Interrupt Enable Register" bitfld.byte 0x00 3. " EMSI ,Enables MODEM status interrupt" "Disabled,Enabled" bitfld.byte 0x00 2. " ELSI ,Enables received line status interrupt" "Disabled,Enabled" bitfld.byte 0x00 1. " ETHREI ,Enables transmitter holding register empty interrupt" "Disabled,Enabled" newline bitfld.byte 0x00 0. " ERDAI ,Enables received data available interrupt and timeout interrupts in the FIFO mode" "Disabled,Enabled" group.byte 0x00++0x01 line.byte 0x00 "PBRGLSBR,Programmable Baud Rate Generator LSB Register" line.byte 0x01 "PBRGMSBR,Programmable Baud Rate Generator MSB Register" bitfld.byte 0x01 7. " BAUD_CLK_SEL ,Derived frequency clock" "1.8432MHz,24MHz" hexmask.byte 0x01 0.--6. 1. " BAUD_RATE_DIVISOR_MSB ,Baud rate divisor MSB" endif wgroup.byte 0x02++0x00 line.byte 0x00 "FIFOCR,FIFO control register" bitfld.byte 0x00 6.--7. " RECV_FIFO_TRIGGER_LEVEL ,Used to set the trigger level for the RCVR FIFO interrupt" "1,4,8,14" bitfld.byte 0x00 3. " DMA_MODE_SELECT ,Writing to this bit has no effect on the operation of the UART" "0,1" bitfld.byte 0x00 2. " CLEAR_XMIT_FIFO ,Setting this bit clears all bytes in the XMIT FIFO and resets its counter logic to 0" "Disable,Enable" newline bitfld.byte 0x00 1. " CLEAR_RECV_FIFO ,Clears all bytes in the RCVR FIFO and resets its counter logic to 0" "Not clear,Clear" bitfld.byte 0x00 0. " EXRF ,Enable XMIT and RECV FIFO" "Disable,Enable" rgroup.byte 0x02++0x00 line.byte 0x00 "IIR,Interrupt Identification Register" bitfld.byte 0x00 6.--7. " FIFO_EN ,Set when the FIFO control register bit 0 equals 1" "0,1,2,3" bitfld.byte 0x00 0.--3. " INTID/IPEND ,Writing to this bit has no effect on the operation of the UART" "Modem,None,Transmitter Holding register empty,,,Received data available,Transmitter holding register empty/Receiver line status,,Character timeout indication,,,,Character timeout indication,?..." if (((per.b(ad:0x400F2800+0x03))&0x03)==0x00) if (((per.b(ad:0x400F2800+0x03))&0x38)==0x38) group.byte 0x03++0x00 line.byte 0x00 "LCR,Line ControL Register" bitfld.byte 0x00 7. " DLAB ,Divisor latch access bit" "Disabled,Enabled" bitfld.byte 0x00 6. " BREAK_CONTROL ,Enables the serial port to alert a terminal in a communications system" "Disabled,Enabled" bitfld.byte 0x00 5. " STICK_PARITY ,Stick parity bit" "Space,?..." newline bitfld.byte 0x00 4. " PARITY_SELECT ,Even parity select bit" "Not parity,Parity" bitfld.byte 0x00 3. " ENABLE_PARITY ,Parity enable bit" "Disabled,Enabled" bitfld.byte 0x00 2. " STOP_BITS ,Number of stop bits in each transmitted or received serial character" "1 bit,1.5 bit" newline bitfld.byte 0x00 0.--1. " WORD_LENGTH ,Number of bits in each transmitted or received serial character" "5 bits,6 bits,7 bits,8 bits" elif (((per.b(ad:0x400F2800+0x03))&0x38)==0x28) group.byte 0x03++0x00 line.byte 0x00 "LCR,Line ControL Register" bitfld.byte 0x00 7. " DLAB ,Divisor latch access bit" "Disabled,Enabled" bitfld.byte 0x00 6. " BREAK_CONTROL ,Enables the serial port to alert a terminal in a communications system" "Disabled,Enabled" bitfld.byte 0x00 5. " STICK_PARITY ,Stick parity bit" ",Mark" newline bitfld.byte 0x00 4. " PARITY_SELECT ,Even parity select bit" "Not parity,Parity" bitfld.byte 0x00 3. " ENABLE_PARITY ,Parity enable bit" "Disabled,Enabled" bitfld.byte 0x00 2. " STOP_BITS ,Number of stop bits in each transmitted or received serial character" "1 bit,1.5 bit" newline bitfld.byte 0x00 0.--1. " WORD_LENGTH ,Number of bits in each transmitted or received serial character" "5 bits,6 bits,7 bits,8 bits" else group.byte 0x03++0x00 line.byte 0x00 "LCR,Line ControL Register" bitfld.byte 0x00 7. " DLAB ,Divisor latch access bit" "Disabled,Enabled" bitfld.byte 0x00 6. " BREAK_CONTROL ,Enables the serial port to alert a terminal in a communications system" "Disabled,Enabled" bitfld.byte 0x00 5. " STICK_PARITY ,Stick parity bit" "Space,Mark" newline bitfld.byte 0x00 4. " PARITY_SELECT ,Even parity select bit" "Not parity,Parity" bitfld.byte 0x00 3. " ENABLE_PARITY ,Parity enable bit" "Disabled,Enabled" bitfld.byte 0x00 2. " STOP_BITS ,Number of stop bits in each transmitted or received serial character" "1 bit,1.5 bit" newline bitfld.byte 0x00 0.--1. " WORD_LENGTH ,Number of bits in each transmitted or received serial character" "5 bits,6 bits,7 bits,8 bits" endif else if (((per.b(ad:0x400F2800+0x03))&0x38)==0x38) group.byte 0x03++0x00 line.byte 0x00 "LCR,Line ControL Register" bitfld.byte 0x00 7. " DLAB ,Divisor latch access bit" "Disabled,Enabled" bitfld.byte 0x00 6. " BREAK_CONTROL ,Enables the serial port to alert a terminal in a communications system" "Disabled,Enabled" bitfld.byte 0x00 5. " STICK_PARITY ,Stick parity bit" "Space,?..." newline bitfld.byte 0x00 4. " PARITY_SELECT ,Even parity select bit" "Not parity,Parity" bitfld.byte 0x00 3. " ENABLE_PARITY ,Parity enable bit" "Disabled,Enabled" bitfld.byte 0x00 2. " STOP_BITS ,Number of stop bits in each transmitted or received serial character" "1 bit,2 bits" newline bitfld.byte 0x00 0.--1. " WORD_LENGTH ,Number of bits in each transmitted or received serial character" "5 bits,6 bits,7 bits,8 bits" elif (((per.b(ad:0x400F2800+0x03))&0x38)==0x28) group.byte 0x03++0x00 line.byte 0x00 "LCR,Line ControL Register" bitfld.byte 0x00 7. " DLAB ,Divisor latch access bit" "Disabled,Enabled" bitfld.byte 0x00 6. " BREAK_CONTROL ,Enables the serial port to alert a terminal in a communications system" "Disabled,Enabled" bitfld.byte 0x00 5. " STICK_PARITY ,Stick parity bit" ",Mark" newline bitfld.byte 0x00 4. " PARITY_SELECT ,Even parity select bit" "Not parity,Parity" bitfld.byte 0x00 3. " ENABLE_PARITY ,Parity enable bit" "Disabled,Enabled" bitfld.byte 0x00 2. " STOP_BITS ,Number of stop bits in each transmitted or received serial character" "1 bit,2 bits" newline bitfld.byte 0x00 0.--1. " WORD_LENGTH ,Number of bits in each transmitted or received serial character" "5 bits,6 bits,7 bits,8 bits" else group.byte 0x03++0x00 line.byte 0x00 "LCR,Line ControL Register" bitfld.byte 0x00 7. " DLAB ,Divisor latch access bit" "Disabled,Enabled" bitfld.byte 0x00 6. " BREAK_CONTROL ,Enables the serial port to alert a terminal in a communications system" "Disabled,Enabled" bitfld.byte 0x00 5. " STICK_PARITY ,Stick parity bit" "Space,Mark" newline bitfld.byte 0x00 4. " PARITY_SELECT ,Even parity select bit" "Not parity,Parity" bitfld.byte 0x00 3. " ENABLE_PARITY ,Parity enable bit" "Disabled,Enabled" bitfld.byte 0x00 2. " STOP_BITS ,Number of stop bits in each transmitted or received serial character" "1 bit,2 bits" newline bitfld.byte 0x00 0.--1. " WORD_LENGTH ,Number of bits in each transmitted or received serial character" "5 bits,6 bits,7 bits,8 bits" endif endif group.byte 0x04++0x00 line.byte 0x00 "MCR,Modem Control Register" bitfld.byte 0x00 4. " LOOPBACK ,Provides the loopback feature for diagnostic testing of the Serial Port" "Not provided,Provided" bitfld.byte 0x00 3. " OUT2 ,Output 2 bit used to enable an UART interrupt" "Disabled,Enabled" bitfld.byte 0x00 2. " OUT1 ,This bit controls the Output 1" "Disabled,Enabled" newline bitfld.byte 0x00 1. " RTS ,Controls the Request to send (RTS#) output" "Forced to logic 1,Forced to logic 0" bitfld.byte 0x00 0. " DTR ,Controls the Data terminal ready (DTR#) output" "Forced to logic 1,Forced to logic 0" rgroup.byte 0x05++0x01 line.byte 0x00 "LSR,Line Status Register" bitfld.byte 0x00 7. " FIFO_ERROR ,Errors in the FIFO" "No occurred,Occurred" bitfld.byte 0x00 6. " TRANSMIT_ERROR ,Empty transmitter holding register and transmitter shift register" "Not empty,Empty" bitfld.byte 0x00 5. " TRANSMIT_EMPTY ,If empty then serial port is ready to accept data" "Not empty,Empty" newline bitfld.byte 0x00 4. " BREAK_INTERRUPT ,Break interrupt" "No occurred,Occurred" bitfld.byte 0x00 3. " FRAME_ERROR ,Valid stop bit" "Valid,Not valid" bitfld.byte 0x00 2. " PARITY_ERROR ,Correct even or odd parity selected bit" "No occurred,Occurred" newline bitfld.byte 0x00 1. " OVERRUN_ERROR ,Overrun error in the receiver buffer register" "Not occurred,Occurred" bitfld.byte 0x00 0. " DATA_READY ,Ready incoming data" "Not ready,Ready" line.byte 0x01 "MSR,Modem Status Register" bitfld.byte 0x01 7. " DCD ,Complement of the data carrier detect (DCD#) input" "Disabled,Enabled" bitfld.byte 0x01 6. " RI ,Complement of the Ring Indicator (RI#) input" "Disabled,Enabled" bitfld.byte 0x01 5. " DSR ,Complement of the Data Set Ready (DSR#) input" "Forced to logic 1,Forced to logic 0" newline bitfld.byte 0x01 4. " CTS ,Complement of the Clear To Send (CTS#) input" "Forced to logic 1,Forced to logic 0" bitfld.byte 0x01 3. " DCD ,Delta data carrier detect indicates that the DCD# input to the chip has changed state" "0,1" bitfld.byte 0x01 2. " RI ,Trailing edge of ring indicator (TERI)" "0,1" newline bitfld.byte 0x01 1. " DSR ,Delta data set ready (DDSR)" "0,1" bitfld.byte 0x01 0. " CTS ,Delta clear to send (DCTS)" "0,1" group.byte 0x07++0x00 line.byte 0x00 "SR,Scratchpad Register" group.byte 0x330++0x00 line.byte 0x00 "AR,Activate Register" bitfld.byte 0x00 0. " ACTIVATE ,UART logical device is powered and functional" "Not active,Active" group.byte 0x3F0++0x00 line.byte 0x00 "CSR,Configuration Select Register" bitfld.byte 0x00 2. " POLARITY ,Inverts UART_TX and IART_RX pins" "Not inverted,Inverted" bitfld.byte 0x00 1. " POWER ,Deriving RESET reset signal" "RESET_SYS,RESET_VCC" newline bitfld.byte 0x00 0. " CLK_SRC ,Deriving UART baud clock" "Internal clock sources,External clock source" width 0x0B tree.end tree.end tree "GPIO (GPIO Interface)" base ad:0x40081000 width 9. tree "Pin Control Registers" if (((per.l(ad:0x40081000))&0x400)==0x00) group.long 0x00++0x03 line.long 0x00 "GPIO000,GPIO000 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO000,VCI_IN3#,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x00++0x03 line.long 0x00 "GPIO000,GPIO000 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO000,VCI_IN3#,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif sif cpuis("MEC1703QC2XY")||cpuis("MEC1703KP2XY")||cpuis("MEC1701QC2TN") if (((per.l(ad:0x40081000+0x04))&0x400)==0x00) group.long 0x04++0x03 line.long 0x00 "GPIO001,GPIO001 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO001,PWM4,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x04++0x03 line.long 0x00 "GPIO001,GPIO001 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO001,PWM4,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif endif if (((per.l(ad:0x40081000+0x08))&0x400)==0x00) group.long 0x08++0x03 line.long 0x00 "GPIO002,GPIO002 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO002,PWM5,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x08++0x03 line.long 0x00 "GPIO002,GPIO002 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO002,PWM5,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x0C))&0x400)==0x00) group.long 0x0C++0x03 line.long 0x00 "GPIO003,GPIO003 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO003,I2C00_SDA,SPI0_CS#,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x0C++0x03 line.long 0x00 "GPIO003,GPIO003 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO003,I2C00_SDA,SPI0_CS#,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x10))&0x400)==0x00) group.long 0x10++0x03 line.long 0x00 "GPIO004,GPIO004 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO004,I2C00_SCL,SPI0_MOSI,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x10++0x03 line.long 0x00 "GPIO004,GPIO004 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO004,I2C00_SCL,SPI0_MOSI,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif sif cpuis("MEC1703QC2XY")||cpuis("MEC1703KP2XY")||cpuis("MEC1701QC2TN") if (((per.l(ad:0x40081000+0x14))&0x400)==0x00) group.long 0x14++0x03 line.long 0x00 "GPIO005,GPIO005 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO005,I2C01_SDA,GPTP-OUT4,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x14++0x03 line.long 0x00 "GPIO005,GPIO005 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO005,I2C01_SDA,GPTP-OUT4,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif endif sif cpuis("MEC1703QC2XY")||cpuis("MEC1703KP2XY")||cpuis("MEC1701QC2TN") if (((per.l(ad:0x40081000+0x18))&0x400)==0x00) group.long 0x18++0x03 line.long 0x00 "GPIO006,GPIO006 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO006,I2C01_SCL,GPTP-OUT7,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x18++0x03 line.long 0x00 "GPIO006,GPIO006 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO006,I2C01_SCL,GPTP-OUT7,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif endif if (((per.l(ad:0x40081000+0x1C))&0x400)==0x00) group.long 0x1C++0x03 line.long 0x00 "GPIO007,GPIO007 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO007,I2C03_SDA,PS2_CLK0B,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x1C++0x03 line.long 0x00 "GPIO007,GPIO007 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO007,I2C03_SDA,PS2_CLK0B,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x20))&0x400)==0x00) group.long 0x20++0x03 line.long 0x00 "GPIO010,GPIO010 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO010,I2C03_SCL,PS2_DAT0B,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x20++0x03 line.long 0x00 "GPIO010,GPIO010 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO010,I2C03_SCL,PS2_DAT0B,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x24))&0x400)==0x00) group.long 0x24++0x03 line.long 0x00 "GPIO011,GPIO011 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO011,nSMI,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x24++0x03 line.long 0x00 "GPIO011,GPIO011 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO011,nSMI,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x28))&0x400)==0x00) group.long 0x28++0x03 line.long 0x00 "GPIO012,GPIO012 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO012,I2C07_SDA,TOUT3,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x28++0x03 line.long 0x00 "GPIO012,GPIO012 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO012,I2C07_SDA,TOUT3,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x2C))&0x400)==0x00) group.long 0x2C++0x03 line.long 0x00 "GPIO013,GPIO013 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO013,I2C07_SCL,TOUT2,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x2C++0x03 line.long 0x00 "GPIO013,GPIO013 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO013,I2C07_SCL,TOUT2,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x30))&0x400)==0x00) group.long 0x30++0x03 line.long 0x00 "GPIO014,GPIO014 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO014,PWM6,GPTP-IN6,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x30++0x03 line.long 0x00 "GPIO014,GPIO014 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO014,PWM6,GPTP-IN6,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x34))&0x400)==0x00) group.long 0x34++0x03 line.long 0x00 "GPIO015,GPIO015 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO015,PWM7,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x34++0x03 line.long 0x00 "GPIO015,GPIO015 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO015,PWM7,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x38))&0x400)==0x00) group.long 0x38++0x03 line.long 0x00 "GPIO016,GPIO016 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO016,GPTP-IN7,SHD_IO3,ICT3" newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x38++0x03 line.long 0x00 "GPIO016,GPIO016 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO016,GPTP-IN7,SHD_IO3,ICT3" newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x3C))&0x400)==0x00) group.long 0x3C++0x03 line.long 0x00 "GPIO017,GPIO017 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO017,GPTP-IN5,,KSI0" newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x3C++0x03 line.long 0x00 "GPIO017,GPIO017 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO017,GPTP-IN5,,KSI0" newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x40))&0x400)==0x00) group.long 0x40++0x03 line.long 0x00 "GPIO020,GPIO020 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO020,,,KSI1" newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x40++0x03 line.long 0x00 "GPIO020,GPIO020 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO020,,,KSI1" newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x44))&0x400)==0x00) group.long 0x44++0x03 line.long 0x00 "GPIO021,GPIO021 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO021,LPCPD#,,KSI2" newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x44++0x03 line.long 0x00 "GPIO021,GPIO021 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO021,LPCPD#,,KSI2" newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x48))&0x400)==0x00) group.long 0x48++0x03 line.long 0x00 "GPIO022,GPIO022 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO022,GPTP-IN0,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x48++0x03 line.long 0x00 "GPIO022,GPIO022 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO022,GPTP-IN0,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x4C))&0x400)==0x00) group.long 0x4C++0x03 line.long 0x00 "GPIO023,GPIO023 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO023,GPTP-IN1,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x4C++0x03 line.long 0x00 "GPIO023,GPIO023 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO023,GPTP-IN1,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x50))&0x400)==0x00) group.long 0x50++0x03 line.long 0x00 "GPIO024,GPIO024 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO024,GPTP-IN2,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x50++0x03 line.long 0x00 "GPIO024,GPIO024 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO024,GPTP-IN2,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x54))&0x400)==0x00) group.long 0x54++0x03 line.long 0x00 "GPIO025,GPIO025 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO025,TIN0,nEM_INT,UART_CLK" newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x54++0x03 line.long 0x00 "GPIO025,GPIO025 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO025,TIN0,nEM_INT,UART_CLK" newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x58))&0x400)==0x00) group.long 0x58++0x03 line.long 0x00 "GPIO026,GPIO026 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO026,TIN1,,KSI3" newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x58++0x03 line.long 0x00 "GPIO026,GPIO026 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO026,TIN1,,KSI3" newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x5C))&0x400)==0x00) group.long 0x5C++0x03 line.long 0x00 "GPIO027,GPIO027 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO027,TIN2,,KSI4" newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x5C++0x03 line.long 0x00 "GPIO027,GPIO027 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO027,TIN2,,KSI4" newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x60))&0x400)==0x00) group.long 0x60++0x03 line.long 0x00 "GPIO030,GPIO030 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO030,TIN3,,KSI5" newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x60++0x03 line.long 0x00 "GPIO030,GPIO030 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO030,TIN3,,KSI5" newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x64))&0x400)==0x00) group.long 0x64++0x03 line.long 0x00 "GPIO031,GPIO031 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO031,GPTP-OUT1,,KSI6" newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x64++0x03 line.long 0x00 "GPIO031,GPIO031 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO031,GPTP-OUT1,,KSI6" newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x68))&0x400)==0x00) group.long 0x68++0x03 line.long 0x00 "GPIO032,GPIO032 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO032,GPTP-OUT0,,KSI7" newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x68++0x03 line.long 0x00 "GPIO032,GPIO032 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO032,GPTP-OUT0,,KSI7" newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x6C))&0x400)==0x00) group.long 0x6C++0x03 line.long 0x00 "GPIO033,GPIO033 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO033,RC_ID0,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x6C++0x03 line.long 0x00 "GPIO033,GPIO033 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO033,RC_ID0,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x70))&0x400)==0x00) group.long 0x70++0x03 line.long 0x00 "GPIO034,GPIO034 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO034,RC_ID1,SPI0_CLK,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x70++0x03 line.long 0x00 "GPIO034,GPIO034 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO034,RC_ID1,SPI0_CLK,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif sif !cpuis("MEC1704QC2SZ")&&!cpuis("MEC1705QC2SZ") if (((per.l(ad:0x40081000+0x74))&0x400)==0x00) group.long 0x74++0x03 line.long 0x00 "GPIO035,GPIO035 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO035,PWM8,CTOUT1,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x74++0x03 line.long 0x00 "GPIO035,GPIO035 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO035,PWM8,CTOUT1,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif endif if (((per.l(ad:0x40081000+0x78))&0x400)==0x00) group.long 0x78++0x03 line.long 0x00 "GPIO036,GPIO036 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO036,RC_ID2,SPI0_MISO,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x78++0x03 line.long 0x00 "GPIO036,GPIO036 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO036,RC_ID2,SPI0_MISO,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x80))&0x400)==0x00) group.long 0x80++0x03 line.long 0x00 "GPIO040,GPIO040 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO040,GPTP-OUT2,,KSI0" newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x80++0x03 line.long 0x00 "GPIO040,GPIO040 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO040,GPTP-OUT2,,KSI0" newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif sif cpuis("MEC1703QC2XY")||cpuis("MEC1703KP2XY")||cpuis("MEC1701QC2TN") if (((per.l(ad:0x40081000+0x84))&0x400)==0x00) group.long 0x84++0x03 line.long 0x00 "GPIO041,GPIO041 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO041,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x84++0x03 line.long 0x00 "GPIO041,GPIO041 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO041,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif endif if (((per.l(ad:0x40081000+0x88))&0x400)==0x00) group.long 0x88++0x03 line.long 0x00 "GPIO042,GPIO042 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO042,,PECI_DAT,SD-TSI_DAT" newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x88++0x03 line.long 0x00 "GPIO042,GPIO042 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO042,,PECI_DAT,SB-TSI_DAT" newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x8C))&0x400)==0x00) group.long 0x8C++0x03 line.long 0x00 "GPIO043,GPIO043 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO043,,,SB-TSI_CLK" newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x8C++0x03 line.long 0x00 "GPIO043,GPIO043 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO043,,,SB-TSI_CLK" newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x90))&0x400)==0x00) group.long 0x90++0x03 line.long 0x00 "GPIO044,GPIO044 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO044,VREF_VTT,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x90++0x03 line.long 0x00 "GPIO044,GPIO044 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO044,VREF_VTT,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x94))&0x400)==0x00) group.long 0x94++0x03 line.long 0x00 "GPIO045,GPIO045 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO045,,,KSO1" newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x94++0x03 line.long 0x00 "GPIO045,GPIO045 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO045,,,KSO1" newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x98))&0x400)==0x00) group.long 0x98++0x03 line.long 0x00 "GPIO046,GPIO046 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO046,BCM1_DAT,,KSO2" newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x98++0x03 line.long 0x00 "GPIO046,GPIO046 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO046,BCM1_DAT,,KSO2" newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x9C))&0x400)==0x00) group.long 0x9C++0x03 line.long 0x00 "GPIO047,GPIO047 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO047,BCM1_CLK,,KSO3" newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x9C++0x03 line.long 0x00 "GPIO047,GPIO047 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO047,BCM1_CLK,,KSO3" newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0xA0))&0x400)==0x00) group.long 0xA0++0x03 line.long 0x00 "GPIO050,GPIO050 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO050,FAN_TACH0,GTACH0,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0xA0++0x03 line.long 0x00 "GPIO050,GPIO050 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO050,FAN_TACH0,GTACH0,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0xA4))&0x400)==0x00) group.long 0xA4++0x03 line.long 0x00 "GPIO051,GPIO051 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO051,FAN_TACH1,GTACH1,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0xA4++0x03 line.long 0x00 "GPIO051,GPIO051 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO051,FAN_TACH1,GTACH1,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0xA8))&0x400)==0x00) group.long 0xA8++0x03 line.long 0x00 "GPIO052,GPIO052 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO052,FAN_TACH2,LRESET#,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0xA8++0x03 line.long 0x00 "GPIO052,GPIO052 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO052,FAN_TACH2,LRESET#,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0xAC))&0x400)==0x00) group.long 0xAC++0x03 line.long 0x00 "GPIO053,GPIO053 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO053,PWM0,GPWM0,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0xAC++0x03 line.long 0x00 "GPIO053,GPIO053 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO053,PWM0,GPWM0,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0xB0))&0x400)==0x00) group.long 0xB0++0x03 line.long 0x00 "GPIO054,GPIO054 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO054,PWM1,GPWM1,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0xB0++0x03 line.long 0x00 "GPIO054,GPIO054 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO054,PWM1,GPWM1,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0xB4))&0x400)==0x00) group.long 0xB4++0x03 line.long 0x00 "GPIO055,GPIO055 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO055,PWM2,SHD_CS#,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0xB4++0x03 line.long 0x00 "GPIO055,GPIO055 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO055,PWM2,SHD_CS#,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0xB8))&0x400)==0x00) group.long 0xB8++0x03 line.long 0x00 "GPIO056,GPIO056 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO056,PWM3,SHD_CLK,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0xB8++0x03 line.long 0x00 "GPIO056,GPIO056 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO056,PWM3,SHD_CLK,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0xBC))&0x400)==0x00) group.long 0xBC++0x03 line.long 0x00 "GPIO057,GPIO057 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO057,VCC_PWRGD,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0xBC++0x03 line.long 0x00 "GPIO057,GPIO057 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO057,VCC_PWRGD,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0xC0))&0x400)==0x00) group.long 0xC0++0x03 line.long 0x00 "GPIO060,GPIO060 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO060,KBRST,48MHZ_OUT,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0xC0++0x03 line.long 0x00 "GPIO060,GPIO060 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO060,KBRST,48MHZ_OUT,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0xC4))&0x400)==0x00) group.long 0xC4++0x03 line.long 0x00 "GPIO061,GPIO061 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO061,LPCPD#,ESPI_RESET#,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0xC4++0x03 line.long 0x00 "GPIO061,GPIO061 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO061,LPCPD#,ESPI_RESET#,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0xC8))&0x400)==0x00) group.long 0xC8++0x03 line.long 0x00 "GPIO062,GPIO062 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO062,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0xC8++0x03 line.long 0x00 "GPIO062,GPIO062 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO062,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0xCC))&0x400)==0x00) group.long 0xCC++0x03 line.long 0x00 "GPIO063,GPIO063 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO063,SER_IRQ,ESPI_ALERT#,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0xCC++0x03 line.long 0x00 "GPIO063,GPIO063 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO063,SER_IRQ,ESPI_ALERT#,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0xD0))&0x400)==0x00) group.long 0xD0++0x03 line.long 0x00 "GPIO064,GPIO064 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO064,LRESET#,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0xD0++0x03 line.long 0x00 "GPIO064,GPIO064 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO064,LRESET#,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0xD4))&0x400)==0x00) group.long 0xD4++0x03 line.long 0x00 "GPIO065,GPIO065 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO065,PCI_CLK,ESPI_CLK,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0xD4++0x03 line.long 0x00 "GPIO065,GPIO065 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO065,PCI_CLK,ESPI_CLK,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0xD8))&0x400)==0x00) group.long 0xD8++0x03 line.long 0x00 "GPIO066,GPIO066 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO066,LFRAME#,ESPI_CS#,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0xD8++0x03 line.long 0x00 "GPIO066,GPIO066 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO066,LFRAME#,ESPI_CS#,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0xDC))&0x400)==0x00) group.long 0xDC++0x03 line.long 0x00 "GPIO067,GPIO067 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO067,CLKRUN#,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0xDC++0x03 line.long 0x00 "GPIO067,GPIO067 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO067,CLKRUN#,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0xE0))&0x400)==0x00) group.long 0xE0++0x03 line.long 0x00 "GPIO070,GPIO070 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO070,LAD0,ESPI_IO0,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0xE0++0x03 line.long 0x00 "GPIO070,GPIO070 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO070,LAD0,ESPI_IO0,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0xE4))&0x400)==0x00) group.long 0xE4++0x03 line.long 0x00 "GPIO071,GPIO071 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO071,LAD1,ESPI_IO1,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0xE4++0x03 line.long 0x00 "GPIO071,GPIO071 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO071,LAD1,ESPI_IO1,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0xE8))&0x400)==0x00) group.long 0xE8++0x03 line.long 0x00 "GPIO072,GPIO072 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO072,LAD2,ESPI_IO2,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0xE8++0x03 line.long 0x00 "GPIO072,GPIO072 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO072,LAD2,ESPI_IO2,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0xEC))&0x400)==0x00) group.long 0xEC++0x03 line.long 0x00 "GPIO073,GPIO073 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO073,LAD3,ESPI_IO2,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0xEC++0x03 line.long 0x00 "GPIO073,GPIO073 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO073,LAD3,ESPI_IO2,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x100))&0x400)==0x00) group.long 0x100++0x03 line.long 0x00 "GPIO100,GPIO100 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO100,nEC_SCI,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x100++0x03 line.long 0x00 "GPIO100,GPIO100 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO100,nEC_SCI,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x104))&0x400)==0x00) group.long 0x104++0x03 line.long 0x00 "GPIO101,GPIO101 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO101,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x104++0x03 line.long 0x00 "GPIO101,GPIO101 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO101,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x108))&0x400)==0x00) group.long 0x108++0x03 line.long 0x00 "GPIO102,GPIO102 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO101,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x108++0x03 line.long 0x00 "GPIO102,GPIO102 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO101,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x110))&0x400)==0x00) group.long 0x110++0x03 line.long 0x00 "GPIO104,GPIO104 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO104,UART0_TX,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x110++0x03 line.long 0x00 "GPIO104,GPIO104 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO104,UART0_TX,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x114))&0x400)==0x00) group.long 0x114++0x03 line.long 0x00 "GPIO105,GPIO105 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO105,UART0_RX,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x114++0x03 line.long 0x00 "GPIO105,GPIO105 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO105,UART0_RX,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x118))&0x400)==0x00) group.long 0x118++0x03 line.long 0x00 "GPIO106,GPIO106 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO106,PWROK,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x118++0x03 line.long 0x00 "GPIO106,GPIO106 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO106,PWROK,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x11C))&0x400)==0x00) group.long 0x11C++0x03 line.long 0x00 "GPIO107,GPIO107 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO107,nSMI,,KSO4" newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x11C++0x03 line.long 0x00 "GPIO107,GPIO107 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO107,nSMI,,KSO4" newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif sif cpuis("MEC1701QC2TN")||cpuis("MEC1703QC2XY")||cpuis("MEC1703KP2XY") if (((per.l(ad:0x40081000+0x120))&0x400)==0x00) group.long 0x120++0x03 line.long 0x00 "GPIO110,GPIO110 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO110,PS2_CLK2,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x120++0x03 line.long 0x00 "GPIO110,GPIO110 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO110,PS2_CLK2,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif endif sif cpuis("MEC1701QC2TN")||cpuis("MEC1703QC2XY")||cpuis("MEC1703KP2XY") if (((per.l(ad:0x40081000+0x124))&0x400)==0x00) group.long 0x124++0x03 line.long 0x00 "GPIO111,GPIO111 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO111,PS2_DAT2,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x124++0x03 line.long 0x00 "GPIO111,GPIO111 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO111,PS2_DAT2,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif endif if (((per.l(ad:0x40081000+0x128))&0x400)==0x00) group.long 0x128++0x03 line.long 0x00 "GPIO112,GPIO112 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO112,PS2_CLK1A,,KSO5" newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x128++0x03 line.long 0x00 "GPIO112,GPIO112 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO112,PS2_CLK1A,,KSO5" newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x12C))&0x400)==0x00) group.long 0x12C++0x03 line.long 0x00 "GPIO113,GPIO113 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO113,PS2_DAT1A,,KSO6" newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x12C++0x03 line.long 0x00 "GPIO113,GPIO113 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO113,PS2_DAT1A,,KSO6" newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x130))&0x400)==0x00) group.long 0x130++0x03 line.long 0x00 "GPIO114,GPIO114 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO114,PS2_CLK0A,nEC_SCI,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x130++0x03 line.long 0x00 "GPIO114,GPIO114 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO114,PS2_CLK0A,nEC_SCI,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x134))&0x400)==0x00) group.long 0x134++0x03 line.long 0x00 "GPIO115,GPIO115 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO115,PS2_DAT0A,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x134++0x03 line.long 0x00 "GPIO115,GPIO115 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO115,PS2_DAT0A,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x140))&0x400)==0x00) group.long 0x140++0x03 line.long 0x00 "GPIO120,GPIO120 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO120,,,KSO7" newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x140++0x03 line.long 0x00 "GPIO120,GPIO120 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO120,,,KSO7" newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x144))&0x400)==0x00) group.long 0x144++0x03 line.long 0x00 "GPIO121,GPIO121 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO121,,PVT_IO0,KSO8" newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x144++0x03 line.long 0x00 "GPIO121,GPIO121 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO121,,PVT_IO0,KSO8" newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x148))&0x400)==0x00) group.long 0x148++0x03 line.long 0x00 "GPIO122,GPIO122 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO122,BCM0_DAT,PVT_IO1,KSO9" newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x148++0x03 line.long 0x00 "GPIO122,GPIO122 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO122,BCM0_DAT,PVT_IO1,KSO9" newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x14C))&0x400)==0x00) group.long 0x14C++0x03 line.long 0x00 "GPIO123,GPIO123 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO123,BCM0_CLK,PVT_IO2,KSO10" newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x14C++0x03 line.long 0x00 "GPIO123,GPIO123 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO123,BCM0_CLK,PVT_IO2,KSO10" newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x150))&0x400)==0x00) group.long 0x150++0x03 line.long 0x00 "GPIO124,GPIO124 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO124,GPTP-OUT6,PVT_CS#,KSO11" newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x150++0x03 line.long 0x00 "GPIO124,GPIO124 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO124,GPTP-OUT6,PVT_CS#,KSO11" newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x154))&0x400)==0x00) group.long 0x154++0x03 line.long 0x00 "GPIO125,GPIO125 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO125,GPTP-OUT5,PVT_CLK,KSO12" newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x154++0x03 line.long 0x00 "GPIO125,GPIO125 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO125,GPTP-OUT5,PVT_CLK,KSO12" newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x158))&0x400)==0x00) group.long 0x158++0x03 line.long 0x00 "GPIO126,GPIO126 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO126,,PVT_IO3,KSO13" newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x158++0x03 line.long 0x00 "GPIO126,GPIO126 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO126,,PVT_IO3,KSO13" newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x15C))&0x400)==0x00) group.long 0x15C++0x03 line.long 0x00 "GPIO127,GPIO127 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO127,A20M,UART0_CTS,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x15C++0x03 line.long 0x00 "GPIO127,GPIO127 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO127,A20M,UART0_CTS,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x160))&0x400)==0x00) group.long 0x160++0x03 line.long 0x00 "GPIO130,GPIO130 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO130,I2C10_SDA,TOUT1,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x160++0x03 line.long 0x00 "GPIO130,GPIO130 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO130,I2C10_SDA,TOUT1,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x164))&0x400)==0x00) group.long 0x164++0x03 line.long 0x00 "GPIO131,GPIO131 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO131,I2C10_SCL,TOUT0,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x164++0x03 line.long 0x00 "GPIO131,GPIO131 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO131,I2C10_SCL,TOUT0,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x168))&0x400)==0x00) group.long 0x168++0x03 line.long 0x00 "GPIO132,GPIO132 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO132,I2C06_SDA,,KSO14" newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x168++0x03 line.long 0x00 "GPIO132,GPIO132 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO132,I2C06_SDA,,KSO14" newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif sif cpuis("MEC1701QC2TN")||cpuis("MEC1703QC2XY")||cpuis("MEC1703KP2XY") if (((per.l(ad:0x40081000+0x16C))&0x400)==0x00) group.long 0x16C++0x03 line.long 0x00 "GPIO133,GPIO133 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO133,PWM9,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x16C++0x03 line.long 0x00 "GPIO133,GPIO133 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO133,PWM9,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif endif sif cpuis("MEC1701QC2TN")||cpuis("MEC1703QC2XY")||cpuis("MEC1703KP2XY")||cpuis("MEC1704QC2SZ")||cpuis("MEC1705QC2SZ") if (((per.l(ad:0x40081000+0x170))&0x400)==0x00) group.long 0x170++0x03 line.long 0x00 "GPIO134,GPIO134 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO134,PWM10,UART1_RTS,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x170++0x03 line.long 0x00 "GPIO134,GPIO134 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO134,PWM10,UART1_RTS,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif endif sif cpuis("MEC1701QC2TN")||cpuis("MEC1703QC2XY")||cpuis("MEC1703KP2XY")||cpuis("MEC1704QC2SZ")||cpuis("MEC1705QC2SZ") if (((per.l(ad:0x40081000+0x174))&0x400)==0x00) group.long 0x174++0x03 line.long 0x00 "GPIO135,GPIO135 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO135,,UART1_CTS,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x174++0x03 line.long 0x00 "GPIO135,GPIO135 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO135,,UART1_CTS,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif endif if (((per.l(ad:0x40081000+0x180))&0x400)==0x00) group.long 0x180++0x03 line.long 0x00 "GPIO140,GPIO140 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO140,I2C06_SCL,ICT5,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x180++0x03 line.long 0x00 "GPIO140,GPIO140 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO140,I2C06_SCL,ICT5,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x184))&0x400)==0x00) group.long 0x184++0x03 line.long 0x00 "GPIO141,GPIO141 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO141,I2C05_SDA,SPI1_CLK,UART0_DCD#" newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x184++0x03 line.long 0x00 "GPIO141,GPIO141 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO141,I2C05_SDA,SPI1_CLK,UART0_DCD#" newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x188))&0x400)==0x00) group.long 0x188++0x03 line.long 0x00 "GPIO142,GPIO142 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO142,I2C05_SCL,SPI1_MOSI,UART0_DSR#" newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x188++0x03 line.long 0x00 "GPIO142,GPIO142 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO142,I2C05_SCL,SPI1_MOSI,UART0_DSR#" newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x18C))&0x400)==0x00) group.long 0x18C++0x03 line.long 0x00 "GPIO143,GPIO143 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO143,I2C04_SDA,SPI1_MSIO,UART0_DTR#" newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x18C++0x03 line.long 0x00 "GPIO143,GPIO143 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO143,I2C04_SDA,SPI1_MSIO,UART0_DTR#" newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x190))&0x400)==0x00) group.long 0x190++0x03 line.long 0x00 "GPIO144,GPIO144 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO144,I2C04_SCL,SPI1_CS#,UART0_RI#" newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x190++0x03 line.long 0x00 "GPIO144,GPIO144 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO144,I2C04_SCL,SPI1_CS#,UART0_RI#" newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x194))&0x400)==0x00) group.long 0x194++0x03 line.long 0x00 "GPIO145,GPIO145 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO145,I2C09_SDA,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x194++0x03 line.long 0x00 "GPIO145,GPIO145 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO145,I2C09_SDA,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x198))&0x400)==0x00) group.long 0x198++0x03 line.long 0x00 "GPIO146,GPIO146 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO146,I2C09_SCL,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x198++0x03 line.long 0x00 "GPIO146,GPIO146 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO146,I2C09_SCL,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x19C))&0x400)==0x00) group.long 0x19C++0x03 line.long 0x00 "GPIO147,GPIO147 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO147,I2C08_SDA,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x19C++0x03 line.long 0x00 "GPIO147,GPIO147 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO147,I2C08_SDA,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x1A0))&0x400)==0x00) group.long 0x1A0++0x03 line.long 0x00 "GPIO150,GPIO150 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO150,I2C08_SCL,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x1A0++0x03 line.long 0x00 "GPIO150,GPIO150 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO150,I2C08_SCL,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x1A4))&0x400)==0x00) group.long 0x1A4++0x03 line.long 0x00 "GPIO151,GPIO151 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO151,ICT4,,KSO15" newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x1A4++0x03 line.long 0x00 "GPIO151,GPIO151 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO151,ICT4,,KSO15" newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x1A8))&0x400)==0x00) group.long 0x1A8++0x03 line.long 0x00 "GPIO152,GPIO152 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO152,GPTP-OUT3,,KSO16" newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x1A8++0x03 line.long 0x00 "GPIO152,GPIO152 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO152,GPTP-OUT3,,KSO16" newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif sif !cpuis("MEC1704QC2SZ")&&!cpuis("MEC1705QC2SZ") if (((per.l(ad:0x40081000+0x1AC))&0x400)==0x00) group.long 0x1AC++0x03 line.long 0x00 "GPIO153,GPIO153 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO153,LED2,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x1AC++0x03 line.long 0x00 "GPIO153,GPIO153 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO153,LED2,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif endif if (((per.l(ad:0x40081000+0x1B0))&0x400)==0x00) group.long 0x1B0++0x03 line.long 0x00 "GPIO154,GPIO154 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO154,I2C02_SDA,PS2_CLK1B,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x1B0++0x03 line.long 0x00 "GPIO154,GPIO154 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO154,I2C02_SDA,PS2_CLK1B,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x1B4))&0x400)==0x00) group.long 0x1B4++0x03 line.long 0x00 "GPIO155,GPIO155 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO155,I2C02_SCL,PS2_DAT1B,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x1B4++0x03 line.long 0x00 "GPIO155,GPIO155 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO155,I2C02_SCL,PS2_DAT1B,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x1B8))&0x400)==0x00) group.long 0x1B8++0x03 line.long 0x00 "GPIO156,GPIO156 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO156,LED0,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x1B8++0x03 line.long 0x00 "GPIO156,GPIO156 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO156,LED0,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x1BC))&0x400)==0x00) group.long 0x1BC++0x03 line.long 0x00 "GPIO157,GPIO157 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO157,LED1,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x1BC++0x03 line.long 0x00 "GPIO157,GPIO157 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO157,LED1,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x1C0))&0x400)==0x00) group.long 0x1C0++0x03 line.long 0x00 "GPIO160,GPIO160 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO160,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x1C0++0x03 line.long 0x00 "GPIO160,GPIO160 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO160,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x1C4))&0x400)==0x00) group.long 0x1C4++0x03 line.long 0x00 "GPIO161,GPIO161 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO161,VCI_IN2#,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x1C4++0x03 line.long 0x00 "GPIO161,GPIO161 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO161,VCI_IN2#,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x1C8))&0x400)==0x00) group.long 0x1C8++0x03 line.long 0x00 "GPIO162,GPIO162 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO162,VCI_IN1#,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x1C8++0x03 line.long 0x00 "GPIO162,GPIO162 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO162,VCI_IN1#,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x1CC))&0x400)==0x00) group.long 0x1CC++0x03 line.long 0x00 "GPIO163,GPIO163 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO163,VCI_IN0#,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x1CC++0x03 line.long 0x00 "GPIO163,GPIO163 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO163,VCI_IN0#,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x1D4))&0x400)==0x00) group.long 0x1D4++0x03 line.long 0x00 "GPIO165,GPIO165 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO165,32KHZ_IN,CTOUT0,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x1D4++0x03 line.long 0x00 "GPIO165,GPIO165 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO165,32KHZ_IN,CTOUT0,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif sif cpuis("MEC1701QC2TN")||cpuis("MEC1703QC2XY")||cpuis("MEC1703KP2XY") if (((per.l(ad:0x40081000+0x1D8))&0x400)==0x00) group.long 0x1D8++0x03 line.long 0x00 "GPIO166,GPIO166 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO166,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x1D8++0x03 line.long 0x00 "GPIO166,GPIO166 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO166,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif endif if (((per.l(ad:0x40081000+0x1E0))&0x400)==0x00) group.long 0x1E0++0x03 line.long 0x00 "GPIO170,GPIO170 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO170,TFCLK,UART1_TX,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x1E0++0x03 line.long 0x00 "GPIO170,GPIO170 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO170,TFCLK,UART1_TX,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x1E4))&0x400)==0x00) group.long 0x1E4++0x03 line.long 0x00 "GPIO171,GPIO171 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO171,TFDATA,UART1_RX,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x1E4++0x03 line.long 0x00 "GPIO171,GPIO171 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO171,TFDATA,UART1_RX,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x1E8))&0x400)==0x00) group.long 0x1E8++0x03 line.long 0x00 "GPIO172,GPIO172 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO172,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x1E8++0x03 line.long 0x00 "GPIO172,GPIO172 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO172,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif sif cpuis("MEC1701QC2TN")||cpuis("MEC1703QC2XY")||cpuis("MEC1703KP2XY") if (((per.l(ad:0x40081000+0x1EC))&0x400)==0x00) group.long 0x1EC++0x03 line.long 0x00 "GPIO173,GPIO173 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO173,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x1EC++0x03 line.long 0x00 "GPIO173,GPIO173 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO173,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif endif sif cpuis("MEC1701QC2TN")||cpuis("MEC1703QC2XY")||cpuis("MEC1703KP2XY") if (((per.l(ad:0x40081000+0x1F0))&0x400)==0x00) group.long 0x1F0++0x03 line.long 0x00 "GPIO174,GPIO174 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO174,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x1F0++0x03 line.long 0x00 "GPIO174,GPIO174 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO174,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif endif if (((per.l(ad:0x40081000+0x1F4))&0x400)==0x00) group.long 0x1F4++0x03 line.long 0x00 "GPIO175,GPIO175 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO175,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x1F4++0x03 line.long 0x00 "GPIO175,GPIO175 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO175,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x200))&0x400)==0x00) group.long 0x200++0x03 line.long 0x00 "GPIO200,GPIO200 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO200,ADC00,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x200++0x03 line.long 0x00 "GPIO200,GPIO200 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO200,ADC00,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x204))&0x400)==0x00) group.long 0x204++0x03 line.long 0x00 "GPIO201,GPIO201 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO201,ADC01,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x204++0x03 line.long 0x00 "GPIO201,GPIO201 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO201,ADC01,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x208))&0x400)==0x00) group.long 0x208++0x03 line.long 0x00 "GPIO202,GPIO202 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO202,ADC02,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x208++0x03 line.long 0x00 "GPIO202,GPIO202 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO202,ADC02,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x20C))&0x400)==0x00) group.long 0x20C++0x03 line.long 0x00 "GPIO203,GPIO203 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO203,ADC03,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x20C++0x03 line.long 0x00 "GPIO203,GPIO203 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO203,ADC03,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x210))&0x400)==0x00) group.long 0x210++0x03 line.long 0x00 "GPIO204,GPIO204 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO204,ADC04,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x210++0x03 line.long 0x00 "GPIO204,GPIO204 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO204,ADC04,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x214))&0x400)==0x00) group.long 0x214++0x03 line.long 0x00 "GPIO205,GPIO205 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO205,ADC05,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x214++0x03 line.long 0x00 "GPIO205,GPIO205 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO205,ADC05,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x218))&0x400)==0x00) group.long 0x218++0x03 line.long 0x00 "GPIO206,GPIO206 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO206,ADC06,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x218++0x03 line.long 0x00 "GPIO206,GPIO206 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO206,ADC06,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x21C))&0x400)==0x00) group.long 0x21C++0x03 line.long 0x00 "GPIO207,GPIO207 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO207,ADC07,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x21C++0x03 line.long 0x00 "GPIO207,GPIO207 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO207,ADC07,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif sif cpuis("MEC1701QC2TN")||cpuis("MEC1703QC2XY")||cpuis("MEC1703KP2XY") if (((per.l(ad:0x40081000+0x220))&0x400)==0x00) group.long 0x220++0x03 line.long 0x00 "GPIO210,GPIO210 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO210,ADC08,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x220++0x03 line.long 0x00 "GPIO210,GPIO210 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO210,ADC08,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x224))&0x400)==0x00) group.long 0x224++0x03 line.long 0x00 "GPIO211,GPIO211 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO211,ADC09,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x224++0x03 line.long 0x00 "GPIO211,GPIO211 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO211,ADC09,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x228))&0x400)==0x00) group.long 0x228++0x03 line.long 0x00 "GPIO212,GPIO212 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO212,ADC10,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x228++0x03 line.long 0x00 "GPIO212,GPIO212 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO212,ADC10,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x22C))&0x400)==0x00) group.long 0x22C++0x03 line.long 0x00 "GPIO213,GPIO213 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO213,ADC11,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x22C++0x03 line.long 0x00 "GPIO213,GPIO213 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO213,ADC11,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x230))&0x400)==0x00) group.long 0x230++0x03 line.long 0x00 "GPIO214,GPIO214 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO214,ADC12,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x230++0x03 line.long 0x00 "GPIO214,GPIO214 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO214,ADC12,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x234))&0x400)==0x00) group.long 0x234++0x03 line.long 0x00 "GPIO215,GPIO215 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO215,ADC13,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x234++0x03 line.long 0x00 "GPIO215,GPIO215 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO215,ADC13,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x238))&0x400)==0x00) group.long 0x238++0x03 line.long 0x00 "GPIO216,GPIO216 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO216,ADC14,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x238++0x03 line.long 0x00 "GPIO216,GPIO216 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO216,ADC14,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x23C))&0x400)==0x00) group.long 0x23C++0x03 line.long 0x00 "GPIO217,GPIO217 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO217,ADC15,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x23C++0x03 line.long 0x00 "GPIO217,GPIO217 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO217,ADC15,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif endif if (((per.l(ad:0x40081000+0x244))&0x400)==0x00) group.long 0x244++0x03 line.long 0x00 "GPIO221,GPIO221 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO221,GPTP-IN3,32KHZ_OUT,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x244++0x03 line.long 0x00 "GPIO221,GPIO221 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO221,GPTP-IN3,32KHZ_OUT,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x248))&0x400)==0x00) group.long 0x248++0x03 line.long 0x00 "GPIO222,GPIO222 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO222,SER_IRQ,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x248++0x03 line.long 0x00 "GPIO222,GPIO222 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO222,SER_IRQ,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x24C))&0x400)==0x00) group.long 0x24C++0x03 line.long 0x00 "GPIO223,GPIO223 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO223,,SHD_IO0,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x24C++0x03 line.long 0x00 "GPIO223,GPIO223 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO223,,SHD_IO0,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x250))&0x400)==0x00) group.long 0x250++0x03 line.long 0x00 "GPIO224,GPIO224 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO224,GPTP-IN4,SHD_IO1,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x250++0x03 line.long 0x00 "GPIO224,GPIO224 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO224,GPTP-IN4,SHD_IO1,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif sif !cpuis("MEC1701HC1SZ")&&!cpuis("MEC1701QC2SZ")&&!cpuis("MEC1703QF2SZ")&&!cpuis("MEC1703KF2SZ") if (((per.l(ad:0x40081000+0x254))&0x400)==0x00) group.long 0x254++0x03 line.long 0x00 "GPIO225,GPIO225 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO225,UART0_RTS,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x254++0x03 line.long 0x00 "GPIO225,GPIO225 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO225,UART0_RTS,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif endif if (((per.l(ad:0x40081000+0x258))&0x400)==0x00) group.long 0x258++0x03 line.long 0x00 "GPIO226,GPIO226 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO226,LED3,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x258++0x03 line.long 0x00 "GPIO226,GPIO226 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO226,LED3,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x25C))&0x400)==0x00) group.long 0x25C++0x03 line.long 0x00 "GPIO227,GPIO227 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO227,,SHD_IO2,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x25C++0x03 line.long 0x00 "GPIO227,GPIO227 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO227,,SHD_IO2,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif sif cpuis("MEC1701QC2TN")||cpuis("MEC1703QC2XY")||cpuis("MEC1703KP2XY") if (((per.l(ad:0x40081000+0x260))&0x400)==0x00) group.long 0x260++0x03 line.long 0x00 "GPIO230,GPIO230 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO230,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x260++0x03 line.long 0x00 "GPIO230,GPIO230 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO230,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x264))&0x400)==0x00) group.long 0x264++0x03 line.long 0x00 "GPIO231,GPIO231 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO231,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x264++0x03 line.long 0x00 "GPIO231,GPIO231 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO231,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x26C))&0x400)==0x00) group.long 0x26C++0x03 line.long 0x00 "GPIO233,GPIO233 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO233,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x26C++0x03 line.long 0x00 "GPIO233,GPIO233 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO233,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x270))&0x400)==0x00) group.long 0x270++0x03 line.long 0x00 "GPIO234,GPIO234 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO234,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 7. " EDGE_ENABLE ,Edge enable" "Disabled,Enabled" bitfld.long 0x00 4.--6. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,?..." newline bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x270++0x03 line.long 0x00 "GPIO234,GPIO234 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO234,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif endif sif !cpuis("MEC1705QC2SZ")&&!cpuis("MEC1704QC2SZ") if (((per.l(ad:0x40081000+0x280))&0x400)==0x00) group.long 0x280++0x03 line.long 0x00 "GPIO240,GPIO240 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO240,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x280++0x03 line.long 0x00 "GPIO240,GPIO240 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO240,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif endif if (((per.l(ad:0x40081000+0x284))&0x400)==0x00) group.long 0x284++0x03 line.long 0x00 "GPIO241,GPIO241 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO241,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x284++0x03 line.long 0x00 "GPIO241,GPIO241 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO241,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x288))&0x400)==0x00) group.long 0x288++0x03 line.long 0x00 "GPIO242,GPIO242 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO242,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x288++0x03 line.long 0x00 "GPIO242,GPIO242 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO242,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x28C))&0x400)==0x00) group.long 0x28C++0x03 line.long 0x00 "GPIO243,GPIO243 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO243,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x28C++0x03 line.long 0x00 "GPIO243,GPIO243 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO243,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x290))&0x400)==0x00) group.long 0x290++0x03 line.long 0x00 "GPIO244,GPIO244 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO244,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x290++0x03 line.long 0x00 "GPIO244,GPIO244 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO244,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x294))&0x400)==0x00) group.long 0x294++0x03 line.long 0x00 "GPIO245,GPIO245 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO245,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x294++0x03 line.long 0x00 "GPIO245,GPIO245 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO245,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x298))&0x400)==0x00) group.long 0x298++0x03 line.long 0x00 "GPIO246,GPIO246 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO246,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x298++0x03 line.long 0x00 "GPIO246,GPIO246 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO246,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x2A0))&0x400)==0x00) group.long 0x2A0++0x03 line.long 0x00 "GPIO250,GPIO250 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO250,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x2A0++0x03 line.long 0x00 "GPIO250,GPIO250 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO250,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x2AC))&0x400)==0x00) group.long 0x2AC++0x03 line.long 0x00 "GPIO253,GPIO253 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO253,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x2AC++0x03 line.long 0x00 "GPIO253,GPIO253 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO253,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif if (((per.l(ad:0x40081000+0x2B0))&0x400)==0x00) group.long 0x2B0++0x03 line.long 0x00 "GPIO254,GPIO254 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" bitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO254,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" else group.long 0x2B0++0x03 line.long 0x00 "GPIO254,GPIO254 Pin Control Register" rbitfld.long 0x00 24. " GPIO_INPUT ,Return the state of GPIO input" "Low,High" rbitfld.long 0x00 16. " ALTERNATE_GPIO_DATA ,Return the last data written to the GPIO output" "Low,High" bitfld.long 0x00 12.--13. " MUX_CONTROL ,Determines the active signal function for a pin" "GPIO254,?..." newline bitfld.long 0x00 11. " POLARITY ,Invert selected signal output function" "Not inverted,Inverted" bitfld.long 0x00 10. " GPIO_OUTPUT_SELECT ,Determines register to update for GPIO outputs" "ALTERNATE_GPIO_DATA,GPIO output" bitfld.long 0x00 9. " GPIO_DIRECTOIN ,GPIO direction" "Input,Output" newline bitfld.long 0x00 8. " OUTPUT_BUFFER_TYPE ,Output buffer type" "Push-pull,Open drain" bitfld.long 0x00 4.--7. " INTERRUPT_DETECTION ,Determines the interrupt capability of the GPIO input" "Low level,High level,,,Interrupt disabled,,,,Rising edge,Falling edge,Either edge,?..." bitfld.long 0x00 2.--3. " POWER_GATING ,Power gating select" "VTR power rail,VCC main power rail,Unpowered,VTR powered output" newline bitfld.long 0x00 0.--1. " PU/PD ,Internal pull-up/pull-down resistor enable" "None,Pull up,Pull down,Keeper mode" endif tree.end width 18. tree "Input GPIO Registers" rgroup.long 0x300++0x17 line.long 0x00 "IN_GPIO[000:036],Input GPIO[000:036] Register" bitfld.long 0x00 30. " GPIO036_IN ,GPIO036 input" "Low,High" sif !cpuis("MEC1704QC2SZ")&&!cpuis("MEC1705QC2SZ") bitfld.long 0x00 29. " GPIO035_IN ,GPIO035 Input" "Low,High" endif bitfld.long 0x00 28. " GPIO034_IN ,GPIO034 input" "Low,High" bitfld.long 0x00 27. " GPIO033_IN ,GPIO033 input" "Low,High" bitfld.long 0x00 26. " GPIO032_IN ,GPIO032 input" "Low,High" bitfld.long 0x00 25. " GPIO031_IN ,GPIO031 input" "Low,High" newline bitfld.long 0x00 24. " GPIO030_IN ,GPIO030 input" "Low,High" bitfld.long 0x00 23. " GPIO027_IN ,GPIO027 input" "Low,High" bitfld.long 0x00 22. " GPIO026_IN ,GPIO026 input" "Low,High" bitfld.long 0x00 21. " GPIO025_IN ,GPIO025 input" "Low,High" bitfld.long 0x00 20. " GPIO024_IN ,GPIO024 input" "Low,High" bitfld.long 0x00 19. " GPIO023_IN ,GPIO023 input" "Low,High" newline bitfld.long 0x00 18. " GPIO022_IN ,GPIO022 input" "Low,High" bitfld.long 0x00 17. " GPIO021_IN ,GPIO021 input" "Low,High" bitfld.long 0x00 16. " GPIO020_IN ,GPIO020 input" "Low,High" bitfld.long 0x00 15. " GPIO017_IN ,GPIO017 input" "Low,High" bitfld.long 0x00 14. " GPIO016_IN ,GPIO016 input" "Low,High" bitfld.long 0x00 13. " GPIO015_IN ,GPIO015 input" "Low,High" newline bitfld.long 0x00 12. " GPIO014_IN ,GPIO014 input" "Low,High" bitfld.long 0x00 11. " GPIO013_IN ,GPIO013 input" "Low,High" bitfld.long 0x00 10. " GPIO012_IN ,GPIO012 input" "Low,High" bitfld.long 0x00 9. " GPIO011_IN ,GPIO011 input" "Low,High" bitfld.long 0x00 8. " GPIO010_IN ,GPIO010 input" "Low,High" bitfld.long 0x00 7. " GPIO007_IN ,GPIO007 input" "Low,High" newline sif cpuis("MEC1703QC2XY")||cpuis("MEC1703KP2XY")||cpuis("MEC1701QC2TN") bitfld.long 0x00 6. " GPIO006_IN ,GPIO006 input" "Low,High" bitfld.long 0x00 5. " GPIO005_IN ,GPIO005 input" "Low,High" bitfld.long 0x00 4. " GPIO004_IN ,GPIO004 input" "Low,High" else bitfld.long 0x00 4. " GPIO004_IN ,GPIO004 input" "Low,High" endif bitfld.long 0x00 3. " GPIO003_IN ,GPIO003 input" "Low,High" bitfld.long 0x00 2. " GPIO002_IN ,GPIO002 input" "Low,High" sif cpuis("MEC1703QC2XY")||cpuis("MEC1703KP2XY")||cpuis("MEC1701QC2TN") bitfld.long 0x00 1. " GPIO001_IN ,GPIO001 input" "Low,High" endif newline bitfld.long 0x00 0. " GPIO000_IN ,GPIO000 input" "Low,High" line.long 0x04 "IN_GPIO[040:076],Input GPIO[040:076] Register" bitfld.long 0x04 27. " GPIO073_IN ,GPIO073 input" "Low,High" bitfld.long 0x04 26. " GPIO072_IN ,GPIO072 input" "Low,High" bitfld.long 0x04 25. " GPIO071_IN ,GPIO071 input" "Low,High" bitfld.long 0x04 24. " GPIO070_IN ,GPIO070 input" "Low,High" bitfld.long 0x04 23. " GPIO067_IN ,GPIO067 input" "Low,High" bitfld.long 0x04 22. " GPIO066_IN ,GPIO066 input" "Low,High" newline bitfld.long 0x04 21. " GPIO065_IN ,GPIO065 input" "Low,High" bitfld.long 0x04 20. " GPIO064_IN ,GPIO064 input" "Low,High" bitfld.long 0x04 19. " GPIO063_IN ,GPIO063 input" "Low,High" bitfld.long 0x04 18. " GPIO062_IN ,GPIO062 input" "Low,High" bitfld.long 0x04 17. " GPIO061_IN ,GPIO061 input" "Low,High" bitfld.long 0x04 16. " GPIO060_IN ,GPIO060 input" "Low,High" newline bitfld.long 0x04 15. " GPIO057_IN ,GPIO057 input" "Low,High" bitfld.long 0x04 14. " GPIO056_IN ,GPIO056 input" "Low,High" bitfld.long 0x04 13. " GPIO055_IN ,GPIO055 input" "Low,High" bitfld.long 0x04 12. " GPIO054_IN ,GPIO054 input" "Low,High" bitfld.long 0x04 11. " GPIO053_IN ,GPIO053 input" "Low,High" bitfld.long 0x04 10. " GPIO052_IN ,GPIO052 input" "Low,High" newline bitfld.long 0x04 9. " GPIO051_IN ,GPIO051 input" "Low,High" bitfld.long 0x04 8. " GPIO050_IN ,GPIO050 input" "Low,High" bitfld.long 0x04 7. " GPIO047_IN ,GPIO047 input" "Low,High" bitfld.long 0x04 6. " GPIO046_IN ,GPIO046 input" "Low,High" bitfld.long 0x04 5. " GPIO045_IN ,GPIO045 input" "Low,High" bitfld.long 0x04 4. " GPIO044_IN ,GPIO044 input" "Low,High" newline bitfld.long 0x04 3. " GPIO043_IN ,GPIO043 input" "Low,High" bitfld.long 0x04 2. " GPIO042_IN ,GPIO042 input" "Low,High" sif cpuis("MEC1703QC2XY")||cpuis("MEC1703KP2XY")||cpuis("MEC1701QC2TN") bitfld.long 0x04 1. " GPIO041_IN ,GPIO041 input" "Low,High" endif bitfld.long 0x04 0. " GPIO040_IN ,GPIO040 input" "Low,High" line.long 0x08 "IN_GPIO[100:136],Input GPIO[100:136] Register" sif cpuis("MEC1701QC2TN")||cpuis("MEC1703QC2XY")||cpuis("MEC1703KP2XY")||cpuis("MEC1704QC2SZ")||cpuis("MEC1705QC2SZ") bitfld.long 0x08 29. " GPIO135_IN ,GPIO135 input" "Low,High" bitfld.long 0x08 28. " GPIO134_IN ,GPIO134 input" "Low,High" endif sif cpuis("MEC1701QC2TN")||cpuis("MEC1703QC2XY")||cpuis("MEC1703KP2XY") bitfld.long 0x08 27. " GPIO133_IN ,GPIO133 input" "Low,High" endif newline bitfld.long 0x08 26. " GPIO132_IN ,GPIO132 input" "Low,High" bitfld.long 0x08 25. " GPIO131_IN ,GPIO131 input" "Low,High" bitfld.long 0x08 24. " GPIO130_IN ,GPIO130 input" "Low,High" bitfld.long 0x08 23. " GPIO127_IN ,GPIO127 input" "Low,High" bitfld.long 0x08 22. " GPIO126_IN ,GPIO126 input" "Low,High" bitfld.long 0x08 21. " GPIO125_IN ,GPIO125 input" "Low,High" newline bitfld.long 0x08 20. " GPIO124_IN ,GPIO124 input" "Low,High" bitfld.long 0x08 19. " GPIO123_IN ,GPIO123 input" "Low,High" bitfld.long 0x08 18. " GPIO122_IN ,GPIO122 input" "Low,High" bitfld.long 0x08 17. " GPIO121_IN ,GPIO121 input" "Low,High" bitfld.long 0x08 16. " GPIO120_IN ,GPIO120 input" "Low,High" bitfld.long 0x08 13. " GPIO115_IN ,GPIO115 input" "Low,High" newline bitfld.long 0x08 12. " GPIO114_IN ,GPIO114 input" "Low,High" bitfld.long 0x08 11. " GPIO113_IN ,GPIO113 input" "Low,High" bitfld.long 0x08 10. " GPIO112_IN ,GPIO112 input" "Low,High" sif cpuis("MEC1701QC2TN")||cpuis("MEC1703QC2XY")||cpuis("MEC1703KP2XY") bitfld.long 0x08 9. " GPIO111_IN ,GPIO111 input" "Low,High" bitfld.long 0x08 8. " GPIO110_IN ,GPIO110 input" "Low,High" endif bitfld.long 0x08 7. " GPIO107_IN ,GPIO107 input" "Low,High" newline bitfld.long 0x08 6. " GPIO106_IN ,GPIO106 input" "Low,High" bitfld.long 0x08 5. " GPIO105_IN ,GPIO105 input" "Low,High" bitfld.long 0x08 4. " GPIO104_IN ,GPIO104 input" "Low,High" bitfld.long 0x08 2. " GPIO102_IN ,GPIO102 input" "Low,High" bitfld.long 0x08 1. " GPIO101_IN ,GPIO101 input" "Low,High" bitfld.long 0x08 0. " GPIO100_IN ,GPIO100 input" "Low,High" line.long 0x0C "IN_GPIO[140:176],Input GPIO[140:176] Register" bitfld.long 0x0C 29. " GPIO175_IN ,GPIO175 input" "Low,High" sif cpuis("MEC1701QC2TN")||cpuis("MEC1703QC2XY")||cpuis("MEC1703KP2XY") bitfld.long 0x0C 28. " GPIO174_IN ,GPIO174 input" "Low,High" bitfld.long 0x0C 27. " GPIO173_IN ,GPIO173 input" "Low,High" endif bitfld.long 0x0C 26. " GPIO172_IN ,GPIO172 input" "Low,High" bitfld.long 0x0C 25. " GPIO171_IN ,GPIO171 input" "Low,High" bitfld.long 0x0C 24. " GPIO170_IN ,GPIO170 input" "Low,High" newline sif cpuis("MEC1701QC2TN")||cpuis("MEC1703QC2XY")||cpuis("MEC1703KP2XY") bitfld.long 0x0C 22. " GPIO166_IN ,GPIO166 input" "Low,High" bitfld.long 0x0C 21. " GPIO165_IN ,GPIO165 input" "Low,High" else bitfld.long 0x0C 21. " GPIO165_IN ,GPIO165 input" "Low,High" endif bitfld.long 0x0C 19. " GPIO163_IN ,GPIO163 input" "Low,High" bitfld.long 0x0C 18. " GPIO162_IN ,GPIO162 input" "Low,High" bitfld.long 0x0C 17. " GPIO161_IN ,GPIO161 input" "Low,High" bitfld.long 0x0C 16. " GPIO160_IN ,GPIO160 input" "Low,High" newline bitfld.long 0x0C 15. " GPIO157_IN ,GPIO157 input" "Low,High" bitfld.long 0x0C 14. " GPIO156_IN ,GPIO156 input" "Low,High" bitfld.long 0x0C 13. " GPIO155_IN ,GPIO155 input" "Low,High" bitfld.long 0x0C 12. " GPIO154_IN ,GPIO154 input" "Low,High" sif !cpuis("MEC1704QC2SZ")&&!cpuis("MEC1705QC2SZ") bitfld.long 0x0C 11. " GPIO153_IN ,GPIO153 input" "Low,High" endif bitfld.long 0x0C 10. " GPIO152_IN ,GPIO152 input" "Low,High" newline bitfld.long 0x0C 9. " GPIO151_IN ,GPIO151 input" "Low,High" bitfld.long 0x0C 8. " GPIO150_IN ,GPIO150 input" "Low,High" bitfld.long 0x0C 7. " GPIO147_IN ,GPIO147 input" "Low,High" bitfld.long 0x0C 6. " GPIO146_IN ,GPIO146 input" "Low,High" bitfld.long 0x0C 5. " GPIO145_IN ,GPIO145 input" "Low,High" bitfld.long 0x0C 4. " GPIO144_IN ,GPIO144 input" "Low,High" newline bitfld.long 0x0C 3. " GPIO143_IN ,GPIO143 input" "Low,High" bitfld.long 0x0C 2. " GPIO142_IN ,GPIO142 input" "Low,High" bitfld.long 0x0C 1. " GPIO141_IN ,GPIO141 input" "Low,High" bitfld.long 0x0C 0. " GPIO140_IN ,GPIO140 input" "Low,High" line.long 0x10 "IN_GPIO[200:236],Input GPIO[200:236] Register" sif cpuis("MEC1701QC2TN")||cpuis("MEC1703QC2XY")||cpuis("MEC1703KP2XY") bitfld.long 0x10 28. " GPIO234_IN ,GPIO234 input" "Low,High" bitfld.long 0x10 27. " GPIO233_IN ,GPIO233 input" "Low,High" bitfld.long 0x10 25. " GPIO231_IN ,GPIO231 input" "Low,High" bitfld.long 0x10 24. " GPIO230_IN ,GPIO230 input" "Low,High" bitfld.long 0x10 23. " GPIO227_IN ,GPIO227 input" "Low,High" else newline bitfld.long 0x10 23. " GPIO227_IN ,GPIO227 input" "Low,High" endif bitfld.long 0x10 22. " GPIO226_IN ,GPIO226 input" "Low,High" newline sif !cpuis("MEC1701HC1SZ")&&!cpuis("MEC1701QC2SZ")&&!cpuis("MEC1703QF2SZ")&&!cpuis("MEC1703KF2SZ") bitfld.long 0x10 21. " GPIO225_IN ,GPIO225 input" "Low,High" bitfld.long 0x10 20. " GPIO224_IN ,GPIO224 input" "Low,High" else bitfld.long 0x10 20. " GPIO224_IN ,GPIO224 input" "Low,High" endif bitfld.long 0x10 19. " GPIO223_IN ,GPIO223 input" "Low,High" bitfld.long 0x10 18. " GPIO222_IN ,GPIO222 input" "Low,High" bitfld.long 0x10 17. " GPIO221_IN ,GPIO221 input" "Low,High" sif cpuis("MEC1701QC2TN")||cpuis("MEC1703QC2XY")||cpuis("MEC1703KP2XY") bitfld.long 0x10 15. " GPIO217_IN ,GPIO217 input" "Low,High" newline bitfld.long 0x10 14. " GPIO216_IN ,GPIO216 input" "Low,High" bitfld.long 0x10 13. " GPIO215_IN ,GPIO215 input" "Low,High" bitfld.long 0x10 12. " GPIO214_IN ,GPIO214 input" "Low,High" bitfld.long 0x10 11. " GPIO213_IN ,GPIO213 input" "Low,High" bitfld.long 0x10 10. " GPIO212_IN ,GPIO212 input" "Low,High" bitfld.long 0x10 9. " GPIO211_IN ,GPIO211 input" "Low,High" newline bitfld.long 0x10 8. " GPIO210_IN ,GPIO210 input" "Low,High" bitfld.long 0x10 7. " GPIO207_IN ,GPIO207 input" "Low,High" else newline bitfld.long 0x10 7. " GPIO207_IN ,GPIO207 input" "Low,High" endif bitfld.long 0x10 6. " GPIO206_IN ,GPIO206 input" "Low,High" bitfld.long 0x10 5. " GPIO205_IN ,GPIO205 input" "Low,High" bitfld.long 0x10 4. " GPIO204_IN ,GPIO204 input" "Low,High" bitfld.long 0x10 3. " GPIO203_IN ,GPIO203 input" "Low,High" newline bitfld.long 0x10 2. " GPIO202_IN ,GPIO202 input" "Low,High" bitfld.long 0x10 1. " GPIO201_IN ,GPIO201 input" "Low,High" bitfld.long 0x10 0. " GPIO200_IN ,GPIO200 input" "Low,High" line.long 0x14 "IN_GPIO[240:276],Input GPIO[240:276] Register" bitfld.long 0x14 12. " GPIO254_IN ,GPIO254 input" "Low,High" bitfld.long 0x14 11. " GPIO253_IN ,GPIO253 input" "Low,High" bitfld.long 0x14 8. " GPIO250_IN ,GPIO250 input" "Low,High" bitfld.long 0x14 6. " GPIO246_IN ,GPIO246 input" "Low,High" bitfld.long 0x14 5. " GPIO245_IN ,GPIO245 input" "Low,High" bitfld.long 0x14 4. " GPIO244_IN ,GPIO244 input" "Low,High" newline bitfld.long 0x14 3. " GPIO243_IN ,GPIO243 input" "Low,High" bitfld.long 0x14 2. " GPIO242_IN ,GPIO242 input" "Low,High" bitfld.long 0x14 1. " GPIO241_IN ,GPIO241 input" "Low,High" sif !cpuis("MEC1705QC2SZ")&&!cpuis("MEC1704QC2SZ") bitfld.long 0x14 0. " GPIO240_IN ,GPIO240 input" "Low,High" endif tree.end width 19. tree "Output GPIO Registers" group.long 0x380++0x17 line.long 0x00 "OUT_GPIO[000:036],Output GPIO[000:036] Register" bitfld.long 0x00 30. " GPIO036_OUT ,GPIO036 output" "Low,High" sif !cpuis("MEC1704QC2SZ")&&!cpuis("MEC1705QC2SZ") bitfld.long 0x00 29. " GPIO035_OUT ,GPIO035 output" "Low,High" endif bitfld.long 0x00 28. " GPIO034_OUT ,GPIO034 output" "Low,High" bitfld.long 0x00 27. " GPIO033_OUT ,GPIO033 output" "Low,High" bitfld.long 0x00 26. " GPIO032_OUT ,GPIO032 output" "Low,High" bitfld.long 0x00 25. " GPIO031_OUT ,GPIO031 output" "Low,High" newline bitfld.long 0x00 24. " GPIO030_OUT ,GPIO030 output" "Low,High" bitfld.long 0x00 23. " GPIO027_OUT ,GPIO027 output" "Low,High" bitfld.long 0x00 22. " GPIO026_OUT ,GPIO026 output" "Low,High" bitfld.long 0x00 21. " GPIO025_OUT ,GPIO025 output" "Low,High" bitfld.long 0x00 20. " GPIO024_OUT ,GPIO024 output" "Low,High" bitfld.long 0x00 19. " GPIO023_OUT ,GPIO023 output" "Low,High" newline bitfld.long 0x00 18. " GPIO022_OUT ,GPIO022 output" "Low,High" bitfld.long 0x00 17. " GPIO021_OUT ,GPIO021 output" "Low,High" bitfld.long 0x00 16. " GPIO020_OUT ,GPIO020 output" "Low,High" bitfld.long 0x00 15. " GPIO017_OUT ,GPIO017 output" "Low,High" bitfld.long 0x00 14. " GPIO016_OUT ,GPIO016 output" "Low,High" bitfld.long 0x00 13. " GPIO015_OUT ,GPIO015 output" "Low,High" newline bitfld.long 0x00 12. " GPIO014_OUT ,GPIO014 output" "Low,High" bitfld.long 0x00 11. " GPIO013_OUT ,GPIO013 output" "Low,High" bitfld.long 0x00 10. " GPIO012_OUT ,GPIO012 output" "Low,High" bitfld.long 0x00 9. " GPIO011_OUT ,GPIO011 output" "Low,High" bitfld.long 0x00 8. " GPIO010_OUT ,GPIO010 output" "Low,High" bitfld.long 0x00 7. " GPIO007_OUT ,GPIO007 output" "Low,High" newline sif cpuis("MEC1703QC2XY")||cpuis("MEC1703KP2XY")||cpuis("MEC1701QC2TN") bitfld.long 0x00 6. " GPIO006_OUT ,GPIO006 output" "Low,High" bitfld.long 0x00 5. " GPIO005_OUT ,GPIO005 output" "Low,High" bitfld.long 0x00 4. " GPIO004_OUT ,GPIO004 output" "Low,High" else bitfld.long 0x00 4. " GPIO004_OUT ,GPIO004 output" "Low,High" endif bitfld.long 0x00 3. " GPIO003_OUT ,GPIO003 output" "Low,High" bitfld.long 0x00 2. " GPIO002_OUT ,GPIO002 output" "Low,High" sif cpuis("MEC1703QC2XY")||cpuis("MEC1703KP2XY")||cpuis("MEC1701QC2TN") bitfld.long 0x00 1. " GPIO001_OUT ,GPIO001 output" "Low,High" endif newline bitfld.long 0x00 0. " GPIO000_OUT ,GPIO000 output" "Low,High" line.long 0x04 "OUT_GPIO[040:076],Output GPIO[040:076] Register" bitfld.long 0x04 27. " GPIO073_OUT ,GPIO073 output" "Low,High" bitfld.long 0x04 26. " GPIO072_OUT ,GPIO072 output" "Low,High" bitfld.long 0x04 25. " GPIO071_OUT ,GPIO071 output" "Low,High" bitfld.long 0x04 24. " GPIO070_OUT ,GPIO070 output" "Low,High" bitfld.long 0x04 23. " GPIO067_OUT ,GPIO067 output" "Low,High" bitfld.long 0x04 22. " GPIO066_OUT ,GPIO066 output" "Low,High" newline bitfld.long 0x04 21. " GPIO065_OUT ,GPIO065 output" "Low,High" bitfld.long 0x04 20. " GPIO064_OUT ,GPIO064 output" "Low,High" bitfld.long 0x04 19. " GPIO063_OUT ,GPIO063 output" "Low,High" bitfld.long 0x04 18. " GPIO062_OUT ,GPIO062 output" "Low,High" bitfld.long 0x04 17. " GPIO061_OUT ,GPIO061 output" "Low,High" bitfld.long 0x04 16. " GPIO060_OUT ,GPIO060 output" "Low,High" newline bitfld.long 0x04 15. " GPIO057_OUT ,GPIO057 output" "Low,High" bitfld.long 0x04 14. " GPIO056_OUT ,GPIO056 output" "Low,High" bitfld.long 0x04 13. " GPIO055_OUT ,GPIO055 output" "Low,High" bitfld.long 0x04 12. " GPIO054_OUT ,GPIO054 output" "Low,High" bitfld.long 0x04 11. " GPIO053_OUT ,GPIO053 output" "Low,High" bitfld.long 0x04 10. " GPIO052_OUT ,GPIO052 output" "Low,High" newline bitfld.long 0x04 9. " GPIO051_OUT ,GPIO051 output" "Low,High" bitfld.long 0x04 8. " GPIO050_OUT ,GPIO050 output" "Low,High" bitfld.long 0x04 7. " GPIO047_OUT ,GPIO047 output" "Low,High" bitfld.long 0x04 6. " GPIO046_OUT ,GPIO046 output" "Low,High" bitfld.long 0x04 5. " GPIO045_OUT ,GPIO045 output" "Low,High" bitfld.long 0x04 4. " GPIO044_OUT ,GPIO044 output" "Low,High" newline bitfld.long 0x04 3. " GPIO043_OUT ,GPIO043 output" "Low,High" bitfld.long 0x04 2. " GPIO042_OUT ,GPIO042 output" "Low,High" sif cpuis("MEC1703QC2XY")||cpuis("MEC1703KP2XY")||cpuis("MEC1701QC2TN") bitfld.long 0x04 1. " GPIO041_OUT ,GPIO041 output" "Low,High" endif bitfld.long 0x04 0. " GPIO040_OUT ,GPIO040 output" "Low,High" line.long 0x08 "OUT_GPIO[100:136],Output GPIO[100:136] Register" sif cpuis("MEC1701QC2TN")||cpuis("MEC1703QC2XY")||cpuis("MEC1703KP2XY")||cpuis("MEC1704QC2SZ")||cpuis("MEC1705QC2SZ") bitfld.long 0x08 29. " GPIO135_OUT ,GPIO135 output" "Low,High" bitfld.long 0x08 28. " GPIO134_OUT ,GPIO134 output" "Low,High" endif sif cpuis("MEC1701QC2TN")||cpuis("MEC1703QC2XY")||cpuis("MEC1703KP2XY") bitfld.long 0x08 27. " GPIO133_OUT ,GPIO133 output" "Low,High" endif newline bitfld.long 0x08 26. " GPIO132_OUT ,GPIO132 output" "Low,High" bitfld.long 0x08 25. " GPIO131_OUT ,GPIO131 output" "Low,High" bitfld.long 0x08 24. " GPIO130_OUT ,GPIO130 output" "Low,High" bitfld.long 0x08 23. " GPIO127_OUT ,GPIO127 output" "Low,High" bitfld.long 0x08 22. " GPIO126_OUT ,GPIO126 output" "Low,High" bitfld.long 0x08 21. " GPIO125_OUT ,GPIO125 output" "Low,High" newline bitfld.long 0x08 20. " GPIO124_OUT ,GPIO124 output" "Low,High" bitfld.long 0x08 19. " GPIO123_OUT ,GPIO123 output" "Low,High" bitfld.long 0x08 18. " GPIO122_OUT ,GPIO122 output" "Low,High" bitfld.long 0x08 17. " GPIO121_OUT ,GPIO121 output" "Low,High" bitfld.long 0x08 16. " GPIO120_OUT ,GPIO120 output" "Low,High" bitfld.long 0x08 13. " GPIO115_OUT ,GPIO115 output" "Low,High" newline bitfld.long 0x08 12. " GPIO114_OUT ,GPIO114 output" "Low,High" bitfld.long 0x08 11. " GPIO113_OUT ,GPIO113 output" "Low,High" bitfld.long 0x08 10. " GPIO112_OUT ,GPIO112 output" "Low,High" sif cpuis("MEC1701QC2TN")||cpuis("MEC1703QC2XY")||cpuis("MEC1703KP2XY") bitfld.long 0x08 9. " GPIO111_OUT ,GPIO111 output" "Low,High" bitfld.long 0x08 8. " GPIO110_OUT ,GPIO110 output" "Low,High" endif bitfld.long 0x08 7. " GPIO107_OUT ,GPIO107 output" "Low,High" newline bitfld.long 0x08 6. " GPIO106_OUT ,GPIO106 output" "Low,High" bitfld.long 0x08 5. " GPIO105_OUT ,GPIO105 output" "Low,High" bitfld.long 0x08 4. " GPIO104_OUT ,GPIO104 output" "Low,High" bitfld.long 0x08 2. " GPIO102_OUT ,GPIO102 output" "Low,High" bitfld.long 0x08 1. " GPIO101_OUT ,GPIO101 output" "Low,High" bitfld.long 0x08 0. " GPIO100_OUT ,GPIO100 output" "Low,High" line.long 0x0C "OUT_GPIO[140:176],Output GPIO[140:176] Register" bitfld.long 0x0C 29. " GPIO175_OUT ,GPIO175 output" "Low,High" sif cpuis("MEC1701QC2TN")||cpuis("MEC1703QC2XY")||cpuis("MEC1703KP2XY") bitfld.long 0x0C 28. " GPIO174_OUT ,GPIO174 output" "Low,High" bitfld.long 0x0C 27. " GPIO173_OUT ,GPIO173 output" "Low,High" endif bitfld.long 0x0C 26. " GPIO172_OUT ,GPIO172 output" "Low,High" bitfld.long 0x0C 25. " GPIO171_OUT ,GPIO171 output" "Low,High" bitfld.long 0x0C 24. " GPIO170_OUT ,GPIO170 output" "Low,High" newline sif cpuis("MEC1701QC2TN")||cpuis("MEC1703QC2XY")||cpuis("MEC1703KP2XY") bitfld.long 0x0C 22. " GPIO166_OUT ,GPIO166 output" "Low,High" bitfld.long 0x0C 21. " GPIO165_OUT ,GPIO165 output" "Low,High" else bitfld.long 0x0C 21. " GPIO165_OUT ,GPIO165 output" "Low,High" endif bitfld.long 0x0C 19. " GPIO163_OUT ,GPIO163 output" "Low,High" bitfld.long 0x0C 18. " GPIO162_OUT ,GPIO162 output" "Low,High" bitfld.long 0x0C 17. " GPIO161_OUT ,GPIO161 output" "Low,High" bitfld.long 0x0C 16. " GPIO160_OUT ,GPIO160 output" "Low,High" newline bitfld.long 0x0C 15. " GPIO157_OUT ,GPIO157 output" "Low,High" bitfld.long 0x0C 14. " GPIO156_OUT ,GPIO156 output" "Low,High" bitfld.long 0x0C 13. " GPIO155_OUT ,GPIO155 output" "Low,High" bitfld.long 0x0C 12. " GPIO154_OUT ,GPIO154 output" "Low,High" sif !cpuis("MEC1704QC2SZ")&&!cpuis("MEC1705QC2SZ") bitfld.long 0x0C 11. " GPIO153_OUT ,GPIO153 output" "Low,High" endif bitfld.long 0x0C 10. " GPIO152_OUT ,GPIO152 output" "Low,High" newline bitfld.long 0x0C 9. " GPIO151_OUT ,GPIO151 output" "Low,High" bitfld.long 0x0C 8. " GPIO150_OUT ,GPIO150 output" "Low,High" bitfld.long 0x0C 7. " GPIO147_OUT ,GPIO147 output" "Low,High" bitfld.long 0x0C 6. " GPIO146_OUT ,GPIO146 output" "Low,High" bitfld.long 0x0C 5. " GPIO145_OUT ,GPIO145 output" "Low,High" bitfld.long 0x0C 4. " GPIO144_OUT ,GPIO144 output" "Low,High" newline bitfld.long 0x0C 3. " GPIO143_OUT ,GPIO143 output" "Low,High" bitfld.long 0x0C 2. " GPIO142_OUT ,GPIO142 output" "Low,High" bitfld.long 0x0C 1. " GPIO141_OUT ,GPIO141 output" "Low,High" bitfld.long 0x0C 0. " GPIO140_OUT ,GPIO140 output" "Low,High" line.long 0x10 "OUT_GPIO[200:236],Output GPIO[200:236] Register" sif cpuis("MEC1701QC2TN")||cpuis("MEC1703QC2XY")||cpuis("MEC1703KP2XY") bitfld.long 0x10 28. " GPIO234_OUT ,GPIO234 output" "Low,High" bitfld.long 0x10 27. " GPIO233_OUT ,GPIO233 output" "Low,High" bitfld.long 0x10 25. " GPIO231_OUT ,GPIO231 output" "Low,High" bitfld.long 0x10 24. " GPIO230_OUT ,GPIO230 output" "Low,High" bitfld.long 0x10 23. " GPIO227_OUT ,GPIO227 output" "Low,High" else newline bitfld.long 0x10 23. " GPIO227_OUT ,GPIO227 output" "Low,High" endif bitfld.long 0x10 22. " GPIO226_OUT ,GPIO226 output" "Low,High" newline sif !cpuis("MEC1701HC1SZ")&&!cpuis("MEC1701QC2SZ")&&!cpuis("MEC1703QF2SZ")&&!cpuis("MEC1703KF2SZ") bitfld.long 0x10 21. " GPIO225_OUT ,GPIO225 output" "Low,High" bitfld.long 0x10 20. " GPIO224_OUT ,GPIO224 output" "Low,High" else bitfld.long 0x10 20. " GPIO224_OUT ,GPIO224 output" "Low,High" endif bitfld.long 0x10 19. " GPIO223_OUT ,GPIO223 output" "Low,High" bitfld.long 0x10 18. " GPIO222_OUT ,GPIO222 output" "Low,High" bitfld.long 0x10 17. " GPIO221_OUT ,GPIO221 output" "Low,High" sif cpuis("MEC1701QC2TN")||cpuis("MEC1703QC2XY")||cpuis("MEC1703KP2XY") bitfld.long 0x10 15. " GPIO217_OUT ,GPIO217 output" "Low,High" newline bitfld.long 0x10 14. " GPIO216_OUT ,GPIO216 output" "Low,High" bitfld.long 0x10 13. " GPIO215_OUT ,GPIO215 output" "Low,High" bitfld.long 0x10 12. " GPIO214_OUT ,GPIO214 output" "Low,High" bitfld.long 0x10 11. " GPIO213_OUT ,GPIO213 output" "Low,High" bitfld.long 0x10 10. " GPIO212_OUT ,GPIO212 output" "Low,High" bitfld.long 0x10 9. " GPIO211_OUT ,GPIO211 output" "Low,High" newline bitfld.long 0x10 8. " GPIO210_OUT ,GPIO210 output" "Low,High" bitfld.long 0x10 7. " GPIO207_OUT ,GPIO207 output" "Low,High" else newline bitfld.long 0x10 7. " GPIO207_OUT ,GPIO207 output" "Low,High" endif bitfld.long 0x10 6. " GPIO206_OUT ,GPIO206 output" "Low,High" bitfld.long 0x10 5. " GPIO205_OUT ,GPIO205 output" "Low,High" bitfld.long 0x10 4. " GPIO204_OUT ,GPIO204 output" "Low,High" bitfld.long 0x10 3. " GPIO203_OUT ,GPIO203 output" "Low,High" newline bitfld.long 0x10 2. " GPIO202_OUT ,GPIO202 output" "Low,High" bitfld.long 0x10 1. " GPIO201_OUT ,GPIO201 output" "Low,High" bitfld.long 0x10 0. " GPIO200_OUT ,GPIO200 output" "Low,High" line.long 0x14 "OUT_GPIO[240:276],Output GPIO[240:276] Register" bitfld.long 0x14 12. " GPIO254_OUT ,GPIO254 output" "Low,High" bitfld.long 0x14 11. " GPIO253_OUT ,GPIO253 output" "Low,High" bitfld.long 0x14 8. " GPIO250_OUT ,GPIO250 output" "Low,High" bitfld.long 0x14 6. " GPIO246_OUT ,GPIO246 output" "Low,High" bitfld.long 0x14 5. " GPIO245_OUT ,GPIO245 output" "Low,High" bitfld.long 0x14 4. " GPIO244_OUT ,GPIO244 output" "Low,High" newline bitfld.long 0x14 3. " GPIO243_OUT ,GPIO243 output" "Low,High" bitfld.long 0x14 2. " GPIO242_OUT ,GPIO242 output" "Low,High" bitfld.long 0x14 1. " GPIO241_OUT ,GPIO241 output" "Low,High" sif !cpuis("MEC1705QC2SZ")&&!cpuis("MEC1704QC2SZ") bitfld.long 0x14 0. " GPIO240_OUT ,GPIO240 output" "Low,High" endif tree.end width 9. tree "Pin Control 2 Registers" group.long 0x500++0x03 line.long 0x00 "GPIO000,GPIO000 Pin Control 2 Register" bitfld.long 0x00 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x00 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" sif cpuis("MEC1703QC2XY")||cpuis("MEC1703KP2XY")||cpuis("MEC1701QC2TN") group.long 0x504++0x03 line.long 0x00 "GPIO001,GPIO001 Pin Control 2 Register" bitfld.long 0x00 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x00 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" endif group.long 0x508++0x0B line.long 0x00 "GPIO002,GPIO002 Pin Control 2 Register" bitfld.long 0x00 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x00 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x04 "GPIO003,GPIO003 Pin Control 2 Register" bitfld.long 0x04 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x04 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x08 "GPIO004,GPIO004 Pin Control 2 Register" bitfld.long 0x08 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x08 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" sif cpuis("MEC1703QC2XY")||cpuis("MEC1703KP2XY")||cpuis("MEC1701QC2TN") group.long 0x514++0x07 line.long 0x00 "GPIO005,GPIO005 Pin Control 2 Register" bitfld.long 0x00 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x00 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x04 "GPIO006,GPIO006 Pin Control 2 Register" bitfld.long 0x04 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x04 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" endif group.long 0x51C++0x57 line.long 0x00 "GPIO007,GPIO007 Pin Control 2 Register" bitfld.long 0x00 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x00 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x04 "GPIO010,GPIO010 Pin Control 2 Register" bitfld.long 0x04 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x04 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x08 "GPIO011,GPIO011 Pin Control 2 Register" bitfld.long 0x08 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x08 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x0C "GPIO012,GPIO012 Pin Control 2 Register" bitfld.long 0x0C 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x0C 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x10 "GPIO013,GPIO013 Pin Control 2 Register" bitfld.long 0x10 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x10 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x14 "GPIO014,GPIO014 Pin Control 2 Register" bitfld.long 0x14 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x14 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x18 "GPIO015,GPIO015 Pin Control 2 Register" bitfld.long 0x18 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x18 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x1C "GPIO016,GPIO016 Pin Control 2 Register" bitfld.long 0x1C 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x1C 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x20 "GPIO017,GPIO017 Pin Control 2 Register" bitfld.long 0x20 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x20 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x24 "GPIO020,GPIO020 Pin Control 2 Register" bitfld.long 0x24 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x24 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x28 "GPIO021,GPIO021 Pin Control 2 Register" bitfld.long 0x28 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x28 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x2C "GPIO022,GPIO022 Pin Control 2 Register" bitfld.long 0x2C 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x2C 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x30 "GPIO023,GPIO023 Pin Control 2 Register" bitfld.long 0x30 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x30 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x34 "GPIO024,GPIO024 Pin Control 2 Register" bitfld.long 0x34 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x34 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x38 "GPIO025,GPIO025 Pin Control 2 Register" bitfld.long 0x38 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x38 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x3C "GPIO026,GPIO026 Pin Control 2 Register" bitfld.long 0x3C 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x3C 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x40 "GPIO027,GPIO027 Pin Control 2 Register" bitfld.long 0x40 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x40 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x44 "GPIO030,GPIO030 Pin Control 2 Register" bitfld.long 0x44 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x44 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x48 "GPIO031,GPIO031 Pin Control 2 Register" bitfld.long 0x48 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x48 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x4C "GPIO032,GPIO032 Pin Control 2 Register" bitfld.long 0x4C 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x4C 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x50 "GPIO033,GPIO033 Pin Control 2 Register" bitfld.long 0x50 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x50 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x54 "GPIO034,GPIO034 Pin Control 2 Register" bitfld.long 0x54 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x54 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" sif !cpuis("MEC1704QC2SZ")&&!cpuis("MEC1705QC2SZ") group.long 0x574++0x03 line.long 0x00 "GPIO035,GPIO035 Pin Control 2 Register" bitfld.long 0x00 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x00 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" endif group.long 0x578++0x03 line.long 0x00 "GPIO036,GPIO036 Pin Control 2 Register" bitfld.long 0x00 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x00 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" group.long 0x580++0x03 line.long 0x00 "GPIO040,GPIO040 Pin Control 2 Register" bitfld.long 0x00 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x00 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" sif cpuis("MEC1703QC2XY")||cpuis("MEC1703KP2XY")||cpuis("MEC1701QC2TN") group.long 0x584++0x03 line.long 0x00 "GPIO041,GPIO041 Pin Control 2 Register" bitfld.long 0x00 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x00 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" endif group.long 0x588++0x67 line.long 0x00 "GPIO042,GPIO042 Pin Control 2 Register" bitfld.long 0x00 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x00 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x04 "GPIO043,GPIO043 Pin Control 2 Register" bitfld.long 0x04 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x04 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x08 "GPIO044,GPIO044 Pin Control 2 Register" bitfld.long 0x08 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x08 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x0C "GPIO045,GPIO045 Pin Control 2 Register" bitfld.long 0x0C 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x0C 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x10 "GPIO046,GPIO046 Pin Control 2 Register" bitfld.long 0x10 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x10 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x14 "GPIO047,GPIO047 Pin Control 2 Register" bitfld.long 0x14 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x14 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x18 "GPIO050,GPIO050 Pin Control 2 Register" bitfld.long 0x18 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x18 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x1C "GPIO051,GPIO051 Pin Control 2 Register" bitfld.long 0x1C 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x1C 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x20 "GPIO052,GPIO052 Pin Control 2 Register" bitfld.long 0x20 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x20 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x24 "GPIO053,GPIO053 Pin Control 2 Register" bitfld.long 0x24 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x24 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x28 "GPIO054,GPIO054 Pin Control 2 Register" bitfld.long 0x28 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x28 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x2C "GPIO055,GPIO055 Pin Control 2 Register" bitfld.long 0x2C 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x2C 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x30 "GPIO056,GPIO056 Pin Control 2 Register" bitfld.long 0x30 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x30 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x34 "GPIO057,GPIO057 Pin Control 2 Register" bitfld.long 0x34 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x34 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x38 "GPIO060,GPIO060 Pin Control 2 Register" bitfld.long 0x38 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x38 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x3C "GPIO061,GPIO061 Pin Control 2 Register" bitfld.long 0x3C 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x3C 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x40 "GPIO062,GPIO062 Pin Control 2 Register" bitfld.long 0x40 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x40 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x44 "GPIO063,GPIO063 Pin Control 2 Register" bitfld.long 0x44 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x44 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x48 "GPIO064,GPIO064 Pin Control 2 Register" bitfld.long 0x48 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x48 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x4C "GPIO065,GPIO065 Pin Control 2 Register" bitfld.long 0x4C 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x4C 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x50 "GPIO066,GPIO066 Pin Control 2 Register" bitfld.long 0x50 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x50 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x54 "GPIO067,GPIO067 Pin Control 2 Register" bitfld.long 0x54 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x54 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x58 "GPIO070,GPIO070 Pin Control 2 Register" bitfld.long 0x58 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x58 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x5C "GPIO071,GPIO071 Pin Control 2 Register" bitfld.long 0x5C 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x5C 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x60 "GPIO072,GPIO072 Pin Control 2 Register" bitfld.long 0x60 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x60 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x64 "GPIO073,GPIO073 Pin Control 2 Register" bitfld.long 0x64 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x64 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" group.long 0x600++0x0B line.long 0x00 "GPIO100,GPIO100 Pin Control 2 Register" bitfld.long 0x00 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x00 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x04 "GPIO101,GPIO101 Pin Control 2 Register" bitfld.long 0x04 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x04 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x08 "GPIO102,GPIO102 Pin Control 2 Register" bitfld.long 0x08 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x08 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" group.long 0x610++0x0F line.long 0x00 "GPIO104,GPIO104 Pin Control 2 Register" bitfld.long 0x00 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x00 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x04 "GPIO105,GPIO105 Pin Control 2 Register" bitfld.long 0x04 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x04 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x08 "GPIO106,GPIO106 Pin Control 2 Register" bitfld.long 0x08 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x08 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x0C "GPIO107,GPIO107 Pin Control 2 Register" bitfld.long 0x0C 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x0C 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" sif cpuis("MEC1703QC2XY")||cpuis("MEC1703KP2XY")||cpuis("MEC1701QC2TN") group.long 0x620++0x07 line.long 0x00 "GPIO110,GPIO110 Pin Control 2 Register" bitfld.long 0x00 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x00 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x04 "GPIO111,GPIO111 Pin Control 2 Register" bitfld.long 0x04 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x04 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" endif group.long 0x628++0x0F line.long 0x00 "GPIO112,GPIO112 Pin Control 2 Register" bitfld.long 0x00 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x00 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x04 "GPIO113,GPIO113 Pin Control 2 Register" bitfld.long 0x04 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x04 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x08 "GPIO114,GPIO114 Pin Control 2 Register" bitfld.long 0x08 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x08 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x0C "GPIO115,GPIO115 Pin Control 2 Register" bitfld.long 0x0C 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x0C 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" group.long 0x640++0x2B line.long 0x00 "GPIO120,GPIO120 Pin Control 2 Register" bitfld.long 0x00 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x00 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x04 "GPIO121,GPIO121 Pin Control 2 Register" bitfld.long 0x04 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x04 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x08 "GPIO122,GPIO122 Pin Control 2 Register" bitfld.long 0x08 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x08 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x0C "GPIO123,GPIO123 Pin Control 2 Register" bitfld.long 0x0C 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x0C 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x10 "GPIO124,GPIO124 Pin Control 2 Register" bitfld.long 0x10 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x10 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x14 "GPIO125,GPIO125 Pin Control 2 Register" bitfld.long 0x14 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x14 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x18 "GPIO126,GPIO126 Pin Control 2 Register" bitfld.long 0x18 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x18 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x1C "GPIO127,GPIO127 Pin Control 2 Register" bitfld.long 0x1C 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x1C 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x20 "GPIO130,GPIO130 Pin Control 2 Register" bitfld.long 0x20 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x20 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x24 "GPIO131,GPIO131 Pin Control 2 Register" bitfld.long 0x24 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x24 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x28 "GPIO132,GPIO132 Pin Control 2 Register" bitfld.long 0x28 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x28 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" sif cpuis("MEC1703QC2XY")||cpuis("MEC1703KP2XY")||cpuis("MEC1701QC2TN") group.long 0x66C++0x03 line.long 0x00 "GPIO133,GPIO133 Pin Control 2 Register" bitfld.long 0x00 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x00 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" endif sif cpuis("MEC1701QC2TN")||cpuis("MEC1703QC2XY")||cpuis("MEC1703KP2XY")||cpuis("MEC1704QC2SZ")||cpuis("MEC1705QC2SZ") group.long 0x670++0x07 line.long 0x00 "GPIO134,GPIO134 Pin Control 2 Register" bitfld.long 0x00 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x00 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x04 "GPIO135,GPIO135 Pin Control 2 Register" bitfld.long 0x04 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x04 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" endif group.long 0x680++0x2B line.long 0x00 "GPIO140,GPIO140 Pin Control 2 Register" bitfld.long 0x00 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x00 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x04 "GPIO141,GPIO141 Pin Control 2 Register" bitfld.long 0x04 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x04 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x08 "GPIO142,GPIO142 Pin Control 2 Register" bitfld.long 0x08 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x08 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x0C "GPIO143,GPIO143 Pin Control 2 Register" bitfld.long 0x0C 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x0C 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x10 "GPIO144,GPIO144 Pin Control 2 Register" bitfld.long 0x10 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x10 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x14 "GPIO145,GPIO145 Pin Control 2 Register" bitfld.long 0x14 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x14 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x18 "GPIO146,GPIO146 Pin Control 2 Register" bitfld.long 0x18 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x18 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x1C "GPIO147,GPIO147 Pin Control 2 Register" bitfld.long 0x1C 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x1C 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x20 "GPIO150,GPIO150 Pin Control 2 Register" bitfld.long 0x20 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x20 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x24 "GPIO151,GPIO151 Pin Control 2 Register" bitfld.long 0x24 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x24 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x28 "GPIO152,GPIO152 Pin Control 2 Register" bitfld.long 0x28 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x28 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" sif !cpuis("MEC1704QC2SZ")&&!cpuis("MEC1705QC2SZ") group.long 0x6AC++0x03 line.long 0x00 "GPIO153,GPIO153 Pin Control 2 Register" bitfld.long 0x00 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x00 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" endif group.long 0x6B0++0x1F line.long 0x00 "GPIO154,GPIO154 Pin Control 2 Register" bitfld.long 0x00 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x00 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x04 "GPIO155,GPIO155 Pin Control 2 Register" bitfld.long 0x04 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x04 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x08 "GPIO156,GPIO156 Pin Control 2 Register" bitfld.long 0x08 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x08 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x0C "GPIO157,GPIO157 Pin Control 2 Register" bitfld.long 0x0C 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x0C 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x10 "GPIO160,GPIO160 Pin Control 2 Register" bitfld.long 0x10 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x10 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x14 "GPIO161,GPIO161 Pin Control 2 Register" bitfld.long 0x14 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x14 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x18 "GPIO162,GPIO162 Pin Control 2 Register" bitfld.long 0x18 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x18 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x1C "GPIO163,GPIO163 Pin Control 2 Register" bitfld.long 0x1C 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x1C 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" group.long 0x6D4++0x03 line.long 0x00 "GPIO165,GPIO165 Pin Control 2 Register" bitfld.long 0x00 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x00 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" sif cpuis("MEC1703QC2XY")||cpuis("MEC1703KP2XY")||cpuis("MEC1701QC2TN") group.long 0x6D8++0x03 line.long 0x00 "GPIO166,GPIO166 Pin Control 2 Register" bitfld.long 0x00 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x00 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" endif group.long 0x6E0++0x0B line.long 0x00 "GPIO170,GPIO170 Pin Control 2 Register" bitfld.long 0x00 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x00 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x04 "GPIO171,GPIO171 Pin Control 2 Register" bitfld.long 0x04 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x04 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x08 "GPIO172,GPIO172 Pin Control 2 Register" bitfld.long 0x08 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x08 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" sif cpuis("MEC1703QC2XY")||cpuis("MEC1703KP2XY")||cpuis("MEC1701QC2TN") group.long 0x6EC++0x07 line.long 0x00 "GPIO173,GPIO173 Pin Control 2 Register" bitfld.long 0x00 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x00 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x04 "GPIO174,GPIO174 Pin Control 2 Register" bitfld.long 0x04 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x04 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" endif group.long 0x6F4++0x03 line.long 0x00 "GPIO175,GPIO175 Pin Control 2 Register" bitfld.long 0x00 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x00 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" group.long 0x700++0x1F line.long 0x00 "GPIO200,GPIO200 Pin Control 2 Register" bitfld.long 0x00 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x00 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x04 "GPIO201,GPIO201 Pin Control 2 Register" bitfld.long 0x04 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x04 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x08 "GPIO202,GPIO202 Pin Control 2 Register" bitfld.long 0x08 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x08 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x0C "GPIO203,GPIO203 Pin Control 2 Register" bitfld.long 0x0C 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x0C 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x10 "GPIO204,GPIO204 Pin Control 2 Register" bitfld.long 0x10 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x10 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x14 "GPIO205,GPIO205 Pin Control 2 Register" bitfld.long 0x14 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x14 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x18 "GPIO206,GPIO206 Pin Control 2 Register" bitfld.long 0x18 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x18 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x1C "GPIO207,GPIO207 Pin Control 2 Register" bitfld.long 0x1C 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x1C 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" sif cpuis("MEC1703QC2XY")||cpuis("MEC1703KP2XY")||cpuis("MEC1701QC2TN") group.long 0x720++0x1F line.long 0x00 "GPIO210,GPIO210 Pin Control 2 Register" bitfld.long 0x00 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x00 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x04 "GPIO211,GPIO211 Pin Control 2 Register" bitfld.long 0x04 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x04 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x08 "GPIO212,GPIO212 Pin Control 2 Register" bitfld.long 0x08 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x08 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x0C "GPIO213,GPIO213 Pin Control 2 Register" bitfld.long 0x0C 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x0C 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x10 "GPIO214,GPIO214 Pin Control 2 Register" bitfld.long 0x10 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x10 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x14 "GPIO215,GPIO215 Pin Control 2 Register" bitfld.long 0x14 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x14 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x18 "GPIO216,GPIO216 Pin Control 2 Register" bitfld.long 0x18 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x18 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x1C "GPIO217,GPIO217 Pin Control 2 Register" bitfld.long 0x1C 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x1C 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" endif group.long 0x744++0x0F line.long 0x00 "GPIO221,GPIO221 Pin Control 2 Register" bitfld.long 0x00 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x00 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x04 "GPIO222,GPIO222 Pin Control 2 Register" bitfld.long 0x04 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x04 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x08 "GPIO223,GPIO223 Pin Control 2 Register" bitfld.long 0x08 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x08 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x0C "GPIO224,GPIO224 Pin Control 2 Register" bitfld.long 0x0C 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x0C 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" sif !cpuis("MEC1701HC1SZ")&&!cpuis("MEC1701QC2SZ")&&!cpuis("MEC1703QF2SZ")&&!cpuis("MEC1703KF2SZ") group.long 0x754++0x03 line.long 0x00 "GPIO225,GPIO225 Pin Control 2 Register" bitfld.long 0x00 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x00 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" endif group.long 0x758++0x07 line.long 0x00 "GPIO226,GPIO226 Pin Control 2 Register" bitfld.long 0x00 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x00 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x04 "GPIO227,GPIO227 Pin Control 2 Register" bitfld.long 0x04 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x04 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" sif cpuis("MEC1701QC2TN")||cpuis("MEC1703QC2XY")||cpuis("MEC1703KP2XY") group.long 0x760++0x07 line.long 0x00 "GPIO230,GPIO230 Pin Control 2 Register" bitfld.long 0x00 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x00 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x04 "GPIO231,GPIO231 Pin Control 2 Register" bitfld.long 0x04 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x04 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" group.long 0x76C++0x07 line.long 0x00 "GPIO233,GPIO233 Pin Control 2 Register" bitfld.long 0x00 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x00 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x04 "GPIO234,GPIO234 Pin Control 2 Register" bitfld.long 0x04 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x04 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" endif sif !cpuis("MEC1705QC2SZ")&&!cpuis("MEC1704QC2SZ") group.long 0x800++0x03 line.long 0x00 "GPIO240,GPIO240 Pin Control 2 Register" bitfld.long 0x00 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x00 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" endif group.long 0x804++0x17 line.long 0x00 "GPIO241,GPIO241 Pin Control 2 Register" bitfld.long 0x00 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x00 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x04 "GPIO242,GPIO242 Pin Control 2 Register" bitfld.long 0x04 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x04 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x08 "GPIO243,GPIO243 Pin Control 2 Register" bitfld.long 0x08 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x08 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x0C "GPIO244,GPIO244 Pin Control 2 Register" bitfld.long 0x0C 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x0C 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x10 "GPIO245,GPIO245 Pin Control 2 Register" bitfld.long 0x10 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x10 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x14 "GPIO246,GPIO246 Pin Control 2 Register" bitfld.long 0x14 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x14 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" group.long 0x820++0x03 line.long 0x00 "GPIO250,GPIO250 Pin Control 2 Register" bitfld.long 0x00 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x00 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" group.long 0x82C++0x07 line.long 0x00 "GPIO253,GPIO253 Pin Control 2 Register" bitfld.long 0x00 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x00 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" line.long 0x04 "GPIO254,GPIO254 Pin Control 2 Register" bitfld.long 0x04 4.--5. " DRIVE_STRENGTH ,Drive strength select" "2mA,4mA,8mA,12mA" bitfld.long 0x04 0. " SLEW_RATE ,Slew rate select" "Slow,Fast" tree.end width 0x0B tree.end tree "WDT (Watch Dog Timer)" base ad:0x40000000 width 22. group.word 0x00++0x01 line.word 0x00 "WDT_LOAD_REGISTER,WDT Load Register" group.byte 0x04++0x00 line.byte 0x00 "WDT_CONTROL_REGISTER,WDT Control Register" bitfld.byte 0x00 4. " JTAG_STALL ,WDT JTAG or SWD stall function enable" "Disabled,Enabled" bitfld.byte 0x00 3. " WEEK_TIMER_STALL ,WDT week timer stall function enable" "Disabled,Enabled" bitfld.byte 0x00 2. " HIBERNATION_TIMER0_STALL ,WDT hibernation timer 0 stall function enable" "Disabled,Enabled" rbitfld.byte 0x00 1. " TEST ,Test bit 1" "0,1" newline bitfld.byte 0x00 0. " WDT_ENABLE ,WDT enable" "Disabled,Enabled" wgroup.byte 0x08++0x00 line.byte 0x00 "WDT_KICK_REGISTER,WDT Kick Register" rgroup.word 0x0C++0x01 line.word 0x00 "WDT_CNT_REGISTER,WDT Count Register" width 0x0B tree.end tree "Basic Timer" tree "16-bit" base ad:0x40000C00 width 30. group.long 0x0++0x13 line.long 0x00 "TIMER_CNT_REGISTER_0,Timer Count Register Instance 0" hexmask.long.word 0x00 0.--15. 1. " COUNTER ,Counter" line.long 0x04 "TIMER_PRLD_REGISTER_0,Timer Preload Register Instance 0" hexmask.long.word 0x04 0.--15. 1. " PRE_LOAD ,Timer pre-load for the counter" line.long 0x08 "TIMER_STAT_REGISTER_0,Timer Status Register Instance 0" eventfld.long 0x08 0. " EVENT_INTERRUPT ,Event interrupt" "No interrupt,Interrupt" line.long 0x0C "TIMER_INT_ENABLE_REGISTER_0,Timer Int Enable Register Instance 0" bitfld.long 0x0C 0. " EVENT_INTERRUPT_ENABLE ,Event interrupt enable" "Disabled,Enabled" line.long 0x10 "TIMER_CNTRL_REGISTER_0,Timer Control Register Instance 0" hexmask.long.word 0x10 16.--31. 1. " PRE_SCALE ,Pre scale (divide down the system clock)" bitfld.long 0x10 7. " HALT ,Halt bit" "Not halted,Halted" bitfld.long 0x10 6. " RELOAD ,Counter reload" "Not reloaded,Reloaded" newline bitfld.long 0x10 5. " START ,Timer counter start" "Not started,Started" bitfld.long 0x10 4. " SOFT_RESET ,Soft reset" "No reset,Reset" bitfld.long 0x10 3. " AUTO_RESTART ,Auto restart" "No restart,Restart" newline bitfld.long 0x10 2. " COUNT_UP ,Counter direction" "Decrement,Increment" bitfld.long 0x10 0. " ENABLE ,Enable the block for operation" "Disabled,Enabled" group.long 0x20++0x13 line.long 0x00 "TIMER_CNT_REGISTER_1,Timer Count Register Instance 1" hexmask.long.word 0x00 0.--15. 1. " COUNTER ,Counter" line.long 0x04 "TIMER_PRLD_REGISTER_1,Timer Preload Register Instance 1" hexmask.long.word 0x04 0.--15. 1. " PRE_LOAD ,Timer pre-load for the counter" line.long 0x08 "TIMER_STAT_REGISTER_1,Timer Status Register Instance 1" eventfld.long 0x08 0. " EVENT_INTERRUPT ,Event interrupt" "No interrupt,Interrupt" line.long 0x0C "TIMER_INT_ENABLE_REGISTER_1,Timer Int Enable Register Instance 1" bitfld.long 0x0C 0. " EVENT_INTERRUPT_ENABLE ,Event interrupt enable" "Disabled,Enabled" line.long 0x10 "TIMER_CNTRL_REGISTER_1,Timer Control Register Instance 1" hexmask.long.word 0x10 16.--31. 1. " PRE_SCALE ,Pre scale (divide down the system clock)" bitfld.long 0x10 7. " HALT ,Halt bit" "Not halted,Halted" bitfld.long 0x10 6. " RELOAD ,Counter reload" "Not reloaded,Reloaded" newline bitfld.long 0x10 5. " START ,Timer counter start" "Not started,Started" bitfld.long 0x10 4. " SOFT_RESET ,Soft reset" "No reset,Reset" bitfld.long 0x10 3. " AUTO_RESTART ,Auto restart" "No restart,Restart" newline bitfld.long 0x10 2. " COUNT_UP ,Counter direction" "Decrement,Increment" bitfld.long 0x10 0. " ENABLE ,Enable the block for operation" "Disabled,Enabled" group.long 0x40++0x13 line.long 0x00 "TIMER_CNT_REGISTER_2,Timer Count Register Instance 2" hexmask.long.word 0x00 0.--15. 1. " COUNTER ,Counter" line.long 0x04 "TIMER_PRLD_REGISTER_2,Timer Preload Register Instance 2" hexmask.long.word 0x04 0.--15. 1. " PRE_LOAD ,Timer pre-load for the counter" line.long 0x08 "TIMER_STAT_REGISTER_2,Timer Status Register Instance 2" eventfld.long 0x08 0. " EVENT_INTERRUPT ,Event interrupt" "No interrupt,Interrupt" line.long 0x0C "TIMER_INT_ENABLE_REGISTER_2,Timer Int Enable Register Instance 2" bitfld.long 0x0C 0. " EVENT_INTERRUPT_ENABLE ,Event interrupt enable" "Disabled,Enabled" line.long 0x10 "TIMER_CNTRL_REGISTER_2,Timer Control Register Instance 2" hexmask.long.word 0x10 16.--31. 1. " PRE_SCALE ,Pre scale (divide down the system clock)" bitfld.long 0x10 7. " HALT ,Halt bit" "Not halted,Halted" bitfld.long 0x10 6. " RELOAD ,Counter reload" "Not reloaded,Reloaded" newline bitfld.long 0x10 5. " START ,Timer counter start" "Not started,Started" bitfld.long 0x10 4. " SOFT_RESET ,Soft reset" "No reset,Reset" bitfld.long 0x10 3. " AUTO_RESTART ,Auto restart" "No restart,Restart" newline bitfld.long 0x10 2. " COUNT_UP ,Counter direction" "Decrement,Increment" bitfld.long 0x10 0. " ENABLE ,Enable the block for operation" "Disabled,Enabled" group.long 0x60++0x13 line.long 0x00 "TIMER_CNT_REGISTER_3,Timer Count Register Instance 3" hexmask.long.word 0x00 0.--15. 1. " COUNTER ,Counter" line.long 0x04 "TIMER_PRLD_REGISTER_3,Timer Preload Register Instance 3" hexmask.long.word 0x04 0.--15. 1. " PRE_LOAD ,Timer pre-load for the counter" line.long 0x08 "TIMER_STAT_REGISTER_3,Timer Status Register Instance 3" eventfld.long 0x08 0. " EVENT_INTERRUPT ,Event interrupt" "No interrupt,Interrupt" line.long 0x0C "TIMER_INT_ENABLE_REGISTER_3,Timer Int Enable Register Instance 3" bitfld.long 0x0C 0. " EVENT_INTERRUPT_ENABLE ,Event interrupt enable" "Disabled,Enabled" line.long 0x10 "TIMER_CNTRL_REGISTER_3,Timer Control Register Instance 3" hexmask.long.word 0x10 16.--31. 1. " PRE_SCALE ,Pre scale (divide down the system clock)" bitfld.long 0x10 7. " HALT ,Halt bit" "Not halted,Halted" bitfld.long 0x10 6. " RELOAD ,Counter reload" "Not reloaded,Reloaded" newline bitfld.long 0x10 5. " START ,Timer counter start" "Not started,Started" bitfld.long 0x10 4. " SOFT_RESET ,Soft reset" "No reset,Reset" bitfld.long 0x10 3. " AUTO_RESTART ,Auto restart" "No restart,Restart" newline bitfld.long 0x10 2. " COUNT_UP ,Counter direction" "Decrement,Increment" bitfld.long 0x10 0. " ENABLE ,Enable the block for operation" "Disabled,Enabled" width 0x0B tree.end tree "32-bit" base ad:0x40000C80 width 30. group.long 0x0++0x13 line.long 0x00 "TIMER_CNT_REGISTER_0,Timer Count Register Instance 0" line.long 0x04 "TIMER_PRLD_REGISTER_0,Timer Preload Register Instance 0" line.long 0x08 "TIMER_STAT_REGISTER_0,Timer Status Register Instance 0" eventfld.long 0x08 0. " EVENT_INTERRUPT ,Event interrupt" "No interrupt,Interrupt" line.long 0x0C "TIMER_INT_ENABLE_REGISTER_0,Timer Int Enable Register Instance 0" bitfld.long 0x0C 0. " EVENT_INTERRUPT_ENABLE ,Event interrupt enable" "Disabled,Enabled" line.long 0x10 "TIMER_CNTRL_REGISTER_0,Timer Control Register Instance 0" hexmask.long.word 0x10 16.--31. 1. " PRE_SCALE ,Pre scale (divide down the system clock)" bitfld.long 0x10 7. " HALT ,Halt bit" "Not halted,Halted" bitfld.long 0x10 6. " RELOAD ,Counter reload" "Not reloaded,Reloaded" newline bitfld.long 0x10 5. " START ,Timer counter start" "Not started,Started" bitfld.long 0x10 4. " SOFT_RESET ,Soft reset" "No reset,Reset" bitfld.long 0x10 3. " AUTO_RESTART ,Auto restart" "No restart,Restart" newline bitfld.long 0x10 2. " COUNT_UP ,Counter direction" "Decrement,Increment" bitfld.long 0x10 0. " ENABLE ,Enable the block for operation" "Disabled,Enabled" group.long 0x20++0x13 line.long 0x00 "TIMER_CNT_REGISTER_1,Timer Count Register Instance 1" line.long 0x04 "TIMER_PRLD_REGISTER_1,Timer Preload Register Instance 1" line.long 0x08 "TIMER_STAT_REGISTER_1,Timer Status Register Instance 1" eventfld.long 0x08 0. " EVENT_INTERRUPT ,Event interrupt" "No interrupt,Interrupt" line.long 0x0C "TIMER_INT_ENABLE_REGISTER_1,Timer Int Enable Register Instance 1" bitfld.long 0x0C 0. " EVENT_INTERRUPT_ENABLE ,Event interrupt enable" "Disabled,Enabled" line.long 0x10 "TIMER_CNTRL_REGISTER_1,Timer Control Register Instance 1" hexmask.long.word 0x10 16.--31. 1. " PRE_SCALE ,Pre scale (divide down the system clock)" bitfld.long 0x10 7. " HALT ,Halt bit" "Not halted,Halted" bitfld.long 0x10 6. " RELOAD ,Counter reload" "Not reloaded,Reloaded" newline bitfld.long 0x10 5. " START ,Timer counter start" "Not started,Started" bitfld.long 0x10 4. " SOFT_RESET ,Soft reset" "No reset,Reset" bitfld.long 0x10 3. " AUTO_RESTART ,Auto restart" "No restart,Restart" newline bitfld.long 0x10 2. " COUNT_UP ,Counter direction" "Decrement,Increment" bitfld.long 0x10 0. " ENABLE ,Enable the block for operation" "Disabled,Enabled" width 0x0B tree.end tree.end tree "16 Bit CTI (16-Bit Counter-Timer Interface)" tree "Channel 0" base ad:0x40000D00 width 9. if (((per.l(ad:0x40000D00))&0x0C)==0x04) group.long 0x00++0x03 line.long 0x00 "TXCR,Timer X ControL Register $2" rbitfld.long 0x00 12. " TIMERX_CLK_REQ ,Reflects the current state of the timer Clock_Required output signal" "Not required,Required" rbitfld.long 0x00 11. " SLEEP_ENABLE ,Reflects the current state of the timer Sleep_Enable input signal" "Requested,Not requested" bitfld.long 0x00 10. " TOUT_POLARITY ,Determines the polarity of the TOUTx output signal" "Active high,Active low" bitfld.long 0x00 9. " PD ,Power down" "Running state,Powered down" newline bitfld.long 0x00 8. " FILTER_BYPASS ,Used to enable or disable the noise filter on the TINx input signal" "Enabled,Disabled" bitfld.long 0x00 7. " RLOAD ,Reload control controls how the timer is reloaded on overflow or underflow in Event and Timer modes" "Roll,Reload" bitfld.long 0x00 6. " TOUT_EN ,enables the TOUTx pin" "Disabled,Enabled" bitfld.long 0x00 4. " UPDN ,In event mode selects the timer count direction" "Counts down,Counts up" newline bitfld.long 0x00 2.--3. " MODE ,Timer mode" "Timer mode,Event mode,One shot mode,Measurement mode" bitfld.long 0x00 1. " RESET ,Stops the timer and resets the internal counter to the value in the timer reload register" "Normal operation,Reset" bitfld.long 0x00 0. " ENABLE ,Used to start and stop the timer" "Disabled,Enabled" elif (((per.l(ad:0x40000D00))&0x0C)==0x00) group.long 0x00++0x03 line.long 0x00 "TXCR,Timer X ControL Register $2" rbitfld.long 0x00 12. " TIMERX_CLK_REQ ,Reflects the current state of the timer Clock_Required output signal" "Not required,Required" rbitfld.long 0x00 11. " SLEEP_ENABLE ,Reflects the current state of the timer Sleep_Enable input signal" "Requested,Not requested" bitfld.long 0x00 10. " TOUT_POLARITY ,Determines the polarity of the TOUTx output signal" "Active high,Active low" bitfld.long 0x00 9. " PD ,Power down" "Running state,Powered down" newline bitfld.long 0x00 8. " FILTER_BYPASS ,Used to enable or disable the noise filter on the TINx input signal" "Filter Mode,IBypass Mode" bitfld.long 0x00 7. " RLOAD ,Reload control controls how the timer is reloaded on overflow or underflow in Event and Timer modes" "Roll,Reload" bitfld.long 0x00 6. " TOUT_EN ,enables the TOUTx pin" "Disabled,Enabled" bitfld.long 0x00 4. " UPDN ,In timer mode enables timer control" "No effect,Pauses" newline bitfld.long 0x00 2.--3. " MODE ,Timer mode" "Timer mode,Event mode,One shot mode,Measurement mode" bitfld.long 0x00 1. " RESET ,Stops the timer and resets the internal counter to the value in the timer reload register" "Normal operation,Reset" bitfld.long 0x00 0. " ENABLE ,Used to start and stop the timer" "Disabled,Enabled" else group.long 0x00++0x03 line.long 0x00 "TXCR,Timer X ControL Register $2" rbitfld.long 0x00 12. " TIMERX_CLK_REQ ,Reflects the current state of the timer Clock_Required output signal" "Not required,Required" rbitfld.long 0x00 11. " SLEEP_ENABLE ,Reflects the current state of the timer Sleep_Enable input signal" "Requested,Not requested" bitfld.long 0x00 10. " TOUT_POLARITY ,Determines the polarity of the TOUTx output signal" "Active high,Active low" bitfld.long 0x00 9. " PD ,Power down" "Running state,Powered down" newline bitfld.long 0x00 8. " FILTER_BYPASS ,Used to enable or disable the noise filter on the TINx input signal" "Enabled,Disabled" bitfld.long 0x00 7. " RLOAD ,Reload control controls how the timer is reloaded on overflow or underflow in Event and Timer modes" "Roll,Reload" bitfld.long 0x00 6. " TOUT_EN ,enables the TOUTx pin" "Disabled,Enabled" bitfld.long 0x00 4. " INPOL ,Selects the polarity of the TINx input" "Active high,Active low" newline bitfld.long 0x00 2.--3. " MODE ,Timer mode" "Timer mode,Event mode,One shot mode,Measurement mode" bitfld.long 0x00 1. " RESET ,Stops the timer and resets the internal counter to the value in the timer reload register" "Normal operation,Reset" bitfld.long 0x00 0. " ENABLE ,Used to start and stop the timer" "Disabled,Enabled" endif if (((per.l(ad:0x40000D00))&0x0C)==0x04) group.long 0x04++0x03 line.long 0x00 "TXCAECR,Timer X Clock and Event Control Register $2" bitfld.long 0x00 8.--11. " FCLK ,Timer clock select" "48MHz,24MHz,12MHz,6MHz,3MHz,1.5MHz,750KHz,375KHz,?..." bitfld.long 0x00 7. " EVENT ,Event select used to select the count source when the timer is operating in Event Mode" "Timer x-1 overflow is count,TINx is count" bitfld.long 0x00 5.--6. " EDGE ,selects which edge of the TINx input signal affects the timer" "Counts falling edges,Counts rising edges,Counts rising and falling edges,No event selected" bitfld.long 0x00 0.--3. " TCLK ,Timer clock select determines the clock source for the 16-bit counter in the timer." "48MHz,24MHz,12MHz,6MHz,3MHz,1.5MHz,750KHz,375KHz,?..." elif (((per.l(ad:0x40000D00))&0x0C)==0x08) group.long ((ad:0x40000D00)+0x04)++0x03 line.long 0x00 "TXCAECR,Timer X Clock and Event Control Register $2" bitfld.long 0x00 8.--11. " FCLK ,Timer clock select" "48MHz,24MHz,12MHz,6MHz,3MHz,1.5MHz,750KHz,375KHz,?..." bitfld.long 0x00 7. " EVENT ,Event select used to select the count source when the timer is operating in Event Mode" "Timer x-1 overflow is count,TINx is count" bitfld.long 0x00 5.--6. " EDGE ,selects which edge of the TINx input signal affects the timer" "Counting on a falling edge,Counting on a rising edge,Counting on a rising or falling edge,Counting when the Enable bit is set" bitfld.long 0x00 0.--3. " TCLK ,Timer clock select determines the clock source for the 16-bit counter in the timer." "48MHz,24MHz,12MHz,6MHz,3MHz,1.5MHz,750KHz,375KHz,?..." elif (((per.l(ad:0x40000D00)&0x0C)==0xC)) group.long 0x04++0x03 line.long 0x00 "TXCAECR,Timer X Clock and Event Control Register $2" bitfld.long 0x00 8.--11. " FCLK ,Timer clock select" "48MHz,24MHz,12MHz,6MHz,3MHz,1.5MHz,750KHz,375KHz,?..." bitfld.long 0x00 7. " EVENT ,Event select used to select the count source when the timer is operating in Event Mode" "Timer x-1 overflow is count,TINx is count" bitfld.long 0x00 5.--6. " EDGE ,selects which edge of the TINx input signal affects the timer" "Between falling edges,Between rising edges,Rising-falling / falling-rising,No event" bitfld.long 0x00 0.--3. " TCLK ,Timer clock select determines the clock source for the 16-bit counter in the timer." "48MHz,24MHz,12MHz,6MHz,3MHz,1.5MHz,750KHz,375KHz,?..." else group.long 0x04++0x03 line.long 0x00 "TXCAECR,Timer X Clock and Event Control Register $2" bitfld.long 0x00 8.--11. " FCLK ,Timer clock select" "48MHz,24MHz,12MHz,6MHz,3MHz,1.5MHz,750KHz,375KHz,?..." bitfld.long 0x00 7. " EVENT ,Event select used to select the count source when the timer is operating in Event Mode" "Timer x-1 overflow is count,TINx is count" bitfld.long 0x00 0.--3. " TCLK ,Timer clock select determines the clock source for the 16-bit counter in the timer." "48MHz,24MHz,12MHz,6MHz,3MHz,1.5MHz,750KHz,375KHz,?..." endif group.long 0x08++0x07 line.long 0x00 "TXRR,Timer X Reload Register $2" hexmask.long.word 0x00 0.--15. 1. " TIMER_RELOAD ,Timer and One-Shot modes-set the lower limit of the timer / Event mode - sets either the upper or lower limit of the timer depending" line.long 0x04 "TXCR,Timer X Count Register $2" hexmask.long.word 0x04 0.--15. 1. " TIMER_COUNT ,returns the current value of the timer in all modes" width 0x0B tree.end tree "Channel 1" base ad:0x40000D20 width 9. if (((per.l(ad:0x40000D20))&0x0C)==0x04) group.long 0x00++0x03 line.long 0x00 "TXCR,Timer X ControL Register $2" rbitfld.long 0x00 12. " TIMERX_CLK_REQ ,Reflects the current state of the timer Clock_Required output signal" "Not required,Required" rbitfld.long 0x00 11. " SLEEP_ENABLE ,Reflects the current state of the timer Sleep_Enable input signal" "Requested,Not requested" bitfld.long 0x00 10. " TOUT_POLARITY ,Determines the polarity of the TOUTx output signal" "Active high,Active low" bitfld.long 0x00 9. " PD ,Power down" "Running state,Powered down" newline bitfld.long 0x00 8. " FILTER_BYPASS ,Used to enable or disable the noise filter on the TINx input signal" "Enabled,Disabled" bitfld.long 0x00 7. " RLOAD ,Reload control controls how the timer is reloaded on overflow or underflow in Event and Timer modes" "Roll,Reload" bitfld.long 0x00 6. " TOUT_EN ,enables the TOUTx pin" "Disabled,Enabled" bitfld.long 0x00 4. " UPDN ,In event mode selects the timer count direction" "Counts down,Counts up" newline bitfld.long 0x00 2.--3. " MODE ,Timer mode" "Timer mode,Event mode,One shot mode,Measurement mode" bitfld.long 0x00 1. " RESET ,Stops the timer and resets the internal counter to the value in the timer reload register" "Normal operation,Reset" bitfld.long 0x00 0. " ENABLE ,Used to start and stop the timer" "Disabled,Enabled" elif (((per.l(ad:0x40000D20))&0x0C)==0x00) group.long 0x00++0x03 line.long 0x00 "TXCR,Timer X ControL Register $2" rbitfld.long 0x00 12. " TIMERX_CLK_REQ ,Reflects the current state of the timer Clock_Required output signal" "Not required,Required" rbitfld.long 0x00 11. " SLEEP_ENABLE ,Reflects the current state of the timer Sleep_Enable input signal" "Requested,Not requested" bitfld.long 0x00 10. " TOUT_POLARITY ,Determines the polarity of the TOUTx output signal" "Active high,Active low" bitfld.long 0x00 9. " PD ,Power down" "Running state,Powered down" newline bitfld.long 0x00 8. " FILTER_BYPASS ,Used to enable or disable the noise filter on the TINx input signal" "Filter Mode,IBypass Mode" bitfld.long 0x00 7. " RLOAD ,Reload control controls how the timer is reloaded on overflow or underflow in Event and Timer modes" "Roll,Reload" bitfld.long 0x00 6. " TOUT_EN ,enables the TOUTx pin" "Disabled,Enabled" bitfld.long 0x00 4. " UPDN ,In timer mode enables timer control" "No effect,Pauses" newline bitfld.long 0x00 2.--3. " MODE ,Timer mode" "Timer mode,Event mode,One shot mode,Measurement mode" bitfld.long 0x00 1. " RESET ,Stops the timer and resets the internal counter to the value in the timer reload register" "Normal operation,Reset" bitfld.long 0x00 0. " ENABLE ,Used to start and stop the timer" "Disabled,Enabled" else group.long 0x00++0x03 line.long 0x00 "TXCR,Timer X ControL Register $2" rbitfld.long 0x00 12. " TIMERX_CLK_REQ ,Reflects the current state of the timer Clock_Required output signal" "Not required,Required" rbitfld.long 0x00 11. " SLEEP_ENABLE ,Reflects the current state of the timer Sleep_Enable input signal" "Requested,Not requested" bitfld.long 0x00 10. " TOUT_POLARITY ,Determines the polarity of the TOUTx output signal" "Active high,Active low" bitfld.long 0x00 9. " PD ,Power down" "Running state,Powered down" newline bitfld.long 0x00 8. " FILTER_BYPASS ,Used to enable or disable the noise filter on the TINx input signal" "Enabled,Disabled" bitfld.long 0x00 7. " RLOAD ,Reload control controls how the timer is reloaded on overflow or underflow in Event and Timer modes" "Roll,Reload" bitfld.long 0x00 6. " TOUT_EN ,enables the TOUTx pin" "Disabled,Enabled" bitfld.long 0x00 4. " INPOL ,Selects the polarity of the TINx input" "Active high,Active low" newline bitfld.long 0x00 2.--3. " MODE ,Timer mode" "Timer mode,Event mode,One shot mode,Measurement mode" bitfld.long 0x00 1. " RESET ,Stops the timer and resets the internal counter to the value in the timer reload register" "Normal operation,Reset" bitfld.long 0x00 0. " ENABLE ,Used to start and stop the timer" "Disabled,Enabled" endif if (((per.l(ad:0x40000D20))&0x0C)==0x04) group.long 0x04++0x03 line.long 0x00 "TXCAECR,Timer X Clock and Event Control Register $2" bitfld.long 0x00 8.--11. " FCLK ,Timer clock select" "48MHz,24MHz,12MHz,6MHz,3MHz,1.5MHz,750KHz,375KHz,?..." bitfld.long 0x00 7. " EVENT ,Event select used to select the count source when the timer is operating in Event Mode" "Timer x-1 overflow is count,TINx is count" bitfld.long 0x00 5.--6. " EDGE ,selects which edge of the TINx input signal affects the timer" "Counts falling edges,Counts rising edges,Counts rising and falling edges,No event selected" bitfld.long 0x00 0.--3. " TCLK ,Timer clock select determines the clock source for the 16-bit counter in the timer." "48MHz,24MHz,12MHz,6MHz,3MHz,1.5MHz,750KHz,375KHz,?..." elif (((per.l(ad:0x40000D20))&0x0C)==0x08) group.long ((ad:0x40000D20)+0x04)++0x03 line.long 0x00 "TXCAECR,Timer X Clock and Event Control Register $2" bitfld.long 0x00 8.--11. " FCLK ,Timer clock select" "48MHz,24MHz,12MHz,6MHz,3MHz,1.5MHz,750KHz,375KHz,?..." bitfld.long 0x00 7. " EVENT ,Event select used to select the count source when the timer is operating in Event Mode" "Timer x-1 overflow is count,TINx is count" bitfld.long 0x00 5.--6. " EDGE ,selects which edge of the TINx input signal affects the timer" "Counting on a falling edge,Counting on a rising edge,Counting on a rising or falling edge,Counting when the Enable bit is set" bitfld.long 0x00 0.--3. " TCLK ,Timer clock select determines the clock source for the 16-bit counter in the timer." "48MHz,24MHz,12MHz,6MHz,3MHz,1.5MHz,750KHz,375KHz,?..." elif (((per.l(ad:0x40000D20)&0x0C)==0xC)) group.long 0x04++0x03 line.long 0x00 "TXCAECR,Timer X Clock and Event Control Register $2" bitfld.long 0x00 8.--11. " FCLK ,Timer clock select" "48MHz,24MHz,12MHz,6MHz,3MHz,1.5MHz,750KHz,375KHz,?..." bitfld.long 0x00 7. " EVENT ,Event select used to select the count source when the timer is operating in Event Mode" "Timer x-1 overflow is count,TINx is count" bitfld.long 0x00 5.--6. " EDGE ,selects which edge of the TINx input signal affects the timer" "Between falling edges,Between rising edges,Rising-falling / falling-rising,No event" bitfld.long 0x00 0.--3. " TCLK ,Timer clock select determines the clock source for the 16-bit counter in the timer." "48MHz,24MHz,12MHz,6MHz,3MHz,1.5MHz,750KHz,375KHz,?..." else group.long 0x04++0x03 line.long 0x00 "TXCAECR,Timer X Clock and Event Control Register $2" bitfld.long 0x00 8.--11. " FCLK ,Timer clock select" "48MHz,24MHz,12MHz,6MHz,3MHz,1.5MHz,750KHz,375KHz,?..." bitfld.long 0x00 7. " EVENT ,Event select used to select the count source when the timer is operating in Event Mode" "Timer x-1 overflow is count,TINx is count" bitfld.long 0x00 0.--3. " TCLK ,Timer clock select determines the clock source for the 16-bit counter in the timer." "48MHz,24MHz,12MHz,6MHz,3MHz,1.5MHz,750KHz,375KHz,?..." endif group.long 0x08++0x07 line.long 0x00 "TXRR,Timer X Reload Register $2" hexmask.long.word 0x00 0.--15. 1. " TIMER_RELOAD ,Timer and One-Shot modes-set the lower limit of the timer / Event mode - sets either the upper or lower limit of the timer depending" line.long 0x04 "TXCR,Timer X Count Register $2" hexmask.long.word 0x04 0.--15. 1. " TIMER_COUNT ,returns the current value of the timer in all modes" width 0x0B tree.end tree "Channel 2" base ad:0x40000D40 width 9. if (((per.l(ad:0x40000D40))&0x0C)==0x04) group.long 0x00++0x03 line.long 0x00 "TXCR,Timer X ControL Register $2" rbitfld.long 0x00 12. " TIMERX_CLK_REQ ,Reflects the current state of the timer Clock_Required output signal" "Not required,Required" rbitfld.long 0x00 11. " SLEEP_ENABLE ,Reflects the current state of the timer Sleep_Enable input signal" "Requested,Not requested" bitfld.long 0x00 10. " TOUT_POLARITY ,Determines the polarity of the TOUTx output signal" "Active high,Active low" bitfld.long 0x00 9. " PD ,Power down" "Running state,Powered down" newline bitfld.long 0x00 8. " FILTER_BYPASS ,Used to enable or disable the noise filter on the TINx input signal" "Enabled,Disabled" bitfld.long 0x00 7. " RLOAD ,Reload control controls how the timer is reloaded on overflow or underflow in Event and Timer modes" "Roll,Reload" bitfld.long 0x00 6. " TOUT_EN ,enables the TOUTx pin" "Disabled,Enabled" bitfld.long 0x00 4. " UPDN ,In event mode selects the timer count direction" "Counts down,Counts up" newline bitfld.long 0x00 2.--3. " MODE ,Timer mode" "Timer mode,Event mode,One shot mode,Measurement mode" bitfld.long 0x00 1. " RESET ,Stops the timer and resets the internal counter to the value in the timer reload register" "Normal operation,Reset" bitfld.long 0x00 0. " ENABLE ,Used to start and stop the timer" "Disabled,Enabled" elif (((per.l(ad:0x40000D40))&0x0C)==0x00) group.long 0x00++0x03 line.long 0x00 "TXCR,Timer X ControL Register $2" rbitfld.long 0x00 12. " TIMERX_CLK_REQ ,Reflects the current state of the timer Clock_Required output signal" "Not required,Required" rbitfld.long 0x00 11. " SLEEP_ENABLE ,Reflects the current state of the timer Sleep_Enable input signal" "Requested,Not requested" bitfld.long 0x00 10. " TOUT_POLARITY ,Determines the polarity of the TOUTx output signal" "Active high,Active low" bitfld.long 0x00 9. " PD ,Power down" "Running state,Powered down" newline bitfld.long 0x00 8. " FILTER_BYPASS ,Used to enable or disable the noise filter on the TINx input signal" "Filter Mode,IBypass Mode" bitfld.long 0x00 7. " RLOAD ,Reload control controls how the timer is reloaded on overflow or underflow in Event and Timer modes" "Roll,Reload" bitfld.long 0x00 6. " TOUT_EN ,enables the TOUTx pin" "Disabled,Enabled" bitfld.long 0x00 4. " UPDN ,In timer mode enables timer control" "No effect,Pauses" newline bitfld.long 0x00 2.--3. " MODE ,Timer mode" "Timer mode,Event mode,One shot mode,Measurement mode" bitfld.long 0x00 1. " RESET ,Stops the timer and resets the internal counter to the value in the timer reload register" "Normal operation,Reset" bitfld.long 0x00 0. " ENABLE ,Used to start and stop the timer" "Disabled,Enabled" else group.long 0x00++0x03 line.long 0x00 "TXCR,Timer X ControL Register $2" rbitfld.long 0x00 12. " TIMERX_CLK_REQ ,Reflects the current state of the timer Clock_Required output signal" "Not required,Required" rbitfld.long 0x00 11. " SLEEP_ENABLE ,Reflects the current state of the timer Sleep_Enable input signal" "Requested,Not requested" bitfld.long 0x00 10. " TOUT_POLARITY ,Determines the polarity of the TOUTx output signal" "Active high,Active low" bitfld.long 0x00 9. " PD ,Power down" "Running state,Powered down" newline bitfld.long 0x00 8. " FILTER_BYPASS ,Used to enable or disable the noise filter on the TINx input signal" "Enabled,Disabled" bitfld.long 0x00 7. " RLOAD ,Reload control controls how the timer is reloaded on overflow or underflow in Event and Timer modes" "Roll,Reload" bitfld.long 0x00 6. " TOUT_EN ,enables the TOUTx pin" "Disabled,Enabled" bitfld.long 0x00 4. " INPOL ,Selects the polarity of the TINx input" "Active high,Active low" newline bitfld.long 0x00 2.--3. " MODE ,Timer mode" "Timer mode,Event mode,One shot mode,Measurement mode" bitfld.long 0x00 1. " RESET ,Stops the timer and resets the internal counter to the value in the timer reload register" "Normal operation,Reset" bitfld.long 0x00 0. " ENABLE ,Used to start and stop the timer" "Disabled,Enabled" endif if (((per.l(ad:0x40000D40))&0x0C)==0x04) group.long 0x04++0x03 line.long 0x00 "TXCAECR,Timer X Clock and Event Control Register $2" bitfld.long 0x00 8.--11. " FCLK ,Timer clock select" "48MHz,24MHz,12MHz,6MHz,3MHz,1.5MHz,750KHz,375KHz,?..." bitfld.long 0x00 7. " EVENT ,Event select used to select the count source when the timer is operating in Event Mode" "Timer x-1 overflow is count,TINx is count" bitfld.long 0x00 5.--6. " EDGE ,selects which edge of the TINx input signal affects the timer" "Counts falling edges,Counts rising edges,Counts rising and falling edges,No event selected" bitfld.long 0x00 0.--3. " TCLK ,Timer clock select determines the clock source for the 16-bit counter in the timer." "48MHz,24MHz,12MHz,6MHz,3MHz,1.5MHz,750KHz,375KHz,?..." elif (((per.l(ad:0x40000D40))&0x0C)==0x08) group.long ((ad:0x40000D40)+0x04)++0x03 line.long 0x00 "TXCAECR,Timer X Clock and Event Control Register $2" bitfld.long 0x00 8.--11. " FCLK ,Timer clock select" "48MHz,24MHz,12MHz,6MHz,3MHz,1.5MHz,750KHz,375KHz,?..." bitfld.long 0x00 7. " EVENT ,Event select used to select the count source when the timer is operating in Event Mode" "Timer x-1 overflow is count,TINx is count" bitfld.long 0x00 5.--6. " EDGE ,selects which edge of the TINx input signal affects the timer" "Counting on a falling edge,Counting on a rising edge,Counting on a rising or falling edge,Counting when the Enable bit is set" bitfld.long 0x00 0.--3. " TCLK ,Timer clock select determines the clock source for the 16-bit counter in the timer." "48MHz,24MHz,12MHz,6MHz,3MHz,1.5MHz,750KHz,375KHz,?..." elif (((per.l(ad:0x40000D40)&0x0C)==0xC)) group.long 0x04++0x03 line.long 0x00 "TXCAECR,Timer X Clock and Event Control Register $2" bitfld.long 0x00 8.--11. " FCLK ,Timer clock select" "48MHz,24MHz,12MHz,6MHz,3MHz,1.5MHz,750KHz,375KHz,?..." bitfld.long 0x00 7. " EVENT ,Event select used to select the count source when the timer is operating in Event Mode" "Timer x-1 overflow is count,TINx is count" bitfld.long 0x00 5.--6. " EDGE ,selects which edge of the TINx input signal affects the timer" "Between falling edges,Between rising edges,Rising-falling / falling-rising,No event" bitfld.long 0x00 0.--3. " TCLK ,Timer clock select determines the clock source for the 16-bit counter in the timer." "48MHz,24MHz,12MHz,6MHz,3MHz,1.5MHz,750KHz,375KHz,?..." else group.long 0x04++0x03 line.long 0x00 "TXCAECR,Timer X Clock and Event Control Register $2" bitfld.long 0x00 8.--11. " FCLK ,Timer clock select" "48MHz,24MHz,12MHz,6MHz,3MHz,1.5MHz,750KHz,375KHz,?..." bitfld.long 0x00 7. " EVENT ,Event select used to select the count source when the timer is operating in Event Mode" "Timer x-1 overflow is count,TINx is count" bitfld.long 0x00 0.--3. " TCLK ,Timer clock select determines the clock source for the 16-bit counter in the timer." "48MHz,24MHz,12MHz,6MHz,3MHz,1.5MHz,750KHz,375KHz,?..." endif group.long 0x08++0x07 line.long 0x00 "TXRR,Timer X Reload Register $2" hexmask.long.word 0x00 0.--15. 1. " TIMER_RELOAD ,Timer and One-Shot modes-set the lower limit of the timer / Event mode - sets either the upper or lower limit of the timer depending" line.long 0x04 "TXCR,Timer X Count Register $2" hexmask.long.word 0x04 0.--15. 1. " TIMER_COUNT ,returns the current value of the timer in all modes" width 0x0B tree.end tree "Channel 3" base ad:0x40000D60 width 9. if (((per.l(ad:0x40000D60))&0x0C)==0x04) group.long 0x00++0x03 line.long 0x00 "TXCR,Timer X ControL Register $2" rbitfld.long 0x00 12. " TIMERX_CLK_REQ ,Reflects the current state of the timer Clock_Required output signal" "Not required,Required" rbitfld.long 0x00 11. " SLEEP_ENABLE ,Reflects the current state of the timer Sleep_Enable input signal" "Requested,Not requested" bitfld.long 0x00 10. " TOUT_POLARITY ,Determines the polarity of the TOUTx output signal" "Active high,Active low" bitfld.long 0x00 9. " PD ,Power down" "Running state,Powered down" newline bitfld.long 0x00 8. " FILTER_BYPASS ,Used to enable or disable the noise filter on the TINx input signal" "Enabled,Disabled" bitfld.long 0x00 7. " RLOAD ,Reload control controls how the timer is reloaded on overflow or underflow in Event and Timer modes" "Roll,Reload" bitfld.long 0x00 6. " TOUT_EN ,enables the TOUTx pin" "Disabled,Enabled" bitfld.long 0x00 4. " UPDN ,In event mode selects the timer count direction" "Counts down,Counts up" newline bitfld.long 0x00 2.--3. " MODE ,Timer mode" "Timer mode,Event mode,One shot mode,Measurement mode" bitfld.long 0x00 1. " RESET ,Stops the timer and resets the internal counter to the value in the timer reload register" "Normal operation,Reset" bitfld.long 0x00 0. " ENABLE ,Used to start and stop the timer" "Disabled,Enabled" elif (((per.l(ad:0x40000D60))&0x0C)==0x00) group.long 0x00++0x03 line.long 0x00 "TXCR,Timer X ControL Register $2" rbitfld.long 0x00 12. " TIMERX_CLK_REQ ,Reflects the current state of the timer Clock_Required output signal" "Not required,Required" rbitfld.long 0x00 11. " SLEEP_ENABLE ,Reflects the current state of the timer Sleep_Enable input signal" "Requested,Not requested" bitfld.long 0x00 10. " TOUT_POLARITY ,Determines the polarity of the TOUTx output signal" "Active high,Active low" bitfld.long 0x00 9. " PD ,Power down" "Running state,Powered down" newline bitfld.long 0x00 8. " FILTER_BYPASS ,Used to enable or disable the noise filter on the TINx input signal" "Filter Mode,IBypass Mode" bitfld.long 0x00 7. " RLOAD ,Reload control controls how the timer is reloaded on overflow or underflow in Event and Timer modes" "Roll,Reload" bitfld.long 0x00 6. " TOUT_EN ,enables the TOUTx pin" "Disabled,Enabled" bitfld.long 0x00 4. " UPDN ,In timer mode enables timer control" "No effect,Pauses" newline bitfld.long 0x00 2.--3. " MODE ,Timer mode" "Timer mode,Event mode,One shot mode,Measurement mode" bitfld.long 0x00 1. " RESET ,Stops the timer and resets the internal counter to the value in the timer reload register" "Normal operation,Reset" bitfld.long 0x00 0. " ENABLE ,Used to start and stop the timer" "Disabled,Enabled" else group.long 0x00++0x03 line.long 0x00 "TXCR,Timer X ControL Register $2" rbitfld.long 0x00 12. " TIMERX_CLK_REQ ,Reflects the current state of the timer Clock_Required output signal" "Not required,Required" rbitfld.long 0x00 11. " SLEEP_ENABLE ,Reflects the current state of the timer Sleep_Enable input signal" "Requested,Not requested" bitfld.long 0x00 10. " TOUT_POLARITY ,Determines the polarity of the TOUTx output signal" "Active high,Active low" bitfld.long 0x00 9. " PD ,Power down" "Running state,Powered down" newline bitfld.long 0x00 8. " FILTER_BYPASS ,Used to enable or disable the noise filter on the TINx input signal" "Enabled,Disabled" bitfld.long 0x00 7. " RLOAD ,Reload control controls how the timer is reloaded on overflow or underflow in Event and Timer modes" "Roll,Reload" bitfld.long 0x00 6. " TOUT_EN ,enables the TOUTx pin" "Disabled,Enabled" bitfld.long 0x00 4. " INPOL ,Selects the polarity of the TINx input" "Active high,Active low" newline bitfld.long 0x00 2.--3. " MODE ,Timer mode" "Timer mode,Event mode,One shot mode,Measurement mode" bitfld.long 0x00 1. " RESET ,Stops the timer and resets the internal counter to the value in the timer reload register" "Normal operation,Reset" bitfld.long 0x00 0. " ENABLE ,Used to start and stop the timer" "Disabled,Enabled" endif if (((per.l(ad:0x40000D60))&0x0C)==0x04) group.long 0x04++0x03 line.long 0x00 "TXCAECR,Timer X Clock and Event Control Register $2" bitfld.long 0x00 8.--11. " FCLK ,Timer clock select" "48MHz,24MHz,12MHz,6MHz,3MHz,1.5MHz,750KHz,375KHz,?..." bitfld.long 0x00 7. " EVENT ,Event select used to select the count source when the timer is operating in Event Mode" "Timer x-1 overflow is count,TINx is count" bitfld.long 0x00 5.--6. " EDGE ,selects which edge of the TINx input signal affects the timer" "Counts falling edges,Counts rising edges,Counts rising and falling edges,No event selected" bitfld.long 0x00 0.--3. " TCLK ,Timer clock select determines the clock source for the 16-bit counter in the timer." "48MHz,24MHz,12MHz,6MHz,3MHz,1.5MHz,750KHz,375KHz,?..." elif (((per.l(ad:0x40000D60))&0x0C)==0x08) group.long ((ad:0x40000D60)+0x04)++0x03 line.long 0x00 "TXCAECR,Timer X Clock and Event Control Register $2" bitfld.long 0x00 8.--11. " FCLK ,Timer clock select" "48MHz,24MHz,12MHz,6MHz,3MHz,1.5MHz,750KHz,375KHz,?..." bitfld.long 0x00 7. " EVENT ,Event select used to select the count source when the timer is operating in Event Mode" "Timer x-1 overflow is count,TINx is count" bitfld.long 0x00 5.--6. " EDGE ,selects which edge of the TINx input signal affects the timer" "Counting on a falling edge,Counting on a rising edge,Counting on a rising or falling edge,Counting when the Enable bit is set" bitfld.long 0x00 0.--3. " TCLK ,Timer clock select determines the clock source for the 16-bit counter in the timer." "48MHz,24MHz,12MHz,6MHz,3MHz,1.5MHz,750KHz,375KHz,?..." elif (((per.l(ad:0x40000D60)&0x0C)==0xC)) group.long 0x04++0x03 line.long 0x00 "TXCAECR,Timer X Clock and Event Control Register $2" bitfld.long 0x00 8.--11. " FCLK ,Timer clock select" "48MHz,24MHz,12MHz,6MHz,3MHz,1.5MHz,750KHz,375KHz,?..." bitfld.long 0x00 7. " EVENT ,Event select used to select the count source when the timer is operating in Event Mode" "Timer x-1 overflow is count,TINx is count" bitfld.long 0x00 5.--6. " EDGE ,selects which edge of the TINx input signal affects the timer" "Between falling edges,Between rising edges,Rising-falling / falling-rising,No event" bitfld.long 0x00 0.--3. " TCLK ,Timer clock select determines the clock source for the 16-bit counter in the timer." "48MHz,24MHz,12MHz,6MHz,3MHz,1.5MHz,750KHz,375KHz,?..." else group.long 0x04++0x03 line.long 0x00 "TXCAECR,Timer X Clock and Event Control Register $2" bitfld.long 0x00 8.--11. " FCLK ,Timer clock select" "48MHz,24MHz,12MHz,6MHz,3MHz,1.5MHz,750KHz,375KHz,?..." bitfld.long 0x00 7. " EVENT ,Event select used to select the count source when the timer is operating in Event Mode" "Timer x-1 overflow is count,TINx is count" bitfld.long 0x00 0.--3. " TCLK ,Timer clock select determines the clock source for the 16-bit counter in the timer." "48MHz,24MHz,12MHz,6MHz,3MHz,1.5MHz,750KHz,375KHz,?..." endif group.long 0x08++0x07 line.long 0x00 "TXRR,Timer X Reload Register $2" hexmask.long.word 0x00 0.--15. 1. " TIMER_RELOAD ,Timer and One-Shot modes-set the lower limit of the timer / Event mode - sets either the upper or lower limit of the timer depending" line.long 0x04 "TXCR,Timer X Count Register $2" hexmask.long.word 0x04 0.--15. 1. " TIMER_COUNT ,returns the current value of the timer in all modes" width 0x0B tree.end tree.end tree "ICACT (Input Capture and Compare Timer)" base ad:0x40001000 width 9. group.long 0x00++0x0B line.long 0x00 "CACTCR,Capture And Compare Timer Control Register" eventfld.long 0x00 25. " COMPARE_CLEAR0 ,Read-value of compare timer output 0 state / written 1-output cleared to 0" "No,Yes" eventfld.long 0x00 24. " COMPARE_CLEAR1 ,Read-value of compare timer output 1 state / written 1-output cleared to 0" "No,Yes" bitfld.long 0x00 17. " COMPARE_SET0 ,Read-value of compare timer output 0 state / write 1-output setted to 1" "No,Yes" newline bitfld.long 0x00 16. " COMPARE_SET1 ,Read-value of compare timer output 1 state / write 1-output setted to 1" "No,Yes" bitfld.long 0x00 9. " COMPARE_ENABLE1 ,Compare enable for compare 1 register" "Disabled,Enabled" bitfld.long 0x00 8. " COMPARE_ENABLE0 ,Compare enable for compare 0 register" "Disabled,Enabled" newline bitfld.long 0x00 4.--6. " TCLK ,Sets the clock source for the free-running counter" "48MHz,24MHz,12MHz,6MHz,3MHz,1.5MHz,750KHz,375KHz" bitfld.long 0x00 2. " FREE_RESET ,Free running timer reset bit stops the timer and resets the internal counter" "Normal timer operation,Timer reset" bitfld.long 0x00 1. " FREE_ENABLE ,Free-running timer enable bit used to start and stop the free running timer" "Disabled,Enabled" newline bitfld.long 0x00 0. " ACTIVATE ,State of timer block" "Powered down,Running" line.long 0x04 "CC0R,Capture Control 0 Register" bitfld.long 0x04 29.--31. " FCLK_SEL3 ,Sets the clock source for the input filter for capture register 3" "48MHz,24MHz,12MHz,6MHz,3MHz,1.5MHz,750KHz,375KHz" bitfld.long 0x04 26. " FILTER_BYP3 ,Enables bypassing the input noise filter for capture register 3" "Enabled,Bypassed" bitfld.long 0x04 24.--25. " CAPTURE_EDGE3 ,Selects the edge type that triggers the capture of the free running counter into capture register 3" "Falling edges,Rising edges,Both rising and falling edges,Capture event disabled" newline bitfld.long 0x04 21.--23. " FCLK_SEL2 ,Sets the clock source for the input filter for capture register 2" "48MHz,24MHz,12MHz,6MHz,3MHz,1.5MHz,750KHz,375KHz" bitfld.long 0x04 18. " FILTER_BYP2 ,Enables bypassing the input noise filter for capture register 2" "Enabled,Bypassed" bitfld.long 0x04 16.--17. " CAPTURE_EDGE2 ,Selects the edge type that triggers the capture of the free running counter into capture register 2" "Falling edges,Rising edges,Both rising and falling edges,Capture event disabled" newline bitfld.long 0x04 13.--15. " FCLK_SEL1 ,Sets the clock source for the input filter for capture register 1" "48MHz,24MHz,12MHz,6MHz,3MHz,1.5MHz,750KHz,375KHz" bitfld.long 0x04 10. " FILTER_BYP1 ,Enables bypassing the input noise filter for capture register 1" "Enabled,Bypassed" bitfld.long 0x04 8.--9. " CAPTURE_EDGE1 ,Selects the edge type that triggers the capture of the free running counter into capture register 1" "Falling edges,Rising edges,Both rising and falling edges,Capture event disabled" newline bitfld.long 0x04 5.--7. " FCLK_SEL0 ,Sets the clock source for the input filter for capture register 0" "48MHz,24MHz,12MHz,6MHz,3MHz,1.5MHz,750KHz,375KHz" bitfld.long 0x04 2. " FILTER_BYP0 ,Enables bypassing the input noise filter for capture register 0" "Enabled,Bypassed" bitfld.long 0x04 0.--1. " CAPTURE_EDGE0 ,Selects the edge type that triggers the capture of the free running counter into capture register 0" "Falling edges,Rising edges,Both rising and falling edges,Capture event disabled" line.long 0x08 "CC1R,Capture Control 1 Register" bitfld.long 0x08 13.--15. " FCLK_SEL5 ,Sets the clock source for the input filter for capture register 5" "48MHz,24MHz,12MHz,6MHz,3MHz,1.5MHz,750KHz,375KHz" bitfld.long 0x08 10. " FILTER_BYP5 ,Enables bypassing the input noise filter for capture register 5" "Enabled,Bypassed" bitfld.long 0x08 8.--9. " CAPTURE_EDGE5 ,Selects the edge type that triggers the capture of the free running counter into Capture Register 5" "Falling edges,Rising edges,Both rising and falling edges,Capture event disabled" newline bitfld.long 0x08 5.--7. " FCLK_SEL4 ,Sets the clock source for the input filter for capture register 4" "48MHz,24MHz,12MHz,6MHz,3MHz,1.5MHz,750KHz,375KHz" bitfld.long 0x08 2. " FILTER_BYP4 ,Enables bypassing the input noise filter for capture register 4" "Enabled,Bypassed" bitfld.long 0x08 0.--1. " CAPTURE_EDGE4 ,Selects the edge type that triggers the capture of the free running counter into capture register 4" "Falling edges,Rising edges,Both rising and falling edges,capture event disabled" if (((per.l(ad:0x40001000))&0x02)==0x02) rgroup.long 0x0C++0x03 line.long 0x00 "FRTR,Free Running Timer Register" else group.long 0x0C++0x03 line.long 0x00 "FRTR,Free Running Timer Register" endif group.long 0x10++0x03 line.long 0x00 "C0R,Capture 0 Register" group.long 0x14++0x03 line.long 0x00 "C1R,Capture 1 Register" group.long 0x18++0x03 line.long 0x00 "C2R,Capture 2 Register" group.long 0x1C++0x03 line.long 0x00 "C3R,Capture 3 Register" group.long 0x20++0x03 line.long 0x00 "C4R,Capture 4 Register" rgroup.long 0x24++0x03 line.long 0x00 "C5R,Capture 5 Register" group.long 0x28++0x07 line.long 0x00 "C0R,Compare 0 Register" line.long 0x04 "C1R,Compare 1 Register" width 0x0B tree.end tree "HT (Hibernation Timer)" tree "Channel 0" base ad:0x40009800 width 5. group.word 0x00++0x01 line.word 0x00 "HPR,Htimer Preload Register" rgroup.word 0x04++0x01 line.word 0x00 "HCR,Htimer Control Register" rbitfld.word 0x00 0. " CTRL ,Hibernation timer resolution" "30.5us per LSB,0.125s per LSB" rgroup.word 0x08++0x01 line.word 0x00 "HCR,Htimer Count Register" width 0x0B tree.end tree "Channel 1" base ad:0x40009820 width 5. group.word 0x00++0x01 line.word 0x00 "HPR,Htimer Preload Register" rgroup.word 0x04++0x01 line.word 0x00 "HCR,Htimer Control Register" rbitfld.word 0x00 0. " CTRL ,Hibernation timer resolution" "30.5us per LSB,0.125s per LSB" rgroup.word 0x08++0x01 line.word 0x00 "HCR,Htimer Count Register" width 0x0B tree.end tree.end tree "RTOS (RTOS Timer)" base ad:0x40007400 width 24. group.long 0x00++0x0B line.long 0x00 "RTCR,RTOS Timer Count Register" hexmask.long 0x00 0.--31. 1. " COUNTER ,Contains the current value of the RTOS Timer counter" line.long 0x04 "RTPR,RTOS Timer Preload Register" hexmask.long 0x04 0.--31. 1. " PRE_LOAD ,Loaded into the RTOS timer counter" line.long 0x08 "RTCR,RTOS Timer Control Register" bitfld.long 0x08 4. " FIRMWARE_TIMER_HALT ,Continue or halt timer counter" "Continue to run,Halted" bitfld.long 0x08 3. " EXT_HARDWARE_HALT_EN ,Continue/halt timer counter when external HALT signal is de-asserted/asserted" "Not affect,Halted" bitfld.long 0x08 2. " TIMER_START ,Load the timer counter" "Halted,Loaded" bitfld.long 0x08 1. " AUTO_RELOAD ,Load the timer counter" "Halted,Loaded" newline bitfld.long 0x08 0. " BLOCK_ENABLE ,Enable or disable RTOS timer counter" "Disabled,Enabled" wgroup.long 0x0C++0x03 line.long 0x00 "SIR,Soft InterrupT Register" bitfld.long 0x00 3. " SWI_3 ,Software interrupt to the EC" "No effect,Generated" bitfld.long 0x00 2. " SWI_2 ,Software interrupt to the EC" "No effect,Generated" bitfld.long 0x00 1. " SWI_1 ,Software interrupt to the EC" "No effect,Generated" bitfld.long 0x00 0. " SWI_0 ,Software interrupt to the EC" "No effect,Generated" width 0x0B tree.end tree "RTC (Real Time Clock)" base ad:0x400F5000 width 27. group.byte 0x00++0x0B line.byte 0x00 "SR,Seconds Register" line.byte 0x01 "SAR,Seconds Alarm Register" line.byte 0x02 "MR,Minutes Register" line.byte 0x03 "MAR,Minutes Alarm Register" line.byte 0x04 "HR,Hours Register" bitfld.byte 0x04 7. " HOURS_AM_PM ,For 12-hour mode" "AM,PM" hexmask.byte 0x04 0.--6. 1. " HOURS_AM_PM ,Displays the number of the hour" line.byte 0x05 "HAR,Hours Alarm Register" hexmask.byte 0x05 0.--7. 1. " HOURS_ALARM ,Holds a match value compared against the Hours Register to trigger the Alarm event" line.byte 0x06 "DOWR,Day Of Week Register" line.byte 0x07 "DOMR,Day Of Month Register" line.byte 0x08 "MR,Month Register" line.byte 0x09 "YR,Year Register" line.byte 0x0A "RA,Register A" rbitfld.byte 0x0A 7. " UPDATE_IN_PROGRESS ,Alter or not alter time and date registers" "Not altered,In progress" bitfld.byte 0x0A 4.--6. " DIVISION_CHAIN_SELECT ,Provides general control for the time and date register updating logic" ",,Normal operation,,,,Halt counting,Halt counting" newline bitfld.byte 0x0A 0.--3. " RATE_SELECT ,Rate of the periodic interrupt source" "Never Triggered,3.90625 ms,7.8125 ms,122.070 us,244.141 us,488.281 us,976.5625 us,1.953125 ms,3.90625 ms,7.8125 ms,15.625 ms,31.25 ms,62.5 ms,125 ms,250 ms,500 ms" line.byte 0x0B "RB,Register B" bitfld.byte 0x0B 7. " UPDATE_CYCLE_INHIBIT ,Allows hardware updates to the time and date registers" "Allowed,Inhibited" bitfld.byte 0x0B 6. " PERIODIC_INTERRUPT_ENABLE ,Allows the periodic interrupt events to be propagated as interrupts" "Not allowed,Allowed" bitfld.byte 0x0B 5. " ALARM_INTERRUPT_ENABLE ,Allows the alarm interrupt events to be propagated as interrupts" "Not allowed,Allowed" newline bitfld.byte 0x0B 4. " UPDATE_ENDED_INTERRUPT_ENABLE ,Allows the update Ended interrupt events to be propagated as interrupts" "Not allowed,Allowed" bitfld.byte 0x0B 2. " DATA_MODE ,Data mode" "BCD,Binary" bitfld.byte 0x0B 1. " HOUR_FORMAT_24_12 ,24 or 12 hours and hours alarm registers mode" "12,24" newline bitfld.byte 0x0B 0. " DAYLIGHT_SAVINGS_ENABLE ,Automatic hardware updating of the hour" "Disabled,Enabled" hgroup.byte 0x0C++0x00 hide.byte 0x00 "RC,Register C" group.byte 0x0D++0x00 line.byte 0x00 "RD,Register D" hexmask.byte 0x00 0.--5. 1. " DATE_ALARM ,If set to a non-zero value will inhibit the alarm interrupt" group.byte 0x10++0x00 line.byte 0x00 "RTCCR,RTC Control Register" bitfld.byte 0x00 3. " ALARM_ENABLE ,Enable/disable alarm features" "Disabled,Enabled" bitfld.byte 0x00 1. " SOFT_RESET ,Enable/disable trigger the RESET_RTC reset" "Not reset,Reset" bitfld.byte 0x00 0. " BLOCK_ENABLE ,Block enable" "Disabled,Enabled" group.byte 0x14++0x00 line.byte 0x00 "WAR,Week Alarm Register" group.long 0x18++0x07 line.long 0x00 "DSFR,Daylight Savings Forward Register" bitfld.long 0x00 31. " DST_FORWARD_AM_PM ,Selects AM vs PM" "AM,PM" hexmask.long.byte 0x00 24.--30. 1. " DST_FORWARD_HOUR ,Holds the matching value for bits[6:0] of the Hours register" bitfld.long 0x00 16.--18. " DST_FORWARD_WEEK ,Value matches an internally-maintained week number within the current month" ",First week,Second week,Third week,Fourth week,Last week,?..." newline bitfld.long 0x00 8.--10. " DST_FORWARD_DAY_OF_WEEK ,Matches the day of week register bits[2:0]" "0,1,2,3,7,5,6,7" hexmask.long.byte 0x00 0.--7. 1. " DST_FORWARD_MONTH ,Matches the Month Register" line.long 0x04 "DSBR,Daylight Savings Backward Register" bitfld.long 0x04 31. " DST_BACKWARD_AM_PM ,Selects AM vs. PM" "AM,PM" hexmask.long.byte 0x04 24.--30. 1. " DST_BACKWARD_HOUR ,Holds the matching value for bits[6:0] of the Hours register" bitfld.long 0x04 16.--18. " DST_BACKWARD_WEEK ,Value matches an internally-maintained week number within the current month" ",First week,Second week,Third week,Fourth week,Last week,?..." newline bitfld.long 0x04 8.--10. " DST_BACKWARD_DAY_OF_WEEK ,Matches the day of week register bits[2:0]" "0,1,2,3,7,5,6,7" hexmask.long.byte 0x04 0.--7. 1. " DST_BACKWARD_MONTH ,Matches the Month Register" width 0x0B tree.end tree "Week Timer" base ad:0x4000AC80 width 27. group.long 0x00++0x0B line.long 0x00 "CNTRL_REGISTER,Control Register" bitfld.long 0x00 6. " POWERUP_EN ,Power-up event output enable" "Disabled,Enabled" bitfld.long 0x00 0. " WT_ENABLE ,WEEK_AL_CNTR_REGISTER & CLK_DIV_REGISTER start enable" "Disabled,Enabled" line.long 0x04 "WEEK_AL_CNTR_REGISTER,Week Alarm Counter Register" hexmask.long 0x04 0.--27. 1. " WEEK_COUNTER ,Week counter" line.long 0x08 "WTIMER_COMPARE_REGISTER,Week Timer Compare Register" hexmask.long 0x08 0.--27. 1. " WEEK_COMPARE ,Week compare" rgroup.long 0x0C++0x03 line.long 0x00 "CLK_DIV_REGISTER,Clock Divider Register" hexmask.long.word 0x00 0.--14. 1. " CLOCK_DIVIDER ,Clock divider" group.long 0x10++0x17 line.long 0x00 "SUB-SECOND_PISR,Sub-Second Programmable Interrupt Select Register" bitfld.long 0x00 0.--3. " SPISR ,Sub-second interrupt events rate" "Disabled,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768" line.long 0x04 "SUB-WEEK_CNTRL_REGISTER,Sub-Week Control Register" bitfld.long 0x04 7.--9. " SUBWEEK_TICK ,Sub-week counter clock source" "Disabled,Sub-second,Second,,Week counter bit 3,Week counter bit 5,Week counter bit 7,Week counter bit 9" bitfld.long 0x04 6. " AUTO_RELOAD ,Auto reload" "Not reloaded,Reloaded" rbitfld.long 0x04 5. " TEST ,Test bit" "0,1" newline eventfld.long 0x04 1. " WEEK_TIMER_POWERUP_EVENT_STATUS ,Week timer power up event status" "Not cleared,Cleared" eventfld.long 0x04 0. " SUBWEEK_TIMER_POWERUP_EVENT_STATUS ,Subweek timer power up event status" "Not cleared,Cleared" line.long 0x08 "SUB-WEEK_AL_CNTR_REGISTER,Sub-Week Alarm Counter Register" hexmask.long.word 0x08 16.--24. 1. " SUBWEEK_COUNTER_STAT ,Subweek counter status" hexmask.long.word 0x08 0.--8. 1. " SUBWEEK_COUNTER_LOAD ,Subweek counter load" line.long 0x0C "BGPO_DATA_REGISTER,BGPO Data Register" bitfld.long 0x0C 9. " BGPO[9] ,Battery powered general purpose output bit 9" "Low,High" bitfld.long 0x0C 8. " [8] ,Battery powered general purpose output bit 8" "Low,High" bitfld.long 0x0C 7. " [7] ,Battery powered general purpose output bit 7" "Low,High" newline bitfld.long 0x0C 6. " [6] ,Battery powered general purpose output bit 6" "Low,High" bitfld.long 0x0C 5. " [5] ,Battery powered general purpose output bit 5" "Low,High" bitfld.long 0x0C 4. " [4] ,Battery powered general purpose output bit 4" "Low,High" newline bitfld.long 0x0C 3. " [3] ,Battery powered general purpose output bit 3" "Low,High" bitfld.long 0x0C 2. " [2] ,Battery powered general purpose output bit 2" "Low,High" bitfld.long 0x0C 1. " [1] ,Battery powered general purpose output bit 1" "Low,High" newline bitfld.long 0x0C 0. " [0] ,Battery powered general purpose output bit 0" "Low,High" line.long 0x10 "BGPO_POWER_REGISTER,BGPO Power Register" bitfld.long 0x10 5. " BGPO_POWER[5] ,Battery powered general purpose output power source bit 5" "GPIO,Powered by VBAT" bitfld.long 0x10 4. " [4] ,Battery powered general purpose output power source bit 4" "GPIO,Powered by VBAT" bitfld.long 0x10 3. " [3] ,Battery powered general purpose output power source bit 3" "GPIO,Powered by VBAT" newline bitfld.long 0x10 2. " [2] ,Battery powered general purpose output power source bit 2" "GPIO,Powered by VBAT" bitfld.long 0x10 1. " [1] ,Battery powered general purpose output power source bit 1" "GPIO,Powered by VBAT" line.long 0x14 "BGPO_RESET_REGISTER,BGPO Reset Register" bitfld.long 0x14 9. " BGPO_RESET[9] ,Battery powered general purpose output reset event bit 9" "No reset,Reset" bitfld.long 0x14 8. " [8] ,Battery powered general purpose output reset event bit 8" "No reset,Reset" bitfld.long 0x14 7. " [7] ,Battery powered general purpose output reset event bit 7" "No reset,Reset" newline bitfld.long 0x14 6. " [6] ,Battery powered general purpose output reset event bit 6" "No reset,Reset" bitfld.long 0x14 5. " [5] ,Battery powered general purpose output reset event bit 5" "No reset,Reset" bitfld.long 0x14 4. " [4] ,Battery powered general purpose output reset event bit 4" "No reset,Reset" newline bitfld.long 0x14 3. " [3] ,Battery powered general purpose output reset event bit 3" "No reset,Reset" bitfld.long 0x14 2. " [2] ,Battery powered general purpose output reset event bit 2" "No reset,Reset" bitfld.long 0x14 1. " [1] ,Battery powered general purpose output reset event bit 1" "No reset,Reset" newline bitfld.long 0x14 0. " [0] ,Battery powered general purpose output reset event bit 0" "No reset,Reset" width 0x0B tree.end tree "TACH (16-bit Tachometer)" tree "Instance 0" base ad:0x40006000 width 30. group.long 0x00++0x0F line.long 0x00 "TACH0_CONTROL_REGISTER,TACH0 Control Register" hexmask.long.word 0x00 16.--31. 1. " TACH0_COUNTER ,TACH0 counter" bitfld.long 0x00 15. " TACH_INPUT_INT_EN ,Tach input toggle interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14. " COUNT_READY_INT_EN ,Count ready interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 11.--12. " TACH_EDGES ,Tach edges (3 edges = 1 Tach period)" "2,3,5,9" bitfld.long 0x00 10. " TACH_READING_MODE_SELECT ,Tach reading mode select" "Tach input,100KHz input" bitfld.long 0x00 8. " FILTER_ENABLE ,Remove high frequency glitches" "Disabled,Enabled" newline bitfld.long 0x00 1. " TACH_ENABLE ,TACH monitoring and clocks enable" "Disabled,Enabled" bitfld.long 0x00 0. " TACH_OUT_OF_LIMIT_ENABLE ,Interrupt output enable" "Disabled,Enabled" line.long 0x04 "TACH0_STATUS_REGISTER,TACH0 Status Register" eventfld.long 0x04 3. " COUNT_READY_STATUS ,Count ready status" "Not ready,Ready" eventfld.long 0x04 2. " TOGGLE_STATUS ,Tach toggle status" "Stable,Changed state" rbitfld.long 0x04 1. " TACH_PIN_STATUS ,Tach pin status" "Low,High" newline eventfld.long 0x04 0. " TACH_OUT_OF_LIMIT_STATUS ,Tach out of limit status" "Within,Outside" line.long 0x08 "TACH0_HIGH_LIMIT_REGISTER,TACH0 High Limit Register" hexmask.long.word 0x08 0.--15. 1. " TACH0_HIGH_LIMIT ,Tach0 high limit" line.long 0x0C "TACH0_LOW_LIMIT_REGISTER,TACH0 Low Limit Register" hexmask.long.word 0x0C 0.--15. 1. " TACH0_LOW_LIMIT ,Tach0 low limit" width 0x0B tree.end tree "Instance 1" base ad:0x40006010 width 30. group.long 0x00++0x0F line.long 0x00 "TACH1_CONTROL_REGISTER,TACH1 Control Register" hexmask.long.word 0x00 16.--31. 1. " TACH1_COUNTER ,TACH1 counter" bitfld.long 0x00 15. " TACH_INPUT_INT_EN ,Tach input toggle interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14. " COUNT_READY_INT_EN ,Count ready interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 11.--12. " TACH_EDGES ,Tach edges (3 edges = 1 Tach period)" "2,3,5,9" bitfld.long 0x00 10. " TACH_READING_MODE_SELECT ,Tach reading mode select" "Tach input,100KHz input" bitfld.long 0x00 8. " FILTER_ENABLE ,Remove high frequency glitches" "Disabled,Enabled" newline bitfld.long 0x00 1. " TACH_ENABLE ,TACH monitoring and clocks enable" "Disabled,Enabled" bitfld.long 0x00 0. " TACH_OUT_OF_LIMIT_ENABLE ,Interrupt output enable" "Disabled,Enabled" line.long 0x04 "TACH1_STATUS_REGISTER,TACH1 Status Register" eventfld.long 0x04 3. " COUNT_READY_STATUS ,Count ready status" "Not ready,Ready" eventfld.long 0x04 2. " TOGGLE_STATUS ,Tach toggle status" "Stable,Changed state" rbitfld.long 0x04 1. " TACH_PIN_STATUS ,Tach pin status" "Low,High" newline eventfld.long 0x04 0. " TACH_OUT_OF_LIMIT_STATUS ,Tach out of limit status" "Within,Outside" line.long 0x08 "TACH1_HIGH_LIMIT_REGISTER,TACH1 High Limit Register" hexmask.long.word 0x08 0.--15. 1. " TACH1_HIGH_LIMIT ,Tach1 high limit" line.long 0x0C "TACH1_LOW_LIMIT_REGISTER,TACH1 Low Limit Register" hexmask.long.word 0x0C 0.--15. 1. " TACH1_LOW_LIMIT ,Tach1 low limit" width 0x0B tree.end tree "Instance 2" base ad:0x40006020 width 30. group.long 0x00++0x0F line.long 0x00 "TACH2_CONTROL_REGISTER,TACH2 Control Register" hexmask.long.word 0x00 16.--31. 1. " TACH2_COUNTER ,TACH2 counter" bitfld.long 0x00 15. " TACH_INPUT_INT_EN ,Tach input toggle interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14. " COUNT_READY_INT_EN ,Count ready interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 11.--12. " TACH_EDGES ,Tach edges (3 edges = 1 Tach period)" "2,3,5,9" bitfld.long 0x00 10. " TACH_READING_MODE_SELECT ,Tach reading mode select" "Tach input,100KHz input" bitfld.long 0x00 8. " FILTER_ENABLE ,Remove high frequency glitches" "Disabled,Enabled" newline bitfld.long 0x00 1. " TACH_ENABLE ,TACH monitoring and clocks enable" "Disabled,Enabled" bitfld.long 0x00 0. " TACH_OUT_OF_LIMIT_ENABLE ,Interrupt output enable" "Disabled,Enabled" line.long 0x04 "TACH2_STATUS_REGISTER,TACH2 Status Register" eventfld.long 0x04 3. " COUNT_READY_STATUS ,Count ready status" "Not ready,Ready" eventfld.long 0x04 2. " TOGGLE_STATUS ,Tach toggle status" "Stable,Changed state" rbitfld.long 0x04 1. " TACH_PIN_STATUS ,Tach pin status" "Low,High" newline eventfld.long 0x04 0. " TACH_OUT_OF_LIMIT_STATUS ,Tach out of limit status" "Within,Outside" line.long 0x08 "TACH2_HIGH_LIMIT_REGISTER,TACH2 High Limit Register" hexmask.long.word 0x08 0.--15. 1. " TACH2_HIGH_LIMIT ,Tach2 high limit" line.long 0x0C "TACH2_LOW_LIMIT_REGISTER,TACH2 Low Limit Register" hexmask.long.word 0x0C 0.--15. 1. " TACH2_LOW_LIMIT ,Tach2 low limit" width 0x0B tree.end tree.end tree "PWM" tree "Channel 0" base ad:0x40005800 width 11. group.long 0x00++0x0B line.long 0x00 "PWM0COTR,PWM0 Counter On Time Register" hexmask.long.word 0x00 0.--15. 1. " PWM_COUNTER_ON_TIME ,Determine both the frequency and duty cycle of the PWM signal" line.long 0x04 "PWM0COTR,PWM0 Counter Off Time Register" hexmask.long.word 0x04 0.--15. 1. " PWM_COUNTER_OFF_TIME ,Determine both the frequency and duty cycle of the PWM signal" line.long 0x08 "PWM0CR,PWM0 Configuration Register" bitfld.long 0x08 3.--6. " CLOCK_PRE_DIVIDER ,Clock source for the 16-bit down counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 2. " INVERT ,State of PWM_OUTPUT ON" "Active high,Active low" bitfld.long 0x08 1. " CLOCK_SELECT ,Determines the clock source used by the PWM duty cycle and frequency control logic" "CLOCK_HIGH,CLOCK_LOW" bitfld.long 0x08 0. " PWM_ENABLE ,State of PWM" "Disabled,Enabled" width 0x0B tree.end tree "Channel 1" base ad:0x40005810 width 11. group.long 0x00++0x0B line.long 0x00 "PWM1COTR,PWM1 Counter On Time Register" hexmask.long.word 0x00 0.--15. 1. " PWM_COUNTER_ON_TIME ,Determine both the frequency and duty cycle of the PWM signal" line.long 0x04 "PWM1COTR,PWM1 Counter Off Time Register" hexmask.long.word 0x04 0.--15. 1. " PWM_COUNTER_OFF_TIME ,Determine both the frequency and duty cycle of the PWM signal" line.long 0x08 "PWM1CR,PWM1 Configuration Register" bitfld.long 0x08 3.--6. " CLOCK_PRE_DIVIDER ,Clock source for the 16-bit down counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 2. " INVERT ,State of PWM_OUTPUT ON" "Active high,Active low" bitfld.long 0x08 1. " CLOCK_SELECT ,Determines the clock source used by the PWM duty cycle and frequency control logic" "CLOCK_HIGH,CLOCK_LOW" bitfld.long 0x08 0. " PWM_ENABLE ,State of PWM" "Disabled,Enabled" width 0x0B tree.end tree "Channel 2" base ad:0x40005820 width 11. group.long 0x00++0x0B line.long 0x00 "PWM2COTR,PWM2 Counter On Time Register" hexmask.long.word 0x00 0.--15. 1. " PWM_COUNTER_ON_TIME ,Determine both the frequency and duty cycle of the PWM signal" line.long 0x04 "PWM2COTR,PWM2 Counter Off Time Register" hexmask.long.word 0x04 0.--15. 1. " PWM_COUNTER_OFF_TIME ,Determine both the frequency and duty cycle of the PWM signal" line.long 0x08 "PWM2CR,PWM2 Configuration Register" bitfld.long 0x08 3.--6. " CLOCK_PRE_DIVIDER ,Clock source for the 16-bit down counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 2. " INVERT ,State of PWM_OUTPUT ON" "Active high,Active low" bitfld.long 0x08 1. " CLOCK_SELECT ,Determines the clock source used by the PWM duty cycle and frequency control logic" "CLOCK_HIGH,CLOCK_LOW" bitfld.long 0x08 0. " PWM_ENABLE ,State of PWM" "Disabled,Enabled" width 0x0B tree.end tree "Channel 3" base ad:0x40005830 width 11. group.long 0x00++0x0B line.long 0x00 "PWM3COTR,PWM3 Counter On Time Register" hexmask.long.word 0x00 0.--15. 1. " PWM_COUNTER_ON_TIME ,Determine both the frequency and duty cycle of the PWM signal" line.long 0x04 "PWM3COTR,PWM3 Counter Off Time Register" hexmask.long.word 0x04 0.--15. 1. " PWM_COUNTER_OFF_TIME ,Determine both the frequency and duty cycle of the PWM signal" line.long 0x08 "PWM3CR,PWM3 Configuration Register" bitfld.long 0x08 3.--6. " CLOCK_PRE_DIVIDER ,Clock source for the 16-bit down counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 2. " INVERT ,State of PWM_OUTPUT ON" "Active high,Active low" bitfld.long 0x08 1. " CLOCK_SELECT ,Determines the clock source used by the PWM duty cycle and frequency control logic" "CLOCK_HIGH,CLOCK_LOW" bitfld.long 0x08 0. " PWM_ENABLE ,State of PWM" "Disabled,Enabled" width 0x0B tree.end tree "Channel 4" base ad:0x40005840 width 11. group.long 0x00++0x0B line.long 0x00 "PWM4COTR,PWM4 Counter On Time Register" hexmask.long.word 0x00 0.--15. 1. " PWM_COUNTER_ON_TIME ,Determine both the frequency and duty cycle of the PWM signal" line.long 0x04 "PWM4COTR,PWM4 Counter Off Time Register" hexmask.long.word 0x04 0.--15. 1. " PWM_COUNTER_OFF_TIME ,Determine both the frequency and duty cycle of the PWM signal" line.long 0x08 "PWM4CR,PWM4 Configuration Register" bitfld.long 0x08 3.--6. " CLOCK_PRE_DIVIDER ,Clock source for the 16-bit down counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 2. " INVERT ,State of PWM_OUTPUT ON" "Active high,Active low" bitfld.long 0x08 1. " CLOCK_SELECT ,Determines the clock source used by the PWM duty cycle and frequency control logic" "CLOCK_HIGH,CLOCK_LOW" bitfld.long 0x08 0. " PWM_ENABLE ,State of PWM" "Disabled,Enabled" width 0x0B tree.end tree "Channel 5" base ad:0x40005850 width 11. group.long 0x00++0x0B line.long 0x00 "PWM5COTR,PWM5 Counter On Time Register" hexmask.long.word 0x00 0.--15. 1. " PWM_COUNTER_ON_TIME ,Determine both the frequency and duty cycle of the PWM signal" line.long 0x04 "PWM5COTR,PWM5 Counter Off Time Register" hexmask.long.word 0x04 0.--15. 1. " PWM_COUNTER_OFF_TIME ,Determine both the frequency and duty cycle of the PWM signal" line.long 0x08 "PWM5CR,PWM5 Configuration Register" bitfld.long 0x08 3.--6. " CLOCK_PRE_DIVIDER ,Clock source for the 16-bit down counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 2. " INVERT ,State of PWM_OUTPUT ON" "Active high,Active low" bitfld.long 0x08 1. " CLOCK_SELECT ,Determines the clock source used by the PWM duty cycle and frequency control logic" "CLOCK_HIGH,CLOCK_LOW" bitfld.long 0x08 0. " PWM_ENABLE ,State of PWM" "Disabled,Enabled" width 0x0B tree.end tree "Channel 6" base ad:0x40005860 width 11. group.long 0x00++0x0B line.long 0x00 "PWM6COTR,PWM6 Counter On Time Register" hexmask.long.word 0x00 0.--15. 1. " PWM_COUNTER_ON_TIME ,Determine both the frequency and duty cycle of the PWM signal" line.long 0x04 "PWM6COTR,PWM6 Counter Off Time Register" hexmask.long.word 0x04 0.--15. 1. " PWM_COUNTER_OFF_TIME ,Determine both the frequency and duty cycle of the PWM signal" line.long 0x08 "PWM6CR,PWM6 Configuration Register" bitfld.long 0x08 3.--6. " CLOCK_PRE_DIVIDER ,Clock source for the 16-bit down counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 2. " INVERT ,State of PWM_OUTPUT ON" "Active high,Active low" bitfld.long 0x08 1. " CLOCK_SELECT ,Determines the clock source used by the PWM duty cycle and frequency control logic" "CLOCK_HIGH,CLOCK_LOW" bitfld.long 0x08 0. " PWM_ENABLE ,State of PWM" "Disabled,Enabled" width 0x0B tree.end tree "Channel 7" base ad:0x40005870 width 11. group.long 0x00++0x0B line.long 0x00 "PWM7COTR,PWM7 Counter On Time Register" hexmask.long.word 0x00 0.--15. 1. " PWM_COUNTER_ON_TIME ,Determine both the frequency and duty cycle of the PWM signal" line.long 0x04 "PWM7COTR,PWM7 Counter Off Time Register" hexmask.long.word 0x04 0.--15. 1. " PWM_COUNTER_OFF_TIME ,Determine both the frequency and duty cycle of the PWM signal" line.long 0x08 "PWM7CR,PWM7 Configuration Register" bitfld.long 0x08 3.--6. " CLOCK_PRE_DIVIDER ,Clock source for the 16-bit down counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 2. " INVERT ,State of PWM_OUTPUT ON" "Active high,Active low" bitfld.long 0x08 1. " CLOCK_SELECT ,Determines the clock source used by the PWM duty cycle and frequency control logic" "CLOCK_HIGH,CLOCK_LOW" bitfld.long 0x08 0. " PWM_ENABLE ,State of PWM" "Disabled,Enabled" width 0x0B tree.end tree "Channel 8" base ad:0x40005880 width 11. group.long 0x00++0x0B line.long 0x00 "PWM8COTR,PWM8 Counter On Time Register" hexmask.long.word 0x00 0.--15. 1. " PWM_COUNTER_ON_TIME ,Determine both the frequency and duty cycle of the PWM signal" line.long 0x04 "PWM8COTR,PWM8 Counter Off Time Register" hexmask.long.word 0x04 0.--15. 1. " PWM_COUNTER_OFF_TIME ,Determine both the frequency and duty cycle of the PWM signal" line.long 0x08 "PWM8CR,PWM8 Configuration Register" bitfld.long 0x08 3.--6. " CLOCK_PRE_DIVIDER ,Clock source for the 16-bit down counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 2. " INVERT ,State of PWM_OUTPUT ON" "Active high,Active low" bitfld.long 0x08 1. " CLOCK_SELECT ,Determines the clock source used by the PWM duty cycle and frequency control logic" "CLOCK_HIGH,CLOCK_LOW" bitfld.long 0x08 0. " PWM_ENABLE ,State of PWM" "Disabled,Enabled" width 0x0B tree.end tree "Channel 9" base ad:0x40005890 width 11. group.long 0x00++0x0B line.long 0x00 "PWM9COTR,PWM9 Counter On Time Register" hexmask.long.word 0x00 0.--15. 1. " PWM_COUNTER_ON_TIME ,Determine both the frequency and duty cycle of the PWM signal" line.long 0x04 "PWM9COTR,PWM9 Counter Off Time Register" hexmask.long.word 0x04 0.--15. 1. " PWM_COUNTER_OFF_TIME ,Determine both the frequency and duty cycle of the PWM signal" line.long 0x08 "PWM9CR,PWM9 Configuration Register" bitfld.long 0x08 3.--6. " CLOCK_PRE_DIVIDER ,Clock source for the 16-bit down counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 2. " INVERT ,State of PWM_OUTPUT ON" "Active high,Active low" bitfld.long 0x08 1. " CLOCK_SELECT ,Determines the clock source used by the PWM duty cycle and frequency control logic" "CLOCK_HIGH,CLOCK_LOW" bitfld.long 0x08 0. " PWM_ENABLE ,State of PWM" "Disabled,Enabled" width 0x0B tree.end tree "Channel 10" base ad:0x400058A0 width 11. group.long 0x00++0x0B line.long 0x00 "PWM10COTR,PWM10 Counter On Time Register" hexmask.long.word 0x00 0.--15. 1. " PWM_COUNTER_ON_TIME ,Determine both the frequency and duty cycle of the PWM signal" line.long 0x04 "PWM10COTR,PWM10 Counter Off Time Register" hexmask.long.word 0x04 0.--15. 1. " PWM_COUNTER_OFF_TIME ,Determine both the frequency and duty cycle of the PWM signal" line.long 0x08 "PWM10CR,PWM10 Configuration Register" bitfld.long 0x08 3.--6. " CLOCK_PRE_DIVIDER ,Clock source for the 16-bit down counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 2. " INVERT ,State of PWM_OUTPUT ON" "Active high,Active low" bitfld.long 0x08 1. " CLOCK_SELECT ,Determines the clock source used by the PWM duty cycle and frequency control logic" "CLOCK_HIGH,CLOCK_LOW" bitfld.long 0x08 0. " PWM_ENABLE ,State of PWM" "Disabled,Enabled" width 0x0B tree.end tree.end tree "PECI" base ad:0x40000000 width 10. group.long 0x00++0x27 line.long 0x00 "WDR,Write Data Register" line.long 0x04 "RDR,Read Data Register" line.long 0x08 "CR,Control Register" line.long 0x0C "SR1,Status Register 1" line.long 0x10 "SR2,Status Register 2" line.long 0x14 "ER,Error Register" line.long 0x18 "IE1R,Interrupt Enable 1 Register" line.long 0x1C "IE2R,Interrupt Enable 2 Register" line.long 0x20 "OBTR(LB),Optimal Bit Time Register (Low Byte)" line.long 0x24 "OBTR(HB),Optimal Bit Time Register (High Byte)" rgroup.long 0x28++0x07 line.long 0x00 "TEST,Test Register" line.long 0x04 "TEST,Test Register" group.long 0x40++0x07 line.long 0x00 "BIDR,Block ID Register" line.long 0x04 "RR,Revision Register" rgroup.long 0x48++0x37 line.long 0x00 "TEST,Test Register" line.long 0x04 "TEST,Test Register" line.long 0x08 "TEST,Test Register" line.long 0x0C "TEST,Test Register" line.long 0x10 "TEST,Test Register" line.long 0x14 "TEST,Test Register" line.long 0x18 "TEST,Test Register" line.long 0x1C "TEST,Test Register" line.long 0x20 "TEST,Test Register" line.long 0x24 "TEST,Test Register" line.long 0x28 "TEST,Test Register" line.long 0x2C "TEST,Test Register" line.long 0x30 "TEST,Test Register" line.long 0x34 "TEST,Test Register" width 0x0B tree.end tree "ADC (Analog To Digital Converter)" base ad:0x40007C00 width 20. group.long 0x00++0x33 line.long 0x00 "ADCCR,ADC Control Register" eventfld.long 0x00 7. " SINGLE_DONE_STATUS ,ADC single-sample conversion status" "Not completed,Completed" eventfld.long 0x00 6. " REPEAT_DONE_STATUS ,ADC repeat-sample conversion status" "Not completed,Completed" bitfld.long 0x00 4. " SOFT_RESET ,ADC reset the ADC block hardware" "Not reset,Reset" bitfld.long 0x00 3. " POWER_SAVER_DIS ,power saving feature status" "No,Yes" newline bitfld.long 0x00 2. " START_REPEAT ,ADC repeat mode status" "Disabled,Enabled" bitfld.long 0x00 1. " START_SINGLE ,ADC single mode status" "Disabled,Enabled" bitfld.long 0x00 0. " ACTIVATE ,ADC block status" "Disabled,Enabled" line.long 0x04 "ADCDR,ADC Delay Register" hexmask.long.word 0x04 16.--31. 1. " REPEAT_DELAY ,Interval between conversion cycles when START_REPEAT is 1" hexmask.long.word 0x04 0.--15. 1. " START_DELAY ,Starting delay before a conversion cycle is begun when START_REPEAT is written with a 1" line.long 0x08 "ADCSR,ADC Status Register" bitfld.long 0x08 15. " ADC_CH_STATUS[15] ,Conversion of the ADC channel 15 status" "Not completed,Completed" bitfld.long 0x08 14. " [14] ,Conversion of the ADC channel 14 status" "Not completed,Completed" bitfld.long 0x08 13. " [13] ,Conversion of the ADC channel 13 status" "Not completed,Completed" bitfld.long 0x08 12. " [12] ,Conversion of the ADC channel 12 status" "Not completed,Completed" newline bitfld.long 0x08 11. " [11] ,Conversion of the ADC channel 11 status" "Not completed,Completed" bitfld.long 0x08 10. " [10] ,Conversion of the ADC channel 10 status" "Not completed,Completed" bitfld.long 0x08 9. " [9] ,Conversion of the ADC channel 9 status" "Not completed,Completed" bitfld.long 0x08 8. " [8] ,Conversion of the ADC channel 8 status" "Not completed,Completed" newline bitfld.long 0x08 7. " [7] ,Conversion of the ADC channel 7 status" "Not completed,Completed" bitfld.long 0x08 6. " [6] ,Conversion of the ADC channel 6 status" "Not completed,Completed" bitfld.long 0x08 5. " [5] ,Conversion of the ADC channel 5 status" "Not completed,Completed" bitfld.long 0x08 4. " [4] ,Conversion of the ADC channel 4 status" "Not completed,Completed" newline bitfld.long 0x08 3. " [3] ,Conversion of the ADC channel 3 status" "Not completed,Completed" bitfld.long 0x08 2. " [2] ,Conversion of the ADC channel 2 status" "Not completed,Completed" bitfld.long 0x08 1. " [1] ,Conversion of the ADC channel 1 status" "Not completed,Completed" bitfld.long 0x08 0. " [0] ,Conversion of the ADC channel 0 status" "Not completed,Completed" line.long 0x0C "ADCSR,Single Register" bitfld.long 0x0C 15. " SINGLE_EN[15] ,Status of single cycle conversions for channel 15" "Disabled,Enabled" bitfld.long 0x0C 14. " [14] ,Status of single cycle conversions for channel 14" "Disabled,Enabled" bitfld.long 0x0C 13. " [13] ,Status of single cycle conversions for channel 13" "Disabled,Enabled" bitfld.long 0x0C 12. " [12] ,Status of single cycle conversions for channel 12" "Disabled,Enabled" newline bitfld.long 0x0C 11. " [11] ,Status of single cycle conversions for channel 11" "Disabled,Enabled" bitfld.long 0x0C 10. " [10] ,Status of single cycle conversions for channel 10" "Disabled,Enabled" bitfld.long 0x0C 9. " [9] ,Status of single cycle conversions for channel 9" "Disabled,Enabled" bitfld.long 0x0C 8. " [8] ,Status of single cycle conversions for channel 8" "Disabled,Enabled" newline bitfld.long 0x0C 7. " [7] ,Status of single cycle conversions for channel 7" "Disabled,Enabled" bitfld.long 0x0C 6. " [6] ,Status of single cycle conversions for channel 6" "Disabled,Enabled" bitfld.long 0x0C 5. " [5] ,Status of single cycle conversions for channel 5" "Disabled,Enabled" bitfld.long 0x0C 4. " [4] ,Status of single cycle conversions for channel 4" "Disabled,Enabled" newline bitfld.long 0x0C 3. " [3] ,Status of single cycle conversions for channel 3" "Disabled,Enabled" bitfld.long 0x0C 2. " [2] ,Status of single cycle conversions for channel 2" "Disabled,Enabled" bitfld.long 0x0C 1. " [1] ,Status of single cycle conversions for channel 1" "Disabled,Enabled" bitfld.long 0x0C 0. " [0] ,Status of single cycle conversions for channel 0" "Disabled,Enabled" line.long 0x10 "ADCRR,ADC repeat register" bitfld.long 0x10 15. " RPT_EN[15] ,Status of repeat cycle conversions for channel 15" "Disabled,Enabled" bitfld.long 0x10 14. " [14] ,Status of repeat cycle conversions for channel 14" "Disabled,Enabled" bitfld.long 0x10 13. " [13] ,Status of repeat cycle conversions for channel 13" "Disabled,Enabled" bitfld.long 0x10 12. " [12] ,Status of repeat cycle conversions for channel 12" "Disabled,Enabled" newline bitfld.long 0x10 11. " [11] ,Status of repeat cycle conversions for channel 11" "Disabled,Enabled" bitfld.long 0x10 10. " [10] ,Status of repeat cycle conversions for channel 10" "Disabled,Enabled" bitfld.long 0x10 9. " [9] ,Status of repeat cycle conversions for channel 9" "Disabled,Enabled" bitfld.long 0x10 8. " [8] ,Status of repeat cycle conversions for channel 8" "Disabled,Enabled" newline bitfld.long 0x10 7. " [7] ,Status of repeat cycle conversions for channel 7" "Disabled,Enabled" bitfld.long 0x10 6. " [6] ,Status of repeat cycle conversions for channel 6" "Disabled,Enabled" bitfld.long 0x10 5. " [5] ,Status of repeat cycle conversions for channel 5" "Disabled,Enabled" bitfld.long 0x10 4. " [4] ,Status of repeat cycle conversions for channel 4" "Disabled,Enabled" newline bitfld.long 0x10 3. " [3] ,Status of repeat cycle conversions for channel 3" "Disabled,Enabled" bitfld.long 0x10 2. " [2] ,Status of repeat cycle conversions for channel 2" "Disabled,Enabled" bitfld.long 0x10 1. " [1] ,Status of repeat cycle conversions for channel 1" "Disabled,Enabled" bitfld.long 0x10 0. " [0] ,Status of repeat cycle conversions for channel 0" "Disabled,Enabled" line.long 0x14 "ADCC0RR,ADC Channel 0 Reading Register" line.long 0x18 "ADCC1RR,ADC Channel 1 Reading Register" line.long 0x1C "ADCC2RR,ADC Channel 2 Reading Register" line.long 0x20 "ADCC3RR,ADC Channel 3 Reading Register" line.long 0x24 "ADCC4RR,ADC Channel 4 Reading Register" line.long 0x28 "ADCC5RR,ADC Channel 5 Reading Register" line.long 0x2C "ADCC6RR,ADC Channel 6 Reading Register" line.long 0x30 "ADCC7RR,ADC Channel 7 Reading Register" sif cpuis("MEC1701QC2TN")||cpuis("MEC1703KP2XY")||cpuis("MEC1701QC2TN") group.long 0x34++0x1F line.long 0x00 "ADCC8RR,ADC Channel 8 Reading Register" line.long 0x04 "ADCC9RR,ADC Channel 9 Reading Register" line.long 0x08 "ADCC10RR,ADC Channel 10 Reading Register" line.long 0x0C "ADCC11RR,ADC Channel 11 Reading Register" line.long 0x10 "ADCC12RR,ADC Channel 12 Reading Register" line.long 0x14 "ADCC13RR,ADC Channel 13 Reading Register" line.long 0x18 "ADCC14RR,ADC Channel 14 Reading Register" line.long 0x1C "ADCC15RR,ADC Channel 15 Reading Register" endif width 0x0B tree.end tree "EEPROM" base ad:0x40002C00 width 22. group.long 0x00++0x03 line.long 0x00 "EEPROMMR,EEPROM Mode Register" bitfld.long 0x00 1. " SOFT_RESET ,Soft reset" "No reset,Reset" bitfld.long 0x00 0. " ACTIVATE ,Activate" "Disabled,Enabled" if (((per.l(ad:0x40002C00+0x04))&0x70000)==(0x00000||0x10000)) group.long 0x04++0x03 line.long 0x00 "EEPROMER,EEPROM Execute Register" bitfld.long 0x00 24.--28. " TRANSFER_SIZE ,Number of bytes transferred between EEPROM fabric and buffer" "32,31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1" bitfld.long 0x00 16.--18. " COMMAND ,Command" "Read,Write,Read status,Write status,?..." hexmask.long.word 0x00 0.--15. 0x01 " EEPROM_ADRESS ,Byte address in the EEPROM" else group.long 0x04++0x03 line.long 0x00 "EEPROMER,EEPROM Execute Register" bitfld.long 0x00 16.--18. " COMMAND ,Command" "Read,Write,Read status,Write status,?..." endif group.long 0x08++0x07 line.long 0x00 "EEPROMSR,EEPROM Status Register" rbitfld.long 0x00 8. " TRANSFER_ACTIVE ,Transfer between EEPROM fabric and EEPROM buffer register in progress" "Not active,Active" eventfld.long 0x00 1. " EXECUTION_ERROR ,Illegal command programmed into the block" "Not occurred,Occurred" eventfld.long 0x00 0. " TRANSFER_COMPLETE ,Transfer between EEPROM fabric and buffer complete" "Not completed,Completed" line.long 0x04 "EEPROMIER,EEPROM Interrupt Enable Register" bitfld.long 0x04 1. " EXECUTION_ERROR_IE ,EXECUTION_ERROR status asserted" "No interrupt,Interrupt" bitfld.long 0x04 0. " TRANSFER_COMPLETE_IE ,TRANSFER_COMPLETE status asserted" "No interrupt,Interrupt" wgroup.long 0x10++0x07 line.long 0x00 "EEPROMPR,EEPROM Password Register" hexmask.long 0x00 0.--30. 1. " EEPROM_PASSWORD ,EEPROM password" line.long 0x04 "EEPROMUR,EEPROM Unlock Register" hexmask.long 0x04 0.--30. 1. " EEPROM_UNLOCK ,EEPROM unlock" group.long 0x20++0x03 line.long 0x00 "EEPROMLR,EEPROM Lock Register" bitfld.long 0x00 1. " LOCK ,EEPROM access lock" "Not locked,Locked" bitfld.long 0x00 0. " JTAG_LOCK ,JTAG/SWD interface lock" "Not locked,Locked" hgroup.long 0x20++0x03 hide.long 0x00 "EEPROMBR,EEPROM Buffer Register" in newline width 0x0B tree.end tree "RPM-PWM Interface" tree "Instance 0" base ad:0x4000A000 width 30. group.word 0x00++0x03 line.word 0x00 "FAN_SETTING_REGISTER,Fan Setting Register" hexmask.word 0x00 6.--15. 1. " FAN_SETTING ,Fan setting" line.word 0x02 "FAN_CONFIG_REGISTER,Fan Configuration Register" bitfld.word 0x02 15. " EN_RRC ,Ramp rate control enable" "Disabled,Enabled" bitfld.word 0x02 14. " DIS_GLITCH ,Low pass glitch filter disable" "No,Yes" bitfld.word 0x02 12.--13. " DER_OPT ,Derivative options" "Not used,Basic,Step,Both" bitfld.word 0x02 10.--11. " ERR_RNG ,Error window speed (RPM)" "0,50,100,200" newline bitfld.word 0x02 9. " POLARITY ,Polarity of the PWM driver" "Not inverted,Inverted" bitfld.word 0x02 7. " EN_ALGO ,RPM based fan control algorithm enable" "Disabled,Enabled" bitfld.word 0x02 5.--6. " RANGE ,Tachometer reading values range (reported minimum RPM/tach count multiplier)" "500/1,1000/2,2000/4,4000/8" bitfld.word 0x02 3.--4. " EDGES ,Minimum TACH edges to determine a single rotation" "3,5,7,9" newline bitfld.word 0x02 0.--2. " UPDATE ,Base time between fan driver updates (ms)" "100,200,300,400,500,800,1200,1600" group.byte 0x04++0x05 line.byte 0x00 "PWM_DIV_REGISTER,PWM Divide Register" line.byte 0x01 "GAIN_REGISTER,Gain Register" bitfld.byte 0x01 4.--5. " GAIND ,Derivative gain factor" "1x,2x,4x,8x" bitfld.byte 0x01 2.--3. " GAINI ,Integral gain factor" "1x,2x,4x,8x" bitfld.byte 0x01 0.--1. " GAINP ,Proportional gain factor" "1x,2x,4x,8x" line.byte 0x02 "FAN_SPIN_UP_CONFIG_REGISTER,Fan Spin Up Configuration Register" bitfld.byte 0x02 6.--7. " DRIVE_FAIL_CNT ,Drive fail detection circuitry update periods count" "Disabled,16,32,64" bitfld.byte 0x02 5. " NOKICK ,Driving the PWM to 100% by the spin up routine" "Driven,Not driven" bitfld.byte 0x02 2.--4. " SPIN_LVL ,Final drive level of spin up routine" "30%,35%,40%,45%,50%,55%,60%,65%" bitfld.byte 0x02 0.--1. " SPINUP_TIME ,Maximum spin time of spin up routine (ms)" "250,500,1000,2000" line.byte 0x03 "FAN_STEP_REGISTER,Fan Step Register" line.byte 0x04 "FAN_MIN_DRIVE_REGISTER,Fan Minimum Drive Register" line.byte 0x05 "VALID_TACH_COUNT_REGISTER,Valid Tach Count Register" rgroup.word 0x0A++0x05 line.word 0x00 "FAN_DRIVE_FAIL_BAND_REGISTER,Fan Drive Fail Band Register" hexmask.word 0x00 3.--15. 1. " FAN_DRIVE_FAIL_BAND ,Number of TACH counts" line.word 0x02 "TACH_TARGET_REGISTER,Tach Target Register" hexmask.word 0x02 3.--15. 1. " TACH_TARGET ,Target tachometer value" line.word 0x04 "TACH_READING_REGISTER,Tach Reading Register" hexmask.word 0x04 3.--15. 1. " TACH_READING ,Current tachometer reading value" group.byte 0x10++0x01 line.byte 0x00 "PWM_DRVR_BASE_FREQ_REGISTER,PWM Driver Base Frequency Register" bitfld.byte 0x00 0.--1. " PWM_BASE ,PWM fan driver frequency range (KHz)" "26.8,23.4,4.67,2.34" line.byte 0x01 "FAN_STATUS_REGISTER,Fan Status Register" eventfld.byte 0x01 5. " DRIVE_FAIL ,RPM-based fan speed control algorithm drive fail" "No,Yes" eventfld.byte 0x01 1. " FAN_SPIN ,Invalid tachometer reading by spin up routine for the fan detected" "No,Yes" eventfld.byte 0x01 0. " FAN_STALL ,Stalled fan detected" "Not detected,Detected" width 0x0B tree.end tree "Instance 1" base ad:0x4000A080 width 30. group.word 0x00++0x03 line.word 0x00 "FAN_SETTING_REGISTER,Fan Setting Register" hexmask.word 0x00 6.--15. 1. " FAN_SETTING ,Fan setting" line.word 0x02 "FAN_CONFIG_REGISTER,Fan Configuration Register" bitfld.word 0x02 15. " EN_RRC ,Ramp rate control enable" "Disabled,Enabled" bitfld.word 0x02 14. " DIS_GLITCH ,Low pass glitch filter disable" "No,Yes" bitfld.word 0x02 12.--13. " DER_OPT ,Derivative options" "Not used,Basic,Step,Both" bitfld.word 0x02 10.--11. " ERR_RNG ,Error window speed (RPM)" "0,50,100,200" newline bitfld.word 0x02 9. " POLARITY ,Polarity of the PWM driver" "Not inverted,Inverted" bitfld.word 0x02 7. " EN_ALGO ,RPM based fan control algorithm enable" "Disabled,Enabled" bitfld.word 0x02 5.--6. " RANGE ,Tachometer reading values range (reported minimum RPM/tach count multiplier)" "500/1,1000/2,2000/4,4000/8" bitfld.word 0x02 3.--4. " EDGES ,Minimum TACH edges to determine a single rotation" "3,5,7,9" newline bitfld.word 0x02 0.--2. " UPDATE ,Base time between fan driver updates (ms)" "100,200,300,400,500,800,1200,1600" group.byte 0x04++0x05 line.byte 0x00 "PWM_DIV_REGISTER,PWM Divide Register" line.byte 0x01 "GAIN_REGISTER,Gain Register" bitfld.byte 0x01 4.--5. " GAIND ,Derivative gain factor" "1x,2x,4x,8x" bitfld.byte 0x01 2.--3. " GAINI ,Integral gain factor" "1x,2x,4x,8x" bitfld.byte 0x01 0.--1. " GAINP ,Proportional gain factor" "1x,2x,4x,8x" line.byte 0x02 "FAN_SPIN_UP_CONFIG_REGISTER,Fan Spin Up Configuration Register" bitfld.byte 0x02 6.--7. " DRIVE_FAIL_CNT ,Drive fail detection circuitry update periods count" "Disabled,16,32,64" bitfld.byte 0x02 5. " NOKICK ,Driving the PWM to 100% by the spin up routine" "Driven,Not driven" bitfld.byte 0x02 2.--4. " SPIN_LVL ,Final drive level of spin up routine" "30%,35%,40%,45%,50%,55%,60%,65%" bitfld.byte 0x02 0.--1. " SPINUP_TIME ,Maximum spin time of spin up routine (ms)" "250,500,1000,2000" line.byte 0x03 "FAN_STEP_REGISTER,Fan Step Register" line.byte 0x04 "FAN_MIN_DRIVE_REGISTER,Fan Minimum Drive Register" line.byte 0x05 "VALID_TACH_COUNT_REGISTER,Valid Tach Count Register" rgroup.word 0x0A++0x05 line.word 0x00 "FAN_DRIVE_FAIL_BAND_REGISTER,Fan Drive Fail Band Register" hexmask.word 0x00 3.--15. 1. " FAN_DRIVE_FAIL_BAND ,Number of TACH counts" line.word 0x02 "TACH_TARGET_REGISTER,Tach Target Register" hexmask.word 0x02 3.--15. 1. " TACH_TARGET ,Target tachometer value" line.word 0x04 "TACH_READING_REGISTER,Tach Reading Register" hexmask.word 0x04 3.--15. 1. " TACH_READING ,Current tachometer reading value" group.byte 0x10++0x01 line.byte 0x00 "PWM_DRVR_BASE_FREQ_REGISTER,PWM Driver Base Frequency Register" bitfld.byte 0x00 0.--1. " PWM_BASE ,PWM fan driver frequency range (KHz)" "26.8,23.4,4.67,2.34" line.byte 0x01 "FAN_STATUS_REGISTER,Fan Status Register" eventfld.byte 0x01 5. " DRIVE_FAIL ,RPM-based fan speed control algorithm drive fail" "No,Yes" eventfld.byte 0x01 1. " FAN_SPIN ,Invalid tachometer reading by spin up routine for the fan detected" "No,Yes" eventfld.byte 0x01 0. " FAN_STALL ,Stalled fan detected" "Not detected,Detected" width 0x0B tree.end tree.end tree "Blinking/Breathing PWM" tree "Instance 0" base ad:0x4000B800 width 32. if (((per.l(ad:0x4000B800))&0x03)==0x02) group.long 0x00++0x03 line.long 0x00 "LED_CONFIG_REGISTER_0,LED Configuration Register Instance 0" bitfld.long 0x00 16. " SYMMETRY ,Rising and falling ramp times mode" "Symmetric,Asymmetric" hexmask.long.byte 0x00 8.--15. 1. " WDT_RELOAD ,PWM watchdog timer counter reload value" eventfld.long 0x00 7. " RESET ,PWM registers reset" "No reset,Reset" bitfld.long 0x00 6. " ENABLE_UPDATE ,LED_DELAY LED_STEP and LED_INT consistent configuration enable" "Disabled,Enabled" newline bitfld.long 0x00 4.--5. " PWM_SIZE ,PWM size" "8-bit,7-bit,6-bit,?..." bitfld.long 0x00 3. " SYNCHRONIZE ,Synchronize (LEDs counters behavior)" "Increment/Decrement,Reset" bitfld.long 0x00 2. " CLOCK_SOURCE ,PWM base clock source" "32.768KHz,Main system" bitfld.long 0x00 0.--1. " CONTROL ,PWM configuration" "Off,Breathing,Blinking,On" else group.long 0x00++0x03 line.long 0x00 "LED_CONFIG_REGISTER_0,LED Configuration Register Instance 0" bitfld.long 0x00 16. " SYMMETRY ,Rising and falling ramp times mode" "Symmetric,Asymmetric" hexmask.long.byte 0x00 8.--15. 1. " WDT_RELOAD ,PWM watchdog timer counter reload value" eventfld.long 0x00 7. " RESET ,PWM registers reset" "No reset,Reset" bitfld.long 0x00 6. " ENABLE_UPDATE ,LED_DELAY LED_STEP and LED_INT consistent configuration enable" "Disabled,Enabled" newline bitfld.long 0x00 4.--5. " PWM_SIZE ,PWM size" "8-bit,7-bit,6-bit,?..." bitfld.long 0x00 3. " SYNCHRONIZE ,Synchronize (LEDs counters behavior)" "Increment/Decrement,Reset" bitfld.long 0x00 0.--1. " CONTROL ,PWM configuration" "Off,Breathing,Blinking,On" endif group.long 0x04++0x13 line.long 0x00 "LED_LIMITS_REGISTER_0,LED Limits Register Instance 0" hexmask.long.byte 0x00 8.--15. 1. " MAXIMUM ,Maximum duty cycle" hexmask.long.byte 0x00 0.--7. 1. " MINIMUM ,Minimum duty cycle" line.long 0x04 "LED_DELAY_REGISTER_0,LED Delay Register Instance 0" hexmask.long.word 0x04 12.--23. 1. " HIGH_DELAY ,Number of PWM periods to wait before decrementing the current duty cycle" hexmask.long.word 0x04 0.--11. 1. " LOW_DELAY ,Number of PWM periods to wait before incrementing the current duty cycle" line.long 0x08 "LED_UPDATE_STEPSIZE_REGISTER_0,LED Update Stepsize Register Instance 0" bitfld.long 0x08 28.--31. " UPDATE_STEP7 ,Update step 7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 24.--27. " UPDATE_STEP6 ,Update step 6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 20.--23. " UPDATE_STEP5 ,Update step 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 16.--19. " UPDATE_STEP4 ,Update step 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x08 12.--15. " UPDATE_STEP3 ,Update step 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 8.--11. " UPDATE_STEP2 ,Update step 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 4.--7. " UPDATE_STEP1 ,Update step 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--3. " UPDATE_STEP0 ,Update step 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x0C "LED_UPDATE_INTERVAL_REGISTER_0,LED Update Interval Register 0" bitfld.long 0x0C 28.--31. " UPDATE_INTERVAL7 ,Update interval 7 (PWM periods)" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x0C 24.--27. " UPDATE_INTERVAL6 ,Update interval 6 (PWM periods)" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x0C 20.--23. " UPDATE_INTERVAL6 ,Update interval 6 (PWM periods)" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x0C 16.--19. " UPDATE_INTERVAL6 ,Update interval 6 (PWM periods)" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" newline bitfld.long 0x0C 12.--15. " UPDATE_INTERVAL6 ,Update interval 6 (PWM periods)" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x0C 8.--11. " UPDATE_INTERVAL6 ,Update interval 6 (PWM periods)" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x0C 4.--7. " UPDATE_INTERVAL6 ,Update interval 6 (PWM periods)" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x0C 0.--3. " UPDATE_INTERVAL6 ,Update interval 6 (PWM periods)" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" line.long 0x10 "LED_OUTPUT_DELAY_0,LED Output Delay 0" hexmask.long.byte 0x10 0.--7. 1. " OUTPUT_DELAY ,Output delay in counts of the clock defined in CLKRSC" width 0x0B tree.end tree "Instance 1" base ad:0x4000B900 width 32. if (((per.l(ad:0x4000B800))&0x03)==0x02) group.long 0x00++0x03 line.long 0x00 "LED_CONFIG_REGISTER_1,LED Configuration Register Instance 1" bitfld.long 0x00 16. " SYMMETRY ,Rising and falling ramp times mode" "Symmetric,Asymmetric" hexmask.long.byte 0x00 8.--15. 1. " WDT_RELOAD ,PWM watchdog timer counter reload value" eventfld.long 0x00 7. " RESET ,PWM registers reset" "No reset,Reset" bitfld.long 0x00 6. " ENABLE_UPDATE ,LED_DELAY LED_STEP and LED_INT consistent configuration enable" "Disabled,Enabled" newline bitfld.long 0x00 4.--5. " PWM_SIZE ,PWM size" "8-bit,7-bit,6-bit,?..." bitfld.long 0x00 3. " SYNCHRONIZE ,Synchronize (LEDs counters behavior)" "Increment/Decrement,Reset" bitfld.long 0x00 2. " CLOCK_SOURCE ,PWM base clock source" "32.768KHz,Main system" bitfld.long 0x00 0.--1. " CONTROL ,PWM configuration" "Off,Breathing,Blinking,On" else group.long 0x00++0x03 line.long 0x00 "LED_CONFIG_REGISTER_1,LED Configuration Register Instance 1" bitfld.long 0x00 16. " SYMMETRY ,Rising and falling ramp times mode" "Symmetric,Asymmetric" hexmask.long.byte 0x00 8.--15. 1. " WDT_RELOAD ,PWM watchdog timer counter reload value" eventfld.long 0x00 7. " RESET ,PWM registers reset" "No reset,Reset" bitfld.long 0x00 6. " ENABLE_UPDATE ,LED_DELAY LED_STEP and LED_INT consistent configuration enable" "Disabled,Enabled" newline bitfld.long 0x00 4.--5. " PWM_SIZE ,PWM size" "8-bit,7-bit,6-bit,?..." bitfld.long 0x00 3. " SYNCHRONIZE ,Synchronize (LEDs counters behavior)" "Increment/Decrement,Reset" bitfld.long 0x00 0.--1. " CONTROL ,PWM configuration" "Off,Breathing,Blinking,On" endif group.long 0x04++0x13 line.long 0x00 "LED_LIMITS_REGISTER_1,LED Limits Register Instance 1" hexmask.long.byte 0x00 8.--15. 1. " MAXIMUM ,Maximum duty cycle" hexmask.long.byte 0x00 0.--7. 1. " MINIMUM ,Minimum duty cycle" line.long 0x04 "LED_DELAY_REGISTER_1,LED Delay Register Instance 1" hexmask.long.word 0x04 12.--23. 1. " HIGH_DELAY ,Number of PWM periods to wait before decrementing the current duty cycle" hexmask.long.word 0x04 0.--11. 1. " LOW_DELAY ,Number of PWM periods to wait before incrementing the current duty cycle" line.long 0x08 "LED_UPDATE_STEPSIZE_REGISTER_1,LED Update Stepsize Register Instance 1" bitfld.long 0x08 28.--31. " UPDATE_STEP7 ,Update step 7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 24.--27. " UPDATE_STEP6 ,Update step 6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 20.--23. " UPDATE_STEP5 ,Update step 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 16.--19. " UPDATE_STEP4 ,Update step 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x08 12.--15. " UPDATE_STEP3 ,Update step 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 8.--11. " UPDATE_STEP2 ,Update step 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 4.--7. " UPDATE_STEP1 ,Update step 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--3. " UPDATE_STEP0 ,Update step 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x0C "LED_UPDATE_INTERVAL_REGISTER_1,LED Update Interval Register 1" bitfld.long 0x0C 28.--31. " UPDATE_INTERVAL7 ,Update interval 7 (PWM periods)" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x0C 24.--27. " UPDATE_INTERVAL6 ,Update interval 6 (PWM periods)" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x0C 20.--23. " UPDATE_INTERVAL6 ,Update interval 6 (PWM periods)" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x0C 16.--19. " UPDATE_INTERVAL6 ,Update interval 6 (PWM periods)" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" newline bitfld.long 0x0C 12.--15. " UPDATE_INTERVAL6 ,Update interval 6 (PWM periods)" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x0C 8.--11. " UPDATE_INTERVAL6 ,Update interval 6 (PWM periods)" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x0C 4.--7. " UPDATE_INTERVAL6 ,Update interval 6 (PWM periods)" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x0C 0.--3. " UPDATE_INTERVAL6 ,Update interval 6 (PWM periods)" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" line.long 0x10 "LED_OUTPUT_DELAY_1,LED Output Delay 1" hexmask.long.byte 0x10 0.--7. 1. " OUTPUT_DELAY ,Output delay in counts of the clock defined in CLKRSC" width 0x0B tree.end tree "Instance 2" base ad:0x4000BA00 width 32. if (((per.l(ad:0x4000B800))&0x03)==0x02) group.long 0x00++0x03 line.long 0x00 "LED_CONFIG_REGISTER_2,LED Configuration Register Instance 2" bitfld.long 0x00 16. " SYMMETRY ,Rising and falling ramp times mode" "Symmetric,Asymmetric" hexmask.long.byte 0x00 8.--15. 1. " WDT_RELOAD ,PWM watchdog timer counter reload value" eventfld.long 0x00 7. " RESET ,PWM registers reset" "No reset,Reset" bitfld.long 0x00 6. " ENABLE_UPDATE ,LED_DELAY LED_STEP and LED_INT consistent configuration enable" "Disabled,Enabled" newline bitfld.long 0x00 4.--5. " PWM_SIZE ,PWM size" "8-bit,7-bit,6-bit,?..." bitfld.long 0x00 3. " SYNCHRONIZE ,Synchronize (LEDs counters behavior)" "Increment/Decrement,Reset" bitfld.long 0x00 2. " CLOCK_SOURCE ,PWM base clock source" "32.768KHz,Main system" bitfld.long 0x00 0.--1. " CONTROL ,PWM configuration" "Off,Breathing,Blinking,On" else group.long 0x00++0x03 line.long 0x00 "LED_CONFIG_REGISTER_2,LED Configuration Register Instance 2" bitfld.long 0x00 16. " SYMMETRY ,Rising and falling ramp times mode" "Symmetric,Asymmetric" hexmask.long.byte 0x00 8.--15. 1. " WDT_RELOAD ,PWM watchdog timer counter reload value" eventfld.long 0x00 7. " RESET ,PWM registers reset" "No reset,Reset" bitfld.long 0x00 6. " ENABLE_UPDATE ,LED_DELAY LED_STEP and LED_INT consistent configuration enable" "Disabled,Enabled" newline bitfld.long 0x00 4.--5. " PWM_SIZE ,PWM size" "8-bit,7-bit,6-bit,?..." bitfld.long 0x00 3. " SYNCHRONIZE ,Synchronize (LEDs counters behavior)" "Increment/Decrement,Reset" bitfld.long 0x00 0.--1. " CONTROL ,PWM configuration" "Off,Breathing,Blinking,On" endif group.long 0x04++0x13 line.long 0x00 "LED_LIMITS_REGISTER_2,LED Limits Register Instance 2" hexmask.long.byte 0x00 8.--15. 1. " MAXIMUM ,Maximum duty cycle" hexmask.long.byte 0x00 0.--7. 1. " MINIMUM ,Minimum duty cycle" line.long 0x04 "LED_DELAY_REGISTER_2,LED Delay Register Instance 2" hexmask.long.word 0x04 12.--23. 1. " HIGH_DELAY ,Number of PWM periods to wait before decrementing the current duty cycle" hexmask.long.word 0x04 0.--11. 1. " LOW_DELAY ,Number of PWM periods to wait before incrementing the current duty cycle" line.long 0x08 "LED_UPDATE_STEPSIZE_REGISTER_2,LED Update Stepsize Register Instance 2" bitfld.long 0x08 28.--31. " UPDATE_STEP7 ,Update step 7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 24.--27. " UPDATE_STEP6 ,Update step 6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 20.--23. " UPDATE_STEP5 ,Update step 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 16.--19. " UPDATE_STEP4 ,Update step 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x08 12.--15. " UPDATE_STEP3 ,Update step 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 8.--11. " UPDATE_STEP2 ,Update step 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 4.--7. " UPDATE_STEP1 ,Update step 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--3. " UPDATE_STEP0 ,Update step 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x0C "LED_UPDATE_INTERVAL_REGISTER_2,LED Update Interval Register 2" bitfld.long 0x0C 28.--31. " UPDATE_INTERVAL7 ,Update interval 7 (PWM periods)" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x0C 24.--27. " UPDATE_INTERVAL6 ,Update interval 6 (PWM periods)" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x0C 20.--23. " UPDATE_INTERVAL6 ,Update interval 6 (PWM periods)" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x0C 16.--19. " UPDATE_INTERVAL6 ,Update interval 6 (PWM periods)" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" newline bitfld.long 0x0C 12.--15. " UPDATE_INTERVAL6 ,Update interval 6 (PWM periods)" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x0C 8.--11. " UPDATE_INTERVAL6 ,Update interval 6 (PWM periods)" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x0C 4.--7. " UPDATE_INTERVAL6 ,Update interval 6 (PWM periods)" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x0C 0.--3. " UPDATE_INTERVAL6 ,Update interval 6 (PWM periods)" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" line.long 0x10 "LED_OUTPUT_DELAY_2,LED Output Delay 2" hexmask.long.byte 0x10 0.--7. 1. " OUTPUT_DELAY ,Output delay in counts of the clock defined in CLKRSC" width 0x0B tree.end tree "Instance 3" base ad:0x4000BB00 width 32. if (((per.l(ad:0x4000B800))&0x03)==0x02) group.long 0x00++0x03 line.long 0x00 "LED_CONFIG_REGISTER_3,LED Configuration Register Instance 3" bitfld.long 0x00 16. " SYMMETRY ,Rising and falling ramp times mode" "Symmetric,Asymmetric" hexmask.long.byte 0x00 8.--15. 1. " WDT_RELOAD ,PWM watchdog timer counter reload value" eventfld.long 0x00 7. " RESET ,PWM registers reset" "No reset,Reset" bitfld.long 0x00 6. " ENABLE_UPDATE ,LED_DELAY LED_STEP and LED_INT consistent configuration enable" "Disabled,Enabled" newline bitfld.long 0x00 4.--5. " PWM_SIZE ,PWM size" "8-bit,7-bit,6-bit,?..." bitfld.long 0x00 3. " SYNCHRONIZE ,Synchronize (LEDs counters behavior)" "Increment/Decrement,Reset" bitfld.long 0x00 2. " CLOCK_SOURCE ,PWM base clock source" "32.768KHz,Main system" bitfld.long 0x00 0.--1. " CONTROL ,PWM configuration" "Off,Breathing,Blinking,On" else group.long 0x00++0x03 line.long 0x00 "LED_CONFIG_REGISTER_3,LED Configuration Register Instance 3" bitfld.long 0x00 16. " SYMMETRY ,Rising and falling ramp times mode" "Symmetric,Asymmetric" hexmask.long.byte 0x00 8.--15. 1. " WDT_RELOAD ,PWM watchdog timer counter reload value" eventfld.long 0x00 7. " RESET ,PWM registers reset" "No reset,Reset" bitfld.long 0x00 6. " ENABLE_UPDATE ,LED_DELAY LED_STEP and LED_INT consistent configuration enable" "Disabled,Enabled" newline bitfld.long 0x00 4.--5. " PWM_SIZE ,PWM size" "8-bit,7-bit,6-bit,?..." bitfld.long 0x00 3. " SYNCHRONIZE ,Synchronize (LEDs counters behavior)" "Increment/Decrement,Reset" bitfld.long 0x00 0.--1. " CONTROL ,PWM configuration" "Off,Breathing,Blinking,On" endif group.long 0x04++0x13 line.long 0x00 "LED_LIMITS_REGISTER_3,LED Limits Register Instance 3" hexmask.long.byte 0x00 8.--15. 1. " MAXIMUM ,Maximum duty cycle" hexmask.long.byte 0x00 0.--7. 1. " MINIMUM ,Minimum duty cycle" line.long 0x04 "LED_DELAY_REGISTER_3,LED Delay Register Instance 3" hexmask.long.word 0x04 12.--23. 1. " HIGH_DELAY ,Number of PWM periods to wait before decrementing the current duty cycle" hexmask.long.word 0x04 0.--11. 1. " LOW_DELAY ,Number of PWM periods to wait before incrementing the current duty cycle" line.long 0x08 "LED_UPDATE_STEPSIZE_REGISTER_3,LED Update Stepsize Register Instance 3" bitfld.long 0x08 28.--31. " UPDATE_STEP7 ,Update step 7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 24.--27. " UPDATE_STEP6 ,Update step 6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 20.--23. " UPDATE_STEP5 ,Update step 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 16.--19. " UPDATE_STEP4 ,Update step 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x08 12.--15. " UPDATE_STEP3 ,Update step 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 8.--11. " UPDATE_STEP2 ,Update step 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 4.--7. " UPDATE_STEP1 ,Update step 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--3. " UPDATE_STEP0 ,Update step 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x0C "LED_UPDATE_INTERVAL_REGISTER_3,LED Update Interval Register 3" bitfld.long 0x0C 28.--31. " UPDATE_INTERVAL7 ,Update interval 7 (PWM periods)" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x0C 24.--27. " UPDATE_INTERVAL6 ,Update interval 6 (PWM periods)" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x0C 20.--23. " UPDATE_INTERVAL6 ,Update interval 6 (PWM periods)" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x0C 16.--19. " UPDATE_INTERVAL6 ,Update interval 6 (PWM periods)" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" newline bitfld.long 0x0C 12.--15. " UPDATE_INTERVAL6 ,Update interval 6 (PWM periods)" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x0C 8.--11. " UPDATE_INTERVAL6 ,Update interval 6 (PWM periods)" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x0C 4.--7. " UPDATE_INTERVAL6 ,Update interval 6 (PWM periods)" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x0C 0.--3. " UPDATE_INTERVAL6 ,Update interval 6 (PWM periods)" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" line.long 0x10 "LED_OUTPUT_DELAY_3,LED Output Delay 3" hexmask.long.byte 0x10 0.--7. 1. " OUTPUT_DELAY ,Output delay in counts of the clock defined in CLKRSC" width 0x0B tree.end tree.end tree "RC_ID (RC Identification Detection)" tree "Instance 0" base ad:0x40001400 width 11. group.long 0x00++0x07 line.long 0x00 "RC_IDCR0,RC_ID Control Register 0" bitfld.long 0x00 8.--9. " CLOCK_SET ,Selects the frequency of the Counter circuit clock" "48MHz,24MHz,12MHz,6MHz" bitfld.long 0x00 7. " ENABLE ,Sets RC_ID interface" "Reset state,Armed phase" bitfld.long 0x00 6. " START ,Sets Discharged phase of an RC_ID measurement" "Not occurred,Occurred" rbitfld.long 0x00 2. " CY_ER ,Encountered an error and the reading in the RC_ID Data Register is invalid" "Not occurred,Occurred" newline rbitfld.long 0x00 1. " TC ,Cleared to 0 if reset phase / set to 1 when discharged phase" "0,1" rbitfld.long 0x00 0. " DONE ,Cleared to 0 if reset phase / set to 1 when completed measurement" "0,1" line.long 0x04 "RC_IDDR0,RC_ID Data Register 0" hexmask.long.word 0x04 0.--15. 1. " DATA ,provide the result of an RC_ID measurement" width 0x0B tree.end tree "Instance 1" base ad:0x40001480 width 11. group.long 0x00++0x07 line.long 0x00 "RC_IDCR1,RC_ID Control Register 1" bitfld.long 0x00 8.--9. " CLOCK_SET ,Selects the frequency of the Counter circuit clock" "48MHz,24MHz,12MHz,6MHz" bitfld.long 0x00 7. " ENABLE ,Sets RC_ID interface" "Reset state,Armed phase" bitfld.long 0x00 6. " START ,Sets Discharged phase of an RC_ID measurement" "Not occurred,Occurred" rbitfld.long 0x00 2. " CY_ER ,Encountered an error and the reading in the RC_ID Data Register is invalid" "Not occurred,Occurred" newline rbitfld.long 0x00 1. " TC ,Cleared to 0 if reset phase / set to 1 when discharged phase" "0,1" rbitfld.long 0x00 0. " DONE ,Cleared to 0 if reset phase / set to 1 when completed measurement" "0,1" line.long 0x04 "RC_IDDR1,RC_ID Data Register 1" hexmask.long.word 0x04 0.--15. 1. " DATA ,provide the result of an RC_ID measurement" width 0x0B tree.end tree "Instance 2" base ad:0x40001500 width 11. group.long 0x00++0x07 line.long 0x00 "RC_IDCR2,RC_ID Control Register 2" bitfld.long 0x00 8.--9. " CLOCK_SET ,Selects the frequency of the Counter circuit clock" "48MHz,24MHz,12MHz,6MHz" bitfld.long 0x00 7. " ENABLE ,Sets RC_ID interface" "Reset state,Armed phase" bitfld.long 0x00 6. " START ,Sets Discharged phase of an RC_ID measurement" "Not occurred,Occurred" rbitfld.long 0x00 2. " CY_ER ,Encountered an error and the reading in the RC_ID Data Register is invalid" "Not occurred,Occurred" newline rbitfld.long 0x00 1. " TC ,Cleared to 0 if reset phase / set to 1 when discharged phase" "0,1" rbitfld.long 0x00 0. " DONE ,Cleared to 0 if reset phase / set to 1 when completed measurement" "0,1" line.long 0x04 "RC_IDDR2,RC_ID Data Register 2" hexmask.long.word 0x04 0.--15. 1. " DATA ,provide the result of an RC_ID measurement" width 0x0B tree.end tree.end tree "KSI (Keyboard Scan Interface)" base ad:0x40009C04 width 15. if (((per.l(ad:0x40009C04))&0x40)==0x40) group.long 0x00++0x03 line.long 0x00 "KSOSR,KSO Select Register" bitfld.long 0x00 6. " KSEN ,Field enables and disables keyboard scan" "Enabled,Disabled" rgroup.long 0x04++0x03 line.long 0x00 "KSIIR,KSI Input Register" hexmask.long.byte 0x00 0.--7. 1. " KSI ,Returns the current state of the KSI pins" elif (((per.l(ad:0x40009C04))&0xE0)==0x00) group.long 0x00++0x03 line.long 0x00 "KSOSR,KSO Select Register" bitfld.long 0x00 7. " KSO_INVERT ,Controls the output level of KSO pins when selected" "Low,High" bitfld.long 0x00 6. " KSEN ,Field enables and disables keyboard scan" "Enabled,Disabled" bitfld.long 0x00 5. " KSO_ALL ,Activate KSO_SELECT to control KSO output" "Enabled,Driven high" bitfld.long 0x00 0.--4. " KSO_SELECT ,Selects a KSO line for output according to the value off KSO_INVERT" "KSO00,KSO01,KSO02,KSO03,KSO04,KSO05,KSO06,KSO07,KSO08,KSO09,KSO10,KSO11,KSO12,KSO13,KSO14,KSO15,KSO16,KSO17,?..." rgroup.long 0x04++0x03 line.long 0x00 "KSIIR,KSI Input Register" hexmask.long.byte 0x00 0.--7. 1. " KSI ,Returns the current state of the KSI pins" group.long 0x08++0x03 line.long 0x00 "KSISR,KSI Status Register" eventfld.long 0x00 7. " KSI_STATUS[7] ,KSI interrupt is generated when this bit and interrupt enable bit are both set" "No effect,Cleared" eventfld.long 0x00 6. " [6] ,KSI interrupt is generated when this bit and interrupt enable bit are both set" "No effect,Cleared" eventfld.long 0x00 5. " [5] ,KSI interrupt is generated when this bit and interrupt enable bit are both set" "No effect,Cleared" eventfld.long 0x00 4. " [4] ,KSI interrupt is generated when this bit and interrupt enable bit are both set" "No effect,Cleared" newline eventfld.long 0x00 3. " [3] ,KSI interrupt is generated when this bit and interrupt enable bit are both set" "No effect,Cleared" eventfld.long 0x00 2. " [2] ,KSI interrupt is generated when this bit and interrupt enable bit are both set" "No effect,Cleared" eventfld.long 0x00 1. " [1] ,KSI interrupt is generated when this bit and interrupt enable bit are both set" "No effect,Cleared" eventfld.long 0x00 0. " [0] ,KSI interrupt is generated when this bit and interrupt enable bit are both set" "No effect,Cleared" elif (((per.l(ad:0x40009C04))&0xE0)==0x80) group.long 0x00++0x03 line.long 0x00 "KSOSR,KSO Select Register" bitfld.long 0x00 7. " KSO_INVERT ,Controls the output level of KSO pins when selected" "Low,High" bitfld.long 0x00 6. " KSEN ,Field enables and disables keyboard scan" "Enabled,Disabled" bitfld.long 0x00 5. " KSO_ALL ,Activate KSO_SELECT to control KSO output" "Enabled,Driven high" bitfld.long 0x00 0.--4. " KSO_SELECT ,Selects a KSO line for output according to the value off KSO_INVERT" "KSO00,KSO01,KSO02,KSO03,KSO04,KSO05,KSO06,KSO07,KSO08,KSO09,KSO10,KSO11,KSO12,KSO13,KSO14,KSO15,KSO16,KSO17,?..." rgroup.long 0x04++0x03 line.long 0x00 "KSIIR,KSI Input Register" hexmask.long.byte 0x00 0.--7. 1. " KSI ,Returns the current state of the KSI pins" group.long 0x08++0x03 line.long 0x00 "KSOSR,KSI Status Register" eventfld.long 0x00 7. " KSI_STATUS[7] ,KSI interrupt is generated when this bit and interrupt enable bit are both set" "No effect,Cleared" eventfld.long 0x00 6. " [6] ,KSI interrupt is generated when this bit and interrupt enable bit are both set" "No effect,Cleared" eventfld.long 0x00 5. " [5] ,KSI interrupt is generated when this bit and interrupt enable bit are both set" "No effect,Cleared" eventfld.long 0x00 4. " [4] ,KSI interrupt is generated when this bit and interrupt enable bit are both set" "No effect,Cleared" newline eventfld.long 0x00 3. " [3] ,KSI interrupt is generated when this bit and interrupt enable bit are both set" "No effect,Cleared" eventfld.long 0x00 2. " [2] ,KSI interrupt is generated when this bit and interrupt enable bit are both set" "No effect,Cleared" eventfld.long 0x00 1. " [1] ,KSI interrupt is generated when this bit and interrupt enable bit are both set" "No effect,Cleared" eventfld.long 0x00 0. " [0] ,KSI interrupt is generated when this bit and interrupt enable bit are both set" "No effect,Cleared" elif (((per.l(ad:0x40009C04))&0xE0)==0x20) group.long 0x00++0x03 line.long 0x00 "KSOSR,KSO Select Register" bitfld.long 0x00 7. " KSO_INVERT ,Controls the output level of KSO pins when selected" "Low,High" bitfld.long 0x00 6. " KSEN ,Field enables and disables keyboard scan" "Enabled,Disabled" bitfld.long 0x00 5. " KSO_ALL ,Activate KSO_SELECT to control KSO output" "Enabled,Driven high" rgroup.long 0x04++0x03 line.long 0x00 "KSIIR,KSI Input Register" hexmask.long.byte 0x00 0.--7. 1. " KSI ,Returns the current state of the KSI pins" elif (((per.l(ad:0x40009C04))&0xA0)==0xA0) group.long 0x00++0x03 line.long 0x00 "KSOSR,KSO Select Register" bitfld.long 0x00 7. " KSO_INVERT ,Controls the output level of KSO pins when selected" "Low,High" bitfld.long 0x00 6. " KSEN ,Field enables and disables keyboard scan" "Enabled,Disabled" bitfld.long 0x00 5. " KSO_ALL ,Activate KSO_SELECT to control KSO output" "Enabled,Driven high" rgroup.long 0x04++0x03 line.long 0x00 "KSIIR,KSI Input Register" hexmask.long.byte 0x00 0.--7. 1. " KSI ,Returns the current state of the KSI pins" endif group.long 0x0C++0x07 line.long 0x00 "KSIIER,KSI Interrupt Enable Register" hexmask.long.byte 0x00 0.--7. 1. " KSI_INT_EN ,Enables interrupt generation due to high to-low transition on a KSI input" line.long 0x04 "KECR,Keyscan Extended Control Register" bitfld.long 0x04 0. " PREDRIVE_ENABLE ,Enables the predrive mode to actively drive the KSO pins high for two 48 MHz PLL clocks before switching to open-drain operation" "Disabled,Enabled" width 0x0B tree.end tree "I2C/SMBUS INTERFACE" tree "Instance 0" base ad:0x40004000 width 9. wgroup.long 0x00++0x03 line.long 0x00 "CR,Control Register" bitfld.long 0x00 7. " PIN ,Pending interrupt" "No effect,De-asserts" bitfld.long 0x00 6. " ESO ,Enable Serial Output bit enables and disables the serial data output" "Disabled,Enabled" bitfld.long 0x00 3. " ENI ,Enable interrupt bit" "Disabled,Enabled" newline bitfld.long 0x00 2. " STA ,Transmit START" "Not started,Stared" bitfld.long 0x00 1. " STO ,Transmit STOP" "Not stopped,Stopped" bitfld.long 0x00 0. " ACK ,Acknowledge" "De-asserted,Asserted" if (((per.l(ad:0x40004000+0x00)&0x84)==0x00)) group.long 0x00++0x03 line.long 0x00 "SR,Status Register" bitfld.long 0x00 7. " PIN ,Pending interrupt" "Asserted,De-asserted" bitfld.long 0x00 6. " SAD ,SMBus address decoded" "0,1" bitfld.long 0x00 5. " STS ,Sets when externally generated STOP condition is detected" "Not Asserted,Asserted" newline bitfld.long 0x00 4. " BER ,Bus error" "Not asserted,Asserted" bitfld.long 0x00 3. " LRB/AD0 ,Slave acknowledgment" "No ACK,ACK" bitfld.long 0x00 2. " AAS ,Addressed as slave" "Not asserted,Asserted" newline bitfld.long 0x00 1. " LAB ,Lost arbitration" "Not lost,Lost" bitfld.long 0x00 0. " NBB ,Indicates when the bus is in use" "Busy,Not busy" elif (((per.l(ad:0x40004000+0x00)&0x84)==0x04)) group.long 0x00++0x03 line.long 0x00 "SR,Status Register" bitfld.long 0x00 7. " PIN ,Pending interrupt" "Asserted,De-asserted" bitfld.long 0x00 6. " SAD ,SMBus address decoded" "0,1" bitfld.long 0x00 5. " STS ,Sets when externally generated STOP condition is detected" "Not Asserted,Asserted" newline bitfld.long 0x00 4. " BER ,Bus error" "Not asserted,Asserted" bitfld.long 0x00 3. " LRB/AD0 ,Holds the value of the last received bit over the bus" "Address matches,Genera call" bitfld.long 0x00 2. " AAS ,Addressed as slave" "Not asserted,Asserted" newline bitfld.long 0x00 1. " LAB ,Lost arbitration" "Not lost,Lost" bitfld.long 0x00 0. " NBB ,Indicates when the bus is in use" "Busy,Not busy" else group.long 0x00++0x03 line.long 0x00 "SR,Status Register" bitfld.long 0x00 7. " PIN ,Pending interrupt" "Asserted,De-asserts" bitfld.long 0x00 6. " SAD ,SMBus address decoded" "0,1" bitfld.long 0x00 5. " STS ,Sets when externally generated STOP condition is detected" "Not Asserted,Asserted" newline bitfld.long 0x00 4. " BER ,Bus error" "Not asserted,Asserted" bitfld.long 0x00 1. " LAB ,Lost arbitration" "Not lost,Lost" bitfld.long 0x00 0. " NBB ,Indicates when the bus is in use" "Busy,Not busy" endif group.long 0x04++0x0B line.long 0x00 "OAR,Own Address Register" hexmask.long.byte 0x00 8.--14. 0x01 " OWN_ADDRESS_2 ,Configures one of the two addresses to which the controller will respond when addressed as a slave" hexmask.long.byte 0x00 0.--6. 0x01 " OWN_ADDRESS_1 ,Configures one of the two addresses to which the controller will respond when addressed as a slave" line.long 0x04 "DR,Data Register" hexmask.long.byte 0x04 0.--7. 1. " DATA ,Holds the data that are either shifted out to or shifted in from the I2C port" line.long 0x08 "MCR,Master Command Register" hexmask.long.byte 0x08 24.--31. 1. " READ_COUNT ,Count of the number of bytes to read in from the I2C port to the master receive buffer register" hexmask.long.byte 0x08 16.--23. 1. " WRITE_COUNT ,Count of the number of bytes to transmit to the I2C/SMBus port from the master transmit buffer register" bitfld.long 0x08 13. " READ_PEC ,Enables the controller to read a PEC returned from an external device after it has read an M-byte block" "Disabled,Enabled" newline bitfld.long 0x08 12. " READM ,Replacing READ_COUNT by the byte when READ_COUNT is 1" "Not replaced,Replaced" bitfld.long 0x08 11. " PEC_TERM ,PEC register data transmission" "0,1" bitfld.long 0x08 10. " STOP ,Sends a stop bit after the transaction completes" "Not sent,Sent" newline bitfld.long 0x08 9. " STARTN ,Sends a start bit before the last byte of the WRITE_COUNT data is sent" "Not sent,Sent" bitfld.long 0x08 8. " START0 ,Send a start bit before the first byte of the WRITE_COUNT data is sent" "Not sent,Sent" bitfld.long 0x08 1. " MPROCEED ,In order to start a master I2C/SMB transaction" "0,1" newline bitfld.long 0x08 0. " MRUN ,In order to start a Master I2C/SMB transaction" "0,1" group.long 0x10++0x0B line.long 0x00 "SCR,Slave Command Register" hexmask.long.byte 0x00 16.--23. 1. " SLAVE_READCOUNT ,Decremented each time a byte is copied from the DATA register to the slave receive buffer register" hexmask.long.byte 0x00 8.--15. 1. " SLAVE_WRITECOUNT ,Set to the number of bytes software expects to send to the Master" bitfld.long 0x00 2. " SLAVE_PEC ,If Setted and SLAVE_WRITE_COUNT is 0 then PEC register is copied to the DATA register" "0,1" newline bitfld.long 0x00 1. " SPROCEED ,In order to start a slave I2C/SMB transaction" "0,1" bitfld.long 0x00 0. " SRUN ,In order to enable a slave I2C/SMB transaction" "Not occurred,Occurred" line.long 0x04 "PECR,PEC Register" hexmask.long.byte 0x04 0.--7. 1. " PEC ,SMBus packet error check" line.long 0x08 "RSHTR,Repeated Start Hold Time Register" hexmask.long.byte 0x08 0.--7. 1. " RPT_START_HOLD_TIME ,Used to hold the clock until the hold time for the repeated start bit has been satisfied" group.long 0x20++0x0B line.long 0x00 "CR,Completion Register" eventfld.long 0x00 31. " SDONE ,Slave done" "Not completed,Completed" eventfld.long 0x00 30. " MDONE ,Complete master transmission state" "Not completed,Completed" eventfld.long 0x00 29. " IDLE ,Bus status" "0,1" newline rbitfld.long 0x00 25. " MTR ,Master transmit/receive" "Receive phase,Transmit phase" eventfld.long 0x00 24. " MNAKX ,Master received a NACK while transmitting" "No NACK,NACK" eventfld.long 0x00 21. " REPEAT_WRITE ,Repeat start write status" "No repeat,Repeat" newline eventfld.long 0x00 20. " REPEAT_READ ,Repeat start read status" "No repeat,Repeat" eventfld.long 0x00 19. " SPROT ,Slave protocol error in write count" "No error,Error" newline eventfld.long 0x00 17. " STR ,Slave transmit/receive" "Transmit phase,Receive phase" eventfld.long 0x00 16. " SNAKR ,Slave NACK sent while receiving" "Not sent,Sent" eventfld.long 0x00 14. " LAB ,Lost arbitration status" "0,1" newline eventfld.long 0x00 13. " BER ,Bus Error Status" "0,1" eventfld.long 0x00 12. " CHDH ,Clock high data high time-out status" "Not occurred,Occurred" eventfld.long 0x00 11. " CHDL ,Clock high data low time-out status" "Not occurred,Occurred" newline eventfld.long 0x00 10. " SCTO ,Slave Cumulative Time-Out status" "Not occurred,Occurred" eventfld.long 0x00 9. " MCTO ,Master cumulative time-out status" "Not occurred,Occurred" eventfld.long 0x00 8. " DTO ,Device Time-Out status" "Not occurred,Occurred" newline rbitfld.long 0x00 6. " TIMERR ,Time Out Error Detected" "0,1" bitfld.long 0x00 5. " BIDEN ,Enables bus idle time-out checking" "Disabled,Enabled" bitfld.long 0x00 4. " SCEN ,Enables slave cumulative time-out checking" "Disabled,Enabled" newline bitfld.long 0x00 3. " MCEN ,Enables Master Cumulative Time-Out checking" "Disabled,Enabled" bitfld.long 0x00 2. " DTEN ,Enables Device Time-Out checking" "Disabled,Enabled" line.long 0x04 "ISR,Idle Scaling Register" hexmask.long.word 0x04 16.--27. 1. " FAIR_IDLE_DELAY ,Establishes the MCTP T IDLE_DELAY period" hexmask.long.word 0x04 0.--11. 1. " FAIR_BUS_IDLE_MIN ,Bus idle period should be programmed to the T IDLE_WINDOW time" line.long 0x08 "CONFIGR,Configuration Register" bitfld.long 0x08 31. " ENSI ,Enable slave done interrupt" "Disabled,Enabled" bitfld.long 0x08 30. " ENMI ,Enable master done interrupt" "Disabled,Enabled" bitfld.long 0x08 29. " ENIDI ,Enable idle interrupt" "Disabled,Enabled" newline bitfld.long 0x08 28. " ENABLE_AAS ,Enable for the addressed as slave interrupt" "Disabled,Enabled" bitfld.long 0x08 19. " FLUSH_MRBUF ,Clears the master receive buffer register and marks it empty" "No effect,Cleared" bitfld.long 0x08 18. " FLUSH_MXBUF ,Clears the master transmit buffer register and marks it empty" "No effect,Cleared" newline bitfld.long 0x08 17. " FLUSH_SRBUF ,Clears the Slave Receive Buffer Register and marks it empty" "No effect,Cleared" bitfld.long 0x08 16. " FLUSH_SXBUF ,C the slave transmit buffer register and marks it empty" "No effect,Cleared" bitfld.long 0x08 14. " GC_DIS ,General Call disable" "Disabled,Enabled" newline bitfld.long 0x08 12. " FAIR ,General Call disable" "Disabled,Enabled" bitfld.long 0x08 11. " DSA ,Decode SMBus address" "Only slave addresses in Own Address Register,Multiple slave addresses" bitfld.long 0x08 10. " ENAB ,I2C/SMBus controller enable" "Disabled,Enabled" newline bitfld.long 0x08 9. " RESET ,Initialize to the power-on default state" "No reset,Reset" bitfld.long 0x08 8. " FEN ,Input filtering enable" "Disabled,Enabled" bitfld.long 0x08 7. " PCEN ,PEC enable bit" "Disabled,Enabled" newline bitfld.long 0x08 5. " SLOW_CLOCK ,Period for the bus clock register" "No effect,Multiplied by 4" bitfld.long 0x08 4. " TCEN ,Timing check enable" "Disabled,Enabled" bitfld.long 0x08 0.--3. " PORT_SEL ,Selects which of the 16 possible bus ports is the currently active I2C/SMBus port" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" if (((per.l(ad:0x40004000+0x00)&0x40)==0x40)) group.long 0x2C++0x03 line.long 0x00 "BCR,Bus Clock Register" hexmask.long.word 0x00 0.--8. 1. " HIGH_PERIOD ,Number of I2C_BAUD_CLOCK periods" hexmask.long.byte 0x00 0.--7. 1. " LOW_PERIOD ,Number of I2C_BAUD_CLOCK periods" else rgroup.long 0x2C++0x03 line.long 0x00 "BCR,Bus Clock Register" hexmask.long.word 0x00 0.--8. 1. " HIGH_PERIOD ,Number of I2C_BAUD_CLOCK periods" hexmask.long.byte 0x00 0.--7. 1. " LOW_PERIOD ,Number of I2C_BAUD_CLOCK periods" endif rgroup.long 0x30++0x07 line.long 0x00 "BIDR,Block ID Register" hexmask.long.byte 0x00 0.--7. 1. " ID ,Block ID" line.long 0x04 "RR,Revision Register" hexmask.long.byte 0x04 0.--7. 1. " REVISION ,Block revision number" group.long 0x38++0x03 line.long 0x00 "B-BCR,BIT-BANG Control Register" rbitfld.long 0x00 6. " BBDATI ,Bit-Bang data in" "0,1" rbitfld.long 0x00 5. " BBCLKI ,Bit-Bang clock In" "0,1" newline bitfld.long 0x00 4. " BBDAT ,Bit-Bang mode data state" "Driven low/tri-stated,Tri-stated" bitfld.long 0x00 3. " BBCLK ,Bit-Bang mode clock state" "Driven low/tri-stated,Tri-stated" bitfld.long 0x00 2. " DADIR ,Bit-Bang mode data direction" "Input,Output" newline bitfld.long 0x00 1. " CLDIR ,Bit-Bang mode clock direction" "Input,Output" bitfld.long 0x00 0. " BBEN ,Bit-Bang mode enable" "Disabled,Enabled" group.long 0x40++0x17 line.long 0x00 "DTR,Data Timing Register" hexmask.long.byte 0x00 24.--31. 1. " FIRST_START_HOLD ,Determines the SCL hold time following SDA driven low during the first START bit in a transfer" hexmask.long.byte 0x00 16.--23. 1. " STOP_SETUP ,Determines the SDA setup time from the rising edge of SCL for a repeated START condition" hexmask.long.byte 0x00 8.--15. 1. " RESTART_SETUP ,Determines the SDA setup time from the rising edge of SCL for a repeated START condition" newline hexmask.long.byte 0x00 0.--7. 1. " DATA_HOLD ,Determines the SDA hold time following SCL driven low" line.long 0x04 "TSR,TIME-OUT Scaling Register" hexmask.long.byte 0x04 24.--31. 1. " BUS_IDLE_MIN ,Determines the minimum bus idle time" hexmask.long.byte 0x04 16.--23. 1. " MASTER_CUM_TIME_OUT ,Determines the master cumulative time-out duration or the parameter T LOW:MEXT" hexmask.long.byte 0x04 8.--15. 1. " SLAVE_CUM_TIME_OUT ,Determines the Slave Cumulative Time-Out Duration or the parameter T LOW:SEXT" newline hexmask.long.byte 0x04 0.--7. 1. " CLOCK_HIGH_TIME_OUT ,Clock high time out period or the parameter T HIGH" line.long 0x08 "STBR,Slave Transmit Buffer Register" hexmask.long.byte 0x08 0.--7. 1. " SLAVE_TRANSMIT_BUFFER ,Slave transmit buffer" line.long 0x0C "SRBR,Slave Receive Buffer Register" hexmask.long.byte 0x0C 0.--7. 1. " SLAVE_RECEIVE_BUFFER ,Slave receive buffer" line.long 0x10 "MTBR,Master Transmit Buffer Register" hexmask.long.byte 0x10 0.--7. 1. " MASTER_TRANSMIT_BUFFER ,Master transmit buffer" line.long 0x14 "MRBR,Master Receive Buffer Register" hexmask.long.byte 0x14 0.--7. 1. " MASTER_RECEIVE_BUFFER ,Master receive buffer" group.long 0x60++0x07 line.long 0x00 "WSR,Wake Status Register" eventfld.long 0x00 0. " START_BIT_DETECTION ,Set to 1 when a START bit is detected while the controller is enabled" "Disabled,Enabled" line.long 0x04 "WER,Wake Enable Register" bitfld.long 0x04 0. " START_DETECT_INT_EN ,Enable start bit detection interrupt" "Disabled,Enabled" width 0x0B tree.end tree "Instance 1" base ad:0x40004400 width 9. wgroup.long 0x00++0x03 line.long 0x00 "CR,Control Register" bitfld.long 0x00 7. " PIN ,Pending interrupt" "No effect,De-asserts" bitfld.long 0x00 6. " ESO ,Enable Serial Output bit enables and disables the serial data output" "Disabled,Enabled" bitfld.long 0x00 3. " ENI ,Enable interrupt bit" "Disabled,Enabled" newline bitfld.long 0x00 2. " STA ,Transmit START" "Not started,Stared" bitfld.long 0x00 1. " STO ,Transmit STOP" "Not stopped,Stopped" bitfld.long 0x00 0. " ACK ,Acknowledge" "De-asserted,Asserted" if (((per.l(ad:0x40004400+0x00)&0x84)==0x00)) group.long 0x00++0x03 line.long 0x00 "SR,Status Register" bitfld.long 0x00 7. " PIN ,Pending interrupt" "Asserted,De-asserted" bitfld.long 0x00 6. " SAD ,SMBus address decoded" "0,1" bitfld.long 0x00 5. " STS ,Sets when externally generated STOP condition is detected" "Not Asserted,Asserted" newline bitfld.long 0x00 4. " BER ,Bus error" "Not asserted,Asserted" bitfld.long 0x00 3. " LRB/AD0 ,Slave acknowledgment" "No ACK,ACK" bitfld.long 0x00 2. " AAS ,Addressed as slave" "Not asserted,Asserted" newline bitfld.long 0x00 1. " LAB ,Lost arbitration" "Not lost,Lost" bitfld.long 0x00 0. " NBB ,Indicates when the bus is in use" "Busy,Not busy" elif (((per.l(ad:0x40004400+0x00)&0x84)==0x04)) group.long 0x00++0x03 line.long 0x00 "SR,Status Register" bitfld.long 0x00 7. " PIN ,Pending interrupt" "Asserted,De-asserted" bitfld.long 0x00 6. " SAD ,SMBus address decoded" "0,1" bitfld.long 0x00 5. " STS ,Sets when externally generated STOP condition is detected" "Not Asserted,Asserted" newline bitfld.long 0x00 4. " BER ,Bus error" "Not asserted,Asserted" bitfld.long 0x00 3. " LRB/AD0 ,Holds the value of the last received bit over the bus" "Address matches,Genera call" bitfld.long 0x00 2. " AAS ,Addressed as slave" "Not asserted,Asserted" newline bitfld.long 0x00 1. " LAB ,Lost arbitration" "Not lost,Lost" bitfld.long 0x00 0. " NBB ,Indicates when the bus is in use" "Busy,Not busy" else group.long 0x00++0x03 line.long 0x00 "SR,Status Register" bitfld.long 0x00 7. " PIN ,Pending interrupt" "Asserted,De-asserts" bitfld.long 0x00 6. " SAD ,SMBus address decoded" "0,1" bitfld.long 0x00 5. " STS ,Sets when externally generated STOP condition is detected" "Not Asserted,Asserted" newline bitfld.long 0x00 4. " BER ,Bus error" "Not asserted,Asserted" bitfld.long 0x00 1. " LAB ,Lost arbitration" "Not lost,Lost" bitfld.long 0x00 0. " NBB ,Indicates when the bus is in use" "Busy,Not busy" endif group.long 0x04++0x0B line.long 0x00 "OAR,Own Address Register" hexmask.long.byte 0x00 8.--14. 0x01 " OWN_ADDRESS_2 ,Configures one of the two addresses to which the controller will respond when addressed as a slave" hexmask.long.byte 0x00 0.--6. 0x01 " OWN_ADDRESS_1 ,Configures one of the two addresses to which the controller will respond when addressed as a slave" line.long 0x04 "DR,Data Register" hexmask.long.byte 0x04 0.--7. 1. " DATA ,Holds the data that are either shifted out to or shifted in from the I2C port" line.long 0x08 "MCR,Master Command Register" hexmask.long.byte 0x08 24.--31. 1. " READ_COUNT ,Count of the number of bytes to read in from the I2C port to the master receive buffer register" hexmask.long.byte 0x08 16.--23. 1. " WRITE_COUNT ,Count of the number of bytes to transmit to the I2C/SMBus port from the master transmit buffer register" bitfld.long 0x08 13. " READ_PEC ,Enables the controller to read a PEC returned from an external device after it has read an M-byte block" "Disabled,Enabled" newline bitfld.long 0x08 12. " READM ,Replacing READ_COUNT by the byte when READ_COUNT is 1" "Not replaced,Replaced" bitfld.long 0x08 11. " PEC_TERM ,PEC register data transmission" "0,1" bitfld.long 0x08 10. " STOP ,Sends a stop bit after the transaction completes" "Not sent,Sent" newline bitfld.long 0x08 9. " STARTN ,Sends a start bit before the last byte of the WRITE_COUNT data is sent" "Not sent,Sent" bitfld.long 0x08 8. " START0 ,Send a start bit before the first byte of the WRITE_COUNT data is sent" "Not sent,Sent" bitfld.long 0x08 1. " MPROCEED ,In order to start a master I2C/SMB transaction" "0,1" newline bitfld.long 0x08 0. " MRUN ,In order to start a Master I2C/SMB transaction" "0,1" group.long 0x10++0x0B line.long 0x00 "SCR,Slave Command Register" hexmask.long.byte 0x00 16.--23. 1. " SLAVE_READCOUNT ,Decremented each time a byte is copied from the DATA register to the slave receive buffer register" hexmask.long.byte 0x00 8.--15. 1. " SLAVE_WRITECOUNT ,Set to the number of bytes software expects to send to the Master" bitfld.long 0x00 2. " SLAVE_PEC ,If Setted and SLAVE_WRITE_COUNT is 0 then PEC register is copied to the DATA register" "0,1" newline bitfld.long 0x00 1. " SPROCEED ,In order to start a slave I2C/SMB transaction" "0,1" bitfld.long 0x00 0. " SRUN ,In order to enable a slave I2C/SMB transaction" "Not occurred,Occurred" line.long 0x04 "PECR,PEC Register" hexmask.long.byte 0x04 0.--7. 1. " PEC ,SMBus packet error check" line.long 0x08 "RSHTR,Repeated Start Hold Time Register" hexmask.long.byte 0x08 0.--7. 1. " RPT_START_HOLD_TIME ,Used to hold the clock until the hold time for the repeated start bit has been satisfied" group.long 0x20++0x0B line.long 0x00 "CR,Completion Register" eventfld.long 0x00 31. " SDONE ,Slave done" "Not completed,Completed" eventfld.long 0x00 30. " MDONE ,Complete master transmission state" "Not completed,Completed" eventfld.long 0x00 29. " IDLE ,Bus status" "0,1" newline rbitfld.long 0x00 25. " MTR ,Master transmit/receive" "Receive phase,Transmit phase" eventfld.long 0x00 24. " MNAKX ,Master received a NACK while transmitting" "No NACK,NACK" eventfld.long 0x00 21. " REPEAT_WRITE ,Repeat start write status" "No repeat,Repeat" newline eventfld.long 0x00 20. " REPEAT_READ ,Repeat start read status" "No repeat,Repeat" eventfld.long 0x00 19. " SPROT ,Slave protocol error in write count" "No error,Error" newline eventfld.long 0x00 17. " STR ,Slave transmit/receive" "Transmit phase,Receive phase" eventfld.long 0x00 16. " SNAKR ,Slave NACK sent while receiving" "Not sent,Sent" eventfld.long 0x00 14. " LAB ,Lost arbitration status" "0,1" newline eventfld.long 0x00 13. " BER ,Bus Error Status" "0,1" eventfld.long 0x00 12. " CHDH ,Clock high data high time-out status" "Not occurred,Occurred" eventfld.long 0x00 11. " CHDL ,Clock high data low time-out status" "Not occurred,Occurred" newline eventfld.long 0x00 10. " SCTO ,Slave Cumulative Time-Out status" "Not occurred,Occurred" eventfld.long 0x00 9. " MCTO ,Master cumulative time-out status" "Not occurred,Occurred" eventfld.long 0x00 8. " DTO ,Device Time-Out status" "Not occurred,Occurred" newline rbitfld.long 0x00 6. " TIMERR ,Time Out Error Detected" "0,1" bitfld.long 0x00 5. " BIDEN ,Enables bus idle time-out checking" "Disabled,Enabled" bitfld.long 0x00 4. " SCEN ,Enables slave cumulative time-out checking" "Disabled,Enabled" newline bitfld.long 0x00 3. " MCEN ,Enables Master Cumulative Time-Out checking" "Disabled,Enabled" bitfld.long 0x00 2. " DTEN ,Enables Device Time-Out checking" "Disabled,Enabled" line.long 0x04 "ISR,Idle Scaling Register" hexmask.long.word 0x04 16.--27. 1. " FAIR_IDLE_DELAY ,Establishes the MCTP T IDLE_DELAY period" hexmask.long.word 0x04 0.--11. 1. " FAIR_BUS_IDLE_MIN ,Bus idle period should be programmed to the T IDLE_WINDOW time" line.long 0x08 "CONFIGR,Configuration Register" bitfld.long 0x08 31. " ENSI ,Enable slave done interrupt" "Disabled,Enabled" bitfld.long 0x08 30. " ENMI ,Enable master done interrupt" "Disabled,Enabled" bitfld.long 0x08 29. " ENIDI ,Enable idle interrupt" "Disabled,Enabled" newline bitfld.long 0x08 28. " ENABLE_AAS ,Enable for the addressed as slave interrupt" "Disabled,Enabled" bitfld.long 0x08 19. " FLUSH_MRBUF ,Clears the master receive buffer register and marks it empty" "No effect,Cleared" bitfld.long 0x08 18. " FLUSH_MXBUF ,Clears the master transmit buffer register and marks it empty" "No effect,Cleared" newline bitfld.long 0x08 17. " FLUSH_SRBUF ,Clears the Slave Receive Buffer Register and marks it empty" "No effect,Cleared" bitfld.long 0x08 16. " FLUSH_SXBUF ,C the slave transmit buffer register and marks it empty" "No effect,Cleared" bitfld.long 0x08 14. " GC_DIS ,General Call disable" "Disabled,Enabled" newline bitfld.long 0x08 12. " FAIR ,General Call disable" "Disabled,Enabled" bitfld.long 0x08 11. " DSA ,Decode SMBus address" "Only slave addresses in Own Address Register,Multiple slave addresses" bitfld.long 0x08 10. " ENAB ,I2C/SMBus controller enable" "Disabled,Enabled" newline bitfld.long 0x08 9. " RESET ,Initialize to the power-on default state" "No reset,Reset" bitfld.long 0x08 8. " FEN ,Input filtering enable" "Disabled,Enabled" bitfld.long 0x08 7. " PCEN ,PEC enable bit" "Disabled,Enabled" newline bitfld.long 0x08 5. " SLOW_CLOCK ,Period for the bus clock register" "No effect,Multiplied by 4" bitfld.long 0x08 4. " TCEN ,Timing check enable" "Disabled,Enabled" bitfld.long 0x08 0.--3. " PORT_SEL ,Selects which of the 16 possible bus ports is the currently active I2C/SMBus port" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" if (((per.l(ad:0x40004400+0x00)&0x40)==0x40)) group.long 0x2C++0x03 line.long 0x00 "BCR,Bus Clock Register" hexmask.long.word 0x00 0.--8. 1. " HIGH_PERIOD ,Number of I2C_BAUD_CLOCK periods" hexmask.long.byte 0x00 0.--7. 1. " LOW_PERIOD ,Number of I2C_BAUD_CLOCK periods" else rgroup.long 0x2C++0x03 line.long 0x00 "BCR,Bus Clock Register" hexmask.long.word 0x00 0.--8. 1. " HIGH_PERIOD ,Number of I2C_BAUD_CLOCK periods" hexmask.long.byte 0x00 0.--7. 1. " LOW_PERIOD ,Number of I2C_BAUD_CLOCK periods" endif rgroup.long 0x30++0x07 line.long 0x00 "BIDR,Block ID Register" hexmask.long.byte 0x00 0.--7. 1. " ID ,Block ID" line.long 0x04 "RR,Revision Register" hexmask.long.byte 0x04 0.--7. 1. " REVISION ,Block revision number" group.long 0x38++0x03 line.long 0x00 "B-BCR,BIT-BANG Control Register" rbitfld.long 0x00 6. " BBDATI ,Bit-Bang data in" "0,1" rbitfld.long 0x00 5. " BBCLKI ,Bit-Bang clock In" "0,1" newline bitfld.long 0x00 4. " BBDAT ,Bit-Bang mode data state" "Driven low/tri-stated,Tri-stated" bitfld.long 0x00 3. " BBCLK ,Bit-Bang mode clock state" "Driven low/tri-stated,Tri-stated" bitfld.long 0x00 2. " DADIR ,Bit-Bang mode data direction" "Input,Output" newline bitfld.long 0x00 1. " CLDIR ,Bit-Bang mode clock direction" "Input,Output" bitfld.long 0x00 0. " BBEN ,Bit-Bang mode enable" "Disabled,Enabled" group.long 0x40++0x17 line.long 0x00 "DTR,Data Timing Register" hexmask.long.byte 0x00 24.--31. 1. " FIRST_START_HOLD ,Determines the SCL hold time following SDA driven low during the first START bit in a transfer" hexmask.long.byte 0x00 16.--23. 1. " STOP_SETUP ,Determines the SDA setup time from the rising edge of SCL for a repeated START condition" hexmask.long.byte 0x00 8.--15. 1. " RESTART_SETUP ,Determines the SDA setup time from the rising edge of SCL for a repeated START condition" newline hexmask.long.byte 0x00 0.--7. 1. " DATA_HOLD ,Determines the SDA hold time following SCL driven low" line.long 0x04 "TSR,TIME-OUT Scaling Register" hexmask.long.byte 0x04 24.--31. 1. " BUS_IDLE_MIN ,Determines the minimum bus idle time" hexmask.long.byte 0x04 16.--23. 1. " MASTER_CUM_TIME_OUT ,Determines the master cumulative time-out duration or the parameter T LOW:MEXT" hexmask.long.byte 0x04 8.--15. 1. " SLAVE_CUM_TIME_OUT ,Determines the Slave Cumulative Time-Out Duration or the parameter T LOW:SEXT" newline hexmask.long.byte 0x04 0.--7. 1. " CLOCK_HIGH_TIME_OUT ,Clock high time out period or the parameter T HIGH" line.long 0x08 "STBR,Slave Transmit Buffer Register" hexmask.long.byte 0x08 0.--7. 1. " SLAVE_TRANSMIT_BUFFER ,Slave transmit buffer" line.long 0x0C "SRBR,Slave Receive Buffer Register" hexmask.long.byte 0x0C 0.--7. 1. " SLAVE_RECEIVE_BUFFER ,Slave receive buffer" line.long 0x10 "MTBR,Master Transmit Buffer Register" hexmask.long.byte 0x10 0.--7. 1. " MASTER_TRANSMIT_BUFFER ,Master transmit buffer" line.long 0x14 "MRBR,Master Receive Buffer Register" hexmask.long.byte 0x14 0.--7. 1. " MASTER_RECEIVE_BUFFER ,Master receive buffer" group.long 0x60++0x07 line.long 0x00 "WSR,Wake Status Register" eventfld.long 0x00 0. " START_BIT_DETECTION ,Set to 1 when a START bit is detected while the controller is enabled" "Disabled,Enabled" line.long 0x04 "WER,Wake Enable Register" bitfld.long 0x04 0. " START_DETECT_INT_EN ,Enable start bit detection interrupt" "Disabled,Enabled" width 0x0B tree.end tree "Instance 2" base ad:0x40004800 width 9. wgroup.long 0x00++0x03 line.long 0x00 "CR,Control Register" bitfld.long 0x00 7. " PIN ,Pending interrupt" "No effect,De-asserts" bitfld.long 0x00 6. " ESO ,Enable Serial Output bit enables and disables the serial data output" "Disabled,Enabled" bitfld.long 0x00 3. " ENI ,Enable interrupt bit" "Disabled,Enabled" newline bitfld.long 0x00 2. " STA ,Transmit START" "Not started,Stared" bitfld.long 0x00 1. " STO ,Transmit STOP" "Not stopped,Stopped" bitfld.long 0x00 0. " ACK ,Acknowledge" "De-asserted,Asserted" if (((per.l(ad:0x40004800+0x00)&0x84)==0x00)) group.long 0x00++0x03 line.long 0x00 "SR,Status Register" bitfld.long 0x00 7. " PIN ,Pending interrupt" "Asserted,De-asserted" bitfld.long 0x00 6. " SAD ,SMBus address decoded" "0,1" bitfld.long 0x00 5. " STS ,Sets when externally generated STOP condition is detected" "Not Asserted,Asserted" newline bitfld.long 0x00 4. " BER ,Bus error" "Not asserted,Asserted" bitfld.long 0x00 3. " LRB/AD0 ,Slave acknowledgment" "No ACK,ACK" bitfld.long 0x00 2. " AAS ,Addressed as slave" "Not asserted,Asserted" newline bitfld.long 0x00 1. " LAB ,Lost arbitration" "Not lost,Lost" bitfld.long 0x00 0. " NBB ,Indicates when the bus is in use" "Busy,Not busy" elif (((per.l(ad:0x40004800+0x00)&0x84)==0x04)) group.long 0x00++0x03 line.long 0x00 "SR,Status Register" bitfld.long 0x00 7. " PIN ,Pending interrupt" "Asserted,De-asserted" bitfld.long 0x00 6. " SAD ,SMBus address decoded" "0,1" bitfld.long 0x00 5. " STS ,Sets when externally generated STOP condition is detected" "Not Asserted,Asserted" newline bitfld.long 0x00 4. " BER ,Bus error" "Not asserted,Asserted" bitfld.long 0x00 3. " LRB/AD0 ,Holds the value of the last received bit over the bus" "Address matches,Genera call" bitfld.long 0x00 2. " AAS ,Addressed as slave" "Not asserted,Asserted" newline bitfld.long 0x00 1. " LAB ,Lost arbitration" "Not lost,Lost" bitfld.long 0x00 0. " NBB ,Indicates when the bus is in use" "Busy,Not busy" else group.long 0x00++0x03 line.long 0x00 "SR,Status Register" bitfld.long 0x00 7. " PIN ,Pending interrupt" "Asserted,De-asserts" bitfld.long 0x00 6. " SAD ,SMBus address decoded" "0,1" bitfld.long 0x00 5. " STS ,Sets when externally generated STOP condition is detected" "Not Asserted,Asserted" newline bitfld.long 0x00 4. " BER ,Bus error" "Not asserted,Asserted" bitfld.long 0x00 1. " LAB ,Lost arbitration" "Not lost,Lost" bitfld.long 0x00 0. " NBB ,Indicates when the bus is in use" "Busy,Not busy" endif group.long 0x04++0x0B line.long 0x00 "OAR,Own Address Register" hexmask.long.byte 0x00 8.--14. 0x01 " OWN_ADDRESS_2 ,Configures one of the two addresses to which the controller will respond when addressed as a slave" hexmask.long.byte 0x00 0.--6. 0x01 " OWN_ADDRESS_1 ,Configures one of the two addresses to which the controller will respond when addressed as a slave" line.long 0x04 "DR,Data Register" hexmask.long.byte 0x04 0.--7. 1. " DATA ,Holds the data that are either shifted out to or shifted in from the I2C port" line.long 0x08 "MCR,Master Command Register" hexmask.long.byte 0x08 24.--31. 1. " READ_COUNT ,Count of the number of bytes to read in from the I2C port to the master receive buffer register" hexmask.long.byte 0x08 16.--23. 1. " WRITE_COUNT ,Count of the number of bytes to transmit to the I2C/SMBus port from the master transmit buffer register" bitfld.long 0x08 13. " READ_PEC ,Enables the controller to read a PEC returned from an external device after it has read an M-byte block" "Disabled,Enabled" newline bitfld.long 0x08 12. " READM ,Replacing READ_COUNT by the byte when READ_COUNT is 1" "Not replaced,Replaced" bitfld.long 0x08 11. " PEC_TERM ,PEC register data transmission" "0,1" bitfld.long 0x08 10. " STOP ,Sends a stop bit after the transaction completes" "Not sent,Sent" newline bitfld.long 0x08 9. " STARTN ,Sends a start bit before the last byte of the WRITE_COUNT data is sent" "Not sent,Sent" bitfld.long 0x08 8. " START0 ,Send a start bit before the first byte of the WRITE_COUNT data is sent" "Not sent,Sent" bitfld.long 0x08 1. " MPROCEED ,In order to start a master I2C/SMB transaction" "0,1" newline bitfld.long 0x08 0. " MRUN ,In order to start a Master I2C/SMB transaction" "0,1" group.long 0x10++0x0B line.long 0x00 "SCR,Slave Command Register" hexmask.long.byte 0x00 16.--23. 1. " SLAVE_READCOUNT ,Decremented each time a byte is copied from the DATA register to the slave receive buffer register" hexmask.long.byte 0x00 8.--15. 1. " SLAVE_WRITECOUNT ,Set to the number of bytes software expects to send to the Master" bitfld.long 0x00 2. " SLAVE_PEC ,If Setted and SLAVE_WRITE_COUNT is 0 then PEC register is copied to the DATA register" "0,1" newline bitfld.long 0x00 1. " SPROCEED ,In order to start a slave I2C/SMB transaction" "0,1" bitfld.long 0x00 0. " SRUN ,In order to enable a slave I2C/SMB transaction" "Not occurred,Occurred" line.long 0x04 "PECR,PEC Register" hexmask.long.byte 0x04 0.--7. 1. " PEC ,SMBus packet error check" line.long 0x08 "RSHTR,Repeated Start Hold Time Register" hexmask.long.byte 0x08 0.--7. 1. " RPT_START_HOLD_TIME ,Used to hold the clock until the hold time for the repeated start bit has been satisfied" group.long 0x20++0x0B line.long 0x00 "CR,Completion Register" eventfld.long 0x00 31. " SDONE ,Slave done" "Not completed,Completed" eventfld.long 0x00 30. " MDONE ,Complete master transmission state" "Not completed,Completed" eventfld.long 0x00 29. " IDLE ,Bus status" "0,1" newline rbitfld.long 0x00 25. " MTR ,Master transmit/receive" "Receive phase,Transmit phase" eventfld.long 0x00 24. " MNAKX ,Master received a NACK while transmitting" "No NACK,NACK" eventfld.long 0x00 21. " REPEAT_WRITE ,Repeat start write status" "No repeat,Repeat" newline eventfld.long 0x00 20. " REPEAT_READ ,Repeat start read status" "No repeat,Repeat" eventfld.long 0x00 19. " SPROT ,Slave protocol error in write count" "No error,Error" newline eventfld.long 0x00 17. " STR ,Slave transmit/receive" "Transmit phase,Receive phase" eventfld.long 0x00 16. " SNAKR ,Slave NACK sent while receiving" "Not sent,Sent" eventfld.long 0x00 14. " LAB ,Lost arbitration status" "0,1" newline eventfld.long 0x00 13. " BER ,Bus Error Status" "0,1" eventfld.long 0x00 12. " CHDH ,Clock high data high time-out status" "Not occurred,Occurred" eventfld.long 0x00 11. " CHDL ,Clock high data low time-out status" "Not occurred,Occurred" newline eventfld.long 0x00 10. " SCTO ,Slave Cumulative Time-Out status" "Not occurred,Occurred" eventfld.long 0x00 9. " MCTO ,Master cumulative time-out status" "Not occurred,Occurred" eventfld.long 0x00 8. " DTO ,Device Time-Out status" "Not occurred,Occurred" newline rbitfld.long 0x00 6. " TIMERR ,Time Out Error Detected" "0,1" bitfld.long 0x00 5. " BIDEN ,Enables bus idle time-out checking" "Disabled,Enabled" bitfld.long 0x00 4. " SCEN ,Enables slave cumulative time-out checking" "Disabled,Enabled" newline bitfld.long 0x00 3. " MCEN ,Enables Master Cumulative Time-Out checking" "Disabled,Enabled" bitfld.long 0x00 2. " DTEN ,Enables Device Time-Out checking" "Disabled,Enabled" line.long 0x04 "ISR,Idle Scaling Register" hexmask.long.word 0x04 16.--27. 1. " FAIR_IDLE_DELAY ,Establishes the MCTP T IDLE_DELAY period" hexmask.long.word 0x04 0.--11. 1. " FAIR_BUS_IDLE_MIN ,Bus idle period should be programmed to the T IDLE_WINDOW time" line.long 0x08 "CONFIGR,Configuration Register" bitfld.long 0x08 31. " ENSI ,Enable slave done interrupt" "Disabled,Enabled" bitfld.long 0x08 30. " ENMI ,Enable master done interrupt" "Disabled,Enabled" bitfld.long 0x08 29. " ENIDI ,Enable idle interrupt" "Disabled,Enabled" newline bitfld.long 0x08 28. " ENABLE_AAS ,Enable for the addressed as slave interrupt" "Disabled,Enabled" bitfld.long 0x08 19. " FLUSH_MRBUF ,Clears the master receive buffer register and marks it empty" "No effect,Cleared" bitfld.long 0x08 18. " FLUSH_MXBUF ,Clears the master transmit buffer register and marks it empty" "No effect,Cleared" newline bitfld.long 0x08 17. " FLUSH_SRBUF ,Clears the Slave Receive Buffer Register and marks it empty" "No effect,Cleared" bitfld.long 0x08 16. " FLUSH_SXBUF ,C the slave transmit buffer register and marks it empty" "No effect,Cleared" bitfld.long 0x08 14. " GC_DIS ,General Call disable" "Disabled,Enabled" newline bitfld.long 0x08 12. " FAIR ,General Call disable" "Disabled,Enabled" bitfld.long 0x08 11. " DSA ,Decode SMBus address" "Only slave addresses in Own Address Register,Multiple slave addresses" bitfld.long 0x08 10. " ENAB ,I2C/SMBus controller enable" "Disabled,Enabled" newline bitfld.long 0x08 9. " RESET ,Initialize to the power-on default state" "No reset,Reset" bitfld.long 0x08 8. " FEN ,Input filtering enable" "Disabled,Enabled" bitfld.long 0x08 7. " PCEN ,PEC enable bit" "Disabled,Enabled" newline bitfld.long 0x08 5. " SLOW_CLOCK ,Period for the bus clock register" "No effect,Multiplied by 4" bitfld.long 0x08 4. " TCEN ,Timing check enable" "Disabled,Enabled" bitfld.long 0x08 0.--3. " PORT_SEL ,Selects which of the 16 possible bus ports is the currently active I2C/SMBus port" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" if (((per.l(ad:0x40004800+0x00)&0x40)==0x40)) group.long 0x2C++0x03 line.long 0x00 "BCR,Bus Clock Register" hexmask.long.word 0x00 0.--8. 1. " HIGH_PERIOD ,Number of I2C_BAUD_CLOCK periods" hexmask.long.byte 0x00 0.--7. 1. " LOW_PERIOD ,Number of I2C_BAUD_CLOCK periods" else rgroup.long 0x2C++0x03 line.long 0x00 "BCR,Bus Clock Register" hexmask.long.word 0x00 0.--8. 1. " HIGH_PERIOD ,Number of I2C_BAUD_CLOCK periods" hexmask.long.byte 0x00 0.--7. 1. " LOW_PERIOD ,Number of I2C_BAUD_CLOCK periods" endif rgroup.long 0x30++0x07 line.long 0x00 "BIDR,Block ID Register" hexmask.long.byte 0x00 0.--7. 1. " ID ,Block ID" line.long 0x04 "RR,Revision Register" hexmask.long.byte 0x04 0.--7. 1. " REVISION ,Block revision number" group.long 0x38++0x03 line.long 0x00 "B-BCR,BIT-BANG Control Register" rbitfld.long 0x00 6. " BBDATI ,Bit-Bang data in" "0,1" rbitfld.long 0x00 5. " BBCLKI ,Bit-Bang clock In" "0,1" newline bitfld.long 0x00 4. " BBDAT ,Bit-Bang mode data state" "Driven low/tri-stated,Tri-stated" bitfld.long 0x00 3. " BBCLK ,Bit-Bang mode clock state" "Driven low/tri-stated,Tri-stated" bitfld.long 0x00 2. " DADIR ,Bit-Bang mode data direction" "Input,Output" newline bitfld.long 0x00 1. " CLDIR ,Bit-Bang mode clock direction" "Input,Output" bitfld.long 0x00 0. " BBEN ,Bit-Bang mode enable" "Disabled,Enabled" group.long 0x40++0x17 line.long 0x00 "DTR,Data Timing Register" hexmask.long.byte 0x00 24.--31. 1. " FIRST_START_HOLD ,Determines the SCL hold time following SDA driven low during the first START bit in a transfer" hexmask.long.byte 0x00 16.--23. 1. " STOP_SETUP ,Determines the SDA setup time from the rising edge of SCL for a repeated START condition" hexmask.long.byte 0x00 8.--15. 1. " RESTART_SETUP ,Determines the SDA setup time from the rising edge of SCL for a repeated START condition" newline hexmask.long.byte 0x00 0.--7. 1. " DATA_HOLD ,Determines the SDA hold time following SCL driven low" line.long 0x04 "TSR,TIME-OUT Scaling Register" hexmask.long.byte 0x04 24.--31. 1. " BUS_IDLE_MIN ,Determines the minimum bus idle time" hexmask.long.byte 0x04 16.--23. 1. " MASTER_CUM_TIME_OUT ,Determines the master cumulative time-out duration or the parameter T LOW:MEXT" hexmask.long.byte 0x04 8.--15. 1. " SLAVE_CUM_TIME_OUT ,Determines the Slave Cumulative Time-Out Duration or the parameter T LOW:SEXT" newline hexmask.long.byte 0x04 0.--7. 1. " CLOCK_HIGH_TIME_OUT ,Clock high time out period or the parameter T HIGH" line.long 0x08 "STBR,Slave Transmit Buffer Register" hexmask.long.byte 0x08 0.--7. 1. " SLAVE_TRANSMIT_BUFFER ,Slave transmit buffer" line.long 0x0C "SRBR,Slave Receive Buffer Register" hexmask.long.byte 0x0C 0.--7. 1. " SLAVE_RECEIVE_BUFFER ,Slave receive buffer" line.long 0x10 "MTBR,Master Transmit Buffer Register" hexmask.long.byte 0x10 0.--7. 1. " MASTER_TRANSMIT_BUFFER ,Master transmit buffer" line.long 0x14 "MRBR,Master Receive Buffer Register" hexmask.long.byte 0x14 0.--7. 1. " MASTER_RECEIVE_BUFFER ,Master receive buffer" group.long 0x60++0x07 line.long 0x00 "WSR,Wake Status Register" eventfld.long 0x00 0. " START_BIT_DETECTION ,Set to 1 when a START bit is detected while the controller is enabled" "Disabled,Enabled" line.long 0x04 "WER,Wake Enable Register" bitfld.long 0x04 0. " START_DETECT_INT_EN ,Enable start bit detection interrupt" "Disabled,Enabled" width 0x0B tree.end tree "Instance 3" base ad:0x40004C00 width 9. wgroup.long 0x00++0x03 line.long 0x00 "CR,Control Register" bitfld.long 0x00 7. " PIN ,Pending interrupt" "No effect,De-asserts" bitfld.long 0x00 6. " ESO ,Enable Serial Output bit enables and disables the serial data output" "Disabled,Enabled" bitfld.long 0x00 3. " ENI ,Enable interrupt bit" "Disabled,Enabled" newline bitfld.long 0x00 2. " STA ,Transmit START" "Not started,Stared" bitfld.long 0x00 1. " STO ,Transmit STOP" "Not stopped,Stopped" bitfld.long 0x00 0. " ACK ,Acknowledge" "De-asserted,Asserted" if (((per.l(ad:0x40004C00+0x00)&0x84)==0x00)) group.long 0x00++0x03 line.long 0x00 "SR,Status Register" bitfld.long 0x00 7. " PIN ,Pending interrupt" "Asserted,De-asserted" bitfld.long 0x00 6. " SAD ,SMBus address decoded" "0,1" bitfld.long 0x00 5. " STS ,Sets when externally generated STOP condition is detected" "Not Asserted,Asserted" newline bitfld.long 0x00 4. " BER ,Bus error" "Not asserted,Asserted" bitfld.long 0x00 3. " LRB/AD0 ,Slave acknowledgment" "No ACK,ACK" bitfld.long 0x00 2. " AAS ,Addressed as slave" "Not asserted,Asserted" newline bitfld.long 0x00 1. " LAB ,Lost arbitration" "Not lost,Lost" bitfld.long 0x00 0. " NBB ,Indicates when the bus is in use" "Busy,Not busy" elif (((per.l(ad:0x40004C00+0x00)&0x84)==0x04)) group.long 0x00++0x03 line.long 0x00 "SR,Status Register" bitfld.long 0x00 7. " PIN ,Pending interrupt" "Asserted,De-asserted" bitfld.long 0x00 6. " SAD ,SMBus address decoded" "0,1" bitfld.long 0x00 5. " STS ,Sets when externally generated STOP condition is detected" "Not Asserted,Asserted" newline bitfld.long 0x00 4. " BER ,Bus error" "Not asserted,Asserted" bitfld.long 0x00 3. " LRB/AD0 ,Holds the value of the last received bit over the bus" "Address matches,Genera call" bitfld.long 0x00 2. " AAS ,Addressed as slave" "Not asserted,Asserted" newline bitfld.long 0x00 1. " LAB ,Lost arbitration" "Not lost,Lost" bitfld.long 0x00 0. " NBB ,Indicates when the bus is in use" "Busy,Not busy" else group.long 0x00++0x03 line.long 0x00 "SR,Status Register" bitfld.long 0x00 7. " PIN ,Pending interrupt" "Asserted,De-asserts" bitfld.long 0x00 6. " SAD ,SMBus address decoded" "0,1" bitfld.long 0x00 5. " STS ,Sets when externally generated STOP condition is detected" "Not Asserted,Asserted" newline bitfld.long 0x00 4. " BER ,Bus error" "Not asserted,Asserted" bitfld.long 0x00 1. " LAB ,Lost arbitration" "Not lost,Lost" bitfld.long 0x00 0. " NBB ,Indicates when the bus is in use" "Busy,Not busy" endif group.long 0x04++0x0B line.long 0x00 "OAR,Own Address Register" hexmask.long.byte 0x00 8.--14. 0x01 " OWN_ADDRESS_2 ,Configures one of the two addresses to which the controller will respond when addressed as a slave" hexmask.long.byte 0x00 0.--6. 0x01 " OWN_ADDRESS_1 ,Configures one of the two addresses to which the controller will respond when addressed as a slave" line.long 0x04 "DR,Data Register" hexmask.long.byte 0x04 0.--7. 1. " DATA ,Holds the data that are either shifted out to or shifted in from the I2C port" line.long 0x08 "MCR,Master Command Register" hexmask.long.byte 0x08 24.--31. 1. " READ_COUNT ,Count of the number of bytes to read in from the I2C port to the master receive buffer register" hexmask.long.byte 0x08 16.--23. 1. " WRITE_COUNT ,Count of the number of bytes to transmit to the I2C/SMBus port from the master transmit buffer register" bitfld.long 0x08 13. " READ_PEC ,Enables the controller to read a PEC returned from an external device after it has read an M-byte block" "Disabled,Enabled" newline bitfld.long 0x08 12. " READM ,Replacing READ_COUNT by the byte when READ_COUNT is 1" "Not replaced,Replaced" bitfld.long 0x08 11. " PEC_TERM ,PEC register data transmission" "0,1" bitfld.long 0x08 10. " STOP ,Sends a stop bit after the transaction completes" "Not sent,Sent" newline bitfld.long 0x08 9. " STARTN ,Sends a start bit before the last byte of the WRITE_COUNT data is sent" "Not sent,Sent" bitfld.long 0x08 8. " START0 ,Send a start bit before the first byte of the WRITE_COUNT data is sent" "Not sent,Sent" bitfld.long 0x08 1. " MPROCEED ,In order to start a master I2C/SMB transaction" "0,1" newline bitfld.long 0x08 0. " MRUN ,In order to start a Master I2C/SMB transaction" "0,1" group.long 0x10++0x0B line.long 0x00 "SCR,Slave Command Register" hexmask.long.byte 0x00 16.--23. 1. " SLAVE_READCOUNT ,Decremented each time a byte is copied from the DATA register to the slave receive buffer register" hexmask.long.byte 0x00 8.--15. 1. " SLAVE_WRITECOUNT ,Set to the number of bytes software expects to send to the Master" bitfld.long 0x00 2. " SLAVE_PEC ,If Setted and SLAVE_WRITE_COUNT is 0 then PEC register is copied to the DATA register" "0,1" newline bitfld.long 0x00 1. " SPROCEED ,In order to start a slave I2C/SMB transaction" "0,1" bitfld.long 0x00 0. " SRUN ,In order to enable a slave I2C/SMB transaction" "Not occurred,Occurred" line.long 0x04 "PECR,PEC Register" hexmask.long.byte 0x04 0.--7. 1. " PEC ,SMBus packet error check" line.long 0x08 "RSHTR,Repeated Start Hold Time Register" hexmask.long.byte 0x08 0.--7. 1. " RPT_START_HOLD_TIME ,Used to hold the clock until the hold time for the repeated start bit has been satisfied" group.long 0x20++0x0B line.long 0x00 "CR,Completion Register" eventfld.long 0x00 31. " SDONE ,Slave done" "Not completed,Completed" eventfld.long 0x00 30. " MDONE ,Complete master transmission state" "Not completed,Completed" eventfld.long 0x00 29. " IDLE ,Bus status" "0,1" newline rbitfld.long 0x00 25. " MTR ,Master transmit/receive" "Receive phase,Transmit phase" eventfld.long 0x00 24. " MNAKX ,Master received a NACK while transmitting" "No NACK,NACK" eventfld.long 0x00 21. " REPEAT_WRITE ,Repeat start write status" "No repeat,Repeat" newline eventfld.long 0x00 20. " REPEAT_READ ,Repeat start read status" "No repeat,Repeat" eventfld.long 0x00 19. " SPROT ,Slave protocol error in write count" "No error,Error" newline eventfld.long 0x00 17. " STR ,Slave transmit/receive" "Transmit phase,Receive phase" eventfld.long 0x00 16. " SNAKR ,Slave NACK sent while receiving" "Not sent,Sent" eventfld.long 0x00 14. " LAB ,Lost arbitration status" "0,1" newline eventfld.long 0x00 13. " BER ,Bus Error Status" "0,1" eventfld.long 0x00 12. " CHDH ,Clock high data high time-out status" "Not occurred,Occurred" eventfld.long 0x00 11. " CHDL ,Clock high data low time-out status" "Not occurred,Occurred" newline eventfld.long 0x00 10. " SCTO ,Slave Cumulative Time-Out status" "Not occurred,Occurred" eventfld.long 0x00 9. " MCTO ,Master cumulative time-out status" "Not occurred,Occurred" eventfld.long 0x00 8. " DTO ,Device Time-Out status" "Not occurred,Occurred" newline rbitfld.long 0x00 6. " TIMERR ,Time Out Error Detected" "0,1" bitfld.long 0x00 5. " BIDEN ,Enables bus idle time-out checking" "Disabled,Enabled" bitfld.long 0x00 4. " SCEN ,Enables slave cumulative time-out checking" "Disabled,Enabled" newline bitfld.long 0x00 3. " MCEN ,Enables Master Cumulative Time-Out checking" "Disabled,Enabled" bitfld.long 0x00 2. " DTEN ,Enables Device Time-Out checking" "Disabled,Enabled" line.long 0x04 "ISR,Idle Scaling Register" hexmask.long.word 0x04 16.--27. 1. " FAIR_IDLE_DELAY ,Establishes the MCTP T IDLE_DELAY period" hexmask.long.word 0x04 0.--11. 1. " FAIR_BUS_IDLE_MIN ,Bus idle period should be programmed to the T IDLE_WINDOW time" line.long 0x08 "CONFIGR,Configuration Register" bitfld.long 0x08 31. " ENSI ,Enable slave done interrupt" "Disabled,Enabled" bitfld.long 0x08 30. " ENMI ,Enable master done interrupt" "Disabled,Enabled" bitfld.long 0x08 29. " ENIDI ,Enable idle interrupt" "Disabled,Enabled" newline bitfld.long 0x08 28. " ENABLE_AAS ,Enable for the addressed as slave interrupt" "Disabled,Enabled" bitfld.long 0x08 19. " FLUSH_MRBUF ,Clears the master receive buffer register and marks it empty" "No effect,Cleared" bitfld.long 0x08 18. " FLUSH_MXBUF ,Clears the master transmit buffer register and marks it empty" "No effect,Cleared" newline bitfld.long 0x08 17. " FLUSH_SRBUF ,Clears the Slave Receive Buffer Register and marks it empty" "No effect,Cleared" bitfld.long 0x08 16. " FLUSH_SXBUF ,C the slave transmit buffer register and marks it empty" "No effect,Cleared" bitfld.long 0x08 14. " GC_DIS ,General Call disable" "Disabled,Enabled" newline bitfld.long 0x08 12. " FAIR ,General Call disable" "Disabled,Enabled" bitfld.long 0x08 11. " DSA ,Decode SMBus address" "Only slave addresses in Own Address Register,Multiple slave addresses" bitfld.long 0x08 10. " ENAB ,I2C/SMBus controller enable" "Disabled,Enabled" newline bitfld.long 0x08 9. " RESET ,Initialize to the power-on default state" "No reset,Reset" bitfld.long 0x08 8. " FEN ,Input filtering enable" "Disabled,Enabled" bitfld.long 0x08 7. " PCEN ,PEC enable bit" "Disabled,Enabled" newline bitfld.long 0x08 5. " SLOW_CLOCK ,Period for the bus clock register" "No effect,Multiplied by 4" bitfld.long 0x08 4. " TCEN ,Timing check enable" "Disabled,Enabled" bitfld.long 0x08 0.--3. " PORT_SEL ,Selects which of the 16 possible bus ports is the currently active I2C/SMBus port" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" if (((per.l(ad:0x40004C00+0x00)&0x40)==0x40)) group.long 0x2C++0x03 line.long 0x00 "BCR,Bus Clock Register" hexmask.long.word 0x00 0.--8. 1. " HIGH_PERIOD ,Number of I2C_BAUD_CLOCK periods" hexmask.long.byte 0x00 0.--7. 1. " LOW_PERIOD ,Number of I2C_BAUD_CLOCK periods" else rgroup.long 0x2C++0x03 line.long 0x00 "BCR,Bus Clock Register" hexmask.long.word 0x00 0.--8. 1. " HIGH_PERIOD ,Number of I2C_BAUD_CLOCK periods" hexmask.long.byte 0x00 0.--7. 1. " LOW_PERIOD ,Number of I2C_BAUD_CLOCK periods" endif rgroup.long 0x30++0x07 line.long 0x00 "BIDR,Block ID Register" hexmask.long.byte 0x00 0.--7. 1. " ID ,Block ID" line.long 0x04 "RR,Revision Register" hexmask.long.byte 0x04 0.--7. 1. " REVISION ,Block revision number" group.long 0x38++0x03 line.long 0x00 "B-BCR,BIT-BANG Control Register" rbitfld.long 0x00 6. " BBDATI ,Bit-Bang data in" "0,1" rbitfld.long 0x00 5. " BBCLKI ,Bit-Bang clock In" "0,1" newline bitfld.long 0x00 4. " BBDAT ,Bit-Bang mode data state" "Driven low/tri-stated,Tri-stated" bitfld.long 0x00 3. " BBCLK ,Bit-Bang mode clock state" "Driven low/tri-stated,Tri-stated" bitfld.long 0x00 2. " DADIR ,Bit-Bang mode data direction" "Input,Output" newline bitfld.long 0x00 1. " CLDIR ,Bit-Bang mode clock direction" "Input,Output" bitfld.long 0x00 0. " BBEN ,Bit-Bang mode enable" "Disabled,Enabled" group.long 0x40++0x17 line.long 0x00 "DTR,Data Timing Register" hexmask.long.byte 0x00 24.--31. 1. " FIRST_START_HOLD ,Determines the SCL hold time following SDA driven low during the first START bit in a transfer" hexmask.long.byte 0x00 16.--23. 1. " STOP_SETUP ,Determines the SDA setup time from the rising edge of SCL for a repeated START condition" hexmask.long.byte 0x00 8.--15. 1. " RESTART_SETUP ,Determines the SDA setup time from the rising edge of SCL for a repeated START condition" newline hexmask.long.byte 0x00 0.--7. 1. " DATA_HOLD ,Determines the SDA hold time following SCL driven low" line.long 0x04 "TSR,TIME-OUT Scaling Register" hexmask.long.byte 0x04 24.--31. 1. " BUS_IDLE_MIN ,Determines the minimum bus idle time" hexmask.long.byte 0x04 16.--23. 1. " MASTER_CUM_TIME_OUT ,Determines the master cumulative time-out duration or the parameter T LOW:MEXT" hexmask.long.byte 0x04 8.--15. 1. " SLAVE_CUM_TIME_OUT ,Determines the Slave Cumulative Time-Out Duration or the parameter T LOW:SEXT" newline hexmask.long.byte 0x04 0.--7. 1. " CLOCK_HIGH_TIME_OUT ,Clock high time out period or the parameter T HIGH" line.long 0x08 "STBR,Slave Transmit Buffer Register" hexmask.long.byte 0x08 0.--7. 1. " SLAVE_TRANSMIT_BUFFER ,Slave transmit buffer" line.long 0x0C "SRBR,Slave Receive Buffer Register" hexmask.long.byte 0x0C 0.--7. 1. " SLAVE_RECEIVE_BUFFER ,Slave receive buffer" line.long 0x10 "MTBR,Master Transmit Buffer Register" hexmask.long.byte 0x10 0.--7. 1. " MASTER_TRANSMIT_BUFFER ,Master transmit buffer" line.long 0x14 "MRBR,Master Receive Buffer Register" hexmask.long.byte 0x14 0.--7. 1. " MASTER_RECEIVE_BUFFER ,Master receive buffer" group.long 0x60++0x07 line.long 0x00 "WSR,Wake Status Register" eventfld.long 0x00 0. " START_BIT_DETECTION ,Set to 1 when a START bit is detected while the controller is enabled" "Disabled,Enabled" line.long 0x04 "WER,Wake Enable Register" bitfld.long 0x04 0. " START_DETECT_INT_EN ,Enable start bit detection interrupt" "Disabled,Enabled" width 0x0B tree.end tree.end tree "GPSPI (General Purpose Serial Peripheral Interface)" tree "Instance 0" base ad:0x40009400 width 10. group.long 0x00++0x07 line.long 0x00 "SPIER,SPI Enable Register" bitfld.long 0x00 0. " ENABLE ,State of device" "Disabled,Enabled" line.long 0x04 "SPICR,SPI Control Register" bitfld.long 0x04 6. " CE ,SPI chip select enable" "Disabled,Enabled" bitfld.long 0x04 5. " AUTO_READ ,Auto read enable" "Clear RXBF,Clear RXBF & TXBE" bitfld.long 0x04 4. " SOFT_RESET ,SPI Interface reset status" "No effect,Reset" bitfld.long 0x04 2.--3. " SPDIN_SELECT ,Select which SPI input signals are enabled when the BIOEN bit is configured as an input" "SPDIN1,SPDIN2,SPDIN1 & SPDIN2,SPDIN1 & SPDIN2" newline bitfld.long 0x04 1. " BIOEN ,Bidirectional Output Enable control" "Input,Output" bitfld.long 0x04 0. " LSBF ,Least significant bit first" "MSB,LSB" rgroup.long 0x08++0x03 line.long 0x00 "SPISR,SPI Status Register" bitfld.long 0x00 2. " ACTIVE ,Active" "0,1" bitfld.long 0x00 1. " RXBF ,Receive data buffer full status" "Not full,Full" bitfld.long 0x00 0. " TXBE ,Transmit data buffer empty status" "Not empty,Empty" if (((per.l(ad:0x40009400+0x08))&0x01)==0x00) rgroup.long 0x0C++0x03 line.long 0x00 "SPITX_DR,SPI TX_DATA Register" hexmask.long.byte 0x00 0.--7. 1. " TX_DATA ,Initiates a SPI transaction" else group.long 0x0C++0x03 line.long 0x00 "SPITX_DR,SPI TX_DATA Register" hexmask.long.byte 0x00 0.--7. 1. " TX_DATA ,Initiates a SPI transaction" endif group.long 0x10++0x03 line.long 0x00 "SPIRX_DR,SPI RX_DATA Register" hexmask.long.byte 0x00 0.--7. 1. " RX_DATA ,Used to read the value returned by the external SPI device" group.long 0x14++0x07 line.long 0x00 "SPICCR,SPI Clock Control Register" bitfld.long 0x00 4. " CLKSRC ,Clock source for the SPI clock generator" "48Mhz,2MHz" bitfld.long 0x00 2. " CLKPOL ,SPI clock polarity" "Low(rising edge),High(falling edge)" bitfld.long 0x00 1. " RCLKPH ,Receive clock phase" "On first SPI_CLK edge,After first SPI_CLK edge" bitfld.long 0x00 0. " TCLKPH ,Transmit clock phase" "Prior first edge,On the first SPI_CLK edge" line.long 0x04 "SPICGR,SPI Clock Generator Register" bitfld.long 0x04 0.--5. " PRELOAD ,SPI clock generator preload value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,38,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" width 0x0B tree.end tree "Instance 1" base ad:0x40009480 width 10. group.long 0x00++0x07 line.long 0x00 "SPIER,SPI Enable Register" bitfld.long 0x00 0. " ENABLE ,State of device" "Disabled,Enabled" line.long 0x04 "SPICR,SPI Control Register" bitfld.long 0x04 6. " CE ,SPI chip select enable" "Disabled,Enabled" bitfld.long 0x04 5. " AUTO_READ ,Auto read enable" "Clear RXBF,Clear RXBF & TXBE" bitfld.long 0x04 4. " SOFT_RESET ,SPI Interface reset status" "No effect,Reset" bitfld.long 0x04 2.--3. " SPDIN_SELECT ,Select which SPI input signals are enabled when the BIOEN bit is configured as an input" "SPDIN1,SPDIN2,SPDIN1 & SPDIN2,SPDIN1 & SPDIN2" newline bitfld.long 0x04 1. " BIOEN ,Bidirectional Output Enable control" "Input,Output" bitfld.long 0x04 0. " LSBF ,Least significant bit first" "MSB,LSB" rgroup.long 0x08++0x03 line.long 0x00 "SPISR,SPI Status Register" bitfld.long 0x00 2. " ACTIVE ,Active" "0,1" bitfld.long 0x00 1. " RXBF ,Receive data buffer full status" "Not full,Full" bitfld.long 0x00 0. " TXBE ,Transmit data buffer empty status" "Not empty,Empty" if (((per.l(ad:0x40009480+0x08))&0x01)==0x00) rgroup.long 0x0C++0x03 line.long 0x00 "SPITX_DR,SPI TX_DATA Register" hexmask.long.byte 0x00 0.--7. 1. " TX_DATA ,Initiates a SPI transaction" else group.long 0x0C++0x03 line.long 0x00 "SPITX_DR,SPI TX_DATA Register" hexmask.long.byte 0x00 0.--7. 1. " TX_DATA ,Initiates a SPI transaction" endif group.long 0x10++0x03 line.long 0x00 "SPIRX_DR,SPI RX_DATA Register" hexmask.long.byte 0x00 0.--7. 1. " RX_DATA ,Used to read the value returned by the external SPI device" group.long 0x14++0x07 line.long 0x00 "SPICCR,SPI Clock Control Register" bitfld.long 0x00 4. " CLKSRC ,Clock source for the SPI clock generator" "48Mhz,2MHz" bitfld.long 0x00 2. " CLKPOL ,SPI clock polarity" "Low(rising edge),High(falling edge)" bitfld.long 0x00 1. " RCLKPH ,Receive clock phase" "On first SPI_CLK edge,After first SPI_CLK edge" bitfld.long 0x00 0. " TCLKPH ,Transmit clock phase" "Prior first edge,On the first SPI_CLK edge" line.long 0x04 "SPICGR,SPI Clock Generator Register" bitfld.long 0x04 0.--5. " PRELOAD ,SPI clock generator preload value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,38,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" width 0x0B tree.end tree.end tree "Quad SPI Master Controller" base ad:0x40005400 width 11. if (((per.l(ad:0x40005400)&0x100)==0x100)) group.long 0x00++0x03 line.long 0x00 "QMSPIMR,QMSPI Mode Register" hexmask.long.word 0x00 16.--24. 1. " CLOCK_DIVIDE ,SPI clock divide in number of system clocks" bitfld.long 0x00 10. " CHPA_MISO ,Data captured edge type" "Falling edge,Rising edge" newline bitfld.long 0x00 9. " CHPA_MOSI ,Data changes edge type" "Rising edge,Falling edge" bitfld.long 0x00 8. " CPOL ,Polarity of the SPI clock line when there are no transactions in process" "Low,High" newline bitfld.long 0x00 1. " SOFT_RESET ,Soft reset the entire module" "No reset,Reset" bitfld.long 0x00 0. " ACTIVATE ,State of register" "Disabled,Enabled" else group.long 0x00++0x03 line.long 0x00 "QMSPIMR,QMSPI Mode Register" hexmask.long.word 0x00 16.--24. 1. " CLOCK_DIVIDE ,SPI clock divide in number of system clocks" bitfld.long 0x00 10. " CHPA_MISO ,Data captured edge type" "Rising edge,Falling edge" newline bitfld.long 0x00 9. " CHPA_MOSI ,Data changes edge type" "Falling edge,Rising edge" bitfld.long 0x00 8. " CPOL ,Polarity of the SPI clock line when there are no transactions in process" "Low,High" newline bitfld.long 0x00 1. " SOFT_RESET ,Soft reset the entire module" "No reset,Reset" bitfld.long 0x00 0. " ACTIVATE ,State of register" "Disabled,Enabled" endif group.long 0x04++0x03 line.long 0x00 "QMSPICR,QMSPI Control Register" hexmask.long.word 0x00 17.--31. 0x02 " TRANSFER_LENGTH ,Length of the SPI transfer" bitfld.long 0x00 16. " DESCRIPTION_BUFFER_ENABLE ,Enables the Description Buffers to be used" "Disabled,Enabled" newline bitfld.long 0x00 12.--15. " DESCRIPTION_BUFFER_POINTER ,Selects the first buffer used if description buffers are enabled" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 10.--11. " TRANSFER_UNITS ,Transfer length defined in units" "Bits,Bytes,4-byte,16-byte" newline bitfld.long 0x00 9. " CLOSE_TRANSFER_ENABLE ,Selects what action is taken at the end of a transfer" "Not terminated,Terminated" bitfld.long 0x00 7.--8. " RX_DMA_ENABLE ,Enables DMA support for Receive Transfer" "Disabled,1 Byte,2 Bytes,4 bytes" newline bitfld.long 0x00 6. " RX_TRANSFER_ENABLE ,Enables the receive function of the SPI interface" "Disabled,Enabled" bitfld.long 0x00 4.--5. " TX_DMA_ENABLE ,Enables DMA support for Transmit Transfer" "Disabled,1 Byte,2 Bytes,4 bytes" newline bitfld.long 0x00 2.--3. " TX_TRANSFER_ENABLE ,Selects the transmit function of the SPI interface" "Disabled,Enabled,Enabled 0 mode,Enabled 1 mode" bitfld.long 0x00 0.--1. " INTERFACE_MODE ,Sets the transmission mode" "Single Duplex mode,Dual mode,Quad mode,?..." wgroup.long 0x08++0x03 line.long 0x00 "QMSPIER,QMSPI Execute Register" bitfld.long 0x00 2. " CLEAR_DATA_BUFFER ,Clears transmit and receive FIFO" "No effect,Clear" bitfld.long 0x00 1. " STOP ,Stops transfer in progress at the next byte boundary" "No effect,Stop" newline bitfld.long 0x00 0. " START ,Starts the SPI transfer" "No effect,Start" group.long 0x0C++0x03 line.long 0x00 "QMSPIICR,QMSPI Interface Control Register" bitfld.long 0x00 7. " PULLUP_ON_NOT_DRIVEN ,Enables pull-up resistors on Transmit pins while the pins are not driven" "Disabled,Enabled" bitfld.long 0x00 6. " PULLDOWN_ON_NOT_DRIVEN ,Enables pull-down resistors on Transmit pins while the pins are not driven" "Disabled,Enabled" newline bitfld.long 0x00 5. " PULLUP_ON_NOT_SELECTED ,Enables pull-up resistors on Receive pins while the SPI Chip Select signal is not asserted" "Disabled,Enabled" bitfld.long 0x00 4. " PULLDOWN_ON_NOT_SELECTED ,Enables pull-down resistors on Receive pins while the SPI Chip Select signal is not asserted" "Disabled,Enabled" newline bitfld.long 0x00 3. " HOLD_OUT_ENABLE ,Driven write protect SPI output port is driven" "Not driven,Driven" bitfld.long 0x00 2. " HOLD_OUT_VALUE ,Sets the value on the HOLD SPI Output Port if it is driven" "Driven to 0,Driven to 1" newline bitfld.long 0x00 1. " WRITE_PROTECT_OUT_ENABLE ,Driven write protect SPI output port" "Not driven,Driven" bitfld.long 0x00 0. " WRITE_PROTECT_OUT_VALUE ,Sets the value on the WRITE PROTECT SPI Output Port if it is driven" "Driven to 0,Driven to 1" group.long 0x10++0x03 line.long 0x00 "QMSPISR,QMSPI Status Register" rbitfld.long 0x00 24.--27. " CURRENT_DESCRIPTION_BUFFER ,Shows the Description Buffer currently active" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x00 16. " TRANSFER_ACTIVE ,Transfer status" "No executing,Executing" newline eventfld.long 0x00 15. " RECEIVE_BUFFER_STALL ,Stalling interface due to a flow issue" "No stalls,Stalled" eventfld.long 0x00 14. " RECEIVE_BUFFER_REQUEST ,RECEIVE_BUFFER_COUNT comparison to RECEIVE_BUFFER_TRIGGER" "Less,Greater than or equal" newline rbitfld.long 0x00 13. " RECEIVE_BUFFER_EMPTY ,Receive buffer status" "Not empty,Empty" rbitfld.long 0x00 12. " RECEIVE_BUFFER_FULL ,Receive buffer status" "Not full,Full" newline eventfld.long 0x00 11. " TRANSMIT_BUFFER_STALL ,Stalling SPI interface to a flow issue" "No stalls,Stalled" eventfld.long 0x00 10. " TRANSMIT_BUFFER_REQUEST ,TRANSMIT_BUFFER_COUNT comparison to RECEIVE_BUFFER_TRIGGER" ">TRANSMIT_BUFFER_TRIGGER,<=TRANSMIT_BUFFER_TRIGGER" newline rbitfld.long 0x00 9. " TRANSMIT_BUFFER_EMPTY ,Transmit buffer empty status" "Not empty,Empty" rbitfld.long 0x00 8. " TRANSMIT_BUFFER_FULL ,Transmit buffer fully status" "Not full,Full" newline eventfld.long 0x00 4. " PROGRAMMING_ERROR ,If a programming error is detected" "No error,Error" eventfld.long 0x00 3. " RECEIVE_BUFFER_ERROR ,Underflow error status" "No underflow,Underflow" newline eventfld.long 0x00 2. " TRANSMIT_BUFFER_ERROR ,Overflow error status" "No overflow,Overflow" eventfld.long 0x00 1. " DMA_COMPLETE ,DMA controller asserts the DONE signal to the SPI controller" "Not completed,Completed" newline eventfld.long 0x00 0. " TRANSFER_COMPLETE ,Sets transfer status" "Not completed,Completed" rgroup.long 0x14++0x03 line.long 0x00 "QMSPIBCSR,QMSPI Buffer Count Status Register" hexmask.long.word 0x00 16.--31. 1. " RECEIVE_BUFFER_COUNT ,Count of the number of bytes currently valid in the receive buffer" hexmask.long.word 0x00 0.--15. 1. " TRANSMIT_BUFFER_COUNT ,Count of the number of bytes currently valid in the Transmit Buffer" group.long 0x18++0x07 line.long 0x00 "QMSPIIER,QMSPI Interrupt Enable Register" bitfld.long 0x00 14. " RECEIVE_BUFFER_REQUEST_ENABLE ,Enables interrupt if RECEIVE_BUFFER_REQUEST is asserted" "Disabled,Enabled" bitfld.long 0x00 13. " RECEIVE_BUFFER_EMPTY_ENABLE ,Enables interrupt if RECEIVE_BUFFER_EMPTY is asserted" "Disabled,Enabled" newline bitfld.long 0x00 12. " RECEIVE_BUFFER_FULL_ENABLE ,Enables interrupt if RECEIVE_BUFFER_FULL is asserted" "Disabled,Enabled" bitfld.long 0x00 10. " TRANSMIT_BUFFER_REQUEST_ENABLE ,Enables interrupt if TRANSMIT_BUFFER_REQUEST is asserted" "Disabled,Enabled" newline bitfld.long 0x00 9. " TRANSMIT_BUFFER_EMPTY_ENABLE ,Enables interrupt if TRANSMIT_BUFFER_EMPTY is asserted" "Disabled,Enabled" bitfld.long 0x00 8. " TRANSMIT_BUFFER_FULL_ENABLE ,Enables interrupt if TRANSMIT_BUFFER_FULL is asserted" "Disabled,Enabled" newline bitfld.long 0x00 4. " PROGRAMMING_ERROR_ENABLE ,Enables interrupt if PROGRAMMING_ERROR is asserted" "Disabled,Enabled" bitfld.long 0x00 3. " RECEIVE_BUFFER_ERROR_ENABLE ,Enables interrupt if RECEIVE_BUFFER_ERROR is asserted" "Disabled,Enabled" newline bitfld.long 0x00 2. " TRANSMIT_BUFFER_ERROR_ENABLE ,Enables interrupt if RECEIVE_BUFFER_ERROR is asserted" "Disabled,Enabled" bitfld.long 0x00 1. " DMA_COMPLETE_ENABLE ,Enables interrupt if DMA_COMPLETE is asserted" "Disabled,Enabled" newline bitfld.long 0x00 0. " TRANSFER_COMPLETE_ENABLE ,Enables interrupt if TRANSFER_COMPLETE is asserted" "Disabled,Enabled" line.long 0x04 "QMSPIBCTR,QMSPI Buffer Count Trigger Register" hexmask.long.word 0x04 16.--31. 1. " RECEIVE_BUFFER_TRIGGER ,Interrupt is triggered if the RECEIVE_BUFFER_COUNT field is greater than or equal to this value" hexmask.long.word 0x04 0.--15. 1. " TRANSMIT_BUFFER_TRIGGER ,Interrupt is triggered if the TRANSMIT_BUFFER_COUNT field is less than or equal to this value" wgroup.long 0x20++0x03 line.long 0x00 "QMSPITBR,QMSPI Transmit Buffer Register" rgroup.long 0x24++0x03 line.long 0x00 "QMSPIRBF,QMSPI Receive Buffer Register" group.long 0x30++0x03 line.long 0x00 "QMSPIDB0R,QMSPI Description Buffer 0x30 Register" hexmask.long.word 0x00 17.--31. 0x02 " TRANSFER_LENGTH ,Length of the SPI transfer" bitfld.long 0x00 16. " DESCRIPTION_BUFFER_LAST ,If this bit is 1 then this is the last Description Buffer in the chain" "Not occurred,Occurred" newline bitfld.long 0x00 12.--15. " DESCRIPTION_BUFFER_NEXT_POINTER ,Defines the next buffer to be used if Description Buffers are enabled" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 10.--11. " TRANSFER_UNITS ,Transfer length defined in units" "Bits,Bytes,4-byte,16-byte" newline bitfld.long 0x00 9. " CLOSE_TRANFSER_ENABLE ,Selects what action is taken at the end of a transfer" "Not closed,Terminated" bitfld.long 0x00 7.--8. " RX_DMA_ENABLE ,Enables DMA support for receive transfer" "Disabled,1 byte,2 byte,4 byte" newline bitfld.long 0x00 6. " RX_TRANSFER_ENABLE ,Enables the receive function of the SPI interface" "Disabled,Enabled" bitfld.long 0x00 4.--5. " TX_DMA_ENABLE ,Enables DMA support for transmit transfer" "Disabled,1 byte,2 bytes,4 bytes" newline bitfld.long 0x00 2.--3. " TX_TRANSFER_ENABLE ,Enables DMA support for transmit transfer" "Disabled,Enabled,Enabled 0 mode,Enabled 1 mode" bitfld.long 0x00 0.--1. " INTERFACE_MODE ,Sets the transmission mode" "Single Duplex mode,Dual mode,Quad mode,?..." group.long 0x34++0x03 line.long 0x00 "QMSPIDB1R,QMSPI Description Buffer 0x34 Register" hexmask.long.word 0x00 17.--31. 0x02 " TRANSFER_LENGTH ,Length of the SPI transfer" bitfld.long 0x00 16. " DESCRIPTION_BUFFER_LAST ,If this bit is 1 then this is the last Description Buffer in the chain" "Not occurred,Occurred" newline bitfld.long 0x00 12.--15. " DESCRIPTION_BUFFER_NEXT_POINTER ,Defines the next buffer to be used if Description Buffers are enabled" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 10.--11. " TRANSFER_UNITS ,Transfer length defined in units" "Bits,Bytes,4-byte,16-byte" newline bitfld.long 0x00 9. " CLOSE_TRANFSER_ENABLE ,Selects what action is taken at the end of a transfer" "Not closed,Terminated" bitfld.long 0x00 7.--8. " RX_DMA_ENABLE ,Enables DMA support for receive transfer" "Disabled,1 byte,2 byte,4 byte" newline bitfld.long 0x00 6. " RX_TRANSFER_ENABLE ,Enables the receive function of the SPI interface" "Disabled,Enabled" bitfld.long 0x00 4.--5. " TX_DMA_ENABLE ,Enables DMA support for transmit transfer" "Disabled,1 byte,2 bytes,4 bytes" newline bitfld.long 0x00 2.--3. " TX_TRANSFER_ENABLE ,Enables DMA support for transmit transfer" "Disabled,Enabled,Enabled 0 mode,Enabled 1 mode" bitfld.long 0x00 0.--1. " INTERFACE_MODE ,Sets the transmission mode" "Single Duplex mode,Dual mode,Quad mode,?..." group.long 0x38++0x03 line.long 0x00 "QMSPIDB2R,QMSPI Description Buffer 0x38 Register" hexmask.long.word 0x00 17.--31. 0x02 " TRANSFER_LENGTH ,Length of the SPI transfer" bitfld.long 0x00 16. " DESCRIPTION_BUFFER_LAST ,If this bit is 1 then this is the last Description Buffer in the chain" "Not occurred,Occurred" newline bitfld.long 0x00 12.--15. " DESCRIPTION_BUFFER_NEXT_POINTER ,Defines the next buffer to be used if Description Buffers are enabled" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 10.--11. " TRANSFER_UNITS ,Transfer length defined in units" "Bits,Bytes,4-byte,16-byte" newline bitfld.long 0x00 9. " CLOSE_TRANFSER_ENABLE ,Selects what action is taken at the end of a transfer" "Not closed,Terminated" bitfld.long 0x00 7.--8. " RX_DMA_ENABLE ,Enables DMA support for receive transfer" "Disabled,1 byte,2 byte,4 byte" newline bitfld.long 0x00 6. " RX_TRANSFER_ENABLE ,Enables the receive function of the SPI interface" "Disabled,Enabled" bitfld.long 0x00 4.--5. " TX_DMA_ENABLE ,Enables DMA support for transmit transfer" "Disabled,1 byte,2 bytes,4 bytes" newline bitfld.long 0x00 2.--3. " TX_TRANSFER_ENABLE ,Enables DMA support for transmit transfer" "Disabled,Enabled,Enabled 0 mode,Enabled 1 mode" bitfld.long 0x00 0.--1. " INTERFACE_MODE ,Sets the transmission mode" "Single Duplex mode,Dual mode,Quad mode,?..." group.long 0x3C++0x03 line.long 0x00 "QMSPIDB3R,QMSPI Description Buffer 0x3C Register" hexmask.long.word 0x00 17.--31. 0x02 " TRANSFER_LENGTH ,Length of the SPI transfer" bitfld.long 0x00 16. " DESCRIPTION_BUFFER_LAST ,If this bit is 1 then this is the last Description Buffer in the chain" "Not occurred,Occurred" newline bitfld.long 0x00 12.--15. " DESCRIPTION_BUFFER_NEXT_POINTER ,Defines the next buffer to be used if Description Buffers are enabled" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 10.--11. " TRANSFER_UNITS ,Transfer length defined in units" "Bits,Bytes,4-byte,16-byte" newline bitfld.long 0x00 9. " CLOSE_TRANFSER_ENABLE ,Selects what action is taken at the end of a transfer" "Not closed,Terminated" bitfld.long 0x00 7.--8. " RX_DMA_ENABLE ,Enables DMA support for receive transfer" "Disabled,1 byte,2 byte,4 byte" newline bitfld.long 0x00 6. " RX_TRANSFER_ENABLE ,Enables the receive function of the SPI interface" "Disabled,Enabled" bitfld.long 0x00 4.--5. " TX_DMA_ENABLE ,Enables DMA support for transmit transfer" "Disabled,1 byte,2 bytes,4 bytes" newline bitfld.long 0x00 2.--3. " TX_TRANSFER_ENABLE ,Enables DMA support for transmit transfer" "Disabled,Enabled,Enabled 0 mode,Enabled 1 mode" bitfld.long 0x00 0.--1. " INTERFACE_MODE ,Sets the transmission mode" "Single Duplex mode,Dual mode,Quad mode,?..." group.long 0x40++0x03 line.long 0x00 "QMSPIDB4R,QMSPI Description Buffer 0x40 Register" hexmask.long.word 0x00 17.--31. 0x02 " TRANSFER_LENGTH ,Length of the SPI transfer" bitfld.long 0x00 16. " DESCRIPTION_BUFFER_LAST ,If this bit is 1 then this is the last Description Buffer in the chain" "Not occurred,Occurred" newline bitfld.long 0x00 12.--15. " DESCRIPTION_BUFFER_NEXT_POINTER ,Defines the next buffer to be used if Description Buffers are enabled" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 10.--11. " TRANSFER_UNITS ,Transfer length defined in units" "Bits,Bytes,4-byte,16-byte" newline bitfld.long 0x00 9. " CLOSE_TRANFSER_ENABLE ,Selects what action is taken at the end of a transfer" "Not closed,Terminated" bitfld.long 0x00 7.--8. " RX_DMA_ENABLE ,Enables DMA support for receive transfer" "Disabled,1 byte,2 byte,4 byte" newline bitfld.long 0x00 6. " RX_TRANSFER_ENABLE ,Enables the receive function of the SPI interface" "Disabled,Enabled" bitfld.long 0x00 4.--5. " TX_DMA_ENABLE ,Enables DMA support for transmit transfer" "Disabled,1 byte,2 bytes,4 bytes" newline bitfld.long 0x00 2.--3. " TX_TRANSFER_ENABLE ,Enables DMA support for transmit transfer" "Disabled,Enabled,Enabled 0 mode,Enabled 1 mode" bitfld.long 0x00 0.--1. " INTERFACE_MODE ,Sets the transmission mode" "Single Duplex mode,Dual mode,Quad mode,?..." width 0x0B tree.end tree "PS/2 INTERFACE" tree "Instance 0" base ad:0x40009000 width 8. wgroup.long 0x00++0x03 line.long 0x00 "PS2TBR,PS2 Transmit Buffer Register" hexmask.long.byte 0x00 0.--7. 1. " TRANSMIT_DATA ,Writes to this register start a transmission of the data in this register to the peripheral" rgroup.long 0x00++0x03 line.long 0x00 "PS2RBR,PS2 Receive Buffer Register" hexmask.long.byte 0x00 0.--7. 1. " RECEIVE_DATA ,Data received from a peripheral are recorded in this register" if (((per.l(ad:0x40009000+04)&0x02)==0x02)) group.long 0x04++0x03 line.long 0x00 "PS2CR,PS2 Control Register" bitfld.long 0x00 4.--5. " STOP ,Used to set the level of the stop bit expected by the PS/2 channel state machine" "Active high stop bit,Active low stop bit,Ignores parity,?..." bitfld.long 0x00 2.--3. " PARITY ,Used to set the parity expected by the PS/2 channel state machine" "Odd parity,Even parity,Ignores parity,?..." bitfld.long 0x00 1. " PS2_EN ,PS/2 enable" "Disabled,Enabled" bitfld.long 0x00 0. " PS2_T/R ,PS/2 Transmit/Receive" "Receive,Transmit" else group.long 0x04++0x03 line.long 0x00 "PS2CR,PS2 Control Register" bitfld.long 0x00 1. " PS2_EN ,PS/2 enable" "Disabled,Enabled" bitfld.long 0x00 0. " PS2_T/R ,PS/2 Transmit/Receive" "Receive,Transmit" endif group.long 0x08++0x03 line.long 0x00 "PS2SR,PS2 Status Register" eventfld.long 0x00 7. " XMIT_START_TIMEOUT ,Transmit start timeout" "Not detected,Not received" rbitfld.long 0x00 6. " RX_BUSY ,Receive channel busy" "Receiving PS/2 data,Idle" eventfld.long 0x00 5. " XMIT_TIME_OUT ,Transmitter idle" "No timeout,Timeout" rbitfld.long 0x00 4. " XMIT_IDLE ,Transmitter idle" "No idle,Idle" newline eventfld.long 0x00 3. " FE ,Framing error" "No error,Error" eventfld.long 0x00 2. " PE ,Parity error" "No error,Error" eventfld.long 0x00 1. " REC_TIMEOUT ,Receive timeout" "Not occurred,Occurred" rbitfld.long 0x00 0. " RDATA_RDY ,Receive data ready" "Not ready,Ready" width 0x0B tree.end tree "Instance 1" base ad:0x40009040 width 8. wgroup.long 0x00++0x03 line.long 0x00 "PS2TBR,PS2 Transmit Buffer Register" hexmask.long.byte 0x00 0.--7. 1. " TRANSMIT_DATA ,Writes to this register start a transmission of the data in this register to the peripheral" rgroup.long 0x00++0x03 line.long 0x00 "PS2RBR,PS2 Receive Buffer Register" hexmask.long.byte 0x00 0.--7. 1. " RECEIVE_DATA ,Data received from a peripheral are recorded in this register" if (((per.l(ad:0x40009040+04)&0x02)==0x02)) group.long 0x04++0x03 line.long 0x00 "PS2CR,PS2 Control Register" bitfld.long 0x00 4.--5. " STOP ,Used to set the level of the stop bit expected by the PS/2 channel state machine" "Active high stop bit,Active low stop bit,Ignores parity,?..." bitfld.long 0x00 2.--3. " PARITY ,Used to set the parity expected by the PS/2 channel state machine" "Odd parity,Even parity,Ignores parity,?..." bitfld.long 0x00 1. " PS2_EN ,PS/2 enable" "Disabled,Enabled" bitfld.long 0x00 0. " PS2_T/R ,PS/2 Transmit/Receive" "Receive,Transmit" else group.long 0x04++0x03 line.long 0x00 "PS2CR,PS2 Control Register" bitfld.long 0x00 1. " PS2_EN ,PS/2 enable" "Disabled,Enabled" bitfld.long 0x00 0. " PS2_T/R ,PS/2 Transmit/Receive" "Receive,Transmit" endif group.long 0x08++0x03 line.long 0x00 "PS2SR,PS2 Status Register" eventfld.long 0x00 7. " XMIT_START_TIMEOUT ,Transmit start timeout" "Not detected,Not received" rbitfld.long 0x00 6. " RX_BUSY ,Receive channel busy" "Receiving PS/2 data,Idle" eventfld.long 0x00 5. " XMIT_TIME_OUT ,Transmitter idle" "No timeout,Timeout" rbitfld.long 0x00 4. " XMIT_IDLE ,Transmitter idle" "No idle,Idle" newline eventfld.long 0x00 3. " FE ,Framing error" "No error,Error" eventfld.long 0x00 2. " PE ,Parity error" "No error,Error" eventfld.long 0x00 1. " REC_TIMEOUT ,Receive timeout" "Not occurred,Occurred" rbitfld.long 0x00 0. " RDATA_RDY ,Receive data ready" "Not ready,Ready" width 0x0B tree.end sif (cpuis("MEC1701QC2TN")||cpuis("MEC1703KP2XY")) tree "Instance 2" base ad:0x40009080 width 8. wgroup.long 0x00++0x03 line.long 0x00 "PS2TBR,PS2 Transmit Buffer Register" hexmask.long.byte 0x00 0.--7. 1. " TRANSMIT_DATA ,Writes to this register start a transmission of the data in this register to the peripheral" rgroup.long 0x00++0x03 line.long 0x00 "PS2RBR,PS2 Receive Buffer Register" hexmask.long.byte 0x00 0.--7. 1. " RECEIVE_DATA ,Data received from a peripheral are recorded in this register" if (((per.l(ad:0x40009080+04)&0x02)==0x02)) group.long 0x04++0x03 line.long 0x00 "PS2CR,PS2 Control Register" bitfld.long 0x00 4.--5. " STOP ,Used to set the level of the stop bit expected by the PS/2 channel state machine" "Active high stop bit,Active low stop bit,Ignores parity,?..." bitfld.long 0x00 2.--3. " PARITY ,Used to set the parity expected by the PS/2 channel state machine" "Odd parity,Even parity,Ignores parity,?..." bitfld.long 0x00 1. " PS2_EN ,PS/2 enable" "Disabled,Enabled" bitfld.long 0x00 0. " PS2_T/R ,PS/2 Transmit/Receive" "Receive,Transmit" else group.long 0x04++0x03 line.long 0x00 "PS2CR,PS2 Control Register" bitfld.long 0x00 1. " PS2_EN ,PS/2 enable" "Disabled,Enabled" bitfld.long 0x00 0. " PS2_T/R ,PS/2 Transmit/Receive" "Receive,Transmit" endif group.long 0x08++0x03 line.long 0x00 "PS2SR,PS2 Status Register" eventfld.long 0x00 7. " XMIT_START_TIMEOUT ,Transmit start timeout" "Not detected,Not received" rbitfld.long 0x00 6. " RX_BUSY ,Receive channel busy" "Receiving PS/2 data,Idle" eventfld.long 0x00 5. " XMIT_TIME_OUT ,Transmitter idle" "No timeout,Timeout" rbitfld.long 0x00 4. " XMIT_IDLE ,Transmitter idle" "No idle,Idle" newline eventfld.long 0x00 3. " FE ,Framing error" "No error,Error" eventfld.long 0x00 2. " PE ,Parity error" "No error,Error" eventfld.long 0x00 1. " REC_TIMEOUT ,Receive timeout" "Not occurred,Occurred" rbitfld.long 0x00 0. " RDATA_RDY ,Receive data ready" "Not ready,Ready" width 0x0B tree.end endif tree.end tree "BC-link Master" tree "Instance 0" base ad:0x4000CD00 width 12. group.long 0x00++0x0F line.long 0x00 "BC-LINKSR,BC-LINK Status Register" bitfld.long 0x00 7. " RESET ,Sets BC_Link master interface reset" "No reset,Reset" eventfld.long 0x00 6. " BC_ERR ,Indicates that a BC bus error has occurred" "Not occurred,Occurred" bitfld.long 0x00 5. " BC_ERR_INT_EN ,Enable for generating an interrupt when the BC_ERR bit is set by hardware" "Disabled,Enabled" bitfld.long 0x00 4. " BC_BUSY_CLR_INT_EN ,Enable for generating an interrupt when the BUSY bit in this register is cleared by hardware" "Disabled,Enabled" newline rbitfld.long 0x00 0. " BUSY ,Determinates the state when BC interface is transferring data and on reset." "No data transfer or reset,Transferring data or reset" line.long 0x04 "BC-LINKAR,BC-LINK Address Register" hexmask.long.byte 0x04 0.--7. 0x01 " ADDRESS ,Address in the companion for the BC-Link transaction" line.long 0x08 "BC-LINKDR,BC-LINK Data Register" hexmask.long.byte 0x08 0.--7. 1. " DATA ,Holds data used in a BC-Link transaction" line.long 0x0C "BC-LINKCSR,BC-LINK Clock Select Register" hexmask.long.byte 0x0C 0.--7. 1. " DIVIDER ,BC Clock is set to the Master Clock divided by this field or 48MHz/ (Divider +1)" width 0x0B tree.end tree "Instance 1" base ad:0x4000CD20 width 12. group.long 0x00++0x0F line.long 0x00 "BC-LINKSR,BC-LINK Status Register" bitfld.long 0x00 7. " RESET ,Sets BC_Link master interface reset" "No reset,Reset" eventfld.long 0x00 6. " BC_ERR ,Indicates that a BC bus error has occurred" "Not occurred,Occurred" bitfld.long 0x00 5. " BC_ERR_INT_EN ,Enable for generating an interrupt when the BC_ERR bit is set by hardware" "Disabled,Enabled" bitfld.long 0x00 4. " BC_BUSY_CLR_INT_EN ,Enable for generating an interrupt when the BUSY bit in this register is cleared by hardware" "Disabled,Enabled" newline rbitfld.long 0x00 0. " BUSY ,Determinates the state when BC interface is transferring data and on reset." "No data transfer or reset,Transferring data or reset" line.long 0x04 "BC-LINKAR,BC-LINK Address Register" hexmask.long.byte 0x04 0.--7. 0x01 " ADDRESS ,Address in the companion for the BC-Link transaction" line.long 0x08 "BC-LINKDR,BC-LINK Data Register" hexmask.long.byte 0x08 0.--7. 1. " DATA ,Holds data used in a BC-Link transaction" line.long 0x0C "BC-LINKCSR,BC-LINK Clock Select Register" hexmask.long.byte 0x0C 0.--7. 1. " DIVIDER ,BC Clock is set to the Master Clock divided by this field or 48MHz/ (Divider +1)" width 0x0B tree.end tree.end tree "TFDP (Trace FIFO Debug Port)" base ad:0x40008C00 width 5. group.byte 0x00++0x01 line.byte 0x00 "DDR,Debug Data Register" line.byte 0x01 "DCR,Debug Control Register" bitfld.byte 0x01 4.--6. " IP_DELAY ,Inter-packet delay in TFDP debug output clocks" "1,2,3,4,5,6,7,8" bitfld.byte 0x01 2.--3. " DIVSEL ,Clock divider select" "24 MHx,12 MHz,6 MHz,?..." bitfld.byte 0x01 1. " EDGE_SEL ,Shifting data by falling or rising edge" "Rising edge,Falling edge" bitfld.byte 0x01 0. " EN ,Enable" "Disabled,Enabled" width 0x0B tree.end tree "Port 80 BIOS Debug Port" tree "Instance 0" base ad:0x400F8000 width 13. group.byte 0x330++0x00 line.byte 0x00 "AR,Activate Register" bitfld.byte 0x00 0. " ACTIVATE ,ACTIVATE" "Disabled,Enabled" wgroup.long 0x00++0x03 "Runtime Registers" line.long 0x00 "HDR,Host Data Register" hexmask.long.byte 0x00 0.--7. 1. " HOST_DATA ,HOST_DATA" rgroup.long 0x100++0x03 "EC Registers" line.long 0x00 "DR,Data Register" hexmask.long.tbyte 0x00 8.--31. 1. " TIME_STAMP ,TIME_STAMP" hexmask.long.byte 0x00 0.--7. 1. " EC_DATA ,EC_DATA" group.long 0x104++0x03 line.long 0x00 "CR,Configuration Register" bitfld.long 0x00 6.--7. " FIFO_THREHOLD ,Determines the threshold for port 80" "1 entry,4 entry,8 entry,14 entry" bitfld.long 0x00 5. " TIMER_ENABLE ,Timer enable" "Disabled,Enabled" bitfld.long 0x00 3.--4. " TIMEBASE_SELECT ,Determines the clock for the 24-bit timer" "48MHz/8,48MHz/16,48MHz/32,48MHz/64" bitfld.long 0x00 2. " RESET_TIMESTAMP ,Reset time stamp" ",Reset" bitfld.long 0x00 1. " FLUSH ,FLUSH" ",Flushed" rgroup.long 0x108++0x03 line.long 0x00 "SR,Status Register" bitfld.long 0x00 1. " OVERRUN ,OVERRUN" "Not full,Full" bitfld.long 0x00 0. " NOT_EMPTY ,FIFO not empty" "Empty,Not empty" group.long 0x10C++0x07 line.long 0x00 "CNTR[0:31],Count Register [0:31]" line.long 0x04 "CNTR[32:63],Count Register [32:63]" bitfld.long 0x04 0. " COUNT ,24-bit timer counter [bit 32]" "0,1" width 0x0B tree.end tree "Instance 1" base ad:0x400F8400 width 13. group.byte 0x330++0x00 line.byte 0x00 "AR,Activate Register" bitfld.byte 0x00 0. " ACTIVATE ,ACTIVATE" "Disabled,Enabled" wgroup.long 0x00++0x03 "Runtime Registers" line.long 0x00 "HDR,Host Data Register" hexmask.long.byte 0x00 0.--7. 1. " HOST_DATA ,HOST_DATA" rgroup.long 0x100++0x03 "EC Registers" line.long 0x00 "DR,Data Register" hexmask.long.tbyte 0x00 8.--31. 1. " TIME_STAMP ,TIME_STAMP" hexmask.long.byte 0x00 0.--7. 1. " EC_DATA ,EC_DATA" group.long 0x104++0x03 line.long 0x00 "CR,Configuration Register" bitfld.long 0x00 6.--7. " FIFO_THREHOLD ,Determines the threshold for port 80" "1 entry,4 entry,8 entry,14 entry" bitfld.long 0x00 5. " TIMER_ENABLE ,Timer enable" "Disabled,Enabled" bitfld.long 0x00 3.--4. " TIMEBASE_SELECT ,Determines the clock for the 24-bit timer" "48MHz/8,48MHz/16,48MHz/32,48MHz/64" bitfld.long 0x00 2. " RESET_TIMESTAMP ,Reset time stamp" ",Reset" bitfld.long 0x00 1. " FLUSH ,FLUSH" ",Flushed" rgroup.long 0x108++0x03 line.long 0x00 "SR,Status Register" bitfld.long 0x00 1. " OVERRUN ,OVERRUN" "Not full,Full" bitfld.long 0x00 0. " NOT_EMPTY ,FIFO not empty" "Empty,Not empty" group.long 0x10C++0x07 line.long 0x00 "CNTR[0:31],Count Register [0:31]" line.long 0x04 "CNTR[32:63],Count Register [32:63]" bitfld.long 0x04 0. " COUNT ,24-bit timer counter [bit 32]" "0,1" width 0x0B tree.end tree.end tree "VBAT-Powered Control Interface" base ad:0x4000AE00 width 8. group.long 0x00++0x07 line.long 0x00 "VCIR,VCI Register" rbitfld.long 0x00 17. " RTC_ALRM ,RTC alarm signal assertion control" "Not asserted,Asserted" rbitfld.long 0x00 16. " WEEK_ALRM ,Week alarm signal assertion control" "Not asserted,Asserted" bitfld.long 0x00 12. " FILTERS_BYPASS ,VCI_IN# pins input filters disable" "No,Yes" bitfld.long 0x00 11. " FW_EXT ,Control selecting bit for VCI_OUT pin" "External inputs,VCI_FW_CNTRL" newline bitfld.long 0x00 10. " VCI_FW_CNTRL ,VCI_OUT pin control" "Low,High" rbitfld.long 0x00 9. " VCI_OUT ,Provides the current status of the VCI_OUT pin" "Low,High" sif cpuis("MEC1703QC2XY")||cpuis("MEC1703KP2XY")||cpuis("MEC1701QC2TN") rbitfld.long 0x00 4. " VCI_IN4 ,VCI input 4" "Low,High" endif rbitfld.long 0x00 3. " VCI_IN3 ,VCI input 3" "Low,High" newline rbitfld.long 0x00 2. " VCI_IN2 ,VCI input 2" "Low,High" rbitfld.long 0x00 1. " VCI_IN1 ,VCI input 1" "Low,High" rbitfld.long 0x00 0. " VCI_IN0 ,VCI input 0" "Low,High" line.long 0x04 "LER,Latch Enable Register" bitfld.long 0x04 17. " RTC_ALRM_LE ,Latch enable for the RTC power-up signal" "Disabled,Enabled" bitfld.long 0x04 16. " WEEK_ALRM_LE ,Latch enable for the week alarm power-up signal" "Disabled,Enabled" sif cpuis("MEC1703QC2XY")||cpuis("MEC1703KP2XY")||cpuis("MEC1701QC2TN") bitfld.long 0x04 4. " LE4 ,Latching enable for VCI input 4" "Disabled,Enabled" endif bitfld.long 0x04 3. " LE3 ,Latching enable for VCI input 3" "Disabled,Enabled" newline bitfld.long 0x04 2. " LE2 ,Latching enable for VCI input 2" "Disabled,Enabled" bitfld.long 0x04 1. " LE1 ,Latching enable for VCI input 1" "Disabled,Enabled" bitfld.long 0x04 0. " LE0 ,Latching enable for VCI input 0" "Disabled,Enabled" wgroup.long 0x08++0x03 line.long 0x00 "LRR,Latch Resets Register" bitfld.long 0x00 17. " RTC_ALRM_LS ,RTC alarm latch reset" "No reset,Reset" bitfld.long 0x00 16. " WEEK_ALRM_LS ,Week alarm latch reset" "No reset,Reset" sif cpuis("MEC1703QC2XY")||cpuis("MEC1703KP2XY")||cpuis("MEC1701QC2TN") bitfld.long 0x00 4. " LS4 ,Latching reset for VCI input 4" "No reset,Reset" endif bitfld.long 0x00 3. " LS3 ,Latching reset for VCI input 3" "No reset,Reset" newline bitfld.long 0x00 2. " LS2 ,Latching reset for VCI input 2" "No reset,Reset" bitfld.long 0x00 1. " LS1 ,Latching reset for VCI input 1" "No reset,Reset" bitfld.long 0x00 0. " LS0 ,Latching reset for VCI input 0" "No reset,Reset" group.long 0x0C++0x03 line.long 0x00 "IER,VCI Input Enable Register" sif cpuis("MEC1703QC2XY")||cpuis("MEC1703KP2XY")||cpuis("MEC1701QC2TN") bitfld.long 0x00 4. " IE4 ,Input enables for VCI_IN4 signal" "Disabled,Enabled" textfld " " endif bitfld.long 0x00 3. " IE3 ,Input enables for VCI_IN3 signal" "Disabled,Enabled" bitfld.long 0x00 2. " IE2 ,Input enables for VCI_IN2 signal" "Disabled,Enabled" bitfld.long 0x00 1. " IE1 ,Input enables for VCI_IN1 signal" "Disabled,Enabled" newline bitfld.long 0x00 0. " IE0 ,Input enables for VCI_IN0 signal" "Disabled,Enabled" hgroup.long 0x10++0x03 hide.long 0x00 "HCR,Holdoff Count Register" group.long 0x14++0x0F line.long 0x00 "PR,VCI Polarity Register" sif cpuis("MEC1703QC2XY")||cpuis("MEC1703KP2XY")||cpuis("MEC1701QC2TN") bitfld.long 0x00 4. " VCI_IN_POL4 ,Determine the polarity of the VCI_IN4 input signal" "Low,High" textfld " " endif bitfld.long 0x00 3. " VCI_IN_POL3 ,Determine the polarity of the VCI_IN3 input signal" "Low,High" bitfld.long 0x00 2. " VCI_IN_POL2 ,Determine the polarity of the VCI_IN2 input signal" "Low,High" newline bitfld.long 0x00 1. " VCI_IN_POL1 ,Determine the polarity of the VCI_IN1 input signal" "Low,High" bitfld.long 0x00 0. " VCI_IN_POL0 ,Determine the polarity of the VCI_IN0 input signal" "Low,High" line.long 0x04 "PDR,VCI POSEDGE Detect Register" sif cpuis("MEC1703QC2XY")||cpuis("MEC1703KP2XY")||cpuis("MEC1701QC2TN") bitfld.long 0x04 4. " VCI_IN_POS4 ,Record a low to high transition on the VCI_IN4 pin" "No edge,Positive edge" textfld " " endif bitfld.long 0x04 3. " VCI_IN_POS3 ,Record a low to high transition on the VCI_IN3 pin" "No edge,Positive edge" bitfld.long 0x04 2. " VCI_IN_POS2 ,Record a low to high transition on the VCI_IN2 pin" "No edge,Positive edge" newline bitfld.long 0x04 1. " VCI_IN_POS1 ,Record a low to high transition on the VCI_IN1 pin" "No edge,Positive edge" bitfld.long 0x04 0. " VCI_IN_POS0 ,Record a low to high transition on the VCI_IN0 pin" "No edge,Positive edge" line.long 0x08 "NDR,VCI NEGEDGE Detect Register" sif cpuis("MEC1703QC2XY")||cpuis("MEC1703KP2XY")||cpuis("MEC1701QC2TN") eventfld.long 0x08 4. " VCI_IN_NEG4 ,Record a high to low transition on the VCI_IN4 pin" "No edge,Negative edge" textfld " " endif eventfld.long 0x08 3. " VCI_IN_NEG3 ,Record a high to low transition on the VCI_IN3 pin" "No edge,Negative edge" newline eventfld.long 0x08 2. " VCI_IN_NEG2 ,Record a high to low transition on the VCI_IN2 pin" "No edge,Negative edge" eventfld.long 0x08 1. " VCI_IN_NEG1 ,Record a high to low transition on the VCI_IN1 pin" "No edge,Negative edge" eventfld.long 0x08 0. " VCI_IN_NEG0 ,Record a high to low transition on the VCI_IN0 pin" "No edge,Negative edge" line.long 0x0C "BER,VCI Buffer Enable Register" sif cpuis("MEC1703QC2XY")||cpuis("MEC1703KP2XY")||cpuis("MEC1701QC2TN") bitfld.long 0x0C 4. " VCI_BUFFER_EN4 ,Input buffer enable for VCI_IN4 pin" "Disabled,Enabled" textfld " " endif bitfld.long 0x0C 3. " VCI_BUFFER_EN3 ,Input buffer enable for VCI_IN3 pin" "Disabled,Enabled" bitfld.long 0x0C 2. " VCI_BUFFER_EN2 ,Input buffer enable for VCI_IN2 pin" "Disabled,Enabled" newline bitfld.long 0x0C 1. " VCI_BUFFER_EN1 ,Input buffer enable for VCI_IN1 pin" "Disabled,Enabled" bitfld.long 0x0C 0. " VCI_BUFFER_EN0 ,Input buffer enable for VCI_IN0 pin" "Disabled,Enabled" width 0x0B tree.end tree "VBAT Register Bank" base ad:0x4000A400 width 8. group.long 0x00++0x03 line.long 0x00 "P-FRSR,POWER-FAIL and Reset Status Register" eventfld.long 0x00 7. " VBAT_RST ,Detects RESET_VBAT" "Not detected,Detected" eventfld.long 0x00 6. " SYSRESETREQ ,Detects triggered RESET_SYS by ARM SYSRESETREQ event" "Not triggered,Triggered" eventfld.long 0x00 5. " WDT ,Detects triggered RESET_SYS by Watchdog Timer event" "Not triggered,Triggered" eventfld.long 0x00 4. " RESETI ,Detects triggered RESET_SYS by a low signal on the RESETI# input pin" "Not triggered,Triggered" newline eventfld.long 0x00 3. " TEST ,Test" "0,1" eventfld.long 0x00 2. " SOFT_SYS_RESET ,Detects triggered an assertion of the SOFT_SYS_RESET bit in the system reset register" "0,1" group.long 0x08++0x03 line.long 0x00 "CER,Clock Enable Register" bitfld.long 0x00 3. " XOSEL ,Selects between a single-ended clock source or an external parallel crystal" "Parallel,Single-ended" bitfld.long 0x00 2. " 32KHZ_SOURCE ,Determines the source for the always-on 32KHz internal clock source" "Silicon oscillator,Crystal oscillator" bitfld.long 0x00 1. " EXT_32K ,Selects the source for the 32KHz clock domain" "Always-on32Khz clock source,32KHZ_IN VTR-powered pin" bitfld.long 0x00 0. " 32K_SUPPRESS ,32KHz clock domain disable while VTR is off" "No,Yes" rgroup.long 0x20++0x03 line.long 0x00 "MCR,Monotonic Counter Register" group.long 0x24++0x07 line.long 0x00 "CHR,Counter Hiword Register" line.long 0x04 "VBR,Vwire Backup Register" bitfld.long 0x04 4.--7. " M2S_42H_BACKUP ,Corresponds to virtual wire index 42h on a RESET_SYS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. " M2S_2H_BACKUP ,Corresponds to virtual wire index 2h on a RESET_SYS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" width 0x0B tree.end tree "EC Subsystem Registers" base ad:0x4000FC00 width 15. rgroup.long 0x00++0x03 line.long 0x00 "SRAMCR,SRAM Configuration Register" bitfld.long 0x00 0.--1. " SRAM_SIZE ,Total SRAM size" ",256KB,320KB,480KB" group.long 0x04++0x03 line.long 0x00 "AHBEAR,AHB Error Address Register" rgroup.long 0x08++0x0B line.long 0x00 "TEST[1],Test Register 1" line.long 0x04 "TEST[2],Test Register 2" line.long 0x08 "TEST[3],Test Register 3" group.long 0x14++0x17 line.long 0x00 "AHBECR,AHB Error Control Register" bitfld.long 0x00 1. " TEST ,Test" "0,1" bitfld.long 0x00 0. " AHB_ERROR_DISABLE ,EC memory exceptions disable" "No,Yes" line.long 0x04 "ICR,Interrupt Control Register" bitfld.long 0x04 0. " NVIC_EN ,Enables alternate NVIC IRQs vectors" "Disabled,Enabled" line.long 0x08 "ETMTER,ETM Trace Enable Register" bitfld.long 0x08 0. " TRACE_EN ,Enables the ARM trace debug port" "Disabled,Enabled" line.long 0x0C "DER,Debug Enable Register" bitfld.long 0x0C 3. " DEBUG_PU_EN ,Internal pull-up resistors state" "Disabled,Enabled" bitfld.long 0x0C 1.--2. " DEBUG_PIN_CFG ,Determines which pins are affected by the TRST# debug enable pin" "All,JTAG/TCK/TMS/TDO,JTAG/TCK/TMS,?..." bitfld.long 0x0C 0. " DEBUG_EN ,Enables the JTAG/SWD debug port" "Disabled,Enabled" line.long 0x10 "OTPLR,OTP Lock Register" bitfld.long 0x10 4. " PUBLIC_KEY_LOCK ,Controls access to the public key region of the eFuse memory bytes 128 to 191" "Accessible,Inaccessible" bitfld.long 0x10 3. " USER_OTP_LOCK ,Controls access to the user region of the eFuse memory bytes 192 to 511" "Accessible,Inaccessible" bitfld.long 0x10 2. " PRIVATE_KEY_LOCK ,Controls access to the user region of the eFuse memory bytes 0 to 31" "Accessible,Inaccessible" bitfld.long 0x10 1. " MCHIP_LOCK ,Controls access to Microchip region of the eFuse memory bytes 32 to 127" "Accessible,Inaccessible" line.long 0x14 "WDTECR,WDT Event Count Register" bitfld.long 0x14 0.--3. " WDT_EVENT_COUNT ,Cleared to 0 on a reset triggered by the main power on reset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long 0x2C++0x0B line.long 0x00 "TEST[4],Test Register 4" line.long 0x04 "TEST[5],Test Register 5" line.long 0x08 "TEST[6],Test Register 6" rgroup.long 0x3C++0x03 line.long 0x00 "TEST[7],Test Register 7" group.long 0x40++0x03 line.long 0x00 "PECIDR,PECI Disable Register" bitfld.long 0x00 0. " PECI_DISABLE ,VREF_VTT function state disable" "No,Yes" rgroup.long 0x44++0x07 line.long 0x00 "TEST[8],Test Register 8" line.long 0x04 "TEST[9],Test Register 9" rgroup.long 0x5C++0x07 line.long 0x00 "TEST[10],Test Register 10" line.long 0x04 "TEST[11],Test Register 11" if (((per.l(ad:0x4000FC00+0x64)&0x80)==0x80)) rgroup.long 0x64++0x03 line.long 0x00 "GPIOBPR,GPIO Bank Power Register" bitfld.long 0x00 7. " RW ,VTR_LEVEL bits[2:0] and GPIO bank power lock bit" "R/W,Read only" bitfld.long 0x00 2. " VTR_LEVEL3 ,Voltage value on VTR3" "3.3V,1.8V" bitfld.long 0x00 1. " VTR_LEVEL2 ,Voltage value on VTR2" "3.3V,1.8V" bitfld.long 0x00 0. " VTR_LEVEL1 ,Voltage value on VTR1" "3.3V,1.8V" else group.long 0x64++0x03 line.long 0x00 "GPIOBPR,GPIO Bank Power Register" bitfld.long 0x00 7. " RW ,VTR_LEVEL bits[2:0] and GPIO bank power lock bit" "R/W,Read only" bitfld.long 0x00 2. " VTR_LEVEL3 ,Voltage value on VTR3" "3.3V,1.8V" bitfld.long 0x00 1. " VTR_LEVEL2 ,Voltage value on VTR2" "3.3V,1.8V" bitfld.long 0x00 0. " VTR_LEVEL1 ,Voltage value on VTR1" "3.3V,1.8V" endif rgroup.long 0x68++0x07 line.long 0x00 "TEST[12],Test Register 12" line.long 0x04 "TEST[13],Test Register 13" group.long 0x70++0x03 line.long 0x00 "JTAGMCONFIGR,JTAG Master Configuration Register" bitfld.long 0x00 3. " MASTER_SLAVE ,Controls the direction of the JTAG port" "Slave,Master" bitfld.long 0x00 0.--2. " JTM_CLK ,Determines the JTAG master clock rate derived from the 48MHz master clock" ",24MHz,12MHz,6MHz,3MHz,1.5MHz,750KHz,375KHz" rgroup.long 0x74++0x03 line.long 0x00 "JTAGMSR,JTAG Master Command Register Status" bitfld.long 0x00 0. " JTM_DONE ,Determines when JTAG master command register is written" "Shifting completed,Written" group.long 0x78++0x0B line.long 0x00 "JTAGMTDOR,JTAG Master TDO Register" line.long 0x04 "JTAGMTDIR,JTAG Master TDI Register" line.long 0x08 "JTAGMTMSR,JTAG Master TMS Register" wgroup.long 0x84++0x03 line.long 0x00 "JTAGMCOMMANDR,JTAG Master Command Register" bitfld.long 0x00 0.--4. " JTM_COUNT ,Starts clocking and shifting on the JTAG port" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x90++0x03 line.long 0x00 "TEST[14],Test Register 14" rgroup.long 0x100++0x03 line.long 0x00 "TEST[15],Test Register 15" width 0x0B tree.end tree "eFUSE Block" base ad:0x40082000 width 8. group.word 0x00++0x01 line.word 0x00 "CR,Control Register" bitfld.word 0x00 4. " FSOURCE_EN_READ ,FSOURCE pin enable for reading" "Disabled,Enabled" bitfld.word 0x00 3. " FSOURCE_EN_PRGM ,FSOURCE pin enable for programming" "Disabled,Enabled" bitfld.word 0x00 2. " EXT_PGM ,External enable for programming" "Disabled,Enabled" newline bitfld.word 0x00 1. " RESET ,Block reset" "No reset,Reset" bitfld.word 0x00 0. " ENABLE ,Block enable" "Disabled,Enabled" group.word 0x04++0x01 line.word 0x00 "MCR,Manual Control Register" bitfld.word 0x00 5. " IP_OE ,eFuse output enable" "Disabled,Enabled" bitfld.word 0x00 4. " IP_SENSE_PULSE ,eFUSE sense" "Not valid,Valid" bitfld.word 0x00 3. " IP_PRCHG ,eFUSE precharge" "Not precharged,Precharged" newline bitfld.word 0x00 2. " IP_PRGM_EN ,eFUSE program enable" "Read mode,Programming" bitfld.word 0x00 1. " IP_CS ,eFUSE chip select pin" "Disabled,Enabled" bitfld.word 0x00 0. " MAN_ENABLE ,Manual mode enable bit" "Disabled,Enabled" group.word 0x06++0x03 line.word 0x00 "MMAR,Manual Mode Address Register" bitfld.word 0x00 10.--11. " IP_ADDR_HI ,1K bit block of eFuse data select" "0,1,2,3" hexmask.word 0x00 0.--9. 0x01 " IP_ADDR_LO ,Bit address within a 1K bit block select" group.long 0x0C++0x03 line.long 0x00 "MMDR,Manual Mode Data Register" newline group.word 0x10++0x01 line.word 0x00 "EFUSEM,eFuse Memory" button "EFUSE Memory" "d (ad:0x40082000+0x10)--(ad:0x40082000+0x20F) /word" width 0x0B tree.end newline