; -------------------------------------------------------------------------------- ; @Title: LPC17xx On-Chip Peripherals ; @Props: Released ; @Author: BOB, CIN, MPO, PAC ; @Changelog: ; 2009-09-21 ; 2010-08-04 ; 2010-10-29 ; 2011-09-21 ; @Manufacturer: NXP - NXP Semiconductors ; @Doc: user.manual.lpc17xx.pdf Rev. 00.07 (2009-07-31) ; user.manual.lpc17xx.pdf Rev. 01 (2010-01-01); UM10360.pdf Rev.2 (2010-08-19) ; lpc177x_lpc178x_UM10470.pdf (2011-07-06) ; @Core: Cortex-M3 ; @Copyright: (C) 1989-2016 Lauterbach GmbH, licensed for use with TRACE32(R) only ; -------------------------------------------------------------------------------- ; $Id: perlpc17xx.per 17736 2024-04-08 09:26:07Z kwisniewski $ base ad:0x0 tree.close "Core Registers (Cortex-M3)" AUTOINDENT.PUSH AUTOINDENT.OFF tree "System Control" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 11. group 0x10--0x1b line.long 0x00 "SYST_CSR,SysTick Control and Status Register" bitfld.long 0x00 16. " COUNTFLAG ,Counter Flag" "Not counted,Counted" bitfld.long 0x00 2. " CLKSOURCE ,Clock Source" "External,Core" bitfld.long 0x00 1. " TICKINT ,SysTick Handler" "Not SysTick,SysTick" textline " " bitfld.long 0x00 0. " ENABLE ,Counter Enable" "Disabled,Enabled" ;group 0x14++0x03 line.long 0x04 "SYST_RVR,SysTick Reload Value Register" hexmask.long.tbyte 0x04 0.--23. 1. " RELOAD ,The value to load into the SYST_CVR when the counter reaches 0" ;group 0x18++0x03 line.long 0x08 "SYST_CVR,SysTick Current Value Register" hexmask.long.tbyte 0x08 0.--23. 1. " CURRENT ,Current Value" rgroup 0x1c++0x03 line.long 0x00 "SYST_CALIB,SysTick Calibration Value Register" bitfld.long 0x00 31. " NOREF ,Indicates whether the implementation defined reference clock is implemented" "Implemented,Not implemented" bitfld.long 0x00 30. " SKEW ,Indicates whether the 10ms calibration value is exact" "Exact,Inexact" hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Holds a reload value to be used for 10ms (100Hz) timing" textline " " rgroup 0xd00++0x03 line.long 0x00 "CPUID,CPU ID Base Register" hexmask.long.byte 0x00 24.--31. 1. " IMPLEMENTER ,Implementer Code" bitfld.long 0x00 20.--23. " VARIANT ,Implementation Defined Variant Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " CONSTANT ,Constant" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.word 0x00 4.--15. 1. " PARTNO ,Number of Processor" bitfld.long 0x00 0.--3. " REVISION ,Implementation Defined Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group 0xd04--0xd17 line.long 0x00 "ICSR,Interrupt Control State Register" bitfld.long 0x00 31. " NMIPENDSET ,Set Pending NMI Bit" "Not set,Set" bitfld.long 0x00 28. " PENDSVSET ,Set Pending pendSV Bit" "Not set,Set" bitfld.long 0x00 27. " PENDSVCLR ,Clear Pending pendSV Bit" "Not cleared,Cleared" textline " " bitfld.long 0x00 26. " PENDSTSET ,Set Pending SysTick Bit" "Not set,Set" bitfld.long 0x00 25. " PENDSTCLR ,Clear Pending SysTick Bit" "Not cleared,Cleared" bitfld.long 0x00 23. " ISRPREEMPT ,Use Only at Debug Time" "Not active,Active" textline " " bitfld.long 0x00 22. " ISRPENDING ,Interrupt Pending Flag" "Not pending,Pending" hexmask.long.word 0x00 12.--21. 1. " VECTPENDING ,Pending ISR Number Field" bitfld.long 0x00 11. " RETTOBASE ,Interrupt Exception" "Active,Not active" textline " " hexmask.long.word 0x00 0.--8. 1. " VECTACTIVE ,Active ISR Number Field" ;group 0xd08++0x03 line.long 0x04 "VTOR,Vector Table Offset Register" bitfld.long 0x04 29. " TBLBASE ,Table Base" "Code,RAM" hexmask.long.tbyte 0x04 7.--28. 1. " TBLOFF ,Vector Table Base Offset Field" ;group 0xd0c++0x03 line.long 0x08 "AIRCR,Application Interrupt and Reset Control Register" hexmask.long.word 0x08 16.--31. 1. " VECTKEY ,Register Key" rbitfld.long 0x08 15. " ENDIANESS ,Data endianness Bit" "Little,Big" bitfld.long 0x08 8.--10. " PRIGROUP ,Interrupt Priority Grouping Field" "[7:1]/[0],[7:2]/[1:0],[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]" textline " " bitfld.long 0x08 2. " SYSRESETREQ ,System Reset Request" "Not requested,Requested" bitfld.long 0x08 1. " VECTCLRACTIVE ,Clear Active Vector Bit" "Not cleared,Cleared all" bitfld.long 0x08 0. " VECTRESET ,System Reset" "No reset,Reset" ;group 0xd10++0x03 line.long 0x0c "SCR,System Control Register" bitfld.long 0x0c 4. " SEVONPEND ,Determines whether an interrupt transition from inactive state to pending state is a wakeup event" "Not wakeup,Wakeup" bitfld.long 0x0c 2. " SLEEPDEEP ,Provides a qualifying hint indicating that waking from sleep might take longer" "Not deep sleep,Deep sleep" textline " " bitfld.long 0x0c 1. " SLEEPONEXIT ,Determines whether, on an exit from an ISR that returns to the base level of execution priority, the processor enters a sleep state" "Disabled,Enabled" ;group 0xd14++0x03 line.long 0x10 "CCR,Configuration Control Register" bitfld.long 0x10 9. " STKALIGN ,8-byte Stack Frame Alignment" "4-byte,8-byte" bitfld.long 0x10 8. " BFHFNMIGN ,Enable NMI, Hard Fault and FAULTMASK to Ignore Bus Fault" "Disabled,Enabled" textline " " bitfld.long 0x10 4. " DIV_0_TRP ,Trap Divide by Zero" "Disabled,Enabled" bitfld.long 0x10 3. " UNALIGN_TRP ,Trap for Unaligned Access" "Disabled,Enabled" textline " " bitfld.long 0x10 1. " USERSETMPEND ,Enable User Access to the Software Trigger Exception Register" "Disabled,Enabled" bitfld.long 0x10 0. " NONEBASETHRDENA ,Control Entry to Thread Mode" "Only from last exception,Any level" group 0xd18--0xd23 line.long 0x00 "SHPR1,SSystem Handler Priority Register 1" hexmask.long.byte 0x00 24.--31. 1. " PRI_7 ,Priority of System Handler 7" hexmask.long.byte 0x00 16.--23. 1. " PRI_6 ,Priority of system handler 6(UsageFault)" hexmask.long.byte 0x00 8.--15. 1. " PRI_5 ,Priority of system handler 5(BusFault)" textline " " hexmask.long.byte 0x00 0.--7. 1. " PRI_4 ,Priority of system handler 4(MemManage)" line.long 0x04 "SHPR2,System Handler Priority Register 2" hexmask.long.byte 0x04 24.--31. 1. " PRI_11 ,Priority of system handler 11(SVCall)" hexmask.long.byte 0x04 16.--23. 1. " PRI_10 ,Priority of System Handler 10" hexmask.long.byte 0x04 8.--15. 1. " PRI_9 ,Priority of System Handler 9" textline " " hexmask.long.byte 0x04 0.--7. 1. " PRI_8 ,Priority of System Handler 8" line.long 0x08 "SHPR3,System Handler Priority Register 3" hexmask.long.byte 0x08 24.--31. 1. " PRI_15 ,Priority of System Handler 15(SysTick)" hexmask.long.byte 0x08 16.--23. 1. " PRI_14 ,Priority of System Handler 14(PendSV)" hexmask.long.byte 0x08 8.--15. 1. " PRI_13 ,Priority of System Handler 13" textline " " hexmask.long.byte 0x08 0.--7. 1. " PRI_12 ,Priority of System Handler 12(DebugMonitor)" group 0xd24++0x3 line.long 0x00 "SHCSR,System Handler Control and State Register" bitfld.long 0x00 18. " USGFAULTENA ,USGFAULTENA" "Disabled,Enabled" bitfld.long 0x00 17. " BUSFAULTENA ,BUSFAULTENA" "Disabled,Enabled" bitfld.long 0x00 16. " MEMFAULTENA ,MEMFAULTENA" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " SVCALLPENDED ,SVCall is Pended Started" "Not replaced,Replaced" bitfld.long 0x00 14. " BUSFAULTPENDED ,BusFault is Pended Started" "Not replaced,Replaced" bitfld.long 0x00 13. " MEMFAULTPENDED ,MemManage is Pended Started" "Not replaced,Replaced" textline " " bitfld.long 0x00 11. " SYSTICKACT ,SysTick is Active" "Not active,Active" bitfld.long 0x00 10. " PENDSVACT ,PendSV is Active" "Not active,Active" bitfld.long 0x00 8. " MONITORACT ,Monitor is Active" "Not active,Active" textline " " bitfld.long 0x00 7. " SVCALLACT ,SVCall is Active" "Not active,Active" bitfld.long 0x00 3. " USGFAULTACT ,UsageFault is Active" "Not active,Active" bitfld.long 0x00 1. " BUSFAULTACT ,BusFault is Active" "Not active,Active" textline " " bitfld.long 0x00 0. " MEMFAULTACT ,MemManage is Active" "Not active,Active" group 0xd28--0xd3b line.byte 0x0 "MMFSR,Memory Manage Fault Status Register" bitfld.byte 0x0 7. " MMARVALID ,Address Valid Flag" "Not valid,Valid" bitfld.byte 0x0 4. " MSTKERR ,Stacking Access Violations" "No error,Error" bitfld.byte 0x0 3. " MUNSTKERR ,Unstack Access Violations" "No error,Error" textline " " bitfld.byte 0x0 1. " DACCVIOL ,Data Access Violation" "No error,Error" bitfld.byte 0x0 0. " IACCVIOL ,Instruction Access Violation" "No error,Error" ;group 0xd29++0x00 line.byte 0x01 "BFSR,Bus Fault Status Register" bitfld.byte 0x01 7. " BFARVALID ,Address Valid" "Not valid,Valid" bitfld.byte 0x01 4. " STKERR ,Stacking from Exception has Caused Bus Faults" "No error,Error" bitfld.byte 0x01 3. " UNSTKERR ,Unstack from Exception Return has Caused Bus Faults" "No error,Error" textline " " bitfld.byte 0x01 2. " IMPRECISERR ,Imprecise Data Bus Error" "No error,Error" bitfld.byte 0x01 1. " PRECISERR ,Precise Data Bus Error Return" "No error,Error" bitfld.byte 0x01 0. " IBUSERR ,Instruction Bus Error Flag" "No error,Error" ;group 0xd2a++0x01 line.word 0x02 "USAFAULT,Usage Fault Status Register" bitfld.word 0x02 9. " DIVBYZERO ,Illegal PC Load" "No error,Error" bitfld.word 0x02 8. " UNALIGNED ,Illegal Unaligned Access" "No error,Error" bitfld.word 0x02 3. " NOCP ,Attempt to use a coprocessor instruction" "No error,Error" textline " " bitfld.word 0x02 2. " INVPC ,Attempt to Load EXC_RETURN into PC Illegally" "No error,Error" bitfld.word 0x02 1. " INVSTATE , Invalid Combination of EPSR and Instruction" "No error,Error" bitfld.word 0x02 0. " UNDEFINSTR ,Illegal Processor State" "No error,Error" ;group 0xd2c++0x03 line.long 0x04 "HFSR,Hard Fault Status Register" bitfld.long 0x04 31. " DEBUGEVT ,This Bit is Set if There is a Fault Related to Debug" "No error,Error" bitfld.long 0x04 30. " FORCED ,Hard Fault Activated" "No error,Error" bitfld.long 0x04 1. " VECTTBL ,Bus Fault" "No error,Error" ;group 0xd30++0x03 line.long 0x08 "DFSR,Debug Fault Status Register" bitfld.long 0x08 4. " EXTERNAL ,External Debug Request Flag" "Not asserted,Asserted" bitfld.long 0x08 3. " VCATCH ,Vector Catch Flag" "Not occurred,Occurred" bitfld.long 0x08 2. " DWTTRAP ,Data Watchpoint and Trace (DWT) Flag" "Not matched,Matched" textline " " bitfld.long 0x08 1. " BKPT ,BKPT Flag" "Not executed,Executed" bitfld.long 0x08 0. " HALTED ,Halt Request Flag" "Not requested,Requested" ;group 0xd34++0x03 line.long 0xc "MMFAR,Memory Manage Fault Address Register" ;group 0xd38++0x03 line.long 0x10 "BFAR,Bus Fault Address Register" wgroup 0xf00++0x03 line.long 0x00 "STIR,Software Trigger Interrupt Register" hexmask.long.word 0x00 0.--8. 1. " INTID ,Indicates the interrupt to be triggered" tree "Feature Registers" width 10. rgroup.long 0xD40++0x0B line.long 0x00 "ID_PFR0,Processor Feature Register 0" bitfld.long 0x00 4.--7. " STATE1 ,Thumb instruction set support" ",,,Supported,?..." bitfld.long 0x00 0.--3. " STATE0 ,ARM instruction set support" "Not supported,?..." line.long 0x04 "ID_PFR1,Processor Feature Register 1" bitfld.long 0x04 8.--11. " MPROF ,M profile programmers' model" ",,2-stack,?..." line.long 0x08 "ID_DFR0,Debug Feature Register 0" bitfld.long 0x08 20.--23. " DBGMOD ,Support for memory-mapped debug model for M profile processors" "Not supported,Supported,?..." hgroup.long 0xD4C++0x03 hide.long 0x00 "ID_AFR0,Auxiliary Feature Register 0" rgroup.long 0xD50++0x03 line.long 0x00 "ID_MMFR0,Memory Model Feature Register 0" bitfld.long 0x00 20.--23. " AUXREG ,Indicates the support for Auxiliary registers" "Not supported,ACTLR only,?..." bitfld.long 0x00 16.--19. " TCMSUP ,Indicates the support for Tightly Coupled Memory (TCM)" "Not supported,Supported,?..." bitfld.long 0x00 12.--15. " SHRLEV ,Indicates the number of shareability levels implemented" "Level 1,?..." textline " " bitfld.long 0x00 8.--11. " OUTMSHR ,Indicates the outermost shareability domain implemented" "Non-cacheable,,,,,,,,,,,,,,,Ignored" bitfld.long 0x00 4.--7. " PMSASUP ,Indicates support for a PMSA" "Not supported,,,PMSAv7,?..." hgroup.long 0xD54++0x03 hide.long 0x00 "ID_MMFR1,Memory Model Feature Register 1" rgroup.long 0xD58++0x03 line.long 0x00 "ID_MMFR2,Memory Model Feature Register 2" bitfld.long 0x00 24.--27. " WFISTALL ,Indicates the support for Wait For Interrupt (WFI) stalling" "Not supported,Supported,?..." rgroup.long 0xD60++0x13 line.long 0x00 "ID_ISAR0,Instruction Set Attributes Register 0" bitfld.long 0x00 24.--27. " DIVIDE ,Indicates the supported divide instructions" "Not supported,SDIV/UDIV,?..." bitfld.long 0x00 20.--23. " DEBUG ,Indicates the supported debug instructions" "Not supported,BKPT,?..." bitfld.long 0x00 16.--19. " COPROC ,Indicates the supported coprocessor instructions" "Not supported,CDP/LDC/MCR/STC,CDP2/LDC2/MCR2/STC2,MCRR/MRRC,MCRR2/MRRC2,?..." textline " " bitfld.long 0x00 12.--15. " CMPBRANCH ,Indicates the supported combined compare and branch instructions" "Not supported,CBNZ/CBZ,?..." bitfld.long 0x00 8.--11. " BITFIELD ,Indicates the supported bitfield instructions" "Not supported,BFC/BFI/SBFX/UBFX,?..." bitfld.long 0x00 4.--7. " BITCOUNT ,Indicates the supported bit counting instructions" "Not supported,CLZ,?..." line.long 0x04 "ID_ISAR1,Instruction Set Attributes Register 1" bitfld.long 0x04 24.--27. " INTERWORK ,Indicates the supported Interworking instructions" "Not supported,BX,BX/BLX,?..." bitfld.long 0x04 20.--23. " IMMEDIATE ,Indicates the support for data-processing instructions with long immediates" "Not supported,ADDW/MOVW/MOVT/SUBW,?..." bitfld.long 0x04 16.--19. " IFTHEN ,Indicates the supported IfThen instructions" "Not supported,IT,?..." textline " " bitfld.long 0x04 12.--15. " EXTEND ,Indicates the supported Extend instructions" "Not supported,Supported,Supported,?..." line.long 0x08 "ID_ISAR2,Instruction Set Attributes Register 2" bitfld.long 0x08 24.--27. " REVERSAL ,Indicates the supported reversal instructions" "Not supported,REV/REV16/REVSH,REV/REV16/REVSH/RBIT,?..." bitfld.long 0x08 20.--23. " MULTU ,Indicates the supported advanced unsigned multiply instructions" "Not supported,UMULL/UMLAL,UMULL/UMLAL/UMAAL,?..." bitfld.long 0x08 16.--19. " MULTS ,Indicates the supported advanced signed multiply instructions" "Not supported,Supported,Supported,Supported,?..." textline " " bitfld.long 0x08 12.--15. " MULT ,Indicates the supported additional multiply instructions" "Not supported,MLA,MLA/MLS,?..." bitfld.long 0x08 8.--11. " MULTIACCESSINT ,Indicates the support for multi-access interruptible instructions" "Not supported,LDM/STM restartable,LDM/STM continuable,?..." bitfld.long 0x08 4.--7. " MEMHINT ,Indicates the supported memory hint instructions" "Not supported,,,PLD/PLI,?..." textline " " bitfld.long 0x08 0.--3. " LOADSTORE ,Indicates the supported additional load and store instructions" "Not supported,LDRD/STRD,?..." line.long 0x0C "ID_ISAR3,Instruction Set Attributes Register 3" bitfld.long 0x0C 24.--27. " TRUENOP ,Indicates the support for a true NOP instruction" "Not supported,Supported,?..." bitfld.long 0x0C 20.--23. " THUMBCOPY ,Indicates the supported non flag-setting MOV instructions" "Not supported,Supported,?..." bitfld.long 0x0C 16.--19. " TABBRANCH ,Indicates the supported Table Branch instructions" "Not supported,TBB/TBH,?..." textline " " bitfld.long 0x0C 12.--15. " SYNCHPRIM ,Indicates the supported Table Branch instructions" "Not supported,Supported,Supported,Supported,?..." bitfld.long 0x0C 8.--11. " SVC ,Indicates the supported SVC instructions" "Not supported,SVC,?..." bitfld.long 0x0C 4.--7. " SIMD ,Indicates the supported SIMD instructions" "Not supported,Supported,,Supported,?..." textline " " bitfld.long 0x0C 0.--3. " SATURATE ,Indicates the supported Saturate instructions" "Not supported,QADD/QDADD/QDSUB/QSUB,?..." line.long 0x10 "ID_ISAR4,Instruction Set Attributes Register 4" bitfld.long 0x10 24.--27. " PSR_M ,Indicates the supported M profile instructions to modify the PSRs" "Not supported,Supported,?..." bitfld.long 0x10 20.--23. " SYNCHPRIMFRAC ,Indicates the supported M profile instructions to modify the PSRs" "Not supported,Supported,Supported,Supported,?..." bitfld.long 0x10 16.--19. " BARRIER ,Indicates the supported Barrier instructions" "Not supported,DMB/DSB/ISB,?..." textline " " bitfld.long 0x10 8.--11. " WRITEBACK ,Indicates the support for writeback addressing modes" "Basic support,Full support,?..." bitfld.long 0x10 4.--7. " WITHSHIFTS ,Indicates the support for instructions with shifts" "MOV/shift,Shift LSL 0-3,,Shift other,?..." bitfld.long 0x10 0.--3. " UNPRIV ,Indicates the supported unprivileged instructions" "Not supported,LDRBT/LDRT/STRBT/STRT,LDRBT/LDRT/STRBT/STRT/LDRHT/LDRSBT/LDRSHTSTRHT,?..." tree.end tree "CoreSight Identification Registers" width 6. rgroup.long 0xFE0++0x0F line.long 0x00 "PID0,Peripheral ID0" hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]" line.long 0x04 "PID1,Peripheral ID1" hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]" hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]" line.long 0x08 "PID2,Peripheral ID2" hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision" bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC" hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]" line.long 0x0c "PID3,Peripheral ID3" hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field" hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block" rgroup.long 0xFD0++0x03 line.long 0x00 "PID4,Peripheral Identification Register 4" hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count" hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code" rgroup.long 0xFF0++0x0F line.long 0x00 "CID0,Component ID0 (Preamble)" line.long 0x04 "CID1,Component ID1" hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class" hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble" line.long 0x08 "CID2,Component ID2" line.long 0x0c "CID3,Component ID3" tree.end else newline textline "COREDEBUG component base address not specified" newline endif tree.end tree "Memory Protection Unit" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 15. rgroup.long 0xD90++0x03 line.long 0x00 "MPU_TYPE,MPU Type Register" bitfld.long 0x00 16.--23. " IREGION ,Instruction region" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..." bitfld.long 0x00 8.--15. " DREGION ,Number of regions supported by the MPU" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..." bitfld.long 0x00 0. " SEPARATE ,Indicates support for separate instruction and data address maps" "Not supported,Supported" group.long 0xD94++0x03 line.long 0x00 "MPU_CTRL,MPU Control Register" bitfld.long 0x00 2. " PRIVDEFENA ,Enables the default memory map as a background region for privileged access" "Disabled,Enabled" bitfld.long 0x00 1. " HFNMIENA ,Handlers executing with priority less than 0 access memory with the MPU enabled or with the MPU disabled" "MPU disabled,MPU enabled" bitfld.long 0x00 0. " ENABLE ,Enables the MPU" "Disabled,Enabled" group.long 0xD98++0x03 line.long 0x00 "MPU_RNR,MPU Region Number Register" hexmask.long.byte 0x00 0.--7. 1. " REGION ,Indicates the memory region accessed by MPU_RBAR and MPU_RASR" tree.close "MPU regions" if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x0 group.long 0xD9C++0x03 "Region 0" saveout 0xD98 %l 0x0 line.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x0 line.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 0 (not implemented)" saveout 0xD98 %l 0x0 hide.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x0 hide.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x1 group.long 0xD9C++0x03 "Region 1" saveout 0xD98 %l 0x1 line.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x1 line.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 1 (not implemented)" saveout 0xD98 %l 0x1 hide.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x1 hide.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x2 group.long 0xD9C++0x03 "Region 2" saveout 0xD98 %l 0x2 line.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x2 line.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 2 (not implemented)" saveout 0xD98 %l 0x2 hide.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x2 hide.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x3 group.long 0xD9C++0x03 "Region 3" saveout 0xD98 %l 0x3 line.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x3 line.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 3 (not implemented)" saveout 0xD98 %l 0x3 hide.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x3 hide.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x4 group.long 0xD9C++0x03 "Region 4" saveout 0xD98 %l 0x4 line.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x4 line.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 4 (not implemented)" saveout 0xD98 %l 0x4 hide.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x4 hide.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x5 group.long 0xD9C++0x03 "Region 5" saveout 0xD98 %l 0x5 line.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x5 line.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 5 (not implemented)" saveout 0xD98 %l 0x5 hide.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x5 hide.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x6 group.long 0xD9C++0x03 "Region 6" saveout 0xD98 %l 0x6 line.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x6 line.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 6 (not implemented)" saveout 0xD98 %l 0x6 hide.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x6 hide.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x7 group.long 0xD9C++0x03 "Region 7" saveout 0xD98 %l 0x7 line.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x7 line.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 7 (not implemented)" saveout 0xD98 %l 0x7 hide.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x7 hide.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x8 group.long 0xD9C++0x03 "Region 8" saveout 0xD98 %l 0x8 line.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x8 line.long 0x00 "MPU_RASR8,MPU Region Attribute and Size Register 8" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 8 (not implemented)" saveout 0xD98 %l 0x8 hide.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x8 hide.long 0x00 "MPU_RASR8,MPU Region Attribute and Size Register 8" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x9 group.long 0xD9C++0x03 "Region 9" saveout 0xD98 %l 0x9 line.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x9 line.long 0x00 "MPU_RASR9,MPU Region Attribute and Size Register 9" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 9 (not implemented)" saveout 0xD98 %l 0x9 hide.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x9 hide.long 0x00 "MPU_RASR9,MPU Region Attribute and Size Register 9" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xA group.long 0xD9C++0x03 "Region 10" saveout 0xD98 %l 0xA line.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0xA line.long 0x00 "MPU_RASR10,MPU Region Attribute and Size Register 10" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 10 (not implemented)" saveout 0xD98 %l 0xA hide.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xA hide.long 0x00 "MPU_RASR10,MPU Region Attribute and Size Register 10" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xB group.long 0xD9C++0x03 "Region 11" saveout 0xD98 %l 0xB line.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0xB line.long 0x00 "MPU_RASR11,MPU Region Attribute and Size Register 11" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 11 (not implemented)" saveout 0xD98 %l 0xB hide.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xB hide.long 0x00 "MPU_RASR11,MPU Region Attribute and Size Register 11" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xC group.long 0xD9C++0x03 "Region 12" saveout 0xD98 %l 0xC line.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0xC line.long 0x00 "MPU_RASR12,MPU Region Attribute and Size Register 12" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 12 (not implemented)" saveout 0xD98 %l 0xC hide.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xC hide.long 0x00 "MPU_RASR12,MPU Region Attribute and Size Register 12" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xD group.long 0xD9C++0x03 "Region 13" saveout 0xD98 %l 0xD line.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0xD line.long 0x00 "MPU_RASR13,MPU Region Attribute and Size Register 13" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 13 (not implemented)" saveout 0xD98 %l 0xD hide.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xD hide.long 0x00 "MPU_RASR13,MPU Region Attribute and Size Register 13" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xE group.long 0xD9C++0x03 "Region 14" saveout 0xD98 %l 0xE line.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0xE line.long 0x00 "MPU_RASR14,MPU Region Attribute and Size Register 14" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 14 (not implemented)" saveout 0xD98 %l 0xE hide.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xE hide.long 0x00 "MPU_RASR14,MPU Region Attribute and Size Register 14" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xF group.long 0xD9C++0x03 "Region 15" saveout 0xD98 %l 0xF line.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0xF line.long 0x00 "MPU_RASR15,MPU Region Attribute and Size Register 15" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 15 (not implemented)" saveout 0xD98 %l 0xF hide.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xF hide.long 0x00 "MPU_RASR15,MPU Region Attribute and Size Register 15" textline " " textline " " endif tree.end width 0x0b else newline textline "COREDEBUG component base address not specified" newline endif tree.end tree "Nested Vectored Interrupt Controller" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 6. rgroup.long 0x04++0x03 line.long 0x00 "ICTR,Interrupt Controller Type Register" bitfld.long 0x00 0.--3. " INTLINESNUM ,Total Number of Interrupt" "0-32,33-64,65-96,97-128,129-160,161-192,193-224,225-240,?..." tree "Interrupt Enable Registers" width 23. if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00) group.long 0x100++0x03 line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01) group.long 0x100++0x7 line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02) group.long 0x100++0x0B line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03) group.long 0x100++0x0F line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04) group.long 0x100++0x13 line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05) group.long 0x100++0x17 line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06) group.long 0x100++0x1B line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x18 31. 0x18 31. 0x98 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 30. 0x18 30. 0x98 30. " ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 29. 0x18 29. 0x98 29. " ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 28. 0x18 28. 0x98 28. " ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 27. 0x18 27. 0x98 27. " ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 26. 0x18 26. 0x98 26. " ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 25. 0x18 25. 0x98 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 24. 0x18 24. 0x98 24. " ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 23. 0x18 23. 0x98 23. " ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 22. 0x18 22. 0x98 22. " ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 21. 0x18 21. 0x98 21. " ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 20. 0x18 20. 0x98 20. " ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 19. 0x18 19. 0x98 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 18. 0x18 18. 0x98 18. " ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 17. 0x18 17. 0x98 17. " ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 16. 0x18 16. 0x98 16. " ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 15. 0x18 15. 0x98 15. " ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 14. 0x18 14. 0x98 14. " ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 13. 0x18 13. 0x98 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 12. 0x18 12. 0x98 12. " ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 11. 0x18 11. 0x98 11. " ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 10. 0x18 10. 0x98 10. " ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 9. 0x18 9. 0x98 9. " ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 8. 0x18 8. 0x98 8. " ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 7. 0x18 7. 0x98 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 6. 0x18 6. 0x98 6. " ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 5. 0x18 5. 0x98 5. " ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 4. 0x18 4. 0x98 4. " ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 3. 0x18 3. 0x98 3. " ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 2. 0x18 2. 0x98 2. " ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 1. 0x18 1. 0x98 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 0. 0x18 0. 0x98 0. " ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07) group.long 0x100++0x1F line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x18 31. 0x18 31. 0x98 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 30. 0x18 30. 0x98 30. " ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 29. 0x18 29. 0x98 29. " ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 28. 0x18 28. 0x98 28. " ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 27. 0x18 27. 0x98 27. " ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 26. 0x18 26. 0x98 26. " ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 25. 0x18 25. 0x98 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 24. 0x18 24. 0x98 24. " ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 23. 0x18 23. 0x98 23. " ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 22. 0x18 22. 0x98 22. " ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 21. 0x18 21. 0x98 21. " ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 20. 0x18 20. 0x98 20. " ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 19. 0x18 19. 0x98 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 18. 0x18 18. 0x98 18. " ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 17. 0x18 17. 0x98 17. " ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 16. 0x18 16. 0x98 16. " ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 15. 0x18 15. 0x98 15. " ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 14. 0x18 14. 0x98 14. " ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 13. 0x18 13. 0x98 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 12. 0x18 12. 0x98 12. " ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 11. 0x18 11. 0x98 11. " ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 10. 0x18 10. 0x98 10. " ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 9. 0x18 9. 0x98 9. " ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 8. 0x18 8. 0x98 8. " ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 7. 0x18 7. 0x98 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 6. 0x18 6. 0x98 6. " ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 5. 0x18 5. 0x98 5. " ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 4. 0x18 4. 0x98 4. " ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 3. 0x18 3. 0x98 3. " ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 2. 0x18 2. 0x98 2. " ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 1. 0x18 1. 0x98 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 0. 0x18 0. 0x98 0. " ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x1c "IRQ224_239_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x1c 15. 0x1c 15. 0x9c 15. " ENA239 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 14. 0x1c 14. 0x9c 14. " ENA238 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 13. 0x1c 13. 0x9c 13. " ENA237 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 12. 0x1c 12. 0x9c 12. " ENA236 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 11. 0x1c 11. 0x9c 11. " ENA235 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 10. 0x1c 10. 0x9c 10. " ENA234 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x1c 9. 0x1c 9. 0x9c 9. " ENA233 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 8. 0x1c 8. 0x9c 8. " ENA232 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 7. 0x1c 7. 0x9c 7. " ENA231 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 6. 0x1c 6. 0x9c 6. " ENA230 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 5. 0x1c 5. 0x9c 5. " ENA229 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 4. 0x1c 4. 0x9c 4. " ENA228 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x1c 3. 0x1c 3. 0x9c 3. " ENA227 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 2. 0x1c 2. 0x9c 2. " ENA226 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 1. 0x1c 1. 0x9c 1. " ENA225 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 0. 0x1c 0. 0x9c 0. " ENA224 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" else hgroup.long 0x100++0x1F hide.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" hide.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" hide.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" hide.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" hide.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register" hide.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register" hide.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register" hide.long 0x1c "IRQ224_239_EN_SET/CLR,Interrupt Enable Register" endif tree.end tree "Interrupt Pending Registers" width 23. if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00) group.long 0x200++0x03 line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01) group.long 0x200++0x07 line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02) group.long 0x200++0x0B line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03) group.long 0x200++0x0F line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04) group.long 0x200++0x13 line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05) group.long 0x200++0x17 line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06) group.long 0x200++0x1B line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x18 31. 0x18 31. 0x98 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 30. 0x18 30. 0x98 30. " PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 29. 0x18 29. 0x98 29. " PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 28. 0x18 28. 0x98 28. " PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 27. 0x18 27. 0x98 27. " PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 26. 0x18 26. 0x98 26. " PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 25. 0x18 25. 0x98 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 24. 0x18 24. 0x98 24. " PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 23. 0x18 23. 0x98 23. " PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 22. 0x18 22. 0x98 22. " PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 21. 0x18 21. 0x98 21. " PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 20. 0x18 20. 0x98 20. " PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 19. 0x18 19. 0x98 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 18. 0x18 18. 0x98 18. " PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 17. 0x18 17. 0x98 17. " PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 16. 0x18 16. 0x98 16. " PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 15. 0x18 15. 0x98 15. " PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 14. 0x18 14. 0x98 14. " PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 13. 0x18 13. 0x98 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 12. 0x18 12. 0x98 12. " PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 11. 0x18 11. 0x98 11. " PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 10. 0x18 10. 0x98 10. " PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 9. 0x18 9. 0x98 9. " PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 8. 0x18 8. 0x98 8. " PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 7. 0x18 7. 0x98 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 6. 0x18 6. 0x98 6. " PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 5. 0x18 5. 0x98 5. " PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 4. 0x18 4. 0x98 4. " PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 3. 0x18 3. 0x98 3. " PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 2. 0x18 2. 0x98 2. " PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 1. 0x18 1. 0x98 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 0. 0x18 0. 0x98 0. " PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07) group.long 0x200++0x1F line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x18 31. 0x18 31. 0x98 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 30. 0x18 30. 0x98 30. " PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 29. 0x18 29. 0x98 29. " PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 28. 0x18 28. 0x98 28. " PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 27. 0x18 27. 0x98 27. " PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 26. 0x18 26. 0x98 26. " PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 25. 0x18 25. 0x98 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 24. 0x18 24. 0x98 24. " PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 23. 0x18 23. 0x98 23. " PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 22. 0x18 22. 0x98 22. " PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 21. 0x18 21. 0x98 21. " PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 20. 0x18 20. 0x98 20. " PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 19. 0x18 19. 0x98 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 18. 0x18 18. 0x98 18. " PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 17. 0x18 17. 0x98 17. " PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 16. 0x18 16. 0x98 16. " PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 15. 0x18 15. 0x98 15. " PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 14. 0x18 14. 0x98 14. " PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 13. 0x18 13. 0x98 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 12. 0x18 12. 0x98 12. " PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 11. 0x18 11. 0x98 11. " PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 10. 0x18 10. 0x98 10. " PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 9. 0x18 9. 0x98 9. " PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 8. 0x18 8. 0x98 8. " PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 7. 0x18 7. 0x98 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 6. 0x18 6. 0x98 6. " PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 5. 0x18 5. 0x98 5. " PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 4. 0x18 4. 0x98 4. " PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 3. 0x18 3. 0x98 3. " PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 2. 0x18 2. 0x98 2. " PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 1. 0x18 1. 0x98 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 0. 0x18 0. 0x98 0. " PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x1c "IRQ224_239_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x1c 15. 0x1c 15. 0x9c 15. " PEN239 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 14. 0x1c 14. 0x9c 14. " PEN238 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 13. 0x1c 13. 0x9c 13. " PEN237 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 12. 0x1c 12. 0x9c 12. " PEN236 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 11. 0x1c 11. 0x9c 11. " PEN235 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 10. 0x1c 10. 0x9c 10. " PEN234 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x1c 9. 0x1c 9. 0x9c 9. " PEN233 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 8. 0x1c 8. 0x9c 8. " PEN232 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 7. 0x1c 7. 0x9c 7. " PEN231 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 6. 0x1c 6. 0x9c 6. " PEN230 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 5. 0x1c 5. 0x9c 5. " PEN229 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 4. 0x1c 4. 0x9c 4. " PEN228 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x1c 3. 0x1c 3. 0x9c 3. " PEN227 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 2. 0x1c 2. 0x9c 2. " PEN226 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 1. 0x1c 1. 0x9c 1. " PEN225 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 0. 0x1c 0. 0x9c 0. " PEN224 ,Interrupt Set/Clear Pending" "Not pending,Pending" else hgroup.long 0x200++0x1F hide.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x1c "IRQ224_239_PEN_SET/CLR,Interrupt Pending Register" endif tree.end tree "Interrupt Active Bit Registers" width 9. if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00) rgroup.long 0x300++0x03 line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01) rgroup.long 0x300++0x07 line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02) rgroup.long 0x300++0x0B line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" line.long 0x08 "ACTIVE3,Active Bit Register 3" bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03) rgroup.long 0x300++0x0F line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" line.long 0x08 "ACTIVE3,Active Bit Register 3" bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active" line.long 0x0c "ACTIVE4,Active Bit Register 4" bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04) rgroup.long 0x300++0x13 line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" line.long 0x08 "ACTIVE3,Active Bit Register 3" bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active" line.long 0x0c "ACTIVE4,Active Bit Register 4" bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active" line.long 0x10 "ACTIVE5,Active Bit Register 5" bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05) rgroup.long 0x300++0x17 line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" line.long 0x08 "ACTIVE3,Active Bit Register 3" bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active" line.long 0x0c "ACTIVE4,Active Bit Register 4" bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active" line.long 0x10 "ACTIVE5,Active Bit Register 5" bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active" line.long 0x14 "ACTIVE6,Active Bit Register 6" bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06) rgroup.long 0x300++0x1B line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" line.long 0x08 "ACTIVE3,Active Bit Register 3" bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active" line.long 0x0c "ACTIVE4,Active Bit Register 4" bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active" line.long 0x10 "ACTIVE5,Active Bit Register 5" bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active" line.long 0x14 "ACTIVE6,Active Bit Register 6" bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active" line.long 0x18 "ACTIVE7,Active Bit Register 7" bitfld.long 0x18 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 30. " ACTIVE222 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 29. " ACTIVE221 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 28. " ACTIVE220 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 27. " ACTIVE219 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 26. " ACTIVE218 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 24. " ACTIVE216 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 23. " ACTIVE215 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 22. " ACTIVE214 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 21. " ACTIVE213 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 20. " ACTIVE212 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 18. " ACTIVE210 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 17. " ACTIVE209 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 16. " ACTIVE208 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 15. " ACTIVE207 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 14. " ACTIVE206 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 12. " ACTIVE204 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 11. " ACTIVE203 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 10. " ACTIVE202 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 9. " ACTIVE201 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 8. " ACTIVE200 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 6. " ACTIVE198 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 5. " ACTIVE197 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 4. " ACTIVE196 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 3. " ACTIVE195 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 2. " ACTIVE194 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 0. " ACTIVE192 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07) rgroup.long 0x300++0x1F line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" line.long 0x08 "ACTIVE3,Active Bit Register 3" bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active" line.long 0x0c "ACTIVE4,Active Bit Register 4" bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active" line.long 0x10 "ACTIVE5,Active Bit Register 5" bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active" line.long 0x14 "ACTIVE6,Active Bit Register 6" bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active" line.long 0x18 "ACTIVE7,Active Bit Register 7" bitfld.long 0x18 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 30. " ACTIVE222 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 29. " ACTIVE221 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 28. " ACTIVE220 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 27. " ACTIVE219 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 26. " ACTIVE218 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 24. " ACTIVE216 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 23. " ACTIVE215 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 22. " ACTIVE214 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 21. " ACTIVE213 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 20. " ACTIVE212 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 18. " ACTIVE210 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 17. " ACTIVE209 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 16. " ACTIVE208 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 15. " ACTIVE207 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 14. " ACTIVE206 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 12. " ACTIVE204 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 11. " ACTIVE203 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 10. " ACTIVE202 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 9. " ACTIVE201 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 8. " ACTIVE200 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 6. " ACTIVE198 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 5. " ACTIVE197 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 4. " ACTIVE196 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 3. " ACTIVE195 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 2. " ACTIVE194 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 0. " ACTIVE192 ,Interrupt Active Flag" "Not active,Active" line.long 0x1c "ACTIVE8,Active Bit Register 8" bitfld.long 0x1c 15. " ACTIVE239 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 14. " ACTIVE238 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 13. " ACTIVE237 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 12. " ACTIVE236 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 11. " ACTIVE235 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 10. " ACTIVE234 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x1c 9. " ACTIVE233 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 8. " ACTIVE232 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 7. " ACTIVE231 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 6. " ACTIVE230 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 5. " ACTIVE229 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 4. " ACTIVE228 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x1c 3. " ACTIVE227 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 2. " ACTIVE226 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 1. " ACTIVE225 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 0. " ACTIVE224 ,Interrupt Active Flag" "Not active,Active" else hgroup.long 0x300++0x1F hide.long 0x00 "ACTIVE1,Active Bit Register 1" hide.long 0x04 "ACTIVE2,Active Bit Register 2" hide.long 0x08 "ACTIVE3,Active Bit Register 3" hide.long 0x0c "ACTIVE4,Active Bit Register 4" hide.long 0x10 "ACTIVE5,Active Bit Register 5" hide.long 0x14 "ACTIVE6,Active Bit Register 6" hide.long 0x18 "ACTIVE7,Active Bit Register 7" hide.long 0x1c "ACTIVE8,Active Bit Register 8" endif tree.end tree "Interrupt Priority Registers" if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00) group.long 0x400++0x1F line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01) group.long 0x400++0x3F line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02) group.long 0x400++0x5F line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" line.long 0x40 "IPR16,Interrupt Priority Register" hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority" hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority" hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority" hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority" line.long 0x44 "IPR17,Interrupt Priority Register" hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority" hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority" hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority" hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority" line.long 0x48 "IPR18,Interrupt Priority Register" hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority" hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority" hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority" hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority" line.long 0x4C "IPR19,Interrupt Priority Register" hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority" hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority" hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority" hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority" line.long 0x50 "IPR20,Interrupt Priority Register" hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority" hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority" hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority" hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority" line.long 0x54 "IPR21,Interrupt Priority Register" hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority" hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority" hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority" hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority" line.long 0x58 "IPR22,Interrupt Priority Register" hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority" hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority" hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority" hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority" line.long 0x5C "IPR23,Interrupt Priority Register" hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority" hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority" hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority" hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03) group.long 0x400++0x7F line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" line.long 0x40 "IPR16,Interrupt Priority Register" hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority" hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority" hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority" hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority" line.long 0x44 "IPR17,Interrupt Priority Register" hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority" hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority" hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority" hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority" line.long 0x48 "IPR18,Interrupt Priority Register" hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority" hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority" hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority" hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority" line.long 0x4C "IPR19,Interrupt Priority Register" hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority" hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority" hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority" hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority" line.long 0x50 "IPR20,Interrupt Priority Register" hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority" hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority" hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority" hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority" line.long 0x54 "IPR21,Interrupt Priority Register" hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority" hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority" hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority" hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority" line.long 0x58 "IPR22,Interrupt Priority Register" hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority" hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority" hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority" hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority" line.long 0x5C "IPR23,Interrupt Priority Register" hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority" hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority" hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority" hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority" line.long 0x60 "IPR24,Interrupt Priority Register" hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority" hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority" hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority" hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority" line.long 0x64 "IPR25,Interrupt Priority Register" hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority" hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority" hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority" hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority" line.long 0x68 "IPR26,Interrupt Priority Register" hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority" hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority" hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority" hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority" line.long 0x6C "IPR27,Interrupt Priority Register" hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority" hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority" hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority" hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority" line.long 0x70 "IPR28,Interrupt Priority Register" hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority" hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority" hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority" hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority" line.long 0x74 "IPR29,Interrupt Priority Register" hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority" hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority" hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority" hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority" line.long 0x78 "IPR30,Interrupt Priority Register" hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority" hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority" hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority" hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority" line.long 0x7C "IPR31,Interrupt Priority Register" hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority" hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority" hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority" hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04) group.long 0x400++0x9F line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" line.long 0x40 "IPR16,Interrupt Priority Register" hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority" hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority" hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority" hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority" line.long 0x44 "IPR17,Interrupt Priority Register" hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority" hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority" hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority" hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority" line.long 0x48 "IPR18,Interrupt Priority Register" hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority" hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority" hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority" hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority" line.long 0x4C "IPR19,Interrupt Priority Register" hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority" hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority" hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority" hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority" line.long 0x50 "IPR20,Interrupt Priority Register" hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority" hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority" hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority" hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority" line.long 0x54 "IPR21,Interrupt Priority Register" hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority" hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority" hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority" hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority" line.long 0x58 "IPR22,Interrupt Priority Register" hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority" hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority" hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority" hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority" line.long 0x5C "IPR23,Interrupt Priority Register" hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority" hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority" hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority" hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority" line.long 0x60 "IPR24,Interrupt Priority Register" hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority" hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority" hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority" hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority" line.long 0x64 "IPR25,Interrupt Priority Register" hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority" hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority" hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority" hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority" line.long 0x68 "IPR26,Interrupt Priority Register" hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority" hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority" hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority" hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority" line.long 0x6C "IPR27,Interrupt Priority Register" hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority" hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority" hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority" hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority" line.long 0x70 "IPR28,Interrupt Priority Register" hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority" hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority" hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority" hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority" line.long 0x74 "IPR29,Interrupt Priority Register" hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority" hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority" hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority" hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority" line.long 0x78 "IPR30,Interrupt Priority Register" hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority" hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority" hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority" hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority" line.long 0x7C "IPR31,Interrupt Priority Register" hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority" hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority" hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority" hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority" line.long 0x80 "IPR32,Interrupt Priority Register" hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority" hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority" hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority" hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority" line.long 0x84 "IPR33,Interrupt Priority Register" hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority" hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority" hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority" hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority" line.long 0x88 "IPR34,Interrupt Priority Register" hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority" hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority" hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority" hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority" line.long 0x8C "IPR35,Interrupt Priority Register" hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority" hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority" hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority" hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority" line.long 0x90 "IPR36,Interrupt Priority Register" hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority" hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority" hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority" hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority" line.long 0x94 "IPR37,Interrupt Priority Register" hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority" hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority" hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority" hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority" line.long 0x98 "IPR38,Interrupt Priority Register" hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority" hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority" hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority" hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority" line.long 0x9C "IPR39,Interrupt Priority Register" hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority" hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority" hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority" hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05) group.long 0x400++0xBF line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" line.long 0x40 "IPR16,Interrupt Priority Register" hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority" hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority" hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority" hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority" line.long 0x44 "IPR17,Interrupt Priority Register" hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority" hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority" hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority" hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority" line.long 0x48 "IPR18,Interrupt Priority Register" hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority" hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority" hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority" hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority" line.long 0x4C "IPR19,Interrupt Priority Register" hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority" hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority" hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority" hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority" line.long 0x50 "IPR20,Interrupt Priority Register" hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority" hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority" hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority" hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority" line.long 0x54 "IPR21,Interrupt Priority Register" hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority" hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority" hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority" hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority" line.long 0x58 "IPR22,Interrupt Priority Register" hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority" hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority" hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority" hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority" line.long 0x5C "IPR23,Interrupt Priority Register" hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority" hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority" hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority" hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority" line.long 0x60 "IPR24,Interrupt Priority Register" hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority" hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority" hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority" hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority" line.long 0x64 "IPR25,Interrupt Priority Register" hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority" hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority" hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority" hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority" line.long 0x68 "IPR26,Interrupt Priority Register" hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority" hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority" hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority" hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority" line.long 0x6C "IPR27,Interrupt Priority Register" hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority" hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority" hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority" hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority" line.long 0x70 "IPR28,Interrupt Priority Register" hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority" hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority" hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority" hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority" line.long 0x74 "IPR29,Interrupt Priority Register" hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority" hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority" hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority" hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority" line.long 0x78 "IPR30,Interrupt Priority Register" hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority" hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority" hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority" hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority" line.long 0x7C "IPR31,Interrupt Priority Register" hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority" hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority" hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority" hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority" line.long 0x80 "IPR32,Interrupt Priority Register" hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority" hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority" hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority" hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority" line.long 0x84 "IPR33,Interrupt Priority Register" hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority" hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority" hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority" hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority" line.long 0x88 "IPR34,Interrupt Priority Register" hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority" hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority" hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority" hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority" line.long 0x8C "IPR35,Interrupt Priority Register" hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority" hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority" hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority" hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority" line.long 0x90 "IPR36,Interrupt Priority Register" hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority" hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority" hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority" hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority" line.long 0x94 "IPR37,Interrupt Priority Register" hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority" hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority" hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority" hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority" line.long 0x98 "IPR38,Interrupt Priority Register" hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority" hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority" hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority" hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority" line.long 0x9C "IPR39,Interrupt Priority Register" hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority" hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority" hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority" hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority" line.long 0xA0 "IPR40,Interrupt Priority Register" hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority" hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority" hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority" hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority" line.long 0xA4 "IPR41,Interrupt Priority Register" hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority" hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority" hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority" hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority" line.long 0xA8 "IPR42,Interrupt Priority Register" hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority" hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority" hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority" hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority" line.long 0xAC "IPR43,Interrupt Priority Register" hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority" hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority" hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority" hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority" line.long 0xB0 "IPR44,Interrupt Priority Register" hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority" hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority" hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority" hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority" line.long 0xB4 "IPR45,Interrupt Priority Register" hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority" hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority" hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority" hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority" line.long 0xB8 "IPR46,Interrupt Priority Register" hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority" hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority" hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority" hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority" line.long 0xBC "IPR47,Interrupt Priority Register" hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority" hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority" hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority" hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06) group.long 0x400++0xDF line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" line.long 0x40 "IPR16,Interrupt Priority Register" hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority" hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority" hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority" hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority" line.long 0x44 "IPR17,Interrupt Priority Register" hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority" hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority" hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority" hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority" line.long 0x48 "IPR18,Interrupt Priority Register" hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority" hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority" hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority" hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority" line.long 0x4C "IPR19,Interrupt Priority Register" hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority" hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority" hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority" hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority" line.long 0x50 "IPR20,Interrupt Priority Register" hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority" hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority" hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority" hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority" line.long 0x54 "IPR21,Interrupt Priority Register" hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority" hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority" hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority" hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority" line.long 0x58 "IPR22,Interrupt Priority Register" hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority" hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority" hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority" hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority" line.long 0x5C "IPR23,Interrupt Priority Register" hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority" hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority" hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority" hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority" line.long 0x60 "IPR24,Interrupt Priority Register" hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority" hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority" hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority" hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority" line.long 0x64 "IPR25,Interrupt Priority Register" hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority" hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority" hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority" hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority" line.long 0x68 "IPR26,Interrupt Priority Register" hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority" hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority" hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority" hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority" line.long 0x6C "IPR27,Interrupt Priority Register" hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority" hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority" hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority" hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority" line.long 0x70 "IPR28,Interrupt Priority Register" hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority" hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority" hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority" hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority" line.long 0x74 "IPR29,Interrupt Priority Register" hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority" hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority" hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority" hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority" line.long 0x78 "IPR30,Interrupt Priority Register" hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority" hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority" hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority" hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority" line.long 0x7C "IPR31,Interrupt Priority Register" hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority" hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority" hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority" hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority" line.long 0x80 "IPR32,Interrupt Priority Register" hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority" hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority" hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority" hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority" line.long 0x84 "IPR33,Interrupt Priority Register" hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority" hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority" hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority" hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority" line.long 0x88 "IPR34,Interrupt Priority Register" hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority" hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority" hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority" hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority" line.long 0x8C "IPR35,Interrupt Priority Register" hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority" hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority" hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority" hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority" line.long 0x90 "IPR36,Interrupt Priority Register" hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority" hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority" hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority" hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority" line.long 0x94 "IPR37,Interrupt Priority Register" hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority" hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority" hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority" hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority" line.long 0x98 "IPR38,Interrupt Priority Register" hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority" hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority" hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority" hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority" line.long 0x9C "IPR39,Interrupt Priority Register" hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority" hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority" hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority" hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority" line.long 0xA0 "IPR40,Interrupt Priority Register" hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority" hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority" hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority" hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority" line.long 0xA4 "IPR41,Interrupt Priority Register" hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority" hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority" hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority" hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority" line.long 0xA8 "IPR42,Interrupt Priority Register" hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority" hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority" hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority" hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority" line.long 0xAC "IPR43,Interrupt Priority Register" hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority" hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority" hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority" hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority" line.long 0xB0 "IPR44,Interrupt Priority Register" hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority" hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority" hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority" hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority" line.long 0xB4 "IPR45,Interrupt Priority Register" hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority" hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority" hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority" hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority" line.long 0xB8 "IPR46,Interrupt Priority Register" hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority" hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority" hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority" hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority" line.long 0xBC "IPR47,Interrupt Priority Register" hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority" hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority" hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority" hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority" line.long 0xC0 "IPR48,Interrupt Priority Register" hexmask.long.byte 0xC0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority" hexmask.long.byte 0xC0 16.--23. 1. " PRI_194 ,Interrupt 194 Priority" hexmask.long.byte 0xC0 8.--15. 1. " PRI_193 ,Interrupt 193 Priority" hexmask.long.byte 0xC0 0.--7. 1. " PRI_192 ,Interrupt 192 Priority" line.long 0xC4 "IPR49,Interrupt Priority Register" hexmask.long.byte 0xC4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority" hexmask.long.byte 0xC4 16.--23. 1. " PRI_198 ,Interrupt 198 Priority" hexmask.long.byte 0xC4 8.--15. 1. " PRI_197 ,Interrupt 197 Priority" hexmask.long.byte 0xC4 0.--7. 1. " PRI_196 ,Interrupt 196 Priority" line.long 0xC8 "IPR50,Interrupt Priority Register" hexmask.long.byte 0xC8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority" hexmask.long.byte 0xC8 16.--23. 1. " PRI_202 ,Interrupt 202 Priority" hexmask.long.byte 0xC8 8.--15. 1. " PRI_201 ,Interrupt 201 Priority" hexmask.long.byte 0xC8 0.--7. 1. " PRI_200 ,Interrupt 200 Priority" line.long 0xCC "IPR51,Interrupt Priority Register" hexmask.long.byte 0xCC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority" hexmask.long.byte 0xCC 16.--23. 1. " PRI_206 ,Interrupt 206 Priority" hexmask.long.byte 0xCC 8.--15. 1. " PRI_205 ,Interrupt 205 Priority" hexmask.long.byte 0xCC 0.--7. 1. " PRI_204 ,Interrupt 204 Priority" line.long 0xD0 "IPR52,Interrupt Priority Register" hexmask.long.byte 0xD0 24.--31. 1. " PRI_211 ,Interrupt 211 Priority" hexmask.long.byte 0xD0 16.--23. 1. " PRI_210 ,Interrupt 210 Priority" hexmask.long.byte 0xD0 8.--15. 1. " PRI_209 ,Interrupt 209 Priority" hexmask.long.byte 0xD0 0.--7. 1. " PRI_208 ,Interrupt 208 Priority" line.long 0xD4 "IPR53,Interrupt Priority Register" hexmask.long.byte 0xD4 24.--31. 1. " PRI_215 ,Interrupt 215 Priority" hexmask.long.byte 0xD4 16.--23. 1. " PRI_214 ,Interrupt 214 Priority" hexmask.long.byte 0xD4 8.--15. 1. " PRI_213 ,Interrupt 213 Priority" hexmask.long.byte 0xD4 0.--7. 1. " PRI_212 ,Interrupt 212 Priority" line.long 0xD8 "IPR54,Interrupt Priority Register" hexmask.long.byte 0xD8 24.--31. 1. " PRI_219 ,Interrupt 219 Priority" hexmask.long.byte 0xD8 16.--23. 1. " PRI_218 ,Interrupt 218 Priority" hexmask.long.byte 0xD8 8.--15. 1. " PRI_217 ,Interrupt 217 Priority" hexmask.long.byte 0xD8 0.--7. 1. " PRI_216 ,Interrupt 216 Priority" line.long 0xDC "IPR55,Interrupt Priority Register" hexmask.long.byte 0xDC 24.--31. 1. " PRI_223 ,Interrupt 223 Priority" hexmask.long.byte 0xDC 16.--23. 1. " PRI_222 ,Interrupt 222 Priority" hexmask.long.byte 0xDC 8.--15. 1. " PRI_221 ,Interrupt 221 Priority" hexmask.long.byte 0xDC 0.--7. 1. " PRI_220 ,Interrupt 220 Priority" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07) group.long 0x400++0xEF line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" line.long 0x40 "IPR16,Interrupt Priority Register" hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority" hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority" hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority" hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority" line.long 0x44 "IPR17,Interrupt Priority Register" hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority" hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority" hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority" hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority" line.long 0x48 "IPR18,Interrupt Priority Register" hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority" hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority" hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority" hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority" line.long 0x4C "IPR19,Interrupt Priority Register" hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority" hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority" hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority" hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority" line.long 0x50 "IPR20,Interrupt Priority Register" hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority" hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority" hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority" hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority" line.long 0x54 "IPR21,Interrupt Priority Register" hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority" hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority" hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority" hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority" line.long 0x58 "IPR22,Interrupt Priority Register" hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority" hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority" hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority" hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority" line.long 0x5C "IPR23,Interrupt Priority Register" hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority" hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority" hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority" hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority" line.long 0x60 "IPR24,Interrupt Priority Register" hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority" hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority" hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority" hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority" line.long 0x64 "IPR25,Interrupt Priority Register" hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority" hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority" hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority" hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority" line.long 0x68 "IPR26,Interrupt Priority Register" hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority" hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority" hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority" hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority" line.long 0x6C "IPR27,Interrupt Priority Register" hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority" hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority" hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority" hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority" line.long 0x70 "IPR28,Interrupt Priority Register" hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority" hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority" hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority" hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority" line.long 0x74 "IPR29,Interrupt Priority Register" hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority" hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority" hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority" hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority" line.long 0x78 "IPR30,Interrupt Priority Register" hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority" hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority" hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority" hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority" line.long 0x7C "IPR31,Interrupt Priority Register" hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority" hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority" hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority" hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority" line.long 0x80 "IPR32,Interrupt Priority Register" hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority" hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority" hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority" hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority" line.long 0x84 "IPR33,Interrupt Priority Register" hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority" hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority" hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority" hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority" line.long 0x88 "IPR34,Interrupt Priority Register" hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority" hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority" hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority" hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority" line.long 0x8C "IPR35,Interrupt Priority Register" hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority" hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority" hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority" hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority" line.long 0x90 "IPR36,Interrupt Priority Register" hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority" hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority" hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority" hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority" line.long 0x94 "IPR37,Interrupt Priority Register" hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority" hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority" hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority" hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority" line.long 0x98 "IPR38,Interrupt Priority Register" hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority" hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority" hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority" hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority" line.long 0x9C "IPR39,Interrupt Priority Register" hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority" hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority" hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority" hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority" line.long 0xA0 "IPR40,Interrupt Priority Register" hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority" hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority" hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority" hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority" line.long 0xA4 "IPR41,Interrupt Priority Register" hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority" hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority" hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority" hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority" line.long 0xA8 "IPR42,Interrupt Priority Register" hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority" hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority" hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority" hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority" line.long 0xAC "IPR43,Interrupt Priority Register" hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority" hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority" hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority" hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority" line.long 0xB0 "IPR44,Interrupt Priority Register" hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority" hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority" hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority" hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority" line.long 0xB4 "IPR45,Interrupt Priority Register" hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority" hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority" hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority" hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority" line.long 0xB8 "IPR46,Interrupt Priority Register" hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority" hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority" hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority" hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority" line.long 0xBC "IPR47,Interrupt Priority Register" hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority" hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority" hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority" hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority" line.long 0xC0 "IPR48,Interrupt Priority Register" hexmask.long.byte 0xC0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority" hexmask.long.byte 0xC0 16.--23. 1. " PRI_194 ,Interrupt 194 Priority" hexmask.long.byte 0xC0 8.--15. 1. " PRI_193 ,Interrupt 193 Priority" hexmask.long.byte 0xC0 0.--7. 1. " PRI_192 ,Interrupt 192 Priority" line.long 0xC4 "IPR49,Interrupt Priority Register" hexmask.long.byte 0xC4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority" hexmask.long.byte 0xC4 16.--23. 1. " PRI_198 ,Interrupt 198 Priority" hexmask.long.byte 0xC4 8.--15. 1. " PRI_197 ,Interrupt 197 Priority" hexmask.long.byte 0xC4 0.--7. 1. " PRI_196 ,Interrupt 196 Priority" line.long 0xC8 "IPR50,Interrupt Priority Register" hexmask.long.byte 0xC8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority" hexmask.long.byte 0xC8 16.--23. 1. " PRI_202 ,Interrupt 202 Priority" hexmask.long.byte 0xC8 8.--15. 1. " PRI_201 ,Interrupt 201 Priority" hexmask.long.byte 0xC8 0.--7. 1. " PRI_200 ,Interrupt 200 Priority" line.long 0xCC "IPR51,Interrupt Priority Register" hexmask.long.byte 0xCC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority" hexmask.long.byte 0xCC 16.--23. 1. " PRI_206 ,Interrupt 206 Priority" hexmask.long.byte 0xCC 8.--15. 1. " PRI_205 ,Interrupt 205 Priority" hexmask.long.byte 0xCC 0.--7. 1. " PRI_204 ,Interrupt 204 Priority" line.long 0xD0 "IPR52,Interrupt Priority Register" hexmask.long.byte 0xD0 24.--31. 1. " PRI_211 ,Interrupt 211 Priority" hexmask.long.byte 0xD0 16.--23. 1. " PRI_210 ,Interrupt 210 Priority" hexmask.long.byte 0xD0 8.--15. 1. " PRI_209 ,Interrupt 209 Priority" hexmask.long.byte 0xD0 0.--7. 1. " PRI_208 ,Interrupt 208 Priority" line.long 0xD4 "IPR53,Interrupt Priority Register" hexmask.long.byte 0xD4 24.--31. 1. " PRI_215 ,Interrupt 215 Priority" hexmask.long.byte 0xD4 16.--23. 1. " PRI_214 ,Interrupt 214 Priority" hexmask.long.byte 0xD4 8.--15. 1. " PRI_213 ,Interrupt 213 Priority" hexmask.long.byte 0xD4 0.--7. 1. " PRI_212 ,Interrupt 212 Priority" line.long 0xD8 "IPR54,Interrupt Priority Register" hexmask.long.byte 0xD8 24.--31. 1. " PRI_219 ,Interrupt 219 Priority" hexmask.long.byte 0xD8 16.--23. 1. " PRI_218 ,Interrupt 218 Priority" hexmask.long.byte 0xD8 8.--15. 1. " PRI_217 ,Interrupt 217 Priority" hexmask.long.byte 0xD8 0.--7. 1. " PRI_216 ,Interrupt 216 Priority" line.long 0xDC "IPR55,Interrupt Priority Register" hexmask.long.byte 0xDC 24.--31. 1. " PRI_223 ,Interrupt 223 Priority" hexmask.long.byte 0xDC 16.--23. 1. " PRI_222 ,Interrupt 222 Priority" hexmask.long.byte 0xDC 8.--15. 1. " PRI_221 ,Interrupt 221 Priority" hexmask.long.byte 0xDC 0.--7. 1. " PRI_220 ,Interrupt 220 Priority" line.long 0xE0 "IPR56,Interrupt Priority Register" hexmask.long.byte 0xE0 24.--31. 1. " PRI_227 ,Interrupt 227 Priority" hexmask.long.byte 0xE0 16.--23. 1. " PRI_226 ,Interrupt 226 Priority" hexmask.long.byte 0xE0 8.--15. 1. " PRI_225 ,Interrupt 225 Priority" hexmask.long.byte 0xE0 0.--7. 1. " PRI_224 ,Interrupt 224 Priority" line.long 0xE4 "IPR57,Interrupt Priority Register" hexmask.long.byte 0xE4 24.--31. 1. " PRI_231 ,Interrupt 231 Priority" hexmask.long.byte 0xE4 16.--23. 1. " PRI_230 ,Interrupt 230 Priority" hexmask.long.byte 0xE4 8.--15. 1. " PRI_229 ,Interrupt 229 Priority" hexmask.long.byte 0xE4 0.--7. 1. " PRI_228 ,Interrupt 228 Priority" line.long 0xE8 "IPR58,Interrupt Priority Register" hexmask.long.byte 0xE8 24.--31. 1. " PRI_235 ,Interrupt 235 Priority" hexmask.long.byte 0xE8 16.--23. 1. " PRI_234 ,Interrupt 234 Priority" hexmask.long.byte 0xE8 8.--15. 1. " PRI_233 ,Interrupt 233 Priority" hexmask.long.byte 0xE8 0.--7. 1. " PRI_232 ,Interrupt 232 Priority" line.long 0xEC "IPR59,Interrupt Priority Register" hexmask.long.byte 0xEC 24.--31. 1. " PRI_239 ,Interrupt 239 Priority" hexmask.long.byte 0xEC 16.--23. 1. " PRI_238 ,Interrupt 238 Priority" hexmask.long.byte 0xEC 8.--15. 1. " PRI_237 ,Interrupt 237 Priority" hexmask.long.byte 0xEC 0.--7. 1. " PRI_236 ,Interrupt 236 Priority" else hgroup.long 0x400++0xEF hide.long 0x0 "IPR0,Interrupt Priority Register" hide.long 0x4 "IPR1,Interrupt Priority Register" hide.long 0x8 "IPR2,Interrupt Priority Register" hide.long 0xC "IPR3,Interrupt Priority Register" hide.long 0x10 "IPR4,Interrupt Priority Register" hide.long 0x14 "IPR5,Interrupt Priority Register" hide.long 0x18 "IPR6,Interrupt Priority Register" hide.long 0x1C "IPR7,Interrupt Priority Register" hide.long 0x20 "IPR8,Interrupt Priority Register" hide.long 0x24 "IPR9,Interrupt Priority Register" hide.long 0x28 "IPR10,Interrupt Priority Register" hide.long 0x2C "IPR11,Interrupt Priority Register" hide.long 0x30 "IPR12,Interrupt Priority Register" hide.long 0x34 "IPR13,Interrupt Priority Register" hide.long 0x38 "IPR14,Interrupt Priority Register" hide.long 0x3C "IPR15,Interrupt Priority Register" hide.long 0x40 "IPR16,Interrupt Priority Register" hide.long 0x44 "IPR17,Interrupt Priority Register" hide.long 0x48 "IPR18,Interrupt Priority Register" hide.long 0x4C "IPR19,Interrupt Priority Register" hide.long 0x50 "IPR20,Interrupt Priority Register" hide.long 0x54 "IPR21,Interrupt Priority Register" hide.long 0x58 "IPR22,Interrupt Priority Register" hide.long 0x5C "IPR23,Interrupt Priority Register" hide.long 0x60 "IPR24,Interrupt Priority Register" hide.long 0x64 "IPR25,Interrupt Priority Register" hide.long 0x68 "IPR26,Interrupt Priority Register" hide.long 0x6C "IPR27,Interrupt Priority Register" hide.long 0x70 "IPR28,Interrupt Priority Register" hide.long 0x74 "IPR29,Interrupt Priority Register" hide.long 0x78 "IPR30,Interrupt Priority Register" hide.long 0x7C "IPR31,Interrupt Priority Register" hide.long 0x80 "IPR32,Interrupt Priority Register" hide.long 0x84 "IPR33,Interrupt Priority Register" hide.long 0x88 "IPR34,Interrupt Priority Register" hide.long 0x8C "IPR35,Interrupt Priority Register" hide.long 0x90 "IPR36,Interrupt Priority Register" hide.long 0x94 "IPR37,Interrupt Priority Register" hide.long 0x98 "IPR38,Interrupt Priority Register" hide.long 0x9C "IPR39,Interrupt Priority Register" hide.long 0xA0 "IPR40,Interrupt Priority Register" hide.long 0xA4 "IPR41,Interrupt Priority Register" hide.long 0xA8 "IPR42,Interrupt Priority Register" hide.long 0xAC "IPR43,Interrupt Priority Register" hide.long 0xB0 "IPR44,Interrupt Priority Register" hide.long 0xB4 "IPR45,Interrupt Priority Register" hide.long 0xB8 "IPR46,Interrupt Priority Register" hide.long 0xBC "IPR47,Interrupt Priority Register" hide.long 0xC0 "IPR48,Interrupt Priority Register" hide.long 0xC4 "IPR49,Interrupt Priority Register" hide.long 0xC8 "IPR50,Interrupt Priority Register" hide.long 0xCC "IPR51,Interrupt Priority Register" hide.long 0xD0 "IPR52,Interrupt Priority Register" hide.long 0xD4 "IPR53,Interrupt Priority Register" hide.long 0xD8 "IPR54,Interrupt Priority Register" hide.long 0xDC "IPR55,Interrupt Priority Register" hide.long 0xE0 "IPR56,Interrupt Priority Register" hide.long 0xE4 "IPR57,Interrupt Priority Register" hide.long 0xE8 "IPR58,Interrupt Priority Register" hide.long 0xEC "IPR59,Interrupt Priority Register" endif tree.end width 0x0b else newline textline "COREDEBUG component base address not specified" newline endif tree.end tree "Debug" tree "Core Debug" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 7. if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDF0))&0x20001)==0x20000) group 0xDF0++0x03 line.long 0x00 "DHCSR,Debug Halting Control and Status Register" bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset" bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not read,Read" textline " " bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 19. " S_LOCKUP/DBGKEY ,Core running and Lockup/Debug Key" "Not running,Running" bitfld.long 0x00 18. " S_SLEEP/DBGKEY ,Core is sleeping/Debug Key" "Not sleeping,Sleeping" textline " " bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted" bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register Read/Write on the Debug Core Register Selector/Debug Key" "Not available,Available" textline " " bitfld.long 0x00 3. " C_MASKINTS ,Interrupts Mask" "Not masked,Masked" bitfld.long 0x00 1. " C_HALT ,Core Halted" "Not halted,Halted" textline " " bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled" elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDF0))&0x20001)==0x20001) group 0xDF0++0x03 line.long 0x00 "DHCSR,Debug Halting Control and Status Register" bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset" bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not read,Read" textline " " bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 19. " S_LOCKUP/DBGKEY ,Core running and Lockup/Debug Key" "Not running,Running" bitfld.long 0x00 18. " S_SLEEP/DBGKEY ,Core is sleeping/Debug Key" "Not sleeping,Sleeping" textline " " bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted" bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register Read/Write on the Debug Core Register Selector/Debug Key" "Not available,Available" textline " " bitfld.long 0x00 5. " C_SNAPSTALL ,Halting debug to gain control of the core" "Disabled,Enabled" bitfld.long 0x00 3. " C_MASKINTS ,Interrupts Mask" "Not masked,Masked" textline " " bitfld.long 0x00 2. " C_STEP ,Core Step" "No step,Step" bitfld.long 0x00 1. " C_HALT ,Core Halted" "Not halted,Halted" textline " " bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled" elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDF0))&0x20001)==0x0) group 0xDF0++0x03 line.long 0x00 "DHCSR,Debug Halting Control and Status Register" bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset" bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not read,Read" textline " " bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 19. " S_LOCKUP/DBGKEY ,Core running and Lockup/Debug Key" "Not running,Running" bitfld.long 0x00 18. " S_SLEEP/DBGKEY ,Core is sleeping/Debug Key" "Not sleeping,Sleeping" textline " " bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted" bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register Read/Write on the Debug Core Register Selector/Debug Key" "Not available,Available" textline " " bitfld.long 0x00 1. " C_HALT ,Core Halted" "Not halted,Halted" textline " " bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled" elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDF0))&0x20001)==0x00001) group 0xDF0++0x03 line.long 0x00 "DHCSR,Debug Halting Control and Status Register" bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset" bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not read,Read" textline " " bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 19. " S_LOCKUP/DBGKEY ,Core running and Lockup/Debug Key" "Not running,Running" bitfld.long 0x00 18. " S_SLEEP/DBGKEY ,Core is sleeping/Debug Key" "Not sleeping,Sleeping" textline " " bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted" bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register Read/Write on the Debug Core Register Selector/Debug Key" "Not available,Available" textline " " bitfld.long 0x00 2. " C_STEP ,Core Step" "No step,Step" bitfld.long 0x00 1. " C_HALT ,Core Halted" "Not halted,Halted" textline " " bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled" endif wgroup 0xDF4++0x03 line.long 0x00 "DCRSR,Debug Core Register Selector Register" bitfld.long 0x00 16. " REGWNR ,Register Read/Write" "Read,Write" bitfld.long 0x00 0.--4. " REGSEL ,Register Selection" "R0,R1,R2,R3,R4,R5,R6,R7,R8,R9,R10,R11,R12,R13,R14,R15,xPSR/ Flags,MSP,PSP,RAZ/WI,CONTROL/FAULTMASK/BASEPRI/PRIMASK,?..." group 0xDF8++0x03 line.long 0x00 "DCRDR,Debug Core Register Data Register" if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDFC))&0x10000)==0x10000) group.long 0xDFC++0x03 line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register" bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled" bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1" bitfld.long 0x00 18. " MON_STEP ,Setting this bit to 1 makes the step request pending" "No step,Step" textline " " bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending" bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled" bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap" "Disabled,Enabled" bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled" bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled" bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled" bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled" else group.long 0xDFC++0x03 line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register" bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled" bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1" textline " " bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending" bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled" bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap" "Disabled,Enabled" bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled" bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled" bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled" bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled" endif else newline textline "COREDEBUG component base address not specified" newline endif tree.end tree "Flash Patch and Breakpoint Unit (FPB)" sif COMPonent.AVAILABLE("FPB") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1)) width 10. group 0x00--0x27 line.long 0x00 "FP_CTRL,Flash Patch Control Register" bitfld.long 0x00 8.--11. " NUM_LIT ,Number of Literal Slots Field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " NUM_CODE ,Number of Code Slots Field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 1. " KEY ,Key Field" "Low,High" bitfld.long 0x00 0. " ENABLE ,Flash Patch Unit Enable" "Disabled,Enabled" ;group 0x04++0x03 line.long 0x04 "FP_REMAP,Flash Patch Remap Register" hexmask.long.tbyte 0x04 5.--28. 1. " REMAP ,Remap Base Address Field" ;group 0x08++0x03 line.long 0x8 "FP_COMP0,Flash Patch Comparator Register 0" bitfld.long 0x8 30.--31. " REPLACE ,REPLACE" "Remap to remap address,Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x8 2.--28. 1. " COMP ,Comparison Address" bitfld.long 0x8 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" line.long 0xC "FP_COMP1,Flash Patch Comparator Register 1" bitfld.long 0xC 30.--31. " REPLACE ,REPLACE" "Remap to remap address,Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0xC 2.--28. 1. " COMP ,Comparison Address" bitfld.long 0xC 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" line.long 0x10 "FP_COMP2,Flash Patch Comparator Register 2" bitfld.long 0x10 30.--31. " REPLACE ,REPLACE" "Remap to remap address,Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x10 2.--28. 1. " COMP ,Comparison Address" bitfld.long 0x10 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" line.long 0x14 "FP_COMP3,Flash Patch Comparator Register 3" bitfld.long 0x14 30.--31. " REPLACE ,REPLACE" "Remap to remap address,Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x14 2.--28. 1. " COMP ,Comparison Address" bitfld.long 0x14 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" line.long 0x18 "FP_COMP4,Flash Patch Comparator Register 4" bitfld.long 0x18 30.--31. " REPLACE ,REPLACE" "Remap to remap address,Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x18 2.--28. 1. " COMP ,Comparison Address" bitfld.long 0x18 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" line.long 0x1C "FP_COMP5,Flash Patch Comparator Register 5" bitfld.long 0x1C 30.--31. " REPLACE ,REPLACE" "Remap to remap address,Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x1C 2.--28. 1. " COMP ,Comparison Address" bitfld.long 0x1C 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" line.long 0x20 "FP_COMP6,Flash Patch Comparator Register 6" bitfld.long 0x20 30.--31. " REPLACE ,REPLACE" "Remap to remap address,Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x20 2.--28. 1. " COMP ,Comparison Address" bitfld.long 0x20 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" line.long 0x24 "FP_COMP7,Flash Patch Comparator Register 7" bitfld.long 0x24 30.--31. " REPLACE ,REPLACE" "Remap to remap address,Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x24 2.--28. 1. " COMP ,Comparison Address" bitfld.long 0x24 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" tree "Coresight Management Registers" rgroup 0xfd0--0xfff line.long 0x00 "PID4,Peripheral ID4" line.long 0x04 "PID5,Peripheral ID5" line.long 0x08 "PID6,Peripheral ID6" line.long 0x0c "PID7,Peripheral ID7" line.long 0x10 "PID0,Peripheral ID0" line.long 0x14 "PID1,Peripheral ID1" line.long 0x18 "PID2,Peripheral ID2" line.long 0x1c "PID3,Peripheral ID3" line.long 0x20 "CID0,Component ID0" line.long 0x24 "CID1,Component ID1" line.long 0x28 "CID2,Component ID2" line.long 0x2c "CID3,Component ID3" tree.end else newline textline "FPB component base address not specified" newline endif tree.end tree "Data Watchpoint and Trace Unit (DWT)" sif COMPonent.AVAILABLE("DWT") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1)) width 15. group 0x00--0x1B line.long 0x00 "DWT_CTRL,DWT Control Register" bitfld.long 0x00 28.--31. " NUMCOMP ,Number of Comparators Field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 22. " CYCEVTENA ,Enables Cycle Count Event" "Disabled,Enabled" bitfld.long 0x00 21. " FOLDEVTENA ,Enables Folded Instruction Count Event" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " LSUEVTENA ,Enables LSU Count Event" "Disabled,Enabled" bitfld.long 0x00 19. " SLEEPEVTENA ,Enables Sleep Count Event" "Disabled,Enabled" bitfld.long 0x00 18. " EXCEVTENA ,Enables Interrupt Overhead Event" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " CPIEVTENA ,Enables CPI Count Event" "Disabled,Enabled" bitfld.long 0x00 16. " EXCTRCENA ,Enables Interrupt Event Tracing" "Disabled,Enabled" bitfld.long 0x00 12. " PCSAMPLEENA ,Enables PC Sampling Event" "Disabled,Enabled" textline " " bitfld.long 0x00 10.--11. " SYNCTAP ,Feed Synchronization Pulse to the ITM SYNCEN Control" "Disabled,24,26,28" bitfld.long 0x00 9. " CYCTAP ,Selects a Tap on the DWT_CYCCNT Register" "Bit 6,Bit 10" bitfld.long 0x00 5.--8. " POSTCNT ,Post-Scalar Counter for CYCTAP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 1.--4. " POSTPRESET ,Reload Value for POSTCNT Post-Scalar Counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0. " CYCCNTENA ,Enable the DWT_CYCCNT Counter" "Disabled,Enabled" ;group 0x04++0x03 line.long 0x04 "DWT_CYCCNT,Cycle Count register" ;group 0x08++0x03 line.long 0x08 "DWT_CPICNT,DWT CPI Count Register" hexmask.long.byte 0x08 0.--7. 1. " CPICNT ,The base CPI counter" ;group 0x0c++0x03 line.long 0x0c "DWT_EXCCNT,DWT Exception Overhead Count Register" hexmask.long.byte 0x0c 0.--7. 1. " EXCCNT ,The exception overhead counter" ;group 0x10++0x03 line.long 0x10 "DWT_SLEEPCNT,DWT Sleep Count Register" hexmask.long.byte 0x10 0.--7. 1. " SLEEPCNT ,Sleep Counter" ;group 0x14++0x03 line.long 0x14 "DWT_LSUCNT,DWT LSU Count Register" hexmask.long.byte 0x14 0.--7. 1. " LSUCNT ,Load-store counter" ;group 0x18++0x03 line.long 0x18 "DWT_FOLDCNT,DWT Fold Count Register" hexmask.long.byte 0x18 0.--7. 1. " FOLDCNT ,Folded-instruction counter" group.long 0x20++0x03 line.long 0x00 "DWT_COMP0,DWT Comparator Register 0" group.long 0x30++0x03 line.long 0x00 "DWT_COMP1,DWT Comparator Register 1" group.long 0x40++0x03 line.long 0x00 "DWT_COMP2,DWT Comparator Register 2" group.long 0x50++0x03 line.long 0x00 "DWT_COMP3,DWT Comparator Register 3" group.long 0x24++0x03 line.long 0x00 "DWT_MASK0,DWT Mask Registers 0" bitfld.long 0x00 0.--3. " MASK ,Mask on Data Address when Matching Against COMP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x34++0x03 line.long 0x00 "DWT_MASK1,DWT Mask Registers 1" bitfld.long 0x00 0.--3. " MASK ,Mask on Data Address when Matching Against COMP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x44++0x03 line.long 0x00 "DWT_MASK2,DWT Mask Registers 2" bitfld.long 0x00 0.--3. " MASK ,Mask on Data Address when Matching Against COMP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x54++0x03 line.long 0x00 "DWT_MASK3,DWT Mask Registers 3" bitfld.long 0x00 0.--3. " MASK ,Mask on Data Address when Matching Against COMP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x28))&0x20)==0x00) group.long 0x28++0x03 line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "byte,half,word,res" bitfld.long 0x00 9. " LNK1ENA ,DATAVADDR1 support" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " CYCMATCH ,Comparator Compares Against the PC Sampler Counter" "Cleared,Set" bitfld.long 0x00 5. " EMITRANGE ,Emit Range Field" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--3. " FUNCTION ,FUNCTION settings" "Disabled,Sample and emit PC through ITM,Emit data through ITM,Sample PC and data value through ITM,Watchpoint on PC match,Watchpoint on read,Watchpoint on write,Watchpoint on read or write,ETM trigger on PC match,ETM trigger on read,ETM trigger on write,ETM trigger on read or write,?..." else group.long 0x28++0x03 line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "byte,half,word,res" bitfld.long 0x00 9. " LNK1ENA ,DATAVADDR1 support" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " CYCMATCH ,Comparator Compares Against the PC Sampler Counter" "Cleared,Set" bitfld.long 0x00 5. " EMITRANGE ,Emit Range Field" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--3. " FUNCTION ,FUNCTION settings" "Disabled,Emit address offset through ITM,Emit data and address offset through ITM,Emit address offset and data value through ITM,Watchpoint on PC match,Watchpoint on read,Watchpoint on write,Watchpoint on read or write,ETM trigger on PC match,ETM trigger on read,ETM trigger on write,ETM trigger on read or write,?..." endif if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x38))&0x20)==0x00) group.long 0x38++0x03 line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "byte,half,word,res" bitfld.long 0x00 9. " LNK1ENA ,DATAVADDR1 support" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " CYCMATCH ,Comparator Compares Against the PC Sampler Counter" "Cleared,Set" bitfld.long 0x00 5. " EMITRANGE ,Emit Range Field" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--3. " FUNCTION ,FUNCTION settings" "Disabled,Sample and emit PC through ITM,Emit data through ITM,Sample PC and data value through ITM,Watchpoint on PC match,Watchpoint on read,Watchpoint on write,Watchpoint on read or write,ETM trigger on PC match,ETM trigger on read,ETM trigger on write,ETM trigger on read or write,?..." else group.long 0x38++0x03 line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "byte,half,word,res" bitfld.long 0x00 9. " LNK1ENA ,DATAVADDR1 support" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " CYCMATCH ,Comparator Compares Against the PC Sampler Counter" "Cleared,Set" bitfld.long 0x00 5. " EMITRANGE ,Emit Range Field" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--3. " FUNCTION ,FUNCTION settings" "Disabled,Emit address offset through ITM,Emit data and address offset through ITM,Emit address offset and data value through ITM,Watchpoint on PC match,Watchpoint on read,Watchpoint on write,Watchpoint on read or write,ETM trigger on PC match,ETM trigger on read,ETM trigger on write,ETM trigger on read or write,?..." endif if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x48))&0x20)==0x00) group.long 0x48++0x03 line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "byte,half,word,res" bitfld.long 0x00 9. " LNK1ENA ,DATAVADDR1 support" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " CYCMATCH ,Comparator Compares Against the PC Sampler Counter" "Cleared,Set" bitfld.long 0x00 5. " EMITRANGE ,Emit Range Field" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--3. " FUNCTION ,FUNCTION settings" "Disabled,Sample and emit PC through ITM,Emit data through ITM,Sample PC and data value through ITM,Watchpoint on PC match,Watchpoint on read,Watchpoint on write,Watchpoint on read or write,ETM trigger on PC match,ETM trigger on read,ETM trigger on write,ETM trigger on read or write,?..." else group.long 0x48++0x03 line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "byte,half,word,res" bitfld.long 0x00 9. " LNK1ENA ,DATAVADDR1 support" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " CYCMATCH ,Comparator Compares Against the PC Sampler Counter" "Cleared,Set" bitfld.long 0x00 5. " EMITRANGE ,Emit Range Field" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--3. " FUNCTION ,FUNCTION settings" "Disabled,Emit address offset through ITM,Emit data and address offset through ITM,Emit address offset and data value through ITM,Watchpoint on PC match,Watchpoint on read,Watchpoint on write,Watchpoint on read or write,ETM trigger on PC match,ETM trigger on read,ETM trigger on write,ETM trigger on read or write,?..." endif if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x58))&0x20)==0x00) group.long 0x58++0x03 line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "byte,half,word,res" bitfld.long 0x00 9. " LNK1ENA ,DATAVADDR1 support" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " CYCMATCH ,Comparator Compares Against the PC Sampler Counter" "Cleared,Set" bitfld.long 0x00 5. " EMITRANGE ,Emit Range Field" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--3. " FUNCTION ,FUNCTION settings" "Disabled,Sample and emit PC through ITM,Emit data through ITM,Sample PC and data value through ITM,Watchpoint on PC match,Watchpoint on read,Watchpoint on write,Watchpoint on read or write,ETM trigger on PC match,ETM trigger on read,ETM trigger on write,ETM trigger on read or write,?..." else group.long 0x58++0x03 line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "byte,half,word,res" bitfld.long 0x00 9. " LNK1ENA ,DATAVADDR1 support" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " CYCMATCH ,Comparator Compares Against the PC Sampler Counter" "Cleared,Set" bitfld.long 0x00 5. " EMITRANGE ,Emit Range Field" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--3. " FUNCTION ,FUNCTION settings" "Disabled,Emit address offset through ITM,Emit data and address offset through ITM,Emit address offset and data value through ITM,Watchpoint on PC match,Watchpoint on read,Watchpoint on write,Watchpoint on read or write,ETM trigger on PC match,ETM trigger on read,ETM trigger on write,ETM trigger on read or write,?..." endif tree "Coresight Management Registers" rgroup 0xfd0--0xfff line.long 0x00 "PID4,Peripheral ID4" line.long 0x04 "PID5,Peripheral ID5" line.long 0x08 "PID6,Peripheral ID6" line.long 0x0c "PID7,Peripheral ID7" line.long 0x10 "PID0,Peripheral ID1" line.long 0x14 "PID1,Peripheral ID2" line.long 0x18 "PID2,Peripheral ID3" line.long 0x1c "PID3,Peripheral ID4" line.long 0x20 "CID0,Component ID0" line.long 0x24 "CID1,Component ID1" line.long 0x28 "CID2,Component ID2" line.long 0x2c "CID3,Component ID3" tree.end else newline textline "DWT component base address not specified" newline endif tree.end tree.end AUTOINDENT.POP tree.end config 16. 8. tree "System Control" base ad:0x400FC000 width 10. group.long 0x140++0x3 line.long 0x00 "EXTINT,External Interrupt Flag Register" eventfld.long 0x00 3. " EINT3 ,External Interrupt 3" "No interrupt,Interrupt" eventfld.long 0x00 2. " EINT2 ,External Interrupt 2" "No interrupt,Interrupt" eventfld.long 0x00 1. " EINT1 ,External Interrupt 1" "No interrupt,Interrupt" textline " " eventfld.long 0x00 0. " EINT0 ,External Interrupt 0" "No interrupt,Interrupt" group.long 0x148++0x7 line.long 0x00 "EXTMODE,External Interrupt Mode Register" bitfld.long 0x00 3. " EXTMODE3 ,External Interrupt 3 Mode" "Level,Edge" bitfld.long 0x00 2. " EXTMODE2 ,External Interrupt 2 Mode" "Level,Edge" bitfld.long 0x00 1. " EXTMODE1 ,External Interrupt 1 Mode" "Level,Edge" textline " " bitfld.long 0x00 0. " EXTMODE0 ,External Interrupt 0 Mode" "Level,Edge" line.long 0x04 "EXTPOLAR,External Interrupt Polarity Register" bitfld.long 0x04 3. " EXTPOLAR3 ,External Interrupt 3 Polarity" "Low/Falling,High/Rising" bitfld.long 0x04 2. " EXTPOLAR2 ,External Interrupt 2 Polarity" "Low/Falling,High/Rising" bitfld.long 0x04 1. " EXTPOLAR1 ,External Interrupt 1 Polarity" "Low/Falling,High/Rising" textline " " bitfld.long 0x04 0. " EXTPOLAR0 ,External Interrupt 0 Polarity" "Low/Falling,High/Rising" group.long 0x180++0x3 line.long 0x00 "RSID,Reset Source Identification Register" sif (cpu()=="LPC1772"||cpu()=="LPC1774"||cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778"||cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788") eventfld.long 0x00 5. " LOCKUP ,Lockup Reset" "No reset,Reset" eventfld.long 0x00 4. " SYSRESET ,System Reset" "No reset,Reset" textline " " endif eventfld.long 0x00 3. " BODR ,Brown-Out Detector Reset" "No reset,Reset" eventfld.long 0x00 2. " WDTR ,Watchdog Timer time out" "No reset,Reset" eventfld.long 0x00 1. " EXTR ,/RESET signal" "No reset,Reset" textline " " eventfld.long 0x00 0. " POR ,POR signal" "No reset,Reset" sif (cpu()=="LPC1772"||cpu()=="LPC1774"||cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778"||cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788") group.long 0x1CC++0x3 line.long 0x00 "RSTCON0,Reset control register 0" sif (cpu()=="LPC1776"||cpu()=="LPC1778"||cpu()=="LPC1786"||cpu()=="LPC1788") bitfld.long 0x00 31. " RSTUSB ,USB interface reset control bit" "No reset,Reset" bitfld.long 0x00 30. " RSTENET ,Ethernet block reset control bit" "No reset,Reset" bitfld.long 0x00 29. " RSTGPDMA ,GPDMA function reset control bit" "No reset,Reset" else bitfld.long 0x00 31. " RSTUSB ,USB interface reset control bit" "No reset,Reset" bitfld.long 0x00 29. " RSTGPDMA ,GPDMA function reset control bit" "No reset,Reset" endif textline " " sif (cpu()!="LPC1774"&&cpu()!="LPC1772") bitfld.long 0x00 28. " RSTSDC ,SD Card interface reset control bit" "No reset,Reset" bitfld.long 0x00 27. " RSTI2S ,I2S interface reset control bit" "No reset,Reset" bitfld.long 0x00 26. " RSTI2C2 ,I2C interface 2 reset control bit" "No reset,Reset" elif cpu()=="LPC1774" bitfld.long 0x00 27. " RSTI2S ,I2S interface reset control bit" "No reset,Reset" bitfld.long 0x00 26. " RSTI2C2 ,I2C interface 2 reset control bit" "No reset,Reset" else bitfld.long 0x00 26. " RSTI2C2 ,I2C interface 2 reset control bit" "No reset,Reset" endif textline " " bitfld.long 0x00 25. " RSTUART3 ,UART 3 reset control bit" "No reset,Reset" bitfld.long 0x00 24. " RSTUART2 ,UART 2 reset control bit" "No reset,Reset" bitfld.long 0x00 23. " RSTTIM3 ,Timer 3 reset control bit" "No reset,Reset" textline " " bitfld.long 0x00 22. " RSTTIM2 ,Timer 2 reset control bit" "No reset,Reset" bitfld.long 0x00 21. " RSTSSP0 ,The SSP0 interface reset control bit" "No reset,Reset" bitfld.long 0x00 20. " RSTSSP2 ,The SSP2 interface reset control bit" "No reset,Reset" textline " " bitfld.long 0x00 19. " RSTI2C1 ,The I2C1 interface reset control bit" "No reset,Reset" sif (cpu()!="LPC1772"&&cpu()!="LPC1774"&&cpu()!="LPC1785") bitfld.long 0x00 18. " RSTQEI ,Quadrature Encoder Interface reset control bit" "No reset,Reset" bitfld.long 0x00 17. " RSTMCPWM ,Motor Control PWM reset control bit" "No reset,Reset" else bitfld.long 0x00 17. " RSTMCPWM ,Motor Control PWM reset control bit" "No reset,Reset" endif textline " " sif (cpu()!="LPC1774"&&cpu()!="LPC1776"&&cpu()!="LPC1777"&&cpu()!="LPC1778"&&cpu()!="LPC1785"&&cpu()!="LPC1786"&&cpu()!="LPC1787"&&cpu()!="LPC1788") bitfld.long 0x00 16. " RSTSPIFI ,SPI Flash Interface reset control bit" "No reset,Reset" textline " " endif bitfld.long 0x00 15. " RSTGPIO ,Reset control bit for GPIO" "No reset,Reset" bitfld.long 0x00 14. " RSTCAN2 ,CAN Controller 2 reset control bit" "No reset,Reset" textline " " bitfld.long 0x00 13. " RSTCAN1 ,CAN Controller 1 reset control bit" "No reset,Reset" bitfld.long 0x00 12. " RSTADC ,A/D converter (ADC) reset control bit" "No reset,Reset" bitfld.long 0x00 11. " RSTEMC ,External Memory Controller reset control bit" "No reset,Reset" textline " " bitfld.long 0x00 10. " RSTSSP1 ,The SSP 1 interface reset control bit" "No reset,Reset" textline " " sif (cpu()=="LPC1774"||cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778"||cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788") bitfld.long 0x00 9. " RSTRTC ,UART4 reset control bit" "No reset,Reset" textline " " endif bitfld.long 0x00 8. " RSTUART4 ,UART4 reset control bit" "No reset,Reset" bitfld.long 0x00 7. " RSTI2C0 ,The I2C0 interface reset control bit" "No reset,Reset" textline " " bitfld.long 0x00 6. " RSTPWM1 ,PWM1 reset control bit" "No reset,Reset" bitfld.long 0x00 5. " RSTPWM0 ,PWM0 reset control bit" "No reset,Reset" bitfld.long 0x00 4. " RSTUART1 ,UART1 reset control bit" "No reset,Reset" textline " " bitfld.long 0x00 3. " RSTUART0 ,UART0 reset control bit" "No reset,Reset" bitfld.long 0x00 2. " RSTTIM1 ,Timer/Counter 1 reset control bit" "No reset,Reset" bitfld.long 0x00 1. " RSTTIM0 ,Timer/Counter 0 reset control bit" "No reset,Reset" sif (cpu()!="LPC1772"&&cpu()!="LPC1774"&&cpu()!="LPC1776"&&cpu()!="LPC1777"&&cpu()!="LPC1778") textline " " bitfld.long 0x00 0. " RSTLCD ,LCD controller reset control bit" "No reset,Reset" endif group.long 0x1D0++0x3 line.long 0x00 "RSTCON1,Reset control register 1" bitfld.long 0x00 2. " RSTCANACC ,CAN acceptance filter reset control bit" "No reset,Reset" bitfld.long 0x00 1. " RSTDAC ,D/A converter (DAC) reset control bit" "No reset,Reset" bitfld.long 0x00 0. " RSTIOCON ,Reset control bit for the IOCON registers" "No reset,Reset" endif group.long 0x1a0++0x3 line.long 0x00 "SCS,System Control and Status" bitfld.long 0x00 6. " OSCSTAT ,Main oscillator status" "Not ready,Ready" bitfld.long 0x00 5. " OSCEN ,Main oscillator enable" "Disabled,Enabled" bitfld.long 0x00 4. " OSCRANGE ,Main oscillator range select" "1-20 MHz,15-25 MHz" textline " " sif (cpu()=="LPC1772"||cpu()=="LPC1774"||cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778"||cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788") sif (cpu()!="LPC1772"&&cpu()!="LPC1774") bitfld.long 0x00 3. " MCIPWR ,Selects the active level of the SD card interface signal SD_PWR" "Low,High" bitfld.long 0x00 2. " EMCBurst ,External Memory Controller burst control" "Enabled,Disabled" bitfld.long 0x00 1. " EMCRES ,External Memory Controller Reset Disable" "No,Yes" else bitfld.long 0x00 2. " EMCBurst ,External Memory Controller burst control" "Enabled,Disabled" bitfld.long 0x00 1. " EMCRES ,External Memory Controller Reset Disable" "No,Yes" endif textline " " bitfld.long 0x00 0. " EMCShift ,Controls how addresses are output on the EMC address pins" "Shifted,Not shifted" endif width 0xb tree.end tree "Clocking and Power Control" sif (cpu()=="LPC1772"||cpu()=="LPC1774"||cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778"||cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788") base ad:0x400FC000 width 11. group.long 0x10c++0x3 "Clock source selection" line.long 0x00 "CLKSRCSEL,Clock Source Select Register" bitfld.long 0x00 0. " CLKSRC ,Selects the clock source" "RC oscillator,Main oscillator" group.long 0x80++0x7 "Phase Locked Loop (PLL0 Main PLL)" line.long 0x00 "PLL0CON,PLL0 Control Register" bitfld.long 0x00 0. " PLLE ,PLL Enable Bit" "Disabled,Enabled" line.long 0x04 "PLL0CFG,PLL0 Configuration Register" bitfld.long 0x04 5.--6. " PSEL0 ,PLL Divider Value" "Div by 1,Div by 2,Div by 4,Div by 8" bitfld.long 0x04 0.--4. " MSEL0 ,PLL Multiplier Value" "Mul by 1,Mul by 2,Mul by 3,Mul by 4,Mul by 5,Mul by 6,Mul by 7,Mul by 8,Mul by 9,Mul by 10,Mul by 11,Mul by 12,Mul by 13,Mul by 14,Mul by 15,Mul by 16,Mul by 17,Mul by 18,Mul by 19,Mul by 20,Mul by 21,Mul by 22,Mul by 23,Mul by 24,Mul by 25,Mul by 26,Mul by 27,Mul by 28,Mul by 29,Mul by 30,Mul by 31,Mul by 32" rgroup.long 0x88++0x3 line.long 0x00 "PLL0STAT,PLL0 Status Register" bitfld.long 0x00 10. " PLOCK0 ,PLL 0 Lock status" "Not locked,Locked" textline " " bitfld.long 0x00 8. " PLLE0_STAT ,Read-back for the PLL 0 Enable bit" "Turned off,Activated" bitfld.long 0x00 5.--6. " PSEL0 ,Read-back for the PLL 0 Multiplier value" "Div by 1,Div by 2,Div by 4,Div by 8" textline " " bitfld.long 0x00 0.--4. " MSEL0 ,Read-back for the PLL 0 Pre-Divider value" "Mul by 1,Mul by 2,Mul by 3,Mul by 4,Mul by 5,Mul by 6,Mul by 7,Mul by 8,Mul by 9,Mul by 10,Mul by 11,Mul by 12,Mul by 13,Mul by 14,Mul by 15,Mul by 16,Mul by 17,Mul by 18,Mul by 19,Mul by 20,Mul by 21,Mul by 22,Mul by 23,Mul by 24,Mul by 25,Mul by 26,Mul by 27,Mul by 28,Mul by 29,Mul by 30,Mul by 31,Mul by 32" wgroup.long 0x8c++0x3 line.long 0x00 "PLL0FEED,PLL0 Feed Register" hexmask.long.byte 0x00 0.--7. 1. " PLL0FEED ,PLL's Feed Value" group.long 0xa0++0x7 "Phase Locked Loop (PLL1 USB PLL)" line.long 0x00 "PLL1CON,PLL1 Control Register" bitfld.long 0x00 0. " PLLE ,PLL Enable Bit" "Disabled,Enabled" line.long 0x04 "PLL1CFG,PLL1 Configuration Register" bitfld.long 0x04 5.--6. " PSEL1 ,PLL Divider Value" "Div by 1,Div by 2,Div by 4,Div by 8" bitfld.long 0x04 0.--4. " MSEL1 ,PLL Multiplier Value" "Mul by 1,Mul by 2,Mul by 3,Mul by 4,Mul by 5,Mul by 6,Mul by 7,Mul by 8,Mul by 9,Mul by 10,Mul by 11,Mul by 12,Mul by 13,Mul by 14,Mul by 15,Mul by 16,Mul by 17,Mul by 18,Mul by 19,Mul by 20,Mul by 21,Mul by 22,Mul by 23,Mul by 24,Mul by 25,Mul by 26,Mul by 27,Mul by 28,Mul by 29,Mul by 30,Mul by 31,Mul by 32" rgroup.long 0xa8++0x3 line.long 0x00 "PLL1STAT,PLL1 Status Register" bitfld.long 0x00 10. " PLOCK1 ,PLL 1 Lock status" "Not locked,Locked" textline " " bitfld.long 0x00 8. " PLLE1_STAT ,Read-back for the PLL 1 Enable bit" "Turned off,Activated" bitfld.long 0x00 5.--6. " PSEL1 ,Read-back for the PLL 1 Multiplier value" "Div by 1,Div by 2,Div by 4,Div by 8" textline " " bitfld.long 0x00 0.--4. " MSEL1 ,Read-back for the PLL 1 Pre-Divider value" "Mul by 1,Mul by 2,Mul by 3,Mul by 4,Mul by 5,Mul by 6,Mul by 7,Mul by 8,Mul by 9,Mul by 10,Mul by 11,Mul by 12,Mul by 13,Mul by 14,Mul by 15,Mul by 16,Mul by 17,Mul by 18,Mul by 19,Mul by 20,Mul by 21,Mul by 22,Mul by 23,Mul by 24,Mul by 25,Mul by 26,Mul by 27,Mul by 28,Mul by 29,Mul by 30,Mul by 31,Mul by 32" wgroup.long 0xac++0x3 line.long 0x00 "PLL1FEED,PLL1 Feed Register" hexmask.long.byte 0x00 0.--7. 1. " PLL1FEED ,PLL's Feed Value" group.long 0x104++0x7 "Clock dividers" line.long 0x00 "CCLKSEL,CPU Clock Selection register" bitfld.long 0x00 8. " CCLKSEL ,Selects the input clock for the CPU clock divider" "Sysclk,Main PLL" bitfld.long 0x00 0.--4. " CCLKDIV ,Divide value for creating the CPU clock" "Disabled,/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31" line.long 0x04 "USBCLKSEL,USB Clock Selection register" bitfld.long 0x04 8.--9. " USBSEL ,Selects the input clock for the USB clock divider" "Sysclk,Main PLL,Alt PLL,?..." bitfld.long 0x04 0.--4. " USBDIV ,Divide value for creating the USB clock" "Disabled,Reserved,Reserved,Reserved,/4,Reserved,/6,?..." sif (cpu()!="LPC1774"&&cpu()!="LPC1776"&&cpu()!="LPC1777"&&cpu()!="LPC1778"&&cpu()!="LPC1785"&&cpu()!="LPC1786"&&cpu()!="LPC1787"&&cpu()!="LPC1788") group.long 0x1B4++0x03 line.long 0x00 "SPIFICLKSEL,SPIFI Clock Selection register" bitfld.long 0x00 8.--9. " SPIFISEL ,Selects the input clock for the SPIFI clock divider" "Sysclk,Main PLL,Alt PLL,?..." bitfld.long 0x00 0.--4. " SPIFIDIV ,Divide value for creating the SPIFI clock" "Disabled,/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31" endif group.long 0x100++0x03 line.long 0x00 "EMCCLKSEL,EMC Clock Selection register" bitfld.long 0x00 0. " EMCDIV ,Selects the EMC clock rate relative to the CPU clock" "CPU clock,CPU clock/2" group.long 0x1A8++0x03 line.long 0x00 "PCLKSEL,Peripheral Clock Selection register" bitfld.long 0x00 0.--4. " PCLKDIV ,Divide value for the clock used for all APB peripherals" "Disabled,/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31" group.long 0xc0++0x7 "Power control" line.long 0x00 "PCON,Power Mode Control register" eventfld.long 0x00 11. " DPDFLAG ,Deep Power-down entry flag" "Not occurred,Occurred" eventfld.long 0x00 10. " PDFLAG ,Power-down entry flag" "Not occurred,Occurred" textline " " eventfld.long 0x00 9. " DSFLAG ,Deep Sleep entry flag" "Not occurred,Occurred" eventfld.long 0x00 8. " SMFLAG ,Sleep Mode entry flag" "Not occurred,Occurred" textline " " bitfld.long 0x00 4. " BORD ,Brown-Out Reset Disable" "No,Yes" bitfld.long 0x00 3. " BOGD ,Brown-Out Global Disable" "No,Yes" textline " " bitfld.long 0x00 2. " BODRPM ,Brown-Out Reduced Power Mode" "Disabled,Enabled" bitfld.long 0x00 0.--1. " PM ,Power mode control" "Sleep/Deep Sleep,Power-down,Reserved,Deep Power-down" line.long 0x04 "PCONP,Power Control for Peripherals Register" bitfld.long 0x04 31. " PCUSB ,USB interface power/clock control" "Disabled,Enabled" sif (cpu()=="LPC1776"||cpu()=="LPC1778"||cpu()=="LPC1786"||cpu()=="LPC1788") bitfld.long 0x04 30. " PCENET ,Ethernet block power/clock control" "Disabled,Enabled" endif textline " " bitfld.long 0x04 29. " PCGPDMA ,GPDMA function power/clock control" "Disabled,Enabled" sif (cpu()!="LPC1772"&&cpu()!="LPC1774") bitfld.long 0x04 28. " PCSDC ,SD Card interface power/clock control bit" "Disabled,Enabled" textline " " bitfld.long 0x04 27. " PCI2S ,I2S interface power/clock control" "Disabled,Enabled" elif (cpu()=="LPC1774") textline " " bitfld.long 0x04 27. " PCI2S ,I2S interface power/clock control" "Disabled,Enabled" endif bitfld.long 0x04 26. " PCI2C2 ,I2C interface 2 power/clock control" "Disabled,Enabled" textline " " bitfld.long 0x04 25. " PCUART3 ,UART 3 power/clock control" "Disabled,Enabled" bitfld.long 0x04 24. " PCUART2 ,UART 2 power/clock control" "Disabled,Enabled" textline " " bitfld.long 0x04 23. " PCTIM3 ,Timer 3 power/clock control" "Disabled,Enabled" bitfld.long 0x04 22. " PCTIM2 ,Timer 2 power/clock control" "Disabled,Enabled" textline " " bitfld.long 0x04 21. " PCSSP0 ,The SSP0 interface power/clock control" "Disabled,Enabled" bitfld.long 0x04 20. " PCSSP2 ,The SSP2 interface power/clock control" "Disabled,Enabled" textline " " bitfld.long 0x04 19. " PCI2C1 ,The I2C1 interface power/clock control" "Disabled,Enabled" sif (cpu()!="LPC1772"&&cpu()!="LPC1774"&&cpu()!="LPC1785") bitfld.long 0x04 18. " PCQEI ,Quadrature Encoder Interface power/clock control" "Disabled,Enabled" endif textline " " bitfld.long 0x04 17. " PCMCPWM ,Motor Control PWM" "Disabled,Enabled" sif (cpu()!="LPC1774"&&cpu()!="LPC1776"&&cpu()!="LPC1777"&&cpu()!="LPC1778"&&cpu()!="LPC1785"&&cpu()!="LPC1786"&&cpu()!="LPC1787"&&cpu()!="LPC1788") bitfld.long 0x04 16. " PCSPIFI ,SPI Flash Interface power/clock control bit" "Disabled,Enabled" endif textline " " bitfld.long 0x04 15. " PCGPIO ,Power/clock control bit for IOCON" "Disabled,Enabled" bitfld.long 0x04 14. " PCCAN2 ,CAN Controller 2 power/clock control" "Disabled,Enabled" textline " " bitfld.long 0x04 13. " PCCAN1 ,CAN Controller 1 power/clock control" "Disabled,Enabled" bitfld.long 0x04 12. " PCADC ,A/D converter (ADC) power/clock control" "Disabled,Enabled" textline " " bitfld.long 0x04 11. " PCEMC ,External Memory Controller power/clock control bit" "Disabled,Enabled" bitfld.long 0x04 10. " PCSSP1 ,The SSP 1 interface power/clock control" "Disabled,Enabled" textline " " bitfld.long 0x04 9. " PCRTC ,The RTC power/clock control" "Disabled,Enabled" bitfld.long 0x04 8. " PCUART4 ,The PCUART4 interface power/clock control" "Disabled,Enabled" textline " " bitfld.long 0x04 7. " PCI2C0 ,The I2C0 interface power/clock control" "Disabled,Enabled" bitfld.long 0x04 6. " PCPWM1 ,PWM1 power/clock control" "Disabled,Enabled" textline " " bitfld.long 0x04 5. " PCPWM0 ,PWM0 power/clock control" "Disabled,Enabled" bitfld.long 0x04 4. " PCUART1 ,UART1 power/clock control" "Disabled,Enabled" textline " " bitfld.long 0x04 3. " PCUART0 ,UART0 power/clock control" "Disabled,Enabled" bitfld.long 0x04 2. " PCTIM1 ,Timer/Counter 1 power/clock control" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " PCTIM0 ,Timer/Counter 0 power/clock control" "Disabled,Enabled" sif (cpu()!="LPC1772"&&cpu()!="LPC1774"&&cpu()!="LPC1776"&&cpu()!="LPC1777"&&cpu()!="LPC1778") bitfld.long 0x04 0. " PCLCD ,LCD controller power/clock control bit" "Disabled,Enabled" endif sif (cpu()=="LPC1774"||cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778"||cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788") group.long 0x1B0++0x3 line.long 0x00 "PBOOST,Power Boost Control Register" bitfld.long 0x00 0.--1. " BOOST ,Boost control bits" "Disabled,Reserved,Reserved,Enabled" endif group.long 0x1C8++0x3 "Utility" line.long 0x00 "CLKOUTCFG,Clock Output Configuration Register" bitfld.long 0x00 9. " CLKOUT_ACT ,CLKOUT activity indication" "Disabled,Enabled" bitfld.long 0x00 8. " CLKOUT_EN ,CLKOUT enable control" "Disabled,Enabled" textline " " bitfld.long 0x00 4.--7. " CLKOUTDIV ,Output clock divider" "Div by 1,Div by 2,Div by 3,Div by 4,Div by 5,Div by 6,Div by 7,Div by 8,Div by 9,Div by 10,Div by 11,Div by 12,Div by 13,Div by 14,Div by 15,Div by 16" bitfld.long 0x00 0.--3. " CLKOUTSEL ,Clock source for the CLKOUT function" "CPU clock,Main oscillator,RC oscillator,USB clock,RTC oscillator,SPIFI clock,Watchdog oscillator,?..." width 0xb else base ad:0x400FC000 width 11. group.long 0x10c++0x3 "Clock source selection" line.long 0x00 "CLKSRCSEL,Clock Source Select Register" bitfld.long 0x00 0.--1. " CLKSRC ,Selects the clock source" "RC oscillator,Main oscillator,RTC oscillator,?..." group.long 0x80++0x7 "Phase Locked Loop (PLL0 Main PLL)" line.long 0x00 "PLL0CON,PLL0 Control Register" bitfld.long 0x00 1. " PLLC0 ,PLL Connect" "Not connected,Connected" bitfld.long 0x00 0. " PLLE0 ,PLL Enable Bit" "Disabled,Enabled" line.long 0x04 "PLL0CFG,PLL0 Configuration Register" hexmask.long.byte 0x04 16.--23. 1. " NSEL0 ,PLL Pre-Divider value" hexmask.long.word 0x04 0.--14. 1. " MSEL0 ,PLL Multiplier value" rgroup.long 0x88++0x3 line.long 0x00 "PLL0STAT,PLL0 Status Register" bitfld.long 0x00 26. " PLOCK0 ,PLL 0 Lock status" "Not locked,Locked" bitfld.long 0x00 25. " PLLC0_STAT ,Read-back for the PLL 0 Connect bit" "Bypassed,Connected" textline " " bitfld.long 0x00 24. " PLLE0_STAT ,Read-back for the PLL 0 Enable bit" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " NSEL0 ,Read-back for the PLL 0 Pre-Divider value" textline " " hexmask.long.word 0x00 0.--14. 1. " MSEL0 ,Read-back for the PLL 0 Multiplier value" wgroup.long 0x8c++0x3 line.long 0x00 "PLL0FEED,PLL0 Feed Register" hexmask.long.byte 0x00 0.--7. 1. " PLL0FEED ,PLL's Feed Value" sif (cpu()!="LPC1763"&&cpu()!="LPC1767") group.long 0xa0++0x7 "Phase Locked Loop (PLL1 USB PLL)" line.long 0x00 "PLL1CON,PLL1 Control Register" bitfld.long 0x00 1. " PLLC1 ,PLL Connect" "Not connected,Connected" bitfld.long 0x00 0. " PLLE1 ,PLL Enable Bit" "Disabled,Enabled" line.long 0x04 "PLL1CFG,PLL1 Configuration Register" bitfld.long 0x04 5.--6. " PSEL1 ,PLL Divider Value" "Div by 1,Div by 2,Div by 4,Div by 8" bitfld.long 0x04 0.--4. " MSEL1 ,PLL Multiplier Value" "Mul by 1,Mul by 2,Mul by 3,Mul by 4,Mul by 5,Mul by 6,Mul by 7,Mul by 8,Mul by 9,Mul by 10,Mul by 11,Mul by 12,Mul by 13,Mul by 14,Mul by 15,Mul by 16,Mul by 17,Mul by 18,Mul by 19,Mul by 20,Mul by 21,Mul by 22,Mul by 23,Mul by 24,Mul by 25,Mul by 26,Mul by 27,Mul by 28,Mul by 29,Mul by 30,Mul by 31,Mul by 32" rgroup.long 0xa8++0x3 line.long 0x00 "PLL1STAT,PLL1 Status Register" bitfld.long 0x00 10. " PLOCK1 ,PLL 1 Lock status" "Not locked,Locked" bitfld.long 0x00 9. " PLLC1_STAT ,Read-back for the PLL 1 Connect bit" "Bypassed,Connected" textline " " bitfld.long 0x00 8. " PLLE1_STAT ,Read-back for the PLL 1 Enable bit" "Turned off,Activated" bitfld.long 0x00 5.--6. " MSEL1 ,Read-back for the PLL 1 Multiplier value" "Div by 1,Div by 2,Div by 4,Div by 8" textline " " bitfld.long 0x00 0.--4. " NSEL1 ,Read-back for the PLL 1 Pre-Divider value" "Mul by 1,Mul by 2,Mul by 3,Mul by 4,Mul by 5,Mul by 6,Mul by 7,Mul by 8,Mul by 9,Mul by 10,Mul by 11,Mul by 12,Mul by 13,Mul by 14,Mul by 15,Mul by 16,Mul by 17,Mul by 18,Mul by 19,Mul by 20,Mul by 21,Mul by 22,Mul by 23,Mul by 24,Mul by 25,Mul by 26,Mul by 27,Mul by 28,Mul by 29,Mul by 30,Mul by 31,Mul by 32" wgroup.long 0xac++0x3 line.long 0x00 "PLL1FEED,PLL1 Feed Register" hexmask.long.byte 0x00 0.--7. 1. " PLL1FEED ,PLL's Feed Value" endif group.long 0x104++0x3 "Clock dividers" line.long 0x00 "CCLKCFG,CPU Clock Configuration Register" hexmask.long.byte 0x00 0.--7. 1. " CCLKSEL ,Divide value for creating the CPU clock (CCLK) from the PLL0 output" sif (cpu()!="LPC1763"&&cpu()!="LPC1767") group.long 0x108++0x03 line.long 0x00 "USBCLKCFG,USB Clock Configuration Register" bitfld.long 0x00 0.--3. " USBSEL ,Divide value for creating the USB clock from the PLL0 output" "Reserved,Reserved,Reserved,Reserved,Reserved,Div by 6,Reserved,Div by 8,Reserved,Div by 10,?..." endif group.long 0x1a4++0xb line.long 0x00 "IRCTRIM,IRC Trim Register" hexmask.long.byte 0x00 0.--7. 1. " IRCTRIM ,IRC trim value" line.long 0x04 "PCLKSEL0,Peripheral Clock Selection register 0" bitfld.long 0x04 30.--31. " PCLK_ACF ,Peripheral clock selection for CAN acceptance filtering" "CCLK/4,CCLK,CCLK/2,CCLK/6" sif (cpu()!="LPC1767"&&cpu()!="LPC1763") sif (cpu()!="LPC1751"&&cpu()!="LPC1752"&&cpu()!="LPC1754") bitfld.long 0x04 28.--29. " PCLK_CAN2 ,Peripheral clock selection for CAN2" "CCLK/4,CCLK,CCLK/2,CCLK/8" textline " " endif bitfld.long 0x04 26.--27. " PCLK_CAN1 ,Peripheral clock selection for CAN1" "CCLK/4,CCLK,CCLK/2,CCLK/8" textline " " endif bitfld.long 0x04 24.--25. " PCLK_ADC ,Peripheral clock selection for ADC" "CCLK/4,CCLK,CCLK/2,CCLK/8" textline " " sif (cpu()!="LPC1751"&&cpu()!="LPC1752"&&cpu()!="LPC1764") bitfld.long 0x04 22.--23. " PCLK_DAC ,Peripheral clock selection for DAC" "CCLK/4,CCLK,CCLK/2,CCLK/8" textline " " endif bitfld.long 0x04 20.--21. " PCLK_SSP1 ,Peripheral clock selection for SSP1" "CCLK/4,CCLK,CCLK/2,CCLK/8" textline " " bitfld.long 0x04 16.--17. " PCLK_SPI ,Peripheral clock selection for SPI" "CCLK/4,CCLK,CCLK/2,CCLK/8" bitfld.long 0x04 14.--15. " PCLK_I2C0 ,Peripheral clock selection for I2C0" "CCLK/4,CCLK,CCLK/2,CCLK/8" textline " " bitfld.long 0x04 12.--13. " PCLK_PWM1 ,Peripheral clock selection for PWM1" "CCLK/4,CCLK,CCLK/2,CCLK/8" bitfld.long 0x04 8.--9. " PCLK_UART1 ,Peripheral clock selection for UART1" "CCLK/4,CCLK,CCLK/2,CCLK/8" textline " " bitfld.long 0x04 6.--7. " PCLK_UART0 ,Peripheral clock selection for UART0" "CCLK/4,CCLK,CCLK/2,CCLK/8" bitfld.long 0x04 4.--5. " PCLK_TIMER1 ,Peripheral clock selection for TIMER1" "CCLK/4,CCLK,CCLK/2,CCLK/8" textline " " bitfld.long 0x04 2.--3. " PCLK_TIMER0 ,Peripheral clock selection for TIMER0" "CCLK/4,CCLK,CCLK/2,CCLK/8" bitfld.long 0x04 0.--1. " PCLK_WDT ,Peripheral clock selection for WDT" "CCLK/4,CCLK,CCLK/2,CCLK/8" line.long 0x08 "PCLKSEL1,Peripheral Clock Selection register 1" bitfld.long 0x08 30.--31. " PCLK_MC ,Peripheral clock selection for the Motor Control PWM" "CCLK/4,CCLK,CCLK/2,CCLK/8" bitfld.long 0x08 28.--29. " PCLK_SYSCON ,Peripheral clock selection for the System Control block" "CCLK/4,CCLK,CCLK/2,CCLK/8" textline " " bitfld.long 0x08 26.--27. " PCLK_RIT ,Peripheral clock selection for Repetitive Interrupt Timer" "CCLK/4,CCLK,CCLK/2,CCLK/8" textline " " sif (cpu()!="LPC1751"&&cpu()!="LPC1752"&&cpu()!="LPC1754"&&cpu()!="LPC1764") bitfld.long 0x08 22.--23. " PCLK_I2S ,Peripheral clock selection for I2S" "CCLK/4,CCLK,CCLK/2,CCLK/8" textline " " endif bitfld.long 0x08 20.--21. " PCLK_I2C2 ,Peripheral clock selection for I2C2" "CCLK/4,CCLK,CCLK/2,CCLK/8" bitfld.long 0x08 18.--19. " PCLK_UART3 ,Peripheral clock selection for UART3" "CCLK/4,CCLK,CCLK/2,CCLK/8" textline " " bitfld.long 0x08 16.--17. " PCLK_UART2 ,Peripheral clock selection for UART2" "CCLK/4,CCLK,CCLK/2,CCLK/8" bitfld.long 0x08 14.--15. " PCLK_TIMER3 ,Peripheral clock selection for TIMER3" "CCLK/4,CCLK,CCLK/2,CCLK/8" textline " " bitfld.long 0x08 12.--13. " PCLK_TIMER2 ,Peripheral clock selection for TIMER2" "CCLK/4,CCLK,CCLK/2,CCLK/8" bitfld.long 0x08 10.--11. " PCLK_SSP0 ,Peripheral clock selection for SSP0" "CCLK/4,CCLK,CCLK/2,CCLK/8" textline " " bitfld.long 0x08 6.--7. " PCLK_I2C1 ,Peripheral clock selection for I2C1" "CCLK/4,CCLK,CCLK/2,CCLK/8" bitfld.long 0x08 4.--5. " PCLK_PCB ,Peripheral clock selection for the Pin Connect block" "CCLK/4,CCLK,CCLK/2,CCLK/8" textline " " bitfld.long 0x08 2.--3. " PCLK_GPIOINT ,Peripheral clock selection for GPIO interrupts" "CCLK/4,CCLK,CCLK/2,CCLK/8" bitfld.long 0x08 0.--1. " PCLK_QEI ,Peripheral clock selection for the Quadrature Encoder Interface" "CCLK/4,CCLK,CCLK/2,CCLK/8" group.long 0xc0++0x7 "Power control" line.long 0x00 "PCON,Power Control Register" eventfld.long 0x00 11. " DPDFLAG ,Deep Power-down entry flag" "Not occurred,Occurred" eventfld.long 0x00 10. " PDFLAG ,Power-down entry flag" "Not occurred,Occurred" textline " " eventfld.long 0x00 9. " DSFLAG ,Deep Sleep entry flag" "Not occurred,Occurred" eventfld.long 0x00 8. " SMFLAG ,Sleep Mode entry flag" "Not occurred,Occurred" textline " " bitfld.long 0x00 4. " BORD ,Brown-Out Reset Disable" "No,Yes" bitfld.long 0x00 3. " BOGD ,Brown-Out Global Disable" "No,Yes" textline " " bitfld.long 0x00 2. " BODRPM ,Brown-Out Reduced Power Mode" "Disabled,Enabled" bitfld.long 0x00 0.--1. " PM ,Power mode control" "Sleep/Deep Sleep,Power-down,Reserved,Deep Power-down" line.long 0x04 "PCONP,Power Control for Peripherals Register" sif (cpu()!="LPC1767"&&cpu()!="LPC1763") bitfld.long 0x04 31. " PCUSB ,USB interface power/clock control" "Disabled,Enabled" textline " " endif sif (cpu()=="LPC1758"||cpu()=="LPC1764"||cpu()=="LPC1766"||cpu()=="LPC1767"||cpu()=="LPC1768"||cpu()=="LPC1769") bitfld.long 0x04 30. " PCENET ,Ethernet block power/clock control" "Disabled,Enabled" textline " " endif bitfld.long 0x04 29. " PCGPDMA ,GPDMA function power/clock control" "Disabled,Enabled" textline " " sif (cpu()!="LPC1751"&&cpu()!="LPC1752"&&cpu()!="LPC1754"&&cpu()!="LPC1764") bitfld.long 0x04 27. " PCI2S ,I2S interface power/clock control" "Disabled,Enabled" textline " " endif bitfld.long 0x04 26. " PCI2C2 ,I2C interface 2 power/clock control" "Disabled,Enabled" bitfld.long 0x04 25. " PCUART3 ,UART 3 power/clock control" "Disabled,Enabled" textline " " bitfld.long 0x04 24. " PCUART2 ,UART 2 power/clock control" "Disabled,Enabled" bitfld.long 0x04 23. " PCTIM3 ,Timer 3 power/clock control" "Disabled,Enabled" textline " " bitfld.long 0x04 22. " PCTIM2 ,Timer 2 power/clock control" "Disabled,Enabled" bitfld.long 0x04 21. " PCSSP0 ,The SSP0 interface power/clock control" "Disabled,Enabled" textline " " bitfld.long 0x04 19. " PCI2C1 ,The I2C1 interface power/clock control" "Disabled,Enabled" bitfld.long 0x04 18. " PCQEI ,Quadrature Encoder Interface power/clock control" "Disabled,Enabled" textline " " bitfld.long 0x04 17. " PCMCPWM ,Motor Control PWM" "Disabled,Enabled" bitfld.long 0x04 16. " PCRIT ,Repetitive Interrupt Timer power/clock control" "Disabled,Enabled" textline " " sif (cpu()!="LPC1767"&&cpu()!="LPC1763") sif (cpu()!="LPC1751"&&cpu()!="LPC1752"&&cpu()!="LPC1754") bitfld.long 0x04 14. " PCCAN2 ,CAN Controller 2 power/clock control" "Disabled,Enabled" textline " " endif bitfld.long 0x04 13. " PCCAN1 ,CAN Controller 1 power/clock control" "Disabled,Enabled" textline " " endif bitfld.long 0x04 12. " PCADC ,A/D converter (ADC) power/clock control" "Disabled,Enabled" bitfld.long 0x04 10. " PCSSP1 ,The SSP 1 interface power/clock control" "Disabled,Enabled" textline " " bitfld.long 0x04 9. " PCRTC ,The RTC power/clock control" "Disabled,Enabled" bitfld.long 0x04 8. " PCSPI ,The SPI interface power/clock control" "Disabled,Enabled" textline " " bitfld.long 0x04 7. " PCI2C0 ,The I2C0 interface power/clock control" "Disabled,Enabled" bitfld.long 0x04 6. " PCPWM1 ,PWM1 power/clock control" "Disabled,Enabled" textline " " bitfld.long 0x04 4. " PCUART1 ,UART1 power/clock control" "Disabled,Enabled" bitfld.long 0x04 3. " PCUART0 ,UART0 power/clock control" "Disabled,Enabled" textline " " bitfld.long 0x04 2. " PCTIM1 ,Timer/Counter 1 power/clock control" "Disabled,Enabled" bitfld.long 0x04 1. " PCTIM0 ,Timer/Counter 0 power/clock control" "Disabled,Enabled" group.long 0x1C8++0x3 "Utility" line.long 0x00 "CLKOUTCFG,Clock Output Configuration Register" bitfld.long 0x00 9. " CLKOUT_ACT ,CLKOUT activity indication" "Disabled,Enabled" bitfld.long 0x00 8. " CLKOUT_EN ,CLKOUT enable control" "Disabled,Enabled" textline " " bitfld.long 0x00 4.--7. " CLKOUTDIV ,Output clock divider" "Div by 1,Div by 2,Div by 3,Div by 4,Div by 5,Div by 6,Div by 7,Div by 8,Div by 9,Div by 10,Div by 11,Div by 12,Div by 13,Div by 14,Div by 15,Div by 16" bitfld.long 0x00 0.--3. " CLKOUTSEL ,Clock source for the CLKOUT function" "CPU clock,Main oscillator,RC oscillator,USB clock,RTC oscillator,?..." width 0xb endif tree.end tree "Flash Accelerator" base ad:0x400FC000 width 10. group.long 0x00++0x3 line.long 0x00 "FLASHCFG,Flash Accelerator Configuration Register" bitfld.long 0x00 12.--15. " FLASHTIM ,Flash access time" "1 CPU clock,2 CPU clocks,3 CPU clocks,4 CPU clocks,5 CPU clocks,6 CPU clocks,?..." width 0xb tree.end tree "NVIC (Nested Vectored Interrupt Controller)" base ad:0xE000E000 width 7. group.long 0x100++0x03 line.long 0x00 "ISER0,Interrupt Set-Enable 0 Register" sif (cpu()!="LPC1772"&&cpu()!="LPC1774"&&cpu()!="LPC1785"&&!cpuis("LPC4072*")&&!cpuis("LPC4074*")) setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ISE_QEI_set/clr ,Quadrature Encoder Interface Interrupt" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ISE_MCPWM_set/clr ,Motor Control PWM Interrupt" "Disabled,Enabled" else setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ISE_MCPWM_set/clr ,Motor Control PWM Interrupt" "Disabled,Enabled" endif textline " " sif (cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778"||cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788"||cpuis("LPC4076*")||cpuis("LPC4078*")||cpuis("LPC4088*")) setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ISE_SD_set/clr ,SD Card Interface Interrup" "Disabled,Enabled" textline " " elif (cpu()!="LPC1772"&&cpu()!="LPC1774"&&!cpuis("LPC4072*")&&!cpuis("LPC4074*")&&!cpuis("LPC4076*")&&!cpuis("LPC4078*")&&!cpuis("LPC4088*")) setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ISE_RIT_set/clr ,Repetitive Interrupt Timer Interrupt" "Disabled,Enabled" textline " " endif sif (cpu()=="LPC1758"||cpu()=="LPC1764"||cpu()=="LPC1766"||cpu()=="LPC1767"||cpu()=="LPC1768"||cpu()=="LPC1769"||cpu()=="LPC1776"||cpu()=="LPC1778"||cpu()=="LPC1786"||cpu()=="LPC1788"||cpuis("LPC4076*")||cpuis("LPC4078*")||cpuis("LPC4088*")) setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ISE_ENET_set/clr ,Ethernet Interrupt" "Disabled,Enabled" textline " " endif sif (cpu()!="LPC1751"&&cpu()!="LPC1752"&&cpu()!="LPC1754"&&cpu()!="LPC1764"&&cpu()!="LPC1772") setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ISE_I2S_set/clr ,I2S Interrupt" "Disabled,Enabled" textline " " endif setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ISE_DMA_set/clr ,GPDMA Interrupt" "Disabled,Enabled" textline " " sif (cpu()!="LPC1763"&&cpu()!="LPC1767") setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ISE_CAN_set/clr ,CAN Interrupt" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ISE_USB_set/clr ,USB Interrupt" "Disabled,Enabled" textline " " endif setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ISE_BOD_set/clr ,BOD Interrupt" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ISE_ADC_set/clr ,ADC Interrupt" "Disabled,Enabled" textline " " setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ISE_EINT3_set/clr ,External Interrupt 3 Interrupt" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ISE_EINT2_set/clr ,External Interrupt 2 Interrupt" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ISE_EINT1_set/clr ,External Interrupt 1 Interrupt" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ISE_EINT0_set/clr ,External Interrupt 0 Interrupt" "Disabled,Enabled" textline " " setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ISE_RTC_set/clr ,Real Time Clock (RTC) Interrupt" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ISE_PLL0_set/clr ,PLL0 (Main PLL) Interrupt" "Disabled,Enabled" textline " " setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ISE_SSP1_set/clr ,SSP1 Interrupt" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ISE_SSP0_set/clr ,SSP0 Interrupt" "Disabled,Enabled" textline " " sif (cpu()!="LPC1774"&&cpu()!="LPC1776"&&cpu()!="LPC1777"&&cpu()!="LPC1778"&&cpu()!="LPC1785"&&cpu()!="LPC1786"&&cpu()!="LPC1787"&&cpu()!="LPC1788"&&!cpuis("LPC4072*")&&!cpuis("LPC4074*")&&!cpuis("LPC4076*")&&!cpuis("LPC4078*")&&!cpuis("LPC4088*")) setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ISE_SPI_set/clr ,SPI Interrupt" "Disabled,Enabled" textline " " endif setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ISE_I2C2_set/clr ,I2C2 Interrupt" "Disabled,Enabled" textline " " setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ISE_I2C1_set/clr ,I2C1 Interrupt" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ISE_I2C0_set/clr ,I2C0 Interrupt" "Disabled,Enabled" textline " " setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ISE_PWM_set/clr ,PWM1 Interrupt" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ISE_UART3_set/clr ,UART3 Interrupt" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ISE_UART2_set/clr ,UART2 Interrupt" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ISE_UART1_set/clr ,UART1 Interrupt" "Disabled,Enabled" textline " " setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ISE_UART0_set/clr ,UART0 Interrupt" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ISE_TIMER3_set/clr ,Timer 3 Interrupt" "Disabled,Enabled" textline " " setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ISE_TIMER2_set/clr ,Timer 2 Interrupt" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ISE_TIMER1_set/clr ,Timer 1 Interrupt" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ISE_TIMER0_set/clr ,Timer 0 Interrupt" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ISE_WDT_set/clr ,Watchdog Timer Interrupt" "Disabled,Enabled" sif ((cpu()!="LPC1763")&&(cpu()!="LPC1767")) group.long 0x104++0x03 line.long 0x00 "ISER1,Interrupt Set-Enable 1 Register" sif (cpu()=="LPC1772"||cpu()=="LPC1774"||cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778"||cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788"||cpuis("LPC4072*")||cpuis("LPC4074*")||cpuis("LPC4076*")||cpuis("LPC4078*")||cpuis("LPC4088*")) sif (cpuis("LPC4072*")||cpuis("LPC4074*")||cpuis("LPC4076*")||cpuis("LPC4078*")||cpuis("LPC4088*")) setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ISE_FLASH_set/clr ,FLASH Activity Interrupt" "Disabled,Enabled" else setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ISE_EEPROM_set/clr ,EEPROM Activity Interrupt" "Disabled,Enabled" endif setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ISE_PWM0_set/clr ,PWM0 Activity Interrupt" "Disabled,Enabled" textline " " setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ISE_GPIO_set/clr ,GPIO Activity Interrupt" "Disabled,Enabled" sif (cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788"||cpuis("LPC4088*")) setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ISE_LCD_set/clr ,LCD Activity Interrupt" "Disabled,Enabled" endif textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ISE_SSP2_set/clr ,SSP2 Activity Interrupt" "Disabled,Enabled" sif (!cpuis("LPC4072*")&&!cpuis("LPC4074*")) setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ISE_UART4_set/clr ,UART4 Activity Interrupt" "Disabled,Enabled" endif textline " " endif setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ISE_CANACT_set/clr ,CAN Activity Interrupt" "Disabled,Enabled" setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ISE_USBACT_set/clr ,USB Activity Interrupt" "Disabled,Enabled" textline " " setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ISE_PLL1_set/clr ,PLL1 Interrupt" "Disabled,Enabled" endif group.long 0x200++0x3 line.long 0x00 "ISPR0,Interrupt Set-Pending Register 0 Register" sif (cpu()!="LPC1772"&&cpu()!="LPC1774"&&cpu()!="LPC1785"&&!cpuis("LPC4072*")&&!cpuis("LPC4074*")) setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ISP_QEI_set/clr ,Quadrature Encoder Interface Interrupt Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ISP_MCPWM_set/clr ,Motor Control PWM Interrupt Pending" "Not pending,Pending" else setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ISP_MCPWM_set/clr ,Motor Control PWM Interrupt Pending" "Not pending,Pending" endif textline " " sif (cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778"||cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788"||cpuis("LPC4076*")||cpuis("LPC4078*")||cpuis("LPC4088*")) setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ISP_SD_set/clr ,SD Card Interface Interrup Pending" "Not pending,Pending" textline " " elif (cpu()!="LPC1772"&&cpu()!="LPC1774"&&!cpuis("LPC4072*")&&!cpuis("LPC4074*")&&!cpuis("LPC4076*")&&!cpuis("LPC4078*")&&!cpuis("LPC4088*")) setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ISP_RIT_set/clr ,Repetitive Interrupt Timer Interrupt Pending" "Not pending,Pending" textline " " endif sif (cpu()=="LPC1758"||cpu()=="LPC1764"||cpu()=="LPC1766"||cpu()=="LPC1767"||cpu()=="LPC1768"||cpu()=="LPC1769"||cpu()=="LPC1776"||cpu()=="LPC1778"||cpu()=="LPC1786"||cpu()=="LPC1788"||cpuis("LPC4076*")||cpuis("LPC4078*")||cpuis("LPC4088*")) setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ISP_ENET_set/clr ,Ethernet Interrupt Pending" "Not pending,Pending" textline " " endif sif (cpu()!="LPC1751"&&cpu()!="LPC1752"&&cpu()!="LPC1754"&&cpu()!="LPC1764"&&cpu()!="LPC1772") setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ISP_I2S_set/clr ,I2S Interrupt Pending" "Not pending,Pending" textline " " endif setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ISP_DMA_set/clr ,GPDMA Interrupt Pending" "Not pending,Pending" textline " " sif (cpu()!="LPC1763"&&cpu()!="LPC1767") setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ISP_CAN_set/clr ,CAN Interrupt Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ISP_USB_set/clr ,USB Interrupt Pending" "Not pending,Pending" textline " " endif setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ISP_BOD_set/clr ,BOD Interrupt Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ISP_ADC_set/clr ,ADC Interrupt Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ISP_EINT3_set/clr ,External Interrupt 3 Interrupt Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ISP_EINT2_set/clr ,External Interrupt 2 Interrupt Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ISP_EINT1_set/clr ,External Interrupt 1 Interrupt Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ISP_EINT0_set/clr ,External Interrupt 0 Interrupt Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ISP_RTC_set/clr ,Real Time Clock (RTC) Interrupt Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ISP_PLL0_set/clr ,PLL0 (Main PLL) Interrupt Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ISP_SSP1_set/clr ,SSP1 Interrupt Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ISP_SSP0_set/clr ,SSP0 Interrupt Pending" "Not pending,Pending" textline " " sif (cpu()!="LPC1774"&&cpu()!="LPC1776"&&cpu()!="LPC1777"&&cpu()!="LPC1778"&&cpu()!="LPC1785"&&cpu()!="LPC1786"&&cpu()!="LPC1787"&&cpu()!="LPC1788"&&!cpuis("LPC4072*")&&!cpuis("LPC4074*")&&!cpuis("LPC4076*")&&!cpuis("LPC4078*")&&!cpuis("LPC4088*")) setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ISP_SPI_set/clr ,SPI Interrupt Pending" "Not pending,Pending" textline " " endif setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ISP_I2C2_set/clr ,I2C2 Interrupt Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ISP_I2C1_set/clr ,I2C1 Interrupt Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ISP_I2C0_set/clr ,I2C0 Interrupt Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ISP_PWM_set/clr ,PWM1 Interrupt Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ISP_UART3_set/clr ,UART3 Interrupt Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ISP_UART2_set/clr ,UART2 Interrupt Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ISP_UART1_set/clr ,UART1 Interrupt Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ISP_UART0_set/clr ,UART0 Interrupt Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ISP_TIMER3_set/clr ,Timer 3 Interrupt Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ISP_TIMER2_set/clr ,Timer 2 Interrupt Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ISP_TIMER1_set/clr ,Timer 1 Interrupt Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ISP_TIMER0_set/clr ,Timer 0 Interrupt Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ISP_WDT_set/clr ,Watchdog Timer Interrupt Pending" "Not pending,Pending" sif (cpu()!="LPC1763"&&cpu()!="LPC1767") group.long 0x204++0x03 line.long 0x00 "ISPR1,Interrupt Set-Pending Register 1 Register" sif (cpu()=="LPC1772"||cpu()=="LPC1774"||cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778"||cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788"||cpuis("LPC4072*")||cpuis("LPC4074*")||cpuis("LPC4076*")||cpuis("LPC4078*")||cpuis("LPC4088*")) sif cpuis("LPC4072*")||cpuis("LPC4074*")||cpuis("LPC4076*")||cpuis("LPC4078*")||cpuis("LPC4088*") setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ISP_FLASH_set/clr ,FLASH Activity Interrupt Pending" "Not pending,Pending" else setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ISP_EEPROM_set/clr ,EEPROM Activity Interrupt Pending" "Not pending,Pending" endif setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ISP_PWM0_set/clr ,PWM0 Activity Interrupt Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ISP_GPIO_set/clr ,GPIO Activity Interrupt Pending" "Not pending,Pending" sif (cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788"||cpuis("LPC4088*")) setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ISP_LCD_set/clr ,LCD Activity Interrupt Pending" "Not pending,Pending" endif textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ISP_SSP2_set/clr ,SSP2 Activity Interrupt Pending" "Not pending,Pending" sif (!cpuis("LPC4072*")&&!cpuis("LPC4074*")) setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ISP_UART4_set/clr ,UART4 Activity Interrupt Pending" "Not pending,Pending" endif textline " " endif setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ISP_CANACT_set/clr ,CAN Activity Interrupt Pending" "Not pending,Pending" setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ISP_USBACT_set/clr ,USB Activity Interrupt Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ISP_PLL1_set/clr ,PLL1 Interrupt Pending" "Not pending,Pending" endif rgroup.long 0x300++0x03 line.long 0x00 "IABR0,Interrupt Active Bit Register 0" sif (cpu()!="LPC1772"&&cpu()!="LPC1774"&&cpu()!="LPC1785"&&!cpuis("LPC4072*")&&!cpuis("LPC4074*")) bitfld.long 0x00 31. " IAB_QEI ,Quadrature Encoder Interface Interrupt Active" "Not active,Active" bitfld.long 0x00 30. " IAB_MCPWM ,Motor Control PWM Interrupt Active" "Not active,Active" else bitfld.long 0x00 30. " IAB_MCPWM ,Motor Control PWM Interrupt Active" "Not active,Active" endif textline " " sif (cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778"||cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788"||cpuis("LPC4076*")||cpuis("LPC4078*")||cpuis("LPC4088*")) bitfld.long 0x00 29. " IAB_SD ,SD Card Interface Interrup Active" "Not active,Active" textline " " elif (cpu()!="LPC1772"&&cpu()!="LPC1774"&&!cpuis("LPC4072*")&&!cpuis("LPC4074*")&&!cpuis("LPC4076*")&&!cpuis("LPC4078*")&&!cpuis("LPC4088*")) bitfld.long 0x00 29. " IAB_RIT ,Repetitive Interrupt Timer Interrupt Active" "Not active,Active" textline " " endif sif (cpu()=="LPC1758"||cpu()=="LPC1764"||cpu()=="LPC1766"||cpu()=="LPC1767"||cpu()=="LPC1768"||cpu()=="LPC1769"||cpu()=="LPC1776"||cpu()=="LPC1778"||cpu()=="LPC1786"||cpu()=="LPC1788"||cpuis("LPC4076*")||cpuis("LPC4078*")||cpuis("LPC4088*")) bitfld.long 0x00 28. " IAB_ENET ,Ethernet Interrupt Active" "Not active,Active" textline " " endif sif (cpu()!="LPC1751"&&cpu()!="LPC1752"&&cpu()!="LPC1754"&&cpu()!="LPC1764"&&cpu()!="LPC1772") bitfld.long 0x00 27. " IAB_I2S ,I2S Interrupt Active" "Not active,Active" textline " " endif bitfld.long 0x00 26. " IAB_DMA ,GPDMA Interrupt Active" "Not active,Active" textline " " sif (cpu()!="LPC1763"&&cpu()!="LPC1767") bitfld.long 0x00 25. " IAB_CAN ,CAN Interrupt Active" "Not active,Active" bitfld.long 0x00 24. " IAB_USB ,USB Interrupt Active" "Not active,Active" textline " " endif bitfld.long 0x00 23. " IAB_BOD ,BOD Interrupt Active" "Not active,Active" bitfld.long 0x00 22. " IAB_ADC ,ADC Interrupt Active" "Not active,Active" textline " " bitfld.long 0x00 21. " IAB_EINT3 ,External Interrupt 3 Interrupt Active" "Not active,Active" bitfld.long 0x00 20. " IAB_EINT2 ,External Interrupt 2 Interrupt Active" "Not active,Active" textline " " bitfld.long 0x00 19. " IAB_EINT1 ,External Interrupt 1 Interrupt Active" "Not active,Active" bitfld.long 0x00 18. " IAB_EINT0 ,External Interrupt 0 Interrupt Active" "Not active,Active" textline " " bitfld.long 0x00 17. " IAB_RTC ,Real Time Clock (RTC) Interrupt Active" "Not active,Active" bitfld.long 0x00 16. " IAB_PLL0 ,PLL0 (Main PLL) Interrupt Active" "Not active,Active" textline " " bitfld.long 0x00 15. " IAB_SSP1 ,SSP1 Interrupt Active" "Not active,Active" bitfld.long 0x00 14. " IAB_SSP0 ,SSP0 Interrupt Active" "Not active,Active" textline " " sif (cpu()!="LPC1774"&&cpu()!="LPC1776"&&cpu()!="LPC1777"&&cpu()!="LPC1778"&&cpu()!="LPC1785"&&cpu()!="LPC1786"&&cpu()!="LPC1787"&&cpu()!="LPC1788"&&!cpuis("LPC4072*")&&!cpuis("LPC4074*")&&!cpuis("LPC4076*")&&!cpuis("LPC4078*")&&!cpuis("LPC4088*")) bitfld.long 0x00 13. " IAB_SPI ,SPI Interrupt Active" "Not active,Active" textline " " endif bitfld.long 0x00 12. " IAB_I2C2 ,I2C2 Interrupt Active" "Not active,Active" textline " " bitfld.long 0x00 11. " IAB_I2C1 ,I2C1 Interrupt Active" "Not active,Active" bitfld.long 0x00 10. " IAB_I2C0 ,I2C0 Interrupt Active" "Not active,Active" textline " " bitfld.long 0x00 9. " IAB_PWM1 ,PWM1 Interrupt Active" "Not active,Active" bitfld.long 0x00 8. " IAB_UART3 ,UART3 Interrupt Active" "Not active,Active" textline " " bitfld.long 0x00 7. " IAB_UART2 ,UART2 Interrupt Active" "Not active,Active" bitfld.long 0x00 6. " IAB_UART1 ,UART1 Interrupt Active" "Not active,Active" textline " " bitfld.long 0x00 5. " IAB_UART0 ,UART0 Interrupt Active" "Not active,Active" bitfld.long 0x00 4. " IAB_TIMER3 ,Timer 3 Interrupt Active" "Not active,Active" textline " " bitfld.long 0x00 3. " IAB_TIMER2 ,Timer 2 Interrupt Active" "Not active,Active" bitfld.long 0x00 2. " IAB_TIMER1 ,Timer 1 Interrupt Active" "Not active,Active" textline " " bitfld.long 0x00 1. " IAB_TIMER0 ,Timer 0 Interrupt Active" "Not active,Active" bitfld.long 0x00 0. " IAB_WDT ,Watchdog Timer Interrupt Active" "Not active,Active" sif (cpu()!="LPC1767"&&cpu()!="LPC1763") rgroup.long 0x304++0x03 line.long 0x00 "IABR1,Interrupt Active Bit Register 1" sif (cpu()=="LPC1772"||cpu()=="LPC1774"||cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778"||cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788"||cpuis("LPC4072*")||cpuis("LPC4074*")||cpuis("LPC4076*")||cpuis("LPC4078*")||cpuis("LPC4088*")) sif (cpuis("LPC4072*")||cpuis("LPC4074*")||cpuis("LPC4076*")||cpuis("LPC4078*")||cpuis("LPC4088*")) bitfld.long 0x00 8. " IAB_FLASH ,FLASH Activity Interrupt Active" "Not active,Active" else bitfld.long 0x00 8. " IAB_EEPROM ,EEPROM Activity Interrupt Active" "Not active,Active" endif bitfld.long 0x00 7. " IAB_PWM0 ,PWM0 Activity Interrupt Active" "Not active,Active" textline " " bitfld.long 0x00 6. " IAB_GPIO ,GPIO Activity Interrupt Active" "Not active,Active" sif (cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788"||cpuis("LPC4088*")) bitfld.long 0x00 5. " IAB_LCD ,LCD Activity Interrupt Active" "Not active,Active" endif textline " " bitfld.long 0x00 4. " IAB_SSP2 ,SSP2 Activity Interrupt Active" "Not active,Active" sif (!cpuis("LPC4072*")&&!cpuis("LPC4074*")) bitfld.long 0x00 3. " IAB_UART4 ,UART4 Activity Interrupt Active" "Not active,Active" endif textline " " endif bitfld.long 0x00 2. " IAB_CANACT ,CAN Activity Interrupt Active" "Not active,Active" bitfld.long 0x00 1. " IAB_USBACT ,USB Activity Interrupt Active" "Not active,Active" textline " " bitfld.long 0x00 0. " IAB_PLL1 ,PLL1 Interrupt Active" "Not active,Active" endif group.long 0x400++0x1f line.long 0x00 "IPR0,Interrupt Priority Register 0" bitfld.long 0x00 27.--31. " IP_TIMER2 ,Timer 2 Interrupt Priority" "Highest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,Lowest" bitfld.long 0x00 19.--23. " IP_TIMER1 ,Timer 1 Interrupt Priority" "Highest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,Lowest" textline " " bitfld.long 0x00 11.--15. " IP_TIMER0 ,Timer 0 Interrupt Priority" "Highest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,Lowest" bitfld.long 0x00 3.--7. " IP_WDT ,Watchdog Timer Interrupt Priority" "Highest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,Lowest" line.long 0x04 "IPR1,Interrupt Priority Register 1" bitfld.long 0x04 27.--31. " IP_UART2 ,UART2 Interrupt Priority" "Highest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,Lowest" bitfld.long 0x04 19.--23. " IP_UART1 ,UART1 Interrupt Priority" "Highest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,Lowest" textline " " bitfld.long 0x04 11.--15. " IP_UART0 ,UART0 Interrupt Priority" "Highest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,Lowest" bitfld.long 0x04 3.--7. " IP_TIMER3 ,Timer 3 Interrupt Priority" "Highest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,Lowest" line.long 0x08 "IPR2,Interrupt Priority Register 2" bitfld.long 0x08 27.--31. " IP_I2C1 ,I2C1 Interrupt Priority" "Highest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,Lowest" bitfld.long 0x08 19.--23. " IP_I2C0 ,I2C0 Interrupt Priority" "Highest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,Lowest" textline " " bitfld.long 0x08 11.--15. " IP_PWM ,PWM Interrupt Priority" "Highest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,Lowest" bitfld.long 0x08 3.--7. " IP_UART3 ,UART3 Interrupt Priority" "Highest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,Lowest" line.long 0x0c "IPR3,Interrupt Priority Register 3" bitfld.long 0x0c 27.--31. " IP_SSP1 ,SSP1 Interrupt Priority" "Highest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,Lowest" bitfld.long 0x0c 19.--23. " IP_SSP0 ,SSP0 Interrupt Priority" "Highest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,Lowest" textline " " sif (cpu()!="LPC1774"&&cpu()!="LPC1776"&&cpu()!="LPC1777"&&cpu()!="LPC1778"&&cpu()!="LPC1785"&&cpu()!="LPC1786"&&cpu()!="LPC1787"&&cpu()!="LPC1788"&&!cpuis("LPC4072*")&&!cpuis("LPC4074*")&&!cpuis("LPC4076*")&&!cpuis("LPC4078*")&&!cpuis("LPC4088*")) bitfld.long 0x0c 11.--15. " IP_SPI ,SPI Interrupt Priority" "Highest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,Lowest" textline " " endif bitfld.long 0x0c 3.--7. " IP_I2C2 ,UART3 Interrupt Priority" "Highest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,Lowest" line.long 0x10 "IPR4,Interrupt Priority Register 4" bitfld.long 0x10 27.--31. " IP_EINT1 ,External Interrupt 1 Interrupt Priority" "Highest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,Lowest" bitfld.long 0x10 19.--23. " IP_EINT0 ,External Interrupt 0 Interrupt Priority" "Highest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,Lowest" textline " " bitfld.long 0x10 11.--15. " IP_RTC ,Real Time Clock (RTC) Interrupt Priority" "Highest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,Lowest" bitfld.long 0x10 3.--7. " IP_PLL0 ,PLL0 (Main PLL) Interrupt Priority" "Highest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,Lowest" line.long 0x14 "IPR5,Interrupt Priority Register 5" bitfld.long 0x14 27.--31. " IP_BOD ,BOD Interrupt Priority" "Highest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,Lowest" bitfld.long 0x14 19.--23. " IP_ADC ,ADC Interrupt Priority" "Highest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,Lowest" textline " " bitfld.long 0x14 11.--15. " IP_EINT3 ,External Interrupt 3 Interrupt Priority" "Highest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,Lowest" bitfld.long 0x14 3.--7. " IP_EINT2 ,External Interrupt 2 Interrupt Priority" "Highest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,Lowest" line.long 0x18 "IPR6,Interrupt Priority Register 6" sif (cpu()!="LPC1751"&&cpu()!="LPC1752"&&cpu()!="LPC1754"&&cpu()!="LPC1764"&&cpu()!="LPC1772") bitfld.long 0x18 27.--31. " IP_I2S ,I2S Interrupt Priority" "Highest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,Lowest" textline " " endif bitfld.long 0x18 19.--23. " IP_DMA ,GPDMA Interrupt Priority" "Highest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,Lowest" sif (cpu()!="LPC1763"&&cpu()!="LPC1767") textline " " bitfld.long 0x18 11.--15. " IP_CAN ,CAN Interrupt Priority" "Highest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,Lowest" bitfld.long 0x18 3.--7. " IP_USB ,USB Interrupt Priority" "Highest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,Lowest" endif line.long 0x1c "IPR7 , Interrupt Priority Register 7" sif (cpu()!="LPC1772"&&cpu()!="LPC1774"&&cpu()!="LPC1785"&&!cpuis("LPC4072*")&&!cpuis("LPC4074*")) bitfld.long 0x1c 27.--31. " IP_QEI ,Quadrature Encoder Interface Interrupt Priority" "Highest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,Lowest" textline " " endif bitfld.long 0x1c 19.--23. " IP_MCPWM ,Motor Control PWM Interrupt Priority" "Highest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,Lowest" textline " " sif (cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778"||cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788"||cpuis("LPC4076*")||cpuis("LPC4078*")||cpuis("LPC4088*")) bitfld.long 0x1c 11.--15. " IP_SD ,SD Card interface interrupt Priority" "Highest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,Lowest" elif (cpu()!="LPC1772"&&cpu()!="LPC1774"&&!cpuis("LPC4072*")&&!cpuis("LPC4074*")&&!cpuis("LPC4076*")&&!cpuis("LPC4078*")&&!cpuis("LPC4088*")) bitfld.long 0x1c 11.--15. " IP_RIT ,Repetitive Interrupt Timer Interrupt Priority" "Highest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,Lowest" endif sif (cpu()=="LPC1758"||cpu()=="LPC1764"||cpu()=="LPC1766"||cpu()=="LPC1767"||cpu()=="LPC1768"||cpu()=="LPC1769"||cpu()=="LPC1776"||cpu()=="LPC1778"||cpu()=="LPC1786"||cpu()=="LPC1788"||cpuis("LPC4076*")||cpuis("LPC4078*")||cpuis("LPC4088*")) textline " " bitfld.long 0x1c 3.--7. " IP_ENET ,Ethernet Interrupt Priority" "Highest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,Lowest" endif sif (cpu()!="LPC1763"&&cpu()!="LPC1767"&&cpu()!="LPC1820"&&cpu()!="LPC1830"&&cpu()!="LPC1850"&&cpu()!="LPC1853"&&cpu()!="LPC1857") group.long 0x420++0x3 line.long 0x0 "IPR8, Interrupt Priority Register 8" sif (cpu()=="LPC1772"||cpu()=="LPC1774"||cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778"||cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788"||cpuis("LPC4076*")||cpuis("LPC4078*")||cpuis("LPC4088*")) bitfld.long 0x00 27.--31. " IP_UART4 ,UART4 interrupt priority" "Highest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,Lowest" textline " " endif bitfld.long 0x00 19.--23. " IP_CANACT ,CAN Activity Interrupt Priority" "Highest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,Lowest" textline " " bitfld.long 0x00 11.--15. " IP_USBACT ,USB Activity Interrupt Priority" "Highest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,Lowest" bitfld.long 0x00 3.--7. " IP_PLL1 ,PLL1 (USB PLL) Interrupt Priority" "Highest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,Lowest" endif sif (cpu()=="LPC1772"||cpu()=="LPC1774"||cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778"||cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788") group.long 0x424++0x7 line.long 0x00 "IPR9, Interrupt Priority Register 9" bitfld.long 0x00 27.--31. " IP_PWM0 ,PWM0 interrupt priority" "Highest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,Lowest" bitfld.long 0x00 19.--23. " IP_GPIO ,Priority of GPIO interrupts" "Highest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,Lowest" textline " " sif (cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788"||cpuis("LPC4088*")) bitfld.long 0x00 11.--15. " IP_LCD ,LCD controller interrupt priority" "Highest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,Lowest" textline " " endif bitfld.long 0x00 3.--7. " IP_SSP2 ,SSP2 interrupt priority" "Highest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,Lowest" line.long 0x04 "IPR10, Interrupt Priority Register 10" bitfld.long 0x04 3.--7. " IP_EEPROM ,SSP2 interrupt priority" "Highest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,Lowest" endif wgroup.long 0xf00++0x3 line.long 0x00 "STIR,Software Trigger Interrupt Register" hexmask.long.word 0x00 0.--8. 1. " INTID ,Generates an interrupt for the specified the interrupt number" width 0xb tree.end sif (cpu()!="LPC1772"&&cpu()!="LPC1774"&&cpu()!="LPC1776"&&cpu()!="LPC1777"&&cpu()!="LPC1778"&&cpu()!="LPC1785"&&cpu()!="LPC1786"&&cpu()!="LPC1787"&&cpu()!="LPC1788") tree "Pin Connect Block" base ad:0x4002C000 width 10. tree "Pin Function Select" group.long 0x00++0x3 line.long 0x00 "PINSEL0,Pin function select register 0" bitfld.long 0x00 30.--31. " P0.15 ,Port 0 Pin 15 Function" "GPIO0.15,TXD1,SCK0,SCK" bitfld.long 0x00 22.--23. " P0.11 ,Port 0 Pin 11 Function" "GPIO0.11,RXD2,SCL2,MAT3[1]" bitfld.long 0x00 20.--21. " P0.10 ,Port 0 Pin 10 Function" "GPIO0.10,TXD2,SDA2,MAT3[0]" textline " " bitfld.long 0x00 18.--19. " P0.09 ,Port 0 Pin 9 Function" "GPIO0.9,I2STX_SDA,MOSI1,MAT2[3]" bitfld.long 0x00 16.--17. " P0.08 ,Port 0 Pin 8 Function" "GPIO0.8,I2STX_WS,MISO1,MAT2[2]" bitfld.long 0x00 14.--15. " P0.07 ,Port 0 Pin 7 Function" "GPIO0.7,I2STX_CLK,SCK1,MAT2[1]" textline " " bitfld.long 0x00 12.--13. " P0.06 ,Port 0 Pin 6 Function" "GPIO0.6,I2SRX_SDA,SSEL1,MAT2[0]" sif (cpuis("LPC176*")) bitfld.long 0x00 10.--11. " P0.05 ,Port 0 Pin 5 Function" "GPIO0.5,I2SRX_WS,TD2,CAP2[1]" bitfld.long 0x00 8.--9. " P0.04 ,Port 0 Pin 4 Function" "GPIO0.4,I2SRX_CLK,RD2,CAP2[0]" endif textline " " bitfld.long 0x00 6.--7. " P0.03 ,Port 0 Pin 3 Function" "GPIO0.3,RXD0,AD0.6,?..." bitfld.long 0x00 4.--5. " P0.02 ,Port 0 Pin 2 Function" "GPIO0.2,TXD0,AD0.7,?..." bitfld.long 0x00 2.--3. " P0.01 ,Port 0 Pin 1 Function" "GPIO0.1,TD1,RXD3,SCL1" textline " " bitfld.long 0x00 0.--1. " P0.00 ,Port 0 Pin 0 Function" "GPIO0.0,RD1,TXD3,SDA1" group.long 0x04++0x7 sif (cpuis("LPC176*")) line.long 0x00 "PINSEL1,Pin function select register 1" bitfld.long 0x00 28.--29. " P0.30 ,Port 0 Pin 30 Function" "GPIO0.30,USB_D-1,?..." bitfld.long 0x00 26.--27. " P0.29 ,Port 0 Pin 29 Function" "GPIO0.29,USB_D+1,?..." bitfld.long 0x00 24.--25. " P0.28 ,Port 0 Pin 28 Function" "GPIO0.28,SCL0,USB_SCL,?..." textline " " bitfld.long 0x00 22.--23. " P0.27 ,Port 0 Pin 27 Function" "GPIO0.27,SDA0,USB_SDA,?..." bitfld.long 0x00 20.--21. " P0.26 ,Port 0 Pin 26 Function" "GPIO0.26,AD0[3],AOUT,RXD3" bitfld.long 0x00 18.--19. " P0.25 ,Port 0 Pin 25 Function" "GPIO0.25,AD0[2],I2SRX_SDA,TXD3" textline " " bitfld.long 0x00 16.--17. " P0.24 ,Port 0 Pin 24 Function" "GPIO0.24,AD0[1],I2SRX_WS,CAP3[1]" bitfld.long 0x00 14.--15. " P0.23 ,Port 0 Pin 23 Function" "GPIO0.23,AD0[0],I2SRX_CLK,CAP3[0]" bitfld.long 0x00 12.--13. " P0.22 ,Port 0 Pin 22 Function" "GPIO0.22,RTS1,Reserved,TD1" textline " " bitfld.long 0x00 10.--11. " P0.21 ,Port 0 Pin 21 Function" "GPIO0.21,RI1,Reserved,RD1" bitfld.long 0x00 8.--9. " P0.20 ,Port 0 Pin 20 Function" "GPIO0.20,DTR1,Reserved,SCL1" bitfld.long 0x00 6.--7. " P0.19 ,Port 0 Pin 19 Function" "GPIO0.19,DSR1,Reserved,SDA1" textline " " bitfld.long 0x00 4.--5. " P0.18 ,Port 0 Pin 18 Function" "GPIO0.18,DCD1,MOSI0,MOSI" bitfld.long 0x00 2.--3. " P0.17 ,Port 0 Pin 17 Function" "GPIO0.17,CTS1,MISO0,MISO" bitfld.long 0x00 0.--1. " P0.16 ,Port 0 Pin 16 Function" "GPIO0.16,RXD1,SSEL0,SSEL" else line.long 0x00 "PINSEL1,Pin function select register 1" bitfld.long 0x00 28.--29. " P0.30 ,Port 0 Pin 30 Function" "GPIO0.30,USB_D-1,?..." bitfld.long 0x00 26.--27. " P0.29 ,Port 0 Pin 29 Function" "GPIO0.29,USB_D+1,?..." bitfld.long 0x00 20.--21. " P0.26 ,Port 0 Pin 26 Function" "GPIO0.26,AD0[3],AOUT,RXD3" textline " " bitfld.long 0x00 18.--19. " P0.25 ,Port 0 Pin 25 Function" "GPIO0.25,AD0[2],I2SRX_SDA,TXD3" bitfld.long 0x00 12.--13. " P0.22 ,Port 0 Pin 22 Function" "GPIO0.22,RTS1,Reserved,TD1" bitfld.long 0x00 4.--5. " P0.18 ,Port 0 Pin 18 Function" "GPIO0.18,DCD1,MOSI0,MOSI" textline " " bitfld.long 0x00 2.--3. " P0.17 ,Port 0 Pin 17 Function" "GPIO0.17,CTS1,MISO0,MISO" bitfld.long 0x00 0.--1. " P0.16 ,Port 0 Pin 16 Function" "GPIO0.16,RXD1,SSEL0,SSEL" endif line.long 0x04 "PINSEL2,Pin function select register 2" bitfld.long 0x04 30.--31. " P1.15 ,Port 1 Pin 15 Function" "GPIO1.15,ENET_ REF_CLK,?..." bitfld.long 0x04 28.--29. " P1.14 ,Port 1 Pin 14 Function" "GPIO1.14,ENET_RX_ER,?..." bitfld.long 0x04 20.--21. " P1.10 ,Port 1 Pin 10 Function" "GPIO1.10,ENET_RXD1,?..." textline " " bitfld.long 0x04 18.--19. " P1.09 ,Port 1 Pin 9 Function" "GPIO1.9,ENET_RXD0,?..." bitfld.long 0x04 16.--17. " P1.08 ,Port 1 Pin 8 Function" "GPIO1.8,ENET_CRS,?..." bitfld.long 0x04 8.--9. " P1.04 ,Port 1 Pin 4 Function" "GPIO1.4,ENET_TX_EN,?..." textline " " bitfld.long 0x04 2.--3. " P1.01 ,Port 1 Pin 1 Function" "GPIO1.1,ENET_TXD1,?..." bitfld.long 0x04 0.--1. " P1.00 ,Port 1 Pin 0 Function" "GPIO1.0,ENET_TXD0,?..." group.long 0x0c++0x3 sif (cpuis("LPC176*")) line.long 0x00 "PINSEL3,Pin function select register 3" bitfld.long 0x00 30.--31. " P1.31 ,Port 1 Pin 31 Function" "GPIO1.31,Reserved,SCK1,AD0[5]" bitfld.long 0x00 28.--29. " P1.30 ,Port 1 Pin 30 Function" "GPIO1.30,Reserved,VBUS,AD0[4]" bitfld.long 0x00 26.--27. " P1.29 ,Port 1 Pin 29 Function" "GPIO1.29,MCOB2,MAT0[1],?..." textline " " bitfld.long 0x00 24.--25. " P1.28 ,Port 1 Pin 28 Function" "GPIO1.28,MCOA2,PCAP1[0],MAT0[0]" bitfld.long 0x00 22.--23. " P1.27 ,Port 1 Pin 27 Function" "GPIO1.27,CLKOUT,/USB_OVRCR,CAP0[1]" bitfld.long 0x00 20.--21. " P1.26 ,Port 1 Pin 26 Function" "GPIO1.26,MCOB1,PWM1[6],CAP0[0]" textline " " bitfld.long 0x00 18.--19. " P1.25 ,Port 1 Pin 25 Function" "GPIO1.25,MCOA1,Reserved,MAT1[1]" bitfld.long 0x00 16.--17. " P1.24 ,Port 1 Pin 24 Function" "GPIO1.24,MCI2,PWM1[5],MOSI0" bitfld.long 0x00 14.--15. " P1.23 ,Port 1 Pin 23 Function" "GPIO1.23,MCI1,PWM1[4],MISO0" textline " " bitfld.long 0x00 12.--13. " P1.22 ,Port 1 Pin 22 Function" "GPIO1.22,MC0B0,USB_PWRD,MAT1[0]" bitfld.long 0x00 10.--11. " P1.21 ,Port 1 Pin 21 Function" "GPIO1.21,/MCABORT,PWM1[3],SSEL0" bitfld.long 0x00 8.--9. " P1.20 ,Port 1 Pin 20 Function" "GPIO1.20,MCI0,PWM1[2],SCK0" textline " " bitfld.long 0x00 6.--7. " P1.19 ,Port 1 Pin 19 Function" "GPIO1.19,MC0A,/USB_PPWR,CAP1[1]" bitfld.long 0x00 4.--5. " P1.18 ,Port 1 Pin 18 Function" "GPIO1.18,USB_UP_LED,PWM1[1],CAP1[0]" bitfld.long 0x00 2.--3. " P1.17 ,Port 1 Pin 17 Function" "GPIO1.17,ENET_MDIO,?..." textline " " bitfld.long 0x00 0.--1. " P1.16 ,Port 1 Pin 16 Function" "GPIO1.16,ENET_MDC,?..." else line.long 0x00 "PINSEL3,Pin function select register 3" bitfld.long 0x00 30.--31. " P1.31 ,Port 1 Pin 31 Function" "GPIO1.31,Reserved,SCK1,AD0[5]" bitfld.long 0x00 28.--29. " P1.30 ,Port 1 Pin 30 Function" "GPIO1.30,Reserved,VBUS,AD0[4]" bitfld.long 0x00 26.--27. " P1.29 ,Port 1 Pin 29 Function" "GPIO1.29,MC2B,MAT0[1],?..." textline " " bitfld.long 0x00 24.--25. " P1.28 ,Port 1 Pin 28 Function" "GPIO1.28,MC2A,PCAP1[0],MAT0[0]" bitfld.long 0x00 20.--21. " P1.26 ,Port 1 Pin 26 Function" "GPIO1.26,MC1B,PWM1[6],CAP0[0]" bitfld.long 0x00 18.--19. " P1.25 ,Port 1 Pin 25 Function" "GPIO1.25,MC1A,/USB_HSTEN,MAT1[1]" textline " " bitfld.long 0x00 16.--17. " P1.24 ,Port 1 Pin 24 Function" "GPIO1.24,MCFB2,PWM1[5],MOSI0" bitfld.long 0x00 14.--15. " P1.23 ,Port 1 Pin 23 Function" "GPIO1.23,MCFB1,PWM1[4],MISO0" bitfld.long 0x00 12.--13. " P1.22 ,Port 1 Pin 22 Function" "GPIO1.22,MC0B,USB_PWRD,MAT1[0]" textline " " bitfld.long 0x00 8.--9. " P1.20 ,Port 1 Pin 20 Function" "GPIO1.20,MCFB0,PWM1[2],SCK0" bitfld.long 0x00 6.--7. " P1.19 ,Port 1 Pin 19 Function" "GPIO1.19,MC0A,/USB_PPWR,CAP1[1]" bitfld.long 0x00 4.--5. " P1.18 ,Port 1 Pin 18 Function" "GPIO1.18,USB_UP_LED,PWM1[1],CAP1[0]" endif group.long 0x10++0x3 line.long 0x00 "PINSEL4,Pin function select register 4" sif (cpuis("LPC176*")) bitfld.long 0x00 26.--27. " P2.13 ,Port 2 Pin 13 Function" "GPIO2.13,/EINT3,Reserved,I2STX_SDA" bitfld.long 0x00 24.--25. " P2.12 ,Port 2 Pin 12 Function" "GPIO2.12,/EINT2,Reserved,I2STX_WS" bitfld.long 0x00 22.--23. " P2.11 ,Port 2 Pin 11 Function" "GPIO2.11,/EINT1,Reserved,I2STX_CLK" textline " " endif bitfld.long 0x00 20.--21. " P2.10 ,Port 2 Pin 10 Function" "GPIO2.10,/EINT0,NMI,?..." bitfld.long 0x00 18.--19. " P2.09 ,Port 2 Pin 9 Function" "GPIO2.9,USB_CONNECT,RXD2,ENET_MDIO" bitfld.long 0x00 16.--17. " P2.08 ,Port 2 Pin 8 Function" "GPIO2.8,TD2,TXD2,ENET_MDC" textline " " bitfld.long 0x00 14.--15. " P2.07 ,Port 2 Pin 7 Function" "GPIO2.7,RD2,RTS1,?..." bitfld.long 0x00 12.--13. " P2.06 ,Port 2 Pin 6 Function" "GPIO2.6,PCAP1[0],RI1,?..." bitfld.long 0x00 10.--11. " P2.05 ,Port 2 Pin 5 Function" "GPIO2.5,PWM1[6],DTR1,?..." textline " " bitfld.long 0x00 8.--9. " P2.04 ,Port 2 Pin 4 Function" "GPIO2.4,PWM1[5],DSR1,?..." bitfld.long 0x00 6.--7. " P2.03 ,Port 2 Pin 3 Function" "GPIO2.3,PWM1[4],DCD1,?..." bitfld.long 0x00 4.--5. " P2.02 ,Port 2 Pin 2 Function" "GPIO2.2,PWM1[3],CTS1,?..." textline " " bitfld.long 0x00 2.--3. " P2.01 ,Port 2 Pin 1 Function" "GPIO2.1,PWM1[2],RXD1,?..." bitfld.long 0x00 0.--1. " P2.00 ,Port 2 Pin 0 Function" "GPIO2.0,PWM1[1],TXD1,?..." sif (cpuis("LPC176*")) group.long 0x1c++0x3 line.long 0x00 "PINSEL7,Pin function select register 7" bitfld.long 0x00 20.--21. " P3.26 ,Port 3 Pin 26 Function" "GPIO3.26,STCLK,MAT0[1],PWM1[3]" bitfld.long 0x00 18.--19. " P3.25 ,Port 3 Pin 25 Function" "GPIO3.25,Reserved,MAT0[0],PWM1[2]" endif group.long 0x24++0x3 line.long 0x00 "PINSEL9,Pin function select register 9" bitfld.long 0x00 26.--27. " P4.29 ,Port 4 Pin 29 Function" "GPIO4.29,TX_MCLK,MAT2[1],RXD3" bitfld.long 0x00 24.--25. " P4.28 ,Port 4 Pin 28 Function" "GPIO4.28,RX_MCLK,MAT2[0],TXD3" group.long 0x28++0x3 line.long 0x00 "PINSEL10,Pin function select register 10" bitfld.long 0x00 3. " GPIO/TRACE ,TPIU interface enable" "GPIO,Trace" tree.end tree "Pin Mode Select Registers" group.long 0x40++0xF line.long 0x0 "PINMODE0,Pin mode select register 0" bitfld.long 0x0 30.--31. " P0.15MODE ,PORT0 pin 15 on-chip pull-up/down resistor control" "Pull-up,Repeater,None,Pull-down" bitfld.long 0x0 22.--23. " P0.11MODE ,PORT0 pin 11 on-chip pull-up/down resistor control" "Pull-up,Repeater,None,Pull-down" bitfld.long 0x0 20.--21. " P0.10MODE ,PORT0 pin 10 on-chip pull-up/down resistor control" "Pull-up,Repeater,None,Pull-down" textline " " bitfld.long 0x0 18.--19. " P0.09MODE ,PORT0 pin 9 on-chip pull-up/down resistor control" "Pull-up,Repeater,None,Pull-down" bitfld.long 0x0 16.--17. " P0.08MODE ,PORT0 pin 8 on-chip pull-up/down resistor control" "Pull-up,Repeater,None,Pull-down" bitfld.long 0x0 14.--15. " P0.07MODE ,PORT0 pin 7 on-chip pull-up/down resistor control" "Pull-up,Repeater,None,Pull-down" textline " " bitfld.long 0x0 12.--13. " P0.06MODE ,PORT0 pin 6 on-chip pull-up/down resistor control" "Pull-up,Repeater,None,Pull-down" sif (cpuis("LPC176*")) bitfld.long 0x0 10.--11. " P0.05MODE ,PORT0 pin 5 on-chip pull-up/down resistor control" "Pull-up,Repeater,None,Pull-down" bitfld.long 0x0 8.--9. " P0.04MODE ,PORT0 pin 4 on-chip pull-up/down resistor control" "Pull-up,Repeater,None,Pull-down" endif textline " " bitfld.long 0x0 6.--7. " P0.03MODE ,PORT0 pin 3 on-chip pull-up/down resistor control" "Pull-up,Repeater,None,Pull-down" bitfld.long 0x0 4.--5. " P0.02MODE ,PORT0 pin 2 on-chip pull-up/down resistor control" "Pull-up,Repeater,None,Pull-down" bitfld.long 0x0 2.--3. " P0.01MODE ,PORT0 pin 1 on-chip pull-up/down resistor control" "Pull-up,Repeater,None,Pull-down" textline " " bitfld.long 0x0 0.--1. " P0.00MODE ,PORT0 pin 0 on-chip pull-up/down resistor control" "Pull-up,Repeater,None,Pull-down" sif (cpuis("LPC176*")) line.long 0x4 "PINMODE1,Pin mode select register 1" bitfld.long 0x4 20.--21. " P0.26MODE ,PORT0 pin 26 on-chip pull-up/down resistor control" "Pull-up,Repeater,None,Pull-down" bitfld.long 0x4 18.--19. " P0.25MODE ,PORT0 pin 25 on-chip pull-up/down resistor control" "Pull-up,Repeater,None,Pull-down" bitfld.long 0x4 16.--17. " P0.24MODE ,PORT0 pin 24 on-chip pull-up/down resistor control" "Pull-up,Repeater,None,Pull-down" textline " " bitfld.long 0x4 14.--15. " P0.23MODE ,PORT0 pin 23 on-chip pull-up/down resistor control" "Pull-up,Repeater,None,Pull-down" bitfld.long 0x4 12.--13. " P0.22MODE ,PORT0 pin 22 on-chip pull-up/down resistor control" "Pull-up,Repeater,None,Pull-down" bitfld.long 0x4 10.--11. " P0.21MODE ,PORT0 pin 21 on-chip pull-up/down resistor control" "Pull-up,Repeater,None,Pull-down" textline " " bitfld.long 0x4 8.--9. " P0.20MODE ,PORT0 pin 20 on-chip pull-up/down resistor control" "Pull-up,Repeater,None,Pull-down" bitfld.long 0x4 6.--7. " P0.19MODE ,PORT0 pin 19 on-chip pull-up/down resistor control" "Pull-up,Repeater,None,Pull-down" bitfld.long 0x4 4.--5. " P0.18MODE ,PORT0 pin 18 on-chip pull-up/down resistor control" "Pull-up,Repeater,None,Pull-down" textline " " bitfld.long 0x4 2.--3. " P0.17MODE ,PORT0 pin 17 on-chip pull-up/down resistor control" "Pull-up,Repeater,None,Pull-down" bitfld.long 0x4 0.--1. " P0.16MODE ,PORT0 pin 16 on-chip pull-up/down resistor control" "Pull-up,Repeater,None,Pull-down" else line.long 0x4 "PINMODE1,Pin mode select register 1" bitfld.long 0x4 20.--21. " P0.26MODE ,PORT0 pin 26 on-chip pull-up/down resistor control" "Pull-up,Repeater,None,Pull-down" bitfld.long 0x4 18.--19. " P0.25MODE ,PORT0 pin 25 on-chip pull-up/down resistor control" "Pull-up,Repeater,None,Pull-down" bitfld.long 0x4 12.--13. " P0.22MODE ,PORT0 pin 22 on-chip pull-up/down resistor control" "Pull-up,Repeater,None,Pull-down" textline " " bitfld.long 0x4 4.--5. " P0.18MODE ,PORT0 pin 18 on-chip pull-up/down resistor control" "Pull-up,Repeater,None,Pull-down" bitfld.long 0x4 2.--3. " P0.17MODE ,PORT0 pin 17 on-chip pull-up/down resistor control" "Pull-up,Repeater,None,Pull-down" bitfld.long 0x4 0.--1. " P0.16MODE ,PORT0 pin 16 on-chip pull-up/down resistor control" "Pull-up,Repeater,None,Pull-down" endif line.long 0x8 "PINMODE2,Pin mode select register 2" bitfld.long 0x8 30.--31. " P1.15MODE ,PORT1 pin 15 on-chip pull-up/down resistor control" "Pull-up,Repeater,None,Pull-down" bitfld.long 0x8 28.--29. " P1.14MODE ,PORT1 pin 14 on-chip pull-up/down resistor control" "Pull-up,Repeater,None,Pull-down" bitfld.long 0x8 20.--21. " P1.10MODE ,PORT1 pin 10 on-chip pull-up/down resistor control" "Pull-up,Repeater,None,Pull-down" textline " " bitfld.long 0x8 18.--19. " P1.09MODE ,PORT1 pin 9 on-chip pull-up/down resistor control" "Pull-up,Repeater,None,Pull-down" bitfld.long 0x8 16.--17. " P1.08MODE ,PORT1 pin 8 on-chip pull-up/down resistor control" "Pull-up,Repeater,None,Pull-down" bitfld.long 0x8 8.--9. " P1.04MODE ,PORT1 pin 4 on-chip pull-up/down resistor control" "Pull-up,Repeater,None,Pull-down" textline " " bitfld.long 0x8 2.--3. " P1.01MODE ,PORT1 pin 1 on-chip pull-up/down resistor control" "Pull-up,Repeater,None,Pull-down" bitfld.long 0x8 0.--1. " P1.00MODE ,PORT1 pin 0 on-chip pull-up/down resistor control" "Pull-up,Repeater,None,Pull-down" sif (cpuis("LPC176*")) line.long 0xC "PINMODE3,Pin mode select register 3" bitfld.long 0xC 30.--31. " P1.31MODE ,PORT1 pin 31 on-chip pull-up/down resistor control" "Pull-up,Repeater,None,Pull-down" bitfld.long 0xC 28.--29. " P1.30MODE ,PORT1 pin 30 on-chip pull-up/down resistor control" "Pull-up,Repeater,None,Pull-down" bitfld.long 0xC 26.--27. " P1.29MODE ,PORT1 pin 29 on-chip pull-up/down resistor control" "Pull-up,Repeater,None,Pull-down" textline " " bitfld.long 0xC 24.--25. " P1.28MODE ,PORT1 pin 28 on-chip pull-up/down resistor control" "Pull-up,Repeater,None,Pull-down" bitfld.long 0xC 22.--23. " P1.27MODE ,PORT1 pin 27 on-chip pull-up/down resistor control" "Pull-up,Repeater,None,Pull-down" bitfld.long 0xC 20.--21. " P1.26MODE ,PORT1 pin 26 on-chip pull-up/down resistor control" "Pull-up,Repeater,None,Pull-down" textline " " bitfld.long 0xC 18.--19. " P1.25MODE ,PORT1 pin 25 on-chip pull-up/down resistor control" "Pull-up,Repeater,None,Pull-down" bitfld.long 0xC 16.--17. " P1.24MODE ,PORT1 pin 24 on-chip pull-up/down resistor control" "Pull-up,Repeater,None,Pull-down" bitfld.long 0xC 14.--15. " P1.23MODE ,PORT1 pin 23 on-chip pull-up/down resistor control" "Pull-up,Repeater,None,Pull-down" textline " " bitfld.long 0xC 12.--13. " P1.22MODE ,PORT1 pin 22 on-chip pull-up/down resistor control" "Pull-up,Repeater,None,Pull-down" bitfld.long 0xC 10.--11. " P1.21MODE ,PORT1 pin 21 on-chip pull-up/down resistor control" "Pull-up,Repeater,None,Pull-down" bitfld.long 0xC 8.--9. " P1.20MODE ,PORT1 pin 20 on-chip pull-up/down resistor control" "Pull-up,Repeater,None,Pull-down" textline " " bitfld.long 0xC 6.--7. " P1.19MODE ,PORT1 pin 19 on-chip pull-up/down resistor control" "Pull-up,Repeater,None,Pull-down" bitfld.long 0xC 4.--5. " P1.18MODE ,PORT1 pin 18 on-chip pull-up/down resistor control" "Pull-up,Repeater,None,Pull-down" bitfld.long 0xC 2.--3. " P1.17MODE ,PORT1 pin 17 on-chip pull-up/down resistor control" "Pull-up,Repeater,None,Pull-down" textline " " bitfld.long 0xC 0.--1. " P1.16MODE ,PORT1 pin 16 on-chip pull-up/down resistor control" "Pull-up,Repeater,None,Pull-down" else line.long 0xC "PINMODE3,Pin mode select register 3" bitfld.long 0xC 30.--31. " P1.31MODE ,PORT1 pin 31 on-chip pull-up/down resistor control" "Pull-up,Repeater,None,Pull-down" bitfld.long 0xC 28.--29. " P1.30MODE ,PORT1 pin 30 on-chip pull-up/down resistor control" "Pull-up,Repeater,None,Pull-down" bitfld.long 0xC 26.--27. " P1.29MODE ,PORT1 pin 29 on-chip pull-up/down resistor control" "Pull-up,Repeater,None,Pull-down" textline " " bitfld.long 0xC 24.--25. " P1.28MODE ,PORT1 pin 28 on-chip pull-up/down resistor control" "Pull-up,Repeater,None,Pull-down" bitfld.long 0xC 20.--21. " P1.26MODE ,PORT1 pin 26 on-chip pull-up/down resistor control" "Pull-up,Repeater,None,Pull-down" bitfld.long 0xC 18.--19. " P1.25MODE ,PORT1 pin 25 on-chip pull-up/down resistor control" "Pull-up,Repeater,None,Pull-down" textline " " bitfld.long 0xC 16.--17. " P1.24MODE ,PORT1 pin 24 on-chip pull-up/down resistor control" "Pull-up,Repeater,None,Pull-down" bitfld.long 0xC 14.--15. " P1.23MODE ,PORT1 pin 23 on-chip pull-up/down resistor control" "Pull-up,Repeater,None,Pull-down" bitfld.long 0xC 12.--13. " P1.22MODE ,PORT1 pin 22 on-chip pull-up/down resistor control" "Pull-up,Repeater,None,Pull-down" textline " " bitfld.long 0xC 8.--9. " P1.20MODE ,PORT1 pin 20 on-chip pull-up/down resistor control" "Pull-up,Repeater,None,Pull-down" bitfld.long 0xC 6.--7. " P1.19MODE ,PORT1 pin 19 on-chip pull-up/down resistor control" "Pull-up,Repeater,None,Pull-down" bitfld.long 0xC 4.--5. " P1.18MODE ,PORT1 pin 18 on-chip pull-up/down resistor control" "Pull-up,Repeater,None,Pull-down" endif group.long 0x50++0x3 line.long 0x0 "PINMODE4,Pin mode select register 4" sif (cpuis("LPC176*")) bitfld.long 0x0 26.--27. " P2.13MODE ,PORT2 pin 13 on-chip pull-up/down resistor control" "Pull-up,Repeater,None,Pull-down" bitfld.long 0x0 24.--25. " P2.12MODE ,PORT2 pin 12 on-chip pull-up/down resistor control" "Pull-up,Repeater,None,Pull-down" bitfld.long 0x0 22.--23. " P2.11MODE ,PORT2 pin 11 on-chip pull-up/down resistor control" "Pull-up,Repeater,None,Pull-down" textline " " endif bitfld.long 0x0 20.--21. " P2.10MODE ,PORT2 pin 10 on-chip pull-up/down resistor control" "Pull-up,Repeater,None,Pull-down" bitfld.long 0x0 18.--19. " P2.09MODE ,PORT2 pin 9 on-chip pull-up/down resistor control" "Pull-up,Repeater,None,Pull-down" bitfld.long 0x0 16.--17. " P2.08MODE ,PORT2 pin 8 on-chip pull-up/down resistor control" "Pull-up,Repeater,None,Pull-down" textline " " bitfld.long 0x0 14.--15. " P2.07MODE ,PORT2 pin 7 on-chip pull-up/down resistor control" "Pull-up,Repeater,None,Pull-down" bitfld.long 0x0 12.--13. " P2.06MODE ,PORT2 pin 6 on-chip pull-up/down resistor control" "Pull-up,Repeater,None,Pull-down" bitfld.long 0x0 10.--11. " P2.05MODE ,PORT2 pin 5 on-chip pull-up/down resistor control" "Pull-up,Repeater,None,Pull-down" textline " " bitfld.long 0x0 8.--9. " P2.04MODE ,PORT2 pin 4 on-chip pull-up/down resistor control" "Pull-up,Repeater,None,Pull-down" bitfld.long 0x0 6.--7. " P2.03MODE ,PORT2 pin 3 on-chip pull-up/down resistor control" "Pull-up,Repeater,None,Pull-down" bitfld.long 0x0 4.--5. " P2.02MODE ,PORT2 pin 2 on-chip pull-up/down resistor control" "Pull-up,Repeater,None,Pull-down" textline " " bitfld.long 0x0 2.--3. " P2.01MODE ,PORT2 pin 1 on-chip pull-up/down resistor control" "Pull-up,Repeater,None,Pull-down" bitfld.long 0x0 0.--1. " P2.00MODE ,PORT2 pin 0 on-chip pull-up/down resistor control" "Pull-up,Repeater,None,Pull-down" sif (cpuis("LPC176*")) group.long 0x5c++0x3 line.long 0x00 "PINMODE7,Pin mode select register 7" bitfld.long 0x00 20.--21. " P3.26MODE ,PORT3 pin 26 on-chip pull-up/down resistor control" "Pull-up,Repeater,None,Pull-down" bitfld.long 0x00 18.--19. " P3.25MODE ,PORT3 pin 25 on-chip pull-up/down resistor control" "Pull-up,Repeater,None,Pull-down" endif group.long 0x64++0x3 line.long 0x00 "PINMODE9,Pin mode select register 9" bitfld.long 0x00 26.--27. " P4.29MODE ,PORT4 pin 29 on-chip pull-up/down resistor control" "Pull-up,Repeater,None,Pull-down" bitfld.long 0x00 24.--25. " P4.28MODE ,PORT4 pin 28 on-chip pull-up/down resistor control" "Pull-up,Repeater,None,Pull-down" tree.end width 11. tree "Open Drain Pin Mode Select" group.long 0x68++0x0b line.long 0x00 "PINMODE_OD0,Open Drain Pin Mode Select Register 0" bitfld.long 0x00 30. " P0.30OD ,Port 0 pin 30 open drain mode control" "Normal,Open drain" bitfld.long 0x00 29. " P0.29OD ,Port 0 pin 29 open drain mode control" "Normal,Open drain" bitfld.long 0x00 26. " P0.26OD ,Port 0 pin 26 open drain mode control" "Normal,Open drain" textline " " bitfld.long 0x00 25. " P0.25OD ,Port 0 pin 25 open drain mode control" "Normal,Open drain" bitfld.long 0x00 24. " P0.24OD ,Port 0 pin 24 open drain mode control" "Normal,Open drain" bitfld.long 0x00 23. " P0.23OD ,Port 0 pin 23 open drain mode control" "Normal,Open drain" textline " " bitfld.long 0x00 22. " P0.22OD ,Port 0 pin 22 open drain mode control" "Normal,Open drain" bitfld.long 0x00 21. " P0.21OD ,Port 0 pin 21 open drain mode control" "Normal,Open drain" bitfld.long 0x00 20. " P0.20OD ,Port 0 pin 20 open drain mode control" "Normal,Open drain" textline " " bitfld.long 0x00 19. " P0.19OD ,Port 0 pin 19 open drain mode control" "Normal,Open drain" bitfld.long 0x00 18. " P0.18OD ,Port 0 pin 18 open drain mode control" "Normal,Open drain" bitfld.long 0x00 17. " P0.17OD ,Port 0 pin 17 open drain mode control" "Normal,Open drain" textline " " bitfld.long 0x00 16. " P0.16OD ,Port 0 pin 16 open drain mode control" "Normal,Open drain" bitfld.long 0x00 15. " P0.15OD ,Port 0 pin 15 open drain mode control" "Normal,Open drain" bitfld.long 0x00 11. " P0.11OD ,Port 0 pin 11 open drain mode control" "Normal,Open drain" textline " " bitfld.long 0x00 10. " P0.10OD ,Port 0 pin 10 open drain mode control" "Normal,Open drain" bitfld.long 0x00 9. " P0.09OD ,Port 0 pin 9 open drain mode control" "Normal,Open drain" bitfld.long 0x00 8. " P0.08OD ,Port 0 pin 8 open drain mode control" "Normal,Open drain" textline " " bitfld.long 0x00 7. " P0.07OD ,Port 0 pin 7 open drain mode control" "Normal,Open drain" bitfld.long 0x00 6. " P0.06OD ,Port 0 pin 6 open drain mode control" "Normal,Open drain" bitfld.long 0x00 5. " P0.05OD ,Port 0 pin 5 open drain mode control" "Normal,Open drain" textline " " bitfld.long 0x00 4. " P0.04OD ,Port 0 pin 4 open drain mode control" "Normal,Open drain" bitfld.long 0x00 3. " P0.03OD ,Port 0 pin 3 open drain mode control" "Normal,Open drain" bitfld.long 0x00 2. " P0.02OD ,Port 0 pin 2 open drain mode control" "Normal,Open drain" textline " " bitfld.long 0x00 1. " P0.01OD ,Port 0 pin 1 open drain mode control" "Normal,Open drain" bitfld.long 0x00 0. " P0.00OD ,Port 0 pin 0 open drain mode control" "Normal,Open drain" sif (cpuis("LPC176*")) line.long 0x04 "PINMODE_OD1,Open Drain Pin Mode Select Register 1" bitfld.long 0x04 31. " P1.31OD ,Port 1 pin 31 open drain mode control" "Normal,Open drain" bitfld.long 0x04 30. " P1.30OD ,Port 1 pin 30 open drain mode control" "Normal,Open drain" bitfld.long 0x04 29. " P1.29OD ,Port 1 pin 29 open drain mode control" "Normal,Open drain" textline " " bitfld.long 0x04 28. " P1.28OD ,Port 1 pin 28 open drain mode control" "Normal,Open drain" bitfld.long 0x04 27. " P1.27OD ,Port 1 pin 27 open drain mode control" "Normal,Open drain" bitfld.long 0x04 26. " P1.26OD ,Port 1 pin 26 open drain mode control" "Normal,Open drain" textline " " bitfld.long 0x04 25. " P1.25OD ,Port 1 pin 25 open drain mode control" "Normal,Open drain" bitfld.long 0x04 24. " P1.24OD ,Port 1 pin 24 open drain mode control" "Normal,Open drain" bitfld.long 0x04 23. " P1.23OD ,Port 1 pin 23 open drain mode control" "Normal,Open drain" textline " " bitfld.long 0x04 22. " P1.22OD ,Port 1 pin 22 open drain mode control" "Normal,Open drain" bitfld.long 0x04 21. " P1.21OD ,Port 1 pin 21 open drain mode control" "Normal,Open drain" bitfld.long 0x04 20. " P1.20OD ,Port 1 pin 20 open drain mode control" "Normal,Open drain" textline " " bitfld.long 0x04 19. " P1.19OD ,Port 1 pin 19 open drain mode control" "Normal,Open drain" bitfld.long 0x04 18. " P1.18OD ,Port 1 pin 18 open drain mode control" "Normal,Open drain" bitfld.long 0x04 17. " P1.17OD ,Port 1 pin 17 open drain mode control" "Normal,Open drain" textline " " bitfld.long 0x04 16. " P1.16OD ,Port 1 pin 16 open drain mode control" "Normal,Open drain" bitfld.long 0x04 15. " P1.15OD ,Port 1 pin 15 open drain mode control" "Normal,Open drain" bitfld.long 0x04 14. " P1.14OD ,Port 1 pin 14 open drain mode control" "Normal,Open drain" textline " " bitfld.long 0x04 10. " P1.10OD ,Port 1 pin 10 open drain mode control" "Normal,Open drain" bitfld.long 0x04 9. " P1.09OD ,Port 1 pin 9 open drain mode control" "Normal,Open drain" bitfld.long 0x04 8. " P1.08OD ,Port 1 pin 8 open drain mode control" "Normal,Open drain" textline " " bitfld.long 0x04 4. " P1.04OD ,Port 1 pin 4 open drain mode control" "Normal,Open drain" bitfld.long 0x04 1. " P1.01OD ,Port 1 pin 1 open drain mode control" "Normal,Open drain" bitfld.long 0x04 0. " P1.00OD ,Port 1 pin 0 open drain mode control" "Normal,Open drain" else line.long 0x04 "PINMODE_OD1,Open Drain Pin Mode Select Register 1" bitfld.long 0x04 31. " P1.31OD ,Port 1 pin 31 open drain mode control" "Normal,Open drain" bitfld.long 0x04 30. " P1.30OD ,Port 1 pin 30 open drain mode control" "Normal,Open drain" bitfld.long 0x04 29. " P1.29OD ,Port 1 pin 29 open drain mode control" "Normal,Open drain" textline " " bitfld.long 0x04 28. " P1.28OD ,Port 1 pin 28 open drain mode control" "Normal,Open drain" bitfld.long 0x04 26. " P1.26OD ,Port 1 pin 26 open drain mode control" "Normal,Open drain" bitfld.long 0x04 25. " P1.25OD ,Port 1 pin 25 open drain mode control" "Normal,Open drain" textline " " bitfld.long 0x04 24. " P1.24OD ,Port 1 pin 24 open drain mode control" "Normal,Open drain" bitfld.long 0x04 23. " P1.23OD ,Port 1 pin 23 open drain mode control" "Normal,Open drain" bitfld.long 0x04 22. " P1.22OD ,Port 1 pin 22 open drain mode control" "Normal,Open drain" textline " " bitfld.long 0x04 20. " P1.20OD ,Port 1 pin 20 open drain mode control" "Normal,Open drain" bitfld.long 0x04 19. " P1.19OD ,Port 1 pin 19 open drain mode control" "Normal,Open drain" bitfld.long 0x04 18. " P1.18OD ,Port 1 pin 18 open drain mode control" "Normal,Open drain" textline " " bitfld.long 0x04 15. " P1.15OD ,Port 1 pin 15 open drain mode control" "Normal,Open drain" bitfld.long 0x04 14. " P1.14OD ,Port 1 pin 14 open drain mode control" "Normal,Open drain" bitfld.long 0x04 10. " P1.10OD ,Port 1 pin 10 open drain mode control" "Normal,Open drain" textline " " bitfld.long 0x04 9. " P1.09OD ,Port 1 pin 9 open drain mode control" "Normal,Open drain" bitfld.long 0x04 8. " P1.08OD ,Port 1 pin 8 open drain mode control" "Normal,Open drain" bitfld.long 0x04 4. " P1.04OD ,Port 1 pin 4 open drain mode control" "Normal,Open drain" textline " " bitfld.long 0x04 1. " P1.01OD ,Port 1 pin 1 open drain mode control" "Normal,Open drain" bitfld.long 0x04 0. " P1.00OD ,Port 1 pin 0 open drain mode control" "Normal,Open drain" endif line.long 0x08 "PINMODE_OD2,Open Drain Pin Mode Select Register 2" sif (cpuis("LPC176*")) bitfld.long 0x08 13. " P2.13OD ,Port 2 pin 13 open drain mode control" "Normal,Open drain" bitfld.long 0x08 12. " P2.12OD ,Port 2 pin 12 open drain mode control" "Normal,Open drain" bitfld.long 0x08 11. " P2.11OD ,Port 2 pin 11 open drain mode control" "Normal,Open drain" textline " " endif bitfld.long 0x08 10. " P2.10OD ,Port 2 pin 10 open drain mode control" "Normal,Open drain" bitfld.long 0x08 9. " P2.09OD ,Port 2 pin 9 open drain mode control" "Normal,Open drain" bitfld.long 0x08 8. " P2.08OD ,Port 2 pin 8 open drain mode control" "Normal,Open drain" textline " " bitfld.long 0x08 7. " P2.07OD ,Port 2 pin 7 open drain mode control" "Normal,Open drain" bitfld.long 0x08 6. " P2.06OD ,Port 2 pin 6 open drain mode control" "Normal,Open drain" bitfld.long 0x08 5. " P2.05OD ,Port 2 pin 5 open drain mode control" "Normal,Open drain" textline " " bitfld.long 0x08 4. " P2.04OD ,Port 2 pin 4 open drain mode control" "Normal,Open drain" bitfld.long 0x08 3. " P2.03OD ,Port 2 pin 3 open drain mode control" "Normal,Open drain" bitfld.long 0x08 2. " P2.02OD ,Port 2 pin 2 open drain mode control" "Normal,Open drain" textline " " bitfld.long 0x08 1. " P2.01OD ,Port 2 pin 1 open drain mode control" "Normal,Open drain" bitfld.long 0x08 0. " P2.00OD ,Port 2 pin 0 open drain mode control" "Normal,Open drain" sif (cpuis("LPC176*")) group.long 0x74++0x3 line.long 0x00 "PINMODE_OD3,Open Drain Pin Mode Select Register 3" bitfld.long 0x00 26. " P3.26OD ,Port 3 pin 26 open drain mode control" "Normal,Open drain" bitfld.long 0x00 25. " P3.25OD ,Port 3 pin 25 open drain mode control" "Normal,Open drain" endif group.long 0x78++0x3 line.long 0x00 "PINMODE_OD4,Open Drain Pin Mode Select Register 4" bitfld.long 0x00 29. " P4.29OD ,Port 4 pin 29 open drain mode control" "Normal,Open drain" bitfld.long 0x00 28. " P4.28OD ,Port 4 pin 28 open drain mode control" "Normal,Open drain" tree.end width 11. tree "I2C Configuration" group.long 0x7c++0x3 line.long 0x00 "I2CPADCFG,I2C Pin Configuration Register" bitfld.long 0x00 3. " SCLI2C0 ,I2C SCL0 pin (P0.28) glitch filtering and slew rate control enable" "Disabled,Enabled" bitfld.long 0x00 2. " SCLDRV0 ,Drive mode control for the SCL0 pin (P0.28)" "Standard,Fast Mode Plus" textline " " bitfld.long 0x00 1. " SDAI2C0 ,I2C SDA0 pin (P0.27) glitch filtering and slew rate control enable" "Disabled,Enabled" bitfld.long 0x00 0. " SDADRV0 ,Drive mode control for the SDA0 pin P0.27" "Standard,Fast Mode Plus" tree.end width 0xB tree.end else tree "I/O configuration" base ad:0x4002C000 width 13. tree "Port 0" group.long 0x00++0x7F line.long 0x00 "IOCON_P0_00,I/O configuration register contents" bitfld.long 0x00 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x00 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x00 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x00 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x00 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x00 0.--2. " FUNC ,Selects pin function" "P0[0],CAN_RD_1,U3_TXD,I2C1_SDA,U0_TXD,?..." line.long 0x04 "IOCON_P0_01,I/O configuration register contents" bitfld.long 0x04 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x04 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x04 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x04 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x04 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x04 0.--2. " FUNC ,Selects pin function" "P0[1],CAN_TD_1,U3_RXD,I2C1_SCL,U0_RXD,?..." line.long 0x08 "IOCON_P0_02,I/O configuration register contents" bitfld.long 0x08 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x08 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x08 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x08 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x08 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x08 0.--2. " FUNC ,Selects pin function" "P0[2],U0_TXD,U3_TXD,?..." line.long 0x0C "IOCON_P0_03,I/O configuration register contents" bitfld.long 0x0C 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x0C 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x0C 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x0C 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x0C 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x0C 0.--2. " FUNC ,Selects pin function" "P0[3],U0_RXD,U3_RXD,?..." line.long 0x10 "IOCON_P0_04,I/O configuration register contents" bitfld.long 0x10 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x10 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x10 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x10 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x10 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" sif (cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788") bitfld.long 0x10 0.--2. " FUNC ,Selects pin function" "P0[4],I2S_RX_SCK,CAN_RD_2,T2_CAP0,Reserved,Reserved,Reserved,LCD_VD_0" elif (cpu()=="LPC1772") bitfld.long 0x10 0.--2. " FUNC ,Selects pin function" "P0[4],Reserved,CAN_RD_2,T2_CAP0,?..." else bitfld.long 0x10 0.--2. " FUNC ,Selects pin function" "P0[4],I2S_RX_SCK,CAN_RD_2,T2_CAP0,?..." endif line.long 0x14 "IOCON_P0_05,I/O configuration register contents" bitfld.long 0x14 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x14 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x14 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x14 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x14 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" sif (cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788") bitfld.long 0x14 0.--2. " FUNC ,Selects pin function" "P0[5],I2S_RX_WS,CAN_TD_2,T2_CAP1,Reserved,Reserved,Reserved,LCD_VD_1" elif (cpu()=="LPC1772") bitfld.long 0x14 0.--2. " FUNC ,Selects pin function" "P0[5],Reserved,CAN_TD_2,T2_CAP1,?..." else bitfld.long 0x14 0.--2. " FUNC ,Selects pin function" "P0[5],I2S_RX_WS,CAN_TD_2,T2_CAP1,?..." endif line.long 0x18 "IOCON_P0_06,I/O configuration register contents" bitfld.long 0x18 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x18 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x18 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x18 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x18 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" sif (cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788") bitfld.long 0x18 0.--2. " FUNC ,Selects pin function" "P0[6],I2S_RX_SDA,SSP1_SSEL,T2_MAT0,U1_RTS,Reserved,Reserved,LCD_VD_8" elif (cpu()=="LPC1772") bitfld.long 0x18 0.--2. " FUNC ,Selects pin function" "P0[6],Reserved,SSP1_SSEL,T2_MAT0,U1_RTS,?..." else bitfld.long 0x18 0.--2. " FUNC ,Selects pin function" "P0[6],I2S_RX_SDA,SSP1_SSEL,T2_MAT0,U1_RTS,?..." endif line.long 0x1C "IOCON_P0_07,I/O configuration register contents" bitfld.long 0x1C 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x1C 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x1C 8. " FILTER ,Controls glitch filter" "Enabled,Disabled" textline " " bitfld.long 0x1C 6. " INV ,Input polarity" "Not inverted,Inverted" bitfld.long 0x1C 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x1C 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" textline " " sif (cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788") bitfld.long 0x1C 0.--2. " FUNC ,Selects pin function" "P0[7],I2S_TX_SCK,SSP1_SCK,T2_MAT1,RTC_EV0,Reserved,Reserved,LCD_VD_9" elif (cpu()=="LPC1772") bitfld.long 0x1C 0.--2. " FUNC ,Selects pin function" "P0[7],Reserved,SSP1_SCK,T2_MAT1,RTC_EV0,?..." else bitfld.long 0x1C 0.--2. " FUNC ,Selects pin function" "P0[7],I2S_TX_SCK,SSP1_SCK,T2_MAT1,RTC_EV0,?..." endif line.long 0x20 "IOCON_P0_08,I/O configuration register contents" bitfld.long 0x20 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x20 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x20 8. " FILTER ,Controls glitch filter" "Enabled,Disabled" textline " " bitfld.long 0x20 6. " INV ,Input polarity" "Not inverted,Inverted" bitfld.long 0x20 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x20 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" textline " " sif (cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788") bitfld.long 0x20 0.--2. " FUNC ,Selects pin function" "P0[8],I2S_TX_WS,SSP1_MISO,T2_MAT2,RTC_EV1,Reserved,Reserved,LCD_VD_16" elif (cpu()=="LPC1772") bitfld.long 0x20 0.--2. " FUNC ,Selects pin function" "P0[8],Reserved,SSP1_MISO,T2_MAT2,RTC_EV1,?..." else bitfld.long 0x20 0.--2. " FUNC ,Selects pin function" "P0[8],I2S_TX_WS,SSP1_MISO,T2_MAT2,RTC_EV1,?..." endif line.long 0x24 "IOCON_P0_09,I/O configuration register contents" bitfld.long 0x24 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x24 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x24 8. " FILTER ,Controls glitch filter" "Enabled,Disabled" textline " " bitfld.long 0x24 6. " INV ,Input polarity" "Not inverted,Inverted" bitfld.long 0x24 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x24 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" textline " " sif (cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788") bitfld.long 0x24 0.--2. " FUNC ,Selects pin function" "P0[9],I2S_TX_SDA,SSP1_MOSI,T2_MAT3,RTC_EV2,Reserved,Reserved,LCD_VD_17" elif (cpu()=="LPC1772") bitfld.long 0x24 0.--2. " FUNC ,Selects pin function" "P0[9],Reserved,SSP1_MOSI,T2_MAT3,RTC_EV2,?..." else bitfld.long 0x24 0.--2. " FUNC ,Selects pin function" "P0[9],I2S_TX_SDA,SSP1_MOSI,T2_MAT3,RTC_EV2,?..." endif line.long 0x28 "IOCON_P0_10,I/O configuration register contents" bitfld.long 0x28 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x28 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x28 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x28 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x28 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x28 0.--2. " FUNC ,Selects pin function" "P0[10],U2_TXD,I2C2_SDA,T3_MAT0,?..." line.long 0x2C "IOCON_P0_11,I/O configuration register contents" bitfld.long 0x2C 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x2C 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x2C 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x2C 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x2C 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x2C 0.--2. " FUNC ,Selects pin function" "P0[11],U2_RXD,I2C2_SCL,T3_MAT1,?..." line.long 0x30 "IOCON_P0_12,I/O configuration register contents" bitfld.long 0x30 16. " DACEN ,DAC enable control" "Disabled,Enabled" bitfld.long 0x30 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" textline " " bitfld.long 0x30 8. " FILTER ,Controls glitch filter" "Enabled,Disabled" bitfld.long 0x30 7. " ADMODE ,Analog/Digital mode" "Analog,Digital" bitfld.long 0x30 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x30 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x30 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x30 0.--2. " FUNC ,Selects pin function" "P0[12],/USB_PPWR2,SSP1_MISO,ADC0_IN[6],?..." line.long 0x34 "IOCON_P0_13,I/O configuration register contents" bitfld.long 0x34 16. " DACEN ,DAC enable control" "Disabled,Enabled" bitfld.long 0x34 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" textline " " bitfld.long 0x34 8. " FILTER ,Controls glitch filter" "Enabled,Disabled" bitfld.long 0x34 7. " ADMODE ,Analog/Digital mode" "Analog,Digital" bitfld.long 0x34 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x34 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x34 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x34 0.--2. " FUNC ,Selects pin function" "P0[13],USB_UP_LED2,SSP1_MOSI,ADC0_IN[7],?..." line.long 0x38 "IOCON_P0_14,I/O configuration register contents" bitfld.long 0x38 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x38 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x38 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x38 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x38 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x38 0.--2. " FUNC ,Selects pin function" "P0[14],/USB_HSTEN2,SSP1_SSEL,USB_CONNECT2,?..." line.long 0x3C "IOCON_P0_15,I/O configuration register contents" bitfld.long 0x3C 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x3C 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x3C 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x3C 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x3C 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" sif (cpu()=="LPC1772") bitfld.long 0x3C 0.--2. " FUNC ,Selects pin function" "P0[15],U1_TXD,SSP0_SCK,Reserved,Reserved,SPIFI_IO[3],?..." else bitfld.long 0x3C 0.--2. " FUNC ,Selects pin function" "P0[15],U1_TXD,SSP0_SCK,?..." endif line.long 0x40 "IOCON_P0_16,I/O configuration register contents" bitfld.long 0x40 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x40 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x40 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x40 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x40 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" sif (cpu()=="LPC1772") bitfld.long 0x40 0.--2. " FUNC ,Selects pin function" "P0[16],U1_RXD,SSP0_SSEL,Reserved,Reserved,SPIFI_IO[2],?..." else bitfld.long 0x40 0.--2. " FUNC ,Selects pin function" "P0[16],U1_RXD,SSP0_SSEL,?..." endif line.long 0x44 "IOCON_P0_17,I/O configuration register contents" bitfld.long 0x44 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x44 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x44 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x44 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x44 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" sif (cpu()=="LPC1772") bitfld.long 0x44 0.--2. " FUNC ,Selects pin function" "P0[17],U1_CTS,SSP0_MISO,Reserved,Reserved,SPIFI_IO[1],?..." else bitfld.long 0x44 0.--2. " FUNC ,Selects pin function" "P0[17],U1_CTS,SSP0_MISO,?..." endif line.long 0x48 "IOCON_P0_18,I/O configuration register contents" bitfld.long 0x48 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x48 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x48 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x48 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x48 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" sif (cpu()=="LPC1772") bitfld.long 0x48 0.--2. " FUNC ,Selects pin function" "P0[18],U1_DCD,SSP0_MOSI,Reserved,Reserved,SPIFI_IO[0],?..." else bitfld.long 0x48 0.--2. " FUNC ,Selects pin function" "P0[18],U1_DCD,SSP0_MOSI,?..." endif line.long 0x4C "IOCON_P0_19,I/O configuration register contents" bitfld.long 0x4C 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x4C 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x4C 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x4C 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x4C 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" sif (cpu()=="LPC1772"||cpu()=="LPC1774") bitfld.long 0x4C 0.--2. " FUNC ,Selects pin function" "P0[19],U1_DSR,Reserved,I2C1_SDA,?..." else bitfld.long 0x4C 0.--2. " FUNC ,Selects pin function" "P0[19],U1_DSR,SD_CLK,I2C1_SDA,?..." endif line.long 0x50 "IOCON_P0_20,I/O configuration register contents" bitfld.long 0x50 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x50 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x50 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x50 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x50 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" sif (cpu()=="LPC1772"||cpu()=="LPC1774") bitfld.long 0x50 0.--2. " FUNC ,Selects pin function" "P0[20],U1_DTR,Reserved,I2C1_SCL,?..." else bitfld.long 0x50 0.--2. " FUNC ,Selects pin function" "P0[20],U1_DTR,SD_CMD,I2C1_SCL,?..." endif line.long 0x54 "IOCON_P0_21,I/O configuration register contents" bitfld.long 0x54 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x54 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x54 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x54 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x54 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" sif (cpu()=="LPC1772"||cpu()=="LPC1774") bitfld.long 0x54 0.--2. " FUNC ,Selects pin function" "P0[21],U1_RI,Reserved,U4_OE,CAN_RD_1,U4_CLK,?..." else bitfld.long 0x54 0.--2. " FUNC ,Selects pin function" "P0[21],U1_RI,SD_PWR,U4_OE,CAN_RD_1,U4_CLK,?..." endif line.long 0x58 "IOCON_P0_22,I/O configuration register contents" bitfld.long 0x58 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x58 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x58 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x58 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x58 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" sif (cpu()=="LPC1772") bitfld.long 0x58 0.--2. " FUNC ,Selects pin function" "P0[22],U1_RTS,Reserved,U4_TXD,CAN_TD_1,SPIFI_CLK,?..." elif (cpu()=="LPC1774") bitfld.long 0x58 0.--2. " FUNC ,Selects pin function" "P0[22],U1_RTS,Reserved,U4_TXD,CAN_TD_1,?..." else bitfld.long 0x58 0.--2. " FUNC ,Selects pin function" "P0[22],U1_RTS,SD_DAT_0,U4_TXD,CAN_TD_1,?..." endif line.long 0x5C "IOCON_P0_23,I/O configuration register contents" bitfld.long 0x5C 16. " DACEN ,DAC enable control" "Disabled,Enabled" bitfld.long 0x5C 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" textline " " bitfld.long 0x5C 8. " FILTER ,Controls glitch filter" "Enabled,Disabled" bitfld.long 0x5C 7. " ADMODE ,Analog/Digital mode" "Analog,Digital" bitfld.long 0x5C 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x5C 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x5C 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" sif (cpu()=="LPC1772") bitfld.long 0x5C 0.--2. " FUNC ,Selects pin function" "P0[23],ADC0_IN[0],Reserved,T3_CAP0,?..." else bitfld.long 0x5C 0.--2. " FUNC ,Selects pin function" "P0[23],ADC0_IN[0],I2S_RX_SCK,T3_CAP0,?..." endif line.long 0x60 "IOCON_P0_24,I/O configuration register contents" bitfld.long 0x60 16. " DACEN ,DAC enable control" "Disabled,Enabled" bitfld.long 0x60 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" textline " " bitfld.long 0x60 8. " FILTER ,Controls glitch filter" "Enabled,Disabled" bitfld.long 0x60 7. " ADMODE ,Analog/Digital mode" "Analog,Digital" bitfld.long 0x60 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x60 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x60 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" sif (cpu()=="LPC1772") bitfld.long 0x60 0.--2. " FUNC ,Selects pin function" "P0[24],ADC0_IN[1],Reserved,T3_CAP1,?..." else bitfld.long 0x60 0.--2. " FUNC ,Selects pin function" "P0[24],ADC0_IN[1],I2S_RX_WS,T3_CAP1,?..." endif line.long 0x64 "IOCON_P0_25,I/O configuration register contents" bitfld.long 0x64 16. " DACEN ,DAC enable control" "Disabled,Enabled" bitfld.long 0x64 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" textline " " bitfld.long 0x64 8. " FILTER ,Controls glitch filter" "Enabled,Disabled" bitfld.long 0x64 7. " ADMODE ,Analog/Digital mode" "Analog,Digital" bitfld.long 0x64 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x64 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x64 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" sif (cpu()=="LPC1772") bitfld.long 0x64 0.--2. " FUNC ,Selects pin function" "P0[25],ADC0_IN[2],Reserved,U3_TXD,?..." else bitfld.long 0x64 0.--2. " FUNC ,Selects pin function" "P0[25],ADC0_IN[2],I2S_RX_SDA,U3_TXD,?..." endif line.long 0x68 "IOCON_P0_26,I/O configuration register contents" bitfld.long 0x68 16. " DACEN ,DAC enable control" "Disabled,Enabled" bitfld.long 0x68 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" textline " " bitfld.long 0x68 8. " FILTER ,Controls glitch filter" "Enabled,Disabled" bitfld.long 0x68 7. " ADMODE ,Analog/Digital mode" "Analog,Digital" bitfld.long 0x68 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x68 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x68 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x68 0.--2. " FUNC ,Selects pin function" "P0[26],ADC0_IN[3],DAC_OUT,U3_RXD,?..." line.long 0x6C "IOCON_P0_27,I/O configuration register contents" bitfld.long 0x6C 9. " HIDRIVE ,Controls sink current capability of the pin" "4 mA,20 mA" bitfld.long 0x6C 8. " HS ,Configures I2C features(I2C 50ns glitch filter and slew rate control)" "Enabled,Disabled" bitfld.long 0x6C 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x6C 0.--2. " FUNC ,Selects pin function" "P0[27],I2C0_SDA,USB_SDA1,?..." line.long 0x70 "IOCON_P0_28,I/O configuration register contents" bitfld.long 0x70 9. " HIDRIVE ,Controls sink current capability of the pin" "4 mA,20 mA" bitfld.long 0x70 8. " HS ,Configures I2C features(I2C 50ns glitch filter and slew rate control)" "Enabled,Disabled" bitfld.long 0x70 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x70 0.--2. " FUNC ,Selects pin function" "P0[28],I2C0_SCL,USB_SCL1,?..." line.long 0x74 "IOCON_P0_29,I/O configuration register contents" bitfld.long 0x74 0.--2. " FUNC ,Selects pin function" "P0[29],USB_D+1,EINT_0,?..." line.long 0x78 "IOCON_P0_30,I/O configuration register contents" bitfld.long 0x78 0.--2. " FUNC ,Selects pin function" "P0[30],USB_D-1,EINT_1,?..." line.long 0x7C "IOCON_P0_31,I/O configuration register contents" bitfld.long 0x7C 0.--2. " FUNC ,Selects pin function" "P0[31],USB_D+2,?..." tree.end tree "Port 1" group.long 0x80++0x7F line.long 0x00 "IOCON_P1_00,I/O configuration register contents" bitfld.long 0x00 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x00 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x00 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x00 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x00 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" sif (cpu()=="LPC1776"||cpu()=="LPC1778"||cpu()=="LPC1786"||cpu()=="LPC1788") bitfld.long 0x00 0.--2. " FUNC ,Selects pin function" "P1[0],ENET_TXD[0],Reserved,T3_CAP1,SSP2_SCK,?..." else bitfld.long 0x00 0.--2. " FUNC ,Selects pin function" "P1[0],Reserved,Reserved,T3_CAP1,SSP2_SCK,?..." endif line.long 0x04 "IOCON_P1_01,I/O configuration register contents" bitfld.long 0x04 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x04 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x04 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x04 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x04 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" sif (cpu()=="LPC1776"||cpu()=="LPC1778"||cpu()=="LPC1786"||cpu()=="LPC1788") bitfld.long 0x04 0.--2. " FUNC ,Selects pin function" "P1[1],ENET_TXD[1],Reserved,T3_MAT3,SSP2_MOSI,?..." else bitfld.long 0x04 0.--2. " FUNC ,Selects pin function" "P1[1],Reserved,Reserved,T3_MAT3,SSP2_MOSI,?..." endif line.long 0x08 "IOCON_P1_02,I/O configuration register contents" bitfld.long 0x08 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x08 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x08 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x08 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x08 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" sif (cpu()=="LPC1776"||cpu()=="LPC1778"||cpu()=="LPC1786"||cpu()=="LPC1788") bitfld.long 0x08 0.--2. " FUNC ,Selects pin function" "P1[2],ENET_TXD[2],SD_CLK,PWM0_1,?..." elif (cpu()=="LPC1772"||cpu()=="LPC1774") bitfld.long 0x08 0.--2. " FUNC ,Selects pin function" "P1[2],Reserved,Reserved,PWM0_1,?..." else bitfld.long 0x08 0.--2. " FUNC ,Selects pin function" "P1[2],Reserved,SD_CLK,PWM0_1,?..." endif line.long 0x0C "IOCON_P1_03,I/O configuration register contents" bitfld.long 0x0C 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x0C 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x0C 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x0C 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x0C 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" sif (cpu()=="LPC1776"||cpu()=="LPC1778"||cpu()=="LPC1786"||cpu()=="LPC1788") bitfld.long 0x0C 0.--2. " FUNC ,Selects pin function" "P1[3],ENET_TXD[3],SD_CMD,PWM0_2,?..." elif (cpu()=="LPC1772"||cpu()=="LPC1774") bitfld.long 0x0C 0.--2. " FUNC ,Selects pin function" "P1[3],Reserved,Reserved,PWM0_2,?..." else bitfld.long 0x0C 0.--2. " FUNC ,Selects pin function" "P1[3],Reserved,SD_CMD,PWM0_2,?..." endif line.long 0x10 "IOCON_P1_04,I/O configuration register contents" bitfld.long 0x10 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x10 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x10 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x10 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x10 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" sif (cpu()=="LPC1776"||cpu()=="LPC1778"||cpu()=="LPC1786"||cpu()=="LPC1788") bitfld.long 0x10 0.--2. " FUNC ,Selects pin function" "P1[4],ENET_TX_EN,Reserved,T3_MAT2,SSP2_MISO,?..." else bitfld.long 0x10 0.--2. " FUNC ,Selects pin function" "P1[4],Reserved,Reserved,T3_MAT2,SSP2_MISO,?..." endif line.long 0x14 "IOCON_P1_05,I/O configuration register contents" bitfld.long 0x14 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x14 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x14 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x14 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x14 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" sif (cpu()=="LPC1776"||cpu()=="LPC1778"||cpu()=="LPC1786"||cpu()=="LPC1788") bitfld.long 0x14 0.--2. " FUNC ,Selects pin function" "P1[5],ENET_TX_ER,SD_PWR,PWM0_3,?..." elif (cpu()=="LPC1772"||cpu()=="LPC1774") bitfld.long 0x14 0.--2. " FUNC ,Selects pin function" "P1[5],Reserved,Reserved,PWM0_3,?..." else bitfld.long 0x14 0.--2. " FUNC ,Selects pin function" "P1[5],Reserved,SD_PWR,PWM0_3,?..." endif line.long 0x18 "IOCON_P1_06,I/O configuration register contents" bitfld.long 0x18 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x18 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x18 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x18 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x18 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" sif (cpu()=="LPC1776"||cpu()=="LPC1778"||cpu()=="LPC1786"||cpu()=="LPC1788") bitfld.long 0x18 0.--2. " FUNC ,Selects pin function" "P1[6],ENET_TX_CLK,SD_DAT_0,PWM0_4,?..." elif (cpu()=="LPC1772"||cpu()=="LPC1774") bitfld.long 0x18 0.--2. " FUNC ,Selects pin function" "P1[6],Reserved,Reserved,PWM0_4,?..." else bitfld.long 0x18 0.--2. " FUNC ,Selects pin function" "P1[6],Reserved,SD_DAT_0,PWM0_4,?..." endif line.long 0x1C "IOCON_P1_07,I/O configuration register contents" bitfld.long 0x1C 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x1C 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x1C 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x1C 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x1C 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" sif (cpu()=="LPC1776"||cpu()=="LPC1778"||cpu()=="LPC1786"||cpu()=="LPC1788") bitfld.long 0x1C 0.--2. " FUNC ,Selects pin function" "P1[7],ENET_COL,SD_DAT_1,PWM0_5,?..." elif (cpu()=="LPC1772"||cpu()=="LPC1774") bitfld.long 0x1C 0.--2. " FUNC ,Selects pin function" "P1[7],Reserved,Reserved,PWM0_5,?..." else bitfld.long 0x1C 0.--2. " FUNC ,Selects pin function" "P1[7],Reserved,SD_DAT_1,PWM0_5,?..." endif line.long 0x20 "IOCON_P1_08,I/O configuration register contents" bitfld.long 0x20 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x20 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x20 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x20 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x20 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" sif (cpu()=="LPC1776"||cpu()=="LPC1778"||cpu()=="LPC1786"||cpu()=="LPC1788") bitfld.long 0x20 0.--2. " FUNC ,Selects pin function" "P1[8],ENET_CRS,Reserved,T3_MAT1,SSP2_SSEL,?..." else bitfld.long 0x20 0.--2. " FUNC ,Selects pin function" "P1[8],Reserved,Reserved,T3_MAT1,SSP2_SSEL,?..." endif line.long 0x24 "IOCON_P1_09,I/O configuration register contents" bitfld.long 0x24 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x24 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x24 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x24 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x24 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" sif (cpu()=="LPC1776"||cpu()=="LPC1778"||cpu()=="LPC1786"||cpu()=="LPC1788") bitfld.long 0x24 0.--2. " FUNC ,Selects pin function" "P1[9],ENET_RXD_0,Reserved,T3_MAT0,?..." else bitfld.long 0x24 0.--2. " FUNC ,Selects pin function" "P1[9],Reserved,Reserved,T3_MAT0,?..." endif line.long 0x28 "IOCON_P1_10,I/O configuration register contents" bitfld.long 0x28 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x28 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x28 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x28 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x28 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" sif (cpu()=="LPC1776"||cpu()=="LPC1778"||cpu()=="LPC1786"||cpu()=="LPC1788") bitfld.long 0x28 0.--2. " FUNC ,Selects pin function" "P1[10],ENET_RXD_1,Reserved,T3_CAP0,?..." else bitfld.long 0x28 0.--2. " FUNC ,Selects pin function" "P1[10],Reserved,Reserved,T3_CAP0,?..." endif line.long 0x2C "IOCON_P1_11,I/O configuration register contents" bitfld.long 0x2C 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x2C 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x2C 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x2C 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x2C 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" sif (cpu()=="LPC1776"||cpu()=="LPC1778"||cpu()=="LPC1786"||cpu()=="LPC1788") bitfld.long 0x2C 0.--2. " FUNC ,Selects pin function" "P1[11],ENET_RXD_2,SD_DAT_2,PWM0_6,?..." elif (cpu()=="LPC1772"||cpu()=="LPC1774") bitfld.long 0x2C 0.--2. " FUNC ,Selects pin function" "P1[11],Reserved,Reserved,PWM0_6,?..." else bitfld.long 0x2C 0.--2. " FUNC ,Selects pin function" "P1[11],Reserved,SD_DAT_2,PWM0_6,?..." endif line.long 0x30 "IOCON_P1_12,I/O configuration register contents" bitfld.long 0x30 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x30 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x30 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x30 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x30 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" sif (cpu()=="LPC1776"||cpu()=="LPC1778"||cpu()=="LPC1786"||cpu()=="LPC1788") bitfld.long 0x30 0.--2. " FUNC ,Selects pin function" "P1[12],ENET_RXD_3,SD_DAT_3,PWM0_CAP0,?..." elif (cpu()=="LPC1772"||cpu()=="LPC1774") bitfld.long 0x30 0.--2. " FUNC ,Selects pin function" "P1[12],Reserved,Reserved,PWM0_CAP0,?..." else bitfld.long 0x30 0.--2. " FUNC ,Selects pin function" "P1[12],Reserved,SD_DAT_3,PWM0_CAP0,?..." endif line.long 0x34 "IOCON_P1_13,I/O configuration register contents" bitfld.long 0x34 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x34 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x34 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x34 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x34 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" sif (cpu()=="LPC1776"||cpu()=="LPC1778"||cpu()=="LPC1786"||cpu()=="LPC1788") bitfld.long 0x34 0.--2. " FUNC ,Selects pin function" "P1[13],ENET_RX_DV,?..." else bitfld.long 0x34 0.--2. " FUNC ,Selects pin function" "P1[13],?..." endif line.long 0x38 "IOCON_P1_14,I/O configuration register contents" bitfld.long 0x38 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x38 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x38 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x38 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x38 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" sif (cpu()=="LPC1776"||cpu()=="LPC1778"||cpu()=="LPC1786"||cpu()=="LPC1788") bitfld.long 0x38 0.--2. " FUNC ,Selects pin function" "P1[14],ENET_RX_ER,Reserved,T2_CAP0,?..." else bitfld.long 0x38 0.--2. " FUNC ,Selects pin function" "P1[14],Reserved,Reserved,T2_CAP0,?..." endif line.long 0x3C "IOCON_P1_15,I/O configuration register contents" bitfld.long 0x3C 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x3C 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x3C 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x3C 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x3C 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" sif (cpu()=="LPC1776"||cpu()=="LPC1778"||cpu()=="LPC1786"||cpu()=="LPC1788") bitfld.long 0x3C 0.--2. " FUNC ,Selects pin function" "P1[15],ENET_RX_CLK,Reserved,I2C2_SDA,?..." else bitfld.long 0x3C 0.--2. " FUNC ,Selects pin function" "P1[15],Reserved,Reserved,I2C2_SDA,?..." endif line.long 0x40 "IOCON_P1_16,I/O configuration register contents" bitfld.long 0x40 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x40 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x40 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x40 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x40 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" sif (cpu()=="LPC1776"||cpu()=="LPC1778"||cpu()=="LPC1786"||cpu()=="LPC1788") bitfld.long 0x40 0.--2. " FUNC ,Selects pin function" "P1[16],ENET_MDC,I2S_TX_MCLK,?..." elif (cpu()=="LPC1772") bitfld.long 0x40 0.--2. " FUNC ,Selects pin function" "P1[16],?..." else bitfld.long 0x40 0.--2. " FUNC ,Selects pin function" "P1[16],Reserved,I2S_TX_MCLK,?..." endif line.long 0x44 "IOCON_P1_17,I/O configuration register contents" bitfld.long 0x44 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x44 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x44 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x44 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x44 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" sif (cpu()=="LPC1776"||cpu()=="LPC1778"||cpu()=="LPC1786"||cpu()=="LPC1788") bitfld.long 0x44 0.--2. " FUNC ,Selects pin function" "P1[17],ENET_MDIO,I2S_RX_MCLK,?..." elif (cpu()=="LPC1772") bitfld.long 0x44 0.--2. " FUNC ,Selects pin function" "P1[17],?..." else bitfld.long 0x44 0.--2. " FUNC ,Selects pin function" "P1[17],Reserved,I2S_RX_MCLK,?..." endif line.long 0x48 "IOCON_P1_18,I/O configuration register contents" bitfld.long 0x48 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x48 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x48 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x48 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x48 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x48 0.--2. " FUNC ,Selects pin function" "P1[18],USB_UP_LED1,PWM1_1,T1_CAP0,Reserved,SSP1_MISO,?..." line.long 0x4C "IOCON_P1_19,I/O configuration register contents" bitfld.long 0x4C 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x4C 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x4C 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x4C 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x4C 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x4C 0.--2. " FUNC ,Selects pin function" "P1[19],USB_TX_E1,/USB_PPWR1,T1_CAP1,MC_0A,SSP1_SCK,U2_OE,?..." line.long 0x50 "IOCON_P1_20,I/O configuration register contents" bitfld.long 0x50 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x50 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x50 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x50 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x50 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" sif (cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788") bitfld.long 0x50 0.--2. " FUNC ,Selects pin function" "P1[20],USB_TX_DP1,PWM1_2,QEI_PHA,MC_FB0,SSP0_SCK,LCD_VD_6,LCD_VD_10" elif (cpu()=="LPC1785") bitfld.long 0x50 0.--2. " FUNC ,Selects pin function" "P1[20],USB_TX_DP1,PWM1_2,Reserved,MC_FB0,SSP0_SCK,LCD_VD_6,LCD_VD_10" elif (cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778") bitfld.long 0x50 0.--2. " FUNC ,Selects pin function" "P1[20],USB_TX_DP1,PWM1_2,QEI_PHA,MC_FB0,SSP0_SCK,?..." else bitfld.long 0x50 0.--2. " FUNC ,Selects pin function" "P1[20],USB_TX_DP1,PWM1_2,Reserved,MC_FB0,SSP0_SCK,?..." endif line.long 0x54 "IOCON_P1_21,I/O configuration register contents" bitfld.long 0x54 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x54 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x54 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x54 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x54 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" sif (cpu()!="LPC1772"&&cpu()!="LPC1774"&&cpu()!="LPC1776"&&cpu()!="LPC1777"&&cpu()!="LPC1778") bitfld.long 0x54 0.--2. " FUNC ,Selects pin function" "P1[21],USB_TX_DM1,PWM1_3,SSP0_SSEL,/MC_ABORT,Reserved,LCD_VD_7,LCD_VD_11" else bitfld.long 0x54 0.--2. " FUNC ,Selects pin function" "P1[21],USB_TX_DM1,PWM1_3,SSP0_SSEL,/MC_ABORT,?..." endif line.long 0x58 "IOCON_P1_22,I/O configuration register contents" bitfld.long 0x58 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x58 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x58 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x58 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x58 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" sif (cpu()!="LPC1772"&&cpu()!="LPC1774"&&cpu()!="LPC1776"&&cpu()!="LPC1777"&&cpu()!="LPC1778") bitfld.long 0x58 0.--2. " FUNC ,Selects pin function" "P1[22],USB_RCV1,USB_PWRD1,T1_MAT0,MC_0B,SSP1_MOSI,LCD_VD_8,LCD_VD_12" else bitfld.long 0x58 0.--2. " FUNC ,Selects pin function" "P1[22],USB_RCV1,USB_PWRD1,T1_MAT0,MC_0B,SSP1_MOSI,?..." endif line.long 0x5C "IOCON_P1_23,I/O configuration register contents" bitfld.long 0x5C 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x5C 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x5C 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x5C 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x5C 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" sif (cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788") bitfld.long 0x5C 0.--2. " FUNC ,Selects pin function" "P1[23],USB_RX_DP1,PWM1_4,QEI_PHB,MC_FB1,SSP0_MISO,LCD_VD_9,LCD_VD_13" elif (cpu()=="LPC1785") bitfld.long 0x5C 0.--2. " FUNC ,Selects pin function" "P1[23],USB_RX_DP1,PWM1_4,Reserved,MC_FB1,SSP0_MISO,LCD_VD_9,LCD_VD_13" elif (cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778") bitfld.long 0x5C 0.--2. " FUNC ,Selects pin function" "P1[23],USB_RX_DP1,PWM1_4,QEI_PHB,MC_FB1,SSP0_MISO,?..." else bitfld.long 0x5C 0.--2. " FUNC ,Selects pin function" "P1[23],USB_RX_DP1,PWM1_4,Reserved,MC_FB1,SSP0_MISO,?..." endif line.long 0x60 "IOCON_P1_24,I/O configuration register contents" bitfld.long 0x60 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x60 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x60 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x60 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x60 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" sif (cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788") bitfld.long 0x60 0.--2. " FUNC ,Selects pin function" "P1[24],USB_RX_DM1,PWM1_5,QEI_IDX,MC_FB2,SSP0_MOSI,LCD_VD_10,LCD_VD_14" elif (cpu()=="LPC1785") bitfld.long 0x60 0.--2. " FUNC ,Selects pin function" "P1[24],USB_RX_DM1,PWM1_5,Reserved,MC_FB2,SSP0_MOSI,LCD_VD_10,LCD_VD_14" elif (cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778") bitfld.long 0x60 0.--2. " FUNC ,Selects pin function" "P1[24],USB_RX_DM1,PWM1_5,QEI_IDX,MC_FB2,SSP0_MOSI,?..." else bitfld.long 0x60 0.--2. " FUNC ,Selects pin function" "P1[24],USB_RX_DM1,PWM1_5,Reserved,MC_FB2,SSP0_MOSI,?..." endif line.long 0x64 "IOCON_P1_25,I/O configuration register contents" bitfld.long 0x64 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x64 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x64 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x64 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x64 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" sif (cpu()!="LPC1772"&&cpu()!="LPC1774"&&cpu()!="LPC1776"&&cpu()!="LPC1777"&&cpu()!="LPC1778") bitfld.long 0x64 0.--2. " FUNC ,Selects pin function" "P1[25],/USB_LS1,/USB_HSTEN1,T1_MAT1,MC_1A,CLKOUT,LCD_VD_11,LCD_VD_15" else bitfld.long 0x64 0.--2. " FUNC ,Selects pin function" "P1[25],/USB_LS1,/USB_HSTEN1,T1_MAT1,MC_1A,CLKOUT,?..." endif line.long 0x68 "IOCON_P1_26,I/O configuration register contents" bitfld.long 0x68 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x68 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x68 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x68 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x68 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" sif (cpu()!="LPC1772"&&cpu()!="LPC1774"&&cpu()!="LPC1776"&&cpu()!="LPC1777"&&cpu()!="LPC1778") bitfld.long 0x68 0.--2. " FUNC ,Selects pin function" "P1[26],/USB_SSPND1,PWM1_6,T0_CAP0,MC_1B,SSP1_SSEL,LCD_VD_12,LCD_VD_20" else bitfld.long 0x68 0.--2. " FUNC ,Selects pin function" "P1[26],/USB_SSPND1,PWM1_6,T0_CAP0,MC_1B,SSP1_SSEL,?..." endif line.long 0x6C "IOCON_P1_27,I/O configuration register contents" bitfld.long 0x6C 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x6C 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x6C 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x6C 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x6C 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" sif (cpu()!="LPC1772"&&cpu()!="LPC1774"&&cpu()!="LPC1776"&&cpu()!="LPC1777"&&cpu()!="LPC1778") bitfld.long 0x6C 0.--2. " FUNC ,Selects pin function" "P1[27],/USB_INT1,/USB_OVRCR1,T0_CAP1,CLKOUT,Reserved,LCD_VD_13,LCD_VD_21" else bitfld.long 0x6C 0.--2. " FUNC ,Selects pin function" "P1[27],/USB_INT1,/USB_OVRCR1,T0_CAP1,CLKOUT,?..." endif line.long 0x70 "IOCON_P1_28,I/O configuration register contents" bitfld.long 0x70 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x70 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x70 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x70 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x70 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" sif (cpu()!="LPC1772"&&cpu()!="LPC1774"&&cpu()!="LPC1776"&&cpu()!="LPC1777"&&cpu()!="LPC1778") bitfld.long 0x70 0.--2. " FUNC ,Selects pin function" "P1[28],USB_SCL1,PWM1_CAP0,T0_MAT0,MC_2A,SSP0_SSEL,LCD_VD_14,LCD_VD_22" else bitfld.long 0x70 0.--2. " FUNC ,Selects pin function" "P1[28],USB_SCL1,PWM1_CAP0,T0_MAT0,MC_2A,SSP0_SSEL,?..." endif line.long 0x74 "IOCON_P1_29,I/O configuration register contents" bitfld.long 0x74 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x74 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x74 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x74 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x74 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" sif (cpu()!="LPC1772"&&cpu()!="LPC1774"&&cpu()!="LPC1776"&&cpu()!="LPC1777"&&cpu()!="LPC1778") bitfld.long 0x74 0.--2. " FUNC ,Selects pin function" "P1[29],USB_SDA1,PWM1_CAP1,T0_MAT1,MC_2B,U4_TXD,LCD_VD_15,LCD_VD_23" else bitfld.long 0x74 0.--2. " FUNC ,Selects pin function" "P1[29],USB_SDA1,PWM1_CAP1,T0_MAT1,MC_2B,U4_TXD,?..." endif line.long 0x78 "IOCON_P1_30,I/O configuration register contents" bitfld.long 0x78 16. " DACEN ,DAC enable control" "Disabled,Enabled" bitfld.long 0x78 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" textline " " bitfld.long 0x78 8. " FILTER ,Controls glitch filter" "Enabled,Disabled" bitfld.long 0x78 7. " ADMODE ,Analog/Digital mode" "Analog,Digital" bitfld.long 0x78 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x78 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x78 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x78 0.--2. " FUNC ,Selects pin function" "P1[30],USB_PWRD2,USB_VBUS,ADC0_IN[4],I2C0_SDA,U3_OE,?..." line.long 0x7C "IOCON_P1_31,I/O configuration register contents" bitfld.long 0x7C 16. " DACEN ,DAC enable control" "Disabled,Enabled" bitfld.long 0x7C 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" textline " " bitfld.long 0x7C 8. " FILTER ,Controls glitch filter" "Enabled,Disabled" bitfld.long 0x7C 7. " ADMODE ,Analog/Digital mode" "Analog,Digital" bitfld.long 0x7C 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x7C 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x7C 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x7C 0.--2. " FUNC ,Selects pin function" "P1[31],/USB_OVRCR2,SSP1_SCK,ADC0_IN[5],I2C0_SCL,?..." tree.end tree "Port 2" group.long 0x100++0x7F line.long 0x0 "IOCON_P2_0,I/O configuration register contents" bitfld.long 0x0 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x0 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x0 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x0 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x0 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" sif (cpu()!="LPC1772"&&cpu()!="LPC1774"&&cpu()!="LPC1776"&&cpu()!="LPC1777"&&cpu()!="LPC1778") bitfld.long 0x0 0.--2. " FUNC ,Selects pin function" "P2[0],PWM1_1,U1_TXD,Reserved,Reserved,Reserved,Reserved,LCD_PWR" else bitfld.long 0x0 0.--2. " FUNC ,Selects pin function" "P2[0],PWM1_1,U1_TXD,?..." endif line.long 0x4 "IOCON_P2_1,I/O configuration register contents" bitfld.long 0x4 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x4 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x4 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x4 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x4 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" sif (cpu()!="LPC1772"&&cpu()!="LPC1774"&&cpu()!="LPC1776"&&cpu()!="LPC1777"&&cpu()!="LPC1778") bitfld.long 0x4 0.--2. " FUNC ,Selects pin function" "P2[1],PWM1_2,U1_RXD,Reserved,Reserved,Reserved,Reserved,LCD_LE" else bitfld.long 0x4 0.--2. " FUNC ,Selects pin function" "P2[1],PWM1_2,U1_RXD,?..." endif line.long 0x8 "IOCON_P2_2,I/O configuration register contents" bitfld.long 0x8 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x8 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x8 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x8 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x8 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" sif (cpu()!="LPC1772"&&cpu()!="LPC1774"&&cpu()!="LPC1776"&&cpu()!="LPC1777"&&cpu()!="LPC1778") bitfld.long 0x8 0.--2. " FUNC ,Selects pin function" "P2[2],PWM1_3,U1_CTS,T2_MAT3,Reserved,TRACEDATA[3],Reserved,LCD_DCLK" else bitfld.long 0x8 0.--2. " FUNC ,Selects pin function" "P2[2],PWM1_3,U1_CTS,T2_MAT3,Reserved,TRACEDATA[3],?..." endif line.long 0xC "IOCON_P2_3,I/O configuration register contents" bitfld.long 0xC 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0xC 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0xC 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0xC 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0xC 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" sif (cpu()!="LPC1772"&&cpu()!="LPC1774"&&cpu()!="LPC1776"&&cpu()!="LPC1777"&&cpu()!="LPC1778") bitfld.long 0xC 0.--2. " FUNC ,Selects pin function" "P2[3],PWM1_4,U1_DCD,T2_MAT2,Reserved,TRACEDATA[2],Reserved,LCD_FP" else bitfld.long 0xC 0.--2. " FUNC ,Selects pin function" "P2[3],PWM1_4,U1_DCD,T2_MAT2,Reserved,TRACEDATA[2],?..." endif line.long 0x10 "IOCON_P2_4,I/O configuration register contents" bitfld.long 0x10 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x10 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x10 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x10 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x10 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" sif (cpu()!="LPC1772"&&cpu()!="LPC1774"&&cpu()!="LPC1776"&&cpu()!="LPC1777"&&cpu()!="LPC1778") bitfld.long 0x10 0.--2. " FUNC ,Selects pin function" "P2[4],PWM1_5,U1_DSR,T2_MAT1,Reserved,TRACEDATA[1],Reserved,LCD_ENAB_M" else bitfld.long 0x10 0.--2. " FUNC ,Selects pin function" "P2[4],PWM1_5,U1_DSR,T2_MAT1,Reserved,TRACEDATA[1],?..." endif line.long 0x14 "IOCON_P2_5,I/O configuration register contents" bitfld.long 0x14 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x14 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x14 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x14 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x14 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" sif (cpu()!="LPC1772"&&cpu()!="LPC1774"&&cpu()!="LPC1776"&&cpu()!="LPC1777"&&cpu()!="LPC1778") bitfld.long 0x14 0.--2. " FUNC ,Selects pin function" "P2[5],PWM1_6,U1_DTR,T2_MAT0,Reserved,TRACEDATA[0],Reserved,LCD_LP" else bitfld.long 0x14 0.--2. " FUNC ,Selects pin function" "P2[5],PWM1_6,U1_DTR,T2_MAT0,Reserved,TRACEDATA[0],?..." endif line.long 0x18 "IOCON_P2_6,I/O configuration register contents" bitfld.long 0x18 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x18 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x18 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x18 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x18 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" sif (cpu()!="LPC1772"&&cpu()!="LPC1774"&&cpu()!="LPC1776"&&cpu()!="LPC1777"&&cpu()!="LPC1778") bitfld.long 0x18 0.--2. " FUNC ,Selects pin function" "P2[6],PWM1_CAP0,U1_RI,T2_CAP0,U2_OE,TRACECLK,LCD_VD_0,LCD_VD_4" else bitfld.long 0x18 0.--2. " FUNC ,Selects pin function" "P2[6],PWM1_CAP0,U1_RI,T2_CAP0,U2_OE,TRACECLK,?..." endif line.long 0x1C "IOCON_P2_7,I/O configuration register contents" bitfld.long 0x1C 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x1C 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x1C 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x1C 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x1C 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" sif (cpu()!="LPC1772"&&cpu()!="LPC1774"&&cpu()!="LPC1776"&&cpu()!="LPC1777"&&cpu()!="LPC1778") bitfld.long 0x1C 0.--2. " FUNC ,Selects pin function" "P2[7],CAN_RD_2,U1_RTS,Reserved,Reserved,Reserved,LCD_VD_1,LCD_VD_5" elif (cpu()=="LPC1772") bitfld.long 0x1C 0.--2. " FUNC ,Selects pin function" "P2[7],CAN_RD_2,U1_RTS,Reserved,Reserved,/SPIFI_CS,?..." else bitfld.long 0x1C 0.--2. " FUNC ,Selects pin function" "P2[7],CAN_RD_2,U1_RTS,?..." endif line.long 0x20 "IOCON_P2_8,I/O configuration register contents" bitfld.long 0x20 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x20 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x20 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x20 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x20 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" sif (cpu()=="LPC1786"||cpu()=="LPC1788") bitfld.long 0x20 0.--2. " FUNC ,Selects pin function" "P2[8],CAN_TD_2,U2_TXD,U1_CTS,ENET_MDC,Reserved,LCD_VD_2,LCD_VD_6" elif (cpu()=="LPC1776"||cpu()=="LPC1778") bitfld.long 0x20 0.--2. " FUNC ,Selects pin function" "P2[8],CAN_TD_2,U2_TXD,U1_CTS,ENET_MDC,?..." elif (cpu()=="LPC1785"||cpu()=="LPC1787") bitfld.long 0x20 0.--2. " FUNC ,Selects pin function" "P2[8],CAN_TD_2,U2_TXD,U1_CTS,Reserved,Reserved,LCD_VD_2,LCD_VD_6" else bitfld.long 0x20 0.--2. " FUNC ,Selects pin function" "P2[8],CAN_TD_2,U2_TXD,U1_CTS,?..." endif line.long 0x24 "IOCON_P2_9,I/O configuration register contents" bitfld.long 0x24 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x24 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x24 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x24 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x24 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" sif (cpu()=="LPC1786"||cpu()=="LPC1788") bitfld.long 0x24 0.--2. " FUNC ,Selects pin function" "P2[9],USB_CONNECT1,U2_RXD,U4_RXD,ENET_MDIO,Reserved,LCD_VD_3,LCD_VD_7" elif (cpu()=="LPC1776"||cpu()=="LPC1778") bitfld.long 0x24 0.--2. " FUNC ,Selects pin function" "P2[9],USB_CONNECT1,U2_RXD,U4_RXD,ENET_MDIO,?..." elif (cpu()=="LPC1785"||cpu()=="LPC1787") bitfld.long 0x24 0.--2. " FUNC ,Selects pin function" "P2[9],USB_CONNECT1,U2_RXD,U4_RXD,Reserved,Reserved,LCD_VD_3,LCD_VD_7" else bitfld.long 0x24 0.--2. " FUNC ,Selects pin function" "P2[9],USB_CONNECT1,U2_RXD,U4_RXD,?..." endif line.long 0x28 "IOCON_P2_10,I/O configuration register contents" bitfld.long 0x28 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x28 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x28 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x28 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x28 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x28 0.--2. " FUNC ,Selects pin function" "P2[10],EINT_0,NMI,?..." line.long 0x2C "IOCON_P2_11,I/O configuration register contents" bitfld.long 0x2C 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x2C 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x2C 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x2C 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x2C 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" sif (cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788") bitfld.long 0x2C 0.--2. " FUNC ,Selects pin function" "P2[11],EINT_1,SD_DAT_1,I2S_TX_SCK,Reserved,Reserved,Reserved,LCD_CLKIN" elif (cpu()=="LPC1772") bitfld.long 0x2C 0.--2. " FUNC ,Selects pin function" "P2[11],EINT_1,?..." elif (cpu()=="LPC1774") bitfld.long 0x2C 0.--2. " FUNC ,Selects pin function" "P2[11],EINT_1,Reserved,I2S_TX_SCK,?..." else bitfld.long 0x2C 0.--2. " FUNC ,Selects pin function" "P2[11],EINT_1,SD_DAT_1,I2S_TX_SCK,?..." endif line.long 0x30 "IOCON_P2_12,I/O configuration register contents" bitfld.long 0x30 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x30 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x30 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x30 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x30 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" sif (cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788") bitfld.long 0x30 0.--2. " FUNC ,Selects pin function" "P2[12],EINT_2,SD_DAT_2,I2S_TX_WS,LCD_VD_4,LCD_VD_3,LCD_VD_8,LCD_VD_18" elif (cpu()=="LPC1772") bitfld.long 0x30 0.--2. " FUNC ,Selects pin function" "P2[12],EINT_2,?..." elif (cpu()=="LPC1774") bitfld.long 0x30 0.--2. " FUNC ,Selects pin function" "P2[12],EINT_2,Reserved,I2S_TX_WS,?..." else bitfld.long 0x30 0.--2. " FUNC ,Selects pin function" "P2[12],EINT_2,SD_DAT_2,I2S_TX_WS,?..." endif line.long 0x34 "IOCON_P2_13,I/O configuration register contents" bitfld.long 0x34 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x34 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x34 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x34 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x34 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" sif (cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788") bitfld.long 0x34 0.--2. " FUNC ,Selects pin function" "P2[13],EINT_3,SD_DAT_3,I2S_TX_SDA,Reserved,LCD_VD_5,LCD_VD_9,LCD_VD_19" elif (cpu()=="LPC1772") bitfld.long 0x34 0.--2. " FUNC ,Selects pin function" "P2[13],EINT_3,?..." elif (cpu()=="LPC1774") bitfld.long 0x34 0.--2. " FUNC ,Selects pin function" "P2[13],EINT_3,Reserved,I2S_TX_SDA,?..." else bitfld.long 0x34 0.--2. " FUNC ,Selects pin function" "P2[13],EINT_3,SD_DAT_3,I2S_TX_SDA,?..." endif line.long 0x38 "IOCON_P2_14,I/O configuration register contents" bitfld.long 0x38 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x38 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x38 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x38 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x38 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x38 0.--2. " FUNC ,Selects pin function" "P2[14],/EMC_CS[2],I2C1_SDA,T2_CAP0,?..." line.long 0x3C "IOCON_P2_15,I/O configuration register contents" bitfld.long 0x3C 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x3C 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x3C 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x3C 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x3C 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x3C 0.--2. " FUNC ,Selects pin function" "P2[15],/EMC_CS[3],I2C1_SCL,T2_CAP1,?..." line.long 0x40 "IOCON_P2_16,I/O configuration register contents" bitfld.long 0x40 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x40 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x40 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x40 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x40 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x40 0.--2. " FUNC ,Selects pin function" "P2[16],/EMC_CAS,?..." line.long 0x44 "IOCON_P2_17,I/O configuration register contents" bitfld.long 0x44 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x44 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x44 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x44 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x44 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x44 0.--2. " FUNC ,Selects pin function" "P2[17],/EMC_RAS,?..." line.long 0x48 "IOCON_P2_18,I/O configuration register contents" bitfld.long 0x48 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x48 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x48 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x48 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x48 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x48 0.--2. " FUNC ,Selects pin function" "P2[18],EMC_CLK[0],?..." line.long 0x4C "IOCON_P2_19,I/O configuration register contents" bitfld.long 0x4C 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x4C 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x4C 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x4C 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x4C 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x4C 0.--2. " FUNC ,Selects pin function" "P2[19],EMC_CLK[1],?..." line.long 0x50 "IOCON_P2_20,I/O configuration register contents" bitfld.long 0x50 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x50 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x50 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x50 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x50 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x50 0.--2. " FUNC ,Selects pin function" "P2[20],/EMC_DYCS[0],?..." line.long 0x54 "IOCON_P2_21,I/O configuration register contents" bitfld.long 0x54 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x54 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x54 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x54 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x54 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x54 0.--2. " FUNC ,Selects pin function" "P2[21],/EMC_DYCS[1],?..." line.long 0x58 "IOCON_P2_22,I/O configuration register contents" bitfld.long 0x58 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x58 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x58 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x58 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x58 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x58 0.--2. " FUNC ,Selects pin function" "P2[22],/EMC_DYCS[2],SSP0_SCK,T3_CAP0,?..." line.long 0x5C "IOCON_P2_23,I/O configuration register contents" bitfld.long 0x5C 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x5C 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x5C 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x5C 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x5C 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x5C 0.--2. " FUNC ,Selects pin function" "P2[23],/EMC_DYCS[3],SSP0_SSEL,T3_CAP1,?..." line.long 0x60 "IOCON_P2_24,I/O configuration register contents" bitfld.long 0x60 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x60 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x60 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x60 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x60 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x60 0.--2. " FUNC ,Selects pin function" "P2[24],EMC_CKE[0],?..." line.long 0x64 "IOCON_P2_25,I/O configuration register contents" bitfld.long 0x64 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x64 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x64 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x64 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x64 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x64 0.--2. " FUNC ,Selects pin function" "P2[25],EMC_CKE[1],?..." line.long 0x68 "IOCON_P2_26,I/O configuration register contents" bitfld.long 0x68 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x68 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x68 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x68 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x68 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x68 0.--2. " FUNC ,Selects pin function" "P2[26],EMC_CKE[2],SSP0_MISO,T3_MAT0,?..." line.long 0x6C "IOCON_P2_27,I/O configuration register contents" bitfld.long 0x6C 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x6C 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x6C 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x6C 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x6C 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x6C 0.--2. " FUNC ,Selects pin function" "P2[27],EMC_CKE[3],SSP0_MOSI,T3_MAT1,?..." line.long 0x70 "IOCON_P2_28,I/O configuration register contents" bitfld.long 0x70 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x70 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x70 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x70 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x70 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x70 0.--2. " FUNC ,Selects pin function" "P2[28],EMC_DQM[0],?..." line.long 0x74 "IOCON_P2_29,I/O configuration register contents" bitfld.long 0x74 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x74 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x74 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x74 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x74 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x74 0.--2. " FUNC ,Selects pin function" "P2[29],EMC_DQM[1],?..." line.long 0x78 "IOCON_P2_30,I/O configuration register contents" bitfld.long 0x78 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x78 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x78 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x78 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x78 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x78 0.--2. " FUNC ,Selects pin function" "P2[30],EMC_DQM[2],I2C2_SDA,T3_MAT2,?..." line.long 0x7C "IOCON_P2_31,I/O configuration register contents" bitfld.long 0x7C 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x7C 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x7C 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x7C 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x7C 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x7C 0.--2. " FUNC ,Selects pin function" "P2[31],EMC_DQM[3],I2C2_SCL,T3_MAT3,?..." tree.end tree "Port 3" group.long 0x180++0x7F line.long 0x0 "IOCON_P3_0,I/O configuration register contents" bitfld.long 0x0 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x0 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x0 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x0 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x0 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x0 0.--2. " FUNC ,Selects pin function" "P3[0],EMC_D[0],?..." line.long 0x4 "IOCON_P3_1,I/O configuration register contents" bitfld.long 0x4 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x4 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x4 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x4 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x4 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x4 0.--2. " FUNC ,Selects pin function" "P3[1],EMC_D[1],?..." line.long 0x8 "IOCON_P3_2,I/O configuration register contents" bitfld.long 0x8 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x8 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x8 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x8 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x8 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x8 0.--2. " FUNC ,Selects pin function" "P3[2],EMC_D[2],?..." line.long 0xC "IOCON_P3_3,I/O configuration register contents" bitfld.long 0xC 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0xC 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0xC 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0xC 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0xC 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0xC 0.--2. " FUNC ,Selects pin function" "P3[3],EMC_D[3],?..." line.long 0x10 "IOCON_P3_4,I/O configuration register contents" bitfld.long 0x10 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x10 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x10 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x10 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x10 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x10 0.--2. " FUNC ,Selects pin function" "P3[4],EMC_D[4],?..." line.long 0x14 "IOCON_P3_5,I/O configuration register contents" bitfld.long 0x14 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x14 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x14 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x14 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x14 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x14 0.--2. " FUNC ,Selects pin function" "P3[5],EMC_D[5],?..." line.long 0x18 "IOCON_P3_6,I/O configuration register contents" bitfld.long 0x18 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x18 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x18 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x18 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x18 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x18 0.--2. " FUNC ,Selects pin function" "P3[6],EMC_D[6],?..." line.long 0x1C "IOCON_P3_7,I/O configuration register contents" bitfld.long 0x1C 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x1C 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x1C 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x1C 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x1C 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x1C 0.--2. " FUNC ,Selects pin function" "P3[7],EMC_D[7],?..." line.long 0x20 "IOCON_P3_8,I/O configuration register contents" bitfld.long 0x20 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x20 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x20 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x20 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x20 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x20 0.--2. " FUNC ,Selects pin function" "P3[8],EMC_D[8],?..." line.long 0x24 "IOCON_P3_9,I/O configuration register contents" bitfld.long 0x24 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x24 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x24 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x24 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x24 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x24 0.--2. " FUNC ,Selects pin function" "P3[9],EMC_D[9],?..." line.long 0x28 "IOCON_P3_10,I/O configuration register contents" bitfld.long 0x28 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x28 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x28 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x28 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x28 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x28 0.--2. " FUNC ,Selects pin function" "P3[10],EMC_D[10],?..." line.long 0x2C "IOCON_P3_11,I/O configuration register contents" bitfld.long 0x2C 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x2C 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x2C 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x2C 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x2C 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x2C 0.--2. " FUNC ,Selects pin function" "P3[11],EMC_D[11],?..." line.long 0x30 "IOCON_P3_12,I/O configuration register contents" bitfld.long 0x30 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x30 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x30 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x30 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x30 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x30 0.--2. " FUNC ,Selects pin function" "P3[12],EMC_D[12],?..." line.long 0x34 "IOCON_P3_13,I/O configuration register contents" bitfld.long 0x34 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x34 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x34 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x34 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x34 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x34 0.--2. " FUNC ,Selects pin function" "P3[13],EMC_D[13],?..." line.long 0x38 "IOCON_P3_14,I/O configuration register contents" bitfld.long 0x38 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x38 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x38 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x38 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x38 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x38 0.--2. " FUNC ,Selects pin function" "P3[14],EMC_D[14],?..." line.long 0x3C "IOCON_P3_15,I/O configuration register contents" bitfld.long 0x3C 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x3C 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x3C 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x3C 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x3C 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x3C 0.--2. " FUNC ,Selects pin function" "P3[15],EMC_D[15],?..." line.long 0x40 "IOCON_P3_16,I/O configuration register contents" bitfld.long 0x40 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x40 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x40 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x40 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x40 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x40 0.--2. " FUNC ,Selects pin function" "P3[16],EMC_D[16],PWM0_1,U1_TXD,?..." line.long 0x44 "IOCON_P3_17,I/O configuration register contents" bitfld.long 0x44 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x44 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x44 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x44 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x44 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x44 0.--2. " FUNC ,Selects pin function" "P3[17],EMC_D[17],PWM0_2,U1_RXD,?..." line.long 0x48 "IOCON_P3_18,I/O configuration register contents" bitfld.long 0x48 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x48 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x48 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x48 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x48 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x48 0.--2. " FUNC ,Selects pin function" "P3[18],EMC_D[18],PWM0_3,U1_CTS,?..." line.long 0x4C "IOCON_P3_19,I/O configuration register contents" bitfld.long 0x4C 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x4C 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x4C 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x4C 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x4C 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x4C 0.--2. " FUNC ,Selects pin function" "P3[19],EMC_D[19],PWM0_4,U1_DCD,?..." line.long 0x50 "IOCON_P3_20,I/O configuration register contents" bitfld.long 0x50 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x50 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x50 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x50 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x50 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x50 0.--2. " FUNC ,Selects pin function" "P3[20],EMC_D[20],PWM0_5,U1_DSR,?..." line.long 0x54 "IOCON_P3_21,I/O configuration register contents" bitfld.long 0x54 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x54 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x54 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x54 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x54 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x54 0.--2. " FUNC ,Selects pin function" "P3[21],EMC_D[21],PWM0_6,U1_DTR,?..." line.long 0x58 "IOCON_P3_22,I/O configuration register contents" bitfld.long 0x58 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x58 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x58 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x58 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x58 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x58 0.--2. " FUNC ,Selects pin function" "P3[22],EMC_D[22],PWM0_CAP0,U1_RI,?..." line.long 0x5C "IOCON_P3_23,I/O configuration register contents" bitfld.long 0x5C 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x5C 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x5C 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x5C 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x5C 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x5C 0.--2. " FUNC ,Selects pin function" "P3[23],EMC_D[23],PWM1_CAP0,T0_CAP0,?..." line.long 0x60 "IOCON_P3_24,I/O configuration register contents" bitfld.long 0x60 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x60 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x60 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x60 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x60 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x60 0.--2. " FUNC ,Selects pin function" "P3[24],EMC_D[24],PWM1_1,T0_CAP1,?..." line.long 0x64 "IOCON_P3_25,I/O configuration register contents" bitfld.long 0x64 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x64 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x64 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x64 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x64 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x64 0.--2. " FUNC ,Selects pin function" "P3[25],EMC_D[25],PWM1_2,T0_MAT0,?..." line.long 0x68 "IOCON_P3_26,I/O configuration register contents" bitfld.long 0x68 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x68 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x68 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x68 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x68 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x68 0.--2. " FUNC ,Selects pin function" "P3[26],EMC_D[26],PWM1_3,T0_MAT1,STCLK,?..." line.long 0x6C "IOCON_P3_27,I/O configuration register contents" bitfld.long 0x6C 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x6C 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x6C 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x6C 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x6C 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x6C 0.--2. " FUNC ,Selects pin function" "P3[27],EMC_D[27],PWM1_4,T1_CAP0,?..." line.long 0x70 "IOCON_P3_28,I/O configuration register contents" bitfld.long 0x70 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x70 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x70 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x70 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x70 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x70 0.--2. " FUNC ,Selects pin function" "P3[28],EMC_D[28],PWM1_5,T1_CAP1,?..." line.long 0x74 "IOCON_P3_29,I/O configuration register contents" bitfld.long 0x74 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x74 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x74 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x74 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x74 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x74 0.--2. " FUNC ,Selects pin function" "P3[29],EMC_D[29],PWM1_6,T1_MAT0,?..." line.long 0x78 "IOCON_P3_30,I/O configuration register contents" bitfld.long 0x78 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x78 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x78 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x78 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x78 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x78 0.--2. " FUNC ,Selects pin function" "P3[30],EMC_D[30],U1_RTS,T1_MAT1,?..." line.long 0x7C "IOCON_P3_31,I/O configuration register contents" bitfld.long 0x7C 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x7C 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x7C 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x7C 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x7C 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x7C 0.--2. " FUNC ,Selects pin function" "P3[31],EMC_D[31],Reserved,T1_MAT2,?..." tree.end tree "Port 4" group.long 0x200++0x7F line.long 0x0 "IOCON_P4_0,I/O configuration register contents" bitfld.long 0x0 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x0 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x0 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x0 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x0 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x0 0.--2. " FUNC ,Selects pin function" "P4[0],EMC_A[0],?..." line.long 0x4 "IOCON_P4_1,I/O configuration register contents" bitfld.long 0x4 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x4 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x4 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x4 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x4 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x4 0.--2. " FUNC ,Selects pin function" "P4[1],EMC_A[1],?..." line.long 0x8 "IOCON_P4_2,I/O configuration register contents" bitfld.long 0x8 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x8 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x8 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x8 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x8 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x8 0.--2. " FUNC ,Selects pin function" "P4[2],EMC_A[2],?..." line.long 0xC "IOCON_P4_3,I/O configuration register contents" bitfld.long 0xC 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0xC 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0xC 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0xC 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0xC 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0xC 0.--2. " FUNC ,Selects pin function" "P4[3],EMC_A[3],?..." line.long 0x10 "IOCON_P4_4,I/O configuration register contents" bitfld.long 0x10 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x10 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x10 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x10 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x10 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x10 0.--2. " FUNC ,Selects pin function" "P4[4],EMC_A[4],?..." line.long 0x14 "IOCON_P4_5,I/O configuration register contents" bitfld.long 0x14 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x14 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x14 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x14 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x14 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x14 0.--2. " FUNC ,Selects pin function" "P4[5],EMC_A[5],?..." line.long 0x18 "IOCON_P4_6,I/O configuration register contents" bitfld.long 0x18 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x18 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x18 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x18 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x18 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x18 0.--2. " FUNC ,Selects pin function" "P4[6],EMC_A[6],?..." line.long 0x1C "IOCON_P4_7,I/O configuration register contents" bitfld.long 0x1C 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x1C 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x1C 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x1C 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x1C 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x1C 0.--2. " FUNC ,Selects pin function" "P4[7],EMC_A[7],?..." line.long 0x20 "IOCON_P4_8,I/O configuration register contents" bitfld.long 0x20 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x20 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x20 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x20 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x20 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x20 0.--2. " FUNC ,Selects pin function" "P4[8],EMC_A[8],?..." line.long 0x24 "IOCON_P4_9,I/O configuration register contents" bitfld.long 0x24 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x24 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x24 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x24 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x24 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x24 0.--2. " FUNC ,Selects pin function" "P4[9],EMC_A[9],?..." line.long 0x28 "IOCON_P4_10,I/O configuration register contents" bitfld.long 0x28 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x28 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x28 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x28 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x28 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x28 0.--2. " FUNC ,Selects pin function" "P4[10],EMC_A[10],?..." line.long 0x2C "IOCON_P4_11,I/O configuration register contents" bitfld.long 0x2C 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x2C 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x2C 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x2C 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x2C 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x2C 0.--2. " FUNC ,Selects pin function" "P4[11],EMC_A[11],?..." line.long 0x30 "IOCON_P4_12,I/O configuration register contents" bitfld.long 0x30 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x30 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x30 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x30 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x30 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x30 0.--2. " FUNC ,Selects pin function" "P4[12],EMC_A[12],?..." line.long 0x34 "IOCON_P4_13,I/O configuration register contents" bitfld.long 0x34 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x34 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x34 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x34 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x34 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x34 0.--2. " FUNC ,Selects pin function" "P4[13],EMC_A[13],?..." line.long 0x38 "IOCON_P4_14,I/O configuration register contents" bitfld.long 0x38 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x38 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x38 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x38 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x38 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x38 0.--2. " FUNC ,Selects pin function" "P4[14],EMC_A[14],?..." line.long 0x3C "IOCON_P4_15,I/O configuration register contents" bitfld.long 0x3C 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x3C 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x3C 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x3C 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x3C 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x3C 0.--2. " FUNC ,Selects pin function" "P4[15],EMC_A[15],?..." line.long 0x40 "IOCON_P4_16,I/O configuration register contents" bitfld.long 0x40 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x40 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x40 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x40 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x40 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x40 0.--2. " FUNC ,Selects pin function" "P4[16],EMC_A[16],?..." line.long 0x44 "IOCON_P4_17,I/O configuration register contents" bitfld.long 0x44 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x44 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x44 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x44 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x44 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x44 0.--2. " FUNC ,Selects pin function" "P4[17],EMC_A[17],?..." line.long 0x48 "IOCON_P4_18,I/O configuration register contents" bitfld.long 0x48 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x48 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x48 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x48 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x48 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x48 0.--2. " FUNC ,Selects pin function" "P4[18],EMC_A[18],?..." line.long 0x4C "IOCON_P4_19,I/O configuration register contents" bitfld.long 0x4C 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x4C 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x4C 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x4C 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x4C 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x4C 0.--2. " FUNC ,Selects pin function" "P4[19],EMC_A[19],?..." line.long 0x50 "IOCON_P4_20,I/O configuration register contents" bitfld.long 0x50 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x50 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x50 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x50 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x50 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x50 0.--2. " FUNC ,Selects pin function" "P4[20],EMC_A[20],I2C2_SDA,SSP1_SCK,?..." line.long 0x54 "IOCON_P4_21,I/O configuration register contents" bitfld.long 0x54 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x54 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x54 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x54 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x54 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x54 0.--2. " FUNC ,Selects pin function" "P4[21],EMC_A[21],I2C2_SCL,SSP1_SSEL,?..." line.long 0x58 "IOCON_P4_22,I/O configuration register contents" bitfld.long 0x58 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x58 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x58 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x58 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x58 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x58 0.--2. " FUNC ,Selects pin function" "P4[22],EMC_A[22],U2_TXD,SSP1_MISO,?..." line.long 0x5C "IOCON_P4_23,I/O configuration register contents" bitfld.long 0x5C 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x5C 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x5C 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x5C 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x5C 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x5C 0.--2. " FUNC ,Selects pin function" "P4[23],EMC_A[23],U2_RXD,SSP1_MOSI,?..." line.long 0x60 "IOCON_P4_24,I/O configuration register contents" bitfld.long 0x60 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x60 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x60 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x60 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x60 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x60 0.--2. " FUNC ,Selects pin function" "P4[24],/EMC_OE,?..." line.long 0x64 "IOCON_P4_25,I/O configuration register contents" bitfld.long 0x64 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x64 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x64 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x64 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x64 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x64 0.--2. " FUNC ,Selects pin function" "P4[25],/EMC_WE,?..." line.long 0x68 "IOCON_P4_26,I/O configuration register contents" bitfld.long 0x68 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x68 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x68 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x68 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x68 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x68 0.--2. " FUNC ,Selects pin function" "P4[26],/EMC_BLS[0],?..." line.long 0x6C "IOCON_P4_27,I/O configuration register contents" bitfld.long 0x6C 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x6C 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x6C 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x6C 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x6C 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x6C 0.--2. " FUNC ,Selects pin function" "P4[27],/EMC_BLS[1],?..." line.long 0x70 "IOCON_P4_28,I/O configuration register contents" bitfld.long 0x70 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x70 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x70 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x70 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x70 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" sif (cpu()!="LPC1772"&&cpu()!="LPC1774"&&cpu()!="LPC1776"&&cpu()!="LPC1777"&&cpu()!="LPC1778") bitfld.long 0x70 0.--2. " FUNC ,Selects pin function" "P4[28],/EMC_BLS[2],U3_TXD,T2_MAT0,Reserved,LCD_VD_6,LCD_VD_10,LCD_VD_2" else bitfld.long 0x70 0.--2. " FUNC ,Selects pin function" "P4[28],/EMC_BLS[2],U3_TXD,T2_MAT0,?..." endif line.long 0x74 "IOCON_P4_29,I/O configuration register contents" bitfld.long 0x74 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x74 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x74 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x74 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x74 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" sif (cpu()!="LPC1772"&&cpu()!="LPC1774"&&cpu()!="LPC1776"&&cpu()!="LPC1777"&&cpu()!="LPC1778") bitfld.long 0x74 0.--2. " FUNC ,Selects pin function" "P4[29],/EMC_BLS[3],U3_RXD,T2_MAT1,I2C2_SCL,LCD_VD_7,LCD_VD_11,LCD_VD_3" else bitfld.long 0x74 0.--2. " FUNC ,Selects pin function" "P4[29],/EMC_BLS[3],U3_RXD,T2_MAT1,I2C2_SCL,?..." endif line.long 0x78 "IOCON_P4_30,I/O configuration register contents" bitfld.long 0x78 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x78 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x78 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x78 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x78 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x78 0.--2. " FUNC ,Selects pin function" "P4[30],/EMC_CS[0],?..." line.long 0x7C "IOCON_P4_31,I/O configuration register contents" bitfld.long 0x7C 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x7C 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x7C 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x7C 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x7C 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x7C 0.--2. " FUNC ,Selects pin function" "P4[31],/EMC_CS[1],?..." tree.end tree "Port 5" group.long 0x280++0x7F line.long 0x00 "IOCON_P5_00,I/O configuration register contents" bitfld.long 0x00 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x00 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x00 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x00 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x00 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x00 0.--2. " FUNC ,Selects pin function" "P5[0],EMC_A[24],Reserved,T2_MAT2,?..." line.long 0x04 "IOCON_P5_01,I/O configuration register contents" bitfld.long 0x04 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x04 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x04 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x04 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x04 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x04 0.--2. " FUNC ,Selects pin function" "P5[1],EMC_A[24],Reserved,T2_MAT3,?..." line.long 0x08 "IOCON_P5_02,I/O configuration register contents" bitfld.long 0x08 9. " HIDRIVE ,Controls sink current capability of the pin" "4 mA,20 mA" bitfld.long 0x08 8. " HS ,Configures I2C features(I2C 50ns glitch filter and slew rate control)" "Enabled,Disabled" bitfld.long 0x08 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x08 0.--2. " FUNC ,Selects pin function" "P5[2],Reserved,Reserved,T3_MAT2,Reserved,I2C0_SDA,?..." line.long 0x0C "IOCON_P5_03,I/O configuration register contents" bitfld.long 0x0C 9. " HIDRIVE ,Controls sink current capability of the pin" "4 mA,20 mA" bitfld.long 0x0C 8. " HS ,Configures I2C features(I2C 50ns glitch filter and slew rate control)" "Enabled,Disabled" bitfld.long 0x0C 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x0C 0.--2. " FUNC ,Selects pin function" "P5[3],Reserved,Reserved,Reserved,U4_RXD,I2C0_SCL,?..." line.long 0x10 "IOCON_P5_04,I/O configuration register contents" bitfld.long 0x10 10. " OD ,Controls open-drain mode" "Normal push-pull,Simulated open-drain" bitfld.long 0x10 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x10 6. " INV ,Input polarity" "Not inverted,Inverted" textline " " bitfld.long 0x10 5. " HYS ,Hysteresis" "Disabled,Enabled" bitfld.long 0x10 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down enabled,Pull-up enabled,Repeater mode" bitfld.long 0x10 0.--2. " FUNC ,Selects pin function" "P5[4],U0_OE,Reserved,T3_MAT3,U4_TXD,?..." tree.end width 0xB tree.end endif tree "GPIO (General Purpose Input/Output)" sif (cpu()!="LPC1772"&&cpu()!="LPC1774"&&cpu()!="LPC1776"&&cpu()!="LPC1777"&&cpu()!="LPC1778"&&cpu()!="LPC1785"&&cpu()!="LPC1786"&&cpu()!="LPC1787"&&cpu()!="LPC1788") base ad:0x2009C000 width 10. tree "Port 0" group.long 0x00++0x03 line.long 0x00 "FIO0DIR,Fast GPIO port 0 Direction register" sif (cpuis("LPC176*")) bitfld.long 0x00 30. " DIR0.30 ,Pin 0.30 Direction" "Input,Output" bitfld.long 0x00 29. " DIR0.29 ,Pin 0.29 Direction" "Input,Output" bitfld.long 0x00 28. " DIR0.28 ,Pin 0.28 Direction" "Input,Output" bitfld.long 0x00 27. " DIR0.27 ,Pin 0.27 Direction" "Input,Output" textline " " bitfld.long 0x00 26. " DIR0.26 ,Pin 0.26 Direction" "Input,Output" bitfld.long 0x00 25. " DIR0.25 ,Pin 0.25 Direction" "Input,Output" bitfld.long 0x00 24. " DIR0.24 ,Pin 0.24 Direction" "Input,Output" bitfld.long 0x00 23. " DIR0.23 ,Pin 0.23 Direction" "Input,Output" textline " " bitfld.long 0x00 22. " DIR0.22 ,Pin 0.22 Direction" "Input,Output" bitfld.long 0x00 21. " DIR0.21 ,Pin 0.21 Direction" "Input,Output" bitfld.long 0x00 20. " DIR0.20 ,Pin 0.20 Direction" "Input,Output" bitfld.long 0x00 19. " DIR0.19 ,Pin 0.19 Direction" "Input,Output" textline " " bitfld.long 0x00 18. " DIR0.18 ,Pin 0.18 Direction" "Input,Output" bitfld.long 0x00 17. " DIR0.17 ,Pin 0.17 Direction" "Input,Output" bitfld.long 0x00 16. " DIR0.16 ,Pin 0.16 Direction" "Input,Output" bitfld.long 0x00 15. " DIR0.15 ,Pin 0.15 Direction" "Input,Output" textline " " bitfld.long 0x00 11. " DIR0.11 ,Pin 0.11 Direction" "Input,Output" bitfld.long 0x00 10. " DIR0.10 ,Pin 0.10 Direction" "Input,Output" bitfld.long 0x00 9. " DIR0.9 ,Pin 0.9 Direction" "Input,Output" bitfld.long 0x00 8. " DIR0.8 ,Pin 0.8 Direction" "Input,Output" textline " " bitfld.long 0x00 7. " DIR0.7 ,Pin 0.7 Direction" "Input,Output" bitfld.long 0x00 6. " DIR0.6 ,Pin 0.6 Direction" "Input,Output" bitfld.long 0x00 5. " DIR0.5 ,Pin 0.5 Direction" "Input,Output" bitfld.long 0x00 4. " DIR0.4 ,Pin 0.5 Direction" "Input,Output" textline " " bitfld.long 0x00 3. " DIR0.3 ,Pin 0.3 Direction" "Input,Output" bitfld.long 0x00 2. " DIR0.2 ,Pin 0.2 Direction" "Input,Output" bitfld.long 0x00 1. " DIR0.1 ,Pin 0.1 Direction" "Input,Output" bitfld.long 0x00 0. " DIR0.0 ,Pin 0.0 Direction" "Input,Output" else bitfld.long 0x00 30. " DIR0.30 ,Pin 0.30 Direction" "Input,Output" bitfld.long 0x00 29. " DIR0.29 ,Pin 0.29 Direction" "Input,Output" bitfld.long 0x00 26. " DIR0.26 ,Pin 0.26 Direction" "Input,Output" bitfld.long 0x00 25. " DIR0.25 ,Pin 0.25 Direction" "Input,Output" textline " " bitfld.long 0x00 22. " DIR0.22 ,Pin 0.22 Direction" "Input,Output" bitfld.long 0x00 18. " DIR0.18 ,Pin 0.18 Direction" "Input,Output" bitfld.long 0x00 17. " DIR0.17 ,Pin 0.17 Direction" "Input,Output" bitfld.long 0x00 16. " DIR0.16 ,Pin 0.16 Direction" "Input,Output" textline " " bitfld.long 0x00 15. " DIR0.15 ,Pin 0.15 Direction" "Input,Output" bitfld.long 0x00 11. " DIR0.11 ,Pin 0.11 Direction" "Input,Output" bitfld.long 0x00 10. " DIR0.10 ,Pin 0.10 Direction" "Input,Output" bitfld.long 0x00 9. " DIR0.9 ,Pin 0.9 Direction" "Input,Output" textline " " bitfld.long 0x00 8. " DIR0.8 ,Pin 0.8 Direction" "Input,Output" bitfld.long 0x00 7. " DIR0.7 ,Pin 0.7 Direction" "Input,Output" bitfld.long 0x00 6. " DIR0.6 ,Pin 0.6 Direction" "Input,Output" bitfld.long 0x00 3. " DIR0.3 ,Pin 0.3 Direction" "Input,Output" textline " " bitfld.long 0x00 2. " DIR0.2 ,Pin 0.2 Direction" "Input,Output" bitfld.long 0x00 1. " DIR0.1 ,Pin 0.1 Direction" "Input,Output" bitfld.long 0x00 0. " DIR0.0 ,Pin 0.0 Direction" "Input,Output" endif group.long 0x10++0x03 line.long 0x00 "FIO0MASK,Fast GPIO port 0 Mask register" sif (cpuis("LPC176*")) bitfld.long 0x00 30. " MASK0.30 ,Pin 0.30 Access Control" "Not masked,Masked" bitfld.long 0x00 29. " MASK0.29 ,Pin 0.29 Access Control" "Not masked,Masked" bitfld.long 0x00 28. " MASK0.28 ,Pin 0.28 Access Control" "Not masked,Masked" bitfld.long 0x00 27. " MASK0.27 ,Pin 0.27 Access Control" "Not masked,Masked" textline " " bitfld.long 0x00 26. " MASK0.26 ,Pin 0.26 Access Control" "Not masked,Masked" bitfld.long 0x00 25. " MASK0.25 ,Pin 0.25 Access Control" "Not masked,Masked" bitfld.long 0x00 24. " MASK0.24 ,Pin 0.24 Access Control" "Not masked,Masked" bitfld.long 0x00 23. " MASK0.23 ,Pin 0.23 Access Control" "Not masked,Masked" textline " " bitfld.long 0x00 22. " MASK0.22 ,Pin 0.22 Access Control" "Not masked,Masked" bitfld.long 0x00 21. " MASK0.21 ,Pin 0.21 Access Control" "Not masked,Masked" bitfld.long 0x00 20. " MASK0.20 ,Pin 0.20 Access Control" "Not masked,Masked" bitfld.long 0x00 19. " MASK0.19 ,Pin 0.19 Access Control" "Not masked,Masked" textline " " bitfld.long 0x00 18. " MASK0.18 ,Pin 0.18 Access Control" "Not masked,Masked" bitfld.long 0x00 17. " MASK0.17 ,Pin 0.17 Access Control" "Not masked,Masked" bitfld.long 0x00 16. " MASK0.16 ,Pin 0.16 Access Control" "Not masked,Masked" bitfld.long 0x00 15. " MASK0.15 ,Pin 0.15 Access Control" "Not masked,Masked" textline " " bitfld.long 0x00 11. " MASK0.11 ,Pin 0.11 Access Control" "Not masked,Masked" bitfld.long 0x00 10. " MASK0.10 ,Pin 0.10 Access Control" "Not masked,Masked" bitfld.long 0x00 9. " MASK0.9 ,Pin 0.9 Access Control" "Not masked,Masked" bitfld.long 0x00 8. " MASK0.8 ,Pin 0.8 Access Control" "Not masked,Masked" textline " " bitfld.long 0x00 7. " MASK0.7 ,Pin 0.7 Access Control" "Not masked,Masked" bitfld.long 0x00 6. " MASK0.6 ,Pin 0.6 Access Control" "Not masked,Masked" bitfld.long 0x00 5. " MASK0.5 ,Pin 0.5 Access Control" "Not masked,Masked" bitfld.long 0x00 4. " MASK0.4 ,Pin 0.5 Access Control" "Not masked,Masked" textline " " bitfld.long 0x00 3. " MASK0.3 ,Pin 0.3 Access Control" "Not masked,Masked" bitfld.long 0x00 2. " MASK0.2 ,Pin 0.2 Access Control" "Not masked,Masked" bitfld.long 0x00 1. " MASK0.1 ,Pin 0.1 Access Control" "Not masked,Masked" bitfld.long 0x00 0. " MASK0.0 ,Pin 0.0 Access Control" "Not masked,Masked" else bitfld.long 0x00 30. " MASK0.30 ,Pin 0.30 Access Control" "Not masked,Masked" bitfld.long 0x00 29. " MASK0.29 ,Pin 0.29 Access Control" "Not masked,Masked" bitfld.long 0x00 26. " MASK0.26 ,Pin 0.26 Access Control" "Not masked,Masked" bitfld.long 0x00 25. " MASK0.25 ,Pin 0.25 Access Control" "Not masked,Masked" textline " " bitfld.long 0x00 22. " MASK0.22 ,Pin 0.22 Access Control" "Not masked,Masked" bitfld.long 0x00 18. " MASK0.18 ,Pin 0.18 Access Control" "Not masked,Masked" bitfld.long 0x00 17. " MASK0.17 ,Pin 0.17 Access Control" "Not masked,Masked" bitfld.long 0x00 16. " MASK0.16 ,Pin 0.16 Access Control" "Not masked,Masked" textline " " bitfld.long 0x00 15. " MASK0.15 ,Pin 0.15 Access Control" "Not masked,Masked" bitfld.long 0x00 11. " MASK0.11 ,Pin 0.11 Access Control" "Not masked,Masked" bitfld.long 0x00 10. " MASK0.10 ,Pin 0.10 Access Control" "Not masked,Masked" bitfld.long 0x00 9. " MASK0.9 ,Pin 0.9 Access Control" "Not masked,Masked" textline " " bitfld.long 0x00 8. " MASK0.8 ,Pin 0.8 Access Control" "Not masked,Masked" bitfld.long 0x00 7. " MASK0.7 ,Pin 0.7 Access Control" "Not masked,Masked" bitfld.long 0x00 6. " MASK0.6 ,Pin 0.6 Access Control" "Not masked,Masked" bitfld.long 0x00 3. " MASK0.3 ,Pin 0.3 Access Control" "Not masked,Masked" textline " " bitfld.long 0x00 2. " MASK0.2 ,Pin 0.2 Access Control" "Not masked,Masked" bitfld.long 0x00 1. " MASK0.1 ,Pin 0.1 Access Control" "Not masked,Masked" bitfld.long 0x00 0. " MASK0.0 ,Pin 0.0 Access Control" "Not masked,Masked" endif group.long 0x14++0x03 line.long 0x00 "FIO0PIN,Fast GPIO Port 0 Pin Value Register" sif (cpuis("LPC176*")) bitfld.long 0x00 30. " PIN0.30 ,Pin 0.30 Value" "Low,High" bitfld.long 0x00 29. " PIN0.29 ,Pin 0.29 Value" "Low,High" bitfld.long 0x00 28. " PIN0.28 ,Pin 0.28 Value" "Low,High" bitfld.long 0x00 27. " PIN0.27 ,Pin 0.27 Value" "Low,High" textline " " bitfld.long 0x00 26. " PIN0.26 ,Pin 0.26 Value" "Low,High" bitfld.long 0x00 25. " PIN0.25 ,Pin 0.25 Value" "Low,High" bitfld.long 0x00 24. " PIN0.24 ,Pin 0.24 Value" "Low,High" bitfld.long 0x00 23. " PIN0.23 ,Pin 0.23 Value" "Low,High" textline " " bitfld.long 0x00 22. " PIN0.22 ,Pin 0.22 Value" "Low,High" bitfld.long 0x00 21. " PIN0.21 ,Pin 0.21 Value" "Low,High" bitfld.long 0x00 20. " PIN0.20 ,Pin 0.20 Value" "Low,High" bitfld.long 0x00 19. " PIN0.19 ,Pin 0.19 Value" "Low,High" textline " " bitfld.long 0x00 18. " PIN0.18 ,Pin 0.18 Value" "Low,High" bitfld.long 0x00 17. " PIN0.17 ,Pin 0.17 Value" "Low,High" bitfld.long 0x00 16. " PIN0.16 ,Pin 0.16 Value" "Low,High" bitfld.long 0x00 15. " PIN0.15 ,Pin 0.15 Value" "Low,High" textline " " bitfld.long 0x00 11. " PIN0.11 ,Pin 0.21 Value" "Low,High" bitfld.long 0x00 10. " PIN0.10 ,Pin 0.10 Value" "Low,High" bitfld.long 0x00 9. " PIN0.9 ,Pin 0.9 Value" "Low,High" bitfld.long 0x00 8. " PIN0.8 ,Pin 0.8 Value" "Low,High" textline " " bitfld.long 0x00 7. " PIN0.7 ,Pin 0.7 Value" "Low,High" bitfld.long 0x00 6. " PIN0.6 ,Pin 0.6 Value" "Low,High" bitfld.long 0x00 5. " PIN0.5 ,Pin 0.5 Value" "Low,High" bitfld.long 0x00 4. " PIN0.4 ,Pin 0.5 Value" "Low,High" textline " " bitfld.long 0x00 3. " PIN0.3 ,Pin 0.3 Value" "Low,High" bitfld.long 0x00 2. " PIN0.2 ,Pin 0.2 Value" "Low,High" bitfld.long 0x00 1. " PIN0.1 ,Pin 0.1 Value" "Low,High" bitfld.long 0x00 0. " PIN0.0 ,Pin 0.0 Value" "Low,High" else bitfld.long 0x00 30. " PIN0.30 ,Pin 0.30 Value" "Low,High" bitfld.long 0x00 29. " PIN0.29 ,Pin 0.29 Value" "Low,High" bitfld.long 0x00 26. " PIN0.26 ,Pin 0.26 Value" "Low,High" bitfld.long 0x00 25. " PIN0.25 ,Pin 0.25 Value" "Low,High" textline " " bitfld.long 0x00 22. " PIN0.22 ,Pin 0.22 Value" "Low,High" bitfld.long 0x00 18. " PIN0.18 ,Pin 0.18 Value" "Low,High" bitfld.long 0x00 17. " PIN0.17 ,Pin 0.17 Value" "Low,High" bitfld.long 0x00 16. " PIN0.16 ,Pin 0.16 Value" "Low,High" textline " " bitfld.long 0x00 15. " PIN0.15 ,Pin 0.15 Value" "Low,High" bitfld.long 0x00 11. " PIN0.11 ,Pin 0.21 Value" "Low,High" bitfld.long 0x00 10. " PIN0.10 ,Pin 0.10 Value" "Low,High" bitfld.long 0x00 9. " PIN0.9 ,Pin 0.9 Value" "Low,High" textline " " bitfld.long 0x00 8. " PIN0.8 ,Pin 0.8 Value" "Low,High" bitfld.long 0x00 7. " PIN0.7 ,Pin 0.7 Value" "Low,High" bitfld.long 0x00 6. " PIN0.6 ,Pin 0.6 Value" "Low,High" bitfld.long 0x00 3. " PIN0.3 ,Pin 0.3 Value" "Low,High" textline " " bitfld.long 0x00 2. " PIN0.2 ,Pin 0.2 Value" "Low,High" bitfld.long 0x00 1. " PIN0.1 ,Pin 0.1 Value" "Low,High" bitfld.long 0x00 0. " PIN0.0 ,Pin 0.0 Value" "Low,High" endif group.long 0x18++0x03 line.long 0x00 "FIO0SET,Fast GPIO Port 0 Pin Set Register" sif (cpuis("LPC176*")) bitfld.long 0x00 30. " PIN0.30 ,Pin 0.30 Set" "Not set,Set" bitfld.long 0x00 29. " PIN0.29 ,Pin 0.29 Set" "Not set,Set" bitfld.long 0x00 28. " PIN0.28 ,Pin 0.28 Set" "Not set,Set" bitfld.long 0x00 27. " PIN0.27 ,Pin 0.27 Set" "Not set,Set" textline " " bitfld.long 0x00 26. " PIN0.26 ,Pin 0.26 Set" "Not set,Set" bitfld.long 0x00 25. " PIN0.25 ,Pin 0.25 Set" "Not set,Set" bitfld.long 0x00 24. " PIN0.24 ,Pin 0.24 Set" "Not set,Set" bitfld.long 0x00 23. " PIN0.23 ,Pin 0.23 Set" "Not set,Set" textline " " bitfld.long 0x00 22. " PIN0.22 ,Pin 0.22 Set" "Not set,Set" bitfld.long 0x00 21. " PIN0.21 ,Pin 0.21 Set" "Not set,Set" bitfld.long 0x00 20. " PIN0.20 ,Pin 0.20 Set" "Not set,Set" bitfld.long 0x00 19. " PIN0.19 ,Pin 0.19 Set" "Not set,Set" textline " " bitfld.long 0x00 18. " PIN0.18 ,Pin 0.18 Set" "Not set,Set" bitfld.long 0x00 17. " PIN0.17 ,Pin 0.17 Set" "Not set,Set" bitfld.long 0x00 16. " PIN0.16 ,Pin 0.16 Set" "Not set,Set" bitfld.long 0x00 15. " PIN0.15 ,Pin 0.15 Set" "Not set,Set" textline " " bitfld.long 0x00 11. " PIN0.11 ,Pin 0.21 Set" "Not set,Set" bitfld.long 0x00 10. " PIN0.10 ,Pin 0.10 Set" "Not set,Set" bitfld.long 0x00 9. " PIN0.9 ,Pin 0.9 Set" "Not set,Set" bitfld.long 0x00 8. " PIN0.8 ,Pin 0.8 Set" "Not set,Set" textline " " bitfld.long 0x00 7. " PIN0.7 ,Pin 0.7 Set" "Not set,Set" bitfld.long 0x00 6. " PIN0.6 ,Pin 0.6 Set" "Not set,Set" bitfld.long 0x00 5. " PIN0.5 ,Pin 0.5 Set" "Not set,Set" bitfld.long 0x00 4. " PIN0.4 ,Pin 0.5 Set" "Not set,Set" textline " " bitfld.long 0x00 3. " PIN0.3 ,Pin 0.3 Set" "Not set,Set" bitfld.long 0x00 2. " PIN0.2 ,Pin 0.2 Set" "Not set,Set" bitfld.long 0x00 1. " PIN0.1 ,Pin 0.1 Set" "Not set,Set" bitfld.long 0x00 0. " PIN0.0 ,Pin 0.0 Set" "Not set,Set" else bitfld.long 0x00 30. " PIN0.30 ,Pin 0.30 Set" "Not set,Set" bitfld.long 0x00 29. " PIN0.29 ,Pin 0.29 Set" "Not set,Set" bitfld.long 0x00 26. " PIN0.26 ,Pin 0.26 Set" "Not set,Set" bitfld.long 0x00 25. " PIN0.25 ,Pin 0.25 Set" "Not set,Set" textline " " bitfld.long 0x00 22. " PIN0.22 ,Pin 0.22 Set" "Not set,Set" bitfld.long 0x00 18. " PIN0.18 ,Pin 0.18 Set" "Not set,Set" bitfld.long 0x00 17. " PIN0.17 ,Pin 0.17 Set" "Not set,Set" bitfld.long 0x00 16. " PIN0.16 ,Pin 0.16 Set" "Not set,Set" textline " " bitfld.long 0x00 15. " PIN0.15 ,Pin 0.15 Set" "Not set,Set" bitfld.long 0x00 11. " PIN0.11 ,Pin 0.21 Set" "Not set,Set" bitfld.long 0x00 10. " PIN0.10 ,Pin 0.10 Set" "Not set,Set" bitfld.long 0x00 9. " PIN0.9 ,Pin 0.9 Set" "Not set,Set" textline " " bitfld.long 0x00 8. " PIN0.8 ,Pin 0.8 Set" "Not set,Set" bitfld.long 0x00 7. " PIN0.7 ,Pin 0.7 Set" "Not set,Set" bitfld.long 0x00 6. " PIN0.6 ,Pin 0.6 Set" "Not set,Set" bitfld.long 0x00 3. " PIN0.3 ,Pin 0.3 Set" "Not set,Set" textline " " bitfld.long 0x00 2. " PIN0.2 ,Pin 0.2 Set" "Not set,Set" bitfld.long 0x00 1. " PIN0.1 ,Pin 0.1 Set" "Not set,Set" bitfld.long 0x00 0. " PIN0.0 ,Pin 0.0 Set" "Not set,Set" endif wgroup.long 0x1C++0x03 line.long 0x00 "FIO0CLR,Fast GPIO Port 0 Pin Clear Register" sif (cpuis("LPC176*")) bitfld.long 0x00 30. " PIN0.30 ,Pin 0.30 Clear" "No effect,Clear" bitfld.long 0x00 29. " PIN0.29 ,Pin 0.29 Clear" "No effect,Clear" bitfld.long 0x00 28. " PIN0.28 ,Pin 0.28 Clear" "No effect,Clear" bitfld.long 0x00 27. " PIN0.27 ,Pin 0.27 Clear" "No effect,Clear" textline " " bitfld.long 0x00 26. " PIN0.26 ,Pin 0.26 Clear" "No effect,Clear" bitfld.long 0x00 25. " PIN0.25 ,Pin 0.25 Clear" "No effect,Clear" bitfld.long 0x00 24. " PIN0.24 ,Pin 0.24 Clear" "No effect,Clear" bitfld.long 0x00 23. " PIN0.23 ,Pin 0.23 Clear" "No effect,Clear" textline " " bitfld.long 0x00 22. " PIN0.22 ,Pin 0.22 Clear" "No effect,Clear" bitfld.long 0x00 21. " PIN0.21 ,Pin 0.21 Clear" "No effect,Clear" bitfld.long 0x00 20. " PIN0.20 ,Pin 0.20 Clear" "No effect,Clear" bitfld.long 0x00 19. " PIN0.19 ,Pin 0.19 Clear" "No effect,Clear" textline " " bitfld.long 0x00 18. " PIN0.18 ,Pin 0.18 Clear" "No effect,Clear" bitfld.long 0x00 17. " PIN0.17 ,Pin 0.17 Clear" "No effect,Clear" bitfld.long 0x00 16. " PIN0.16 ,Pin 0.16 Clear" "No effect,Clear" bitfld.long 0x00 15. " PIN0.15 ,Pin 0.15 Clear" "No effect,Clear" textline " " bitfld.long 0x00 11. " PIN0.11 ,Pin 0.21 Clear" "No effect,Clear" bitfld.long 0x00 10. " PIN0.10 ,Pin 0.10 Clear" "No effect,Clear" bitfld.long 0x00 9. " PIN0.9 ,Pin 0.9 Clear" "No effect,Clear" bitfld.long 0x00 8. " PIN0.8 ,Pin 0.8 Clear" "No effect,Clear" textline " " bitfld.long 0x00 7. " PIN0.7 ,Pin 0.7 Clear" "No effect,Clear" bitfld.long 0x00 6. " PIN0.6 ,Pin 0.6 Clear" "No effect,Clear" bitfld.long 0x00 5. " PIN0.5 ,Pin 0.5 Clear" "No effect,Clear" bitfld.long 0x00 4. " PIN0.4 ,Pin 0.5 Clear" "No effect,Clear" textline " " bitfld.long 0x00 3. " PIN0.3 ,Pin 0.3 Clear" "No effect,Clear" bitfld.long 0x00 2. " PIN0.2 ,Pin 0.2 Clear" "No effect,Clear" bitfld.long 0x00 1. " PIN0.1 ,Pin 0.1 Clear" "No effect,Clear" bitfld.long 0x00 0. " PIN0.0 ,Pin 0.0 Clear" "No effect,Clear" else bitfld.long 0x00 30. " PIN0.30 ,Pin 0.30 Clear" "No effect,Clear" bitfld.long 0x00 29. " PIN0.29 ,Pin 0.29 Clear" "No effect,Clear" bitfld.long 0x00 26. " PIN0.26 ,Pin 0.26 Clear" "No effect,Clear" bitfld.long 0x00 25. " PIN0.25 ,Pin 0.25 Clear" "No effect,Clear" textline " " bitfld.long 0x00 22. " PIN0.22 ,Pin 0.22 Clear" "No effect,Clear" bitfld.long 0x00 18. " PIN0.18 ,Pin 0.18 Clear" "No effect,Clear" bitfld.long 0x00 17. " PIN0.17 ,Pin 0.17 Clear" "No effect,Clear" bitfld.long 0x00 16. " PIN0.16 ,Pin 0.16 Clear" "No effect,Clear" textline " " bitfld.long 0x00 15. " PIN0.15 ,Pin 0.15 Clear" "No effect,Clear" bitfld.long 0x00 11. " PIN0.11 ,Pin 0.21 Clear" "No effect,Clear" bitfld.long 0x00 10. " PIN0.10 ,Pin 0.10 Clear" "No effect,Clear" bitfld.long 0x00 9. " PIN0.9 ,Pin 0.9 Clear" "No effect,Clear" textline " " bitfld.long 0x00 8. " PIN0.8 ,Pin 0.8 Clear" "No effect,Clear" bitfld.long 0x00 7. " PIN0.7 ,Pin 0.7 Clear" "No effect,Clear" bitfld.long 0x00 6. " PIN0.6 ,Pin 0.6 Clear" "No effect,Clear" bitfld.long 0x00 3. " PIN0.3 ,Pin 0.3 Clear" "No effect,Clear" textline " " bitfld.long 0x00 2. " PIN0.2 ,Pin 0.2 Clear" "No effect,Clear" bitfld.long 0x00 1. " PIN0.1 ,Pin 0.1 Clear" "No effect,Clear" bitfld.long 0x00 0. " PIN0.0 ,Pin 0.0 Clear" "No effect,Clear" endif tree.end tree "Port 1" group.long 0x20++0x03 "Local Bus" line.long 0x00 "FIO1DIR,Fast GPIO 1 Port Direction Control Register" sif (cpuis("LPC176*")) bitfld.long 0x00 31. " DIR1.31 ,Pin 1.31 Direction" "Input,Output" bitfld.long 0x00 30. " DIR1.30 ,Pin 1.30 Direction" "Input,Output" bitfld.long 0x00 29. " DIR1.29 ,Pin 1.29 Direction" "Input,Output" bitfld.long 0x00 28. " DIR1.28 ,Pin 1.28 Direction" "Input,Output" textline " " bitfld.long 0x00 27. " DIR1.27 ,Pin 1.27 Direction" "Input,Output" bitfld.long 0x00 26. " DIR1.26 ,Pin 1.26 Direction" "Input,Output" bitfld.long 0x00 25. " DIR1.25 ,Pin 1.25 Direction" "Input,Output" bitfld.long 0x00 24. " DIR1.24 ,Pin 1.24 Direction" "Input,Output" textline " " bitfld.long 0x00 23. " DIR1.23 ,Pin 1.23 Direction" "Input,Output" bitfld.long 0x00 22. " DIR1.22 ,Pin 1.22 Direction" "Input,Output" bitfld.long 0x00 21. " DIR1.21 ,Pin 1.21 Direction" "Input,Output" bitfld.long 0x00 20. " DIR1.20 ,Pin 1.20 Direction" "Input,Output" textline " " bitfld.long 0x00 19. " DIR1.19 ,Pin 1.19 Direction" "Input,Output" bitfld.long 0x00 18. " DIR1.18 ,Pin 1.18 Direction" "Input,Output" bitfld.long 0x00 17. " DIR1.17 ,Pin 1.17 Direction" "Input,Output" bitfld.long 0x00 16. " DIR1.16 ,Pin 1.16 Direction" "Input,Output" textline " " bitfld.long 0x00 15. " DIR1.15 ,Pin 1.15 Direction" "Input,Output" bitfld.long 0x00 14. " DIR1.14 ,Pin 1.14 Direction" "Input,Output" bitfld.long 0x00 10. " DIR1.10 ,Pin 1.10 Direction" "Input,Output" bitfld.long 0x00 9. " DIR1.9 ,Pin 1.9 Direction" "Input,Output" textline " " bitfld.long 0x00 8. " DIR1.8 ,Pin 1.8 Direction" "Input,Output" bitfld.long 0x00 4. " DIR1.4 ,Pin 1.4 Direction" "Input,Output" bitfld.long 0x00 1. " DIR1.1 ,Pin 1.1 Direction" "Input,Output" bitfld.long 0x00 0. " DIR1.0 ,Pin 1.0 Direction" "Input,Output" else bitfld.long 0x00 31. " DIR1.31 ,Pin 1.31 Direction" "Input,Output" bitfld.long 0x00 30. " DIR1.30 ,Pin 1.30 Direction" "Input,Output" bitfld.long 0x00 29. " DIR1.29 ,Pin 1.29 Direction" "Input,Output" bitfld.long 0x00 28. " DIR1.28 ,Pin 1.28 Direction" "Input,Output" textline " " bitfld.long 0x00 27. " DIR1.27 ,Pin 1.27 Direction" "Input,Output" bitfld.long 0x00 26. " DIR1.26 ,Pin 1.26 Direction" "Input,Output" bitfld.long 0x00 25. " DIR1.25 ,Pin 1.25 Direction" "Input,Output" bitfld.long 0x00 24. " DIR1.24 ,Pin 1.24 Direction" "Input,Output" textline " " bitfld.long 0x00 23. " DIR1.23 ,Pin 1.23 Direction" "Input,Output" bitfld.long 0x00 22. " DIR1.22 ,Pin 1.22 Direction" "Input,Output" bitfld.long 0x00 21. " DIR1.21 ,Pin 1.21 Direction" "Input,Output" bitfld.long 0x00 20. " DIR1.20 ,Pin 1.20 Direction" "Input,Output" textline " " bitfld.long 0x00 19. " DIR1.19 ,Pin 1.19 Direction" "Input,Output" bitfld.long 0x00 18. " DIR1.18 ,Pin 1.18 Direction" "Input,Output" bitfld.long 0x00 17. " DIR1.17 ,Pin 1.17 Direction" "Input,Output" bitfld.long 0x00 16. " DIR1.16 ,Pin 1.16 Direction" "Input,Output" textline " " bitfld.long 0x00 15. " DIR1.15 ,Pin 1.15 Direction" "Input,Output" bitfld.long 0x00 14. " DIR1.14 ,Pin 1.14 Direction" "Input,Output" bitfld.long 0x00 10. " DIR1.10 ,Pin 1.10 Direction" "Input,Output" bitfld.long 0x00 9. " DIR1.9 ,Pin 1.9 Direction" "Input,Output" textline " " bitfld.long 0x00 8. " DIR1.8 ,Pin 1.8 Direction" "Input,Output" bitfld.long 0x00 4. " DIR1.4 ,Pin 1.4 Direction" "Input,Output" bitfld.long 0x00 1. " DIR1.1 ,Pin 1.1 Direction" "Input,Output" bitfld.long 0x00 0. " DIR1.0 ,Pin 1.0 Direction" "Input,Output" endif group.long 0x30++0x3 line.long 0x00 "FIO1MASK,Fast GPIO 1 Port Mask Control Register" sif (cpuis("LPC176*")) bitfld.long 0x00 31. " MASK1.31 ,Pin 1.31 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Not masked,Masked" bitfld.long 0x00 30. " MASK1.30 ,Pin 1.30 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Not masked,Masked" bitfld.long 0x00 29. " MASK1.29 ,Pin 1.29 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Not masked,Masked" bitfld.long 0x00 28. " MASK1.28 ,Pin 1.28 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Not masked,Masked" textline " " bitfld.long 0x00 27. " MASK1.27 ,Pin 1.27 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Not masked,Masked" bitfld.long 0x00 26. " MASK1.26 ,Pin 1.26 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Not masked,Masked" bitfld.long 0x00 25. " MASK1.25 ,Pin 1.25 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Not masked,Masked" bitfld.long 0x00 24. " MASK1.24 ,Pin 1.24 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Not masked,Masked" textline " " bitfld.long 0x00 23. " MASK1.23 ,Pin 1.23 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Not masked,Masked" bitfld.long 0x00 22. " MASK1.22 ,Pin 1.22 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Not masked,Masked" bitfld.long 0x00 21. " MASK1.21 ,Pin 1.21 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Not masked,Masked" bitfld.long 0x00 20. " MASK1.20 ,Pin 1.20 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Not masked,Masked" textline " " bitfld.long 0x00 19. " MASK1.19 ,Pin 1.19 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Not masked,Masked" bitfld.long 0x00 18. " MASK1.18 ,Pin 1.18 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Not masked,Masked" bitfld.long 0x00 17. " MASK1.17 ,Pin 1.17 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Not masked,Masked" bitfld.long 0x00 16. " MASK1.16 ,Pin 1.16 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Not masked,Masked" textline " " bitfld.long 0x00 15. " MASK1.15 ,Pin 1.15 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Not masked,Masked" bitfld.long 0x00 14. " MASK1.14 ,Pin 1.14 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Not masked,Masked" bitfld.long 0x00 10. " MASK1.10 ,Pin 1.10 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Not masked,Masked" bitfld.long 0x00 9. " MASK1.9 ,Pin 1.9 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Not masked,Masked" textline " " bitfld.long 0x00 8. " MASK1.8 ,Pin 1.8 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Not masked,Masked" bitfld.long 0x00 4. " MASK1.4 ,Pin 1.4 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Not masked,Masked" bitfld.long 0x00 1. " MASK1.1 ,Pin 1.1 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Not masked,Masked" bitfld.long 0x00 0. " MASK1.0 ,Pin 1.0 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Not masked,Masked" else bitfld.long 0x00 31. " MASK1.31 ,Pin 1.31 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Not masked,Masked" bitfld.long 0x00 30. " MASK1.30 ,Pin 1.30 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Not masked,Masked" bitfld.long 0x00 29. " MASK1.29 ,Pin 1.29 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Not masked,Masked" bitfld.long 0x00 28. " MASK1.28 ,Pin 1.28 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Not masked,Masked" textline " " bitfld.long 0x00 27. " MASK1.27 ,Pin 1.27 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Not masked,Masked" bitfld.long 0x00 26. " MASK1.26 ,Pin 1.26 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Not masked,Masked" bitfld.long 0x00 25. " MASK1.25 ,Pin 1.25 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Not masked,Masked" bitfld.long 0x00 24. " MASK1.24 ,Pin 1.24 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Not masked,Masked" textline " " bitfld.long 0x00 23. " MASK1.23 ,Pin 1.23 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Not masked,Masked" bitfld.long 0x00 22. " MASK1.22 ,Pin 1.22 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Not masked,Masked" bitfld.long 0x00 21. " MASK1.21 ,Pin 1.21 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Not masked,Masked" bitfld.long 0x00 20. " MASK1.20 ,Pin 1.20 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Not masked,Masked" textline " " bitfld.long 0x00 19. " MASK1.19 ,Pin 1.19 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Not masked,Masked" bitfld.long 0x00 18. " MASK1.18 ,Pin 1.18 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Not masked,Masked" bitfld.long 0x00 17. " MASK1.17 ,Pin 1.17 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Not masked,Masked" bitfld.long 0x00 16. " MASK1.16 ,Pin 1.16 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Not masked,Masked" textline " " bitfld.long 0x00 15. " MASK1.15 ,Pin 1.15 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Not masked,Masked" bitfld.long 0x00 14. " MASK1.14 ,Pin 1.14 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Not masked,Masked" bitfld.long 0x00 10. " MASK1.10 ,Pin 1.10 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Not masked,Masked" bitfld.long 0x00 9. " MASK1.9 ,Pin 1.9 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Not masked,Masked" textline " " bitfld.long 0x00 8. " MASK1.8 ,Pin 1.8 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Not masked,Masked" bitfld.long 0x00 4. " MASK1.4 ,Pin 1.4 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Not masked,Masked" bitfld.long 0x00 1. " MASK1.1 ,Pin 1.1 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Not masked,Masked" bitfld.long 0x00 0. " MASK1.0 ,Pin 1.0 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Not masked,Masked" endif group.long 0x34++0x03 line.long 0x00 "FIO1PIN,Fast GPIO Port 1 Pin Value Register" sif (cpuis("LPC176*")) bitfld.long 0x00 31. " PIN1.31 ,Pin 1.31 Value" "Low,High" bitfld.long 0x00 30. " PIN1.30 ,Pin 1.30 Value" "Low,High" bitfld.long 0x00 29. " PIN1.29 ,Pin 1.29 Value" "Low,High" bitfld.long 0x00 28. " PIN1.28 ,Pin 1.28 Value" "Low,High" textline " " bitfld.long 0x00 27. " PIN1.27 ,Pin 1.27 Value" "Low,High" bitfld.long 0x00 26. " PIN1.26 ,Pin 1.26 Value" "Low,High" bitfld.long 0x00 25. " PIN1.25 ,Pin 1.25 Value" "Low,High" bitfld.long 0x00 24. " PIN1.24 ,Pin 1.24 Value" "Low,High" textline " " bitfld.long 0x00 23. " PIN1.23 ,Pin 1.23 Value" "Low,High" bitfld.long 0x00 22. " PIN1.22 ,Pin 1.22 Value" "Low,High" bitfld.long 0x00 21. " PIN1.21 ,Pin 1.21 Value" "Low,High" bitfld.long 0x00 20. " PIN1.20 ,Pin 1.20 Value" "Low,High" textline " " bitfld.long 0x00 19. " PIN1.19 ,Pin 1.19 Value" "Low,High" bitfld.long 0x00 18. " PIN1.18 ,Pin 1.18 Value" "Low,High" bitfld.long 0x00 17. " PIN1.17 ,Pin 1.17 Value" "Low,High" bitfld.long 0x00 16. " PIN1.16 ,Pin 1.16 Value" "Low,High" textline " " bitfld.long 0x00 15. " PIN1.15 ,Pin 1.15 Value" "Low,High" bitfld.long 0x00 11. " PIN1.11 ,Pin 1.21 Value" "Low,High" bitfld.long 0x00 10. " PIN1.10 ,Pin 1.10 Value" "Low,High" bitfld.long 0x00 9. " PIN1.9 ,Pin 1.9 Value" "Low,High" textline " " bitfld.long 0x00 8. " PIN1.8 ,Pin 1.8 Value" "Low,High" bitfld.long 0x00 7. " PIN1.7 ,Pin 1.7 Value" "Low,High" bitfld.long 0x00 6. " PIN1.6 ,Pin 1.6 Value" "Low,High" bitfld.long 0x00 5. " PIN1.5 ,Pin 1.5 Value" "Low,High" textline " " bitfld.long 0x00 4. " PIN1.4 ,Pin 1.5 Value" "Low,High" bitfld.long 0x00 3. " PIN1.3 ,Pin 1.3 Value" "Low,High" bitfld.long 0x00 2. " PIN1.2 ,Pin 1.2 Value" "Low,High" bitfld.long 0x00 1. " PIN1.1 ,Pin 1.1 Value" "Low,High" textline " " bitfld.long 0x00 0. " PIN1.0 ,Pin 1.0 Value" "Low,High" else bitfld.long 0x00 31. " PIN1.31 ,Pin 1.31 Value" "Low,High" bitfld.long 0x00 30. " PIN1.30 ,Pin 1.30 Value" "Low,High" bitfld.long 0x00 29. " PIN1.29 ,Pin 1.29 Value" "Low,High" bitfld.long 0x00 26. " PIN1.26 ,Pin 1.26 Value" "Low,High" textline " " bitfld.long 0x00 25. " PIN1.25 ,Pin 1.25 Value" "Low,High" bitfld.long 0x00 22. " PIN1.22 ,Pin 1.22 Value" "Low,High" bitfld.long 0x00 18. " PIN1.18 ,Pin 1.18 Value" "Low,High" bitfld.long 0x00 17. " PIN1.17 ,Pin 1.17 Value" "Low,High" textline " " bitfld.long 0x00 16. " PIN1.16 ,Pin 1.16 Value" "Low,High" bitfld.long 0x00 15. " PIN1.15 ,Pin 1.15 Value" "Low,High" bitfld.long 0x00 11. " PIN1.11 ,Pin 1.21 Value" "Low,High" bitfld.long 0x00 10. " PIN1.10 ,Pin 1.10 Value" "Low,High" textline " " bitfld.long 0x00 9. " PIN1.9 ,Pin 1.9 Value" "Low,High" bitfld.long 0x00 8. " PIN1.8 ,Pin 1.8 Value" "Low,High" bitfld.long 0x00 7. " PIN1.7 ,Pin 1.7 Value" "Low,High" bitfld.long 0x00 6. " PIN1.6 ,Pin 1.6 Value" "Low,High" textline " " bitfld.long 0x00 3. " PIN1.3 ,Pin 1.3 Value" "Low,High" bitfld.long 0x00 2. " PIN1.2 ,Pin 1.2 Value" "Low,High" bitfld.long 0x00 1. " PIN1.1 ,Pin 1.1 Value" "Low,High" bitfld.long 0x00 0. " PIN1.0 ,Pin 1.0 Value" "Low,High" endif group.long 0x38++0x03 line.long 0x00 "FIO1SET,Fast GPIO Port 1 Pin Set Register" sif (cpuis("LPC176*")) bitfld.long 0x00 31. " PIN1.31 ,Pin 1.31 Set" "Not set,Set" bitfld.long 0x00 30. " PIN1.30 ,Pin 1.30 Set" "Not set,Set" bitfld.long 0x00 29. " PIN1.29 ,Pin 1.29 Set" "Not set,Set" bitfld.long 0x00 28. " PIN1.28 ,Pin 1.28 Set" "Not set,Set" textline " " bitfld.long 0x00 27. " PIN1.27 ,Pin 1.27 Set" "Not set,Set" bitfld.long 0x00 26. " PIN1.26 ,Pin 1.26 Set" "Not set,Set" bitfld.long 0x00 25. " PIN1.25 ,Pin 1.25 Set" "Not set,Set" bitfld.long 0x00 24. " PIN1.24 ,Pin 1.24 Set" "Not set,Set" textline " " bitfld.long 0x00 23. " PIN1.23 ,Pin 1.23 Set" "Not set,Set" bitfld.long 0x00 22. " PIN1.22 ,Pin 1.22 Set" "Not set,Set" bitfld.long 0x00 21. " PIN1.21 ,Pin 1.21 Set" "Not set,Set" bitfld.long 0x00 20. " PIN1.20 ,Pin 1.20 Set" "Not set,Set" textline " " bitfld.long 0x00 19. " PIN1.19 ,Pin 1.19 Set" "Not set,Set" bitfld.long 0x00 18. " PIN1.18 ,Pin 1.18 Set" "Not set,Set" bitfld.long 0x00 17. " PIN1.17 ,Pin 1.17 Set" "Not set,Set" bitfld.long 0x00 16. " PIN1.16 ,Pin 1.16 Set" "Not set,Set" textline " " bitfld.long 0x00 15. " PIN1.15 ,Pin 1.15 Set" "Not set,Set" bitfld.long 0x00 11. " PIN1.11 ,Pin 1.21 Set" "Not set,Set" bitfld.long 0x00 10. " PIN1.10 ,Pin 1.10 Set" "Not set,Set" bitfld.long 0x00 9. " PIN1.9 ,Pin 1.9 Set" "Not set,Set" textline " " bitfld.long 0x00 8. " PIN1.8 ,Pin 1.8 Set" "Not set,Set" bitfld.long 0x00 7. " PIN1.7 ,Pin 1.7 Set" "Not set,Set" bitfld.long 0x00 6. " PIN1.6 ,Pin 1.6 Set" "Not set,Set" bitfld.long 0x00 5. " PIN1.5 ,Pin 1.5 Set" "Not set,Set" textline " " bitfld.long 0x00 4. " PIN1.4 ,Pin 1.5 Set" "Not set,Set" bitfld.long 0x00 3. " PIN1.3 ,Pin 1.3 Set" "Not set,Set" bitfld.long 0x00 2. " PIN1.2 ,Pin 1.2 Set" "Not set,Set" bitfld.long 0x00 1. " PIN1.1 ,Pin 1.1 Set" "Not set,Set" textline " " bitfld.long 0x00 0. " PIN1.0 ,Pin 1.0 Set" "Not set,Set" else bitfld.long 0x00 31. " PIN1.31 ,Pin 1.31 Set" "Not set,Set" bitfld.long 0x00 30. " PIN1.30 ,Pin 1.30 Set" "Not set,Set" bitfld.long 0x00 29. " PIN1.29 ,Pin 1.29 Set" "Not set,Set" bitfld.long 0x00 26. " PIN1.26 ,Pin 1.26 Set" "Not set,Set" textline " " bitfld.long 0x00 25. " PIN1.25 ,Pin 1.25 Set" "Not set,Set" bitfld.long 0x00 22. " PIN1.22 ,Pin 1.22 Set" "Not set,Set" bitfld.long 0x00 18. " PIN1.18 ,Pin 1.18 Set" "Not set,Set" bitfld.long 0x00 17. " PIN1.17 ,Pin 1.17 Set" "Not set,Set" textline " " bitfld.long 0x00 16. " PIN1.16 ,Pin 1.16 Set" "Not set,Set" bitfld.long 0x00 15. " PIN1.15 ,Pin 1.15 Set" "Not set,Set" bitfld.long 0x00 11. " PIN1.11 ,Pin 1.21 Set" "Not set,Set" bitfld.long 0x00 10. " PIN1.10 ,Pin 1.10 Set" "Not set,Set" textline " " bitfld.long 0x00 9. " PIN1.9 ,Pin 1.9 Set" "Not set,Set" bitfld.long 0x00 8. " PIN1.8 ,Pin 1.8 Set" "Not set,Set" bitfld.long 0x00 7. " PIN1.7 ,Pin 1.7 Set" "Not set,Set" bitfld.long 0x00 6. " PIN1.6 ,Pin 1.6 Set" "Not set,Set" textline " " bitfld.long 0x00 3. " PIN1.3 ,Pin 1.3 Set" "Not set,Set" bitfld.long 0x00 2. " PIN1.2 ,Pin 1.2 Set" "Not set,Set" bitfld.long 0x00 1. " PIN1.1 ,Pin 1.1 Set" "Not set,Set" bitfld.long 0x00 0. " PIN1.0 ,Pin 1.0 Set" "Not set,Set" endif wgroup.long 0x3C++0x03 line.long 0x00 "FIO1CLR,Fast GPIO Port 1 Pin Clear Register" sif (cpuis("LPC176*")) bitfld.long 0x00 31. " PIN1.31 ,Pin 1.31 Clear" "No effect,Clear" bitfld.long 0x00 30. " PIN1.30 ,Pin 1.30 Clear" "No effect,Clear" bitfld.long 0x00 29. " PIN1.29 ,Pin 1.29 Clear" "No effect,Clear" bitfld.long 0x00 28. " PIN1.28 ,Pin 1.28 Clear" "No effect,Clear" textline " " bitfld.long 0x00 27. " PIN1.27 ,Pin 1.27 Clear" "No effect,Clear" bitfld.long 0x00 26. " PIN1.26 ,Pin 1.26 Clear" "No effect,Clear" bitfld.long 0x00 25. " PIN1.25 ,Pin 1.25 Clear" "No effect,Clear" bitfld.long 0x00 24. " PIN1.24 ,Pin 1.24 Clear" "No effect,Clear" textline " " bitfld.long 0x00 23. " PIN1.23 ,Pin 1.23 Clear" "No effect,Clear" bitfld.long 0x00 22. " PIN1.22 ,Pin 1.22 Clear" "No effect,Clear" bitfld.long 0x00 21. " PIN1.21 ,Pin 1.21 Clear" "No effect,Clear" bitfld.long 0x00 20. " PIN1.20 ,Pin 1.20 Clear" "No effect,Clear" textline " " bitfld.long 0x00 19. " PIN1.19 ,Pin 1.19 Clear" "No effect,Clear" bitfld.long 0x00 18. " PIN1.18 ,Pin 1.18 Clear" "No effect,Clear" bitfld.long 0x00 17. " PIN1.17 ,Pin 1.17 Clear" "No effect,Clear" bitfld.long 0x00 16. " PIN1.16 ,Pin 1.16 Clear" "No effect,Clear" textline " " bitfld.long 0x00 15. " PIN1.15 ,Pin 1.15 Clear" "No effect,Clear" bitfld.long 0x00 11. " PIN1.11 ,Pin 1.21 Clear" "No effect,Clear" bitfld.long 0x00 10. " PIN1.10 ,Pin 1.10 Clear" "No effect,Clear" bitfld.long 0x00 9. " PIN1.9 ,Pin 1.9 Clear" "No effect,Clear" textline " " bitfld.long 0x00 8. " PIN1.8 ,Pin 1.8 Clear" "No effect,Clear" bitfld.long 0x00 7. " PIN1.7 ,Pin 1.7 Clear" "No effect,Clear" bitfld.long 0x00 6. " PIN1.6 ,Pin 1.6 Clear" "No effect,Clear" bitfld.long 0x00 5. " PIN1.5 ,Pin 1.5 Clear" "No effect,Clear" textline " " bitfld.long 0x00 4. " PIN1.4 ,Pin 1.5 Clear" "No effect,Clear" bitfld.long 0x00 3. " PIN1.3 ,Pin 1.3 Clear" "No effect,Clear" bitfld.long 0x00 2. " PIN1.2 ,Pin 1.2 Clear" "No effect,Clear" bitfld.long 0x00 1. " PIN1.1 ,Pin 1.1 Clear" "No effect,Clear" textline " " bitfld.long 0x00 0. " PIN1.0 ,Pin 1.0 Clear" "No effect,Clear" else bitfld.long 0x00 31. " PIN1.31 ,Pin 1.31 Clear" "No effect,Clear" bitfld.long 0x00 30. " PIN1.30 ,Pin 1.30 Clear" "No effect,Clear" bitfld.long 0x00 29. " PIN1.29 ,Pin 1.29 Clear" "No effect,Clear" bitfld.long 0x00 26. " PIN1.26 ,Pin 1.26 Clear" "No effect,Clear" textline " " bitfld.long 0x00 25. " PIN1.25 ,Pin 1.25 Clear" "No effect,Clear" bitfld.long 0x00 22. " PIN1.22 ,Pin 1.22 Clear" "No effect,Clear" bitfld.long 0x00 18. " PIN1.18 ,Pin 1.18 Clear" "No effect,Clear" bitfld.long 0x00 17. " PIN1.17 ,Pin 1.17 Clear" "No effect,Clear" textline " " bitfld.long 0x00 16. " PIN1.16 ,Pin 1.16 Clear" "No effect,Clear" bitfld.long 0x00 15. " PIN1.15 ,Pin 1.15 Clear" "No effect,Clear" bitfld.long 0x00 11. " PIN1.11 ,Pin 1.21 Clear" "No effect,Clear" bitfld.long 0x00 10. " PIN1.10 ,Pin 1.10 Clear" "No effect,Clear" textline " " bitfld.long 0x00 9. " PIN1.9 ,Pin 1.9 Clear" "No effect,Clear" bitfld.long 0x00 8. " PIN1.8 ,Pin 1.8 Clear" "No effect,Clear" bitfld.long 0x00 7. " PIN1.7 ,Pin 1.7 Clear" "No effect,Clear" bitfld.long 0x00 6. " PIN1.6 ,Pin 1.6 Clear" "No effect,Clear" textline " " bitfld.long 0x00 3. " PIN1.3 ,Pin 1.3 Clear" "No effect,Clear" bitfld.long 0x00 2. " PIN1.2 ,Pin 1.2 Clear" "No effect,Clear" bitfld.long 0x00 1. " PIN1.1 ,Pin 1.1 Clear" "No effect,Clear" bitfld.long 0x00 0. " PIN1.0 ,Pin 1.0 Clear" "No effect,Clear" endif tree.end tree "Port 2" group.long 0x40++0x03 "Local Bus" line.long 0x00 "FIO2DIR,Fast GPIO 2 Port Direction Control Register" sif cpuis("LPC176*") bitfld.long 0x00 13. " DIR2.13 ,Pin 2.13 Direction" "Input,Output" bitfld.long 0x00 12. " DIR2.12 ,Pin 2.12 Direction" "Input,Output" bitfld.long 0x00 11. " DIR2.11 ,Pin 2.11 Direction" "Input,Output" bitfld.long 0x00 10. " DIR2.10 ,Pin 2.10 Direction" "Input,Output" textline " " bitfld.long 0x00 9. " DIR2.9 ,Pin 2.9 Direction" "Input,Output" bitfld.long 0x00 8. " DIR2.8 ,Pin 2.8 Direction" "Input,Output" bitfld.long 0x00 7. " DIR2.7 ,Pin 2.7 Direction" "Input,Output" bitfld.long 0x00 6. " DIR2.6 ,Pin 2.6 Direction" "Input,Output" textline " " bitfld.long 0x00 5. " DIR2.5 ,Pin 2.5 Direction" "Input,Output" bitfld.long 0x00 4. " DIR2.4 ,Pin 2.4 Direction" "Input,Output" bitfld.long 0x00 3. " DIR2.3 ,Pin 2.3 Direction" "Input,Output" bitfld.long 0x00 2. " DIR2.2 ,Pin 2.2 Direction" "Input,Output" textline " " bitfld.long 0x00 1. " DIR2.1 ,Pin 2.1 Direction" "Input,Output" bitfld.long 0x00 0. " DIR2.0 ,Pin 2.0 Direction" "Input,Output" else bitfld.long 0x00 13. " DIR2.13 ,Pin 2.13 Direction" "Input,Output" bitfld.long 0x00 12. " DIR2.12 ,Pin 2.12 Direction" "Input,Output" bitfld.long 0x00 11. " DIR2.11 ,Pin 2.11 Direction" "Input,Output" bitfld.long 0x00 10. " DIR2.10 ,Pin 2.10 Direction" "Input,Output" textline " " bitfld.long 0x00 9. " DIR2.9 ,Pin 2.9 Direction" "Input,Output" bitfld.long 0x00 8. " DIR2.8 ,Pin 2.8 Direction" "Input,Output" bitfld.long 0x00 7. " DIR2.7 ,Pin 2.7 Direction" "Input,Output" bitfld.long 0x00 6. " DIR2.6 ,Pin 2.6 Direction" "Input,Output" textline " " bitfld.long 0x00 3. " DIR2.3 ,Pin 2.3 Direction" "Input,Output" bitfld.long 0x00 2. " DIR2.2 ,Pin 2.2 Direction" "Input,Output" bitfld.long 0x00 1. " DIR2.1 ,Pin 2.1 Direction" "Input,Output" bitfld.long 0x00 0. " DIR2.0 ,Pin 2.0 Direction" "Input,Output" endif group.long 0x50++0x3 line.long 0x00 "FIO2MASK,Fast GPIO 2 Port Mask Control Register" sif cpuis("LPC176*") bitfld.long 0x00 13. " MASK2.13 ,Pin 2.13 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Not masked,Masked" bitfld.long 0x00 12. " MASK2.12 ,Pin 2.12 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Not masked,Masked" bitfld.long 0x00 11. " MASK2.11 ,Pin 2.11 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Not masked,Masked" bitfld.long 0x00 10. " MASK2.10 ,Pin 2.10 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Not masked,Masked" textline " " bitfld.long 0x00 9. " MASK2.9 ,Pin 2.9 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Not masked,Masked" bitfld.long 0x00 8. " MASK2.8 ,Pin 2.8 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Not masked,Masked" bitfld.long 0x00 7. " MASK2.7 ,Pin 2.7 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Not masked,Masked" bitfld.long 0x00 6. " MASK2.6 ,Pin 2.6 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Not masked,Masked" textline " " bitfld.long 0x00 5. " MASK2.5 ,Pin 2.5 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Not masked,Masked" bitfld.long 0x00 4. " MASK2.4 ,Pin 2.4 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Not masked,Masked" bitfld.long 0x00 3. " MASK2.3 ,Pin 2.3 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Not masked,Masked" bitfld.long 0x00 2. " MASK2.2 ,Pin 2.2 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Not masked,Masked" textline " " bitfld.long 0x00 1. " MASK2.1 ,Pin 2.1 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Not masked,Masked" bitfld.long 0x00 0. " MASK2.0 ,Pin 2.0 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Not masked,Masked" else bitfld.long 0x00 13. " MASK2.13 ,Pin 2.13 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Not masked,Masked" bitfld.long 0x00 12. " MASK2.12 ,Pin 2.12 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Not masked,Masked" bitfld.long 0x00 11. " MASK2.11 ,Pin 2.11 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Not masked,Masked" bitfld.long 0x00 10. " MASK2.10 ,Pin 2.10 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Not masked,Masked" textline " " bitfld.long 0x00 9. " MASK2.9 ,Pin 2.9 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Not masked,Masked" bitfld.long 0x00 8. " MASK2.8 ,Pin 2.8 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Not masked,Masked" bitfld.long 0x00 7. " MASK2.7 ,Pin 2.7 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Not masked,Masked" bitfld.long 0x00 6. " MASK2.6 ,Pin 2.6 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Not masked,Masked" textline " " bitfld.long 0x00 3. " MASK2.3 ,Pin 2.3 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Not masked,Masked" bitfld.long 0x00 2. " MASK2.2 ,Pin 2.2 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Not masked,Masked" bitfld.long 0x00 1. " MASK2.1 ,Pin 2.1 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Not masked,Masked" bitfld.long 0x00 0. " MASK2.0 ,Pin 2.0 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Not masked,Masked" endif group.long 0x54++0x03 line.long 0x00 "FIO2PIN,Fast GPIO Port 2 Pin Value Register" sif (cpuis("LPC176*")) bitfld.long 0x00 13. " PIN2.13 ,Pin 2.13 Value" "Low,High" bitfld.long 0x00 12. " PIN2.12 ,Pin 2.12 Value" "Low,High" bitfld.long 0x00 11. " PIN2.11 ,Pin 2.21 Value" "Low,High" bitfld.long 0x00 10. " PIN2.10 ,Pin 2.10 Value" "Low,High" textline " " bitfld.long 0x00 9. " PIN2.9 ,Pin 2.9 Value" "Low,High" bitfld.long 0x00 8. " PIN2.8 ,Pin 2.8 Value" "Low,High" bitfld.long 0x00 7. " PIN2.7 ,Pin 2.7 Value" "Low,High" bitfld.long 0x00 6. " PIN2.6 ,Pin 2.6 Value" "Low,High" textline " " bitfld.long 0x00 5. " PIN2.5 ,Pin 2.5 Value" "Low,High" bitfld.long 0x00 4. " PIN2.4 ,Pin 2.5 Value" "Low,High" bitfld.long 0x00 3. " PIN2.3 ,Pin 2.3 Value" "Low,High" bitfld.long 0x00 2. " PIN2.2 ,Pin 2.2 Value" "Low,High" textline " " bitfld.long 0x00 1. " PIN2.1 ,Pin 2.1 Value" "Low,High" bitfld.long 0x00 0. " PIN2.0 ,Pin 2.0 Value" "Low,High" else bitfld.long 0x00 13. " PIN2.13 ,Pin 2.13 Value" "Low,High" bitfld.long 0x00 12. " PIN2.12 ,Pin 2.12 Value" "Low,High" bitfld.long 0x00 11. " PIN2.11 ,Pin 2.21 Value" "Low,High" bitfld.long 0x00 10. " PIN2.10 ,Pin 2.10 Value" "Low,High" textline " " bitfld.long 0x00 9. " PIN2.9 ,Pin 2.9 Value" "Low,High" bitfld.long 0x00 8. " PIN2.8 ,Pin 2.8 Value" "Low,High" bitfld.long 0x00 7. " PIN2.7 ,Pin 2.7 Value" "Low,High" bitfld.long 0x00 6. " PIN2.6 ,Pin 2.6 Value" "Low,High" textline " " bitfld.long 0x00 3. " PIN2.3 ,Pin 2.3 Value" "Low,High" bitfld.long 0x00 2. " PIN2.2 ,Pin 2.2 Value" "Low,High" bitfld.long 0x00 1. " PIN2.1 ,Pin 2.1 Value" "Low,High" bitfld.long 0x00 0. " PIN2.0 ,Pin 2.0 Value" "Low,High" endif group.long 0x58++0x03 line.long 0x00 "FIO2SET,Fast GPIO Port 2 Pin Set Register" sif (cpuis("LPC176*")) bitfld.long 0x00 13. " PIN2.13 ,Pin 2.13 Set" "Not set,Set" bitfld.long 0x00 12. " PIN2.12 ,Pin 2.12 Set" "Not set,Set" bitfld.long 0x00 11. " PIN2.11 ,Pin 2.21 Set" "Not set,Set" bitfld.long 0x00 10. " PIN2.10 ,Pin 2.10 Set" "Not set,Set" textline " " bitfld.long 0x00 9. " PIN2.9 ,Pin 2.9 Set" "Not set,Set" bitfld.long 0x00 8. " PIN2.8 ,Pin 2.8 Set" "Not set,Set" bitfld.long 0x00 7. " PIN2.7 ,Pin 2.7 Set" "Not set,Set" bitfld.long 0x00 6. " PIN2.6 ,Pin 2.6 Set" "Not set,Set" textline " " bitfld.long 0x00 5. " PIN2.5 ,Pin 2.5 Set" "Not set,Set" bitfld.long 0x00 4. " PIN2.4 ,Pin 2.5 Set" "Not set,Set" bitfld.long 0x00 3. " PIN2.3 ,Pin 2.3 Set" "Not set,Set" bitfld.long 0x00 2. " PIN2.2 ,Pin 2.2 Set" "Not set,Set" textline " " bitfld.long 0x00 1. " PIN2.1 ,Pin 2.1 Set" "Not set,Set" bitfld.long 0x00 0. " PIN2.0 ,Pin 2.0 Set" "Not set,Set" else bitfld.long 0x00 13. " PIN2.13 ,Pin 2.13 Set" "Not set,Set" bitfld.long 0x00 12. " PIN2.12 ,Pin 2.12 Set" "Not set,Set" bitfld.long 0x00 11. " PIN2.11 ,Pin 2.21 Set" "Not set,Set" bitfld.long 0x00 10. " PIN2.10 ,Pin 2.10 Set" "Not set,Set" textline " " bitfld.long 0x00 9. " PIN2.9 ,Pin 2.9 Set" "Not set,Set" bitfld.long 0x00 8. " PIN2.8 ,Pin 2.8 Set" "Not set,Set" bitfld.long 0x00 7. " PIN2.7 ,Pin 2.7 Set" "Not set,Set" bitfld.long 0x00 6. " PIN2.6 ,Pin 2.6 Set" "Not set,Set" textline " " bitfld.long 0x00 3. " PIN2.3 ,Pin 2.3 Set" "Not set,Set" bitfld.long 0x00 2. " PIN2.2 ,Pin 2.2 Set" "Not set,Set" bitfld.long 0x00 1. " PIN2.1 ,Pin 2.1 Set" "Not set,Set" bitfld.long 0x00 0. " PIN2.0 ,Pin 2.0 Set" "Not set,Set" endif wgroup.long 0x5C++0x03 line.long 0x00 "FIO2CLR,Fast GPIO Port 2 Pin Clear Register" sif (cpuis("LPC176*")) bitfld.long 0x00 13. " PIN2.13 ,Pin 2.13 Clear" "No effect,Clear" bitfld.long 0x00 12. " PIN2.12 ,Pin 2.12 Clear" "No effect,Clear" bitfld.long 0x00 11. " PIN2.11 ,Pin 2.11 Clear" "No effect,Clear" bitfld.long 0x00 10. " PIN2.10 ,Pin 2.10 Clear" "No effect,Clear" textline " " bitfld.long 0x00 9. " PIN2.9 ,Pin 2.9 Clear" "No effect,Clear" bitfld.long 0x00 8. " PIN2.8 ,Pin 2.8 Clear" "No effect,Clear" bitfld.long 0x00 7. " PIN2.7 ,Pin 2.7 Clear" "No effect,Clear" bitfld.long 0x00 6. " PIN2.6 ,Pin 2.6 Clear" "No effect,Clear" textline " " bitfld.long 0x00 5. " PIN2.5 ,Pin 2.5 Clear" "No effect,Clear" bitfld.long 0x00 4. " PIN2.4 ,Pin 2.5 Clear" "No effect,Clear" bitfld.long 0x00 3. " PIN2.3 ,Pin 2.3 Clear" "No effect,Clear" bitfld.long 0x00 2. " PIN2.2 ,Pin 2.2 Clear" "No effect,Clear" textline " " bitfld.long 0x00 1. " PIN2.1 ,Pin 2.1 Clear" "No effect,Clear" bitfld.long 0x00 0. " PIN2.0 ,Pin 2.0 Clear" "No effect,Clear" else bitfld.long 0x00 13. " PIN2.13 ,Pin 2.13 Clear" "No effect,Clear" bitfld.long 0x00 12. " PIN2.12 ,Pin 2.12 Clear" "No effect,Clear" bitfld.long 0x00 11. " PIN2.11 ,Pin 2.11 Clear" "No effect,Clear" bitfld.long 0x00 10. " PIN2.10 ,Pin 2.10 Clear" "No effect,Clear" textline " " bitfld.long 0x00 9. " PIN2.9 ,Pin 2.9 Clear" "No effect,Clear" bitfld.long 0x00 8. " PIN2.8 ,Pin 2.8 Clear" "No effect,Clear" bitfld.long 0x00 7. " PIN2.7 ,Pin 2.7 Clear" "No effect,Clear" bitfld.long 0x00 6. " PIN2.6 ,Pin 2.6 Clear" "No effect,Clear" textline " " bitfld.long 0x00 3. " PIN2.3 ,Pin 2.3 Clear" "No effect,Clear" bitfld.long 0x00 2. " PIN2.2 ,Pin 2.2 Clear" "No effect,Clear" bitfld.long 0x00 1. " PIN2.1 ,Pin 2.1 Clear" "No effect,Clear" bitfld.long 0x00 0. " PIN2.0 ,Pin 2.0 Clear" "No effect,Clear" endif tree.end sif (cpuis("LPC176*")) tree "Port 3" group.long 0x60++0x03 "Local Bus" line.long 0x00 "FIO3DIR,Fast GPIO 3 Port Direction Control Register" bitfld.long 0x00 26. " DIR3.26 ,Pin 3.26 Direction" "Input,Output" bitfld.long 0x00 25. " DIR3.25 ,Pin 3.25 Direction" "Input,Output" group.long 0x70++0x3 line.long 0x00 "FIO3MASK,Fast GPIO 3 Port Mask Control Register" bitfld.long 0x00 26. " MASK3.26 ,Pin 3.26 Affected Writes to FIO3SET,FIO3CLR,FIO3PIN" "Not masked,Masked" bitfld.long 0x00 25. " MASK3.25 ,Pin 3.25 Affected Writes to FIO3SET,FIO3CLR,FIO3PIN" "Not masked,Masked" group.long 0x74++0x03 line.long 0x00 "FIO3PIN,Fast GPIO Port 3 Pin Value Register" bitfld.long 0x00 26. " PIN3.26 ,Pin 3.26 Value" "Low,High" bitfld.long 0x00 25. " PIN3.25 ,Pin 3.25 Value" "Low,High" group.long 0x78++0x03 line.long 0x00 "FIO3SET,Fast GPIO Port 3 Pin Set Register" bitfld.long 0x00 26. " PIN3.26 ,Pin 3.26 Set" "Not set,Set" bitfld.long 0x00 25. " PIN3.25 ,Pin 3.25 Set" "Not set,Set" wgroup.long 0x7C++0x03 line.long 0x00 "FIO3CLR,Fast GPIO Port 3 Pin Clear Register" bitfld.long 0x00 26. " PIN3.26 ,Pin 3.26 Clear" "No effect,Clear" bitfld.long 0x00 25. " PIN3.25 ,Pin 3.25 Clear" "No effect,Clear" tree.end endif tree "Port 4" group.long 0x80++0x03 "Local Bus" line.long 0x00 "FIO4DIR,Fast GPIO 4 Port Direction Control Register" bitfld.long 0x00 29. " DIR4.29 ,Pin 4.29 Direction" "Input,Output" bitfld.long 0x00 28. " DIR4.28 ,Pin 4.28 Direction" "Input,Output" group.long 0x90++0x3 line.long 0x00 "FIO4MASK,Fast GPIO 4 Port Mask Control Register" bitfld.long 0x00 29. " MASK4.29 ,Pin 4.29 Affected Writes to FIO4SET,FIO4CLR,FIO4PIN" "Not masked,Masked" bitfld.long 0x00 28. " MASK4.28 ,Pin 4.28 Affected Writes to FIO4SET,FIO4CLR,FIO4PIN" "Not masked,Masked" group.long 0x94++0x03 line.long 0x00 "FIO4PIN,Fast GPIO Port 4 Pin Value Register" bitfld.long 0x00 29. " PIN4.29 ,Pin 4.29 Value" "Low,High" bitfld.long 0x00 28. " PIN4.28 ,Pin 4.28 Value" "Low,High" group.long 0x98++0x03 line.long 0x00 "FIO4SET,Fast GPIO Port 4 Pin Set Register" bitfld.long 0x00 29. " PIN4.29 ,Pin 4.29 Set" "Not set,Set" bitfld.long 0x00 28. " PIN4.28 ,Pin 4.28 Set" "Not set,Set" wgroup.long 0x9C++0x03 line.long 0x00 "FIO4CLR,Fast GPIO Port 4 Pin Clear Register" bitfld.long 0x00 29. " PIN4.29 ,Pin 4.29 Clear" "No effect,Clear" bitfld.long 0x00 28. " PIN4.28 ,Pin 4.28 Clear" "No effect,Clear" tree.end base ad:0x40028000 width 13. tree "Interrupt Registers" tree "GPIO 0 interrupt registers" group.long 0x90++0x7 line.long 0x0 "IO0IntEnR,GPIO 0 Interrupt Enable for Rising edge register" sif (cpuis("LPC176*")) bitfld.long 0x0 30. " P0.30ER ,Enable Rising edge P0.30" "Disabled,Enabled" bitfld.long 0x0 29. " P0.29ER ,Enable Rising edge P0.29" "Disabled,Enabled" bitfld.long 0x0 28. " P0.28ER ,Enable Rising edge P0.28" "Disabled,Enabled" textline " " bitfld.long 0x0 27. " P0.27ER ,Enable Rising edge P0.27" "Disabled,Enabled" bitfld.long 0x0 26. " P0.26ER ,Enable Rising edge P0.26" "Disabled,Enabled" bitfld.long 0x0 25. " P0.25ER ,Enable Rising edge P0.25" "Disabled,Enabled" textline " " bitfld.long 0x0 24. " P0.24ER ,Enable Rising edge P0.24" "Disabled,Enabled" bitfld.long 0x0 23. " P0.23ER ,Enable Rising edge P0.23" "Disabled,Enabled" bitfld.long 0x0 22. " P0.22ER ,Enable Rising edge P0.22" "Disabled,Enabled" textline " " bitfld.long 0x0 21. " P0.21ER ,Enable Rising edge P0.21" "Disabled,Enabled" bitfld.long 0x0 20. " P0.20ER ,Enable Rising edge P0.20" "Disabled,Enabled" bitfld.long 0x0 19. " P0.19ER ,Enable Rising edge P0.19" "Disabled,Enabled" textline " " bitfld.long 0x0 18. " P0.18ER ,Enable Rising edge P0.18" "Disabled,Enabled" bitfld.long 0x0 17. " P0.17ER ,Enable Rising edge P0.17" "Disabled,Enabled" bitfld.long 0x0 16. " P0.16ER ,Enable Rising edge P0.16" "Disabled,Enabled" textline " " bitfld.long 0x0 15. " P0.15ER ,Enable Rising edge P0.15" "Disabled,Enabled" bitfld.long 0x0 11. " P0.11ER ,Enable Rising edge P0.11" "Disabled,Enabled" bitfld.long 0x0 10. " P0.10ER ,Enable Rising edge P0.10" "Disabled,Enabled" textline " " bitfld.long 0x0 9. " P0.9ER ,Enable Rising edge P0.9" "Disabled,Enabled" bitfld.long 0x0 8. " P0.8ER ,Enable Rising edge P0.8" "Disabled,Enabled" bitfld.long 0x0 7. " P0.7ER ,Enable Rising edge P0.7" "Disabled,Enabled" textline " " bitfld.long 0x0 6. " P0.6ER ,Enable Rising edge P0.6" "Disabled,Enabled" bitfld.long 0x0 5. " P0.5ER ,Enable Rising edge P0.5" "Disabled,Enabled" bitfld.long 0x0 4. " P0.4ER ,Enable Rising edge P0.4" "Disabled,Enabled" textline " " bitfld.long 0x0 3. " P0.3ER ,Enable Rising edge P0.3" "Disabled,Enabled" bitfld.long 0x0 2. " P0.2ER ,Enable Rising edge P0.2" "Disabled,Enabled" bitfld.long 0x0 1. " P0.1ER ,Enable Rising edge P0.1" "Disabled,Enabled" textline " " bitfld.long 0x0 0. " P0.0ER ,Enable Rising edge P0.0" "Disabled,Enabled" else bitfld.long 0x0 30. " P0.30ER ,Enable Rising edge P0.30" "Disabled,Enabled" bitfld.long 0x0 29. " P0.29ER ,Enable Rising edge P0.29" "Disabled,Enabled" bitfld.long 0x0 26. " P0.26ER ,Enable Rising edge P0.26" "Disabled,Enabled" textline " " bitfld.long 0x0 25. " P0.25ER ,Enable Rising edge P0.25" "Disabled,Enabled" bitfld.long 0x0 22. " P0.22ER ,Enable Rising edge P0.22" "Disabled,Enabled" bitfld.long 0x0 18. " P0.18ER ,Enable Rising edge P0.18" "Disabled,Enabled" textline " " bitfld.long 0x0 17. " P0.17ER ,Enable Rising edge P0.17" "Disabled,Enabled" bitfld.long 0x0 16. " P0.16ER ,Enable Rising edge P0.16" "Disabled,Enabled" bitfld.long 0x0 15. " P0.15ER ,Enable Rising edge P0.15" "Disabled,Enabled" textline " " bitfld.long 0x0 11. " P0.11ER ,Enable Rising edge P0.11" "Disabled,Enabled" bitfld.long 0x0 10. " P0.10ER ,Enable Rising edge P0.10" "Disabled,Enabled" bitfld.long 0x0 9. " P0.9ER ,Enable Rising edge P0.9" "Disabled,Enabled" textline " " bitfld.long 0x0 8. " P0.8ER ,Enable Rising edge P0.8" "Disabled,Enabled" bitfld.long 0x0 7. " P0.7ER ,Enable Rising edge P0.7" "Disabled,Enabled" bitfld.long 0x0 6. " P0.6ER ,Enable Rising edge P0.6" "Disabled,Enabled" textline " " bitfld.long 0x0 3. " P0.3ER ,Enable Rising edge P0.3" "Disabled,Enabled" bitfld.long 0x0 2. " P0.2ER ,Enable Rising edge P0.2" "Disabled,Enabled" bitfld.long 0x0 1. " P0.1ER ,Enable Rising edge P0.1" "Disabled,Enabled" textline " " bitfld.long 0x0 0. " P0.0ER ,Enable Rising edge P0.0" "Disabled,Enabled" endif line.long 0x4 "IO0IntEnF,GPIO 0 Interrupt Enable for Falling edge register" sif (cpuis("LPC176*")) bitfld.long 0x4 30. " P0.30EF ,Enable Falling edge P0.30" "Disabled,Enabled" bitfld.long 0x4 29. " P0.29EF ,Enable Falling edge P0.29" "Disabled,Enabled" bitfld.long 0x4 28. " P0.28EF ,Enable Falling edge P0.28" "Disabled,Enabled" textline " " bitfld.long 0x4 27. " P0.27EF ,Enable Falling edge P0.27" "Disabled,Enabled" bitfld.long 0x4 26. " P0.26EF ,Enable Falling edge P0.26" "Disabled,Enabled" bitfld.long 0x4 25. " P0.25EF ,Enable Falling edge P0.25" "Disabled,Enabled" textline " " bitfld.long 0x4 24. " P0.24EF ,Enable Falling edge P0.24" "Disabled,Enabled" bitfld.long 0x4 23. " P0.23EF ,Enable Falling edge P0.23" "Disabled,Enabled" bitfld.long 0x4 22. " P0.22EF ,Enable Falling edge P0.22" "Disabled,Enabled" textline " " bitfld.long 0x4 21. " P0.21EF ,Enable Falling edge P0.21" "Disabled,Enabled" bitfld.long 0x4 20. " P0.20EF ,Enable Falling edge P0.20" "Disabled,Enabled" bitfld.long 0x4 19. " P0.19EF ,Enable Falling edge P0.19" "Disabled,Enabled" textline " " bitfld.long 0x4 18. " P0.18EF ,Enable Falling edge P0.18" "Disabled,Enabled" bitfld.long 0x4 17. " P0.17EF ,Enable Falling edge P0.17" "Disabled,Enabled" bitfld.long 0x4 16. " P0.16EF ,Enable Falling edge P0.16" "Disabled,Enabled" textline " " bitfld.long 0x4 15. " P0.15EF ,Enable Falling edge P0.15" "Disabled,Enabled" bitfld.long 0x4 11. " P0.11EF ,Enable Falling edge P0.11" "Disabled,Enabled" bitfld.long 0x4 10. " P0.10EF ,Enable Falling edge P0.10" "Disabled,Enabled" textline " " bitfld.long 0x4 9. " P0.9EF ,Enable Falling edge P0.9" "Disabled,Enabled" bitfld.long 0x4 8. " P0.8EF ,Enable Falling edge P0.8" "Disabled,Enabled" bitfld.long 0x4 7. " P0.7EF ,Enable Falling edge P0.7" "Disabled,Enabled" textline " " bitfld.long 0x4 6. " P0.6EF ,Enable Falling edge P0.6" "Disabled,Enabled" bitfld.long 0x4 5. " P0.5EF ,Enable Falling edge P0.5" "Disabled,Enabled" bitfld.long 0x4 4. " P0.4EF ,Enable Falling edge P0.4" "Disabled,Enabled" textline " " bitfld.long 0x4 3. " P0.3EF ,Enable Falling edge P0.3" "Disabled,Enabled" bitfld.long 0x4 2. " P0.2EF ,Enable Falling edge P0.2" "Disabled,Enabled" bitfld.long 0x4 1. " P0.1EF ,Enable Falling edge P0.1" "Disabled,Enabled" textline " " bitfld.long 0x4 0. " P0.0EF ,Enable Falling edge P0.0" "Disabled,Enabled" else bitfld.long 0x4 30. " P0.30EF ,Enable Falling edge P0.30" "Disabled,Enabled" bitfld.long 0x4 29. " P0.29EF ,Enable Falling edge P0.29" "Disabled,Enabled" bitfld.long 0x4 26. " P0.26EF ,Enable Falling edge P0.26" "Disabled,Enabled" textline " " bitfld.long 0x4 25. " P0.25EF ,Enable Falling edge P0.25" "Disabled,Enabled" bitfld.long 0x4 22. " P0.22EF ,Enable Falling edge P0.22" "Disabled,Enabled" bitfld.long 0x4 18. " P0.18EF ,Enable Falling edge P0.18" "Disabled,Enabled" textline " " bitfld.long 0x4 17. " P0.17EF ,Enable Falling edge P0.17" "Disabled,Enabled" bitfld.long 0x4 16. " P0.16EF ,Enable Falling edge P0.16" "Disabled,Enabled" bitfld.long 0x4 15. " P0.15EF ,Enable Falling edge P0.15" "Disabled,Enabled" textline " " bitfld.long 0x4 11. " P0.11EF ,Enable Falling edge P0.11" "Disabled,Enabled" bitfld.long 0x4 10. " P0.10EF ,Enable Falling edge P0.10" "Disabled,Enabled" bitfld.long 0x4 9. " P0.9EF ,Enable Falling edge P0.9" "Disabled,Enabled" textline " " bitfld.long 0x4 8. " P0.8EF ,Enable Falling edge P0.8" "Disabled,Enabled" bitfld.long 0x4 7. " P0.7EF ,Enable Falling edge P0.7" "Disabled,Enabled" bitfld.long 0x4 6. " P0.6EF ,Enable Falling edge P0.6" "Disabled,Enabled" textline " " bitfld.long 0x4 3. " P0.3EF ,Enable Falling edge P0.3" "Disabled,Enabled" bitfld.long 0x4 2. " P0.2EF ,Enable Falling edge P0.2" "Disabled,Enabled" bitfld.long 0x4 1. " P0.1EF ,Enable Falling edge P0.1" "Disabled,Enabled" textline " " bitfld.long 0x4 0. " P0.0EF ,Enable Falling edge P0.0" "Disabled,Enabled" endif rgroup.long 0x84++0x7 line.long 0x0 "IO0IntStatR,GPIO 0 Interrupt Status for Rising edge register" sif (cpuis("LPC176*")) bitfld.long 0x0 30. " P0.30REI ,Rising Edge Interrupt status P0.30" "No interrupt,Interrupt" bitfld.long 0x0 29. " P0.29REI ,Rising Edge Interrupt status P0.29" "No interrupt,Interrupt" bitfld.long 0x0 28. " P0.28REI ,Rising Edge Interrupt status P0.28" "No interrupt,Interrupt" textline " " bitfld.long 0x0 27. " P0.27REI ,Rising Edge Interrupt status P0.27" "No interrupt,Interrupt" bitfld.long 0x0 26. " P0.26REI ,Rising Edge Interrupt status P0.26" "No interrupt,Interrupt" bitfld.long 0x0 25. " P0.25REI ,Rising Edge Interrupt status P0.25" "No interrupt,Interrupt" textline " " bitfld.long 0x0 24. " P0.24REI ,Rising Edge Interrupt status P0.24" "No interrupt,Interrupt" bitfld.long 0x0 23. " P0.23REI ,Rising Edge Interrupt status P0.23" "No interrupt,Interrupt" bitfld.long 0x0 22. " P0.22REI ,Rising Edge Interrupt status P0.22" "No interrupt,Interrupt" textline " " bitfld.long 0x0 21. " P0.21REI ,Rising Edge Interrupt status P0.21" "No interrupt,Interrupt" bitfld.long 0x0 20. " P0.20REI ,Rising Edge Interrupt status P0.20" "No interrupt,Interrupt" bitfld.long 0x0 19. " P0.19REI ,Rising Edge Interrupt status P0.19" "No interrupt,Interrupt" textline " " bitfld.long 0x0 18. " P0.18REI ,Rising Edge Interrupt status P0.18" "No interrupt,Interrupt" bitfld.long 0x0 17. " P0.17REI ,Rising Edge Interrupt status P0.17" "No interrupt,Interrupt" bitfld.long 0x0 16. " P0.16REI ,Rising Edge Interrupt status P0.16" "No interrupt,Interrupt" textline " " bitfld.long 0x0 15. " P0.15REI ,Rising Edge Interrupt status P0.15" "No interrupt,Interrupt" bitfld.long 0x0 11. " P0.11REI ,Rising Edge Interrupt status P0.11" "No interrupt,Interrupt" bitfld.long 0x0 10. " P0.10REI ,Rising Edge Interrupt status P0.10" "No interrupt,Interrupt" textline " " bitfld.long 0x0 9. " P0.9REI ,Rising Edge Interrupt status P0.9" "No interrupt,Interrupt" bitfld.long 0x0 8. " P0.8REI ,Rising Edge Interrupt status P0.8" "No interrupt,Interrupt" bitfld.long 0x0 7. " P0.7REI ,Rising Edge Interrupt status P0.7" "No interrupt,Interrupt" textline " " bitfld.long 0x0 6. " P0.6REI ,Rising Edge Interrupt status P0.6" "No interrupt,Interrupt" bitfld.long 0x0 5. " P0.5REI ,Rising Edge Interrupt status P0.5" "No interrupt,Interrupt" bitfld.long 0x0 4. " P0.4REI ,Rising Edge Interrupt status P0.4" "No interrupt,Interrupt" textline " " bitfld.long 0x0 3. " P0.3REI ,Rising Edge Interrupt status P0.3" "No interrupt,Interrupt" bitfld.long 0x0 2. " P0.2REI ,Rising Edge Interrupt status P0.2" "No interrupt,Interrupt" bitfld.long 0x0 1. " P0.1REI ,Rising Edge Interrupt status P0.1" "No interrupt,Interrupt" textline " " bitfld.long 0x0 0. " P0.0REI ,Rising Edge Interrupt status P0.0" "No interrupt,Interrupt" else bitfld.long 0x0 30. " P0.30REI ,Rising Edge Interrupt status P0.30" "No interrupt,Interrupt" bitfld.long 0x0 29. " P0.29REI ,Rising Edge Interrupt status P0.29" "No interrupt,Interrupt" bitfld.long 0x0 26. " P0.26REI ,Rising Edge Interrupt status P0.26" "No interrupt,Interrupt" textline " " bitfld.long 0x0 25. " P0.25REI ,Rising Edge Interrupt status P0.25" "No interrupt,Interrupt" bitfld.long 0x0 22. " P0.22REI ,Rising Edge Interrupt status P0.22" "No interrupt,Interrupt" bitfld.long 0x0 18. " P0.18REI ,Rising Edge Interrupt status P0.18" "No interrupt,Interrupt" textline " " bitfld.long 0x0 17. " P0.17REI ,Rising Edge Interrupt status P0.17" "No interrupt,Interrupt" bitfld.long 0x0 16. " P0.16REI ,Rising Edge Interrupt status P0.16" "No interrupt,Interrupt" bitfld.long 0x0 15. " P0.15REI ,Rising Edge Interrupt status P0.15" "No interrupt,Interrupt" textline " " bitfld.long 0x0 11. " P0.11REI ,Rising Edge Interrupt status P0.11" "No interrupt,Interrupt" bitfld.long 0x0 10. " P0.10REI ,Rising Edge Interrupt status P0.10" "No interrupt,Interrupt" bitfld.long 0x0 9. " P0.9REI ,Rising Edge Interrupt status P0.9" "No interrupt,Interrupt" textline " " bitfld.long 0x0 8. " P0.8REI ,Rising Edge Interrupt status P0.8" "No interrupt,Interrupt" bitfld.long 0x0 7. " P0.7REI ,Rising Edge Interrupt status P0.7" "No interrupt,Interrupt" bitfld.long 0x0 6. " P0.6REI ,Rising Edge Interrupt status P0.6" "No interrupt,Interrupt" textline " " bitfld.long 0x0 3. " P0.3REI ,Rising Edge Interrupt status P0.3" "No interrupt,Interrupt" bitfld.long 0x0 2. " P0.2REI ,Rising Edge Interrupt status P0.2" "No interrupt,Interrupt" bitfld.long 0x0 1. " P0.1REI ,Rising Edge Interrupt status P0.1" "No interrupt,Interrupt" textline " " bitfld.long 0x0 0. " P0.0REI ,Rising Edge Interrupt status P0.0" "No interrupt,Interrupt" endif line.long 0x4 "IO0IntStatF,GPIO 0 Interrupt Status for Falling edge register" sif (cpuis("LPC176*")) bitfld.long 0x4 30. " P0.30FEI ,Falling Edge Interrupt status P0.30" "No interrupt,Interrupt" bitfld.long 0x4 29. " P0.29FEI ,Falling Edge Interrupt status P0.29" "No interrupt,Interrupt" bitfld.long 0x4 28. " P0.28FEI ,Falling Edge Interrupt status P0.28" "No interrupt,Interrupt" textline " " bitfld.long 0x4 27. " P0.27FEI ,Falling Edge Interrupt status P0.27" "No interrupt,Interrupt" bitfld.long 0x4 26. " P0.26FEI ,Falling Edge Interrupt status P0.26" "No interrupt,Interrupt" bitfld.long 0x4 25. " P0.25FEI ,Falling Edge Interrupt status P0.25" "No interrupt,Interrupt" textline " " bitfld.long 0x4 24. " P0.24FEI ,Falling Edge Interrupt status P0.24" "No interrupt,Interrupt" bitfld.long 0x4 23. " P0.23FEI ,Falling Edge Interrupt status P0.23" "No interrupt,Interrupt" bitfld.long 0x4 22. " P0.22FEI ,Falling Edge Interrupt status P0.22" "No interrupt,Interrupt" textline " " bitfld.long 0x4 21. " P0.21FEI ,Falling Edge Interrupt status P0.21" "No interrupt,Interrupt" bitfld.long 0x4 20. " P0.20FEI ,Falling Edge Interrupt status P0.20" "No interrupt,Interrupt" bitfld.long 0x4 19. " P0.19FEI ,Falling Edge Interrupt status P0.19" "No interrupt,Interrupt" textline " " bitfld.long 0x4 18. " P0.18FEI ,Falling Edge Interrupt status P0.18" "No interrupt,Interrupt" bitfld.long 0x4 17. " P0.17FEI ,Falling Edge Interrupt status P0.17" "No interrupt,Interrupt" bitfld.long 0x4 16. " P0.16FEI ,Falling Edge Interrupt status P0.16" "No interrupt,Interrupt" textline " " bitfld.long 0x4 15. " P0.15FEI ,Falling Edge Interrupt status P0.15" "No interrupt,Interrupt" bitfld.long 0x4 11. " P0.11FEI ,Falling Edge Interrupt status P0.11" "No interrupt,Interrupt" bitfld.long 0x4 10. " P0.10FEI ,Falling Edge Interrupt status P0.10" "No interrupt,Interrupt" textline " " bitfld.long 0x4 9. " P0.9FEI ,Falling Edge Interrupt status P0.9" "No interrupt,Interrupt" bitfld.long 0x4 8. " P0.8FEI ,Falling Edge Interrupt status P0.8" "No interrupt,Interrupt" bitfld.long 0x4 7. " P0.7FEI ,Falling Edge Interrupt status P0.7" "No interrupt,Interrupt" textline " " bitfld.long 0x4 6. " P0.6FEI ,Falling Edge Interrupt status P0.6" "No interrupt,Interrupt" bitfld.long 0x4 5. " P0.5FEI ,Falling Edge Interrupt status P0.5" "No interrupt,Interrupt" bitfld.long 0x4 4. " P0.4FEI ,Falling Edge Interrupt status P0.4" "No interrupt,Interrupt" textline " " bitfld.long 0x4 3. " P0.3FEI ,Falling Edge Interrupt status P0.3" "No interrupt,Interrupt" bitfld.long 0x4 2. " P0.2FEI ,Falling Edge Interrupt status P0.2" "No interrupt,Interrupt" bitfld.long 0x4 1. " P0.1FEI ,Falling Edge Interrupt status P0.1" "No interrupt,Interrupt" textline " " bitfld.long 0x4 0. " P0.0FEI ,Falling Edge Interrupt status P0.0" "No interrupt,Interrupt" else bitfld.long 0x4 30. " P0.30FEI ,Falling Edge Interrupt status P0.30" "No interrupt,Interrupt" bitfld.long 0x4 29. " P0.29FEI ,Falling Edge Interrupt status P0.29" "No interrupt,Interrupt" bitfld.long 0x4 26. " P0.26FEI ,Falling Edge Interrupt status P0.26" "No interrupt,Interrupt" textline " " bitfld.long 0x4 25. " P0.25FEI ,Falling Edge Interrupt status P0.25" "No interrupt,Interrupt" bitfld.long 0x4 22. " P0.22FEI ,Falling Edge Interrupt status P0.22" "No interrupt,Interrupt" bitfld.long 0x4 18. " P0.18FEI ,Falling Edge Interrupt status P0.18" "No interrupt,Interrupt" textline " " bitfld.long 0x4 17. " P0.17FEI ,Falling Edge Interrupt status P0.17" "No interrupt,Interrupt" bitfld.long 0x4 16. " P0.16FEI ,Falling Edge Interrupt status P0.16" "No interrupt,Interrupt" bitfld.long 0x4 15. " P0.15FEI ,Falling Edge Interrupt status P0.15" "No interrupt,Interrupt" textline " " bitfld.long 0x4 11. " P0.11FEI ,Falling Edge Interrupt status P0.11" "No interrupt,Interrupt" bitfld.long 0x4 10. " P0.10FEI ,Falling Edge Interrupt status P0.10" "No interrupt,Interrupt" bitfld.long 0x4 9. " P0.9FEI ,Falling Edge Interrupt status P0.9" "No interrupt,Interrupt" textline " " bitfld.long 0x4 8. " P0.8FEI ,Falling Edge Interrupt status P0.8" "No interrupt,Interrupt" bitfld.long 0x4 7. " P0.7FEI ,Falling Edge Interrupt status P0.7" "No interrupt,Interrupt" bitfld.long 0x4 6. " P0.6FEI ,Falling Edge Interrupt status P0.6" "No interrupt,Interrupt" textline " " bitfld.long 0x4 3. " P0.3FEI ,Falling Edge Interrupt status P0.3" "No interrupt,Interrupt" bitfld.long 0x4 2. " P0.2FEI ,Falling Edge Interrupt status P0.2" "No interrupt,Interrupt" bitfld.long 0x4 1. " P0.1FEI ,Falling Edge Interrupt status P0.1" "No interrupt,Interrupt" textline " " bitfld.long 0x4 0. " P0.0FEI ,Falling Edge Interrupt status P0.0" "No interrupt,Interrupt" endif wgroup.long 0x8C++0x3 line.long 0x0 "IO0IntClr,GPIO 0 Interrupt Clear register" sif (cpuis("LPC176*")) bitfld.long 0x0 30. " P0.30CI ,Clear GPIO port Interrupt P0.30" "No effect,Clear" bitfld.long 0x0 29. " P0.29CI ,Clear GPIO port Interrupt P0.29" "No effect,Clear" bitfld.long 0x0 28. " P0.28CI ,Clear GPIO port Interrupt P0.28" "No effect,Clear" textline " " bitfld.long 0x0 27. " P0.27CI ,Clear GPIO port Interrupt P0.27" "No effect,Clear" bitfld.long 0x0 26. " P0.26CI ,Clear GPIO port Interrupt P0.26" "No effect,Clear" bitfld.long 0x0 25. " P0.25CI ,Clear GPIO port Interrupt P0.25" "No effect,Clear" textline " " bitfld.long 0x0 24. " P0.24CI ,Clear GPIO port Interrupt P0.24" "No effect,Clear" bitfld.long 0x0 23. " P0.23CI ,Clear GPIO port Interrupt P0.23" "No effect,Clear" bitfld.long 0x0 22. " P0.22CI ,Clear GPIO port Interrupt P0.22" "No effect,Clear" textline " " bitfld.long 0x0 21. " P0.21CI ,Clear GPIO port Interrupt P0.21" "No effect,Clear" bitfld.long 0x0 20. " P0.20CI ,Clear GPIO port Interrupt P0.20" "No effect,Clear" bitfld.long 0x0 19. " P0.19CI ,Clear GPIO port Interrupt P0.19" "No effect,Clear" textline " " bitfld.long 0x0 18. " P0.18CI ,Clear GPIO port Interrupt P0.18" "No effect,Clear" bitfld.long 0x0 17. " P0.17CI ,Clear GPIO port Interrupt P0.17" "No effect,Clear" bitfld.long 0x0 16. " P0.16CI ,Clear GPIO port Interrupt P0.16" "No effect,Clear" textline " " bitfld.long 0x0 15. " P0.15CI ,Clear GPIO port Interrupt P0.15" "No effect,Clear" bitfld.long 0x0 11. " P0.11CI ,Clear GPIO port Interrupt P0.11" "No effect,Clear" bitfld.long 0x0 10. " P0.10CI ,Clear GPIO port Interrupt P0.10" "No effect,Clear" textline " " bitfld.long 0x0 9. " P0.9CI ,Clear GPIO port Interrupt P0.9" "No effect,Clear" bitfld.long 0x0 8. " P0.8CI ,Clear GPIO port Interrupt P0.8" "No effect,Clear" bitfld.long 0x0 7. " P0.7CI ,Clear GPIO port Interrupt P0.7" "No effect,Clear" textline " " bitfld.long 0x0 6. " P0.6CI ,Clear GPIO port Interrupt P0.6" "No effect,Clear" bitfld.long 0x0 5. " P0.5CI ,Clear GPIO port Interrupt P0.5" "No effect,Clear" bitfld.long 0x0 4. " P0.4CI ,Clear GPIO port Interrupt P0.4" "No effect,Clear" textline " " bitfld.long 0x0 3. " P0.3CI ,Clear GPIO port Interrupt P0.3" "No effect,Clear" bitfld.long 0x0 2. " P0.2CI ,Clear GPIO port Interrupt P0.2" "No effect,Clear" bitfld.long 0x0 1. " P0.1CI ,Clear GPIO port Interrupt P0.1" "No effect,Clear" textline " " bitfld.long 0x0 0. " P0.0CI ,Clear GPIO port Interrupt P0.0" "No effect,Clear" else bitfld.long 0x0 30. " P0.30CI ,Clear GPIO port Interrupt P0.30" "No effect,Clear" bitfld.long 0x0 29. " P0.29CI ,Clear GPIO port Interrupt P0.29" "No effect,Clear" bitfld.long 0x0 26. " P0.26CI ,Clear GPIO port Interrupt P0.26" "No effect,Clear" textline " " bitfld.long 0x0 25. " P0.25CI ,Clear GPIO port Interrupt P0.25" "No effect,Clear" bitfld.long 0x0 22. " P0.22CI ,Clear GPIO port Interrupt P0.22" "No effect,Clear" bitfld.long 0x0 18. " P0.18CI ,Clear GPIO port Interrupt P0.18" "No effect,Clear" textline " " bitfld.long 0x0 17. " P0.17CI ,Clear GPIO port Interrupt P0.17" "No effect,Clear" bitfld.long 0x0 16. " P0.16CI ,Clear GPIO port Interrupt P0.16" "No effect,Clear" bitfld.long 0x0 15. " P0.15CI ,Clear GPIO port Interrupt P0.15" "No effect,Clear" textline " " bitfld.long 0x0 11. " P0.11CI ,Clear GPIO port Interrupt P0.11" "No effect,Clear" bitfld.long 0x0 10. " P0.10CI ,Clear GPIO port Interrupt P0.10" "No effect,Clear" bitfld.long 0x0 9. " P0.9CI ,Clear GPIO port Interrupt P0.9" "No effect,Clear" textline " " bitfld.long 0x0 8. " P0.8CI ,Clear GPIO port Interrupt P0.8" "No effect,Clear" bitfld.long 0x0 7. " P0.7CI ,Clear GPIO port Interrupt P0.7" "No effect,Clear" bitfld.long 0x0 6. " P0.6CI ,Clear GPIO port Interrupt P0.6" "No effect,Clear" textline " " bitfld.long 0x0 5. " P0.5CI ,Clear GPIO port Interrupt P0.5" "No effect,Clear" bitfld.long 0x0 2. " P0.2CI ,Clear GPIO port Interrupt P0.2" "No effect,Clear" bitfld.long 0x0 1. " P0.1CI ,Clear GPIO port Interrupt P0.1" "No effect,Clear" textline " " bitfld.long 0x0 0. " P0.0CI ,Clear GPIO port Interrupt P0.0" "No effect,Clear" endif tree.end tree "GPIO 2 interrupt registers" group.long 0xB0++0x7 line.long 0x0 "IO2IntEnR,GPIO 2 Interrupt Enable for Rising edge register" sif (cpuis("LPC176*")) bitfld.long 0x0 13. " P2.13ER ,Enable Rising edge P2.13" "Disabled,Enabled" bitfld.long 0x0 12. " P2.12ER ,Enable Rising edge P2.12" "Disabled,Enabled" bitfld.long 0x0 11. " P2.11ER ,Enable Rising edge P2.11" "Disabled,Enabled" textline " " endif bitfld.long 0x0 10. " P2.10ER ,Enable Rising edge P2.10" "Disabled,Enabled" bitfld.long 0x0 9. " P2.9ER ,Enable Rising edge P2.9" "Disabled,Enabled" bitfld.long 0x0 8. " P2.8ER ,Enable Rising edge P2.8" "Disabled,Enabled" textline " " bitfld.long 0x0 7. " P2.7ER ,Enable Rising edge P2.7" "Disabled,Enabled" bitfld.long 0x0 6. " P2.6ER ,Enable Rising edge P2.6" "Disabled,Enabled" bitfld.long 0x0 5. " P2.5ER ,Enable Rising edge P2.5" "Disabled,Enabled" textline " " bitfld.long 0x0 4. " P2.4ER ,Enable Rising edge P2.4" "Disabled,Enabled" bitfld.long 0x0 3. " P2.3ER ,Enable Rising edge P2.3" "Disabled,Enabled" bitfld.long 0x0 2. " P2.2ER ,Enable Rising edge P2.2" "Disabled,Enabled" textline " " bitfld.long 0x0 1. " P2.1ER ,Enable Rising edge P2.1" "Disabled,Enabled" bitfld.long 0x0 0. " P2.0ER ,Enable Rising edge P2.0" "Disabled,Enabled" line.long 0x4 "IO2IntEnF,GPIO 2 Interrupt Enable for Falling edge register" sif (cpuis("LPC176*")) bitfld.long 0x4 13. " P2.13EF ,Enable Falling edge P2.13" "Disabled,Enabled" bitfld.long 0x4 12. " P2.12EF ,Enable Falling edge P2.12" "Disabled,Enabled" bitfld.long 0x4 11. " P2.11EF ,Enable Falling edge P2.11" "Disabled,Enabled" textline " " endif bitfld.long 0x4 10. " P2.10EF ,Enable Falling edge P2.10" "Disabled,Enabled" bitfld.long 0x4 9. " P2.9EF ,Enable Falling edge P2.9" "Disabled,Enabled" bitfld.long 0x4 8. " P2.8EF ,Enable Falling edge P2.8" "Disabled,Enabled" textline " " bitfld.long 0x4 7. " P2.7EF ,Enable Falling edge P2.7" "Disabled,Enabled" bitfld.long 0x4 6. " P2.6EF ,Enable Falling edge P2.6" "Disabled,Enabled" bitfld.long 0x4 5. " P2.5EF ,Enable Falling edge P2.5" "Disabled,Enabled" textline " " bitfld.long 0x4 4. " P2.4EF ,Enable Falling edge P2.4" "Disabled,Enabled" bitfld.long 0x4 3. " P2.3EF ,Enable Falling edge P2.3" "Disabled,Enabled" bitfld.long 0x4 2. " P2.2EF ,Enable Falling edge P2.2" "Disabled,Enabled" textline " " bitfld.long 0x4 1. " P2.1EF ,Enable Falling edge P2.1" "Disabled,Enabled" bitfld.long 0x4 0. " P2.0EF ,Enable Falling edge P2.0" "Disabled,Enabled" rgroup.long 0xA4++0x7 line.long 0x0 "IO2IntStatR,GPIO 2 Interrupt Status for Rising edge register" sif (cpuis("LPC176*")) bitfld.long 0x0 13. " P2.13REI ,Rising Edge Interrupt status P2.13" "No interrupt,Interrupt" bitfld.long 0x0 12. " P2.12REI ,Rising Edge Interrupt status P2.12" "No interrupt,Interrupt" bitfld.long 0x0 11. " P2.11REI ,Rising Edge Interrupt status P2.11" "No interrupt,Interrupt" textline " " endif bitfld.long 0x0 10. " P2.10REI ,Rising Edge Interrupt status P2.10" "No interrupt,Interrupt" bitfld.long 0x0 9. " P2.9REI ,Rising Edge Interrupt status P2.9" "No interrupt,Interrupt" bitfld.long 0x0 8. " P2.8REI ,Rising Edge Interrupt status P2.8" "No interrupt,Interrupt" textline " " bitfld.long 0x0 7. " P2.7REI ,Rising Edge Interrupt status P2.7" "No interrupt,Interrupt" bitfld.long 0x0 6. " P2.6REI ,Rising Edge Interrupt status P2.6" "No interrupt,Interrupt" bitfld.long 0x0 5. " P2.5REI ,Rising Edge Interrupt status P2.5" "No interrupt,Interrupt" textline " " bitfld.long 0x0 4. " P2.4REI ,Rising Edge Interrupt status P2.4" "No interrupt,Interrupt" bitfld.long 0x0 3. " P2.3REI ,Rising Edge Interrupt status P2.3" "No interrupt,Interrupt" bitfld.long 0x0 2. " P2.2REI ,Rising Edge Interrupt status P2.2" "No interrupt,Interrupt" textline " " bitfld.long 0x0 1. " P2.1REI ,Rising Edge Interrupt status P2.1" "No interrupt,Interrupt" bitfld.long 0x0 0. " P2.0REI ,Rising Edge Interrupt status P2.0" "No interrupt,Interrupt" line.long 0x4 "IO2IntStatF,GPIO 2 Interrupt Status for Falling edge register" sif (cpuis("LPC176*")) bitfld.long 0x4 13. " P2.13FEI ,Falling Edge Interrupt status P2.13" "No interrupt,Interrupt" bitfld.long 0x4 12. " P2.12FEI ,Falling Edge Interrupt status P2.12" "No interrupt,Interrupt" bitfld.long 0x4 11. " P2.11FEI ,Falling Edge Interrupt status P2.11" "No interrupt,Interrupt" textline " " endif bitfld.long 0x4 10. " P2.10FEI ,Falling Edge Interrupt status P2.10" "No interrupt,Interrupt" bitfld.long 0x4 9. " P2.9FEI ,Falling Edge Interrupt status P2.9" "No interrupt,Interrupt" bitfld.long 0x4 8. " P2.8FEI ,Falling Edge Interrupt status P2.8" "No interrupt,Interrupt" textline " " bitfld.long 0x4 7. " P2.7FEI ,Falling Edge Interrupt status P2.7" "No interrupt,Interrupt" bitfld.long 0x4 6. " P2.6FEI ,Falling Edge Interrupt status P2.6" "No interrupt,Interrupt" bitfld.long 0x4 5. " P2.5FEI ,Falling Edge Interrupt status P2.5" "No interrupt,Interrupt" textline " " bitfld.long 0x4 4. " P2.4FEI ,Falling Edge Interrupt status P2.4" "No interrupt,Interrupt" bitfld.long 0x4 3. " P2.3FEI ,Falling Edge Interrupt status P2.3" "No interrupt,Interrupt" bitfld.long 0x4 2. " P2.2FEI ,Falling Edge Interrupt status P2.2" "No interrupt,Interrupt" textline " " bitfld.long 0x4 1. " P2.1FEI ,Falling Edge Interrupt status P2.1" "No interrupt,Interrupt" bitfld.long 0x4 0. " P2.0FEI ,Falling Edge Interrupt status P2.0" "No interrupt,Interrupt" wgroup.long 0xAC++0x3 line.long 0x0 "IO2IntClr,GPIO 2 Interrupt Clear register" sif (cpuis("LPC176*")) bitfld.long 0x0 13. " P2.13CI ,Clear GPIO port Interrupt P2.13" "No effect,Clear" bitfld.long 0x0 12. " P2.12CI ,Clear GPIO port Interrupt P2.12" "No effect,Clear" bitfld.long 0x0 11. " P2.11CI ,Clear GPIO port Interrupt P2.11" "No effect,Clear" textline " " endif bitfld.long 0x0 10. " P2.10CI ,Clear GPIO port Interrupt P2.10" "No effect,Clear" bitfld.long 0x0 9. " P2.9CI ,Clear GPIO port Interrupt P2.9" "No effect,Clear" bitfld.long 0x0 8. " P2.8CI ,Clear GPIO port Interrupt P2.8" "No effect,Clear" textline " " bitfld.long 0x0 7. " P2.7CI ,Clear GPIO port Interrupt P2.7" "No effect,Clear" bitfld.long 0x0 6. " P2.6CI ,Clear GPIO port Interrupt P2.6" "No effect,Clear" bitfld.long 0x0 5. " P2.5CI ,Clear GPIO port Interrupt P2.5" "No effect,Clear" textline " " bitfld.long 0x0 4. " P2.4CI ,Clear GPIO port Interrupt P2.4" "No effect,Clear" bitfld.long 0x0 3. " P2.3CI ,Clear GPIO port Interrupt P2.3" "No effect,Clear" bitfld.long 0x0 2. " P2.2CI ,Clear GPIO port Interrupt P2.2" "No effect,Clear" textline " " bitfld.long 0x0 1. " P2.1CI ,Clear GPIO port Interrupt P2.1" "No effect,Clear" bitfld.long 0x0 0. " P2.0CI ,Clear GPIO port Interrupt P2.0" "No effect,Clear" tree.end tree "Overall Interrupt Status" rgroup.long 0x80++0x3 line.long 0x0 "IOIntStatus,GPIO overall Interrupt Status" bitfld.long 0x0 2. " P2Int ,PORT2 GPIO interrupt pending" "No interrupt,Interrupt" bitfld.long 0x0 0. " P0Int ,PORT0 GPIO interrupt pending" "No interrupt,Interrupt" tree.end tree.end width 0xB else tree "Port 0" base ad:0x20098000 width 14. group.long 0x0++0x03 line.long 0x00 "FIO0DIR,Fast GPIO port 0 Direction register" bitfld.long 0x00 31. " DIR0.31 ,Pin 0.31 Direction" "Input,Output" bitfld.long 0x00 30. " DIR0.30 ,Pin 0.30 Direction" "Input,Output" bitfld.long 0x00 29. " DIR0.29 ,Pin 0.29 Direction" "Input,Output" textline " " bitfld.long 0x00 28. " DIR0.28 ,Pin 0.28 Direction" "Input,Output" bitfld.long 0x00 27. " DIR0.27 ,Pin 0.27 Direction" "Input,Output" bitfld.long 0x00 26. " DIR0.26 ,Pin 0.26 Direction" "Input,Output" textline " " bitfld.long 0x00 25. " DIR0.25 ,Pin 0.25 Direction" "Input,Output" bitfld.long 0x00 24. " DIR0.24 ,Pin 0.24 Direction" "Input,Output" bitfld.long 0x00 23. " DIR0.23 ,Pin 0.23 Direction" "Input,Output" textline " " bitfld.long 0x00 22. " DIR0.22 ,Pin 0.22 Direction" "Input,Output" bitfld.long 0x00 21. " DIR0.21 ,Pin 0.21 Direction" "Input,Output" bitfld.long 0x00 20. " DIR0.20 ,Pin 0.20 Direction" "Input,Output" textline " " bitfld.long 0x00 19. " DIR0.19 ,Pin 0.19 Direction" "Input,Output" bitfld.long 0x00 18. " DIR0.18 ,Pin 0.18 Direction" "Input,Output" bitfld.long 0x00 17. " DIR0.17 ,Pin 0.17 Direction" "Input,Output" textline " " bitfld.long 0x00 16. " DIR0.16 ,Pin 0.16 Direction" "Input,Output" bitfld.long 0x00 15. " DIR0.15 ,Pin 0.15 Direction" "Input,Output" bitfld.long 0x00 14. " DIR0.14 ,Pin 0.14 Direction" "Input,Output" textline " " bitfld.long 0x00 13. " DIR0.13 ,Pin 0.13 Direction" "Input,Output" bitfld.long 0x00 12. " DIR0.12 ,Pin 0.12 Direction" "Input,Output" bitfld.long 0x00 11. " DIR0.11 ,Pin 0.11 Direction" "Input,Output" textline " " bitfld.long 0x00 10. " DIR0.10 ,Pin 0.10 Direction" "Input,Output" bitfld.long 0x00 9. " DIR0.9 ,Pin 0.9 Direction" "Input,Output" bitfld.long 0x00 8. " DIR0.8 ,Pin 0.8 Direction" "Input,Output" textline " " bitfld.long 0x00 7. " DIR0.7 ,Pin 0.7 Direction" "Input,Output" bitfld.long 0x00 6. " DIR0.6 ,Pin 0.6 Direction" "Input,Output" bitfld.long 0x00 5. " DIR0.5 ,Pin 0.5 Direction" "Input,Output" textline " " bitfld.long 0x00 4. " DIR0.4 ,Pin 0.5 Direction" "Input,Output" bitfld.long 0x00 3. " DIR0.3 ,Pin 0.3 Direction" "Input,Output" bitfld.long 0x00 2. " DIR0.2 ,Pin 0.2 Direction" "Input,Output" textline " " bitfld.long 0x00 1. " DIR0.1 ,Pin 0.1 Direction" "Input,Output" bitfld.long 0x00 0. " DIR0.0 ,Pin 0.0 Direction" "Input,Output" group.long (0x0+0x10)++0x03 line.long 0x00 "FIO0MASK,Fast GPIO port 0 Mask register" bitfld.long 0x00 31. " MASK0.31 ,Pin 0.31 Access Control" "Not masked,Masked" bitfld.long 0x00 30. " MASK0.30 ,Pin 0.30 Access Control" "Not masked,Masked" bitfld.long 0x00 29. " MASK0.29 ,Pin 0.29 Access Control" "Not masked,Masked" textline " " bitfld.long 0x00 28. " MASK0.28 ,Pin 0.28 Access Control" "Not masked,Masked" bitfld.long 0x00 27. " MASK0.27 ,Pin 0.27 Access Control" "Not masked,Masked" bitfld.long 0x00 26. " MASK0.26 ,Pin 0.26 Access Control" "Not masked,Masked" textline " " bitfld.long 0x00 25. " MASK0.25 ,Pin 0.25 Access Control" "Not masked,Masked" bitfld.long 0x00 24. " MASK0.24 ,Pin 0.24 Access Control" "Not masked,Masked" bitfld.long 0x00 23. " MASK0.23 ,Pin 0.23 Access Control" "Not masked,Masked" textline " " bitfld.long 0x00 22. " MASK0.22 ,Pin 0.22 Access Control" "Not masked,Masked" bitfld.long 0x00 21. " MASK0.21 ,Pin 0.21 Access Control" "Not masked,Masked" bitfld.long 0x00 20. " MASK0.20 ,Pin 0.20 Access Control" "Not masked,Masked" textline " " bitfld.long 0x00 19. " MASK0.19 ,Pin 0.19 Access Control" "Not masked,Masked" bitfld.long 0x00 18. " MASK0.18 ,Pin 0.18 Access Control" "Not masked,Masked" bitfld.long 0x00 17. " MASK0.17 ,Pin 0.17 Access Control" "Not masked,Masked" textline " " bitfld.long 0x00 16. " MASK0.16 ,Pin 0.16 Access Control" "Not masked,Masked" bitfld.long 0x00 15. " MASK0.15 ,Pin 0.15 Access Control" "Not masked,Masked" bitfld.long 0x00 14. " MASK0.14 ,Pin 0.14 Access Control" "Not masked,Masked" textline " " bitfld.long 0x00 13. " MASK0.13 ,Pin 0.13 Access Control" "Not masked,Masked" bitfld.long 0x00 12. " MASK0.12 ,Pin 0.12 Access Control" "Not masked,Masked" bitfld.long 0x00 11. " MASK0.11 ,Pin 0.11 Access Control" "Not masked,Masked" textline " " bitfld.long 0x00 10. " MASK0.10 ,Pin 0.10 Access Control" "Not masked,Masked" bitfld.long 0x00 9. " MASK0.9 ,Pin 0.9 Access Control" "Not masked,Masked" bitfld.long 0x00 8. " MASK0.8 ,Pin 0.8 Access Control" "Not masked,Masked" textline " " bitfld.long 0x00 7. " MASK0.7 ,Pin 0.7 Access Control" "Not masked,Masked" bitfld.long 0x00 6. " MASK0.6 ,Pin 0.6 Access Control" "Not masked,Masked" bitfld.long 0x00 5. " MASK0.5 ,Pin 0.5 Access Control" "Not masked,Masked" textline " " bitfld.long 0x00 4. " MASK0.4 ,Pin 0.4 Access Control" "Not masked,Masked" bitfld.long 0x00 3. " MASK0.3 ,Pin 0.3 Access Control" "Not masked,Masked" bitfld.long 0x00 2. " MASK0.2 ,Pin 0.2 Access Control" "Not masked,Masked" textline " " bitfld.long 0x00 1. " MASK0.1 ,Pin 0.1 Access Control" "Not masked,Masked" bitfld.long 0x00 0. " MASK0.0 ,Pin 0.0 Access Control" "Not masked,Masked" group.long (0x0+0x14)++0x03 line.long 0x00 "FIO0PIN,Fast GPIO Port 0 Pin Value Register" setclrfld.long 0x00 31. 0x04 31. 0x08 31. " Pin0.31_set/clr ,Pin 0.31 Value" "Low,High" setclrfld.long 0x00 30. 0x04 30. 0x08 30. " Pin0.30_set/clr ,Pin 0.30 Value" "Low,High" setclrfld.long 0x00 29. 0x04 29. 0x08 29. " Pin0.29_set/clr ,Pin 0.29 Value" "Low,High" textline " " setclrfld.long 0x00 28. 0x04 28. 0x08 28. " Pin0.28_set/clr ,Pin 0.28 Value" "Low,High" setclrfld.long 0x00 27. 0x04 27. 0x08 27. " Pin0.27_set/clr ,Pin 0.27 Value" "Low,High" setclrfld.long 0x00 26. 0x04 26. 0x08 26. " Pin0.26_set/clr ,Pin 0.26 Value" "Low,High" textline " " setclrfld.long 0x00 25. 0x04 25. 0x08 25. " Pin0.25_set/clr ,Pin 0.25 Value" "Low,High" setclrfld.long 0x00 24. 0x04 24. 0x08 24. " Pin0.24_set/clr ,Pin 0.24 Value" "Low,High" setclrfld.long 0x00 23. 0x04 23. 0x08 23. " Pin0.23_set/clr ,Pin 0.23 Value" "Low,High" textline " " setclrfld.long 0x00 22. 0x04 22. 0x08 22. " Pin0.22_set/clr ,Pin 0.22 Value" "Low,High" setclrfld.long 0x00 21. 0x04 21. 0x08 21. " Pin0.21_set/clr ,Pin 0.21 Value" "Low,High" setclrfld.long 0x00 20. 0x04 20. 0x08 20. " Pin0.20_set/clr ,Pin 0.20 Value" "Low,High" textline " " setclrfld.long 0x00 19. 0x04 19. 0x08 19. " Pin0.19_set/clr ,Pin 0.19 Value" "Low,High" setclrfld.long 0x00 18. 0x04 18. 0x08 18. " Pin0.18_set/clr ,Pin 0.18 Value" "Low,High" setclrfld.long 0x00 17. 0x04 17. 0x08 17. " Pin0.17_set/clr ,Pin 0.17 Value" "Low,High" textline " " setclrfld.long 0x00 16. 0x04 16. 0x08 16. " Pin0.16_set/clr ,Pin 0.16 Value" "Low,High" setclrfld.long 0x00 15. 0x04 15. 0x08 15. " Pin0.15_set/clr ,Pin 0.15 Value" "Low,High" setclrfld.long 0x00 14. 0x04 14. 0x08 14. " Pin0.14_set/clr ,Pin 0.14 Value" "Low,High" textline " " setclrfld.long 0x00 13. 0x04 13. 0x08 13. " Pin0.13_set/clr ,Pin 0.13 Value" "Low,High" setclrfld.long 0x00 12. 0x04 12. 0x08 12. " Pin0.12_set/clr ,Pin 0.12 Value" "Low,High" setclrfld.long 0x00 11. 0x04 11. 0x08 11. " Pin0.11_set/clr ,Pin 0.11 Value" "Low,High" textline " " setclrfld.long 0x00 10. 0x04 10. 0x08 10. " Pin0.10_set/clr ,Pin 0.10 Value" "Low,High" setclrfld.long 0x00 9. 0x04 9. 0x08 9. " Pin0.9_set/clr ,Pin 0.9 Value" "Low,High" setclrfld.long 0x00 8. 0x04 8. 0x08 8. " Pin0.8_set/clr ,Pin 0.8 Value" "Low,High" textline " " setclrfld.long 0x00 7. 0x04 7. 0x08 7. " Pin0.7_set/clr ,Pin 0.7 Value" "Low,High" setclrfld.long 0x00 6. 0x04 6. 0x08 6. " Pin0.6_set/clr ,Pin 0.6 Value" "Low,High" setclrfld.long 0x00 5. 0x04 5. 0x08 5. " Pin0.5_set/clr ,Pin 0.5 Value" "Low,High" textline " " setclrfld.long 0x00 4. 0x04 4. 0x08 4. " Pin0.4_set/clr ,Pin 0.4 Value" "Low,High" setclrfld.long 0x00 3. 0x04 3. 0x08 3. " Pin0.3_set/clr ,Pin 0.3 Value" "Low,High" setclrfld.long 0x00 2. 0x04 2. 0x08 2. " Pin0.2_set/clr ,Pin 0.2 Value" "Low,High" textline " " setclrfld.long 0x00 1. 0x04 1. 0x08 1. " Pin0.1_set/clr ,Pin 0.1 Value" "Low,High" setclrfld.long 0x00 0. 0x04 0. 0x08 0. " Pin0.0_set/clr ,Pin 0.0 Value" "Low,High" base ad:0x40028000 group.long 0x90++0x7 "GPIO Interrupt registers for Port 0" line.long 0x0 "IO0IntEnR,GPIO 0 Interrupt Enable for Rising edge register" bitfld.long 0x0 31. " P0.31ER ,Enable Rising edge P0.31" "Disabled,Enabled" bitfld.long 0x0 30. " P0.30ER ,Enable Rising edge P0.30" "Disabled,Enabled" bitfld.long 0x0 29. " P0.29ER ,Enable Rising edge P0.29" "Disabled,Enabled" textline " " bitfld.long 0x0 28. " P0.28ER ,Enable Rising edge P0.28" "Disabled,Enabled" bitfld.long 0x0 27. " P0.27ER ,Enable Rising edge P0.27" "Disabled,Enabled" bitfld.long 0x0 26. " P0.26ER ,Enable Rising edge P0.26" "Disabled,Enabled" textline " " bitfld.long 0x0 25. " P0.25ER ,Enable Rising edge P0.25" "Disabled,Enabled" bitfld.long 0x0 24. " P0.24ER ,Enable Rising edge P0.24" "Disabled,Enabled" bitfld.long 0x0 23. " P0.23ER ,Enable Rising edge P0.23" "Disabled,Enabled" textline " " bitfld.long 0x0 22. " P0.22ER ,Enable Rising edge P0.22" "Disabled,Enabled" bitfld.long 0x0 21. " P0.21ER ,Enable Rising edge P0.21" "Disabled,Enabled" bitfld.long 0x0 20. " P0.20ER ,Enable Rising edge P0.20" "Disabled,Enabled" textline " " bitfld.long 0x0 19. " P0.19ER ,Enable Rising edge P0.19" "Disabled,Enabled" bitfld.long 0x0 18. " P0.18ER ,Enable Rising edge P0.18" "Disabled,Enabled" bitfld.long 0x0 17. " P0.17ER ,Enable Rising edge P0.17" "Disabled,Enabled" textline " " bitfld.long 0x0 16. " P0.16ER ,Enable Rising edge P0.16" "Disabled,Enabled" bitfld.long 0x0 15. " P0.15ER ,Enable Rising edge P0.15" "Disabled,Enabled" bitfld.long 0x0 14. " P0.14ER ,Enable Rising edge P0.14" "Disabled,Enabled" textline " " bitfld.long 0x0 13. " P0.13ER ,Enable Rising edge P0.13" "Disabled,Enabled" bitfld.long 0x0 12. " P0.12ER ,Enable Rising edge P0.12" "Disabled,Enabled" bitfld.long 0x0 11. " P0.11ER ,Enable Rising edge P0.11" "Disabled,Enabled" textline " " bitfld.long 0x0 10. " P0.10ER ,Enable Rising edge P0.10" "Disabled,Enabled" bitfld.long 0x0 9. " P0.9ER ,Enable Rising edge P0.9" "Disabled,Enabled" bitfld.long 0x0 8. " P0.8ER ,Enable Rising edge P0.8" "Disabled,Enabled" textline " " bitfld.long 0x0 7. " P0.7ER ,Enable Rising edge P0.7" "Disabled,Enabled" bitfld.long 0x0 6. " P0.6ER ,Enable Rising edge P0.6" "Disabled,Enabled" bitfld.long 0x0 5. " P0.5ER ,Enable Rising edge P0.5" "Disabled,Enabled" textline " " bitfld.long 0x0 4. " P0.4ER ,Enable Rising edge P0.4" "Disabled,Enabled" bitfld.long 0x0 3. " P0.3ER ,Enable Rising edge P0.3" "Disabled,Enabled" bitfld.long 0x0 2. " P0.2ER ,Enable Rising edge P0.2" "Disabled,Enabled" textline " " bitfld.long 0x0 1. " P0.1ER ,Enable Rising edge P0.1" "Disabled,Enabled" bitfld.long 0x0 0. " P0.0ER ,Enable Rising edge P0.0" "Disabled,Enabled" line.long 0x4 "IO0IntEnF,GPIO 0 Interrupt Enable for Falling edge register" bitfld.long 0x4 31. " P0.31EF ,Enable Falling edge P0.31" "Disabled,Enabled" bitfld.long 0x4 30. " P0.30EF ,Enable Falling edge P0.30" "Disabled,Enabled" bitfld.long 0x4 29. " P0.29EF ,Enable Falling edge P0.29" "Disabled,Enabled" textline " " bitfld.long 0x4 28. " P0.28EF ,Enable Falling edge P0.28" "Disabled,Enabled" bitfld.long 0x4 27. " P0.27EF ,Enable Falling edge P0.27" "Disabled,Enabled" bitfld.long 0x4 26. " P0.26EF ,Enable Falling edge P0.26" "Disabled,Enabled" textline " " bitfld.long 0x4 25. " P0.25EF ,Enable Falling edge P0.25" "Disabled,Enabled" bitfld.long 0x4 24. " P0.24EF ,Enable Falling edge P0.24" "Disabled,Enabled" bitfld.long 0x4 23. " P0.23EF ,Enable Falling edge P0.23" "Disabled,Enabled" textline " " bitfld.long 0x4 22. " P0.22EF ,Enable Falling edge P0.22" "Disabled,Enabled" bitfld.long 0x4 21. " P0.21EF ,Enable Falling edge P0.21" "Disabled,Enabled" bitfld.long 0x4 20. " P0.20EF ,Enable Falling edge P0.20" "Disabled,Enabled" textline " " bitfld.long 0x4 19. " P0.19EF ,Enable Falling edge P0.19" "Disabled,Enabled" bitfld.long 0x4 18. " P0.18EF ,Enable Falling edge P0.18" "Disabled,Enabled" bitfld.long 0x4 17. " P0.17EF ,Enable Falling edge P0.17" "Disabled,Enabled" textline " " bitfld.long 0x4 16. " P0.16EF ,Enable Falling edge P0.16" "Disabled,Enabled" bitfld.long 0x4 15. " P0.15EF ,Enable Falling edge P0.15" "Disabled,Enabled" bitfld.long 0x4 14. " P0.14EF ,Enable Falling edge P0.14" "Disabled,Enabled" textline " " bitfld.long 0x4 13. " P0.13EF ,Enable Falling edge P0.13" "Disabled,Enabled" bitfld.long 0x4 12. " P0.12EF ,Enable Falling edge P0.12" "Disabled,Enabled" bitfld.long 0x4 11. " P0.11EF ,Enable Falling edge P0.11" "Disabled,Enabled" textline " " bitfld.long 0x4 10. " P0.10EF ,Enable Falling edge P0.10" "Disabled,Enabled" bitfld.long 0x4 9. " P0.9EF ,Enable Falling edge P0.9" "Disabled,Enabled" bitfld.long 0x4 8. " P0.8EF ,Enable Falling edge P0.8" "Disabled,Enabled" textline " " bitfld.long 0x4 7. " P0.7EF ,Enable Falling edge P0.7" "Disabled,Enabled" bitfld.long 0x4 6. " P0.6EF ,Enable Falling edge P0.6" "Disabled,Enabled" bitfld.long 0x4 5. " P0.5EF ,Enable Falling edge P0.5" "Disabled,Enabled" textline " " bitfld.long 0x4 4. " P0.4EF ,Enable Falling edge P0.4" "Disabled,Enabled" bitfld.long 0x4 3. " P0.3EF ,Enable Falling edge P0.3" "Disabled,Enabled" bitfld.long 0x4 2. " P0.2EF ,Enable Falling edge P0.2" "Disabled,Enabled" textline " " bitfld.long 0x4 1. " P0.1EF ,Enable Falling edge P0.1" "Disabled,Enabled" bitfld.long 0x4 0. " P0.0EF ,Enable Falling edge P0.0" "Disabled,Enabled" rgroup.long (0x90-0x0C)++0x7 line.long 0x0 "IO0IntStatR,GPIO 0 Interrupt Status for Rising edge register" bitfld.long 0x0 31. " P0.31REI ,Rising Edge Interrupt status P0.31" "No interrupt,Interrupt" bitfld.long 0x0 30. " P0.30REI ,Rising Edge Interrupt status P0.30" "No interrupt,Interrupt" bitfld.long 0x0 29. " P0.29REI ,Rising Edge Interrupt status P0.29" "No interrupt,Interrupt" textline " " bitfld.long 0x0 28. " P0.28REI ,Rising Edge Interrupt status P0.28" "No interrupt,Interrupt" bitfld.long 0x0 27. " P0.27REI ,Rising Edge Interrupt status P0.27" "No interrupt,Interrupt" bitfld.long 0x0 26. " P0.26REI ,Rising Edge Interrupt status P0.26" "No interrupt,Interrupt" textline " " bitfld.long 0x0 25. " P0.25REI ,Rising Edge Interrupt status P0.25" "No interrupt,Interrupt" bitfld.long 0x0 24. " P0.24REI ,Rising Edge Interrupt status P0.24" "No interrupt,Interrupt" bitfld.long 0x0 23. " P0.23REI ,Rising Edge Interrupt status P0.23" "No interrupt,Interrupt" textline " " bitfld.long 0x0 22. " P0.22REI ,Rising Edge Interrupt status P0.22" "No interrupt,Interrupt" bitfld.long 0x0 21. " P0.21REI ,Rising Edge Interrupt status P0.21" "No interrupt,Interrupt" bitfld.long 0x0 20. " P0.20REI ,Rising Edge Interrupt status P0.20" "No interrupt,Interrupt" textline " " bitfld.long 0x0 19. " P0.19REI ,Rising Edge Interrupt status P0.19" "No interrupt,Interrupt" bitfld.long 0x0 18. " P0.18REI ,Rising Edge Interrupt status P0.18" "No interrupt,Interrupt" bitfld.long 0x0 17. " P0.17REI ,Rising Edge Interrupt status P0.17" "No interrupt,Interrupt" textline " " bitfld.long 0x0 16. " P0.16REI ,Rising Edge Interrupt status P0.16" "No interrupt,Interrupt" bitfld.long 0x0 15. " P0.15REI ,Rising Edge Interrupt status P0.15" "No interrupt,Interrupt" bitfld.long 0x0 14. " P0.14REI ,Rising Edge Interrupt status P0.14" "No interrupt,Interrupt" textline " " bitfld.long 0x0 13. " P0.13REI ,Rising Edge Interrupt status P0.13" "No interrupt,Interrupt" bitfld.long 0x0 12. " P0.12REI ,Rising Edge Interrupt status P0.12" "No interrupt,Interrupt" bitfld.long 0x0 11. " P0.11REI ,Rising Edge Interrupt status P0.11" "No interrupt,Interrupt" textline " " bitfld.long 0x0 10. " P0.10REI ,Rising Edge Interrupt status P0.10" "No interrupt,Interrupt" bitfld.long 0x0 9. " P0.9REI ,Rising Edge Interrupt status P0.9" "No interrupt,Interrupt" bitfld.long 0x0 8. " P0.8REI ,Rising Edge Interrupt status P0.8" "No interrupt,Interrupt" textline " " bitfld.long 0x0 7. " P0.7REI ,Rising Edge Interrupt status P0.7" "No interrupt,Interrupt" bitfld.long 0x0 6. " P0.6REI ,Rising Edge Interrupt status P0.6" "No interrupt,Interrupt" bitfld.long 0x0 5. " P0.5REI ,Rising Edge Interrupt status P0.5" "No interrupt,Interrupt" textline " " bitfld.long 0x0 4. " P0.4REI ,Rising Edge Interrupt status P0.4" "No interrupt,Interrupt" bitfld.long 0x0 3. " P0.3REI ,Rising Edge Interrupt status P0.3" "No interrupt,Interrupt" bitfld.long 0x0 2. " P0.2REI ,Rising Edge Interrupt status P0.2" "No interrupt,Interrupt" textline " " bitfld.long 0x0 1. " P0.1REI ,Rising Edge Interrupt status P0.1" "No interrupt,Interrupt" bitfld.long 0x0 0. " P0.0REI ,Rising Edge Interrupt status P0.0" "No interrupt,Interrupt" line.long 0x4 "IO0IntStatF,GPIO 0 Interrupt Status for Falling edge register" bitfld.long 0x4 31. " P0.31FEI ,Falling Edge Interrupt status P0.31" "No interrupt,Interrupt" bitfld.long 0x4 30. " P0.30FEI ,Falling Edge Interrupt status P0.30" "No interrupt,Interrupt" bitfld.long 0x4 29. " P0.29FEI ,Falling Edge Interrupt status P0.29" "No interrupt,Interrupt" textline " " bitfld.long 0x4 28. " P0.28FEI ,Falling Edge Interrupt status P0.28" "No interrupt,Interrupt" bitfld.long 0x4 27. " P0.27FEI ,Falling Edge Interrupt status P0.27" "No interrupt,Interrupt" bitfld.long 0x4 26. " P0.26FEI ,Falling Edge Interrupt status P0.26" "No interrupt,Interrupt" textline " " bitfld.long 0x4 25. " P0.25FEI ,Falling Edge Interrupt status P0.25" "No interrupt,Interrupt" bitfld.long 0x4 24. " P0.24FEI ,Falling Edge Interrupt status P0.24" "No interrupt,Interrupt" bitfld.long 0x4 23. " P0.23FEI ,Falling Edge Interrupt status P0.23" "No interrupt,Interrupt" textline " " bitfld.long 0x4 22. " P0.22FEI ,Falling Edge Interrupt status P0.22" "No interrupt,Interrupt" bitfld.long 0x4 21. " P0.21FEI ,Falling Edge Interrupt status P0.21" "No interrupt,Interrupt" bitfld.long 0x4 20. " P0.20FEI ,Falling Edge Interrupt status P0.20" "No interrupt,Interrupt" textline " " bitfld.long 0x4 19. " P0.19FEI ,Falling Edge Interrupt status P0.19" "No interrupt,Interrupt" bitfld.long 0x4 18. " P0.18FEI ,Falling Edge Interrupt status P0.18" "No interrupt,Interrupt" bitfld.long 0x4 17. " P0.17FEI ,Falling Edge Interrupt status P0.17" "No interrupt,Interrupt" textline " " bitfld.long 0x4 16. " P0.16FEI ,Falling Edge Interrupt status P0.16" "No interrupt,Interrupt" bitfld.long 0x4 15. " P0.15FEI ,Falling Edge Interrupt status P0.15" "No interrupt,Interrupt" bitfld.long 0x4 14. " P0.14FEI ,Falling Edge Interrupt status P0.14" "No interrupt,Interrupt" textline " " bitfld.long 0x4 13. " P0.13FEI ,Falling Edge Interrupt status P0.13" "No interrupt,Interrupt" bitfld.long 0x4 12. " P0.12FEI ,Falling Edge Interrupt status P0.12" "No interrupt,Interrupt" bitfld.long 0x4 11. " P0.11FEI ,Falling Edge Interrupt status P0.11" "No interrupt,Interrupt" textline " " bitfld.long 0x4 10. " P0.10FEI ,Falling Edge Interrupt status P0.10" "No interrupt,Interrupt" bitfld.long 0x4 9. " P0.9FEI ,Falling Edge Interrupt status P0.9" "No interrupt,Interrupt" bitfld.long 0x4 8. " P0.8FEI ,Falling Edge Interrupt status P0.8" "No interrupt,Interrupt" textline " " bitfld.long 0x4 7. " P0.7FEI ,Falling Edge Interrupt status P0.7" "No interrupt,Interrupt" bitfld.long 0x4 6. " P0.6FEI ,Falling Edge Interrupt status P0.6" "No interrupt,Interrupt" bitfld.long 0x4 5. " P0.5FEI ,Falling Edge Interrupt status P0.5" "No interrupt,Interrupt" textline " " bitfld.long 0x4 4. " P0.4FEI ,Falling Edge Interrupt status P0.4" "No interrupt,Interrupt" bitfld.long 0x4 3. " P0.3FEI ,Falling Edge Interrupt status P0.3" "No interrupt,Interrupt" bitfld.long 0x4 2. " P0.2FEI ,Falling Edge Interrupt status P0.2" "No interrupt,Interrupt" textline " " bitfld.long 0x4 1. " P0.1FEI ,Falling Edge Interrupt status P0.1" "No interrupt,Interrupt" bitfld.long 0x4 0. " P0.0FEI ,Falling Edge Interrupt status P0.0" "No interrupt,Interrupt" wgroup.long (0x90-0x04)++0x3 line.long 0x0 "IO0IntClr,GPIO 0 Interrupt Clear register" bitfld.long 0x0 31. " P0.31CI ,Clear GPIO port Interrupt P0.31" "No effect,Clear" bitfld.long 0x0 30. " P0.30CI ,Clear GPIO port Interrupt P0.30" "No effect,Clear" bitfld.long 0x0 29. " P0.29CI ,Clear GPIO port Interrupt P0.29" "No effect,Clear" textline " " bitfld.long 0x0 28. " P0.28CI ,Clear GPIO port Interrupt P0.28" "No effect,Clear" bitfld.long 0x0 27. " P0.27CI ,Clear GPIO port Interrupt P0.27" "No effect,Clear" bitfld.long 0x0 26. " P0.26CI ,Clear GPIO port Interrupt P0.26" "No effect,Clear" textline " " bitfld.long 0x0 25. " P0.25CI ,Clear GPIO port Interrupt P0.25" "No effect,Clear" bitfld.long 0x0 24. " P0.24CI ,Clear GPIO port Interrupt P0.24" "No effect,Clear" bitfld.long 0x0 23. " P0.23CI ,Clear GPIO port Interrupt P0.23" "No effect,Clear" textline " " bitfld.long 0x0 22. " P0.22CI ,Clear GPIO port Interrupt P0.22" "No effect,Clear" bitfld.long 0x0 21. " P0.21CI ,Clear GPIO port Interrupt P0.21" "No effect,Clear" bitfld.long 0x0 20. " P0.20CI ,Clear GPIO port Interrupt P0.20" "No effect,Clear" textline " " bitfld.long 0x0 19. " P0.19CI ,Clear GPIO port Interrupt P0.19" "No effect,Clear" bitfld.long 0x0 18. " P0.18CI ,Clear GPIO port Interrupt P0.18" "No effect,Clear" bitfld.long 0x0 17. " P0.17CI ,Clear GPIO port Interrupt P0.17" "No effect,Clear" textline " " bitfld.long 0x0 16. " P0.16CI ,Clear GPIO port Interrupt P0.16" "No effect,Clear" bitfld.long 0x0 15. " P0.15CI ,Clear GPIO port Interrupt P0.15" "No effect,Clear" bitfld.long 0x0 14. " P0.14CI ,Clear GPIO port Interrupt P0.14" "No effect,Clear" textline " " bitfld.long 0x0 13. " P0.13CI ,Clear GPIO port Interrupt P0.13" "No effect,Clear" bitfld.long 0x0 12. " P0.12CI ,Clear GPIO port Interrupt P0.12" "No effect,Clear" bitfld.long 0x0 11. " P0.11CI ,Clear GPIO port Interrupt P0.11" "No effect,Clear" textline " " bitfld.long 0x0 10. " P0.10CI ,Clear GPIO port Interrupt P0.10" "No effect,Clear" bitfld.long 0x0 9. " P0.9CI ,Clear GPIO port Interrupt P0.9" "No effect,Clear" bitfld.long 0x0 8. " P0.8CI ,Clear GPIO port Interrupt P0.8" "No effect,Clear" textline " " bitfld.long 0x0 7. " P0.7CI ,Clear GPIO port Interrupt P0.7" "No effect,Clear" bitfld.long 0x0 6. " P0.6CI ,Clear GPIO port Interrupt P0.6" "No effect,Clear" bitfld.long 0x0 5. " P0.5CI ,Clear GPIO port Interrupt P0.5" "No effect,Clear" textline " " bitfld.long 0x0 4. " P0.4CI ,Clear GPIO port Interrupt P0.4" "No effect,Clear" bitfld.long 0x0 3. " P0.3CI ,Clear GPIO port Interrupt P0.3" "No effect,Clear" bitfld.long 0x0 2. " P0.2CI ,Clear GPIO port Interrupt P0.2" "No effect,Clear" textline " " bitfld.long 0x0 1. " P0.1CI ,Clear GPIO port Interrupt P0.1" "No effect,Clear" bitfld.long 0x0 0. " P0.0CI ,Clear GPIO port Interrupt P0.0" "No effect,Clear" width 0xB tree.end tree "Port 1" base ad:0x20098000 width 14. group.long 0x20++0x03 line.long 0x00 "FIO1DIR,Fast GPIO port 1 Direction register" bitfld.long 0x00 31. " DIR1.31 ,Pin 1.31 Direction" "Input,Output" bitfld.long 0x00 30. " DIR1.30 ,Pin 1.30 Direction" "Input,Output" bitfld.long 0x00 29. " DIR1.29 ,Pin 1.29 Direction" "Input,Output" textline " " bitfld.long 0x00 28. " DIR1.28 ,Pin 1.28 Direction" "Input,Output" bitfld.long 0x00 27. " DIR1.27 ,Pin 1.27 Direction" "Input,Output" bitfld.long 0x00 26. " DIR1.26 ,Pin 1.26 Direction" "Input,Output" textline " " bitfld.long 0x00 25. " DIR1.25 ,Pin 1.25 Direction" "Input,Output" bitfld.long 0x00 24. " DIR1.24 ,Pin 1.24 Direction" "Input,Output" bitfld.long 0x00 23. " DIR1.23 ,Pin 1.23 Direction" "Input,Output" textline " " bitfld.long 0x00 22. " DIR1.22 ,Pin 1.22 Direction" "Input,Output" bitfld.long 0x00 21. " DIR1.21 ,Pin 1.21 Direction" "Input,Output" bitfld.long 0x00 20. " DIR1.20 ,Pin 1.20 Direction" "Input,Output" textline " " bitfld.long 0x00 19. " DIR1.19 ,Pin 1.19 Direction" "Input,Output" bitfld.long 0x00 18. " DIR1.18 ,Pin 1.18 Direction" "Input,Output" bitfld.long 0x00 17. " DIR1.17 ,Pin 1.17 Direction" "Input,Output" textline " " bitfld.long 0x00 16. " DIR1.16 ,Pin 1.16 Direction" "Input,Output" bitfld.long 0x00 15. " DIR1.15 ,Pin 1.15 Direction" "Input,Output" bitfld.long 0x00 14. " DIR1.14 ,Pin 1.14 Direction" "Input,Output" textline " " bitfld.long 0x00 13. " DIR1.13 ,Pin 1.13 Direction" "Input,Output" bitfld.long 0x00 12. " DIR1.12 ,Pin 1.12 Direction" "Input,Output" bitfld.long 0x00 11. " DIR1.11 ,Pin 1.11 Direction" "Input,Output" textline " " bitfld.long 0x00 10. " DIR1.10 ,Pin 1.10 Direction" "Input,Output" bitfld.long 0x00 9. " DIR1.9 ,Pin 1.9 Direction" "Input,Output" bitfld.long 0x00 8. " DIR1.8 ,Pin 1.8 Direction" "Input,Output" textline " " bitfld.long 0x00 7. " DIR1.7 ,Pin 1.7 Direction" "Input,Output" bitfld.long 0x00 6. " DIR1.6 ,Pin 1.6 Direction" "Input,Output" bitfld.long 0x00 5. " DIR1.5 ,Pin 1.5 Direction" "Input,Output" textline " " bitfld.long 0x00 4. " DIR1.4 ,Pin 1.5 Direction" "Input,Output" bitfld.long 0x00 3. " DIR1.3 ,Pin 1.3 Direction" "Input,Output" bitfld.long 0x00 2. " DIR1.2 ,Pin 1.2 Direction" "Input,Output" textline " " bitfld.long 0x00 1. " DIR1.1 ,Pin 1.1 Direction" "Input,Output" bitfld.long 0x00 0. " DIR1.0 ,Pin 1.0 Direction" "Input,Output" group.long (0x20+0x10)++0x03 line.long 0x00 "FIO1MASK,Fast GPIO port 1 Mask register" bitfld.long 0x00 31. " MASK1.31 ,Pin 1.31 Access Control" "Not masked,Masked" bitfld.long 0x00 30. " MASK1.30 ,Pin 1.30 Access Control" "Not masked,Masked" bitfld.long 0x00 29. " MASK1.29 ,Pin 1.29 Access Control" "Not masked,Masked" textline " " bitfld.long 0x00 28. " MASK1.28 ,Pin 1.28 Access Control" "Not masked,Masked" bitfld.long 0x00 27. " MASK1.27 ,Pin 1.27 Access Control" "Not masked,Masked" bitfld.long 0x00 26. " MASK1.26 ,Pin 1.26 Access Control" "Not masked,Masked" textline " " bitfld.long 0x00 25. " MASK1.25 ,Pin 1.25 Access Control" "Not masked,Masked" bitfld.long 0x00 24. " MASK1.24 ,Pin 1.24 Access Control" "Not masked,Masked" bitfld.long 0x00 23. " MASK1.23 ,Pin 1.23 Access Control" "Not masked,Masked" textline " " bitfld.long 0x00 22. " MASK1.22 ,Pin 1.22 Access Control" "Not masked,Masked" bitfld.long 0x00 21. " MASK1.21 ,Pin 1.21 Access Control" "Not masked,Masked" bitfld.long 0x00 20. " MASK1.20 ,Pin 1.20 Access Control" "Not masked,Masked" textline " " bitfld.long 0x00 19. " MASK1.19 ,Pin 1.19 Access Control" "Not masked,Masked" bitfld.long 0x00 18. " MASK1.18 ,Pin 1.18 Access Control" "Not masked,Masked" bitfld.long 0x00 17. " MASK1.17 ,Pin 1.17 Access Control" "Not masked,Masked" textline " " bitfld.long 0x00 16. " MASK1.16 ,Pin 1.16 Access Control" "Not masked,Masked" bitfld.long 0x00 15. " MASK1.15 ,Pin 1.15 Access Control" "Not masked,Masked" bitfld.long 0x00 14. " MASK1.14 ,Pin 1.14 Access Control" "Not masked,Masked" textline " " bitfld.long 0x00 13. " MASK1.13 ,Pin 1.13 Access Control" "Not masked,Masked" bitfld.long 0x00 12. " MASK1.12 ,Pin 1.12 Access Control" "Not masked,Masked" bitfld.long 0x00 11. " MASK1.11 ,Pin 1.11 Access Control" "Not masked,Masked" textline " " bitfld.long 0x00 10. " MASK1.10 ,Pin 1.10 Access Control" "Not masked,Masked" bitfld.long 0x00 9. " MASK1.9 ,Pin 1.9 Access Control" "Not masked,Masked" bitfld.long 0x00 8. " MASK1.8 ,Pin 1.8 Access Control" "Not masked,Masked" textline " " bitfld.long 0x00 7. " MASK1.7 ,Pin 1.7 Access Control" "Not masked,Masked" bitfld.long 0x00 6. " MASK1.6 ,Pin 1.6 Access Control" "Not masked,Masked" bitfld.long 0x00 5. " MASK1.5 ,Pin 1.5 Access Control" "Not masked,Masked" textline " " bitfld.long 0x00 4. " MASK1.4 ,Pin 1.4 Access Control" "Not masked,Masked" bitfld.long 0x00 3. " MASK1.3 ,Pin 1.3 Access Control" "Not masked,Masked" bitfld.long 0x00 2. " MASK1.2 ,Pin 1.2 Access Control" "Not masked,Masked" textline " " bitfld.long 0x00 1. " MASK1.1 ,Pin 1.1 Access Control" "Not masked,Masked" bitfld.long 0x00 0. " MASK1.0 ,Pin 1.0 Access Control" "Not masked,Masked" group.long (0x20+0x14)++0x03 line.long 0x00 "FIO1PIN,Fast GPIO Port 0 Pin Value Register" setclrfld.long 0x00 31. 0x04 31. 0x08 31. " Pin1.31_set/clr ,Pin 1.31 Value" "Low,High" setclrfld.long 0x00 30. 0x04 30. 0x08 30. " Pin1.30_set/clr ,Pin 1.30 Value" "Low,High" setclrfld.long 0x00 29. 0x04 29. 0x08 29. " Pin1.29_set/clr ,Pin 1.29 Value" "Low,High" textline " " setclrfld.long 0x00 28. 0x04 28. 0x08 28. " Pin1.28_set/clr ,Pin 1.28 Value" "Low,High" setclrfld.long 0x00 27. 0x04 27. 0x08 27. " Pin1.27_set/clr ,Pin 1.27 Value" "Low,High" setclrfld.long 0x00 26. 0x04 26. 0x08 26. " Pin1.26_set/clr ,Pin 1.26 Value" "Low,High" textline " " setclrfld.long 0x00 25. 0x04 25. 0x08 25. " Pin1.25_set/clr ,Pin 1.25 Value" "Low,High" setclrfld.long 0x00 24. 0x04 24. 0x08 24. " Pin1.24_set/clr ,Pin 1.24 Value" "Low,High" setclrfld.long 0x00 23. 0x04 23. 0x08 23. " Pin1.23_set/clr ,Pin 1.23 Value" "Low,High" textline " " setclrfld.long 0x00 22. 0x04 22. 0x08 22. " Pin1.22_set/clr ,Pin 1.22 Value" "Low,High" setclrfld.long 0x00 21. 0x04 21. 0x08 21. " Pin1.21_set/clr ,Pin 1.21 Value" "Low,High" setclrfld.long 0x00 20. 0x04 20. 0x08 20. " Pin1.20_set/clr ,Pin 1.20 Value" "Low,High" textline " " setclrfld.long 0x00 19. 0x04 19. 0x08 19. " Pin1.19_set/clr ,Pin 1.19 Value" "Low,High" setclrfld.long 0x00 18. 0x04 18. 0x08 18. " Pin1.18_set/clr ,Pin 1.18 Value" "Low,High" setclrfld.long 0x00 17. 0x04 17. 0x08 17. " Pin1.17_set/clr ,Pin 1.17 Value" "Low,High" textline " " setclrfld.long 0x00 16. 0x04 16. 0x08 16. " Pin1.16_set/clr ,Pin 1.16 Value" "Low,High" setclrfld.long 0x00 15. 0x04 15. 0x08 15. " Pin1.15_set/clr ,Pin 1.15 Value" "Low,High" setclrfld.long 0x00 14. 0x04 14. 0x08 14. " Pin1.14_set/clr ,Pin 1.14 Value" "Low,High" textline " " setclrfld.long 0x00 13. 0x04 13. 0x08 13. " Pin1.13_set/clr ,Pin 1.13 Value" "Low,High" setclrfld.long 0x00 12. 0x04 12. 0x08 12. " Pin1.12_set/clr ,Pin 1.12 Value" "Low,High" setclrfld.long 0x00 11. 0x04 11. 0x08 11. " Pin1.11_set/clr ,Pin 1.11 Value" "Low,High" textline " " setclrfld.long 0x00 10. 0x04 10. 0x08 10. " Pin1.10_set/clr ,Pin 1.10 Value" "Low,High" setclrfld.long 0x00 9. 0x04 9. 0x08 9. " Pin1.9_set/clr ,Pin 1.9 Value" "Low,High" setclrfld.long 0x00 8. 0x04 8. 0x08 8. " Pin1.8_set/clr ,Pin 1.8 Value" "Low,High" textline " " setclrfld.long 0x00 7. 0x04 7. 0x08 7. " Pin1.7_set/clr ,Pin 1.7 Value" "Low,High" setclrfld.long 0x00 6. 0x04 6. 0x08 6. " Pin1.6_set/clr ,Pin 1.6 Value" "Low,High" setclrfld.long 0x00 5. 0x04 5. 0x08 5. " Pin1.5_set/clr ,Pin 1.5 Value" "Low,High" textline " " setclrfld.long 0x00 4. 0x04 4. 0x08 4. " Pin1.4_set/clr ,Pin 1.4 Value" "Low,High" setclrfld.long 0x00 3. 0x04 3. 0x08 3. " Pin1.3_set/clr ,Pin 1.3 Value" "Low,High" setclrfld.long 0x00 2. 0x04 2. 0x08 2. " Pin1.2_set/clr ,Pin 1.2 Value" "Low,High" textline " " setclrfld.long 0x00 1. 0x04 1. 0x08 1. " Pin1.1_set/clr ,Pin 1.1 Value" "Low,High" setclrfld.long 0x00 0. 0x04 0. 0x08 0. " Pin1.0_set/clr ,Pin 1.0 Value" "Low,High" width 0xB tree.end tree "Port 2" base ad:0x20098000 width 14. group.long 0x40++0x03 line.long 0x00 "FIO2DIR,Fast GPIO port 2 Direction register" bitfld.long 0x00 31. " DIR2.31 ,Pin 2.31 Direction" "Input,Output" bitfld.long 0x00 30. " DIR2.30 ,Pin 2.30 Direction" "Input,Output" bitfld.long 0x00 29. " DIR2.29 ,Pin 2.29 Direction" "Input,Output" textline " " bitfld.long 0x00 28. " DIR2.28 ,Pin 2.28 Direction" "Input,Output" bitfld.long 0x00 27. " DIR2.27 ,Pin 2.27 Direction" "Input,Output" bitfld.long 0x00 26. " DIR2.26 ,Pin 2.26 Direction" "Input,Output" textline " " bitfld.long 0x00 25. " DIR2.25 ,Pin 2.25 Direction" "Input,Output" bitfld.long 0x00 24. " DIR2.24 ,Pin 2.24 Direction" "Input,Output" bitfld.long 0x00 23. " DIR2.23 ,Pin 2.23 Direction" "Input,Output" textline " " bitfld.long 0x00 22. " DIR2.22 ,Pin 2.22 Direction" "Input,Output" bitfld.long 0x00 21. " DIR2.21 ,Pin 2.21 Direction" "Input,Output" bitfld.long 0x00 20. " DIR2.20 ,Pin 2.20 Direction" "Input,Output" textline " " bitfld.long 0x00 19. " DIR2.19 ,Pin 2.19 Direction" "Input,Output" bitfld.long 0x00 18. " DIR2.18 ,Pin 2.18 Direction" "Input,Output" bitfld.long 0x00 17. " DIR2.17 ,Pin 2.17 Direction" "Input,Output" textline " " bitfld.long 0x00 16. " DIR2.16 ,Pin 2.16 Direction" "Input,Output" bitfld.long 0x00 15. " DIR2.15 ,Pin 2.15 Direction" "Input,Output" bitfld.long 0x00 14. " DIR2.14 ,Pin 2.14 Direction" "Input,Output" textline " " bitfld.long 0x00 13. " DIR2.13 ,Pin 2.13 Direction" "Input,Output" bitfld.long 0x00 12. " DIR2.12 ,Pin 2.12 Direction" "Input,Output" bitfld.long 0x00 11. " DIR2.11 ,Pin 2.11 Direction" "Input,Output" textline " " bitfld.long 0x00 10. " DIR2.10 ,Pin 2.10 Direction" "Input,Output" bitfld.long 0x00 9. " DIR2.9 ,Pin 2.9 Direction" "Input,Output" bitfld.long 0x00 8. " DIR2.8 ,Pin 2.8 Direction" "Input,Output" textline " " bitfld.long 0x00 7. " DIR2.7 ,Pin 2.7 Direction" "Input,Output" bitfld.long 0x00 6. " DIR2.6 ,Pin 2.6 Direction" "Input,Output" bitfld.long 0x00 5. " DIR2.5 ,Pin 2.5 Direction" "Input,Output" textline " " bitfld.long 0x00 4. " DIR2.4 ,Pin 2.5 Direction" "Input,Output" bitfld.long 0x00 3. " DIR2.3 ,Pin 2.3 Direction" "Input,Output" bitfld.long 0x00 2. " DIR2.2 ,Pin 2.2 Direction" "Input,Output" textline " " bitfld.long 0x00 1. " DIR2.1 ,Pin 2.1 Direction" "Input,Output" bitfld.long 0x00 0. " DIR2.0 ,Pin 2.0 Direction" "Input,Output" group.long (0x40+0x10)++0x03 line.long 0x00 "FIO2MASK,Fast GPIO port 2 Mask register" bitfld.long 0x00 31. " MASK2.31 ,Pin 2.31 Access Control" "Not masked,Masked" bitfld.long 0x00 30. " MASK2.30 ,Pin 2.30 Access Control" "Not masked,Masked" bitfld.long 0x00 29. " MASK2.29 ,Pin 2.29 Access Control" "Not masked,Masked" textline " " bitfld.long 0x00 28. " MASK2.28 ,Pin 2.28 Access Control" "Not masked,Masked" bitfld.long 0x00 27. " MASK2.27 ,Pin 2.27 Access Control" "Not masked,Masked" bitfld.long 0x00 26. " MASK2.26 ,Pin 2.26 Access Control" "Not masked,Masked" textline " " bitfld.long 0x00 25. " MASK2.25 ,Pin 2.25 Access Control" "Not masked,Masked" bitfld.long 0x00 24. " MASK2.24 ,Pin 2.24 Access Control" "Not masked,Masked" bitfld.long 0x00 23. " MASK2.23 ,Pin 2.23 Access Control" "Not masked,Masked" textline " " bitfld.long 0x00 22. " MASK2.22 ,Pin 2.22 Access Control" "Not masked,Masked" bitfld.long 0x00 21. " MASK2.21 ,Pin 2.21 Access Control" "Not masked,Masked" bitfld.long 0x00 20. " MASK2.20 ,Pin 2.20 Access Control" "Not masked,Masked" textline " " bitfld.long 0x00 19. " MASK2.19 ,Pin 2.19 Access Control" "Not masked,Masked" bitfld.long 0x00 18. " MASK2.18 ,Pin 2.18 Access Control" "Not masked,Masked" bitfld.long 0x00 17. " MASK2.17 ,Pin 2.17 Access Control" "Not masked,Masked" textline " " bitfld.long 0x00 16. " MASK2.16 ,Pin 2.16 Access Control" "Not masked,Masked" bitfld.long 0x00 15. " MASK2.15 ,Pin 2.15 Access Control" "Not masked,Masked" bitfld.long 0x00 14. " MASK2.14 ,Pin 2.14 Access Control" "Not masked,Masked" textline " " bitfld.long 0x00 13. " MASK2.13 ,Pin 2.13 Access Control" "Not masked,Masked" bitfld.long 0x00 12. " MASK2.12 ,Pin 2.12 Access Control" "Not masked,Masked" bitfld.long 0x00 11. " MASK2.11 ,Pin 2.11 Access Control" "Not masked,Masked" textline " " bitfld.long 0x00 10. " MASK2.10 ,Pin 2.10 Access Control" "Not masked,Masked" bitfld.long 0x00 9. " MASK2.9 ,Pin 2.9 Access Control" "Not masked,Masked" bitfld.long 0x00 8. " MASK2.8 ,Pin 2.8 Access Control" "Not masked,Masked" textline " " bitfld.long 0x00 7. " MASK2.7 ,Pin 2.7 Access Control" "Not masked,Masked" bitfld.long 0x00 6. " MASK2.6 ,Pin 2.6 Access Control" "Not masked,Masked" bitfld.long 0x00 5. " MASK2.5 ,Pin 2.5 Access Control" "Not masked,Masked" textline " " bitfld.long 0x00 4. " MASK2.4 ,Pin 2.4 Access Control" "Not masked,Masked" bitfld.long 0x00 3. " MASK2.3 ,Pin 2.3 Access Control" "Not masked,Masked" bitfld.long 0x00 2. " MASK2.2 ,Pin 2.2 Access Control" "Not masked,Masked" textline " " bitfld.long 0x00 1. " MASK2.1 ,Pin 2.1 Access Control" "Not masked,Masked" bitfld.long 0x00 0. " MASK2.0 ,Pin 2.0 Access Control" "Not masked,Masked" group.long (0x40+0x14)++0x03 line.long 0x00 "FIO2PIN,Fast GPIO Port 0 Pin Value Register" setclrfld.long 0x00 31. 0x04 31. 0x08 31. " Pin2.31_set/clr ,Pin 2.31 Value" "Low,High" setclrfld.long 0x00 30. 0x04 30. 0x08 30. " Pin2.30_set/clr ,Pin 2.30 Value" "Low,High" setclrfld.long 0x00 29. 0x04 29. 0x08 29. " Pin2.29_set/clr ,Pin 2.29 Value" "Low,High" textline " " setclrfld.long 0x00 28. 0x04 28. 0x08 28. " Pin2.28_set/clr ,Pin 2.28 Value" "Low,High" setclrfld.long 0x00 27. 0x04 27. 0x08 27. " Pin2.27_set/clr ,Pin 2.27 Value" "Low,High" setclrfld.long 0x00 26. 0x04 26. 0x08 26. " Pin2.26_set/clr ,Pin 2.26 Value" "Low,High" textline " " setclrfld.long 0x00 25. 0x04 25. 0x08 25. " Pin2.25_set/clr ,Pin 2.25 Value" "Low,High" setclrfld.long 0x00 24. 0x04 24. 0x08 24. " Pin2.24_set/clr ,Pin 2.24 Value" "Low,High" setclrfld.long 0x00 23. 0x04 23. 0x08 23. " Pin2.23_set/clr ,Pin 2.23 Value" "Low,High" textline " " setclrfld.long 0x00 22. 0x04 22. 0x08 22. " Pin2.22_set/clr ,Pin 2.22 Value" "Low,High" setclrfld.long 0x00 21. 0x04 21. 0x08 21. " Pin2.21_set/clr ,Pin 2.21 Value" "Low,High" setclrfld.long 0x00 20. 0x04 20. 0x08 20. " Pin2.20_set/clr ,Pin 2.20 Value" "Low,High" textline " " setclrfld.long 0x00 19. 0x04 19. 0x08 19. " Pin2.19_set/clr ,Pin 2.19 Value" "Low,High" setclrfld.long 0x00 18. 0x04 18. 0x08 18. " Pin2.18_set/clr ,Pin 2.18 Value" "Low,High" setclrfld.long 0x00 17. 0x04 17. 0x08 17. " Pin2.17_set/clr ,Pin 2.17 Value" "Low,High" textline " " setclrfld.long 0x00 16. 0x04 16. 0x08 16. " Pin2.16_set/clr ,Pin 2.16 Value" "Low,High" setclrfld.long 0x00 15. 0x04 15. 0x08 15. " Pin2.15_set/clr ,Pin 2.15 Value" "Low,High" setclrfld.long 0x00 14. 0x04 14. 0x08 14. " Pin2.14_set/clr ,Pin 2.14 Value" "Low,High" textline " " setclrfld.long 0x00 13. 0x04 13. 0x08 13. " Pin2.13_set/clr ,Pin 2.13 Value" "Low,High" setclrfld.long 0x00 12. 0x04 12. 0x08 12. " Pin2.12_set/clr ,Pin 2.12 Value" "Low,High" setclrfld.long 0x00 11. 0x04 11. 0x08 11. " Pin2.11_set/clr ,Pin 2.11 Value" "Low,High" textline " " setclrfld.long 0x00 10. 0x04 10. 0x08 10. " Pin2.10_set/clr ,Pin 2.10 Value" "Low,High" setclrfld.long 0x00 9. 0x04 9. 0x08 9. " Pin2.9_set/clr ,Pin 2.9 Value" "Low,High" setclrfld.long 0x00 8. 0x04 8. 0x08 8. " Pin2.8_set/clr ,Pin 2.8 Value" "Low,High" textline " " setclrfld.long 0x00 7. 0x04 7. 0x08 7. " Pin2.7_set/clr ,Pin 2.7 Value" "Low,High" setclrfld.long 0x00 6. 0x04 6. 0x08 6. " Pin2.6_set/clr ,Pin 2.6 Value" "Low,High" setclrfld.long 0x00 5. 0x04 5. 0x08 5. " Pin2.5_set/clr ,Pin 2.5 Value" "Low,High" textline " " setclrfld.long 0x00 4. 0x04 4. 0x08 4. " Pin2.4_set/clr ,Pin 2.4 Value" "Low,High" setclrfld.long 0x00 3. 0x04 3. 0x08 3. " Pin2.3_set/clr ,Pin 2.3 Value" "Low,High" setclrfld.long 0x00 2. 0x04 2. 0x08 2. " Pin2.2_set/clr ,Pin 2.2 Value" "Low,High" textline " " setclrfld.long 0x00 1. 0x04 1. 0x08 1. " Pin2.1_set/clr ,Pin 2.1 Value" "Low,High" setclrfld.long 0x00 0. 0x04 0. 0x08 0. " Pin2.0_set/clr ,Pin 2.0 Value" "Low,High" base ad:0x40028000 group.long 0xB0++0x7 "GPIO Interrupt registers for Port 2" line.long 0x0 "IO2IntEnR,GPIO 2 Interrupt Enable for Rising edge register" bitfld.long 0x0 31. " P2.31ER ,Enable Rising edge P2.31" "Disabled,Enabled" bitfld.long 0x0 30. " P2.30ER ,Enable Rising edge P2.30" "Disabled,Enabled" bitfld.long 0x0 29. " P2.29ER ,Enable Rising edge P2.29" "Disabled,Enabled" textline " " bitfld.long 0x0 28. " P2.28ER ,Enable Rising edge P2.28" "Disabled,Enabled" bitfld.long 0x0 27. " P2.27ER ,Enable Rising edge P2.27" "Disabled,Enabled" bitfld.long 0x0 26. " P2.26ER ,Enable Rising edge P2.26" "Disabled,Enabled" textline " " bitfld.long 0x0 25. " P2.25ER ,Enable Rising edge P2.25" "Disabled,Enabled" bitfld.long 0x0 24. " P2.24ER ,Enable Rising edge P2.24" "Disabled,Enabled" bitfld.long 0x0 23. " P2.23ER ,Enable Rising edge P2.23" "Disabled,Enabled" textline " " bitfld.long 0x0 22. " P2.22ER ,Enable Rising edge P2.22" "Disabled,Enabled" bitfld.long 0x0 21. " P2.21ER ,Enable Rising edge P2.21" "Disabled,Enabled" bitfld.long 0x0 20. " P2.20ER ,Enable Rising edge P2.20" "Disabled,Enabled" textline " " bitfld.long 0x0 19. " P2.19ER ,Enable Rising edge P2.19" "Disabled,Enabled" bitfld.long 0x0 18. " P2.18ER ,Enable Rising edge P2.18" "Disabled,Enabled" bitfld.long 0x0 17. " P2.17ER ,Enable Rising edge P2.17" "Disabled,Enabled" textline " " bitfld.long 0x0 16. " P2.16ER ,Enable Rising edge P2.16" "Disabled,Enabled" bitfld.long 0x0 15. " P2.15ER ,Enable Rising edge P2.15" "Disabled,Enabled" bitfld.long 0x0 14. " P2.14ER ,Enable Rising edge P2.14" "Disabled,Enabled" textline " " bitfld.long 0x0 13. " P2.13ER ,Enable Rising edge P2.13" "Disabled,Enabled" bitfld.long 0x0 12. " P2.12ER ,Enable Rising edge P2.12" "Disabled,Enabled" bitfld.long 0x0 11. " P2.11ER ,Enable Rising edge P2.11" "Disabled,Enabled" textline " " bitfld.long 0x0 10. " P2.10ER ,Enable Rising edge P2.10" "Disabled,Enabled" bitfld.long 0x0 9. " P2.9ER ,Enable Rising edge P2.9" "Disabled,Enabled" bitfld.long 0x0 8. " P2.8ER ,Enable Rising edge P2.8" "Disabled,Enabled" textline " " bitfld.long 0x0 7. " P2.7ER ,Enable Rising edge P2.7" "Disabled,Enabled" bitfld.long 0x0 6. " P2.6ER ,Enable Rising edge P2.6" "Disabled,Enabled" bitfld.long 0x0 5. " P2.5ER ,Enable Rising edge P2.5" "Disabled,Enabled" textline " " bitfld.long 0x0 4. " P2.4ER ,Enable Rising edge P2.4" "Disabled,Enabled" bitfld.long 0x0 3. " P2.3ER ,Enable Rising edge P2.3" "Disabled,Enabled" bitfld.long 0x0 2. " P2.2ER ,Enable Rising edge P2.2" "Disabled,Enabled" textline " " bitfld.long 0x0 1. " P2.1ER ,Enable Rising edge P2.1" "Disabled,Enabled" bitfld.long 0x0 0. " P2.0ER ,Enable Rising edge P2.0" "Disabled,Enabled" line.long 0x4 "IO2IntEnF,GPIO 2 Interrupt Enable for Falling edge register" bitfld.long 0x4 31. " P2.31EF ,Enable Falling edge P2.31" "Disabled,Enabled" bitfld.long 0x4 30. " P2.30EF ,Enable Falling edge P2.30" "Disabled,Enabled" bitfld.long 0x4 29. " P2.29EF ,Enable Falling edge P2.29" "Disabled,Enabled" textline " " bitfld.long 0x4 28. " P2.28EF ,Enable Falling edge P2.28" "Disabled,Enabled" bitfld.long 0x4 27. " P2.27EF ,Enable Falling edge P2.27" "Disabled,Enabled" bitfld.long 0x4 26. " P2.26EF ,Enable Falling edge P2.26" "Disabled,Enabled" textline " " bitfld.long 0x4 25. " P2.25EF ,Enable Falling edge P2.25" "Disabled,Enabled" bitfld.long 0x4 24. " P2.24EF ,Enable Falling edge P2.24" "Disabled,Enabled" bitfld.long 0x4 23. " P2.23EF ,Enable Falling edge P2.23" "Disabled,Enabled" textline " " bitfld.long 0x4 22. " P2.22EF ,Enable Falling edge P2.22" "Disabled,Enabled" bitfld.long 0x4 21. " P2.21EF ,Enable Falling edge P2.21" "Disabled,Enabled" bitfld.long 0x4 20. " P2.20EF ,Enable Falling edge P2.20" "Disabled,Enabled" textline " " bitfld.long 0x4 19. " P2.19EF ,Enable Falling edge P2.19" "Disabled,Enabled" bitfld.long 0x4 18. " P2.18EF ,Enable Falling edge P2.18" "Disabled,Enabled" bitfld.long 0x4 17. " P2.17EF ,Enable Falling edge P2.17" "Disabled,Enabled" textline " " bitfld.long 0x4 16. " P2.16EF ,Enable Falling edge P2.16" "Disabled,Enabled" bitfld.long 0x4 15. " P2.15EF ,Enable Falling edge P2.15" "Disabled,Enabled" bitfld.long 0x4 14. " P2.14EF ,Enable Falling edge P2.14" "Disabled,Enabled" textline " " bitfld.long 0x4 13. " P2.13EF ,Enable Falling edge P2.13" "Disabled,Enabled" bitfld.long 0x4 12. " P2.12EF ,Enable Falling edge P2.12" "Disabled,Enabled" bitfld.long 0x4 11. " P2.11EF ,Enable Falling edge P2.11" "Disabled,Enabled" textline " " bitfld.long 0x4 10. " P2.10EF ,Enable Falling edge P2.10" "Disabled,Enabled" bitfld.long 0x4 9. " P2.9EF ,Enable Falling edge P2.9" "Disabled,Enabled" bitfld.long 0x4 8. " P2.8EF ,Enable Falling edge P2.8" "Disabled,Enabled" textline " " bitfld.long 0x4 7. " P2.7EF ,Enable Falling edge P2.7" "Disabled,Enabled" bitfld.long 0x4 6. " P2.6EF ,Enable Falling edge P2.6" "Disabled,Enabled" bitfld.long 0x4 5. " P2.5EF ,Enable Falling edge P2.5" "Disabled,Enabled" textline " " bitfld.long 0x4 4. " P2.4EF ,Enable Falling edge P2.4" "Disabled,Enabled" bitfld.long 0x4 3. " P2.3EF ,Enable Falling edge P2.3" "Disabled,Enabled" bitfld.long 0x4 2. " P2.2EF ,Enable Falling edge P2.2" "Disabled,Enabled" textline " " bitfld.long 0x4 1. " P2.1EF ,Enable Falling edge P2.1" "Disabled,Enabled" bitfld.long 0x4 0. " P2.0EF ,Enable Falling edge P2.0" "Disabled,Enabled" rgroup.long (0xB0-0x0C)++0x7 line.long 0x0 "IO2IntStatR,GPIO 2 Interrupt Status for Rising edge register" bitfld.long 0x0 31. " P2.31REI ,Rising Edge Interrupt status P2.31" "No interrupt,Interrupt" bitfld.long 0x0 30. " P2.30REI ,Rising Edge Interrupt status P2.30" "No interrupt,Interrupt" bitfld.long 0x0 29. " P2.29REI ,Rising Edge Interrupt status P2.29" "No interrupt,Interrupt" textline " " bitfld.long 0x0 28. " P2.28REI ,Rising Edge Interrupt status P2.28" "No interrupt,Interrupt" bitfld.long 0x0 27. " P2.27REI ,Rising Edge Interrupt status P2.27" "No interrupt,Interrupt" bitfld.long 0x0 26. " P2.26REI ,Rising Edge Interrupt status P2.26" "No interrupt,Interrupt" textline " " bitfld.long 0x0 25. " P2.25REI ,Rising Edge Interrupt status P2.25" "No interrupt,Interrupt" bitfld.long 0x0 24. " P2.24REI ,Rising Edge Interrupt status P2.24" "No interrupt,Interrupt" bitfld.long 0x0 23. " P2.23REI ,Rising Edge Interrupt status P2.23" "No interrupt,Interrupt" textline " " bitfld.long 0x0 22. " P2.22REI ,Rising Edge Interrupt status P2.22" "No interrupt,Interrupt" bitfld.long 0x0 21. " P2.21REI ,Rising Edge Interrupt status P2.21" "No interrupt,Interrupt" bitfld.long 0x0 20. " P2.20REI ,Rising Edge Interrupt status P2.20" "No interrupt,Interrupt" textline " " bitfld.long 0x0 19. " P2.19REI ,Rising Edge Interrupt status P2.19" "No interrupt,Interrupt" bitfld.long 0x0 18. " P2.18REI ,Rising Edge Interrupt status P2.18" "No interrupt,Interrupt" bitfld.long 0x0 17. " P2.17REI ,Rising Edge Interrupt status P2.17" "No interrupt,Interrupt" textline " " bitfld.long 0x0 16. " P2.16REI ,Rising Edge Interrupt status P2.16" "No interrupt,Interrupt" bitfld.long 0x0 15. " P2.15REI ,Rising Edge Interrupt status P2.15" "No interrupt,Interrupt" bitfld.long 0x0 14. " P2.14REI ,Rising Edge Interrupt status P2.14" "No interrupt,Interrupt" textline " " bitfld.long 0x0 13. " P2.13REI ,Rising Edge Interrupt status P2.13" "No interrupt,Interrupt" bitfld.long 0x0 12. " P2.12REI ,Rising Edge Interrupt status P2.12" "No interrupt,Interrupt" bitfld.long 0x0 11. " P2.11REI ,Rising Edge Interrupt status P2.11" "No interrupt,Interrupt" textline " " bitfld.long 0x0 10. " P2.10REI ,Rising Edge Interrupt status P2.10" "No interrupt,Interrupt" bitfld.long 0x0 9. " P2.9REI ,Rising Edge Interrupt status P2.9" "No interrupt,Interrupt" bitfld.long 0x0 8. " P2.8REI ,Rising Edge Interrupt status P2.8" "No interrupt,Interrupt" textline " " bitfld.long 0x0 7. " P2.7REI ,Rising Edge Interrupt status P2.7" "No interrupt,Interrupt" bitfld.long 0x0 6. " P2.6REI ,Rising Edge Interrupt status P2.6" "No interrupt,Interrupt" bitfld.long 0x0 5. " P2.5REI ,Rising Edge Interrupt status P2.5" "No interrupt,Interrupt" textline " " bitfld.long 0x0 4. " P2.4REI ,Rising Edge Interrupt status P2.4" "No interrupt,Interrupt" bitfld.long 0x0 3. " P2.3REI ,Rising Edge Interrupt status P2.3" "No interrupt,Interrupt" bitfld.long 0x0 2. " P2.2REI ,Rising Edge Interrupt status P2.2" "No interrupt,Interrupt" textline " " bitfld.long 0x0 1. " P2.1REI ,Rising Edge Interrupt status P2.1" "No interrupt,Interrupt" bitfld.long 0x0 0. " P2.0REI ,Rising Edge Interrupt status P2.0" "No interrupt,Interrupt" line.long 0x4 "IO2IntStatF,GPIO 2 Interrupt Status for Falling edge register" bitfld.long 0x4 31. " P2.31FEI ,Falling Edge Interrupt status P2.31" "No interrupt,Interrupt" bitfld.long 0x4 30. " P2.30FEI ,Falling Edge Interrupt status P2.30" "No interrupt,Interrupt" bitfld.long 0x4 29. " P2.29FEI ,Falling Edge Interrupt status P2.29" "No interrupt,Interrupt" textline " " bitfld.long 0x4 28. " P2.28FEI ,Falling Edge Interrupt status P2.28" "No interrupt,Interrupt" bitfld.long 0x4 27. " P2.27FEI ,Falling Edge Interrupt status P2.27" "No interrupt,Interrupt" bitfld.long 0x4 26. " P2.26FEI ,Falling Edge Interrupt status P2.26" "No interrupt,Interrupt" textline " " bitfld.long 0x4 25. " P2.25FEI ,Falling Edge Interrupt status P2.25" "No interrupt,Interrupt" bitfld.long 0x4 24. " P2.24FEI ,Falling Edge Interrupt status P2.24" "No interrupt,Interrupt" bitfld.long 0x4 23. " P2.23FEI ,Falling Edge Interrupt status P2.23" "No interrupt,Interrupt" textline " " bitfld.long 0x4 22. " P2.22FEI ,Falling Edge Interrupt status P2.22" "No interrupt,Interrupt" bitfld.long 0x4 21. " P2.21FEI ,Falling Edge Interrupt status P2.21" "No interrupt,Interrupt" bitfld.long 0x4 20. " P2.20FEI ,Falling Edge Interrupt status P2.20" "No interrupt,Interrupt" textline " " bitfld.long 0x4 19. " P2.19FEI ,Falling Edge Interrupt status P2.19" "No interrupt,Interrupt" bitfld.long 0x4 18. " P2.18FEI ,Falling Edge Interrupt status P2.18" "No interrupt,Interrupt" bitfld.long 0x4 17. " P2.17FEI ,Falling Edge Interrupt status P2.17" "No interrupt,Interrupt" textline " " bitfld.long 0x4 16. " P2.16FEI ,Falling Edge Interrupt status P2.16" "No interrupt,Interrupt" bitfld.long 0x4 15. " P2.15FEI ,Falling Edge Interrupt status P2.15" "No interrupt,Interrupt" bitfld.long 0x4 14. " P2.14FEI ,Falling Edge Interrupt status P2.14" "No interrupt,Interrupt" textline " " bitfld.long 0x4 13. " P2.13FEI ,Falling Edge Interrupt status P2.13" "No interrupt,Interrupt" bitfld.long 0x4 12. " P2.12FEI ,Falling Edge Interrupt status P2.12" "No interrupt,Interrupt" bitfld.long 0x4 11. " P2.11FEI ,Falling Edge Interrupt status P2.11" "No interrupt,Interrupt" textline " " bitfld.long 0x4 10. " P2.10FEI ,Falling Edge Interrupt status P2.10" "No interrupt,Interrupt" bitfld.long 0x4 9. " P2.9FEI ,Falling Edge Interrupt status P2.9" "No interrupt,Interrupt" bitfld.long 0x4 8. " P2.8FEI ,Falling Edge Interrupt status P2.8" "No interrupt,Interrupt" textline " " bitfld.long 0x4 7. " P2.7FEI ,Falling Edge Interrupt status P2.7" "No interrupt,Interrupt" bitfld.long 0x4 6. " P2.6FEI ,Falling Edge Interrupt status P2.6" "No interrupt,Interrupt" bitfld.long 0x4 5. " P2.5FEI ,Falling Edge Interrupt status P2.5" "No interrupt,Interrupt" textline " " bitfld.long 0x4 4. " P2.4FEI ,Falling Edge Interrupt status P2.4" "No interrupt,Interrupt" bitfld.long 0x4 3. " P2.3FEI ,Falling Edge Interrupt status P2.3" "No interrupt,Interrupt" bitfld.long 0x4 2. " P2.2FEI ,Falling Edge Interrupt status P2.2" "No interrupt,Interrupt" textline " " bitfld.long 0x4 1. " P2.1FEI ,Falling Edge Interrupt status P2.1" "No interrupt,Interrupt" bitfld.long 0x4 0. " P2.0FEI ,Falling Edge Interrupt status P2.0" "No interrupt,Interrupt" wgroup.long (0xB0-0x04)++0x3 line.long 0x0 "IO2IntClr,GPIO 2 Interrupt Clear register" bitfld.long 0x0 31. " P2.31CI ,Clear GPIO port Interrupt P2.31" "No effect,Clear" bitfld.long 0x0 30. " P2.30CI ,Clear GPIO port Interrupt P2.30" "No effect,Clear" bitfld.long 0x0 29. " P2.29CI ,Clear GPIO port Interrupt P2.29" "No effect,Clear" textline " " bitfld.long 0x0 28. " P2.28CI ,Clear GPIO port Interrupt P2.28" "No effect,Clear" bitfld.long 0x0 27. " P2.27CI ,Clear GPIO port Interrupt P2.27" "No effect,Clear" bitfld.long 0x0 26. " P2.26CI ,Clear GPIO port Interrupt P2.26" "No effect,Clear" textline " " bitfld.long 0x0 25. " P2.25CI ,Clear GPIO port Interrupt P2.25" "No effect,Clear" bitfld.long 0x0 24. " P2.24CI ,Clear GPIO port Interrupt P2.24" "No effect,Clear" bitfld.long 0x0 23. " P2.23CI ,Clear GPIO port Interrupt P2.23" "No effect,Clear" textline " " bitfld.long 0x0 22. " P2.22CI ,Clear GPIO port Interrupt P2.22" "No effect,Clear" bitfld.long 0x0 21. " P2.21CI ,Clear GPIO port Interrupt P2.21" "No effect,Clear" bitfld.long 0x0 20. " P2.20CI ,Clear GPIO port Interrupt P2.20" "No effect,Clear" textline " " bitfld.long 0x0 19. " P2.19CI ,Clear GPIO port Interrupt P2.19" "No effect,Clear" bitfld.long 0x0 18. " P2.18CI ,Clear GPIO port Interrupt P2.18" "No effect,Clear" bitfld.long 0x0 17. " P2.17CI ,Clear GPIO port Interrupt P2.17" "No effect,Clear" textline " " bitfld.long 0x0 16. " P2.16CI ,Clear GPIO port Interrupt P2.16" "No effect,Clear" bitfld.long 0x0 15. " P2.15CI ,Clear GPIO port Interrupt P2.15" "No effect,Clear" bitfld.long 0x0 14. " P2.14CI ,Clear GPIO port Interrupt P2.14" "No effect,Clear" textline " " bitfld.long 0x0 13. " P2.13CI ,Clear GPIO port Interrupt P2.13" "No effect,Clear" bitfld.long 0x0 12. " P2.12CI ,Clear GPIO port Interrupt P2.12" "No effect,Clear" bitfld.long 0x0 11. " P2.11CI ,Clear GPIO port Interrupt P2.11" "No effect,Clear" textline " " bitfld.long 0x0 10. " P2.10CI ,Clear GPIO port Interrupt P2.10" "No effect,Clear" bitfld.long 0x0 9. " P2.9CI ,Clear GPIO port Interrupt P2.9" "No effect,Clear" bitfld.long 0x0 8. " P2.8CI ,Clear GPIO port Interrupt P2.8" "No effect,Clear" textline " " bitfld.long 0x0 7. " P2.7CI ,Clear GPIO port Interrupt P2.7" "No effect,Clear" bitfld.long 0x0 6. " P2.6CI ,Clear GPIO port Interrupt P2.6" "No effect,Clear" bitfld.long 0x0 5. " P2.5CI ,Clear GPIO port Interrupt P2.5" "No effect,Clear" textline " " bitfld.long 0x0 4. " P2.4CI ,Clear GPIO port Interrupt P2.4" "No effect,Clear" bitfld.long 0x0 3. " P2.3CI ,Clear GPIO port Interrupt P2.3" "No effect,Clear" bitfld.long 0x0 2. " P2.2CI ,Clear GPIO port Interrupt P2.2" "No effect,Clear" textline " " bitfld.long 0x0 1. " P2.1CI ,Clear GPIO port Interrupt P2.1" "No effect,Clear" bitfld.long 0x0 0. " P2.0CI ,Clear GPIO port Interrupt P2.0" "No effect,Clear" width 0xB tree.end tree "Port 3" base ad:0x20098000 width 14. group.long 0x60++0x03 line.long 0x00 "FIO3DIR,Fast GPIO port 3 Direction register" bitfld.long 0x00 31. " DIR3.31 ,Pin 3.31 Direction" "Input,Output" bitfld.long 0x00 30. " DIR3.30 ,Pin 3.30 Direction" "Input,Output" bitfld.long 0x00 29. " DIR3.29 ,Pin 3.29 Direction" "Input,Output" textline " " bitfld.long 0x00 28. " DIR3.28 ,Pin 3.28 Direction" "Input,Output" bitfld.long 0x00 27. " DIR3.27 ,Pin 3.27 Direction" "Input,Output" bitfld.long 0x00 26. " DIR3.26 ,Pin 3.26 Direction" "Input,Output" textline " " bitfld.long 0x00 25. " DIR3.25 ,Pin 3.25 Direction" "Input,Output" bitfld.long 0x00 24. " DIR3.24 ,Pin 3.24 Direction" "Input,Output" bitfld.long 0x00 23. " DIR3.23 ,Pin 3.23 Direction" "Input,Output" textline " " bitfld.long 0x00 22. " DIR3.22 ,Pin 3.22 Direction" "Input,Output" bitfld.long 0x00 21. " DIR3.21 ,Pin 3.21 Direction" "Input,Output" bitfld.long 0x00 20. " DIR3.20 ,Pin 3.20 Direction" "Input,Output" textline " " bitfld.long 0x00 19. " DIR3.19 ,Pin 3.19 Direction" "Input,Output" bitfld.long 0x00 18. " DIR3.18 ,Pin 3.18 Direction" "Input,Output" bitfld.long 0x00 17. " DIR3.17 ,Pin 3.17 Direction" "Input,Output" textline " " bitfld.long 0x00 16. " DIR3.16 ,Pin 3.16 Direction" "Input,Output" bitfld.long 0x00 15. " DIR3.15 ,Pin 3.15 Direction" "Input,Output" bitfld.long 0x00 14. " DIR3.14 ,Pin 3.14 Direction" "Input,Output" textline " " bitfld.long 0x00 13. " DIR3.13 ,Pin 3.13 Direction" "Input,Output" bitfld.long 0x00 12. " DIR3.12 ,Pin 3.12 Direction" "Input,Output" bitfld.long 0x00 11. " DIR3.11 ,Pin 3.11 Direction" "Input,Output" textline " " bitfld.long 0x00 10. " DIR3.10 ,Pin 3.10 Direction" "Input,Output" bitfld.long 0x00 9. " DIR3.9 ,Pin 3.9 Direction" "Input,Output" bitfld.long 0x00 8. " DIR3.8 ,Pin 3.8 Direction" "Input,Output" textline " " bitfld.long 0x00 7. " DIR3.7 ,Pin 3.7 Direction" "Input,Output" bitfld.long 0x00 6. " DIR3.6 ,Pin 3.6 Direction" "Input,Output" bitfld.long 0x00 5. " DIR3.5 ,Pin 3.5 Direction" "Input,Output" textline " " bitfld.long 0x00 4. " DIR3.4 ,Pin 3.5 Direction" "Input,Output" bitfld.long 0x00 3. " DIR3.3 ,Pin 3.3 Direction" "Input,Output" bitfld.long 0x00 2. " DIR3.2 ,Pin 3.2 Direction" "Input,Output" textline " " bitfld.long 0x00 1. " DIR3.1 ,Pin 3.1 Direction" "Input,Output" bitfld.long 0x00 0. " DIR3.0 ,Pin 3.0 Direction" "Input,Output" group.long (0x60+0x10)++0x03 line.long 0x00 "FIO3MASK,Fast GPIO port 3 Mask register" bitfld.long 0x00 31. " MASK3.31 ,Pin 3.31 Access Control" "Not masked,Masked" bitfld.long 0x00 30. " MASK3.30 ,Pin 3.30 Access Control" "Not masked,Masked" bitfld.long 0x00 29. " MASK3.29 ,Pin 3.29 Access Control" "Not masked,Masked" textline " " bitfld.long 0x00 28. " MASK3.28 ,Pin 3.28 Access Control" "Not masked,Masked" bitfld.long 0x00 27. " MASK3.27 ,Pin 3.27 Access Control" "Not masked,Masked" bitfld.long 0x00 26. " MASK3.26 ,Pin 3.26 Access Control" "Not masked,Masked" textline " " bitfld.long 0x00 25. " MASK3.25 ,Pin 3.25 Access Control" "Not masked,Masked" bitfld.long 0x00 24. " MASK3.24 ,Pin 3.24 Access Control" "Not masked,Masked" bitfld.long 0x00 23. " MASK3.23 ,Pin 3.23 Access Control" "Not masked,Masked" textline " " bitfld.long 0x00 22. " MASK3.22 ,Pin 3.22 Access Control" "Not masked,Masked" bitfld.long 0x00 21. " MASK3.21 ,Pin 3.21 Access Control" "Not masked,Masked" bitfld.long 0x00 20. " MASK3.20 ,Pin 3.20 Access Control" "Not masked,Masked" textline " " bitfld.long 0x00 19. " MASK3.19 ,Pin 3.19 Access Control" "Not masked,Masked" bitfld.long 0x00 18. " MASK3.18 ,Pin 3.18 Access Control" "Not masked,Masked" bitfld.long 0x00 17. " MASK3.17 ,Pin 3.17 Access Control" "Not masked,Masked" textline " " bitfld.long 0x00 16. " MASK3.16 ,Pin 3.16 Access Control" "Not masked,Masked" bitfld.long 0x00 15. " MASK3.15 ,Pin 3.15 Access Control" "Not masked,Masked" bitfld.long 0x00 14. " MASK3.14 ,Pin 3.14 Access Control" "Not masked,Masked" textline " " bitfld.long 0x00 13. " MASK3.13 ,Pin 3.13 Access Control" "Not masked,Masked" bitfld.long 0x00 12. " MASK3.12 ,Pin 3.12 Access Control" "Not masked,Masked" bitfld.long 0x00 11. " MASK3.11 ,Pin 3.11 Access Control" "Not masked,Masked" textline " " bitfld.long 0x00 10. " MASK3.10 ,Pin 3.10 Access Control" "Not masked,Masked" bitfld.long 0x00 9. " MASK3.9 ,Pin 3.9 Access Control" "Not masked,Masked" bitfld.long 0x00 8. " MASK3.8 ,Pin 3.8 Access Control" "Not masked,Masked" textline " " bitfld.long 0x00 7. " MASK3.7 ,Pin 3.7 Access Control" "Not masked,Masked" bitfld.long 0x00 6. " MASK3.6 ,Pin 3.6 Access Control" "Not masked,Masked" bitfld.long 0x00 5. " MASK3.5 ,Pin 3.5 Access Control" "Not masked,Masked" textline " " bitfld.long 0x00 4. " MASK3.4 ,Pin 3.4 Access Control" "Not masked,Masked" bitfld.long 0x00 3. " MASK3.3 ,Pin 3.3 Access Control" "Not masked,Masked" bitfld.long 0x00 2. " MASK3.2 ,Pin 3.2 Access Control" "Not masked,Masked" textline " " bitfld.long 0x00 1. " MASK3.1 ,Pin 3.1 Access Control" "Not masked,Masked" bitfld.long 0x00 0. " MASK3.0 ,Pin 3.0 Access Control" "Not masked,Masked" group.long (0x60+0x14)++0x03 line.long 0x00 "FIO3PIN,Fast GPIO Port 0 Pin Value Register" setclrfld.long 0x00 31. 0x04 31. 0x08 31. " Pin3.31_set/clr ,Pin 3.31 Value" "Low,High" setclrfld.long 0x00 30. 0x04 30. 0x08 30. " Pin3.30_set/clr ,Pin 3.30 Value" "Low,High" setclrfld.long 0x00 29. 0x04 29. 0x08 29. " Pin3.29_set/clr ,Pin 3.29 Value" "Low,High" textline " " setclrfld.long 0x00 28. 0x04 28. 0x08 28. " Pin3.28_set/clr ,Pin 3.28 Value" "Low,High" setclrfld.long 0x00 27. 0x04 27. 0x08 27. " Pin3.27_set/clr ,Pin 3.27 Value" "Low,High" setclrfld.long 0x00 26. 0x04 26. 0x08 26. " Pin3.26_set/clr ,Pin 3.26 Value" "Low,High" textline " " setclrfld.long 0x00 25. 0x04 25. 0x08 25. " Pin3.25_set/clr ,Pin 3.25 Value" "Low,High" setclrfld.long 0x00 24. 0x04 24. 0x08 24. " Pin3.24_set/clr ,Pin 3.24 Value" "Low,High" setclrfld.long 0x00 23. 0x04 23. 0x08 23. " Pin3.23_set/clr ,Pin 3.23 Value" "Low,High" textline " " setclrfld.long 0x00 22. 0x04 22. 0x08 22. " Pin3.22_set/clr ,Pin 3.22 Value" "Low,High" setclrfld.long 0x00 21. 0x04 21. 0x08 21. " Pin3.21_set/clr ,Pin 3.21 Value" "Low,High" setclrfld.long 0x00 20. 0x04 20. 0x08 20. " Pin3.20_set/clr ,Pin 3.20 Value" "Low,High" textline " " setclrfld.long 0x00 19. 0x04 19. 0x08 19. " Pin3.19_set/clr ,Pin 3.19 Value" "Low,High" setclrfld.long 0x00 18. 0x04 18. 0x08 18. " Pin3.18_set/clr ,Pin 3.18 Value" "Low,High" setclrfld.long 0x00 17. 0x04 17. 0x08 17. " Pin3.17_set/clr ,Pin 3.17 Value" "Low,High" textline " " setclrfld.long 0x00 16. 0x04 16. 0x08 16. " Pin3.16_set/clr ,Pin 3.16 Value" "Low,High" setclrfld.long 0x00 15. 0x04 15. 0x08 15. " Pin3.15_set/clr ,Pin 3.15 Value" "Low,High" setclrfld.long 0x00 14. 0x04 14. 0x08 14. " Pin3.14_set/clr ,Pin 3.14 Value" "Low,High" textline " " setclrfld.long 0x00 13. 0x04 13. 0x08 13. " Pin3.13_set/clr ,Pin 3.13 Value" "Low,High" setclrfld.long 0x00 12. 0x04 12. 0x08 12. " Pin3.12_set/clr ,Pin 3.12 Value" "Low,High" setclrfld.long 0x00 11. 0x04 11. 0x08 11. " Pin3.11_set/clr ,Pin 3.11 Value" "Low,High" textline " " setclrfld.long 0x00 10. 0x04 10. 0x08 10. " Pin3.10_set/clr ,Pin 3.10 Value" "Low,High" setclrfld.long 0x00 9. 0x04 9. 0x08 9. " Pin3.9_set/clr ,Pin 3.9 Value" "Low,High" setclrfld.long 0x00 8. 0x04 8. 0x08 8. " Pin3.8_set/clr ,Pin 3.8 Value" "Low,High" textline " " setclrfld.long 0x00 7. 0x04 7. 0x08 7. " Pin3.7_set/clr ,Pin 3.7 Value" "Low,High" setclrfld.long 0x00 6. 0x04 6. 0x08 6. " Pin3.6_set/clr ,Pin 3.6 Value" "Low,High" setclrfld.long 0x00 5. 0x04 5. 0x08 5. " Pin3.5_set/clr ,Pin 3.5 Value" "Low,High" textline " " setclrfld.long 0x00 4. 0x04 4. 0x08 4. " Pin3.4_set/clr ,Pin 3.4 Value" "Low,High" setclrfld.long 0x00 3. 0x04 3. 0x08 3. " Pin3.3_set/clr ,Pin 3.3 Value" "Low,High" setclrfld.long 0x00 2. 0x04 2. 0x08 2. " Pin3.2_set/clr ,Pin 3.2 Value" "Low,High" textline " " setclrfld.long 0x00 1. 0x04 1. 0x08 1. " Pin3.1_set/clr ,Pin 3.1 Value" "Low,High" setclrfld.long 0x00 0. 0x04 0. 0x08 0. " Pin3.0_set/clr ,Pin 3.0 Value" "Low,High" width 0xB tree.end tree "Port 4" base ad:0x20098000 width 14. group.long 0x80++0x03 line.long 0x00 "FIO4DIR,Fast GPIO port 4 Direction register" bitfld.long 0x00 31. " DIR4.31 ,Pin 4.31 Direction" "Input,Output" bitfld.long 0x00 30. " DIR4.30 ,Pin 4.30 Direction" "Input,Output" bitfld.long 0x00 29. " DIR4.29 ,Pin 4.29 Direction" "Input,Output" textline " " bitfld.long 0x00 28. " DIR4.28 ,Pin 4.28 Direction" "Input,Output" bitfld.long 0x00 27. " DIR4.27 ,Pin 4.27 Direction" "Input,Output" bitfld.long 0x00 26. " DIR4.26 ,Pin 4.26 Direction" "Input,Output" textline " " bitfld.long 0x00 25. " DIR4.25 ,Pin 4.25 Direction" "Input,Output" bitfld.long 0x00 24. " DIR4.24 ,Pin 4.24 Direction" "Input,Output" bitfld.long 0x00 23. " DIR4.23 ,Pin 4.23 Direction" "Input,Output" textline " " bitfld.long 0x00 22. " DIR4.22 ,Pin 4.22 Direction" "Input,Output" bitfld.long 0x00 21. " DIR4.21 ,Pin 4.21 Direction" "Input,Output" bitfld.long 0x00 20. " DIR4.20 ,Pin 4.20 Direction" "Input,Output" textline " " bitfld.long 0x00 19. " DIR4.19 ,Pin 4.19 Direction" "Input,Output" bitfld.long 0x00 18. " DIR4.18 ,Pin 4.18 Direction" "Input,Output" bitfld.long 0x00 17. " DIR4.17 ,Pin 4.17 Direction" "Input,Output" textline " " bitfld.long 0x00 16. " DIR4.16 ,Pin 4.16 Direction" "Input,Output" bitfld.long 0x00 15. " DIR4.15 ,Pin 4.15 Direction" "Input,Output" bitfld.long 0x00 14. " DIR4.14 ,Pin 4.14 Direction" "Input,Output" textline " " bitfld.long 0x00 13. " DIR4.13 ,Pin 4.13 Direction" "Input,Output" bitfld.long 0x00 12. " DIR4.12 ,Pin 4.12 Direction" "Input,Output" bitfld.long 0x00 11. " DIR4.11 ,Pin 4.11 Direction" "Input,Output" textline " " bitfld.long 0x00 10. " DIR4.10 ,Pin 4.10 Direction" "Input,Output" bitfld.long 0x00 9. " DIR4.9 ,Pin 4.9 Direction" "Input,Output" bitfld.long 0x00 8. " DIR4.8 ,Pin 4.8 Direction" "Input,Output" textline " " bitfld.long 0x00 7. " DIR4.7 ,Pin 4.7 Direction" "Input,Output" bitfld.long 0x00 6. " DIR4.6 ,Pin 4.6 Direction" "Input,Output" bitfld.long 0x00 5. " DIR4.5 ,Pin 4.5 Direction" "Input,Output" textline " " bitfld.long 0x00 4. " DIR4.4 ,Pin 4.5 Direction" "Input,Output" bitfld.long 0x00 3. " DIR4.3 ,Pin 4.3 Direction" "Input,Output" bitfld.long 0x00 2. " DIR4.2 ,Pin 4.2 Direction" "Input,Output" textline " " bitfld.long 0x00 1. " DIR4.1 ,Pin 4.1 Direction" "Input,Output" bitfld.long 0x00 0. " DIR4.0 ,Pin 4.0 Direction" "Input,Output" group.long (0x80+0x10)++0x03 line.long 0x00 "FIO4MASK,Fast GPIO port 4 Mask register" bitfld.long 0x00 31. " MASK4.31 ,Pin 4.31 Access Control" "Not masked,Masked" bitfld.long 0x00 30. " MASK4.30 ,Pin 4.30 Access Control" "Not masked,Masked" bitfld.long 0x00 29. " MASK4.29 ,Pin 4.29 Access Control" "Not masked,Masked" textline " " bitfld.long 0x00 28. " MASK4.28 ,Pin 4.28 Access Control" "Not masked,Masked" bitfld.long 0x00 27. " MASK4.27 ,Pin 4.27 Access Control" "Not masked,Masked" bitfld.long 0x00 26. " MASK4.26 ,Pin 4.26 Access Control" "Not masked,Masked" textline " " bitfld.long 0x00 25. " MASK4.25 ,Pin 4.25 Access Control" "Not masked,Masked" bitfld.long 0x00 24. " MASK4.24 ,Pin 4.24 Access Control" "Not masked,Masked" bitfld.long 0x00 23. " MASK4.23 ,Pin 4.23 Access Control" "Not masked,Masked" textline " " bitfld.long 0x00 22. " MASK4.22 ,Pin 4.22 Access Control" "Not masked,Masked" bitfld.long 0x00 21. " MASK4.21 ,Pin 4.21 Access Control" "Not masked,Masked" bitfld.long 0x00 20. " MASK4.20 ,Pin 4.20 Access Control" "Not masked,Masked" textline " " bitfld.long 0x00 19. " MASK4.19 ,Pin 4.19 Access Control" "Not masked,Masked" bitfld.long 0x00 18. " MASK4.18 ,Pin 4.18 Access Control" "Not masked,Masked" bitfld.long 0x00 17. " MASK4.17 ,Pin 4.17 Access Control" "Not masked,Masked" textline " " bitfld.long 0x00 16. " MASK4.16 ,Pin 4.16 Access Control" "Not masked,Masked" bitfld.long 0x00 15. " MASK4.15 ,Pin 4.15 Access Control" "Not masked,Masked" bitfld.long 0x00 14. " MASK4.14 ,Pin 4.14 Access Control" "Not masked,Masked" textline " " bitfld.long 0x00 13. " MASK4.13 ,Pin 4.13 Access Control" "Not masked,Masked" bitfld.long 0x00 12. " MASK4.12 ,Pin 4.12 Access Control" "Not masked,Masked" bitfld.long 0x00 11. " MASK4.11 ,Pin 4.11 Access Control" "Not masked,Masked" textline " " bitfld.long 0x00 10. " MASK4.10 ,Pin 4.10 Access Control" "Not masked,Masked" bitfld.long 0x00 9. " MASK4.9 ,Pin 4.9 Access Control" "Not masked,Masked" bitfld.long 0x00 8. " MASK4.8 ,Pin 4.8 Access Control" "Not masked,Masked" textline " " bitfld.long 0x00 7. " MASK4.7 ,Pin 4.7 Access Control" "Not masked,Masked" bitfld.long 0x00 6. " MASK4.6 ,Pin 4.6 Access Control" "Not masked,Masked" bitfld.long 0x00 5. " MASK4.5 ,Pin 4.5 Access Control" "Not masked,Masked" textline " " bitfld.long 0x00 4. " MASK4.4 ,Pin 4.4 Access Control" "Not masked,Masked" bitfld.long 0x00 3. " MASK4.3 ,Pin 4.3 Access Control" "Not masked,Masked" bitfld.long 0x00 2. " MASK4.2 ,Pin 4.2 Access Control" "Not masked,Masked" textline " " bitfld.long 0x00 1. " MASK4.1 ,Pin 4.1 Access Control" "Not masked,Masked" bitfld.long 0x00 0. " MASK4.0 ,Pin 4.0 Access Control" "Not masked,Masked" group.long (0x80+0x14)++0x03 line.long 0x00 "FIO4PIN,Fast GPIO Port 0 Pin Value Register" setclrfld.long 0x00 31. 0x04 31. 0x08 31. " Pin4.31_set/clr ,Pin 4.31 Value" "Low,High" setclrfld.long 0x00 30. 0x04 30. 0x08 30. " Pin4.30_set/clr ,Pin 4.30 Value" "Low,High" setclrfld.long 0x00 29. 0x04 29. 0x08 29. " Pin4.29_set/clr ,Pin 4.29 Value" "Low,High" textline " " setclrfld.long 0x00 28. 0x04 28. 0x08 28. " Pin4.28_set/clr ,Pin 4.28 Value" "Low,High" setclrfld.long 0x00 27. 0x04 27. 0x08 27. " Pin4.27_set/clr ,Pin 4.27 Value" "Low,High" setclrfld.long 0x00 26. 0x04 26. 0x08 26. " Pin4.26_set/clr ,Pin 4.26 Value" "Low,High" textline " " setclrfld.long 0x00 25. 0x04 25. 0x08 25. " Pin4.25_set/clr ,Pin 4.25 Value" "Low,High" setclrfld.long 0x00 24. 0x04 24. 0x08 24. " Pin4.24_set/clr ,Pin 4.24 Value" "Low,High" setclrfld.long 0x00 23. 0x04 23. 0x08 23. " Pin4.23_set/clr ,Pin 4.23 Value" "Low,High" textline " " setclrfld.long 0x00 22. 0x04 22. 0x08 22. " Pin4.22_set/clr ,Pin 4.22 Value" "Low,High" setclrfld.long 0x00 21. 0x04 21. 0x08 21. " Pin4.21_set/clr ,Pin 4.21 Value" "Low,High" setclrfld.long 0x00 20. 0x04 20. 0x08 20. " Pin4.20_set/clr ,Pin 4.20 Value" "Low,High" textline " " setclrfld.long 0x00 19. 0x04 19. 0x08 19. " Pin4.19_set/clr ,Pin 4.19 Value" "Low,High" setclrfld.long 0x00 18. 0x04 18. 0x08 18. " Pin4.18_set/clr ,Pin 4.18 Value" "Low,High" setclrfld.long 0x00 17. 0x04 17. 0x08 17. " Pin4.17_set/clr ,Pin 4.17 Value" "Low,High" textline " " setclrfld.long 0x00 16. 0x04 16. 0x08 16. " Pin4.16_set/clr ,Pin 4.16 Value" "Low,High" setclrfld.long 0x00 15. 0x04 15. 0x08 15. " Pin4.15_set/clr ,Pin 4.15 Value" "Low,High" setclrfld.long 0x00 14. 0x04 14. 0x08 14. " Pin4.14_set/clr ,Pin 4.14 Value" "Low,High" textline " " setclrfld.long 0x00 13. 0x04 13. 0x08 13. " Pin4.13_set/clr ,Pin 4.13 Value" "Low,High" setclrfld.long 0x00 12. 0x04 12. 0x08 12. " Pin4.12_set/clr ,Pin 4.12 Value" "Low,High" setclrfld.long 0x00 11. 0x04 11. 0x08 11. " Pin4.11_set/clr ,Pin 4.11 Value" "Low,High" textline " " setclrfld.long 0x00 10. 0x04 10. 0x08 10. " Pin4.10_set/clr ,Pin 4.10 Value" "Low,High" setclrfld.long 0x00 9. 0x04 9. 0x08 9. " Pin4.9_set/clr ,Pin 4.9 Value" "Low,High" setclrfld.long 0x00 8. 0x04 8. 0x08 8. " Pin4.8_set/clr ,Pin 4.8 Value" "Low,High" textline " " setclrfld.long 0x00 7. 0x04 7. 0x08 7. " Pin4.7_set/clr ,Pin 4.7 Value" "Low,High" setclrfld.long 0x00 6. 0x04 6. 0x08 6. " Pin4.6_set/clr ,Pin 4.6 Value" "Low,High" setclrfld.long 0x00 5. 0x04 5. 0x08 5. " Pin4.5_set/clr ,Pin 4.5 Value" "Low,High" textline " " setclrfld.long 0x00 4. 0x04 4. 0x08 4. " Pin4.4_set/clr ,Pin 4.4 Value" "Low,High" setclrfld.long 0x00 3. 0x04 3. 0x08 3. " Pin4.3_set/clr ,Pin 4.3 Value" "Low,High" setclrfld.long 0x00 2. 0x04 2. 0x08 2. " Pin4.2_set/clr ,Pin 4.2 Value" "Low,High" textline " " setclrfld.long 0x00 1. 0x04 1. 0x08 1. " Pin4.1_set/clr ,Pin 4.1 Value" "Low,High" setclrfld.long 0x00 0. 0x04 0. 0x08 0. " Pin4.0_set/clr ,Pin 4.0 Value" "Low,High" width 0xB tree.end tree "Port 5" base ad:0x20098000 width 14. group.long 0xA0++0x03 line.long 0x00 "FIO5DIR,Fast GPIO port 5 Direction register" bitfld.long 0x00 4. " DIR5.4 ,Pin 5.5 Direction" "Input,Output" bitfld.long 0x00 3. " DIR5.3 ,Pin 5.3 Direction" "Input,Output" bitfld.long 0x00 2. " DIR5.2 ,Pin 5.2 Direction" "Input,Output" textline " " bitfld.long 0x00 1. " DIR5.1 ,Pin 5.1 Direction" "Input,Output" bitfld.long 0x00 0. " DIR5.0 ,Pin 5.0 Direction" "Input,Output" group.long (0xA0+0x10)++0x03 line.long 0x00 "FIO5MASK,Fast GPIO port 5 Mask register" bitfld.long 0x00 4. " MASK5.4 ,Pin 5.4 Access Control" "Not masked,Masked" bitfld.long 0x00 3. " MASK5.3 ,Pin 5.3 Access Control" "Not masked,Masked" bitfld.long 0x00 2. " MASK5.2 ,Pin 5.2 Access Control" "Not masked,Masked" textline " " bitfld.long 0x00 1. " MASK5.1 ,Pin 5.1 Access Control" "Not masked,Masked" bitfld.long 0x00 0. " MASK5.0 ,Pin 5.0 Access Control" "Not masked,Masked" group.long (0xA0+0x14)++0x03 line.long 0x00 "FIO5PIN,Fast GPIO Port 0 Pin Value Register" setclrfld.long 0x00 4. 0x04 4. 0x08 4. " Pin5.4_set/clr ,Pin 5.4 Value" "Low,High" setclrfld.long 0x00 3. 0x04 3. 0x08 3. " Pin5.3_set/clr ,Pin 5.3 Value" "Low,High" setclrfld.long 0x00 2. 0x04 2. 0x08 2. " Pin5.2_set/clr ,Pin 5.2 Value" "Low,High" textline " " setclrfld.long 0x00 1. 0x04 1. 0x08 1. " Pin5.1_set/clr ,Pin 5.1 Value" "Low,High" setclrfld.long 0x00 0. 0x04 0. 0x08 0. " Pin5.0_set/clr ,Pin 5.0 Value" "Low,High" width 0xB tree.end tree "GPIO overall Interrupt Status" base ad:0x40028000 width 14. rgroup.long 0x80++0x3 line.long 0x0 "IOIntStatus,GPIO overall Interrupt Status" bitfld.long 0x0 2. " P2Int ,PORT2 GPIO interrupt pending" "No interrupt,Interrupt" bitfld.long 0x0 0. " P0Int ,PORT0 GPIO interrupt pending" "No interrupt,Interrupt" width 0xB tree.end endif tree.end sif (cpu()=="LPC1772"||cpu()=="LPC1774"||cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778"||cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788") tree "EMC (External Memory Controller)" base ad:0x2009C000 width 16. group.long 0x00++0x3 line.long 0x00 "CONTROL,EMC Control register" bitfld.long 0x0 2. " L ,Low-power mode" "Normal,Low-power" bitfld.long 0x0 1. " M ,Address mirror" "Normal memory map,Reset memory map" textline " " bitfld.long 0x0 0. " E ,EMC Enable" "Disabled,Enabled" rgroup.long 0x04++0x3 line.long 0x00 "STATUS,EMC Status register" bitfld.long 0x00 2. " SA ,Self-refresh acknowledge" "Normal,Self-refresh" bitfld.long 0x00 1. " S ,Write buffer status" "Empty,Not empty" textline " " bitfld.long 0x00 0. " B ,Busy" "Not busy,Busy" group.long 0x08++0x3 line.long 0x00 "CONFIG,EMC Configuration register" sif cpuis("LPC407?*")||cpuis("LPC408?*") bitfld.long 0x00 8. " CR ,CLKOUT[1:0] ratio" "1:1,1:2" bitfld.long 0x00 0. " EM ,Endian mode" "Little,Big" elif cpuis("LPC181*")||cpuis("LPC182*")||cpuis("LPC183*")||cpuis("LPC185*")||cpuis("LPC43*") bitfld.long 0x00 0. " EM ,Endian mode" "Little,Big" else bitfld.long 0x00 8. " CCLK ,CLKOUT[1:0] ratio" "1:1,1:2" bitfld.long 0x00 0. " Endian ,Endian mode" "Little,Big" endif group.long 0x20++0xB line.long 0x00 "DC,Dynamic Memory Control register" sif (!cpuis("LPC181*")&&!cpuis("LPC182*")&&!cpuis("LPC183*")&&!cpuis("LPC185*"))&&!cpuis("LPC407?*")&&!cpuis("LPC408?*")&&!cpuis("LPC43*")&&!cpuis("LPC546*") bitfld.long 0x00 13. " DP ,Low-power SDRAM deep-sleep mode" "Normal,Deep-sleep" textline " " endif bitfld.long 0x00 7.--8. " I ,SDRAM initialization" "SDRAM NORMAL,SDRAM MODE,SDRAM PALL,SDRAM NOP" bitfld.long 0x00 5. " MMC ,Memory clock control" "Enabled,Disabled" textline " " bitfld.long 0x00 2. " SR ,Self-refresh request" "Normal,Self-refresh" bitfld.long 0x00 1. " CS ,Dynamic memory clock control" "Stopped,Runned" textline " " bitfld.long 0x00 0. " CE ,Dynamic memory clock enable" "Power-save enabled,All clock enabled" line.long 0x04 "DR,Dynamic Memory Refresh Timer register" hexmask.long.word 0x04 0.--10. 1. " REFRESH ,Indicates the multiple of 16 CCLKs between SDRAM refresh cycles" line.long 0x08 "DRC,Dynamic Memory Read Configuration register" sif cpuis("LPC181*")||cpuis("LPC182*")||cpuis("LPC183*")||cpuis("LPC185*")||cpuis("LPC43*")||cpuis("LPC546*") bitfld.long 0x08 0.--1. " RD ,Read data strategy" ",Command delayed,Command delayed +1 clock cycle,Command delayed +2 clock cycles" else bitfld.long 0x08 0.--1. " RD ,Read data strategy" "Clock out delayed,Command delayed,Command delayed +1 clock cycle,Command delayed +2 clock cycles" endif group.long 0x30++0x2B line.long 0x00 "DTRP,Dynamic Memory Precharge Command Period register" bitfld.long 0x00 0.--3. " TRP ,Precharge command period" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" line.long 0x04 "DTRAS,Dynamic Memory Active to Precharge Command Period register" bitfld.long 0x04 0.--3. " TRAS ,Active to precharge command period" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" line.long 0x08 "DTSREX,Dynamic Memory Self-refresh Exit Time register" bitfld.long 0x08 0.--3. " TSREX ,Self-refresh exit time" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" line.long 0x0C "DTAPR,Dynamic Memory Last Data Out to Active Time register" bitfld.long 0x0C 0.--3. " TAPR ,Last-data-out to active command time" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" line.long 0x10 "DTDAL,Dynamic Memory Data-in to Active Command Time register" bitfld.long 0x10 0.--3. " TDAL ,Data-in to active command" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" line.long 0x14 "DTWR,Dynamic Memory Write Recovery Time register" bitfld.long 0x14 0.--3. " TWR ,Write recovery time" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" line.long 0x18 "DTRC,Dynamic Memory Active to Active Command Period register" bitfld.long 0x18 0.--4. " TRC ,Active to active command period" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" line.long 0x1C "DTRFC,Dynamic Memory Auto-refresh Period register" bitfld.long 0x1C 0.--4. " TRFC ,Auto-refresh period and auto-refresh to active command period" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" line.long 0x20 "DTXSR,Dynamic Memory Exit Self-refresh register" bitfld.long 0x20 0.--4. " TXSR ,Exit self-refresh to active command time" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" line.long 0x24 "DTRRD,Dynamic Memory Active Bank A to Active Bank B Time register" bitfld.long 0x24 0.--3. " TRRD ,Active bank A to active bank B latency" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" line.long 0x28 "DTMRD,Dynamic Memory Load Mode register to Active Command Time" bitfld.long 0x28 0.--3. " TMRD ,Load mode register to active command time" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" group.long 0x80++0x03 line.long 0x00 "SEW,Static Memory Extended Wait register" hexmask.long.word 0x00 0.--9. 1. " EXTENDEDWAIT ,Extended wait time out" sif !cpuis("LPC407?FBD144")&&!cpuis("LPC408?FBD144") group.long 0x100++0x07 "Dynamic Memory EMC 0" line.long 0x00 "DCONFIG0,Dynamic Memory Configuration register" bitfld.long 0x00 20. " P ,Write protect" "Not protected,Protected" bitfld.long 0x00 19. " B ,Buffer enable" "Disabled,Enabled" bitfld.long 0x00 14. " AM[14] ,Address mapping(bus length)" "16 bit,32 bit" bitfld.long 0x00 7.--12. " AM[12-7] ,Address mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 3.--4. " MD ,Memory device" "SDRAM,Low-power SDRAM,?..." line.long 0x04 "DRASCAS0,Dynamic Memory RAS & CAS Delay register" bitfld.long 0x04 8.--9. " CAS ,CAS latency" ",1,2,3" bitfld.long 0x04 0.--1. " RAS ,RAS latency" ",1,2,3" group.long 0x120++0x07 "Dynamic Memory EMC 1" line.long 0x00 "DCONFIG1,Dynamic Memory Configuration register" bitfld.long 0x00 20. " P ,Write protect" "Not protected,Protected" bitfld.long 0x00 19. " B ,Buffer enable" "Disabled,Enabled" bitfld.long 0x00 14. " AM[14] ,Address mapping(bus length)" "16 bit,32 bit" bitfld.long 0x00 7.--12. " AM[12-7] ,Address mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 3.--4. " MD ,Memory device" "SDRAM,Low-power SDRAM,?..." line.long 0x04 "DRASCAS1,Dynamic Memory RAS & CAS Delay register" bitfld.long 0x04 8.--9. " CAS ,CAS latency" ",1,2,3" bitfld.long 0x04 0.--1. " RAS ,RAS latency" ",1,2,3" group.long 0x140++0x07 "Dynamic Memory EMC 2" line.long 0x00 "DCONFIG2,Dynamic Memory Configuration register" bitfld.long 0x00 20. " P ,Write protect" "Not protected,Protected" bitfld.long 0x00 19. " B ,Buffer enable" "Disabled,Enabled" bitfld.long 0x00 14. " AM[14] ,Address mapping(bus length)" "16 bit,32 bit" bitfld.long 0x00 7.--12. " AM[12-7] ,Address mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 3.--4. " MD ,Memory device" "SDRAM,Low-power SDRAM,?..." line.long 0x04 "DRASCAS2,Dynamic Memory RAS & CAS Delay register" bitfld.long 0x04 8.--9. " CAS ,CAS latency" ",1,2,3" bitfld.long 0x04 0.--1. " RAS ,RAS latency" ",1,2,3" group.long 0x160++0x07 "Dynamic Memory EMC 3" line.long 0x00 "DCONFIG3,Dynamic Memory Configuration register" bitfld.long 0x00 20. " P ,Write protect" "Not protected,Protected" bitfld.long 0x00 19. " B ,Buffer enable" "Disabled,Enabled" bitfld.long 0x00 14. " AM[14] ,Address mapping(bus length)" "16 bit,32 bit" bitfld.long 0x00 7.--12. " AM[12-7] ,Address mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 3.--4. " MD ,Memory device" "SDRAM,Low-power SDRAM,?..." line.long 0x04 "DRASCAS3,Dynamic Memory RAS & CAS Delay register" bitfld.long 0x04 8.--9. " CAS ,CAS latency" ",1,2,3" bitfld.long 0x04 0.--1. " RAS ,RAS latency" ",1,2,3" endif group.long 0x200++0x0B "Static Memory EMC 0" line.long 0x00 "EMCSCONFIG0,Static Memory Configuration registers" bitfld.long 0x00 20. " P ,Write protect" "Not protected,Protected" bitfld.long 0x00 19. " B ,Buffer enable" "Disabled,Enabled" bitfld.long 0x00 8. " EW ,Extended wait" "Disabled,Enabled" bitfld.long 0x00 7. " PB ,Byte lane state" "High/Low,Low/Low" textline " " bitfld.long 0x00 6. " PC ,Chip select polarity" "Low,High" bitfld.long 0x00 3. " PM ,Page mode" "Disabled,Asynchronous" bitfld.long 0x00 0.--1. " MW ,Memory width" "8 bit,16 bit,32 bit,?..." line.long 0x04 "EMCSWAITWEN0, Static Memory Write Enable Delay registers" bitfld.long 0x04 0.--3. " WAITWEN ,Wait write enable" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" line.long 0x08 "EMCSWAITOEN0,Static Memory Output Enable Delay registers" bitfld.long 0x08 0.--3. " WAITOEN ,Wait output enable" "No delay,1,2,3,5,5,6,8,8,9,10,11,12,13,14,15" sif cpuis("LPC407?*")||cpuis("LPC408?*")||cpuis("LPC43*")||cpuis("LPC546*") group.long (0x200+0x0C)++0x0F line.long 0x00 "EMCSWAITRD0,Static Memory Read Delay registers" bitfld.long 0x00 0.--4. " WAITRD ,Read wait states/Read first access wait state" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" line.long 0x04 "EMCSWAITPAGE0,Static Memory Page Mode Read Delay registers" bitfld.long 0x04 0.--4. " WAITPAGE ,Asynchronous page mode read after the first read wait states" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" line.long 0x08 "EMCSWAITWR0,Static Memory Write Delay registers" bitfld.long 0x08 0.--4. " WAITWR ,Write wait states" "2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33" line.long 0x0C "EMCSWAITTURN0,Static Memory Turn Round Delay registers" bitfld.long 0x0C 0.--3. " WAITTURN ,Bus turnaround cycles" ",2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" else if (((per.l((ad:0x2009C000+0x200)))&0x8)==0x00) group.long (0x200+0xC)++0x03 line.long 0x00 "EMCSWAITRD0,Static Memory Read Delay registers" bitfld.long 0x00 0.--4. " WAITRD ,Read wait states" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" else group.long (0x200+0xC)++0x03 line.long 0x00 "EMCSWAITRD0,Static Memory Read Delay registers" bitfld.long 0x00 0.--4. " WAITRD ,Read first access wait state" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" endif if (((per.l((ad:0x2009C000+0x200)))&0x8)==0x00) group.long (0x200+0x10)++0x03 line.long 0x00 "EMCSWAITPAGE0,Static Memory Read Delay registers" bitfld.long 0x00 0.--4. " WAITPAGE ,Asynchronous page mode read after the first read wait states" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" else hgroup.long (0x200+0x10)++0x03 hide.long 0x00 "EMCSWAITPAGE0,Static Memory Read Delay registers" endif group.long (0x200+0x14)++0x07 line.long 0x00 "EMCSWAITWR0,Static Memory Write Delay registers" bitfld.long 0x00 0.--4. " WAITWR ,Write wait states" "2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33" line.long 0x04 "EMCSWAITTURN0,Static Memory Turn Round Delay registers" bitfld.long 0x04 0.--3. " WAITTURN ,Bus turnaround cycles" ",2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" endif group.long 0x220++0x0B "Static Memory EMC 1" line.long 0x00 "EMCSCONFIG1,Static Memory Configuration registers" bitfld.long 0x00 20. " P ,Write protect" "Not protected,Protected" bitfld.long 0x00 19. " B ,Buffer enable" "Disabled,Enabled" bitfld.long 0x00 8. " EW ,Extended wait" "Disabled,Enabled" bitfld.long 0x00 7. " PB ,Byte lane state" "High/Low,Low/Low" textline " " bitfld.long 0x00 6. " PC ,Chip select polarity" "Low,High" bitfld.long 0x00 3. " PM ,Page mode" "Disabled,Asynchronous" bitfld.long 0x00 0.--1. " MW ,Memory width" "8 bit,16 bit,32 bit,?..." line.long 0x04 "EMCSWAITWEN1, Static Memory Write Enable Delay registers" bitfld.long 0x04 0.--3. " WAITWEN ,Wait write enable" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" line.long 0x08 "EMCSWAITOEN1,Static Memory Output Enable Delay registers" bitfld.long 0x08 0.--3. " WAITOEN ,Wait output enable" "No delay,1,2,3,5,5,6,8,8,9,10,11,12,13,14,15" sif cpuis("LPC407?*")||cpuis("LPC408?*")||cpuis("LPC43*")||cpuis("LPC546*") group.long (0x220+0x0C)++0x0F line.long 0x00 "EMCSWAITRD1,Static Memory Read Delay registers" bitfld.long 0x00 0.--4. " WAITRD ,Read wait states/Read first access wait state" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" line.long 0x04 "EMCSWAITPAGE1,Static Memory Page Mode Read Delay registers" bitfld.long 0x04 0.--4. " WAITPAGE ,Asynchronous page mode read after the first read wait states" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" line.long 0x08 "EMCSWAITWR1,Static Memory Write Delay registers" bitfld.long 0x08 0.--4. " WAITWR ,Write wait states" "2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33" line.long 0x0C "EMCSWAITTURN1,Static Memory Turn Round Delay registers" bitfld.long 0x0C 0.--3. " WAITTURN ,Bus turnaround cycles" ",2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" else if (((per.l((ad:0x2009C000+0x220)))&0x8)==0x00) group.long (0x220+0xC)++0x03 line.long 0x00 "EMCSWAITRD1,Static Memory Read Delay registers" bitfld.long 0x00 0.--4. " WAITRD ,Read wait states" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" else group.long (0x220+0xC)++0x03 line.long 0x00 "EMCSWAITRD1,Static Memory Read Delay registers" bitfld.long 0x00 0.--4. " WAITRD ,Read first access wait state" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" endif if (((per.l((ad:0x2009C000+0x220)))&0x8)==0x00) group.long (0x220+0x10)++0x03 line.long 0x00 "EMCSWAITPAGE1,Static Memory Read Delay registers" bitfld.long 0x00 0.--4. " WAITPAGE ,Asynchronous page mode read after the first read wait states" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" else hgroup.long (0x220+0x10)++0x03 hide.long 0x00 "EMCSWAITPAGE1,Static Memory Read Delay registers" endif group.long (0x220+0x14)++0x07 line.long 0x00 "EMCSWAITWR1,Static Memory Write Delay registers" bitfld.long 0x00 0.--4. " WAITWR ,Write wait states" "2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33" line.long 0x04 "EMCSWAITTURN1,Static Memory Turn Round Delay registers" bitfld.long 0x04 0.--3. " WAITTURN ,Bus turnaround cycles" ",2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" endif group.long 0x240++0x0B "Static Memory EMC 2" line.long 0x00 "EMCSCONFIG2,Static Memory Configuration registers" bitfld.long 0x00 20. " P ,Write protect" "Not protected,Protected" bitfld.long 0x00 19. " B ,Buffer enable" "Disabled,Enabled" bitfld.long 0x00 8. " EW ,Extended wait" "Disabled,Enabled" bitfld.long 0x00 7. " PB ,Byte lane state" "High/Low,Low/Low" textline " " bitfld.long 0x00 6. " PC ,Chip select polarity" "Low,High" bitfld.long 0x00 3. " PM ,Page mode" "Disabled,Asynchronous" bitfld.long 0x00 0.--1. " MW ,Memory width" "8 bit,16 bit,32 bit,?..." line.long 0x04 "EMCSWAITWEN2, Static Memory Write Enable Delay registers" bitfld.long 0x04 0.--3. " WAITWEN ,Wait write enable" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" line.long 0x08 "EMCSWAITOEN2,Static Memory Output Enable Delay registers" bitfld.long 0x08 0.--3. " WAITOEN ,Wait output enable" "No delay,1,2,3,5,5,6,8,8,9,10,11,12,13,14,15" sif cpuis("LPC407?*")||cpuis("LPC408?*")||cpuis("LPC43*")||cpuis("LPC546*") group.long (0x240+0x0C)++0x0F line.long 0x00 "EMCSWAITRD2,Static Memory Read Delay registers" bitfld.long 0x00 0.--4. " WAITRD ,Read wait states/Read first access wait state" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" line.long 0x04 "EMCSWAITPAGE2,Static Memory Page Mode Read Delay registers" bitfld.long 0x04 0.--4. " WAITPAGE ,Asynchronous page mode read after the first read wait states" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" line.long 0x08 "EMCSWAITWR2,Static Memory Write Delay registers" bitfld.long 0x08 0.--4. " WAITWR ,Write wait states" "2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33" line.long 0x0C "EMCSWAITTURN2,Static Memory Turn Round Delay registers" bitfld.long 0x0C 0.--3. " WAITTURN ,Bus turnaround cycles" ",2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" else if (((per.l((ad:0x2009C000+0x240)))&0x8)==0x00) group.long (0x240+0xC)++0x03 line.long 0x00 "EMCSWAITRD2,Static Memory Read Delay registers" bitfld.long 0x00 0.--4. " WAITRD ,Read wait states" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" else group.long (0x240+0xC)++0x03 line.long 0x00 "EMCSWAITRD2,Static Memory Read Delay registers" bitfld.long 0x00 0.--4. " WAITRD ,Read first access wait state" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" endif if (((per.l((ad:0x2009C000+0x240)))&0x8)==0x00) group.long (0x240+0x10)++0x03 line.long 0x00 "EMCSWAITPAGE2,Static Memory Read Delay registers" bitfld.long 0x00 0.--4. " WAITPAGE ,Asynchronous page mode read after the first read wait states" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" else hgroup.long (0x240+0x10)++0x03 hide.long 0x00 "EMCSWAITPAGE2,Static Memory Read Delay registers" endif group.long (0x240+0x14)++0x07 line.long 0x00 "EMCSWAITWR2,Static Memory Write Delay registers" bitfld.long 0x00 0.--4. " WAITWR ,Write wait states" "2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33" line.long 0x04 "EMCSWAITTURN2,Static Memory Turn Round Delay registers" bitfld.long 0x04 0.--3. " WAITTURN ,Bus turnaround cycles" ",2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" endif group.long 0x260++0x0B "Static Memory EMC 3" line.long 0x00 "EMCSCONFIG3,Static Memory Configuration registers" bitfld.long 0x00 20. " P ,Write protect" "Not protected,Protected" bitfld.long 0x00 19. " B ,Buffer enable" "Disabled,Enabled" bitfld.long 0x00 8. " EW ,Extended wait" "Disabled,Enabled" bitfld.long 0x00 7. " PB ,Byte lane state" "High/Low,Low/Low" textline " " bitfld.long 0x00 6. " PC ,Chip select polarity" "Low,High" bitfld.long 0x00 3. " PM ,Page mode" "Disabled,Asynchronous" bitfld.long 0x00 0.--1. " MW ,Memory width" "8 bit,16 bit,32 bit,?..." line.long 0x04 "EMCSWAITWEN3, Static Memory Write Enable Delay registers" bitfld.long 0x04 0.--3. " WAITWEN ,Wait write enable" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" line.long 0x08 "EMCSWAITOEN3,Static Memory Output Enable Delay registers" bitfld.long 0x08 0.--3. " WAITOEN ,Wait output enable" "No delay,1,2,3,5,5,6,8,8,9,10,11,12,13,14,15" sif cpuis("LPC407?*")||cpuis("LPC408?*")||cpuis("LPC43*")||cpuis("LPC546*") group.long (0x260+0x0C)++0x0F line.long 0x00 "EMCSWAITRD3,Static Memory Read Delay registers" bitfld.long 0x00 0.--4. " WAITRD ,Read wait states/Read first access wait state" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" line.long 0x04 "EMCSWAITPAGE3,Static Memory Page Mode Read Delay registers" bitfld.long 0x04 0.--4. " WAITPAGE ,Asynchronous page mode read after the first read wait states" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" line.long 0x08 "EMCSWAITWR3,Static Memory Write Delay registers" bitfld.long 0x08 0.--4. " WAITWR ,Write wait states" "2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33" line.long 0x0C "EMCSWAITTURN3,Static Memory Turn Round Delay registers" bitfld.long 0x0C 0.--3. " WAITTURN ,Bus turnaround cycles" ",2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" else if (((per.l((ad:0x2009C000+0x260)))&0x8)==0x00) group.long (0x260+0xC)++0x03 line.long 0x00 "EMCSWAITRD3,Static Memory Read Delay registers" bitfld.long 0x00 0.--4. " WAITRD ,Read wait states" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" else group.long (0x260+0xC)++0x03 line.long 0x00 "EMCSWAITRD3,Static Memory Read Delay registers" bitfld.long 0x00 0.--4. " WAITRD ,Read first access wait state" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" endif if (((per.l((ad:0x2009C000+0x260)))&0x8)==0x00) group.long (0x260+0x10)++0x03 line.long 0x00 "EMCSWAITPAGE3,Static Memory Read Delay registers" bitfld.long 0x00 0.--4. " WAITPAGE ,Asynchronous page mode read after the first read wait states" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" else hgroup.long (0x260+0x10)++0x03 hide.long 0x00 "EMCSWAITPAGE3,Static Memory Read Delay registers" endif group.long (0x260+0x14)++0x07 line.long 0x00 "EMCSWAITWR3,Static Memory Write Delay registers" bitfld.long 0x00 0.--4. " WAITWR ,Write wait states" "2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33" line.long 0x04 "EMCSWAITTURN3,Static Memory Turn Round Delay registers" bitfld.long 0x04 0.--3. " WAITTURN ,Bus turnaround cycles" ",2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" endif sif !cpuis("LPC181*")&&!cpuis("LPC182*")&&!cpuis("LPC183*")&&!cpuis("LPC185*")&&!cpuis("LPC407?*")&&!cpuis("LPC408?*")&&!cpuis("LPC43*") textline " " group.long 0x200601DC++0x07 line.long 0x00 "EMCDLYCTL,Delay Control register" bitfld.long 0x00 24.--28. " CLKOUT1DLY ,Programmable delay value for the CLKOUT[1] output" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" bitfld.long 0x00 16.--20. " CLKOUT0DLY ,Programmable delay value for the CLKOUT[0] output" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" bitfld.long 0x00 8.--12. " FBCLKDLY ,Programmable delay value for the feedback clock" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" textline " " bitfld.long 0x00 0.--4. " CMDDLY ,Programmable delay value for EMC outputs" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" line.long 0x04 "EMCCAL,EMC Calibration register" bitfld.long 0x04 15. " DONE ,Measurement completion flag" "Not completed,Completed" bitfld.long 0x04 14. " START ,Start control bit for the EMC calibration counter" "No effect,Started" hexmask.long.byte 0x04 0.--7. 1. " CALVALUE ,Returns the count of the approximately 50 MHz ring oscillator" endif width 0x0B tree.end endif tree "Ethernet" sif (cpu()=="LPC1758"||cpu()=="LPC1764"||cpu()=="LPC1766"||cpu()=="LPC1767"||cpu()=="LPC1768"||cpu()=="LPC1769") base ad:0x50000000 width 0x6 tree "MAC Registers" if (((per.long((ad:0x50000000+0xFF4)))&0x80000000)==0x00000000) group.long 0x0++0x2B line.long 0x0 "MAC1,MAC configuration register 1" bitfld.long 0x00 15. " SOFTRESET ,All modules within the MAC reset except the Host Interface" "No reset,Reset" bitfld.long 0x00 14. " SIMULATIONRESET ,Reset random number generator within the Transmit Function" "No reset,Reset" textline " " bitfld.long 0x00 11. " RESETMCS/RX ,Reset the MAC Control Sublayer / Receive logic" "No reset,Reset" bitfld.long 0x00 10. " RESETRX ,Ethernet receive logic reset" "No reset,Reset" textline " " bitfld.long 0x00 9. " RESETMCS/TX ,Reset the MAC Control Sublayer / Transmit logic" "No reset,Reset" bitfld.long 0x00 8. " RESETTX ,Transmit Function logic reset" "No reset,Reset" textline " " bitfld.long 0x00 4. " LOOPBACK ,MAC Transmit interface loop back to the MAC Receive interface" "Normal,Looped" bitfld.long 0x00 3. " TXFLOWCONTROL ,PAUSE Flow Control frames transmission enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " RXFLOWCONTROL ,MAC received PAUSE Flow Control frames enable" "Disabled,Enabled" bitfld.long 0x00 1. " PASSALLRECEIVEFRAMES ,MAC pass all frames regardless of type" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RECEIVEENABLE ,Allow receive frames to be received" "Not allowed,Allowed" line.long 0x4 "MAC2,MAC configuration register 2" bitfld.long 0x04 14. " EXCESSDEFER ,MAC defer to carrier indefinitely as per the Standard" "Disabled,Enabled" bitfld.long 0x04 13. " BACKPRESSURE/NOBACKOFF ,Immediately retransmit without backoff after the MAC incidentally causes a collision during back pressure" "Disabled,Enabled" textline " " bitfld.long 0x04 12. " NOBACKOFF ,MAC immediately retransmit following a collision rather than using the Binary Exponential Backoff algorithm" "Disabled,Enabled" bitfld.long 0x04 9. " LONGPREAMBLEENFORCEMENT ,MAC only allow receive packets which contain preamble fields less than 12 bytes in length" "Disabled,Enabled" textline " " bitfld.long 0x04 8. " PUREPREAMBLEENFORCEMENT ,MAC verify the content of the preamble to ensure it contains 0x55 and is error-free" "Disabled,Enabled" bitfld.long 0x04 7. " AUTODETECTPADENABLE ,MAC automatically detect the type of frame by comparing the two octets" "Disabled,Enabled" textline " " bitfld.long 0x04 6. " VLANPADENABLE ,MAC pad all short frames to 64 bytes and append a valid CRC" "Disabled,Enabled" bitfld.long 0x04 5. " PAD/CRCENABLE ,MAC pad all short frames" "Not padded,Padded" textline " " bitfld.long 0x04 4. " CRCENABLE ,Append a CRC to every frame whether padding was required or not" "Not appended,Appended" bitfld.long 0x04 3. " DELAYEDCRC ,Number of bytes (if any) of proprietary header information that exist on the front of IEEE 802.3 frames" "No header,4 bytes" textline " " bitfld.long 0x04 2. " HUGEFRAMEENABLE ,Frames of any length transmit and receive" "Disabled,Enabled" bitfld.long 0x04 1. " FRAMELENGTHCHECKING ,Both transmit and receive frame lengths compare to the Length/Type field" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " FULL-DUPLEX ,MAC Full-Duplex mode" "Disabled,Enabled" line.long 0x8 "IPGT,Back-to-Back Inter-Packet-Gap register" hexmask.long.byte 0x8 0.--6. 1. " BACK-TO-BACKINTER-PACKET-GAP ,Nibble time offset of the minimum possible period" line.long 0xC "IPGR,Non Back-to-Back Inter-Packet-Gap register" hexmask.long.byte 0xC 8.--14. 1. " NON-BACK-TO-BACK-INTER-PACKET-GAP_PART1 ,Optional carrierSense window" textline " " hexmask.long.byte 0xC 0.--6. 1. " NON-BACK-TO-BACK-INTER-PACKET-GAP_PART2 ,Non-Back-to-Back Inter-Packet-Gap" line.long 0x10 "CLRT,Collision window / Retry register" hexmask.long.byte 0x10 8.--13. 1. " COLLISIONWINDOW ,Slot time or collision window during which collisions occur in properly configured networks" bitfld.long 0x10 0.--3. " RETRANSMISSIONMAXIMUM ,Number of retransmission attempts following a collision before aborting the packet due to excessive collisions" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x14 "MAXF,Maximum Frame register" hexmask.long.word 0x14 0.--15. 1. " MAXIMUMFRAMELENGTH ,Maximum receive frame" line.long 0x18 "SUPP,PHY Support register" bitfld.long 0x18 8. " SPEED ,Configure the Reduced MII logic for the current operating speed" "10 Mbps,100 Mbps" line.long 0x1C "TEST,Test register" bitfld.long 0x1C 2. " TESTBACKPRESSURE ,MAC assert backpressure on the link" "Not asserted,Asserted" bitfld.long 0x1C 1. " TESTPAUSE ,MAC Control sublayer inhibit transmissions" "Not inhibited,Inhibited" textline " " bitfld.long 0x1C 0. " SHORTCUTPAUSEQUANTA ,Reduce the effective PAUSE quanta from 64 byte-times to 1 byte-time" "Not reduced,Reduced" line.long 0x20 "MCFG,MII Mgmt Configuration register" bitfld.long 0x20 15. " RESETMIIMGMT ,Reset the MII Management hardware" "No reset,Reset" bitfld.long 0x20 2.--5. " CLOCKSELECT ,MII Management Clock (MDC) which IEEE 802.3u defines to be no faster than 2.5 MHz" "Clock/4,Clock/4,Clock/6,Clock/8,Clock/10,Clock/14,Clock/20,Clock/28,Clock/36,Clock/40,Clock/44,Clock/48,Clock/52,Clock/56,Clock/60,Clock/64" textline " " bitfld.long 0x20 1. " SUPPRESSPREAMBLE ,MII Management hardware perform read/write cycles without the 32 bit preamble field" "Not performed,Performed" bitfld.long 0x20 0. " SCANINCREMENT ,MII Management hardware perform read cycles across a range of PHYs" "Not performed,Performed" line.long 0x24 "MCMD,MII Mgmt Command register" bitfld.long 0x24 1. " SCAN ,MII Management hardware perform Read cycles continuously" "Not performed,Performed" bitfld.long 0x24 0. " READ ,MII Management hardware perform a single Read cycle" "Not performed,Performed" line.long 0x28 "MADR,MII Mgmt Address register" bitfld.long 0x28 8.--12. " PHYADDRESS ,5 bit PHY Address field of Mgmt cycles" "Reserved,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F,10,11,12,13,14,15,16,17,18,19,1A,1B,1C,1D,1E,1F" bitfld.long 0x28 0.--4. " REGISTERADDRESS ,5 bit Register Address field of Mgmt cycles" "0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F,10,11,12,13,14,15,16,17,18,19,1A,1B,1C,1D,1E,1F" wgroup.long 0x2C++0x3 line.long 0x0 "MWTD,MII Mgmt Write Data register" hexmask.long.word 0x0 0.--15. 1. " WRITEDATA ,16 bit write data" rgroup.long 0x30++0x7 line.long 0x0 "MRDD,MII Mgmt Read Data register" hexmask.long.word 0x0 0.--15. 1. " READDATA ,16 bit read data" line.long 0x4 "MIND,MII Mgmt Indicators register" bitfld.long 0x04 3. " MIILinkFail ,MII Link Fail" "Not failed,Failed" bitfld.long 0x04 2. " NOTVALID ,Not valid" "Valid,Not valid" textline " " bitfld.long 0x04 1. " SCANNING ,Scanning" "Not scanning,Scanning" bitfld.long 0x04 0. " BUSY ,Busy" "Not busy,Busy" group.long 0x40++0xB line.long 0x0 "SA0,Station Address 0 register" hexmask.long.byte 0x0 8.--15. 1. " STATIONADDRESS1 ,First octet of the station address" hexmask.long.byte 0x0 0.--7. 1. " STATIONADDRESS2 ,Second octet of the station address" line.long 0x4 "SA1,Station Address 1 register" hexmask.long.byte 0x4 8.--15. 1. " STATIONADDRESS3 ,Third octet of the station address" hexmask.long.byte 0x4 0.--7. 1. " STATIONADDRESS4 ,Fourth octet of the station address" line.long 0x8 "SA2,Station Address 2 register" hexmask.long.byte 0x8 8.--15. 1. " STATIONADDRESS5 ,Fifth octet of the station address" hexmask.long.byte 0x8 0.--7. 1. " STATIONADDRESS6 ,Sixth octet of the station address" else hgroup.long 0x0++0x37 hide.long 0x0 "MAC1,MAC configuration register 1" hide.long 0x4 "MAC2,MAC configuration register 2" hide.long 0x8 "IPGT,Back-to-Back Inter-Packet-Gap register" hide.long 0xC "IPGR,Non Back-to-Back Inter-Packet-Gap register" hide.long 0x10 "CLRT,Collision window / Retry register" hide.long 0x14 "MAXF,Maximum Frame register" hide.long 0x18 "SUPP,PHY Support register" hide.long 0x1C "TEST,Test register" hide.long 0x20 "MCFG,MII Mgmt Configuration register" hide.long 0x24 "MCMD,MII Mgmt Command register" hide.long 0x28 "MADR,MII Mgmt Address register" hide.long 0x2C "MWTD,MII Mgmt Write Data register" hide.long 0x30 "MRDD,MII Mgmt Read Data register" hide.long 0x34 "MIND,MII Mgmt Indicators register" hgroup.long 0x40++0xB hide.long 0x0 "SA0,Station Address 0 register" hide.long 0x4 "SA1,Station Address 1 register" hide.long 0x8 "SA2,Station Address 2 register" endif tree.end width 0x14 tree "Control Registers" if (((per.long((ad:0x50000000+0xFF4)))&0x80000000)==0x00000000) group.long 0x100++0x3 line.long 0x0 "Command,Command register" bitfld.long 0x00 10. " FullDuplex ,Full duplex operation" "Disabled,Enabled" bitfld.long 0x00 9. " RMII ,Mode selection" "MII,RMII" textline " " bitfld.long 0x00 8. " TxFlowControl ,Enable IEEE 802.3 / clause 31 flow control" "Disabled,Enabled" bitfld.long 0x00 7. " PassRxFilter ,Disable receive filtering" "No,Yes" textline " " bitfld.long 0x00 6. " PassRuntFrame ,Pass Runt Frame" "Filtered out,Passed" bitfld.long 0x00 5. " RxReset ,Receive datapath reset" "No reset,Reset" textline " " bitfld.long 0x00 4. " TxReset ,Transmit datapath reset" "No reset,Reset" bitfld.long 0x00 3. " RegReset ,All datapaths and the host registers reset" "No reset,Reset" textline " " bitfld.long 0x00 1. " TxEnable ,Enable transmit" "Disabled,Enabled" bitfld.long 0x00 0. " RxEnable ,Enable receive" "Disabled,Enabled" rgroup.long 0x104++0x3 line.long 0x0 "Status,Status register" bitfld.long 0x0 1. " TxStatus ,Transmit channel active" "Inactive,Active" bitfld.long 0x0 0. " RxStatus ,Receive channel active" "Inactive,Active" group.long 0x108++0xB line.long 0x0 "RxDescriptor,Receive descriptor base address register" hexmask.long 0x0 2.--31. 0x4 " RxDescriptor ,MSBs of receive descriptor base address" line.long 0x4 "RxStatus,Receive status base address register" hexmask.long 0x4 3.--31. 0x8 " RxStatus ,MSBs of receive status base address" line.long 0x8 "RxDescriptorNumber,Receive number of descriptors register" hexmask.long.word 0x8 0.--15. 1. " RxDescriptorNumber ,Number of descriptors in the descriptor array for which RxDescriptor is the base address" rgroup.long 0x114++0x3 line.long 0x0 "RxProduceIndex,Receive produce index register" hexmask.long.word 0x0 0.--15. 1. " RxProduceIndex ,Index of the descriptor that is going to be filled next by the receive datapath" group.long 0x118++0x13 line.long 0x0 "RxConsumeIndex,Receive consume index register" hexmask.long.word 0x0 0.--15. 1. " RxConsumeIndex ,Index of the descriptor that is going to be processed next by the receive" line.long 0x4 "TxDescriptor,Transmit descriptor base address register" hexmask.long 0x4 2.--31. 0x4 " TxDescriptor ,MSBs of transmit descriptor base address" line.long 0x8 "TxStatus,Transmit status base address register" hexmask.long 0x8 2.--31. 0x4 " TxStatus ,MSBs of transmit status base address" line.long 0xC "TxDescriptorNumber,Transmit number of descriptors register" hexmask.long.word 0xC 0.--15. 1. " TxDescriptorNumber ,Number of descriptors in the descriptor array for which TxDescriptor is the base address" line.long 0x10 "TxProduceIndex,Transmit produce index register" hexmask.long.word 0x10 0.--15. 1. " TxProduceIndex ,Index of the descriptor that is going to be filled next by the transmit software driver" rgroup.long 0x12C++0x3 line.long 0x0 "TxConsumeIndex,Transmit consume index register" hexmask.long.word 0x0 0.--15. 1. " TxConsumeIndex ,Index of the descriptor that is going to be transmitted next by the transmit datapath" rgroup.long 0x158++0xB line.long 0x0 "TSV0,Transmit status vector 0 register" bitfld.long 0x00 31. " VLAN ,Frame's length/type field contained 0x8100 which is the VLAN protocol identifier" "Not VLAN,VLAN" bitfld.long 0x00 30. " Backpressure ,Carrier-sense method backpressure was previously applied" "Not applied,Applied" textline " " bitfld.long 0x00 29. " Pause ,The frame was a control frame with a valid PAUSE opcode" "No PAUSE,PAUSE" bitfld.long 0x00 28. " Controlframe ,The frame was a control frame" "Not control,Control" textline " " hexmask.long.word 0x00 12.--27. 1. " Totalbytes ,The total number of bytes transferred including collided attempts" bitfld.long 0x00 11. " Underrun ,Host side caused buffer underrun" "No underrun,Underrun" textline " " bitfld.long 0x00 10. " Giant ,Byte count in frame greater than can be represented in the transmit byte count field in TSV1" "Not greater,Greater" textline " " bitfld.long 0x00 9. " LateCollision ,Collision occur beyond collision window (512 bit times)" "Not occurred,Occurred" textline " " bitfld.long 0x00 8. " ExcessiveCollision ,Packet abort due to exceeding of maximum allowed number of collisions" "Not aborted,Aborted" textline " " bitfld.long 0x00 7. " ExcessiveDefer ,Excessive Defer" "Not deferred,Deferred" textline " " bitfld.long 0x00 6. " PacketDefer ,Packet Defer" "Not deferred,Deferred" textline " " bitfld.long 0x00 5. " Broadcast ,Broadcast address" "Not broadcast,Broadcast" textline " " bitfld.long 0x00 4. " Multicast ,Multicast address" "Not multicast,Multicast" textline " " bitfld.long 0x00 3. " Done ,Transmission of packet complete" "Not completed,Completed" textline " " bitfld.long 0x00 2. " LOOR ,Length out of range" "In range,Out of range" bitfld.long 0x00 1. " LCE ,Length check error" "No error,Error" textline " " bitfld.long 0x00 0. " CRCerror ,CRC error" "No error,Error" line.long 0x4 "TSV1,Transmit status vector 1 register" bitfld.long 0x4 16.--19. " TCC ,Transmit collision count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x4 0.--15. 1. " TBC ,Transmit byte count" line.long 0x8 "RSV,Receive status vector register" bitfld.long 0x08 30. " VLAN ,Frame's length/type field contained 0x8100 which is the VLAN protocol identifier" "Not VLAN,VLAN" textline " " bitfld.long 0x08 29. " UnsupportedOpcode ,The current frame was recognized as a Control Frame but contains an unknown opcode" "Not unsupported,Unsupported" textline " " bitfld.long 0x08 28. " PAUSE ,The frame was a control frame with a valid PAUSE opcode" "No PAUSE,PAUSE" textline " " bitfld.long 0x08 27. " Controlframe ,The frame was a control frame" "Not control,Control" textline " " bitfld.long 0x08 26. " DribbleNibble ,After the end of packet another 1-7 bits were received" "No dribble nibble,Dribble nibble" textline " " bitfld.long 0x08 25. " Broadcast ,The packet destination was a broadcast address" "Not broadcast,Broadcast" textline " " bitfld.long 0x08 24. " Multicast ,The packet destination was a multicast address" "Not multicast,Multicast" bitfld.long 0x08 23. " ReceiveOK ,The packet had valid CRC and no symbol errors" "Not OK,OK" textline " " bitfld.long 0x08 22. " LOOR ,Length out of range" "In range,Out of range" bitfld.long 0x08 21. " LCE ,Length check error" "No error,Error" textline " " bitfld.long 0x08 20. " CRCerror ,The attached CRC in the packet did not match the internally generated CRC" "No error,Error" bitfld.long 0x08 19. " RCV ,Receive code violation" "Valid,Not valid" textline " " bitfld.long 0x08 18. " CEPS ,Carrier event previously seen" "Not seen,Seen" bitfld.long 0x08 17. " RXDVEPS ,RXDV event previously seen" "Not seen,Seen" textline " " bitfld.long 0x08 16. " PPI ,Packet previously ignored" "Not dropped,Dropped" hexmask.long.word 0x08 0.--15. 1. " RBC ,Received byte count" group.long 0x170++0x3 line.long 0x0 "FlowControlCounter,Flow control counter register" hexmask.long.word 0x0 16.--31. 1. " PauseTimer ,Pause Timer" hexmask.long.word 0x0 0.--15. 1. " MirrorCounter ,Number of cycles before re-issuing the Pause control frame" rgroup.long 0x174++0x3 line.long 0x0 "FlowControlStatus,Flow control status register" hexmask.long.word 0x0 0.--15. 1. " MirrorCounterCurrent ,Mirror Counter Current" else hgroup.long 0x100++0x2F hide.long 0x0 "Command,Command register" hide.long 0x4 "Status,Status register" hide.long 0x8 "RxDescriptor,Receive descriptor base address register" hide.long 0xC "RxStatus,Receive status base address register" hide.long 0x10 "RxDescriptorNumber,Receive number of descriptors register" hide.long 0x14 "RxProduceIndex,Receive produce index register" hide.long 0x18 "RxConsumeIndex,Receive consume index register" hide.long 0x1C "TxDescriptor,Transmit descriptor base address register" hide.long 0x20 "TxStatus,Transmit status base address register" hide.long 0x24 "TxDescriptorNumber,Transmit number of descriptors register" hide.long 0x28 "TxProduceIndex,Transmit produce index register" hide.long 0x2C "TxConsumeIndex,Transmit consume index register" hgroup.long 0x158++0xB hide.long 0x0 "TSV0,Transmit status vector 0 register" hide.long 0x4 "TSV1,Transmit status vector 1 register" hide.long 0x8 "RSV,Receive status vector register" hgroup.long 0x170++0x7 hide.long 0x0 "FlowControlCounter,Flow control counter register" hide.long 0x4 "FlowControlStatus,Flow control status register" endif tree.end width 0x13 tree "Receive Filter Registers" if (((per.long((ad:0x50000000+0xFF4)))&0x80000000)==0x00000000) group.long 0x200++0x3 line.long 0x0 "RxFilterCtrl,Receive filter control register" bitfld.long 0x00 13. " RxFilterEnWoL ,Rx Filter Enable WoL" "Not generated,Generated" textline " " bitfld.long 0x00 12. " MagicPacketEnWoL ,Magic Packet Enable WoL" "Not generated,Generated" textline " " bitfld.long 0x00 5. " AcceptPerfectEn ,Accept Perfect Enable" "Not accepted,Accepted" textline " " bitfld.long 0x00 4. " AcceptMulticastHashEn ,Accept Multicast Hash Enable" "Not accepted,Accepted" textline " " bitfld.long 0x00 3. " AcceptUnicastHashEn ,Accept Unicast Hash Enable" "Not accepted,Accepted" textline " " bitfld.long 0x00 2. " AcceptMulticastEn ,Accept Multicast Enable" "Not accepted,Accepted" textline " " bitfld.long 0x00 1. " AcceptBroadcastEn ,Accept Broadcast Enable" "Not accepted,Accepted" textline " " bitfld.long 0x00 0. " AcceptUnicastEn ,Accept Unicast Enable" "Not accepted,Accepted" rgroup.long 0x204++0x3 line.long 0x0 "RxFilterWoLStatus,Receive filter WoL status register" bitfld.long 0x00 8. " MagicPacketWoL ,Magic Packet WoL" "Not caused,Caused" textline " " bitfld.long 0x00 7. " RxFilterWoL ,Rx Filter WoL" "Not caused,Caused" textline " " bitfld.long 0x00 5. " AcceptPerfectWoL ,Accept Perfect WoL" "Not caused,Caused" textline " " bitfld.long 0x00 4. " AcceptMulticastHashWoL ,Accept Multicast Hash WoL" "Not caused,Caused" textline " " bitfld.long 0x00 3. " AcceptUnicastHashWoL ,Accept Unicast Hash WoL" "Not caused,Caused" textline " " bitfld.long 0x00 2. " AcceptMulticastWoL ,Accept Multicast WoL" "Not caused,Caused" textline " " bitfld.long 0x00 1. " AcceptBroadcastWoL ,Accept Broadcast WoL" "Not caused,Caused" textline " " bitfld.long 0x00 0. " AcceptUnicastWoL ,Accept Unicast WoL" "Not caused,Caused" wgroup.long 0x208++0x3 line.long 0x0 "RxFilterWoLClear,Receive filter WoL clear register" bitfld.long 0x00 8. " MagicPacketWoLClr ,Magic Packet Wake-up on LAN Clear" "Not cleared,Cleared" textline " " bitfld.long 0x00 7. " RxFilterWoLClr ,Receive Filter Wake-up on LAN Clear" "Not cleared,Cleared" textline " " bitfld.long 0x00 5. " AcceptPerfectWoLClr ,Accept Perfect Wake-up on LAN Clear" "Not cleared,Cleared" textline " " bitfld.long 0x00 4. " AcceptMulticastHashWoLClr ,Accept Multicast Hash Wake-up on LAN Clear" "Not cleared,Cleared" textline " " bitfld.long 0x00 3. " AcceptUnicastHashWoLClr ,Accept Unicast Hash Wake-up on LAN Clear" "Not cleared,Cleared" textline " " bitfld.long 0x00 2. " AcceptMulticastWoLClr ,Accept Multicast Wake-up on LAN Clear" "Not cleared,Cleared" textline " " bitfld.long 0x00 1. " AcceptBroadcastWoLClr ,Accept Broadcast Wake-up on LAN Clear" "Not cleared,Cleared" textline " " bitfld.long 0x00 0. " AcceptUnicastWoLClr ,Accept Unicast Wake-up on LAN Clear" "Not cleared,Cleared" group.long 0x210++0x7 line.long 0x0 "HashFilterL,Hash filter table LSBs register" line.long 0x4 "HashFilterH,Hash filter table MSBs register" else hgroup.long 0x200++0xB hide.long 0x0 "RxFilterCtrl,Receive filter control register" hide.long 0x4 "RxFilterWoLStatus,Receive filter WoL status register" hide.long 0x8 "RxFilterWoLClear,Receive filter WoL clear register" hgroup.long 0x210++0x7 hide.long 0x0 "HashFilterL,Hash filter table LSBs register" hide.long 0x4 "HashFilterH,Hash filter table MSBs register" endif tree.end width 0xB tree "Module Control Registers" if (((per.long((ad:0x50000000+0xFF4)))&0x80000000)==0x00000000) group.long 0xFE0++0x3 line.long 0x0 "IntStatus,Interrupt status register" setclrfld.long 0x00 13. 0xC 13. 0x8 13. " WakeupInt_set/clr ,Interrupt triggered by a Wakeup event detected by the receive filter" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 12. 0xC 12. 0x8 12. " SoftInt_set/clr ,Interrupt triggered by software writing a 1 to the SoftintSet bit in the IntSet register" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 7. 0xC 7. 0x8 7. " TxDoneInt_set/clr ,Interrupt triggered when a descriptor has been transmitted" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 6. 0xC 6. 0x8 6. " TxFinishedInt_set/clr ,Interrupt triggered when all transmit descriptors have been processed" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 5. 0xC 5. 0x8 5. " TxErrorInt_set/clr ,Interrupt trigger on transmit errors (LateCollision/ExcessiveCollision and ExcessiveDefer/NoDescriptor/Underrun)" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 4. 0xC 4. 0x8 4. " TxUnderrunInt_set/clr ,Interrupt set on a fatal underrun error in the transmit queue" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 3. 0xC 3. 0x8 3. " RxDoneInt_set/clr ,Interrupt triggered when a receive descriptor has been processed" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 2. 0xC 2. 0x8 2. " RxFinishedInt_set/clr ,Interrupt triggered when all receive descriptors have been processed" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 1. 0xC 1. 0x8 1. " RxErrorInt_set/clr ,Interrupt trigger on receive errors" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 0. 0xC 0. 0x8 0. " RxOverrunInt_set/clr ,Interrupt set on a fatal overrun error in the receive queue" "No interrupt,Interrupt" group.long 0xFE4++0x3 line.long 0x0 "IntEnable,Interrupt enable register" bitfld.long 0x00 13. " WakeupIntEn ,Enable for interrupt triggered by a Wakeup event detected by the receive filter" "Disabled,Enabled" bitfld.long 0x00 12. " SoftIntEn ,Enable for interrupt triggered by the SoftInt bit in the IntStatus register" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " TxDoneIntEn ,Enable for interrupt triggered when a descriptor has been transmitted" "Disabled,Enabled" bitfld.long 0x00 6. " TxFinishedIntEn ,Enable for interrupt triggered when all transmit descriptors have been processed" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " TxErrorIntEn ,Enable for interrupt trigger on transmit errors" "Disabled,Enabled" bitfld.long 0x00 4. " TxUnderrunIntEn ,Enable for interrupt trigger on transmit buffer or descriptor underrun situations" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " RxDoneIntEn ,Enable for interrupt triggered when a receive descriptor has been processed" "Disabled,Enabled" bitfld.long 0x00 2. " RxFinishedIntEn ,Enable for interrupt triggered when all receive descriptors have been processed" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " RxErrorIntEn ,Enable for interrupt trigger on receive errors" "Disabled,Enabled" bitfld.long 0x00 0. " RxOverrunIntEn ,Enable for interrupt trigger on receive buffer overrun or descriptor underrun situations" "Disabled,Enabled" else hgroup.long 0xFE0++0x7 hide.long 0x0 "IntStatus,Interrupt status register" hide.long 0x4 "IntEnable,Interrupt enable register" endif group.long 0xFF4++0x3 line.long 0x0 "PowerDown,Power-down register" bitfld.long 0x0 31. " PowerDownMACAHB ,Power Down Media Access Control AHB" "Access allowed,Access denied" tree.end elif (cpu()=="LPC1776"||cpu()=="LPC1778"||cpu()=="LPC1786"||cpu()=="LPC1788") base ad:0x20084000 width 0x6 tree "MAC Registers" if (((per.long((ad:0x20084000+0xFF4)))&0x80000000)==0x00000000) group.long 0x0++0x2B line.long 0x0 "MAC1,MAC configuration register 1" bitfld.long 0x00 15. " SOFTRESET ,All modules within the MAC reset except the Host Interface" "No reset,Reset" bitfld.long 0x00 14. " SIMULATIONRESET ,Reset random number generator within the Transmit Function" "No reset,Reset" textline " " bitfld.long 0x00 11. " RESETMCS/RX ,Reset the MAC Control Sublayer / Receive logic" "No reset,Reset" bitfld.long 0x00 10. " RESETRX ,Ethernet receive logic reset" "No reset,Reset" textline " " bitfld.long 0x00 9. " RESETMCS/TX ,Reset the MAC Control Sublayer / Transmit logic" "No reset,Reset" bitfld.long 0x00 8. " RESETTX ,Transmit Function logic reset" "No reset,Reset" textline " " bitfld.long 0x00 4. " LOOPBACK ,MAC Transmit interface loop back to the MAC Receive interface" "Normal,Looped" bitfld.long 0x00 3. " TXFLOWCONTROL ,PAUSE Flow Control frames transmission enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " RXFLOWCONTROL ,MAC received PAUSE Flow Control frames enable" "Disabled,Enabled" bitfld.long 0x00 1. " PASSALLRECEIVEFRAMES ,MAC pass all frames regardless of type" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RECEIVEENABLE ,Allow receive frames to be received" "Not allowed,Allowed" line.long 0x4 "MAC2,MAC configuration register 2" bitfld.long 0x04 14. " EXCESSDEFER ,MAC defer to carrier indefinitely as per the Standard" "Disabled,Enabled" bitfld.long 0x04 13. " BACKPRESSURE/NOBACKOFF ,Immediately retransmit without backoff after the MAC incidentally causes a collision during back pressure" "Disabled,Enabled" textline " " bitfld.long 0x04 12. " NOBACKOFF ,MAC immediately retransmit following a collision rather than using the Binary Exponential Backoff algorithm" "Disabled,Enabled" bitfld.long 0x04 9. " LONGPREAMBLEENFORCEMENT ,MAC only allow receive packets which contain preamble fields less than 12 bytes in length" "Disabled,Enabled" textline " " bitfld.long 0x04 8. " PUREPREAMBLEENFORCEMENT ,MAC verify the content of the preamble to ensure it contains 0x55 and is error-free" "Disabled,Enabled" bitfld.long 0x04 7. " AUTODETECTPADENABLE ,MAC automatically detect the type of frame by comparing the two octets" "Disabled,Enabled" textline " " bitfld.long 0x04 6. " VLANPADENABLE ,MAC pad all short frames to 64 bytes and append a valid CRC" "Disabled,Enabled" bitfld.long 0x04 5. " PAD/CRCENABLE ,MAC pad all short frames" "Not padded,Padded" textline " " bitfld.long 0x04 4. " CRCENABLE ,Append a CRC to every frame whether padding was required or not" "Not appended,Appended" bitfld.long 0x04 3. " DELAYEDCRC ,Number of bytes (if any) of proprietary header information that exist on the front of IEEE 802.3 frames" "No header,4 bytes" textline " " bitfld.long 0x04 2. " HUGEFRAMEENABLE ,Frames of any length transmit and receive" "Disabled,Enabled" bitfld.long 0x04 1. " FRAMELENGTHCHECKING ,Both transmit and receive frame lengths compare to the Length/Type field" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " FULL-DUPLEX ,MAC Full-Duplex mode" "Disabled,Enabled" line.long 0x8 "IPGT,Back-to-Back Inter-Packet-Gap register" hexmask.long.byte 0x8 0.--6. 1. " BACK-TO-BACKINTER-PACKET-GAP ,Nibble time offset of the minimum possible period" line.long 0xC "IPGR,Non Back-to-Back Inter-Packet-Gap register" hexmask.long.byte 0xC 8.--14. 1. " NON-BACK-TO-BACK-INTER-PACKET-GAP_PART1 ,Optional carrierSense window" textline " " hexmask.long.byte 0xC 0.--6. 1. " NON-BACK-TO-BACK-INTER-PACKET-GAP_PART2 ,Non-Back-to-Back Inter-Packet-Gap" line.long 0x10 "CLRT,Collision window / Retry register" hexmask.long.byte 0x10 8.--13. 1. " COLLISIONWINDOW ,Slot time or collision window during which collisions occur in properly configured networks" bitfld.long 0x10 0.--3. " RETRANSMISSIONMAXIMUM ,Number of retransmission attempts following a collision before aborting the packet due to excessive collisions" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x14 "MAXF,Maximum Frame register" hexmask.long.word 0x14 0.--15. 1. " MAXIMUMFRAMELENGTH ,Maximum receive frame" line.long 0x18 "SUPP,PHY Support register" bitfld.long 0x18 8. " SPEED ,Configure the Reduced MII logic for the current operating speed" "10 Mbps,100 Mbps" line.long 0x1C "TEST,Test register" bitfld.long 0x1C 2. " TESTBACKPRESSURE ,MAC assert backpressure on the link" "Not asserted,Asserted" bitfld.long 0x1C 1. " TESTPAUSE ,MAC Control sublayer inhibit transmissions" "Not inhibited,Inhibited" textline " " bitfld.long 0x1C 0. " SHORTCUTPAUSEQUANTA ,Reduce the effective PAUSE quanta from 64 byte-times to 1 byte-time" "Not reduced,Reduced" line.long 0x20 "MCFG,MII Mgmt Configuration register" bitfld.long 0x20 15. " RESETMIIMGMT ,Reset the MII Management hardware" "No reset,Reset" bitfld.long 0x20 2.--5. " CLOCKSELECT ,MII Management Clock (MDC) which IEEE 802.3u defines to be no faster than 2.5 MHz" "Clock/4,Clock/4,Clock/6,Clock/8,Clock/10,Clock/14,Clock/20,Clock/28,Clock/36,Clock/40,Clock/44,Clock/48,Clock/52,Clock/56,Clock/60,Clock/64" textline " " bitfld.long 0x20 1. " SUPPRESSPREAMBLE ,MII Management hardware perform read/write cycles without the 32 bit preamble field" "Not performed,Performed" bitfld.long 0x20 0. " SCANINCREMENT ,MII Management hardware perform read cycles across a range of PHYs" "Not performed,Performed" line.long 0x24 "MCMD,MII Mgmt Command register" bitfld.long 0x24 1. " SCAN ,MII Management hardware perform Read cycles continuously" "Not performed,Performed" bitfld.long 0x24 0. " READ ,MII Management hardware perform a single Read cycle" "Not performed,Performed" line.long 0x28 "MADR,MII Mgmt Address register" bitfld.long 0x28 8.--12. " PHYADDRESS ,5 bit PHY Address field of Mgmt cycles" "Reserved,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F,10,11,12,13,14,15,16,17,18,19,1A,1B,1C,1D,1E,1F" bitfld.long 0x28 0.--4. " REGISTERADDRESS ,5 bit Register Address field of Mgmt cycles" "0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F,10,11,12,13,14,15,16,17,18,19,1A,1B,1C,1D,1E,1F" wgroup.long 0x2C++0x3 line.long 0x0 "MWTD,MII Mgmt Write Data register" hexmask.long.word 0x0 0.--15. 1. " WRITEDATA ,16 bit write data" rgroup.long 0x30++0x7 line.long 0x0 "MRDD,MII Mgmt Read Data register" hexmask.long.word 0x0 0.--15. 1. " READDATA ,16 bit read data" line.long 0x4 "MIND,MII Mgmt Indicators register" bitfld.long 0x04 3. " MIILinkFail ,MII Link Fail" "Not failed,Failed" bitfld.long 0x04 2. " NOTVALID ,Not valid" "Valid,Not valid" textline " " bitfld.long 0x04 1. " SCANNING ,Scanning" "Not scanning,Scanning" bitfld.long 0x04 0. " BUSY ,Busy" "Not busy,Busy" group.long 0x40++0xB line.long 0x0 "SA0,Station Address 0 register" hexmask.long.byte 0x0 8.--15. 1. " STATIONADDRESS1 ,First octet of the station address" hexmask.long.byte 0x0 0.--7. 1. " STATIONADDRESS2 ,Second octet of the station address" line.long 0x4 "SA1,Station Address 1 register" hexmask.long.byte 0x4 8.--15. 1. " STATIONADDRESS3 ,Third octet of the station address" hexmask.long.byte 0x4 0.--7. 1. " STATIONADDRESS4 ,Fourth octet of the station address" line.long 0x8 "SA2,Station Address 2 register" hexmask.long.byte 0x8 8.--15. 1. " STATIONADDRESS5 ,Fifth octet of the station address" hexmask.long.byte 0x8 0.--7. 1. " STATIONADDRESS6 ,Sixth octet of the station address" else hgroup.long 0x0++0x37 hide.long 0x0 "MAC1,MAC configuration register 1" hide.long 0x4 "MAC2,MAC configuration register 2" hide.long 0x8 "IPGT,Back-to-Back Inter-Packet-Gap register" hide.long 0xC "IPGR,Non Back-to-Back Inter-Packet-Gap register" hide.long 0x10 "CLRT,Collision window / Retry register" hide.long 0x14 "MAXF,Maximum Frame register" hide.long 0x18 "SUPP,PHY Support register" hide.long 0x1C "TEST,Test register" hide.long 0x20 "MCFG,MII Mgmt Configuration register" hide.long 0x24 "MCMD,MII Mgmt Command register" hide.long 0x28 "MADR,MII Mgmt Address register" hide.long 0x2C "MWTD,MII Mgmt Write Data register" hide.long 0x30 "MRDD,MII Mgmt Read Data register" hide.long 0x34 "MIND,MII Mgmt Indicators register" hgroup.long 0x40++0xB hide.long 0x0 "SA0,Station Address 0 register" hide.long 0x4 "SA1,Station Address 1 register" hide.long 0x8 "SA2,Station Address 2 register" endif tree.end width 0x14 tree "Control Registers" if (((per.long((ad:0x20084000+0xFF4)))&0x80000000)==0x00000000) group.long 0x100++0x3 line.long 0x0 "Command,Command register" bitfld.long 0x00 10. " FullDuplex ,Full duplex operation" "Disabled,Enabled" bitfld.long 0x00 9. " RMII ,Mode selection" "MII,RMII" textline " " bitfld.long 0x00 8. " TxFlowControl ,Enable IEEE 802.3 / clause 31 flow control" "Disabled,Enabled" bitfld.long 0x00 7. " PassRxFilter ,Disable receive filtering" "No,Yes" textline " " bitfld.long 0x00 6. " PassRuntFrame ,Pass Runt Frame" "Filtered out,Passed" bitfld.long 0x00 5. " RxReset ,Receive datapath reset" "No reset,Reset" textline " " bitfld.long 0x00 4. " TxReset ,Transmit datapath reset" "No reset,Reset" bitfld.long 0x00 3. " RegReset ,All datapaths and the host registers reset" "No reset,Reset" textline " " bitfld.long 0x00 1. " TxEnable ,Enable transmit" "Disabled,Enabled" bitfld.long 0x00 0. " RxEnable ,Enable receive" "Disabled,Enabled" rgroup.long 0x104++0x3 line.long 0x0 "Status,Status register" bitfld.long 0x0 1. " TxStatus ,Transmit channel active" "Inactive,Active" bitfld.long 0x0 0. " RxStatus ,Receive channel active" "Inactive,Active" group.long 0x108++0xB line.long 0x0 "RxDescriptor,Receive descriptor base address register" hexmask.long 0x0 2.--31. 0x4 " RxDescriptor ,MSBs of receive descriptor base address" line.long 0x4 "RxStatus,Receive status base address register" hexmask.long 0x4 3.--31. 0x8 " RxStatus ,MSBs of receive status base address" line.long 0x8 "RxDescriptorNumber,Receive number of descriptors register" hexmask.long.word 0x8 0.--15. 1. " RxDescriptorNumber ,Number of descriptors in the descriptor array for which RxDescriptor is the base address" rgroup.long 0x114++0x3 line.long 0x0 "RxProduceIndex,Receive produce index register" hexmask.long.word 0x0 0.--15. 1. " RxProduceIndex ,Index of the descriptor that is going to be filled next by the receive datapath" group.long 0x118++0x13 line.long 0x0 "RxConsumeIndex,Receive consume index register" hexmask.long.word 0x0 0.--15. 1. " RxConsumeIndex ,Index of the descriptor that is going to be processed next by the receive" line.long 0x4 "TxDescriptor,Transmit descriptor base address register" hexmask.long 0x4 2.--31. 0x4 " TxDescriptor ,MSBs of transmit descriptor base address" line.long 0x8 "TxStatus,Transmit status base address register" hexmask.long 0x8 2.--31. 0x4 " TxStatus ,MSBs of transmit status base address" line.long 0xC "TxDescriptorNumber,Transmit number of descriptors register" hexmask.long.word 0xC 0.--15. 1. " TxDescriptorNumber ,Number of descriptors in the descriptor array for which TxDescriptor is the base address" line.long 0x10 "TxProduceIndex,Transmit produce index register" hexmask.long.word 0x10 0.--15. 1. " TxProduceIndex ,Index of the descriptor that is going to be filled next by the transmit software driver" rgroup.long 0x12C++0x3 line.long 0x0 "TxConsumeIndex,Transmit consume index register" hexmask.long.word 0x0 0.--15. 1. " TxConsumeIndex ,Index of the descriptor that is going to be transmitted next by the transmit datapath" rgroup.long 0x158++0xB line.long 0x0 "TSV0,Transmit status vector 0 register" bitfld.long 0x00 31. " VLAN ,Frame's length/type field contained 0x8100 which is the VLAN protocol identifier" "Not VLAN,VLAN" bitfld.long 0x00 30. " Backpressure ,Carrier-sense method backpressure was previously applied" "Not applied,Applied" textline " " bitfld.long 0x00 29. " Pause ,The frame was a control frame with a valid PAUSE opcode" "No PAUSE,PAUSE" bitfld.long 0x00 28. " Controlframe ,The frame was a control frame" "Not control,Control" textline " " hexmask.long.word 0x00 12.--27. 1. " Totalbytes ,The total number of bytes transferred including collided attempts" bitfld.long 0x00 11. " Underrun ,Host side caused buffer underrun" "No underrun,Underrun" textline " " bitfld.long 0x00 10. " Giant ,Byte count in frame greater than can be represented in the transmit byte count field in TSV1" "Not greater,Greater" textline " " bitfld.long 0x00 9. " LateCollision ,Collision occur beyond collision window (512 bit times)" "Not occurred,Occurred" textline " " bitfld.long 0x00 8. " ExcessiveCollision ,Packet abort due to exceeding of maximum allowed number of collisions" "Not aborted,Aborted" textline " " bitfld.long 0x00 7. " ExcessiveDefer ,Excessive Defer" "Not deferred,Deferred" textline " " bitfld.long 0x00 6. " PacketDefer ,Packet Defer" "Not deferred,Deferred" textline " " bitfld.long 0x00 5. " Broadcast ,Broadcast address" "Not broadcast,Broadcast" textline " " bitfld.long 0x00 4. " Multicast ,Multicast address" "Not multicast,Multicast" textline " " bitfld.long 0x00 3. " Done ,Transmission of packet complete" "Not completed,Completed" textline " " bitfld.long 0x00 2. " LOOR ,Length out of range" "In range,Out of range" bitfld.long 0x00 1. " LCE ,Length check error" "No error,Error" textline " " bitfld.long 0x00 0. " CRCerror ,CRC error" "No error,Error" line.long 0x4 "TSV1,Transmit status vector 1 register" bitfld.long 0x4 16.--19. " TCC ,Transmit collision count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x4 0.--15. 1. " TBC ,Transmit byte count" line.long 0x8 "RSV,Receive status vector register" bitfld.long 0x08 30. " VLAN ,Frame's length/type field contained 0x8100 which is the VLAN protocol identifier" "Not VLAN,VLAN" textline " " bitfld.long 0x08 29. " UnsupportedOpcode ,The current frame was recognized as a Control Frame but contains an unknown opcode" "Not unsupported,Unsupported" textline " " bitfld.long 0x08 28. " PAUSE ,The frame was a control frame with a valid PAUSE opcode" "No PAUSE,PAUSE" textline " " bitfld.long 0x08 27. " Controlframe ,The frame was a control frame" "Not control,Control" textline " " bitfld.long 0x08 26. " DribbleNibble ,After the end of packet another 1-7 bits were received" "No dribble nibble,Dribble nibble" textline " " bitfld.long 0x08 25. " Broadcast ,The packet destination was a broadcast address" "Not broadcast,Broadcast" textline " " bitfld.long 0x08 24. " Multicast ,The packet destination was a multicast address" "Not multicast,Multicast" bitfld.long 0x08 23. " ReceiveOK ,The packet had valid CRC and no symbol errors" "Not OK,OK" textline " " bitfld.long 0x08 22. " LOOR ,Length out of range" "In range,Out of range" bitfld.long 0x08 21. " LCE ,Length check error" "No error,Error" textline " " bitfld.long 0x08 20. " CRCerror ,The attached CRC in the packet did not match the internally generated CRC" "No error,Error" bitfld.long 0x08 19. " RCV ,Receive code violation" "Valid,Not valid" textline " " bitfld.long 0x08 18. " CEPS ,Carrier event previously seen" "Not seen,Seen" bitfld.long 0x08 17. " RXDVEPS ,RXDV event previously seen" "Not seen,Seen" textline " " bitfld.long 0x08 16. " PPI ,Packet previously ignored" "Not dropped,Dropped" hexmask.long.word 0x08 0.--15. 1. " RBC ,Received byte count" group.long 0x170++0x3 line.long 0x0 "FlowControlCounter,Flow control counter register" hexmask.long.word 0x0 16.--31. 1. " PauseTimer ,Pause Timer" hexmask.long.word 0x0 0.--15. 1. " MirrorCounter ,Number of cycles before re-issuing the Pause control frame" rgroup.long 0x174++0x3 line.long 0x0 "FlowControlStatus,Flow control status register" hexmask.long.word 0x0 0.--15. 1. " MirrorCounterCurrent ,Mirror Counter Current" else hgroup.long 0x100++0x2F hide.long 0x0 "Command,Command register" hide.long 0x4 "Status,Status register" hide.long 0x8 "RxDescriptor,Receive descriptor base address register" hide.long 0xC "RxStatus,Receive status base address register" hide.long 0x10 "RxDescriptorNumber,Receive number of descriptors register" hide.long 0x14 "RxProduceIndex,Receive produce index register" hide.long 0x18 "RxConsumeIndex,Receive consume index register" hide.long 0x1C "TxDescriptor,Transmit descriptor base address register" hide.long 0x20 "TxStatus,Transmit status base address register" hide.long 0x24 "TxDescriptorNumber,Transmit number of descriptors register" hide.long 0x28 "TxProduceIndex,Transmit produce index register" hide.long 0x2C "TxConsumeIndex,Transmit consume index register" hgroup.long 0x158++0xB hide.long 0x0 "TSV0,Transmit status vector 0 register" hide.long 0x4 "TSV1,Transmit status vector 1 register" hide.long 0x8 "RSV,Receive status vector register" hgroup.long 0x170++0x7 hide.long 0x0 "FlowControlCounter,Flow control counter register" hide.long 0x4 "FlowControlStatus,Flow control status register" endif tree.end width 0x13 tree "Receive Filter Registers" if (((per.long((ad:0x20084000+0xFF4)))&0x80000000)==0x00000000) group.long 0x200++0x3 line.long 0x0 "RxFilterCtrl,Receive filter control register" bitfld.long 0x00 13. " RxFilterEnWoL ,Rx Filter Enable WoL" "Not generated,Generated" textline " " bitfld.long 0x00 12. " MagicPacketEnWoL ,Magic Packet Enable WoL" "Not generated,Generated" textline " " bitfld.long 0x00 5. " AcceptPerfectEn ,Accept Perfect Enable" "Not accepted,Accepted" textline " " bitfld.long 0x00 4. " AcceptMulticastHashEn ,Accept Multicast Hash Enable" "Not accepted,Accepted" textline " " bitfld.long 0x00 3. " AcceptUnicastHashEn ,Accept Unicast Hash Enable" "Not accepted,Accepted" textline " " bitfld.long 0x00 2. " AcceptMulticastEn ,Accept Multicast Enable" "Not accepted,Accepted" textline " " bitfld.long 0x00 1. " AcceptBroadcastEn ,Accept Broadcast Enable" "Not accepted,Accepted" textline " " bitfld.long 0x00 0. " AcceptUnicastEn ,Accept Unicast Enable" "Not accepted,Accepted" rgroup.long 0x204++0x3 line.long 0x0 "RxFilterWoLStatus,Receive filter WoL status register" bitfld.long 0x00 8. " MagicPacketWoL ,Magic Packet WoL" "Not caused,Caused" textline " " bitfld.long 0x00 7. " RxFilterWoL ,Rx Filter WoL" "Not caused,Caused" textline " " bitfld.long 0x00 5. " AcceptPerfectWoL ,Accept Perfect WoL" "Not caused,Caused" textline " " bitfld.long 0x00 4. " AcceptMulticastHashWoL ,Accept Multicast Hash WoL" "Not caused,Caused" textline " " bitfld.long 0x00 3. " AcceptUnicastHashWoL ,Accept Unicast Hash WoL" "Not caused,Caused" textline " " bitfld.long 0x00 2. " AcceptMulticastWoL ,Accept Multicast WoL" "Not caused,Caused" textline " " bitfld.long 0x00 1. " AcceptBroadcastWoL ,Accept Broadcast WoL" "Not caused,Caused" textline " " bitfld.long 0x00 0. " AcceptUnicastWoL ,Accept Unicast WoL" "Not caused,Caused" wgroup.long 0x208++0x3 line.long 0x0 "RxFilterWoLClear,Receive filter WoL clear register" bitfld.long 0x00 8. " MagicPacketWoLClr ,Magic Packet Wake-up on LAN Clear" "Not cleared,Cleared" textline " " bitfld.long 0x00 7. " RxFilterWoLClr ,Receive Filter Wake-up on LAN Clear" "Not cleared,Cleared" textline " " bitfld.long 0x00 5. " AcceptPerfectWoLClr ,Accept Perfect Wake-up on LAN Clear" "Not cleared,Cleared" textline " " bitfld.long 0x00 4. " AcceptMulticastHashWoLClr ,Accept Multicast Hash Wake-up on LAN Clear" "Not cleared,Cleared" textline " " bitfld.long 0x00 3. " AcceptUnicastHashWoLClr ,Accept Unicast Hash Wake-up on LAN Clear" "Not cleared,Cleared" textline " " bitfld.long 0x00 2. " AcceptMulticastWoLClr ,Accept Multicast Wake-up on LAN Clear" "Not cleared,Cleared" textline " " bitfld.long 0x00 1. " AcceptBroadcastWoLClr ,Accept Broadcast Wake-up on LAN Clear" "Not cleared,Cleared" textline " " bitfld.long 0x00 0. " AcceptUnicastWoLClr ,Accept Unicast Wake-up on LAN Clear" "Not cleared,Cleared" group.long 0x210++0x7 line.long 0x0 "HashFilterL,Hash filter table LSBs register" line.long 0x4 "HashFilterH,Hash filter table MSBs register" else hgroup.long 0x200++0xB hide.long 0x0 "RxFilterCtrl,Receive filter control register" hide.long 0x4 "RxFilterWoLStatus,Receive filter WoL status register" hide.long 0x8 "RxFilterWoLClear,Receive filter WoL clear register" hgroup.long 0x210++0x7 hide.long 0x0 "HashFilterL,Hash filter table LSBs register" hide.long 0x4 "HashFilterH,Hash filter table MSBs register" endif tree.end width 0xB tree "Module Control Registers" if (((per.long((ad:0x20084000+0xFF4)))&0x80000000)==0x00000000) group.long 0xFE0++0x3 line.long 0x0 "IntStatus,Interrupt status register" setclrfld.long 0x00 13. 0xC 13. 0x8 13. " WakeupInt_set/clr ,Interrupt triggered by a Wakeup event detected by the receive filter" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 12. 0xC 12. 0x8 12. " SoftInt_set/clr ,Interrupt triggered by software writing a 1 to the SoftintSet bit in the IntSet register" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 7. 0xC 7. 0x8 7. " TxDoneInt_set/clr ,Interrupt triggered when a descriptor has been transmitted" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 6. 0xC 6. 0x8 6. " TxFinishedInt_set/clr ,Interrupt triggered when all transmit descriptors have been processed" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 5. 0xC 5. 0x8 5. " TxErrorInt_set/clr ,Interrupt trigger on transmit errors (LateCollision/ExcessiveCollision and ExcessiveDefer/NoDescriptor/Underrun)" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 4. 0xC 4. 0x8 4. " TxUnderrunInt_set/clr ,Interrupt set on a fatal underrun error in the transmit queue" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 3. 0xC 3. 0x8 3. " RxDoneInt_set/clr ,Interrupt triggered when a receive descriptor has been processed" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 2. 0xC 2. 0x8 2. " RxFinishedInt_set/clr ,Interrupt triggered when all receive descriptors have been processed" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 1. 0xC 1. 0x8 1. " RxErrorInt_set/clr ,Interrupt trigger on receive errors" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 0. 0xC 0. 0x8 0. " RxOverrunInt_set/clr ,Interrupt set on a fatal overrun error in the receive queue" "No interrupt,Interrupt" group.long 0xFE4++0x3 line.long 0x0 "IntEnable,Interrupt enable register" bitfld.long 0x00 13. " WakeupIntEn ,Enable for interrupt triggered by a Wakeup event detected by the receive filter" "Disabled,Enabled" bitfld.long 0x00 12. " SoftIntEn ,Enable for interrupt triggered by the SoftInt bit in the IntStatus register" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " TxDoneIntEn ,Enable for interrupt triggered when a descriptor has been transmitted" "Disabled,Enabled" bitfld.long 0x00 6. " TxFinishedIntEn ,Enable for interrupt triggered when all transmit descriptors have been processed" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " TxErrorIntEn ,Enable for interrupt trigger on transmit errors" "Disabled,Enabled" bitfld.long 0x00 4. " TxUnderrunIntEn ,Enable for interrupt trigger on transmit buffer or descriptor underrun situations" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " RxDoneIntEn ,Enable for interrupt triggered when a receive descriptor has been processed" "Disabled,Enabled" bitfld.long 0x00 2. " RxFinishedIntEn ,Enable for interrupt triggered when all receive descriptors have been processed" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " RxErrorIntEn ,Enable for interrupt trigger on receive errors" "Disabled,Enabled" bitfld.long 0x00 0. " RxOverrunIntEn ,Enable for interrupt trigger on receive buffer overrun or descriptor underrun situations" "Disabled,Enabled" else hgroup.long 0xFE0++0x7 hide.long 0x0 "IntStatus,Interrupt status register" hide.long 0x4 "IntEnable,Interrupt enable register" endif group.long 0xFF4++0x3 line.long 0x0 "PowerDown,Power-down register" bitfld.long 0x0 31. " PowerDownMACAHB ,Power Down Media Access Control AHB" "Access allowed,Access denied" tree.end endif tree.end sif (cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788") tree "LCD (LCD controller)" base ad:0x20088000 width 14. sif (cpu()!="LPC1810"&&cpu()!="LPC1820"&&cpu()!="LPC1830"&&cpu()!="LPC1850"&&cpu()!="LPC1853"&&cpu()!="LPC1857")&&(cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") group.long 0x200841B8++0x3 line.long 0x00 "LCD_CFG,LCD Configuration register" bitfld.long 0x00 0.--4. " CLKDIV ,LCD panel clock prescaler selection" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" endif group.long 0x00++0x17 line.long 0x00 "LCD_TIMH,Horizontal Timing register" hexmask.long.byte 0x00 24.--31. 1. " HBP ,Horizontal back porch" hexmask.long.byte 0x00 16.--23. 1. " HFP ,Horizontal front porch" hexmask.long.byte 0x00 8.--15. 1. " HSW ,Horizontal synchronization pulse width" textline " " bitfld.long 0x00 2.--7. " PPL ,Pixels-per-line" "16,32,48,64,80,96,112,128,144,160,176,192,208,224,240,256,272,288,304,320,336,352,368,384,400,416,432,448,464,480,496,512,528,544,560,576,592,608,624,640,656,672,688,704,720,736,752,768,784,800,816,832,848,864,880,896,912,928,944,960,976,992,1008,1024" line.long 0x04 "LCD_TIMV,Vertical Timing register" hexmask.long.byte 0x04 24.--31. 1. " VBP ,Vertical back porch" hexmask.long.byte 0x04 16.--23. 1. " VFP ,Vertical front porch" bitfld.long 0x04 10.--15. " VSW ,Vertical synchronization pulse width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " hexmask.long.word 0x04 0.--9. 1. " LPP ,Lines per panel" line.long 0x08 "LCD_POL,Clock and Signal Polarity register" bitfld.long 0x08 27.--31. " PCD_HI ,Panel clock divisor High" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x08 26. " BCD ,Bypass pixel clock divider" "Not bypassed,Bypassed" hexmask.long.word 0x08 16.--25. 1. " CPL ,Clocks per line" textline " " bitfld.long 0x08 14. " IOE ,Invert output enable" "Active HIGH,Active LOW" bitfld.long 0x08 13. " IPC ,Invert panel clock" "Rising,Falling" bitfld.long 0x08 12. " IHS ,Invert horizontal synchronization" "Not inverted,Inverted" textline " " bitfld.long 0x08 11. " IVS ,Invert vertical synchronization" "Not inverted,Inverted" bitfld.long 0x08 6.--10. " ACB ,AC bias pin frequency" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x08 5. " CLKSEL ,Selection of the source for LCDCLK" "CCLK,LCD_CLKIN" textline " " bitfld.long 0x08 0.--4. " PCD_LO ,Panel clock divisor Low" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x0C "LCD_LE,Line End Control register" bitfld.long 0x0C 16. " LEE ,LCD Line end enable" "Disabled,Enabled" hexmask.long.byte 0x0C 0.--6. 1. " LED ,Line-end delay" line.long 0x10 "LCD_UPBASE,Upper Panel Frame Base Address register" hexmask.long 0x10 3.--31. 0x8 " LCDUPBASE ,LCD upper panel base address" line.long 0x14 "LCD_LPBASE,Lower Panel Frame Base Address register" hexmask.long 0x14 3.--31. 0x8 " LCDLPBASE ,LCD lower panel base address" if (((per.l(ad:0x20088018))&0x20)==0x20) group.long 0x18++0x3 line.long 0x00 "LCD_CTRL,LCD Control register" bitfld.long 0x00 16. " WATERMARK ,LCD DMA FIFO watermark level" ">=4,>=8" bitfld.long 0x00 12.--13. " LCDVCOMP ,LCD Vertical Compare Interrupt" "Vsync,Back porch,Active video,Front porch" bitfld.long 0x00 11. " LCDPWR ,LCD power enable" "Not gated,Gated" textline " " bitfld.long 0x00 10. " BEPO ,Big-Endian Pixel Ordering" "Little,Big" bitfld.long 0x00 9. " BEBO ,Big-endian Byte Order" "Little,Big" bitfld.long 0x00 8. " BGR ,Color format selection" "RGB,BGR" textline " " bitfld.long 0x00 7. " LCDDUAL ,Single or Dual LCD panel selection" "Single,Dual" textline " " bitfld.long 0x00 5. " LCDTFT ,LCD panel TFT type selection" "STN,TFT" bitfld.long 0x00 1.--3. " LCDBPP ,LCD bits per pixel" "1 bpp,2 bpp,4 bpp,8 bpp,16 bpp,24 bpp,16 bpp(5:6:5),12 bpp(4:4:4)" textline " " bitfld.long 0x00 0. " LCDEN ,LCD enable control bit" "Disabled,Enabled" elif (((per.l(ad:0x20088018))&0x30)==0x10) group.long 0x18++0x3 line.long 0x00 "LCD_CTRL,LCD Control register" bitfld.long 0x00 16. " WATERMARK ,LCD DMA FIFO watermark level" ">=4,>=8" bitfld.long 0x00 12.--13. " LCDVCOMP ,LCD Vertical Compare Interrupt" "Vsync,Back porch,Active video,Front porch" bitfld.long 0x00 11. " LCDPWR ,LCD power enable" "Not gated,Gated" textline " " bitfld.long 0x00 10. " BEPO ,Big-Endian Pixel Ordering" "Little,Big" bitfld.long 0x00 9. " BEBO ,Big-endian Byte Order" "Little,Big" textline " " bitfld.long 0x00 8. " BGR ,Color format selection" "RGB,BGR" textline " " bitfld.long 0x00 7. " LCDDUAL ,Single or Dual LCD panel selection" "Single,Dual" bitfld.long 0x00 6. " LCDMONO8 ,Monochrome LCD interface width" "4-bit,8-bit" bitfld.long 0x00 5. " LCDTFT ,LCD panel TFT type selection" "STN,TFT" textline " " bitfld.long 0x00 4. " LCDBW ,STN LCD monochrome/color selection" "Color,Monochrome" bitfld.long 0x00 1.--3. " LCDBPP ,LCD bits per pixel" "1 bpp,2 bpp,4 bpp,8 bpp,16 bpp,Reserved,16 bpp(5:6:5),12 bpp(4:4:4)" bitfld.long 0x00 0. " LCDEN ,LCD enable control bit" "Disabled,Enabled" else group.long 0x18++0x3 line.long 0x00 "LCD_CTRL,LCD Control register" bitfld.long 0x00 16. " WATERMARK ,LCD DMA FIFO watermark level" ">=4,>=8" bitfld.long 0x00 12.--13. " LCDVCOMP ,LCD Vertical Compare Interrupt" "Vsync,Back porch,Active video,Front porch" bitfld.long 0x00 11. " LCDPWR ,LCD power enable" "Not gated,Gated" textline " " bitfld.long 0x00 10. " BEPO ,Big-Endian Pixel Ordering" "Little,Big" bitfld.long 0x00 9. " BEBO ,Big-endian Byte Order" "Little,Big" bitfld.long 0x00 8. " BGR ,Color format selection" "RGB,BGR" textline " " bitfld.long 0x00 7. " LCDDUAL ,Single or Dual LCD panel selection" "Single,Dual" bitfld.long 0x00 5. " LCDTFT ,LCD panel TFT type selection" "STN,TFT" textline " " bitfld.long 0x00 4. " LCDBW ,STN LCD monochrome/color selection" "Color,Monochrome" bitfld.long 0x00 1.--3. " LCDBPP ,LCD bits per pixel" "1 bpp,2 bpp,4 bpp,8 bpp,16 bpp,Reserved,16 bpp(5:6:5),12 bpp(4:4:4)" bitfld.long 0x00 0. " LCDEN ,LCD enable control bit" "Disabled,Enabled" endif group.long 0x1C++0x3 line.long 0x00 "LCD_INTMSK,Interrupt Mask register" bitfld.long 0x00 4. " BERIM ,AHB master error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 3. " VCOMPIM ,Vertical compare interrupt enable" "Disabled,Enabled" bitfld.long 0x00 2. " LNBUIM ,LCD next base address update interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " FUFIM ,FIFO underflow interrupt enable" "Disabled,Enabled" rgroup.long 0x20++0x3 line.long 0x00 "LCD_INTRAW,Raw interrupt status register" bitfld.long 0x00 4. " BERRAW ,AHB master bus error raw interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 3. " VCOMPRIS ,Vertical compare raw interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 2. " LNBURIS ,LCD next address base update raw interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " FUFRIS ,FIFO underflow raw interrupt status" "No interrupt,Interrupt" rgroup.long 0x24++0x3 line.long 0x00 "LCD_INTSTAT,Masked Interrupt Status register" bitfld.long 0x00 4. " BERMIS ,AHB master bus error masked interrupt status" "Not masked,Masked" bitfld.long 0x00 3. " VCOMPMIS ,Vertical compare masked interrupt status" "Not masked,Masked" bitfld.long 0x00 2. " LNBUMIS ,LCD next address base update masked interrupt status" "Not masked,Masked" textline " " bitfld.long 0x00 1. " FUFMIS ,FIFO underflow masked interrupt status" "Not masked,Masked" wgroup.long 0x28++0x3 line.long 0x00 "LCD_INTCLR,Interrupt Clear register" bitfld.long 0x00 4. " BERIC ,AHB master error interrupt clear" "Not clear,Clear" bitfld.long 0x00 3. " VCOMPIC ,Vertical compare interrupt clear" "Not clear,Clear" bitfld.long 0x00 2. " LNBUIC ,LCD next address base update interrupt clear" "Not clear,Clear" textline " " bitfld.long 0x00 1. " FUFIC ,FIFO underflow interrupt clear" "Not clear,Clear" rgroup.long 0x2C++0x7 line.long 0x00 "LCD_UPCURR,Upper panel current address register" line.long 0x04 "LCD_LPCURR,Lower panel current address register" tree "Color Palette registers" textline "" if (((per.l(ad:0x20088018))&0x20)==0x20) group.long 0x200++0x1FF line.long 0x0 "LCD_PAL0 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x0 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x0 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x0 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x0 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x0 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x4 "LCD_PAL1 ,Color Palette register" bitfld.long 0x4 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x4 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x4 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x4 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x4 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x4 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x4 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x4 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x8 "LCD_PAL2 ,Color Palette register" bitfld.long 0x8 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x8 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x8 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x8 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x8 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x8 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x8 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x8 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0xC "LCD_PAL3 ,Color Palette register" bitfld.long 0xC 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0xC 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0xC 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0xC 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0xC 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0xC 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0xC 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0xC 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x10 "LCD_PAL4 ,Color Palette register" bitfld.long 0x10 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x10 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x10 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x10 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x10 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x10 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x10 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x10 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x14 "LCD_PAL5 ,Color Palette register" bitfld.long 0x14 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x14 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x14 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x14 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x14 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x14 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x14 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x14 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x18 "LCD_PAL6 ,Color Palette register" bitfld.long 0x18 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x18 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x18 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x18 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x18 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x18 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x18 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x18 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x1C "LCD_PAL7 ,Color Palette register" bitfld.long 0x1C 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x1C 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x1C 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x1C 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x1C 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x1C 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x1C 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x1C 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x20 "LCD_PAL8 ,Color Palette register" bitfld.long 0x20 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x20 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x20 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x20 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x20 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x20 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x20 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x20 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x24 "LCD_PAL9 ,Color Palette register" bitfld.long 0x24 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x24 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x24 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x24 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x24 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x24 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x24 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x24 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x28 "LCD_PAL10 ,Color Palette register" bitfld.long 0x28 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x28 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x28 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x28 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x28 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x28 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x28 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x28 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x2C "LCD_PAL11 ,Color Palette register" bitfld.long 0x2C 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x2C 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x2C 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x2C 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x2C 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x2C 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x2C 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x2C 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x30 "LCD_PAL12 ,Color Palette register" bitfld.long 0x30 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x30 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x30 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x30 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x30 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x30 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x30 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x30 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x34 "LCD_PAL13 ,Color Palette register" bitfld.long 0x34 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x34 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x34 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x34 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x34 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x34 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x34 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x34 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x38 "LCD_PAL14 ,Color Palette register" bitfld.long 0x38 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x38 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x38 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x38 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x38 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x38 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x38 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x38 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x3C "LCD_PAL15 ,Color Palette register" bitfld.long 0x3C 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x3C 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x3C 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x3C 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x3C 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x3C 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x3C 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x3C 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x40 "LCD_PAL16 ,Color Palette register" bitfld.long 0x40 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x40 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x40 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x40 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x40 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x40 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x40 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x40 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x44 "LCD_PAL17 ,Color Palette register" bitfld.long 0x44 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x44 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x44 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x44 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x44 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x44 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x44 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x44 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x48 "LCD_PAL18 ,Color Palette register" bitfld.long 0x48 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x48 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x48 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x48 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x48 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x48 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x48 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x48 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x4C "LCD_PAL19 ,Color Palette register" bitfld.long 0x4C 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x4C 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x4C 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x4C 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x4C 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x4C 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x4C 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x4C 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x50 "LCD_PAL20 ,Color Palette register" bitfld.long 0x50 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x50 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x50 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x50 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x50 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x50 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x50 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x50 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x54 "LCD_PAL21 ,Color Palette register" bitfld.long 0x54 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x54 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x54 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x54 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x54 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x54 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x54 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x54 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x58 "LCD_PAL22 ,Color Palette register" bitfld.long 0x58 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x58 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x58 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x58 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x58 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x58 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x58 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x58 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x5C "LCD_PAL23 ,Color Palette register" bitfld.long 0x5C 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x5C 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x5C 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x5C 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x5C 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x5C 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x5C 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x5C 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x60 "LCD_PAL24 ,Color Palette register" bitfld.long 0x60 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x60 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x60 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x60 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x60 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x60 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x60 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x60 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x64 "LCD_PAL25 ,Color Palette register" bitfld.long 0x64 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x64 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x64 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x64 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x64 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x64 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x64 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x64 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x68 "LCD_PAL26 ,Color Palette register" bitfld.long 0x68 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x68 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x68 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x68 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x68 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x68 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x68 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x68 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x6C "LCD_PAL27 ,Color Palette register" bitfld.long 0x6C 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x6C 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x6C 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x6C 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x6C 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x6C 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x6C 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x6C 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x70 "LCD_PAL28 ,Color Palette register" bitfld.long 0x70 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x70 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x70 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x70 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x70 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x70 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x70 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x70 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x74 "LCD_PAL29 ,Color Palette register" bitfld.long 0x74 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x74 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x74 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x74 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x74 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x74 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x74 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x74 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x78 "LCD_PAL30 ,Color Palette register" bitfld.long 0x78 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x78 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x78 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x78 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x78 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x78 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x78 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x78 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x7C "LCD_PAL31 ,Color Palette register" bitfld.long 0x7C 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x7C 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x7C 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x7C 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x7C 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x7C 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x7C 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x7C 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x80 "LCD_PAL32 ,Color Palette register" bitfld.long 0x80 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x80 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x80 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x80 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x80 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x80 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x80 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x80 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x84 "LCD_PAL33 ,Color Palette register" bitfld.long 0x84 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x84 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x84 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x84 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x84 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x84 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x84 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x84 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x88 "LCD_PAL34 ,Color Palette register" bitfld.long 0x88 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x88 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x88 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x88 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x88 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x88 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x88 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x88 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x8C "LCD_PAL35 ,Color Palette register" bitfld.long 0x8C 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x8C 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x8C 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x8C 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x8C 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x8C 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x8C 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x8C 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x90 "LCD_PAL36 ,Color Palette register" bitfld.long 0x90 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x90 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x90 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x90 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x90 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x90 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x90 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x90 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x94 "LCD_PAL37 ,Color Palette register" bitfld.long 0x94 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x94 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x94 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x94 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x94 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x94 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x94 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x94 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x98 "LCD_PAL38 ,Color Palette register" bitfld.long 0x98 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x98 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x98 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x98 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x98 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x98 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x98 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x98 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x9C "LCD_PAL39 ,Color Palette register" bitfld.long 0x9C 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x9C 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x9C 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x9C 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x9C 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x9C 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x9C 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x9C 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0xA0 "LCD_PAL40 ,Color Palette register" bitfld.long 0xA0 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0xA0 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0xA0 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0xA0 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0xA0 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0xA0 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0xA0 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0xA0 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0xA4 "LCD_PAL41 ,Color Palette register" bitfld.long 0xA4 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0xA4 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0xA4 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0xA4 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0xA4 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0xA4 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0xA4 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0xA4 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0xA8 "LCD_PAL42 ,Color Palette register" bitfld.long 0xA8 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0xA8 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0xA8 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0xA8 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0xA8 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0xA8 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0xA8 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0xA8 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0xAC "LCD_PAL43 ,Color Palette register" bitfld.long 0xAC 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0xAC 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0xAC 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0xAC 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0xAC 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0xAC 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0xAC 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0xAC 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0xB0 "LCD_PAL44 ,Color Palette register" bitfld.long 0xB0 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0xB0 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0xB0 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0xB0 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0xB0 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0xB0 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0xB0 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0xB0 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0xB4 "LCD_PAL45 ,Color Palette register" bitfld.long 0xB4 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0xB4 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0xB4 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0xB4 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0xB4 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0xB4 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0xB4 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0xB4 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0xB8 "LCD_PAL46 ,Color Palette register" bitfld.long 0xB8 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0xB8 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0xB8 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0xB8 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0xB8 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0xB8 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0xB8 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0xB8 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0xBC "LCD_PAL47 ,Color Palette register" bitfld.long 0xBC 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0xBC 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0xBC 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0xBC 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0xBC 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0xBC 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0xBC 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0xBC 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0xC0 "LCD_PAL48 ,Color Palette register" bitfld.long 0xC0 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0xC0 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0xC0 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0xC0 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0xC0 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0xC0 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0xC0 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0xC0 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0xC4 "LCD_PAL49 ,Color Palette register" bitfld.long 0xC4 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0xC4 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0xC4 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0xC4 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0xC4 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0xC4 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0xC4 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0xC4 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0xC8 "LCD_PAL50 ,Color Palette register" bitfld.long 0xC8 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0xC8 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0xC8 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0xC8 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0xC8 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0xC8 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0xC8 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0xC8 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0xCC "LCD_PAL51 ,Color Palette register" bitfld.long 0xCC 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0xCC 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0xCC 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0xCC 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0xCC 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0xCC 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0xCC 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0xCC 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0xD0 "LCD_PAL52 ,Color Palette register" bitfld.long 0xD0 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0xD0 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0xD0 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0xD0 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0xD0 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0xD0 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0xD0 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0xD0 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0xD4 "LCD_PAL53 ,Color Palette register" bitfld.long 0xD4 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0xD4 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0xD4 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0xD4 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0xD4 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0xD4 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0xD4 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0xD4 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0xD8 "LCD_PAL54 ,Color Palette register" bitfld.long 0xD8 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0xD8 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0xD8 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0xD8 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0xD8 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0xD8 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0xD8 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0xD8 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0xDC "LCD_PAL55 ,Color Palette register" bitfld.long 0xDC 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0xDC 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0xDC 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0xDC 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0xDC 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0xDC 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0xDC 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0xDC 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0xE0 "LCD_PAL56 ,Color Palette register" bitfld.long 0xE0 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0xE0 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0xE0 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0xE0 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0xE0 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0xE0 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0xE0 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0xE0 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0xE4 "LCD_PAL57 ,Color Palette register" bitfld.long 0xE4 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0xE4 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0xE4 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0xE4 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0xE4 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0xE4 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0xE4 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0xE4 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0xE8 "LCD_PAL58 ,Color Palette register" bitfld.long 0xE8 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0xE8 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0xE8 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0xE8 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0xE8 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0xE8 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0xE8 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0xE8 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0xEC "LCD_PAL59 ,Color Palette register" bitfld.long 0xEC 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0xEC 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0xEC 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0xEC 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0xEC 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0xEC 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0xEC 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0xEC 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0xF0 "LCD_PAL60 ,Color Palette register" bitfld.long 0xF0 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0xF0 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0xF0 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0xF0 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0xF0 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0xF0 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0xF0 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0xF0 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0xF4 "LCD_PAL61 ,Color Palette register" bitfld.long 0xF4 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0xF4 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0xF4 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0xF4 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0xF4 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0xF4 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0xF4 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0xF4 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0xF8 "LCD_PAL62 ,Color Palette register" bitfld.long 0xF8 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0xF8 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0xF8 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0xF8 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0xF8 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0xF8 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0xF8 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0xF8 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0xFC "LCD_PAL63 ,Color Palette register" bitfld.long 0xFC 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0xFC 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0xFC 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0xFC 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0xFC 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0xFC 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0xFC 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0xFC 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x100 "LCD_PAL64 ,Color Palette register" bitfld.long 0x100 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x100 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x100 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x100 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x100 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x100 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x100 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x100 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x104 "LCD_PAL65 ,Color Palette register" bitfld.long 0x104 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x104 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x104 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x104 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x104 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x104 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x104 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x104 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x108 "LCD_PAL66 ,Color Palette register" bitfld.long 0x108 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x108 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x108 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x108 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x108 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x108 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x108 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x108 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x10C "LCD_PAL67 ,Color Palette register" bitfld.long 0x10C 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x10C 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x10C 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x10C 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x10C 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x10C 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x10C 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x10C 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x110 "LCD_PAL68 ,Color Palette register" bitfld.long 0x110 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x110 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x110 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x110 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x110 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x110 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x110 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x110 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x114 "LCD_PAL69 ,Color Palette register" bitfld.long 0x114 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x114 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x114 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x114 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x114 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x114 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x114 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x114 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x118 "LCD_PAL70 ,Color Palette register" bitfld.long 0x118 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x118 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x118 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x118 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x118 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x118 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x118 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x118 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x11C "LCD_PAL71 ,Color Palette register" bitfld.long 0x11C 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x11C 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x11C 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x11C 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x11C 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x11C 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x11C 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x11C 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x120 "LCD_PAL72 ,Color Palette register" bitfld.long 0x120 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x120 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x120 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x120 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x120 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x120 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x120 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x120 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x124 "LCD_PAL73 ,Color Palette register" bitfld.long 0x124 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x124 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x124 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x124 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x124 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x124 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x124 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x124 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x128 "LCD_PAL74 ,Color Palette register" bitfld.long 0x128 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x128 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x128 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x128 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x128 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x128 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x128 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x128 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x12C "LCD_PAL75 ,Color Palette register" bitfld.long 0x12C 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x12C 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x12C 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x12C 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x12C 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x12C 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x12C 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x12C 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x130 "LCD_PAL76 ,Color Palette register" bitfld.long 0x130 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x130 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x130 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x130 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x130 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x130 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x130 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x130 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x134 "LCD_PAL77 ,Color Palette register" bitfld.long 0x134 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x134 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x134 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x134 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x134 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x134 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x134 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x134 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x138 "LCD_PAL78 ,Color Palette register" bitfld.long 0x138 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x138 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x138 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x138 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x138 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x138 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x138 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x138 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x13C "LCD_PAL79 ,Color Palette register" bitfld.long 0x13C 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x13C 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x13C 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x13C 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x13C 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x13C 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x13C 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x13C 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x140 "LCD_PAL80 ,Color Palette register" bitfld.long 0x140 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x140 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x140 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x140 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x140 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x140 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x140 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x140 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x144 "LCD_PAL81 ,Color Palette register" bitfld.long 0x144 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x144 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x144 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x144 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x144 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x144 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x144 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x144 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x148 "LCD_PAL82 ,Color Palette register" bitfld.long 0x148 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x148 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x148 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x148 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x148 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x148 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x148 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x148 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x14C "LCD_PAL83 ,Color Palette register" bitfld.long 0x14C 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x14C 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x14C 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x14C 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x14C 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x14C 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x14C 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x14C 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x150 "LCD_PAL84 ,Color Palette register" bitfld.long 0x150 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x150 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x150 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x150 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x150 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x150 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x150 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x150 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x154 "LCD_PAL85 ,Color Palette register" bitfld.long 0x154 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x154 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x154 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x154 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x154 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x154 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x154 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x154 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x158 "LCD_PAL86 ,Color Palette register" bitfld.long 0x158 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x158 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x158 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x158 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x158 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x158 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x158 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x158 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x15C "LCD_PAL87 ,Color Palette register" bitfld.long 0x15C 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x15C 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x15C 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x15C 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x15C 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x15C 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x15C 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x15C 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x160 "LCD_PAL88 ,Color Palette register" bitfld.long 0x160 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x160 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x160 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x160 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x160 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x160 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x160 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x160 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x164 "LCD_PAL89 ,Color Palette register" bitfld.long 0x164 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x164 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x164 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x164 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x164 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x164 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x164 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x164 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x168 "LCD_PAL90 ,Color Palette register" bitfld.long 0x168 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x168 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x168 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x168 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x168 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x168 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x168 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x168 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x16C "LCD_PAL91 ,Color Palette register" bitfld.long 0x16C 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x16C 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x16C 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x16C 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x16C 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x16C 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x16C 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x16C 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x170 "LCD_PAL92 ,Color Palette register" bitfld.long 0x170 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x170 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x170 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x170 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x170 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x170 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x170 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x170 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x174 "LCD_PAL93 ,Color Palette register" bitfld.long 0x174 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x174 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x174 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x174 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x174 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x174 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x174 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x174 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x178 "LCD_PAL94 ,Color Palette register" bitfld.long 0x178 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x178 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x178 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x178 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x178 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x178 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x178 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x178 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x17C "LCD_PAL95 ,Color Palette register" bitfld.long 0x17C 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x17C 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x17C 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x17C 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x17C 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x17C 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x17C 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x17C 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x180 "LCD_PAL96 ,Color Palette register" bitfld.long 0x180 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x180 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x180 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x180 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x180 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x180 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x180 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x180 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x184 "LCD_PAL97 ,Color Palette register" bitfld.long 0x184 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x184 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x184 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x184 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x184 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x184 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x184 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x184 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x188 "LCD_PAL98 ,Color Palette register" bitfld.long 0x188 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x188 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x188 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x188 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x188 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x188 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x188 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x188 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x18C "LCD_PAL99 ,Color Palette register" bitfld.long 0x18C 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x18C 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x18C 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x18C 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x18C 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x18C 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x18C 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x18C 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x190 "LCD_PAL100,Color Palette register" bitfld.long 0x190 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x190 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x190 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x190 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x190 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x190 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x190 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x190 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x194 "LCD_PAL101,Color Palette register" bitfld.long 0x194 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x194 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x194 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x194 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x194 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x194 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x194 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x194 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x198 "LCD_PAL102,Color Palette register" bitfld.long 0x198 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x198 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x198 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x198 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x198 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x198 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x198 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x198 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x19C "LCD_PAL103,Color Palette register" bitfld.long 0x19C 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x19C 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x19C 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x19C 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x19C 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x19C 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x19C 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x19C 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x1A0 "LCD_PAL104,Color Palette register" bitfld.long 0x1A0 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x1A0 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x1A0 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x1A0 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x1A0 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x1A0 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x1A0 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x1A0 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x1A4 "LCD_PAL105,Color Palette register" bitfld.long 0x1A4 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x1A4 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x1A4 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x1A4 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x1A4 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x1A4 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x1A4 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x1A4 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x1A8 "LCD_PAL106,Color Palette register" bitfld.long 0x1A8 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x1A8 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x1A8 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x1A8 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x1A8 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x1A8 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x1A8 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x1A8 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x1AC "LCD_PAL107,Color Palette register" bitfld.long 0x1AC 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x1AC 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x1AC 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x1AC 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x1AC 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x1AC 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x1AC 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x1AC 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x1B0 "LCD_PAL108,Color Palette register" bitfld.long 0x1B0 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x1B0 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x1B0 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x1B0 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x1B0 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x1B0 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x1B0 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x1B0 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x1B4 "LCD_PAL109,Color Palette register" bitfld.long 0x1B4 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x1B4 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x1B4 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x1B4 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x1B4 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x1B4 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x1B4 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x1B4 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x1B8 "LCD_PAL110,Color Palette register" bitfld.long 0x1B8 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x1B8 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x1B8 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x1B8 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x1B8 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x1B8 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x1B8 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x1B8 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x1BC "LCD_PAL111,Color Palette register" bitfld.long 0x1BC 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x1BC 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x1BC 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x1BC 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x1BC 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x1BC 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x1BC 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x1BC 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x1C0 "LCD_PAL112,Color Palette register" bitfld.long 0x1C0 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x1C0 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x1C0 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x1C0 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x1C0 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x1C0 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x1C0 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x1C0 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x1C4 "LCD_PAL113,Color Palette register" bitfld.long 0x1C4 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x1C4 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x1C4 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x1C4 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x1C4 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x1C4 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x1C4 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x1C4 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x1C8 "LCD_PAL114,Color Palette register" bitfld.long 0x1C8 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x1C8 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x1C8 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x1C8 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x1C8 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x1C8 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x1C8 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x1C8 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x1CC "LCD_PAL115,Color Palette register" bitfld.long 0x1CC 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x1CC 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x1CC 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x1CC 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x1CC 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x1CC 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x1CC 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x1CC 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x1D0 "LCD_PAL116,Color Palette register" bitfld.long 0x1D0 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x1D0 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x1D0 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x1D0 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x1D0 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x1D0 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x1D0 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x1D0 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x1D4 "LCD_PAL117,Color Palette register" bitfld.long 0x1D4 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x1D4 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x1D4 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x1D4 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x1D4 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x1D4 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x1D4 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x1D4 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x1D8 "LCD_PAL118,Color Palette register" bitfld.long 0x1D8 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x1D8 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x1D8 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x1D8 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x1D8 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x1D8 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x1D8 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x1D8 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x1DC "LCD_PAL119,Color Palette register" bitfld.long 0x1DC 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x1DC 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x1DC 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x1DC 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x1DC 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x1DC 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x1DC 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x1DC 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x1E0 "LCD_PAL120,Color Palette register" bitfld.long 0x1E0 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x1E0 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x1E0 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x1E0 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x1E0 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x1E0 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x1E0 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x1E0 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x1E4 "LCD_PAL121,Color Palette register" bitfld.long 0x1E4 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x1E4 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x1E4 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x1E4 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x1E4 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x1E4 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x1E4 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x1E4 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x1E8 "LCD_PAL122,Color Palette register" bitfld.long 0x1E8 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x1E8 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x1E8 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x1E8 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x1E8 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x1E8 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x1E8 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x1E8 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x1EC "LCD_PAL123,Color Palette register" bitfld.long 0x1EC 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x1EC 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x1EC 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x1EC 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x1EC 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x1EC 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x1EC 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x1EC 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x1F0 "LCD_PAL124,Color Palette register" bitfld.long 0x1F0 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x1F0 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x1F0 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x1F0 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x1F0 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x1F0 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x1F0 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x1F0 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x1F4 "LCD_PAL125,Color Palette register" bitfld.long 0x1F4 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x1F4 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x1F4 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x1F4 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x1F4 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x1F4 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x1F4 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x1F4 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x1F8 "LCD_PAL126,Color Palette register" bitfld.long 0x1F8 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x1F8 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x1F8 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x1F8 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x1F8 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x1F8 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x1F8 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x1F8 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." line.long 0x1FC "LCD_PAL127,Color Palette register" bitfld.long 0x1FC 31. " IH ,Higher Intensity" "Low,High" bitfld.long 0x1FC 26.--30. " BH[4:0] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x1FC 21.--25. " GH[4:0] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x1FC 16.--20. " RH[4:0] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x1FC 15. " IL ,Lower Intensity" "Low,High" bitfld.long 0x1FC 10.--14. " BL[4:0] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x1FC 5.--9. " GL[4:0] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." bitfld.long 0x1FC 0.--4. " RL[4:0] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." elif (((per.l(ad:0x20088018))&0x30)==0x10) group.long 0x200++0x1FF line.long 0x0 "LCD_PAL0 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x0 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x0 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x0 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x0 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x4 "LCD_PAL1 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x4 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x4 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x4 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x4 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x8 "LCD_PAL2 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x8 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x8 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x8 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x8 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xC "LCD_PAL3 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xC 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0xC 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xC 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0xC 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x10 "LCD_PAL4 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x10 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x10 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x10 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x10 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x14 "LCD_PAL5 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x14 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x14 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x14 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x14 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x18 "LCD_PAL6 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x18 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x18 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x18 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x18 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1C "LCD_PAL7 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1C 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x1C 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1C 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x1C 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x20 "LCD_PAL8 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x20 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x20 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x20 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x20 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x24 "LCD_PAL9 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x24 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x24 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x24 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x24 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x28 "LCD_PAL10 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x28 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x28 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x28 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x28 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x2C "LCD_PAL11 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x2C 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x2C 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x2C 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x2C 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x30 "LCD_PAL12 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x30 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x30 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x30 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x30 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x34 "LCD_PAL13 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x34 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x34 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x34 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x34 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x38 "LCD_PAL14 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x38 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x38 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x38 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x38 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x3C "LCD_PAL15 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x3C 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x3C 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x3C 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x3C 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x40 "LCD_PAL16 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x40 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x40 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x40 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x40 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x44 "LCD_PAL17 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x44 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x44 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x44 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x44 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x48 "LCD_PAL18 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x48 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x48 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x48 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x48 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x4C "LCD_PAL19 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x4C 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x4C 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x4C 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x4C 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x50 "LCD_PAL20 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x50 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x50 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x50 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x50 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x54 "LCD_PAL21 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x54 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x54 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x54 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x54 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x58 "LCD_PAL22 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x58 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x58 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x58 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x58 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x5C "LCD_PAL23 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x5C 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x5C 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x5C 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x5C 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x60 "LCD_PAL24 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x60 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x60 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x60 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x60 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x64 "LCD_PAL25 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x64 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x64 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x64 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x64 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x68 "LCD_PAL26 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x68 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x68 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x68 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x68 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x6C "LCD_PAL27 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x6C 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x6C 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x6C 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x6C 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x70 "LCD_PAL28 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x70 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x70 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x70 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x70 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x74 "LCD_PAL29 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x74 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x74 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x74 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x74 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x78 "LCD_PAL30 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x78 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x78 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x78 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x78 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x7C "LCD_PAL31 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x7C 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x7C 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x7C 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x7C 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x80 "LCD_PAL32 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x80 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x80 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x80 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x80 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x84 "LCD_PAL33 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x84 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x84 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x84 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x84 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x88 "LCD_PAL34 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x88 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x88 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x88 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x88 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x8C "LCD_PAL35 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x8C 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x8C 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x8C 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x8C 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x90 "LCD_PAL36 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x90 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x90 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x90 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x90 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x94 "LCD_PAL37 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x94 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x94 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x94 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x94 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x98 "LCD_PAL38 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x98 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x98 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x98 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x98 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x9C "LCD_PAL39 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x9C 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x9C 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x9C 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x9C 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xA0 "LCD_PAL40 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xA0 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0xA0 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xA0 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0xA0 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xA4 "LCD_PAL41 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xA4 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0xA4 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xA4 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0xA4 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xA8 "LCD_PAL42 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xA8 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0xA8 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xA8 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0xA8 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xAC "LCD_PAL43 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xAC 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0xAC 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xAC 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0xAC 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xB0 "LCD_PAL44 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xB0 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0xB0 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xB0 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0xB0 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xB4 "LCD_PAL45 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xB4 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0xB4 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xB4 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0xB4 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xB8 "LCD_PAL46 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xB8 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0xB8 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xB8 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0xB8 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xBC "LCD_PAL47 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xBC 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0xBC 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xBC 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0xBC 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xC0 "LCD_PAL48 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xC0 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0xC0 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xC0 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0xC0 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xC4 "LCD_PAL49 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xC4 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0xC4 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xC4 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0xC4 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xC8 "LCD_PAL50 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xC8 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0xC8 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xC8 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0xC8 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xCC "LCD_PAL51 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xCC 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0xCC 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xCC 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0xCC 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xD0 "LCD_PAL52 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xD0 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0xD0 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xD0 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0xD0 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xD4 "LCD_PAL53 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xD4 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0xD4 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xD4 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0xD4 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xD8 "LCD_PAL54 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xD8 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0xD8 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xD8 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0xD8 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xDC "LCD_PAL55 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xDC 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0xDC 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xDC 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0xDC 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xE0 "LCD_PAL56 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xE0 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0xE0 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xE0 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0xE0 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xE4 "LCD_PAL57 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xE4 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0xE4 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xE4 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0xE4 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xE8 "LCD_PAL58 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xE8 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0xE8 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xE8 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0xE8 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xEC "LCD_PAL59 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xEC 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0xEC 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xEC 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0xEC 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xF0 "LCD_PAL60 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xF0 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0xF0 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xF0 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0xF0 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xF4 "LCD_PAL61 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xF4 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0xF4 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xF4 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0xF4 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xF8 "LCD_PAL62 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xF8 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0xF8 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xF8 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0xF8 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xFC "LCD_PAL63 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xFC 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0xFC 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xFC 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0xFC 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x100 "LCD_PAL64 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x100 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x100 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x100 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x100 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x104 "LCD_PAL65 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x104 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x104 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x104 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x104 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x108 "LCD_PAL66 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x108 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x108 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x108 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x108 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x10C "LCD_PAL67 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x10C 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x10C 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x10C 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x10C 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x110 "LCD_PAL68 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x110 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x110 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x110 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x110 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x114 "LCD_PAL69 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x114 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x114 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x114 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x114 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x118 "LCD_PAL70 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x118 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x118 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x118 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x118 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x11C "LCD_PAL71 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x11C 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x11C 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x11C 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x11C 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x120 "LCD_PAL72 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x120 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x120 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x120 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x120 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x124 "LCD_PAL73 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x124 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x124 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x124 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x124 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x128 "LCD_PAL74 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x128 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x128 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x128 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x128 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x12C "LCD_PAL75 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x12C 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x12C 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x12C 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x12C 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x130 "LCD_PAL76 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x130 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x130 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x130 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x130 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x134 "LCD_PAL77 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x134 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x134 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x134 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x134 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x138 "LCD_PAL78 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x138 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x138 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x138 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x138 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x13C "LCD_PAL79 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x13C 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x13C 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x13C 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x13C 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x140 "LCD_PAL80 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x140 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x140 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x140 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x140 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x144 "LCD_PAL81 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x144 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x144 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x144 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x144 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x148 "LCD_PAL82 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x148 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x148 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x148 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x148 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x14C "LCD_PAL83 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x14C 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x14C 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x14C 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x14C 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x150 "LCD_PAL84 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x150 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x150 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x150 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x150 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x154 "LCD_PAL85 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x154 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x154 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x154 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x154 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x158 "LCD_PAL86 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x158 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x158 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x158 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x158 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x15C "LCD_PAL87 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x15C 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x15C 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x15C 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x15C 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x160 "LCD_PAL88 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x160 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x160 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x160 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x160 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x164 "LCD_PAL89 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x164 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x164 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x164 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x164 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x168 "LCD_PAL90 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x168 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x168 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x168 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x168 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x16C "LCD_PAL91 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x16C 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x16C 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x16C 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x16C 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x170 "LCD_PAL92 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x170 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x170 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x170 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x170 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x174 "LCD_PAL93 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x174 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x174 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x174 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x174 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x178 "LCD_PAL94 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x178 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x178 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x178 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x178 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x17C "LCD_PAL95 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x17C 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x17C 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x17C 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x17C 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x180 "LCD_PAL96 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x180 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x180 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x180 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x180 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x184 "LCD_PAL97 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x184 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x184 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x184 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x184 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x188 "LCD_PAL98 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x188 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x188 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x188 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x188 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x18C "LCD_PAL99 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x18C 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x18C 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x18C 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x18C 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x190 "LCD_PAL100,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x190 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x190 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x190 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x190 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x194 "LCD_PAL101,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x194 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x194 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x194 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x194 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x198 "LCD_PAL102,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x198 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x198 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x198 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x198 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x19C "LCD_PAL103,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x19C 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x19C 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x19C 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x19C 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1A0 "LCD_PAL104,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1A0 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x1A0 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1A0 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x1A0 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1A4 "LCD_PAL105,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1A4 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x1A4 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1A4 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x1A4 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1A8 "LCD_PAL106,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1A8 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x1A8 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1A8 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x1A8 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1AC "LCD_PAL107,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1AC 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x1AC 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1AC 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x1AC 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1B0 "LCD_PAL108,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1B0 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x1B0 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1B0 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x1B0 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1B4 "LCD_PAL109,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1B4 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x1B4 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1B4 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x1B4 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1B8 "LCD_PAL110,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1B8 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x1B8 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1B8 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x1B8 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1BC "LCD_PAL111,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1BC 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x1BC 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1BC 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x1BC 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1C0 "LCD_PAL112,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1C0 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x1C0 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1C0 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x1C0 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1C4 "LCD_PAL113,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1C4 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x1C4 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1C4 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x1C4 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1C8 "LCD_PAL114,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1C8 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x1C8 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1C8 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x1C8 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1CC "LCD_PAL115,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1CC 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x1CC 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1CC 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x1CC 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1D0 "LCD_PAL116,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1D0 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x1D0 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1D0 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x1D0 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1D4 "LCD_PAL117,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1D4 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x1D4 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1D4 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x1D4 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1D8 "LCD_PAL118,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1D8 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x1D8 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1D8 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x1D8 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1DC "LCD_PAL119,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1DC 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x1DC 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1DC 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x1DC 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1E0 "LCD_PAL120,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1E0 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x1E0 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1E0 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x1E0 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1E4 "LCD_PAL121,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1E4 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x1E4 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1E4 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x1E4 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1E8 "LCD_PAL122,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1E8 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x1E8 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1E8 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x1E8 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1EC "LCD_PAL123,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1EC 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x1EC 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1EC 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x1EC 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1F0 "LCD_PAL124,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1F0 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x1F0 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1F0 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x1F0 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1F4 "LCD_PAL125,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1F4 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x1F4 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1F4 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x1F4 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1F8 "LCD_PAL126,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1F8 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x1F8 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1F8 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x1F8 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1FC "LCD_PAL127,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1FC 31. " IH ,Higher Intensity" "Low,High" textline " " endif textline " " bitfld.long 0x1FC 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1FC 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x1FC 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long 0x200++0x1FF line.long 0x0 "LCD_PAL0 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x0 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x0 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x0 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x0 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x0 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x0 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x4 "LCD_PAL1 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x4 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x4 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x4 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x4 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x4 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x4 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x4 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x4 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x8 "LCD_PAL2 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x8 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x8 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x8 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x8 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x8 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x8 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x8 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x8 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xC "LCD_PAL3 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xC 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0xC 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xC 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0xC 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xC 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0xC 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0xC 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xC 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x10 "LCD_PAL4 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x10 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x10 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x10 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x10 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x10 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x10 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x14 "LCD_PAL5 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x14 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x14 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x14 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x14 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x14 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x14 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x14 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x14 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x18 "LCD_PAL6 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x18 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x18 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x18 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x18 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x18 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x18 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1C "LCD_PAL7 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1C 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x1C 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x1C 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1C 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x1C 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x1C 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x20 "LCD_PAL8 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x20 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x20 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x20 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x20 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x20 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x20 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x20 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x20 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x24 "LCD_PAL9 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x24 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x24 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x24 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x24 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x24 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x24 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x24 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x24 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x28 "LCD_PAL10 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x28 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x28 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x28 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x28 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x28 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x28 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x28 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x28 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x2C "LCD_PAL11 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x2C 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x2C 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x2C 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x2C 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x2C 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x2C 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x2C 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x2C 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x30 "LCD_PAL12 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x30 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x30 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x30 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x30 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x30 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x30 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x30 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x30 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x34 "LCD_PAL13 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x34 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x34 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x34 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x34 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x34 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x34 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x34 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x34 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x38 "LCD_PAL14 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x38 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x38 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x38 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x38 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x38 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x38 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x38 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x38 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x3C "LCD_PAL15 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x3C 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x3C 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x3C 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x3C 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x3C 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x3C 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x3C 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x3C 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x40 "LCD_PAL16 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x40 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x40 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x40 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x40 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x40 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x40 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x40 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x40 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x44 "LCD_PAL17 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x44 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x44 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x44 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x44 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x44 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x44 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x44 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x44 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x48 "LCD_PAL18 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x48 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x48 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x48 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x48 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x48 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x48 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x48 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x48 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x4C "LCD_PAL19 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x4C 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x4C 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x4C 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x4C 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x4C 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x4C 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x4C 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x4C 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x50 "LCD_PAL20 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x50 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x50 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x50 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x50 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x50 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x50 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x50 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x50 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x54 "LCD_PAL21 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x54 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x54 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x54 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x54 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x54 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x54 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x54 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x54 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x58 "LCD_PAL22 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x58 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x58 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x58 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x58 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x58 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x58 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x58 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x58 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x5C "LCD_PAL23 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x5C 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x5C 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x5C 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x5C 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x5C 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x5C 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x5C 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x5C 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x60 "LCD_PAL24 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x60 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x60 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x60 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x60 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x60 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x60 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x60 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x60 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x64 "LCD_PAL25 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x64 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x64 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x64 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x64 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x64 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x64 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x64 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x64 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x68 "LCD_PAL26 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x68 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x68 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x68 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x68 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x68 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x68 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x68 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x68 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x6C "LCD_PAL27 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x6C 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x6C 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x6C 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x6C 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x6C 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x6C 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x6C 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x6C 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x70 "LCD_PAL28 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x70 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x70 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x70 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x70 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x70 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x70 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x70 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x70 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x74 "LCD_PAL29 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x74 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x74 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x74 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x74 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x74 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x74 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x74 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x74 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x78 "LCD_PAL30 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x78 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x78 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x78 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x78 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x78 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x78 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x78 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x78 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x7C "LCD_PAL31 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x7C 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x7C 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x7C 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x7C 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x7C 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x7C 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x7C 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x7C 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x80 "LCD_PAL32 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x80 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x80 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x80 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x80 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x80 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x80 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x80 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x80 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x84 "LCD_PAL33 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x84 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x84 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x84 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x84 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x84 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x84 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x84 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x84 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x88 "LCD_PAL34 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x88 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x88 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x88 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x88 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x88 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x88 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x88 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x88 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x8C "LCD_PAL35 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x8C 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x8C 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x8C 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x8C 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x8C 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x8C 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x8C 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x8C 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x90 "LCD_PAL36 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x90 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x90 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x90 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x90 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x90 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x90 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x90 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x90 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x94 "LCD_PAL37 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x94 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x94 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x94 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x94 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x94 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x94 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x94 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x94 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x98 "LCD_PAL38 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x98 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x98 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x98 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x98 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x98 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x98 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x98 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x98 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x9C "LCD_PAL39 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x9C 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x9C 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x9C 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x9C 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x9C 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x9C 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x9C 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x9C 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xA0 "LCD_PAL40 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xA0 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0xA0 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xA0 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0xA0 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xA0 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0xA0 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0xA0 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xA0 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xA4 "LCD_PAL41 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xA4 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0xA4 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xA4 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0xA4 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xA4 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0xA4 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0xA4 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xA4 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xA8 "LCD_PAL42 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xA8 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0xA8 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xA8 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0xA8 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xA8 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0xA8 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0xA8 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xA8 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xAC "LCD_PAL43 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xAC 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0xAC 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xAC 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0xAC 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xAC 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0xAC 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0xAC 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xAC 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xB0 "LCD_PAL44 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xB0 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0xB0 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xB0 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0xB0 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xB0 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0xB0 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0xB0 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xB0 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xB4 "LCD_PAL45 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xB4 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0xB4 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xB4 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0xB4 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xB4 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0xB4 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0xB4 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xB4 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xB8 "LCD_PAL46 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xB8 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0xB8 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xB8 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0xB8 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xB8 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0xB8 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0xB8 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xB8 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xBC "LCD_PAL47 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xBC 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0xBC 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xBC 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0xBC 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xBC 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0xBC 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0xBC 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xBC 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xC0 "LCD_PAL48 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xC0 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0xC0 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xC0 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0xC0 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xC0 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0xC0 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0xC0 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xC0 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xC4 "LCD_PAL49 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xC4 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0xC4 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xC4 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0xC4 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xC4 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0xC4 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0xC4 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xC4 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xC8 "LCD_PAL50 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xC8 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0xC8 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xC8 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0xC8 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xC8 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0xC8 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0xC8 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xC8 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xCC "LCD_PAL51 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xCC 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0xCC 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xCC 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0xCC 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xCC 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0xCC 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0xCC 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xCC 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xD0 "LCD_PAL52 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xD0 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0xD0 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xD0 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0xD0 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xD0 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0xD0 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0xD0 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xD0 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xD4 "LCD_PAL53 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xD4 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0xD4 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xD4 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0xD4 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xD4 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0xD4 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0xD4 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xD4 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xD8 "LCD_PAL54 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xD8 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0xD8 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xD8 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0xD8 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xD8 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0xD8 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0xD8 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xD8 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xDC "LCD_PAL55 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xDC 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0xDC 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xDC 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0xDC 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xDC 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0xDC 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0xDC 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xDC 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xE0 "LCD_PAL56 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xE0 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0xE0 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xE0 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0xE0 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xE0 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0xE0 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0xE0 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xE0 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xE4 "LCD_PAL57 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xE4 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0xE4 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xE4 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0xE4 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xE4 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0xE4 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0xE4 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xE4 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xE8 "LCD_PAL58 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xE8 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0xE8 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xE8 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0xE8 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xE8 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0xE8 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0xE8 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xE8 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xEC "LCD_PAL59 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xEC 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0xEC 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xEC 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0xEC 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xEC 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0xEC 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0xEC 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xEC 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xF0 "LCD_PAL60 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xF0 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0xF0 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xF0 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0xF0 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xF0 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0xF0 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0xF0 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xF0 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xF4 "LCD_PAL61 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xF4 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0xF4 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xF4 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0xF4 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xF4 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0xF4 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0xF4 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xF4 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xF8 "LCD_PAL62 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xF8 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0xF8 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xF8 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0xF8 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xF8 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0xF8 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0xF8 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xF8 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xFC "LCD_PAL63 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xFC 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0xFC 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xFC 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0xFC 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0xFC 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0xFC 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0xFC 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xFC 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x100 "LCD_PAL64 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x100 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x100 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x100 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x100 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x100 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x100 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x100 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x100 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x104 "LCD_PAL65 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x104 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x104 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x104 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x104 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x104 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x104 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x104 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x104 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x108 "LCD_PAL66 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x108 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x108 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x108 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x108 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x108 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x108 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x108 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x108 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x10C "LCD_PAL67 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x10C 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x10C 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10C 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x10C 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x10C 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x10C 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x10C 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10C 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x110 "LCD_PAL68 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x110 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x110 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x110 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x110 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x110 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x110 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x110 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x110 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x114 "LCD_PAL69 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x114 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x114 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x114 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x114 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x114 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x114 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x114 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x114 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x118 "LCD_PAL70 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x118 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x118 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x118 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x118 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x118 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x118 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x118 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x118 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x11C "LCD_PAL71 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x11C 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x11C 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x11C 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x11C 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x11C 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x11C 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x11C 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x11C 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x120 "LCD_PAL72 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x120 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x120 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x120 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x120 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x120 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x120 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x120 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x120 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x124 "LCD_PAL73 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x124 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x124 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x124 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x124 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x124 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x124 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x124 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x124 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x128 "LCD_PAL74 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x128 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x128 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x128 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x128 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x128 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x128 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x128 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x128 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x12C "LCD_PAL75 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x12C 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x12C 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x12C 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x12C 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x12C 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x12C 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x12C 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x12C 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x130 "LCD_PAL76 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x130 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x130 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x130 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x130 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x130 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x130 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x130 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x130 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x134 "LCD_PAL77 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x134 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x134 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x134 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x134 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x134 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x134 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x134 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x134 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x138 "LCD_PAL78 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x138 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x138 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x138 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x138 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x138 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x138 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x138 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x138 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x13C "LCD_PAL79 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x13C 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x13C 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x13C 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x13C 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x13C 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x13C 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x13C 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x13C 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x140 "LCD_PAL80 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x140 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x140 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x140 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x140 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x140 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x140 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x140 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x140 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x144 "LCD_PAL81 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x144 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x144 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x144 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x144 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x144 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x144 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x144 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x144 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x148 "LCD_PAL82 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x148 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x148 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x148 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x148 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x148 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x148 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x148 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x148 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x14C "LCD_PAL83 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x14C 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x14C 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x14C 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x14C 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x14C 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x14C 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x14C 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x14C 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x150 "LCD_PAL84 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x150 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x150 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x150 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x150 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x150 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x150 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x150 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x150 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x154 "LCD_PAL85 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x154 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x154 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x154 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x154 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x154 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x154 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x154 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x154 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x158 "LCD_PAL86 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x158 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x158 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x158 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x158 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x158 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x158 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x158 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x158 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x15C "LCD_PAL87 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x15C 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x15C 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x15C 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x15C 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x15C 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x15C 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x15C 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x15C 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x160 "LCD_PAL88 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x160 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x160 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x160 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x160 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x160 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x160 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x160 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x160 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x164 "LCD_PAL89 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x164 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x164 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x164 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x164 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x164 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x164 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x164 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x164 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x168 "LCD_PAL90 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x168 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x168 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x168 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x168 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x168 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x168 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x168 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x168 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x16C "LCD_PAL91 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x16C 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x16C 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x16C 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x16C 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x16C 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x16C 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x16C 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x16C 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x170 "LCD_PAL92 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x170 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x170 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x170 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x170 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x170 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x170 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x170 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x170 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x174 "LCD_PAL93 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x174 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x174 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x174 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x174 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x174 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x174 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x174 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x174 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x178 "LCD_PAL94 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x178 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x178 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x178 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x178 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x178 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x178 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x178 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x178 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x17C "LCD_PAL95 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x17C 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x17C 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x17C 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x17C 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x17C 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x17C 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x17C 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x17C 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x180 "LCD_PAL96 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x180 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x180 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x180 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x180 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x180 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x180 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x180 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x180 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x184 "LCD_PAL97 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x184 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x184 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x184 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x184 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x184 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x184 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x184 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x184 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x188 "LCD_PAL98 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x188 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x188 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x188 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x188 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x188 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x188 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x188 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x188 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x18C "LCD_PAL99 ,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x18C 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x18C 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18C 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x18C 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x18C 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x18C 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x18C 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18C 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x190 "LCD_PAL100,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x190 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x190 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x190 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x190 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x190 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x190 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x190 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x190 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x194 "LCD_PAL101,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x194 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x194 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x194 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x194 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x194 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x194 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x194 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x194 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x198 "LCD_PAL102,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x198 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x198 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x198 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x198 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x198 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x198 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x198 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x198 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x19C "LCD_PAL103,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x19C 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x19C 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x19C 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x19C 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x19C 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x19C 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x19C 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x19C 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1A0 "LCD_PAL104,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1A0 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x1A0 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1A0 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x1A0 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1A0 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x1A0 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x1A0 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1A0 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1A4 "LCD_PAL105,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1A4 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x1A4 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1A4 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x1A4 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1A4 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x1A4 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x1A4 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1A4 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1A8 "LCD_PAL106,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1A8 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x1A8 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1A8 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x1A8 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1A8 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x1A8 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x1A8 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1A8 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1AC "LCD_PAL107,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1AC 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x1AC 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1AC 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x1AC 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1AC 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x1AC 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x1AC 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1AC 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1B0 "LCD_PAL108,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1B0 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x1B0 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1B0 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x1B0 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1B0 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x1B0 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x1B0 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1B0 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1B4 "LCD_PAL109,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1B4 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x1B4 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1B4 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x1B4 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1B4 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x1B4 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x1B4 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1B4 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1B8 "LCD_PAL110,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1B8 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x1B8 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1B8 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x1B8 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1B8 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x1B8 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x1B8 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1B8 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1BC "LCD_PAL111,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1BC 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x1BC 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1BC 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x1BC 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1BC 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x1BC 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x1BC 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1BC 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1C0 "LCD_PAL112,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1C0 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x1C0 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C0 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x1C0 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1C0 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x1C0 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x1C0 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C0 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1C4 "LCD_PAL113,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1C4 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x1C4 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C4 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x1C4 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1C4 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x1C4 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x1C4 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C4 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1C8 "LCD_PAL114,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1C8 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x1C8 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C8 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x1C8 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1C8 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x1C8 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x1C8 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C8 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1CC "LCD_PAL115,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1CC 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x1CC 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1CC 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x1CC 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1CC 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x1CC 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x1CC 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1CC 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1D0 "LCD_PAL116,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1D0 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x1D0 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1D0 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x1D0 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1D0 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x1D0 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x1D0 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1D0 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1D4 "LCD_PAL117,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1D4 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x1D4 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1D4 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x1D4 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1D4 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x1D4 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x1D4 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1D4 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1D8 "LCD_PAL118,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1D8 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x1D8 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1D8 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x1D8 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1D8 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x1D8 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x1D8 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1D8 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1DC "LCD_PAL119,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1DC 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x1DC 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1DC 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x1DC 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1DC 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x1DC 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x1DC 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1DC 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1E0 "LCD_PAL120,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1E0 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x1E0 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1E0 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x1E0 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1E0 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x1E0 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x1E0 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1E0 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1E4 "LCD_PAL121,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1E4 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x1E4 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1E4 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x1E4 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1E4 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x1E4 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x1E4 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1E4 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1E8 "LCD_PAL122,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1E8 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x1E8 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1E8 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x1E8 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1E8 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x1E8 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x1E8 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1E8 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1EC "LCD_PAL123,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1EC 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x1EC 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1EC 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x1EC 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1EC 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x1EC 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x1EC 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1EC 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1F0 "LCD_PAL124,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1F0 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x1F0 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1F0 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x1F0 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1F0 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x1F0 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x1F0 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1F0 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1F4 "LCD_PAL125,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1F4 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x1F4 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1F4 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x1F4 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1F4 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x1F4 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x1F4 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1F4 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1F8 "LCD_PAL126,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1F8 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x1F8 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1F8 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x1F8 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1F8 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x1F8 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x1F8 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1F8 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1FC "LCD_PAL127,Color Palette register" sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1FC 31. " IH ,Higher Intensity" "Low,High" textline " " endif bitfld.long 0x1FC 27.--30. " BH[4:1] ,Higher Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1FC 22.--25. " GH[4:1] ,Higher Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x1FC 17.--20. " RH[4:1] ,Higher Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()!="LPC4350FET256")&&(cpu()!="LPC4350FET180")&&(cpu()!="LPC4350FBD208")&&(cpu()!="LPC4350FET256-M0")&&(cpu()!="LPC4350FET180-M0")&&(cpu()!="LPC4350FBD208-M0") bitfld.long 0x1FC 15. " IL ,Lower Intensity" "Low,High" textline " " endif bitfld.long 0x1FC 11.--14. " BL[4:1] ,Lower Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x1FC 6.--9. " GL[4:1] ,Lower Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1FC 1.--4. " RL[4:1] ,Lower Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif tree.end textline " " tree "Cursor Image registers" textline "" group.long 0x800++0x3FF line.long 0x0 "CRSR_IMG0 ,Cursor Image register" line.long 0x4 "CRSR_IMG1 ,Cursor Image register" line.long 0x8 "CRSR_IMG2 ,Cursor Image register" line.long 0xC "CRSR_IMG3 ,Cursor Image register" line.long 0x10 "CRSR_IMG4 ,Cursor Image register" line.long 0x14 "CRSR_IMG5 ,Cursor Image register" line.long 0x18 "CRSR_IMG6 ,Cursor Image register" line.long 0x1C "CRSR_IMG7 ,Cursor Image register" line.long 0x20 "CRSR_IMG8 ,Cursor Image register" line.long 0x24 "CRSR_IMG9 ,Cursor Image register" line.long 0x28 "CRSR_IMG10 ,Cursor Image register" line.long 0x2C "CRSR_IMG11 ,Cursor Image register" line.long 0x30 "CRSR_IMG12 ,Cursor Image register" line.long 0x34 "CRSR_IMG13 ,Cursor Image register" line.long 0x38 "CRSR_IMG14 ,Cursor Image register" line.long 0x3C "CRSR_IMG15 ,Cursor Image register" line.long 0x40 "CRSR_IMG16 ,Cursor Image register" line.long 0x44 "CRSR_IMG17 ,Cursor Image register" line.long 0x48 "CRSR_IMG18 ,Cursor Image register" line.long 0x4C "CRSR_IMG19 ,Cursor Image register" line.long 0x50 "CRSR_IMG20 ,Cursor Image register" line.long 0x54 "CRSR_IMG21 ,Cursor Image register" line.long 0x58 "CRSR_IMG22 ,Cursor Image register" line.long 0x5C "CRSR_IMG23 ,Cursor Image register" line.long 0x60 "CRSR_IMG24 ,Cursor Image register" line.long 0x64 "CRSR_IMG25 ,Cursor Image register" line.long 0x68 "CRSR_IMG26 ,Cursor Image register" line.long 0x6C "CRSR_IMG27 ,Cursor Image register" line.long 0x70 "CRSR_IMG28 ,Cursor Image register" line.long 0x74 "CRSR_IMG29 ,Cursor Image register" line.long 0x78 "CRSR_IMG30 ,Cursor Image register" line.long 0x7C "CRSR_IMG31 ,Cursor Image register" line.long 0x80 "CRSR_IMG32 ,Cursor Image register" line.long 0x84 "CRSR_IMG33 ,Cursor Image register" line.long 0x88 "CRSR_IMG34 ,Cursor Image register" line.long 0x8C "CRSR_IMG35 ,Cursor Image register" line.long 0x90 "CRSR_IMG36 ,Cursor Image register" line.long 0x94 "CRSR_IMG37 ,Cursor Image register" line.long 0x98 "CRSR_IMG38 ,Cursor Image register" line.long 0x9C "CRSR_IMG39 ,Cursor Image register" line.long 0xA0 "CRSR_IMG40 ,Cursor Image register" line.long 0xA4 "CRSR_IMG41 ,Cursor Image register" line.long 0xA8 "CRSR_IMG42 ,Cursor Image register" line.long 0xAC "CRSR_IMG43 ,Cursor Image register" line.long 0xB0 "CRSR_IMG44 ,Cursor Image register" line.long 0xB4 "CRSR_IMG45 ,Cursor Image register" line.long 0xB8 "CRSR_IMG46 ,Cursor Image register" line.long 0xBC "CRSR_IMG47 ,Cursor Image register" line.long 0xC0 "CRSR_IMG48 ,Cursor Image register" line.long 0xC4 "CRSR_IMG49 ,Cursor Image register" line.long 0xC8 "CRSR_IMG50 ,Cursor Image register" line.long 0xCC "CRSR_IMG51 ,Cursor Image register" line.long 0xD0 "CRSR_IMG52 ,Cursor Image register" line.long 0xD4 "CRSR_IMG53 ,Cursor Image register" line.long 0xD8 "CRSR_IMG54 ,Cursor Image register" line.long 0xDC "CRSR_IMG55 ,Cursor Image register" line.long 0xE0 "CRSR_IMG56 ,Cursor Image register" line.long 0xE4 "CRSR_IMG57 ,Cursor Image register" line.long 0xE8 "CRSR_IMG58 ,Cursor Image register" line.long 0xEC "CRSR_IMG59 ,Cursor Image register" line.long 0xF0 "CRSR_IMG60 ,Cursor Image register" line.long 0xF4 "CRSR_IMG61 ,Cursor Image register" line.long 0xF8 "CRSR_IMG62 ,Cursor Image register" line.long 0xFC "CRSR_IMG63 ,Cursor Image register" line.long 0x100 "CRSR_IMG64 ,Cursor Image register" line.long 0x104 "CRSR_IMG65 ,Cursor Image register" line.long 0x108 "CRSR_IMG66 ,Cursor Image register" line.long 0x10C "CRSR_IMG67 ,Cursor Image register" line.long 0x110 "CRSR_IMG68 ,Cursor Image register" line.long 0x114 "CRSR_IMG69 ,Cursor Image register" line.long 0x118 "CRSR_IMG70 ,Cursor Image register" line.long 0x11C "CRSR_IMG71 ,Cursor Image register" line.long 0x120 "CRSR_IMG72 ,Cursor Image register" line.long 0x124 "CRSR_IMG73 ,Cursor Image register" line.long 0x128 "CRSR_IMG74 ,Cursor Image register" line.long 0x12C "CRSR_IMG75 ,Cursor Image register" line.long 0x130 "CRSR_IMG76 ,Cursor Image register" line.long 0x134 "CRSR_IMG77 ,Cursor Image register" line.long 0x138 "CRSR_IMG78 ,Cursor Image register" line.long 0x13C "CRSR_IMG79 ,Cursor Image register" line.long 0x140 "CRSR_IMG80 ,Cursor Image register" line.long 0x144 "CRSR_IMG81 ,Cursor Image register" line.long 0x148 "CRSR_IMG82 ,Cursor Image register" line.long 0x14C "CRSR_IMG83 ,Cursor Image register" line.long 0x150 "CRSR_IMG84 ,Cursor Image register" line.long 0x154 "CRSR_IMG85 ,Cursor Image register" line.long 0x158 "CRSR_IMG86 ,Cursor Image register" line.long 0x15C "CRSR_IMG87 ,Cursor Image register" line.long 0x160 "CRSR_IMG88 ,Cursor Image register" line.long 0x164 "CRSR_IMG89 ,Cursor Image register" line.long 0x168 "CRSR_IMG90 ,Cursor Image register" line.long 0x16C "CRSR_IMG91 ,Cursor Image register" line.long 0x170 "CRSR_IMG92 ,Cursor Image register" line.long 0x174 "CRSR_IMG93 ,Cursor Image register" line.long 0x178 "CRSR_IMG94 ,Cursor Image register" line.long 0x17C "CRSR_IMG95 ,Cursor Image register" line.long 0x180 "CRSR_IMG96 ,Cursor Image register" line.long 0x184 "CRSR_IMG97 ,Cursor Image register" line.long 0x188 "CRSR_IMG98 ,Cursor Image register" line.long 0x18C "CRSR_IMG99 ,Cursor Image register" line.long 0x190 "CRSR_IMG100,Cursor Image register" line.long 0x194 "CRSR_IMG101,Cursor Image register" line.long 0x198 "CRSR_IMG102,Cursor Image register" line.long 0x19C "CRSR_IMG103,Cursor Image register" line.long 0x1A0 "CRSR_IMG104,Cursor Image register" line.long 0x1A4 "CRSR_IMG105,Cursor Image register" line.long 0x1A8 "CRSR_IMG106,Cursor Image register" line.long 0x1AC "CRSR_IMG107,Cursor Image register" line.long 0x1B0 "CRSR_IMG108,Cursor Image register" line.long 0x1B4 "CRSR_IMG109,Cursor Image register" line.long 0x1B8 "CRSR_IMG110,Cursor Image register" line.long 0x1BC "CRSR_IMG111,Cursor Image register" line.long 0x1C0 "CRSR_IMG112,Cursor Image register" line.long 0x1C4 "CRSR_IMG113,Cursor Image register" line.long 0x1C8 "CRSR_IMG114,Cursor Image register" line.long 0x1CC "CRSR_IMG115,Cursor Image register" line.long 0x1D0 "CRSR_IMG116,Cursor Image register" line.long 0x1D4 "CRSR_IMG117,Cursor Image register" line.long 0x1D8 "CRSR_IMG118,Cursor Image register" line.long 0x1DC "CRSR_IMG119,Cursor Image register" line.long 0x1E0 "CRSR_IMG120,Cursor Image register" line.long 0x1E4 "CRSR_IMG121,Cursor Image register" line.long 0x1E8 "CRSR_IMG122,Cursor Image register" line.long 0x1EC "CRSR_IMG123,Cursor Image register" line.long 0x1F0 "CRSR_IMG124,Cursor Image register" line.long 0x1F4 "CRSR_IMG125,Cursor Image register" line.long 0x1F8 "CRSR_IMG126,Cursor Image register" line.long 0x1FC "CRSR_IMG127,Cursor Image register" line.long 0x200 "CRSR_IMG128,Cursor Image register" line.long 0x204 "CRSR_IMG129,Cursor Image register" line.long 0x208 "CRSR_IMG130,Cursor Image register" line.long 0x20C "CRSR_IMG131,Cursor Image register" line.long 0x210 "CRSR_IMG132,Cursor Image register" line.long 0x214 "CRSR_IMG133,Cursor Image register" line.long 0x218 "CRSR_IMG134,Cursor Image register" line.long 0x21C "CRSR_IMG135,Cursor Image register" line.long 0x220 "CRSR_IMG136,Cursor Image register" line.long 0x224 "CRSR_IMG137,Cursor Image register" line.long 0x228 "CRSR_IMG138,Cursor Image register" line.long 0x22C "CRSR_IMG139,Cursor Image register" line.long 0x230 "CRSR_IMG140,Cursor Image register" line.long 0x234 "CRSR_IMG141,Cursor Image register" line.long 0x238 "CRSR_IMG142,Cursor Image register" line.long 0x23C "CRSR_IMG143,Cursor Image register" line.long 0x240 "CRSR_IMG144,Cursor Image register" line.long 0x244 "CRSR_IMG145,Cursor Image register" line.long 0x248 "CRSR_IMG146,Cursor Image register" line.long 0x24C "CRSR_IMG147,Cursor Image register" line.long 0x250 "CRSR_IMG148,Cursor Image register" line.long 0x254 "CRSR_IMG149,Cursor Image register" line.long 0x258 "CRSR_IMG150,Cursor Image register" line.long 0x25C "CRSR_IMG151,Cursor Image register" line.long 0x260 "CRSR_IMG152,Cursor Image register" line.long 0x264 "CRSR_IMG153,Cursor Image register" line.long 0x268 "CRSR_IMG154,Cursor Image register" line.long 0x26C "CRSR_IMG155,Cursor Image register" line.long 0x270 "CRSR_IMG156,Cursor Image register" line.long 0x274 "CRSR_IMG157,Cursor Image register" line.long 0x278 "CRSR_IMG158,Cursor Image register" line.long 0x27C "CRSR_IMG159,Cursor Image register" line.long 0x280 "CRSR_IMG160,Cursor Image register" line.long 0x284 "CRSR_IMG161,Cursor Image register" line.long 0x288 "CRSR_IMG162,Cursor Image register" line.long 0x28C "CRSR_IMG163,Cursor Image register" line.long 0x290 "CRSR_IMG164,Cursor Image register" line.long 0x294 "CRSR_IMG165,Cursor Image register" line.long 0x298 "CRSR_IMG166,Cursor Image register" line.long 0x29C "CRSR_IMG167,Cursor Image register" line.long 0x2A0 "CRSR_IMG168,Cursor Image register" line.long 0x2A4 "CRSR_IMG169,Cursor Image register" line.long 0x2A8 "CRSR_IMG170,Cursor Image register" line.long 0x2AC "CRSR_IMG171,Cursor Image register" line.long 0x2B0 "CRSR_IMG172,Cursor Image register" line.long 0x2B4 "CRSR_IMG173,Cursor Image register" line.long 0x2B8 "CRSR_IMG174,Cursor Image register" line.long 0x2BC "CRSR_IMG175,Cursor Image register" line.long 0x2C0 "CRSR_IMG176,Cursor Image register" line.long 0x2C4 "CRSR_IMG177,Cursor Image register" line.long 0x2C8 "CRSR_IMG178,Cursor Image register" line.long 0x2CC "CRSR_IMG179,Cursor Image register" line.long 0x2D0 "CRSR_IMG180,Cursor Image register" line.long 0x2D4 "CRSR_IMG181,Cursor Image register" line.long 0x2D8 "CRSR_IMG182,Cursor Image register" line.long 0x2DC "CRSR_IMG183,Cursor Image register" line.long 0x2E0 "CRSR_IMG184,Cursor Image register" line.long 0x2E4 "CRSR_IMG185,Cursor Image register" line.long 0x2E8 "CRSR_IMG186,Cursor Image register" line.long 0x2EC "CRSR_IMG187,Cursor Image register" line.long 0x2F0 "CRSR_IMG188,Cursor Image register" line.long 0x2F4 "CRSR_IMG189,Cursor Image register" line.long 0x2F8 "CRSR_IMG190,Cursor Image register" line.long 0x2FC "CRSR_IMG191,Cursor Image register" line.long 0x300 "CRSR_IMG192,Cursor Image register" line.long 0x304 "CRSR_IMG193,Cursor Image register" line.long 0x308 "CRSR_IMG194,Cursor Image register" line.long 0x30C "CRSR_IMG195,Cursor Image register" line.long 0x310 "CRSR_IMG196,Cursor Image register" line.long 0x314 "CRSR_IMG197,Cursor Image register" line.long 0x318 "CRSR_IMG198,Cursor Image register" line.long 0x31C "CRSR_IMG199,Cursor Image register" line.long 0x320 "CRSR_IMG200,Cursor Image register" line.long 0x324 "CRSR_IMG201,Cursor Image register" line.long 0x328 "CRSR_IMG202,Cursor Image register" line.long 0x32C "CRSR_IMG203,Cursor Image register" line.long 0x330 "CRSR_IMG204,Cursor Image register" line.long 0x334 "CRSR_IMG205,Cursor Image register" line.long 0x338 "CRSR_IMG206,Cursor Image register" line.long 0x33C "CRSR_IMG207,Cursor Image register" line.long 0x340 "CRSR_IMG208,Cursor Image register" line.long 0x344 "CRSR_IMG209,Cursor Image register" line.long 0x348 "CRSR_IMG210,Cursor Image register" line.long 0x34C "CRSR_IMG211,Cursor Image register" line.long 0x350 "CRSR_IMG212,Cursor Image register" line.long 0x354 "CRSR_IMG213,Cursor Image register" line.long 0x358 "CRSR_IMG214,Cursor Image register" line.long 0x35C "CRSR_IMG215,Cursor Image register" line.long 0x360 "CRSR_IMG216,Cursor Image register" line.long 0x364 "CRSR_IMG217,Cursor Image register" line.long 0x368 "CRSR_IMG218,Cursor Image register" line.long 0x36C "CRSR_IMG219,Cursor Image register" line.long 0x370 "CRSR_IMG220,Cursor Image register" line.long 0x374 "CRSR_IMG221,Cursor Image register" line.long 0x378 "CRSR_IMG222,Cursor Image register" line.long 0x37C "CRSR_IMG223,Cursor Image register" line.long 0x380 "CRSR_IMG224,Cursor Image register" line.long 0x384 "CRSR_IMG225,Cursor Image register" line.long 0x388 "CRSR_IMG226,Cursor Image register" line.long 0x38C "CRSR_IMG227,Cursor Image register" line.long 0x390 "CRSR_IMG228,Cursor Image register" line.long 0x394 "CRSR_IMG229,Cursor Image register" line.long 0x398 "CRSR_IMG230,Cursor Image register" line.long 0x39C "CRSR_IMG231,Cursor Image register" line.long 0x3A0 "CRSR_IMG232,Cursor Image register" line.long 0x3A4 "CRSR_IMG233,Cursor Image register" line.long 0x3A8 "CRSR_IMG234,Cursor Image register" line.long 0x3AC "CRSR_IMG235,Cursor Image register" line.long 0x3B0 "CRSR_IMG236,Cursor Image register" line.long 0x3B4 "CRSR_IMG237,Cursor Image register" line.long 0x3B8 "CRSR_IMG238,Cursor Image register" line.long 0x3BC "CRSR_IMG239,Cursor Image register" line.long 0x3C0 "CRSR_IMG240,Cursor Image register" line.long 0x3C4 "CRSR_IMG241,Cursor Image register" line.long 0x3C8 "CRSR_IMG242,Cursor Image register" line.long 0x3CC "CRSR_IMG243,Cursor Image register" line.long 0x3D0 "CRSR_IMG244,Cursor Image register" line.long 0x3D4 "CRSR_IMG245,Cursor Image register" line.long 0x3D8 "CRSR_IMG246,Cursor Image register" line.long 0x3DC "CRSR_IMG247,Cursor Image register" line.long 0x3E0 "CRSR_IMG248,Cursor Image register" line.long 0x3E4 "CRSR_IMG249,Cursor Image register" line.long 0x3E8 "CRSR_IMG250,Cursor Image register" line.long 0x3EC "CRSR_IMG251,Cursor Image register" line.long 0x3F0 "CRSR_IMG252,Cursor Image register" line.long 0x3F4 "CRSR_IMG253,Cursor Image register" line.long 0x3F8 "CRSR_IMG254,Cursor Image register" line.long 0x3FC "CRSR_IMG255,Cursor Image register" tree.end textline " " if (((per.l(ad:0x20088C04))&0x1)==0x0) group.long 0xC00++0x3 line.long 0x00 "CRSR_CTRL,Cursor Control register" bitfld.long 0x00 4.--5. " CRSRNUM[1:0] ,Cursor image number" "Cursor0,Cursor1,Cursor2,Cursor3" bitfld.long 0x00 0. " CRSRON ,Cursor enable" "Disabled,Enabled" else group.long 0xC00++0x3 line.long 0x00 "CRSR_CTRL,Cursor Control register" bitfld.long 0x00 0. " CRSRON ,Cursor enable" "Disabled,Enabled" endif group.long 0xC04++0x03 line.long 0x00 "CRSR_CFG,Cursor configuration register" bitfld.long 0x00 1. " FRAMESYNC ,Cursor frame synchronization type" "Async,Sync" bitfld.long 0x00 0. " CRSRSIZE ,Cursor size selection" "32x32,64x64" if (((per.l(ad:0x20088018))&0x20)==0x20) group.long 0xC08++0x03 line.long 0x00 "CRSR_PAL0,Cursor Palette register 0" hexmask.long.byte 0x00 16.--23. 1. " BLUE ,Blue color component" hexmask.long.byte 0x00 8.--15. 1. " GREEN ,Green color component" hexmask.long.byte 0x00 0.--7. 1. " RED ,Red color component" elif (((per.l(ad:0x20088018))&0x30)==0x10) group.long 0xC08++0x03 line.long 0x00 "CRSR_PAL0,Cursor Palette register 0" bitfld.long 0x00 4.--7. " RED ,Red color component" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long 0xC08++0x03 line.long 0x00 "CRSR_PAL0,Cursor Palette register 0" bitfld.long 0x00 20.--23. " BLUE ,Blue color component" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " GREEN ,Green color component" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " RED ,Red color component" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x20088018))&0x20)==0x20) group.long 0xC0C++0x03 line.long 0x00 "CRSR_PAL1,Cursor Palette register 1" hexmask.long.byte 0x00 16.--23. 1. " BLUE ,Blue color component" hexmask.long.byte 0x00 8.--15. 1. " GREEN ,Green color component" hexmask.long.byte 0x00 0.--7. 1. " RED ,Red color component" elif (((per.l(ad:0x20088018))&0x30)==0x10) group.long 0xC0C++0x03 line.long 0x00 "CRSR_PAL1,Cursor Palette register 1" bitfld.long 0x00 4.--7. " RED ,Red color component" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long 0xC0C++0x03 line.long 0x00 "CRSR_PAL1,Cursor Palette register 1" bitfld.long 0x00 20.--23. " BLUE ,Blue color component" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " GREEN ,Green color component" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " RED ,Red color component" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif group.long 0xC10++0x7 line.long 0x00 "CRSR_XY,Cursor XY position register" hexmask.long.word 0x00 16.--25. 1. " CRSRY ,Y ordinate of the cursor origin measured in pixels" hexmask.long.word 0x00 0.--9. 1. " CRSRX ,X ordinate of the cursor origin measured in pixels" line.long 0x04 "CRSR_CLIP,Cursor Clip Position register" bitfld.long 0x04 8.--13. " CRSRCLIPY ,Cursor clip position for Y direction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 0.--5. " CRSRCLIPX ,Cursor clip position for X direction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0xC20++0x03 line.long 0x00 "CRSR_INTMSK,Cursor Interrupt Mask register" bitfld.long 0x00 0. " CRSRIM ,Cursor interrupt mask" "Masked,Not masked" wgroup.long 0xC24++0x03 line.long 0x00 "CRSR_INTCLR,Cursor Interrupt Clear register" bitfld.long 0x00 0. " CRSRIC ,Cursor interrupt clear" "Not clear,Clear" rgroup.long 0xC28++0x07 line.long 0x00 "CRSR_INTRAW,Cursor Raw Interrupt Status register" bitfld.long 0x00 0. " CRSRRIS ,Cursor raw interrupt status" "No interrupt,Interrupt" line.long 0x04 "CRSR_INTSTAT,Cursor Masked Interrupt Status register" bitfld.long 0x04 0. " CRSRMIS ,Cursor masked interrupt status" "Not masked,Masked" width 0xB tree.end endif sif (cpu()!="LPC1763"&&cpu()!="LPC1767") tree "USB Device (Universal Serial Bus)" sif (cpu()=="LPC1772"||cpu()=="LPC1774"||cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778"||cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788") base ad:0x2008C000 else base ad:0x5000C000 endif width 12. sif (cpu()=="LPC1772"||cpu()=="LPC1774"||cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778"||cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788")||(cpu()=="LPC4072FBD80")||(cpu()=="LPC4072FET80")||(cpu()=="LPC4074FBD144")||(cpu()=="LPC4076FBD144")||(cpu()=="LPC4076FET180")||(cpu()=="LPC4078FBD100")||(cpu()=="LPC4078FBD144")||(cpu()=="LPC4078FBD208")||(cpu()=="LPC4078FBD80")||(cpu()=="LPC4078FET180")||(cpu()=="LPC4078FET208")||(cpu()=="LPC4088FBD144")||(cpu()=="LPC4088FBD208")||(cpu()=="LPC4088FET180")||(cpu()=="LPC4088FET208") tree "Port select register" group.long 0x110++0x03 line.long 0x00 "USBPortSel,USB port select register" bitfld.long 0x00 0.--1. " PORTSEL ,Selects which USB port the device controller signals are mapped to" "U1 port,Reserved,U2 port,?..." tree.end endif tree "Clock Control Registers" group.long 0xFF4++0x3 line.long 0x0 "USBClkCtrl,USB Clock Control register" bitfld.long 0x0 4. " AHB_CLK_EN ,AHB clock enable" "Disabled,Enabled" sif (cpu()=="LPC1772"||cpu()=="LPC1774"||cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778"||cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788")||(cpu()=="LPC4072FBD80")||(cpu()=="LPC4072FET80")||(cpu()=="LPC4074FBD144")||(cpu()=="LPC4076FBD144")||(cpu()=="LPC4076FET180")||(cpu()=="LPC4078FBD100")||(cpu()=="LPC4078FBD144")||(cpu()=="LPC4078FBD208")||(cpu()=="LPC4078FBD80")||(cpu()=="LPC4078FET180")||(cpu()=="LPC4078FET208")||(cpu()=="LPC4088FBD144")||(cpu()=="LPC4088FBD208")||(cpu()=="LPC4088FET180")||(cpu()=="LPC4088FET208") bitfld.long 0x0 3. " PORTSEL_CLK_EN ,Port select register clock enable" "Disabled,Enabled" endif bitfld.long 0x0 1. " DEV_CLK_EN ,Device clock enable" "Disabled,Enabled" rgroup.long 0xFF8++0x3 line.long 0x0 "USBClkSt,USB Clock Status register" bitfld.long 0x0 4. " AHB_CLK_ON ,AHB clock on" "Not active,Active" sif (cpu()=="LPC1772"||cpu()=="LPC1774"||cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778"||cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788")||(cpu()=="LPC4072FBD80")||(cpu()=="LPC4072FET80")||(cpu()=="LPC4074FBD144")||(cpu()=="LPC4076FBD144")||(cpu()=="LPC4076FET180")||(cpu()=="LPC4078FBD100")||(cpu()=="LPC4078FBD144")||(cpu()=="LPC4078FBD208")||(cpu()=="LPC4078FBD80")||(cpu()=="LPC4078FET180")||(cpu()=="LPC4078FET208")||(cpu()=="LPC4088FBD144")||(cpu()=="LPC4088FBD208")||(cpu()=="LPC4088FET180")||(cpu()=="LPC4088FET208") bitfld.long 0x0 3. " PORTSEL_CLK_ON ,Port select register clock on" "Not active,Active" endif bitfld.long 0x0 1. " DEV_CLK_ON ,Device clock on" "Not active,Active" tree.end width 14. tree "Interrupt Registers" sif (cpu()!="LPC4072FBD80")||(cpu()!="LPC4072FET80")||(cpu()!="LPC4074FBD144")||(cpu()!="LPC4076FBD144")||(cpu()!="LPC4076FET180")||(cpu()!="LPC4078FBD100")||(cpu()!="LPC4078FBD144")||(cpu()!="LPC4078FBD208")||(cpu()!="LPC4078FBD80")||(cpu()!="LPC4078FET180")||(cpu()!="LPC4078FET208")||(cpu()!="LPC4088FBD144")||(cpu()!="LPC4088FBD208")||(cpu()!="LPC4088FET180")||(cpu()!="LPC4088FET208") group.long 0x1C0++0x3 line.long 0x00 "USBIntSt,USB Interrupt Status Register" bitfld.long 0x00 31. " EN_USB_INTS ,Enable USB Interrupts" "Disabled,Enabled" bitfld.long 0x00 8. " USB_NEED_CLK ,USB Need Clock Indicator" "Not needed,Needed" textline " " bitfld.long 0x00 2. " USB_INT_REQ_DMA ,DMA Interrupt Line Status" "No interrupt,Interrupt" bitfld.long 0x00 1. " USB_INT_REQ_HP ,High Priority Interrupt Line Status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 0. " USB_INT_REQ_LP ,Low Priority Interrupt Line Status" "No interrupt,Interrupt" endif group.long 0x200++0x7 line.long 0x0 "USBDevIntSt,USB Device Interrupt Status Register" setclrfld.long 0x0 9. 0xC 9. 0x8 9. " ERR_INT_set/clr ,Error interrupt" "No interrupt,Interrupt" setclrfld.long 0x0 8. 0xC 8. 0x8 8. " EP_RLZED_set/clr ,Endpoints realized interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 7. 0xC 7. 0x8 7. " TxENDPKT_set/clr ,TxPacket length interrupt" "No interrupt,Interrupt" setclrfld.long 0x0 6. 0xC 6. 0x8 6. " RxENDPKT_set/clr ,RxPacket length interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 5. 0xC 5. 0x8 5. " CDFULL_set/clr ,Command data register is full interrupt" "No interrupt,Interrupt" setclrfld.long 0x0 4. 0xC 4. 0x8 4. " CCEMPTY_set/clr ,The command code register is empty interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 3. 0xC 3. 0x8 3. " DEV_STAT_set/clr ,Device state interrupt" "No interrupt,Interrupt" setclrfld.long 0x0 2. 0xC 2. 0x8 2. " EP_SLOW_set/clr ,Slow interrupt transfer for the endpoint" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 1. 0xC 1. 0x8 1. " EP_FAST_set/clr ,Fast interrupt transfer for the endpoint" "No interrupt,Interrupt" setclrfld.long 0x0 0. 0xC 0. 0x8 0. " FRAME_set/clr ,Frame interrupt" "No interrupt,Interrupt" line.long 0x4 "USBDevIntEn,USB Device Interrupt Enable Register" bitfld.long 0x4 9. " ERR_INT ,Error interrupt" "Disabled,Enabled" bitfld.long 0x4 8. " EP_RLZED ,Endpoints realized interrupt" "Disabled,Enabled" textline " " bitfld.long 0x4 7. " TxENDPKT ,TxPacket length interrupt" "Disabled,Enabled" bitfld.long 0x4 6. " RxENDPKT ,RxPacket length interrupt" "Disabled,Enabled" textline " " bitfld.long 0x4 5. " CDFULL ,Command data register is full interrupt" "Disabled,Enabled" bitfld.long 0x4 4. " CCEMPTY ,The command code register is empty interrupt" "Disabled,Enabled" textline " " bitfld.long 0x4 3. " DEV_STAT ,Device state interrupt" "Disabled,Enabled" bitfld.long 0x4 2. " EP_SLOW ,Slow interrupt transfer for the endpoint" "Disabled,Enabled" textline " " bitfld.long 0x4 1. " EP_FAST ,Fast interrupt transfer for the endpoint" "Disabled,Enabled" bitfld.long 0x4 0. " FRAME ,Frame interrupt" "Disabled,Enabled" wgroup.long 0x22C++0x3 line.long 0x0 "USBDevIntPri,USB Device Interrupt Priority Register" bitfld.long 0x0 1. " EP_FAST ,Endpoint fast interrupt transfer priority" "Low,High" bitfld.long 0x0 0. " FRAME ,Frame interrupt priority" "Low,High" group.long 0x230++0x7 line.long 0x0 "USBEpIntSt,USB Endpoint Interrupt Status Register" setclrfld.long 0x0 31. 0xC 31. 0x8 31. " EP15TX_set/clr ,Endpoint 15. Data Transmitted Interrupt or sent a NAK" "No interrupt,Interrupt" setclrfld.long 0x0 30. 0xC 30. 0x8 30. " EP15RX_set/clr ,Endpoint 15. Data Received Interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 29. 0xC 29. 0x8 29. " EP14TX_set/clr ,Endpoint 14. Data Transmitted Interrupt or sent a NAK" "No interrupt,Interrupt" setclrfld.long 0x0 28. 0xC 28. 0x8 28. " EP14RX_set/clr ,Endpoint 14. Data Received Interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 27. 0xC 27. 0x8 27. " EP13TX_set/clr ,Endpoint 13. Data Transmitted Interrupt or sent a NAK" "No interrupt,Interrupt" setclrfld.long 0x0 26. 0xC 26. 0x8 26. " EP13RX_set/clr ,Endpoint 13. Data Received Interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 25. 0xC 25. 0x8 25. " EP12TX_set/clr ,Endpoint 12. Isochronous endpoint" "No interrupt,Interrupt" setclrfld.long 0x0 24. 0xC 24. 0x8 24. " EP12RX_set/clr ,Endpoint 12. Isochronous endpoint" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 23. 0xC 23. 0x8 23. " EP11TX_set/clr ,Endpoint 11. Data Transmitted Interrupt or sent a NAK" "No interrupt,Interrupt" setclrfld.long 0x0 22. 0xC 22. 0x8 22. " EP11RX_set/clr ,Endpoint 11, Data Received Interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 21. 0xC 21. 0x8 21. " EP10TX_set/clr ,Endpoint 10. Data Transmitted Interrupt or sent a NAK" "No interrupt,Interrupt" setclrfld.long 0x0 20. 0xC 20. 0x8 20. " EP10RX_set/clr ,Endpoint 10. Data Received Interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 19. 0xC 19. 0x8 19. " EP9TX_set/clr ,Endpoint 9. Isochronous endpoint" "No interrupt,Interrupt" setclrfld.long 0x0 18. 0xC 18. 0x8 18. " EP9RX_set/clr ,Endpoint 9. Isochronous endpoint" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 17. 0xC 17. 0x8 17. " EP8TX_set/clr ,Endpoint 8. Data Transmitted Interrupt or sent a NAK" "No interrupt,Interrupt" setclrfld.long 0x0 16. 0xC 16. 0x8 16. " EP8RX_set/clr ,Endpoint 8. Data Received Interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 15. 0xC 15. 0x8 15. " EP7TX_set/clr ,Endpoint 7. Data Transmitted Interrupt or sent a NAK" "No interrupt,Interrupt" setclrfld.long 0x0 14. 0xC 14. 0x8 14. " EP7RX_set/clr ,Endpoint 7. Data Received Interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 13. 0xC 13. 0x8 13. " EP6TX_set/clr ,Endpoint 6. Isochronous endpoint" "No interrupt,Interrupt" setclrfld.long 0x0 12. 0xC 12. 0x8 12. " EP6RX_set/clr ,Endpoint 6. Isochronous endpoint" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 11. 0xC 11. 0x8 11. " EP5TX_set/clr ,Endpoint 5. Data Transmitted Interrupt or sent a NAK" "No interrupt,Interrupt" setclrfld.long 0x0 10. 0xC 10. 0x8 10. " EP5RX_set/clr ,Endpoint 5. Data Received Interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 9. 0xC 9. 0x8 9. " EP4TX_set/clr ,Endpoint 4. Data Transmitted Interrupt or sent a NAK" "No interrupt,Interrupt" setclrfld.long 0x0 8. 0xC 8. 0x8 8. " EP4RX_set/clr ,Endpoint 4. Data Received Interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 7. 0xC 7. 0x8 7. " EP3TX_set/clr ,Endpoint 3. Isochronous endpoint" "No interrupt,Interrupt" setclrfld.long 0x0 6. 0xC 6. 0x8 6. " EP3RX_set/clr ,Endpoint 3. Isochronous endpoint" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 5. 0xC 5. 0x8 5. " EP2TX_set/clr ,Endpoint 2. Data Transmitted Interrupt or sent a NAK" "No interrupt,Interrupt" setclrfld.long 0x0 4. 0xC 4. 0x8 4. " EP2RX_set/clr ,Endpoint 2. Data Received Interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 3. 0xC 3. 0x8 3. " EP1TX_set/clr ,Endpoint 1. Data Transmitted Interrupt or sent a NAK" "No interrupt,Interrupt" setclrfld.long 0x0 2. 0xC 2. 0x8 2. " EP1RX_set/clr ,Endpoint 1. Data Received Interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 1. 0xC 1. 0x8 1. " EP0TX_set/clr ,Endpoint 0. Data Transmitted Interrupt or sent a NAK" "No interrupt,Interrupt" setclrfld.long 0x0 0. 0xC 0. 0x8 0. " EP0RX_set/clr ,Endpoint 0. Data Received Interrupt" "No interrupt,Interrupt" line.long 0x4 "USBEpIntEn,USB Endpoint Interrupt Enable Register" bitfld.long 0x4 31. " EP15TX ,Endpoint 15. Data Transmitted Interrupt or sent a NAK" "Disabled,Enabled" bitfld.long 0x4 30. " EP15RX ,Endpoint 15. Data Received Interrupt" "Disabled,Enabled" bitfld.long 0x4 29. " EP14TX ,Endpoint 14. Data Transmitted Interrupt or sent a NAK" "Disabled,Enabled" textline " " bitfld.long 0x4 28. " EP14RX ,Endpoint 14. Data Received Interrupt" "Disabled,Enabled" bitfld.long 0x4 27. " EP13TX ,Endpoint 13. Data Transmitted Interrupt or sent a NAK" "Disabled,Enabled" bitfld.long 0x4 26. " EP13RX ,Endpoint 13. Data Received Interrupt" "Disabled,Enabled" textline " " bitfld.long 0x4 25. " EP12TX ,Endpoint 12. Isochronous endpoint" "Disabled,Enabled" bitfld.long 0x4 24. " EP12RX ,Endpoint 12. Isochronous endpoint" "Disabled,Enabled" bitfld.long 0x4 23. " EP11TX ,Endpoint 11. Data Transmitted Interrupt or sent a NAK" "Disabled,Enabled" textline " " bitfld.long 0x4 22. " EP11RX ,Endpoint 11, Data Received Interrupt" "Disabled,Enabled" bitfld.long 0x4 21. " EP10TX ,Endpoint 10. Data Transmitted Interrupt or sent a NAK" "Disabled,Enabled" bitfld.long 0x4 20. " EP10RX ,Endpoint 10. Data Received Interrupt" "Disabled,Enabled" textline " " bitfld.long 0x4 19. " EP9TX ,Endpoint 9. Isochronous endpoint" "Disabled,Enabled" bitfld.long 0x4 18. " EP9RX ,Endpoint 9. Isochronous endpoint" "Disabled,Enabled" bitfld.long 0x4 17. " EP8TX ,Endpoint 8. Data Transmitted Interrupt or sent a NAK" "Disabled,Enabled" textline " " bitfld.long 0x4 16. " EP8RX ,Endpoint 8. Data Received Interrupt" "Disabled,Enabled" bitfld.long 0x4 15. " EP7TX ,Endpoint 7. Data Transmitted Interrupt or sent a NAK" "Disabled,Enabled" bitfld.long 0x4 14. " EP7RX ,Endpoint 7. Data Received Interrupt" "Disabled,Enabled" textline " " bitfld.long 0x4 13. " EP6TX ,Endpoint 6. Isochronous endpoint" "Disabled,Enabled" bitfld.long 0x4 12. " EP6RX ,Endpoint 6. Isochronous endpoint" "Disabled,Enabled" bitfld.long 0x4 11. " EP5TX ,Endpoint 5. Data Transmitted Interrupt or sent a NAK" "Disabled,Enabled" textline " " bitfld.long 0x4 10. " EP5RX ,Endpoint 5. Data Received Interrupt" "Disabled,Enabled" bitfld.long 0x4 9. " EP4TX ,Endpoint 4. Data Transmitted Interrupt or sent a NAK" "Disabled,Enabled" bitfld.long 0x4 8. " EP4RX ,Endpoint 4. Data Received Interrupt" "Disabled,Enabled" textline " " bitfld.long 0x4 7. " EP3TX ,Endpoint 3. Isochronous endpoint" "Disabled,Enabled" bitfld.long 0x4 6. " EP3RX ,Endpoint 3. Isochronous endpoint" "Disabled,Enabled" bitfld.long 0x4 5. " EP2TX ,Endpoint 2. Data Transmitted Interrupt or sent a NAK" "Disabled,Enabled" textline " " bitfld.long 0x4 4. " EP2RX ,Endpoint 2. Data Received Interrupt" "Disabled,Enabled" bitfld.long 0x4 3. " EP1TX ,Endpoint 1. Data Transmitted Interrupt or sent a NAK" "Disabled,Enabled" bitfld.long 0x4 2. " EP1RX ,Endpoint 1. Data Received Interrupt" "Disabled,Enabled" textline " " bitfld.long 0x4 1. " EP0TX ,Endpoint 0. Data Transmitted Interrupt or sent a NAK" "Disabled,Enabled" bitfld.long 0x4 0. " EP0RX ,Endpoint 0. Data Received Interrupt" "Disabled,Enabled" wgroup.long 0x240++0x3 line.long 0x0 "USBEpIntPri,USB Endpoint Interrupt Priority Register" bitfld.long 0x0 31. " EP15TX ,Endpoint 15. Data Transmitted Interrupt or sent a NAK" "Slow,Fast" bitfld.long 0x0 30. " EP15RX ,Endpoint 15. Data Received Interrupt" "Slow,Fast" bitfld.long 0x0 29. " EP14TX ,Endpoint 14. Data Transmitted Interrupt or sent a NAK" "Slow,Fast" textline " " bitfld.long 0x0 28. " EP14RX ,Endpoint 14. Data Received Interrupt" "Slow,Fast" bitfld.long 0x0 27. " EP13TX ,Endpoint 13. Data Transmitted Interrupt or sent a NAK" "Slow,Fast" bitfld.long 0x0 26. " EP13RX ,Endpoint 13. Data Received Interrupt" "Slow,Fast" textline " " bitfld.long 0x0 25. " EP12TX ,Endpoint 12. Isochronous endpoint" "Slow,Fast" bitfld.long 0x0 24. " EP12RX ,Endpoint 12. Isochronous endpoint" "Slow,Fast" bitfld.long 0x0 23. " EP11TX ,Endpoint 11. Data Transmitted Interrupt or sent a NAK" "Slow,Fast" textline " " bitfld.long 0x0 22. " EP11RX ,Endpoint 11, Data Received Interrupt" "Slow,Fast" bitfld.long 0x0 21. " EP10TX ,Endpoint 10. Data Transmitted Interrupt or sent a NAK" "Slow,Fast" bitfld.long 0x0 20. " EP10RX ,Endpoint 10. Data Received Interrupt" "Slow,Fast" textline " " bitfld.long 0x0 19. " EP9TX ,Endpoint 9. Isochronous endpoint" "Slow,Fast" bitfld.long 0x0 18. " EP9RX ,Endpoint 9. Isochronous endpoint" "Slow,Fast" bitfld.long 0x0 17. " EP8TX ,Endpoint 8. Data Transmitted Interrupt or sent a NAK" "Slow,Fast" textline " " bitfld.long 0x0 16. " EP8RX ,Endpoint 8. Data Received Interrupt" "Slow,Fast" bitfld.long 0x0 15. " EP7TX ,Endpoint 7. Data Transmitted Interrupt or sent a NAK" "Slow,Fast" bitfld.long 0x0 14. " EP7RX ,Endpoint 7. Data Received Interrupt" "Slow,Fast" textline " " bitfld.long 0x0 13. " EP6TX ,Endpoint 6. Isochronous endpoint" "Slow,Fast" bitfld.long 0x0 12. " EP6RX ,Endpoint 6. Isochronous endpoint" "Slow,Fast" bitfld.long 0x0 11. " EP5TX ,Endpoint 5. Data Transmitted Interrupt or sent a NAK" "Slow,Fast" textline " " bitfld.long 0x0 10. " EP5RX ,Endpoint 5. Data Received Interrupt" "Slow,Fast" bitfld.long 0x0 9. " EP4TX ,Endpoint 4. Data Transmitted Interrupt or sent a NAK" "Slow,Fast" bitfld.long 0x0 8. " EP4RX ,Endpoint 4. Data Received Interrupt" "Slow,Fast" textline " " bitfld.long 0x0 7. " EP3TX ,Endpoint 3. Isochronous endpoint" "Slow,Fast" bitfld.long 0x0 6. " EP3RX ,Endpoint 3. Isochronous endpoint" "Slow,Fast" bitfld.long 0x0 5. " EP2TX ,Endpoint 2. Data Transmitted Interrupt or sent a NAK" "Slow,Fast" textline " " bitfld.long 0x0 4. " EP2RX ,Endpoint 2. Data Received Interrupt" "Slow,Fast" bitfld.long 0x0 3. " EP1TX ,Endpoint 1. Data Transmitted Interrupt or sent a NAK" "Slow,Fast" bitfld.long 0x0 2. " EP1RX ,Endpoint 1. Data Received Interrupt" "Slow,Fast" textline " " bitfld.long 0x0 1. " EP0TX ,Endpoint 0. Data Transmitted Interrupt or sent a NAK" "Slow,Fast" bitfld.long 0x0 0. " EP0RX ,Endpoint 0. Data Received Interrupt" "Slow,Fast" tree.end width 13. tree "Realization/Transfer/Command Registers" group.long 0x244++0x3 line.long 0x0 "USBReEp,USB Realize Endpoint Register" bitfld.long 0x0 31. " EP31 ,Endpoint 31 realized" "Unrealized,Realized" bitfld.long 0x0 30. " EP30 ,Endpoint 30 realized" "Unrealized,Realized" bitfld.long 0x0 29. " EP29 ,Endpoint 29 realized" "Unrealized,Realized" textline " " bitfld.long 0x0 28. " EP28 ,Endpoint 28 realized" "Unrealized,Realized" bitfld.long 0x0 27. " EP27 ,Endpoint 27 realized" "Unrealized,Realized" bitfld.long 0x0 26. " EP26 ,Endpoint 26 realized" "Unrealized,Realized" textline " " bitfld.long 0x0 25. " EP25 ,Endpoint 25 realized" "Unrealized,Realized" bitfld.long 0x0 24. " EP24 ,Endpoint 24 realized" "Unrealized,Realized" bitfld.long 0x0 23. " EP23 ,Endpoint 23 realized" "Unrealized,Realized" textline " " bitfld.long 0x0 22. " EP22 ,Endpoint 22 realized" "Unrealized,Realized" bitfld.long 0x0 21. " EP21 ,Endpoint 21 realized" "Unrealized,Realized" bitfld.long 0x0 20. " EP20 ,Endpoint 20 realized" "Unrealized,Realized" textline " " bitfld.long 0x0 19. " EP19 ,Endpoint 19 realized" "Unrealized,Realized" bitfld.long 0x0 18. " EP18 ,Endpoint 18 realized" "Unrealized,Realized" bitfld.long 0x0 17. " EP17 ,Endpoint 17 realized" "Unrealized,Realized" textline " " bitfld.long 0x0 16. " EP16 ,Endpoint 16 realized" "Unrealized,Realized" bitfld.long 0x0 15. " EP15 ,Endpoint 15 realized" "Unrealized,Realized" bitfld.long 0x0 14. " EP14 ,Endpoint 14 realized" "Unrealized,Realized" textline " " bitfld.long 0x0 13. " EP13 ,Endpoint 13 realized" "Unrealized,Realized" bitfld.long 0x0 12. " EP12 ,Endpoint 12 realized" "Unrealized,Realized" bitfld.long 0x0 11. " EP11 ,Endpoint 11 realized" "Unrealized,Realized" textline " " bitfld.long 0x0 10. " EP10 ,Endpoint 10 realized" "Unrealized,Realized" bitfld.long 0x0 9. " EP9 ,Endpoint 9 realized" "Unrealized,Realized" bitfld.long 0x0 8. " EP8 ,Endpoint 8 realized" "Unrealized,Realized" textline " " bitfld.long 0x0 7. " EP7 ,Endpoint 7 realized" "Unrealized,Realized" bitfld.long 0x0 6. " EP6 ,Endpoint 6 realized" "Unrealized,Realized" bitfld.long 0x0 5. " EP5 ,Endpoint 5 realized" "Unrealized,Realized" textline " " bitfld.long 0x0 4. " EP4 ,Endpoint 4 realized" "Unrealized,Realized" bitfld.long 0x0 3. " EP3 ,Endpoint 3 realized" "Unrealized,Realized" bitfld.long 0x0 2. " EP2 ,Endpoint 2 realized" "Unrealized,Realized" textline " " bitfld.long 0x0 1. " EP1 ,Endpoint 1 realized" "Unrealized,Realized" bitfld.long 0x0 0. " EP0 ,Endpoint 0 realized" "Unrealized,Realized" wgroup.long 0x248++0x3 line.long 0x0 "USBEpInd,USB Endpoint Index Register" bitfld.long 0x0 0.--4. " PhyEndp ,Physical endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x24C++0x3 line.long 0x0 "USBMaxPSize,USB MaxPacketSize Register" hexmask.long.word 0x0 0.--9. 1. " MaxPacketSize ,Maximum packet size value" hgroup.long 0x218++0x3 hide.long 0x0 "USBRxData,USB Receive Data Register" in rgroup.long 0x220++0x3 line.long 0x0 "USBRxPLen,USB Receive Packet Length Register" bitfld.long 0x0 11. " PKT_RDY ,Packet length field ready" "Not ready,Ready" bitfld.long 0x0 10. " DV ,Data valid" "Invalid,Valid" textline " " hexmask.long.word 0x0 0.--9. 1. " PKT_LNGTH ,Remaining amount of data in bytes still to be read from the RAM" wgroup.long 0x21C++0x3 line.long 0x0 "USBTxData,USB Transmit Data Register" wgroup.long 0x224++0x3 line.long 0x0 "USBTxPLen,USB Transmit Packet Length Register" hexmask.long.word 0x0 0.--9. 1. " PKT_LNGTH ,Remaining amount of data in bytes to be written to the EP_RAM" group.long 0x228++0x3 line.long 0x0 "USBCtrl,USB Control Register" bitfld.long 0x0 2.--5. " LOG_ENDPOINT ,Logical Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1. " WR_EN ,Write mode enable" "Disabled,Enabled" textline " " bitfld.long 0x0 0. " RD_EN ,Read mode enable" "Disabled,Enabled" wgroup.long 0x210++0x3 line.long 0x0 "USBCmdCode,USB Command Code Register" sif (cpu()=="LPC1772"||cpu()=="LPC1774"||cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778"||cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788")||(cpu()=="LPC4072FBD80")||(cpu()=="LPC4072FET80")||(cpu()=="LPC4074FBD144")||(cpu()=="LPC4076FBD144")||(cpu()=="LPC4076FET180")||(cpu()=="LPC4078FBD100")||(cpu()=="LPC4078FBD144")||(cpu()=="LPC4078FBD208")||(cpu()=="LPC4078FBD80")||(cpu()=="LPC4078FET180")||(cpu()=="LPC4078FET208")||(cpu()=="LPC4088FBD144")||(cpu()=="LPC4088FBD208")||(cpu()=="LPC4088FET180")||(cpu()=="LPC4088FET208") hexmask.long.byte 0x0 16.--23. 1. " CMD_CODE/CMD_WDATA ,Code for the command" hexmask.long.byte 0x0 8.--15. 1. " CMD_PHASE ,Command phase" else hexmask.long.byte 0x0 16.--23. 1. " CMD_CODE ,Code for the command" hexmask.long.byte 0x0 8.--15. 1. " CMD_PHASE/CMD_WDATA ,Command phase" endif rgroup.long 0x214++0x3 line.long 0x0 "USBCmdData,USB Command Data Register" hexmask.long.byte 0x0 0.--7. 1. " CMD_DATA ,Command Data" tree.end tree "DMA Registers" width 13. group.long 0x250++0x3 line.long 0x0 "USBDMARSt,USB DMA Request Status Register" setclrfld.long 0x0 31. 0x8 31. 0x4 31. " EP31_set/clr ,Endpoint 31 DMA request" "Not requested,Requested" setclrfld.long 0x0 30. 0x8 30. 0x4 30. " EP30_set/clr ,Endpoint 30 DMA request" "Not requested,Requested" textline " " setclrfld.long 0x0 29. 0x8 29. 0x4 29. " EP29_set/clr ,Endpoint 29 DMA request" "Not requested,Requested" setclrfld.long 0x0 28. 0x8 28. 0x4 28. " EP28_set/clr ,Endpoint 28 DMA request" "Not requested,Requested" textline " " setclrfld.long 0x0 27. 0x8 27. 0x4 27. " EP27_set/clr ,Endpoint 27 DMA request" "Not requested,Requested" setclrfld.long 0x0 26. 0x8 26. 0x4 26. " EP26_set/clr ,Endpoint 26 DMA request" "Not requested,Requested" textline " " setclrfld.long 0x0 25. 0x8 25. 0x4 25. " EP25_set/clr ,Endpoint 25 DMA request" "Not requested,Requested" setclrfld.long 0x0 24. 0x8 24. 0x4 24. " EP24_set/clr ,Endpoint 24 DMA request" "Not requested,Requested" textline " " setclrfld.long 0x0 23. 0x8 23. 0x4 23. " EP23_set/clr ,Endpoint 23 DMA request" "Not requested,Requested" setclrfld.long 0x0 22. 0x8 22. 0x4 22. " EP22_set/clr ,Endpoint 22 DMA request" "Not requested,Requested" textline " " setclrfld.long 0x0 21. 0x8 21. 0x4 21. " EP21_set/clr ,Endpoint 21 DMA request" "Not requested,Requested" setclrfld.long 0x0 20. 0x8 20. 0x4 20. " EP20_set/clr ,Endpoint 20 DMA request" "Not requested,Requested" textline " " setclrfld.long 0x0 19. 0x8 19. 0x4 19. " EP19_set/clr ,Endpoint 19 DMA request" "Not requested,Requested" setclrfld.long 0x0 18. 0x8 18. 0x4 18. " EP18_set/clr ,Endpoint 18 DMA request" "Not requested,Requested" textline " " setclrfld.long 0x0 17. 0x8 17. 0x4 17. " EP17_set/clr ,Endpoint 17 DMA request" "Not requested,Requested" setclrfld.long 0x0 16. 0x8 16. 0x4 16. " EP16_set/clr ,Endpoint 16 DMA request" "Not requested,Requested" textline " " setclrfld.long 0x0 15. 0x8 15. 0x4 15. " EP15_set/clr ,Endpoint 15 DMA request" "Not requested,Requested" setclrfld.long 0x0 14. 0x8 14. 0x4 14. " EP14_set/clr ,Endpoint 14 DMA request" "Not requested,Requested" textline " " setclrfld.long 0x0 13. 0x8 13. 0x4 13. " EP13_set/clr ,Endpoint 13 DMA request" "Not requested,Requested" setclrfld.long 0x0 12. 0x8 12. 0x4 12. " EP12_set/clr ,Endpoint 12 DMA request" "Not requested,Requested" textline " " setclrfld.long 0x0 11. 0x8 11. 0x4 11. " EP11_set/clr ,Endpoint 11 DMA request" "Not requested,Requested" setclrfld.long 0x0 10. 0x8 10. 0x4 10. " EP10_set/clr ,Endpoint 10 DMA request" "Not requested,Requested" textline " " setclrfld.long 0x0 9. 0x8 9. 0x4 9. " EP9_set/clr ,Endpoint 9 DMA request" "Not requested,Requested" setclrfld.long 0x0 8. 0x8 8. 0x4 8. " EP8_set/clr ,Endpoint 8 DMA request" "Not requested,Requested" textline " " setclrfld.long 0x0 7. 0x8 7. 0x4 7. " EP7_set/clr ,Endpoint 7 DMA request" "Not requested,Requested" setclrfld.long 0x0 6. 0x8 6. 0x4 6. " EP6_set/clr ,Endpoint 6 DMA request" "Not requested,Requested" textline " " setclrfld.long 0x0 5. 0x8 5. 0x4 5. " EP5_set/clr ,Endpoint 5 DMA request" "Not requested,Requested" setclrfld.long 0x0 4. 0x8 4. 0x4 4. " EP4_set/clr ,Endpoint 4 DMA request" "Not requested,Requested" textline " " setclrfld.long 0x0 3. 0x8 3. 0x4 3. " EP3_set/clr ,Endpoint 3 DMA request" "Not requested,Requested" setclrfld.long 0x0 2. 0x8 2. 0x4 2. " EP2_set/clr ,Endpoint 2 DMA request" "Not requested,Requested" textline " " setclrfld.long 0x0 1. 0x8 1. 0x4 1. " EP1_set/clr ,Control endpoint IN" "Not requested,Requested" setclrfld.long 0x0 0. 0x8 0. 0x4 0. " EP0_set/clr ,Control endpoint OUT" "Not requested,Requested" group.long 0x280++0x7 line.long 0x0 "USBUDCAH,USB UDCA Head Register" hexmask.long 0x0 7.--31. 0x80 " UDCA_ADDR ,Start address of the UDCA" line.long 0x4 "USBEpDMASt,USB EP DMA Status Register" setclrfld.long 0x4 31. 0x8 31. 0xC 31. " EP31_set/clr ,DMA for Endpoint 31 enable" "Disabled,Enabled" setclrfld.long 0x4 30. 0x8 30. 0xC 30. " EP30_set/clr ,DMA for Endpoint 30 enable" "Disabled,Enabled" textline " " setclrfld.long 0x4 29. 0x8 29. 0xC 29. " EP29_set/clr ,DMA for Endpoint 29 enable" "Disabled,Enabled" setclrfld.long 0x4 28. 0x8 28. 0xC 28. " EP28_set/clr ,DMA for Endpoint 28 enable" "Disabled,Enabled" textline " " setclrfld.long 0x4 27. 0x8 27. 0xC 27. " EP27_set/clr ,DMA for Endpoint 27 enable" "Disabled,Enabled" setclrfld.long 0x4 26. 0x8 26. 0xC 26. " EP26_set/clr ,DMA for Endpoint 26 enable" "Disabled,Enabled" textline " " setclrfld.long 0x4 25. 0x8 25. 0xC 25. " EP25_set/clr ,DMA for Endpoint 25 enable" "Disabled,Enabled" setclrfld.long 0x4 24. 0x8 24. 0xC 24. " EP24_set/clr ,DMA for Endpoint 24 enable" "Disabled,Enabled" textline " " setclrfld.long 0x4 23. 0x8 23. 0xC 23. " EP23_set/clr ,DMA for Endpoint 23 enable" "Disabled,Enabled" setclrfld.long 0x4 22. 0x8 22. 0xC 22. " EP22_set/clr ,DMA for Endpoint 22 enable" "Disabled,Enabled" textline " " setclrfld.long 0x4 21. 0x8 21. 0xC 21. " EP21_set/clr ,DMA for Endpoint 21 enable" "Disabled,Enabled" setclrfld.long 0x4 20. 0x8 20. 0xC 20. " EP20_set/clr ,DMA for Endpoint 20 enable" "Disabled,Enabled" textline " " setclrfld.long 0x4 19. 0x8 19. 0xC 19. " EP19_set/clr ,DMA for Endpoint 19 enable" "Disabled,Enabled" setclrfld.long 0x4 18. 0x8 18. 0xC 18. " EP18_set/clr ,DMA for Endpoint 18 enable" "Disabled,Enabled" textline " " setclrfld.long 0x4 17. 0x8 17. 0xC 17. " EP17_set/clr ,DMA for Endpoint 17 enable" "Disabled,Enabled" setclrfld.long 0x4 16. 0x8 16. 0xC 16. " EP16_set/clr ,DMA for Endpoint 16 enable" "Disabled,Enabled" textline " " setclrfld.long 0x4 15. 0x8 15. 0xC 15. " EP15_set/clr ,DMA for Endpoint 15 enable" "Disabled,Enabled" setclrfld.long 0x4 14. 0x8 14. 0xC 14. " EP14_set/clr ,DMA for Endpoint 14 enable" "Disabled,Enabled" textline " " setclrfld.long 0x4 13. 0x8 13. 0xC 13. " EP13_set/clr ,DMA for Endpoint 13 enable" "Disabled,Enabled" setclrfld.long 0x4 12. 0x8 12. 0xC 12. " EP12_set/clr ,DMA for Endpoint 12 enable" "Disabled,Enabled" textline " " setclrfld.long 0x4 11. 0x8 11. 0xC 11. " EP11_set/clr ,DMA for Endpoint 11 enable" "Disabled,Enabled" setclrfld.long 0x4 10. 0x8 10. 0xC 10. " EP10_set/clr ,DMA for Endpoint 10 enable" "Disabled,Enabled" textline " " setclrfld.long 0x4 9. 0x8 9. 0xC 9. " EP9_set/clr ,DMA for Endpoint 9 enable" "Disabled,Enabled" setclrfld.long 0x4 8. 0x8 8. 0xC 8. " EP8_set/clr ,DMA for Endpoint 8 enable" "Disabled,Enabled" textline " " setclrfld.long 0x4 7. 0x8 7. 0xC 7. " EP7_set/clr ,DMA for Endpoint 7 enable" "Disabled,Enabled" setclrfld.long 0x4 6. 0x8 6. 0xC 6. " EP6_set/clr ,DMA for Endpoint 6 enable" "Disabled,Enabled" textline " " setclrfld.long 0x4 5. 0x8 5. 0xC 5. " EP5_set/clr ,DMA for Endpoint 5 enable" "Disabled,Enabled" setclrfld.long 0x4 4. 0x8 4. 0xC 4. " EP4_set/clr ,DMA for Endpoint 4 enable" "Disabled,Enabled" textline " " setclrfld.long 0x4 3. 0x8 3. 0xC 3. " EP3_set/clr ,DMA for Endpoint 3 enable" "Disabled,Enabled" setclrfld.long 0x4 2. 0x8 2. 0xC 2. " EP2_set/clr ,DMA for Endpoint 2 enable" "Disabled,Enabled" textline " " setclrfld.long 0x4 1. 0x8 1. 0xC 1. " EP1_set/clr ,Control endpoint IN" "0,1" setclrfld.long 0x4 0. 0x8 0. 0xC 0. " EP0_set/clr ,Control endpoint OUT" "0,1" rgroup.long 0x290++0x3 line.long 0x0 "USBDMAIntSt,USB DMA Interrupt Status Register" bitfld.long 0x0 2. " ERR ,System error interrupt" "No interrupt,Interrupt" bitfld.long 0x0 1. " NDDR ,New DD Request Interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x0 0. " EOT ,End of Transfer Interrupt" "No interrupt,Interrupt" group.long 0x294++0x3 line.long 0x0 "USBDMAIntEn,USB DMA Interrupt Enable Register" bitfld.long 0x0 2. " ERR ,System error interrupt" "Disabled,Enabled" bitfld.long 0x0 1. " NDDR ,New DD Request Interrupt" "Disabled,Enabled" textline " " bitfld.long 0x0 0. " EOT ,End of Transfer Interrupt" "Disabled,Enabled" group.long 0x2A0++0x3 line.long 0x0 "USBEoTIntSt,USB End Of Transfer Interrupt Status Register" setclrfld.long 0x0 31. 0x8 31. 0x4 31. " EP31_set/clr ,End of Transfer Interrupt request for Endpoint 31" "No interrupt,Interrupt" setclrfld.long 0x0 30. 0x8 30. 0x4 30. " EP30_set/clr ,End of Transfer Interrupt request for Endpoint 30" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 29. 0x8 29. 0x4 29. " EP29_set/clr ,End of Transfer Interrupt request for Endpoint 29" "No interrupt,Interrupt" setclrfld.long 0x0 28. 0x8 28. 0x4 28. " EP28_set/clr ,End of Transfer Interrupt request for Endpoint 28" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 27. 0x8 27. 0x4 27. " EP27_set/clr ,End of Transfer Interrupt request for Endpoint 27" "No interrupt,Interrupt" setclrfld.long 0x0 26. 0x8 26. 0x4 26. " EP26_set/clr ,End of Transfer Interrupt request for Endpoint 26" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 25. 0x8 25. 0x4 25. " EP25_set/clr ,End of Transfer Interrupt request for Endpoint 25" "No interrupt,Interrupt" setclrfld.long 0x0 24. 0x8 24. 0x4 24. " EP24_set/clr ,End of Transfer Interrupt request for Endpoint 24" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 23. 0x8 23. 0x4 23. " EP23_set/clr ,End of Transfer Interrupt request for Endpoint 23" "No interrupt,Interrupt" setclrfld.long 0x0 22. 0x8 22. 0x4 22. " EP22_set/clr ,End of Transfer Interrupt request for Endpoint 22" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 21. 0x8 21. 0x4 21. " EP21_set/clr ,End of Transfer Interrupt request for Endpoint 21" "No interrupt,Interrupt" setclrfld.long 0x0 20. 0x8 20. 0x4 20. " EP20_set/clr ,End of Transfer Interrupt request for Endpoint 20" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 19. 0x8 19. 0x4 19. " EP19_set/clr ,End of Transfer Interrupt request for Endpoint 19" "No interrupt,Interrupt" setclrfld.long 0x0 18. 0x8 18. 0x4 18. " EP18_set/clr ,End of Transfer Interrupt request for Endpoint 18" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 17. 0x8 17. 0x4 17. " EP17_set/clr ,End of Transfer Interrupt request for Endpoint 17" "No interrupt,Interrupt" setclrfld.long 0x0 16. 0x8 16. 0x4 16. " EP16_set/clr ,End of Transfer Interrupt request for Endpoint 16" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 15. 0x8 15. 0x4 15. " EP15_set/clr ,End of Transfer Interrupt request for Endpoint 15" "No interrupt,Interrupt" setclrfld.long 0x0 14. 0x8 14. 0x4 14. " EP14_set/clr ,End of Transfer Interrupt request for Endpoint 14" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 13. 0x8 13. 0x4 13. " EP13_set/clr ,End of Transfer Interrupt request for Endpoint 13" "No interrupt,Interrupt" setclrfld.long 0x0 12. 0x8 12. 0x4 12. " EP12_set/clr ,End of Transfer Interrupt request for Endpoint 12" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 11. 0x8 11. 0x4 11. " EP11_set/clr ,End of Transfer Interrupt request for Endpoint 11" "No interrupt,Interrupt" setclrfld.long 0x0 10. 0x8 10. 0x4 10. " EP10_set/clr ,End of Transfer Interrupt request for Endpoint 10" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 9. 0x8 9. 0x4 9. " EP9_set/clr ,End of Transfer Interrupt request for Endpoint 9" "No interrupt,Interrupt" setclrfld.long 0x0 8. 0x8 8. 0x4 8. " EP8_set/clr ,End of Transfer Interrupt request for Endpoint 8" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 7. 0x8 7. 0x4 7. " EP7_set/clr ,End of Transfer Interrupt request for Endpoint 7" "No interrupt,Interrupt" setclrfld.long 0x0 6. 0x8 6. 0x4 6. " EP6_set/clr ,End of Transfer Interrupt request for Endpoint 6" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 5. 0x8 5. 0x4 5. " EP5_set/clr ,End of Transfer Interrupt request for Endpoint 5" "No interrupt,Interrupt" setclrfld.long 0x0 4. 0x8 4. 0x4 4. " EP4_set/clr ,End of Transfer Interrupt request for Endpoint 4" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 3. 0x8 3. 0x4 3. " EP3_set/clr ,End of Transfer Interrupt request for Endpoint 3" "No interrupt,Interrupt" setclrfld.long 0x0 2. 0x8 2. 0x4 2. " EP2_set/clr ,End of Transfer Interrupt request for Endpoint 2" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 1. 0x8 1. 0x4 1. " EP1_set/clr ,End of Transfer Interrupt request for Endpoint 1" "No interrupt,Interrupt" setclrfld.long 0x0 0. 0x8 0. 0x4 0. " EP0_set/clr ,End of Transfer Interrupt request for Endpoint 0" "No interrupt,Interrupt" width 16. group.long 0x2AC++0x3 line.long 0x0 "USBNDDRIntSt,USB New DD Request Interrupt Status Register" setclrfld.long 0x0 31. 0x8 31. 0x4 31. " EP31_set/clr ,New DD Request for Endpoint 31" "Not requested,Requested" setclrfld.long 0x0 30. 0x8 30. 0x4 30. " EP30_set/clr ,New DD Request for Endpoint 30" "Not requested,Requested" textline " " setclrfld.long 0x0 29. 0x8 29. 0x4 29. " EP29_set/clr ,New DD Request for Endpoint 29" "Not requested,Requested" setclrfld.long 0x0 28. 0x8 28. 0x4 28. " EP28_set/clr ,New DD Request for Endpoint 28" "Not requested,Requested" textline " " setclrfld.long 0x0 27. 0x8 27. 0x4 27. " EP27_set/clr ,New DD Request for Endpoint 27" "Not requested,Requested" setclrfld.long 0x0 26. 0x8 26. 0x4 26. " EP26_set/clr ,New DD Request for Endpoint 26" "Not requested,Requested" textline " " setclrfld.long 0x0 25. 0x8 25. 0x4 25. " EP25_set/clr ,New DD Request for Endpoint 25" "Not requested,Requested" setclrfld.long 0x0 24. 0x8 24. 0x4 24. " EP24_set/clr ,New DD Request for Endpoint 24" "Not requested,Requested" textline " " setclrfld.long 0x0 23. 0x8 23. 0x4 23. " EP23_set/clr ,New DD Request for Endpoint 23" "Not requested,Requested" setclrfld.long 0x0 22. 0x8 22. 0x4 22. " EP22_set/clr ,New DD Request for Endpoint 22" "Not requested,Requested" textline " " setclrfld.long 0x0 21. 0x8 21. 0x4 21. " EP21_set/clr ,New DD Request for Endpoint 21" "Not requested,Requested" setclrfld.long 0x0 20. 0x8 20. 0x4 20. " EP20_set/clr ,New DD Request for Endpoint 20" "Not requested,Requested" textline " " setclrfld.long 0x0 19. 0x8 19. 0x4 19. " EP19_set/clr ,New DD Request for Endpoint 19" "Not requested,Requested" setclrfld.long 0x0 18. 0x8 18. 0x4 18. " EP18_set/clr ,New DD Request for Endpoint 18" "Not requested,Requested" textline " " setclrfld.long 0x0 17. 0x8 17. 0x4 17. " EP17_set/clr ,New DD Request for Endpoint 17" "Not requested,Requested" setclrfld.long 0x0 16. 0x8 16. 0x4 16. " EP16_set/clr ,New DD Request for Endpoint 16" "Not requested,Requested" textline " " setclrfld.long 0x0 15. 0x8 15. 0x4 15. " EP15_set/clr ,New DD Request for Endpoint 15" "Not requested,Requested" setclrfld.long 0x0 14. 0x8 14. 0x4 14. " EP14_set/clr ,New DD Request for Endpoint 14" "Not requested,Requested" textline " " setclrfld.long 0x0 13. 0x8 13. 0x4 13. " EP13_set/clr ,New DD Request for Endpoint 13" "Not requested,Requested" setclrfld.long 0x0 12. 0x8 12. 0x4 12. " EP12_set/clr ,New DD Request for Endpoint 12" "Not requested,Requested" textline " " setclrfld.long 0x0 11. 0x8 11. 0x4 11. " EP11_set/clr ,New DD Request for Endpoint 11" "Not requested,Requested" setclrfld.long 0x0 10. 0x8 10. 0x4 10. " EP10_set/clr ,New DD Request for Endpoint 10" "Not requested,Requested" textline " " setclrfld.long 0x0 9. 0x8 9. 0x4 9. " EP9_set/clr ,New DD Request for Endpoint 9" "Not requested,Requested" setclrfld.long 0x0 8. 0x8 8. 0x4 8. " EP8_set/clr ,New DD Request for Endpoint 8" "Not requested,Requested" textline " " setclrfld.long 0x0 7. 0x8 7. 0x4 7. " EP7_set/clr ,New DD Request for Endpoint 7" "Not requested,Requested" setclrfld.long 0x0 6. 0x8 6. 0x4 6. " EP6_set/clr ,New DD Request for Endpoint 6" "Not requested,Requested" textline " " setclrfld.long 0x0 5. 0x8 5. 0x4 5. " EP5_set/clr ,New DD Request for Endpoint 5" "Not requested,Requested" setclrfld.long 0x0 4. 0x8 4. 0x4 4. " EP4_set/clr ,New DD Request for Endpoint 4" "Not requested,Requested" textline " " setclrfld.long 0x0 3. 0x8 3. 0x4 3. " EP3_set/clr ,New DD Request for Endpoint 3" "Not requested,Requested" setclrfld.long 0x0 2. 0x8 2. 0x4 2. " EP2_set/clr ,New DD Request for Endpoint 2" "Not requested,Requested" textline " " setclrfld.long 0x0 1. 0x8 1. 0x4 1. " EP1_set/clr ,New DD Request for Endpoint 1" "Not requested,Requested" setclrfld.long 0x0 0. 0x8 0. 0x4 0. " EP0_set/clr ,New DD Request for Endpoint 0" "Not requested,Requested" group.long 0x2B8++0x3 line.long 0x0 "USBSysErrIntSt,USB System Error Interrupt Status Register" setclrfld.long 0x0 31. 0x8 31. 0x4 31. " EP31_set/clr ,System Error Interrupt request for Endpoint 31" "No interrupt,Interrupt" setclrfld.long 0x0 30. 0x8 30. 0x4 30. " EP30_set/clr ,System Error Interrupt request for Endpoint 30" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 29. 0x8 29. 0x4 29. " EP29_set/clr ,System Error Interrupt request for Endpoint 29" "No interrupt,Interrupt" setclrfld.long 0x0 28. 0x8 28. 0x4 28. " EP28_set/clr ,System Error Interrupt request for Endpoint 28" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 27. 0x8 27. 0x4 27. " EP27_set/clr ,System Error Interrupt request for Endpoint 27" "No interrupt,Interrupt" setclrfld.long 0x0 26. 0x8 26. 0x4 26. " EP26_set/clr ,System Error Interrupt request for Endpoint 26" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 25. 0x8 25. 0x4 25. " EP25_set/clr ,System Error Interrupt request for Endpoint 25" "No interrupt,Interrupt" setclrfld.long 0x0 24. 0x8 24. 0x4 24. " EP24_set/clr ,System Error Interrupt request for Endpoint 24" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 23. 0x8 23. 0x4 23. " EP23_set/clr ,System Error Interrupt request for Endpoint 23" "No interrupt,Interrupt" setclrfld.long 0x0 22. 0x8 22. 0x4 22. " EP22_set/clr ,System Error Interrupt request for Endpoint 22" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 21. 0x8 21. 0x4 21. " EP21_set/clr ,System Error Interrupt request for Endpoint 21" "No interrupt,Interrupt" setclrfld.long 0x0 20. 0x8 20. 0x4 20. " EP20_set/clr ,System Error Interrupt request for Endpoint 20" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 19. 0x8 19. 0x4 19. " EP19_set/clr ,System Error Interrupt request for Endpoint 19" "No interrupt,Interrupt" setclrfld.long 0x0 18. 0x8 18. 0x4 18. " EP18_set/clr ,System Error Interrupt request for Endpoint 18" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 17. 0x8 17. 0x4 17. " EP17_set/clr ,System Error Interrupt request for Endpoint 17" "No interrupt,Interrupt" setclrfld.long 0x0 16. 0x8 16. 0x4 16. " EP16_set/clr ,System Error Interrupt request for Endpoint 16" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 15. 0x8 15. 0x4 15. " EP15_set/clr ,System Error Interrupt request for Endpoint 15" "No interrupt,Interrupt" setclrfld.long 0x0 14. 0x8 14. 0x4 14. " EP14_set/clr ,System Error Interrupt request for Endpoint 14" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 13. 0x8 13. 0x4 13. " EP13_set/clr ,System Error Interrupt request for Endpoint 13" "No interrupt,Interrupt" setclrfld.long 0x0 12. 0x8 12. 0x4 12. " EP12_set/clr ,System Error Interrupt request for Endpoint 12" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 11. 0x8 11. 0x4 11. " EP11_set/clr ,System Error Interrupt request for Endpoint 11" "No interrupt,Interrupt" setclrfld.long 0x0 10. 0x8 10. 0x4 10. " EP10_set/clr ,System Error Interrupt request for Endpoint 10" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 9. 0x8 9. 0x4 9. " EP9_set/clr ,System Error Interrupt request for Endpoint 9" "No interrupt,Interrupt" setclrfld.long 0x0 8. 0x8 8. 0x4 8. " EP8_set/clr ,System Error Interrupt request for Endpoint 8" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 7. 0x8 7. 0x4 7. " EP7_set/clr ,System Error Interrupt request for Endpoint 7" "No interrupt,Interrupt" setclrfld.long 0x0 6. 0x8 6. 0x4 6. " EP6_set/clr ,System Error Interrupt request for Endpoint 6" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 5. 0x8 5. 0x4 5. " EP5_set/clr ,System Error Interrupt request for Endpoint 5" "No interrupt,Interrupt" setclrfld.long 0x0 4. 0x8 4. 0x4 4. " EP4_set/clr ,System Error Interrupt request for Endpoint 4" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 3. 0x8 3. 0x4 3. " EP3_set/clr ,System Error Interrupt request for Endpoint 3" "No interrupt,Interrupt" setclrfld.long 0x0 2. 0x8 2. 0x4 2. " EP2_set/clr ,System Error Interrupt request for Endpoint 2" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 1. 0x8 1. 0x4 1. " EP1_set/clr ,System Error Interrupt request for Endpoint 1" "No interrupt,Interrupt" setclrfld.long 0x0 0. 0x8 0. 0x4 0. " EP0_set/clr ,System Error Interrupt request for Endpoint 0" "No interrupt,Interrupt" tree.end width 0x0B tree.end endif sif (cpu()=="LPC1754"||cpu()=="LPC1756"||cpu()=="LPC1758"||cpu()=="LPC1759"||cpu()=="LPC1765"||cpu()=="LPC1766"||cpu()=="LPC1768"||cpu()=="LPC1769") tree "USB Host (Universal Serial Bus)" base ad:0x5000C000 width 22. rgroup.long 0x00++0x3 line.long 0x0 "HcRevision,BCD Representation Of The Version Of The HCI Specification Register" hexmask.long.byte 0x0 0.--7. 1. " REV ,BCD Representation Of The Version Of The HCI Specification" group.long 0x04++0x3 line.long 0x0 "HcControl,HC Operating Modes Register" bitfld.long 0x0 10. " RWE ,Remote Wakeup Enable" "Disabled,Enabled" bitfld.long 0x0 9. " RWC ,Remote Wakeup Connected" "Not connected,Connected" bitfld.long 0x0 8. " IR ,Interrupt Routing" "Normal host bus,System Management" textline " " bitfld.long 0x0 6.--7. " HCFS ,Host Controller Functional State for USB" "Reset,Resume,Operational,Suspend" bitfld.long 0x0 5. " BLE ,Bulk List Enable" "Disabled,Enabled" bitfld.long 0x0 4. " CLE ,Control List Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 3. " IE ,Isochronous Enable" "Disabled,Enabled" bitfld.long 0x0 2. " PLE ,Periodic List Enable" "Disabled,Enabled" bitfld.long 0x0 0.--1. " CBSR ,Control Bulk Service Ratio" "1:1,2:1,3:1,4:1" group.long 0x08++0x3 line.long 0x0 "HcCommandStatus,HC Status Register" bitfld.long 0x0 16.--17. " SOC ,Scheduling Overrun Count" "0,1,2,3" bitfld.long 0x0 3. " OCR ,Ownership Change Request" "Not requested,Requested" bitfld.long 0x0 2. " BLF ,Bulk List Filled" "Not filled,Filled" textline " " bitfld.long 0x0 1. " CLF ,Control List Filled" "Not filled,Filled" bitfld.long 0x0 0. " HCR ,Host Controller Reset" "No effect,Reset" group.long 0x0c++0x3 line.long 0x0 "HcInterruptStatus,HC Interrupt Status Register" bitfld.long 0x0 30. " OC ,Ownership Change" "No interrupt,Interrupt" bitfld.long 0x0 6. " RHSC ,Root Hub Status Change" "No interrupt,Interrupt" bitfld.long 0x0 5. " FNO ,Frame Number Overflow" "No interrupt,Interrupt" textline " " bitfld.long 0x0 4. " UE ,Unrecoverable Error" "No interrupt,Interrupt" bitfld.long 0x0 3. " RD ,Resume Detected" "No interrupt,Interrupt" bitfld.long 0x0 2. " SF ,Start of Frame" "No interrupt,Interrupt" textline " " bitfld.long 0x0 1. " WDH ,Writeback Done Head" "No interrupt,Interrupt" bitfld.long 0x0 0. " SO ,Scheduling Overrun" "No interrupt,Interrupt" group.long 0x10++0x3 line.long 0x0 "HcInterruptEn/Dis,HC Interrupt Enable/Disable Register" setclrfld.long 0x0 31. 0x0 31. 0x4 31. " MIE_set/clr ,Master Interrupt Enable" "Disabled,Enabled" setclrfld.long 0x0 30. 0x0 30. 0x4 30. " OCMIE_set/clr ,Ownership Change" "Disabled,Enabled" textline " " setclrfld.long 0x0 6. 0x0 6. 0x4 6. " RHSCMIE_set/clr ,Root Hub Status Change" "Disabled,Enabled" setclrfld.long 0x0 5. 0x0 5. 0x4 5. " FNOMIE_set/clr ,Frame Number Overflow" "Disabled,Enabled" textline " " setclrfld.long 0x0 4. 0x0 4. 0x4 4. " UEMIE_set/clr ,Unrecoverable Error" "Disabled,Enabled" setclrfld.long 0x0 3. 0x0 3. 0x4 3. " RDMIE_set/clr ,Resume Detected" "Disabled,Enabled" textline " " setclrfld.long 0x0 2. 0x0 2. 0x4 2. " SFMIE_set/clr ,Start of Frame" "Disabled,Enabled" setclrfld.long 0x0 1. 0x0 1. 0x4 1. " WDHMIE_set/clr ,Writeback Done Head" "Disabled,Enabled" textline " " setclrfld.long 0x0 0. 0x0 0. 0x4 0. " SOMIE_set/clr ,Scheduling Overrun" "Disabled,Enabled" group.long 0x18++0x3 line.long 0x00 "HcHCCA,Host Controller Communication Area Physical Address Register" hexmask.long 0x00 8.--31. 0x100 " HCCA ,Host Controller Communication Area Base Address" rgroup.long 0x1C++0x3 line.long 0x0 "HcPeriodCurrentED,Current Isochronous Or Interrupt Endpoint Physical Address Register" hexmask.long 0x0 4.--31. 0x10 " PCED ,Period Current ED" group.long 0x20++0x3 line.long 0x0 "HcControlHeadED,First Endpoint Of The Control List Physical Address Register" hexmask.long 0x0 4.--31. 0x10 " CHED ,Control Head ED" group.long 0x24++0x3 line.long 0x0 "HcControlCurrentED,Current Endpoint Of The Control List Physical Address Register" hexmask.long 0x0 4.--31. 0x10 " CCED ,Control Current ED" group.long 0x28++0x3 line.long 0x0 "HcBulkHeadED,First Endpoint Of The Bulk List Physical Address Register" hexmask.long 0x0 4.--31. 0x10 " BHED ,Bulk Head ED" group.long 0x2c++0x3 line.long 0x0 "HcBulkCurrentED,Current Endpoint Of The Bulk List Physical Address Register" hexmask.long 0x0 4.--31. 0x10 " BCED ,Bulk Current ED" rgroup.long 0x30++0x3 line.long 0x0 "HcDoneHead,Last Transfer Descriptor Added Physical Address Register" hexmask.long 0x0 4.--31. 0x10 " DH ,Done Head" group.long 0x34++0x3 line.long 0x0 "HcFmInterval,HC Frame Interval Register" bitfld.long 0x0 31. " FIT ,Frame Interval Toggle" "Not toggled,Toggled" hexmask.long.word 0x0 16.--30. 1. " FSMPS ,FS Largest Data Packet" hexmask.long.word 0x0 0.--13. 1. " FI ,Frame Interval" rgroup.long 0x38++0x3 line.long 0x0 "HcFmRemaining,HC Frame Remaining Register" bitfld.long 0x0 31. " FRT ,Frame Remaining Toggle" "Not toggled,Toggled" hexmask.long.word 0x0 0.--13. 1. " FR ,Frame Remaining" rgroup.long 0x3c++0x3 line.long 0x0 "HcFmNumber,HC Frame Number Register" hexmask.long.word 0x0 0.--15. 1. " FN ,Frame Number" group.long 0x40++0x3 line.long 0x0 "HcPeriodicStart,HC Periodic Start Register" hexmask.long.word 0x0 0.--13. 1. " PS ,Periodic Start" group.long 0x44++0x3 line.long 0x0 "HcLSThreshold,HC LS Threshold Register" hexmask.long.word 0x0 0.--11. 1. " LST ,LS Threshold" group.long 0x48++0x3 line.long 0x0 "HcRhDescriptorA,HC Root Hub Descriptor A Register" hexmask.long.byte 0x0 24.--31. 1. " POTPGT ,Power On To Power Good Time" bitfld.long 0x0 12. " NOCP ,No Over Current Protection" "Protection,No protection" bitfld.long 0x0 11. " OCPM ,Over Current Protection Mode" "Collectively,Per-port basis" textline " " bitfld.long 0x0 10. " DT ,Device Type" "Not compound,Compound" bitfld.long 0x0 9. " PSM ,Power Switching Mode" "Global,Individual" bitfld.long 0x0 8. " NPS ,No Power Switching" "Switched,Not switched" textline " " hexmask.long.byte 0x0 0.--7. 1. " NDP ,Number Downstream Ports" group.long 0x4c++0x3 line.long 0x0 "HcRhDescriptorB,HC Root Hub Descriptor B Register" hexmask.long.word 0x0 16.--31. 1. " PPCM ,Port Power Control Mask" hexmask.long.word 0x0 0.--15. 1. " DR ,Device Removable" group.long 0x50++0x3 line.long 0x0 "HcRhStatus,HC Root Hub Status Register" bitfld.long 0x0 31. " CRWE ,Clear Remote Wakeup Enable" "No effect,Cleared" eventfld.long 0x0 17. " OCIC ,Over Current Indicator Change" "Not occurred,Occurred" textline " " bitfld.long 0x0 16. " LPSC ,Local Power Status Change/Set Global Power (read/write)" "Not supported/No effect,Not supported/Turn power on" bitfld.long 0x0 15. " DRWE ,Device Remote Wakeup Enable/Set Remote Wakeup Enable (read/write)" "No wakeup/No effect,Wakeup/Set" textline " " bitfld.long 0x0 1. " OCI ,OverCurrent Indicator" "No overcurrent,Overcurrent" bitfld.long 0x0 0. " LPS ,Local Power Status/Clear Global Power (read/write)" "Not supported/No effect,Not supported/Turn power off" group.long 0x54++0x3 line.long 0x0 "HcRhPortStatus[1],HC Root Hub Port Status 1 Register" eventfld.long 0x0 20. " PRSC ,Port Reset Status Change" "Not changed,Changed" eventfld.long 0x0 19. " OCIC ,Port Over Current Indicator Change" "Not changed,Changed" textline " " eventfld.long 0x0 18. " PSSC ,Port Suspend Status Change" "Not changed,Changed" eventfld.long 0x0 17. " PESC ,Port Enable Status Change" "Not changed,Changed" textline " " eventfld.long 0x0 16. " CSC ,Connect Status Change" "Not changed,Changed" bitfld.long 0x0 9. " LSDA ,Low Speed Device Attached/Clear Port Power (read/write)" "Full speed/No effect,Low speed/Clear" textline " " bitfld.long 0x0 8. " PPS ,Port Power Status/Set Port Power (read/write)" "Off/No effect,On/Set" bitfld.long 0x0 4. " PRS ,Port Reset Status/Set Port Reset (read/write)" "Inactive/No effect,Active/Set" textline " " bitfld.long 0x0 3. " POCI ,Port Over Current Indicator/Clear Suspend Status (read/write)" "No overcurrent/No effect,Overcurrent/Clear" bitfld.long 0x0 2. " PSS ,Port Suspend Status/Set Port Suspend (read/write)" "Not suspended/No effect,Suspended/Set" textline " " bitfld.long 0x0 1. " PES ,Port Enable Status/Set Port Enable (read/write)" "Disabled/No effect,Enabled/Set" bitfld.long 0x0 0. " CCS ,Current Connect Status/Clear Port Enable (read/write)" "Not connected/No effect,Connected/Clear" group.long 0x58++0x3 line.long 0x0 "HcRhPortStatus[2],HC Root Hub Port Status 2 Register" eventfld.long 0x0 20. " PRSC ,Port Reset Status Change" "Not changed,Changed" eventfld.long 0x0 19. " OCIC ,Port Over Current Indicator Change" "Not changed,Changed" textline " " eventfld.long 0x0 18. " PSSC ,Port Suspend Status Change" "Not changed,Changed" eventfld.long 0x0 17. " PESC ,Port Enable Status Change" "Not changed,Changed" textline " " eventfld.long 0x0 16. " CSC ,Connect Status Change" "Not changed,Changed" bitfld.long 0x0 9. " LSDA ,Low Speed Device Attached/Clear Port Power (read/write)" "Full speed/No effect,Low speed/Clear" textline " " bitfld.long 0x0 8. " PPS ,Port Power Status/Set Port Power (read/write)" "Off/No effect,On/Set" bitfld.long 0x0 4. " PRS ,Port Reset Status/Set Port Reset (read/write)" "Inactive/No effect,Active/Set" textline " " bitfld.long 0x0 3. " POCI ,Port Over Current Indicator/Clear Suspend Status (read/write)" "No overcurrent/No effect,Overcurrent/Clear" bitfld.long 0x0 2. " PSS ,Port Suspend Status/Set Port Suspend (read/write)" "Not suspended/No effect,Suspended/Set" textline " " bitfld.long 0x0 1. " PES ,Port Enable Status/Set Port Enable (read/write)" "Disabled/No effect,Enabled/Set" bitfld.long 0x0 0. " CCS ,Current Connect Status/Clear Port Enable (read/write)" "Not connected/No effect,Connected/Clear" rgroup.long 0xFC++0x3 line.long 0x0 "Module_ID/Ver_Rev_ID,Module Version And Reversion ID Register" width 0x0B tree.end tree "USB OTG (Universal Serial Bus On-The-Go)" base ad:0x5000C000 width 17. group.long 0x1C0++0x3 "Interrupt Register" line.long 0x00 "USBIntSt,USB Interrupt Status Register" bitfld.long 0x00 31. " EN_USB_INTS ,Enable USB Interrupts" "Disabled,Enabled" bitfld.long 0x00 8. " USB_NEED_CLK ,USB Need Clock Indicator" "Not needed,Needed" textline " " bitfld.long 0x00 6. " USB_I2C_INT ,I2C module interrupt line status" "Not requested,Requested" bitfld.long 0x00 5. " USB_OTG_INT ,OTG interrupt line status" "Not requested,Requested" textline " " bitfld.long 0x00 4. " USB_ATX_INT ,External ATX interrupt line status" "Not requested,Requested" bitfld.long 0x00 3. " USB_HOST_INT ,USB host interrupt line status" "Not requested,Requested" textline " " bitfld.long 0x00 2. " USB_INT_REQ_DMA ,DMA Interrupt Line Status" "Not requested,Requested" bitfld.long 0x00 1. " USB_INT_REQ_HP ,High Priority Interrupt Line Status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " USB_INT_REQ_LP ,Low Priority Interrupt Line Status" "Not requested,Requested" width 0xB group.long 0x100++0x7 "OTG Registers" line.long 0x00 "OTGIntSt,OTG Interrupt Status" setclrfld.long 0x00 3. 0x08 3. 0x0C 3. " HNP_SUCCESS ,HNP succeeded" "Not succeeded,Succeeded" setclrfld.long 0x00 2. 0x08 2. 0x0C 2. " HNP_FAILURE ,HNP failed" "Not failed,Failed" textline " " setclrfld.long 0x00 1. 0x08 1. 0x0C 1. " REMOVE_PU ,Remove Pull-up" "Not removed,Removed" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TMR ,Timer time-out" "No time-out,Time-out" line.long 0x04 "OTGIntEn,OTG Interrupt Enable" bitfld.long 0x04 3. " HNP_SUCCESS_ENA ,HNP succeeded Interrupt Enable" "Disabled,Enabled" bitfld.long 0x04 2. " HNP_FAILURE_ENA ,HNP failed Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " REMOVE_PU_ENA ,Remove Pull-up Interrupt Enable" "Disabled,Enabled" bitfld.long 0x04 0. " TMR_ENA ,Timer time-out Interrupt Enable" "Disabled,Enabled" group.long 0x110++0x7 line.long 0x00 "OTGStCtrl,OTG Status and Control" hexmask.long.word 0x00 16.--31. 1. " TMR_CNT ,Current timer count value" bitfld.long 0x00 10. " PU_REMOVED ,D+ pull-up removed" "Not removed,Removed" textline " " bitfld.long 0x00 9. " A_HNP_TRACK ,HNP tracking for A-device (host)" "Disabled,Enabled" bitfld.long 0x00 8. " B_HNP_TRACK ,HNP tracking for B-device (peripheral)" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " TMR_RST ,Timer reset" "No reset,Reset" bitfld.long 0x00 5. " TMR_EN ,Timer enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " TMR_MODE ,Timer mode selection" "Monoshot,Free running" bitfld.long 0x00 2.--3. " TMR_SCALE ,Timer scale selection" "10us(100KHz),100us(10KHz),1000us(1KHz),?..." textline " " sif (cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778"||cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788") bitfld.long 0x00 0.--1. " PORT_FUNC ,Controls the function of ports U1 and U2" "device(OTG)/host,host(OTG)/host,Reserved,host/device" else bitfld.long 0x00 0.--1. " PORT_FUNC ,Controls the function of ports U1 and U2" "00,01,10,11" endif line.long 0x04 "OTGTmr,OTG Timer" hexmask.long.word 0x04 0.--15. 1. " TIMEOUT_CNT ,Time-out value" width 0xC group.long 0xFF4++0x3 "Clock Control Registers" line.long 0x00 "OTGClkCtrl,OTG clock controller" bitfld.long 0x00 4. " AHB_CLK_EN ,AHB master clock enable" "Disabled,Enabled" bitfld.long 0x00 3. " OTG_CLK_EN ,OTG clock enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " I2C_CLK_EN ,I2C clock enable" "Disabled,Enabled" bitfld.long 0x00 1. " DEV_CLK_EN ,Device clock enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " HOST_CLK_EN ,Host clock enable" "Disabled,Enabled" rgroup.long 0xFF8++0x3 line.long 0x00 "OTGClkSt,OTG clock status" bitfld.long 0x00 4. " AHB_CLK_ON ,AHB master clock status" "Not available,Available" bitfld.long 0x00 3. " OTG_CLK_ON ,OTG clock status" "Not available,Available" textline " " bitfld.long 0x00 2. " I2C_CLK_ON ,I2C clock status" "Not available,Available" bitfld.long 0x00 1. " DEV_CLK_ON ,Device clock status" "Not available,Available" textline " " bitfld.long 0x00 0. " HOST_CLK_ON ,Host clock status" "Not available,Available" width 0xB hgroup.byte 0x300++0x0 "I2C Registers" hide.byte 0x00 "I2C_RX,I2C Receive" in wgroup.long 0x300++0x3 line.long 0x00 "I2C_TX,I2C Transmit" bitfld.long 0x00 9. " STOP ,Issue STOP condition after transmitting byte" "Not issue,Issue" bitfld.long 0x00 8. " START ,Issue START condition before transmitting byte" "Not issue,Issue" textline " " hexmask.long.byte 0x00 0.--7. 1. " TX_Data ,Transmit data" group.long 0x304++0x3 line.long 0x00 "I2C_STS,I2C Status" bitfld.long 0x00 11. " TFE ,Trasmit FIFO Empty" "Not empty,Empty" bitfld.long 0x00 10. " TFF ,Transmit FIFO Full" "Not full,Full" textline " " bitfld.long 0x00 9. " RFE ,Receive FIFO Empty" "Not empty,Empty" bitfld.long 0x00 8. " RFF ,Receive FIFO Full" "Not full,Full" textline " " bitfld.long 0x00 7. " SDA ,Current Value of SDA signal" "Low,High" bitfld.long 0x00 6. " SCL ,Current Value of SCL signal" "Low,High" textline " " bitfld.long 0x00 5. " Active ,Indicates whether the bus is busy" "Not busy,Busy" bitfld.long 0x00 4. " DRSI ,Slave Data Request Interrupt" "Not requested,Requested" textline " " bitfld.long 0x00 3. " DRMI ,Master Data Request Interrupt" "Not requested,Requested" bitfld.long 0x00 2. " NAI ,No Acknowledge Interrupt" "Received,Not received" textline " " eventfld.long 0x00 1. " AFI ,Arbitration Failure Interrupt" "No failure,Failure" eventfld.long 0x00 0. " TDI ,Transaction Done Interrupt" "Not completed,Completed" group.long 0x308++0x3 line.long 0x00 "I2C_CTL,I2C Control" bitfld.long 0x00 8. " SRST ,Soft reset" "No reset,Reset" bitfld.long 0x00 7. " TFFIE ,Transmit FIFO Not Full Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " RFDAIE ,Receive Data Available Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " REFIE ,Receive FIFO Full Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " DRSIE ,Slave Transmitter Data Request Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " DRMIE ,Master Transmitter Data Request Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " NAIE ,Transmitter No Acknowledge Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " AFIE ,Transmitter Arbitration Failure Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " TDIE ,Transmit Done Interrupt Enable" "Disabled,Enabled" group.byte 0x30C++0x0 line.byte 0x00 "I2C_CLKHI,I2C Clock High" hexmask.byte 0x00 0.--7. 1. " CDHI ,Clock divisor high" wgroup.byte 0x310++0x0 line.byte 0x00 "I2C_CLKLO,I2C Clock Low" hexmask.byte 0x00 0.--7. 1. " CDLO ,Clock divisor low" width 0xB tree.end elif (cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778"||cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788") tree "USB Host (Universal Serial Bus)" base ad:0x2008C000 width 22. rgroup.long 0x00++0x3 line.long 0x0 "HcRevision,BCD Representation Of The Version Of The HCI Specification Register" hexmask.long.byte 0x0 0.--7. 1. " REV ,BCD Representation Of The Version Of The HCI Specification" group.long 0x04++0x3 line.long 0x0 "HcControl,HC Operating Modes Register" bitfld.long 0x0 10. " RWE ,Remote Wakeup Enable" "Disabled,Enabled" bitfld.long 0x0 9. " RWC ,Remote Wakeup Connected" "Not connected,Connected" bitfld.long 0x0 8. " IR ,Interrupt Routing" "Normal host bus,System Management" textline " " bitfld.long 0x0 6.--7. " HCFS ,Host Controller Functional State for USB" "Reset,Resume,Operational,Suspend" bitfld.long 0x0 5. " BLE ,Bulk List Enable" "Disabled,Enabled" bitfld.long 0x0 4. " CLE ,Control List Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 3. " IE ,Isochronous Enable" "Disabled,Enabled" bitfld.long 0x0 2. " PLE ,Periodic List Enable" "Disabled,Enabled" bitfld.long 0x0 0.--1. " CBSR ,Control Bulk Service Ratio" "1:1,2:1,3:1,4:1" group.long 0x08++0x3 line.long 0x0 "HcCommandStatus,HC Status Register" bitfld.long 0x0 16.--17. " SOC ,Scheduling Overrun Count" "0,1,2,3" bitfld.long 0x0 3. " OCR ,Ownership Change Request" "Not requested,Requested" bitfld.long 0x0 2. " BLF ,Bulk List Filled" "Not filled,Filled" textline " " bitfld.long 0x0 1. " CLF ,Control List Filled" "Not filled,Filled" bitfld.long 0x0 0. " HCR ,Host Controller Reset" "No effect,Reset" group.long 0x0c++0x3 line.long 0x0 "HcInterruptStatus,HC Interrupt Status Register" bitfld.long 0x0 30. " OC ,Ownership Change" "No interrupt,Interrupt" bitfld.long 0x0 6. " RHSC ,Root Hub Status Change" "No interrupt,Interrupt" bitfld.long 0x0 5. " FNO ,Frame Number Overflow" "No interrupt,Interrupt" textline " " bitfld.long 0x0 4. " UE ,Unrecoverable Error" "No interrupt,Interrupt" bitfld.long 0x0 3. " RD ,Resume Detected" "No interrupt,Interrupt" bitfld.long 0x0 2. " SF ,Start of Frame" "No interrupt,Interrupt" textline " " bitfld.long 0x0 1. " WDH ,Writeback Done Head" "No interrupt,Interrupt" bitfld.long 0x0 0. " SO ,Scheduling Overrun" "No interrupt,Interrupt" group.long 0x10++0x3 line.long 0x0 "HcInterruptEn/Dis,HC Interrupt Enable/Disable Register" setclrfld.long 0x0 31. 0x0 31. 0x4 31. " MIE_set/clr ,Master Interrupt Enable" "Disabled,Enabled" setclrfld.long 0x0 30. 0x0 30. 0x4 30. " OCMIE_set/clr ,Ownership Change" "Disabled,Enabled" textline " " setclrfld.long 0x0 6. 0x0 6. 0x4 6. " RHSCMIE_set/clr ,Root Hub Status Change" "Disabled,Enabled" setclrfld.long 0x0 5. 0x0 5. 0x4 5. " FNOMIE_set/clr ,Frame Number Overflow" "Disabled,Enabled" textline " " setclrfld.long 0x0 4. 0x0 4. 0x4 4. " UEMIE_set/clr ,Unrecoverable Error" "Disabled,Enabled" setclrfld.long 0x0 3. 0x0 3. 0x4 3. " RDMIE_set/clr ,Resume Detected" "Disabled,Enabled" textline " " setclrfld.long 0x0 2. 0x0 2. 0x4 2. " SFMIE_set/clr ,Start of Frame" "Disabled,Enabled" setclrfld.long 0x0 1. 0x0 1. 0x4 1. " WDHMIE_set/clr ,Writeback Done Head" "Disabled,Enabled" textline " " setclrfld.long 0x0 0. 0x0 0. 0x4 0. " SOMIE_set/clr ,Scheduling Overrun" "Disabled,Enabled" group.long 0x18++0x3 line.long 0x00 "HcHCCA,Host Controller Communication Area Physical Address Register" hexmask.long 0x00 8.--31. 0x100 " HCCA ,Host Controller Communication Area Base Address" rgroup.long 0x1C++0x3 line.long 0x0 "HcPeriodCurrentED,Current Isochronous Or Interrupt Endpoint Physical Address Register" hexmask.long 0x0 4.--31. 0x10 " PCED ,Period Current ED" group.long 0x20++0x3 line.long 0x0 "HcControlHeadED,First Endpoint Of The Control List Physical Address Register" hexmask.long 0x0 4.--31. 0x10 " CHED ,Control Head ED" group.long 0x24++0x3 line.long 0x0 "HcControlCurrentED,Current Endpoint Of The Control List Physical Address Register" hexmask.long 0x0 4.--31. 0x10 " CCED ,Control Current ED" group.long 0x28++0x3 line.long 0x0 "HcBulkHeadED,First Endpoint Of The Bulk List Physical Address Register" hexmask.long 0x0 4.--31. 0x10 " BHED ,Bulk Head ED" group.long 0x2c++0x3 line.long 0x0 "HcBulkCurrentED,Current Endpoint Of The Bulk List Physical Address Register" hexmask.long 0x0 4.--31. 0x10 " BCED ,Bulk Current ED" rgroup.long 0x30++0x3 line.long 0x0 "HcDoneHead,Last Transfer Descriptor Added Physical Address Register" hexmask.long 0x0 4.--31. 0x10 " DH ,Done Head" group.long 0x34++0x3 line.long 0x0 "HcFmInterval,HC Frame Interval Register" bitfld.long 0x0 31. " FIT ,Frame Interval Toggle" "Not toggled,Toggled" hexmask.long.word 0x0 16.--30. 1. " FSMPS ,FS Largest Data Packet" hexmask.long.word 0x0 0.--13. 1. " FI ,Frame Interval" rgroup.long 0x38++0x3 line.long 0x0 "HcFmRemaining,HC Frame Remaining Register" bitfld.long 0x0 31. " FRT ,Frame Remaining Toggle" "Not toggled,Toggled" hexmask.long.word 0x0 0.--13. 1. " FR ,Frame Remaining" rgroup.long 0x3c++0x3 line.long 0x0 "HcFmNumber,HC Frame Number Register" hexmask.long.word 0x0 0.--15. 1. " FN ,Frame Number" group.long 0x40++0x3 line.long 0x0 "HcPeriodicStart,HC Periodic Start Register" hexmask.long.word 0x0 0.--13. 1. " PS ,Periodic Start" group.long 0x44++0x3 line.long 0x0 "HcLSThreshold,HC LS Threshold Register" hexmask.long.word 0x0 0.--11. 1. " LST ,LS Threshold" group.long 0x48++0x3 line.long 0x0 "HcRhDescriptorA,HC Root Hub Descriptor A Register" hexmask.long.byte 0x0 24.--31. 1. " POTPGT ,Power On To Power Good Time" bitfld.long 0x0 12. " NOCP ,No Over Current Protection" "Protection,No protection" bitfld.long 0x0 11. " OCPM ,Over Current Protection Mode" "Collectively,Per-port basis" textline " " bitfld.long 0x0 10. " DT ,Device Type" "Not compound,Compound" bitfld.long 0x0 9. " PSM ,Power Switching Mode" "Global,Individual" bitfld.long 0x0 8. " NPS ,No Power Switching" "Switched,Not switched" textline " " hexmask.long.byte 0x0 0.--7. 1. " NDP ,Number Downstream Ports" group.long 0x4c++0x3 line.long 0x0 "HcRhDescriptorB,HC Root Hub Descriptor B Register" hexmask.long.word 0x0 16.--31. 1. " PPCM ,Port Power Control Mask" hexmask.long.word 0x0 0.--15. 1. " DR ,Device Removable" group.long 0x50++0x3 line.long 0x0 "HcRhStatus,HC Root Hub Status Register" bitfld.long 0x0 31. " CRWE ,Clear Remote Wakeup Enable" "No effect,Cleared" eventfld.long 0x0 17. " OCIC ,Over Current Indicator Change" "Not occurred,Occurred" textline " " bitfld.long 0x0 16. " LPSC ,Local Power Status Change/Set Global Power (read/write)" "Not supported/No effect,Not supported/Turn power on" bitfld.long 0x0 15. " DRWE ,Device Remote Wakeup Enable/Set Remote Wakeup Enable (read/write)" "No wakeup/No effect,Wakeup/Set" textline " " bitfld.long 0x0 1. " OCI ,OverCurrent Indicator" "No overcurrent,Overcurrent" bitfld.long 0x0 0. " LPS ,Local Power Status/Clear Global Power (read/write)" "Not supported/No effect,Not supported/Turn power off" group.long 0x54++0x3 line.long 0x0 "HcRhPortStatus[1],HC Root Hub Port Status 1 Register" eventfld.long 0x0 20. " PRSC ,Port Reset Status Change" "Not changed,Changed" eventfld.long 0x0 19. " OCIC ,Port Over Current Indicator Change" "Not changed,Changed" textline " " eventfld.long 0x0 18. " PSSC ,Port Suspend Status Change" "Not changed,Changed" eventfld.long 0x0 17. " PESC ,Port Enable Status Change" "Not changed,Changed" textline " " eventfld.long 0x0 16. " CSC ,Connect Status Change" "Not changed,Changed" bitfld.long 0x0 9. " LSDA ,Low Speed Device Attached/Clear Port Power (read/write)" "Full speed/No effect,Low speed/Clear" textline " " bitfld.long 0x0 8. " PPS ,Port Power Status/Set Port Power (read/write)" "Off/No effect,On/Set" bitfld.long 0x0 4. " PRS ,Port Reset Status/Set Port Reset (read/write)" "Inactive/No effect,Active/Set" textline " " bitfld.long 0x0 3. " POCI ,Port Over Current Indicator/Clear Suspend Status (read/write)" "No overcurrent/No effect,Overcurrent/Clear" bitfld.long 0x0 2. " PSS ,Port Suspend Status/Set Port Suspend (read/write)" "Not suspended/No effect,Suspended/Set" textline " " bitfld.long 0x0 1. " PES ,Port Enable Status/Set Port Enable (read/write)" "Disabled/No effect,Enabled/Set" bitfld.long 0x0 0. " CCS ,Current Connect Status/Clear Port Enable (read/write)" "Not connected/No effect,Connected/Clear" group.long 0x58++0x3 line.long 0x0 "HcRhPortStatus[2],HC Root Hub Port Status 2 Register" eventfld.long 0x0 20. " PRSC ,Port Reset Status Change" "Not changed,Changed" eventfld.long 0x0 19. " OCIC ,Port Over Current Indicator Change" "Not changed,Changed" textline " " eventfld.long 0x0 18. " PSSC ,Port Suspend Status Change" "Not changed,Changed" eventfld.long 0x0 17. " PESC ,Port Enable Status Change" "Not changed,Changed" textline " " eventfld.long 0x0 16. " CSC ,Connect Status Change" "Not changed,Changed" bitfld.long 0x0 9. " LSDA ,Low Speed Device Attached/Clear Port Power (read/write)" "Full speed/No effect,Low speed/Clear" textline " " bitfld.long 0x0 8. " PPS ,Port Power Status/Set Port Power (read/write)" "Off/No effect,On/Set" bitfld.long 0x0 4. " PRS ,Port Reset Status/Set Port Reset (read/write)" "Inactive/No effect,Active/Set" textline " " bitfld.long 0x0 3. " POCI ,Port Over Current Indicator/Clear Suspend Status (read/write)" "No overcurrent/No effect,Overcurrent/Clear" bitfld.long 0x0 2. " PSS ,Port Suspend Status/Set Port Suspend (read/write)" "Not suspended/No effect,Suspended/Set" textline " " bitfld.long 0x0 1. " PES ,Port Enable Status/Set Port Enable (read/write)" "Disabled/No effect,Enabled/Set" bitfld.long 0x0 0. " CCS ,Current Connect Status/Clear Port Enable (read/write)" "Not connected/No effect,Connected/Clear" rgroup.long 0xFC++0x3 line.long 0x0 "Module_ID/Ver_Rev_ID,Module Version And Reversion ID Register" width 0x0B tree.end tree "USB OTG (Universal Serial Bus On-The-Go)" base ad:0x2008C000 width 17. group.long 0x1C0++0x3 "Interrupt Register" line.long 0x00 "USBIntSt,USB Interrupt Status Register" bitfld.long 0x00 31. " EN_USB_INTS ,Enable USB Interrupts" "Disabled,Enabled" bitfld.long 0x00 8. " USB_NEED_CLK ,USB Need Clock Indicator" "Not needed,Needed" textline " " bitfld.long 0x00 6. " USB_I2C_INT ,I2C module interrupt line status" "Not requested,Requested" bitfld.long 0x00 5. " USB_OTG_INT ,OTG interrupt line status" "Not requested,Requested" textline " " bitfld.long 0x00 4. " USB_ATX_INT ,External ATX interrupt line status" "Not requested,Requested" bitfld.long 0x00 3. " USB_HOST_INT ,USB host interrupt line status" "Not requested,Requested" textline " " bitfld.long 0x00 2. " USB_INT_REQ_DMA ,DMA Interrupt Line Status" "Not requested,Requested" bitfld.long 0x00 1. " USB_INT_REQ_HP ,High Priority Interrupt Line Status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " USB_INT_REQ_LP ,Low Priority Interrupt Line Status" "Not requested,Requested" width 0xB group.long 0x100++0x7 "OTG Registers" line.long 0x00 "OTGIntSt,OTG Interrupt Status" setclrfld.long 0x00 3. 0x08 3. 0x0C 3. " HNP_SUCCESS ,HNP succeeded" "Not succeeded,Succeeded" setclrfld.long 0x00 2. 0x08 2. 0x0C 2. " HNP_FAILURE ,HNP failed" "Not failed,Failed" textline " " setclrfld.long 0x00 1. 0x08 1. 0x0C 1. " REMOVE_PU ,Remove Pull-up" "Not removed,Removed" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TMR ,Timer time-out" "No time-out,Time-out" line.long 0x04 "OTGIntEn,OTG Interrupt Enable" bitfld.long 0x04 3. " HNP_SUCCESS_ENA ,HNP succeeded Interrupt Enable" "Disabled,Enabled" bitfld.long 0x04 2. " HNP_FAILURE_ENA ,HNP failed Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " REMOVE_PU_ENA ,Remove Pull-up Interrupt Enable" "Disabled,Enabled" bitfld.long 0x04 0. " TMR_ENA ,Timer time-out Interrupt Enable" "Disabled,Enabled" group.long 0x110++0x7 line.long 0x00 "OTGStCtrl,OTG Status and Control" hexmask.long.word 0x00 16.--31. 1. " TMR_CNT ,Current timer count value" bitfld.long 0x00 10. " PU_REMOVED ,D+ pull-up removed" "Not removed,Removed" textline " " bitfld.long 0x00 9. " A_HNP_TRACK ,HNP tracking for A-device (host)" "Disabled,Enabled" bitfld.long 0x00 8. " B_HNP_TRACK ,HNP tracking for B-device (peripheral)" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " TMR_RST ,Timer reset" "No reset,Reset" bitfld.long 0x00 5. " TMR_EN ,Timer enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " TMR_MODE ,Timer mode selection" "Monoshot,Free running" bitfld.long 0x00 2.--3. " TMR_SCALE ,Timer scale selection" "10us(100KHz),100us(10KHz),1000us(1KHz),?..." textline " " sif (cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778"||cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788") bitfld.long 0x00 0.--1. " PORT_FUNC ,Controls the function of ports U1 and U2" "device(OTG)/host,host(OTG)/host,Reserved,host/device" else bitfld.long 0x00 0.--1. " PORT_FUNC ,Controls the function of ports U1 and U2" "00,01,10,11" endif line.long 0x04 "OTGTmr,OTG Timer" hexmask.long.word 0x04 0.--15. 1. " TIMEOUT_CNT ,Time-out value" width 0xC group.long 0xFF4++0x3 "Clock Control Registers" line.long 0x00 "OTGClkCtrl,OTG clock controller" bitfld.long 0x00 4. " AHB_CLK_EN ,AHB master clock enable" "Disabled,Enabled" bitfld.long 0x00 3. " OTG_CLK_EN ,OTG clock enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " I2C_CLK_EN ,I2C clock enable" "Disabled,Enabled" bitfld.long 0x00 1. " DEV_CLK_EN ,Device clock enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " HOST_CLK_EN ,Host clock enable" "Disabled,Enabled" rgroup.long 0xFF8++0x3 line.long 0x00 "OTGClkSt,OTG clock status" bitfld.long 0x00 4. " AHB_CLK_ON ,AHB master clock status" "Not available,Available" bitfld.long 0x00 3. " OTG_CLK_ON ,OTG clock status" "Not available,Available" textline " " bitfld.long 0x00 2. " I2C_CLK_ON ,I2C clock status" "Not available,Available" bitfld.long 0x00 1. " DEV_CLK_ON ,Device clock status" "Not available,Available" textline " " bitfld.long 0x00 0. " HOST_CLK_ON ,Host clock status" "Not available,Available" width 0xB hgroup.byte 0x300++0x0 "I2C Registers" hide.byte 0x00 "I2C_RX,I2C Receive" in wgroup.long 0x300++0x3 line.long 0x00 "I2C_TX,I2C Transmit" bitfld.long 0x00 9. " STOP ,Issue STOP condition after transmitting byte" "Not issue,Issue" bitfld.long 0x00 8. " START ,Issue START condition before transmitting byte" "Not issue,Issue" textline " " hexmask.long.byte 0x00 0.--7. 1. " TX_Data ,Transmit data" group.long 0x304++0x3 line.long 0x00 "I2C_STS,I2C Status" bitfld.long 0x00 11. " TFE ,Trasmit FIFO Empty" "Not empty,Empty" bitfld.long 0x00 10. " TFF ,Transmit FIFO Full" "Not full,Full" textline " " bitfld.long 0x00 9. " RFE ,Receive FIFO Empty" "Not empty,Empty" bitfld.long 0x00 8. " RFF ,Receive FIFO Full" "Not full,Full" textline " " bitfld.long 0x00 7. " SDA ,Current Value of SDA signal" "Low,High" bitfld.long 0x00 6. " SCL ,Current Value of SCL signal" "Low,High" textline " " bitfld.long 0x00 5. " Active ,Indicates whether the bus is busy" "Not busy,Busy" bitfld.long 0x00 4. " DRSI ,Slave Data Request Interrupt" "Not requested,Requested" textline " " bitfld.long 0x00 3. " DRMI ,Master Data Request Interrupt" "Not requested,Requested" bitfld.long 0x00 2. " NAI ,No Acknowledge Interrupt" "Received,Not received" textline " " eventfld.long 0x00 1. " AFI ,Arbitration Failure Interrupt" "No failure,Failure" eventfld.long 0x00 0. " TDI ,Transaction Done Interrupt" "Not completed,Completed" group.long 0x308++0x3 line.long 0x00 "I2C_CTL,I2C Control" bitfld.long 0x00 8. " SRST ,Soft reset" "No reset,Reset" bitfld.long 0x00 7. " TFFIE ,Transmit FIFO Not Full Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " RFDAIE ,Receive Data Available Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " REFIE ,Receive FIFO Full Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " DRSIE ,Slave Transmitter Data Request Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " DRMIE ,Master Transmitter Data Request Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " NAIE ,Transmitter No Acknowledge Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " AFIE ,Transmitter Arbitration Failure Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " TDIE ,Transmit Done Interrupt Enable" "Disabled,Enabled" group.byte 0x30C++0x0 line.byte 0x00 "I2C_CLKHI,I2C Clock High" hexmask.byte 0x00 0.--7. 1. " CDHI ,Clock divisor high" wgroup.byte 0x310++0x0 line.byte 0x00 "I2C_CLKLO,I2C Clock Low" hexmask.byte 0x00 0.--7. 1. " CDLO ,Clock divisor low" width 0xB tree.end endif sif (cpu()=="LPC1772") tree "SPIFI (Serial Peripheral Interface Flash Interface)" base ad:0x20094000 width 12. group.long 0x00++0x1B line.long 0x00 "SPIFI_CTRL,SPIFI control register" bitfld.long 0x00 24.--26. " CSHI ,This field controls the minimum CSn high time" "0,1,2,3,4,5,6,7" bitfld.long 0x00 23. " MODE3 ,SPIFI capture level" "Low,High" bitfld.long 0x00 22. " INTEN ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " CLRID ,Intermediate Data register clear" "No,Yes" hexmask.long.word 0x00 5.--20. 1. " TO ,This field contains the number of AHB clock periods" bitfld.long 0x00 0.--4. " AMSB ,This field identifies the most significant address bit" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,8 Mbit(1 MB),16 Mbit(2 MB),32 Mbit(4 MB),64 Mbit(8 MB),128 Mbit(16 MB),?..." line.long 0x04 "SPIFI_CMD,SPIFI command register" hexmask.long.byte 0x04 24.--31. 1. " OPCODE ,The opcode of the command" textline " " bitfld.long 0x04 21.--23. " FRAMEFORM ,This field controls the opcode and address fields" "used in all-zero value,Opcode only,Opcode/LS byte,Opcode/2 LS bytes,Opcode/3 LS bytes,Opcode/4 bytes,No opcode/3 LS bytes,No opcode/4 bytes" textline " " bitfld.long 0x04 19.--20. " P/S ,This field controls how the fields of the command are sent" "Serial,IO3:0 other serial on IO0,Opcode serial on IO0 other on IO3:0,Quad format" textline " " bitfld.long 0x04 16.--18. " INTLEN ,This field controls how many intermediate bytes precede the data" "0,1,2,3,4,5,6,7" bitfld.long 0x04 15. " DOUT ,Control the direction of the data" "Input,Output" bitfld.long 0x04 14. " POLLRS ,SPIFI hardware will continue to read bytes in the input status field until a test specified by the dataLen field is met" "0,1" textline " " hexmask.long.word 0x04 0.--13. 1. " DATALEN ,This field controls how many data bytes are in the command" line.long 0x08 "SPIFI_ADDR,SPIFI address register" line.long 0x0C "SPIFI_IDATA,SPIFI intermediate data register" line.long 0x10 "SPIFI_AID,SPIFI address and intermediate data register" line.long 0x14 "SPIFI_DATA,SPIFI data register" line.long 0x18 "SPIFI_MCMD,SPIFI memory command register" bitfld.long 0x18 21.--23. " FRAMEFORM ,This field controls the opcode and address fields" "Reserved,Reserved,Reserved,Reserved,4,5,6,7" hexmask.long.word 0x18 0.--13. 1. " DATALEN ,Data lenght" rgroup.long 0x1C++0x03 line.long 0x00 "SPIFI_STAT,SPIFI status register" bitfld.long 0x00 8.--12. " FIFOBYTES ,This field indicates the number of bytes currently in the FIFO" "Empty,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,Full,?..." bitfld.long 0x00 3. " CMDI ,Staus of command" "Low,High" bitfld.long 0x00 2. " MCMD ,Memory command" "Not initiated,Initiated" textline " " bitfld.long 0x00 1. " CMD ,Command is in progress" "Not occurred,Occurred" bitfld.long 0x00 0. " MCINIT ,Initiate Memory command" "Not written,Written" width 0xB base ad:0x28000000 group.long 0x00++0x03 line.long 0x00 "SPIFIM,SPIFI memory mapped space" button "Memory" "d ad:0x28000000--ad:0x28FFFFFF /long" tree.end endif sif (cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778"||cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788") tree "SD (SD card interface)" base ad:0x400C0000 width 15. group.long 0x00++0x0F line.long 0x00 "MCIPWR,Power Control Register" bitfld.long 0x00 7. " ROD ,Rod control" "0,1" bitfld.long 0x00 6. " OPENDRAIN ,SD_CMD output control" "0,1" bitfld.long 0x00 0.--1. " CTRL ,Control" "Power-off,Reserved,Power-up,Power-on" line.long 0x04 "MCICLOCK,Clock Control Register" bitfld.long 0x04 11. " WIDEBUS ,Enable wide bus mode" "Standard,Wide" bitfld.long 0x04 10. " BYPASS ,Enable bypass of clock divide logic" "Disabled,Enabled" bitfld.long 0x04 9. " PWRSAVE ,Disable SD_CLK output" "No,Yes" textline " " bitfld.long 0x04 8. " ENABLE ,Enable SD card bus clock" "Disabled,Enabled" hexmask.long.byte 0x04 0.--7. 1. " CLKDIV ,Bus clock period" line.long 0x08 "MCIARGUMENT,Argument Register" line.long 0x0C "MCICOMMAND,Command Register" bitfld.long 0x0C 10. " ENABLE ,Enabled CPSM" "Disabled,Enabled" bitfld.long 0x0C 9. " PENDING ,Pending" "Not pending,Pending" bitfld.long 0x0C 8. " INTERRUPT ,Interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x0C 7. " LONGRSP ,Long response" "Not received,Received" bitfld.long 0x0C 6. " RESPONSE ,Response" "Low,High" bitfld.long 0x0C 0.--5. " CMDINDEX ,Command index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" rgroup.long 0x10++0x17 line.long 0x00 "MCIRESPCMD,Command Response Register" bitfld.long 0x00 0.--5. " RESPCMD ,Response command index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "MCIRESPONSE0,Response Registers" line.long 0x08 "MCIRESPONSE1,Response Registers" line.long 0x0C "MCIRESPONSE2,Response Registers" line.long 0x10 "MCIRESPONSE3,Response Registers" hexmask.long 0x10 1.--31. 1. " CARDSTATUS ,Card status" group.long 0x24++0xB line.long 0x00 "MCIDATATIMER,Data Timer Register" line.long 0x04 "MCIDATALENGTH,Data Length Register" hexmask.long.word 0x04 0.--15. 1. " DATALENGTH ,Data length value" line.long 0x08 "MCIDATACTRL,Data Control Register" bitfld.long 0x08 4.--7. " BLOCKSIZE ,Data block length" "1,2,4,8,16,32,64,128,256,512,1024,2048,?..." bitfld.long 0x08 3. " DMAENABLE ,Enable DMA" "Disabled,Enabled" bitfld.long 0x08 2. " MODE ,Data transfer mode" "Block,Stream" textline " " bitfld.long 0x08 1. " DIRECTION ,Data transfer direction" "Output,Input" bitfld.long 0x08 0. " ENABLE ,Data transfer enable" "Disabled,Enabled" rgroup.long 0x30++0x07 line.long 0x00 "MCIDATACNT,Data Counter Register" hexmask.long.word 0x00 0.--15. 1. " DATACOUNT ,Remaining data" line.long 0x04 "MCISTATUS,Status Register" bitfld.long 0x04 21. " RXDATAAVLBL ,Data available in receive FIFO" "Not available,Available" bitfld.long 0x04 20. " TXDATAAVLBL ,Data available in transmit FIFO" "Not available,Available" bitfld.long 0x04 19. " RXFIFOEMPTY ,Receive FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x04 18. " TXFIFOEMPTY ,Transmit FIFO empty" "Not empty,Empty" bitfld.long 0x04 17. " RXFIFOFULL ,Receive FIFO full" "Not occurred,Occurred" bitfld.long 0x04 16. " TXFIFOFULL ,Transmit FIFO full" "Not occurred,Occurred" textline " " bitfld.long 0x04 15. " RXFIFOHALFFULL ,Receive FIFO half full" "Not occurred,Occurred" bitfld.long 0x04 14. " TXFIFOHALFEMPTY ,Transmit FIFO half empty" "Not occurred,Occurred" bitfld.long 0x04 13. " RXACTIVE ,Data receive in progress" "Not occurred,Occurred" textline " " bitfld.long 0x04 12. " TXACTIVE ,Data transmit in progress" "Not occurred,Occurred" bitfld.long 0x04 11. " CMDACTIVE ,Command transfer in progress" "Not occurred,Occurred" bitfld.long 0x04 10. " DATABLOCKEND ,Data block sent/received" "Not occurred,Occurred" textline " " bitfld.long 0x04 9. " STARTBITERR ,Start bit not detected" "Not occurred,Occurred" bitfld.long 0x04 8. " DATAEND ,Data end" "Not occurred,Occurred" bitfld.long 0x04 7. " CMDSENT ,Command sent" "Not occurred,Occurred" textline " " bitfld.long 0x04 6. " CMDRESPEND ,Command response received" "Not occurred,Occurred" bitfld.long 0x04 5. " RXOVERRUN ,Receive FIFO overrun error" "No error,Error" bitfld.long 0x04 4. " TXUNDERRUN ,Transmit FIFO underrun error" "No error,Error" textline " " bitfld.long 0x04 3. " DATATIMEOUT ,Data timeout" "Not occurred,Occurred" bitfld.long 0x04 2. " CMDTIMEOUT ,Command response timeout" "Not occurred,Occurred" bitfld.long 0x04 1. " DATACRCFAIL ,Data block sent/received" "Not occurred,Occurred" textline " " bitfld.long 0x04 0. " CMDCRCFAIL ,Command response received" "Not occurred,Occurred" wgroup.long 0x38++0x03 line.long 0x00 "MCICLEAR,Clear Register" bitfld.long 0x00 10. " DATABLOCKENDCLR ,Clears DataBlockEnd flag" "No effect,Cleared" bitfld.long 0x00 9. " STARTBITERRCLR ,Clears StartBitErr flag" "No effect,Cleared" bitfld.long 0x00 8. " DATAENDCLR ,Clears DataEnd flag" "No effect,Cleared" textline " " bitfld.long 0x00 7. " CMDSENTCLR ,Clears CmdSent flag" "No effect,Cleared" bitfld.long 0x00 6. " CMDRESPENDCLR ,Clears CmdRespEnd flag" "No effect,Cleared" bitfld.long 0x00 5. " RXOVERRUNCLR ,Clears RxOverrun flag" "No effect,Cleared" textline " " bitfld.long 0x00 4. " TXUNDERRUNCLR ,Clears TxUnderrun flag" "No effect,Cleared" bitfld.long 0x00 3. " DATATIMEOUTCLR ,Clears DataTimeOut flag" "No effect,Cleared" bitfld.long 0x00 2. " CMDTIMEOUTCLR ,Clears CmdTimeOut flag" "No effect,Cleared" textline " " bitfld.long 0x00 1. " DATACRCFAILCLR ,Clears DataCrcFail flag" "No effect,Cleared" bitfld.long 0x00 0. " CMDCRCFAILCLR ,Clears CmdCrcFail flag" "No effect,Cleared" group.long 0x3C++0x03 line.long 0x00 "MCIMASK0,Interrupt Mask registers" bitfld.long 0x00 21. " MASK21 ,Mask RxDataAvlbl flag" "Not masked,Masked" bitfld.long 0x00 20. " MASK20 ,Mask TxDataAvlbl flag" "Not masked,Masked" bitfld.long 0x00 19. " MASK19 ,Mask RxFifoEmpty flag" "Not masked,Masked" textline " " bitfld.long 0x00 18. " MASK18 ,Mask TxFifoEmpty flag" "Not masked,Masked" bitfld.long 0x00 17. " MASK17 ,Mask RxFifoFull flag" "Not masked,Masked" bitfld.long 0x00 16. " MASK16 ,Mask TxFifoFull flag" "Not masked,Masked" textline " " bitfld.long 0x00 15. " MASK15 ,Mask RxFifoHalfFull flag" "Not masked,Masked" bitfld.long 0x00 14. " MASK14 ,Mask TxFifoHalfEmpty flag" "Not masked,Masked" bitfld.long 0x00 13. " MASK13 ,Mask RxActive flag" "Not masked,Masked" textline " " bitfld.long 0x00 12. " MASK12 ,Mask TxActive flag" "Not masked,Masked" bitfld.long 0x00 11. " MASK11 ,Mask CmdActive flag" "Not masked,Masked" bitfld.long 0x00 10. " MASK10 ,Mask DataBlockEnd flag" "Not masked,Masked" textline " " bitfld.long 0x00 9. " MASK9 ,Mask StartBitErr flag" "Not masked,Masked" bitfld.long 0x00 8. " MASK8 ,Mask DataEnd flag" "Not masked,Masked" bitfld.long 0x00 7. " MASK7 ,Mask CmdSent flag" "Not masked,Masked" textline " " bitfld.long 0x00 6. " MASK6 ,Mask CmdRespEnd flag" "Not masked,Masked" bitfld.long 0x00 5. " MASK5 ,Mask RxOverrun flag" "Not masked,Masked" bitfld.long 0x00 4. " MASK4 ,Mask TxUnderrun flag" "Not masked,Masked" textline " " bitfld.long 0x00 3. " MASK3 ,Mask DataTimeOut flag" "Not masked,Masked" bitfld.long 0x00 2. " MASK2 ,Mask CmdTimeOut flag" "Not masked,Masked" bitfld.long 0x00 1. " MASK1 ,Mask DataCrcFail flag" "Not masked,Masked" textline " " bitfld.long 0x00 0. " MASK0 ,Mask CmdCrcFail flag" "Not masked,Masked" rgroup.long 0x48++0x03 line.long 0x00 "MCIFIFOCNT,FIFO Counter Register" hexmask.long.word 0x00 0.--14. 1. " DATACOUNT ,Remaining data" sif (cpu()=="LPC4072FBD80")||(cpu()=="LPC4072FET80")||(cpu()=="LPC4074FBD144")||(cpu()=="LPC4076FBD144")||(cpu()=="LPC4076FET180")||(cpu()=="LPC4078FBD100")||(cpu()=="LPC4078FBD144")||(cpu()=="LPC4078FBD208")||(cpu()=="LPC4078FBD80")||(cpu()=="LPC4078FET180")||(cpu()=="LPC4078FET208")||(cpu()=="LPC4088FBD144")||(cpu()=="LPC4088FBD208")||(cpu()=="LPC4088FET180")||(cpu()=="LPC4088FET208") group.long 0x80++0x3 line.long 0x00 "MCIFIFO0,Data FIFO Register 0" else hgroup.long 0x80++0x3 hide.long 0x00 "MCIFIFO0,Data FIFO Register 0" in endif sif (cpu()=="LPC4072FBD80")||(cpu()=="LPC4072FET80")||(cpu()=="LPC4074FBD144")||(cpu()=="LPC4076FBD144")||(cpu()=="LPC4076FET180")||(cpu()=="LPC4078FBD100")||(cpu()=="LPC4078FBD144")||(cpu()=="LPC4078FBD208")||(cpu()=="LPC4078FBD80")||(cpu()=="LPC4078FET180")||(cpu()=="LPC4078FET208")||(cpu()=="LPC4088FBD144")||(cpu()=="LPC4088FBD208")||(cpu()=="LPC4088FET180")||(cpu()=="LPC4088FET208") group.long 0x84++0x3 line.long 0x00 "MCIFIFO1,Data FIFO Register 1" else hgroup.long 0x84++0x3 hide.long 0x00 "MCIFIFO1,Data FIFO Register 1" in endif sif (cpu()=="LPC4072FBD80")||(cpu()=="LPC4072FET80")||(cpu()=="LPC4074FBD144")||(cpu()=="LPC4076FBD144")||(cpu()=="LPC4076FET180")||(cpu()=="LPC4078FBD100")||(cpu()=="LPC4078FBD144")||(cpu()=="LPC4078FBD208")||(cpu()=="LPC4078FBD80")||(cpu()=="LPC4078FET180")||(cpu()=="LPC4078FET208")||(cpu()=="LPC4088FBD144")||(cpu()=="LPC4088FBD208")||(cpu()=="LPC4088FET180")||(cpu()=="LPC4088FET208") group.long 0x88++0x3 line.long 0x00 "MCIFIFO2,Data FIFO Register 2" else hgroup.long 0x88++0x3 hide.long 0x00 "MCIFIFO2,Data FIFO Register 2" in endif sif (cpu()=="LPC4072FBD80")||(cpu()=="LPC4072FET80")||(cpu()=="LPC4074FBD144")||(cpu()=="LPC4076FBD144")||(cpu()=="LPC4076FET180")||(cpu()=="LPC4078FBD100")||(cpu()=="LPC4078FBD144")||(cpu()=="LPC4078FBD208")||(cpu()=="LPC4078FBD80")||(cpu()=="LPC4078FET180")||(cpu()=="LPC4078FET208")||(cpu()=="LPC4088FBD144")||(cpu()=="LPC4088FBD208")||(cpu()=="LPC4088FET180")||(cpu()=="LPC4088FET208") group.long 0x8C++0x3 line.long 0x00 "MCIFIFO3,Data FIFO Register 3" else hgroup.long 0x8C++0x3 hide.long 0x00 "MCIFIFO3,Data FIFO Register 3" in endif sif (cpu()=="LPC4072FBD80")||(cpu()=="LPC4072FET80")||(cpu()=="LPC4074FBD144")||(cpu()=="LPC4076FBD144")||(cpu()=="LPC4076FET180")||(cpu()=="LPC4078FBD100")||(cpu()=="LPC4078FBD144")||(cpu()=="LPC4078FBD208")||(cpu()=="LPC4078FBD80")||(cpu()=="LPC4078FET180")||(cpu()=="LPC4078FET208")||(cpu()=="LPC4088FBD144")||(cpu()=="LPC4088FBD208")||(cpu()=="LPC4088FET180")||(cpu()=="LPC4088FET208") group.long 0x90++0x3 line.long 0x00 "MCIFIFO4,Data FIFO Register 4" else hgroup.long 0x90++0x3 hide.long 0x00 "MCIFIFO4,Data FIFO Register 4" in endif sif (cpu()=="LPC4072FBD80")||(cpu()=="LPC4072FET80")||(cpu()=="LPC4074FBD144")||(cpu()=="LPC4076FBD144")||(cpu()=="LPC4076FET180")||(cpu()=="LPC4078FBD100")||(cpu()=="LPC4078FBD144")||(cpu()=="LPC4078FBD208")||(cpu()=="LPC4078FBD80")||(cpu()=="LPC4078FET180")||(cpu()=="LPC4078FET208")||(cpu()=="LPC4088FBD144")||(cpu()=="LPC4088FBD208")||(cpu()=="LPC4088FET180")||(cpu()=="LPC4088FET208") group.long 0x94++0x3 line.long 0x00 "MCIFIFO5,Data FIFO Register 5" else hgroup.long 0x94++0x3 hide.long 0x00 "MCIFIFO5,Data FIFO Register 5" in endif sif (cpu()=="LPC4072FBD80")||(cpu()=="LPC4072FET80")||(cpu()=="LPC4074FBD144")||(cpu()=="LPC4076FBD144")||(cpu()=="LPC4076FET180")||(cpu()=="LPC4078FBD100")||(cpu()=="LPC4078FBD144")||(cpu()=="LPC4078FBD208")||(cpu()=="LPC4078FBD80")||(cpu()=="LPC4078FET180")||(cpu()=="LPC4078FET208")||(cpu()=="LPC4088FBD144")||(cpu()=="LPC4088FBD208")||(cpu()=="LPC4088FET180")||(cpu()=="LPC4088FET208") group.long 0x98++0x3 line.long 0x00 "MCIFIFO6,Data FIFO Register 6" else hgroup.long 0x98++0x3 hide.long 0x00 "MCIFIFO6,Data FIFO Register 6" in endif sif (cpu()=="LPC4072FBD80")||(cpu()=="LPC4072FET80")||(cpu()=="LPC4074FBD144")||(cpu()=="LPC4076FBD144")||(cpu()=="LPC4076FET180")||(cpu()=="LPC4078FBD100")||(cpu()=="LPC4078FBD144")||(cpu()=="LPC4078FBD208")||(cpu()=="LPC4078FBD80")||(cpu()=="LPC4078FET180")||(cpu()=="LPC4078FET208")||(cpu()=="LPC4088FBD144")||(cpu()=="LPC4088FBD208")||(cpu()=="LPC4088FET180")||(cpu()=="LPC4088FET208") group.long 0x9C++0x3 line.long 0x00 "MCIFIFO7,Data FIFO Register 7" else hgroup.long 0x9C++0x3 hide.long 0x00 "MCIFIFO7,Data FIFO Register 7" in endif sif (cpu()=="LPC4072FBD80")||(cpu()=="LPC4072FET80")||(cpu()=="LPC4074FBD144")||(cpu()=="LPC4076FBD144")||(cpu()=="LPC4076FET180")||(cpu()=="LPC4078FBD100")||(cpu()=="LPC4078FBD144")||(cpu()=="LPC4078FBD208")||(cpu()=="LPC4078FBD80")||(cpu()=="LPC4078FET180")||(cpu()=="LPC4078FET208")||(cpu()=="LPC4088FBD144")||(cpu()=="LPC4088FBD208")||(cpu()=="LPC4088FET180")||(cpu()=="LPC4088FET208") group.long 0xA0++0x3 line.long 0x00 "MCIFIFO8,Data FIFO Register 8" else hgroup.long 0xA0++0x3 hide.long 0x00 "MCIFIFO8,Data FIFO Register 8" in endif sif (cpu()=="LPC4072FBD80")||(cpu()=="LPC4072FET80")||(cpu()=="LPC4074FBD144")||(cpu()=="LPC4076FBD144")||(cpu()=="LPC4076FET180")||(cpu()=="LPC4078FBD100")||(cpu()=="LPC4078FBD144")||(cpu()=="LPC4078FBD208")||(cpu()=="LPC4078FBD80")||(cpu()=="LPC4078FET180")||(cpu()=="LPC4078FET208")||(cpu()=="LPC4088FBD144")||(cpu()=="LPC4088FBD208")||(cpu()=="LPC4088FET180")||(cpu()=="LPC4088FET208") group.long 0xA4++0x3 line.long 0x00 "MCIFIFO9,Data FIFO Register 9" else hgroup.long 0xA4++0x3 hide.long 0x00 "MCIFIFO9,Data FIFO Register 9" in endif sif (cpu()=="LPC4072FBD80")||(cpu()=="LPC4072FET80")||(cpu()=="LPC4074FBD144")||(cpu()=="LPC4076FBD144")||(cpu()=="LPC4076FET180")||(cpu()=="LPC4078FBD100")||(cpu()=="LPC4078FBD144")||(cpu()=="LPC4078FBD208")||(cpu()=="LPC4078FBD80")||(cpu()=="LPC4078FET180")||(cpu()=="LPC4078FET208")||(cpu()=="LPC4088FBD144")||(cpu()=="LPC4088FBD208")||(cpu()=="LPC4088FET180")||(cpu()=="LPC4088FET208") group.long 0xA8++0x3 line.long 0x00 "MCIFIFO10,Data FIFO Register 10" else hgroup.long 0xA8++0x3 hide.long 0x00 "MCIFIFO10,Data FIFO Register 10" in endif sif (cpu()=="LPC4072FBD80")||(cpu()=="LPC4072FET80")||(cpu()=="LPC4074FBD144")||(cpu()=="LPC4076FBD144")||(cpu()=="LPC4076FET180")||(cpu()=="LPC4078FBD100")||(cpu()=="LPC4078FBD144")||(cpu()=="LPC4078FBD208")||(cpu()=="LPC4078FBD80")||(cpu()=="LPC4078FET180")||(cpu()=="LPC4078FET208")||(cpu()=="LPC4088FBD144")||(cpu()=="LPC4088FBD208")||(cpu()=="LPC4088FET180")||(cpu()=="LPC4088FET208") group.long 0xAC++0x3 line.long 0x00 "MCIFIFO11,Data FIFO Register 11" else hgroup.long 0xAC++0x3 hide.long 0x00 "MCIFIFO11,Data FIFO Register 11" in endif sif (cpu()=="LPC4072FBD80")||(cpu()=="LPC4072FET80")||(cpu()=="LPC4074FBD144")||(cpu()=="LPC4076FBD144")||(cpu()=="LPC4076FET180")||(cpu()=="LPC4078FBD100")||(cpu()=="LPC4078FBD144")||(cpu()=="LPC4078FBD208")||(cpu()=="LPC4078FBD80")||(cpu()=="LPC4078FET180")||(cpu()=="LPC4078FET208")||(cpu()=="LPC4088FBD144")||(cpu()=="LPC4088FBD208")||(cpu()=="LPC4088FET180")||(cpu()=="LPC4088FET208") group.long 0xB0++0x3 line.long 0x00 "MCIFIFO12,Data FIFO Register 12" else hgroup.long 0xB0++0x3 hide.long 0x00 "MCIFIFO12,Data FIFO Register 12" in endif sif (cpu()=="LPC4072FBD80")||(cpu()=="LPC4072FET80")||(cpu()=="LPC4074FBD144")||(cpu()=="LPC4076FBD144")||(cpu()=="LPC4076FET180")||(cpu()=="LPC4078FBD100")||(cpu()=="LPC4078FBD144")||(cpu()=="LPC4078FBD208")||(cpu()=="LPC4078FBD80")||(cpu()=="LPC4078FET180")||(cpu()=="LPC4078FET208")||(cpu()=="LPC4088FBD144")||(cpu()=="LPC4088FBD208")||(cpu()=="LPC4088FET180")||(cpu()=="LPC4088FET208") group.long 0xB4++0x3 line.long 0x00 "MCIFIFO13,Data FIFO Register 13" else hgroup.long 0xB4++0x3 hide.long 0x00 "MCIFIFO13,Data FIFO Register 13" in endif sif (cpu()=="LPC4072FBD80")||(cpu()=="LPC4072FET80")||(cpu()=="LPC4074FBD144")||(cpu()=="LPC4076FBD144")||(cpu()=="LPC4076FET180")||(cpu()=="LPC4078FBD100")||(cpu()=="LPC4078FBD144")||(cpu()=="LPC4078FBD208")||(cpu()=="LPC4078FBD80")||(cpu()=="LPC4078FET180")||(cpu()=="LPC4078FET208")||(cpu()=="LPC4088FBD144")||(cpu()=="LPC4088FBD208")||(cpu()=="LPC4088FET180")||(cpu()=="LPC4088FET208") group.long 0xB8++0x3 line.long 0x00 "MCIFIFO14,Data FIFO Register 14" else hgroup.long 0xB8++0x3 hide.long 0x00 "MCIFIFO14,Data FIFO Register 14" in endif sif (cpu()=="LPC4072FBD80")||(cpu()=="LPC4072FET80")||(cpu()=="LPC4074FBD144")||(cpu()=="LPC4076FBD144")||(cpu()=="LPC4076FET180")||(cpu()=="LPC4078FBD100")||(cpu()=="LPC4078FBD144")||(cpu()=="LPC4078FBD208")||(cpu()=="LPC4078FBD80")||(cpu()=="LPC4078FET180")||(cpu()=="LPC4078FET208")||(cpu()=="LPC4088FBD144")||(cpu()=="LPC4088FBD208")||(cpu()=="LPC4088FET180")||(cpu()=="LPC4088FET208") group.long 0xBC++0x3 line.long 0x00 "MCIFIFO15,Data FIFO Register 15" else hgroup.long 0xBC++0x3 hide.long 0x00 "MCIFIFO15,Data FIFO Register 15" in endif width 0xB tree.end endif tree "UART (Universal Asynchronous Receiver/Transmitter)" tree "UART 0" base ad:0x4000C000 width 11. if (((per.l((ad:0x4000C000+0xC)))&0x80)==0x00) hgroup.long 0x00++0x03 hide.long 0x00 "U0RBR/THR,Receiver/Transmit Buffer Register" in group.long 0x04++0x03 line.long 0x00 "U0IER,Interrupt Enable Register" bitfld.long 0x00 9. " ABTOINTEN ,Auto-baud Time-out Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 8. " ABEOINTEN ,End of Auto-baud Interrupt Enable" "Disabled,Enabled" sif (cpu()!="LPC1224"&&cpu()!="LPC1225"&&cpu()!="LPC1226"&&cpu()!="LPC1227"&&cpu()!="LPC1102"&&cpu()!="LPC1102LV"&&cpu()!="LPC1110"&&!cpuis("LPC1111*")&&!cpuis("LPC1112*")&&cpu()!="LPC1112LV"&&!cpuis("LPC1113*")&&!cpuis("LPC1114*")&&cpu()!="LPC1114LV"&&!cpuis("LPC1115*")&&cpu()!="LPC11D14") sif (cpu()=="LPC11U12/201"||cpu()=="LPC11U13/201"||cpu()=="LPC11U14/201"||cpu()=="LPC11U23/301"||cpuis("LPC11U24*")||cpuis("LPC11U3*")||cpu()=="LPC11A02"||cpu()=="LPC11A04"||cpu()=="LPC11A11"||cpu()=="LPC11A12"||cpu()=="LPC11A13"||cpu()=="LPC11A14"||cpuis("LPC11E*")) textline " " bitfld.long 0x00 3. " MSIE ,Modem interrupt Enable" "Disabled,Enabled" endif endif textline " " bitfld.long 0x00 2. " RXLSIE ,Rx Line Status Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " THREIE ,THRE Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RBRIE ,RBR Interrupt Enable" "Disabled,Enabled" else group.long 0x00++0x03 line.long 0x00 "U0DLL,Divisor Latch LSB" hexmask.long.byte 0x00 0.--7. 1. " DLLSB ,UARTn Divisor Latch LSB" group.long 0x04++0x03 line.long 0x00 "U0DLM,Divisor Latch MSB" hexmask.long.byte 0x00 0.--7. 1. " DLMSB ,UARTn Divisor Latch MSB" endif hgroup.long 0x08++0x03 hide.long 0x00 "U0IIR,Interrupt ID" in wgroup.long 0x08++0x03 line.long 0x00 "U0FCR,FIFO Control Register" bitfld.long 0x00 6.--7. " RXTRIGLVL ,Rx Trigger Level Select" "Level 0(1 char.),Level 1(4 char.),Level 2(8 char.),Level 3(14 char.)" sif (cpu()!="EM773"&&cpu()!="LPC1311"&&cpu()!="LPC1313"&&cpu()!="LPC1342"&&cpu()!="LPC1343"&&cpu()!="LPC11D14"&&cpu()!="LPC1110"&&!cpuis("LPC1111*")&&!cpuis("LPC1112*")&&cpu()!="LPC1112LV"&&!cpuis("LPC1113*")&&!cpuis("LPC1114*")&&cpu()!="LPC1114LV"&&!cpuis("LPC1115*")&&cpu()!="LPC11C12"&&cpu()!="LPC11C14"&&cpu()!="LPC1102"&&cpu()!="LPC11C22"&&cpu()!="LPC11C24"&&cpu()!="LPC11U12/201"&&cpu()!="LPC11U23/301"&&!cpuis("LPC11U24*")&&cpu()!="LPC11U13/201"&&cpu()!="LPC11U14/201"&&cpuis("LPC11U3*")&&cpu()!="LPC11A02"&&cpu()!="LPC11A04"&&cpu()!="LPC11A11"&&cpu()!="LPC11A12"&&cpu()!="LPC11A13"&&cpu()!="LPC11A14"&&!cpuis("LPC11E*")) bitfld.long 0x0 3. " DMAMODE ,DMA Mode Enable" "Disable,Enable" endif textline " " bitfld.long 0x0 2. " TXFIFORES ,Transmitter FIFO Reset" "No reset,Reset" bitfld.long 0x0 1. " RXFIFORES ,Receiver FIFO Reset" "No reset,Reset" textline " " bitfld.long 0x00 0. " FIFOENABLE ,FIFO Enable" "Disable,Enable" sif (cpu()=="LPC11A02"||cpu()=="LPC11A04"||cpu()=="LPC11A11"||cpu()=="LPC11A12"||cpu()=="LPC11A13"||cpu()=="LPC11A14"||cpuis("LPC11E*")) group.long 0x10++0x3 line.long 0x00 "U0MCR,USART Modem Control Register" bitfld.long 0x00 7. " CTSEN ,CTS enable" "Disabled,Enabled" bitfld.long 0x00 6. " RTSEN ,RTS enable" "Disabled,Enabled" bitfld.long 0x00 4. " LMS ,Loopback Mode Select" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " RTSCON ,Source for modem output pin RTS" "Active,Inactive" bitfld.long 0x00 0. " DTRCON ,Source for modem output pin DTR" "Active,Inactive" endif if ((per.l((ad:0x4000C000+0xC))&0x03)==0x00) group.long 0x0C++0x03 line.long 0x00 "U0LCR,Line Control Register" bitfld.long 0x00 7. " DLAB ,Divisor Latch Access Bit" "Disabled,Enabled" bitfld.long 0x00 6. " BREAKCONTROL ,Break Control" "Disabled,Enabled" textline " " bitfld.long 0x00 4.--5. " PARITYSELECT ,Parity Select" "Odd,Even,Forced 1,Forced 0" bitfld.long 0x00 3. " PARITYENABLE ,Parity Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " SBS ,Stop Bit Select" "1 bit,1.5 bits" bitfld.long 0x00 0.--1. " WLS ,Word Length Select" "5-bit,6-bit,7-bit,8-bit" else group.long 0x0C++0x03 line.long 0x00 "U0LCR,Line Control Register" bitfld.long 0x00 7. " DLAB ,Divisor Latch Access Bit" "Disabled,Enabled" bitfld.long 0x00 6. " BREAKCONTROL ,Break Control" "Disabled,Enabled" textline " " bitfld.long 0x00 4.--5. " PARITYSELECT ,Parity Select" "Odd,Even,Forced 1,Forced 0" bitfld.long 0x00 3. " PARITYENABLE ,Parity Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " SBS ,Stop Bit Select" "1 bit,2 bits" bitfld.long 0x00 0.--1. " WLS ,Word Length Select" "5-bit,6-bit,7-bit,8-bit" endif sif (cpu()=="EM773"||cpu()=="LPC1311"||cpu()=="LPC1313"||cpu()=="LPC1342"||cpu()=="LPC1343"||cpu()=="LPC11D14"||cpu()=="LPC1110"||cpuis("LPC1111*")||cpuis("LPC1112*")||cpu()=="LPC1112LV"||cpuis("LPC1113*")||cpuis("LPC1114*")||cpu()=="LPC1114LV"||cpuis("LPC1115*")||cpu()=="LPC11C12"||cpu()=="LPC11C14"||cpu()=="LPC11C22"||cpu()=="LPC11C24"||cpu()=="LPC11U12/201"||cpu()=="LPC11U13/201"||cpu()=="LPC11U14/201"||cpu()=="LPC11U23/301"||cpuis("LPC11U24*")||cpuis("LPC11U3*")) group.long 0x10++0x03 line.long 0x00 "U0MCR,Modem Control Register" bitfld.long 0x00 7. " CTSEN ,Auto-cts flow control" "Disabled,Enabled" bitfld.long 0x00 6. " RTSEN ,Auto-rts flow" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " LOOPMODE ,Modem loopback mode select" "Disabled,Enabled" bitfld.long 0x00 1. " RTSCTRL ,Source for modem output pin RTS" "Low,High" textline " " bitfld.long 0x00 0. " DTRCTRL ,Source for modem output pin DTR" "Low,High" endif hgroup.long 0x14++0x03 hide.long 0x00 "U0LSR,Line Status Register" in sif (cpu()=="EM773"||cpu()=="LPC1224"||cpu()=="LPC1225"||cpu()=="LPC1226"||cpu()=="LPC1227"||cpu()=="LPC1311"||cpu()=="LPC1313"||cpu()=="LPC1342"||cpu()=="LPC1343"||cpu()=="LPC1110"||cpuis("LPC1111*")||cpuis("LPC1112*")||cpu()=="LPC1112LV"||cpuis("LPC1113*")||cpuis("LPC1114*")||cpu()=="LPC1114LV"||cpuis("LPC1115*")||cpu()=="LPC11D14"||cpu()=="LPC11C12"||cpu()=="LPC11C14"||cpu()=="LPC11C22"||cpu()=="LPC11C24"||cpu()=="LPC11U12/201"||cpu()=="LPC11U13/201"||cpu()=="LPC11U14/201"||cpu()=="LPC11U23/301"||cpuis("LPC11U24*")||cpuis("LPC11U3*")||cpuis("LPC11E*")||cpu()=="LPC11A02"||cpu()=="LPC11A04"||cpu()=="LPC11A11"||cpu()=="LPC11A12"||cpu()=="LPC11A13"||cpu()=="LPC11A14") hgroup.long 0x18++0x03 hide.long 0x00 "U0MSR,Modem Status Register" in endif group.long 0x1C++0x03 line.long 0x00 "U0SCR,Scratch Pad Register" hexmask.long.byte 0x00 0.--7. 1. " Pad ,A readable/writable byte" group.long 0x20++0x03 line.long 0x00 "U0ACR,Auto-baud Control Register" bitfld.long 0x00 9. " ABTOINTCLR ,Auto-baud Time-out Interrupt Clear Bit" "No effect,Cleared" bitfld.long 0x00 8. " ABEOINTCLR ,End of Auto-baud Interrupt Clear Bit" "No effect,Cleared" textline " " bitfld.long 0x00 2. " AUTORESTART ,Auto Restart" "Not restarted,Restarted" bitfld.long 0x00 1. " MODE ,Auto-baud Mode Select" "Mode 0,Mode 1" textline " " bitfld.long 0x00 0. " START ,Auto-baud Start" "Stopped,Started" sif (cpuis("LPC181*")||cpuis("LPC182*")||cpuis("LPC183*")||cpuis("LPC185*")||cpu()=="LPC4310FBD144"||cpu()=="LPC4310FBD144-M0"||cpu()=="LPC4310FET100"||cpu()=="LPC4310FET100-M0"||cpu()=="LPC4320FBD100"||cpu()=="LPC4320FBD100-M0"||cpu()=="LPC4320FBD144"||cpu()=="LPC4320FBD144-M0"||cpu()=="LPC4320FET100"||cpu()=="LPC4320FET100-M0"||cpu()=="LPC4330FBD144"||cpu()=="LPC4330FBD144-M0"||cpu()=="LPC4330FET100"||cpu()=="LPC4330FET100-M0"||cpu()=="LPC4330FET180"||cpu()=="LPC4330FET180-M0"||cpu()=="LPC4330FET256"||cpu()=="LPC4330FET256-M0"||cpu()=="LPC4350FBD208"||cpu()=="LPC4350FBD208-M0"||cpu()=="LPC4350FET180"||cpu()=="LPC4350FET180-M0"||cpu()=="LPC4350FET256"||cpu()=="LPC4350FET256-M0"||cpu()=="LPC4333FBD144"||cpu()=="LPC4333FBD144-M0"||cpu()=="LPC4333FET100"||cpu()=="LPC4333FET100-M0"||cpu()=="LPC4333FET180"||cpu()=="LPC4333FET180-M0"||cpu()=="LPC4333FET256"||cpu()=="LPC4333FET256-M0"||cpu()=="LPC4337FBD144"||cpu()=="LPC4337FBD144-M0"||cpu()=="LPC4337FET100"||cpu()=="LPC4337FET100-M0"||cpu()=="LPC4337FET180"||cpu()=="LPC4337FET180-M0"||cpu()=="LPC4337FET256"||cpu()=="LPC4337FET256-M0"||cpu()=="LPC4353FBD208"||cpu()=="LPC4353FBD208-M0"||cpu()=="LPC4353FET180"||cpu()=="LPC4353FET180-M0"||cpu()=="LPC4353FET256"||cpu()=="LPC4353FET256-M0"||cpu()=="LPC4357FBD208"||cpu()=="LPC4357FBD208-M0"||cpu()=="LPC4357FET256"||cpu()=="LPC4357FET256-M0") elif (cpu()!="EM773"&&cpu()!="LPC1110"&&!cpuis("LPC1111*")&&!cpuis("LPC1112*")&&cpu()!="LPC1112LV"&&!cpuis("LPC1113*")&&!cpuis("LPC1114*")&&cpu()!="LPC1114LV"&&!cpuis("LPC1115*")&&cpu()!="LPC11D14"&&cpu()!="LPC11C12"&&cpu()!="LPC11C14"&&cpu()!="LPC1102"&&cpu()!="LPC1102LV"&&cpu()!="LPC11C22"&&cpu()!="LPC11C24"&&cpu()!="LPC1224"&&cpu()!="LPC1225"&&cpu()!="LPC1226"&&cpu()!="LPC1227") if (((per.l((ad:0x4000C000+0x24)))&0x4)==0x4) group.long 0x24++0x3 line.long 0x0 "U0ICR,IrDA Control Register" sif cpu()=="LPC11U12/201"||cpu()=="LPC11U13/x201"||cpu()=="LPC11U14/201"||cpu()=="LPC11U23/301"||cpuis("LPC11U24*")||cpuis("LPC11U3*")||cpuis("LPC11E*") bitfld.long 0x00 3.--5. " PULSEDIV ,IrDA transmitter pulse width [us]" "3/(16 * baud rate),2 * Tpclk,4 * Tpclk,8 * Tpclk,16 * Tpclk,32 * Tpclk,64 * Tpclk,128 * Tpclk" else bitfld.long 0x00 3.--5. " PULSEDIV ,IrDA transmitter pulse width [us]" "2 * Tpclk,4 * Tpclk,8 * Tpclk,16 * Tpclk,32 * Tpclk,64 * Tpclk,128 * Tpclk,256 * Tpclk" endif textline " " bitfld.long 0x00 2. " FIXPULSEEN ,IrDA fixed-pulse-width mode" "Disabled,Enabled" bitfld.long 0x00 1. " IRDAINV ,IrDA Serial Input Invert" "Not inverted,Inverted" textline " " bitfld.long 0x00 0. " IRDAEN ,IrDA Enable" "Disabled,Enabled" else group.long 0x24++0x3 line.long 0x0 "U0ICR,IrDA Control Register" textline " " bitfld.long 0x00 2. " FIXPULSEEN ,IrDA fixed-pulse-width mode" "Disabled,Enabled" bitfld.long 0x00 1. " IRDAINV ,IrDA Serial Input Invert" "Not inverted,Inverted" textline " " bitfld.long 0x00 0. " IRDAEN ,IrDA Enable" "Disabled,Enabled" endif elif (cpu()=="LPC1224"||cpu()=="LPC1225"||cpu()=="LPC1226"||cpu()=="LPC1227") endif group.long 0x28++0x03 line.long 0x00 "U0FDR,Fractional Divider Register" bitfld.long 0x00 4.--7. " MULVAL , Pre-scaler Multiplier Value" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()=="EM773"||cpu()=="LPC1311"||cpu()=="LPC1313"||cpu()=="LPC1342"||cpu()=="LPC1343"||cpu()=="LPC1110"||cpuis("LPC1111*")||cpuis("LPC1112*")||cpu()=="LPC1112LV"||cpuis("LPC1113*")||cpuis("LPC1114*")||cpu()=="LPC1114LV"||cpuis("LPC1115*")||cpu()=="LPC11D14"||cpu()=="LPC11C12"||cpu()=="LPC11C14"||cpu()=="LPC1102"||cpu()=="LPC11C22"||cpu()=="LPC11C24"||cpu()=="LPC11U12/201"||cpu()=="LPC11U13/201"||cpu()=="LPC11U14/201"||cpu()=="LPC11U23/301"||cpuis("LPC11U24*")||cpuis("LPC11U3*")||cpu()=="LPC4310FBD144"||cpu()=="LPC4310FBD144-M0"||cpu()=="LPC4310FET100"||cpu()=="LPC4310FET100-M0"||cpu()=="LPC4320FBD100"||cpu()=="LPC4320FBD100-M0"||cpu()=="LPC4320FBD144"||cpu()=="LPC4320FBD144-M0"||cpu()=="LPC4320FET100"||cpu()=="LPC4320FET100-M0"||cpu()=="LPC4330FBD144"||cpu()=="LPC4330FBD144-M0"||cpu()=="LPC4330FET100"||cpu()=="LPC4330FET100-M0"||cpu()=="LPC4330FET180"||cpu()=="LPC4330FET180-M0"||cpu()=="LPC4330FET256"||cpu()=="LPC4330FET256-M0"||cpu()=="LPC4350FBD208"||cpu()=="LPC4350FBD208-M0"||cpu()=="LPC4350FET180"||cpu()=="LPC4350FET180-M0"||cpu()=="LPC4350FET256"||cpu()=="LPC4350FET256-M0"||cpu()=="LPC4333FBD144"||cpu()=="LPC4333FBD144-M0"||cpu()=="LPC4333FET100"||cpu()=="LPC4333FET100-M0"||cpu()=="LPC4333FET180"||cpu()=="LPC4333FET180-M0"||cpu()=="LPC4333FET256"||cpu()=="LPC4333FET256-M0"||cpu()=="LPC4337FBD144"||cpu()=="LPC4337FBD144-M0"||cpu()=="LPC4337FET100"||cpu()=="LPC4337FET100-M0"||cpu()=="LPC4337FET180"||cpu()=="LPC4337FET180-M0"||cpu()=="LPC4337FET256"||cpu()=="LPC4337FET256-M0"||cpu()=="LPC4353FBD208"||cpu()=="LPC4353FBD208-M0"||cpu()=="LPC4353FET180"||cpu()=="LPC4353FET180-M0"||cpu()=="LPC4353FET256"||cpu()=="LPC4353FET256-M0"||cpu()=="LPC4357FBD208"||cpu()=="LPC4357FBD208-M0"||cpu()=="LPC4357FET256"||cpu()=="LPC4357FET256-M0") bitfld.long 0x00 0.--3. " DIVADDVAL , Pre-scaler Divisor Value" "No effect,1,2,3,4,5,6,7,8,9,10,11,12,13,14,?..." else bitfld.long 0x00 0.--3. " DIVADDVAL , Pre-scaler Divisor Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,?..." endif sif (cpu()=="LPC11U12/201"||cpu()=="LPC11U13/201"||cpu()=="LPC11U14/201"||cpu()=="LPC11U23/301"||cpuis("LPC11U24*")||cpuis("LPC11U3*")||cpuis("LPC11E*")||cpu()=="LPC11A02"||cpu()=="LPC11A04"||cpu()=="LPC11A11"||cpu()=="LPC11A12"||cpu()=="LPC11A13"||cpu()=="LPC11A14") group.long 0x2C++0x3 line.long 0x00 "U0OSR,Oversampling Register" hexmask.long.byte 0x00 8.--14. 1. " FDINT ,These bits act as a more-significant extension of the OSint field" bitfld.long 0x00 4.--7. " OSINT ,Integer part of the oversampling ratio" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x00 1.--3. " OSFRAC ,Fractional part of the oversampling ratio" "Reserved,0.125,0.250,0.375,0.5,0.625,0.750,0.875" group.long 0x30++0x03 line.long 0x00 "U0TER,Transmit Enable Register" bitfld.long 0x00 7. " TXEN ,Transmission Enable" "Disabled,Enabled" group.long 0x40++0x3 line.long 0x00 "U0HDEN,USART Half-duplex Enable Register" bitfld.long 0x00 0. " HDEN ,Half-duplex mode enable" "Disabled,Enabled" group.long 0x48++0x3 line.long 0x00 "U0SCICCTRL,Smart Card Interface Control register" hexmask.long.byte 0x00 8.--15. 1. " XTRAGUARD ,This field indicates the number of bit times (ETUs)" bitfld.long 0x00 5.--7. " TXRETRY ,Controls the maximum number of retransmissions" "0,1,2,3,4,5,6,7" bitfld.long 0x00 2. " PROTSEL ,Protocol selection as defined in the ISO7816-3 standard" "T=0,T=1" textline " " bitfld.long 0x00 1. " NACKDIS ,NACK response disable" "No,Yes" bitfld.long 0x00 0. " SCIEN ,Smart Card Interface Enable" "Disabled,Enabled" endif sif (cpu()=="LPC4310FBD144"||cpu()=="LPC4310FBD144-M0"||cpu()=="LPC4310FET100"||cpu()=="LPC4310FET100-M0"||cpu()=="LPC4320FBD100"||cpu()=="LPC4320FBD100-M0"||cpu()=="LPC4320FBD144"||cpu()=="LPC4320FBD144-M0"||cpu()=="LPC4320FET100"||cpu()=="LPC4320FET100-M0"||cpu()=="LPC4330FBD144"||cpu()=="LPC4330FBD144-M0"||cpu()=="LPC4330FET100"||cpu()=="LPC4330FET100-M0"||cpu()=="LPC4330FET180"||cpu()=="LPC4330FET180-M0"||cpu()=="LPC4330FET256"||cpu()=="LPC4330FET256-M0"||cpu()=="LPC4350FBD208"||cpu()=="LPC4350FBD208-M0"||cpu()=="LPC4350FET180"||cpu()=="LPC4350FET180-M0"||cpu()=="LPC4350FET256"||cpu()=="LPC4350FET256-M0"||cpu()=="LPC4333FBD144"||cpu()=="LPC4333FBD144-M0"||cpu()=="LPC4333FET100"||cpu()=="LPC4333FET100-M0"||cpu()=="LPC4333FET180"||cpu()=="LPC4333FET180-M0"||cpu()=="LPC4333FET256"||cpu()=="LPC4333FET256-M0"||cpu()=="LPC4337FBD144"||cpu()=="LPC4337FBD144-M0"||cpu()=="LPC4337FET100"||cpu()=="LPC4337FET100-M0"||cpu()=="LPC4337FET180"||cpu()=="LPC4337FET180-M0"||cpu()=="LPC4337FET256"||cpu()=="LPC4337FET256-M0"||cpu()=="LPC4353FBD208"||cpu()=="LPC4353FBD208-M0"||cpu()=="LPC4353FET180"||cpu()=="LPC4353FET180-M0"||cpu()=="LPC4353FET256"||cpu()=="LPC4353FET256-M0"||cpu()=="LPC4357FBD208"||cpu()=="LPC4357FBD208-M0"||cpu()=="LPC4357FET256"||cpu()=="LPC4357FET256-M0") group.long 0x2C++0x3 line.long 0x00 "U0OSR,Oversampling Register" hexmask.long.byte 0x00 8.--14. 1. " FDINT ,These bits act as a more-significant extension of the OSint field" bitfld.long 0x00 4.--7. " OSINT ,Integer part of the oversampling ratio" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x00 1.--3. " OSFRAC ,Fractional part of the oversampling ratio" "Reserved,0.125,0.250,0.375,0.5,0.625,0.750,0.875" group.long 0x40++0x3 line.long 0x00 "U0HDEN,USART Half-duplex Enable Register" bitfld.long 0x00 0. " HDEN ,Half-duplex mode enable" "Disabled,Enabled" if (((per.l((ad:0x4000C000+0x48)))&0x04)==0x04) group.long 0x48++0x3 line.long 0x00 "U0SCICCTRL,Smart Card Interface Control register" hexmask.long.byte 0x00 8.--15. 1. " GUARDTIME ,Extra guard time" bitfld.long 0x00 5.--7. " TXRETRY ,Controls the maximum number of retransmissions" "0,1,2,3,4,5,6,7" bitfld.long 0x00 2. " PROTSEL ,Protocol selection as defined in the ISO7816-3 standard" "T=0,T=1" textline " " bitfld.long 0x00 0. " SCIEN ,Smart Card Interface Enable" "Disabled,Enabled" else group.long 0x48++0x3 line.long 0x00 "U0SCICCTRL,Smart Card Interface Control register" hexmask.long.byte 0x00 8.--15. 1. " GUARDTIME ,Extra guard time" bitfld.long 0x00 5.--7. " TXRETRY ,Controls the maximum number of retransmissions" "0,1,2,3,4,5,6,7" bitfld.long 0x00 2. " PROTSEL ,Protocol selection as defined in the ISO7816-3 standard" "T=0,T=1" textline " " bitfld.long 0x00 1. " NACKDIS ,NACK response disable" "No,Yes" bitfld.long 0x00 0. " SCIEN ,Smart Card Interface Enable" "Disabled,Enabled" endif endif sif (cpu()=="LPC1772"||cpu()=="LPC1774"||cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778"||cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788") group.long 0x30++0x03 line.long 0x00 "U0TER,Transmit Enable Register" bitfld.long 0x00 7. " TXEN ,Transmission Enable" "Disabled,Enabled" endif sif cpuis("LPC181*")||cpuis("LPC182*")||cpuis("LPC183*")||cpuis("LPC185*") group.long 0x2C++0x03 line.long 0x00 "U0OSR,Oversampling Register" hexmask.long.byte 0x00 8.--14. 1. " FDINT ,These bits act as a more-significant extension of the OSint field" bitfld.long 0x00 4.--7. " OSINT ,Integer part of the oversampling ratio" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x00 1.--3. " OSFRAC ,Fractional part of the oversampling ratio" "Reserved,0.125,0.250,0.375,0.5,0.625,0.750,0.875" group.long 0x40++0x3 line.long 0x00 "U0HDEN,USART Half-duplex Enable Register" bitfld.long 0x00 0. " HDEN ,Half-duplex mode enable" "Disabled,Enabled" width 17. if (((per.l((ad:0x4000C000+0x48)))&0x04)==0x04) group.long 0x48++0x3 line.long 0x00 "U0SCICCTRL,Smart Card Interface Control register" hexmask.long.byte 0x00 8.--15. 1. " GUARDTIME ,Extra guard time" bitfld.long 0x00 5.--7. " TXRETRY ,Controls the maximum number of retransmissions" "0,1,2,3,4,5,6,7" bitfld.long 0x00 2. " PROTSEL ,Protocol selection as defined in the ISO7816-3 standard" "T=0,T=1" textline " " bitfld.long 0x00 0. " SCIEN ,Smart Card Interface Enable" "Disabled,Enabled" else group.long 0x48++0x3 line.long 0x00 "U0SCICCTRL,Smart Card Interface Control register" hexmask.long.byte 0x00 8.--15. 1. " GUARDTIME ,Extra guard time" bitfld.long 0x00 5.--7. " TXRETRY ,Controls the maximum number of retransmissions" "0,1,2,3,4,5,6,7" bitfld.long 0x00 2. " PROTSEL ,Protocol selection as defined in the ISO7816-3 standard" "T=0,T=1" textline " " bitfld.long 0x00 1. " NACKDIS ,NACK response disable" "No,Yes" bitfld.long 0x00 0. " SCIEN ,Smart Card Interface Enable" "Disabled,Enabled" endif endif sif (!cpuis("LPC176*")&&!cpuis("LPC175*")&&!cpuis("LPC1111*")&&!cpuis("LPC1112*")&&!cpuis("LPC1113*")&&!cpuis("LPC1114*")&&cpu()!="LPC11C12"&&cpu()!="LPC11C14"&&cpu()!="LPC1102"&&cpu()!="EM773"&&cpu()!="LPC1772"&&cpu()!="LPC1774"&&cpu()!="LPC1776"&&cpu()!="LPC1777"&&cpu()!="LPC1778"&&cpu()!="LPC1785"&&cpu()!="LPC1786"&&cpu()!="LPC1787"&&cpu()!="LPC1788"&&cpu()!="LPC11C22"&&cpu()!="LPC11C24"&&cpu()!="LPC11U12/201"&&cpu()!="LPC11U13/201"&&cpu()!="LPC11U14/201"&&cpu()!="LPC11U23/301"&&!cpuis("LPC11U24*")&&!cpuis("LPC11U3*")&&cpu()!="LPC11A02"&&cpu()!="LPC11A04"&&cpu()!="LPC11A11"&&cpu()!="LPC11A12"&&cpu()!="LPC11A13"&&cpu()!="LPC11A14"&&!cpuis("LPC11E*")&&!cpuis("LPC181*")&&!cpuis("LPC182*")&&!cpuis("LPC183*")&&!cpuis("LPC185*")&&cpu()!="LPC4310FBD144"&&cpu()!="LPC4310FBD144-M0"&&cpu()!="LPC4310FET100"&&cpu()!="LPC4310FET100-M0"&&cpu()!="LPC4320FBD100"&&cpu()!="LPC4320FBD100-M0"&&cpu()!="LPC4320FBD144"&&cpu()!="LPC4320FBD144-M0"&&cpu()!="LPC4320FET100"&&cpu()!="LPC4320FET100-M0"&&cpu()!="LPC4330FBD144"&&cpu()!="LPC4330FBD144-M0"&&cpu()!="LPC4330FET100"&&cpu()!="LPC4330FET100-M0"&&cpu()!="LPC4330FET180"&&cpu()!="LPC4330FET180-M0"&&cpu()!="LPC4330FET256"&&cpu()!="LPC4330FET256-M0"&&cpu()!="LPC4350FBD208"&&cpu()!="LPC4350FBD208-M0"&&cpu()!="LPC4350FET180"&&cpu()!="LPC4350FET180-M0"&&cpu()!="LPC4350FET256"&&cpu()!="LPC4350FET256-M0"&&cpu()!="LPC4333FBD144"&&cpu()!="LPC4333FBD144-M0"&&cpu()!="LPC4333FET100"&&cpu()!="LPC4333FET100-M0"&&cpu()!="LPC4333FET180"&&cpu()!="LPC4333FET180-M0"&&cpu()!="LPC4333FET256"&&cpu()!="LPC4333FET256-M0"&&cpu()!="LPC4337FBD144"&&cpu()!="LPC4337FBD144-M0"&&cpu()!="LPC4337FET100"&&cpu()!="LPC4337FET100-M0"&&cpu()!="LPC4337FET180"&&cpu()!="LPC4337FET180-M0"&&cpu()!="LPC4337FET256"&&cpu()!="LPC4337FET256-M0"&&cpu()!="LPC4353FBD208"&&cpu()!="LPC4353FBD208-M0"&&cpu()!="LPC4353FET180"&&cpu()!="LPC4353FET180-M0"&&cpu()!="LPC4353FET256"&&cpu()!="LPC4353FET256-M0"&&cpu()!="LPC4357FBD208"&&cpu()!="LPC4357FBD208-M0"&&cpu()!="LPC4357FET256"&&cpu()!="LPC4357FET256-M0") rgroup.long 0x58++0x03 line.long 0x00 "U0FIFOLVL,FIFO Level Register" bitfld.long 0x00 8.--11. " TXFIFOLVL ,Level of the UART transmitter FIFO" "Empty,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Full" bitfld.long 0x00 0.--3. " RXFIFILVL ,Level of the UART receiver FIFO" "Empty,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Full" endif sif (cpu()=="LPC4310FBD144"||cpu()=="LPC4310FBD144-M0"||cpu()=="LPC4310FET100"||cpu()=="LPC4310FET100-M0"||cpu()=="LPC4320FBD100"||cpu()=="LPC4320FBD100-M0"||cpu()=="LPC4320FBD144"||cpu()=="LPC4320FBD144-M0"||cpu()=="LPC4320FET100"||cpu()=="LPC4320FET100-M0"||cpu()=="LPC4330FBD144"||cpu()=="LPC4330FBD144-M0"||cpu()=="LPC4330FET100"||cpu()=="LPC4330FET100-M0"||cpu()=="LPC4330FET180"||cpu()=="LPC4330FET180-M0"||cpu()=="LPC4330FET256"||cpu()=="LPC4330FET256-M0"||cpu()=="LPC4350FBD208"||cpu()=="LPC4350FBD208-M0"||cpu()=="LPC4350FET180"||cpu()=="LPC4350FET180-M0"||cpu()=="LPC4350FET256"||cpu()=="LPC4350FET256-M0"||cpu()=="LPC4333FBD144"||cpu()=="LPC4333FBD144-M0"||cpu()=="LPC4333FET100"||cpu()=="LPC4333FET100-M0"||cpu()=="LPC4333FET180"||cpu()=="LPC4333FET180-M0"||cpu()=="LPC4333FET256"||cpu()=="LPC4333FET256-M0"||cpu()=="LPC4337FBD144"||cpu()=="LPC4337FBD144-M0"||cpu()=="LPC4337FET100"||cpu()=="LPC4337FET100-M0"||cpu()=="LPC4337FET180"||cpu()=="LPC4337FET180-M0"||cpu()=="LPC4337FET256"||cpu()=="LPC4337FET256-M0"||cpu()=="LPC4353FBD208"||cpu()=="LPC4353FBD208-M0"||cpu()=="LPC4353FET180"||cpu()=="LPC4353FET180-M0"||cpu()=="LPC4353FET256"||cpu()=="LPC4353FET256-M0"||cpu()=="LPC4357FBD208"||cpu()=="LPC4357FBD208-M0"||cpu()=="LPC4357FET256"||cpu()=="LPC4357FET256-M0"||cpuis("LPC181*")||cpuis("LPC182*")||cpuis("LPC183*")||cpuis("LPC185*")) width 17. group.long 0x4C++0x03 line.long 0x00 "U0RS485CTRL,RS485 Control register" bitfld.long 0x00 5. " OINV ,Reverses the polarity of the direction control signal on the RTS (or DTR) pin" "Not inverted,Inverted" bitfld.long 0x00 4. " DCTRL ,Auto Direction Control" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " AADEN ,Auto Address Detect" "Disabled,Enabled" bitfld.long 0x00 1. " RXDIS ,The receiver disable" "Enabled,Disabled" textline " " bitfld.long 0x00 0. " NMMEN ,Normal Multidrop Mode" "Disabled,Enabled" group.long 0x50++0x0F line.long 0x00 "U0RS485ADRMATCH,RS485 Address Match register" hexmask.long.byte 0x00 0.--7. 1. " ADRMATCH ,Address match value" line.long 0x04 "U0RS485DLY,RS-485 Delay Value Register" hexmask.long.byte 0x04 0.--7. 1. " DLY ,Direction control (RTS or DTR) delay value" line.long 0x08 "SYNCCTRL,Synchronous mode control register" bitfld.long 0x08 6. " CCCLR ,Continuous clock clear" "Software,Hardware" bitfld.long 0x08 5. " SSSDIS ,Start/stop bits" "Sent,Not sent" textline " " bitfld.long 0x08 4. " CSCEN ,Continuous master clock enable" "Disabled,Enabled" bitfld.long 0x08 3. " TSBYPASS ,Transmit synchronization bypass in synchronous slave mode" "Synchronized,Not synchronized" textline " " bitfld.long 0x08 2. " FES ,Falling edge sampling" "Rising,Falling" bitfld.long 0x08 1. " CSRC ,Clock source select" "Slave,Master" textline " " bitfld.long 0x08 0. " SYNC ,Enables synchronous mode" "Disabled,Enabled" line.long 0x0C "U0TER,Transmit Enable Register" bitfld.long 0x0C 0. " TXEN ,Transmission Enable" "Disabled,Enabled" endif sif (cpu()!="LPC4310FBD144"&&cpu()!="LPC4310FBD144-M0"&&cpu()!="LPC4310FET100"&&cpu()!="LPC4310FET100-M0"&&cpu()!="LPC4320FBD100"&&cpu()!="LPC4320FBD100-M0"&&cpu()!="LPC4320FBD144"&&cpu()!="LPC4320FBD144-M0"&&cpu()!="LPC4320FET100"&&cpu()!="LPC4320FET100-M0"&&cpu()!="LPC4330FBD144"&&cpu()!="LPC4330FBD144-M0"&&cpu()!="LPC4330FET100"&&cpu()!="LPC4330FET100-M0"&&cpu()!="LPC4330FET180"&&cpu()!="LPC4330FET180-M0"&&cpu()!="LPC4330FET256"&&cpu()!="LPC4330FET256-M0"&&cpu()!="LPC4350FBD208"&&cpu()!="LPC4350FBD208-M0"&&cpu()!="LPC4350FET180"&&cpu()!="LPC4350FET180-M0"&&cpu()!="LPC4350FET256"&&cpu()!="LPC4350FET256-M0"&&cpu()!="LPC4333FBD144"&&cpu()!="LPC4333FBD144-M0"&&cpu()!="LPC4333FET100"&&cpu()!="LPC4333FET100-M0"&&cpu()!="LPC4333FET180"&&cpu()!="LPC4333FET180-M0"&&cpu()!="LPC4333FET256"&&cpu()!="LPC4333FET256-M0"&&cpu()!="LPC4337FBD144"&&cpu()!="LPC4337FBD144-M0"&&cpu()!="LPC4337FET100"&&cpu()!="LPC4337FET100-M0"&&cpu()!="LPC4337FET180"&&cpu()!="LPC4337FET180-M0"&&cpu()!="LPC4337FET256"&&cpu()!="LPC4337FET256-M0"&&cpu()!="LPC4353FBD208"&&cpu()!="LPC4353FBD208-M0"&&cpu()!="LPC4353FET180"&&cpu()!="LPC4353FET180-M0"&&cpu()!="LPC4353FET256"&&cpu()!="LPC4353FET256-M0"&&cpu()!="LPC4357FBD208"&&cpu()!="LPC4357FBD208-M0"&&cpu()!="LPC4357FET256"&&cpu()!="LPC4357FET256-M0"&&!cpuis("LPC181*")&&!cpuis("LPC182*")&&!cpuis("LPC183*")&&!cpuis("LPC185*")) width 17. sif (cpu()!="LPC1102"&&cpu()!="LPC1102LV") group.long 0x4C++0x03 line.long 0x00 "U0RS485CTRL,RS485 Control register" bitfld.long 0x00 5. " OINV ,Reverses the polarity of the direction control signal on the RTS (or DTR) pin" "Not inverted,Inverted" bitfld.long 0x00 4. " DCTRL ,Auto Direction Control" "Disabled,Enabled" sif (cpu()!="LPC11C12"&&cpu()!="LPC11C14"&&cpu()!="LPC1102"&&cpu()!="EM773"&&cpu()!="LPC1772"&&cpu()!="LPC1774"&&cpu()!="LPC1776"&&cpu()!="LPC1777"&&cpu()!="LPC1778"&&cpu()!="LPC1785"&&cpu()!="LPC1786"&&cpu()!="LPC1787"&&cpu()!="LPC1788"&&cpu()!="LPC11C22"&&cpu()!="LPC11C24") textline " " bitfld.long 0x00 3. " SEL ,Direction control pin select" "/RTS,/DTR" endif textline " " bitfld.long 0x00 2. " AADEN ,Auto Address Detect" "Disabled,Enabled" bitfld.long 0x00 1. " RXDIS ,The receiver disable" "No,Yes" textline " " bitfld.long 0x00 0. " NMMEN ,Normal Multidrop Mode" "Disabled,Enabled" group.long 0x50++0x03 line.long 0x00 "U0RS485ADRMATCH,RS485 Address Match register" hexmask.long.byte 0x00 0.--7. 1. " ADRMATCH ,Address match value" group.long 0x54++0x03 line.long 0x00 "U0RS485DLY,RS-485 Delay Value Register" hexmask.long.byte 0x00 0.--7. 1. " DLY ,Direction control (RTS or DTR) delay value" sif (cpu()!="LPC1110"&&!cpuis("LPC1111*")&&!cpuis("LPC1112*")&&!cpuis("LPC1113*")&&!cpuis("LPC1114*")&&cpu()!="LPC11D14"&&cpu()!="LPC1112LV"&&cpu()!="LPC1114LV") group.long 0x58++0x03 line.long 0x00 "SYNCCTRL,Synchronous mode control register" bitfld.long 0x00 6. " CCCLR ,Continuous clock clear" "Software,Hardware" bitfld.long 0x00 5. " SSSDIS ,Start/stop bits" "Sent,Not sent" textline " " bitfld.long 0x00 4. " CSCEN ,Continuous master clock enable" "Disabled,Enabled" bitfld.long 0x00 3. " TSBYPASS ,Transmit synchronization bypass in synchronous slave mode" "Synchronized,Not synchronized" textline " " bitfld.long 0x00 2. " FES ,Falling edge sampling" "Rising,Falling" bitfld.long 0x00 1. " CSRC ,Clock source select" "Slave,Master" textline " " bitfld.long 0x00 0. " SYNC ,Enables synchronous mode" "Disabled,Enabled" endif else width 16. group.long 0x4C++0x03 line.long 0x00 "U0RS485CTRL,RS485 Control register" bitfld.long 0x00 2. " AADEN ,Auto Address Detect" "Disabled,Enabled" bitfld.long 0x00 1. " RXDIS ,The receiver disable" "Enabled,Disabled" bitfld.long 0x00 0. " NMMEN ,Normal Multidrop Mode" "Disabled,Enabled" group.long 0x50++0x03 line.long 0x00 "U0RS485ADRMATCH,RS485 Address Match register" hexmask.long.byte 0x00 0.--7. 1. " ADRMATCH ,Address match value" endif endif width 0xB tree.end tree "UART 1" base ad:0x40010000 width 11. if (((per.l((ad:0x40010000+0xC)))&0x80)==0x00) hgroup.long 0x00++0x03 hide.long 0x00 "U1RBR/THR,Receiver/Transmit Buffer Register" in group.long 0x04++0x03 line.long 0x00 "U1IER,Interrupt Enable Register" bitfld.long 0x00 9. " ABTOINTEN ,Auto-baud Time-out Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 8. " ABEOINTEN ,End of Auto-baud Interrupt Enable" "Disabled,Enabled" sif (cpu()!="LPC1224"&&cpu()!="LPC1225"&&cpu()!="LPC1226"&&cpu()!="LPC1227"&&cpu()!="LPC1102"&&cpu()!="LPC1102LV"&&cpu()!="LPC1110"&&!cpuis("LPC1111*")&&!cpuis("LPC1112*")&&cpu()!="LPC1112LV"&&!cpuis("LPC1113*")&&!cpuis("LPC1114*")&&cpu()!="LPC1114LV"&&!cpuis("LPC1115*")&&cpu()!="LPC11D14") textline " " bitfld.long 0x00 7. " CTSIE ,Modem status interrupt generation on a CTS1 Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " MSIE ,Modem interrupt Enable" "Disabled,Enabled" sif (cpu()=="LPC11U12/201"||cpu()=="LPC11U13/201"||cpu()=="LPC11U14/201"||cpu()=="LPC11U23/301"||cpuis("LPC11U24*")||cpuis("LPC11U3*")||cpu()=="LPC11A02"||cpu()=="LPC11A04"||cpu()=="LPC11A11"||cpu()=="LPC11A12"||cpu()=="LPC11A13"||cpu()=="LPC11A14"||cpuis("LPC11E*")) textline " " bitfld.long 0x00 3. " MSIE ,Modem interrupt Enable" "Disabled,Enabled" endif endif textline " " bitfld.long 0x00 2. " RXLSIE ,Rx Line Status Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " THREIE ,THRE Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RBRIE ,RBR Interrupt Enable" "Disabled,Enabled" else group.long 0x00++0x03 line.long 0x00 "U1DLL,Divisor Latch LSB" hexmask.long.byte 0x00 0.--7. 1. " DLLSB ,UARTn Divisor Latch LSB" group.long 0x04++0x03 line.long 0x00 "U1DLM,Divisor Latch MSB" hexmask.long.byte 0x00 0.--7. 1. " DLMSB ,UARTn Divisor Latch MSB" endif hgroup.long 0x08++0x03 hide.long 0x00 "U1IIR,Interrupt ID" in wgroup.long 0x08++0x03 line.long 0x00 "U1FCR,FIFO Control Register" bitfld.long 0x00 6.--7. " RXTRIGLVL ,Rx Trigger Level Select" "Level 0(1 char.),Level 1(4 char.),Level 2(8 char.),Level 3(14 char.)" sif (cpu()!="EM773"&&cpu()!="LPC1311"&&cpu()!="LPC1313"&&cpu()!="LPC1342"&&cpu()!="LPC1343"&&cpu()!="LPC11D14"&&cpu()!="LPC1110"&&!cpuis("LPC1111*")&&!cpuis("LPC1112*")&&cpu()!="LPC1112LV"&&!cpuis("LPC1113*")&&!cpuis("LPC1114*")&&cpu()!="LPC1114LV"&&!cpuis("LPC1115*")&&cpu()!="LPC11C12"&&cpu()!="LPC11C14"&&cpu()!="LPC1102"&&cpu()!="LPC11C22"&&cpu()!="LPC11C24"&&cpu()!="LPC11U12/201"&&cpu()!="LPC11U23/301"&&!cpuis("LPC11U24*")&&cpu()!="LPC11U13/201"&&cpu()!="LPC11U14/201"&&cpuis("LPC11U3*")&&cpu()!="LPC11A02"&&cpu()!="LPC11A04"&&cpu()!="LPC11A11"&&cpu()!="LPC11A12"&&cpu()!="LPC11A13"&&cpu()!="LPC11A14"&&!cpuis("LPC11E*")) bitfld.long 0x0 3. " DMAMODE ,DMA Mode Enable" "Disable,Enable" endif textline " " bitfld.long 0x0 2. " TXFIFORES ,Transmitter FIFO Reset" "No reset,Reset" bitfld.long 0x0 1. " RXFIFORES ,Receiver FIFO Reset" "No reset,Reset" textline " " bitfld.long 0x00 0. " FIFOENABLE ,FIFO Enable" "Disable,Enable" sif (cpu()=="LPC11A02"||cpu()=="LPC11A04"||cpu()=="LPC11A11"||cpu()=="LPC11A12"||cpu()=="LPC11A13"||cpu()=="LPC11A14"||cpuis("LPC11E*")) group.long 0x10++0x3 line.long 0x00 "U1MCR,USART Modem Control Register" bitfld.long 0x00 7. " CTSEN ,CTS enable" "Disabled,Enabled" bitfld.long 0x00 6. " RTSEN ,RTS enable" "Disabled,Enabled" bitfld.long 0x00 4. " LMS ,Loopback Mode Select" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " RTSCON ,Source for modem output pin RTS" "Active,Inactive" bitfld.long 0x00 0. " DTRCON ,Source for modem output pin DTR" "Active,Inactive" endif if ((per.l((ad:0x40010000+0xC))&0x03)==0x00) group.long 0x0C++0x03 line.long 0x00 "U1LCR,Line Control Register" bitfld.long 0x00 7. " DLAB ,Divisor Latch Access Bit" "Disabled,Enabled" bitfld.long 0x00 6. " BREAKCONTROL ,Break Control" "Disabled,Enabled" textline " " bitfld.long 0x00 4.--5. " PARITYSELECT ,Parity Select" "Odd,Even,Forced 1,Forced 0" bitfld.long 0x00 3. " PARITYENABLE ,Parity Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " SBS ,Stop Bit Select" "1 bit,1.5 bits" bitfld.long 0x00 0.--1. " WLS ,Word Length Select" "5-bit,6-bit,7-bit,8-bit" else group.long 0x0C++0x03 line.long 0x00 "U1LCR,Line Control Register" bitfld.long 0x00 7. " DLAB ,Divisor Latch Access Bit" "Disabled,Enabled" bitfld.long 0x00 6. " BREAKCONTROL ,Break Control" "Disabled,Enabled" textline " " bitfld.long 0x00 4.--5. " PARITYSELECT ,Parity Select" "Odd,Even,Forced 1,Forced 0" bitfld.long 0x00 3. " PARITYENABLE ,Parity Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " SBS ,Stop Bit Select" "1 bit,2 bits" bitfld.long 0x00 0.--1. " WLS ,Word Length Select" "5-bit,6-bit,7-bit,8-bit" endif group.long 0x10++0x03 line.long 0x00 "U1MCR,Modem Control Register" bitfld.long 0x00 7. " CTSEN ,Auto-cts flow control" "Disabled,Enabled" bitfld.long 0x00 6. " RTSEN ,Auto-rts flow" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " LOOPMODE ,Modem loopback mode select" "Disabled,Enabled" bitfld.long 0x00 1. " RTSCTRL ,Source for modem output pin RTS" "Low,High" textline " " bitfld.long 0x00 0. " DTRCTRL ,Source for modem output pin, DTR" "Low,High" sif (cpu()=="EM773"||cpu()=="LPC1311"||cpu()=="LPC1313"||cpu()=="LPC1342"||cpu()=="LPC1343"||cpu()=="LPC11D14"||cpu()=="LPC1110"||cpuis("LPC1111*")||cpuis("LPC1112*")||cpu()=="LPC1112LV"||cpuis("LPC1113*")||cpuis("LPC1114*")||cpu()=="LPC1114LV"||cpuis("LPC1115*")||cpu()=="LPC11C12"||cpu()=="LPC11C14"||cpu()=="LPC11C22"||cpu()=="LPC11C24"||cpu()=="LPC11U12/201"||cpu()=="LPC11U13/201"||cpu()=="LPC11U14/201"||cpu()=="LPC11U23/301"||cpuis("LPC11U24*")||cpuis("LPC11U3*")) group.long 0x10++0x03 line.long 0x00 "U1MCR,Modem Control Register" bitfld.long 0x00 7. " CTSEN ,Auto-cts flow control" "Disabled,Enabled" bitfld.long 0x00 6. " RTSEN ,Auto-rts flow" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " LOOPMODE ,Modem loopback mode select" "Disabled,Enabled" bitfld.long 0x00 1. " RTSCTRL ,Source for modem output pin RTS" "Low,High" textline " " bitfld.long 0x00 0. " DTRCTRL ,Source for modem output pin DTR" "Low,High" endif hgroup.long 0x14++0x03 hide.long 0x00 "U1LSR,Line Status Register" in hgroup.long 0x18++0x03 hide.long 0x00 "U1MSR,Modem Status Register" in sif (cpu()=="EM773"||cpu()=="LPC1224"||cpu()=="LPC1225"||cpu()=="LPC1226"||cpu()=="LPC1227"||cpu()=="LPC1311"||cpu()=="LPC1313"||cpu()=="LPC1342"||cpu()=="LPC1343"||cpu()=="LPC1110"||cpuis("LPC1111*")||cpuis("LPC1112*")||cpu()=="LPC1112LV"||cpuis("LPC1113*")||cpuis("LPC1114*")||cpu()=="LPC1114LV"||cpuis("LPC1115*")||cpu()=="LPC11D14"||cpu()=="LPC11C12"||cpu()=="LPC11C14"||cpu()=="LPC11C22"||cpu()=="LPC11C24"||cpu()=="LPC11U12/201"||cpu()=="LPC11U13/201"||cpu()=="LPC11U14/201"||cpu()=="LPC11U23/301"||cpuis("LPC11U24*")||cpuis("LPC11U3*")||cpuis("LPC11E*")||cpu()=="LPC11A02"||cpu()=="LPC11A04"||cpu()=="LPC11A11"||cpu()=="LPC11A12"||cpu()=="LPC11A13"||cpu()=="LPC11A14") hgroup.long 0x18++0x03 hide.long 0x00 "U1MSR,Modem Status Register" in endif group.long 0x1C++0x03 line.long 0x00 "U1SCR,Scratch Pad Register" hexmask.long.byte 0x00 0.--7. 1. " Pad ,A readable/writable byte" group.long 0x20++0x03 line.long 0x00 "U1ACR,Auto-baud Control Register" bitfld.long 0x00 9. " ABTOINTCLR ,Auto-baud Time-out Interrupt Clear Bit" "No effect,Cleared" bitfld.long 0x00 8. " ABEOINTCLR ,End of Auto-baud Interrupt Clear Bit" "No effect,Cleared" textline " " bitfld.long 0x00 2. " AUTORESTART ,Auto Restart" "Not restarted,Restarted" bitfld.long 0x00 1. " MODE ,Auto-baud Mode Select" "Mode 0,Mode 1" textline " " bitfld.long 0x00 0. " START ,Auto-baud Start" "Stopped,Started" sif (cpuis("LPC181*")||cpuis("LPC182*")||cpuis("LPC183*")||cpuis("LPC185*")||cpu()=="LPC4310FBD144"||cpu()=="LPC4310FBD144-M0"||cpu()=="LPC4310FET100"||cpu()=="LPC4310FET100-M0"||cpu()=="LPC4320FBD100"||cpu()=="LPC4320FBD100-M0"||cpu()=="LPC4320FBD144"||cpu()=="LPC4320FBD144-M0"||cpu()=="LPC4320FET100"||cpu()=="LPC4320FET100-M0"||cpu()=="LPC4330FBD144"||cpu()=="LPC4330FBD144-M0"||cpu()=="LPC4330FET100"||cpu()=="LPC4330FET100-M0"||cpu()=="LPC4330FET180"||cpu()=="LPC4330FET180-M0"||cpu()=="LPC4330FET256"||cpu()=="LPC4330FET256-M0"||cpu()=="LPC4350FBD208"||cpu()=="LPC4350FBD208-M0"||cpu()=="LPC4350FET180"||cpu()=="LPC4350FET180-M0"||cpu()=="LPC4350FET256"||cpu()=="LPC4350FET256-M0"||cpu()=="LPC4333FBD144"||cpu()=="LPC4333FBD144-M0"||cpu()=="LPC4333FET100"||cpu()=="LPC4333FET100-M0"||cpu()=="LPC4333FET180"||cpu()=="LPC4333FET180-M0"||cpu()=="LPC4333FET256"||cpu()=="LPC4333FET256-M0"||cpu()=="LPC4337FBD144"||cpu()=="LPC4337FBD144-M0"||cpu()=="LPC4337FET100"||cpu()=="LPC4337FET100-M0"||cpu()=="LPC4337FET180"||cpu()=="LPC4337FET180-M0"||cpu()=="LPC4337FET256"||cpu()=="LPC4337FET256-M0"||cpu()=="LPC4353FBD208"||cpu()=="LPC4353FBD208-M0"||cpu()=="LPC4353FET180"||cpu()=="LPC4353FET180-M0"||cpu()=="LPC4353FET256"||cpu()=="LPC4353FET256-M0"||cpu()=="LPC4357FBD208"||cpu()=="LPC4357FBD208-M0"||cpu()=="LPC4357FET256"||cpu()=="LPC4357FET256-M0") elif (cpu()!="EM773"&&cpu()!="LPC1110"&&!cpuis("LPC1111*")&&!cpuis("LPC1112*")&&cpu()!="LPC1112LV"&&!cpuis("LPC1113*")&&!cpuis("LPC1114*")&&cpu()!="LPC1114LV"&&!cpuis("LPC1115*")&&cpu()!="LPC11D14"&&cpu()!="LPC11C12"&&cpu()!="LPC11C14"&&cpu()!="LPC1102"&&cpu()!="LPC1102LV"&&cpu()!="LPC11C22"&&cpu()!="LPC11C24"&&cpu()!="LPC1224"&&cpu()!="LPC1225"&&cpu()!="LPC1226"&&cpu()!="LPC1227") elif (cpu()=="LPC1224"||cpu()=="LPC1225"||cpu()=="LPC1226"||cpu()=="LPC1227") if (((per.l((ad:0x40010000+0x24)))&0x4)==0x4) group.long 0x24++0x3 line.long 0x0 "U1ICR,IrDA Control Register" bitfld.long 0x00 0. " IRDAEN ,IrDA Enable" "Disabled,Enabled" bitfld.long 0x00 1. " IRDAINV ,IrDA Serial Input Invert" "Not inverted,Inverted" textline " " bitfld.long 0x00 2. " FIXPULSEEN ,IrDA fixed-pulse-width mode" "Disabled,Enabled" bitfld.long 0x00 3.--5. " PULSEDIV ,IrDA transmitter pulse width [us]" "2 * Tpclk,4 * Tpclk,8 * Tpclk,16 * Tpclk,32 * Tpclk,64 * Tpclk,128 * Tpclk,256 * Tpclk" else group.long 0x24++0x3 line.long 0x0 "U1ICR,IrDA Control Register" bitfld.long 0x00 0. " IRDAEN ,IrDA Enable" "Disabled,Enabled" bitfld.long 0x00 1. " IRDAINV ,IrDA Serial Input Invert" "Not inverted,Inverted" textline " " bitfld.long 0x00 2. " FIXPULSEEN ,IrDA fixed-pulse-width mode" "Disabled,Enabled" endif endif group.long 0x28++0x03 line.long 0x00 "U1FDR,Fractional Divider Register" bitfld.long 0x00 4.--7. " MULVAL , Pre-scaler Multiplier Value" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()=="EM773"||cpu()=="LPC1311"||cpu()=="LPC1313"||cpu()=="LPC1342"||cpu()=="LPC1343"||cpu()=="LPC1110"||cpuis("LPC1111*")||cpuis("LPC1112*")||cpu()=="LPC1112LV"||cpuis("LPC1113*")||cpuis("LPC1114*")||cpu()=="LPC1114LV"||cpuis("LPC1115*")||cpu()=="LPC11D14"||cpu()=="LPC11C12"||cpu()=="LPC11C14"||cpu()=="LPC1102"||cpu()=="LPC11C22"||cpu()=="LPC11C24"||cpu()=="LPC11U12/201"||cpu()=="LPC11U13/201"||cpu()=="LPC11U14/201"||cpu()=="LPC11U23/301"||cpuis("LPC11U24*")||cpuis("LPC11U3*")||cpu()=="LPC4310FBD144"||cpu()=="LPC4310FBD144-M0"||cpu()=="LPC4310FET100"||cpu()=="LPC4310FET100-M0"||cpu()=="LPC4320FBD100"||cpu()=="LPC4320FBD100-M0"||cpu()=="LPC4320FBD144"||cpu()=="LPC4320FBD144-M0"||cpu()=="LPC4320FET100"||cpu()=="LPC4320FET100-M0"||cpu()=="LPC4330FBD144"||cpu()=="LPC4330FBD144-M0"||cpu()=="LPC4330FET100"||cpu()=="LPC4330FET100-M0"||cpu()=="LPC4330FET180"||cpu()=="LPC4330FET180-M0"||cpu()=="LPC4330FET256"||cpu()=="LPC4330FET256-M0"||cpu()=="LPC4350FBD208"||cpu()=="LPC4350FBD208-M0"||cpu()=="LPC4350FET180"||cpu()=="LPC4350FET180-M0"||cpu()=="LPC4350FET256"||cpu()=="LPC4350FET256-M0"||cpu()=="LPC4333FBD144"||cpu()=="LPC4333FBD144-M0"||cpu()=="LPC4333FET100"||cpu()=="LPC4333FET100-M0"||cpu()=="LPC4333FET180"||cpu()=="LPC4333FET180-M0"||cpu()=="LPC4333FET256"||cpu()=="LPC4333FET256-M0"||cpu()=="LPC4337FBD144"||cpu()=="LPC4337FBD144-M0"||cpu()=="LPC4337FET100"||cpu()=="LPC4337FET100-M0"||cpu()=="LPC4337FET180"||cpu()=="LPC4337FET180-M0"||cpu()=="LPC4337FET256"||cpu()=="LPC4337FET256-M0"||cpu()=="LPC4353FBD208"||cpu()=="LPC4353FBD208-M0"||cpu()=="LPC4353FET180"||cpu()=="LPC4353FET180-M0"||cpu()=="LPC4353FET256"||cpu()=="LPC4353FET256-M0"||cpu()=="LPC4357FBD208"||cpu()=="LPC4357FBD208-M0"||cpu()=="LPC4357FET256"||cpu()=="LPC4357FET256-M0") bitfld.long 0x00 0.--3. " DIVADDVAL , Pre-scaler Divisor Value" "No effect,1,2,3,4,5,6,7,8,9,10,11,12,13,14,?..." else bitfld.long 0x00 0.--3. " DIVADDVAL , Pre-scaler Divisor Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,?..." endif sif (cpu()=="LPC11U12/201"||cpu()=="LPC11U13/201"||cpu()=="LPC11U14/201"||cpu()=="LPC11U23/301"||cpuis("LPC11U24*")||cpuis("LPC11U3*")||cpuis("LPC11E*")||cpu()=="LPC11A02"||cpu()=="LPC11A04"||cpu()=="LPC11A11"||cpu()=="LPC11A12"||cpu()=="LPC11A13"||cpu()=="LPC11A14") group.long 0x2C++0x3 line.long 0x00 "U1OSR,Oversampling Register" hexmask.long.byte 0x00 8.--14. 1. " FDINT ,These bits act as a more-significant extension of the OSint field" bitfld.long 0x00 4.--7. " OSINT ,Integer part of the oversampling ratio" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x00 1.--3. " OSFRAC ,Fractional part of the oversampling ratio" "Reserved,0.125,0.250,0.375,0.5,0.625,0.750,0.875" group.long 0x30++0x03 line.long 0x00 "U1TER,Transmit Enable Register" bitfld.long 0x00 7. " TXEN ,Transmission Enable" "Disabled,Enabled" group.long 0x40++0x3 line.long 0x00 "U1HDEN,USART Half-duplex Enable Register" bitfld.long 0x00 0. " HDEN ,Half-duplex mode enable" "Disabled,Enabled" group.long 0x48++0x3 line.long 0x00 "U1SCICCTRL,Smart Card Interface Control register" hexmask.long.byte 0x00 8.--15. 1. " XTRAGUARD ,This field indicates the number of bit times (ETUs)" bitfld.long 0x00 5.--7. " TXRETRY ,Controls the maximum number of retransmissions" "0,1,2,3,4,5,6,7" bitfld.long 0x00 2. " PROTSEL ,Protocol selection as defined in the ISO7816-3 standard" "T=0,T=1" textline " " bitfld.long 0x00 1. " NACKDIS ,NACK response disable" "No,Yes" bitfld.long 0x00 0. " SCIEN ,Smart Card Interface Enable" "Disabled,Enabled" endif sif (cpu()=="LPC4310FBD144"||cpu()=="LPC4310FBD144-M0"||cpu()=="LPC4310FET100"||cpu()=="LPC4310FET100-M0"||cpu()=="LPC4320FBD100"||cpu()=="LPC4320FBD100-M0"||cpu()=="LPC4320FBD144"||cpu()=="LPC4320FBD144-M0"||cpu()=="LPC4320FET100"||cpu()=="LPC4320FET100-M0"||cpu()=="LPC4330FBD144"||cpu()=="LPC4330FBD144-M0"||cpu()=="LPC4330FET100"||cpu()=="LPC4330FET100-M0"||cpu()=="LPC4330FET180"||cpu()=="LPC4330FET180-M0"||cpu()=="LPC4330FET256"||cpu()=="LPC4330FET256-M0"||cpu()=="LPC4350FBD208"||cpu()=="LPC4350FBD208-M0"||cpu()=="LPC4350FET180"||cpu()=="LPC4350FET180-M0"||cpu()=="LPC4350FET256"||cpu()=="LPC4350FET256-M0"||cpu()=="LPC4333FBD144"||cpu()=="LPC4333FBD144-M0"||cpu()=="LPC4333FET100"||cpu()=="LPC4333FET100-M0"||cpu()=="LPC4333FET180"||cpu()=="LPC4333FET180-M0"||cpu()=="LPC4333FET256"||cpu()=="LPC4333FET256-M0"||cpu()=="LPC4337FBD144"||cpu()=="LPC4337FBD144-M0"||cpu()=="LPC4337FET100"||cpu()=="LPC4337FET100-M0"||cpu()=="LPC4337FET180"||cpu()=="LPC4337FET180-M0"||cpu()=="LPC4337FET256"||cpu()=="LPC4337FET256-M0"||cpu()=="LPC4353FBD208"||cpu()=="LPC4353FBD208-M0"||cpu()=="LPC4353FET180"||cpu()=="LPC4353FET180-M0"||cpu()=="LPC4353FET256"||cpu()=="LPC4353FET256-M0"||cpu()=="LPC4357FBD208"||cpu()=="LPC4357FBD208-M0"||cpu()=="LPC4357FET256"||cpu()=="LPC4357FET256-M0") group.long 0x30++0x03 line.long 0x00 "U1TER,Transmit Enable Register" bitfld.long 0x00 7. " TXEN ,Transmission Enable" "Disabled,Enabled" endif sif (cpu()=="LPC1772"||cpu()=="LPC1774"||cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778"||cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788") group.long 0x30++0x03 line.long 0x00 "U1TER,Transmit Enable Register" bitfld.long 0x00 7. " TXEN ,Transmission Enable" "Disabled,Enabled" endif sif cpuis("LPC181*")||cpuis("LPC182*")||cpuis("LPC183*")||cpuis("LPC185*") endif sif (!cpuis("LPC176*")&&!cpuis("LPC175*")&&!cpuis("LPC1111*")&&!cpuis("LPC1112*")&&!cpuis("LPC1113*")&&!cpuis("LPC1114*")&&cpu()!="LPC11C12"&&cpu()!="LPC11C14"&&cpu()!="LPC1102"&&cpu()!="EM773"&&cpu()!="LPC1772"&&cpu()!="LPC1774"&&cpu()!="LPC1776"&&cpu()!="LPC1777"&&cpu()!="LPC1778"&&cpu()!="LPC1785"&&cpu()!="LPC1786"&&cpu()!="LPC1787"&&cpu()!="LPC1788"&&cpu()!="LPC11C22"&&cpu()!="LPC11C24"&&cpu()!="LPC11U12/201"&&cpu()!="LPC11U13/201"&&cpu()!="LPC11U14/201"&&cpu()!="LPC11U23/301"&&!cpuis("LPC11U24*")&&!cpuis("LPC11U3*")&&cpu()!="LPC11A02"&&cpu()!="LPC11A04"&&cpu()!="LPC11A11"&&cpu()!="LPC11A12"&&cpu()!="LPC11A13"&&cpu()!="LPC11A14"&&!cpuis("LPC11E*")&&!cpuis("LPC181*")&&!cpuis("LPC182*")&&!cpuis("LPC183*")&&!cpuis("LPC185*")&&cpu()!="LPC4310FBD144"&&cpu()!="LPC4310FBD144-M0"&&cpu()!="LPC4310FET100"&&cpu()!="LPC4310FET100-M0"&&cpu()!="LPC4320FBD100"&&cpu()!="LPC4320FBD100-M0"&&cpu()!="LPC4320FBD144"&&cpu()!="LPC4320FBD144-M0"&&cpu()!="LPC4320FET100"&&cpu()!="LPC4320FET100-M0"&&cpu()!="LPC4330FBD144"&&cpu()!="LPC4330FBD144-M0"&&cpu()!="LPC4330FET100"&&cpu()!="LPC4330FET100-M0"&&cpu()!="LPC4330FET180"&&cpu()!="LPC4330FET180-M0"&&cpu()!="LPC4330FET256"&&cpu()!="LPC4330FET256-M0"&&cpu()!="LPC4350FBD208"&&cpu()!="LPC4350FBD208-M0"&&cpu()!="LPC4350FET180"&&cpu()!="LPC4350FET180-M0"&&cpu()!="LPC4350FET256"&&cpu()!="LPC4350FET256-M0"&&cpu()!="LPC4333FBD144"&&cpu()!="LPC4333FBD144-M0"&&cpu()!="LPC4333FET100"&&cpu()!="LPC4333FET100-M0"&&cpu()!="LPC4333FET180"&&cpu()!="LPC4333FET180-M0"&&cpu()!="LPC4333FET256"&&cpu()!="LPC4333FET256-M0"&&cpu()!="LPC4337FBD144"&&cpu()!="LPC4337FBD144-M0"&&cpu()!="LPC4337FET100"&&cpu()!="LPC4337FET100-M0"&&cpu()!="LPC4337FET180"&&cpu()!="LPC4337FET180-M0"&&cpu()!="LPC4337FET256"&&cpu()!="LPC4337FET256-M0"&&cpu()!="LPC4353FBD208"&&cpu()!="LPC4353FBD208-M0"&&cpu()!="LPC4353FET180"&&cpu()!="LPC4353FET180-M0"&&cpu()!="LPC4353FET256"&&cpu()!="LPC4353FET256-M0"&&cpu()!="LPC4357FBD208"&&cpu()!="LPC4357FBD208-M0"&&cpu()!="LPC4357FET256"&&cpu()!="LPC4357FET256-M0") rgroup.long 0x58++0x03 line.long 0x00 "U1FIFOLVL,FIFO Level Register" bitfld.long 0x00 8.--11. " TXFIFOLVL ,Level of the UART transmitter FIFO" "Empty,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Full" bitfld.long 0x00 0.--3. " RXFIFILVL ,Level of the UART receiver FIFO" "Empty,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Full" endif sif (cpu()=="LPC4310FBD144"||cpu()=="LPC4310FBD144-M0"||cpu()=="LPC4310FET100"||cpu()=="LPC4310FET100-M0"||cpu()=="LPC4320FBD100"||cpu()=="LPC4320FBD100-M0"||cpu()=="LPC4320FBD144"||cpu()=="LPC4320FBD144-M0"||cpu()=="LPC4320FET100"||cpu()=="LPC4320FET100-M0"||cpu()=="LPC4330FBD144"||cpu()=="LPC4330FBD144-M0"||cpu()=="LPC4330FET100"||cpu()=="LPC4330FET100-M0"||cpu()=="LPC4330FET180"||cpu()=="LPC4330FET180-M0"||cpu()=="LPC4330FET256"||cpu()=="LPC4330FET256-M0"||cpu()=="LPC4350FBD208"||cpu()=="LPC4350FBD208-M0"||cpu()=="LPC4350FET180"||cpu()=="LPC4350FET180-M0"||cpu()=="LPC4350FET256"||cpu()=="LPC4350FET256-M0"||cpu()=="LPC4333FBD144"||cpu()=="LPC4333FBD144-M0"||cpu()=="LPC4333FET100"||cpu()=="LPC4333FET100-M0"||cpu()=="LPC4333FET180"||cpu()=="LPC4333FET180-M0"||cpu()=="LPC4333FET256"||cpu()=="LPC4333FET256-M0"||cpu()=="LPC4337FBD144"||cpu()=="LPC4337FBD144-M0"||cpu()=="LPC4337FET100"||cpu()=="LPC4337FET100-M0"||cpu()=="LPC4337FET180"||cpu()=="LPC4337FET180-M0"||cpu()=="LPC4337FET256"||cpu()=="LPC4337FET256-M0"||cpu()=="LPC4353FBD208"||cpu()=="LPC4353FBD208-M0"||cpu()=="LPC4353FET180"||cpu()=="LPC4353FET180-M0"||cpu()=="LPC4353FET256"||cpu()=="LPC4353FET256-M0"||cpu()=="LPC4357FBD208"||cpu()=="LPC4357FBD208-M0"||cpu()=="LPC4357FET256"||cpu()=="LPC4357FET256-M0"||cpuis("LPC181*")||cpuis("LPC182*")||cpuis("LPC183*")||cpuis("LPC185*")) width 17. group.long 0x4C++0x03 line.long 0x00 "U1RS485CTRL,RS485 Control register" bitfld.long 0x00 5. " OINV ,Reverses the polarity of the direction control signal on the RTS (or DTR) pin" "Not inverted,Inverted" bitfld.long 0x00 4. " DCTRL ,Auto Direction Control" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " SEL ,Direction control pin select" "/RTS,/DTR" bitfld.long 0x00 2. " AADEN ,Auto Address Detect" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " RXDIS ,The receiver disable" "Enabled,Disabled" bitfld.long 0x00 0. " NMMEN ,Normal Multidrop Mode" "Disabled,Enabled" group.long 0x50++0x07 line.long 0x00 "U1RS485ADRMATCH,RS485 Address Match register" hexmask.long.byte 0x00 0.--7. 1. " ADRMATCH ,Address match value" line.long 0x04 "U1RS485DLY,RS-485 Delay Value Register" hexmask.long.byte 0x04 0.--7. 1. " DLY ,Direction control (RTS or DTR) delay value" sif (cpuis("LPC181*")||cpuis("LPC182*")||cpuis("LPC183*")||cpuis("LPC185*")) group.long 0x5C++0x03 line.long 0x00 "U1TER,Transmit Enable Register" bitfld.long 0x00 0. " TXEN ,Transmission Enable" "Disabled,Enabled" endif endif sif (cpu()!="LPC4310FBD144"&&cpu()!="LPC4310FBD144-M0"&&cpu()!="LPC4310FET100"&&cpu()!="LPC4310FET100-M0"&&cpu()!="LPC4320FBD100"&&cpu()!="LPC4320FBD100-M0"&&cpu()!="LPC4320FBD144"&&cpu()!="LPC4320FBD144-M0"&&cpu()!="LPC4320FET100"&&cpu()!="LPC4320FET100-M0"&&cpu()!="LPC4330FBD144"&&cpu()!="LPC4330FBD144-M0"&&cpu()!="LPC4330FET100"&&cpu()!="LPC4330FET100-M0"&&cpu()!="LPC4330FET180"&&cpu()!="LPC4330FET180-M0"&&cpu()!="LPC4330FET256"&&cpu()!="LPC4330FET256-M0"&&cpu()!="LPC4350FBD208"&&cpu()!="LPC4350FBD208-M0"&&cpu()!="LPC4350FET180"&&cpu()!="LPC4350FET180-M0"&&cpu()!="LPC4350FET256"&&cpu()!="LPC4350FET256-M0"&&cpu()!="LPC4333FBD144"&&cpu()!="LPC4333FBD144-M0"&&cpu()!="LPC4333FET100"&&cpu()!="LPC4333FET100-M0"&&cpu()!="LPC4333FET180"&&cpu()!="LPC4333FET180-M0"&&cpu()!="LPC4333FET256"&&cpu()!="LPC4333FET256-M0"&&cpu()!="LPC4337FBD144"&&cpu()!="LPC4337FBD144-M0"&&cpu()!="LPC4337FET100"&&cpu()!="LPC4337FET100-M0"&&cpu()!="LPC4337FET180"&&cpu()!="LPC4337FET180-M0"&&cpu()!="LPC4337FET256"&&cpu()!="LPC4337FET256-M0"&&cpu()!="LPC4353FBD208"&&cpu()!="LPC4353FBD208-M0"&&cpu()!="LPC4353FET180"&&cpu()!="LPC4353FET180-M0"&&cpu()!="LPC4353FET256"&&cpu()!="LPC4353FET256-M0"&&cpu()!="LPC4357FBD208"&&cpu()!="LPC4357FBD208-M0"&&cpu()!="LPC4357FET256"&&cpu()!="LPC4357FET256-M0"&&!cpuis("LPC181*")&&!cpuis("LPC182*")&&!cpuis("LPC183*")&&!cpuis("LPC185*")) endif width 0xB tree.end tree "UART 2" base ad:0x40098000 width 11. if (((per.l((ad:0x40098000+0xC)))&0x80)==0x00) hgroup.long 0x00++0x03 hide.long 0x00 "U2RBR/THR,Receiver/Transmit Buffer Register" in group.long 0x04++0x03 line.long 0x00 "U2IER,Interrupt Enable Register" bitfld.long 0x00 9. " ABTOINTEN ,Auto-baud Time-out Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 8. " ABEOINTEN ,End of Auto-baud Interrupt Enable" "Disabled,Enabled" sif (cpu()!="LPC1224"&&cpu()!="LPC1225"&&cpu()!="LPC1226"&&cpu()!="LPC1227"&&cpu()!="LPC1102"&&cpu()!="LPC1102LV"&&cpu()!="LPC1110"&&!cpuis("LPC1111*")&&!cpuis("LPC1112*")&&cpu()!="LPC1112LV"&&!cpuis("LPC1113*")&&!cpuis("LPC1114*")&&cpu()!="LPC1114LV"&&!cpuis("LPC1115*")&&cpu()!="LPC11D14") sif (cpu()=="LPC11U12/201"||cpu()=="LPC11U13/201"||cpu()=="LPC11U14/201"||cpu()=="LPC11U23/301"||cpuis("LPC11U24*")||cpuis("LPC11U3*")||cpu()=="LPC11A02"||cpu()=="LPC11A04"||cpu()=="LPC11A11"||cpu()=="LPC11A12"||cpu()=="LPC11A13"||cpu()=="LPC11A14"||cpuis("LPC11E*")) textline " " bitfld.long 0x00 3. " MSIE ,Modem interrupt Enable" "Disabled,Enabled" endif endif textline " " bitfld.long 0x00 2. " RXLSIE ,Rx Line Status Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " THREIE ,THRE Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RBRIE ,RBR Interrupt Enable" "Disabled,Enabled" else group.long 0x00++0x03 line.long 0x00 "U2DLL,Divisor Latch LSB" hexmask.long.byte 0x00 0.--7. 1. " DLLSB ,UARTn Divisor Latch LSB" group.long 0x04++0x03 line.long 0x00 "U2DLM,Divisor Latch MSB" hexmask.long.byte 0x00 0.--7. 1. " DLMSB ,UARTn Divisor Latch MSB" endif hgroup.long 0x08++0x03 hide.long 0x00 "U2IIR,Interrupt ID" in wgroup.long 0x08++0x03 line.long 0x00 "U2FCR,FIFO Control Register" bitfld.long 0x00 6.--7. " RXTRIGLVL ,Rx Trigger Level Select" "Level 0(1 char.),Level 1(4 char.),Level 2(8 char.),Level 3(14 char.)" sif (cpu()!="EM773"&&cpu()!="LPC1311"&&cpu()!="LPC1313"&&cpu()!="LPC1342"&&cpu()!="LPC1343"&&cpu()!="LPC11D14"&&cpu()!="LPC1110"&&!cpuis("LPC1111*")&&!cpuis("LPC1112*")&&cpu()!="LPC1112LV"&&!cpuis("LPC1113*")&&!cpuis("LPC1114*")&&cpu()!="LPC1114LV"&&!cpuis("LPC1115*")&&cpu()!="LPC11C12"&&cpu()!="LPC11C14"&&cpu()!="LPC1102"&&cpu()!="LPC11C22"&&cpu()!="LPC11C24"&&cpu()!="LPC11U12/201"&&cpu()!="LPC11U23/301"&&!cpuis("LPC11U24*")&&cpu()!="LPC11U13/201"&&cpu()!="LPC11U14/201"&&cpuis("LPC11U3*")&&cpu()!="LPC11A02"&&cpu()!="LPC11A04"&&cpu()!="LPC11A11"&&cpu()!="LPC11A12"&&cpu()!="LPC11A13"&&cpu()!="LPC11A14"&&!cpuis("LPC11E*")) bitfld.long 0x0 3. " DMAMODE ,DMA Mode Enable" "Disable,Enable" endif textline " " bitfld.long 0x0 2. " TXFIFORES ,Transmitter FIFO Reset" "No reset,Reset" bitfld.long 0x0 1. " RXFIFORES ,Receiver FIFO Reset" "No reset,Reset" textline " " bitfld.long 0x00 0. " FIFOENABLE ,FIFO Enable" "Disable,Enable" sif (cpu()=="LPC11A02"||cpu()=="LPC11A04"||cpu()=="LPC11A11"||cpu()=="LPC11A12"||cpu()=="LPC11A13"||cpu()=="LPC11A14"||cpuis("LPC11E*")) group.long 0x10++0x3 line.long 0x00 "U2MCR,USART Modem Control Register" bitfld.long 0x00 7. " CTSEN ,CTS enable" "Disabled,Enabled" bitfld.long 0x00 6. " RTSEN ,RTS enable" "Disabled,Enabled" bitfld.long 0x00 4. " LMS ,Loopback Mode Select" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " RTSCON ,Source for modem output pin RTS" "Active,Inactive" bitfld.long 0x00 0. " DTRCON ,Source for modem output pin DTR" "Active,Inactive" endif if ((per.l((ad:0x40098000+0xC))&0x03)==0x00) group.long 0x0C++0x03 line.long 0x00 "U2LCR,Line Control Register" bitfld.long 0x00 7. " DLAB ,Divisor Latch Access Bit" "Disabled,Enabled" bitfld.long 0x00 6. " BREAKCONTROL ,Break Control" "Disabled,Enabled" textline " " bitfld.long 0x00 4.--5. " PARITYSELECT ,Parity Select" "Odd,Even,Forced 1,Forced 0" bitfld.long 0x00 3. " PARITYENABLE ,Parity Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " SBS ,Stop Bit Select" "1 bit,1.5 bits" bitfld.long 0x00 0.--1. " WLS ,Word Length Select" "5-bit,6-bit,7-bit,8-bit" else group.long 0x0C++0x03 line.long 0x00 "U2LCR,Line Control Register" bitfld.long 0x00 7. " DLAB ,Divisor Latch Access Bit" "Disabled,Enabled" bitfld.long 0x00 6. " BREAKCONTROL ,Break Control" "Disabled,Enabled" textline " " bitfld.long 0x00 4.--5. " PARITYSELECT ,Parity Select" "Odd,Even,Forced 1,Forced 0" bitfld.long 0x00 3. " PARITYENABLE ,Parity Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " SBS ,Stop Bit Select" "1 bit,2 bits" bitfld.long 0x00 0.--1. " WLS ,Word Length Select" "5-bit,6-bit,7-bit,8-bit" endif sif (cpu()=="EM773"||cpu()=="LPC1311"||cpu()=="LPC1313"||cpu()=="LPC1342"||cpu()=="LPC1343"||cpu()=="LPC11D14"||cpu()=="LPC1110"||cpuis("LPC1111*")||cpuis("LPC1112*")||cpu()=="LPC1112LV"||cpuis("LPC1113*")||cpuis("LPC1114*")||cpu()=="LPC1114LV"||cpuis("LPC1115*")||cpu()=="LPC11C12"||cpu()=="LPC11C14"||cpu()=="LPC11C22"||cpu()=="LPC11C24"||cpu()=="LPC11U12/201"||cpu()=="LPC11U13/201"||cpu()=="LPC11U14/201"||cpu()=="LPC11U23/301"||cpuis("LPC11U24*")||cpuis("LPC11U3*")) group.long 0x10++0x03 line.long 0x00 "U2MCR,Modem Control Register" bitfld.long 0x00 7. " CTSEN ,Auto-cts flow control" "Disabled,Enabled" bitfld.long 0x00 6. " RTSEN ,Auto-rts flow" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " LOOPMODE ,Modem loopback mode select" "Disabled,Enabled" bitfld.long 0x00 1. " RTSCTRL ,Source for modem output pin RTS" "Low,High" textline " " bitfld.long 0x00 0. " DTRCTRL ,Source for modem output pin DTR" "Low,High" endif hgroup.long 0x14++0x03 hide.long 0x00 "U2LSR,Line Status Register" in sif (cpu()=="EM773"||cpu()=="LPC1224"||cpu()=="LPC1225"||cpu()=="LPC1226"||cpu()=="LPC1227"||cpu()=="LPC1311"||cpu()=="LPC1313"||cpu()=="LPC1342"||cpu()=="LPC1343"||cpu()=="LPC1110"||cpuis("LPC1111*")||cpuis("LPC1112*")||cpu()=="LPC1112LV"||cpuis("LPC1113*")||cpuis("LPC1114*")||cpu()=="LPC1114LV"||cpuis("LPC1115*")||cpu()=="LPC11D14"||cpu()=="LPC11C12"||cpu()=="LPC11C14"||cpu()=="LPC11C22"||cpu()=="LPC11C24"||cpu()=="LPC11U12/201"||cpu()=="LPC11U13/201"||cpu()=="LPC11U14/201"||cpu()=="LPC11U23/301"||cpuis("LPC11U24*")||cpuis("LPC11U3*")||cpuis("LPC11E*")||cpu()=="LPC11A02"||cpu()=="LPC11A04"||cpu()=="LPC11A11"||cpu()=="LPC11A12"||cpu()=="LPC11A13"||cpu()=="LPC11A14") hgroup.long 0x18++0x03 hide.long 0x00 "U2MSR,Modem Status Register" in endif group.long 0x1C++0x03 line.long 0x00 "U2SCR,Scratch Pad Register" hexmask.long.byte 0x00 0.--7. 1. " Pad ,A readable/writable byte" group.long 0x20++0x03 line.long 0x00 "U2ACR,Auto-baud Control Register" bitfld.long 0x00 9. " ABTOINTCLR ,Auto-baud Time-out Interrupt Clear Bit" "No effect,Cleared" bitfld.long 0x00 8. " ABEOINTCLR ,End of Auto-baud Interrupt Clear Bit" "No effect,Cleared" textline " " bitfld.long 0x00 2. " AUTORESTART ,Auto Restart" "Not restarted,Restarted" bitfld.long 0x00 1. " MODE ,Auto-baud Mode Select" "Mode 0,Mode 1" textline " " bitfld.long 0x00 0. " START ,Auto-baud Start" "Stopped,Started" sif (cpuis("LPC181*")||cpuis("LPC182*")||cpuis("LPC183*")||cpuis("LPC185*")||cpu()=="LPC4310FBD144"||cpu()=="LPC4310FBD144-M0"||cpu()=="LPC4310FET100"||cpu()=="LPC4310FET100-M0"||cpu()=="LPC4320FBD100"||cpu()=="LPC4320FBD100-M0"||cpu()=="LPC4320FBD144"||cpu()=="LPC4320FBD144-M0"||cpu()=="LPC4320FET100"||cpu()=="LPC4320FET100-M0"||cpu()=="LPC4330FBD144"||cpu()=="LPC4330FBD144-M0"||cpu()=="LPC4330FET100"||cpu()=="LPC4330FET100-M0"||cpu()=="LPC4330FET180"||cpu()=="LPC4330FET180-M0"||cpu()=="LPC4330FET256"||cpu()=="LPC4330FET256-M0"||cpu()=="LPC4350FBD208"||cpu()=="LPC4350FBD208-M0"||cpu()=="LPC4350FET180"||cpu()=="LPC4350FET180-M0"||cpu()=="LPC4350FET256"||cpu()=="LPC4350FET256-M0"||cpu()=="LPC4333FBD144"||cpu()=="LPC4333FBD144-M0"||cpu()=="LPC4333FET100"||cpu()=="LPC4333FET100-M0"||cpu()=="LPC4333FET180"||cpu()=="LPC4333FET180-M0"||cpu()=="LPC4333FET256"||cpu()=="LPC4333FET256-M0"||cpu()=="LPC4337FBD144"||cpu()=="LPC4337FBD144-M0"||cpu()=="LPC4337FET100"||cpu()=="LPC4337FET100-M0"||cpu()=="LPC4337FET180"||cpu()=="LPC4337FET180-M0"||cpu()=="LPC4337FET256"||cpu()=="LPC4337FET256-M0"||cpu()=="LPC4353FBD208"||cpu()=="LPC4353FBD208-M0"||cpu()=="LPC4353FET180"||cpu()=="LPC4353FET180-M0"||cpu()=="LPC4353FET256"||cpu()=="LPC4353FET256-M0"||cpu()=="LPC4357FBD208"||cpu()=="LPC4357FBD208-M0"||cpu()=="LPC4357FET256"||cpu()=="LPC4357FET256-M0") elif (cpu()!="EM773"&&cpu()!="LPC1110"&&!cpuis("LPC1111*")&&!cpuis("LPC1112*")&&cpu()!="LPC1112LV"&&!cpuis("LPC1113*")&&!cpuis("LPC1114*")&&cpu()!="LPC1114LV"&&!cpuis("LPC1115*")&&cpu()!="LPC11D14"&&cpu()!="LPC11C12"&&cpu()!="LPC11C14"&&cpu()!="LPC1102"&&cpu()!="LPC1102LV"&&cpu()!="LPC11C22"&&cpu()!="LPC11C24"&&cpu()!="LPC1224"&&cpu()!="LPC1225"&&cpu()!="LPC1226"&&cpu()!="LPC1227") if (((per.l((ad:0x40098000+0x24)))&0x4)==0x4) group.long 0x24++0x3 line.long 0x0 "U2ICR,IrDA Control Register" sif cpu()=="LPC11U12/201"||cpu()=="LPC11U13/x201"||cpu()=="LPC11U14/201"||cpu()=="LPC11U23/301"||cpuis("LPC11U24*")||cpuis("LPC11U3*")||cpuis("LPC11E*") bitfld.long 0x00 3.--5. " PULSEDIV ,IrDA transmitter pulse width [us]" "3/(16 * baud rate),2 * Tpclk,4 * Tpclk,8 * Tpclk,16 * Tpclk,32 * Tpclk,64 * Tpclk,128 * Tpclk" else bitfld.long 0x00 3.--5. " PULSEDIV ,IrDA transmitter pulse width [us]" "2 * Tpclk,4 * Tpclk,8 * Tpclk,16 * Tpclk,32 * Tpclk,64 * Tpclk,128 * Tpclk,256 * Tpclk" endif textline " " bitfld.long 0x00 2. " FIXPULSEEN ,IrDA fixed-pulse-width mode" "Disabled,Enabled" bitfld.long 0x00 1. " IRDAINV ,IrDA Serial Input Invert" "Not inverted,Inverted" textline " " bitfld.long 0x00 0. " IRDAEN ,IrDA Enable" "Disabled,Enabled" else group.long 0x24++0x3 line.long 0x0 "U2ICR,IrDA Control Register" textline " " bitfld.long 0x00 2. " FIXPULSEEN ,IrDA fixed-pulse-width mode" "Disabled,Enabled" bitfld.long 0x00 1. " IRDAINV ,IrDA Serial Input Invert" "Not inverted,Inverted" textline " " bitfld.long 0x00 0. " IRDAEN ,IrDA Enable" "Disabled,Enabled" endif elif (cpu()=="LPC1224"||cpu()=="LPC1225"||cpu()=="LPC1226"||cpu()=="LPC1227") endif group.long 0x28++0x03 line.long 0x00 "U2FDR,Fractional Divider Register" bitfld.long 0x00 4.--7. " MULVAL , Pre-scaler Multiplier Value" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()=="EM773"||cpu()=="LPC1311"||cpu()=="LPC1313"||cpu()=="LPC1342"||cpu()=="LPC1343"||cpu()=="LPC1110"||cpuis("LPC1111*")||cpuis("LPC1112*")||cpu()=="LPC1112LV"||cpuis("LPC1113*")||cpuis("LPC1114*")||cpu()=="LPC1114LV"||cpuis("LPC1115*")||cpu()=="LPC11D14"||cpu()=="LPC11C12"||cpu()=="LPC11C14"||cpu()=="LPC1102"||cpu()=="LPC11C22"||cpu()=="LPC11C24"||cpu()=="LPC11U12/201"||cpu()=="LPC11U13/201"||cpu()=="LPC11U14/201"||cpu()=="LPC11U23/301"||cpuis("LPC11U24*")||cpuis("LPC11U3*")||cpu()=="LPC4310FBD144"||cpu()=="LPC4310FBD144-M0"||cpu()=="LPC4310FET100"||cpu()=="LPC4310FET100-M0"||cpu()=="LPC4320FBD100"||cpu()=="LPC4320FBD100-M0"||cpu()=="LPC4320FBD144"||cpu()=="LPC4320FBD144-M0"||cpu()=="LPC4320FET100"||cpu()=="LPC4320FET100-M0"||cpu()=="LPC4330FBD144"||cpu()=="LPC4330FBD144-M0"||cpu()=="LPC4330FET100"||cpu()=="LPC4330FET100-M0"||cpu()=="LPC4330FET180"||cpu()=="LPC4330FET180-M0"||cpu()=="LPC4330FET256"||cpu()=="LPC4330FET256-M0"||cpu()=="LPC4350FBD208"||cpu()=="LPC4350FBD208-M0"||cpu()=="LPC4350FET180"||cpu()=="LPC4350FET180-M0"||cpu()=="LPC4350FET256"||cpu()=="LPC4350FET256-M0"||cpu()=="LPC4333FBD144"||cpu()=="LPC4333FBD144-M0"||cpu()=="LPC4333FET100"||cpu()=="LPC4333FET100-M0"||cpu()=="LPC4333FET180"||cpu()=="LPC4333FET180-M0"||cpu()=="LPC4333FET256"||cpu()=="LPC4333FET256-M0"||cpu()=="LPC4337FBD144"||cpu()=="LPC4337FBD144-M0"||cpu()=="LPC4337FET100"||cpu()=="LPC4337FET100-M0"||cpu()=="LPC4337FET180"||cpu()=="LPC4337FET180-M0"||cpu()=="LPC4337FET256"||cpu()=="LPC4337FET256-M0"||cpu()=="LPC4353FBD208"||cpu()=="LPC4353FBD208-M0"||cpu()=="LPC4353FET180"||cpu()=="LPC4353FET180-M0"||cpu()=="LPC4353FET256"||cpu()=="LPC4353FET256-M0"||cpu()=="LPC4357FBD208"||cpu()=="LPC4357FBD208-M0"||cpu()=="LPC4357FET256"||cpu()=="LPC4357FET256-M0") bitfld.long 0x00 0.--3. " DIVADDVAL , Pre-scaler Divisor Value" "No effect,1,2,3,4,5,6,7,8,9,10,11,12,13,14,?..." else bitfld.long 0x00 0.--3. " DIVADDVAL , Pre-scaler Divisor Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,?..." endif sif (cpu()=="LPC11U12/201"||cpu()=="LPC11U13/201"||cpu()=="LPC11U14/201"||cpu()=="LPC11U23/301"||cpuis("LPC11U24*")||cpuis("LPC11U3*")||cpuis("LPC11E*")||cpu()=="LPC11A02"||cpu()=="LPC11A04"||cpu()=="LPC11A11"||cpu()=="LPC11A12"||cpu()=="LPC11A13"||cpu()=="LPC11A14") group.long 0x2C++0x3 line.long 0x00 "U2OSR,Oversampling Register" hexmask.long.byte 0x00 8.--14. 1. " FDINT ,These bits act as a more-significant extension of the OSint field" bitfld.long 0x00 4.--7. " OSINT ,Integer part of the oversampling ratio" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x00 1.--3. " OSFRAC ,Fractional part of the oversampling ratio" "Reserved,0.125,0.250,0.375,0.5,0.625,0.750,0.875" group.long 0x30++0x03 line.long 0x00 "U2TER,Transmit Enable Register" bitfld.long 0x00 7. " TXEN ,Transmission Enable" "Disabled,Enabled" group.long 0x40++0x3 line.long 0x00 "U2HDEN,USART Half-duplex Enable Register" bitfld.long 0x00 0. " HDEN ,Half-duplex mode enable" "Disabled,Enabled" group.long 0x48++0x3 line.long 0x00 "U2SCICCTRL,Smart Card Interface Control register" hexmask.long.byte 0x00 8.--15. 1. " XTRAGUARD ,This field indicates the number of bit times (ETUs)" bitfld.long 0x00 5.--7. " TXRETRY ,Controls the maximum number of retransmissions" "0,1,2,3,4,5,6,7" bitfld.long 0x00 2. " PROTSEL ,Protocol selection as defined in the ISO7816-3 standard" "T=0,T=1" textline " " bitfld.long 0x00 1. " NACKDIS ,NACK response disable" "No,Yes" bitfld.long 0x00 0. " SCIEN ,Smart Card Interface Enable" "Disabled,Enabled" endif sif (cpu()=="LPC4310FBD144"||cpu()=="LPC4310FBD144-M0"||cpu()=="LPC4310FET100"||cpu()=="LPC4310FET100-M0"||cpu()=="LPC4320FBD100"||cpu()=="LPC4320FBD100-M0"||cpu()=="LPC4320FBD144"||cpu()=="LPC4320FBD144-M0"||cpu()=="LPC4320FET100"||cpu()=="LPC4320FET100-M0"||cpu()=="LPC4330FBD144"||cpu()=="LPC4330FBD144-M0"||cpu()=="LPC4330FET100"||cpu()=="LPC4330FET100-M0"||cpu()=="LPC4330FET180"||cpu()=="LPC4330FET180-M0"||cpu()=="LPC4330FET256"||cpu()=="LPC4330FET256-M0"||cpu()=="LPC4350FBD208"||cpu()=="LPC4350FBD208-M0"||cpu()=="LPC4350FET180"||cpu()=="LPC4350FET180-M0"||cpu()=="LPC4350FET256"||cpu()=="LPC4350FET256-M0"||cpu()=="LPC4333FBD144"||cpu()=="LPC4333FBD144-M0"||cpu()=="LPC4333FET100"||cpu()=="LPC4333FET100-M0"||cpu()=="LPC4333FET180"||cpu()=="LPC4333FET180-M0"||cpu()=="LPC4333FET256"||cpu()=="LPC4333FET256-M0"||cpu()=="LPC4337FBD144"||cpu()=="LPC4337FBD144-M0"||cpu()=="LPC4337FET100"||cpu()=="LPC4337FET100-M0"||cpu()=="LPC4337FET180"||cpu()=="LPC4337FET180-M0"||cpu()=="LPC4337FET256"||cpu()=="LPC4337FET256-M0"||cpu()=="LPC4353FBD208"||cpu()=="LPC4353FBD208-M0"||cpu()=="LPC4353FET180"||cpu()=="LPC4353FET180-M0"||cpu()=="LPC4353FET256"||cpu()=="LPC4353FET256-M0"||cpu()=="LPC4357FBD208"||cpu()=="LPC4357FBD208-M0"||cpu()=="LPC4357FET256"||cpu()=="LPC4357FET256-M0") group.long 0x2C++0x3 line.long 0x00 "U2OSR,Oversampling Register" hexmask.long.byte 0x00 8.--14. 1. " FDINT ,These bits act as a more-significant extension of the OSint field" bitfld.long 0x00 4.--7. " OSINT ,Integer part of the oversampling ratio" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x00 1.--3. " OSFRAC ,Fractional part of the oversampling ratio" "Reserved,0.125,0.250,0.375,0.5,0.625,0.750,0.875" group.long 0x40++0x3 line.long 0x00 "U2HDEN,USART Half-duplex Enable Register" bitfld.long 0x00 0. " HDEN ,Half-duplex mode enable" "Disabled,Enabled" if (((per.l((ad:0x40098000+0x48)))&0x04)==0x04) group.long 0x48++0x3 line.long 0x00 "U2SCICCTRL,Smart Card Interface Control register" hexmask.long.byte 0x00 8.--15. 1. " GUARDTIME ,Extra guard time" bitfld.long 0x00 5.--7. " TXRETRY ,Controls the maximum number of retransmissions" "0,1,2,3,4,5,6,7" bitfld.long 0x00 2. " PROTSEL ,Protocol selection as defined in the ISO7816-3 standard" "T=0,T=1" textline " " bitfld.long 0x00 0. " SCIEN ,Smart Card Interface Enable" "Disabled,Enabled" else group.long 0x48++0x3 line.long 0x00 "U2SCICCTRL,Smart Card Interface Control register" hexmask.long.byte 0x00 8.--15. 1. " GUARDTIME ,Extra guard time" bitfld.long 0x00 5.--7. " TXRETRY ,Controls the maximum number of retransmissions" "0,1,2,3,4,5,6,7" bitfld.long 0x00 2. " PROTSEL ,Protocol selection as defined in the ISO7816-3 standard" "T=0,T=1" textline " " bitfld.long 0x00 1. " NACKDIS ,NACK response disable" "No,Yes" bitfld.long 0x00 0. " SCIEN ,Smart Card Interface Enable" "Disabled,Enabled" endif endif sif (cpu()=="LPC1772"||cpu()=="LPC1774"||cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778"||cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788") group.long 0x30++0x03 line.long 0x00 "U2TER,Transmit Enable Register" bitfld.long 0x00 7. " TXEN ,Transmission Enable" "Disabled,Enabled" endif sif cpuis("LPC181*")||cpuis("LPC182*")||cpuis("LPC183*")||cpuis("LPC185*") group.long 0x2C++0x03 line.long 0x00 "U2OSR,Oversampling Register" hexmask.long.byte 0x00 8.--14. 1. " FDINT ,These bits act as a more-significant extension of the OSint field" bitfld.long 0x00 4.--7. " OSINT ,Integer part of the oversampling ratio" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x00 1.--3. " OSFRAC ,Fractional part of the oversampling ratio" "Reserved,0.125,0.250,0.375,0.5,0.625,0.750,0.875" group.long 0x40++0x3 line.long 0x00 "U2HDEN,USART Half-duplex Enable Register" bitfld.long 0x00 0. " HDEN ,Half-duplex mode enable" "Disabled,Enabled" width 17. if (((per.l((ad:0x40098000+0x48)))&0x04)==0x04) group.long 0x48++0x3 line.long 0x00 "U2SCICCTRL,Smart Card Interface Control register" hexmask.long.byte 0x00 8.--15. 1. " GUARDTIME ,Extra guard time" bitfld.long 0x00 5.--7. " TXRETRY ,Controls the maximum number of retransmissions" "0,1,2,3,4,5,6,7" bitfld.long 0x00 2. " PROTSEL ,Protocol selection as defined in the ISO7816-3 standard" "T=0,T=1" textline " " bitfld.long 0x00 0. " SCIEN ,Smart Card Interface Enable" "Disabled,Enabled" else group.long 0x48++0x3 line.long 0x00 "U2SCICCTRL,Smart Card Interface Control register" hexmask.long.byte 0x00 8.--15. 1. " GUARDTIME ,Extra guard time" bitfld.long 0x00 5.--7. " TXRETRY ,Controls the maximum number of retransmissions" "0,1,2,3,4,5,6,7" bitfld.long 0x00 2. " PROTSEL ,Protocol selection as defined in the ISO7816-3 standard" "T=0,T=1" textline " " bitfld.long 0x00 1. " NACKDIS ,NACK response disable" "No,Yes" bitfld.long 0x00 0. " SCIEN ,Smart Card Interface Enable" "Disabled,Enabled" endif endif sif (!cpuis("LPC176*")&&!cpuis("LPC175*")&&!cpuis("LPC1111*")&&!cpuis("LPC1112*")&&!cpuis("LPC1113*")&&!cpuis("LPC1114*")&&cpu()!="LPC11C12"&&cpu()!="LPC11C14"&&cpu()!="LPC1102"&&cpu()!="EM773"&&cpu()!="LPC1772"&&cpu()!="LPC1774"&&cpu()!="LPC1776"&&cpu()!="LPC1777"&&cpu()!="LPC1778"&&cpu()!="LPC1785"&&cpu()!="LPC1786"&&cpu()!="LPC1787"&&cpu()!="LPC1788"&&cpu()!="LPC11C22"&&cpu()!="LPC11C24"&&cpu()!="LPC11U12/201"&&cpu()!="LPC11U13/201"&&cpu()!="LPC11U14/201"&&cpu()!="LPC11U23/301"&&!cpuis("LPC11U24*")&&!cpuis("LPC11U3*")&&cpu()!="LPC11A02"&&cpu()!="LPC11A04"&&cpu()!="LPC11A11"&&cpu()!="LPC11A12"&&cpu()!="LPC11A13"&&cpu()!="LPC11A14"&&!cpuis("LPC11E*")&&!cpuis("LPC181*")&&!cpuis("LPC182*")&&!cpuis("LPC183*")&&!cpuis("LPC185*")&&cpu()!="LPC4310FBD144"&&cpu()!="LPC4310FBD144-M0"&&cpu()!="LPC4310FET100"&&cpu()!="LPC4310FET100-M0"&&cpu()!="LPC4320FBD100"&&cpu()!="LPC4320FBD100-M0"&&cpu()!="LPC4320FBD144"&&cpu()!="LPC4320FBD144-M0"&&cpu()!="LPC4320FET100"&&cpu()!="LPC4320FET100-M0"&&cpu()!="LPC4330FBD144"&&cpu()!="LPC4330FBD144-M0"&&cpu()!="LPC4330FET100"&&cpu()!="LPC4330FET100-M0"&&cpu()!="LPC4330FET180"&&cpu()!="LPC4330FET180-M0"&&cpu()!="LPC4330FET256"&&cpu()!="LPC4330FET256-M0"&&cpu()!="LPC4350FBD208"&&cpu()!="LPC4350FBD208-M0"&&cpu()!="LPC4350FET180"&&cpu()!="LPC4350FET180-M0"&&cpu()!="LPC4350FET256"&&cpu()!="LPC4350FET256-M0"&&cpu()!="LPC4333FBD144"&&cpu()!="LPC4333FBD144-M0"&&cpu()!="LPC4333FET100"&&cpu()!="LPC4333FET100-M0"&&cpu()!="LPC4333FET180"&&cpu()!="LPC4333FET180-M0"&&cpu()!="LPC4333FET256"&&cpu()!="LPC4333FET256-M0"&&cpu()!="LPC4337FBD144"&&cpu()!="LPC4337FBD144-M0"&&cpu()!="LPC4337FET100"&&cpu()!="LPC4337FET100-M0"&&cpu()!="LPC4337FET180"&&cpu()!="LPC4337FET180-M0"&&cpu()!="LPC4337FET256"&&cpu()!="LPC4337FET256-M0"&&cpu()!="LPC4353FBD208"&&cpu()!="LPC4353FBD208-M0"&&cpu()!="LPC4353FET180"&&cpu()!="LPC4353FET180-M0"&&cpu()!="LPC4353FET256"&&cpu()!="LPC4353FET256-M0"&&cpu()!="LPC4357FBD208"&&cpu()!="LPC4357FBD208-M0"&&cpu()!="LPC4357FET256"&&cpu()!="LPC4357FET256-M0") rgroup.long 0x58++0x03 line.long 0x00 "U2FIFOLVL,FIFO Level Register" bitfld.long 0x00 8.--11. " TXFIFOLVL ,Level of the UART transmitter FIFO" "Empty,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Full" bitfld.long 0x00 0.--3. " RXFIFILVL ,Level of the UART receiver FIFO" "Empty,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Full" endif sif (cpu()=="LPC4310FBD144"||cpu()=="LPC4310FBD144-M0"||cpu()=="LPC4310FET100"||cpu()=="LPC4310FET100-M0"||cpu()=="LPC4320FBD100"||cpu()=="LPC4320FBD100-M0"||cpu()=="LPC4320FBD144"||cpu()=="LPC4320FBD144-M0"||cpu()=="LPC4320FET100"||cpu()=="LPC4320FET100-M0"||cpu()=="LPC4330FBD144"||cpu()=="LPC4330FBD144-M0"||cpu()=="LPC4330FET100"||cpu()=="LPC4330FET100-M0"||cpu()=="LPC4330FET180"||cpu()=="LPC4330FET180-M0"||cpu()=="LPC4330FET256"||cpu()=="LPC4330FET256-M0"||cpu()=="LPC4350FBD208"||cpu()=="LPC4350FBD208-M0"||cpu()=="LPC4350FET180"||cpu()=="LPC4350FET180-M0"||cpu()=="LPC4350FET256"||cpu()=="LPC4350FET256-M0"||cpu()=="LPC4333FBD144"||cpu()=="LPC4333FBD144-M0"||cpu()=="LPC4333FET100"||cpu()=="LPC4333FET100-M0"||cpu()=="LPC4333FET180"||cpu()=="LPC4333FET180-M0"||cpu()=="LPC4333FET256"||cpu()=="LPC4333FET256-M0"||cpu()=="LPC4337FBD144"||cpu()=="LPC4337FBD144-M0"||cpu()=="LPC4337FET100"||cpu()=="LPC4337FET100-M0"||cpu()=="LPC4337FET180"||cpu()=="LPC4337FET180-M0"||cpu()=="LPC4337FET256"||cpu()=="LPC4337FET256-M0"||cpu()=="LPC4353FBD208"||cpu()=="LPC4353FBD208-M0"||cpu()=="LPC4353FET180"||cpu()=="LPC4353FET180-M0"||cpu()=="LPC4353FET256"||cpu()=="LPC4353FET256-M0"||cpu()=="LPC4357FBD208"||cpu()=="LPC4357FBD208-M0"||cpu()=="LPC4357FET256"||cpu()=="LPC4357FET256-M0"||cpuis("LPC181*")||cpuis("LPC182*")||cpuis("LPC183*")||cpuis("LPC185*")) width 17. group.long 0x4C++0x03 line.long 0x00 "U2RS485CTRL,RS485 Control register" bitfld.long 0x00 5. " OINV ,Reverses the polarity of the direction control signal on the RTS (or DTR) pin" "Not inverted,Inverted" bitfld.long 0x00 4. " DCTRL ,Auto Direction Control" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " AADEN ,Auto Address Detect" "Disabled,Enabled" bitfld.long 0x00 1. " RXDIS ,The receiver disable" "Enabled,Disabled" textline " " bitfld.long 0x00 0. " NMMEN ,Normal Multidrop Mode" "Disabled,Enabled" group.long 0x50++0x0F line.long 0x00 "U2RS485ADRMATCH,RS485 Address Match register" hexmask.long.byte 0x00 0.--7. 1. " ADRMATCH ,Address match value" line.long 0x04 "U2RS485DLY,RS-485 Delay Value Register" hexmask.long.byte 0x04 0.--7. 1. " DLY ,Direction control (RTS or DTR) delay value" line.long 0x08 "SYNCCTRL,Synchronous mode control register" bitfld.long 0x08 6. " CCCLR ,Continuous clock clear" "Software,Hardware" bitfld.long 0x08 5. " SSSDIS ,Start/stop bits" "Sent,Not sent" textline " " bitfld.long 0x08 4. " CSCEN ,Continuous master clock enable" "Disabled,Enabled" bitfld.long 0x08 3. " TSBYPASS ,Transmit synchronization bypass in synchronous slave mode" "Synchronized,Not synchronized" textline " " bitfld.long 0x08 2. " FES ,Falling edge sampling" "Rising,Falling" bitfld.long 0x08 1. " CSRC ,Clock source select" "Slave,Master" textline " " bitfld.long 0x08 0. " SYNC ,Enables synchronous mode" "Disabled,Enabled" line.long 0x0C "U2TER,Transmit Enable Register" bitfld.long 0x0C 0. " TXEN ,Transmission Enable" "Disabled,Enabled" endif sif (cpu()!="LPC4310FBD144"&&cpu()!="LPC4310FBD144-M0"&&cpu()!="LPC4310FET100"&&cpu()!="LPC4310FET100-M0"&&cpu()!="LPC4320FBD100"&&cpu()!="LPC4320FBD100-M0"&&cpu()!="LPC4320FBD144"&&cpu()!="LPC4320FBD144-M0"&&cpu()!="LPC4320FET100"&&cpu()!="LPC4320FET100-M0"&&cpu()!="LPC4330FBD144"&&cpu()!="LPC4330FBD144-M0"&&cpu()!="LPC4330FET100"&&cpu()!="LPC4330FET100-M0"&&cpu()!="LPC4330FET180"&&cpu()!="LPC4330FET180-M0"&&cpu()!="LPC4330FET256"&&cpu()!="LPC4330FET256-M0"&&cpu()!="LPC4350FBD208"&&cpu()!="LPC4350FBD208-M0"&&cpu()!="LPC4350FET180"&&cpu()!="LPC4350FET180-M0"&&cpu()!="LPC4350FET256"&&cpu()!="LPC4350FET256-M0"&&cpu()!="LPC4333FBD144"&&cpu()!="LPC4333FBD144-M0"&&cpu()!="LPC4333FET100"&&cpu()!="LPC4333FET100-M0"&&cpu()!="LPC4333FET180"&&cpu()!="LPC4333FET180-M0"&&cpu()!="LPC4333FET256"&&cpu()!="LPC4333FET256-M0"&&cpu()!="LPC4337FBD144"&&cpu()!="LPC4337FBD144-M0"&&cpu()!="LPC4337FET100"&&cpu()!="LPC4337FET100-M0"&&cpu()!="LPC4337FET180"&&cpu()!="LPC4337FET180-M0"&&cpu()!="LPC4337FET256"&&cpu()!="LPC4337FET256-M0"&&cpu()!="LPC4353FBD208"&&cpu()!="LPC4353FBD208-M0"&&cpu()!="LPC4353FET180"&&cpu()!="LPC4353FET180-M0"&&cpu()!="LPC4353FET256"&&cpu()!="LPC4353FET256-M0"&&cpu()!="LPC4357FBD208"&&cpu()!="LPC4357FBD208-M0"&&cpu()!="LPC4357FET256"&&cpu()!="LPC4357FET256-M0"&&!cpuis("LPC181*")&&!cpuis("LPC182*")&&!cpuis("LPC183*")&&!cpuis("LPC185*")) endif width 0xB tree.end tree "UART 3" base ad:0x4009C000 width 11. if (((per.l((ad:0x4009C000+0xC)))&0x80)==0x00) hgroup.long 0x00++0x03 hide.long 0x00 "U3RBR/THR,Receiver/Transmit Buffer Register" in group.long 0x04++0x03 line.long 0x00 "U3IER,Interrupt Enable Register" bitfld.long 0x00 9. " ABTOINTEN ,Auto-baud Time-out Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 8. " ABEOINTEN ,End of Auto-baud Interrupt Enable" "Disabled,Enabled" sif (cpu()!="LPC1224"&&cpu()!="LPC1225"&&cpu()!="LPC1226"&&cpu()!="LPC1227"&&cpu()!="LPC1102"&&cpu()!="LPC1102LV"&&cpu()!="LPC1110"&&!cpuis("LPC1111*")&&!cpuis("LPC1112*")&&cpu()!="LPC1112LV"&&!cpuis("LPC1113*")&&!cpuis("LPC1114*")&&cpu()!="LPC1114LV"&&!cpuis("LPC1115*")&&cpu()!="LPC11D14") sif (cpu()=="LPC11U12/201"||cpu()=="LPC11U13/201"||cpu()=="LPC11U14/201"||cpu()=="LPC11U23/301"||cpuis("LPC11U24*")||cpuis("LPC11U3*")||cpu()=="LPC11A02"||cpu()=="LPC11A04"||cpu()=="LPC11A11"||cpu()=="LPC11A12"||cpu()=="LPC11A13"||cpu()=="LPC11A14"||cpuis("LPC11E*")) textline " " bitfld.long 0x00 3. " MSIE ,Modem interrupt Enable" "Disabled,Enabled" endif endif textline " " bitfld.long 0x00 2. " RXLSIE ,Rx Line Status Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " THREIE ,THRE Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RBRIE ,RBR Interrupt Enable" "Disabled,Enabled" else group.long 0x00++0x03 line.long 0x00 "U3DLL,Divisor Latch LSB" hexmask.long.byte 0x00 0.--7. 1. " DLLSB ,UARTn Divisor Latch LSB" group.long 0x04++0x03 line.long 0x00 "U3DLM,Divisor Latch MSB" hexmask.long.byte 0x00 0.--7. 1. " DLMSB ,UARTn Divisor Latch MSB" endif hgroup.long 0x08++0x03 hide.long 0x00 "U3IIR,Interrupt ID" in wgroup.long 0x08++0x03 line.long 0x00 "U3FCR,FIFO Control Register" bitfld.long 0x00 6.--7. " RXTRIGLVL ,Rx Trigger Level Select" "Level 0(1 char.),Level 1(4 char.),Level 2(8 char.),Level 3(14 char.)" sif (cpu()!="EM773"&&cpu()!="LPC1311"&&cpu()!="LPC1313"&&cpu()!="LPC1342"&&cpu()!="LPC1343"&&cpu()!="LPC11D14"&&cpu()!="LPC1110"&&!cpuis("LPC1111*")&&!cpuis("LPC1112*")&&cpu()!="LPC1112LV"&&!cpuis("LPC1113*")&&!cpuis("LPC1114*")&&cpu()!="LPC1114LV"&&!cpuis("LPC1115*")&&cpu()!="LPC11C12"&&cpu()!="LPC11C14"&&cpu()!="LPC1102"&&cpu()!="LPC11C22"&&cpu()!="LPC11C24"&&cpu()!="LPC11U12/201"&&cpu()!="LPC11U23/301"&&!cpuis("LPC11U24*")&&cpu()!="LPC11U13/201"&&cpu()!="LPC11U14/201"&&cpuis("LPC11U3*")&&cpu()!="LPC11A02"&&cpu()!="LPC11A04"&&cpu()!="LPC11A11"&&cpu()!="LPC11A12"&&cpu()!="LPC11A13"&&cpu()!="LPC11A14"&&!cpuis("LPC11E*")) bitfld.long 0x0 3. " DMAMODE ,DMA Mode Enable" "Disable,Enable" endif textline " " bitfld.long 0x0 2. " TXFIFORES ,Transmitter FIFO Reset" "No reset,Reset" bitfld.long 0x0 1. " RXFIFORES ,Receiver FIFO Reset" "No reset,Reset" textline " " bitfld.long 0x00 0. " FIFOENABLE ,FIFO Enable" "Disable,Enable" sif (cpu()=="LPC11A02"||cpu()=="LPC11A04"||cpu()=="LPC11A11"||cpu()=="LPC11A12"||cpu()=="LPC11A13"||cpu()=="LPC11A14"||cpuis("LPC11E*")) group.long 0x10++0x3 line.long 0x00 "U3MCR,USART Modem Control Register" bitfld.long 0x00 7. " CTSEN ,CTS enable" "Disabled,Enabled" bitfld.long 0x00 6. " RTSEN ,RTS enable" "Disabled,Enabled" bitfld.long 0x00 4. " LMS ,Loopback Mode Select" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " RTSCON ,Source for modem output pin RTS" "Active,Inactive" bitfld.long 0x00 0. " DTRCON ,Source for modem output pin DTR" "Active,Inactive" endif if ((per.l((ad:0x4009C000+0xC))&0x03)==0x00) group.long 0x0C++0x03 line.long 0x00 "U3LCR,Line Control Register" bitfld.long 0x00 7. " DLAB ,Divisor Latch Access Bit" "Disabled,Enabled" bitfld.long 0x00 6. " BREAKCONTROL ,Break Control" "Disabled,Enabled" textline " " bitfld.long 0x00 4.--5. " PARITYSELECT ,Parity Select" "Odd,Even,Forced 1,Forced 0" bitfld.long 0x00 3. " PARITYENABLE ,Parity Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " SBS ,Stop Bit Select" "1 bit,1.5 bits" bitfld.long 0x00 0.--1. " WLS ,Word Length Select" "5-bit,6-bit,7-bit,8-bit" else group.long 0x0C++0x03 line.long 0x00 "U3LCR,Line Control Register" bitfld.long 0x00 7. " DLAB ,Divisor Latch Access Bit" "Disabled,Enabled" bitfld.long 0x00 6. " BREAKCONTROL ,Break Control" "Disabled,Enabled" textline " " bitfld.long 0x00 4.--5. " PARITYSELECT ,Parity Select" "Odd,Even,Forced 1,Forced 0" bitfld.long 0x00 3. " PARITYENABLE ,Parity Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " SBS ,Stop Bit Select" "1 bit,2 bits" bitfld.long 0x00 0.--1. " WLS ,Word Length Select" "5-bit,6-bit,7-bit,8-bit" endif sif (cpu()=="EM773"||cpu()=="LPC1311"||cpu()=="LPC1313"||cpu()=="LPC1342"||cpu()=="LPC1343"||cpu()=="LPC11D14"||cpu()=="LPC1110"||cpuis("LPC1111*")||cpuis("LPC1112*")||cpu()=="LPC1112LV"||cpuis("LPC1113*")||cpuis("LPC1114*")||cpu()=="LPC1114LV"||cpuis("LPC1115*")||cpu()=="LPC11C12"||cpu()=="LPC11C14"||cpu()=="LPC11C22"||cpu()=="LPC11C24"||cpu()=="LPC11U12/201"||cpu()=="LPC11U13/201"||cpu()=="LPC11U14/201"||cpu()=="LPC11U23/301"||cpuis("LPC11U24*")||cpuis("LPC11U3*")) group.long 0x10++0x03 line.long 0x00 "U3MCR,Modem Control Register" bitfld.long 0x00 7. " CTSEN ,Auto-cts flow control" "Disabled,Enabled" bitfld.long 0x00 6. " RTSEN ,Auto-rts flow" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " LOOPMODE ,Modem loopback mode select" "Disabled,Enabled" bitfld.long 0x00 1. " RTSCTRL ,Source for modem output pin RTS" "Low,High" textline " " bitfld.long 0x00 0. " DTRCTRL ,Source for modem output pin DTR" "Low,High" endif hgroup.long 0x14++0x03 hide.long 0x00 "U3LSR,Line Status Register" in sif (cpu()=="EM773"||cpu()=="LPC1224"||cpu()=="LPC1225"||cpu()=="LPC1226"||cpu()=="LPC1227"||cpu()=="LPC1311"||cpu()=="LPC1313"||cpu()=="LPC1342"||cpu()=="LPC1343"||cpu()=="LPC1110"||cpuis("LPC1111*")||cpuis("LPC1112*")||cpu()=="LPC1112LV"||cpuis("LPC1113*")||cpuis("LPC1114*")||cpu()=="LPC1114LV"||cpuis("LPC1115*")||cpu()=="LPC11D14"||cpu()=="LPC11C12"||cpu()=="LPC11C14"||cpu()=="LPC11C22"||cpu()=="LPC11C24"||cpu()=="LPC11U12/201"||cpu()=="LPC11U13/201"||cpu()=="LPC11U14/201"||cpu()=="LPC11U23/301"||cpuis("LPC11U24*")||cpuis("LPC11U3*")||cpuis("LPC11E*")||cpu()=="LPC11A02"||cpu()=="LPC11A04"||cpu()=="LPC11A11"||cpu()=="LPC11A12"||cpu()=="LPC11A13"||cpu()=="LPC11A14") hgroup.long 0x18++0x03 hide.long 0x00 "U3MSR,Modem Status Register" in endif group.long 0x1C++0x03 line.long 0x00 "U3SCR,Scratch Pad Register" hexmask.long.byte 0x00 0.--7. 1. " Pad ,A readable/writable byte" group.long 0x20++0x03 line.long 0x00 "U3ACR,Auto-baud Control Register" bitfld.long 0x00 9. " ABTOINTCLR ,Auto-baud Time-out Interrupt Clear Bit" "No effect,Cleared" bitfld.long 0x00 8. " ABEOINTCLR ,End of Auto-baud Interrupt Clear Bit" "No effect,Cleared" textline " " bitfld.long 0x00 2. " AUTORESTART ,Auto Restart" "Not restarted,Restarted" bitfld.long 0x00 1. " MODE ,Auto-baud Mode Select" "Mode 0,Mode 1" textline " " bitfld.long 0x00 0. " START ,Auto-baud Start" "Stopped,Started" sif (cpuis("LPC181*")||cpuis("LPC182*")||cpuis("LPC183*")||cpuis("LPC185*")||cpu()=="LPC4310FBD144"||cpu()=="LPC4310FBD144-M0"||cpu()=="LPC4310FET100"||cpu()=="LPC4310FET100-M0"||cpu()=="LPC4320FBD100"||cpu()=="LPC4320FBD100-M0"||cpu()=="LPC4320FBD144"||cpu()=="LPC4320FBD144-M0"||cpu()=="LPC4320FET100"||cpu()=="LPC4320FET100-M0"||cpu()=="LPC4330FBD144"||cpu()=="LPC4330FBD144-M0"||cpu()=="LPC4330FET100"||cpu()=="LPC4330FET100-M0"||cpu()=="LPC4330FET180"||cpu()=="LPC4330FET180-M0"||cpu()=="LPC4330FET256"||cpu()=="LPC4330FET256-M0"||cpu()=="LPC4350FBD208"||cpu()=="LPC4350FBD208-M0"||cpu()=="LPC4350FET180"||cpu()=="LPC4350FET180-M0"||cpu()=="LPC4350FET256"||cpu()=="LPC4350FET256-M0"||cpu()=="LPC4333FBD144"||cpu()=="LPC4333FBD144-M0"||cpu()=="LPC4333FET100"||cpu()=="LPC4333FET100-M0"||cpu()=="LPC4333FET180"||cpu()=="LPC4333FET180-M0"||cpu()=="LPC4333FET256"||cpu()=="LPC4333FET256-M0"||cpu()=="LPC4337FBD144"||cpu()=="LPC4337FBD144-M0"||cpu()=="LPC4337FET100"||cpu()=="LPC4337FET100-M0"||cpu()=="LPC4337FET180"||cpu()=="LPC4337FET180-M0"||cpu()=="LPC4337FET256"||cpu()=="LPC4337FET256-M0"||cpu()=="LPC4353FBD208"||cpu()=="LPC4353FBD208-M0"||cpu()=="LPC4353FET180"||cpu()=="LPC4353FET180-M0"||cpu()=="LPC4353FET256"||cpu()=="LPC4353FET256-M0"||cpu()=="LPC4357FBD208"||cpu()=="LPC4357FBD208-M0"||cpu()=="LPC4357FET256"||cpu()=="LPC4357FET256-M0") if (((per.l((ad:0x4009C000+0x24)))&0x4)==0x4) group.long 0x24++0x3 line.long 0x0 "U3ICR,IrDA Control Register" bitfld.long 0x00 3.--5. " PULSEDIV ,IrDA transmitter pulse width [us]" "2 * Tpclk,4 * Tpclk,8 * Tpclk,16 * Tpclk,32 * Tpclk,64 * Tpclk,128 * Tpclk,256 * Tpclk" bitfld.long 0x00 2. " FIXPULSEEN ,IrDA fixed-pulse-width mode" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " IRDAINV ,IrDA Serial Input Invert" "Not inverted,Inverted" bitfld.long 0x00 0. " IRDAEN ,IrDA Enable" "Disabled,Enabled" else group.long 0x24++0x3 line.long 0x0 "U3ICR,IrDA Control Register" bitfld.long 0x00 2. " FIXPULSEEN ,IrDA fixed-pulse-width mode" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " IRDAINV ,IrDA Serial Input Invert" "Not inverted,Inverted" bitfld.long 0x00 0. " IRDAEN ,IrDA Enable" "Disabled,Enabled" endif elif (cpu()!="EM773"&&cpu()!="LPC1110"&&!cpuis("LPC1111*")&&!cpuis("LPC1112*")&&cpu()!="LPC1112LV"&&!cpuis("LPC1113*")&&!cpuis("LPC1114*")&&cpu()!="LPC1114LV"&&!cpuis("LPC1115*")&&cpu()!="LPC11D14"&&cpu()!="LPC11C12"&&cpu()!="LPC11C14"&&cpu()!="LPC1102"&&cpu()!="LPC1102LV"&&cpu()!="LPC11C22"&&cpu()!="LPC11C24"&&cpu()!="LPC1224"&&cpu()!="LPC1225"&&cpu()!="LPC1226"&&cpu()!="LPC1227") if (((per.l((ad:0x4009C000+0x24)))&0x4)==0x4) group.long 0x24++0x3 line.long 0x0 "U3ICR,IrDA Control Register" sif cpu()=="LPC11U12/201"||cpu()=="LPC11U13/x201"||cpu()=="LPC11U14/201"||cpu()=="LPC11U23/301"||cpuis("LPC11U24*")||cpuis("LPC11U3*")||cpuis("LPC11E*") bitfld.long 0x00 3.--5. " PULSEDIV ,IrDA transmitter pulse width [us]" "3/(16 * baud rate),2 * Tpclk,4 * Tpclk,8 * Tpclk,16 * Tpclk,32 * Tpclk,64 * Tpclk,128 * Tpclk" else bitfld.long 0x00 3.--5. " PULSEDIV ,IrDA transmitter pulse width [us]" "2 * Tpclk,4 * Tpclk,8 * Tpclk,16 * Tpclk,32 * Tpclk,64 * Tpclk,128 * Tpclk,256 * Tpclk" endif textline " " bitfld.long 0x00 2. " FIXPULSEEN ,IrDA fixed-pulse-width mode" "Disabled,Enabled" bitfld.long 0x00 1. " IRDAINV ,IrDA Serial Input Invert" "Not inverted,Inverted" textline " " bitfld.long 0x00 0. " IRDAEN ,IrDA Enable" "Disabled,Enabled" else group.long 0x24++0x3 line.long 0x0 "U3ICR,IrDA Control Register" textline " " bitfld.long 0x00 2. " FIXPULSEEN ,IrDA fixed-pulse-width mode" "Disabled,Enabled" bitfld.long 0x00 1. " IRDAINV ,IrDA Serial Input Invert" "Not inverted,Inverted" textline " " bitfld.long 0x00 0. " IRDAEN ,IrDA Enable" "Disabled,Enabled" endif elif (cpu()=="LPC1224"||cpu()=="LPC1225"||cpu()=="LPC1226"||cpu()=="LPC1227") endif group.long 0x28++0x03 line.long 0x00 "U3FDR,Fractional Divider Register" bitfld.long 0x00 4.--7. " MULVAL , Pre-scaler Multiplier Value" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()=="EM773"||cpu()=="LPC1311"||cpu()=="LPC1313"||cpu()=="LPC1342"||cpu()=="LPC1343"||cpu()=="LPC1110"||cpuis("LPC1111*")||cpuis("LPC1112*")||cpu()=="LPC1112LV"||cpuis("LPC1113*")||cpuis("LPC1114*")||cpu()=="LPC1114LV"||cpuis("LPC1115*")||cpu()=="LPC11D14"||cpu()=="LPC11C12"||cpu()=="LPC11C14"||cpu()=="LPC1102"||cpu()=="LPC11C22"||cpu()=="LPC11C24"||cpu()=="LPC11U12/201"||cpu()=="LPC11U13/201"||cpu()=="LPC11U14/201"||cpu()=="LPC11U23/301"||cpuis("LPC11U24*")||cpuis("LPC11U3*")||cpu()=="LPC4310FBD144"||cpu()=="LPC4310FBD144-M0"||cpu()=="LPC4310FET100"||cpu()=="LPC4310FET100-M0"||cpu()=="LPC4320FBD100"||cpu()=="LPC4320FBD100-M0"||cpu()=="LPC4320FBD144"||cpu()=="LPC4320FBD144-M0"||cpu()=="LPC4320FET100"||cpu()=="LPC4320FET100-M0"||cpu()=="LPC4330FBD144"||cpu()=="LPC4330FBD144-M0"||cpu()=="LPC4330FET100"||cpu()=="LPC4330FET100-M0"||cpu()=="LPC4330FET180"||cpu()=="LPC4330FET180-M0"||cpu()=="LPC4330FET256"||cpu()=="LPC4330FET256-M0"||cpu()=="LPC4350FBD208"||cpu()=="LPC4350FBD208-M0"||cpu()=="LPC4350FET180"||cpu()=="LPC4350FET180-M0"||cpu()=="LPC4350FET256"||cpu()=="LPC4350FET256-M0"||cpu()=="LPC4333FBD144"||cpu()=="LPC4333FBD144-M0"||cpu()=="LPC4333FET100"||cpu()=="LPC4333FET100-M0"||cpu()=="LPC4333FET180"||cpu()=="LPC4333FET180-M0"||cpu()=="LPC4333FET256"||cpu()=="LPC4333FET256-M0"||cpu()=="LPC4337FBD144"||cpu()=="LPC4337FBD144-M0"||cpu()=="LPC4337FET100"||cpu()=="LPC4337FET100-M0"||cpu()=="LPC4337FET180"||cpu()=="LPC4337FET180-M0"||cpu()=="LPC4337FET256"||cpu()=="LPC4337FET256-M0"||cpu()=="LPC4353FBD208"||cpu()=="LPC4353FBD208-M0"||cpu()=="LPC4353FET180"||cpu()=="LPC4353FET180-M0"||cpu()=="LPC4353FET256"||cpu()=="LPC4353FET256-M0"||cpu()=="LPC4357FBD208"||cpu()=="LPC4357FBD208-M0"||cpu()=="LPC4357FET256"||cpu()=="LPC4357FET256-M0") bitfld.long 0x00 0.--3. " DIVADDVAL , Pre-scaler Divisor Value" "No effect,1,2,3,4,5,6,7,8,9,10,11,12,13,14,?..." else bitfld.long 0x00 0.--3. " DIVADDVAL , Pre-scaler Divisor Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,?..." endif sif (cpu()=="LPC11U12/201"||cpu()=="LPC11U13/201"||cpu()=="LPC11U14/201"||cpu()=="LPC11U23/301"||cpuis("LPC11U24*")||cpuis("LPC11U3*")||cpuis("LPC11E*")||cpu()=="LPC11A02"||cpu()=="LPC11A04"||cpu()=="LPC11A11"||cpu()=="LPC11A12"||cpu()=="LPC11A13"||cpu()=="LPC11A14") group.long 0x2C++0x3 line.long 0x00 "U3OSR,Oversampling Register" hexmask.long.byte 0x00 8.--14. 1. " FDINT ,These bits act as a more-significant extension of the OSint field" bitfld.long 0x00 4.--7. " OSINT ,Integer part of the oversampling ratio" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x00 1.--3. " OSFRAC ,Fractional part of the oversampling ratio" "Reserved,0.125,0.250,0.375,0.5,0.625,0.750,0.875" group.long 0x30++0x03 line.long 0x00 "U3TER,Transmit Enable Register" bitfld.long 0x00 7. " TXEN ,Transmission Enable" "Disabled,Enabled" group.long 0x40++0x3 line.long 0x00 "U3HDEN,USART Half-duplex Enable Register" bitfld.long 0x00 0. " HDEN ,Half-duplex mode enable" "Disabled,Enabled" group.long 0x48++0x3 line.long 0x00 "U3SCICCTRL,Smart Card Interface Control register" hexmask.long.byte 0x00 8.--15. 1. " XTRAGUARD ,This field indicates the number of bit times (ETUs)" bitfld.long 0x00 5.--7. " TXRETRY ,Controls the maximum number of retransmissions" "0,1,2,3,4,5,6,7" bitfld.long 0x00 2. " PROTSEL ,Protocol selection as defined in the ISO7816-3 standard" "T=0,T=1" textline " " bitfld.long 0x00 1. " NACKDIS ,NACK response disable" "No,Yes" bitfld.long 0x00 0. " SCIEN ,Smart Card Interface Enable" "Disabled,Enabled" endif sif (cpu()=="LPC4310FBD144"||cpu()=="LPC4310FBD144-M0"||cpu()=="LPC4310FET100"||cpu()=="LPC4310FET100-M0"||cpu()=="LPC4320FBD100"||cpu()=="LPC4320FBD100-M0"||cpu()=="LPC4320FBD144"||cpu()=="LPC4320FBD144-M0"||cpu()=="LPC4320FET100"||cpu()=="LPC4320FET100-M0"||cpu()=="LPC4330FBD144"||cpu()=="LPC4330FBD144-M0"||cpu()=="LPC4330FET100"||cpu()=="LPC4330FET100-M0"||cpu()=="LPC4330FET180"||cpu()=="LPC4330FET180-M0"||cpu()=="LPC4330FET256"||cpu()=="LPC4330FET256-M0"||cpu()=="LPC4350FBD208"||cpu()=="LPC4350FBD208-M0"||cpu()=="LPC4350FET180"||cpu()=="LPC4350FET180-M0"||cpu()=="LPC4350FET256"||cpu()=="LPC4350FET256-M0"||cpu()=="LPC4333FBD144"||cpu()=="LPC4333FBD144-M0"||cpu()=="LPC4333FET100"||cpu()=="LPC4333FET100-M0"||cpu()=="LPC4333FET180"||cpu()=="LPC4333FET180-M0"||cpu()=="LPC4333FET256"||cpu()=="LPC4333FET256-M0"||cpu()=="LPC4337FBD144"||cpu()=="LPC4337FBD144-M0"||cpu()=="LPC4337FET100"||cpu()=="LPC4337FET100-M0"||cpu()=="LPC4337FET180"||cpu()=="LPC4337FET180-M0"||cpu()=="LPC4337FET256"||cpu()=="LPC4337FET256-M0"||cpu()=="LPC4353FBD208"||cpu()=="LPC4353FBD208-M0"||cpu()=="LPC4353FET180"||cpu()=="LPC4353FET180-M0"||cpu()=="LPC4353FET256"||cpu()=="LPC4353FET256-M0"||cpu()=="LPC4357FBD208"||cpu()=="LPC4357FBD208-M0"||cpu()=="LPC4357FET256"||cpu()=="LPC4357FET256-M0") group.long 0x2C++0x3 line.long 0x00 "U3OSR,Oversampling Register" hexmask.long.byte 0x00 8.--14. 1. " FDINT ,These bits act as a more-significant extension of the OSint field" bitfld.long 0x00 4.--7. " OSINT ,Integer part of the oversampling ratio" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x00 1.--3. " OSFRAC ,Fractional part of the oversampling ratio" "Reserved,0.125,0.250,0.375,0.5,0.625,0.750,0.875" group.long 0x40++0x3 line.long 0x00 "U3HDEN,USART Half-duplex Enable Register" bitfld.long 0x00 0. " HDEN ,Half-duplex mode enable" "Disabled,Enabled" if (((per.l((ad:0x4009C000+0x48)))&0x04)==0x04) group.long 0x48++0x3 line.long 0x00 "U3SCICCTRL,Smart Card Interface Control register" hexmask.long.byte 0x00 8.--15. 1. " GUARDTIME ,Extra guard time" bitfld.long 0x00 5.--7. " TXRETRY ,Controls the maximum number of retransmissions" "0,1,2,3,4,5,6,7" bitfld.long 0x00 2. " PROTSEL ,Protocol selection as defined in the ISO7816-3 standard" "T=0,T=1" textline " " bitfld.long 0x00 0. " SCIEN ,Smart Card Interface Enable" "Disabled,Enabled" else group.long 0x48++0x3 line.long 0x00 "U3SCICCTRL,Smart Card Interface Control register" hexmask.long.byte 0x00 8.--15. 1. " GUARDTIME ,Extra guard time" bitfld.long 0x00 5.--7. " TXRETRY ,Controls the maximum number of retransmissions" "0,1,2,3,4,5,6,7" bitfld.long 0x00 2. " PROTSEL ,Protocol selection as defined in the ISO7816-3 standard" "T=0,T=1" textline " " bitfld.long 0x00 1. " NACKDIS ,NACK response disable" "No,Yes" bitfld.long 0x00 0. " SCIEN ,Smart Card Interface Enable" "Disabled,Enabled" endif endif sif (cpu()=="LPC1772"||cpu()=="LPC1774"||cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778"||cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788") group.long 0x30++0x03 line.long 0x00 "U3TER,Transmit Enable Register" bitfld.long 0x00 7. " TXEN ,Transmission Enable" "Disabled,Enabled" endif sif cpuis("LPC181*")||cpuis("LPC182*")||cpuis("LPC183*")||cpuis("LPC185*") group.long 0x2C++0x03 line.long 0x00 "U3OSR,Oversampling Register" hexmask.long.byte 0x00 8.--14. 1. " FDINT ,These bits act as a more-significant extension of the OSint field" bitfld.long 0x00 4.--7. " OSINT ,Integer part of the oversampling ratio" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x00 1.--3. " OSFRAC ,Fractional part of the oversampling ratio" "Reserved,0.125,0.250,0.375,0.5,0.625,0.750,0.875" group.long 0x40++0x3 line.long 0x00 "U3HDEN,USART Half-duplex Enable Register" bitfld.long 0x00 0. " HDEN ,Half-duplex mode enable" "Disabled,Enabled" width 17. if (((per.l((ad:0x4009C000+0x48)))&0x04)==0x04) group.long 0x48++0x3 line.long 0x00 "U3SCICCTRL,Smart Card Interface Control register" hexmask.long.byte 0x00 8.--15. 1. " GUARDTIME ,Extra guard time" bitfld.long 0x00 5.--7. " TXRETRY ,Controls the maximum number of retransmissions" "0,1,2,3,4,5,6,7" bitfld.long 0x00 2. " PROTSEL ,Protocol selection as defined in the ISO7816-3 standard" "T=0,T=1" textline " " bitfld.long 0x00 0. " SCIEN ,Smart Card Interface Enable" "Disabled,Enabled" else group.long 0x48++0x3 line.long 0x00 "U3SCICCTRL,Smart Card Interface Control register" hexmask.long.byte 0x00 8.--15. 1. " GUARDTIME ,Extra guard time" bitfld.long 0x00 5.--7. " TXRETRY ,Controls the maximum number of retransmissions" "0,1,2,3,4,5,6,7" bitfld.long 0x00 2. " PROTSEL ,Protocol selection as defined in the ISO7816-3 standard" "T=0,T=1" textline " " bitfld.long 0x00 1. " NACKDIS ,NACK response disable" "No,Yes" bitfld.long 0x00 0. " SCIEN ,Smart Card Interface Enable" "Disabled,Enabled" endif endif sif (!cpuis("LPC176*")&&!cpuis("LPC175*")&&!cpuis("LPC1111*")&&!cpuis("LPC1112*")&&!cpuis("LPC1113*")&&!cpuis("LPC1114*")&&cpu()!="LPC11C12"&&cpu()!="LPC11C14"&&cpu()!="LPC1102"&&cpu()!="EM773"&&cpu()!="LPC1772"&&cpu()!="LPC1774"&&cpu()!="LPC1776"&&cpu()!="LPC1777"&&cpu()!="LPC1778"&&cpu()!="LPC1785"&&cpu()!="LPC1786"&&cpu()!="LPC1787"&&cpu()!="LPC1788"&&cpu()!="LPC11C22"&&cpu()!="LPC11C24"&&cpu()!="LPC11U12/201"&&cpu()!="LPC11U13/201"&&cpu()!="LPC11U14/201"&&cpu()!="LPC11U23/301"&&!cpuis("LPC11U24*")&&!cpuis("LPC11U3*")&&cpu()!="LPC11A02"&&cpu()!="LPC11A04"&&cpu()!="LPC11A11"&&cpu()!="LPC11A12"&&cpu()!="LPC11A13"&&cpu()!="LPC11A14"&&!cpuis("LPC11E*")&&!cpuis("LPC181*")&&!cpuis("LPC182*")&&!cpuis("LPC183*")&&!cpuis("LPC185*")&&cpu()!="LPC4310FBD144"&&cpu()!="LPC4310FBD144-M0"&&cpu()!="LPC4310FET100"&&cpu()!="LPC4310FET100-M0"&&cpu()!="LPC4320FBD100"&&cpu()!="LPC4320FBD100-M0"&&cpu()!="LPC4320FBD144"&&cpu()!="LPC4320FBD144-M0"&&cpu()!="LPC4320FET100"&&cpu()!="LPC4320FET100-M0"&&cpu()!="LPC4330FBD144"&&cpu()!="LPC4330FBD144-M0"&&cpu()!="LPC4330FET100"&&cpu()!="LPC4330FET100-M0"&&cpu()!="LPC4330FET180"&&cpu()!="LPC4330FET180-M0"&&cpu()!="LPC4330FET256"&&cpu()!="LPC4330FET256-M0"&&cpu()!="LPC4350FBD208"&&cpu()!="LPC4350FBD208-M0"&&cpu()!="LPC4350FET180"&&cpu()!="LPC4350FET180-M0"&&cpu()!="LPC4350FET256"&&cpu()!="LPC4350FET256-M0"&&cpu()!="LPC4333FBD144"&&cpu()!="LPC4333FBD144-M0"&&cpu()!="LPC4333FET100"&&cpu()!="LPC4333FET100-M0"&&cpu()!="LPC4333FET180"&&cpu()!="LPC4333FET180-M0"&&cpu()!="LPC4333FET256"&&cpu()!="LPC4333FET256-M0"&&cpu()!="LPC4337FBD144"&&cpu()!="LPC4337FBD144-M0"&&cpu()!="LPC4337FET100"&&cpu()!="LPC4337FET100-M0"&&cpu()!="LPC4337FET180"&&cpu()!="LPC4337FET180-M0"&&cpu()!="LPC4337FET256"&&cpu()!="LPC4337FET256-M0"&&cpu()!="LPC4353FBD208"&&cpu()!="LPC4353FBD208-M0"&&cpu()!="LPC4353FET180"&&cpu()!="LPC4353FET180-M0"&&cpu()!="LPC4353FET256"&&cpu()!="LPC4353FET256-M0"&&cpu()!="LPC4357FBD208"&&cpu()!="LPC4357FBD208-M0"&&cpu()!="LPC4357FET256"&&cpu()!="LPC4357FET256-M0") rgroup.long 0x58++0x03 line.long 0x00 "U3FIFOLVL,FIFO Level Register" bitfld.long 0x00 8.--11. " TXFIFOLVL ,Level of the UART transmitter FIFO" "Empty,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Full" bitfld.long 0x00 0.--3. " RXFIFILVL ,Level of the UART receiver FIFO" "Empty,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Full" endif sif (cpu()=="LPC4310FBD144"||cpu()=="LPC4310FBD144-M0"||cpu()=="LPC4310FET100"||cpu()=="LPC4310FET100-M0"||cpu()=="LPC4320FBD100"||cpu()=="LPC4320FBD100-M0"||cpu()=="LPC4320FBD144"||cpu()=="LPC4320FBD144-M0"||cpu()=="LPC4320FET100"||cpu()=="LPC4320FET100-M0"||cpu()=="LPC4330FBD144"||cpu()=="LPC4330FBD144-M0"||cpu()=="LPC4330FET100"||cpu()=="LPC4330FET100-M0"||cpu()=="LPC4330FET180"||cpu()=="LPC4330FET180-M0"||cpu()=="LPC4330FET256"||cpu()=="LPC4330FET256-M0"||cpu()=="LPC4350FBD208"||cpu()=="LPC4350FBD208-M0"||cpu()=="LPC4350FET180"||cpu()=="LPC4350FET180-M0"||cpu()=="LPC4350FET256"||cpu()=="LPC4350FET256-M0"||cpu()=="LPC4333FBD144"||cpu()=="LPC4333FBD144-M0"||cpu()=="LPC4333FET100"||cpu()=="LPC4333FET100-M0"||cpu()=="LPC4333FET180"||cpu()=="LPC4333FET180-M0"||cpu()=="LPC4333FET256"||cpu()=="LPC4333FET256-M0"||cpu()=="LPC4337FBD144"||cpu()=="LPC4337FBD144-M0"||cpu()=="LPC4337FET100"||cpu()=="LPC4337FET100-M0"||cpu()=="LPC4337FET180"||cpu()=="LPC4337FET180-M0"||cpu()=="LPC4337FET256"||cpu()=="LPC4337FET256-M0"||cpu()=="LPC4353FBD208"||cpu()=="LPC4353FBD208-M0"||cpu()=="LPC4353FET180"||cpu()=="LPC4353FET180-M0"||cpu()=="LPC4353FET256"||cpu()=="LPC4353FET256-M0"||cpu()=="LPC4357FBD208"||cpu()=="LPC4357FBD208-M0"||cpu()=="LPC4357FET256"||cpu()=="LPC4357FET256-M0"||cpuis("LPC181*")||cpuis("LPC182*")||cpuis("LPC183*")||cpuis("LPC185*")) width 17. group.long 0x4C++0x03 line.long 0x00 "U3RS485CTRL,RS485 Control register" bitfld.long 0x00 5. " OINV ,Reverses the polarity of the direction control signal on the RTS (or DTR) pin" "Not inverted,Inverted" bitfld.long 0x00 4. " DCTRL ,Auto Direction Control" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " AADEN ,Auto Address Detect" "Disabled,Enabled" bitfld.long 0x00 1. " RXDIS ,The receiver disable" "Enabled,Disabled" textline " " bitfld.long 0x00 0. " NMMEN ,Normal Multidrop Mode" "Disabled,Enabled" group.long 0x50++0x0F line.long 0x00 "U3RS485ADRMATCH,RS485 Address Match register" hexmask.long.byte 0x00 0.--7. 1. " ADRMATCH ,Address match value" line.long 0x04 "U3RS485DLY,RS-485 Delay Value Register" hexmask.long.byte 0x04 0.--7. 1. " DLY ,Direction control (RTS or DTR) delay value" line.long 0x08 "SYNCCTRL,Synchronous mode control register" bitfld.long 0x08 6. " CCCLR ,Continuous clock clear" "Software,Hardware" bitfld.long 0x08 5. " SSSDIS ,Start/stop bits" "Sent,Not sent" textline " " bitfld.long 0x08 4. " CSCEN ,Continuous master clock enable" "Disabled,Enabled" bitfld.long 0x08 3. " TSBYPASS ,Transmit synchronization bypass in synchronous slave mode" "Synchronized,Not synchronized" textline " " bitfld.long 0x08 2. " FES ,Falling edge sampling" "Rising,Falling" bitfld.long 0x08 1. " CSRC ,Clock source select" "Slave,Master" textline " " bitfld.long 0x08 0. " SYNC ,Enables synchronous mode" "Disabled,Enabled" line.long 0x0C "U3TER,Transmit Enable Register" bitfld.long 0x0C 0. " TXEN ,Transmission Enable" "Disabled,Enabled" endif sif (cpu()!="LPC4310FBD144"&&cpu()!="LPC4310FBD144-M0"&&cpu()!="LPC4310FET100"&&cpu()!="LPC4310FET100-M0"&&cpu()!="LPC4320FBD100"&&cpu()!="LPC4320FBD100-M0"&&cpu()!="LPC4320FBD144"&&cpu()!="LPC4320FBD144-M0"&&cpu()!="LPC4320FET100"&&cpu()!="LPC4320FET100-M0"&&cpu()!="LPC4330FBD144"&&cpu()!="LPC4330FBD144-M0"&&cpu()!="LPC4330FET100"&&cpu()!="LPC4330FET100-M0"&&cpu()!="LPC4330FET180"&&cpu()!="LPC4330FET180-M0"&&cpu()!="LPC4330FET256"&&cpu()!="LPC4330FET256-M0"&&cpu()!="LPC4350FBD208"&&cpu()!="LPC4350FBD208-M0"&&cpu()!="LPC4350FET180"&&cpu()!="LPC4350FET180-M0"&&cpu()!="LPC4350FET256"&&cpu()!="LPC4350FET256-M0"&&cpu()!="LPC4333FBD144"&&cpu()!="LPC4333FBD144-M0"&&cpu()!="LPC4333FET100"&&cpu()!="LPC4333FET100-M0"&&cpu()!="LPC4333FET180"&&cpu()!="LPC4333FET180-M0"&&cpu()!="LPC4333FET256"&&cpu()!="LPC4333FET256-M0"&&cpu()!="LPC4337FBD144"&&cpu()!="LPC4337FBD144-M0"&&cpu()!="LPC4337FET100"&&cpu()!="LPC4337FET100-M0"&&cpu()!="LPC4337FET180"&&cpu()!="LPC4337FET180-M0"&&cpu()!="LPC4337FET256"&&cpu()!="LPC4337FET256-M0"&&cpu()!="LPC4353FBD208"&&cpu()!="LPC4353FBD208-M0"&&cpu()!="LPC4353FET180"&&cpu()!="LPC4353FET180-M0"&&cpu()!="LPC4353FET256"&&cpu()!="LPC4353FET256-M0"&&cpu()!="LPC4357FBD208"&&cpu()!="LPC4357FBD208-M0"&&cpu()!="LPC4357FET256"&&cpu()!="LPC4357FET256-M0"&&!cpuis("LPC181*")&&!cpuis("LPC182*")&&!cpuis("LPC183*")&&!cpuis("LPC185*")) endif width 0xB tree.end sif (cpu()=="LPC1772"||cpu()=="LPC1774"||cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778"||cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788") tree "UART 4" base ad:0x400A4000 width 11. if (((per.l((ad:0x400A4000+0xC)))&0x80)==0x00) hgroup.long 0x00++0x03 hide.long 0x00 "U4RBR/THR,Receiver/Transmit Buffer Register" in group.long 0x04++0x03 line.long 0x00 "U4IER,Interrupt Enable Register" bitfld.long 0x00 9. " ABTOINTEN ,Auto-baud Time-out Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 8. " ABEOINTEN ,End of Auto-baud Interrupt Enable" "Disabled,Enabled" sif (cpu()!="LPC1224"&&cpu()!="LPC1225"&&cpu()!="LPC1226"&&cpu()!="LPC1227"&&cpu()!="LPC1102"&&cpu()!="LPC1102LV"&&cpu()!="LPC1110"&&!cpuis("LPC1111*")&&!cpuis("LPC1112*")&&cpu()!="LPC1112LV"&&!cpuis("LPC1113*")&&!cpuis("LPC1114*")&&cpu()!="LPC1114LV"&&!cpuis("LPC1115*")&&cpu()!="LPC11D14") sif (cpu()=="LPC11U12/201"||cpu()=="LPC11U13/201"||cpu()=="LPC11U14/201"||cpu()=="LPC11U23/301"||cpuis("LPC11U24*")||cpuis("LPC11U3*")||cpu()=="LPC11A02"||cpu()=="LPC11A04"||cpu()=="LPC11A11"||cpu()=="LPC11A12"||cpu()=="LPC11A13"||cpu()=="LPC11A14"||cpuis("LPC11E*")) textline " " bitfld.long 0x00 3. " MSIE ,Modem interrupt Enable" "Disabled,Enabled" endif endif textline " " bitfld.long 0x00 2. " RXLSIE ,Rx Line Status Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " THREIE ,THRE Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RBRIE ,RBR Interrupt Enable" "Disabled,Enabled" else group.long 0x00++0x03 line.long 0x00 "U4DLL,Divisor Latch LSB" hexmask.long.byte 0x00 0.--7. 1. " DLLSB ,UARTn Divisor Latch LSB" group.long 0x04++0x03 line.long 0x00 "U4DLM,Divisor Latch MSB" hexmask.long.byte 0x00 0.--7. 1. " DLMSB ,UARTn Divisor Latch MSB" endif hgroup.long 0x08++0x03 hide.long 0x00 "U4IIR,Interrupt ID" in wgroup.long 0x08++0x03 line.long 0x00 "U4FCR,FIFO Control Register" bitfld.long 0x00 6.--7. " RXTRIGLVL ,Rx Trigger Level Select" "Level 0(1 char.),Level 1(4 char.),Level 2(8 char.),Level 3(14 char.)" sif (cpu()!="EM773"&&cpu()!="LPC1311"&&cpu()!="LPC1313"&&cpu()!="LPC1342"&&cpu()!="LPC1343"&&cpu()!="LPC11D14"&&cpu()!="LPC1110"&&!cpuis("LPC1111*")&&!cpuis("LPC1112*")&&cpu()!="LPC1112LV"&&!cpuis("LPC1113*")&&!cpuis("LPC1114*")&&cpu()!="LPC1114LV"&&!cpuis("LPC1115*")&&cpu()!="LPC11C12"&&cpu()!="LPC11C14"&&cpu()!="LPC1102"&&cpu()!="LPC11C22"&&cpu()!="LPC11C24"&&cpu()!="LPC11U12/201"&&cpu()!="LPC11U23/301"&&!cpuis("LPC11U24*")&&cpu()!="LPC11U13/201"&&cpu()!="LPC11U14/201"&&cpuis("LPC11U3*")&&cpu()!="LPC11A02"&&cpu()!="LPC11A04"&&cpu()!="LPC11A11"&&cpu()!="LPC11A12"&&cpu()!="LPC11A13"&&cpu()!="LPC11A14"&&!cpuis("LPC11E*")) bitfld.long 0x0 3. " DMAMODE ,DMA Mode Enable" "Disable,Enable" endif textline " " bitfld.long 0x0 2. " TXFIFORES ,Transmitter FIFO Reset" "No reset,Reset" bitfld.long 0x0 1. " RXFIFORES ,Receiver FIFO Reset" "No reset,Reset" textline " " bitfld.long 0x00 0. " FIFOENABLE ,FIFO Enable" "Disable,Enable" sif (cpu()=="LPC11A02"||cpu()=="LPC11A04"||cpu()=="LPC11A11"||cpu()=="LPC11A12"||cpu()=="LPC11A13"||cpu()=="LPC11A14"||cpuis("LPC11E*")) group.long 0x10++0x3 line.long 0x00 "U4MCR,USART Modem Control Register" bitfld.long 0x00 7. " CTSEN ,CTS enable" "Disabled,Enabled" bitfld.long 0x00 6. " RTSEN ,RTS enable" "Disabled,Enabled" bitfld.long 0x00 4. " LMS ,Loopback Mode Select" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " RTSCON ,Source for modem output pin RTS" "Active,Inactive" bitfld.long 0x00 0. " DTRCON ,Source for modem output pin DTR" "Active,Inactive" endif if ((per.l((ad:0x400A4000+0xC))&0x03)==0x00) group.long 0x0C++0x03 line.long 0x00 "U4LCR,Line Control Register" bitfld.long 0x00 7. " DLAB ,Divisor Latch Access Bit" "Disabled,Enabled" bitfld.long 0x00 6. " BREAKCONTROL ,Break Control" "Disabled,Enabled" textline " " bitfld.long 0x00 4.--5. " PARITYSELECT ,Parity Select" "Odd,Even,Forced 1,Forced 0" bitfld.long 0x00 3. " PARITYENABLE ,Parity Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " SBS ,Stop Bit Select" "1 bit,1.5 bits" bitfld.long 0x00 0.--1. " WLS ,Word Length Select" "5-bit,6-bit,7-bit,8-bit" else group.long 0x0C++0x03 line.long 0x00 "U4LCR,Line Control Register" bitfld.long 0x00 7. " DLAB ,Divisor Latch Access Bit" "Disabled,Enabled" bitfld.long 0x00 6. " BREAKCONTROL ,Break Control" "Disabled,Enabled" textline " " bitfld.long 0x00 4.--5. " PARITYSELECT ,Parity Select" "Odd,Even,Forced 1,Forced 0" bitfld.long 0x00 3. " PARITYENABLE ,Parity Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " SBS ,Stop Bit Select" "1 bit,2 bits" bitfld.long 0x00 0.--1. " WLS ,Word Length Select" "5-bit,6-bit,7-bit,8-bit" endif sif (cpu()=="EM773"||cpu()=="LPC1311"||cpu()=="LPC1313"||cpu()=="LPC1342"||cpu()=="LPC1343"||cpu()=="LPC11D14"||cpu()=="LPC1110"||cpuis("LPC1111*")||cpuis("LPC1112*")||cpu()=="LPC1112LV"||cpuis("LPC1113*")||cpuis("LPC1114*")||cpu()=="LPC1114LV"||cpuis("LPC1115*")||cpu()=="LPC11C12"||cpu()=="LPC11C14"||cpu()=="LPC11C22"||cpu()=="LPC11C24"||cpu()=="LPC11U12/201"||cpu()=="LPC11U13/201"||cpu()=="LPC11U14/201"||cpu()=="LPC11U23/301"||cpuis("LPC11U24*")||cpuis("LPC11U3*")) group.long 0x10++0x03 line.long 0x00 "U4MCR,Modem Control Register" bitfld.long 0x00 7. " CTSEN ,Auto-cts flow control" "Disabled,Enabled" bitfld.long 0x00 6. " RTSEN ,Auto-rts flow" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " LOOPMODE ,Modem loopback mode select" "Disabled,Enabled" bitfld.long 0x00 1. " RTSCTRL ,Source for modem output pin RTS" "Low,High" textline " " bitfld.long 0x00 0. " DTRCTRL ,Source for modem output pin DTR" "Low,High" endif hgroup.long 0x14++0x03 hide.long 0x00 "U4LSR,Line Status Register" in sif (cpu()=="EM773"||cpu()=="LPC1224"||cpu()=="LPC1225"||cpu()=="LPC1226"||cpu()=="LPC1227"||cpu()=="LPC1311"||cpu()=="LPC1313"||cpu()=="LPC1342"||cpu()=="LPC1343"||cpu()=="LPC1110"||cpuis("LPC1111*")||cpuis("LPC1112*")||cpu()=="LPC1112LV"||cpuis("LPC1113*")||cpuis("LPC1114*")||cpu()=="LPC1114LV"||cpuis("LPC1115*")||cpu()=="LPC11D14"||cpu()=="LPC11C12"||cpu()=="LPC11C14"||cpu()=="LPC11C22"||cpu()=="LPC11C24"||cpu()=="LPC11U12/201"||cpu()=="LPC11U13/201"||cpu()=="LPC11U14/201"||cpu()=="LPC11U23/301"||cpuis("LPC11U24*")||cpuis("LPC11U3*")||cpuis("LPC11E*")||cpu()=="LPC11A02"||cpu()=="LPC11A04"||cpu()=="LPC11A11"||cpu()=="LPC11A12"||cpu()=="LPC11A13"||cpu()=="LPC11A14") hgroup.long 0x18++0x03 hide.long 0x00 "U4MSR,Modem Status Register" in endif group.long 0x1C++0x03 line.long 0x00 "U4SCR,Scratch Pad Register" hexmask.long.byte 0x00 0.--7. 1. " Pad ,A readable/writable byte" group.long 0x20++0x03 line.long 0x00 "U4ACR,Auto-baud Control Register" bitfld.long 0x00 9. " ABTOINTCLR ,Auto-baud Time-out Interrupt Clear Bit" "No effect,Cleared" bitfld.long 0x00 8. " ABEOINTCLR ,End of Auto-baud Interrupt Clear Bit" "No effect,Cleared" textline " " bitfld.long 0x00 2. " AUTORESTART ,Auto Restart" "Not restarted,Restarted" bitfld.long 0x00 1. " MODE ,Auto-baud Mode Select" "Mode 0,Mode 1" textline " " bitfld.long 0x00 0. " START ,Auto-baud Start" "Stopped,Started" sif (cpuis("LPC181*")||cpuis("LPC182*")||cpuis("LPC183*")||cpuis("LPC185*")||cpu()=="LPC4310FBD144"||cpu()=="LPC4310FBD144-M0"||cpu()=="LPC4310FET100"||cpu()=="LPC4310FET100-M0"||cpu()=="LPC4320FBD100"||cpu()=="LPC4320FBD100-M0"||cpu()=="LPC4320FBD144"||cpu()=="LPC4320FBD144-M0"||cpu()=="LPC4320FET100"||cpu()=="LPC4320FET100-M0"||cpu()=="LPC4330FBD144"||cpu()=="LPC4330FBD144-M0"||cpu()=="LPC4330FET100"||cpu()=="LPC4330FET100-M0"||cpu()=="LPC4330FET180"||cpu()=="LPC4330FET180-M0"||cpu()=="LPC4330FET256"||cpu()=="LPC4330FET256-M0"||cpu()=="LPC4350FBD208"||cpu()=="LPC4350FBD208-M0"||cpu()=="LPC4350FET180"||cpu()=="LPC4350FET180-M0"||cpu()=="LPC4350FET256"||cpu()=="LPC4350FET256-M0"||cpu()=="LPC4333FBD144"||cpu()=="LPC4333FBD144-M0"||cpu()=="LPC4333FET100"||cpu()=="LPC4333FET100-M0"||cpu()=="LPC4333FET180"||cpu()=="LPC4333FET180-M0"||cpu()=="LPC4333FET256"||cpu()=="LPC4333FET256-M0"||cpu()=="LPC4337FBD144"||cpu()=="LPC4337FBD144-M0"||cpu()=="LPC4337FET100"||cpu()=="LPC4337FET100-M0"||cpu()=="LPC4337FET180"||cpu()=="LPC4337FET180-M0"||cpu()=="LPC4337FET256"||cpu()=="LPC4337FET256-M0"||cpu()=="LPC4353FBD208"||cpu()=="LPC4353FBD208-M0"||cpu()=="LPC4353FET180"||cpu()=="LPC4353FET180-M0"||cpu()=="LPC4353FET256"||cpu()=="LPC4353FET256-M0"||cpu()=="LPC4357FBD208"||cpu()=="LPC4357FBD208-M0"||cpu()=="LPC4357FET256"||cpu()=="LPC4357FET256-M0") elif (cpu()!="EM773"&&cpu()!="LPC1110"&&!cpuis("LPC1111*")&&!cpuis("LPC1112*")&&cpu()!="LPC1112LV"&&!cpuis("LPC1113*")&&!cpuis("LPC1114*")&&cpu()!="LPC1114LV"&&!cpuis("LPC1115*")&&cpu()!="LPC11D14"&&cpu()!="LPC11C12"&&cpu()!="LPC11C14"&&cpu()!="LPC1102"&&cpu()!="LPC1102LV"&&cpu()!="LPC11C22"&&cpu()!="LPC11C24"&&cpu()!="LPC1224"&&cpu()!="LPC1225"&&cpu()!="LPC1226"&&cpu()!="LPC1227") if (((per.l((ad:0x400A4000+0x24)))&0x4)==0x4) group.long 0x24++0x3 line.long 0x0 "U4ICR,IrDA Control Register" sif cpu()=="LPC11U12/201"||cpu()=="LPC11U13/x201"||cpu()=="LPC11U14/201"||cpu()=="LPC11U23/301"||cpuis("LPC11U24*")||cpuis("LPC11U3*")||cpuis("LPC11E*") bitfld.long 0x00 3.--5. " PULSEDIV ,IrDA transmitter pulse width [us]" "3/(16 * baud rate),2 * Tpclk,4 * Tpclk,8 * Tpclk,16 * Tpclk,32 * Tpclk,64 * Tpclk,128 * Tpclk" else bitfld.long 0x00 3.--5. " PULSEDIV ,IrDA transmitter pulse width [us]" "2 * Tpclk,4 * Tpclk,8 * Tpclk,16 * Tpclk,32 * Tpclk,64 * Tpclk,128 * Tpclk,256 * Tpclk" endif textline " " bitfld.long 0x00 2. " FIXPULSEEN ,IrDA fixed-pulse-width mode" "Disabled,Enabled" bitfld.long 0x00 1. " IRDAINV ,IrDA Serial Input Invert" "Not inverted,Inverted" textline " " bitfld.long 0x00 0. " IRDAEN ,IrDA Enable" "Disabled,Enabled" else group.long 0x24++0x3 line.long 0x0 "U4ICR,IrDA Control Register" textline " " bitfld.long 0x00 2. " FIXPULSEEN ,IrDA fixed-pulse-width mode" "Disabled,Enabled" bitfld.long 0x00 1. " IRDAINV ,IrDA Serial Input Invert" "Not inverted,Inverted" textline " " bitfld.long 0x00 0. " IRDAEN ,IrDA Enable" "Disabled,Enabled" endif elif (cpu()=="LPC1224"||cpu()=="LPC1225"||cpu()=="LPC1226"||cpu()=="LPC1227") endif group.long 0x28++0x03 line.long 0x00 "U4FDR,Fractional Divider Register" bitfld.long 0x00 4.--7. " MULVAL , Pre-scaler Multiplier Value" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpu()=="EM773"||cpu()=="LPC1311"||cpu()=="LPC1313"||cpu()=="LPC1342"||cpu()=="LPC1343"||cpu()=="LPC1110"||cpuis("LPC1111*")||cpuis("LPC1112*")||cpu()=="LPC1112LV"||cpuis("LPC1113*")||cpuis("LPC1114*")||cpu()=="LPC1114LV"||cpuis("LPC1115*")||cpu()=="LPC11D14"||cpu()=="LPC11C12"||cpu()=="LPC11C14"||cpu()=="LPC1102"||cpu()=="LPC11C22"||cpu()=="LPC11C24"||cpu()=="LPC11U12/201"||cpu()=="LPC11U13/201"||cpu()=="LPC11U14/201"||cpu()=="LPC11U23/301"||cpuis("LPC11U24*")||cpuis("LPC11U3*")||cpu()=="LPC4310FBD144"||cpu()=="LPC4310FBD144-M0"||cpu()=="LPC4310FET100"||cpu()=="LPC4310FET100-M0"||cpu()=="LPC4320FBD100"||cpu()=="LPC4320FBD100-M0"||cpu()=="LPC4320FBD144"||cpu()=="LPC4320FBD144-M0"||cpu()=="LPC4320FET100"||cpu()=="LPC4320FET100-M0"||cpu()=="LPC4330FBD144"||cpu()=="LPC4330FBD144-M0"||cpu()=="LPC4330FET100"||cpu()=="LPC4330FET100-M0"||cpu()=="LPC4330FET180"||cpu()=="LPC4330FET180-M0"||cpu()=="LPC4330FET256"||cpu()=="LPC4330FET256-M0"||cpu()=="LPC4350FBD208"||cpu()=="LPC4350FBD208-M0"||cpu()=="LPC4350FET180"||cpu()=="LPC4350FET180-M0"||cpu()=="LPC4350FET256"||cpu()=="LPC4350FET256-M0"||cpu()=="LPC4333FBD144"||cpu()=="LPC4333FBD144-M0"||cpu()=="LPC4333FET100"||cpu()=="LPC4333FET100-M0"||cpu()=="LPC4333FET180"||cpu()=="LPC4333FET180-M0"||cpu()=="LPC4333FET256"||cpu()=="LPC4333FET256-M0"||cpu()=="LPC4337FBD144"||cpu()=="LPC4337FBD144-M0"||cpu()=="LPC4337FET100"||cpu()=="LPC4337FET100-M0"||cpu()=="LPC4337FET180"||cpu()=="LPC4337FET180-M0"||cpu()=="LPC4337FET256"||cpu()=="LPC4337FET256-M0"||cpu()=="LPC4353FBD208"||cpu()=="LPC4353FBD208-M0"||cpu()=="LPC4353FET180"||cpu()=="LPC4353FET180-M0"||cpu()=="LPC4353FET256"||cpu()=="LPC4353FET256-M0"||cpu()=="LPC4357FBD208"||cpu()=="LPC4357FBD208-M0"||cpu()=="LPC4357FET256"||cpu()=="LPC4357FET256-M0") bitfld.long 0x00 0.--3. " DIVADDVAL , Pre-scaler Divisor Value" "No effect,1,2,3,4,5,6,7,8,9,10,11,12,13,14,?..." else bitfld.long 0x00 0.--3. " DIVADDVAL , Pre-scaler Divisor Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,?..." endif sif (cpu()=="LPC11U12/201"||cpu()=="LPC11U13/201"||cpu()=="LPC11U14/201"||cpu()=="LPC11U23/301"||cpuis("LPC11U24*")||cpuis("LPC11U3*")||cpuis("LPC11E*")||cpu()=="LPC11A02"||cpu()=="LPC11A04"||cpu()=="LPC11A11"||cpu()=="LPC11A12"||cpu()=="LPC11A13"||cpu()=="LPC11A14") group.long 0x2C++0x3 line.long 0x00 "U4OSR,Oversampling Register" hexmask.long.byte 0x00 8.--14. 1. " FDINT ,These bits act as a more-significant extension of the OSint field" bitfld.long 0x00 4.--7. " OSINT ,Integer part of the oversampling ratio" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x00 1.--3. " OSFRAC ,Fractional part of the oversampling ratio" "Reserved,0.125,0.250,0.375,0.5,0.625,0.750,0.875" group.long 0x30++0x03 line.long 0x00 "U4TER,Transmit Enable Register" bitfld.long 0x00 7. " TXEN ,Transmission Enable" "Disabled,Enabled" group.long 0x40++0x3 line.long 0x00 "U4HDEN,USART Half-duplex Enable Register" bitfld.long 0x00 0. " HDEN ,Half-duplex mode enable" "Disabled,Enabled" group.long 0x48++0x3 line.long 0x00 "U4SCICCTRL,Smart Card Interface Control register" hexmask.long.byte 0x00 8.--15. 1. " XTRAGUARD ,This field indicates the number of bit times (ETUs)" bitfld.long 0x00 5.--7. " TXRETRY ,Controls the maximum number of retransmissions" "0,1,2,3,4,5,6,7" bitfld.long 0x00 2. " PROTSEL ,Protocol selection as defined in the ISO7816-3 standard" "T=0,T=1" textline " " bitfld.long 0x00 1. " NACKDIS ,NACK response disable" "No,Yes" bitfld.long 0x00 0. " SCIEN ,Smart Card Interface Enable" "Disabled,Enabled" endif sif (cpu()=="LPC4310FBD144"||cpu()=="LPC4310FBD144-M0"||cpu()=="LPC4310FET100"||cpu()=="LPC4310FET100-M0"||cpu()=="LPC4320FBD100"||cpu()=="LPC4320FBD100-M0"||cpu()=="LPC4320FBD144"||cpu()=="LPC4320FBD144-M0"||cpu()=="LPC4320FET100"||cpu()=="LPC4320FET100-M0"||cpu()=="LPC4330FBD144"||cpu()=="LPC4330FBD144-M0"||cpu()=="LPC4330FET100"||cpu()=="LPC4330FET100-M0"||cpu()=="LPC4330FET180"||cpu()=="LPC4330FET180-M0"||cpu()=="LPC4330FET256"||cpu()=="LPC4330FET256-M0"||cpu()=="LPC4350FBD208"||cpu()=="LPC4350FBD208-M0"||cpu()=="LPC4350FET180"||cpu()=="LPC4350FET180-M0"||cpu()=="LPC4350FET256"||cpu()=="LPC4350FET256-M0"||cpu()=="LPC4333FBD144"||cpu()=="LPC4333FBD144-M0"||cpu()=="LPC4333FET100"||cpu()=="LPC4333FET100-M0"||cpu()=="LPC4333FET180"||cpu()=="LPC4333FET180-M0"||cpu()=="LPC4333FET256"||cpu()=="LPC4333FET256-M0"||cpu()=="LPC4337FBD144"||cpu()=="LPC4337FBD144-M0"||cpu()=="LPC4337FET100"||cpu()=="LPC4337FET100-M0"||cpu()=="LPC4337FET180"||cpu()=="LPC4337FET180-M0"||cpu()=="LPC4337FET256"||cpu()=="LPC4337FET256-M0"||cpu()=="LPC4353FBD208"||cpu()=="LPC4353FBD208-M0"||cpu()=="LPC4353FET180"||cpu()=="LPC4353FET180-M0"||cpu()=="LPC4353FET256"||cpu()=="LPC4353FET256-M0"||cpu()=="LPC4357FBD208"||cpu()=="LPC4357FBD208-M0"||cpu()=="LPC4357FET256"||cpu()=="LPC4357FET256-M0") group.long 0x2C++0x3 line.long 0x00 "U4OSR,Oversampling Register" hexmask.long.byte 0x00 8.--14. 1. " FDINT ,These bits act as a more-significant extension of the OSint field" bitfld.long 0x00 4.--7. " OSINT ,Integer part of the oversampling ratio" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x00 1.--3. " OSFRAC ,Fractional part of the oversampling ratio" "Reserved,0.125,0.250,0.375,0.5,0.625,0.750,0.875" group.long 0x40++0x3 line.long 0x00 "U4HDEN,USART Half-duplex Enable Register" bitfld.long 0x00 0. " HDEN ,Half-duplex mode enable" "Disabled,Enabled" if (((per.l((ad:0x400A4000+0x48)))&0x04)==0x04) group.long 0x48++0x3 line.long 0x00 "U4SCICCTRL,Smart Card Interface Control register" hexmask.long.byte 0x00 8.--15. 1. " GUARDTIME ,Extra guard time" bitfld.long 0x00 5.--7. " TXRETRY ,Controls the maximum number of retransmissions" "0,1,2,3,4,5,6,7" bitfld.long 0x00 2. " PROTSEL ,Protocol selection as defined in the ISO7816-3 standard" "T=0,T=1" textline " " bitfld.long 0x00 0. " SCIEN ,Smart Card Interface Enable" "Disabled,Enabled" else group.long 0x48++0x3 line.long 0x00 "U4SCICCTRL,Smart Card Interface Control register" hexmask.long.byte 0x00 8.--15. 1. " GUARDTIME ,Extra guard time" bitfld.long 0x00 5.--7. " TXRETRY ,Controls the maximum number of retransmissions" "0,1,2,3,4,5,6,7" bitfld.long 0x00 2. " PROTSEL ,Protocol selection as defined in the ISO7816-3 standard" "T=0,T=1" textline " " bitfld.long 0x00 1. " NACKDIS ,NACK response disable" "No,Yes" bitfld.long 0x00 0. " SCIEN ,Smart Card Interface Enable" "Disabled,Enabled" endif endif sif (cpu()=="LPC1772"||cpu()=="LPC1774"||cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778"||cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788") group.long 0x2C++0x03 line.long 0x00 "U4OSR,Oversampling Register" hexmask.long.byte 0x00 8.--14. 1. " FDINT ,These bits act as a more-significant extension of the OSint field" bitfld.long 0x00 4.--7. " OSINT ,Integer part of the oversampling ratio" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x00 1.--3. " OSFRAC ,Fractional part of the oversampling ratio" "Reserved,0.125,0.250,0.375,0.5,0.625,0.750,0.875" if (((per.l((ad:0x400A4000+0x48)))&0x04)==0x00) group.long 0x48++0x03 line.long 0x00 "U4SCICTRL,Smart Card Interface Control register" hexmask.long.byte 0x00 8.--15. 1. " XTRAGUARD ,This field indicates the number of bit times (ETUs)" bitfld.long 0x00 5.--7. " TXRETRY ,Controls the maximum number of retransmissions" "0,1,2,3,4,5,6,7" bitfld.long 0x00 2. " PROTSEL ,Protocol selection as defined in the ISO7816-3 standard" "T=0,T=1" textline " " bitfld.long 0x00 1. " NACKDIS ,NACK response disable" "No,Yes" bitfld.long 0x00 0. " SCIEN ,Smart Card Interface Enable" "Disabled,Enabled" else group.long 0x48++0x03 line.long 0x00 "U$1SCICTRL,Smart Card Interface Control register" bitfld.long 0x00 2. " PROTSEL ,Protocol selection as defined in the ISO7816-3 standard" "T=0,T=1" textline " " bitfld.long 0x00 0. " SCIEN ,Smart Card Interface Enable" "Disabled,Enabled" endif endif sif cpuis("LPC181*")||cpuis("LPC182*")||cpuis("LPC183*")||cpuis("LPC185*") group.long 0x2C++0x03 line.long 0x00 "U4OSR,Oversampling Register" hexmask.long.byte 0x00 8.--14. 1. " FDINT ,These bits act as a more-significant extension of the OSint field" bitfld.long 0x00 4.--7. " OSINT ,Integer part of the oversampling ratio" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x00 1.--3. " OSFRAC ,Fractional part of the oversampling ratio" "Reserved,0.125,0.250,0.375,0.5,0.625,0.750,0.875" group.long 0x40++0x3 line.long 0x00 "U4HDEN,USART Half-duplex Enable Register" bitfld.long 0x00 0. " HDEN ,Half-duplex mode enable" "Disabled,Enabled" width 17. if (((per.l((ad:0x400A4000+0x48)))&0x04)==0x04) group.long 0x48++0x3 line.long 0x00 "U4SCICCTRL,Smart Card Interface Control register" hexmask.long.byte 0x00 8.--15. 1. " GUARDTIME ,Extra guard time" bitfld.long 0x00 5.--7. " TXRETRY ,Controls the maximum number of retransmissions" "0,1,2,3,4,5,6,7" bitfld.long 0x00 2. " PROTSEL ,Protocol selection as defined in the ISO7816-3 standard" "T=0,T=1" textline " " bitfld.long 0x00 0. " SCIEN ,Smart Card Interface Enable" "Disabled,Enabled" else group.long 0x48++0x3 line.long 0x00 "U4SCICCTRL,Smart Card Interface Control register" hexmask.long.byte 0x00 8.--15. 1. " GUARDTIME ,Extra guard time" bitfld.long 0x00 5.--7. " TXRETRY ,Controls the maximum number of retransmissions" "0,1,2,3,4,5,6,7" bitfld.long 0x00 2. " PROTSEL ,Protocol selection as defined in the ISO7816-3 standard" "T=0,T=1" textline " " bitfld.long 0x00 1. " NACKDIS ,NACK response disable" "No,Yes" bitfld.long 0x00 0. " SCIEN ,Smart Card Interface Enable" "Disabled,Enabled" endif endif sif (!cpuis("LPC176*")&&!cpuis("LPC175*")&&!cpuis("LPC1111*")&&!cpuis("LPC1112*")&&!cpuis("LPC1113*")&&!cpuis("LPC1114*")&&cpu()!="LPC11C12"&&cpu()!="LPC11C14"&&cpu()!="LPC1102"&&cpu()!="EM773"&&cpu()!="LPC1772"&&cpu()!="LPC1774"&&cpu()!="LPC1776"&&cpu()!="LPC1777"&&cpu()!="LPC1778"&&cpu()!="LPC1785"&&cpu()!="LPC1786"&&cpu()!="LPC1787"&&cpu()!="LPC1788"&&cpu()!="LPC11C22"&&cpu()!="LPC11C24"&&cpu()!="LPC11U12/201"&&cpu()!="LPC11U13/201"&&cpu()!="LPC11U14/201"&&cpu()!="LPC11U23/301"&&!cpuis("LPC11U24*")&&!cpuis("LPC11U3*")&&cpu()!="LPC11A02"&&cpu()!="LPC11A04"&&cpu()!="LPC11A11"&&cpu()!="LPC11A12"&&cpu()!="LPC11A13"&&cpu()!="LPC11A14"&&!cpuis("LPC11E*")&&!cpuis("LPC181*")&&!cpuis("LPC182*")&&!cpuis("LPC183*")&&!cpuis("LPC185*")&&cpu()!="LPC4310FBD144"&&cpu()!="LPC4310FBD144-M0"&&cpu()!="LPC4310FET100"&&cpu()!="LPC4310FET100-M0"&&cpu()!="LPC4320FBD100"&&cpu()!="LPC4320FBD100-M0"&&cpu()!="LPC4320FBD144"&&cpu()!="LPC4320FBD144-M0"&&cpu()!="LPC4320FET100"&&cpu()!="LPC4320FET100-M0"&&cpu()!="LPC4330FBD144"&&cpu()!="LPC4330FBD144-M0"&&cpu()!="LPC4330FET100"&&cpu()!="LPC4330FET100-M0"&&cpu()!="LPC4330FET180"&&cpu()!="LPC4330FET180-M0"&&cpu()!="LPC4330FET256"&&cpu()!="LPC4330FET256-M0"&&cpu()!="LPC4350FBD208"&&cpu()!="LPC4350FBD208-M0"&&cpu()!="LPC4350FET180"&&cpu()!="LPC4350FET180-M0"&&cpu()!="LPC4350FET256"&&cpu()!="LPC4350FET256-M0"&&cpu()!="LPC4333FBD144"&&cpu()!="LPC4333FBD144-M0"&&cpu()!="LPC4333FET100"&&cpu()!="LPC4333FET100-M0"&&cpu()!="LPC4333FET180"&&cpu()!="LPC4333FET180-M0"&&cpu()!="LPC4333FET256"&&cpu()!="LPC4333FET256-M0"&&cpu()!="LPC4337FBD144"&&cpu()!="LPC4337FBD144-M0"&&cpu()!="LPC4337FET100"&&cpu()!="LPC4337FET100-M0"&&cpu()!="LPC4337FET180"&&cpu()!="LPC4337FET180-M0"&&cpu()!="LPC4337FET256"&&cpu()!="LPC4337FET256-M0"&&cpu()!="LPC4353FBD208"&&cpu()!="LPC4353FBD208-M0"&&cpu()!="LPC4353FET180"&&cpu()!="LPC4353FET180-M0"&&cpu()!="LPC4353FET256"&&cpu()!="LPC4353FET256-M0"&&cpu()!="LPC4357FBD208"&&cpu()!="LPC4357FBD208-M0"&&cpu()!="LPC4357FET256"&&cpu()!="LPC4357FET256-M0") endif sif (cpu()=="LPC4310FBD144"||cpu()=="LPC4310FBD144-M0"||cpu()=="LPC4310FET100"||cpu()=="LPC4310FET100-M0"||cpu()=="LPC4320FBD100"||cpu()=="LPC4320FBD100-M0"||cpu()=="LPC4320FBD144"||cpu()=="LPC4320FBD144-M0"||cpu()=="LPC4320FET100"||cpu()=="LPC4320FET100-M0"||cpu()=="LPC4330FBD144"||cpu()=="LPC4330FBD144-M0"||cpu()=="LPC4330FET100"||cpu()=="LPC4330FET100-M0"||cpu()=="LPC4330FET180"||cpu()=="LPC4330FET180-M0"||cpu()=="LPC4330FET256"||cpu()=="LPC4330FET256-M0"||cpu()=="LPC4350FBD208"||cpu()=="LPC4350FBD208-M0"||cpu()=="LPC4350FET180"||cpu()=="LPC4350FET180-M0"||cpu()=="LPC4350FET256"||cpu()=="LPC4350FET256-M0"||cpu()=="LPC4333FBD144"||cpu()=="LPC4333FBD144-M0"||cpu()=="LPC4333FET100"||cpu()=="LPC4333FET100-M0"||cpu()=="LPC4333FET180"||cpu()=="LPC4333FET180-M0"||cpu()=="LPC4333FET256"||cpu()=="LPC4333FET256-M0"||cpu()=="LPC4337FBD144"||cpu()=="LPC4337FBD144-M0"||cpu()=="LPC4337FET100"||cpu()=="LPC4337FET100-M0"||cpu()=="LPC4337FET180"||cpu()=="LPC4337FET180-M0"||cpu()=="LPC4337FET256"||cpu()=="LPC4337FET256-M0"||cpu()=="LPC4353FBD208"||cpu()=="LPC4353FBD208-M0"||cpu()=="LPC4353FET180"||cpu()=="LPC4353FET180-M0"||cpu()=="LPC4353FET256"||cpu()=="LPC4353FET256-M0"||cpu()=="LPC4357FBD208"||cpu()=="LPC4357FBD208-M0"||cpu()=="LPC4357FET256"||cpu()=="LPC4357FET256-M0"||cpuis("LPC181*")||cpuis("LPC182*")||cpuis("LPC183*")||cpuis("LPC185*")) width 17. group.long 0x4C++0x03 line.long 0x00 "U4RS485CTRL,RS485 Control register" bitfld.long 0x00 5. " OINV ,Reverses the polarity of the direction control signal on the RTS (or DTR) pin" "Not inverted,Inverted" bitfld.long 0x00 4. " DCTRL ,Auto Direction Control" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " AADEN ,Auto Address Detect" "Disabled,Enabled" bitfld.long 0x00 1. " RXDIS ,The receiver disable" "Enabled,Disabled" textline " " bitfld.long 0x00 0. " NMMEN ,Normal Multidrop Mode" "Disabled,Enabled" group.long 0x50++0x0F line.long 0x00 "U4RS485ADRMATCH,RS485 Address Match register" hexmask.long.byte 0x00 0.--7. 1. " ADRMATCH ,Address match value" line.long 0x04 "U4RS485DLY,RS-485 Delay Value Register" hexmask.long.byte 0x04 0.--7. 1. " DLY ,Direction control (RTS or DTR) delay value" line.long 0x08 "SYNCCTRL,Synchronous mode control register" bitfld.long 0x08 6. " CCCLR ,Continuous clock clear" "Software,Hardware" bitfld.long 0x08 5. " SSSDIS ,Start/stop bits" "Sent,Not sent" textline " " bitfld.long 0x08 4. " CSCEN ,Continuous master clock enable" "Disabled,Enabled" bitfld.long 0x08 3. " TSBYPASS ,Transmit synchronization bypass in synchronous slave mode" "Synchronized,Not synchronized" textline " " bitfld.long 0x08 2. " FES ,Falling edge sampling" "Rising,Falling" bitfld.long 0x08 1. " CSRC ,Clock source select" "Slave,Master" textline " " bitfld.long 0x08 0. " SYNC ,Enables synchronous mode" "Disabled,Enabled" line.long 0x0C "U4TER,Transmit Enable Register" bitfld.long 0x0C 0. " TXEN ,Transmission Enable" "Disabled,Enabled" endif sif (cpu()!="LPC4310FBD144"&&cpu()!="LPC4310FBD144-M0"&&cpu()!="LPC4310FET100"&&cpu()!="LPC4310FET100-M0"&&cpu()!="LPC4320FBD100"&&cpu()!="LPC4320FBD100-M0"&&cpu()!="LPC4320FBD144"&&cpu()!="LPC4320FBD144-M0"&&cpu()!="LPC4320FET100"&&cpu()!="LPC4320FET100-M0"&&cpu()!="LPC4330FBD144"&&cpu()!="LPC4330FBD144-M0"&&cpu()!="LPC4330FET100"&&cpu()!="LPC4330FET100-M0"&&cpu()!="LPC4330FET180"&&cpu()!="LPC4330FET180-M0"&&cpu()!="LPC4330FET256"&&cpu()!="LPC4330FET256-M0"&&cpu()!="LPC4350FBD208"&&cpu()!="LPC4350FBD208-M0"&&cpu()!="LPC4350FET180"&&cpu()!="LPC4350FET180-M0"&&cpu()!="LPC4350FET256"&&cpu()!="LPC4350FET256-M0"&&cpu()!="LPC4333FBD144"&&cpu()!="LPC4333FBD144-M0"&&cpu()!="LPC4333FET100"&&cpu()!="LPC4333FET100-M0"&&cpu()!="LPC4333FET180"&&cpu()!="LPC4333FET180-M0"&&cpu()!="LPC4333FET256"&&cpu()!="LPC4333FET256-M0"&&cpu()!="LPC4337FBD144"&&cpu()!="LPC4337FBD144-M0"&&cpu()!="LPC4337FET100"&&cpu()!="LPC4337FET100-M0"&&cpu()!="LPC4337FET180"&&cpu()!="LPC4337FET180-M0"&&cpu()!="LPC4337FET256"&&cpu()!="LPC4337FET256-M0"&&cpu()!="LPC4353FBD208"&&cpu()!="LPC4353FBD208-M0"&&cpu()!="LPC4353FET180"&&cpu()!="LPC4353FET180-M0"&&cpu()!="LPC4353FET256"&&cpu()!="LPC4353FET256-M0"&&cpu()!="LPC4357FBD208"&&cpu()!="LPC4357FBD208-M0"&&cpu()!="LPC4357FET256"&&cpu()!="LPC4357FET256-M0"&&!cpuis("LPC181*")&&!cpuis("LPC182*")&&!cpuis("LPC183*")&&!cpuis("LPC185*")) endif if (((per.l((ad:0x400A4000+0x58)))&0x02)==0x02) group.long 0x58++0x07 line.long 0x00 "U4SYNCCTRL,UART4 Synchronous mode control register" bitfld.long 0x00 6. " CCCLR ,Continuous clock clear" "Software,Hardware" bitfld.long 0x00 5. " SSSDIS ,Start/stop bits" "Sent,Not sent" textline " " bitfld.long 0x00 4. " CSCEN ,Continuous master clock enable" "Disabled,Enabled" bitfld.long 0x00 3. " TSBYPASS ,Transmit synchronization bypass in synchronous slave mode" "Synchronized,Not synchronized" textline " " bitfld.long 0x00 2. " FES ,Falling edge sampling" "Rising,Falling" bitfld.long 0x00 1. " CSRC ,Clock source select" "Slave,Master" textline " " bitfld.long 0x00 0. " SYNC ,Enables synchronous mode" "Disabled,Enabled" else group.long 0x58++0x07 line.long 0x00 "U4SYNCCTRL,UART4 Synchronous mode control register" bitfld.long 0x00 6. " CCCLR ,Continuous clock clear" "Software,Hardware" bitfld.long 0x00 5. " SSSDIS ,Start/stop bits" "Sent,Not sent" textline " " bitfld.long 0x00 3. " TSBYPASS ,Transmit synchronization bypass in synchronous slave mode" "Synchronized,Not synchronized" bitfld.long 0x00 2. " FES ,Falling edge sampling" "Rising,Falling" textline " " bitfld.long 0x00 1. " CSRC ,Clock source select" "Slave,Master" bitfld.long 0x00 0. " SYNC ,Enables synchronous mode" "Disabled,Enabled" endif group.long 0x5C++0x07 line.long 0x00 "U4TER,Transmit Enable Register" bitfld.long 0x00 0. " TXEN ,Transmission Enable" "Disabled,Enabled" width 0xB tree.end endif tree.end sif (cpu()!="LPC1763"&&cpu()!="LPC1767") tree "CAN (Controller Area Network)" tree "CAN 1" base ad:0x40044000 width 10. group.long 0x00++0x03 line.long 0x00 "CAN1MOD,CAN1 Mode Register" bitfld.long 0x00 7. " TM ,Test Mode" "Disabled,Enabled" bitfld.long 0x00 5. " RPM ,Reverse Polarity Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " SM ,Sleep Mode" "Disabled,Enabled" bitfld.long 0x00 3. " TPM ,Transmit Priority Mode" "CAN ID,Tx Priority" textline " " bitfld.long 0x00 2. " STM ,Self Test Mode" "Disabled,Enabled" bitfld.long 0x00 1. " LOM ,Listen Only Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RM ,Reset Mode" "No reset,Reset" wgroup.long 0x04++0x03 line.long 0x00 "CAN1CMR,CAN1 Command Register" bitfld.long 0x00 7. " STB3 ,Select Tx Buffer 3 for transmission" "Not selected,Selected" bitfld.long 0x00 6. " STB2 ,Select Tx Buffer 2 for transmission" "Not selected,Selected" textline " " bitfld.long 0x00 5. " STB1 ,Select Tx Buffer 1 for transmission" "Not selected,Selected" bitfld.long 0x00 4. " SRR ,Self Reception Request" "Not requested,Requested" textline " " bitfld.long 0x00 3. " CDO ,Clear Data Overrun" "Not cleared,Cleared" bitfld.long 0x00 2. " RRB ,Release Receive Buffer" "Not released,Released" textline " " bitfld.long 0x00 1. " AT ,Abort Transmission" "Not aborted,Aborted" bitfld.long 0x00 0. " TR ,Transmission Request" "Not requested,Requested" group.long 0x08++0x03 line.long 0x00 "CAN1GSR,CAN1 Global Controller Status and Error Counters" hexmask.long.byte 0x00 24.--31. 1. " TXERR ,Tx Error Counter Value" hexmask.long.byte 0x00 16.--23. 1. " RXERR ,Rx Error Counter Value" textline " " bitfld.long 0x00 7. " BS ,Bus Status" "Bus-On,Bus-Off" bitfld.long 0x00 6. " ES ,Error Status" "No error,Error" textline " " bitfld.long 0x00 5. " TS ,Transmit Status" "Not busy,Busy" bitfld.long 0x00 4. " RS ,Receive Status" "Not busy,Busy" textline " " bitfld.long 0x00 3. " TCS ,Transmit Complete Status" "Not completed,Completed" bitfld.long 0x00 2. " TBS ,Transmit Buffer Status" "Not ready,Ready" textline " " bitfld.long 0x00 1. " DOS ,Data Overrun Status" "Not occurred,Occurred" bitfld.long 0x00 0. " RBS ,Receive Buffer Status" "Not ready,Ready" sif (cpu()=="LPC4072FBD80")||(cpu()=="LPC4072FET80")||(cpu()=="LPC4074FBD144")||(cpu()=="LPC4076FBD144")||(cpu()=="LPC4076FET180")||(cpu()=="LPC4078FBD100")||(cpu()=="LPC4078FBD144")||(cpu()=="LPC4078FBD208")||(cpu()=="LPC4078FBD80")||(cpu()=="LPC4078FET180")||(cpu()=="LPC4078FET208")||(cpu()=="LPC4088FBD144")||(cpu()=="LPC4088FBD208")||(cpu()=="LPC4088FET180")||(cpu()=="LPC4088FET208") group.long 0x0C++0x03 line.long 0x00 "CAN1ICR,CAN1 Interrupt and Capture Register" hexmask.long.byte 0x00 24.--31. 1. "ALCBIT,Error Bus" bitfld.long 0x00 22.--23. "ERRC1:0,Error Code Capture" "Bit error,Form error,Stuff error,Other error" bitfld.long 0x00 21. "ERRDIR,Error Dirction" "During transmitting,During receiving" textline " " bitfld.long 0x00 16.--20. "ERRBIT4_0,Error Code Capture" "Reserved,Reserved,ID21 to ID28,Reserved,SRTR,IDE,ID18 to ID20,ID13 to ID17,CRC Sequence,Reserved Bit 0,Data Field,Data Length Code,RTR,Reserved Bit 1,ID5 to ID12,Reserved,Intermission,Reserved,Reserved,Reserved,Reserved,CRC Delimiter,Acknowledge Slot,End of Frame,Acknowledge Delimiter,?..." bitfld.long 0x00 10. "TI3,Transmit Interrupt 3" "Reset,Set" bitfld.long 0x00 9. "TI2,Transmit Interrupt 2" "Reset,Set" textline " " bitfld.long 0x00 8. "IDI,ID Ready Interrupt" "Reset,Set" bitfld.long 0x00 7. "BEI,Bus Error Interrupt" "Reset,Set" bitfld.long 0x00 6. "ALI,Arbitration Lost Interrupt" "Reset,Set" textline " " bitfld.long 0x00 5. "EPI,Error Passive Interrupt" "Reset,Set" bitfld.long 0x00 4. "WUI,Wake-Up Interrupt" "Reset,Set" bitfld.long 0x00 3. "DOI,Data Overrun Interrupt" "Reset,Set" textline " " bitfld.long 0x00 2. "EI,Error Warning Interrupt" "Reset,Set" bitfld.long 0x00 1. "TI1,Transmit Interrupt 1" "Reset,Set" bitfld.long 0x00 0. "RI,Receive Interrupt" "Reset,Set" else hgroup.long 0x0C++0x03 hide.long 0x00 "CAN1ICR,CAN1 Interrupt status/Arbitration Lost Capture/Error Code Capture Register" in endif group.long 0x10++0x3 line.long 0x00 "CAN1IER,CAN1 Interrupt Enable Register" bitfld.long 0x00 10. " TIE3 ,Transmit Interrupt Enable (3)" "Disabled,Enabled" bitfld.long 0x00 9. " TIE2 ,Transmit Interrupt Enable (2)" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " IDIE ,ID Ready Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 7. " BEIE ,Bus Error Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " ALIE ,Arbitration Lost Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " EPIE ,Error Passive Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " WUIE ,Wake-Up Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " DOIE ,Data Overrun Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " EIE ,Error Warning Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " TIE1 ,Transmit Interrupt Enable (1)" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RIE ,Receiver Interrupt Enable" "Disabled,Enabled" group.long 0x14++0x03 line.long 0x00 "CAN1BTR,CAN1 Bus Timing Register" bitfld.long 0x00 23. " SAM ,Bus Sampling" "Once,3 times" bitfld.long 0x00 20.--22. " TESG2 ,Delay from the sample point to the next nominal sync point" "1,2,3,4,5,6,7,8" textline " " bitfld.long 0x00 16.--19. " TESG1 ,Delay from the nominal Sync point to the sample point" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x00 14.--15. " SJW ,Synchronization Jump Width" "1,2,3,4" textline " " hexmask.long.word 0x00 0.--9. 1. " BRP ,Baud Rate Prescaler" group.long 0x18++0x03 line.long 0x00 "CAN1EWL,CAN1 Error Warning Limit Register" hexmask.long.byte 0x00 0.--7. 1. " EWL ,Error Warning Limit" rgroup.long 0x1C++0x03 line.long 0x00 "CAN1SR,CAN1 Status Register" bitfld.long 0x00 23. " BS3 ,Bus Status 3" "Normal,Bus-Off" bitfld.long 0x00 22. " ES3 ,Error Status 3" "No error,Error" textline " " bitfld.long 0x00 21. " TS3 ,Tx Buffer 3 Transmission" "Not in progress,In progress" bitfld.long 0x00 20. " RS3 ,Receive Status 3" "Not busy,Busy" textline " " bitfld.long 0x00 19. " TCS3 ,Tx Buffer 3 Previously Requested Transmission" "Not completed,Completed" bitfld.long 0x00 18. " TBS3 ,Tx Buffer 3: CAN1TFI/CAN1TID/CAN1TDA and CAN1TDB Write Permission for Software" "Locked,May write" textline " " bitfld.long 0x00 17. " DOS3 ,Data Overrun Status 3" "Not occurred,Occurred" bitfld.long 0x00 16. " RBS3 ,Receive Buffer Status 3" "Not ready,Ready" textline " " bitfld.long 0x00 15. " BS2 ,Bus Status 2" "Normal,Bus-Off" bitfld.long 0x00 14. " ES2 ,Error Status 2" "No error,Error" textline " " bitfld.long 0x00 13. " TS2 ,Tx Buffer 2 Transmission" "Not in progress,In progress" bitfld.long 0x00 12. " RS2 ,Receive Status 2" "Not busy,Busy" textline " " bitfld.long 0x00 11. " TCS2 ,Tx Buffer 2 Previously Requested Transmission" "Not completed,Completed" bitfld.long 0x00 10. " TBS2 ,Tx Buffer 2: CAN1TFI/CAN1TID/CAN1TDA and CAN1TDB Write Permission for Software" "Locked,May write" textline " " bitfld.long 0x00 9. " DOS2 ,Data Overrun Status 2" "Not occurred,Occurred" bitfld.long 0x00 8. " RBS2 ,Receive Buffer Status 2" "Not ready,Ready" textline " " bitfld.long 0x00 7. " BS1 ,Bus Status 1" "Normal,Bus-Off" bitfld.long 0x00 6. " ES1 ,Error Status 1" "No error,Error" textline " " bitfld.long 0x00 5. " TS1 ,Tx Buffer 1 Transmission" "Not in progress,In progress" bitfld.long 0x00 4. " RS1 ,Receive Status 1" "Not busy,Busy" textline " " bitfld.long 0x00 3. " TCS1 ,Tx Buffer 1 Previously Requested Transmission" "Not completed,Completed" bitfld.long 0x00 2. " TBS1 ,Tx Buffer 1: CAN1TFI/CAN1TID/CAN1TDA and CAN1TDB Write Permission for Software" "Locked,May write" textline " " bitfld.long 0x00 1. " DOS1 ,Data Overrun Status 1" "Not occurred,Occurred" bitfld.long 0x00 0. " RBS1 ,Receive Buffer Status 1" "Not ready,Ready" group.long 0x20++0x03 line.long 0x00 "CAN1RFS,CAN1 Receive frame status Register" bitfld.long 0x00 31. " FF ,Current Received Message Identifier Width" "11-bit,29-bit" bitfld.long 0x00 30. " RTR ,Remote Transmission Request" "Data frame,Remote frame" textline " " bitfld.long 0x00 16.--19. " DLC ,Data Length Code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" bitfld.long 0x00 10. " BP ,Current Message Received Mode" "Not AF Bypass,AF Bypass" textline " " hexmask.long.word 0x00 0.--9. 1. " IDIndex ,Zero-based number of the Lookup Table RAM entry" if (((per.long((ad:0x40044000+0x20)))&0x80000000)==0x0) group.long 0x24++0x03 line.long 0x00 "CAN1RID,CAN1 Received Identifier Register" hexmask.long.word 0x00 0.--10. 1. " ID ,Received Identifier" else group.long 0x24++0x03 line.long 0x00 "CAN1RID,CAN1 Received Identifier Register" hexmask.long 0x00 0.--28. 1. " ID ,Received Identifier" endif group.long 0x28++0x07 line.long 0x00 "CAN1RDA,CAN1 Received data bytes 1-4" hexmask.long.byte 0x00 24.--31. 1. " Data_4 ,Fourth Data byte of the current received message" hexmask.long.byte 0x00 16.--23. 1. " Data_3 ,Third Data byte of the current received message" textline " " hexmask.long.byte 0x00 8.--15. 1. " Data_2 ,Second Data byte of the current received message" hexmask.long.byte 0x00 0.--7. 1. " Data_1 ,First Data byte of the current received message" line.long 0x04 "CAN1RDB,CAN1 Received data bytes 5-8" hexmask.long.byte 0x04 24.--31. 1. " Data_8 ,8th Data byte of the current received message" hexmask.long.byte 0x04 16.--23. 1. " Data_7 ,7th Data byte of the current received message" textline " " hexmask.long.byte 0x04 8.--15. 1. " Data_6 ,6th Data byte of the current received message" hexmask.long.byte 0x04 0.--7. 1. " Data_5 ,5th Data byte of the current received message" group.long 0x30++0x03 line.long 0x00 "CAN1TFI1,CAN1 Transmit frame Information Register (1)" bitfld.long 0x00 31. " FF ,Next Transmit Message Identifier Width" "11-bit,29-bit" bitfld.long 0x00 30. " RTR ,This value is sent in the RTR bit of the next transmit message" "CAN1TDA/CAN1TDB,Remote Frame" textline " " bitfld.long 0x00 16.--19. " DLC ,Data Length Code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" hexmask.long.byte 0x00 0.--7. 1. " PRIO ,Priority" if (((per.long((ad:0x40044000+0x30)))&0x80000000)==0x0) group.long 0x34++0x03 line.long 0x00 "CAN1TID1,CAN1 Transmit Identifier Register (1)" hexmask.long.word 0x00 0.--10. 1. " ID ,Transmitted Identifier" else group.long 0x34++0x03 line.long 0x00 "CAN1TID1,CAN1 Transmit Identifier Register (1)" hexmask.long 0x00 0.--28. 1. " ID ,Transmitted Identifier" endif group.long 0x38++0x07 line.long 0x00 "CAN1TDA1,CAN1 Transmit data bytes 1-4 (1)" hexmask.long.byte 0x00 24.--31. 1. " Data_4 ,Fourth Data byte of the next transmit message" hexmask.long.byte 0x00 16.--23. 1. " Data_3 ,Third Data byte of the next transmit message" textline " " hexmask.long.byte 0x00 8.--15. 1. " Data_2 ,Second Data byte of the next transmit message" hexmask.long.byte 0x00 0.--7. 1. " Data_1 ,First Data byte of the next transmit message" line.long 0x04 "CAN1TDB1,CAN1 Transmit data bytes 5-8 (1)" hexmask.long.byte 0x04 24.--31. 1. " Data_8 ,8th Data byte of the next transmit message" hexmask.long.byte 0x04 16.--23. 1. " Data_7 ,7th Data byte of the next transmit message" textline " " hexmask.long.byte 0x04 8.--15. 1. " Data_6 ,6th Data byte of the next transmit message" hexmask.long.byte 0x04 0.--7. 1. " Data_5 ,5th Data byte of the next transmit message" group.long 0x40++0x03 line.long 0x00 "CAN1TFI2,CAN1 Transmit frame Information Register (2)" bitfld.long 0x00 31. " FF ,Next Transmit Message Identifier Width" "11-bit,29-bit" bitfld.long 0x00 30. " RTR ,This value is sent in the RTR bit of the next transmit message" "CAN1TDA/CAN1TDB,Remote Frame" textline " " bitfld.long 0x00 16.--19. " DLC ,Data Length Code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" hexmask.long.byte 0x00 0.--7. 1. " PRIO ,Priority" if (((per.long((ad:0x40044000+0x40)))&0x80000000)==0x0) group.long 0x44++0x03 line.long 0x00 "CAN1TID2,CAN1 Transmit Identifier Register (2)" hexmask.long.word 0x00 0.--10. 1. " ID ,Transmitted Identifier" else group.long 0x44++0x03 line.long 0x00 "CAN1TID2,CAN1 Transmit Identifier Register (2)" hexmask.long 0x00 0.--28. 1. " ID ,Transmitted Identifier" endif group.long 0x48++0x07 line.long 0x00 "CAN1TDA2,CAN1 Transmit data bytes 1-4 (2)" hexmask.long.byte 0x00 24.--31. 1. " Data_4 ,Fourth Data byte of the next transmit message" hexmask.long.byte 0x00 16.--23. 1. " Data_3 ,Third Data byte of the next transmit message" textline " " hexmask.long.byte 0x00 8.--15. 1. " Data_2 ,Second Data byte of the next transmit message" hexmask.long.byte 0x00 0.--7. 1. " Data_1 ,First Data byte of the next transmit message" line.long 0x04 "CAN1TDB2,CAN1 Transmit data bytes 5-8 (2)" hexmask.long.byte 0x04 24.--31. 1. " Data_8 ,8th Data byte of the next transmit message" hexmask.long.byte 0x04 16.--23. 1. " Data_7 ,7th Data byte of the next transmit message" textline " " hexmask.long.byte 0x04 8.--15. 1. " Data_6 ,6th Data byte of the next transmit message" hexmask.long.byte 0x04 0.--7. 1. " Data_5 ,5th Data byte of the next transmit message" group.long 0x50++0x03 line.long 0x00 "CAN1TFI3,CAN1 Transmit frame Information Register (3)" bitfld.long 0x00 31. " FF ,Next Transmit Message Identifier Width" "11-bit,29-bit" bitfld.long 0x00 30. " RTR ,This value is sent in the RTR bit of the next transmit message" "CAN1TDA/CAN1TDB,Remote Frame" textline " " bitfld.long 0x00 16.--19. " DLC ,Data Length Code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" hexmask.long.byte 0x00 0.--7. 1. " PRIO ,Priority" if (((per.long((ad:0x40044000+0x50)))&0x80000000)==0x0) group.long 0x54++0x03 line.long 0x00 "CAN1TID3,CAN1 Transmit Identifier Register (3)" hexmask.long.word 0x00 0.--10. 1. " ID ,Transmitted Identifier" else group.long 0x54++0x03 line.long 0x00 "CAN1TID3,CAN1 Transmit Identifier Register (3)" hexmask.long 0x00 0.--28. 1. " ID ,Transmitted Identifier" endif group.long 0x58++0x07 line.long 0x00 "CAN1TDA3,CAN1 Transmit data bytes 1-4 (3)" hexmask.long.byte 0x00 24.--31. 1. " Data_4 ,Fourth Data byte of the next transmit message" hexmask.long.byte 0x00 16.--23. 1. " Data_3 ,Third Data byte of the next transmit message" textline " " hexmask.long.byte 0x00 8.--15. 1. " Data_2 ,Second Data byte of the next transmit message" hexmask.long.byte 0x00 0.--7. 1. " Data_1 ,First Data byte of the next transmit message" line.long 0x04 "CAN1TDB3,CAN1 Transmit data bytes 5-8 (3)" hexmask.long.byte 0x04 24.--31. 1. " Data_8 ,8th Data byte of the next transmit message" hexmask.long.byte 0x04 16.--23. 1. " Data_7 ,7th Data byte of the next transmit message" textline " " hexmask.long.byte 0x04 8.--15. 1. " Data_6 ,6th Data byte of the next transmit message" hexmask.long.byte 0x04 0.--7. 1. " Data_5 ,5th Data byte of the next transmit message" width 0x0B tree.end sif (cpu()!="LPC1751"&&cpu()!="LPC1752"&&cpu()!="LPC1754") tree "CAN 2" base ad:0x40048000 width 10. group.long 0x00++0x03 line.long 0x00 "CAN2MOD,CAN2 Mode Register" bitfld.long 0x00 7. " TM ,Test Mode" "Disabled,Enabled" bitfld.long 0x00 5. " RPM ,Reverse Polarity Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " SM ,Sleep Mode" "Disabled,Enabled" bitfld.long 0x00 3. " TPM ,Transmit Priority Mode" "CAN ID,Tx Priority" textline " " bitfld.long 0x00 2. " STM ,Self Test Mode" "Disabled,Enabled" bitfld.long 0x00 1. " LOM ,Listen Only Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RM ,Reset Mode" "No reset,Reset" wgroup.long 0x04++0x03 line.long 0x00 "CAN2CMR,CAN2 Command Register" bitfld.long 0x00 7. " STB3 ,Select Tx Buffer 3 for transmission" "Not selected,Selected" bitfld.long 0x00 6. " STB2 ,Select Tx Buffer 2 for transmission" "Not selected,Selected" textline " " bitfld.long 0x00 5. " STB1 ,Select Tx Buffer 1 for transmission" "Not selected,Selected" bitfld.long 0x00 4. " SRR ,Self Reception Request" "Not requested,Requested" textline " " bitfld.long 0x00 3. " CDO ,Clear Data Overrun" "Not cleared,Cleared" bitfld.long 0x00 2. " RRB ,Release Receive Buffer" "Not released,Released" textline " " bitfld.long 0x00 1. " AT ,Abort Transmission" "Not aborted,Aborted" bitfld.long 0x00 0. " TR ,Transmission Request" "Not requested,Requested" group.long 0x08++0x03 line.long 0x00 "CAN2GSR,CAN2 Global Controller Status and Error Counters" hexmask.long.byte 0x00 24.--31. 1. " TXERR ,Tx Error Counter Value" hexmask.long.byte 0x00 16.--23. 1. " RXERR ,Rx Error Counter Value" textline " " bitfld.long 0x00 7. " BS ,Bus Status" "Bus-On,Bus-Off" bitfld.long 0x00 6. " ES ,Error Status" "No error,Error" textline " " bitfld.long 0x00 5. " TS ,Transmit Status" "Not busy,Busy" bitfld.long 0x00 4. " RS ,Receive Status" "Not busy,Busy" textline " " bitfld.long 0x00 3. " TCS ,Transmit Complete Status" "Not completed,Completed" bitfld.long 0x00 2. " TBS ,Transmit Buffer Status" "Not ready,Ready" textline " " bitfld.long 0x00 1. " DOS ,Data Overrun Status" "Not occurred,Occurred" bitfld.long 0x00 0. " RBS ,Receive Buffer Status" "Not ready,Ready" sif (cpu()=="LPC4072FBD80")||(cpu()=="LPC4072FET80")||(cpu()=="LPC4074FBD144")||(cpu()=="LPC4076FBD144")||(cpu()=="LPC4076FET180")||(cpu()=="LPC4078FBD100")||(cpu()=="LPC4078FBD144")||(cpu()=="LPC4078FBD208")||(cpu()=="LPC4078FBD80")||(cpu()=="LPC4078FET180")||(cpu()=="LPC4078FET208")||(cpu()=="LPC4088FBD144")||(cpu()=="LPC4088FBD208")||(cpu()=="LPC4088FET180")||(cpu()=="LPC4088FET208") group.long 0x0C++0x03 line.long 0x00 "CAN2ICR,CAN2 Interrupt and Capture Register" hexmask.long.byte 0x00 24.--31. 1. "ALCBIT,Error Bus" bitfld.long 0x00 22.--23. "ERRC1:0,Error Code Capture" "Bit error,Form error,Stuff error,Other error" bitfld.long 0x00 21. "ERRDIR,Error Dirction" "During transmitting,During receiving" textline " " bitfld.long 0x00 16.--20. "ERRBIT4_0,Error Code Capture" "Reserved,Reserved,ID21 to ID28,Reserved,SRTR,IDE,ID18 to ID20,ID13 to ID17,CRC Sequence,Reserved Bit 0,Data Field,Data Length Code,RTR,Reserved Bit 1,ID5 to ID12,Reserved,Intermission,Reserved,Reserved,Reserved,Reserved,CRC Delimiter,Acknowledge Slot,End of Frame,Acknowledge Delimiter,?..." bitfld.long 0x00 10. "TI3,Transmit Interrupt 3" "Reset,Set" bitfld.long 0x00 9. "TI2,Transmit Interrupt 2" "Reset,Set" textline " " bitfld.long 0x00 8. "IDI,ID Ready Interrupt" "Reset,Set" bitfld.long 0x00 7. "BEI,Bus Error Interrupt" "Reset,Set" bitfld.long 0x00 6. "ALI,Arbitration Lost Interrupt" "Reset,Set" textline " " bitfld.long 0x00 5. "EPI,Error Passive Interrupt" "Reset,Set" bitfld.long 0x00 4. "WUI,Wake-Up Interrupt" "Reset,Set" bitfld.long 0x00 3. "DOI,Data Overrun Interrupt" "Reset,Set" textline " " bitfld.long 0x00 2. "EI,Error Warning Interrupt" "Reset,Set" bitfld.long 0x00 1. "TI1,Transmit Interrupt 1" "Reset,Set" bitfld.long 0x00 0. "RI,Receive Interrupt" "Reset,Set" else hgroup.long 0x0C++0x03 hide.long 0x00 "CAN2ICR,CAN2 Interrupt status/Arbitration Lost Capture/Error Code Capture Register" in endif group.long 0x10++0x3 line.long 0x00 "CAN2IER,CAN2 Interrupt Enable Register" bitfld.long 0x00 10. " TIE3 ,Transmit Interrupt Enable (3)" "Disabled,Enabled" bitfld.long 0x00 9. " TIE2 ,Transmit Interrupt Enable (2)" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " IDIE ,ID Ready Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 7. " BEIE ,Bus Error Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " ALIE ,Arbitration Lost Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " EPIE ,Error Passive Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " WUIE ,Wake-Up Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " DOIE ,Data Overrun Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " EIE ,Error Warning Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " TIE1 ,Transmit Interrupt Enable (1)" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RIE ,Receiver Interrupt Enable" "Disabled,Enabled" group.long 0x14++0x03 line.long 0x00 "CAN2BTR,CAN2 Bus Timing Register" bitfld.long 0x00 23. " SAM ,Bus Sampling" "Once,3 times" bitfld.long 0x00 20.--22. " TESG2 ,Delay from the sample point to the next nominal sync point" "1,2,3,4,5,6,7,8" textline " " bitfld.long 0x00 16.--19. " TESG1 ,Delay from the nominal Sync point to the sample point" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x00 14.--15. " SJW ,Synchronization Jump Width" "1,2,3,4" textline " " hexmask.long.word 0x00 0.--9. 1. " BRP ,Baud Rate Prescaler" group.long 0x18++0x03 line.long 0x00 "CAN2EWL,CAN2 Error Warning Limit Register" hexmask.long.byte 0x00 0.--7. 1. " EWL ,Error Warning Limit" rgroup.long 0x1C++0x03 line.long 0x00 "CAN2SR,CAN2 Status Register" bitfld.long 0x00 23. " BS3 ,Bus Status 3" "Normal,Bus-Off" bitfld.long 0x00 22. " ES3 ,Error Status 3" "No error,Error" textline " " bitfld.long 0x00 21. " TS3 ,Tx Buffer 3 Transmission" "Not in progress,In progress" bitfld.long 0x00 20. " RS3 ,Receive Status 3" "Not busy,Busy" textline " " bitfld.long 0x00 19. " TCS3 ,Tx Buffer 3 Previously Requested Transmission" "Not completed,Completed" bitfld.long 0x00 18. " TBS3 ,Tx Buffer 3: CAN2TFI/CAN2TID/CAN2TDA and CAN2TDB Write Permission for Software" "Locked,May write" textline " " bitfld.long 0x00 17. " DOS3 ,Data Overrun Status 3" "Not occurred,Occurred" bitfld.long 0x00 16. " RBS3 ,Receive Buffer Status 3" "Not ready,Ready" textline " " bitfld.long 0x00 15. " BS2 ,Bus Status 2" "Normal,Bus-Off" bitfld.long 0x00 14. " ES2 ,Error Status 2" "No error,Error" textline " " bitfld.long 0x00 13. " TS2 ,Tx Buffer 2 Transmission" "Not in progress,In progress" bitfld.long 0x00 12. " RS2 ,Receive Status 2" "Not busy,Busy" textline " " bitfld.long 0x00 11. " TCS2 ,Tx Buffer 2 Previously Requested Transmission" "Not completed,Completed" bitfld.long 0x00 10. " TBS2 ,Tx Buffer 2: CAN2TFI/CAN2TID/CAN2TDA and CAN2TDB Write Permission for Software" "Locked,May write" textline " " bitfld.long 0x00 9. " DOS2 ,Data Overrun Status 2" "Not occurred,Occurred" bitfld.long 0x00 8. " RBS2 ,Receive Buffer Status 2" "Not ready,Ready" textline " " bitfld.long 0x00 7. " BS1 ,Bus Status 1" "Normal,Bus-Off" bitfld.long 0x00 6. " ES1 ,Error Status 1" "No error,Error" textline " " bitfld.long 0x00 5. " TS1 ,Tx Buffer 1 Transmission" "Not in progress,In progress" bitfld.long 0x00 4. " RS1 ,Receive Status 1" "Not busy,Busy" textline " " bitfld.long 0x00 3. " TCS1 ,Tx Buffer 1 Previously Requested Transmission" "Not completed,Completed" bitfld.long 0x00 2. " TBS1 ,Tx Buffer 1: CAN2TFI/CAN2TID/CAN2TDA and CAN2TDB Write Permission for Software" "Locked,May write" textline " " bitfld.long 0x00 1. " DOS1 ,Data Overrun Status 1" "Not occurred,Occurred" bitfld.long 0x00 0. " RBS1 ,Receive Buffer Status 1" "Not ready,Ready" group.long 0x20++0x03 line.long 0x00 "CAN2RFS,CAN2 Receive frame status Register" bitfld.long 0x00 31. " FF ,Current Received Message Identifier Width" "11-bit,29-bit" bitfld.long 0x00 30. " RTR ,Remote Transmission Request" "Data frame,Remote frame" textline " " bitfld.long 0x00 16.--19. " DLC ,Data Length Code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" bitfld.long 0x00 10. " BP ,Current Message Received Mode" "Not AF Bypass,AF Bypass" textline " " hexmask.long.word 0x00 0.--9. 1. " IDIndex ,Zero-based number of the Lookup Table RAM entry" if (((per.long((ad:0x40048000+0x20)))&0x80000000)==0x0) group.long 0x24++0x03 line.long 0x00 "CAN2RID,CAN2 Received Identifier Register" hexmask.long.word 0x00 0.--10. 1. " ID ,Received Identifier" else group.long 0x24++0x03 line.long 0x00 "CAN2RID,CAN2 Received Identifier Register" hexmask.long 0x00 0.--28. 1. " ID ,Received Identifier" endif group.long 0x28++0x07 line.long 0x00 "CAN2RDA,CAN2 Received data bytes 1-4" hexmask.long.byte 0x00 24.--31. 1. " Data_4 ,Fourth Data byte of the current received message" hexmask.long.byte 0x00 16.--23. 1. " Data_3 ,Third Data byte of the current received message" textline " " hexmask.long.byte 0x00 8.--15. 1. " Data_2 ,Second Data byte of the current received message" hexmask.long.byte 0x00 0.--7. 1. " Data_1 ,First Data byte of the current received message" line.long 0x04 "CAN2RDB,CAN2 Received data bytes 5-8" hexmask.long.byte 0x04 24.--31. 1. " Data_8 ,8th Data byte of the current received message" hexmask.long.byte 0x04 16.--23. 1. " Data_7 ,7th Data byte of the current received message" textline " " hexmask.long.byte 0x04 8.--15. 1. " Data_6 ,6th Data byte of the current received message" hexmask.long.byte 0x04 0.--7. 1. " Data_5 ,5th Data byte of the current received message" group.long 0x30++0x03 line.long 0x00 "CAN2TFI1,CAN2 Transmit frame Information Register (1)" bitfld.long 0x00 31. " FF ,Next Transmit Message Identifier Width" "11-bit,29-bit" bitfld.long 0x00 30. " RTR ,This value is sent in the RTR bit of the next transmit message" "CAN2TDA/CAN2TDB,Remote Frame" textline " " bitfld.long 0x00 16.--19. " DLC ,Data Length Code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" hexmask.long.byte 0x00 0.--7. 1. " PRIO ,Priority" if (((per.long((ad:0x40048000+0x30)))&0x80000000)==0x0) group.long 0x34++0x03 line.long 0x00 "CAN2TID1,CAN2 Transmit Identifier Register (1)" hexmask.long.word 0x00 0.--10. 1. " ID ,Transmitted Identifier" else group.long 0x34++0x03 line.long 0x00 "CAN2TID1,CAN2 Transmit Identifier Register (1)" hexmask.long 0x00 0.--28. 1. " ID ,Transmitted Identifier" endif group.long 0x38++0x07 line.long 0x00 "CAN2TDA1,CAN2 Transmit data bytes 1-4 (1)" hexmask.long.byte 0x00 24.--31. 1. " Data_4 ,Fourth Data byte of the next transmit message" hexmask.long.byte 0x00 16.--23. 1. " Data_3 ,Third Data byte of the next transmit message" textline " " hexmask.long.byte 0x00 8.--15. 1. " Data_2 ,Second Data byte of the next transmit message" hexmask.long.byte 0x00 0.--7. 1. " Data_1 ,First Data byte of the next transmit message" line.long 0x04 "CAN2TDB1,CAN2 Transmit data bytes 5-8 (1)" hexmask.long.byte 0x04 24.--31. 1. " Data_8 ,8th Data byte of the next transmit message" hexmask.long.byte 0x04 16.--23. 1. " Data_7 ,7th Data byte of the next transmit message" textline " " hexmask.long.byte 0x04 8.--15. 1. " Data_6 ,6th Data byte of the next transmit message" hexmask.long.byte 0x04 0.--7. 1. " Data_5 ,5th Data byte of the next transmit message" group.long 0x40++0x03 line.long 0x00 "CAN2TFI2,CAN2 Transmit frame Information Register (2)" bitfld.long 0x00 31. " FF ,Next Transmit Message Identifier Width" "11-bit,29-bit" bitfld.long 0x00 30. " RTR ,This value is sent in the RTR bit of the next transmit message" "CAN2TDA/CAN2TDB,Remote Frame" textline " " bitfld.long 0x00 16.--19. " DLC ,Data Length Code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" hexmask.long.byte 0x00 0.--7. 1. " PRIO ,Priority" if (((per.long((ad:0x40048000+0x40)))&0x80000000)==0x0) group.long 0x44++0x03 line.long 0x00 "CAN2TID2,CAN2 Transmit Identifier Register (2)" hexmask.long.word 0x00 0.--10. 1. " ID ,Transmitted Identifier" else group.long 0x44++0x03 line.long 0x00 "CAN2TID2,CAN2 Transmit Identifier Register (2)" hexmask.long 0x00 0.--28. 1. " ID ,Transmitted Identifier" endif group.long 0x48++0x07 line.long 0x00 "CAN2TDA2,CAN2 Transmit data bytes 1-4 (2)" hexmask.long.byte 0x00 24.--31. 1. " Data_4 ,Fourth Data byte of the next transmit message" hexmask.long.byte 0x00 16.--23. 1. " Data_3 ,Third Data byte of the next transmit message" textline " " hexmask.long.byte 0x00 8.--15. 1. " Data_2 ,Second Data byte of the next transmit message" hexmask.long.byte 0x00 0.--7. 1. " Data_1 ,First Data byte of the next transmit message" line.long 0x04 "CAN2TDB2,CAN2 Transmit data bytes 5-8 (2)" hexmask.long.byte 0x04 24.--31. 1. " Data_8 ,8th Data byte of the next transmit message" hexmask.long.byte 0x04 16.--23. 1. " Data_7 ,7th Data byte of the next transmit message" textline " " hexmask.long.byte 0x04 8.--15. 1. " Data_6 ,6th Data byte of the next transmit message" hexmask.long.byte 0x04 0.--7. 1. " Data_5 ,5th Data byte of the next transmit message" group.long 0x50++0x03 line.long 0x00 "CAN2TFI3,CAN2 Transmit frame Information Register (3)" bitfld.long 0x00 31. " FF ,Next Transmit Message Identifier Width" "11-bit,29-bit" bitfld.long 0x00 30. " RTR ,This value is sent in the RTR bit of the next transmit message" "CAN2TDA/CAN2TDB,Remote Frame" textline " " bitfld.long 0x00 16.--19. " DLC ,Data Length Code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" hexmask.long.byte 0x00 0.--7. 1. " PRIO ,Priority" if (((per.long((ad:0x40048000+0x50)))&0x80000000)==0x0) group.long 0x54++0x03 line.long 0x00 "CAN2TID3,CAN2 Transmit Identifier Register (3)" hexmask.long.word 0x00 0.--10. 1. " ID ,Transmitted Identifier" else group.long 0x54++0x03 line.long 0x00 "CAN2TID3,CAN2 Transmit Identifier Register (3)" hexmask.long 0x00 0.--28. 1. " ID ,Transmitted Identifier" endif group.long 0x58++0x07 line.long 0x00 "CAN2TDA3,CAN2 Transmit data bytes 1-4 (3)" hexmask.long.byte 0x00 24.--31. 1. " Data_4 ,Fourth Data byte of the next transmit message" hexmask.long.byte 0x00 16.--23. 1. " Data_3 ,Third Data byte of the next transmit message" textline " " hexmask.long.byte 0x00 8.--15. 1. " Data_2 ,Second Data byte of the next transmit message" hexmask.long.byte 0x00 0.--7. 1. " Data_1 ,First Data byte of the next transmit message" line.long 0x04 "CAN2TDB3,CAN2 Transmit data bytes 5-8 (3)" hexmask.long.byte 0x04 24.--31. 1. " Data_8 ,8th Data byte of the next transmit message" hexmask.long.byte 0x04 16.--23. 1. " Data_7 ,7th Data byte of the next transmit message" textline " " hexmask.long.byte 0x04 8.--15. 1. " Data_6 ,6th Data byte of the next transmit message" hexmask.long.byte 0x04 0.--7. 1. " Data_5 ,5th Data byte of the next transmit message" width 0x0B tree.end endif base ad:0x40040000 width 0x09 tree "Centralized CAN" rgroup.long 0x00++0x0B line.long 0x00 "CANTxSR,CAN Central Transmit Status Register" sif (cpu()!="LPC1751"&&cpu()!="LPC1752"&&cpu()!="LPC1754") bitfld.long 0x00 17. " TCS2 ,CAN2 Transmit Complete Status" "Not completed,Completed" bitfld.long 0x00 16. " TCS1 ,CAN1 Transmit Complete Status" "Not completed,Completed" bitfld.long 0x00 9. " TBS2 ,CAN2 Transmit Buffers Status" "Not ready,Ready" textline " " bitfld.long 0x00 8. " TBS1 ,CAN1 Transmit Buffers Status" "Not ready,Ready" bitfld.long 0x00 1. " TS2 ,CAN2 Transmit Status" "Not busy,Busy" bitfld.long 0x00 0. " TS1 ,CAN1 Transmit Status" "Not busy,Busy" else bitfld.long 0x00 16. " TCS1 ,CAN1 Transmit Complete Status" "Not completed,Completed" bitfld.long 0x00 8. " TBS1 ,CAN1 Transmit Buffers Status" "Not ready,Ready" textline " " bitfld.long 0x00 0. " TS1 ,CAN1 Transmit Status" "Not busy,Busy" endif line.long 0x04 "CANRxSR,CAN Central Receive Status Register" sif (cpu()!="LPC1751"&&cpu()!="LPC1752"&&cpu()!="LPC1754") bitfld.long 0x04 17. " DOS2 ,CAN2 Data Overrun Status" "Not occurred,Occurred" bitfld.long 0x04 16. " DOS1 ,CAN1 Data Overrun Status" "Not occurred,Occurred" bitfld.long 0x04 9. " RB2 ,CAN2 Receive Buffer Status" "Not ready,Ready" textline " " bitfld.long 0x04 8. " RB1 ,CAN1 Receive Buffer Status" "Not ready,Ready" bitfld.long 0x04 1. " RS2 ,CAN2 Receive Status" "Not busy,Busy" bitfld.long 0x04 0. " RS1 ,CAN1 Receive Status" "Not busy,Busy" else bitfld.long 0x04 16. " DOS1 ,CAN1 Data Overrun Status" "Not occurred,Occurred" bitfld.long 0x04 8. " RB1 ,CAN1 Receive Buffer Status" "Not ready,Ready" textline " " bitfld.long 0x04 0. " RS1 ,CAN1 Receive Status" "Not busy,Busy" endif line.long 0x08 "CANMSR,CAN Central Miscellaneous Register" sif (cpu()!="LPC1751"&&cpu()!="LPC1752"&&cpu()!="LPC1754") bitfld.long 0x08 9. " BS2 ,CAN2 Bus Status" "Normal,Bus-Off" bitfld.long 0x08 8. " BS1 ,CAN1 Bus Status" "Normal,Bus-Off" bitfld.long 0x08 1. " E2 ,CAN2 Error Status" "No error,Error" textline " " bitfld.long 0x08 0. " E1 ,CAN1 Error Status" "No error,Error" else bitfld.long 0x08 8. " BS1 ,CAN1 Bus Status" "Normal,Bus-Off" bitfld.long 0x08 0. " E1 ,CAN1 Error Status" "No error,Error" endif width 0x0B tree.end base ad:0x4003C000 width 0x0C tree "Acceptance Filter" group.long 0x00++0x17 line.long 0x00 "AFMR,Acceptance Filter Mode Register" bitfld.long 0x00 2. " eFCAN ,Software/Acceptance Filter Read all Messages from CAN Receivers" "Software,AF" bitfld.long 0x00 1. " AccBP ,All Rx messages Acception on enabled CAN controllers" "Not accepted,Accepted" bitfld.long 0x00 0. " AccOff ,Acceptance Filter Enable" "Disabled,Enabled" line.long 0x4 "SFF_sa,Standard Frame Individual Start Address Register" hexmask.long.word 0x4 2.--10. 4. " SFF_sa ,The start address of the table of individual Standard Identifiers in AF Lookup" line.long 0x8 "SFF_GRP_sa,Standard Frame Group Start Address Register" hexmask.long.word 0x8 2.--11. 4. " SFF_GRP_sa ,The start address of the table of grouped Standard Identifiers in AF Lookup RAM" line.long 0xC "EFF_sa,Extended Frame Start Address Register" hexmask.long.word 0xC 2.--10. 4. " EFF_sa ,The start address of the table of individual Extended Identifiers in AF Lookup RAM" line.long 0x10 "EFF_GRP_sa,Extended Frame Group Start Address Register" hexmask.long.word 0x10 2.--11. 4. " Eff_GRP_sa ,The start address of the table of grouped Extended Identifiers in AF Lookup RAM" line.long 0x14 "ENDofTable,End of AF Tables Register" hexmask.long.word 0x14 2.--11. 4. " EndofTable ,The address above the last active address in the last active AF table" sif (cpu()=="LPC4072FBD80")||(cpu()=="LPC4072FET80")||(cpu()=="LPC4074FBD144")||(cpu()=="LPC4076FBD144")||(cpu()=="LPC4076FET180")||(cpu()=="LPC4078FBD100")||(cpu()=="LPC4078FBD144")||(cpu()=="LPC4078FBD208")||(cpu()=="LPC4078FBD80")||(cpu()=="LPC4078FET180")||(cpu()=="LPC4078FET208")||(cpu()=="LPC4088FBD144")||(cpu()=="LPC4088FBD208")||(cpu()=="LPC4088FET180")||(cpu()=="LPC4088FET208") rgroup.long 0x18++0x03 line.long 0x00 "LUTerrAd,LUT Error Address Register" hexmask.long.word 0x00 2.--10. 1. " LUTerrAd,LUT Error Address" else hgroup.long 0x18++0x3 hide.long 0x00 "LUTerrAd,LUT Error Address Register" in endif rgroup.long 0x1C++0x3 line.long 0x0 "LUTerr,LUT Error Register" bitfld.long 0x0 0. " LUTerr ,Acceptance Filter encountered an error in content of tables in AF RAM" "No Error,Error" group.long 0x20++0x3 line.long 0x0 "FCANIE,Global FullCANInterrupt Enable register" bitfld.long 0x0 0. " FCANIE ,Global FullCAN Interrupt Enable" "Disabled,Enabled" group.long 0x24++0x7 line.long 0x0 "FCANIC0,FullCAN Interrupt and Capture register 0" bitfld.long 0x0 31. " IntPnd31 ,FullCan Interrupt Pending bit 31" "No interrupt,Interrupt" bitfld.long 0x0 30. " IntPnd30 ,FullCan Interrupt Pending bit 30" "No interrupt,Interrupt" bitfld.long 0x0 29. " IntPnd29 ,FullCan Interrupt Pending bit 29" "No interrupt,Interrupt" textline " " bitfld.long 0x0 28. " IntPnd28 ,FullCan Interrupt Pending bit 28" "No interrupt,Interrupt" bitfld.long 0x0 27. " IntPnd27 ,FullCan Interrupt Pending bit 27" "No interrupt,Interrupt" bitfld.long 0x0 26. " IntPnd26 ,FullCan Interrupt Pending bit 26" "No interrupt,Interrupt" textline " " bitfld.long 0x0 25. " IntPnd25 ,FullCan Interrupt Pending bit 25" "No interrupt,Interrupt" bitfld.long 0x0 24. " IntPnd24 ,FullCan Interrupt Pending bit 24" "No interrupt,Interrupt" bitfld.long 0x0 23. " IntPnd23 ,FullCan Interrupt Pending bit 23" "No interrupt,Interrupt" textline " " bitfld.long 0x0 22. " IntPnd22 ,FullCan Interrupt Pending bit 22" "No interrupt,Interrupt" bitfld.long 0x0 21. " IntPnd21 ,FullCan Interrupt Pending bit 21" "No interrupt,Interrupt" bitfld.long 0x0 20. " IntPnd20 ,FullCan Interrupt Pending bit 20" "No interrupt,Interrupt" textline " " bitfld.long 0x0 19. " IntPnd19 ,FullCan Interrupt Pending bit 19" "No interrupt,Interrupt" bitfld.long 0x0 18. " IntPnd18 ,FullCan Interrupt Pending bit 18" "No interrupt,Interrupt" bitfld.long 0x0 17. " IntPnd17 ,FullCan Interrupt Pending bit 17" "No interrupt,Interrupt" textline " " bitfld.long 0x0 16. " IntPnd16 ,FullCan Interrupt Pending bit 16" "No interrupt,Interrupt" bitfld.long 0x0 15. " IntPnd15 ,FullCan Interrupt Pending bit 15" "No interrupt,Interrupt" bitfld.long 0x0 14. " IntPnd14 ,FullCan Interrupt Pending bit 14" "No interrupt,Interrupt" textline " " bitfld.long 0x0 13. " IntPnd13 ,FullCan Interrupt Pending bit 13" "No interrupt,Interrupt" bitfld.long 0x0 12. " IntPnd12 ,FullCan Interrupt Pending bit 12" "No interrupt,Interrupt" bitfld.long 0x0 11. " IntPnd11 ,FullCan Interrupt Pending bit 11" "No interrupt,Interrupt" textline " " bitfld.long 0x0 10. " IntPnd10 ,FullCan Interrupt Pending bit 10" "No interrupt,Interrupt" bitfld.long 0x0 9. " IntPnd9 ,FullCan Interrupt Pending bit 9" "No interrupt,Interrupt" bitfld.long 0x0 8. " IntPnd8 ,FullCan Interrupt Pending bit 8" "No interrupt,Interrupt" textline " " bitfld.long 0x0 7. " IntPnd7 ,FullCan Interrupt Pending bit 7" "No interrupt,Interrupt" bitfld.long 0x0 6. " IntPnd6 ,FullCan Interrupt Pending bit 6" "No interrupt,Interrupt" bitfld.long 0x0 5. " IntPnd5 ,FullCan Interrupt Pending bit 5" "No interrupt,Interrupt" textline " " bitfld.long 0x0 4. " IntPnd4 ,FullCan Interrupt Pending bit 4" "No interrupt,Interrupt" bitfld.long 0x0 3. " IntPnd3 ,FullCan Interrupt Pending bit 3" "No interrupt,Interrupt" bitfld.long 0x0 2. " IntPnd2 ,FullCan Interrupt Pending bit 2" "No interrupt,Interrupt" textline " " bitfld.long 0x0 1. " IntPnd1 ,FullCan Interrupt Pending bit 1" "No interrupt,Interrupt" bitfld.long 0x0 0. " IntPnd0 ,FullCan Interrupt Pending bit 0" "No interrupt,Interrupt" line.long 0x4 "FCANIC1,FullCAN Interrupt and Capture register 1" bitfld.long 0x4 31. " IntPnd63 ,FullCan Interrupt Pending bit 63" "No interrupt,Interrupt" bitfld.long 0x4 30. " IntPnd62 ,FullCan Interrupt Pending bit 62" "No interrupt,Interrupt" bitfld.long 0x4 29. " IntPnd61 ,FullCan Interrupt Pending bit 61" "No interrupt,Interrupt" textline " " bitfld.long 0x4 28. " IntPnd60 ,FullCan Interrupt Pending bit 60" "No interrupt,Interrupt" bitfld.long 0x4 27. " IntPnd59 ,FullCan Interrupt Pending bit 59" "No interrupt,Interrupt" bitfld.long 0x4 26. " IntPnd58 ,FullCan Interrupt Pending bit 58" "No interrupt,Interrupt" textline " " bitfld.long 0x4 25. " IntPnd57 ,FullCan Interrupt Pending bit 57" "No interrupt,Interrupt" bitfld.long 0x4 24. " IntPnd56 ,FullCan Interrupt Pending bit 56" "No interrupt,Interrupt" bitfld.long 0x4 23. " IntPnd55 ,FullCan Interrupt Pending bit 55" "No interrupt,Interrupt" textline " " bitfld.long 0x4 22. " IntPnd54 ,FullCan Interrupt Pending bit 54" "No interrupt,Interrupt" bitfld.long 0x4 21. " IntPnd53 ,FullCan Interrupt Pending bit 53" "No interrupt,Interrupt" bitfld.long 0x4 20. " IntPnd52 ,FullCan Interrupt Pending bit 52" "No interrupt,Interrupt" textline " " bitfld.long 0x4 19. " IntPnd51 ,FullCan Interrupt Pending bit 51" "No interrupt,Interrupt" bitfld.long 0x4 18. " IntPnd50 ,FullCan Interrupt Pending bit 50" "No interrupt,Interrupt" bitfld.long 0x4 17. " IntPnd49 ,FullCan Interrupt Pending bit 49" "No interrupt,Interrupt" textline " " bitfld.long 0x4 16. " IntPnd48 ,FullCan Interrupt Pending bit 48" "No interrupt,Interrupt" bitfld.long 0x4 15. " IntPnd47 ,FullCan Interrupt Pending bit 47" "No interrupt,Interrupt" bitfld.long 0x4 14. " IntPnd46 ,FullCan Interrupt Pending bit 46" "No interrupt,Interrupt" textline " " bitfld.long 0x4 13. " IntPnd45 ,FullCan Interrupt Pending bit 45" "No interrupt,Interrupt" bitfld.long 0x4 12. " IntPnd44 ,FullCan Interrupt Pending bit 44" "No interrupt,Interrupt" bitfld.long 0x4 11. " IntPnd43 ,FullCan Interrupt Pending bit 43" "No interrupt,Interrupt" textline " " bitfld.long 0x4 10. " IntPnd42 ,FullCan Interrupt Pending bit 42" "No interrupt,Interrupt" bitfld.long 0x4 9. " IntPnd41 ,FullCan Interrupt Pending bit 41" "No interrupt,Interrupt" bitfld.long 0x4 8. " IntPnd40 ,FullCan Interrupt Pending bit 40" "No interrupt,Interrupt" textline " " bitfld.long 0x4 7. " IntPnd39 ,FullCan Interrupt Pending bit 39" "No interrupt,Interrupt" bitfld.long 0x4 6. " IntPnd38 ,FullCan Interrupt Pending bit 38" "No interrupt,Interrupt" bitfld.long 0x4 5. " IntPnd37 ,FullCan Interrupt Pending bit 37" "No interrupt,Interrupt" textline " " bitfld.long 0x4 4. " IntPnd36 ,FullCan Interrupt Pending bit 36" "No interrupt,Interrupt" bitfld.long 0x4 3. " IntPnd35 ,FullCan Interrupt Pending bit 35" "No interrupt,Interrupt" bitfld.long 0x4 2. " IntPnd34 ,FullCan Interrupt Pending bit 34" "No interrupt,Interrupt" textline " " bitfld.long 0x4 1. " IntPnd33 ,FullCan Interrupt Pending bit 33" "No interrupt,Interrupt" bitfld.long 0x4 0. " IntPnd32 ,FullCan Interrupt Pending bit 32" "No interrupt,Interrupt" tree.end base ad:0x400FC110 width 14. tree "CAN Wake and Sleep" group.long 0x00++0x7 line.long 0x00 "CANSLEEPCLR,CAN Sleep Clear Register" sif (cpu()!="LPC1751"&&cpu()!="LPC1752"&&cpu()!="LPC1754") eventfld.long 0x00 2. " CAN2SLEEP ,Sleep status and control for CAN channel 2" "Normal,Sleep" textline " " endif eventfld.long 0x00 1. " CAN1SLEEP ,Sleep status and control for CAN channel 1" "Normal,Sleep" line.long 0x04 "CANWAKEFLAGS,CAN Wake-up Flags Register" sif (cpu()!="LPC1751"&&cpu()!="LPC1752"&&cpu()!="LPC1754") eventfld.long 0x04 2. " CAN2WAKE ,Wake-up status for CAN channel 2" "Not occurred,Occurred" textline " " endif eventfld.long 0x04 1. " CAN1WAKE ,Wake-up status for CAN channel 1" "Not occurred,Occurred" tree.end width 0xb tree.end endif sif (cpu()!="LPC1772"&&cpu()!="LPC1774"&&cpu()!="LPC1776"&&cpu()!="LPC1777"&&cpu()!="LPC1778"&&cpu()!="LPC1785"&&cpu()!="LPC1786"&&cpu()!="LPC1787"&&cpu()!="LPC1788") tree "SPI (Serial Peripheral Interface)" base ad:0x40020000 width 9. group.long 0x00++0x3 line.long 0x00 "S0SPCR,SPI Control Register" bitfld.long 0x00 8.--11. " BITS ,Number Of Bits Per Transfer" "16 bits,,,,,,,,8 bits/transfer,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits" bitfld.long 0x00 7. " SPIE ,Serial Peripheral Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 6. " LSBF ,LSB First" "MSB first,LSB first" textline " " bitfld.long 0x00 5. " MSTR ,Master Mode Select" "Slave,Master" bitfld.long 0x00 4. " CPOL ,Clock Polarity Control" "Active high,Active low" bitfld.long 0x00 3. " CPHA ,Clock Phase Control" "First clock,Second clock" textline " " bitfld.long 0x00 2. " BITENABLE ,Number of bits that SPI controller send/receive" "8 bits,S0SPCR[BITS]" hgroup.long 0x04++0x3 hide.long 0x00 "S0SPSR,SPI Status Register" in group.long 0x08++0x3 line.long 0x00 "S0SPDR,SPI Data Register" hexmask.long.byte 0x00 8.--15. 1. " DATAHIGH ,SPI Bi-directional data port bits [15:8]" hexmask.long.byte 0x00 0.--7. 1. " DATALOW ,SPI Bi-directional data port bits [7:0]" group.long 0x0c++0x3 line.long 0x00 "S0SPCCR,SPI Clock Counter Register" hexmask.long.byte 0x00 0.--7. 1. " COUNTER ,SPI0 Clock counter setting" group.long 0x10++0x3 line.long 0x0 "SPTCR,SPI Test Control Register" hexmask.long.byte 0x00 1.--7. 1. " TEST ,SPI test mode" group.long 0x14++0x3 line.long 0x0 "SPTSR,SPI Test Status Register" bitfld.long 0x00 7. " SPIF ,SPI transfer complete flag" "Not completed,Completed" bitfld.long 0x00 6. " WCOL ,Write collision" "No collision,Collision" bitfld.long 0x00 5. " ROVR ,Read overrun" "No overrun,Overrun" textline " " bitfld.long 0x00 4. " MODF ,Mode fault" "No error,Error" bitfld.long 0x00 3. " ABRT ,Slave abort" "Not aborted,Aborted" group.long 0x1c++0x3 line.long 0x00 "S0SPINT,SPI Interrupt Register" eventfld.long 0x00 0. " SPIINTF ,SPI Interrupt Flag" "No interrupt,Interrupt" width 0xb tree.end endif tree "SSP (Synchronous Serial Port)" tree "SSP 0" base ad:0x40088000 width 11. if ((per.l(ad:0x40088000)&0x30)==0x00) group.long 0x00++0x3 line.long 0x00 "SSP0CR0,SSP0 Control Register 0" hexmask.long.byte 0x0 8.--15. 1. " SCR ,Serial Clock Rate" bitfld.long 0x00 7. " CPHA ,Clock Out Phase" "First clock,Second clock" bitfld.long 0x00 6. " CPOL ,Clock Out Polarity" "Low,High" textline " " bitfld.long 0x00 4.--5. " FRF ,Frame Format" "SPI,TI,Microwire,?..." bitfld.long 0x00 0.--3. " DSS ,Data Size Select" ",,,4 bit,5 bit,6 bit,7 bit,8 bit,9 bit,10 bit,11 bit,12 bit,13 bit,14 bit,15 bit,16 bit" else group.long 0x00++0x03 line.long 0x00 "SSP0CR0,SSP0 Control Register 0" hexmask.long.byte 0x0 8.--15. 1. " SCR ,Serial Clock Rate" textline " " bitfld.long 0x00 4.--5. " FRF ,Frame Format" "SPI,TI,Microwire,?..." bitfld.long 0x00 0.--3. " DSS ,Data Size Select" ",,,4 bit,5 bit,6 bit,7 bit,8 bit,9 bit,10 bit,11 bit,12 bit,13 bit,14 bit,15 bit,16 bit" endif if ((per.l(ad:0x40088000+0x04)&0x4)==0x04) group.long 0x04++0x3 line.long 0x00 "SSP0CR1,SSP0 Control Register 1" bitfld.long 0x00 3. " SOD ,Slave Output Disable" "No,Yes" bitfld.long 0x00 2. " MS ,Master/Slave Mode" "Master,Slave" bitfld.long 0x00 1. " SSE ,SSP Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " LBM ,Loop Back Mode" "Normal,Loopback" else group.long 0x04++0x03 line.long 0x00 "SSP0CR1,SSP0 Control Register 1" bitfld.long 0x00 2. " MS ,Master/Slave Mode" "Master,Slave" bitfld.long 0x00 1. " SSE ,SSP Enable" "Disabled,Enabled" bitfld.long 0x00 0. " LBM ,Loop Back Mode" "Normal,Loopback" endif sif (cpu()=="LPC4072FBD80")||(cpu()=="LPC4072FET80")||(cpu()=="LPC4074FBD144")||(cpu()=="LPC4076FBD144")||(cpu()=="LPC4076FET180")||(cpu()=="LPC4078FBD100")||(cpu()=="LPC4078FBD144")||(cpu()=="LPC4078FBD208")||(cpu()=="LPC4078FBD80")||(cpu()=="LPC4078FET180")||(cpu()=="LPC4078FET208")||(cpu()=="LPC4088FBD144")||(cpu()=="LPC4088FBD208")||(cpu()=="LPC4088FET180")||(cpu()=="LPC4088FET208") group.long 0x08++0x03 line.long 0x00 "SSP0DR,SSP0 Data Register" hexmask.long.word 0x00 0.--15. 1. " DATA ,Data" else hgroup.long 0x08++0x03 hide.long 0x00 "SSP0DR,SSP0 Data Register" in endif rgroup.long 0x0C++0x03 line.long 0x00 "SSP0SR,SSP0 Status Register" bitfld.long 0x00 4. " BSY ,Busy" "Idle,Busy" bitfld.long 0x00 3. " RFF ,Receive FIFO Full" "Not full,Full" bitfld.long 0x00 2. " RNE ,Receive FIFO Not Empty" "Empty,Not empty" textline " " bitfld.long 0x00 1. " TNF ,Transmit FIFO Not Full" "Full,Not Full" bitfld.long 0x00 0. " TFE ,Transmit FIFO Empty" "Not empty,Empty" group.long 0x10++0x03 line.long 0x00 "SSP0CPSR,SSP0 Clock Prescale Register" hexmask.long.byte 0x0 0.--7. 1. " CPSDVSR ,PCLK Divisor (even value between 2 and 254)" group.long 0x14++0x03 line.long 0x00 "SSP0IMSC,SSP0 Interrupt Mask Set/Clear Register" bitfld.long 0x00 3. " TXIM ,Tx FIFO Half Empty Interrupt" "Disabled,Enabled" bitfld.long 0x00 2. " RXIM ,Rx FIFO Half Full Interrupt" "Disabled,Enabled" bitfld.long 0x00 1. " RTIM ,Receive Timeout Interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RORIM ,Receive Overrun Interrupt" "Disabled,Enabled" rgroup.long 0x18++0x03 line.long 0x00 "SSP0RIS,SSP0 Raw Interrupt Status Register" bitfld.long 0x00 3. " TXRIS ,Tx FIFO Half Empty" "Not half empty,Half empty" bitfld.long 0x00 2. " RXRIS ,Rx FIFO Half Full" "Not half full,Half full" bitfld.long 0x00 1. " RTRIS ,Receive Timeout" "No timeout,Timeout" textline " " bitfld.long 0x00 0. " RORRIS ,Frame Received When RxFIFO Full" "Not received,Received" rgroup.long 0x1C++0x03 line.long 0x00 "SSP0MIS,SSP0 Masked Interrupt Status Register" bitfld.long 0x00 3. " TXMIS ,Tx FIFO Half Empty Interrupt" "No interrupt,Interrupt" bitfld.long 0x00 2. " RXMIS ,Rx FIFO Half Full Interrupt" "No interrupt,Interrupt" bitfld.long 0x00 1. " RTMIS ,Receive Timeout Interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 0. " RORMIS ,Frame Received When RxFIFO Full Interrupt" "No interrupt,Interrupt" sif (cpu()=="EM773"||cpuis("LPC11E*")||cpu()=="LPC4310FBD144"||cpu()=="LPC4310FBD144-M0"||cpu()=="LPC4310FET100"||cpu()=="LPC4310FET100-M0"||cpu()=="LPC4320FBD100"||cpu()=="LPC4320FBD100-M0"||cpu()=="LPC4320FBD144"||cpu()=="LPC4320FBD144-M0"||cpu()=="LPC4320FET100"||cpu()=="LPC4320FET100-M0"||cpu()=="LPC4330FBD144"||cpu()=="LPC4330FBD144-M0"||cpu()=="LPC4330FET100"||cpu()=="LPC4330FET100-M0"||cpu()=="LPC4330FET180"||cpu()=="LPC4330FET180-M0"||cpu()=="LPC4330FET256"||cpu()=="LPC4330FET256-M0"||cpu()=="LPC4350FBD208"||cpu()=="LPC4350FBD208-M0"||cpu()=="LPC4350FET180"||cpu()=="LPC4350FET180-M0"||cpu()=="LPC4350FET256"||cpu()=="LPC4350FET256-M0"||cpu()=="LPC4333FBD144"||cpu()=="LPC4333FBD144-M0"||cpu()=="LPC4333FET100"||cpu()=="LPC4333FET100-M0"||cpu()=="LPC4333FET180"||cpu()=="LPC4333FET180-M0"||cpu()=="LPC4333FET256"||cpu()=="LPC4333FET256-M0"||cpu()=="LPC4337FBD144"||cpu()=="LPC4337FBD144-M0"||cpu()=="LPC4337FET100"||cpu()=="LPC4337FET100-M0"||cpu()=="LPC4337FET180"||cpu()=="LPC4337FET180-M0"||cpu()=="LPC4337FET256"||cpu()=="LPC4337FET256-M0"||cpu()=="LPC4353FBD208"||cpu()=="LPC4353FBD208-M0"||cpu()=="LPC4353FET180"||cpu()=="LPC4353FET180-M0"||cpu()=="LPC4353FET256"||cpu()=="LPC4353FET256-M0"||cpu()=="LPC4357FBD208"||cpu()=="LPC4357FBD208-M0"||cpu()=="LPC4357FET256"||cpu()=="LPC4357FET256-M0"||cpuis("LPC11U3*")||cpuis("LPC11U6*")) wgroup.long 0x20++0x03 else group.long 0x20++0x03 endif line.long 0x00 "SSP0ICR,SSP0 Interrupt Clear Register" bitfld.long 0x0 1. " RTIC ,Receive Timeout Clear" "No effect,Clear" bitfld.long 0x0 0. " RORIC ,Clear Frame Received When RxFIFO Full" "No effect,Clear" sif (cpu()!="EM773"&&cpu()!="LPC1311"&&cpu()!="LPC1313"&&cpu()!="LPC1342"&&cpu()!="LPC1343"&&cpu()!="LPC1110"&&!cpuis("LPC1111*")&&!cpuis("LPC1112*")&&cpu()!="LPC1112LV"&&!cpuis("LPC1113*")&&!cpuis("LPC1114*")&&cpu()!="LPC1114LV"&&!cpuis("LPC1115*")&&cpu()!="LPC11D14"&&cpu()!="LPC11C12"&&cpu()!="LPC11C14"&&cpu()!="LPC1102"&&cpu()!="LPC11C22"&&cpu()!="LPC11C24"&&cpu()!="LPC11U12/201"&&cpu()!="LPC11U13/201"&&cpu()!="LPC11U14/201"&&!cpuis("LPC11U24*")&&cpu()!="LPC11U23/301"&&!cpuis("LPC11U3*")&&cpu()!="LPC11A02"&&cpu()!="LPC11A04"&&cpu()!="LPC11A11"&&cpu()!="LPC11A12"&&cpu()!="LPC11A13"&&cpu()!="LPC11A14"&&!cpuis("LPC11E*"))||(cpu()=="LPC4072FBD80")||(cpu()=="LPC4072FET80")||(cpu()=="LPC4074FBD144")||(cpu()=="LPC4076FBD144")||(cpu()=="LPC4076FET180")||(cpu()=="LPC4078FBD100")||(cpu()=="LPC4078FBD144")||(cpu()=="LPC4078FBD208")||(cpu()=="LPC4078FBD80")||(cpu()=="LPC4078FET180")||(cpu()=="LPC4078FET208")||(cpu()=="LPC4088FBD144")||(cpu()=="LPC4088FBD208")||(cpu()=="LPC4088FET180")||(cpu()=="LPC4088FET208") group.long 0x24++0x03 line.long 0x00 "SSP0DMACR,SSP0 DMA Control Register" bitfld.long 0x0 1. " TXDMAE ,Transmit DMA Enable" "Disabled,Enabled" bitfld.long 0x0 0. " RXDMAE ,Receive DMA Enable" "Disabled,Enabled" endif width 0x0B tree.end tree "SSP 1" base ad:0x40030000 width 11. if ((per.l(ad:0x40030000)&0x30)==0x00) group.long 0x00++0x3 line.long 0x00 "SSP1CR0,SSP1 Control Register 0" hexmask.long.byte 0x0 8.--15. 1. " SCR ,Serial Clock Rate" bitfld.long 0x00 7. " CPHA ,Clock Out Phase" "First clock,Second clock" bitfld.long 0x00 6. " CPOL ,Clock Out Polarity" "Low,High" textline " " bitfld.long 0x00 4.--5. " FRF ,Frame Format" "SPI,TI,Microwire,?..." bitfld.long 0x00 0.--3. " DSS ,Data Size Select" ",,,4 bit,5 bit,6 bit,7 bit,8 bit,9 bit,10 bit,11 bit,12 bit,13 bit,14 bit,15 bit,16 bit" else group.long 0x00++0x03 line.long 0x00 "SSP1CR0,SSP1 Control Register 0" hexmask.long.byte 0x0 8.--15. 1. " SCR ,Serial Clock Rate" textline " " bitfld.long 0x00 4.--5. " FRF ,Frame Format" "SPI,TI,Microwire,?..." bitfld.long 0x00 0.--3. " DSS ,Data Size Select" ",,,4 bit,5 bit,6 bit,7 bit,8 bit,9 bit,10 bit,11 bit,12 bit,13 bit,14 bit,15 bit,16 bit" endif if ((per.l(ad:0x40030000+0x04)&0x4)==0x04) group.long 0x04++0x3 line.long 0x00 "SSP1CR1,SSP1 Control Register 1" bitfld.long 0x00 3. " SOD ,Slave Output Disable" "No,Yes" bitfld.long 0x00 2. " MS ,Master/Slave Mode" "Master,Slave" bitfld.long 0x00 1. " SSE ,SSP Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " LBM ,Loop Back Mode" "Normal,Loopback" else group.long 0x04++0x03 line.long 0x00 "SSP1CR1,SSP1 Control Register 1" bitfld.long 0x00 2. " MS ,Master/Slave Mode" "Master,Slave" bitfld.long 0x00 1. " SSE ,SSP Enable" "Disabled,Enabled" bitfld.long 0x00 0. " LBM ,Loop Back Mode" "Normal,Loopback" endif sif (cpu()=="LPC4072FBD80")||(cpu()=="LPC4072FET80")||(cpu()=="LPC4074FBD144")||(cpu()=="LPC4076FBD144")||(cpu()=="LPC4076FET180")||(cpu()=="LPC4078FBD100")||(cpu()=="LPC4078FBD144")||(cpu()=="LPC4078FBD208")||(cpu()=="LPC4078FBD80")||(cpu()=="LPC4078FET180")||(cpu()=="LPC4078FET208")||(cpu()=="LPC4088FBD144")||(cpu()=="LPC4088FBD208")||(cpu()=="LPC4088FET180")||(cpu()=="LPC4088FET208") group.long 0x08++0x03 line.long 0x00 "SSP1DR,SSP1 Data Register" hexmask.long.word 0x00 0.--15. 1. " DATA ,Data" else hgroup.long 0x08++0x03 hide.long 0x00 "SSP1DR,SSP1 Data Register" in endif rgroup.long 0x0C++0x03 line.long 0x00 "SSP1SR,SSP1 Status Register" bitfld.long 0x00 4. " BSY ,Busy" "Idle,Busy" bitfld.long 0x00 3. " RFF ,Receive FIFO Full" "Not full,Full" bitfld.long 0x00 2. " RNE ,Receive FIFO Not Empty" "Empty,Not empty" textline " " bitfld.long 0x00 1. " TNF ,Transmit FIFO Not Full" "Full,Not Full" bitfld.long 0x00 0. " TFE ,Transmit FIFO Empty" "Not empty,Empty" group.long 0x10++0x03 line.long 0x00 "SSP1CPSR,SSP1 Clock Prescale Register" hexmask.long.byte 0x0 0.--7. 1. " CPSDVSR ,PCLK Divisor (even value between 2 and 254)" group.long 0x14++0x03 line.long 0x00 "SSP1IMSC,SSP1 Interrupt Mask Set/Clear Register" bitfld.long 0x00 3. " TXIM ,Tx FIFO Half Empty Interrupt" "Disabled,Enabled" bitfld.long 0x00 2. " RXIM ,Rx FIFO Half Full Interrupt" "Disabled,Enabled" bitfld.long 0x00 1. " RTIM ,Receive Timeout Interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RORIM ,Receive Overrun Interrupt" "Disabled,Enabled" rgroup.long 0x18++0x03 line.long 0x00 "SSP1RIS,SSP1 Raw Interrupt Status Register" bitfld.long 0x00 3. " TXRIS ,Tx FIFO Half Empty" "Not half empty,Half empty" bitfld.long 0x00 2. " RXRIS ,Rx FIFO Half Full" "Not half full,Half full" bitfld.long 0x00 1. " RTRIS ,Receive Timeout" "No timeout,Timeout" textline " " bitfld.long 0x00 0. " RORRIS ,Frame Received When RxFIFO Full" "Not received,Received" rgroup.long 0x1C++0x03 line.long 0x00 "SSP1MIS,SSP1 Masked Interrupt Status Register" bitfld.long 0x00 3. " TXMIS ,Tx FIFO Half Empty Interrupt" "No interrupt,Interrupt" bitfld.long 0x00 2. " RXMIS ,Rx FIFO Half Full Interrupt" "No interrupt,Interrupt" bitfld.long 0x00 1. " RTMIS ,Receive Timeout Interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 0. " RORMIS ,Frame Received When RxFIFO Full Interrupt" "No interrupt,Interrupt" sif (cpu()=="EM773"||cpuis("LPC11E*")||cpu()=="LPC4310FBD144"||cpu()=="LPC4310FBD144-M0"||cpu()=="LPC4310FET100"||cpu()=="LPC4310FET100-M0"||cpu()=="LPC4320FBD100"||cpu()=="LPC4320FBD100-M0"||cpu()=="LPC4320FBD144"||cpu()=="LPC4320FBD144-M0"||cpu()=="LPC4320FET100"||cpu()=="LPC4320FET100-M0"||cpu()=="LPC4330FBD144"||cpu()=="LPC4330FBD144-M0"||cpu()=="LPC4330FET100"||cpu()=="LPC4330FET100-M0"||cpu()=="LPC4330FET180"||cpu()=="LPC4330FET180-M0"||cpu()=="LPC4330FET256"||cpu()=="LPC4330FET256-M0"||cpu()=="LPC4350FBD208"||cpu()=="LPC4350FBD208-M0"||cpu()=="LPC4350FET180"||cpu()=="LPC4350FET180-M0"||cpu()=="LPC4350FET256"||cpu()=="LPC4350FET256-M0"||cpu()=="LPC4333FBD144"||cpu()=="LPC4333FBD144-M0"||cpu()=="LPC4333FET100"||cpu()=="LPC4333FET100-M0"||cpu()=="LPC4333FET180"||cpu()=="LPC4333FET180-M0"||cpu()=="LPC4333FET256"||cpu()=="LPC4333FET256-M0"||cpu()=="LPC4337FBD144"||cpu()=="LPC4337FBD144-M0"||cpu()=="LPC4337FET100"||cpu()=="LPC4337FET100-M0"||cpu()=="LPC4337FET180"||cpu()=="LPC4337FET180-M0"||cpu()=="LPC4337FET256"||cpu()=="LPC4337FET256-M0"||cpu()=="LPC4353FBD208"||cpu()=="LPC4353FBD208-M0"||cpu()=="LPC4353FET180"||cpu()=="LPC4353FET180-M0"||cpu()=="LPC4353FET256"||cpu()=="LPC4353FET256-M0"||cpu()=="LPC4357FBD208"||cpu()=="LPC4357FBD208-M0"||cpu()=="LPC4357FET256"||cpu()=="LPC4357FET256-M0"||cpuis("LPC11U3*")||cpuis("LPC11U6*")) wgroup.long 0x20++0x03 else group.long 0x20++0x03 endif line.long 0x00 "SSP1ICR,SSP1 Interrupt Clear Register" bitfld.long 0x0 1. " RTIC ,Receive Timeout Clear" "No effect,Clear" bitfld.long 0x0 0. " RORIC ,Clear Frame Received When RxFIFO Full" "No effect,Clear" sif (cpu()!="EM773"&&cpu()!="LPC1311"&&cpu()!="LPC1313"&&cpu()!="LPC1342"&&cpu()!="LPC1343"&&cpu()!="LPC1110"&&!cpuis("LPC1111*")&&!cpuis("LPC1112*")&&cpu()!="LPC1112LV"&&!cpuis("LPC1113*")&&!cpuis("LPC1114*")&&cpu()!="LPC1114LV"&&!cpuis("LPC1115*")&&cpu()!="LPC11D14"&&cpu()!="LPC11C12"&&cpu()!="LPC11C14"&&cpu()!="LPC1102"&&cpu()!="LPC11C22"&&cpu()!="LPC11C24"&&cpu()!="LPC11U12/201"&&cpu()!="LPC11U13/201"&&cpu()!="LPC11U14/201"&&!cpuis("LPC11U24*")&&cpu()!="LPC11U23/301"&&!cpuis("LPC11U3*")&&cpu()!="LPC11A02"&&cpu()!="LPC11A04"&&cpu()!="LPC11A11"&&cpu()!="LPC11A12"&&cpu()!="LPC11A13"&&cpu()!="LPC11A14"&&!cpuis("LPC11E*"))||(cpu()=="LPC4072FBD80")||(cpu()=="LPC4072FET80")||(cpu()=="LPC4074FBD144")||(cpu()=="LPC4076FBD144")||(cpu()=="LPC4076FET180")||(cpu()=="LPC4078FBD100")||(cpu()=="LPC4078FBD144")||(cpu()=="LPC4078FBD208")||(cpu()=="LPC4078FBD80")||(cpu()=="LPC4078FET180")||(cpu()=="LPC4078FET208")||(cpu()=="LPC4088FBD144")||(cpu()=="LPC4088FBD208")||(cpu()=="LPC4088FET180")||(cpu()=="LPC4088FET208") group.long 0x24++0x03 line.long 0x00 "SSP1DMACR,SSP1 DMA Control Register" bitfld.long 0x0 1. " TXDMAE ,Transmit DMA Enable" "Disabled,Enabled" bitfld.long 0x0 0. " RXDMAE ,Receive DMA Enable" "Disabled,Enabled" endif width 0x0B tree.end sif (cpu()=="LPC1772"||cpu()=="LPC1774"||cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778"||cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788") tree "SSP 2" base ad:0x400AC000 width 11. if ((per.l(ad:0x400AC000)&0x30)==0x00) group.long 0x00++0x3 line.long 0x00 "SSP2CR0,SSP2 Control Register 0" hexmask.long.byte 0x0 8.--15. 1. " SCR ,Serial Clock Rate" bitfld.long 0x00 7. " CPHA ,Clock Out Phase" "First clock,Second clock" bitfld.long 0x00 6. " CPOL ,Clock Out Polarity" "Low,High" textline " " bitfld.long 0x00 4.--5. " FRF ,Frame Format" "SPI,TI,Microwire,?..." bitfld.long 0x00 0.--3. " DSS ,Data Size Select" ",,,4 bit,5 bit,6 bit,7 bit,8 bit,9 bit,10 bit,11 bit,12 bit,13 bit,14 bit,15 bit,16 bit" else group.long 0x00++0x03 line.long 0x00 "SSP2CR0,SSP2 Control Register 0" hexmask.long.byte 0x0 8.--15. 1. " SCR ,Serial Clock Rate" textline " " bitfld.long 0x00 4.--5. " FRF ,Frame Format" "SPI,TI,Microwire,?..." bitfld.long 0x00 0.--3. " DSS ,Data Size Select" ",,,4 bit,5 bit,6 bit,7 bit,8 bit,9 bit,10 bit,11 bit,12 bit,13 bit,14 bit,15 bit,16 bit" endif if ((per.l(ad:0x400AC000+0x04)&0x4)==0x04) group.long 0x04++0x3 line.long 0x00 "SSP2CR1,SSP2 Control Register 1" bitfld.long 0x00 3. " SOD ,Slave Output Disable" "No,Yes" bitfld.long 0x00 2. " MS ,Master/Slave Mode" "Master,Slave" bitfld.long 0x00 1. " SSE ,SSP Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " LBM ,Loop Back Mode" "Normal,Loopback" else group.long 0x04++0x03 line.long 0x00 "SSP2CR1,SSP2 Control Register 1" bitfld.long 0x00 2. " MS ,Master/Slave Mode" "Master,Slave" bitfld.long 0x00 1. " SSE ,SSP Enable" "Disabled,Enabled" bitfld.long 0x00 0. " LBM ,Loop Back Mode" "Normal,Loopback" endif sif (cpu()=="LPC4072FBD80")||(cpu()=="LPC4072FET80")||(cpu()=="LPC4074FBD144")||(cpu()=="LPC4076FBD144")||(cpu()=="LPC4076FET180")||(cpu()=="LPC4078FBD100")||(cpu()=="LPC4078FBD144")||(cpu()=="LPC4078FBD208")||(cpu()=="LPC4078FBD80")||(cpu()=="LPC4078FET180")||(cpu()=="LPC4078FET208")||(cpu()=="LPC4088FBD144")||(cpu()=="LPC4088FBD208")||(cpu()=="LPC4088FET180")||(cpu()=="LPC4088FET208") group.long 0x08++0x03 line.long 0x00 "SSP2DR,SSP2 Data Register" hexmask.long.word 0x00 0.--15. 1. " DATA ,Data" else hgroup.long 0x08++0x03 hide.long 0x00 "SSP2DR,SSP2 Data Register" in endif rgroup.long 0x0C++0x03 line.long 0x00 "SSP2SR,SSP2 Status Register" bitfld.long 0x00 4. " BSY ,Busy" "Idle,Busy" bitfld.long 0x00 3. " RFF ,Receive FIFO Full" "Not full,Full" bitfld.long 0x00 2. " RNE ,Receive FIFO Not Empty" "Empty,Not empty" textline " " bitfld.long 0x00 1. " TNF ,Transmit FIFO Not Full" "Full,Not Full" bitfld.long 0x00 0. " TFE ,Transmit FIFO Empty" "Not empty,Empty" group.long 0x10++0x03 line.long 0x00 "SSP2CPSR,SSP2 Clock Prescale Register" hexmask.long.byte 0x0 0.--7. 1. " CPSDVSR ,PCLK Divisor (even value between 2 and 254)" group.long 0x14++0x03 line.long 0x00 "SSP2IMSC,SSP2 Interrupt Mask Set/Clear Register" bitfld.long 0x00 3. " TXIM ,Tx FIFO Half Empty Interrupt" "Disabled,Enabled" bitfld.long 0x00 2. " RXIM ,Rx FIFO Half Full Interrupt" "Disabled,Enabled" bitfld.long 0x00 1. " RTIM ,Receive Timeout Interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RORIM ,Receive Overrun Interrupt" "Disabled,Enabled" rgroup.long 0x18++0x03 line.long 0x00 "SSP2RIS,SSP2 Raw Interrupt Status Register" bitfld.long 0x00 3. " TXRIS ,Tx FIFO Half Empty" "Not half empty,Half empty" bitfld.long 0x00 2. " RXRIS ,Rx FIFO Half Full" "Not half full,Half full" bitfld.long 0x00 1. " RTRIS ,Receive Timeout" "No timeout,Timeout" textline " " bitfld.long 0x00 0. " RORRIS ,Frame Received When RxFIFO Full" "Not received,Received" rgroup.long 0x1C++0x03 line.long 0x00 "SSP2MIS,SSP2 Masked Interrupt Status Register" bitfld.long 0x00 3. " TXMIS ,Tx FIFO Half Empty Interrupt" "No interrupt,Interrupt" bitfld.long 0x00 2. " RXMIS ,Rx FIFO Half Full Interrupt" "No interrupt,Interrupt" bitfld.long 0x00 1. " RTMIS ,Receive Timeout Interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 0. " RORMIS ,Frame Received When RxFIFO Full Interrupt" "No interrupt,Interrupt" sif (cpu()=="EM773"||cpuis("LPC11E*")||cpu()=="LPC4310FBD144"||cpu()=="LPC4310FBD144-M0"||cpu()=="LPC4310FET100"||cpu()=="LPC4310FET100-M0"||cpu()=="LPC4320FBD100"||cpu()=="LPC4320FBD100-M0"||cpu()=="LPC4320FBD144"||cpu()=="LPC4320FBD144-M0"||cpu()=="LPC4320FET100"||cpu()=="LPC4320FET100-M0"||cpu()=="LPC4330FBD144"||cpu()=="LPC4330FBD144-M0"||cpu()=="LPC4330FET100"||cpu()=="LPC4330FET100-M0"||cpu()=="LPC4330FET180"||cpu()=="LPC4330FET180-M0"||cpu()=="LPC4330FET256"||cpu()=="LPC4330FET256-M0"||cpu()=="LPC4350FBD208"||cpu()=="LPC4350FBD208-M0"||cpu()=="LPC4350FET180"||cpu()=="LPC4350FET180-M0"||cpu()=="LPC4350FET256"||cpu()=="LPC4350FET256-M0"||cpu()=="LPC4333FBD144"||cpu()=="LPC4333FBD144-M0"||cpu()=="LPC4333FET100"||cpu()=="LPC4333FET100-M0"||cpu()=="LPC4333FET180"||cpu()=="LPC4333FET180-M0"||cpu()=="LPC4333FET256"||cpu()=="LPC4333FET256-M0"||cpu()=="LPC4337FBD144"||cpu()=="LPC4337FBD144-M0"||cpu()=="LPC4337FET100"||cpu()=="LPC4337FET100-M0"||cpu()=="LPC4337FET180"||cpu()=="LPC4337FET180-M0"||cpu()=="LPC4337FET256"||cpu()=="LPC4337FET256-M0"||cpu()=="LPC4353FBD208"||cpu()=="LPC4353FBD208-M0"||cpu()=="LPC4353FET180"||cpu()=="LPC4353FET180-M0"||cpu()=="LPC4353FET256"||cpu()=="LPC4353FET256-M0"||cpu()=="LPC4357FBD208"||cpu()=="LPC4357FBD208-M0"||cpu()=="LPC4357FET256"||cpu()=="LPC4357FET256-M0"||cpuis("LPC11U3*")||cpuis("LPC11U6*")) wgroup.long 0x20++0x03 else group.long 0x20++0x03 endif line.long 0x00 "SSP2ICR,SSP2 Interrupt Clear Register" bitfld.long 0x0 1. " RTIC ,Receive Timeout Clear" "No effect,Clear" bitfld.long 0x0 0. " RORIC ,Clear Frame Received When RxFIFO Full" "No effect,Clear" sif (cpu()!="EM773"&&cpu()!="LPC1311"&&cpu()!="LPC1313"&&cpu()!="LPC1342"&&cpu()!="LPC1343"&&cpu()!="LPC1110"&&!cpuis("LPC1111*")&&!cpuis("LPC1112*")&&cpu()!="LPC1112LV"&&!cpuis("LPC1113*")&&!cpuis("LPC1114*")&&cpu()!="LPC1114LV"&&!cpuis("LPC1115*")&&cpu()!="LPC11D14"&&cpu()!="LPC11C12"&&cpu()!="LPC11C14"&&cpu()!="LPC1102"&&cpu()!="LPC11C22"&&cpu()!="LPC11C24"&&cpu()!="LPC11U12/201"&&cpu()!="LPC11U13/201"&&cpu()!="LPC11U14/201"&&!cpuis("LPC11U24*")&&cpu()!="LPC11U23/301"&&!cpuis("LPC11U3*")&&cpu()!="LPC11A02"&&cpu()!="LPC11A04"&&cpu()!="LPC11A11"&&cpu()!="LPC11A12"&&cpu()!="LPC11A13"&&cpu()!="LPC11A14"&&!cpuis("LPC11E*"))||(cpu()=="LPC4072FBD80")||(cpu()=="LPC4072FET80")||(cpu()=="LPC4074FBD144")||(cpu()=="LPC4076FBD144")||(cpu()=="LPC4076FET180")||(cpu()=="LPC4078FBD100")||(cpu()=="LPC4078FBD144")||(cpu()=="LPC4078FBD208")||(cpu()=="LPC4078FBD80")||(cpu()=="LPC4078FET180")||(cpu()=="LPC4078FET208")||(cpu()=="LPC4088FBD144")||(cpu()=="LPC4088FBD208")||(cpu()=="LPC4088FET180")||(cpu()=="LPC4088FET208") group.long 0x24++0x03 line.long 0x00 "SSP2DMACR,SSP2 DMA Control Register" bitfld.long 0x0 1. " TXDMAE ,Transmit DMA Enable" "Disabled,Enabled" bitfld.long 0x0 0. " RXDMAE ,Receive DMA Enable" "Disabled,Enabled" endif width 0x0B tree.end endif tree.end tree "I2C (Inter-Integrated Circuit)" tree "I2C 0" base ad:0x4001C000 width 18. group.long 0x00++0x03 line.long 0x00 "CON,I2C0 Control Register" setclrfld.long 0x00 6. 0x00 6. 0x18 6. " I2EN_set/clr ,I2C interface enable" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x18 5. " STA_set/clr ,START flag" "Not started,Started" bitfld.long 0x00 4. " STO ,STOP flag" "No effect,Stop" setclrfld.long 0x00 3. 0x00 3. 0x18 3. " SI_set/clr ,I2C interrupt flag" "Not occurred,Occurred" newline setclrfld.long 0x00 2. 0x00 2. 0x18 2. " AA_set/clr ,Assert acknowledge flag" "Not asserted,Asserted" rgroup.long 0x04++0x03 line.long 0x00 "STAT,I2C0 Status Register" bitfld.long 0x00 3.--7. " STATUS ,Actual status information about I2C interface" "Bus error/undefined,START transmitted,Repeated START transmitted,SLA+W transmitted/ACK,SLA+W transmitted/NOT ACK,I2DAT transmitted/ACK,I2DAT transmitted/NOT ACK,Arbitration lost SLA+R/W/Data/NOT ACK,SLA+R transmitted/ACK,SLA+R transmitted/NOT ACK,Data received/ACK,Data received/NOT ACK,Own SLA+W received/ACK,Arbitration lost SLA+R/W/Own SLA+W received/ACK,GCA (0x00) received/ACK,Arbitration lost SLA+R/W/GCA received/ACK,Own SLV/DATA received/ACK,Own SLA/DATA received/NOT ACK,General Call/DATA received/ACK,General Call/DATA received/NOT ACK,STOP/repeated START received SLV/REC/SLV/TRX,Own SLA+R received/ACK,Arbitration lost SLA+R/W/Own SLA+R received/ACK,I2DAT transmitted/ACK,I2DAT transmitted/NOT ACK,Last I2DAT transmitted/ACK,,,,,,No information/SI = 0" newline group.long 0x08++0x0F line.long 0x00 "DAT,I2C0 Data Register" hexmask.long.byte 0x00 0.--7. 1. " DATA ,Data" line.long 0x04 "ADR0,I2C0 Slave Address Register 0" hexmask.long.byte 0x04 1.--7. 0x02 " ADDRESS ,Slave mode address" bitfld.long 0x04 0. " GC ,General call enable bit" "Disabled,Enabled" line.long 0x08 "SCLH,I2C0 SCL High Duty Cycle Register" hexmask.long.word 0x08 0.--15. 1. " SCLH ,Count for SCL HIGH time period selection" line.long 0x0C "SCLL,I2C0 SCL Low Duty Cycle Register" hexmask.long.word 0x0C 0.--15. 1. " SCLL ,Count for SCL LOW time period selection" group.long 0x1C++0x03 line.long 0x00 "MMCTRL,I2C0 Monitor Mode Control Register" sif cpuis("LPC1311")||cpuis("LPC1313")||cpuis("LPC1342")||cpuis("LPC1343")||cpuis("EM773")||cpuis("LPC11A02")||cpuis("LPC11A04")||cpuis("LPC11A11")||cpuis("LPC11A12")||cpuis("LPC11A13")||cpuis("LPC11A14") bitfld.long 0x00 3. " MATCH_ALL ,Select interrupt register match" "Match address,Any address" else bitfld.long 0x00 2. " MATCH_ALL ,Select interrupt register match" "Match address,Any address" endif bitfld.long 0x00 1. " ENA_SCL ,SCL output enable" "Disabled,Enabled" bitfld.long 0x00 0. " MM_ENA ,Monitor mode enable" "Disabled,Enabled" group.long 0x20++0x03 line.long 0x00 "ADR1,I2C0 Slave Address Register 1" hexmask.long.byte 0x00 1.--7. 0x02 " ADDRESS ,The I2C device address for slave mode" bitfld.long 0x00 0. " GC ,General call bit enable" "Disabled,Enabled" group.long 0x24++0x03 line.long 0x00 "ADR2,I2C0 Slave Address Register 2" hexmask.long.byte 0x00 1.--7. 0x02 " ADDRESS ,The I2C device address for slave mode" bitfld.long 0x00 0. " GC ,General call bit enable" "Disabled,Enabled" group.long 0x28++0x03 line.long 0x00 "ADR3,I2C0 Slave Address Register 3" hexmask.long.byte 0x00 1.--7. 0x02 " ADDRESS ,The I2C device address for slave mode" bitfld.long 0x00 0. " GC ,General call bit enable" "Disabled,Enabled" sif cpuis("LPC4072FBD80")||cpuis("LPC4072FET80")||cpuis("LPC4074FBD144")||cpuis("LPC4076FBD144")||cpuis("LPC4076FET180")||cpuis("LPC4078FBD100")||cpuis("LPC4078FBD144")||cpuis("LPC4078FBD208")||cpuis("LPC4078FBD80")||cpuis("LPC4078FET180")||cpuis("LPC4078FET208")||(cpu()=="LPC4088FBD144")||cpuis("LPC4088FBD208")||cpuis("LPC4088FET180")||cpuis("LPC4088FET208")||cpuis("LPC11E*") group.long 0x2C++0x03 line.long 0x00 "DATA_BUFFER,I2C0 Data Buffer Register" hexmask.long.byte 0x00 0.--7. 1. " DATA ,Data" elif cpuis("LPC111*")||cpuis("LPC11*LV")||cpuis("LPC110*")||cpuis("LPC112*") rgroup.long 0x2C++0x03 line.long 0x00 "DATA_BUFFER,I2C0 Data Buffer Register" hexmask.long.byte 0x00 0.--7. 1. " DATA ,Data" else hgroup.long 0x2C++0x03 hide.long 0x00 "DATA_BUFFER,I2C0 Data Buffer Register" in endif group.long 0x30++0x03 line.long 0x00 "MASK0,I2C0 Mask Register 0" bitfld.long 0x00 7. " MASK[7:0] ,Mask bit 7" "0,1" bitfld.long 0x00 6. ",Mask bit 6" "0,1" bitfld.long 0x00 5. ",Mask bit 6" "0,1" bitfld.long 0x00 4. ",Mask bit 4" "0,1" bitfld.long 0x00 3. ",Mask bit 3" "0,1" bitfld.long 0x00 2. ",Mask bit 2" "0,1" bitfld.long 0x00 1. ",Mask bit 1" "0,1" group.long 0x34++0x03 line.long 0x00 "MASK1,I2C0 Mask Register 1" bitfld.long 0x00 7. " MASK[7:0] ,Mask bit 7" "0,1" bitfld.long 0x00 6. ",Mask bit 6" "0,1" bitfld.long 0x00 5. ",Mask bit 6" "0,1" bitfld.long 0x00 4. ",Mask bit 4" "0,1" bitfld.long 0x00 3. ",Mask bit 3" "0,1" bitfld.long 0x00 2. ",Mask bit 2" "0,1" bitfld.long 0x00 1. ",Mask bit 1" "0,1" group.long 0x38++0x03 line.long 0x00 "MASK2,I2C0 Mask Register 2" bitfld.long 0x00 7. " MASK[7:0] ,Mask bit 7" "0,1" bitfld.long 0x00 6. ",Mask bit 6" "0,1" bitfld.long 0x00 5. ",Mask bit 6" "0,1" bitfld.long 0x00 4. ",Mask bit 4" "0,1" bitfld.long 0x00 3. ",Mask bit 3" "0,1" bitfld.long 0x00 2. ",Mask bit 2" "0,1" bitfld.long 0x00 1. ",Mask bit 1" "0,1" group.long 0x3C++0x03 line.long 0x00 "MASK3,I2C0 Mask Register 3" bitfld.long 0x00 7. " MASK[7:0] ,Mask bit 7" "0,1" bitfld.long 0x00 6. ",Mask bit 6" "0,1" bitfld.long 0x00 5. ",Mask bit 6" "0,1" bitfld.long 0x00 4. ",Mask bit 4" "0,1" bitfld.long 0x00 3. ",Mask bit 3" "0,1" bitfld.long 0x00 2. ",Mask bit 2" "0,1" bitfld.long 0x00 1. ",Mask bit 1" "0,1" width 0x0B tree.end tree "I2C 1" base ad:0x4005C000 width 18. group.long 0x00++0x03 line.long 0x00 "CON,I2C1 Control Register" setclrfld.long 0x00 6. 0x00 6. 0x18 6. " I2EN_set/clr ,I2C interface enable" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x18 5. " STA_set/clr ,START flag" "Not started,Started" bitfld.long 0x00 4. " STO ,STOP flag" "No effect,Stop" setclrfld.long 0x00 3. 0x00 3. 0x18 3. " SI_set/clr ,I2C interrupt flag" "Not occurred,Occurred" newline setclrfld.long 0x00 2. 0x00 2. 0x18 2. " AA_set/clr ,Assert acknowledge flag" "Not asserted,Asserted" rgroup.long 0x04++0x03 line.long 0x00 "STAT,I2C1 Status Register" bitfld.long 0x00 3.--7. " STATUS ,Actual status information about I2C interface" "Bus error/undefined,START transmitted,Repeated START transmitted,SLA+W transmitted/ACK,SLA+W transmitted/NOT ACK,I2DAT transmitted/ACK,I2DAT transmitted/NOT ACK,Arbitration lost SLA+R/W/Data/NOT ACK,SLA+R transmitted/ACK,SLA+R transmitted/NOT ACK,Data received/ACK,Data received/NOT ACK,Own SLA+W received/ACK,Arbitration lost SLA+R/W/Own SLA+W received/ACK,GCA (0x00) received/ACK,Arbitration lost SLA+R/W/GCA received/ACK,Own SLV/DATA received/ACK,Own SLA/DATA received/NOT ACK,General Call/DATA received/ACK,General Call/DATA received/NOT ACK,STOP/repeated START received SLV/REC/SLV/TRX,Own SLA+R received/ACK,Arbitration lost SLA+R/W/Own SLA+R received/ACK,I2DAT transmitted/ACK,I2DAT transmitted/NOT ACK,Last I2DAT transmitted/ACK,,,,,,No information/SI = 0" newline group.long 0x08++0x0F line.long 0x00 "DAT,I2C1 Data Register" hexmask.long.byte 0x00 0.--7. 1. " DATA ,Data" line.long 0x04 "ADR0,I2C1 Slave Address Register 0" hexmask.long.byte 0x04 1.--7. 0x02 " ADDRESS ,Slave mode address" bitfld.long 0x04 0. " GC ,General call enable bit" "Disabled,Enabled" line.long 0x08 "SCLH,I2C1 SCL High Duty Cycle Register" hexmask.long.word 0x08 0.--15. 1. " SCLH ,Count for SCL HIGH time period selection" line.long 0x0C "SCLL,I2C1 SCL Low Duty Cycle Register" hexmask.long.word 0x0C 0.--15. 1. " SCLL ,Count for SCL LOW time period selection" group.long 0x1C++0x03 line.long 0x00 "MMCTRL,I2C1 Monitor Mode Control Register" sif cpuis("LPC1311")||cpuis("LPC1313")||cpuis("LPC1342")||cpuis("LPC1343")||cpuis("EM773")||cpuis("LPC11A02")||cpuis("LPC11A04")||cpuis("LPC11A11")||cpuis("LPC11A12")||cpuis("LPC11A13")||cpuis("LPC11A14") bitfld.long 0x00 3. " MATCH_ALL ,Select interrupt register match" "Match address,Any address" else bitfld.long 0x00 2. " MATCH_ALL ,Select interrupt register match" "Match address,Any address" endif bitfld.long 0x00 1. " ENA_SCL ,SCL output enable" "Disabled,Enabled" bitfld.long 0x00 0. " MM_ENA ,Monitor mode enable" "Disabled,Enabled" group.long 0x20++0x03 line.long 0x00 "ADR1,I2C1 Slave Address Register 1" hexmask.long.byte 0x00 1.--7. 0x02 " ADDRESS ,The I2C device address for slave mode" bitfld.long 0x00 0. " GC ,General call bit enable" "Disabled,Enabled" group.long 0x24++0x03 line.long 0x00 "ADR2,I2C1 Slave Address Register 2" hexmask.long.byte 0x00 1.--7. 0x02 " ADDRESS ,The I2C device address for slave mode" bitfld.long 0x00 0. " GC ,General call bit enable" "Disabled,Enabled" group.long 0x28++0x03 line.long 0x00 "ADR3,I2C1 Slave Address Register 3" hexmask.long.byte 0x00 1.--7. 0x02 " ADDRESS ,The I2C device address for slave mode" bitfld.long 0x00 0. " GC ,General call bit enable" "Disabled,Enabled" sif cpuis("LPC4072FBD80")||cpuis("LPC4072FET80")||cpuis("LPC4074FBD144")||cpuis("LPC4076FBD144")||cpuis("LPC4076FET180")||cpuis("LPC4078FBD100")||cpuis("LPC4078FBD144")||cpuis("LPC4078FBD208")||cpuis("LPC4078FBD80")||cpuis("LPC4078FET180")||cpuis("LPC4078FET208")||(cpu()=="LPC4088FBD144")||cpuis("LPC4088FBD208")||cpuis("LPC4088FET180")||cpuis("LPC4088FET208")||cpuis("LPC11E*") group.long 0x2C++0x03 line.long 0x00 "DATA_BUFFER,I2C1 Data Buffer Register" hexmask.long.byte 0x00 0.--7. 1. " DATA ,Data" elif cpuis("LPC111*")||cpuis("LPC11*LV")||cpuis("LPC110*")||cpuis("LPC112*") rgroup.long 0x2C++0x03 line.long 0x00 "DATA_BUFFER,I2C1 Data Buffer Register" hexmask.long.byte 0x00 0.--7. 1. " DATA ,Data" else hgroup.long 0x2C++0x03 hide.long 0x00 "DATA_BUFFER,I2C1 Data Buffer Register" in endif group.long 0x30++0x03 line.long 0x00 "MASK0,I2C1 Mask Register 0" bitfld.long 0x00 7. " MASK[7:0] ,Mask bit 7" "0,1" bitfld.long 0x00 6. ",Mask bit 6" "0,1" bitfld.long 0x00 5. ",Mask bit 6" "0,1" bitfld.long 0x00 4. ",Mask bit 4" "0,1" bitfld.long 0x00 3. ",Mask bit 3" "0,1" bitfld.long 0x00 2. ",Mask bit 2" "0,1" bitfld.long 0x00 1. ",Mask bit 1" "0,1" group.long 0x34++0x03 line.long 0x00 "MASK1,I2C1 Mask Register 1" bitfld.long 0x00 7. " MASK[7:0] ,Mask bit 7" "0,1" bitfld.long 0x00 6. ",Mask bit 6" "0,1" bitfld.long 0x00 5. ",Mask bit 6" "0,1" bitfld.long 0x00 4. ",Mask bit 4" "0,1" bitfld.long 0x00 3. ",Mask bit 3" "0,1" bitfld.long 0x00 2. ",Mask bit 2" "0,1" bitfld.long 0x00 1. ",Mask bit 1" "0,1" group.long 0x38++0x03 line.long 0x00 "MASK2,I2C1 Mask Register 2" bitfld.long 0x00 7. " MASK[7:0] ,Mask bit 7" "0,1" bitfld.long 0x00 6. ",Mask bit 6" "0,1" bitfld.long 0x00 5. ",Mask bit 6" "0,1" bitfld.long 0x00 4. ",Mask bit 4" "0,1" bitfld.long 0x00 3. ",Mask bit 3" "0,1" bitfld.long 0x00 2. ",Mask bit 2" "0,1" bitfld.long 0x00 1. ",Mask bit 1" "0,1" group.long 0x3C++0x03 line.long 0x00 "MASK3,I2C1 Mask Register 3" bitfld.long 0x00 7. " MASK[7:0] ,Mask bit 7" "0,1" bitfld.long 0x00 6. ",Mask bit 6" "0,1" bitfld.long 0x00 5. ",Mask bit 6" "0,1" bitfld.long 0x00 4. ",Mask bit 4" "0,1" bitfld.long 0x00 3. ",Mask bit 3" "0,1" bitfld.long 0x00 2. ",Mask bit 2" "0,1" bitfld.long 0x00 1. ",Mask bit 1" "0,1" width 0x0B tree.end tree "I2C 2" base ad:0x400A0000 width 18. group.long 0x00++0x03 line.long 0x00 "CON,I2C2 Control Register" setclrfld.long 0x00 6. 0x00 6. 0x18 6. " I2EN_set/clr ,I2C interface enable" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x18 5. " STA_set/clr ,START flag" "Not started,Started" bitfld.long 0x00 4. " STO ,STOP flag" "No effect,Stop" setclrfld.long 0x00 3. 0x00 3. 0x18 3. " SI_set/clr ,I2C interrupt flag" "Not occurred,Occurred" newline setclrfld.long 0x00 2. 0x00 2. 0x18 2. " AA_set/clr ,Assert acknowledge flag" "Not asserted,Asserted" rgroup.long 0x04++0x03 line.long 0x00 "STAT,I2C2 Status Register" bitfld.long 0x00 3.--7. " STATUS ,Actual status information about I2C interface" "Bus error/undefined,START transmitted,Repeated START transmitted,SLA+W transmitted/ACK,SLA+W transmitted/NOT ACK,I2DAT transmitted/ACK,I2DAT transmitted/NOT ACK,Arbitration lost SLA+R/W/Data/NOT ACK,SLA+R transmitted/ACK,SLA+R transmitted/NOT ACK,Data received/ACK,Data received/NOT ACK,Own SLA+W received/ACK,Arbitration lost SLA+R/W/Own SLA+W received/ACK,GCA (0x00) received/ACK,Arbitration lost SLA+R/W/GCA received/ACK,Own SLV/DATA received/ACK,Own SLA/DATA received/NOT ACK,General Call/DATA received/ACK,General Call/DATA received/NOT ACK,STOP/repeated START received SLV/REC/SLV/TRX,Own SLA+R received/ACK,Arbitration lost SLA+R/W/Own SLA+R received/ACK,I2DAT transmitted/ACK,I2DAT transmitted/NOT ACK,Last I2DAT transmitted/ACK,,,,,,No information/SI = 0" newline group.long 0x08++0x0F line.long 0x00 "DAT,I2C2 Data Register" hexmask.long.byte 0x00 0.--7. 1. " DATA ,Data" line.long 0x04 "ADR0,I2C2 Slave Address Register 0" hexmask.long.byte 0x04 1.--7. 0x02 " ADDRESS ,Slave mode address" bitfld.long 0x04 0. " GC ,General call enable bit" "Disabled,Enabled" line.long 0x08 "SCLH,I2C2 SCL High Duty Cycle Register" hexmask.long.word 0x08 0.--15. 1. " SCLH ,Count for SCL HIGH time period selection" line.long 0x0C "SCLL,I2C2 SCL Low Duty Cycle Register" hexmask.long.word 0x0C 0.--15. 1. " SCLL ,Count for SCL LOW time period selection" group.long 0x1C++0x03 line.long 0x00 "MMCTRL,I2C2 Monitor Mode Control Register" sif cpuis("LPC1311")||cpuis("LPC1313")||cpuis("LPC1342")||cpuis("LPC1343")||cpuis("EM773")||cpuis("LPC11A02")||cpuis("LPC11A04")||cpuis("LPC11A11")||cpuis("LPC11A12")||cpuis("LPC11A13")||cpuis("LPC11A14") bitfld.long 0x00 3. " MATCH_ALL ,Select interrupt register match" "Match address,Any address" else bitfld.long 0x00 2. " MATCH_ALL ,Select interrupt register match" "Match address,Any address" endif bitfld.long 0x00 1. " ENA_SCL ,SCL output enable" "Disabled,Enabled" bitfld.long 0x00 0. " MM_ENA ,Monitor mode enable" "Disabled,Enabled" group.long 0x20++0x03 line.long 0x00 "ADR1,I2C2 Slave Address Register 1" hexmask.long.byte 0x00 1.--7. 0x02 " ADDRESS ,The I2C device address for slave mode" bitfld.long 0x00 0. " GC ,General call bit enable" "Disabled,Enabled" group.long 0x24++0x03 line.long 0x00 "ADR2,I2C2 Slave Address Register 2" hexmask.long.byte 0x00 1.--7. 0x02 " ADDRESS ,The I2C device address for slave mode" bitfld.long 0x00 0. " GC ,General call bit enable" "Disabled,Enabled" group.long 0x28++0x03 line.long 0x00 "ADR3,I2C2 Slave Address Register 3" hexmask.long.byte 0x00 1.--7. 0x02 " ADDRESS ,The I2C device address for slave mode" bitfld.long 0x00 0. " GC ,General call bit enable" "Disabled,Enabled" sif cpuis("LPC4072FBD80")||cpuis("LPC4072FET80")||cpuis("LPC4074FBD144")||cpuis("LPC4076FBD144")||cpuis("LPC4076FET180")||cpuis("LPC4078FBD100")||cpuis("LPC4078FBD144")||cpuis("LPC4078FBD208")||cpuis("LPC4078FBD80")||cpuis("LPC4078FET180")||cpuis("LPC4078FET208")||(cpu()=="LPC4088FBD144")||cpuis("LPC4088FBD208")||cpuis("LPC4088FET180")||cpuis("LPC4088FET208")||cpuis("LPC11E*") group.long 0x2C++0x03 line.long 0x00 "DATA_BUFFER,I2C2 Data Buffer Register" hexmask.long.byte 0x00 0.--7. 1. " DATA ,Data" elif cpuis("LPC111*")||cpuis("LPC11*LV")||cpuis("LPC110*")||cpuis("LPC112*") rgroup.long 0x2C++0x03 line.long 0x00 "DATA_BUFFER,I2C2 Data Buffer Register" hexmask.long.byte 0x00 0.--7. 1. " DATA ,Data" else hgroup.long 0x2C++0x03 hide.long 0x00 "DATA_BUFFER,I2C2 Data Buffer Register" in endif group.long 0x30++0x03 line.long 0x00 "MASK0,I2C2 Mask Register 0" bitfld.long 0x00 7. " MASK[7:0] ,Mask bit 7" "0,1" bitfld.long 0x00 6. ",Mask bit 6" "0,1" bitfld.long 0x00 5. ",Mask bit 6" "0,1" bitfld.long 0x00 4. ",Mask bit 4" "0,1" bitfld.long 0x00 3. ",Mask bit 3" "0,1" bitfld.long 0x00 2. ",Mask bit 2" "0,1" bitfld.long 0x00 1. ",Mask bit 1" "0,1" group.long 0x34++0x03 line.long 0x00 "MASK1,I2C2 Mask Register 1" bitfld.long 0x00 7. " MASK[7:0] ,Mask bit 7" "0,1" bitfld.long 0x00 6. ",Mask bit 6" "0,1" bitfld.long 0x00 5. ",Mask bit 6" "0,1" bitfld.long 0x00 4. ",Mask bit 4" "0,1" bitfld.long 0x00 3. ",Mask bit 3" "0,1" bitfld.long 0x00 2. ",Mask bit 2" "0,1" bitfld.long 0x00 1. ",Mask bit 1" "0,1" group.long 0x38++0x03 line.long 0x00 "MASK2,I2C2 Mask Register 2" bitfld.long 0x00 7. " MASK[7:0] ,Mask bit 7" "0,1" bitfld.long 0x00 6. ",Mask bit 6" "0,1" bitfld.long 0x00 5. ",Mask bit 6" "0,1" bitfld.long 0x00 4. ",Mask bit 4" "0,1" bitfld.long 0x00 3. ",Mask bit 3" "0,1" bitfld.long 0x00 2. ",Mask bit 2" "0,1" bitfld.long 0x00 1. ",Mask bit 1" "0,1" group.long 0x3C++0x03 line.long 0x00 "MASK3,I2C2 Mask Register 3" bitfld.long 0x00 7. " MASK[7:0] ,Mask bit 7" "0,1" bitfld.long 0x00 6. ",Mask bit 6" "0,1" bitfld.long 0x00 5. ",Mask bit 6" "0,1" bitfld.long 0x00 4. ",Mask bit 4" "0,1" bitfld.long 0x00 3. ",Mask bit 3" "0,1" bitfld.long 0x00 2. ",Mask bit 2" "0,1" bitfld.long 0x00 1. ",Mask bit 1" "0,1" width 0x0B tree.end tree.end sif (cpu()!="LPC1751"&&cpu()!="LPC1752"&&cpu()!="LPC1754"&&cpu()!="LPC1764"&&cpu()!="LPC1772") tree "I2S (Inter-IC Sound)" base ad:0x400A8000 width 14. group.long 0x0++0x3 line.long 0x0 "I2SDAO,Digital Audio Output Register" bitfld.long 0x00 15. " MUTE ,The transmit channel sends only zeroes" "Not muted,Muted" hexmask.long.word 0x00 6.--14. 1. " WS_HALFPERIOD ,Word select half period minus 1" textline " " bitfld.long 0x00 5. " WS_SEL ,Master/Slave mode select" "Master,Slave" bitfld.long 0x00 4. " RESET ,Asynchronously reset the transmit channel and FIFO" "No reset,Reset" textline " " bitfld.long 0x00 3. " STOP ,Disables accesses on FIFOs/places the transmit channel in mute mode" "Not stopped,Stopped" bitfld.long 0x00 2. " MONO ,Data format select" "Stereo,Monaural" textline " " bitfld.long 0x00 0.--1. " WORDWIDTH ,Selects the number of bytes in data" "8 bit,16 bit,,32 bit" group.long 0x4++0x3 line.long 0x0 "I2SDAI,Digital Audio Input Register" hexmask.long.word 0x00 6.--14. 1. " WS_HALFPERIOD ,Word select half period minus 1" bitfld.long 0x00 5. " WS_SEL ,Master/Slave mode select" "Master,Slave" textline " " bitfld.long 0x00 4. " RESET ,Asynchronously reset the transmit channel and FIFO" "No reset,Reset" bitfld.long 0x00 3. " STOP ,Disables accesses on FIFOs/places the transmit channel in mute mode" "Not stopped,Stopped" textline " " bitfld.long 0x00 2. " MONO ,Data of monaural format" "Stereo,Monaural" bitfld.long 0x00 0.--1. " WORDWIDTH ,Selects the number of bytes in data" "8 bit,16 bit,,32 bit" wgroup.long 0x8++0x3 line.long 0x0 "I2STXFIFO,Transmit FIFO Register" sif (cpu()=="LPC4072FBD80")||(cpu()=="LPC4072FET80")||(cpu()=="LPC4074FBD144")||(cpu()=="LPC4076FBD144")||(cpu()=="LPC4076FET180")||(cpu()=="LPC4078FBD100")||(cpu()=="LPC4078FBD144")||(cpu()=="LPC4078FBD208")||(cpu()=="LPC4078FBD80")||(cpu()=="LPC4078FET180")||(cpu()=="LPC4078FET208")||(cpu()=="LPC4088FBD144")||(cpu()=="LPC4088FBD208")||(cpu()=="LPC4088FET180")||(cpu()=="LPC4088FET208") rgroup.long 0xC++0x3 line.long 0x0 "I2SRXFIFO,Receive FIFO Register" else hgroup.long 0xC++0x3 hide.long 0x0 "I2SRXFIFO,Receive FIFO Register" in endif rgroup.long 0x10++0x3 line.long 0x0 "I2SSTATE,Status Feedback Register" sif (cpu()=="LPC1774"||cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778"||cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788"||cpu()=="LPC1810"||cpu()=="LPC1820"||cpu()=="LPC1830"||cpu()=="LPC1850"||cpu()=="LPC1853"||cpu()=="LPC1857"||(cpu()=="LPC4072FBD80")||(cpu()=="LPC4072FET80")||(cpu()=="LPC4074FBD144")||(cpu()=="LPC4076FBD144")||(cpu()=="LPC4076FET180")||(cpu()=="LPC4078FBD100")||(cpu()=="LPC4078FBD144")||(cpu()=="LPC4078FBD208")||(cpu()=="LPC4078FBD80")||(cpu()=="LPC4078FET180")||(cpu()=="LPC4078FET208")||(cpu()=="LPC4088FBD144")||(cpu()=="LPC4088FBD208")||(cpu()=="LPC4088FET180")||(cpu()=="LPC4088FET208")||cpuis("LPC43*")) bitfld.long 0x00 16.--19. " TX_LEVEL ,Current level of the Transmit FIFO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " RX_LEVEL ,Current level of the Receive FIFO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else bitfld.long 0x00 16.--18. " TX_LEVEL ,Current level of the Transmit FIFO" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8.--10. " RX_LEVEL ,Current level of the Receive FIFO" "0,1,2,3,4,5,6,7" endif textline " " bitfld.long 0x00 2. " DMAREQ2 ,Presence of Receive or Transmit DMA Request 2" "Not requested,Requested" bitfld.long 0x00 1. " DMAREQ1 ,Presence of Receive or Transmit DMA Request 1" "Not requested,Requested" textline " " bitfld.long 0x00 0. " IRQ ,Presence of Receive Interrupt or Transmit Interrupt" "No interrupt,Interrupt" group.long 0x14++0x23 line.long 0x0 "I2SDMA1,DMA Configuration Register 1" sif (cpu()=="LPC1774"||cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778"||cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788"||cpu()=="LPC1810"||cpu()=="LPC1820"||cpu()=="LPC1830"||cpu()=="LPC1850"||cpu()=="LPC1853"||cpu()=="LPC1857"||(cpu()=="LPC4072FBD80")||(cpu()=="LPC4072FET80")||(cpu()=="LPC4074FBD144")||(cpu()=="LPC4076FBD144")||(cpu()=="LPC4076FET180")||(cpu()=="LPC4078FBD100")||(cpu()=="LPC4078FBD144")||(cpu()=="LPC4078FBD208")||(cpu()=="LPC4078FBD80")||(cpu()=="LPC4078FET180")||(cpu()=="LPC4078FET208")||(cpu()=="LPC4088FBD144")||(cpu()=="LPC4088FBD208")||(cpu()=="LPC4088FET180")||(cpu()=="LPC4088FET208")||cpuis("LPC43*")) bitfld.long 0x00 16.--19. " TX_DEPTH_DMA1 ,Set the FIFO level that triggers a transmit DMA request on DMA1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " RX_DEPTH_DMA1 ,FIFO level that triggers a receive DMA request on DMA1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else bitfld.long 0x00 16.--18. " TX_DEPTH_DMA1 ,Set the FIFO level that triggers a transmit DMA request on DMA1" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8.--10. " RX_DEPTH_DMA1 ,FIFO level that triggers a receive DMA request on DMA1" "0,1,2,3,4,5,6,7" endif textline " " bitfld.long 0x00 1. " TX_DMA1_ENABLE ,Enables DMA1 for I2S transmit" "Disabled,Enabled" bitfld.long 0x00 0. " RX_DMA1_ENABLE ,Enables DMA1 for I2S receive" "Disabled,Enabled" line.long 0x4 "I2SDMA2,DMA Configuration Register 2" sif (cpu()=="LPC1774"||cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778"||cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788"||cpu()=="LPC1810"||cpu()=="LPC1820"||cpu()=="LPC1830"||cpu()=="LPC1850"||cpu()=="LPC1853"||cpu()=="LPC1857"||(cpu()=="LPC4072FBD80")||(cpu()=="LPC4072FET80")||(cpu()=="LPC4074FBD144")||(cpu()=="LPC4076FBD144")||(cpu()=="LPC4076FET180")||(cpu()=="LPC4078FBD100")||(cpu()=="LPC4078FBD144")||(cpu()=="LPC4078FBD208")||(cpu()=="LPC4078FBD80")||(cpu()=="LPC4078FET180")||(cpu()=="LPC4078FET208")||(cpu()=="LPC4088FBD144")||(cpu()=="LPC4088FBD208")||(cpu()=="LPC4088FET180")||(cpu()=="LPC4088FET208")||cpuis("LPC43*")) bitfld.long 0x04 16.--19. " TX_DEPTH_DMA2 ,FIFO level that triggers a transmit DMA request on DMA2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 8.--11. " RX_DEPTH_DMA2 ,FIFO level that triggers a receive DMA request on DMA2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else bitfld.long 0x04 16.--18. " TX_DEPTH_DMA2 ,FIFO level that triggers a transmit DMA request on DMA2" "0,1,2,3,4,5,6,7" bitfld.long 0x04 8.--10. " RX_DEPTH_DMA2 ,FIFO level that triggers a receive DMA request on DMA2" "0,1,2,3,4,5,6,7" endif textline " " bitfld.long 0x04 1. " TX_DMA2_ENABLE ,Enables DMA2 for I2S transmit" "Disabled,Enabled" bitfld.long 0x04 0. " RX_DMA2_ENABLE ,Enables DMA2 for I2S receive" "Disabled,Enabled" line.long 0x8 "I2SIRQ,Interrupt Request Control Register" sif (cpu()=="LPC1774"||cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778"||cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788"||cpu()=="LPC1810"||cpu()=="LPC1820"||cpu()=="LPC1830"||cpu()=="LPC1850"||cpu()=="LPC1853"||cpu()=="LPC1857"||(cpu()=="LPC4072FBD80")||(cpu()=="LPC4072FET80")||(cpu()=="LPC4074FBD144")||(cpu()=="LPC4076FBD144")||(cpu()=="LPC4076FET180")||(cpu()=="LPC4078FBD100")||(cpu()=="LPC4078FBD144")||(cpu()=="LPC4078FBD208")||(cpu()=="LPC4078FBD80")||(cpu()=="LPC4078FET180")||(cpu()=="LPC4078FET208")||(cpu()=="LPC4088FBD144")||(cpu()=="LPC4088FBD208")||(cpu()=="LPC4088FET180")||(cpu()=="LPC4088FET208")||cpuis("LPC43*")) bitfld.long 0x08 16.--19. " TX_DEPTH_IRQ ,FIFO level on which to create an irq request" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 8.--11. " RX_DEPTH_IRQ ,FIFO level on which to create an irq request" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else bitfld.long 0x08 16.--18. " TX_DEPTH_IRQ ,FIFO level on which to create an irq request" "0,1,2,3,4,5,6,7" bitfld.long 0x08 8.--10. " RX_DEPTH_IRQ ,FIFO level on which to create an irq request" "0,1,2,3,4,5,6,7" endif textline " " bitfld.long 0x08 1. " TX_IRQ_ENABLE ,Enables I2S transmit interrupt" "Disabled,Enabled" bitfld.long 0x08 0. " RX_IRQ_ENABLE ,Enables I2S receive interrupt" "Disabled,Enabled" line.long 0x0c "I2STXRATE,Transmit bit (Clock) rate divider Register" hexmask.long.byte 0x0c 8.--15. 1. " X_DIVIDER ,I2S transmit bit rate numerator" hexmask.long.byte 0x0c 0.--7. 1. " Y_DIVIDER ,I2S transmit bit rate denominator" line.long 0x10 "I2SRXRATE,Receive bit (Clock) rate divider Register" hexmask.long.byte 0x10 8.--15. 1. " X_DIVIDER ,I2S receive bit rate numerator" hexmask.long.byte 0x10 0.--7. 1. " Y_DIVIDER ,I2S receive bit rate denominator" line.long 0x14 "I2STXBITRATE,Transmit Clock Bit Rate Register" bitfld.long 0x14 0.--5. " TX_BITRATE ,I2S transmit bit rate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x18 "I2SRXBITRATE,Receive Clock Bit Rate Register" bitfld.long 0x18 0.--5. " RX_BITRATE ,I2S receive bit rate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x1c "I2STXMODE,Transmit Mode Control Register" bitfld.long 0x1c 3. " TXMCENA ,TX_MCLK output enable" "Disabled,Enabled" bitfld.long 0x1c 2. " TX4PIN ,Transmit 4-pin mode" "Disabled,Enabled" textline " " bitfld.long 0x1c 0.--1. " TXCLKSEL ,Clock source selection for the transmit bit clock divider" "TX fract. rate divider clk,,RX_MCLK,?..." line.long 0x20 "I2SRXMODE,Receive Mode Control Register" bitfld.long 0x20 3. " RXMCENA ,RX_MCLK output enable" "Disabled,Enabled" bitfld.long 0x20 2. " RX4PIN ,Receive 4-pin mode" "Disabled,Enabled" textline " " bitfld.long 0x20 0.--1. " RXCLKSEL ,Clock source selection for the receive bit clock divider" "RX fract. rate divider clk,,TX_MCLK,?..." width 0xb tree.end endif tree "Timer" tree "Timer 0" base ad:0x40004000 width 8. group.long 0x00++0x03 line.long 0x00 "T0IR,Timer0 Interrupt Register" sif (cpu()=="LPC4072FBD80")||(cpu()=="LPC4072FET80")||(cpu()=="LPC4074FBD144")||(cpu()=="LPC4076FBD144")||(cpu()=="LPC4076FET180")||(cpu()=="LPC4078FBD100")||(cpu()=="LPC4078FBD144")||(cpu()=="LPC4078FBD208")||(cpu()=="LPC4078FBD80")||(cpu()=="LPC4078FET180")||(cpu()=="LPC4078FET208")||(cpu()=="LPC4088FBD144")||(cpu()=="LPC4088FBD208")||(cpu()=="LPC4088FET180")||(cpu()=="LPC4088FET208") eventfld.long 0x00 5. " CR1INTERRUPT ,Interrupt flag for capture channel 1 event" "Not occurred,Occurred" eventfld.long 0x00 4. " CR0INTERRUPT ,Interrupt flag for capture channel 0 event" "Not occurred,Occurred" textline " " eventfld.long 0x00 3. " MR3INTERRUPT ,Interrupt flag for match channel 3" "Not occurred,Occurred" eventfld.long 0x00 2. " MR2INTERRUPT ,Interrupt flag for match channel 2" "Not occurred,Occurred" textline " " eventfld.long 0x00 1. " MR1INTERRUPT ,Interrupt flag for match channel 1" "Not occurred,Occurred" eventfld.long 0x00 0. " MR0INTERRUPT ,Interrupt flag for match channel 0" "Not occurred,Occurred" else eventfld.long 0x00 7. " CR3INTERRUPT ,Interrupt flag for capture channel 3 event" "Not occurred,Occurred" eventfld.long 0x00 6. " CR2INTERRUPT ,Interrupt flag for capture channel 2 event" "Not occurred,Occurred" textline " " eventfld.long 0x00 5. " CR1INTERRUPT ,Interrupt flag for capture channel 1 event" "Not occurred,Occurred" eventfld.long 0x00 4. " CR0INTERRUPT ,Interrupt flag for capture channel 0 event" "Not occurred,Occurred" textline " " eventfld.long 0x00 3. " MR3INTERRUPT ,Interrupt flag for match channel 3" "Not occurred,Occurred" eventfld.long 0x00 2. " MR2INTERRUPT ,Interrupt flag for match channel 2" "Not occurred,Occurred" textline " " eventfld.long 0x00 1. " MR1INTERRUPT ,Interrupt flag for match channel 1" "Not occurred,Occurred" eventfld.long 0x00 0. " MR0INTERRUPT ,Interrupt flag for match channel 0" "Not occurred,Occurred" endif group.long 0x04++0x03 line.long 0x00 "T0TCR,Timer0 Timer Control Register" bitfld.long 0x00 1. " COUNTERRESET ,Counter Reset" "No reset,Reset" bitfld.long 0x00 0. " COUNTERENABLE ,Counter Enable" "Disabled,Enabled" if ((per.long(ad:0x40004000+0x70)&0x3)==0x0) group.long 0x70++0x3 line.long 0x00 "T0CTCR,Timer0 Count Control Register" bitfld.long 0x00 0.--1. " CTM ,Counter/Timer Mode" "Every rising PCLK edge,Incremented on rising edge,Incremented on falling edge,Incremented on both edges" else group.long 0x70++0x3 line.long 0x00 "T0CTCR,Timer0 Count Control Register" bitfld.long 0x00 0.--1. " CTM ,Counter/Timer Mode" "Every rising PCLK edge,Incremented on rising edge,Incremented on falling edge,Incremented on both edges" sif cpuis("LPC181*")||cpuis("LPC182*")||cpuis("LPC183*")||cpuis("LPC185*") bitfld.long 0x00 2.--3. " CIS ,Counter Input Select" "CAP0.0,CAP0.1,CAP0.2,CAP0.3" else bitfld.long 0x00 2.--3. " CIS ,Counter Input Select" "CAP0.0,CAP0.1,?..." endif endif group.long 0x08++0xb line.long 0x00 "T0TC,Timer0 Timer Counter Register" line.long 0x04 "T0PR,Timer0 Prescale Register" line.long 0x08 "T0PC,Timer0 Prescale Counter Register" group.long 0x18++0x0f line.long 0x00 "T0MR0,Timer0 Match Register 0" line.long 0x04 "T0MR1,Timer0 Match Register 1" line.long 0x08 "T0MR2,Timer0 Match Register 2" line.long 0x0C "T0MR3,Timer0 Match Register 3" group.long 0x14++0x03 line.long 0x00 "T0MCR,Timer0 Match Control Register" bitfld.long 0x00 11. " MR3S ,Stop on MR3" "Disabled,Enabled" bitfld.long 0x00 10. " MR3R ,Reset on MR3" "Disabled,Enabled" bitfld.long 0x00 9. " MR3I ,Interrupt on MR3" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " MR2S ,Stop on MR2" "Disabled,Enabled" bitfld.long 0x00 7. " MR2R ,Reset on MR2" "Disabled,Enabled" bitfld.long 0x00 6. " MR2I ,Interrupt on MR2" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " MR1S ,Stop on MR1" "Disabled,Enabled" bitfld.long 0x00 4. " MR1R ,Reset on MR1" "Disabled,Enabled" bitfld.long 0x00 3. " MR1I ,Interrupt on MR1" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " MR0S ,Stop on MR0" "Disabled,Enabled" bitfld.long 0x00 1. " MR0R ,Reset on MR0" "Disabled,Enabled" bitfld.long 0x00 0. " MR0I ,Interrupt on MR0" "Disabled,Enabled" sif (cpu()=="LPC1772"||cpu()=="LPC1774"||cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778"||cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788")||(cpu()=="LPC4072FBD80")||(cpu()=="LPC4072FET80")||(cpu()=="LPC4074FBD144")||(cpu()=="LPC4076FBD144")||(cpu()=="LPC4076FET180")||(cpu()=="LPC4078FBD100")||(cpu()=="LPC4078FBD144")||(cpu()=="LPC4078FBD208")||(cpu()=="LPC4078FBD80")||(cpu()=="LPC4078FET180")||(cpu()=="LPC4078FET208")||(cpu()=="LPC4088FBD144")||(cpu()=="LPC4088FBD208")||(cpu()=="LPC4088FET180")||(cpu()=="LPC4088FET208") rgroup.long 0x2C++0x07 line.long 0x00 "T0CR0,Timer0 Capture Register 0" line.long 0x04 "T0CR1,Timer0 Capture Register 1" else rgroup.long 0x2C++0x0F line.long 0x00 "T0CR0,Timer0 Capture Register 0" line.long 0x04 "T0CR1,Timer0 Capture Register 1" line.long 0x08 "T0CR2,Timer0 Capture Register 2" line.long 0x0C "T0CR3,Timer0 Capture Register 3" endif group.long 0x28++0x03 line.long 0x00 "T0CCR,Timer0 Capture Control Register" sif (cpuis("LPC181*")||cpuis("LPC182*")||cpuis("LPC183*")||cpuis("LPC185*")||cpu()=="LPC4310FBD144"||cpu()=="LPC4310FBD144-M0"||cpu()=="LPC4310FET100"||cpu()=="LPC4310FET100-M0"||cpu()=="LPC4320FBD100"||cpu()=="LPC4320FBD100-M0"||cpu()=="LPC4320FBD144"||cpu()=="LPC4320FBD144-M0"||cpu()=="LPC4320FET100"||cpu()=="LPC4320FET100-M0"||cpu()=="LPC4330FBD144"||cpu()=="LPC4330FBD144-M0"||cpu()=="LPC4330FET100"||cpu()=="LPC4330FET100-M0"||cpu()=="LPC4330FET180"||cpu()=="LPC4330FET180-M0"||cpu()=="LPC4330FET256"||cpu()=="LPC4330FET256-M0"||cpu()=="LPC4350FBD208"||cpu()=="LPC4350FBD208-M0"||cpu()=="LPC4350FET180"||cpu()=="LPC4350FET180-M0"||cpu()=="LPC4350FET256"||cpu()=="LPC4350FET256-M0"||cpu()=="LPC4333FBD144"||cpu()=="LPC4333FBD144-M0"||cpu()=="LPC4333FET100"||cpu()=="LPC4333FET100-M0"||cpu()=="LPC4333FET180"||cpu()=="LPC4333FET180-M0"||cpu()=="LPC4333FET256"||cpu()=="LPC4333FET256-M0"||cpu()=="LPC4337FBD144"||cpu()=="LPC4337FBD144-M0"||cpu()=="LPC4337FET100"||cpu()=="LPC4337FET100-M0"||cpu()=="LPC4337FET180"||cpu()=="LPC4337FET180-M0"||cpu()=="LPC4337FET256"||cpu()=="LPC4337FET256-M0"||cpu()=="LPC4353FBD208"||cpu()=="LPC4353FBD208-M0"||cpu()=="LPC4353FET180"||cpu()=="LPC4353FET180-M0"||cpu()=="LPC4353FET256"||cpu()=="LPC4353FET256-M0"||cpu()=="LPC4357FBD208"||cpu()=="LPC4357FBD208-M0"||cpu()=="LPC4357FET256"||cpu()=="LPC4357FET256-M0") bitfld.long 0x00 11. " CAP3I ,Interrupt on CAP0.3 event" "Disabled,Enabled" bitfld.long 0x00 10. " CAP3FE ,Capture on CAP0.3 falling edge" "Disabled,Enabled" bitfld.long 0x00 9. " CAP3RE ,Capture on CAP0.3 rising edge" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " CAP2I ,Interrupt on CAP0.2 event" "Disabled,Enabled" bitfld.long 0x00 7. " CAP2FE ,Capture on CAP0.2 falling edge" "Disabled,Enabled" bitfld.long 0x00 6. " CAP2RE ,Capture on CAP0.2 rising edge" "Disabled,Enabled" textline " " endif bitfld.long 0x00 5. " CAP1I ,Interrupt on CAP0.1 event" "Disabled,Enabled" bitfld.long 0x00 4. " CAP1FE ,Capture on CAP0.1 falling edge" "Disabled,Enabled" bitfld.long 0x00 3. " CAP1RE ,Capture on CAP0.1 rising edge" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " CAP0I ,Interrupt on CAP0.0 event" "Disabled,Enabled" bitfld.long 0x00 1. " CAP0FE ,Capture on CAP0.0 falling edge" "Disabled,Enabled" bitfld.long 0x00 0. " CAP0RE ,Capture on CAP0.0 rising edge" "Disabled,Enabled" group.long 0x3C++0x03 line.long 0x00 "T0EMR,Timer0 External Match Register" bitfld.long 0x00 10.--11. " EMC3 ,External Match Control 3" "No operation,Cleared,Set,Toggled" bitfld.long 0x00 8.--9. " EMC2 ,External Match Control 2" "No operation,Cleared,Set,Toggled" textline " " bitfld.long 0x00 6.--7. " EMC1 ,External Match Control 1" "No operation,Cleared,Set,Toggled" bitfld.long 0x00 4.--5. " EMC0 ,External Match Control 0" "No operation,Cleared,Set,Toggled" textline " " bitfld.long 0x00 3. " EM3 ,External Match 3" "Low,High" bitfld.long 0x00 2. " EM2 ,External Match 2" "Low,High" textline " " bitfld.long 0x00 1. " EM1 ,External Match 1" "Low,High" bitfld.long 0x00 0. " EM0 ,External Match 0" "Low,High" width 0x0B tree.end tree "Timer 1" base ad:0x40008000 width 8. group.long 0x00++0x03 line.long 0x00 "T1IR,Timer1 Interrupt Register" sif (cpu()=="LPC4072FBD80")||(cpu()=="LPC4072FET80")||(cpu()=="LPC4074FBD144")||(cpu()=="LPC4076FBD144")||(cpu()=="LPC4076FET180")||(cpu()=="LPC4078FBD100")||(cpu()=="LPC4078FBD144")||(cpu()=="LPC4078FBD208")||(cpu()=="LPC4078FBD80")||(cpu()=="LPC4078FET180")||(cpu()=="LPC4078FET208")||(cpu()=="LPC4088FBD144")||(cpu()=="LPC4088FBD208")||(cpu()=="LPC4088FET180")||(cpu()=="LPC4088FET208") eventfld.long 0x00 5. " CR1INTERRUPT ,Interrupt flag for capture channel 1 event" "Not occurred,Occurred" eventfld.long 0x00 4. " CR0INTERRUPT ,Interrupt flag for capture channel 0 event" "Not occurred,Occurred" textline " " eventfld.long 0x00 3. " MR3INTERRUPT ,Interrupt flag for match channel 3" "Not occurred,Occurred" eventfld.long 0x00 2. " MR2INTERRUPT ,Interrupt flag for match channel 2" "Not occurred,Occurred" textline " " eventfld.long 0x00 1. " MR1INTERRUPT ,Interrupt flag for match channel 1" "Not occurred,Occurred" eventfld.long 0x00 0. " MR0INTERRUPT ,Interrupt flag for match channel 0" "Not occurred,Occurred" else eventfld.long 0x00 7. " CR3INTERRUPT ,Interrupt flag for capture channel 3 event" "Not occurred,Occurred" eventfld.long 0x00 6. " CR2INTERRUPT ,Interrupt flag for capture channel 2 event" "Not occurred,Occurred" textline " " eventfld.long 0x00 5. " CR1INTERRUPT ,Interrupt flag for capture channel 1 event" "Not occurred,Occurred" eventfld.long 0x00 4. " CR0INTERRUPT ,Interrupt flag for capture channel 0 event" "Not occurred,Occurred" textline " " eventfld.long 0x00 3. " MR3INTERRUPT ,Interrupt flag for match channel 3" "Not occurred,Occurred" eventfld.long 0x00 2. " MR2INTERRUPT ,Interrupt flag for match channel 2" "Not occurred,Occurred" textline " " eventfld.long 0x00 1. " MR1INTERRUPT ,Interrupt flag for match channel 1" "Not occurred,Occurred" eventfld.long 0x00 0. " MR0INTERRUPT ,Interrupt flag for match channel 0" "Not occurred,Occurred" endif group.long 0x04++0x03 line.long 0x00 "T1TCR,Timer1 Timer Control Register" bitfld.long 0x00 1. " COUNTERRESET ,Counter Reset" "No reset,Reset" bitfld.long 0x00 0. " COUNTERENABLE ,Counter Enable" "Disabled,Enabled" if ((per.long(ad:0x40008000+0x70)&0x3)==0x0) group.long 0x70++0x3 line.long 0x00 "T1CTCR,Timer1 Count Control Register" bitfld.long 0x00 0.--1. " CTM ,Counter/Timer Mode" "Every rising PCLK edge,Incremented on rising edge,Incremented on falling edge,Incremented on both edges" else group.long 0x70++0x3 line.long 0x00 "T1CTCR,Timer1 Count Control Register" bitfld.long 0x00 0.--1. " CTM ,Counter/Timer Mode" "Every rising PCLK edge,Incremented on rising edge,Incremented on falling edge,Incremented on both edges" sif cpuis("LPC181*")||cpuis("LPC182*")||cpuis("LPC183*")||cpuis("LPC185*") bitfld.long 0x00 2.--3. " CIS ,Counter Input Select" "CAP1.0,CAP1.1,CAP1.2,CAP1.3" else bitfld.long 0x00 2.--3. " CIS ,Counter Input Select" "CAP1.0,CAP1.1,?..." endif endif group.long 0x08++0xb line.long 0x00 "T1TC,Timer1 Timer Counter Register" line.long 0x04 "T1PR,Timer1 Prescale Register" line.long 0x08 "T1PC,Timer1 Prescale Counter Register" group.long 0x18++0x0f line.long 0x00 "T1MR0,Timer1 Match Register 0" line.long 0x04 "T1MR1,Timer1 Match Register 1" line.long 0x08 "T1MR2,Timer1 Match Register 2" line.long 0x0C "T1MR3,Timer1 Match Register 3" group.long 0x14++0x03 line.long 0x00 "T1MCR,Timer1 Match Control Register" bitfld.long 0x00 11. " MR3S ,Stop on MR3" "Disabled,Enabled" bitfld.long 0x00 10. " MR3R ,Reset on MR3" "Disabled,Enabled" bitfld.long 0x00 9. " MR3I ,Interrupt on MR3" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " MR2S ,Stop on MR2" "Disabled,Enabled" bitfld.long 0x00 7. " MR2R ,Reset on MR2" "Disabled,Enabled" bitfld.long 0x00 6. " MR2I ,Interrupt on MR2" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " MR1S ,Stop on MR1" "Disabled,Enabled" bitfld.long 0x00 4. " MR1R ,Reset on MR1" "Disabled,Enabled" bitfld.long 0x00 3. " MR1I ,Interrupt on MR1" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " MR0S ,Stop on MR0" "Disabled,Enabled" bitfld.long 0x00 1. " MR0R ,Reset on MR0" "Disabled,Enabled" bitfld.long 0x00 0. " MR0I ,Interrupt on MR0" "Disabled,Enabled" sif (cpu()=="LPC1772"||cpu()=="LPC1774"||cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778"||cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788")||(cpu()=="LPC4072FBD80")||(cpu()=="LPC4072FET80")||(cpu()=="LPC4074FBD144")||(cpu()=="LPC4076FBD144")||(cpu()=="LPC4076FET180")||(cpu()=="LPC4078FBD100")||(cpu()=="LPC4078FBD144")||(cpu()=="LPC4078FBD208")||(cpu()=="LPC4078FBD80")||(cpu()=="LPC4078FET180")||(cpu()=="LPC4078FET208")||(cpu()=="LPC4088FBD144")||(cpu()=="LPC4088FBD208")||(cpu()=="LPC4088FET180")||(cpu()=="LPC4088FET208") rgroup.long 0x2C++0x07 line.long 0x00 "T1CR0,Timer1 Capture Register 0" line.long 0x04 "T1CR1,Timer1 Capture Register 1" else rgroup.long 0x2C++0x0F line.long 0x00 "T1CR0,Timer1 Capture Register 0" line.long 0x04 "T1CR1,Timer1 Capture Register 1" line.long 0x08 "T1CR2,Timer1 Capture Register 2" line.long 0x0C "T1CR3,Timer1 Capture Register 3" endif group.long 0x28++0x03 line.long 0x00 "T1CCR,Timer1 Capture Control Register" sif (cpuis("LPC181*")||cpuis("LPC182*")||cpuis("LPC183*")||cpuis("LPC185*")||cpu()=="LPC4310FBD144"||cpu()=="LPC4310FBD144-M0"||cpu()=="LPC4310FET100"||cpu()=="LPC4310FET100-M0"||cpu()=="LPC4320FBD100"||cpu()=="LPC4320FBD100-M0"||cpu()=="LPC4320FBD144"||cpu()=="LPC4320FBD144-M0"||cpu()=="LPC4320FET100"||cpu()=="LPC4320FET100-M0"||cpu()=="LPC4330FBD144"||cpu()=="LPC4330FBD144-M0"||cpu()=="LPC4330FET100"||cpu()=="LPC4330FET100-M0"||cpu()=="LPC4330FET180"||cpu()=="LPC4330FET180-M0"||cpu()=="LPC4330FET256"||cpu()=="LPC4330FET256-M0"||cpu()=="LPC4350FBD208"||cpu()=="LPC4350FBD208-M0"||cpu()=="LPC4350FET180"||cpu()=="LPC4350FET180-M0"||cpu()=="LPC4350FET256"||cpu()=="LPC4350FET256-M0"||cpu()=="LPC4333FBD144"||cpu()=="LPC4333FBD144-M0"||cpu()=="LPC4333FET100"||cpu()=="LPC4333FET100-M0"||cpu()=="LPC4333FET180"||cpu()=="LPC4333FET180-M0"||cpu()=="LPC4333FET256"||cpu()=="LPC4333FET256-M0"||cpu()=="LPC4337FBD144"||cpu()=="LPC4337FBD144-M0"||cpu()=="LPC4337FET100"||cpu()=="LPC4337FET100-M0"||cpu()=="LPC4337FET180"||cpu()=="LPC4337FET180-M0"||cpu()=="LPC4337FET256"||cpu()=="LPC4337FET256-M0"||cpu()=="LPC4353FBD208"||cpu()=="LPC4353FBD208-M0"||cpu()=="LPC4353FET180"||cpu()=="LPC4353FET180-M0"||cpu()=="LPC4353FET256"||cpu()=="LPC4353FET256-M0"||cpu()=="LPC4357FBD208"||cpu()=="LPC4357FBD208-M0"||cpu()=="LPC4357FET256"||cpu()=="LPC4357FET256-M0") bitfld.long 0x00 11. " CAP3I ,Interrupt on CAP1.3 event" "Disabled,Enabled" bitfld.long 0x00 10. " CAP3FE ,Capture on CAP1.3 falling edge" "Disabled,Enabled" bitfld.long 0x00 9. " CAP3RE ,Capture on CAP1.3 rising edge" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " CAP2I ,Interrupt on CAP1.2 event" "Disabled,Enabled" bitfld.long 0x00 7. " CAP2FE ,Capture on CAP1.2 falling edge" "Disabled,Enabled" bitfld.long 0x00 6. " CAP2RE ,Capture on CAP1.2 rising edge" "Disabled,Enabled" textline " " endif bitfld.long 0x00 5. " CAP1I ,Interrupt on CAP1.1 event" "Disabled,Enabled" bitfld.long 0x00 4. " CAP1FE ,Capture on CAP1.1 falling edge" "Disabled,Enabled" bitfld.long 0x00 3. " CAP1RE ,Capture on CAP1.1 rising edge" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " CAP0I ,Interrupt on CAP1.0 event" "Disabled,Enabled" bitfld.long 0x00 1. " CAP0FE ,Capture on CAP1.0 falling edge" "Disabled,Enabled" bitfld.long 0x00 0. " CAP0RE ,Capture on CAP1.0 rising edge" "Disabled,Enabled" group.long 0x3C++0x03 line.long 0x00 "T1EMR,Timer1 External Match Register" bitfld.long 0x00 10.--11. " EMC3 ,External Match Control 3" "No operation,Cleared,Set,Toggled" bitfld.long 0x00 8.--9. " EMC2 ,External Match Control 2" "No operation,Cleared,Set,Toggled" textline " " bitfld.long 0x00 6.--7. " EMC1 ,External Match Control 1" "No operation,Cleared,Set,Toggled" bitfld.long 0x00 4.--5. " EMC0 ,External Match Control 0" "No operation,Cleared,Set,Toggled" textline " " bitfld.long 0x00 3. " EM3 ,External Match 3" "Low,High" bitfld.long 0x00 2. " EM2 ,External Match 2" "Low,High" textline " " bitfld.long 0x00 1. " EM1 ,External Match 1" "Low,High" bitfld.long 0x00 0. " EM0 ,External Match 0" "Low,High" width 0x0B tree.end tree "Timer 2" base ad:0x40090000 width 8. group.long 0x00++0x03 line.long 0x00 "T2IR,Timer2 Interrupt Register" sif (cpu()=="LPC4072FBD80")||(cpu()=="LPC4072FET80")||(cpu()=="LPC4074FBD144")||(cpu()=="LPC4076FBD144")||(cpu()=="LPC4076FET180")||(cpu()=="LPC4078FBD100")||(cpu()=="LPC4078FBD144")||(cpu()=="LPC4078FBD208")||(cpu()=="LPC4078FBD80")||(cpu()=="LPC4078FET180")||(cpu()=="LPC4078FET208")||(cpu()=="LPC4088FBD144")||(cpu()=="LPC4088FBD208")||(cpu()=="LPC4088FET180")||(cpu()=="LPC4088FET208") eventfld.long 0x00 5. " CR1INTERRUPT ,Interrupt flag for capture channel 1 event" "Not occurred,Occurred" eventfld.long 0x00 4. " CR0INTERRUPT ,Interrupt flag for capture channel 0 event" "Not occurred,Occurred" textline " " eventfld.long 0x00 3. " MR3INTERRUPT ,Interrupt flag for match channel 3" "Not occurred,Occurred" eventfld.long 0x00 2. " MR2INTERRUPT ,Interrupt flag for match channel 2" "Not occurred,Occurred" textline " " eventfld.long 0x00 1. " MR1INTERRUPT ,Interrupt flag for match channel 1" "Not occurred,Occurred" eventfld.long 0x00 0. " MR0INTERRUPT ,Interrupt flag for match channel 0" "Not occurred,Occurred" else eventfld.long 0x00 7. " CR3INTERRUPT ,Interrupt flag for capture channel 3 event" "Not occurred,Occurred" eventfld.long 0x00 6. " CR2INTERRUPT ,Interrupt flag for capture channel 2 event" "Not occurred,Occurred" textline " " eventfld.long 0x00 5. " CR1INTERRUPT ,Interrupt flag for capture channel 1 event" "Not occurred,Occurred" eventfld.long 0x00 4. " CR0INTERRUPT ,Interrupt flag for capture channel 0 event" "Not occurred,Occurred" textline " " eventfld.long 0x00 3. " MR3INTERRUPT ,Interrupt flag for match channel 3" "Not occurred,Occurred" eventfld.long 0x00 2. " MR2INTERRUPT ,Interrupt flag for match channel 2" "Not occurred,Occurred" textline " " eventfld.long 0x00 1. " MR1INTERRUPT ,Interrupt flag for match channel 1" "Not occurred,Occurred" eventfld.long 0x00 0. " MR0INTERRUPT ,Interrupt flag for match channel 0" "Not occurred,Occurred" endif group.long 0x04++0x03 line.long 0x00 "T2TCR,Timer2 Timer Control Register" bitfld.long 0x00 1. " COUNTERRESET ,Counter Reset" "No reset,Reset" bitfld.long 0x00 0. " COUNTERENABLE ,Counter Enable" "Disabled,Enabled" if ((per.long(ad:0x40090000+0x70)&0x3)==0x0) group.long 0x70++0x3 line.long 0x00 "T2CTCR,Timer2 Count Control Register" bitfld.long 0x00 0.--1. " CTM ,Counter/Timer Mode" "Every rising PCLK edge,Incremented on rising edge,Incremented on falling edge,Incremented on both edges" else group.long 0x70++0x3 line.long 0x00 "T2CTCR,Timer2 Count Control Register" bitfld.long 0x00 0.--1. " CTM ,Counter/Timer Mode" "Every rising PCLK edge,Incremented on rising edge,Incremented on falling edge,Incremented on both edges" sif cpuis("LPC181*")||cpuis("LPC182*")||cpuis("LPC183*")||cpuis("LPC185*") bitfld.long 0x00 2.--3. " CIS ,Counter Input Select" "CAP2.0,CAP2.1,CAP2.2,CAP2.3" else bitfld.long 0x00 2.--3. " CIS ,Counter Input Select" "CAP2.0,CAP2.1,?..." endif endif group.long 0x08++0xb line.long 0x00 "T2TC,Timer2 Timer Counter Register" line.long 0x04 "T2PR,Timer2 Prescale Register" line.long 0x08 "T2PC,Timer2 Prescale Counter Register" group.long 0x18++0x0f line.long 0x00 "T2MR0,Timer2 Match Register 0" line.long 0x04 "T2MR1,Timer2 Match Register 1" line.long 0x08 "T2MR2,Timer2 Match Register 2" line.long 0x0C "T2MR3,Timer2 Match Register 3" group.long 0x14++0x03 line.long 0x00 "T2MCR,Timer2 Match Control Register" bitfld.long 0x00 11. " MR3S ,Stop on MR3" "Disabled,Enabled" bitfld.long 0x00 10. " MR3R ,Reset on MR3" "Disabled,Enabled" bitfld.long 0x00 9. " MR3I ,Interrupt on MR3" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " MR2S ,Stop on MR2" "Disabled,Enabled" bitfld.long 0x00 7. " MR2R ,Reset on MR2" "Disabled,Enabled" bitfld.long 0x00 6. " MR2I ,Interrupt on MR2" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " MR1S ,Stop on MR1" "Disabled,Enabled" bitfld.long 0x00 4. " MR1R ,Reset on MR1" "Disabled,Enabled" bitfld.long 0x00 3. " MR1I ,Interrupt on MR1" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " MR0S ,Stop on MR0" "Disabled,Enabled" bitfld.long 0x00 1. " MR0R ,Reset on MR0" "Disabled,Enabled" bitfld.long 0x00 0. " MR0I ,Interrupt on MR0" "Disabled,Enabled" sif (cpu()=="LPC1772"||cpu()=="LPC1774"||cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778"||cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788")||(cpu()=="LPC4072FBD80")||(cpu()=="LPC4072FET80")||(cpu()=="LPC4074FBD144")||(cpu()=="LPC4076FBD144")||(cpu()=="LPC4076FET180")||(cpu()=="LPC4078FBD100")||(cpu()=="LPC4078FBD144")||(cpu()=="LPC4078FBD208")||(cpu()=="LPC4078FBD80")||(cpu()=="LPC4078FET180")||(cpu()=="LPC4078FET208")||(cpu()=="LPC4088FBD144")||(cpu()=="LPC4088FBD208")||(cpu()=="LPC4088FET180")||(cpu()=="LPC4088FET208") rgroup.long 0x2C++0x07 line.long 0x00 "T2CR0,Timer2 Capture Register 0" line.long 0x04 "T2CR1,Timer2 Capture Register 1" else rgroup.long 0x2C++0x0F line.long 0x00 "T2CR0,Timer2 Capture Register 0" line.long 0x04 "T2CR1,Timer2 Capture Register 1" line.long 0x08 "T2CR2,Timer2 Capture Register 2" line.long 0x0C "T2CR3,Timer2 Capture Register 3" endif group.long 0x28++0x03 line.long 0x00 "T2CCR,Timer2 Capture Control Register" sif (cpuis("LPC181*")||cpuis("LPC182*")||cpuis("LPC183*")||cpuis("LPC185*")||cpu()=="LPC4310FBD144"||cpu()=="LPC4310FBD144-M0"||cpu()=="LPC4310FET100"||cpu()=="LPC4310FET100-M0"||cpu()=="LPC4320FBD100"||cpu()=="LPC4320FBD100-M0"||cpu()=="LPC4320FBD144"||cpu()=="LPC4320FBD144-M0"||cpu()=="LPC4320FET100"||cpu()=="LPC4320FET100-M0"||cpu()=="LPC4330FBD144"||cpu()=="LPC4330FBD144-M0"||cpu()=="LPC4330FET100"||cpu()=="LPC4330FET100-M0"||cpu()=="LPC4330FET180"||cpu()=="LPC4330FET180-M0"||cpu()=="LPC4330FET256"||cpu()=="LPC4330FET256-M0"||cpu()=="LPC4350FBD208"||cpu()=="LPC4350FBD208-M0"||cpu()=="LPC4350FET180"||cpu()=="LPC4350FET180-M0"||cpu()=="LPC4350FET256"||cpu()=="LPC4350FET256-M0"||cpu()=="LPC4333FBD144"||cpu()=="LPC4333FBD144-M0"||cpu()=="LPC4333FET100"||cpu()=="LPC4333FET100-M0"||cpu()=="LPC4333FET180"||cpu()=="LPC4333FET180-M0"||cpu()=="LPC4333FET256"||cpu()=="LPC4333FET256-M0"||cpu()=="LPC4337FBD144"||cpu()=="LPC4337FBD144-M0"||cpu()=="LPC4337FET100"||cpu()=="LPC4337FET100-M0"||cpu()=="LPC4337FET180"||cpu()=="LPC4337FET180-M0"||cpu()=="LPC4337FET256"||cpu()=="LPC4337FET256-M0"||cpu()=="LPC4353FBD208"||cpu()=="LPC4353FBD208-M0"||cpu()=="LPC4353FET180"||cpu()=="LPC4353FET180-M0"||cpu()=="LPC4353FET256"||cpu()=="LPC4353FET256-M0"||cpu()=="LPC4357FBD208"||cpu()=="LPC4357FBD208-M0"||cpu()=="LPC4357FET256"||cpu()=="LPC4357FET256-M0") bitfld.long 0x00 11. " CAP3I ,Interrupt on CAP2.3 event" "Disabled,Enabled" bitfld.long 0x00 10. " CAP3FE ,Capture on CAP2.3 falling edge" "Disabled,Enabled" bitfld.long 0x00 9. " CAP3RE ,Capture on CAP2.3 rising edge" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " CAP2I ,Interrupt on CAP2.2 event" "Disabled,Enabled" bitfld.long 0x00 7. " CAP2FE ,Capture on CAP2.2 falling edge" "Disabled,Enabled" bitfld.long 0x00 6. " CAP2RE ,Capture on CAP2.2 rising edge" "Disabled,Enabled" textline " " endif bitfld.long 0x00 5. " CAP1I ,Interrupt on CAP2.1 event" "Disabled,Enabled" bitfld.long 0x00 4. " CAP1FE ,Capture on CAP2.1 falling edge" "Disabled,Enabled" bitfld.long 0x00 3. " CAP1RE ,Capture on CAP2.1 rising edge" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " CAP0I ,Interrupt on CAP2.0 event" "Disabled,Enabled" bitfld.long 0x00 1. " CAP0FE ,Capture on CAP2.0 falling edge" "Disabled,Enabled" bitfld.long 0x00 0. " CAP0RE ,Capture on CAP2.0 rising edge" "Disabled,Enabled" group.long 0x3C++0x03 line.long 0x00 "T2EMR,Timer2 External Match Register" bitfld.long 0x00 10.--11. " EMC3 ,External Match Control 3" "No operation,Cleared,Set,Toggled" bitfld.long 0x00 8.--9. " EMC2 ,External Match Control 2" "No operation,Cleared,Set,Toggled" textline " " bitfld.long 0x00 6.--7. " EMC1 ,External Match Control 1" "No operation,Cleared,Set,Toggled" bitfld.long 0x00 4.--5. " EMC0 ,External Match Control 0" "No operation,Cleared,Set,Toggled" textline " " bitfld.long 0x00 3. " EM3 ,External Match 3" "Low,High" bitfld.long 0x00 2. " EM2 ,External Match 2" "Low,High" textline " " bitfld.long 0x00 1. " EM1 ,External Match 1" "Low,High" bitfld.long 0x00 0. " EM0 ,External Match 0" "Low,High" width 0x0B tree.end tree "Timer 3" base ad:0x40094000 width 8. group.long 0x00++0x03 line.long 0x00 "T3IR,Timer3 Interrupt Register" sif (cpu()=="LPC4072FBD80")||(cpu()=="LPC4072FET80")||(cpu()=="LPC4074FBD144")||(cpu()=="LPC4076FBD144")||(cpu()=="LPC4076FET180")||(cpu()=="LPC4078FBD100")||(cpu()=="LPC4078FBD144")||(cpu()=="LPC4078FBD208")||(cpu()=="LPC4078FBD80")||(cpu()=="LPC4078FET180")||(cpu()=="LPC4078FET208")||(cpu()=="LPC4088FBD144")||(cpu()=="LPC4088FBD208")||(cpu()=="LPC4088FET180")||(cpu()=="LPC4088FET208") eventfld.long 0x00 5. " CR1INTERRUPT ,Interrupt flag for capture channel 1 event" "Not occurred,Occurred" eventfld.long 0x00 4. " CR0INTERRUPT ,Interrupt flag for capture channel 0 event" "Not occurred,Occurred" textline " " eventfld.long 0x00 3. " MR3INTERRUPT ,Interrupt flag for match channel 3" "Not occurred,Occurred" eventfld.long 0x00 2. " MR2INTERRUPT ,Interrupt flag for match channel 2" "Not occurred,Occurred" textline " " eventfld.long 0x00 1. " MR1INTERRUPT ,Interrupt flag for match channel 1" "Not occurred,Occurred" eventfld.long 0x00 0. " MR0INTERRUPT ,Interrupt flag for match channel 0" "Not occurred,Occurred" else eventfld.long 0x00 7. " CR3INTERRUPT ,Interrupt flag for capture channel 3 event" "Not occurred,Occurred" eventfld.long 0x00 6. " CR2INTERRUPT ,Interrupt flag for capture channel 2 event" "Not occurred,Occurred" textline " " eventfld.long 0x00 5. " CR1INTERRUPT ,Interrupt flag for capture channel 1 event" "Not occurred,Occurred" eventfld.long 0x00 4. " CR0INTERRUPT ,Interrupt flag for capture channel 0 event" "Not occurred,Occurred" textline " " eventfld.long 0x00 3. " MR3INTERRUPT ,Interrupt flag for match channel 3" "Not occurred,Occurred" eventfld.long 0x00 2. " MR2INTERRUPT ,Interrupt flag for match channel 2" "Not occurred,Occurred" textline " " eventfld.long 0x00 1. " MR1INTERRUPT ,Interrupt flag for match channel 1" "Not occurred,Occurred" eventfld.long 0x00 0. " MR0INTERRUPT ,Interrupt flag for match channel 0" "Not occurred,Occurred" endif group.long 0x04++0x03 line.long 0x00 "T3TCR,Timer3 Timer Control Register" bitfld.long 0x00 1. " COUNTERRESET ,Counter Reset" "No reset,Reset" bitfld.long 0x00 0. " COUNTERENABLE ,Counter Enable" "Disabled,Enabled" if ((per.long(ad:0x40094000+0x70)&0x3)==0x0) group.long 0x70++0x3 line.long 0x00 "T3CTCR,Timer3 Count Control Register" bitfld.long 0x00 0.--1. " CTM ,Counter/Timer Mode" "Every rising PCLK edge,Incremented on rising edge,Incremented on falling edge,Incremented on both edges" else group.long 0x70++0x3 line.long 0x00 "T3CTCR,Timer3 Count Control Register" bitfld.long 0x00 0.--1. " CTM ,Counter/Timer Mode" "Every rising PCLK edge,Incremented on rising edge,Incremented on falling edge,Incremented on both edges" sif cpuis("LPC181*")||cpuis("LPC182*")||cpuis("LPC183*")||cpuis("LPC185*") bitfld.long 0x00 2.--3. " CIS ,Counter Input Select" "CAP3.0,CAP3.1,CAP3.2,CAP3.3" else bitfld.long 0x00 2.--3. " CIS ,Counter Input Select" "CAP3.0,CAP3.1,?..." endif endif group.long 0x08++0xb line.long 0x00 "T3TC,Timer3 Timer Counter Register" line.long 0x04 "T3PR,Timer3 Prescale Register" line.long 0x08 "T3PC,Timer3 Prescale Counter Register" group.long 0x18++0x0f line.long 0x00 "T3MR0,Timer3 Match Register 0" line.long 0x04 "T3MR1,Timer3 Match Register 1" line.long 0x08 "T3MR2,Timer3 Match Register 2" line.long 0x0C "T3MR3,Timer3 Match Register 3" group.long 0x14++0x03 line.long 0x00 "T3MCR,Timer3 Match Control Register" bitfld.long 0x00 11. " MR3S ,Stop on MR3" "Disabled,Enabled" bitfld.long 0x00 10. " MR3R ,Reset on MR3" "Disabled,Enabled" bitfld.long 0x00 9. " MR3I ,Interrupt on MR3" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " MR2S ,Stop on MR2" "Disabled,Enabled" bitfld.long 0x00 7. " MR2R ,Reset on MR2" "Disabled,Enabled" bitfld.long 0x00 6. " MR2I ,Interrupt on MR2" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " MR1S ,Stop on MR1" "Disabled,Enabled" bitfld.long 0x00 4. " MR1R ,Reset on MR1" "Disabled,Enabled" bitfld.long 0x00 3. " MR1I ,Interrupt on MR1" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " MR0S ,Stop on MR0" "Disabled,Enabled" bitfld.long 0x00 1. " MR0R ,Reset on MR0" "Disabled,Enabled" bitfld.long 0x00 0. " MR0I ,Interrupt on MR0" "Disabled,Enabled" sif (cpu()=="LPC1772"||cpu()=="LPC1774"||cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778"||cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788")||(cpu()=="LPC4072FBD80")||(cpu()=="LPC4072FET80")||(cpu()=="LPC4074FBD144")||(cpu()=="LPC4076FBD144")||(cpu()=="LPC4076FET180")||(cpu()=="LPC4078FBD100")||(cpu()=="LPC4078FBD144")||(cpu()=="LPC4078FBD208")||(cpu()=="LPC4078FBD80")||(cpu()=="LPC4078FET180")||(cpu()=="LPC4078FET208")||(cpu()=="LPC4088FBD144")||(cpu()=="LPC4088FBD208")||(cpu()=="LPC4088FET180")||(cpu()=="LPC4088FET208") rgroup.long 0x2C++0x07 line.long 0x00 "T3CR0,Timer3 Capture Register 0" line.long 0x04 "T3CR1,Timer3 Capture Register 1" else rgroup.long 0x2C++0x0F line.long 0x00 "T3CR0,Timer3 Capture Register 0" line.long 0x04 "T3CR1,Timer3 Capture Register 1" line.long 0x08 "T3CR2,Timer3 Capture Register 2" line.long 0x0C "T3CR3,Timer3 Capture Register 3" endif group.long 0x28++0x03 line.long 0x00 "T3CCR,Timer3 Capture Control Register" sif (cpuis("LPC181*")||cpuis("LPC182*")||cpuis("LPC183*")||cpuis("LPC185*")||cpu()=="LPC4310FBD144"||cpu()=="LPC4310FBD144-M0"||cpu()=="LPC4310FET100"||cpu()=="LPC4310FET100-M0"||cpu()=="LPC4320FBD100"||cpu()=="LPC4320FBD100-M0"||cpu()=="LPC4320FBD144"||cpu()=="LPC4320FBD144-M0"||cpu()=="LPC4320FET100"||cpu()=="LPC4320FET100-M0"||cpu()=="LPC4330FBD144"||cpu()=="LPC4330FBD144-M0"||cpu()=="LPC4330FET100"||cpu()=="LPC4330FET100-M0"||cpu()=="LPC4330FET180"||cpu()=="LPC4330FET180-M0"||cpu()=="LPC4330FET256"||cpu()=="LPC4330FET256-M0"||cpu()=="LPC4350FBD208"||cpu()=="LPC4350FBD208-M0"||cpu()=="LPC4350FET180"||cpu()=="LPC4350FET180-M0"||cpu()=="LPC4350FET256"||cpu()=="LPC4350FET256-M0"||cpu()=="LPC4333FBD144"||cpu()=="LPC4333FBD144-M0"||cpu()=="LPC4333FET100"||cpu()=="LPC4333FET100-M0"||cpu()=="LPC4333FET180"||cpu()=="LPC4333FET180-M0"||cpu()=="LPC4333FET256"||cpu()=="LPC4333FET256-M0"||cpu()=="LPC4337FBD144"||cpu()=="LPC4337FBD144-M0"||cpu()=="LPC4337FET100"||cpu()=="LPC4337FET100-M0"||cpu()=="LPC4337FET180"||cpu()=="LPC4337FET180-M0"||cpu()=="LPC4337FET256"||cpu()=="LPC4337FET256-M0"||cpu()=="LPC4353FBD208"||cpu()=="LPC4353FBD208-M0"||cpu()=="LPC4353FET180"||cpu()=="LPC4353FET180-M0"||cpu()=="LPC4353FET256"||cpu()=="LPC4353FET256-M0"||cpu()=="LPC4357FBD208"||cpu()=="LPC4357FBD208-M0"||cpu()=="LPC4357FET256"||cpu()=="LPC4357FET256-M0") bitfld.long 0x00 11. " CAP3I ,Interrupt on CAP3.3 event" "Disabled,Enabled" bitfld.long 0x00 10. " CAP3FE ,Capture on CAP3.3 falling edge" "Disabled,Enabled" bitfld.long 0x00 9. " CAP3RE ,Capture on CAP3.3 rising edge" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " CAP2I ,Interrupt on CAP3.2 event" "Disabled,Enabled" bitfld.long 0x00 7. " CAP2FE ,Capture on CAP3.2 falling edge" "Disabled,Enabled" bitfld.long 0x00 6. " CAP2RE ,Capture on CAP3.2 rising edge" "Disabled,Enabled" textline " " endif bitfld.long 0x00 5. " CAP1I ,Interrupt on CAP3.1 event" "Disabled,Enabled" bitfld.long 0x00 4. " CAP1FE ,Capture on CAP3.1 falling edge" "Disabled,Enabled" bitfld.long 0x00 3. " CAP1RE ,Capture on CAP3.1 rising edge" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " CAP0I ,Interrupt on CAP3.0 event" "Disabled,Enabled" bitfld.long 0x00 1. " CAP0FE ,Capture on CAP3.0 falling edge" "Disabled,Enabled" bitfld.long 0x00 0. " CAP0RE ,Capture on CAP3.0 rising edge" "Disabled,Enabled" group.long 0x3C++0x03 line.long 0x00 "T3EMR,Timer3 External Match Register" bitfld.long 0x00 10.--11. " EMC3 ,External Match Control 3" "No operation,Cleared,Set,Toggled" bitfld.long 0x00 8.--9. " EMC2 ,External Match Control 2" "No operation,Cleared,Set,Toggled" textline " " bitfld.long 0x00 6.--7. " EMC1 ,External Match Control 1" "No operation,Cleared,Set,Toggled" bitfld.long 0x00 4.--5. " EMC0 ,External Match Control 0" "No operation,Cleared,Set,Toggled" textline " " bitfld.long 0x00 3. " EM3 ,External Match 3" "Low,High" bitfld.long 0x00 2. " EM2 ,External Match 2" "Low,High" textline " " bitfld.long 0x00 1. " EM1 ,External Match 1" "Low,High" bitfld.long 0x00 0. " EM0 ,External Match 0" "Low,High" width 0x0B tree.end tree.end sif (cpu()!="LPC1772"&&cpu()!="LPC1774"&&cpu()!="LPC1776"&&cpu()!="LPC1777"&&cpu()!="LPC1778"&&cpu()!="LPC1785"&&cpu()!="LPC1786"&&cpu()!="LPC1787"&&cpu()!="LPC1788") tree "RIT (Repetitive Interrupt Timer)" base ad:0x400B0000 width 11. group.long 0x00++0xf line.long 0x00 "RICOMPVAL,Compare Register" line.long 0x04 "RIMASK,Mask Register" bitfld.long 0x04 31. " RIMASK_31 ,Forces compare on the 31 bit of the counter and compare register" "Not forced,Forced" bitfld.long 0x04 30. " RIMASK_30 ,Forces compare on the 30 bit of the counter and compare register" "Not forced,Forced" bitfld.long 0x04 29. " RIMASK_29 ,Forces compare on the 29 bit of the counter and compare register" "Not forced,Forced" bitfld.long 0x04 28. " RIMASK_28 ,Forces compare on the 28 bit of the counter and compare register" "Not forced,Forced" textline " " bitfld.long 0x04 27. " RIMASK_27 ,Forces compare on the 27 bit of the counter and compare register" "Not forced,Forced" bitfld.long 0x04 26. " RIMASK_26 ,Forces compare on the 26 bit of the counter and compare register" "Not forced,Forced" bitfld.long 0x04 25. " RIMASK_25 ,Forces compare on the 25 bit of the counter and compare register" "Not forced,Forced" bitfld.long 0x04 24. " RIMASK_24 ,Forces compare on the 24 bit of the counter and compare register" "Not forced,Forced" textline " " bitfld.long 0x04 23. " RIMASK_23 ,Forces compare on the 23 bit of the counter and compare register" "Not forced,Forced" bitfld.long 0x04 22. " RIMASK_22 ,Forces compare on the 22 bit of the counter and compare register" "Not forced,Forced" bitfld.long 0x04 21. " RIMASK_21 ,Forces compare on the 21 bit of the counter and compare register" "Not forced,Forced" bitfld.long 0x04 20. " RIMASK_20 ,Forces compare on the 20 bit of the counter and compare register" "Not forced,Forced" textline " " bitfld.long 0x04 19. " RIMASK_19 ,Forces compare on the 19 bit of the counter and compare register" "Not forced,Forced" bitfld.long 0x04 18. " RIMASK_18 ,Forces compare on the 18 bit of the counter and compare register" "Not forced,Forced" bitfld.long 0x04 17. " RIMASK_17 ,Forces compare on the 17 bit of the counter and compare register" "Not forced,Forced" bitfld.long 0x04 16. " RIMASK_16 ,Forces compare on the 16 bit of the counter and compare register" "Not forced,Forced" textline " " bitfld.long 0x04 15. " RIMASK_15 ,Forces compare on the 15 bit of the counter and compare register" "Not forced,Forced" bitfld.long 0x04 14. " RIMASK_14 ,Forces compare on the 14 bit of the counter and compare register" "Not forced,Forced" bitfld.long 0x04 13. " RIMASK_13 ,Forces compare on the 13 bit of the counter and compare register" "Not forced,Forced" bitfld.long 0x04 12. " RIMASK_12 ,Forces compare on the 12 bit of the counter and compare register" "Not forced,Forced" textline " " bitfld.long 0x04 11. " RIMASK_11 ,Forces compare on the 11 bit of the counter and compare register" "Not forced,Forced" bitfld.long 0x04 10. " RIMASK_10 ,Forces compare on the 10 bit of the counter and compare register" "Not forced,Forced" bitfld.long 0x04 9. " RIMASK_9 ,Forces compare on the 9 bit of the counter and compare register" "Not forced,Forced" bitfld.long 0x04 8. " RIMASK_8 ,Forces compare on the 8 bit of the counter and compare register" "Not forced,Forced" textline " " bitfld.long 0x04 7. " RIMASK_7 ,Forces compare on the 7 bit of the counter and compare register" "Not forced,Forced" bitfld.long 0x04 6. " RIMASK_6 ,Forces compare on the 6 bit of the counter and compare register" "Not forced,Forced" bitfld.long 0x04 5. " RIMASK_5 ,Forces compare on the 5 bit of the counter and compare register" "Not forced,Forced" bitfld.long 0x04 4. " RIMASK_4 ,Forces compare on the 4 bit of the counter and compare register" "Not forced,Forced" textline " " bitfld.long 0x04 3. " RIMASK_3 ,Forces compare on the 3 bit of the counter and compare register" "Not forced,Forced" bitfld.long 0x04 2. " RIMASK_2 ,Forces compare on the 2 bit of the counter and compare register" "Not forced,Forced" bitfld.long 0x04 1. " RIMASK_1 ,Forces compare on the 1 bit of the counter and compare register" "Not forced,Forced" bitfld.long 0x04 0. " RIMASK_0 ,Forces compare on the 0 bit of the counter and compare register" "Not forced,Forced" textline "" line.long 0x08 "RICTRL,Control Register" bitfld.long 0x08 3. " RITEN ,Timer enable" "Disabled,Enabled" bitfld.long 0x08 2. " RITENBR ,Timer enable for debug" "Disabled,Enabled" bitfld.long 0x08 1. " RITENCLR ,Timer enable clear" "Disabled,Enabled" eventfld.long 0x08 0. " RITINT ,Counter value equals the masked compare value (RICOMPVAL and RIMASK)" "Not occurred,Occurred" line.long 0x0c "RICOUNTER,32-bit Counter" width 0xb tree.end endif tree "System Tick Timer" base ad:0xE000E010 width 10. sif (cpu()=="LPC4072FBD80")||(cpu()=="LPC4072FET80")||(cpu()=="LPC4074FBD144")||(cpu()=="LPC4076FBD144")||(cpu()=="LPC4076FET180")||(cpu()=="LPC4078FBD100")||(cpu()=="LPC4078FBD144")||(cpu()=="LPC4078FBD208")||(cpu()=="LPC4078FBD80")||(cpu()=="LPC4078FET180")||(cpu()=="LPC4078FET208")||(cpu()=="LPC4088FBD144")||(cpu()=="LPC4088FBD208")||(cpu()=="LPC4088FET180")||(cpu()=="LPC4088FET208") group.long 0x00++0x03 line.long 0x00 "STCTRL,System Timer Control and Status Register" bitfld.long 0x00 16. " COUNTFLAG ,System Tick counter flag" "Low,High" bitfld.long 0x00 2. " CLKSOURCE ,System Tick clock source selection" "CPU clock,STCLK" bitfld.long 0x00 1. " TICKINT ,System Tick interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " ENABLE ,System Tick counter enable" "Disabled,Enabled" else hgroup.long 0x00++0x03 hide.long 0x00 "STCTRL,System Timer Control and Status Register" in endif group.long 0x04++0x0B line.long 0x00 "STRELOAD,System Timer Reload Value Register" hexmask.long.tbyte 0x00 0.--23. 1. " RELOAD ,System Tick counter reload value" line.long 0x04 "STCURR,System Timer Current Value Register" hexmask.long.tbyte 0x04 0.--23. 1. " CURRENT ,System Tick counter value" line.long 0x08 "STCALIB,System Timer Calibration Value Register" bitfld.long 0x08 31. " NOREF ,External reference clock available" "Available,Not available" bitfld.long 0x08 30. " SKEW ,TENMS value precise 10 millisecond time generation" "Precise,Not precise" hexmask.long.tbyte 0x08 0.--23. 1. " TENMS ,Reload value to get a 10 millisecond System Tick underflow rate at 100 MHz" width 0x0B tree.end tree "PWM (Pulse Width Modulator)" sif (cpu()!="LPC1772"&&cpu()!="LPC1774"&&cpu()!="LPC1776"&&cpu()!="LPC1777"&&cpu()!="LPC1778"&&cpu()!="LPC1785"&&cpu()!="LPC1786"&&cpu()!="LPC1787"&&cpu()!="LPC1788") base ad:0x40018000 width 0xA group.long 0x00++0x3 line.long 0x00 "PWM1IR,PWM Interrupt Register" eventfld.long 0x00 10. " PWMMR6INTERRUPT ,Interrupt Flag for PWM Match Channel 6" "Not occurred,Occurred" eventfld.long 0x00 9. " PWMMR5INTERRUPT ,Interrupt Flag for PWM Match Channel 5" "Not occurred,Occurred" textline " " eventfld.long 0x00 8. " PWMMR4INTERRUPT ,Interrupt Flag for PWM Match Channel 4" "Not occurred,Occurred" eventfld.long 0x00 5. " PWMCAP1INTERRUPT ,Interrupt flag for capture input 1" "Not occurred,Occurred" textline " " eventfld.long 0x00 4. " PWMCAP0INTERRUPT ,Interrupt flag for capture input 0" "Not occurred,Occurred" eventfld.long 0x00 3. " PWMMR3INTERRUPT ,Interrupt Flag for PWM Match Channel 3" "Not occurred,Occurred" textline " " eventfld.long 0x00 2. " PWMMR2INTERRUPT ,Interrupt Flag for PWM Match Channel 2" "Not occurred,Occurred" eventfld.long 0x00 1. " PWMMR1INTERRUPT ,Interrupt Flag for PWM Match Channel 1" "Not occurred,Occurred" textline " " eventfld.long 0x00 0. " PWMMR0INTERRUPT ,Interrupt Flag for PWM Match Channel 0" "Not occurred,Occurred" group.long 0x4++0x3 line.long 0x0 "PWM1TCR,PWM Timer Control Register" sif (cpu()=="LPC1772"||cpu()=="LPC1774"||cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778"||cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788")||(cpu()=="LPC4072FBD80")||(cpu()=="LPC4072FET80")||(cpu()=="LPC4074FBD144")||(cpu()=="LPC4076FBD144")||(cpu()=="LPC4076FET180")||(cpu()=="LPC4078FBD100")||(cpu()=="LPC4078FBD144")||(cpu()=="LPC4078FBD208")||(cpu()=="LPC4078FBD80")||(cpu()=="LPC4078FET180")||(cpu()=="LPC4078FET208")||(cpu()=="LPC4088FBD144")||(cpu()=="LPC4088FBD208")||(cpu()=="LPC4088FET180")||(cpu()=="LPC4088FET208") endif bitfld.long 0x0 3. " PWMENABLE ,PWM Enable" "Disabled,Enabled" bitfld.long 0x0 1. " COUNTERRESET ,Counter Reset" "No reset,Reset" textline " " bitfld.long 0x0 0. " COUNTERENABLE ,Counter Enable" "Disabled,Enabled" group.long 0x8++0x23 line.long 0x0 "PWM1TC,PWM Timer Counter" line.long 0x4 "PWM1PR,PWM Prescale Register" line.long 0x8 "PWM1PC,PWM Prescale Counter" line.long 0xC "PWM1MCR,PWM Match Control Register" bitfld.long 0xC 20. " PWMMR6S ,Stop on PWMMR6" "Disabled,Enabled" bitfld.long 0xC 19. " PWMMR6R ,Reset on PWMMR6" "Disabled,Enabled" bitfld.long 0xC 18. " PWMMR6I ,Interrupt on PWMMR6" "Disabled,Enabled" textline " " bitfld.long 0xC 17. " PWMMR5S ,Stop on PWMMR5" "Disabled,Enabled" bitfld.long 0xC 16. " PWMMR5R ,Reset on PWMMR5" "Disabled,Enabled" bitfld.long 0xC 15. " PWMMR5I ,Interrupt on PWMMR5" "Disabled,Enabled" textline " " bitfld.long 0xC 14. " PWMMR4S ,Stop on PWMMR4" "Disabled,Enabled" bitfld.long 0xC 13. " PWMMR4R ,Reset on PWMMR4" "Disabled,Enabled" bitfld.long 0xC 12. " PWMMR4I ,Interrupt on PWMMR4" "Disabled,Enabled" textline " " bitfld.long 0xC 11. " PWMMR3S ,Stop on PWMMR3" "Disabled,Enabled" bitfld.long 0xC 10. " PWMMR3R ,Reset on PWMMR3" "Disabled,Enabled" bitfld.long 0xC 9. " PWMMR3I ,Interrupt on PWMMR3" "Disabled,Enabled" textline " " bitfld.long 0xC 8. " PWMMR2S ,Stop on PWMMR2" "Disabled,Enabled" bitfld.long 0xC 7. " PWMMR2R ,Reset on PWMMR2" "Disabled,Enabled" bitfld.long 0xC 6. " PWMMR2I ,Interrupt on PWMMR2" "Disabled,Enabled" textline " " bitfld.long 0xC 5. " PWMMR1S ,Stop on PWMMR1" "Disabled,Enabled" bitfld.long 0xC 4. " PWMMR1R ,Reset on PWMMR1" "Disabled,Enabled" bitfld.long 0xC 3. " PWMMR1I ,Interrupt on PWMMR1" "Disabled,Enabled" textline " " bitfld.long 0xC 2. " PWMMR0S ,Stop on PWMMR0" "Disabled,Enabled" bitfld.long 0xC 1. " PWMMR0R ,Reset on PWMMR0" "Disabled,Enabled" bitfld.long 0xC 0. " PWMMR0I ,Interrupt on PWMMR0" "Disabled,Enabled" line.long 0x10 "PWM1MR0,PWM Match Register 0" line.long 0x14 "PWM1MR1,PWM Match Register 1" line.long 0x18 "PWM1MR2,PWM Match Register 2" line.long 0x1C "PWM1MR3,PWM Match Register 3" line.long 0x20 "PWM1CCR,PWM Capture Control Register" bitfld.long 0x20 5. " IOCAP1.1E ,Interrupt on CAP1.1 event" "Disabled,Enabled" bitfld.long 0x20 4. " COCAP1.1FE ,Capture on CAP1.1 falling edge" "Disabled,Enabled" bitfld.long 0x20 3. " COCAP1.1RE ,Capture on CAP1.1 rising edge" "Disabled,Enabled" textline " " bitfld.long 0x20 2. " IOCAP1.0E ,Interrupt on CAP1.0 event" "Disabled,Enabled" bitfld.long 0x20 1. " COCAP1.0FE ,Capture on CAP1.0 falling edge" "Disabled,Enabled" bitfld.long 0x20 0. " COCAP1.0RE ,Capture on CAP1.0 rising edge" "Disabled,Enabled" sif (cpu()=="LPC1772"||cpu()=="LPC1774"||cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778"||cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788") rgroup.long 0x2C++0x7 line.long 0x00 "PWM1CR0,Capture Register 0" line.long 0x04 "PWM1CR1,Capture Register 1" else rgroup.long 0x2C++0xF line.long 0x0 "PWM1CR0,Capture Register 0" line.long 0x4 "PWM1CR1,Capture Register 1" line.long 0x8 "PWM1CR2,Capture Register 2" line.long 0xC "PWM1CR3,Capture Register 3" endif group.long 0x40++0xf line.long 0x0 "PWM1MR4,PWM Match Register 4" line.long 0x4 "PWM1MR5,PWM Match Register 5" line.long 0x8 "PWM1MR6,PWM Match Register 6" line.long 0xc "PWM1PCR,PWM Control Register" bitfld.long 0xc 14. " PWMENA6 ,PWM6 Output Enable" "Disabled,Enabled" bitfld.long 0xc 13. " PWMENA5 ,PWM5 Output Enable" "Disabled,Enabled" bitfld.long 0xc 12. " PWMENA4 ,PWM4 Output Enable" "Disabled,Enabled" textline " " bitfld.long 0xc 11. " PWMENA3 ,PWM3 Output Enable" "Disabled,Enabled" bitfld.long 0xc 10. " PWMENA2 ,PWM2 Output Enable" "Disabled,Enabled" bitfld.long 0xc 9. " PWMENA1 ,PWM1 Output Enable" "Disabled,Enabled" textline " " bitfld.long 0xc 6. " PWMSEL6 ,PWM6 Edge Controlled Mode" "Single,Double" bitfld.long 0xc 5. " PWMSEL5 ,PWM5 Edge Controlled Mode" "Single,Double" bitfld.long 0xc 4. " PWMSEL4 ,PWM4 Edge Controlled Mode" "Single,Double" textline " " bitfld.long 0xc 3. " PWMSEL3 ,PWM3 Edge Controlled Mode" "Single,Double" bitfld.long 0xc 2. " PWMSEL2 ,PWM2 Edge Controlled Mode" "Single,Double" group.long 0x50++0x3 line.long 0x0 "PWM1LER,PWM Latch Enable Register" bitfld.long 0x0 6. " PWMMLE6 ,Enable PWM Match 6 Latch" "Disabled,Enabled" bitfld.long 0x0 5. " PWMMLE5 ,Enable PWM Match 5 Latch" "Disabled,Enabled" bitfld.long 0x0 4. " PWMMLE4 ,Enable PWM Match 4 Latch" "Disabled,Enabled" textline " " bitfld.long 0x0 3. " PWMMLE3 ,Enable PWM Match 3 Latch" "Disabled,Enabled" bitfld.long 0x0 2. " PWMMLE2 ,Enable PWM Match 2 Latch" "Disabled,Enabled" bitfld.long 0x0 1. " PWMMLE1 ,Enable PWM Match 1 Latch" "Disabled,Enabled" textline " " bitfld.long 0x0 0. " PWMMLE0 ,Enable PWM Match 0 Latch" "Disabled,Enabled" group.long 0x70++0x3 line.long 0x0 "PWM1CTCR,PWM Count Control Register" bitfld.long 0x0 2.--3. " CIS ,Count Input Select" "PCAP1.0,PCAP1.1,?..." bitfld.long 0x0 0.--1. " MOD ,Counter/Timer Mode" "Timer,Counter/rising,Counter/falling,Counter/both" width 0x0B else tree "PWM0" base ad:0x40014000 width 0xA group.long 0x00++0x3 line.long 0x00 "PWM0IR,PWM Interrupt Register" eventfld.long 0x00 10. " PWMMR6INTERRUPT ,Interrupt Flag for PWM Match Channel 6" "Not occurred,Occurred" eventfld.long 0x00 9. " PWMMR5INTERRUPT ,Interrupt Flag for PWM Match Channel 5" "Not occurred,Occurred" textline " " eventfld.long 0x00 8. " PWMMR4INTERRUPT ,Interrupt Flag for PWM Match Channel 4" "Not occurred,Occurred" eventfld.long 0x00 5. " PWMCAP1INTERRUPT ,Interrupt flag for capture input 1" "Not occurred,Occurred" textline " " eventfld.long 0x00 4. " PWMCAP0INTERRUPT ,Interrupt flag for capture input 0" "Not occurred,Occurred" eventfld.long 0x00 3. " PWMMR3INTERRUPT ,Interrupt Flag for PWM Match Channel 3" "Not occurred,Occurred" textline " " eventfld.long 0x00 2. " PWMMR2INTERRUPT ,Interrupt Flag for PWM Match Channel 2" "Not occurred,Occurred" eventfld.long 0x00 1. " PWMMR1INTERRUPT ,Interrupt Flag for PWM Match Channel 1" "Not occurred,Occurred" textline " " eventfld.long 0x00 0. " PWMMR0INTERRUPT ,Interrupt Flag for PWM Match Channel 0" "Not occurred,Occurred" group.long 0x4++0x3 line.long 0x0 "PWM0TCR,PWM Timer Control Register" sif (cpu()=="LPC1772"||cpu()=="LPC1774"||cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778"||cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788")||(cpu()=="LPC4072FBD80")||(cpu()=="LPC4072FET80")||(cpu()=="LPC4074FBD144")||(cpu()=="LPC4076FBD144")||(cpu()=="LPC4076FET180")||(cpu()=="LPC4078FBD100")||(cpu()=="LPC4078FBD144")||(cpu()=="LPC4078FBD208")||(cpu()=="LPC4078FBD80")||(cpu()=="LPC4078FET180")||(cpu()=="LPC4078FET208")||(cpu()=="LPC4088FBD144")||(cpu()=="LPC4088FBD208")||(cpu()=="LPC4088FET180")||(cpu()=="LPC4088FET208") bitfld.long 0x0 4. " MASTERDIS ,Master Disable control bit" "Synchronized,Independently" textline " " endif bitfld.long 0x0 3. " PWMENABLE ,PWM Enable" "Disabled,Enabled" bitfld.long 0x0 1. " COUNTERRESET ,Counter Reset" "No reset,Reset" textline " " bitfld.long 0x0 0. " COUNTERENABLE ,Counter Enable" "Disabled,Enabled" group.long 0x8++0x23 line.long 0x0 "PWM0TC,PWM Timer Counter" line.long 0x4 "PWM0PR,PWM Prescale Register" line.long 0x8 "PWM0PC,PWM Prescale Counter" line.long 0xC "PWM0MCR,PWM Match Control Register" bitfld.long 0xC 20. " PWMMR6S ,Stop on PWMMR6" "Disabled,Enabled" bitfld.long 0xC 19. " PWMMR6R ,Reset on PWMMR6" "Disabled,Enabled" bitfld.long 0xC 18. " PWMMR6I ,Interrupt on PWMMR6" "Disabled,Enabled" textline " " bitfld.long 0xC 17. " PWMMR5S ,Stop on PWMMR5" "Disabled,Enabled" bitfld.long 0xC 16. " PWMMR5R ,Reset on PWMMR5" "Disabled,Enabled" bitfld.long 0xC 15. " PWMMR5I ,Interrupt on PWMMR5" "Disabled,Enabled" textline " " bitfld.long 0xC 14. " PWMMR4S ,Stop on PWMMR4" "Disabled,Enabled" bitfld.long 0xC 13. " PWMMR4R ,Reset on PWMMR4" "Disabled,Enabled" bitfld.long 0xC 12. " PWMMR4I ,Interrupt on PWMMR4" "Disabled,Enabled" textline " " bitfld.long 0xC 11. " PWMMR3S ,Stop on PWMMR3" "Disabled,Enabled" bitfld.long 0xC 10. " PWMMR3R ,Reset on PWMMR3" "Disabled,Enabled" bitfld.long 0xC 9. " PWMMR3I ,Interrupt on PWMMR3" "Disabled,Enabled" textline " " bitfld.long 0xC 8. " PWMMR2S ,Stop on PWMMR2" "Disabled,Enabled" bitfld.long 0xC 7. " PWMMR2R ,Reset on PWMMR2" "Disabled,Enabled" bitfld.long 0xC 6. " PWMMR2I ,Interrupt on PWMMR2" "Disabled,Enabled" textline " " bitfld.long 0xC 5. " PWMMR1S ,Stop on PWMMR1" "Disabled,Enabled" bitfld.long 0xC 4. " PWMMR1R ,Reset on PWMMR1" "Disabled,Enabled" bitfld.long 0xC 3. " PWMMR1I ,Interrupt on PWMMR1" "Disabled,Enabled" textline " " bitfld.long 0xC 2. " PWMMR0S ,Stop on PWMMR0" "Disabled,Enabled" bitfld.long 0xC 1. " PWMMR0R ,Reset on PWMMR0" "Disabled,Enabled" bitfld.long 0xC 0. " PWMMR0I ,Interrupt on PWMMR0" "Disabled,Enabled" line.long 0x10 "PWM0MR0,PWM Match Register 0" line.long 0x14 "PWM0MR1,PWM Match Register 1" line.long 0x18 "PWM0MR2,PWM Match Register 2" line.long 0x1C "PWM0MR3,PWM Match Register 3" line.long 0x20 "PWM0CCR,PWM Capture Control Register" bitfld.long 0x20 2. " IOCAP0.0E ,Interrupt on CAP0.0 event" "Disabled,Enabled" bitfld.long 0x20 1. " COCAP0.0FE ,Capture on CAP0.0 falling edge" "Disabled,Enabled" bitfld.long 0x20 0. " COCAP0.0RE ,Capture on CAP0.0 rising edge" "Disabled,Enabled" sif (cpu()=="LPC1772"||cpu()=="LPC1774"||cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778"||cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788") rgroup.long 0x2C++0x3 line.long 0x00 "PWM0CR0,Capture Register 0" else rgroup.long 0x2C++0xF line.long 0x0 "PWM0CR0,Capture Register 0" line.long 0x4 "PWM0CR1,Capture Register 1" line.long 0x8 "PWM0CR2,Capture Register 2" line.long 0xC "PWM0CR3,Capture Register 3" endif group.long 0x40++0xf line.long 0x0 "PWM0MR4,PWM Match Register 4" line.long 0x4 "PWM0MR5,PWM Match Register 5" line.long 0x8 "PWM0MR6,PWM Match Register 6" line.long 0xc "PWM0PCR,PWM Control Register" bitfld.long 0xc 14. " PWMENA6 ,PWM6 Output Enable" "Disabled,Enabled" bitfld.long 0xc 13. " PWMENA5 ,PWM5 Output Enable" "Disabled,Enabled" bitfld.long 0xc 12. " PWMENA4 ,PWM4 Output Enable" "Disabled,Enabled" textline " " bitfld.long 0xc 11. " PWMENA3 ,PWM3 Output Enable" "Disabled,Enabled" bitfld.long 0xc 10. " PWMENA2 ,PWM2 Output Enable" "Disabled,Enabled" bitfld.long 0xc 9. " PWMENA1 ,PWM0 Output Enable" "Disabled,Enabled" textline " " bitfld.long 0xc 6. " PWMSEL6 ,PWM6 Edge Controlled Mode" "Single,Double" bitfld.long 0xc 5. " PWMSEL5 ,PWM5 Edge Controlled Mode" "Single,Double" bitfld.long 0xc 4. " PWMSEL4 ,PWM4 Edge Controlled Mode" "Single,Double" textline " " bitfld.long 0xc 3. " PWMSEL3 ,PWM3 Edge Controlled Mode" "Single,Double" bitfld.long 0xc 2. " PWMSEL2 ,PWM2 Edge Controlled Mode" "Single,Double" group.long 0x50++0x3 line.long 0x0 "PWM0LER,PWM Latch Enable Register" bitfld.long 0x0 6. " PWMMLE6 ,Enable PWM Match 6 Latch" "Disabled,Enabled" bitfld.long 0x0 5. " PWMMLE5 ,Enable PWM Match 5 Latch" "Disabled,Enabled" bitfld.long 0x0 4. " PWMMLE4 ,Enable PWM Match 4 Latch" "Disabled,Enabled" textline " " bitfld.long 0x0 3. " PWMMLE3 ,Enable PWM Match 3 Latch" "Disabled,Enabled" bitfld.long 0x0 2. " PWMMLE2 ,Enable PWM Match 2 Latch" "Disabled,Enabled" bitfld.long 0x0 1. " PWMMLE1 ,Enable PWM Match 1 Latch" "Disabled,Enabled" textline " " bitfld.long 0x0 0. " PWMMLE0 ,Enable PWM Match 0 Latch" "Disabled,Enabled" group.long 0x70++0x3 line.long 0x0 "PWM0CTCR,PWM Count Control Register" bitfld.long 0x0 2.--3. " CIS ,Count Input Select" "PCAP1.0,?..." bitfld.long 0x0 0.--1. " MOD ,Counter/Timer Mode" "Timer,Counter/rising,Counter/falling,Counter/both" width 0x0B tree.end tree "PWM1" base ad:0x40018000 width 0xA group.long 0x00++0x3 line.long 0x00 "PWM1IR,PWM Interrupt Register" eventfld.long 0x00 10. " PWMMR6INTERRUPT ,Interrupt Flag for PWM Match Channel 6" "Not occurred,Occurred" eventfld.long 0x00 9. " PWMMR5INTERRUPT ,Interrupt Flag for PWM Match Channel 5" "Not occurred,Occurred" textline " " eventfld.long 0x00 8. " PWMMR4INTERRUPT ,Interrupt Flag for PWM Match Channel 4" "Not occurred,Occurred" eventfld.long 0x00 5. " PWMCAP1INTERRUPT ,Interrupt flag for capture input 1" "Not occurred,Occurred" textline " " eventfld.long 0x00 4. " PWMCAP0INTERRUPT ,Interrupt flag for capture input 0" "Not occurred,Occurred" eventfld.long 0x00 3. " PWMMR3INTERRUPT ,Interrupt Flag for PWM Match Channel 3" "Not occurred,Occurred" textline " " eventfld.long 0x00 2. " PWMMR2INTERRUPT ,Interrupt Flag for PWM Match Channel 2" "Not occurred,Occurred" eventfld.long 0x00 1. " PWMMR1INTERRUPT ,Interrupt Flag for PWM Match Channel 1" "Not occurred,Occurred" textline " " eventfld.long 0x00 0. " PWMMR0INTERRUPT ,Interrupt Flag for PWM Match Channel 0" "Not occurred,Occurred" group.long 0x4++0x3 line.long 0x0 "PWM1TCR,PWM Timer Control Register" sif (cpu()=="LPC1772"||cpu()=="LPC1774"||cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778"||cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788")||(cpu()=="LPC4072FBD80")||(cpu()=="LPC4072FET80")||(cpu()=="LPC4074FBD144")||(cpu()=="LPC4076FBD144")||(cpu()=="LPC4076FET180")||(cpu()=="LPC4078FBD100")||(cpu()=="LPC4078FBD144")||(cpu()=="LPC4078FBD208")||(cpu()=="LPC4078FBD80")||(cpu()=="LPC4078FET180")||(cpu()=="LPC4078FET208")||(cpu()=="LPC4088FBD144")||(cpu()=="LPC4088FBD208")||(cpu()=="LPC4088FET180")||(cpu()=="LPC4088FET208") endif bitfld.long 0x0 3. " PWMENABLE ,PWM Enable" "Disabled,Enabled" bitfld.long 0x0 1. " COUNTERRESET ,Counter Reset" "No reset,Reset" textline " " bitfld.long 0x0 0. " COUNTERENABLE ,Counter Enable" "Disabled,Enabled" group.long 0x8++0x23 line.long 0x0 "PWM1TC,PWM Timer Counter" line.long 0x4 "PWM1PR,PWM Prescale Register" line.long 0x8 "PWM1PC,PWM Prescale Counter" line.long 0xC "PWM1MCR,PWM Match Control Register" bitfld.long 0xC 20. " PWMMR6S ,Stop on PWMMR6" "Disabled,Enabled" bitfld.long 0xC 19. " PWMMR6R ,Reset on PWMMR6" "Disabled,Enabled" bitfld.long 0xC 18. " PWMMR6I ,Interrupt on PWMMR6" "Disabled,Enabled" textline " " bitfld.long 0xC 17. " PWMMR5S ,Stop on PWMMR5" "Disabled,Enabled" bitfld.long 0xC 16. " PWMMR5R ,Reset on PWMMR5" "Disabled,Enabled" bitfld.long 0xC 15. " PWMMR5I ,Interrupt on PWMMR5" "Disabled,Enabled" textline " " bitfld.long 0xC 14. " PWMMR4S ,Stop on PWMMR4" "Disabled,Enabled" bitfld.long 0xC 13. " PWMMR4R ,Reset on PWMMR4" "Disabled,Enabled" bitfld.long 0xC 12. " PWMMR4I ,Interrupt on PWMMR4" "Disabled,Enabled" textline " " bitfld.long 0xC 11. " PWMMR3S ,Stop on PWMMR3" "Disabled,Enabled" bitfld.long 0xC 10. " PWMMR3R ,Reset on PWMMR3" "Disabled,Enabled" bitfld.long 0xC 9. " PWMMR3I ,Interrupt on PWMMR3" "Disabled,Enabled" textline " " bitfld.long 0xC 8. " PWMMR2S ,Stop on PWMMR2" "Disabled,Enabled" bitfld.long 0xC 7. " PWMMR2R ,Reset on PWMMR2" "Disabled,Enabled" bitfld.long 0xC 6. " PWMMR2I ,Interrupt on PWMMR2" "Disabled,Enabled" textline " " bitfld.long 0xC 5. " PWMMR1S ,Stop on PWMMR1" "Disabled,Enabled" bitfld.long 0xC 4. " PWMMR1R ,Reset on PWMMR1" "Disabled,Enabled" bitfld.long 0xC 3. " PWMMR1I ,Interrupt on PWMMR1" "Disabled,Enabled" textline " " bitfld.long 0xC 2. " PWMMR0S ,Stop on PWMMR0" "Disabled,Enabled" bitfld.long 0xC 1. " PWMMR0R ,Reset on PWMMR0" "Disabled,Enabled" bitfld.long 0xC 0. " PWMMR0I ,Interrupt on PWMMR0" "Disabled,Enabled" line.long 0x10 "PWM1MR0,PWM Match Register 0" line.long 0x14 "PWM1MR1,PWM Match Register 1" line.long 0x18 "PWM1MR2,PWM Match Register 2" line.long 0x1C "PWM1MR3,PWM Match Register 3" line.long 0x20 "PWM1CCR,PWM Capture Control Register" bitfld.long 0x20 5. " IOCAP1.1E ,Interrupt on CAP1.1 event" "Disabled,Enabled" bitfld.long 0x20 4. " COCAP1.1FE ,Capture on CAP1.1 falling edge" "Disabled,Enabled" bitfld.long 0x20 3. " COCAP1.1RE ,Capture on CAP1.1 rising edge" "Disabled,Enabled" textline " " bitfld.long 0x20 2. " IOCAP1.0E ,Interrupt on CAP1.0 event" "Disabled,Enabled" bitfld.long 0x20 1. " COCAP1.0FE ,Capture on CAP1.0 falling edge" "Disabled,Enabled" bitfld.long 0x20 0. " COCAP1.0RE ,Capture on CAP1.0 rising edge" "Disabled,Enabled" sif (cpu()=="LPC1772"||cpu()=="LPC1774"||cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778"||cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788") rgroup.long 0x2C++0x7 line.long 0x00 "PWM1CR0,Capture Register 0" line.long 0x04 "PWM1CR1,Capture Register 1" else rgroup.long 0x2C++0xF line.long 0x0 "PWM1CR0,Capture Register 0" line.long 0x4 "PWM1CR1,Capture Register 1" line.long 0x8 "PWM1CR2,Capture Register 2" line.long 0xC "PWM1CR3,Capture Register 3" endif group.long 0x40++0xf line.long 0x0 "PWM1MR4,PWM Match Register 4" line.long 0x4 "PWM1MR5,PWM Match Register 5" line.long 0x8 "PWM1MR6,PWM Match Register 6" line.long 0xc "PWM1PCR,PWM Control Register" bitfld.long 0xc 14. " PWMENA6 ,PWM6 Output Enable" "Disabled,Enabled" bitfld.long 0xc 13. " PWMENA5 ,PWM5 Output Enable" "Disabled,Enabled" bitfld.long 0xc 12. " PWMENA4 ,PWM4 Output Enable" "Disabled,Enabled" textline " " bitfld.long 0xc 11. " PWMENA3 ,PWM3 Output Enable" "Disabled,Enabled" bitfld.long 0xc 10. " PWMENA2 ,PWM2 Output Enable" "Disabled,Enabled" bitfld.long 0xc 9. " PWMENA1 ,PWM1 Output Enable" "Disabled,Enabled" textline " " bitfld.long 0xc 6. " PWMSEL6 ,PWM6 Edge Controlled Mode" "Single,Double" bitfld.long 0xc 5. " PWMSEL5 ,PWM5 Edge Controlled Mode" "Single,Double" bitfld.long 0xc 4. " PWMSEL4 ,PWM4 Edge Controlled Mode" "Single,Double" textline " " bitfld.long 0xc 3. " PWMSEL3 ,PWM3 Edge Controlled Mode" "Single,Double" bitfld.long 0xc 2. " PWMSEL2 ,PWM2 Edge Controlled Mode" "Single,Double" group.long 0x50++0x3 line.long 0x0 "PWM1LER,PWM Latch Enable Register" bitfld.long 0x0 6. " PWMMLE6 ,Enable PWM Match 6 Latch" "Disabled,Enabled" bitfld.long 0x0 5. " PWMMLE5 ,Enable PWM Match 5 Latch" "Disabled,Enabled" bitfld.long 0x0 4. " PWMMLE4 ,Enable PWM Match 4 Latch" "Disabled,Enabled" textline " " bitfld.long 0x0 3. " PWMMLE3 ,Enable PWM Match 3 Latch" "Disabled,Enabled" bitfld.long 0x0 2. " PWMMLE2 ,Enable PWM Match 2 Latch" "Disabled,Enabled" bitfld.long 0x0 1. " PWMMLE1 ,Enable PWM Match 1 Latch" "Disabled,Enabled" textline " " bitfld.long 0x0 0. " PWMMLE0 ,Enable PWM Match 0 Latch" "Disabled,Enabled" group.long 0x70++0x3 line.long 0x0 "PWM1CTCR,PWM Count Control Register" bitfld.long 0x0 2.--3. " CIS ,Count Input Select" "PCAP1.0,PCAP1.1,?..." bitfld.long 0x0 0.--1. " MOD ,Counter/Timer Mode" "Timer,Counter/rising,Counter/falling,Counter/both" width 0x0B tree.end endif tree.end tree "MC PWM (Motor Control Pulse Width Modulator)" base ad:0x400B8000 width 11. group.long 0x00++0x3 line.long 0x00 "MCCON,MCPWM control register" setclrfld.long 0x00 31. 0x04 31. 0x08 31. " DCMODE_set/clr ,3-phase DC mode select" "Disabled,Enabled" setclrfld.long 0x00 30. 0x04 30. 0x08 30. " ACMODE_set/clr ,3-phase AC mode select" "Disabled,Enabled" textline " " setclrfld.long 0x00 29. 0x04 29. 0x08 29. " INVBDC_set/clr ,Invert MCOB outputs for channels 0 to 2." "Not inverted,Inverted" setclrfld.long 0x00 20. 0x04 20. 0x08 20. " DISUP2_set/clr ,Enable/disable updates of functional registers, channel 2" "Updated,Not updated" textline " " setclrfld.long 0x00 19. 0x04 19. 0x08 19. " DTE2_set/clr ,Dead-time, channel 2" "Disabled,Enabled" setclrfld.long 0x00 18. 0x04 18. 0x08 18. " POLA2_set/clr ,Selects polarity of the MCOA2 and MCOB2 pins" "Active High,Active Low" textline " " setclrfld.long 0x00 17. 0x04 17. 0x08 17. " CENTER2_set/clr ,Edge/center aligned operation, channel 2" "Edge,Center" setclrfld.long 0x00 16. 0x04 16. 0x08 16. " RUN2_set/clr ,Stops/starts the timer, channel 2" "Stop,Run" textline " " setclrfld.long 0x00 12. 0x04 12. 0x08 12. " DISUP1_set/clr ,Enable/disable updates of functional registers, channel 1" "Updated,Not updated" setclrfld.long 0x00 11. 0x04 11. 0x08 11. " DTE1_set/clr ,Controls the dead-time feature for channel 1" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x04 10. 0x08 10. " POLA1_set/clr ,Selects polarity of the MCOA1 and MCOB1 pins" "Active High,Active Low" setclrfld.long 0x00 9. 0x04 9. 0x08 9. " CENTER1_set/clr ,Edge/center aligned operation, channel 1" "Edge,Center" textline " " setclrfld.long 0x00 8. 0x04 8. 0x08 8. " RUN1_set/clr ,Stops/starts the timer, channel 1" "Stop,Run" setclrfld.long 0x00 4. 0x04 4. 0x08 4. " DISUP0_set/clr ,Enable/disable updates of functional registers, channel 0" "Updated,Not updated" textline " " setclrfld.long 0x00 3. 0x04 3. 0x08 3. " DTE0_set/clr ,Controls the dead-time feature for channel 0" "Disabled,Enabled" setclrfld.long 0x00 2. 0x04 2. 0x08 2. " POLA0_set/clr ,Selects polarity of the MCOA0 and MCOB0 pins" "Active High,Active Low" textline " " setclrfld.long 0x00 1. 0x04 1. 0x08 1. " CENTER0_set/clr ,Edge/center aligned operation, channel 0" "Edge,Center" setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RUN0_set/clr ,Stops/starts the timer, channel 0" "Stop,Run" group.long 0x0C++0x3 line.long 0x00 "MCCAPCON,MCPWM Capture control register" sif (cpu()=="LPC4072FBD80")||(cpu()=="LPC4072FET80")||(cpu()=="LPC4074FBD144")||(cpu()=="LPC4076FBD144")||(cpu()=="LPC4076FET180")||(cpu()=="LPC4078FBD100")||(cpu()=="LPC4078FBD144")||(cpu()=="LPC4078FBD208")||(cpu()=="LPC4078FBD80")||(cpu()=="LPC4078FET180")||(cpu()=="LPC4078FET208")||(cpu()=="LPC4088FBD144")||(cpu()=="LPC4088FBD208")||(cpu()=="LPC4088FET180")||(cpu()=="LPC4088FET208") setclrfld.long 0x00 23. 0x04 23. 0x08 23. " HNFCAP2/clr ,Hardware noise filter-channel 2" "Normal,Delayed" setclrfld.long 0x00 22. 0x04 22. 0x08 22. " HNFCAP1/clr ,Hardware noise filter-channel 1" "Normal,Delayed" textline " " setclrfld.long 0x00 21. 0x04 21. 0x08 21. " HNFCAP0/clr ,Hardware noise filter-channel 0" "Normal,Delayed" setclrfld.long 0x00 20. 0x04 20. 0x08 20. " RT2_set/clr ,Reset MCTC2 register for any enabled capture event on channel 2" "Disabled,Enabled" textline " " else setclrfld.long 0x00 20. 0x04 20. 0x08 20. " RT2_set/clr ,Reset MCTC2 register for any enabled capture event on channel 2" "Disabled,Enabled" textline " " endif setclrfld.long 0x00 19. 0x04 19. 0x08 19. " RT1_set/clr ,Reset MCTC1 register for any enabled capture event on channel 1" "Disabled,Enabled" setclrfld.long 0x00 18. 0x04 18. 0x08 18. " RT0_set/clr ,Reset MCTC0 register for any enabled capture event on channel 0" "Disabled,Enabled" textline " " setclrfld.long 0x00 17. 0x04 17. 0x08 17. " CAP2MCI2_FE_set/clr ,Enable capture event on channel 2 on the falling edge of the MCI2 input" "Disabled,Enabled" setclrfld.long 0x00 16. 0x04 16. 0x08 16. " CAP2MCI2_RE_set/clr ,Enable capture event on channel 2 on the rising edge of the MCI2 input" "Disabled,Enabled" textline " " setclrfld.long 0x00 15. 0x04 15. 0x08 15. " CAP2MCI1_FE_set/clr ,Enable capture event on channel 2 on the falling edge of the MCI1 input" "Disabled,Enabled" setclrfld.long 0x00 14. 0x04 14. 0x08 14. " CAP2MCI1_RE_set/clr ,Enable capture event on channel 2 on the rising edge of the MCI1 input" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x04 13. 0x08 13. " CAP2MCI0_FE_set/clr ,Enable capture event on channel 2 on the falling edge of the MCI0 input" "Disabled,Enabled" setclrfld.long 0x00 12. 0x04 12. 0x08 12. " CAP2MCI0_RE_set/clr ,Enable capture event on channel 2 on the rising edge of the MCI0 input" "Disabled,Enabled" textline " " setclrfld.long 0x00 11. 0x04 11. 0x08 11. " CAP1MCI2_FE_set/clr ,Enable capture event on channel 1 on the falling edge of the MCI2 input" "Disabled,Enabled" setclrfld.long 0x00 10. 0x04 10. 0x08 10. " CAP1MCI2_RE_set/clr ,Enable capture event on channel 1 on the rising edge of the MCI2 input" "Disabled,Enabled" textline " " setclrfld.long 0x00 9. 0x04 9. 0x08 9. " CAP1MCI1_FE_set/clr ,Enable capture event on channel 1 on the falling edge of the MCI1 input" "Disabled,Enabled" setclrfld.long 0x00 8. 0x04 8. 0x08 8. " CAP1MCI1_RE_set/clr ,Enable capture event on channel 1 on the rising edge of the MCI1 input" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x04 7. 0x08 7. " CAP1MCI0_FE_set/clr ,Enable capture event on channel 1 on the falling edge of the MCI0 input" "Disabled,Enabled" setclrfld.long 0x00 6. 0x04 6. 0x08 6. " CAP1MCI0_RE_set/clr ,Enable capture event on channel 1 on the rising edge of the MCI0 input" "Disabled,Enabled" textline " " setclrfld.long 0x00 5. 0x04 5. 0x08 5. " CAP0MCI2_FE_set/clr ,Enable capture event on channel 0 on the falling edge of the MCI2 input" "Disabled,Enabled" setclrfld.long 0x00 4. 0x04 4. 0x08 4. " CAP0MCI2_RE_set/clr ,Enable capture event on channel 0 on the rising edge of the MCI2 input" "Disabled,Enabled" textline " " setclrfld.long 0x00 3. 0x04 3. 0x08 3. " CAP0MCI1_FE_set/clr ,Enable capture event on channel 0 on the falling edge of the MCI1 input." "Disabled,Enabled" setclrfld.long 0x00 2. 0x04 2. 0x08 2. " CAP0MCI1_RE_set/clr ,Enable capture event on channel 0 on the rising edge of the MCI1 input" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x04 1. 0x08 1. " CAP0MCI0_FE_set/clr ,Enable capture event on channel 0 on the falling edge of the MCI0 input" "Disabled,Enabled" setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CAP0MCI0_RE_set/clr ,Enable capture event on channel 0 on the rising edge of the MCI0 input" "Disabled,Enabled" group.long 0x50++0x3 line.long 0x00 "MCINTEN,MCPWM interrupt enable register" setclrfld.long 0x00 15. 0x04 15. 0x08 15. " ABORT_set/clr ,Fast abort interrupt" "Disabled,Enabled" setclrfld.long 0x00 10. 0x04 10. 0x08 10. " ICAP2_set/clr ,Capture interrupt for channels 2" "Disabled,Enabled" textline " " setclrfld.long 0x00 9. 0x04 9. 0x08 9. " IMAT2_set/clr ,Match interrupt for channels 2" "Disabled,Enabled" setclrfld.long 0x00 8. 0x04 8. 0x08 8. " ILIM2_set/clr ,Limit interrupt for channels 2" "Disabled,Enabled" textline " " setclrfld.long 0x00 6. 0x04 6. 0x08 6. " ICAP1_set/clr ,Capture interrupt for channels 1" "Disabled,Enabled" setclrfld.long 0x00 5. 0x04 5. 0x08 5. " IMAT1_set/clr ,Match interrupt for channels 1" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x04 4. 0x08 4. " ILIM1_set/clr ,Limit interrupt for channels 1" "Disabled,Enabled" setclrfld.long 0x00 2. 0x04 2. 0x08 2. " ICAP0_set/clr ,Capture interrupt for channel 0" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x04 1. 0x08 1. " IMAT0_set/clr ,Match interrupt for channel 0" "Disabled,Enabled" setclrfld.long 0x00 0. 0x04 0. 0x08 0. " ILIM0_set/clr ,Limit interrupt for channel 0" "Disabled,Enabled" group.long 0x68++0x3 line.long 0x00 "MCINTF,MCPWM interrupt flags register" setclrfld.long 0x00 15. 0x04 15. 0x08 15. " ABORT_set/clr ,Fast abort interrupt" "Cleared,Set" setclrfld.long 0x00 10. 0x04 10. 0x08 10. " ICAP2_set/clr ,Capture interrupt for channels 2" "Cleared,Set" textline " " setclrfld.long 0x00 9. 0x04 9. 0x08 9. " IMAT2_set/clr ,Match interrupt for channels 2" "Cleared,Set" setclrfld.long 0x00 8. 0x04 8. 0x08 8. " ILIM2_set/clr ,Limit interrupt for channels 2" "Cleared,Set" textline " " setclrfld.long 0x00 6. 0x04 6. 0x08 6. " ICAP1_set/clr ,Capture interrupt for channels 1" "Cleared,Set" setclrfld.long 0x00 5. 0x04 5. 0x08 5. " IMAT1_set/clr ,Match interrupt for channels 1" "Cleared,Set" textline " " setclrfld.long 0x00 4. 0x04 4. 0x08 4. " ILIM1_set/clr ,Limit interrupt for channels 1" "Cleared,Set" setclrfld.long 0x00 2. 0x04 2. 0x08 2. " ICAP0_set/clr ,Capture interrupt for channel 0" "Cleared,Set" textline " " setclrfld.long 0x00 1. 0x04 1. 0x08 1. " IMAT0_set/clr ,Match interrupt for channel 0" "Cleared,Set" setclrfld.long 0x00 0. 0x04 0. 0x08 0. " ILIM0_set/clr ,Limit interrupt for channel 0" "Cleared,Set" group.long 0x5c++0x3 line.long 0x00 "MCCNTCON,MCPWM Count Control Register" setclrfld.long 0x00 31. 0x04 31. 0x08 31. " CNTR2_set/clr ,Channel 2 mode" "Timer,Counter" setclrfld.long 0x00 30. 0x04 30. 0x08 30. " CNTR1_set/clr ,Channel 1 mode" "Timer,Counter" textline " " setclrfld.long 0x00 29. 0x04 29. 0x08 29. " CNTR0_set/clr ,Channel 0 mode" "Timer,Counter" setclrfld.long 0x00 17. 0x04 17. 0x08 17. " TC2MCI2_FE_set/clr ,Counter 2 advances on a falling edge on MCI2" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x04 16. 0x08 16. " TC2MCI2_RE_set/clr ,Counter 2 advances on a rising edge on MCI2" "Disabled,Enabled" setclrfld.long 0x00 15. 0x04 15. 0x08 15. " TC2MCI1_FE_set/clr ,Counter 2 advances on a falling edge on MCI1" "Disabled,Enabled" textline " " setclrfld.long 0x00 14. 0x04 14. 0x08 14. " TC2MCI1_RE_set/clr ,Counter 2 advances on a rising edge on MCI1" "Disabled,Enabled" setclrfld.long 0x00 13. 0x04 13. 0x08 13. " TC2MCI0_FE_set/clr ,counter 2 advances on a falling edge on MCI0" "Disabled,Enabled" textline " " setclrfld.long 0x00 12. 0x04 12. 0x08 12. " TC2MCI0_RE_set/clr ,Counter 2 advances on a rising edge on MCI0" "Disabled,Enabled" setclrfld.long 0x00 11. 0x04 11. 0x08 11. " TC1MCI2_FE_set/clr ,counter 1 advances on a falling edge on MCI2" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x04 10. 0x08 10. " TC1MCI2_RE_set/clr ,Counter 1 advances on a rising edge on MCI2" "Disabled,Enabled" setclrfld.long 0x00 9. 0x04 9. 0x08 9. " TC1MCI1_FE_set/clr ,Counter 1 advances on a falling edge on MCI1" "Disabled,Enabled" textline " " setclrfld.long 0x00 8. 0x04 8. 0x08 8. " TC1MCI1_RE_set/clr ,Counter 1 advances on a rising edge on MCI1" "Disabled,Enabled" setclrfld.long 0x00 7. 0x04 7. 0x08 7. " TC1MCI0_FE_set/clr ,Counter 1 advances on a falling edge on MCI0" "Disabled,Enabled" textline " " setclrfld.long 0x00 6. 0x04 6. 0x08 6. " TC1MCI0_RE_set/clr ,Counter 1 advances on a rising edge on MCI0" "Disabled,Enabled" setclrfld.long 0x00 5. 0x04 5. 0x08 5. " TC0MCI2_FE_set/clr ,Counter 0 advances on a falling edge on MCI2" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x04 4. 0x08 4. " TC0MCI2_RE_set/clr , Counter 0 advances on a rising edge on MCI2" "Disabled,Enabled" setclrfld.long 0x00 3. 0x04 3. 0x08 3. " TC0MCI1_FE_set/clr ,Counter 0 advances on a falling edge on MCI1" "Disabled,Enabled" textline " " setclrfld.long 0x00 2. 0x04 2. 0x08 2. " TC0MCI1_RE_set/clr ,Counter 0 advances on a rising edge on MCI1" "Disabled,Enabled" setclrfld.long 0x00 1. 0x04 1. 0x08 1. " TC0MCI0_FE_set/clr ,Counter 0 advances on a falling edge on MCI0" "Disabled,Enabled" textline " " setclrfld.long 0x00 0. 0x04 0. 0x08 0. " TC0MCI0_RE_set/clr ,Counter 0 advances on a rising edge on MCI0" "Disabled,Enabled" group.long 0x18++0x23 line.long 0x00 "MCTC0,MCPWM Timer value registers 0" line.long 0x04 "MCTC1,MCPWM Timer value registers 1" line.long 0x08 "MCTC2,MCPWM Timer value registers 2" line.long 0x0C "MCLIM0,MCPWM Limit value register 0" line.long 0x10 "MCLIM1,MCPWM Limit value register 1" line.long 0x14 "MCLIM2,MCPWM Limit value register 2" line.long 0x18 "MCMAT0,MCPWM Match value register 0" line.long 0x1C "MCMAT1,MCPWM Match value register 1" line.long 0x20 "MCMAT2,MCPWM Match value register 2" width 11. if ((per.l(ad:0x400B8000)&0x40000000)==0x0) group.long 0x3C++0x3 line.long 0x00 "MCDT,MCPWM Dead-time register" hexmask.long.word 0x00 20.--29. 1. " DT2 ,Dead time for channel 2" hexmask.long.word 0x00 10.--19. 1. " DT1 ,Dead time for channel 1" hexmask.long.word 0x00 0.--9. 1. " DT0 ,Dead time for channel 0" else group.long 0x3C++0x3 line.long 0x00 "MCDT,MCPWM Dead-time register" hexmask.long.word 0x00 0.--9. 1. " DT0 ,Dead time for all three channels" endif if ((per.l(ad:0x400B8000)&0x80000000)==0x80000000) group.long 0x40++0x3 line.long 0x00 "MCCP,MCPWM Communication pattern register" bitfld.long 0x00 5. " CCPB2 ,MCO2B control" "Off,Tracks MCOA0" bitfld.long 0x00 4. " CCPA2 ,MCO2A control" "Off,Tracks MCOA0" textline " " bitfld.long 0x00 3. " CCPB1 ,MCO1B control" "Off,Tracks MCOA0" bitfld.long 0x00 2. " CCPA1 ,MCO1A control" "Off,Tracks MCOA0" textline " " bitfld.long 0x00 1. " CCPB0 ,MCO0B control" "Off,Tracks MCOA0" bitfld.long 0x00 0. " CCPA0 ,MCO0A control" "Off,Active" else hgroup.long 0x40++0x3 hide.long 0x00 "MCCP,MCPWM Communication pattern register" endif rgroup.long 0x44++0xB line.long 0x00 "MCCAP0,TC value at a capture event for channel 0" line.long 0x04 "MCCAP1,TC value at a capture event for channel 1" line.long 0x08 "MCCAP2,TC value at a capture event for channel 2" wgroup.long 0x74++0x3 line.long 0x00 "MCCAP_CLR,MCPWM Capture register" bitfld.long 0x00 2. " CAP_CLR2 ,Clears the MCCAP2 register" "No effect,Clear" bitfld.long 0x00 1. " CAP_CLR1 ,Clears the MCCAP1 register" "No effect,Clear" bitfld.long 0x00 0. " CAP_CLR0 ,Clears the MCCAP0 register" "No effect,Clear" width 0xB tree.end sif (cpu()!="LPC1772"&&cpu()!="LPC1774"&&cpu()!="LPC1785") tree "QEI (Quadrature Encoder Interface)" base ad:0x400BC000 width 12. wgroup.long 0x00++0x3 line.long 0x00 "QEICON,QEI Control Register" bitfld.long 0x00 3. " RESI ,Reset index counter" "No effect,Reset" bitfld.long 0x00 2. " RESV ,Reset velocity" "No effect,Reset" textline " " bitfld.long 0x00 1. " RESPI ,Reset position counter on index" "No effect,Reset" bitfld.long 0x00 0. " RESP ,Reset position counter" "No effect,Reset" group.long 0x08++0x3 line.long 0x00 "QEICONF,QEI Configuration Register" sif (cpuis("LPC183*")||cpuis("LPC185*")||cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788"||cpu()=="LPC4330FBD144"||cpu()=="LPC4330FBD144-M0"||cpu()=="LPC4330FET100"||cpu()=="LPC4330FET100-M0"||cpu()=="LPC4330FET180"||cpu()=="LPC4330FET180-M0"||cpu()=="LPC4330FET256"||cpu()=="LPC4330FET256-M0"||cpu()=="LPC4350FBD208"||cpu()=="LPC4350FBD208-M0"||cpu()=="LPC4350FET180"||cpu()=="LPC4350FET180-M0"||cpu()=="LPC4350FET256"||cpu()=="LPC4350FET256-M0"||cpu()=="LPC4333FBD144"||cpu()=="LPC4333FBD144-M0"||cpu()=="LPC4333FET100"||cpu()=="LPC4333FET100-M0"||cpu()=="LPC4333FET180"||cpu()=="LPC4333FET180-M0"||cpu()=="LPC4333FET256"||cpu()=="LPC4333FET256-M0"||cpu()=="LPC4337FBD144"||cpu()=="LPC4337FBD144-M0"||cpu()=="LPC4337FET100"||cpu()=="LPC4337FET100-M0"||cpu()=="LPC4337FET180"||cpu()=="LPC4337FET180-M0"||cpu()=="LPC4337FET256"||cpu()=="LPC4337FET256-M0"||cpu()=="LPC4353FBD208"||cpu()=="LPC4353FBD208-M0"||cpu()=="LPC4353FET180"||cpu()=="LPC4353FET180-M0"||cpu()=="LPC4353FET256"||cpu()=="LPC4353FET256-M0"||cpu()=="LPC4357FBD208"||cpu()=="LPC4357FBD208-M0"||cpu()=="LPC4357FET256"||cpu()=="LPC4357FET256-M0")||(cpu()=="LPC4072FBD80")||(cpu()=="LPC4072FET80")||(cpu()=="LPC4074FBD144")||(cpu()=="LPC4076FBD144")||(cpu()=="LPC4076FET180")||(cpu()=="LPC4078FBD100")||(cpu()=="LPC4078FBD144")||(cpu()=="LPC4078FBD208")||(cpu()=="LPC4078FBD80")||(cpu()=="LPC4078FET180")||(cpu()=="LPC4078FET208")||(cpu()=="LPC4088FBD144")||(cpu()=="LPC4088FBD208")||(cpu()=="LPC4088FET180")||(cpu()=="LPC4088FET208") bitfld.long 0x00 19. " INXGATE[19] ,Index gating configuration(PHA=0,PHB=0)" "Not gated,Gated" bitfld.long 0x00 18. " INXGATE[18] ,Index gating configuration(PHA=0,PHB=1)" "Not gated,Gated" textline " " bitfld.long 0x00 17. " INXGATE[17] ,Index gating configuration(PHA=1,PHB=1)" "Not gated,Gated" bitfld.long 0x00 16. " INXGATE[16] ,Index gating configuration(PHA=1,PHB=0)" "Not gated,Gated" textline " " sif (cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788") bitfld.long 0x00 3. " CRESPI ,Continuously reset the position counter on index" "No reset,Reset" textline " " else bitfld.long 0x00 4. " CRESPI ,Continuously reset the position counter on index" "No reset,Reset" textline " " endif endif bitfld.long 0x00 3. " INVINX ,Invert Index" "Not inverted,Inverted" bitfld.long 0x00 2. " CAPMODE ,Capture Mode" "Only PhA,PhA/PhB" textline " " bitfld.long 0x00 1. " SIGMODE ,Signal Mode" "PhA/PhB quad,PhA-Dir/PhB-Clk" bitfld.long 0x00 0. " DIRINV ,Direction invert" "Not inverted,Inverted" rgroup.long 0x04++0x3 line.long 0x00 "QEISTAT,Encoder Status Register" bitfld.long 0x00 0. " DIR ,Direction bit" "Forward,Reverse" rgroup.long 0xC++0x3 line.long 0x00 "QEIPOS,QEI Position Register" group.long 0x10++0xF line.long 0x00 "QEIMAXPOS,QEI Maximum Position Register" line.long 0x04 "CMPOS0,Position Compare Register 0" line.long 0x08 "CMPOS1,Position Compare Register 1" line.long 0x0C "CMPOS2,Position Compare Register 2" rgroup.long 0x20++0x3 line.long 0x00 "INXCNT,Index Count Register" sif (cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788"||cpu()=="LPC4330FBD144"||cpu()=="LPC4330FBD144-M0"||cpu()=="LPC4330FET100"||cpu()=="LPC4330FET100-M0"||cpu()=="LPC4330FET180"||cpu()=="LPC4330FET180-M0"||cpu()=="LPC4330FET256"||cpu()=="LPC4330FET256-M0"||cpu()=="LPC4350FBD208"||cpu()=="LPC4350FBD208-M0"||cpu()=="LPC4350FET180"||cpu()=="LPC4350FET180-M0"||cpu()=="LPC4350FET256"||cpu()=="LPC4350FET256-M0"||cpu()=="LPC4333FBD144"||cpu()=="LPC4333FBD144-M0"||cpu()=="LPC4333FET100"||cpu()=="LPC4333FET100-M0"||cpu()=="LPC4333FET180"||cpu()=="LPC4333FET180-M0"||cpu()=="LPC4333FET256"||cpu()=="LPC4333FET256-M0"||cpu()=="LPC4337FBD144"||cpu()=="LPC4337FBD144-M0"||cpu()=="LPC4337FET100"||cpu()=="LPC4337FET100-M0"||cpu()=="LPC4337FET180"||cpu()=="LPC4337FET180-M0"||cpu()=="LPC4337FET256"||cpu()=="LPC4337FET256-M0"||cpu()=="LPC4353FBD208"||cpu()=="LPC4353FBD208-M0"||cpu()=="LPC4353FET180"||cpu()=="LPC4353FET180-M0"||cpu()=="LPC4353FET256"||cpu()=="LPC4353FET256-M0"||cpu()=="LPC4357FBD208"||cpu()=="LPC4357FBD208-M0"||cpu()=="LPC4357FET256"||cpu()=="LPC4357FET256-M0"||cpuis("LPC183*")||cpuis("LPC185*")) group.long 0x24++0x3 line.long 0x00 "INXCMP0,Index compare register 0" group.long 0x4C++0x7 line.long 0x00 "INXCMP1,Index compare register 1" line.long 0x04 "INXCMP2,Index compare register 2" elif (cpu()=="LPC4072FBD80")||(cpu()=="LPC4072FET80")||(cpu()=="LPC4074FBD144")||(cpu()=="LPC4076FBD144")||(cpu()=="LPC4076FET180")||(cpu()=="LPC4078FBD100")||(cpu()=="LPC4078FBD144")||(cpu()=="LPC4078FBD208")||(cpu()=="LPC4078FBD80")||(cpu()=="LPC4078FET180")||(cpu()=="LPC4078FET208")||(cpu()=="LPC4088FBD144")||(cpu()=="LPC4088FBD208")||(cpu()=="LPC4088FET180")||(cpu()=="LPC4088FET208") group.long 0x24++0x03 line.long 0x00 "INXCMP0,Index compare register 0" else group.long 0x24++0x3 line.long 0x00 "INXCMP,Index compare register" endif group.long 0x28++0x3 line.long 0x00 "QEILOAD,Velocity timer reload register" rgroup.long 0x2C++0xB line.long 0x00 "QEITIME,Velocity timer register" line.long 0x04 "QEIVEL,Velocity counter register" line.long 0x08 "QEICAP,Velocity capture register" group.long 0x38++0x3 line.long 0x00 "VELCOMP,Velocity compare register" sif (cpuis("LPC183*")||cpuis("LPC185*")||cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788"||cpu()=="LPC4330FBD144"||cpu()=="LPC4330FBD144-M0"||cpu()=="LPC4330FET100"||cpu()=="LPC4330FET100-M0"||cpu()=="LPC4330FET180"||cpu()=="LPC4330FET180-M0"||cpu()=="LPC4330FET256"||cpu()=="LPC4330FET256-M0"||cpu()=="LPC4350FBD208"||cpu()=="LPC4350FBD208-M0"||cpu()=="LPC4350FET180"||cpu()=="LPC4350FET180-M0"||cpu()=="LPC4350FET256"||cpu()=="LPC4350FET256-M0"||cpu()=="LPC4333FBD144"||cpu()=="LPC4333FBD144-M0"||cpu()=="LPC4333FET100"||cpu()=="LPC4333FET100-M0"||cpu()=="LPC4333FET180"||cpu()=="LPC4333FET180-M0"||cpu()=="LPC4333FET256"||cpu()=="LPC4333FET256-M0"||cpu()=="LPC4337FBD144"||cpu()=="LPC4337FBD144-M0"||cpu()=="LPC4337FET100"||cpu()=="LPC4337FET100-M0"||cpu()=="LPC4337FET180"||cpu()=="LPC4337FET180-M0"||cpu()=="LPC4337FET256"||cpu()=="LPC4337FET256-M0"||cpu()=="LPC4353FBD208"||cpu()=="LPC4353FBD208-M0"||cpu()=="LPC4353FET180"||cpu()=="LPC4353FET180-M0"||cpu()=="LPC4353FET256"||cpu()=="LPC4353FET256-M0"||cpu()=="LPC4357FBD208"||cpu()=="LPC4357FBD208-M0"||cpu()=="LPC4357FET256"||cpu()=="LPC4357FET256-M0")||(cpu()=="LPC4072FBD80")||(cpu()=="LPC4072FET80")||(cpu()=="LPC4074FBD144")||(cpu()=="LPC4076FBD144")||(cpu()=="LPC4076FET180")||(cpu()=="LPC4078FBD100")||(cpu()=="LPC4078FBD144")||(cpu()=="LPC4078FBD208")||(cpu()=="LPC4078FBD80")||(cpu()=="LPC4078FET180")||(cpu()=="LPC4078FET208")||(cpu()=="LPC4088FBD144")||(cpu()=="LPC4088FBD208")||(cpu()=="LPC4088FET180")||(cpu()=="LPC4088FET208") group.long 0x3C++0x0F line.long 0x00 "FILTERPHA,Digital filter on PHA register" line.long 0x04 "FILTERPHB,Digital filter on PHB register" line.long 0x08 "FILTERINX,Digital Filter on INX register" line.long 0x0C "WINDOW,QEI index acceptance Window" else group.long 0x3C++0x3 line.long 0x00 "FILTER,Digital filter register" endif group.long 0xFE0++0x7 line.long 0x00 "QEIINTSTAT,QEI Interrupt Status Register" sif (cpuis("LPC183*")||cpuis("LPC185*")||cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788"||cpu()=="LPC4330FBD144"||cpu()=="LPC4330FBD144-M0"||cpu()=="LPC4330FET100"||cpu()=="LPC4330FET100-M0"||cpu()=="LPC4330FET180"||cpu()=="LPC4330FET180-M0"||cpu()=="LPC4330FET256"||cpu()=="LPC4330FET256-M0"||cpu()=="LPC4350FBD208"||cpu()=="LPC4350FBD208-M0"||cpu()=="LPC4350FET180"||cpu()=="LPC4350FET180-M0"||cpu()=="LPC4350FET256"||cpu()=="LPC4350FET256-M0"||cpu()=="LPC4333FBD144"||cpu()=="LPC4333FBD144-M0"||cpu()=="LPC4333FET100"||cpu()=="LPC4333FET100-M0"||cpu()=="LPC4333FET180"||cpu()=="LPC4333FET180-M0"||cpu()=="LPC4333FET256"||cpu()=="LPC4333FET256-M0"||cpu()=="LPC4337FBD144"||cpu()=="LPC4337FBD144-M0"||cpu()=="LPC4337FET100"||cpu()=="LPC4337FET100-M0"||cpu()=="LPC4337FET180"||cpu()=="LPC4337FET180-M0"||cpu()=="LPC4337FET256"||cpu()=="LPC4337FET256-M0"||cpu()=="LPC4353FBD208"||cpu()=="LPC4353FBD208-M0"||cpu()=="LPC4353FET180"||cpu()=="LPC4353FET180-M0"||cpu()=="LPC4353FET256"||cpu()=="LPC4353FET256-M0"||cpu()=="LPC4357FBD208"||cpu()=="LPC4357FBD208-M0"||cpu()=="LPC4357FET256"||cpu()=="LPC4357FET256-M0")||(cpu()=="LPC4072FBD80")||(cpu()=="LPC4072FET80")||(cpu()=="LPC4074FBD144")||(cpu()=="LPC4076FBD144")||(cpu()=="LPC4076FET180")||(cpu()=="LPC4078FBD100")||(cpu()=="LPC4078FBD144")||(cpu()=="LPC4078FBD208")||(cpu()=="LPC4078FBD80")||(cpu()=="LPC4078FET180")||(cpu()=="LPC4078FET208")||(cpu()=="LPC4088FBD144")||(cpu()=="LPC4088FBD208")||(cpu()=="LPC4088FET180")||(cpu()=="LPC4088FET208") setclrfld.long 0x00 15. 0x0C 15. 0x08 15. " MAXPOS_Int_set/clr ,The current position count goes through the MAXPOS value to zero in the forward direction" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 14. 0x0C 14. 0x08 14. " REV2_Int_set/clr ,The index compare 2 value is equal to the current index count" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 13. 0x0C 13. 0x08 13. " REV1_Int_set/clr ,The index compare 1 value is equal to the current index count" "No interrupt,Interrupt" textline " " endif setclrfld.long 0x00 12. 0x0C 12. 0x08 12. " POS2REV_Int_set/clr ,Combined position 2 and revolution count interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 11. 0x0C 11. 0x08 11. " POS1REV_Int_set/clr ,Combined position 1 and revolution count interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 10. 0x0C 10. 0x08 10. " POS0REV_Int_set/clr ,Combined position 0 and revolution count interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 9. 0x0C 9. 0x08 9. " REV0_Int_set/clr ,The index compare value is equal to the current index count" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 8. 0x0C 8. 0x08 8. " POS2_Int_set/clr ,The position 2 compare value is equal to the current position" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 7. 0x0C 7. 0x08 7. " POS1_Int_set/clr ,The position 1 compare value is equal to the current position" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 6. 0x0C 6. 0x08 6. " POS0_Int_set/clr ,The position 0 compare value is equal to the current position" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 5. 0x0C 5. 0x08 5. " ENCLK_Int_set/clr ,Encoder clock pulse was detected" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 4. 0x0C 4. 0x08 4. " ERR_Int_set/clr ,Encoder phase error was detected" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 3. 0x0C 3. 0x08 3. " DIR_Int_set/clr ,Change of direction was detected" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 2. 0x0C 2. 0x08 2. " VELC_Int_set/clr ,Captured velocity is less than compare velocity" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 1. 0x0C 1. 0x08 1. " TIM_Int_set/clr ,Velocity timer overflow occured" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 0. 0x0C 0. 0x08 0. " INX_Int_set/clr ,Index pulse was detected" "No interrupt,Interrupt" line.long 0x04 "QEIIE,QEI Interrupt Enable Register" sif (cpuis("LPC183*")||cpuis("LPC185*")||cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788"||cpu()=="LPC4330FBD144"||cpu()=="LPC4330FBD144-M0"||cpu()=="LPC4330FET100"||cpu()=="LPC4330FET100-M0"||cpu()=="LPC4330FET180"||cpu()=="LPC4330FET180-M0"||cpu()=="LPC4330FET256"||cpu()=="LPC4330FET256-M0"||cpu()=="LPC4350FBD208"||cpu()=="LPC4350FBD208-M0"||cpu()=="LPC4350FET180"||cpu()=="LPC4350FET180-M0"||cpu()=="LPC4350FET256"||cpu()=="LPC4350FET256-M0"||cpu()=="LPC4333FBD144"||cpu()=="LPC4333FBD144-M0"||cpu()=="LPC4333FET100"||cpu()=="LPC4333FET100-M0"||cpu()=="LPC4333FET180"||cpu()=="LPC4333FET180-M0"||cpu()=="LPC4333FET256"||cpu()=="LPC4333FET256-M0"||cpu()=="LPC4337FBD144"||cpu()=="LPC4337FBD144-M0"||cpu()=="LPC4337FET100"||cpu()=="LPC4337FET100-M0"||cpu()=="LPC4337FET180"||cpu()=="LPC4337FET180-M0"||cpu()=="LPC4337FET256"||cpu()=="LPC4337FET256-M0"||cpu()=="LPC4353FBD208"||cpu()=="LPC4353FBD208-M0"||cpu()=="LPC4353FET180"||cpu()=="LPC4353FET180-M0"||cpu()=="LPC4353FET256"||cpu()=="LPC4353FET256-M0"||cpu()=="LPC4357FBD208"||cpu()=="LPC4357FBD208-M0"||cpu()=="LPC4357FET256"||cpu()=="LPC4357FET256-M0")||(cpu()=="LPC4072FBD80")||(cpu()=="LPC4072FET80")||(cpu()=="LPC4074FBD144")||(cpu()=="LPC4076FBD144")||(cpu()=="LPC4076FET180")||(cpu()=="LPC4078FBD100")||(cpu()=="LPC4078FBD144")||(cpu()=="LPC4078FBD208")||(cpu()=="LPC4078FBD80")||(cpu()=="LPC4078FET180")||(cpu()=="LPC4078FET208")||(cpu()=="LPC4088FBD144")||(cpu()=="LPC4088FBD208")||(cpu()=="LPC4088FET180")||(cpu()=="LPC4088FET208") setclrfld.long 0x04 15. -0x04 15. -0x08 15. " MAXPOS_Int_set/clr ,The current position count goes through the MAXPOS value to zero in the forward direction" "Disabled,Enabled" textline " " setclrfld.long 0x04 14. -0x04 14. -0x08 14. " REV2_Int_set/clr ,The index compare 2 value is equal to the current index count" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. -0x04 13. -0x08 13. " REV1_Int_set/clr ,The index compare 1 value is equal to the current index count" "Disabled,Enabled" textline " " endif setclrfld.long 0x04 12. -0x04 12. -0x08 12. " POS2REV_Int_set/clr ,Combined position 2 and revolution count interrupt" "Disabled,Enabled" textline " " setclrfld.long 0x04 11. -0x04 11. -0x08 11. " POS1REV_Int_set/clr ,Combined position 1 and revolution count interrupt" "Disabled,Enabled" textline " " setclrfld.long 0x04 10. -0x04 10. -0x08 10. " POS0REV_Int_set/clr ,Combined position 0 and revolution count interrupt" "Disabled,Enabled" textline " " setclrfld.long 0x04 9. -0x04 9. -0x08 9. " REV_Int_set/clr ,The index compare value is equal to the current index count" "Disabled,Enabled" textline " " setclrfld.long 0x04 8. -0x04 8. -0x08 8. " POS2_Int_set/clr ,The position 2 compare value is equal to the current position" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. -0x04 7. -0x08 7. " POS1_Int_set/clr ,The position 1 compare value is equal to the current position" "Disabled,Enabled" textline " " setclrfld.long 0x04 6. -0x04 6. -0x08 6. " POS0_Int_set/clr ,The position 0 compare value is equal to the current position" "Disabled,Enabled" textline " " setclrfld.long 0x04 5. -0x04 5. -0x08 5. " ENCLK_Int_set/clr ,Encoder clock pulse was detected" "Disabled,Enabled" textline " " setclrfld.long 0x04 4. -0x04 4. -0x08 4. " ERR_Int_set/clr ,Encoder phase error was detected" "Disabled,Enabled" textline " " setclrfld.long 0x04 3. -0x04 3. -0x08 3. " DIR_Int_set/clr ,Change of direction was detected" "Disabled,Enabled" textline " " setclrfld.long 0x04 2. -0x04 2. -0x08 2. " VELC_Int_set/clr ,Captured velocity is less than compare velocity" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. -0x04 1. -0x08 1. " TIM_Int_set/clr ,Velocity timer overflow occured" "Disabled,Enabled" textline " " setclrfld.long 0x04 0. -0x04 0. -0x08 0. " INX_Int_set/clr ,Index pulse was detected" "Disabled,Enabled" width 0xB tree.end endif tree "RTC (Real-Time Clock)" base ad:0x40024000 width 13. group.long 0x00++0x03 line.long 0x00 "ILR,Interrupt Location Register" bitfld.long 0x00 1. " RTCALF ,RTC Alarm Register Interrupt" "Not occurred,Occurred" bitfld.long 0x00 0. " RTCCIF ,RTC Counter Increment Interrupt" "Not occurred,Occurred" sif (cpu()=="LPC4072FBD80")||(cpu()=="LPC4072FET80")||(cpu()=="LPC4074FBD144")||(cpu()=="LPC4076FBD144")||(cpu()=="LPC4076FET180")||(cpu()=="LPC4078FBD100")||(cpu()=="LPC4078FBD144")||(cpu()=="LPC4078FBD208")||(cpu()=="LPC4078FBD80")||(cpu()=="LPC4078FET180")||(cpu()=="LPC4078FET208")||(cpu()=="LPC4088FBD144")||(cpu()=="LPC4088FBD208")||(cpu()=="LPC4088FET180")||(cpu()=="LPC4088FET208") group.long 0x08++0x0B line.long 0x00 "CCR,Clock Control Register" bitfld.long 0x00 4. " CCALEN ,Calibration counter enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " CTCRST ,CTC Reset" "No reset,Reset" bitfld.long 0x00 0. " CLKEN ,Clock Enable" "Disabled,Enabled" else group.long 0x08++0x0B line.long 0x00 "CCR,Clock Control Register" bitfld.long 0x00 4. " CCALEN ,Calibration counter enable" "Disabled,Enabled" bitfld.long 0x00 2.--3. " TEST ,Internal test mode control" "00,01,10,11" textline " " bitfld.long 0x00 1. " CTCRST ,CTC Reset" "No reset,Reset" bitfld.long 0x00 0. " CLKEN ,Clock Enable" "Disabled,Enabled" endif line.long 0x04 "CIIR,Counter Increment Interrupt Register" bitfld.long 0x04 7. " IMYEAR ,Year Value Increment Interrupt" "Disabled,Enabled" bitfld.long 0x04 6. " IMMON ,Month Value Increment Interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 5. " IMDOY ,Day of Year Value Increment Interrupt" "Disabled,Enabled" bitfld.long 0x04 4. " IMDOW ,Day of Week Value Increment Interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 3. " IMDOM ,Day of Month Value Increment Interrupt" "Disabled,Enabled" bitfld.long 0x04 2. " IMHOUR ,Hour Value Increment Interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " IMMIN ,Minute Value Increment Interrupt" "Disabled,Enabled" bitfld.long 0x04 0. " IMSEC ,Second Value Increment Interrupt" "Disabled,Enabled" line.long 0x08 "AMR,Alarm Mask Register" bitfld.long 0x08 7. " AMRYEAR ,Year Value Alarm Comparison" "Enabled,Disabled" bitfld.long 0x08 6. " AMRMON ,Month Value Alarm Comparison" "Enabled,Disabled" textline " " bitfld.long 0x08 5. " AMRDOY ,Fay of Year Value Alarm Comparison" "Enabled,Disabled" bitfld.long 0x08 4. " AMRDOW ,Day of Value Alarm Comparison" "Enabled,Disabled" textline " " bitfld.long 0x08 3. " AMRDOM ,Day of Month Value Alarm Comparison" "Enabled,Disabled" bitfld.long 0x08 2. " AMRHOUR ,Hour Value Alarm Comparison" "Enabled,Disabled" textline " " bitfld.long 0x08 1. " AMRMIN ,Minutes Value Alarm Comparison" "Enabled,Disabled" bitfld.long 0x08 0. " AMRSEC ,Second Value Alarm Comparison" "Enabled,Disabled" sif (cpu()!="LPC1810"&&cpu()!="LPC1820"&&cpu()!="LPC1830"&&cpu()!="LPC1850"&&cpu()!="LPC1853"&&cpu()!="LPC1857"&&cpu()!="LPC4310FBD144"&&cpu()!="LPC4310FBD144-M0"&&cpu()!="LPC4310FET100"&&cpu()!="LPC4310FET100-M0"&&cpu()!="LPC4320FBD100"&&cpu()!="LPC4320FBD100-M0"&&cpu()!="LPC4320FBD144"&&cpu()!="LPC4320FBD144-M0"&&cpu()!="LPC4320FET100"&&cpu()!="LPC4320FET100-M0"&&cpu()!="LPC4330FBD144"&&cpu()!="LPC4330FBD144-M0"&&cpu()!="LPC4330FET100"&&cpu()!="LPC4330FET100-M0"&&cpu()!="LPC4330FET180"&&cpu()!="LPC4330FET180-M0"&&cpu()!="LPC4330FET256"&&cpu()!="LPC4330FET256-M0"&&cpu()!="LPC4350FBD208"&&cpu()!="LPC4350FBD208-M0"&&cpu()!="LPC4350FET180"&&cpu()!="LPC4350FET180-M0"&&cpu()!="LPC4350FET256"&&cpu()!="LPC4350FET256-M0"&&cpu()!="LPC4333FBD144"&&cpu()!="LPC4333FBD144-M0"&&cpu()!="LPC4333FET100"&&cpu()!="LPC4333FET100-M0"&&cpu()!="LPC4333FET180"&&cpu()!="LPC4333FET180-M0"&&cpu()!="LPC4333FET256"&&cpu()!="LPC4333FET256-M0"&&cpu()!="LPC4337FBD144"&&cpu()!="LPC4337FBD144-M0"&&cpu()!="LPC4337FET100"&&cpu()!="LPC4337FET100-M0"&&cpu()!="LPC4337FET180"&&cpu()!="LPC4337FET180-M0"&&cpu()!="LPC4337FET256"&&cpu()!="LPC4337FET256-M0"&&cpu()!="LPC4353FBD208"&&cpu()!="LPC4353FBD208-M0"&&cpu()!="LPC4353FET180"&&cpu()!="LPC4353FET180-M0"&&cpu()!="LPC4353FET256"&&cpu()!="LPC4353FET256-M0"&&cpu()!="LPC4357FBD208"&&cpu()!="LPC4357FBD208-M0"&&cpu()!="LPC4357FET256"&&cpu()!="LPC4357FET256-M0")||(cpu()=="LPC4072FBD80")||(cpu()=="LPC4072FET80")||(cpu()=="LPC4074FBD144")||(cpu()=="LPC4076FBD144")||(cpu()=="LPC4076FET180")||(cpu()=="LPC4078FBD100")||(cpu()=="LPC4078FBD144")||(cpu()=="LPC4078FBD208")||(cpu()=="LPC4078FBD80")||(cpu()=="LPC4078FET180")||(cpu()=="LPC4078FET208")||(cpu()=="LPC4088FBD144")||(cpu()=="LPC4088FBD208")||(cpu()=="LPC4088FET180")||(cpu()=="LPC4088FET208") group.long 0x58++0x7 line.long 0x04 "RTC_AUX,RTC Auxiliary control register" sif (cpu()=="LPC1772"||cpu()=="LPC1774"||cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778"||cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788")||(cpu()=="LPC4072FBD80")||(cpu()=="LPC4072FET80")||(cpu()=="LPC4074FBD144")||(cpu()=="LPC4076FBD144")||(cpu()=="LPC4076FET180")||(cpu()=="LPC4078FBD100")||(cpu()=="LPC4078FBD144")||(cpu()=="LPC4078FBD208")||(cpu()=="LPC4078FBD80")||(cpu()=="LPC4078FET180")||(cpu()=="LPC4078FET208")||(cpu()=="LPC4088FBD144")||(cpu()=="LPC4088FBD208")||(cpu()=="LPC4088FET180")||(cpu()=="LPC4088FET208") bitfld.long 0x04 6. " RTC_PDOUT ,Deep Power-down mode enable" "Disabled,Enabled" textline " " endif eventfld.long 0x04 4. " RTC_OSCF ,RTC Oscillator Fail detect flag" "Not occurred,Occurred" line.long 0x00 "RTC_AUXEN,RTC Auxiliary Enable register" bitfld.long 0x00 4. " RTC_OSCFEN ,Oscillator Fail Detect interrupt enable" "Disabled,Enabled" endif rgroup.long 0x14++0x03 line.long 0x00 "CTIME0,Consolidated Time Register 0" bitfld.long 0x00 24.--26. " DAY_OF_WEEK ,Day of week" "Sun,Mon,Tue,Wed,Thu,Fri,Sat,?..." bitfld.long 0x00 16.--20. " HOURS ,Hour" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x00 8.--13. " MINUTES ,Minutes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,?..." bitfld.long 0x00 0.--5. " SECONDS ,Seconds" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,?..." if (((per.l(ad:0x40024000+0x18)&0xF00)==0x200)&&(per.l(ad:0x40024000+0x18)&0x30000)==0) rgroup.long 0x18++0x03 line.long 0x0 "CTIME1,Consolidated Time Register 1" hexmask.long.word 0x0 16.--27. 1. " YEAR ,Year" bitfld.long 0x0 8.--11. " MONTH ,Month" "Reserved,Jan,Feb,Mar,Apr,May,Jun,Jul,Aug,Sep,Oct,Nov,Dec,?..." textline " " bitfld.long 0x0 0.--4. " DAY_OF_MONTH ,Day of Month" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,?..." elif ((per.l(ad:0x40024000+0x18)&0xF00)==0x200) rgroup.long 0x18++0x03 line.long 0x0 "CTIME1,Consolidated Time Register 1" hexmask.long.word 0x0 16.--27. 1. " YEAR ,Year" bitfld.long 0x0 8.--11. " MONTH ,Month" "Reserved,Jan,Feb,Mar,Apr,May,Jun,Jul,Aug,Sep,Oct,Nov,Dec,?..." textline " " bitfld.long 0x0 0.--4. " DAY_OF_MONTH ,Day of Month" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,?..." elif ((per.l(ad:0x40024000+0x18)&0xF00)==(0x400||0x600||0x900||0xB00)) rgroup.long 0x18++0x03 line.long 0x0 "CTIME1,Consolidated Time Register 1" hexmask.long.word 0x0 16.--27. 1. " YEAR ,Year" bitfld.long 0x0 8.--11. " MONTH ,Month" "Reserved,Jan,Feb,Mar,Apr,May,Jun,Jul,Aug,Sep,Oct,Nov,Dec,?..." textline " " bitfld.long 0x0 0.--4. " DAY_OF_MONTH ,Day of Month" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,?..." else rgroup.long 0x18++0x03 line.long 0x0 "CTIME1,Consolidated Time Register 1" hexmask.long.word 0x0 16.--27. 1. " YEAR ,Year" bitfld.long 0x0 8.--11. " MONTH ,Month" "Reserved,Jan,Feb,Mar,Apr,May,Jun,Jul,Aug,Sep,Oct,Nov,Dec,?..." textline " " bitfld.long 0x0 0.--4. " DAY_OF_MONTH ,Day of Month" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif rgroup.long 0x1C++0x03 line.long 0x0 "CTIME2,Consolidated Time Register 2" hexmask.long.word 0x0 0.--11. 1. " DAY_OF_YEAR ,Day of Year" group.long 0x20++0xB line.long 0x00 "SEC,Seconds Register" bitfld.long 0x00 0.--5. " SEC ,Seconds" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,?..." line.long 0x04 "MIN,Minutes Register" bitfld.long 0x04 0.--5. " MIN ,Minutes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,?..." line.long 0x08 "HOUR,Hours Register" bitfld.long 0x08 0.--4. " HOUR ,Hours" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." if (((per.l(ad:0x40024000+0x38)&0xF)==0x02)&&((per.l(ad:0x40024000+0x3c)&0x3)==0x0)) group.long 0x2C++0x3 line.long 0x0 "DOM,Day of Month Register" bitfld.long 0x0 0.--4. " DOM ,Day of Month" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,?..." elif ((per.l(ad:0x40024000+0x38)&0xF)==0x02) group.long 0x2C++0x3 line.long 0x0 "DOM,Day of Month Register" bitfld.long 0x0 0.--4. " DOM ,Day of Month" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,?..." elif ((per.l(ad:0x40024000+0x38)&0xF)==(0x04||0x06||0x09||0x0B)) group.long 0x2C++0x3 line.long 0x0 "DOM,Day of Month Register" bitfld.long 0x0 0.--4. " DOM ,Day of Month" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,?..." else group.long 0x2C++0x3 line.long 0x0 "DOM,Day of Month Register" bitfld.long 0x0 0.--4. " DOM ,Day of Month" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif group.long 0x30++0x27 line.long 0x0 "DOW,Day of Week Register" bitfld.long 0x0 0.--2. " DOW ,Day of Week" "Sun,Mon,Tue,Wed,Thu,Fri,Sat,?..." line.long 0x4 "DOY,Day of Year Register" hexmask.long.word 0x4 0.--8. 1. " DOY ,Day of Year" line.long 0x8 "MONTH,Months Register" bitfld.long 0x8 0.--3. " MONTH ,Month" "Reserved,Jan,Feb,Mar,Apr,May,Jun,Jul,Aug,Sep,Oct,Nov,Dec,?..." line.long 0xC "YEAR,Years Register" hexmask.long.word 0xC 0.--11. 1. " YEAR ,Year" line.long 0x10 "CALIBRATION,Calibration Register" bitfld.long 0x10 17. " CALDIR ,Calibration direction" "Forward,Backward" hexmask.long.tbyte 0x10 0.--16. 1. " CALVAL ,Calibration value" sif (cpu()!="LPC1810"&&cpu()!="LPC1820"&&cpu()!="LPC1830"&&cpu()!="LPC1850"&&cpu()!="LPC1853"&&cpu()!="LPC1857"&&cpu()!="LPC4310FBD144"&&cpu()!="LPC4310FBD144-M0"&&cpu()!="LPC4310FET100"&&cpu()!="LPC4310FET100-M0"&&cpu()!="LPC4320FBD100"&&cpu()!="LPC4320FBD100-M0"&&cpu()!="LPC4320FBD144"&&cpu()!="LPC4320FBD144-M0"&&cpu()!="LPC4320FET100"&&cpu()!="LPC4320FET100-M0"&&cpu()!="LPC4330FBD144"&&cpu()!="LPC4330FBD144-M0"&&cpu()!="LPC4330FET100"&&cpu()!="LPC4330FET100-M0"&&cpu()!="LPC4330FET180"&&cpu()!="LPC4330FET180-M0"&&cpu()!="LPC4330FET256"&&cpu()!="LPC4330FET256-M0"&&cpu()!="LPC4350FBD208"&&cpu()!="LPC4350FBD208-M0"&&cpu()!="LPC4350FET180"&&cpu()!="LPC4350FET180-M0"&&cpu()!="LPC4350FET256"&&cpu()!="LPC4350FET256-M0"&&cpu()!="LPC4333FBD144"&&cpu()!="LPC4333FBD144-M0"&&cpu()!="LPC4333FET100"&&cpu()!="LPC4333FET100-M0"&&cpu()!="LPC4333FET180"&&cpu()!="LPC4333FET180-M0"&&cpu()!="LPC4333FET256"&&cpu()!="LPC4333FET256-M0"&&cpu()!="LPC4337FBD144"&&cpu()!="LPC4337FBD144-M0"&&cpu()!="LPC4337FET100"&&cpu()!="LPC4337FET100-M0"&&cpu()!="LPC4337FET180"&&cpu()!="LPC4337FET180-M0"&&cpu()!="LPC4337FET256"&&cpu()!="LPC4337FET256-M0"&&cpu()!="LPC4353FBD208"&&cpu()!="LPC4353FBD208-M0"&&cpu()!="LPC4353FET180"&&cpu()!="LPC4353FET180-M0"&&cpu()!="LPC4353FET256"&&cpu()!="LPC4353FET256-M0"&&cpu()!="LPC4357FBD208"&&cpu()!="LPC4357FBD208-M0"&&cpu()!="LPC4357FET256"&&cpu()!="LPC4357FET256-M0")||(cpu()=="LPC4072FBD80")||(cpu()=="LPC4072FET80")||(cpu()=="LPC4074FBD144")||(cpu()=="LPC4076FBD144")||(cpu()=="LPC4076FET180")||(cpu()=="LPC4078FBD100")||(cpu()=="LPC4078FBD144")||(cpu()=="LPC4078FBD208")||(cpu()=="LPC4078FBD80")||(cpu()=="LPC4078FET180")||(cpu()=="LPC4078FET208")||(cpu()=="LPC4088FBD144")||(cpu()=="LPC4088FBD208")||(cpu()=="LPC4088FET180")||(cpu()=="LPC4088FET208") line.long 0x14 "GPREG0,General Purpose Registers 0" line.long 0x18 "GPREG1,General Purpose Registers 1" line.long 0x1c "GPREG2,General Purpose Registers 2" line.long 0x20 "GPREG3,General Purpose Registers 3" line.long 0x24 "GPREG4,General Purpose Registers 4" endif group.long 0x60++0xB line.long 0x0 "ALSEC,Alarm value for Seconds" bitfld.long 0x0 0.--5. " ALSEC ,Alarm Value for Seconds" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,?..." line.long 0x04 "ALMIN,Alarm value for Minutes" bitfld.long 0x04 0.--5. " ALMIN ,Alarm Value for Minutes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,?..." line.long 0x08 "ALHOUR,Alarm value for Hours" bitfld.long 0x08 0.--4. " ALHOUR ,Alarm Value for Hours" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." if (((per.l(ad:0x40024000+0x78)&0xF)==0x02)&&((per.l(ad:0x40024000+0x7c)&0x3)==0x0)) group.long 0x6C++0x3 line.long 0x0 "ALDOM,Alarm value for Day of Month" bitfld.long 0x0 0.--4. " ALDOM ,Alarm Value for Day of Month" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,?..." elif ((per.l(ad:0x40024000+0x78)&0xF)==0x02) group.long 0x6C++0x3 line.long 0x0 "ALDOM,Alarm value for Day of Month" bitfld.long 0x0 0.--4. " ALDOM ,Alarm Value for Day of Month" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,?..." elif ((per.l(ad:0x40024000+0x78)&0xF)==(0x04||0x06||0x09||0x78||0x0B)) group.long 0x6C++0x3 line.long 0x0 "ALDOM,Alarm value for Day of Month" bitfld.long 0x0 0.--4. " ALDOM ,Alarm Value for Day of Month" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,?..." else group.long 0x6C++0x3 line.long 0x0 "ALDOM,Alarm value for Day of Month" bitfld.long 0x0 0.--4. " ALDOM ,Alarm Value for Day of Month" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif group.long 0x70++0xF line.long 0x0 "ALDOW,Alarm value for Day of Week" bitfld.long 0x0 0.--2. " ALDOW ,Alarm Value for Day of Week" "Sun,Mon,Tue,Wed,Thu,Fri,Sat,?..." line.long 0x4 "ALDOY,Alarm value for Day of Year" hexmask.long.word 0x4 0.--8. 1. " ALDOY ,Alarm Value for Day of Year" line.long 0x8 "ALMON,Alarm value for Months" bitfld.long 0x8 0.--3. " ALMONTH ,Alarm Value for Month" "Reserved,Jan,Feb,Mar,Apr,May,Jun,Jul,Aug,Sep,Oct,Nov,Dec,?..." line.long 0xC "ALYEAR,Alarm value for Year" hexmask.long.word 0xC 0.--11. 1. " ALYEAR ,Alarm Value for Year" width 0x0B tree.end sif (cpu()=="LPC1774"||cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778"||cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788") tree "EMR (Event Monitor/Recorder)" base ad:0x40024000 width 15. group.long 0x84++0x3 line.long 0x00 "ERCONTROL,Event Monitor/Recorder Control Register" bitfld.long 0x00 30.--31. " ERMODE ,Event Monitor/Recorder enable and operating frequency select" "Disabled,Enabled (16Hz),Enabled (64Hz),Enabled (1kHz)" bitfld.long 0x00 23. " EV2_INPUT_EN ,Event enable control for channel 2" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " POL2 ,Polarity of an event on input pin RTC_EV2 select" "Negative,Positive" sif cpuis("LPC43S*") bitfld.long 0x00 21. " GPCLEAR_EN2 ,RTC general purpose registers clear when an event occurs on channel 2" "Not cleared,Cleared" textline " " endif bitfld.long 0x00 20. " INTWAKE_EN2 ,Interrupt and wakeup enable for channel 2" "Disabled,Enabled" bitfld.long 0x00 13. " EV1_INPUT_EN ,Event enable control for channel 1" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " POL1 ,Polarity of an event on input pin RTC_EV1 select" "Negative,Positive" sif cpuis("LPC43*") bitfld.long 0x00 11. " GPCLEAR_EN1 ,RTC general purpose registers clear when an event occurs on channel 1" "Not cleared,Cleared" textline " " endif bitfld.long 0x00 10. " INTWAKE_EN1 ,Interrupt and wakeup enable for channel 1" "Disabled,Enabled" bitfld.long 0x00 3. " EV0_INPUT_EN ,Event enable control for channel 0" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " POL0 ,Polarity of an event on input pin RTC_EV0 select" "Negative,Positive" bitfld.long 0x00 1. " GPCLEAR_EN0 ,RTC general purpose registers clear when an event occurs on channel 0" "Not cleared,Cleared" textline " " bitfld.long 0x00 0. " INTWAKE_EN0 ,Interrupt and wakeup enable for channel 0" "Disabled,Enabled" group.long 0x80++0x3 line.long 0x00 "ERSTATUS,Event Monitor/Recorder Status Register" eventfld.long 0x00 31. " WAKEUP ,Interrupt/wakeup request flag" "No interrupt,Interrupt" eventfld.long 0x00 3. " GP_CLEARED ,General purpose register asynchronous clear flag" "Not cleared,Cleared" textline " " eventfld.long 0x00 2. " EV2 ,Event flag for channel 2 (RTC_EV2 pin)" "No event,Event" eventfld.long 0x00 1. " EV1 ,Event flag for channel 1 (RTC_EV1 pin)" "No event,Event" textline " " eventfld.long 0x00 0. " EV0 ,Event flag for channel 0 (RTC_EV0 pin)" "No event,Event" rgroup.long 0x88++0x3 line.long 0x00 "ERCOUNTERS,Event Monitor/Recorder Counters Register" bitfld.long 0x00 16.--18. " COUNTER2 ,Value of the counter for event 2" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8.--10. " COUNTER1 ,Value of the counter for event 1" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 0.--2. " COUNTER0 ,Value of the counter for event 0" "0,1,2,3,4,5,6,7" if ((per.l(ad:0x40024000+0x80)&0x1)==0x1) rgroup.long 0x90++0x3 line.long 0x00 "ERFIRSTSTAMP0,Event Monitor/Recorder First Stamp Register for Channel 0" hexmask.long.word 0x00 17.--25. 1. " DAY ,Day of Year value in the range of 1 to 366" bitfld.long 0x00 12.--16. " HOUR ,Hours value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x00 6.--11. " MIN ,Minutes value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,?..." bitfld.long 0x00 0.--5. " SEC ,Seconds value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,?..." rgroup.long 0xA0++0x3 line.long 0x00 "ERLASTSTAMP0,Event Monitor/Recorder Last Stamp Register for Channel 0" hexmask.long.word 0x00 17.--25. 1. " DAY ,Day of Year value in the range of 1 to 366" bitfld.long 0x00 12.--16. " HOUR ,Hours value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x00 6.--11. " MIN ,Minutes value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,?..." bitfld.long 0x00 0.--5. " SEC ,Seconds value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,?..." else hgroup.long 0x90++0x3 hide.long 0x00 "ERFIRSTSTAMP0,Event Monitor/Recorder First Stamp Register for Channel 0" hgroup.long 0xA0++0x3 hide.long 0x00 "ERLASTSTAMP0,Event Monitor/Recorder Last Stamp Register for Channel 0" endif if ((per.l(ad:0x40024000+0x80)&0x2)==0x2) rgroup.long 0x94++0x3 line.long 0x00 "ERFIRSTSTAMP1,Event Monitor/Recorder First Stamp Register for Channel 1" hexmask.long.word 0x00 17.--25. 1. " DAY ,Day of Year value in the range of 1 to 366" bitfld.long 0x00 12.--16. " HOUR ,Hours value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x00 6.--11. " MIN ,Minutes value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,?..." bitfld.long 0x00 0.--5. " SEC ,Seconds value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,?..." rgroup.long 0xA4++0x3 line.long 0x00 "ERLASTSTAMP1,Event Monitor/Recorder Last Stamp Register for Channel 1" hexmask.long.word 0x00 17.--25. 1. " DAY ,Day of Year value in the range of 1 to 366" bitfld.long 0x00 12.--16. " HOUR ,Hours value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x00 6.--11. " MIN ,Minutes value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,?..." bitfld.long 0x00 0.--5. " SEC ,Seconds value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,?..." else hgroup.long 0x94++0x3 hide.long 0x00 "ERFIRSTSTAMP1,Event Monitor/Recorder First Stamp Register for Channel 1" hgroup.long 0xA4++0x3 hide.long 0x00 "ERLASTSTAMP1,Event Monitor/Recorder Last Stamp Register for Channel 1" endif if ((per.l(ad:0x40024000+0x80)&0x4)==0x4) rgroup.long 0x98++0x3 line.long 0x00 "ERFIRSTSTAMP2,Event Monitor/Recorder First Stamp Register for Channel 2" hexmask.long.word 0x00 17.--25. 1. " DAY ,Day of Year value in the range of 1 to 366" bitfld.long 0x00 12.--16. " HOUR ,Hours value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x00 6.--11. " MIN ,Minutes value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,?..." bitfld.long 0x00 0.--5. " SEC ,Seconds value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,?..." rgroup.long 0xA8++0x3 line.long 0x00 "ERLASTSTAMP2,Event Monitor/Recorder Last Stamp Register for Channel 2" hexmask.long.word 0x00 17.--25. 1. " DAY ,Day of Year value in the range of 1 to 366" bitfld.long 0x00 12.--16. " HOUR ,Hours value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." textline " " bitfld.long 0x00 6.--11. " MIN ,Minutes value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,?..." bitfld.long 0x00 0.--5. " SEC ,Seconds value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,?..." else hgroup.long 0x98++0x3 hide.long 0x00 "ERFIRSTSTAMP2,Event Monitor/Recorder First Stamp Register for Channel 2" hgroup.long 0xA8++0x3 hide.long 0x00 "ERLASTSTAMP2,Event Monitor/Recorder Last Stamp Register for Channel 2" endif width 0xB tree.end endif sif (cpu()=="LPC1772"||cpu()=="LPC1774"||cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778"||cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788") tree "WWDT (Windowed Watchdog Timer)" base ad:0x40000000 width 11. group.long 0x00++0x07 line.long 0x00 "WDMOD,Watchdog Mode Register" sif cpu()=="LPC1772"||cpu()=="LPC1774"||cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778"||cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788"||cpu()=="LPC1102"||cpu()=="LPC1102LV"||cpu()=="LPC1810"||cpu()=="LPC1820"||cpu()=="LPC1830"||cpu()=="LPC1850"||cpu()=="LPC1853"||cpu()=="LPC1857"||cpu()=="LPC1110"||cpuis("LPC1111*")||cpuis("LPC1112*")||cpu()=="LPC1112LV"||cpuis("LPC1113*")||cpuis("LPC1114*")||cpu()=="LPC1114LV"||cpu()=="LPC111D14"||cpuis("LPC1115*")||(cpu()=="LPC4072FBD80")||(cpu()=="LPC4072FET80")||(cpu()=="LPC4074FBD144")||(cpu()=="LPC4076FBD144")||(cpu()=="LPC4076FET180")||(cpu()=="LPC4078FBD100")||(cpu()=="LPC4078FBD144")||(cpu()=="LPC4078FBD208")||(cpu()=="LPC4078FBD80")||(cpu()=="LPC4078FET180")||(cpu()=="LPC4078FET208")||(cpu()=="LPC4088FBD144")||(cpu()=="LPC4088FBD208")||(cpu()=="LPC4088FET180")||(cpu()=="LPC4088FET208")||cpuis("LPC43*") bitfld.long 0x00 4. " WDPROTECT ,Watchdog update mode" "Not protected,Protected" textline " " elif (cpu()=="LPC11U12/201"||cpu()=="LPC11U13/201"||cpu()=="LPC11U14/201"||cpu()=="LPC11U23/301"||cpuis("LPC11U24*")||cpuis("LPC11U3*")||cpu()=="LPC11A02"||cpu()=="LPC11A04"||cpu()=="LPC11A11"||cpu()=="LPC11A12"||cpu()=="LPC11A13"||cpu()=="LPC11A14"||cpu()=="LPC810M021FN8"||cpu()=="LPC811M001FDH16"||cpu()=="LPC812M101FD20"||cpu()=="LPC812FDH16"||cpu()=="LPC812M101FDH20"||cpuis("LPC11E*")||cpuis("LPC11U6*")) bitfld.long 0x00 5. " CSLOCK ,Clock source lock" "Not locked,Locked" bitfld.long 0x00 4. " WDPROTECT ,Watchdog update mode" "Not protected,Protected" textline " " elif (cpuis("LPC82*")||cpuis("LPC812M101J*")||cpuis("LPC84*")||cpu()=="LPC811M001JDH16"||cpu()=="LPC832M101FDH20"||cpu()=="LPC834M101FHI33"||cpuis("LPC802*")||cpuis("LPC804*")) bitfld.long 0x00 5. " LOCK ,Watchdog oscillator lock" "Not locked,Locked" bitfld.long 0x00 4. " WDPROTECT ,Watchdog update mode" "Not protected,Protected" textline " " elif (cpu()=="LPC1224"||cpu()=="LPC1225"||cpu()=="LPC1226"||cpu()=="LPC1227") bitfld.long 0x00 7. " WDLOCKEN ,Watchdog enable and reset lockout" "Not locked,Locked" bitfld.long 0x00 6. " WDLOCKDP ,Deep Power-down enable lock" "Not locked,Locked" textline " " bitfld.long 0x00 5. " CSLOCK ,Clock source lock" "Not locked,Locked" bitfld.long 0x00 4. " WDPROTECT ,Watchdog update mode" "Not protected,Protected" textline " " endif sif cpuis("LPC802*")||cpuis("LPC804*")||cpuis("LPC8N04") eventfld.long 0x00 3. " WDINT ,Watchdog interrupt flag" "Not occurred,Occurred" else bitfld.long 0x00 3. " WDINT ,Watchdog interrupt flag" "Not occurred,Occurred" endif bitfld.long 0x00 2. " WDTOF ,Watchdog Time-out flag" "Not occurred,Occurred" textline " " bitfld.long 0x00 1. " WDRESET ,Watchdog reset enable" "Disabled,Enabled" sif cpuis("LPC802*")||cpuis("LPC804*")||cpuis("LPC8N04") bitfld.long 0x00 0. " WDEN ,Watchdog enable" "Disabled,Enabled" else bitfld.long 0x00 0. " WDEN ,Watchdog interrupt enable" "Disabled,Enabled" endif sif (cpu()=="EM773"||cpu()=="LPC1110"||cpuis("LPC1111*")||cpuis("LPC1112*")||cpu()=="LPC1112LV"||cpuis("LPC1113*")||cpuis("LPC1114*")||cpu()=="LPC1114LV"||cpu()=="LPC11D14"||cpuis("LPC1115*")||cpu()=="LPC11C12"||cpu()=="LPC11C14"||cpu()=="LPC1102"||cpu()=="LPC1102LV"||cpu()=="LPC1772"||cpu()=="LPC1774"||cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778"||cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788"||cpu()=="LPC1810"||cpu()=="LPC1820"||cpu()=="LPC1830"||cpu()=="LPC1850"||cpu()=="LPC1853"||cpu()=="LPC1857"||cpu()=="LPC11C22"||cpu()=="LPC11C24"||cpu()=="LPC11U12/201"||cpu()=="LPC11U13/201"||cpu()=="LPC11U14/201"||cpu()=="LPC11U23/301"||cpu()=="LPC11U24"||cpuis("LPC11U24*")||cpuis("LPC11U3*")||cpu()=="LPC1225"||cpu()=="LPC1226"||cpu()=="LPC1227"||cpuis("LPC11E*")||cpu()=="LPC11A02"||cpu()=="LPC11A04"||cpu()=="LPC11A11"||cpu()=="LPC11A12"||cpu()=="LPC11A13"||cpu()=="LPC11A14"||cpu()=="LPC810M021FN8"||cpu()=="LPC811M001FDH16"||cpu()=="LPC812M101FD20"||cpu()=="LPC812FDH16"||cpu()=="LPC812M101FDH20"||(cpu()=="LPC4072FBD80")||(cpu()=="LPC4072FET80")||(cpu()=="LPC4074FBD144")||(cpu()=="LPC4076FBD144")||(cpu()=="LPC4076FET180")||(cpu()=="LPC4078FBD100")||(cpu()=="LPC4078FBD144")||(cpu()=="LPC4078FBD208")||(cpu()=="LPC4078FBD80")||(cpu()=="LPC4078FET180")||(cpu()=="LPC4078FET208")||(cpu()=="LPC4088FBD144")||(cpu()=="LPC4088FBD208")||(cpu()=="LPC4088FET180")||(cpu()=="LPC4088FET208")||cpuis("LPC43*")||cpuis("LPC82*")||cpuis("LPC812M101J*")||cpuis("LPC43S*")||cpuis("LPC11U6")||cpuis("LPC84*")||cpu()=="LPC811M001JDH16"||cpu()=="LPC832M101FDH20"||cpu()=="LPC834M101FHI33"||cpuis("LPC802*")||cpuis("LPC804*")||cpu()==("LPC8N04")||cpuis("LPC11D14")) line.long 0x04 "WDTC,Watchdog Timer Constant Register" hexmask.long.tbyte 0x04 0.--23. 1. " COUNT ,Watchdog time-out value" else line.long 0x04 "WDTC,Watchdog Timer Constant Register" hexmask.long 0x04 0.--31. 1. " COUNT ,Watchdog time-out interval" endif wgroup.long 0x08++0x03 line.long 0x00 "WDFEED,Watchdog Feed Sequence Register" hexmask.long.byte 0x00 0.--7. 1. " FEED ,Feed value" sif (cpu()=="EM773"||cpu()=="LPC1110"||cpuis("LPC1111*")||cpuis("LPC1112*")||cpu()=="LPC1112LV"||cpuis("LPC1113*")||cpuis("LPC1114*")||cpu()=="LPC1114LV"||cpu()=="LPC11D14"||cpuis("LPC1115*")||cpu()=="LPC11C12"||cpu()=="LPC11C14"||cpu()=="LPC1102"||cpu()=="LPC1102LV"||cpu()=="LPC1772"||cpu()=="LPC1774"||cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778"||cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788"||cpu()=="LPC1810"||cpu()=="LPC1820"||cpu()=="LPC1830"||cpu()=="LPC1850"||cpu()=="LPC1853"||cpu()=="LPC1857"||cpu()=="LPC11C22"||cpu()=="LPC11C24"||cpu()=="LPC11U12/201"||cpu()=="LPC11U13/201"||cpu()=="LPC11U14/201"||cpu()=="LPC11U23/301"||cpuis("LPC11U24*")||cpuis("LPC11U3*")||cpu()=="LPC1224"||cpu()=="LPC1225"||cpu()=="LPC1226"||cpu()=="LPC1227"||cpuis("LPC11E*")||cpu()=="LPC11A02"||cpu()=="LPC11A04"||cpu()=="LPC11A11"||cpu()=="LPC11A12"||cpu()=="LPC11A13"||cpu()=="LPC11A14"||cpu()=="LPC810M021FN8"||cpu()=="LPC811M001FDH16"||cpu()=="LPC812M101FD20"||cpu()=="LPC812FDH16"||cpu()=="LPC812M101FDH20"||(cpu()=="LPC4072FBD80")||(cpu()=="LPC4072FET80")||(cpu()=="LPC4074FBD144")||(cpu()=="LPC4076FBD144")||(cpu()=="LPC4076FET180")||(cpu()=="LPC4078FBD100")||(cpu()=="LPC4078FBD144")||(cpu()=="LPC4078FBD208")||(cpu()=="LPC4078FBD80")||(cpu()=="LPC4078FET180")||(cpu()=="LPC4078FET208")||(cpu()=="LPC4088FBD144")||(cpu()=="LPC4088FBD208")||(cpu()=="LPC4088FET180")||(cpu()=="LPC4088FET208")||cpuis("LPC43*")||cpuis("LPC82*")||cpuis("LPC812M101J*"))||cpuis("LPC43S*")||cpuis("LPC11U6")||cpuis("LPC84*")||(cpu()=="LPC811M001JDH16")||(cpu()=="LPC832M101FDH20")||(cpu()=="LPC834M101FHI33"||cpuis("LPC802*")||cpuis("LPC804*"))||cpu()=="LPC8N04"||cpuis("LPC11D14") rgroup.long 0x0C++0x03 line.long 0x00 "WDTV,Watchdog Timer Value Register" hexmask.long.tbyte 0x00 0.--23. 1. " COUNT ,Counter timer value" else rgroup.long 0x0C++0x03 line.long 0x00 "WDTV,Watchdog Timer Value Register" hexmask.long 0x00 0.--31. 1. " COUNT ,Counter timer value" endif sif (cpu()!="EM773"&&cpu()!="LPC1311"&&cpu()!="LPC1313"&&cpu()!="LPC1342"&&cpu()!="LPC1343"&&!cpuis("LPC1111*")&&cpu()!="LPC11D14"&&!cpuis("LPC1112*")&&!cpuis("LPC1113*")&&!cpuis("LPC1114*")&&cpu()!="LPC11C12"&&cpu()!="LPC11C14"&&cpu()!="LPC1102"&&cpu()!="LPC1102LV"&&cpu()!="LPC1772"&&cpu()!="LPC1774"&&cpu()!="LPC1776"&&cpu()!="LPC1777"&&cpu()!="LPC1778"&&cpu()!="LPC1785"&&cpu()!="LPC1786"&&cpu()!="LPC1787"&&cpu()!="LPC1788"&&cpu()!="LPC11C22"&&cpu()!="LPC11C24"&&cpu()!="LPC1810"&&cpu()!="LPC1820"&&cpu()!="LPC1830"&&cpu()!="LPC1850"&&cpu()!="LPC1853"&&cpu()!="LPC1857"&&cpu()!="LPC810M021FN8"&&cpu()!="LPC811M001FDH16"&&cpu()!="LPC812M101FD20"&&cpu()!="LPC812FDH16"&&cpu()!="LPC812M101FDH20"&&!cpuis("LPC43*")&&!cpuis("LPC82*")&&!cpuis("LPC812M101J*")&&!cpuis("LPC43S*")&&!cpuis("LPC84*")&&cpu()!="LPC811M001JDH16"&&cpu()!="LPC832M101FDH20"&&cpu()!="LPC834M101FHI33"&&cpu()!="LPC8N04"&&!cpuis("LPC802*")&&!cpuis("LPC804*")) group.long 0x10++0x03 line.long 0x00 "WDCLKSEL,Watchdog Timer Clock Source Selection Register" bitfld.long 0x00 31. " WDLOCK ,Watchdog lock" "Not locked,Locked" sif (cpu()=="LPC1224"||cpu()=="LPC1225"||cpu()=="LPC1226"||cpu()=="LPC1227") bitfld.long 0x00 0.--1. " WDSEL1 ,Select the clock source for the watchdog timer" "Internal RC,Watchdog,?..." elif (cpu()=="LPC11A02"||cpu()=="LPC11A04"||cpu()=="LPC11A11"||cpu()=="LPC11A12"||cpu()=="LPC11A13"||cpu()=="LPC11A14"||cpuis("LPC11E*")||cpu()=="LPC11U12/201"||cpu()=="LPC11U13/201"||cpu()=="LPC11U14/201"||cpu()=="LPC11U23/301"||cpuis("LPC11U24*")||cpuis("LPC11U3*")||cpuis("LPC11U6*")) textline " " bitfld.long 0x00 0. " CLKSEL ,Selects source of WDT clock" "IRC,Watchdog oscillator" else bitfld.long 0x00 0.--1. " WDSEL2 ,Select the clock source for the watchdog timer" "RC,APB clock,RTC,?..." endif endif sif (cpu()=="LPC1772"||cpu()=="LPC1774"||cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778"||cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788"||cpu()=="LPC1110"||cpuis("LPC1111*")||cpuis("LPC1112*")||cpu()=="LPC1112LV"||cpuis("LPC1113*")||cpuis("LPC1114*")||cpu()=="LPC1114LV"||cpu()=="LPC11D14"||cpuis("LPC1115*")||cpu()=="LPC11U12/201"||cpu()=="LPC11U13/201"||cpu()=="LPC11U14/201"||cpu()=="LPC11U23/301"||cpuis("LPC11U24*")||cpuis("LPC11U3*")||cpu()=="LPC1102"||cpu()=="LPC1102LV"||cpu()=="LPC11A02"||cpu()=="LPC11A04"||cpu()=="LPC11A11"||cpu()=="LPC11A12"||cpu()=="LPC11A13"||cpu()=="LPC11A14"||cpuis("LPC11E*")||cpu()=="LPC1224"||cpu()=="LPC1225"||cpu()=="LPC1226"||cpu()=="LPC1227"||cpu()=="LPC1810"||cpu()=="LPC1820"||cpu()=="LPC1830"||cpu()=="LPC1850"||cpu()=="LPC1853"||cpu()=="LPC1857"||cpu()=="LPC810M021FN8"||cpu()=="LPC811M001FDH16"||cpu()=="LPC812M101FD20"||cpu()=="LPC812FDH16"||cpu()=="LPC812M101FDH20"||(cpu()=="LPC4072FBD80")||(cpu()=="LPC4072FET80")||(cpu()=="LPC4074FBD144")||(cpu()=="LPC4076FBD144")||(cpu()=="LPC4076FET180")||(cpu()=="LPC4078FBD100")||(cpu()=="LPC4078FBD144")||(cpu()=="LPC4078FBD208")||(cpu()=="LPC4078FBD80")||(cpu()=="LPC4078FET180")||(cpu()=="LPC4078FET208")||(cpu()=="LPC4088FBD144")||(cpu()=="LPC4088FBD208")||(cpu()=="LPC4088FET180")||(cpu()=="LPC4088FET208")||cpuis("LPC43*")||cpuis("LPC82*")||cpuis("LPC812M101J*")||cpuis("LPC11U6*")||cpuis("LPC84*")||cpu()=="LPC811M001JDH16"||cpu()=="LPC832M101FDH20"||cpu()=="LPC834M101FHI33"||cpuis("LPC802*")||cpuis("LPC804*")) group.long 0x14++0x07 line.long 0x00 "WDWARNINT,Watchdog Timer Warning Interrupt Register" hexmask.long.word 0x00 0.--9. 1. " WARNINT ,Watchdog warning interrupt compare value" line.long 0x04 "WDWINDOW,Watchdog Timer Window Register" hexmask.long.tbyte 0x04 0.--23. 1. " WINDOW ,Watchdog window value" endif width 0x0B tree.end else tree "WDT (Watchdog Timer)" base ad:0x40000000 width 11. group.long 0x00++0x07 line.long 0x00 "WDMOD,Watchdog Mode Register" sif cpu()=="LPC1772"||cpu()=="LPC1774"||cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778"||cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788"||cpu()=="LPC1102"||cpu()=="LPC1102LV"||cpu()=="LPC1810"||cpu()=="LPC1820"||cpu()=="LPC1830"||cpu()=="LPC1850"||cpu()=="LPC1853"||cpu()=="LPC1857"||cpu()=="LPC1110"||cpuis("LPC1111*")||cpuis("LPC1112*")||cpu()=="LPC1112LV"||cpuis("LPC1113*")||cpuis("LPC1114*")||cpu()=="LPC1114LV"||cpu()=="LPC111D14"||cpuis("LPC1115*")||(cpu()=="LPC4072FBD80")||(cpu()=="LPC4072FET80")||(cpu()=="LPC4074FBD144")||(cpu()=="LPC4076FBD144")||(cpu()=="LPC4076FET180")||(cpu()=="LPC4078FBD100")||(cpu()=="LPC4078FBD144")||(cpu()=="LPC4078FBD208")||(cpu()=="LPC4078FBD80")||(cpu()=="LPC4078FET180")||(cpu()=="LPC4078FET208")||(cpu()=="LPC4088FBD144")||(cpu()=="LPC4088FBD208")||(cpu()=="LPC4088FET180")||(cpu()=="LPC4088FET208")||cpuis("LPC43*") bitfld.long 0x00 4. " WDPROTECT ,Watchdog update mode" "Not protected,Protected" textline " " elif (cpu()=="LPC11U12/201"||cpu()=="LPC11U13/201"||cpu()=="LPC11U14/201"||cpu()=="LPC11U23/301"||cpuis("LPC11U24*")||cpuis("LPC11U3*")||cpu()=="LPC11A02"||cpu()=="LPC11A04"||cpu()=="LPC11A11"||cpu()=="LPC11A12"||cpu()=="LPC11A13"||cpu()=="LPC11A14"||cpu()=="LPC810M021FN8"||cpu()=="LPC811M001FDH16"||cpu()=="LPC812M101FD20"||cpu()=="LPC812FDH16"||cpu()=="LPC812M101FDH20"||cpuis("LPC11E*")||cpuis("LPC11U6*")) bitfld.long 0x00 5. " CSLOCK ,Clock source lock" "Not locked,Locked" bitfld.long 0x00 4. " WDPROTECT ,Watchdog update mode" "Not protected,Protected" textline " " elif (cpuis("LPC82*")||cpuis("LPC812M101J*")||cpuis("LPC84*")||cpu()=="LPC811M001JDH16"||cpu()=="LPC832M101FDH20"||cpu()=="LPC834M101FHI33"||cpuis("LPC802*")||cpuis("LPC804*")) bitfld.long 0x00 5. " LOCK ,Watchdog oscillator lock" "Not locked,Locked" bitfld.long 0x00 4. " WDPROTECT ,Watchdog update mode" "Not protected,Protected" textline " " elif (cpu()=="LPC1224"||cpu()=="LPC1225"||cpu()=="LPC1226"||cpu()=="LPC1227") bitfld.long 0x00 7. " WDLOCKEN ,Watchdog enable and reset lockout" "Not locked,Locked" bitfld.long 0x00 6. " WDLOCKDP ,Deep Power-down enable lock" "Not locked,Locked" textline " " bitfld.long 0x00 5. " CSLOCK ,Clock source lock" "Not locked,Locked" bitfld.long 0x00 4. " WDPROTECT ,Watchdog update mode" "Not protected,Protected" textline " " endif sif cpuis("LPC802*")||cpuis("LPC804*")||cpuis("LPC8N04") eventfld.long 0x00 3. " WDINT ,Watchdog interrupt flag" "Not occurred,Occurred" else bitfld.long 0x00 3. " WDINT ,Watchdog interrupt flag" "Not occurred,Occurred" endif bitfld.long 0x00 2. " WDTOF ,Watchdog Time-out flag" "Not occurred,Occurred" textline " " bitfld.long 0x00 1. " WDRESET ,Watchdog reset enable" "Disabled,Enabled" sif cpuis("LPC802*")||cpuis("LPC804*")||cpuis("LPC8N04") bitfld.long 0x00 0. " WDEN ,Watchdog enable" "Disabled,Enabled" else bitfld.long 0x00 0. " WDEN ,Watchdog interrupt enable" "Disabled,Enabled" endif sif (cpu()=="EM773"||cpu()=="LPC1110"||cpuis("LPC1111*")||cpuis("LPC1112*")||cpu()=="LPC1112LV"||cpuis("LPC1113*")||cpuis("LPC1114*")||cpu()=="LPC1114LV"||cpu()=="LPC11D14"||cpuis("LPC1115*")||cpu()=="LPC11C12"||cpu()=="LPC11C14"||cpu()=="LPC1102"||cpu()=="LPC1102LV"||cpu()=="LPC1772"||cpu()=="LPC1774"||cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778"||cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788"||cpu()=="LPC1810"||cpu()=="LPC1820"||cpu()=="LPC1830"||cpu()=="LPC1850"||cpu()=="LPC1853"||cpu()=="LPC1857"||cpu()=="LPC11C22"||cpu()=="LPC11C24"||cpu()=="LPC11U12/201"||cpu()=="LPC11U13/201"||cpu()=="LPC11U14/201"||cpu()=="LPC11U23/301"||cpu()=="LPC11U24"||cpuis("LPC11U24*")||cpuis("LPC11U3*")||cpu()=="LPC1225"||cpu()=="LPC1226"||cpu()=="LPC1227"||cpuis("LPC11E*")||cpu()=="LPC11A02"||cpu()=="LPC11A04"||cpu()=="LPC11A11"||cpu()=="LPC11A12"||cpu()=="LPC11A13"||cpu()=="LPC11A14"||cpu()=="LPC810M021FN8"||cpu()=="LPC811M001FDH16"||cpu()=="LPC812M101FD20"||cpu()=="LPC812FDH16"||cpu()=="LPC812M101FDH20"||(cpu()=="LPC4072FBD80")||(cpu()=="LPC4072FET80")||(cpu()=="LPC4074FBD144")||(cpu()=="LPC4076FBD144")||(cpu()=="LPC4076FET180")||(cpu()=="LPC4078FBD100")||(cpu()=="LPC4078FBD144")||(cpu()=="LPC4078FBD208")||(cpu()=="LPC4078FBD80")||(cpu()=="LPC4078FET180")||(cpu()=="LPC4078FET208")||(cpu()=="LPC4088FBD144")||(cpu()=="LPC4088FBD208")||(cpu()=="LPC4088FET180")||(cpu()=="LPC4088FET208")||cpuis("LPC43*")||cpuis("LPC82*")||cpuis("LPC812M101J*")||cpuis("LPC43S*")||cpuis("LPC11U6")||cpuis("LPC84*")||cpu()=="LPC811M001JDH16"||cpu()=="LPC832M101FDH20"||cpu()=="LPC834M101FHI33"||cpuis("LPC802*")||cpuis("LPC804*")||cpu()==("LPC8N04")||cpuis("LPC11D14")) line.long 0x04 "WDTC,Watchdog Timer Constant Register" hexmask.long.tbyte 0x04 0.--23. 1. " COUNT ,Watchdog time-out value" else line.long 0x04 "WDTC,Watchdog Timer Constant Register" hexmask.long 0x04 0.--31. 1. " COUNT ,Watchdog time-out interval" endif wgroup.long 0x08++0x03 line.long 0x00 "WDFEED,Watchdog Feed Sequence Register" hexmask.long.byte 0x00 0.--7. 1. " FEED ,Feed value" sif (cpu()=="EM773"||cpu()=="LPC1110"||cpuis("LPC1111*")||cpuis("LPC1112*")||cpu()=="LPC1112LV"||cpuis("LPC1113*")||cpuis("LPC1114*")||cpu()=="LPC1114LV"||cpu()=="LPC11D14"||cpuis("LPC1115*")||cpu()=="LPC11C12"||cpu()=="LPC11C14"||cpu()=="LPC1102"||cpu()=="LPC1102LV"||cpu()=="LPC1772"||cpu()=="LPC1774"||cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778"||cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788"||cpu()=="LPC1810"||cpu()=="LPC1820"||cpu()=="LPC1830"||cpu()=="LPC1850"||cpu()=="LPC1853"||cpu()=="LPC1857"||cpu()=="LPC11C22"||cpu()=="LPC11C24"||cpu()=="LPC11U12/201"||cpu()=="LPC11U13/201"||cpu()=="LPC11U14/201"||cpu()=="LPC11U23/301"||cpuis("LPC11U24*")||cpuis("LPC11U3*")||cpu()=="LPC1224"||cpu()=="LPC1225"||cpu()=="LPC1226"||cpu()=="LPC1227"||cpuis("LPC11E*")||cpu()=="LPC11A02"||cpu()=="LPC11A04"||cpu()=="LPC11A11"||cpu()=="LPC11A12"||cpu()=="LPC11A13"||cpu()=="LPC11A14"||cpu()=="LPC810M021FN8"||cpu()=="LPC811M001FDH16"||cpu()=="LPC812M101FD20"||cpu()=="LPC812FDH16"||cpu()=="LPC812M101FDH20"||(cpu()=="LPC4072FBD80")||(cpu()=="LPC4072FET80")||(cpu()=="LPC4074FBD144")||(cpu()=="LPC4076FBD144")||(cpu()=="LPC4076FET180")||(cpu()=="LPC4078FBD100")||(cpu()=="LPC4078FBD144")||(cpu()=="LPC4078FBD208")||(cpu()=="LPC4078FBD80")||(cpu()=="LPC4078FET180")||(cpu()=="LPC4078FET208")||(cpu()=="LPC4088FBD144")||(cpu()=="LPC4088FBD208")||(cpu()=="LPC4088FET180")||(cpu()=="LPC4088FET208")||cpuis("LPC43*")||cpuis("LPC82*")||cpuis("LPC812M101J*"))||cpuis("LPC43S*")||cpuis("LPC11U6")||cpuis("LPC84*")||(cpu()=="LPC811M001JDH16")||(cpu()=="LPC832M101FDH20")||(cpu()=="LPC834M101FHI33"||cpuis("LPC802*")||cpuis("LPC804*"))||cpu()=="LPC8N04"||cpuis("LPC11D14") rgroup.long 0x0C++0x03 line.long 0x00 "WDTV,Watchdog Timer Value Register" hexmask.long.tbyte 0x00 0.--23. 1. " COUNT ,Counter timer value" else rgroup.long 0x0C++0x03 line.long 0x00 "WDTV,Watchdog Timer Value Register" hexmask.long 0x00 0.--31. 1. " COUNT ,Counter timer value" endif sif (cpu()!="EM773"&&cpu()!="LPC1311"&&cpu()!="LPC1313"&&cpu()!="LPC1342"&&cpu()!="LPC1343"&&!cpuis("LPC1111*")&&cpu()!="LPC11D14"&&!cpuis("LPC1112*")&&!cpuis("LPC1113*")&&!cpuis("LPC1114*")&&cpu()!="LPC11C12"&&cpu()!="LPC11C14"&&cpu()!="LPC1102"&&cpu()!="LPC1102LV"&&cpu()!="LPC1772"&&cpu()!="LPC1774"&&cpu()!="LPC1776"&&cpu()!="LPC1777"&&cpu()!="LPC1778"&&cpu()!="LPC1785"&&cpu()!="LPC1786"&&cpu()!="LPC1787"&&cpu()!="LPC1788"&&cpu()!="LPC11C22"&&cpu()!="LPC11C24"&&cpu()!="LPC1810"&&cpu()!="LPC1820"&&cpu()!="LPC1830"&&cpu()!="LPC1850"&&cpu()!="LPC1853"&&cpu()!="LPC1857"&&cpu()!="LPC810M021FN8"&&cpu()!="LPC811M001FDH16"&&cpu()!="LPC812M101FD20"&&cpu()!="LPC812FDH16"&&cpu()!="LPC812M101FDH20"&&!cpuis("LPC43*")&&!cpuis("LPC82*")&&!cpuis("LPC812M101J*")&&!cpuis("LPC43S*")&&!cpuis("LPC84*")&&cpu()!="LPC811M001JDH16"&&cpu()!="LPC832M101FDH20"&&cpu()!="LPC834M101FHI33"&&cpu()!="LPC8N04"&&!cpuis("LPC802*")&&!cpuis("LPC804*")) group.long 0x10++0x03 line.long 0x00 "WDCLKSEL,Watchdog Timer Clock Source Selection Register" bitfld.long 0x00 31. " WDLOCK ,Watchdog lock" "Not locked,Locked" sif (cpu()=="LPC1224"||cpu()=="LPC1225"||cpu()=="LPC1226"||cpu()=="LPC1227") bitfld.long 0x00 0.--1. " WDSEL1 ,Select the clock source for the watchdog timer" "Internal RC,Watchdog,?..." elif (cpu()=="LPC11A02"||cpu()=="LPC11A04"||cpu()=="LPC11A11"||cpu()=="LPC11A12"||cpu()=="LPC11A13"||cpu()=="LPC11A14"||cpuis("LPC11E*")||cpu()=="LPC11U12/201"||cpu()=="LPC11U13/201"||cpu()=="LPC11U14/201"||cpu()=="LPC11U23/301"||cpuis("LPC11U24*")||cpuis("LPC11U3*")||cpuis("LPC11U6*")) textline " " bitfld.long 0x00 0. " CLKSEL ,Selects source of WDT clock" "IRC,Watchdog oscillator" else bitfld.long 0x00 0.--1. " WDSEL2 ,Select the clock source for the watchdog timer" "RC,APB clock,RTC,?..." endif endif sif (cpu()=="LPC1772"||cpu()=="LPC1774"||cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778"||cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788"||cpu()=="LPC1110"||cpuis("LPC1111*")||cpuis("LPC1112*")||cpu()=="LPC1112LV"||cpuis("LPC1113*")||cpuis("LPC1114*")||cpu()=="LPC1114LV"||cpu()=="LPC11D14"||cpuis("LPC1115*")||cpu()=="LPC11U12/201"||cpu()=="LPC11U13/201"||cpu()=="LPC11U14/201"||cpu()=="LPC11U23/301"||cpuis("LPC11U24*")||cpuis("LPC11U3*")||cpu()=="LPC1102"||cpu()=="LPC1102LV"||cpu()=="LPC11A02"||cpu()=="LPC11A04"||cpu()=="LPC11A11"||cpu()=="LPC11A12"||cpu()=="LPC11A13"||cpu()=="LPC11A14"||cpuis("LPC11E*")||cpu()=="LPC1224"||cpu()=="LPC1225"||cpu()=="LPC1226"||cpu()=="LPC1227"||cpu()=="LPC1810"||cpu()=="LPC1820"||cpu()=="LPC1830"||cpu()=="LPC1850"||cpu()=="LPC1853"||cpu()=="LPC1857"||cpu()=="LPC810M021FN8"||cpu()=="LPC811M001FDH16"||cpu()=="LPC812M101FD20"||cpu()=="LPC812FDH16"||cpu()=="LPC812M101FDH20"||(cpu()=="LPC4072FBD80")||(cpu()=="LPC4072FET80")||(cpu()=="LPC4074FBD144")||(cpu()=="LPC4076FBD144")||(cpu()=="LPC4076FET180")||(cpu()=="LPC4078FBD100")||(cpu()=="LPC4078FBD144")||(cpu()=="LPC4078FBD208")||(cpu()=="LPC4078FBD80")||(cpu()=="LPC4078FET180")||(cpu()=="LPC4078FET208")||(cpu()=="LPC4088FBD144")||(cpu()=="LPC4088FBD208")||(cpu()=="LPC4088FET180")||(cpu()=="LPC4088FET208")||cpuis("LPC43*")||cpuis("LPC82*")||cpuis("LPC812M101J*")||cpuis("LPC11U6*")||cpuis("LPC84*")||cpu()=="LPC811M001JDH16"||cpu()=="LPC832M101FDH20"||cpu()=="LPC834M101FHI33"||cpuis("LPC802*")||cpuis("LPC804*")) group.long 0x14++0x07 line.long 0x00 "WDWARNINT,Watchdog Timer Warning Interrupt Register" hexmask.long.word 0x00 0.--9. 1. " WARNINT ,Watchdog warning interrupt compare value" line.long 0x04 "WDWINDOW,Watchdog Timer Window Register" hexmask.long.tbyte 0x04 0.--23. 1. " WINDOW ,Watchdog window value" endif width 0x0B tree.end endif tree "ADC (Analog-to-Digital Converter)" base ad:0x40034000 width 9. if ((per.long(ad:0x40034000)&0x08000000)==0x08000000) group.long 0x00++0x03 line.long 0x00 "AD0CR,A/D Control Register" bitfld.long 0x00 27. " EDGE ,Start Conversion Edge" "Rising,Falling" textline " " sif (cpu()=="LPC1311"||cpu()=="LPC1313"||cpu()=="LPC1342"||cpu()=="LPC1343"||cpu()=="LPC1110"||cpuis("LPC1111*")||cpu()=="LPC11D14"||cpuis("LPC1112*")||cpu()=="LPC1112LV"||cpuis("LPC1113*")||cpuis("LPC1114*")||cpu()=="LPC1114LV"||cpuis("LPC1115*")||cpu()=="LPC11C12"||cpu()=="LPC11C14"||cpu()=="LPC11C22"||cpu()=="LPC11C24"||cpu()=="LPC11U12/201"||cpu()=="LPC11U13/201"||cpu()=="LPC11U14/201"||cpu()=="LPC11U23/301"||cpuis("LPC11U24*")||cpuis("LPC11U3*")) bitfld.long 0x00 24.--26. " START ,Start Conversion Control" "No start,Start now,Falling edge on PIO0_2/SSEL/CT16B0_CAP0,Falling edge on PPIO1_5/DIR/CT32B0_CAP0,Falling edge on CT32B0_MAT0,Falling edge on CT32B0_MAT1,Falling edge on CT16B0_MAT0,Falling edge on CT16B0_MAT1" bitfld.long 0x00 17.--19. " CLKS ,Number of clocks for each conversion in Burst mode" "11 clocks/10 bits,10 clocks/9 bits,9 clocks/8 bits,8 clocks/7 bits,7 clocks/6 bits,6 clocks/5 bits,5 clocks/4 bits,4 clocks/3 bits" elif (cpu()=="LPC1224"||cpu()=="LPC1225"||cpu()=="LPC1226"||cpu()=="LPC1227") bitfld.long 0x00 24.--26. " START ,Start Conversion Control" "No start,Start now,Falling edge on PIO0_2/SSEL/CT16B0_CAP0,Falling edge on PPIO1_5/DIR/CT32B0_CAP0,Falling edge on CT32B0_MAT0,Falling edge on CT32B0_MAT1,Falling edge on CT16B0_MAT0,Falling edge on CT16B0_MAT1" elif (cpu()=="LPC1102"||cpu()=="LPC1102LV") bitfld.long 0x00 24.--26. " START ,Start Conversion Control" "No start,Start now,,,Falling edge on CT32B0_MAT0,Falling edge on CT32B0_MAT1,Falling edge on CT16B0_MAT0,Falling edge on CT16B0_MAT1" bitfld.long 0x00 17.--19. " CLKS ,Number of clocks for each conversion in Burst mode" "11 clocks/10 bits,10 clocks/9 bits,9 clocks/8 bits,8 clocks/7 bits,7 clocks/6 bits,6 clocks/5 bits,5 clocks/4 bits,4 clocks/3 bits" else sif (cpu()=="LPC1772"||cpu()=="LPC1774"||cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778"||cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788") bitfld.long 0x00 24.--26. " START ,Start Conversion Control" "No start,Start now,Falling edge on P2.10,Falling edge on P1.27,Falling edge on MAT0.1,Falling edge on MAT0.3,Falling edge on MAT1.0,Falling edge on MAT1.1" elif cpuis("LPC181*")||cpuis("LPC182*")||cpuis("LPC183*")||cpuis("LPC185*") bitfld.long 0x00 24.--26. " START ,Start Conversion Control" "No start,Start now,Falling edge on CTOUT_15,Falling edge on CTOUT_8,Falling edge on ADCTRIG0,Falling edge on ADCTRIG1,Falling edge on MCOA2,?..." bitfld.long 0x00 17.--19. " CLKS ,Number of clocks for each conversion in Burst mode" "11 clocks/10 bits,10 clocks/9 bits,9 clocks/8 bits,8 clocks/7 bits,7 clocks/6 bits,6 clocks/5 bits,5 clocks/4 bits,4 clocks/3 bits" else bitfld.long 0x00 24.--26. " START ,Start Conversion Control" "No start,Start now,Falling edge on PIO0_2/SSEL/CT16B0_CAP0,Falling edge on PIO1_5/DIR/CT32B0_CAP0,Falling edge on CT32B0_MAT0,Falling edge on CT32B0_MAT1,Falling edge on CT16B0_MAT0,Falling edge on CT16B0_MAT1" bitfld.long 0x00 17.--19. " CLKS ,Number of clocks for each conversion in Burst mode" "11 clocks/10 bits,10 clocks/9 bits,9 clocks/8 bits,8 clocks/7 bits,7 clocks/6 bits,6 clocks/5 bits,5 clocks/4 bits,4 clocks/3 bits" endif sif (!cpuis("LPC11E*")) textline " " bitfld.long 0x00 21. " PDN ,A/D Power" "Power-down,Operational" endif endif textline " " bitfld.long 0x00 16. " BURST ,Conversion Control Mode" "Software,Repeated" hexmask.long.byte 0x00 8.--15. 1. " CLKDIV ,Clock Divider" textline " " sif (cpu()!="LPC1102"&&cpu()!="LPC1102LV"&&cpu()!="LPC1110") bitfld.long 0x00 7. " AD.7 ,AD.7 Sampling and Conversion" "Not selected,Selected" bitfld.long 0x00 6. " AD.6 ,AD.6 Sampling and Conversion" "Not selected,Selected" textline " " bitfld.long 0x00 5. " AD.5 ,AD.5 Sampling and Conversion" "Not selected,Selected" bitfld.long 0x00 4. " AD.4 ,AD.4 Sampling and Conversion" "Not selected,Selected" else bitfld.long 0x00 4. " AD.4 ,AD.4 Sampling and Conversion" "Not selected,Selected" endif textline " " bitfld.long 0x00 3. " AD.3 ,AD.3 Sampling and Conversion" "Not selected,Selected" bitfld.long 0x00 2. " AD.2 ,AD.2 Sampling and Conversion" "Not selected,Selected" textline " " bitfld.long 0x00 1. " AD.1 ,AD.1 Sampling and Conversion" "Not selected,Selected" bitfld.long 0x00 0. " AD.0 ,AD.0 Sampling and Conversion" "Not selected,Selected" else group.long 0x00++0x03 line.long 0x00 "AD0CR,A/D Control Register" bitfld.long 0x00 27. " EDGE ,Start Conversion Edge" "Rising,Falling" textline " " sif (cpu()=="LPC1311"||cpu()=="LPC1313"||cpu()=="LPC1342"||cpu()=="LPC1343"||cpu()=="LPC1110"||cpuis("LPC1111*")||cpuis("LPC1112*")||cpu()=="LPC1112LV"||cpuis("LPC1113*")||cpuis("LPC1114*")||cpu()=="LPC1114LV"||cpuis("LPC1115*")||cpu()=="LPC11D14"||cpu()=="LPC11C12"||cpu()=="LPC11C14"||cpu()=="LPC11C22"||cpu()=="LPC11C24"||cpu()=="LPC11U02"||cpu()=="LPC11U04"||cpu()=="LPC11U12/201"||cpu()=="LPC11U13/201"||cpu()=="LPC11U14/201"||cpu()=="LPC11U23/301"||cpuis("LPC11U24*")||cpuis("LPC11U3*")) bitfld.long 0x00 24.--26. " START ,Start Conversion Control" "No start,Start now,Rising edge on PIO0_2/SSEL/CT16B0_CAP0,Rising edge on PPIO1_5/DIR/CT32B0_CAP0,Rising edge on CT32B0_MAT0,Rising edge on CT32B0_MAT1,Rising edge on CT16B0_MAT0,Rising edge on CT16B0_MAT1" bitfld.long 0x00 17.--19. " CLKS ,Number of clocks for each conversion in Burst mode" "11 clocks/10 bits,10 clocks/9 bits,9 clocks/8 bits,8 clocks/7 bits,7 clocks/6 bits,6 clocks/5 bits,5 clocks/4 bits,4 clocks/3 bits" elif (cpu()=="LPC1224"||cpu()=="LPC1225"||cpu()=="LPC1226"||cpu()=="LPC1227") bitfld.long 0x00 24.--26. " START ,Start Conversion Control" "No start,Start now,Rising edge on PIO0_2/SSEL/CT16B0_CAP0,Rising edge on PPIO1_5/DIR/CT32B0_CAP0,Rising edge on CT32B0_MAT0,Rising edge on CT32B0_MAT1,Rising edge on CT16B0_MAT0,Rising edge on CT16B0_MAT1" elif (cpu()=="LPC1102"||cpu()=="LPC1102LV") bitfld.long 0x00 24.--26. " START ,Start Conversion Control" "No start,Start now,,,Rising edge on CT32B0_MAT0,Rising edge on CT32B0_MAT1,Rising edge on CT16B0_MAT0,Rising edge on CT16B0_MAT1" bitfld.long 0x00 17.--19. " CLKS ,Number of clocks for each conversion in Burst mode" "11 clocks/10 bits,10 clocks/9 bits,9 clocks/8 bits,8 clocks/7 bits,7 clocks/6 bits,6 clocks/5 bits,5 clocks/4 bits,4 clocks/3 bits" elif (cpu()=="LPC11A02"||cpu()=="LPC11A04"||cpu()=="LPC11A11"||cpu()=="LPC11A12"||cpu()=="LPC11A13"||cpu()=="LPC11A14") bitfld.long 0x00 23.--26. " START ,Start Conversion Control" "No start,,Start,,ATRG0,Analog comparator output,ATRG1,,CT32B0_MAT0,,CT32B0_MAT1,,CT16B0_MAT0,,CT16B0_MAT1,?..." bitfld.long 0x00 17.--19. " CLKS ,Number of clocks for each conversion in Burst mode" "11 clocks/10 bits,10 clocks/9 bits,9 clocks/8 bits,8 clocks/7 bits,7 clocks/6 bits,6 clocks/5 bits,5 clocks/4 bits,4 clocks/3 bits" else sif (cpu()=="LPC1772"||cpu()=="LPC1774"||cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778"||cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788") bitfld.long 0x00 24.--26. " START ,Start Conversion Control" "No start,Start now,Rising edge on P2.10,Rising edge on P1.27,Rising edge on MAT0.1,Rising edge on MAT0.3,Rising edge on MAT1.0,Rising edge on MAT1.1" elif cpuis("LPC181*")||cpuis("LPC182*")||cpuis("LPC183*")||cpuis("LPC185*") bitfld.long 0x00 24.--26. " START ,Start Conversion Control" "No start,Start now,Rising edge on CTOUT_15,Rising edge on CTOUT_8,Rising edge on ADCTRIG0,Rising edge on ADCTRIG1,Rising edge on MCOA2,?..." bitfld.long 0x00 17.--19. " CLKS ,Number of clocks for each conversion in Burst mode" "11 clocks/10 bits,10 clocks/9 bits,9 clocks/8 bits,8 clocks/7 bits,7 clocks/6 bits,6 clocks/5 bits,5 clocks/4 bits,4 clocks/3 bits" else bitfld.long 0x00 24.--26. " START ,Start Conversion Control" "No start,Start now,Rising edge on PIO0_2/SSEL/CT16B0_CAP0,Rising edge on PIO1_5/DIR/CT32B0_CAP0,Rising edge on CT32B0_MAT0,Rising edge on CT32B0_MAT1,Rising edge on CT16B0_MAT0,Rising edge on CT16B0_MAT1" bitfld.long 0x00 17.--19. " CLKS ,Number of clocks for each conversion in Burst mode" "11 clocks/10 bits,10 clocks/9 bits,9 clocks/8 bits,8 clocks/7 bits,7 clocks/6 bits,6 clocks/5 bits,5 clocks/4 bits,4 clocks/3 bits" endif sif !cpuis("LPC11E*") textline " " bitfld.long 0x00 21. " PDN ,A/D Power" "Power-down,Operational" endif endif textline " " bitfld.long 0x00 16. " BURST ,Conversion Control Mode" "Software,Repeated" hexmask.long.byte 0x00 8.--15. 1. " CLKDIV ,Clock Divider" textline " " sif (cpu()!="LPC1102"&&cpu()!="LPC1102LV"&&cpu()!="LPC1110") bitfld.long 0x00 7. " AD.7 ,AD.7 Sampling and Conversion" "Not selected,Selected" bitfld.long 0x00 6. " AD.6 ,AD.6 Sampling and Conversion" "Not selected,Selected" textline " " bitfld.long 0x00 5. " AD.5 ,AD.5 Sampling and Conversion" "Not selected,Selected" bitfld.long 0x00 4. " AD.4 ,AD.4 Sampling and Conversion" "Not selected,Selected" else bitfld.long 0x00 4. " AD.4 ,AD.4 Sampling and Conversion" "Not selected,Selected" endif textline " " bitfld.long 0x00 3. " AD.3 ,AD.3 Sampling and Conversion" "Not selected,Selected" bitfld.long 0x00 2. " AD.2 ,AD.2 Sampling and Conversion" "Not selected,Selected" textline " " bitfld.long 0x00 1. " AD.1 ,AD.1 Sampling and Conversion" "Not selected,Selected" bitfld.long 0x00 0. " AD.0 ,AD.0 Sampling and Conversion" "Not selected,Selected" endif hgroup.long 0x04++0x03 hide.long 0x00 "AD0GDR,A/D Global Data Register" in sif (cpu()=="LPC11A02"||cpu()=="LPC11A04"||cpu()=="LPC11A11"||cpu()=="LPC11A12"||cpu()=="LPC11A13"||cpu()=="LPC11A14") group.long 0x08++0x3 line.long 0x00 "SEL,A/D Select Register" bitfld.long 0x00 14.--15. " AD7SEL ,This field selects the source signal for channel 7" "AD7,No signal,Temperature sensor,?..." bitfld.long 0x00 12.--13. " AD6SEL ,This field selects the source signal for channel 6" "AD6,no signal,Internal voltage reference,?..." textline " " bitfld.long 0x00 10.--11. " AD5SEL ,This field selects the source signal for channel 5" "AD5,No signal,Core voltage regulator output,?..." endif group.long 0x0C++0x03 line.long 0x00 "AD0INTEN,A/D Interrupt Enable Register" bitfld.long 0x00 8. " ADGINTEN ,Source of Generate Interrupt" "Individual,Global" textline " " sif (cpu()!="LPC1102"&&cpu()!="LPC1102LV"&&cpu()!="LPC1110") bitfld.long 0x00 7. " ADINTEN7 ,Interrupt when Conversion on Channel 7 Completed" "No interrupt,Interrupt" bitfld.long 0x00 6. " ADINTEN6 ,Interrupt when Conversion on Channel 6 Completed" "No interrupt,Interrupt" textline " " bitfld.long 0x00 5. " ADINTEN5 ,Interrupt when Conversion on Channel 5 Completed" "No interrupt,Interrupt" bitfld.long 0x00 4. " ADINTEN4 ,Interrupt when Conversion on Channel 4 Completed" "No interrupt,Interrupt" else textline " " bitfld.long 0x00 4. " ADINTEN4 ,Interrupt when Conversion on Channel 4 Completed" "No interrupt,Interrupt" endif textline " " bitfld.long 0x00 3. " ADINTEN3 ,Interrupt when Conversion on Channel 3 Completed" "No interrupt,Interrupt" bitfld.long 0x00 2. " ADINTEN2 ,Interrupt when Conversion on Channel 2 Completed" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " ADINTEN1 ,Interrupt when Conversion on Channel 1 Completed" "No interrupt,Interrupt" bitfld.long 0x00 0. " ADINTEN0 ,Interrupt when Conversion on Channel 0 Completed" "No interrupt,Interrupt" hgroup.long 0x10++0x03 hide.long 0x00 "AD0DR0,A/D Data Register" in hgroup.long 0x14++0x03 hide.long 0x00 "AD0DR1,A/D Data Register" in hgroup.long 0x18++0x03 hide.long 0x00 "AD0DR2,A/D Data Register" in hgroup.long 0x1C++0x03 hide.long 0x00 "AD0DR3,A/D Data Register" in hgroup.long 0x20++0x03 hide.long 0x00 "AD0DR4,A/D Data Register" in sif (cpu()!="LPC1102"&&cpu()!="LPC1102LV") hgroup.long 0x24++0x03 hide.long 0x00 "AD0DR5,A/D Data Register" in hgroup.long 0x28++0x03 hide.long 0x00 "AD0DR6,A/D Data Register" in hgroup.long 0x2C++0x03 hide.long 0x00 "AD0DR7,A/D Data Register" in endif rgroup.long 0x30++0x07 line.long 0x00 "AD0STAT,A/D Status Register" bitfld.long 0x00 16. " ADINT ,A/D Interrupt Flag" "Low,High" textline " " sif (cpu()!="LPC1102"&&cpu()!="LPC1102LV"&&cpu()!="LPC1110") bitfld.long 0x00 15. " OVERRUN7 ,Mirrors OVERRUN Status Flag for Channel 7" "Not occurred,Occurred" bitfld.long 0x00 14. " OVERRUN6 ,Mirrors OVERRUN Status Flag for Channel 6" "Not occurred,Occurred" textline " " bitfld.long 0x00 13. " OVERRUN5 ,Mirrors OVERRUN Status Flag for Channel 5" "Not occurred,Occurred" bitfld.long 0x00 12. " OVERRUN4 ,Mirrors OVERRUN Status Flag for Channel 4" "Not occurred,Occurred" else bitfld.long 0x00 12. " OVERRUN4 ,Mirrors OVERRUN Status Flag for Channel 4" "Not occurred,Occurred" endif textline " " bitfld.long 0x00 11. " OVERRUN3 ,Mirrors OVERRUN Status Flag for Channel 3" "Not occurred,Occurred" bitfld.long 0x00 10. " OVERRUN2 ,Mirrors OVERRUN Status Flag for Channel 2" "Not occurred,Occurred" textline " " bitfld.long 0x00 9. " OVERRUN1 ,Mirrors OVERRUN Status Flag for Channel 1" "Not occurred,Occurred" bitfld.long 0x00 8. " OVERRUN0 ,Mirrors OVERRUN Status Flag for Channel 0" "Not occurred,Occurred" textline " " sif (cpu()!="LPC1102"&&cpu()!="LPC1102LV"&&cpu()!="LPC1110") bitfld.long 0x00 7. " DONE7 ,Mirrors DONE Status Flag for Channel 7" "Not done,Done" bitfld.long 0x00 6. " DONE6 ,Mirrors DONE Status Flag for Channel 6" "Not done,Done" textline " " bitfld.long 0x00 5. " DONE5 ,Mirrors DONE Status Flag for Channel 5" "Not done,Done" bitfld.long 0x00 4. " DONE4 ,Mirrors DONE Status Flag for Channel 4" "Not done,Done" else bitfld.long 0x00 4. " DONE4 ,Mirrors DONE Status Flag for Channel 4" "Not done,Done" endif textline " " bitfld.long 0x00 3. " DONE3 ,Mirrors DONE Status Flag for Channel 3" "Not done,Done" bitfld.long 0x00 2. " DONE2 ,Mirrors DONE Status Flag for Channel 2" "Not done,Done" textline " " bitfld.long 0x00 1. " DONE1 ,Mirrors DONE Status Flag for Channel 1" "Not done,Done" bitfld.long 0x00 0. " DONE0 ,Mirrors DONE Status Flag for Channel 0" "Not done,Done" sif (!cpuis("LPC11E*")&&cpu()!="LPC1311"&&cpu()!="LPC1313"&&cpu()!="LPC1342"&&cpu()!="LPC1343"&&cpu()!="LPC1110"&&!cpuis("LPC1111*")&&!cpuis("LPC1112*")&&cpu()!="LPC1112LV"&&!cpuis("LPC1113*")&&!cpuis("LPC1114*")&&cpu()!="LPC1114LV"&&!cpuis("LPC1115*")&&cpu()!="LPC11D14"&&cpu()!="LPC11C12"&&cpu()!="LPC11C14"&&cpu()!="LPC1102"&&cpu()!="LPC11C22"&&cpu()!="LPC11C24"&&cpu()!="LPC11U12/201"&&cpu()!="LPC11U13/201"&&cpu()!="LPC11U14/201"&&cpu()!="LPC11U23/301"&&!cpuis("LPC11U24*")&&!cpuis("LPC11U3*")&&cpu()!="LPC11A02"&&cpu()!="LPC11A04"&&cpu()!="LPC11A11"&&cpu()!="LPC11A12"&&cpu()!="LPC11A13"&&cpu()!="LPC11A14"&&!cpuis("LPC181*")&&!cpuis("LPC182*")&&!cpuis("LPC183*")&&!cpuis("LPC185*")) group.long 0x34++0x03 line.long 0x00 "ADTRIM,A/D Trim register" sif (cpu()=="LPC1224"||cpu()=="LPC1225"||cpu()=="LPC1226"||cpu()=="LPC1227") bitfld.long 0x00 4.--7. " ADCOFFS ,Offset trim value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else bitfld.long 0x00 8.--11. " TRIM ,Trim value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " ADCOFFS ,Offset trim value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif endif width 0x0B tree.end sif (cpu()!="LPC1751"&&cpu()!="LPC1752"&&cpu()!="LPC1764") tree "DAC (Digital-to-Analog Converter)" base ad:0x4008C000 width 11. group.long 0x00++0xb line.long 0x00 "DACR,D/A Converter Register" bitfld.long 0x00 16. " BIAS ,Settling time\maximum current\maximum update rate" "1us/700uA/1MHz,2.5us/350uA/400kHz" hexmask.long.word 0x00 6.--15. 1. " VALUE ,Value" line.long 0x04 "DACCTRL,D/A Converter Control Register" bitfld.long 0x04 3. " DMA_ENA ,DMA access enable" "Disabled,Enabled" bitfld.long 0x04 2. " CNT_ENA ,Time-out counter operation enable" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " DBLBUF_ENA ,DACR double-buffering enable" "Disabled,Enabled" bitfld.long 0x04 0. " INT_DMA_REQ ,Interrupt DMA Request" "Not requested,Requested" line.long 0x08 "DACCNTVAL,D/A Converter Counter Value Register" hexmask.long.word 0x08 0.--15. 1. " VALUE ,16-bit reload value for the DAC interrupt/DMA timer" width 0xb tree.end endif tree "GPDMA (General Purpose DMA)" sif (cpu()=="LPC1772"||cpu()=="LPC1774"||cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778"||cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788") tree "General registers" base ad:0x20080000 width 19. rgroup.long 0x00++0x7 line.long 0x0 "DMACINTSTAT,DMA Interrupt Status Register" bitfld.long 0x0 7. " INTSTAT7 ,DMA channel 7 interrupt" "Inactive,Active" bitfld.long 0x0 6. " INTSTAT6 ,DMA channel 6 interrupt" "Inactive,Active" textline " " bitfld.long 0x0 5. " INTSTAT5 ,DMA channel 5 interrupt" "Inactive,Active" bitfld.long 0x0 4. " INTSTAT4 ,DMA channel 4 interrupt" "Inactive,Active" textline " " bitfld.long 0x0 3. " INTSTAT3 ,DMA channel 3 interrupt" "Inactive,Active" bitfld.long 0x0 2. " INTSTAT2 ,DMA channel 2 interrupt" "Inactive,Active" textline " " bitfld.long 0x0 1. " INTSTAT1 ,DMA channel 1 interrupt" "Inactive,Active" bitfld.long 0x0 0. " INTSTAT0 ,DMA channel 0 interrupt" "Inactive,Active" line.long 0x4 "DMACINTTCSTAT,DMA Interrupt Terminal Count Request Status Register" bitfld.long 0x4 7. " INTTCSTAT7 ,DMA channel 7 terminal count interrupt request" "Inactive,Active" bitfld.long 0x4 6. " INTTCSTAT6 ,DMA channel 6 terminal count interrupt request" "Inactive,Active" textline " " bitfld.long 0x4 5. " INTTCSTAT5 ,DMA channel 5 terminal count interrupt request" "Inactive,Active" bitfld.long 0x4 4. " INTTCSTAT4 ,DMA channel 4 terminal count interrupt request" "Inactive,Active" textline " " bitfld.long 0x4 3. " INTTCSTAT3 ,DMA channel 3 terminal count interrupt request" "Inactive,Active" bitfld.long 0x4 2. " INTTCSTAT2 ,DMA channel 2 terminal count interrupt request" "Inactive,Active" textline " " bitfld.long 0x4 1. " INTTCSTAT1 ,DMA channel 1 terminal count interrupt request" "Inactive,Active" bitfld.long 0x4 0. " INTTCSTAT0 ,DMA channel 0 terminal count interrupt request" "Inactive,Active" wgroup.long 0x08++0x3 line.long 0x0 "DMACINTTCCLEAR,DMA Interrupt Terminal Count Request Clear Register" bitfld.long 0x0 7. " INTTCCLEAR7 ,DMA channel 7 terminal count interrupt request clear" "No effect,Clear" bitfld.long 0x0 6. " INTTCCLEAR6 ,DMA channel 6 terminal count interrupt request clear" "No effect,Clear" textline " " bitfld.long 0x0 5. " INTTCCLEAR5 ,DMA channel 5 terminal count interrupt request clear" "No effect,Clear" bitfld.long 0x0 4. " INTTCCLEAR4 ,DMA channel 4 terminal count interrupt request clear" "No effect,Clear" textline " " bitfld.long 0x0 3. " INTTCCLEAR3 ,DMA channel 3 terminal count interrupt request clear" "No effect,Clear" bitfld.long 0x0 2. " INTTCCLEAR2 ,DMA channel 2 terminal count interrupt request clear" "No effect,Clear" textline " " bitfld.long 0x0 1. " INTTCCLEAR1 ,DMA channel 1 terminal count interrupt request clear" "No effect,Clear" bitfld.long 0x0 0. " INTTCCLEAR0 ,DMA channel 0 terminal count interrupt request clear" "No effect,Clear" rgroup.long 0x0C++0x3 line.long 0x0 "DMACINTERRSTAT,DMA Interrupt Error Status Register" bitfld.long 0x0 7. " INTERRSTAT7 ,DMA channel 7 interrupt error status" "No error,Error" bitfld.long 0x0 6. " INTERRSTAT6 ,DMA channel 6 interrupt error status" "No error,Error" textline " " bitfld.long 0x0 5. " INTERRSTAT5 ,DMA channel 5 interrupt error status" "No error,Error" bitfld.long 0x0 4. " INTERRSTAT4 ,DMA channel 4 interrupt error status" "No error,Error" textline " " bitfld.long 0x0 3. " INTERRSTAT3 ,DMA channel 3 interrupt error status" "No error,Error" bitfld.long 0x0 2. " INTERRSTAT2 ,DMA channel 2 interrupt error status" "No error,Error" textline " " bitfld.long 0x0 1. " INTERRSTAT1 ,DMA channel 1 interrupt error status" "No error,Error" bitfld.long 0x0 0. " INTERRSTAT0 ,DMA channel 0 interrupt error status" "No error,Error" wgroup.long 0x10++0x3 line.long 0x0 "DMACINTERRCLR,DMA Interrupt Error Clear Register" bitfld.long 0x0 7. " INTERRCLR7 ,DMA channel 7 interrupt error clear" "No effect,Clear" bitfld.long 0x0 6. " INTERRCLR6 ,DMA channel 6 interrupt error clear" "No effect,Clear" textline " " bitfld.long 0x0 5. " INTERRCLR5 ,DMA channel 5 interrupt error clear" "No effect,Clear" bitfld.long 0x0 4. " INTERRCLR4 ,DMA channel 4 interrupt error clear" "No effect,Clear" textline " " bitfld.long 0x0 3. " INTERRCLR3 ,DMA channel 3 interrupt error clear" "No effect,Clear" bitfld.long 0x0 2. " INTERRCLR2 ,DMA channel 2 interrupt error clear" "No effect,Clear" textline " " bitfld.long 0x0 1. " INTERRCLR1 ,DMA channel 1 interrupt error clear" "No effect,Clear" bitfld.long 0x0 0. " INTERRCLR0 ,DMA channel 0 interrupt error clear" "No effect,Clear" rgroup.long 0x14++0xB line.long 0x0 "DMACRAWINTTCSTAT,DMA Raw Interrupt Terminal Count Status Register" bitfld.long 0x0 7. " RAWINTTCSTAT7 ,DMA channel 7 terminal count interrupt status" "No interrupt,Interrupt" bitfld.long 0x0 6. " RAWINTTCSTAT6 ,DMA channel 6 terminal count interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x0 5. " RAWINTTCSTAT5 ,DMA channel 5 terminal count interrupt status" "No interrupt,Interrupt" bitfld.long 0x0 4. " RAWINTTCSTAT4 ,DMA channel 4 terminal count interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x0 3. " RAWINTTCSTAT3 ,DMA channel 3 terminal count interrupt status" "No interrupt,Interrupt" bitfld.long 0x0 2. " RAWINTTCSTAT2 ,DMA channel 2 terminal count interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x0 1. " RAWINTTCSTAT1 ,DMA channel 1 terminal count interrupt status" "No interrupt,Interrupt" bitfld.long 0x0 0. " RAWINTTCSTAT0 ,DMA channel 0 terminal count interrupt status" "No interrupt,Interrupt" line.long 0x4 "DMACRAWINTERRSTAT,DMA Raw Error Interrupt Status Register" bitfld.long 0x4 7. " RAWINTERRSTAT7 ,DMA channel 7 raw interrupt error status" "No error,Error" bitfld.long 0x4 6. " RAWINTERRSTAT6 ,DMA channel 6 raw interrupt error status" "No error,Error" textline " " bitfld.long 0x4 5. " RAWINTERRSTAT5 ,DMA channel 5 raw interrupt error status" "No error,Error" bitfld.long 0x4 4. " RAWINTERRSTAT4 ,DMA channel 4 raw interrupt error status" "No error,Error" textline " " bitfld.long 0x4 3. " RAWINTERRSTAT3 ,DMA channel 3 raw interrupt error status" "No error,Error" bitfld.long 0x4 2. " RAWINTERRSTAT2 ,DMA channel 2 raw interrupt error status" "No error,Error" textline " " bitfld.long 0x4 1. " RAWINTERRSTAT1 ,DMA channel 1 raw interrupt error status" "No error,Error" bitfld.long 0x4 0. " RAWINTERRSTAT0 ,DMA channel 0 raw interrupt error status" "No error,Error" line.long 0x8 "DMACENBLDCHNS,DMA Enabled Channel Register" bitfld.long 0x8 7. " CHANNEL7EN ,DMA channel 7 enable status" "Disabled,Enabled" bitfld.long 0x8 6. " CHANNEL6EN ,DMA channel 6 enable status" "Disabled,Enabled" textline " " bitfld.long 0x8 5. " CHANNEL5EN ,DMA channel 5 enable status" "Disabled,Enabled" bitfld.long 0x8 4. " CHANNEL4EN ,DMA channel 4 enable status" "Disabled,Enabled" textline " " bitfld.long 0x8 3. " CHANNEL3EN ,DMA channel 3 enable status" "Disabled,Enabled" bitfld.long 0x8 2. " CHANNEL2EN ,DMA channel 2 enable status" "Disabled,Enabled" textline " " bitfld.long 0x8 1. " CHANNEL1EN ,DMA channel 1 enable status" "Disabled,Enabled" bitfld.long 0x8 0. " CHANNEL0EN ,DMA channel 0 enable status" "Disabled,Enabled" group.long 0x20++0x17 line.long 0x0 "DMACSOFTBREQ,DMA Software Burst Request Register" bitfld.long 0x0 15. " SOFTBREQ15 ,DMA burst request for line 15" "No effect,Requested" bitfld.long 0x0 14. " SOFTBREQ14 ,DMA burst request for line 14" "No effect,Requested" textline " " bitfld.long 0x0 13. " SOFTBREQ13 ,DMA burst request for line 13" "No effect,Requested" bitfld.long 0x0 12. " SOFTBREQ12 ,DMA burst request for line 12" "No effect,Requested" textline " " bitfld.long 0x0 11. " SOFTBREQ11 ,DMA burst request for line 11" "No effect,Requested" bitfld.long 0x0 10. " SOFTBREQ10 ,DMA burst request for line 10" "No effect,Requested" textline " " bitfld.long 0x0 9. " SOFTBREQ9 ,DMA burst request for line 9" "No effect,Requested" bitfld.long 0x0 8. " SOFTBREQ8 ,DMA burst request for line 8" "No effect,Requested" textline " " bitfld.long 0x0 7. " SOFTBREQ7 ,DMA burst request for line 7" "No effect,Requested" bitfld.long 0x0 6. " SOFTBREQ6 ,DMA burst request for line 6" "No effect,Requested" textline " " bitfld.long 0x0 5. " SOFTBREQ5 ,DMA burst request for line 5" "No effect,Requested" bitfld.long 0x0 4. " SOFTBREQ4 ,DMA burst request for line 4" "No effect,Requested" textline " " bitfld.long 0x0 3. " SOFTBREQ3 ,DMA burst request for line 3" "No effect,Requested" bitfld.long 0x0 2. " SOFTBREQ2 ,DMA burst request for line 2" "No effect,Requested" textline " " bitfld.long 0x0 1. " SOFTBREQ1 ,DMA burst request for line 1" "No effect,Requested" bitfld.long 0x0 0. " SOFTBREQ0 ,DMA burst request for line 0" "No effect,Requested" line.long 0x4 "DMACSOFTSREQ,DMA Software Single Request Register" bitfld.long 0x4 15. " SOFTSREQ15 ,DMA single transfer request for line 15" "No effect,Requested" bitfld.long 0x4 14. " SOFTSREQ14 ,DMA single transfer request for line 14" "No effect,Requested" textline " " bitfld.long 0x4 13. " SOFTSREQ13 ,DMA single transfer request for line 13" "No effect,Requested" bitfld.long 0x4 12. " SOFTSREQ12 ,DMA single transfer request for line 12" "No effect,Requested" textline " " bitfld.long 0x4 11. " SOFTSREQ11 ,DMA single transfer request for line 11" "No effect,Requested" bitfld.long 0x4 10. " SOFTSREQ10 ,DMA single transfer request for line 10" "No effect,Requested" textline " " bitfld.long 0x4 9. " SOFTSREQ9 ,DMA single transfer request for line 9" "No effect,Requested" bitfld.long 0x4 8. " SOFTSREQ8 ,DMA single transfer request for line 8" "No effect,Requested" textline " " bitfld.long 0x4 7. " SOFTSREQ7 ,DMA single transfer request for line 7" "No effect,Requested" bitfld.long 0x4 6. " SOFTSREQ6 ,DMA single transfer request for line 6" "No effect,Requested" textline " " bitfld.long 0x4 5. " SOFTSREQ5 ,DMA single transfer request for line 5" "No effect,Requested" bitfld.long 0x4 4. " SOFTSREQ4 ,DMA single transfer request for line 4" "No effect,Requested" textline " " bitfld.long 0x4 3. " SOFTSREQ3 ,DMA single transfer request for line 3" "No effect,Requested" bitfld.long 0x4 2. " SOFTSREQ2 ,DMA single transfer request for line 2" "No effect,Requested" textline " " bitfld.long 0x4 1. " SOFTSREQ1 ,DMA single transfer request for line 1" "No effect,Requested" bitfld.long 0x4 0. " SOFTSREQ0 ,DMA single transfer request for line 0" "No effect,Requested" line.long 0x8 "DMACSOFTLBREQ,DMA Software Last Burst Requested Register" bitfld.long 0x8 15. " SOFTLBREQ15 ,DMA last burst request for line 15" "No effect,Requested" bitfld.long 0x8 14. " SOFTLBREQ14 ,DMA last burst request for line 14" "No effect,Requested" textline " " bitfld.long 0x8 13. " SOFTLBREQ13 ,DMA last burst request for line 13" "No effect,Requested" bitfld.long 0x8 12. " SOFTLBREQ12 ,DMA last burst request for line 12" "No effect,Requested" textline " " bitfld.long 0x8 11. " SOFTLBREQ11 ,DMA last burst request for line 11" "No effect,Requested" bitfld.long 0x8 10. " SOFTLBREQ10 ,DMA last burst request for line 10" "No effect,Requested" textline " " bitfld.long 0x8 9. " SOFTLBREQ9 ,DMA last burst request for line 9" "No effect,Requested" bitfld.long 0x8 8. " SOFTLBREQ8 ,DMA last burst request for line 8" "No effect,Requested" textline " " bitfld.long 0x8 7. " SOFTLBREQ7 ,DMA last burst request for line 7" "No effect,Requested" bitfld.long 0x8 6. " SOFTLBREQ6 ,DMA last burst request for line 6" "No effect,Requested" textline " " bitfld.long 0x8 5. " SOFTLBREQ5 ,DMA last burst request for line 5" "No effect,Requested" bitfld.long 0x8 4. " SOFTLBREQ4 ,DMA last burst request for line 4" "No effect,Requested" textline " " bitfld.long 0x8 3. " SOFTLBREQ3 ,DMA last burst request for line 3" "No effect,Requested" bitfld.long 0x8 2. " SOFTLBREQ2 ,DMA last burst request for line 2" "No effect,Requested" textline " " bitfld.long 0x8 1. " SOFTLBREQ1 ,DMA last burst request for line 1" "No effect,Requested" bitfld.long 0x8 0. " SOFTLBREQ0 ,DMA last burst request for line 0" "No effect,Requested" line.long 0xC "DMACSOFTLSREQ,DMA Software Last Single Requested Register" bitfld.long 0xC 15. " SOFTLSREQ15 ,DMA last single transfer request for line 15" "No effect,Requested" bitfld.long 0xC 14. " SOFTLSREQ14 ,DMA last single transfer request for line 14" "No effect,Requested" textline " " bitfld.long 0xC 13. " SOFTLSREQ13 ,DMA last single transfer request for line 13" "No effect,Requested" bitfld.long 0xC 12. " SOFTLSREQ12 ,DMA last single transfer request for line 12" "No effect,Requested" textline " " bitfld.long 0xC 11. " SOFTLSREQ11 ,DMA last single transfer request for line 11" "No effect,Requested" bitfld.long 0xC 10. " SOFTLSREQ10 ,DMA last single transfer request for line 10" "No effect,Requested" textline " " bitfld.long 0xC 9. " SOFTLSREQ9 ,DMA last single transfer request for line 9" "No effect,Requested" bitfld.long 0xC 8. " SOFTLSREQ8 ,DMA last single transfer request for line 8" "No effect,Requested" textline " " bitfld.long 0xC 7. " SOFTLSREQ7 ,DMA last single transfer request for line 7" "No effect,Requested" bitfld.long 0xC 6. " SOFTLSREQ6 ,DMA last single transfer request for line 6" "No effect,Requested" textline " " bitfld.long 0xC 5. " SOFTLSREQ5 ,DMA last single transfer request for line 5" "No effect,Requested" bitfld.long 0xC 4. " SOFTLSREQ4 ,DMA last single transfer request for line 4" "No effect,Requested" textline " " bitfld.long 0xC 3. " SOFTLSREQ3 ,DMA last single transfer request for line 3" "No effect,Requested" bitfld.long 0xC 2. " SOFTLSREQ2 ,DMA last single transfer request for line 2" "No effect,Requested" textline " " bitfld.long 0xC 1. " SOFTLSREQ1 ,DMA last single transfer request for line 1" "No effect,Requested" bitfld.long 0xC 0. " SOFTLSREQ0 ,DMA last single transfer request for line 0" "No effect,Requested" line.long 0x10 "DMACCONFIG,DMA Configuration Register" bitfld.long 0x10 1. " M ,AHB Master endianness configuration" "Little-endian,Big-endian" bitfld.long 0x10 0. " E ,DMA controller enable" "Disabled,Enabled" line.long 0x14 "DMACSYNC, DMA Synchronization register" bitfld.long 0x14 15. " DMACSYNC15 ,Synchronization logic for DMA request 15" "Disabed,Enabled" bitfld.long 0x14 14. " DMACSYNC14 ,Synchronization logic for DMA request 14" "Disabed,Enabled" textline " " bitfld.long 0x14 13. " DMACSYNC13 ,Synchronization logic for DMA request 13" "Disabed,Enabled" bitfld.long 0x14 12. " DMACSYNC12 ,Synchronization logic for DMA request 12" "Disabed,Enabled" textline " " bitfld.long 0x14 11. " DMACSYNC11 ,Synchronization logic for DMA request 11" "Disabed,Enabled" bitfld.long 0x14 10. " DMACSYNC10 ,Synchronization logic for DMA request 10" "Disabed,Enabled" textline " " bitfld.long 0x14 9. " DMACSYNC9 ,Synchronization logic for DMA request 9" "Disabed,Enabled" bitfld.long 0x14 8. " DMACSYNC8 ,Synchronization logic for DMA request 8" "Disabed,Enabled" textline " " bitfld.long 0x14 7. " DMACSYNC7 ,Synchronization logic for DMA request 7" "Disabed,Enabled" bitfld.long 0x14 6. " DMACSYNC6 ,Synchronization logic for DMA request 6" "Disabed,Enabled" textline " " bitfld.long 0x14 5. " DMACSYNC5 ,Synchronization logic for DMA request 5" "Disabed,Enabled" bitfld.long 0x14 4. " DMACSYNC4 ,Synchronization logic for DMA request 4" "Disabed,Enabled" textline " " bitfld.long 0x14 3. " DMACSYNC3 ,Synchronization logic for DMA request 3" "Disabed,Enabled" bitfld.long 0x14 2. " DMACSYNC2 ,Synchronization logic for DMA request 2" "Disabed,Enabled" textline " " bitfld.long 0x14 1. " DMACSYNC1 ,Synchronization logic for DMA request 1" "Disabed,Enabled" bitfld.long 0x14 0. " DMACSYNC0 ,Synchronization logic for DMA request 0" "Disabed,Enabled" sif (cpu()=="LPC1772"||cpu()=="LPC1774"||cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778"||cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788") group.long 0x2007C1C4++0x3 line.long 0x00 "DMAREQSEL,DMA Request Select register" bitfld.long 0x00 15. " DMASEL15 ,Selects the DMA request for GPDMA input15" "UART2 RX,Timer 3 match 1" bitfld.long 0x00 14. " DMASEL14 ,Selects the DMA request for GPDMA input14" "UART2 TX,Timer 3 match 0" textline " " bitfld.long 0x00 13. " DMASEL13 ,Selects the DMA request for GPDMA input 13" "UART1 RX,UART4 RX" bitfld.long 0x00 12. " DMASEL12 ,Selects the DMA request for GPDMA input 12" "UART1 TX,UART4 TX" textline " " bitfld.long 0x00 11. " DMASEL11 ,Selects the DMA request for GPDMA input 11" "UART0 RX,UART3 RX" bitfld.long 0x00 10. " DMASEL10 ,Selects the DMA request for GPDMA input 10" "UART0 TX,UART3 TX" textline " " sif (cpu()!="LPC1772") bitfld.long 0x00 7. " DMASEL07 ,Selects the DMA request for GPDMA input 7" "SSP2 RX,I2S channel 1" bitfld.long 0x00 6. " DMASEL06 ,Selects the DMA request for GPDMA input 6" "SSP2 TX,I2S channel 0" else bitfld.long 0x00 7. " DMASEL07 ,Selects the DMA request for GPDMA input 7" "SSP2 RX,?..." bitfld.long 0x00 6. " DMASEL06 ,Selects the DMA request for GPDMA input 6" "SSP2 TX,?..." endif textline " " bitfld.long 0x00 5. " DMASEL05 ,Selects the DMA request for GPDMA input 5" "SSP1 RX,Timer 2 match 1" bitfld.long 0x00 4. " DMASEL04 ,Selects the DMA request for GPDMA input 4" "SSP1 TX,Timer 2 match 0" textline " " bitfld.long 0x00 3. " DMASEL03 ,Selects the DMA request for GPDMA input 3" "SSP0 RX,Timer 1 match 1" bitfld.long 0x00 2. " DMASEL02 ,Selects the DMA request for GPDMA input 2" "SSP0 TX,Timer 1 match 0" textline " " sif (cpu()!="LPC1772"&&cpu()!="LPC1774") bitfld.long 0x00 1. " DMASEL01 ,Selects the DMA request for GPDMA input 1" "SD card,Timer 0 match 1" else bitfld.long 0x00 1. " DMASEL01 ,Selects the DMA request for GPDMA input 1" "Reserved,Timer 0 match 1" endif bitfld.long 0x00 0. " DMASEL00 ,Selects the DMA request for GPDMA input 0" "SPIFI,Timer 0 match 0" else group.long 0x1c4++0x3 line.long 0x00 "DMAREQSEL,DMA Request Select register" bitfld.long 0x00 7. " DMASEL15 ,DMA request for GPDMA input 15" "UART3 RX,Timer 3 match 1" bitfld.long 0x00 6. " DMASEL14 ,DMA request for GPDMA input 14" "UART3 TX,Timer 3 match 0" textline " " bitfld.long 0x00 5. " DMASEL13 ,DMA request for GPDMA input 13" "UART2 RX,Timer 2 match 1" bitfld.long 0x00 4. " DMASEL12 ,DMA request for GPDMA input 12" "UART2 TX,Timer 2 match 0" textline " " bitfld.long 0x00 3. " DMASEL11 ,DMA request for GPDMA input 11" "UART1 RX,Timer 1 match 1" bitfld.long 0x00 2. " DMASEL10 ,DMA request for GPDMA input 10" "UART1 TX,Timer 1match 0" textline " " bitfld.long 0x00 1. " DMASEL09 ,DMA request for GPDMA input 9" "UART0 RX,Timer 0 match 1" bitfld.long 0x00 0. " DMASEL08 ,DMA request for GPDMA input 8" "UART0 TX,Timer 0 match 0" endif width 0xB tree.end tree "Channel 0" base ad:0x20080100 width 16. group.long 0x00++0x13 line.long 0x0 "DMACC0SRCADDR,DMA Channel 0 Source Address Register" line.long 0x4 "DMACC0DESTADDR,DMA Channel 0 Destination Address Register" line.long 0x8 "DMACC0LLI,DMA Channel 0 Linked List Item Register" hexmask.long 0x8 2.--31. 0x4 " LLI ,Address for next linked list item" line.long 0xC "DMACC0CONTROL,DMA channel 0 control Register" bitfld.long 0xC 31. " I ,Terminal count interrupt enable" "Disabled,Enabled" bitfld.long 0xC 30. " PROT3 ,DMA bus access mode" "Not cacheable,Cacheable" textline " " bitfld.long 0xC 29. " PROT2 ,DMA bus access mode" "Not bufferable,Bufferable" bitfld.long 0xC 28. " PROT1 ,DMA bus access mode" "User,Privileged" textline " " bitfld.long 0xC 27. " DI ,Destination increment after each transfer" "Not incremented,Incremented" bitfld.long 0xC 26. " SI ,Source increment after each transfer" "Not incremented,Incremented" textline " " bitfld.long 0xC 21.--23. " DWIDTH ,Destination transfer width" "8-bit,16-bit,32-bit,?..." bitfld.long 0xC 18.--20. " SWIDTH ,Source transfer width" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0xC 15.--17. " DBSIZE ,Destination burst size" "1,4,8,16,32,64,128,256" bitfld.long 0xC 12.--14. " SBSIZE ,Source burst size" "1,4,8,16,32,64,128,256" textline " " hexmask.long.word 0xC 0.--11. 1. " TRANSFERSIZE ,Transfer size" line.long 0x10 "DMACC0CONFIG,Channel 0 Configuration Register" bitfld.long 0x10 18. " H ,Halt" "Disabled,Enabled" bitfld.long 0x10 17. " A ,Active" "Inactive,Active" textline " " bitfld.long 0x10 16. " L ,Locked transfers enable" "Disabled,Enabled" bitfld.long 0x10 15. " ITC ,Terminal count interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x10 14. " IE ,Interrupt error mask" "Not masked,Masked" textline " " sif (cpu()=="LPC1772"||cpu()=="LPC1774"||cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778"||cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788") bitfld.long 0x10 11.--13. " TRANSFERTYPE ,Flow control and transfer type" "DMA/Memory to memory,DMA/Memory to peripheral,DMA/Peripheral to memory,DMA/Source peripheral to destination peripheral,DP/Source peripheral to destination peripheral,DP/Memory to peripheral,SP/Peripheral to memory,SP/Source peripheral to destination peripheral" textline " " sif (cpu()!="LPC1772"&&cpu()!="LPC1774") bitfld.long 0x10 6.--10. " DESTPERIPHERAL ,Destination peripheral" "SPIFI/T0_MAT[0],SD card/T0_MAT[1],SSP0 Tx/T1_MAT[0],SSP0 Rx/T1_MAT[1],SSP1 Tx/T2_MAT[0],SSP1 Rx/T2_MAT[1],SSP2 TX/I2S channel 0,SSP2 Rx/I2S channel 1,ADC,DAC,UART0 Tx/UART3 Tx,UART0 Rx/UART3 Rx,UART1 Tx/UART4 Tx,UART1 Rx/UART4 Rx,UART2 Tx/MAT3.0,UART2 Rx/MAT3.1,?..." textline " " bitfld.long 0x10 1.--5. " SRCPERIPHERAL ,Source peripheral" "SPIFI/T0_MAT[0],SD card/T0_MAT[1],SSP0 Tx/T1_MAT[0],SSP0 Rx/T1_MAT[1],SSP1 Tx/T2_MAT[0],SSP1 Rx/T2_MAT[1],SSP2 TX/I2S channel 0,SSP2 Rx/I2Schannel 1,ADC,DAC,UART0 Tx/UART3 Tx,UART0 Rx/UART3 Rx,UART1 Tx/UART4 Tx,UART1 Rx/UART4 Rx,UART2 Tx/MAT3.0,UART2 Rx/MAT3.1,?..." else bitfld.long 0x10 6.--10. " DESTPERIPHERAL ,Destination peripheral" "SPIFI/T0_MAT[0],T0_MAT[1],SSP0 Tx/T1_MAT[0],SSP0 Rx/T1_MAT[1],SSP1 Tx/T2_MAT[0],SSP1 Rx/T2_MAT[1],SSP2 TX,SSP2 Rx,ADC,DAC,UART0 Tx/UART3 Tx,UART0 Rx/UART3 Rx,UART1 Tx/UART4 Tx,UART1 Rx/UART4 Rx,UART2 Tx/MAT3.0,UART2 Rx/MAT3.1,?..." textline " " bitfld.long 0x10 1.--5. " SRCPERIPHERAL ,Source peripheral" "SPIFI/T0_MAT[0],T0_MAT[1],SSP0 Tx/T1_MAT[0],SSP0 Rx/T1_MAT[1],SSP1 Tx/T2_MAT[0],SSP1 Rx/T2_MAT[1],SSP2 TX,SSP2 Rx,ADC,DAC,UART0 Tx/UART3 Tx,UART0 Rx/UART3 Rx,UART1 Tx/UART4 Tx,UART1 Rx/UART4 Rx,UART2 Tx/MAT3.0,UART2 Rx/MAT3.1,?..." endif else bitfld.long 0x10 11.--13. " FLOWCNTRL ,Flow control and transfer type" "DMA/Memory to memory,DMA/Memory to peripheral,DMA/Peripheral to memory,DMA/Source peripheral to destination peripheral,?..." textline " " bitfld.long 0x10 6.--10. " DESTPERIPHERAL ,Destination peripheral" "SSP0 Tx,SSP0 Rx,SSP1 Tx,SSP1 Rx,ADC,I2S channel 0,I2S channel 1,DAC,UART0 Tx / MAT0.0,UART0 Rx / MAT0.1,UART1 Tx / MAT1.0,UART1 Rx / MAT1.1,UART2 Tx / MAT2.0,UART2 Rx / MAT2.1,UART3 Tx / MAT3.0,UART3 Rx / MAT3.1,?..." textline " " bitfld.long 0x10 1.--5. " SRCPERIPHERAL ,Source peripheral" "SSP0 Tx,SSP0 Rx,SSP1 Tx,SSP1 Rx,ADC,I2S channel 0,I2S channel 1,DAC,UART0 Tx / MAT0.0,UART0 Rx / MAT0.1,UART1 Tx / MAT1.0,UART1 Rx / MAT1.1,UART2 Tx / MAT2.0,UART2 Rx / MAT2.1,UART3 Tx / MAT3.0,UART3 Rx / MAT3.1,?..." endif textline " " bitfld.long 0x10 0. " E ,Channel enable" "Disabled,Enabled" width 0xB tree.end tree "Channel 1" base ad:0x20080120 width 16. group.long 0x00++0x13 line.long 0x0 "DMACC1SRCADDR,DMA Channel 1 Source Address Register" line.long 0x4 "DMACC1DESTADDR,DMA Channel 1 Destination Address Register" line.long 0x8 "DMACC1LLI,DMA Channel 1 Linked List Item Register" hexmask.long 0x8 2.--31. 0x4 " LLI ,Address for next linked list item" line.long 0xC "DMACC1CONTROL,DMA channel 1 control Register" bitfld.long 0xC 31. " I ,Terminal count interrupt enable" "Disabled,Enabled" bitfld.long 0xC 30. " PROT3 ,DMA bus access mode" "Not cacheable,Cacheable" textline " " bitfld.long 0xC 29. " PROT2 ,DMA bus access mode" "Not bufferable,Bufferable" bitfld.long 0xC 28. " PROT1 ,DMA bus access mode" "User,Privileged" textline " " bitfld.long 0xC 27. " DI ,Destination increment after each transfer" "Not incremented,Incremented" bitfld.long 0xC 26. " SI ,Source increment after each transfer" "Not incremented,Incremented" textline " " bitfld.long 0xC 21.--23. " DWIDTH ,Destination transfer width" "8-bit,16-bit,32-bit,?..." bitfld.long 0xC 18.--20. " SWIDTH ,Source transfer width" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0xC 15.--17. " DBSIZE ,Destination burst size" "1,4,8,16,32,64,128,256" bitfld.long 0xC 12.--14. " SBSIZE ,Source burst size" "1,4,8,16,32,64,128,256" textline " " hexmask.long.word 0xC 0.--11. 1. " TRANSFERSIZE ,Transfer size" line.long 0x10 "DMACC1CONFIG,Channel 1 Configuration Register" bitfld.long 0x10 18. " H ,Halt" "Disabled,Enabled" bitfld.long 0x10 17. " A ,Active" "Inactive,Active" textline " " bitfld.long 0x10 16. " L ,Locked transfers enable" "Disabled,Enabled" bitfld.long 0x10 15. " ITC ,Terminal count interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x10 14. " IE ,Interrupt error mask" "Not masked,Masked" textline " " sif (cpu()=="LPC1772"||cpu()=="LPC1774"||cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778"||cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788") bitfld.long 0x10 11.--13. " TRANSFERTYPE ,Flow control and transfer type" "DMA/Memory to memory,DMA/Memory to peripheral,DMA/Peripheral to memory,DMA/Source peripheral to destination peripheral,DP/Source peripheral to destination peripheral,DP/Memory to peripheral,SP/Peripheral to memory,SP/Source peripheral to destination peripheral" textline " " sif (cpu()!="LPC1772"&&cpu()!="LPC1774") bitfld.long 0x10 6.--10. " DESTPERIPHERAL ,Destination peripheral" "SPIFI/T0_MAT[0],SD card/T0_MAT[1],SSP0 Tx/T1_MAT[0],SSP0 Rx/T1_MAT[1],SSP1 Tx/T2_MAT[0],SSP1 Rx/T2_MAT[1],SSP2 TX/I2S channel 0,SSP2 Rx/I2S channel 1,ADC,DAC,UART0 Tx/UART3 Tx,UART0 Rx/UART3 Rx,UART1 Tx/UART4 Tx,UART1 Rx/UART4 Rx,UART2 Tx/MAT3.0,UART2 Rx/MAT3.1,?..." textline " " bitfld.long 0x10 1.--5. " SRCPERIPHERAL ,Source peripheral" "SPIFI/T0_MAT[0],SD card/T0_MAT[1],SSP0 Tx/T1_MAT[0],SSP0 Rx/T1_MAT[1],SSP1 Tx/T2_MAT[0],SSP1 Rx/T2_MAT[1],SSP2 TX/I2S channel 0,SSP2 Rx/I2Schannel 1,ADC,DAC,UART0 Tx/UART3 Tx,UART0 Rx/UART3 Rx,UART1 Tx/UART4 Tx,UART1 Rx/UART4 Rx,UART2 Tx/MAT3.0,UART2 Rx/MAT3.1,?..." else bitfld.long 0x10 6.--10. " DESTPERIPHERAL ,Destination peripheral" "SPIFI/T0_MAT[0],T0_MAT[1],SSP0 Tx/T1_MAT[0],SSP0 Rx/T1_MAT[1],SSP1 Tx/T2_MAT[0],SSP1 Rx/T2_MAT[1],SSP2 TX,SSP2 Rx,ADC,DAC,UART0 Tx/UART3 Tx,UART0 Rx/UART3 Rx,UART1 Tx/UART4 Tx,UART1 Rx/UART4 Rx,UART2 Tx/MAT3.0,UART2 Rx/MAT3.1,?..." textline " " bitfld.long 0x10 1.--5. " SRCPERIPHERAL ,Source peripheral" "SPIFI/T0_MAT[0],T0_MAT[1],SSP0 Tx/T1_MAT[0],SSP0 Rx/T1_MAT[1],SSP1 Tx/T2_MAT[0],SSP1 Rx/T2_MAT[1],SSP2 TX,SSP2 Rx,ADC,DAC,UART0 Tx/UART3 Tx,UART0 Rx/UART3 Rx,UART1 Tx/UART4 Tx,UART1 Rx/UART4 Rx,UART2 Tx/MAT3.0,UART2 Rx/MAT3.1,?..." endif else bitfld.long 0x10 11.--13. " FLOWCNTRL ,Flow control and transfer type" "DMA/Memory to memory,DMA/Memory to peripheral,DMA/Peripheral to memory,DMA/Source peripheral to destination peripheral,?..." textline " " bitfld.long 0x10 6.--10. " DESTPERIPHERAL ,Destination peripheral" "SSP0 Tx,SSP0 Rx,SSP1 Tx,SSP1 Rx,ADC,I2S channel 0,I2S channel 1,DAC,UART0 Tx / MAT0.0,UART0 Rx / MAT0.1,UART1 Tx / MAT1.0,UART1 Rx / MAT1.1,UART2 Tx / MAT2.0,UART2 Rx / MAT2.1,UART3 Tx / MAT3.0,UART3 Rx / MAT3.1,?..." textline " " bitfld.long 0x10 1.--5. " SRCPERIPHERAL ,Source peripheral" "SSP0 Tx,SSP0 Rx,SSP1 Tx,SSP1 Rx,ADC,I2S channel 0,I2S channel 1,DAC,UART0 Tx / MAT0.0,UART0 Rx / MAT0.1,UART1 Tx / MAT1.0,UART1 Rx / MAT1.1,UART2 Tx / MAT2.0,UART2 Rx / MAT2.1,UART3 Tx / MAT3.0,UART3 Rx / MAT3.1,?..." endif textline " " bitfld.long 0x10 0. " E ,Channel enable" "Disabled,Enabled" width 0xB tree.end tree "Channel 2" base ad:0x20080140 width 16. group.long 0x00++0x13 line.long 0x0 "DMACC2SRCADDR,DMA Channel 2 Source Address Register" line.long 0x4 "DMACC2DESTADDR,DMA Channel 2 Destination Address Register" line.long 0x8 "DMACC2LLI,DMA Channel 2 Linked List Item Register" hexmask.long 0x8 2.--31. 0x4 " LLI ,Address for next linked list item" line.long 0xC "DMACC2CONTROL,DMA channel 2 control Register" bitfld.long 0xC 31. " I ,Terminal count interrupt enable" "Disabled,Enabled" bitfld.long 0xC 30. " PROT3 ,DMA bus access mode" "Not cacheable,Cacheable" textline " " bitfld.long 0xC 29. " PROT2 ,DMA bus access mode" "Not bufferable,Bufferable" bitfld.long 0xC 28. " PROT1 ,DMA bus access mode" "User,Privileged" textline " " bitfld.long 0xC 27. " DI ,Destination increment after each transfer" "Not incremented,Incremented" bitfld.long 0xC 26. " SI ,Source increment after each transfer" "Not incremented,Incremented" textline " " bitfld.long 0xC 21.--23. " DWIDTH ,Destination transfer width" "8-bit,16-bit,32-bit,?..." bitfld.long 0xC 18.--20. " SWIDTH ,Source transfer width" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0xC 15.--17. " DBSIZE ,Destination burst size" "1,4,8,16,32,64,128,256" bitfld.long 0xC 12.--14. " SBSIZE ,Source burst size" "1,4,8,16,32,64,128,256" textline " " hexmask.long.word 0xC 0.--11. 1. " TRANSFERSIZE ,Transfer size" line.long 0x10 "DMACC2CONFIG,Channel 2 Configuration Register" bitfld.long 0x10 18. " H ,Halt" "Disabled,Enabled" bitfld.long 0x10 17. " A ,Active" "Inactive,Active" textline " " bitfld.long 0x10 16. " L ,Locked transfers enable" "Disabled,Enabled" bitfld.long 0x10 15. " ITC ,Terminal count interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x10 14. " IE ,Interrupt error mask" "Not masked,Masked" textline " " sif (cpu()=="LPC1772"||cpu()=="LPC1774"||cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778"||cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788") bitfld.long 0x10 11.--13. " TRANSFERTYPE ,Flow control and transfer type" "DMA/Memory to memory,DMA/Memory to peripheral,DMA/Peripheral to memory,DMA/Source peripheral to destination peripheral,DP/Source peripheral to destination peripheral,DP/Memory to peripheral,SP/Peripheral to memory,SP/Source peripheral to destination peripheral" textline " " sif (cpu()!="LPC1772"&&cpu()!="LPC1774") bitfld.long 0x10 6.--10. " DESTPERIPHERAL ,Destination peripheral" "SPIFI/T0_MAT[0],SD card/T0_MAT[1],SSP0 Tx/T1_MAT[0],SSP0 Rx/T1_MAT[1],SSP1 Tx/T2_MAT[0],SSP1 Rx/T2_MAT[1],SSP2 TX/I2S channel 0,SSP2 Rx/I2S channel 1,ADC,DAC,UART0 Tx/UART3 Tx,UART0 Rx/UART3 Rx,UART1 Tx/UART4 Tx,UART1 Rx/UART4 Rx,UART2 Tx/MAT3.0,UART2 Rx/MAT3.1,?..." textline " " bitfld.long 0x10 1.--5. " SRCPERIPHERAL ,Source peripheral" "SPIFI/T0_MAT[0],SD card/T0_MAT[1],SSP0 Tx/T1_MAT[0],SSP0 Rx/T1_MAT[1],SSP1 Tx/T2_MAT[0],SSP1 Rx/T2_MAT[1],SSP2 TX/I2S channel 0,SSP2 Rx/I2Schannel 1,ADC,DAC,UART0 Tx/UART3 Tx,UART0 Rx/UART3 Rx,UART1 Tx/UART4 Tx,UART1 Rx/UART4 Rx,UART2 Tx/MAT3.0,UART2 Rx/MAT3.1,?..." else bitfld.long 0x10 6.--10. " DESTPERIPHERAL ,Destination peripheral" "SPIFI/T0_MAT[0],T0_MAT[1],SSP0 Tx/T1_MAT[0],SSP0 Rx/T1_MAT[1],SSP1 Tx/T2_MAT[0],SSP1 Rx/T2_MAT[1],SSP2 TX,SSP2 Rx,ADC,DAC,UART0 Tx/UART3 Tx,UART0 Rx/UART3 Rx,UART1 Tx/UART4 Tx,UART1 Rx/UART4 Rx,UART2 Tx/MAT3.0,UART2 Rx/MAT3.1,?..." textline " " bitfld.long 0x10 1.--5. " SRCPERIPHERAL ,Source peripheral" "SPIFI/T0_MAT[0],T0_MAT[1],SSP0 Tx/T1_MAT[0],SSP0 Rx/T1_MAT[1],SSP1 Tx/T2_MAT[0],SSP1 Rx/T2_MAT[1],SSP2 TX,SSP2 Rx,ADC,DAC,UART0 Tx/UART3 Tx,UART0 Rx/UART3 Rx,UART1 Tx/UART4 Tx,UART1 Rx/UART4 Rx,UART2 Tx/MAT3.0,UART2 Rx/MAT3.1,?..." endif else bitfld.long 0x10 11.--13. " FLOWCNTRL ,Flow control and transfer type" "DMA/Memory to memory,DMA/Memory to peripheral,DMA/Peripheral to memory,DMA/Source peripheral to destination peripheral,?..." textline " " bitfld.long 0x10 6.--10. " DESTPERIPHERAL ,Destination peripheral" "SSP0 Tx,SSP0 Rx,SSP1 Tx,SSP1 Rx,ADC,I2S channel 0,I2S channel 1,DAC,UART0 Tx / MAT0.0,UART0 Rx / MAT0.1,UART1 Tx / MAT1.0,UART1 Rx / MAT1.1,UART2 Tx / MAT2.0,UART2 Rx / MAT2.1,UART3 Tx / MAT3.0,UART3 Rx / MAT3.1,?..." textline " " bitfld.long 0x10 1.--5. " SRCPERIPHERAL ,Source peripheral" "SSP0 Tx,SSP0 Rx,SSP1 Tx,SSP1 Rx,ADC,I2S channel 0,I2S channel 1,DAC,UART0 Tx / MAT0.0,UART0 Rx / MAT0.1,UART1 Tx / MAT1.0,UART1 Rx / MAT1.1,UART2 Tx / MAT2.0,UART2 Rx / MAT2.1,UART3 Tx / MAT3.0,UART3 Rx / MAT3.1,?..." endif textline " " bitfld.long 0x10 0. " E ,Channel enable" "Disabled,Enabled" width 0xB tree.end tree "Channel 3" base ad:0x20080160 width 16. group.long 0x00++0x13 line.long 0x0 "DMACC3SRCADDR,DMA Channel 3 Source Address Register" line.long 0x4 "DMACC3DESTADDR,DMA Channel 3 Destination Address Register" line.long 0x8 "DMACC3LLI,DMA Channel 3 Linked List Item Register" hexmask.long 0x8 2.--31. 0x4 " LLI ,Address for next linked list item" line.long 0xC "DMACC3CONTROL,DMA channel 3 control Register" bitfld.long 0xC 31. " I ,Terminal count interrupt enable" "Disabled,Enabled" bitfld.long 0xC 30. " PROT3 ,DMA bus access mode" "Not cacheable,Cacheable" textline " " bitfld.long 0xC 29. " PROT2 ,DMA bus access mode" "Not bufferable,Bufferable" bitfld.long 0xC 28. " PROT1 ,DMA bus access mode" "User,Privileged" textline " " bitfld.long 0xC 27. " DI ,Destination increment after each transfer" "Not incremented,Incremented" bitfld.long 0xC 26. " SI ,Source increment after each transfer" "Not incremented,Incremented" textline " " bitfld.long 0xC 21.--23. " DWIDTH ,Destination transfer width" "8-bit,16-bit,32-bit,?..." bitfld.long 0xC 18.--20. " SWIDTH ,Source transfer width" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0xC 15.--17. " DBSIZE ,Destination burst size" "1,4,8,16,32,64,128,256" bitfld.long 0xC 12.--14. " SBSIZE ,Source burst size" "1,4,8,16,32,64,128,256" textline " " hexmask.long.word 0xC 0.--11. 1. " TRANSFERSIZE ,Transfer size" line.long 0x10 "DMACC3CONFIG,Channel 3 Configuration Register" bitfld.long 0x10 18. " H ,Halt" "Disabled,Enabled" bitfld.long 0x10 17. " A ,Active" "Inactive,Active" textline " " bitfld.long 0x10 16. " L ,Locked transfers enable" "Disabled,Enabled" bitfld.long 0x10 15. " ITC ,Terminal count interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x10 14. " IE ,Interrupt error mask" "Not masked,Masked" textline " " sif (cpu()=="LPC1772"||cpu()=="LPC1774"||cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778"||cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788") bitfld.long 0x10 11.--13. " TRANSFERTYPE ,Flow control and transfer type" "DMA/Memory to memory,DMA/Memory to peripheral,DMA/Peripheral to memory,DMA/Source peripheral to destination peripheral,DP/Source peripheral to destination peripheral,DP/Memory to peripheral,SP/Peripheral to memory,SP/Source peripheral to destination peripheral" textline " " sif (cpu()!="LPC1772"&&cpu()!="LPC1774") bitfld.long 0x10 6.--10. " DESTPERIPHERAL ,Destination peripheral" "SPIFI/T0_MAT[0],SD card/T0_MAT[1],SSP0 Tx/T1_MAT[0],SSP0 Rx/T1_MAT[1],SSP1 Tx/T2_MAT[0],SSP1 Rx/T2_MAT[1],SSP2 TX/I2S channel 0,SSP2 Rx/I2S channel 1,ADC,DAC,UART0 Tx/UART3 Tx,UART0 Rx/UART3 Rx,UART1 Tx/UART4 Tx,UART1 Rx/UART4 Rx,UART2 Tx/MAT3.0,UART2 Rx/MAT3.1,?..." textline " " bitfld.long 0x10 1.--5. " SRCPERIPHERAL ,Source peripheral" "SPIFI/T0_MAT[0],SD card/T0_MAT[1],SSP0 Tx/T1_MAT[0],SSP0 Rx/T1_MAT[1],SSP1 Tx/T2_MAT[0],SSP1 Rx/T2_MAT[1],SSP2 TX/I2S channel 0,SSP2 Rx/I2Schannel 1,ADC,DAC,UART0 Tx/UART3 Tx,UART0 Rx/UART3 Rx,UART1 Tx/UART4 Tx,UART1 Rx/UART4 Rx,UART2 Tx/MAT3.0,UART2 Rx/MAT3.1,?..." else bitfld.long 0x10 6.--10. " DESTPERIPHERAL ,Destination peripheral" "SPIFI/T0_MAT[0],T0_MAT[1],SSP0 Tx/T1_MAT[0],SSP0 Rx/T1_MAT[1],SSP1 Tx/T2_MAT[0],SSP1 Rx/T2_MAT[1],SSP2 TX,SSP2 Rx,ADC,DAC,UART0 Tx/UART3 Tx,UART0 Rx/UART3 Rx,UART1 Tx/UART4 Tx,UART1 Rx/UART4 Rx,UART2 Tx/MAT3.0,UART2 Rx/MAT3.1,?..." textline " " bitfld.long 0x10 1.--5. " SRCPERIPHERAL ,Source peripheral" "SPIFI/T0_MAT[0],T0_MAT[1],SSP0 Tx/T1_MAT[0],SSP0 Rx/T1_MAT[1],SSP1 Tx/T2_MAT[0],SSP1 Rx/T2_MAT[1],SSP2 TX,SSP2 Rx,ADC,DAC,UART0 Tx/UART3 Tx,UART0 Rx/UART3 Rx,UART1 Tx/UART4 Tx,UART1 Rx/UART4 Rx,UART2 Tx/MAT3.0,UART2 Rx/MAT3.1,?..." endif else bitfld.long 0x10 11.--13. " FLOWCNTRL ,Flow control and transfer type" "DMA/Memory to memory,DMA/Memory to peripheral,DMA/Peripheral to memory,DMA/Source peripheral to destination peripheral,?..." textline " " bitfld.long 0x10 6.--10. " DESTPERIPHERAL ,Destination peripheral" "SSP0 Tx,SSP0 Rx,SSP1 Tx,SSP1 Rx,ADC,I2S channel 0,I2S channel 1,DAC,UART0 Tx / MAT0.0,UART0 Rx / MAT0.1,UART1 Tx / MAT1.0,UART1 Rx / MAT1.1,UART2 Tx / MAT2.0,UART2 Rx / MAT2.1,UART3 Tx / MAT3.0,UART3 Rx / MAT3.1,?..." textline " " bitfld.long 0x10 1.--5. " SRCPERIPHERAL ,Source peripheral" "SSP0 Tx,SSP0 Rx,SSP1 Tx,SSP1 Rx,ADC,I2S channel 0,I2S channel 1,DAC,UART0 Tx / MAT0.0,UART0 Rx / MAT0.1,UART1 Tx / MAT1.0,UART1 Rx / MAT1.1,UART2 Tx / MAT2.0,UART2 Rx / MAT2.1,UART3 Tx / MAT3.0,UART3 Rx / MAT3.1,?..." endif textline " " bitfld.long 0x10 0. " E ,Channel enable" "Disabled,Enabled" width 0xB tree.end tree "Channel 4" base ad:0x20080180 width 16. group.long 0x00++0x13 line.long 0x0 "DMACC4SRCADDR,DMA Channel 4 Source Address Register" line.long 0x4 "DMACC4DESTADDR,DMA Channel 4 Destination Address Register" line.long 0x8 "DMACC4LLI,DMA Channel 4 Linked List Item Register" hexmask.long 0x8 2.--31. 0x4 " LLI ,Address for next linked list item" line.long 0xC "DMACC4CONTROL,DMA channel 4 control Register" bitfld.long 0xC 31. " I ,Terminal count interrupt enable" "Disabled,Enabled" bitfld.long 0xC 30. " PROT3 ,DMA bus access mode" "Not cacheable,Cacheable" textline " " bitfld.long 0xC 29. " PROT2 ,DMA bus access mode" "Not bufferable,Bufferable" bitfld.long 0xC 28. " PROT1 ,DMA bus access mode" "User,Privileged" textline " " bitfld.long 0xC 27. " DI ,Destination increment after each transfer" "Not incremented,Incremented" bitfld.long 0xC 26. " SI ,Source increment after each transfer" "Not incremented,Incremented" textline " " bitfld.long 0xC 21.--23. " DWIDTH ,Destination transfer width" "8-bit,16-bit,32-bit,?..." bitfld.long 0xC 18.--20. " SWIDTH ,Source transfer width" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0xC 15.--17. " DBSIZE ,Destination burst size" "1,4,8,16,32,64,128,256" bitfld.long 0xC 12.--14. " SBSIZE ,Source burst size" "1,4,8,16,32,64,128,256" textline " " hexmask.long.word 0xC 0.--11. 1. " TRANSFERSIZE ,Transfer size" line.long 0x10 "DMACC4CONFIG,Channel 4 Configuration Register" bitfld.long 0x10 18. " H ,Halt" "Disabled,Enabled" bitfld.long 0x10 17. " A ,Active" "Inactive,Active" textline " " bitfld.long 0x10 16. " L ,Locked transfers enable" "Disabled,Enabled" bitfld.long 0x10 15. " ITC ,Terminal count interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x10 14. " IE ,Interrupt error mask" "Not masked,Masked" textline " " sif (cpu()=="LPC1772"||cpu()=="LPC1774"||cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778"||cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788") bitfld.long 0x10 11.--13. " TRANSFERTYPE ,Flow control and transfer type" "DMA/Memory to memory,DMA/Memory to peripheral,DMA/Peripheral to memory,DMA/Source peripheral to destination peripheral,DP/Source peripheral to destination peripheral,DP/Memory to peripheral,SP/Peripheral to memory,SP/Source peripheral to destination peripheral" textline " " sif (cpu()!="LPC1772"&&cpu()!="LPC1774") bitfld.long 0x10 6.--10. " DESTPERIPHERAL ,Destination peripheral" "SPIFI/T0_MAT[0],SD card/T0_MAT[1],SSP0 Tx/T1_MAT[0],SSP0 Rx/T1_MAT[1],SSP1 Tx/T2_MAT[0],SSP1 Rx/T2_MAT[1],SSP2 TX/I2S channel 0,SSP2 Rx/I2S channel 1,ADC,DAC,UART0 Tx/UART3 Tx,UART0 Rx/UART3 Rx,UART1 Tx/UART4 Tx,UART1 Rx/UART4 Rx,UART2 Tx/MAT3.0,UART2 Rx/MAT3.1,?..." textline " " bitfld.long 0x10 1.--5. " SRCPERIPHERAL ,Source peripheral" "SPIFI/T0_MAT[0],SD card/T0_MAT[1],SSP0 Tx/T1_MAT[0],SSP0 Rx/T1_MAT[1],SSP1 Tx/T2_MAT[0],SSP1 Rx/T2_MAT[1],SSP2 TX/I2S channel 0,SSP2 Rx/I2Schannel 1,ADC,DAC,UART0 Tx/UART3 Tx,UART0 Rx/UART3 Rx,UART1 Tx/UART4 Tx,UART1 Rx/UART4 Rx,UART2 Tx/MAT3.0,UART2 Rx/MAT3.1,?..." else bitfld.long 0x10 6.--10. " DESTPERIPHERAL ,Destination peripheral" "SPIFI/T0_MAT[0],T0_MAT[1],SSP0 Tx/T1_MAT[0],SSP0 Rx/T1_MAT[1],SSP1 Tx/T2_MAT[0],SSP1 Rx/T2_MAT[1],SSP2 TX,SSP2 Rx,ADC,DAC,UART0 Tx/UART3 Tx,UART0 Rx/UART3 Rx,UART1 Tx/UART4 Tx,UART1 Rx/UART4 Rx,UART2 Tx/MAT3.0,UART2 Rx/MAT3.1,?..." textline " " bitfld.long 0x10 1.--5. " SRCPERIPHERAL ,Source peripheral" "SPIFI/T0_MAT[0],T0_MAT[1],SSP0 Tx/T1_MAT[0],SSP0 Rx/T1_MAT[1],SSP1 Tx/T2_MAT[0],SSP1 Rx/T2_MAT[1],SSP2 TX,SSP2 Rx,ADC,DAC,UART0 Tx/UART3 Tx,UART0 Rx/UART3 Rx,UART1 Tx/UART4 Tx,UART1 Rx/UART4 Rx,UART2 Tx/MAT3.0,UART2 Rx/MAT3.1,?..." endif else bitfld.long 0x10 11.--13. " FLOWCNTRL ,Flow control and transfer type" "DMA/Memory to memory,DMA/Memory to peripheral,DMA/Peripheral to memory,DMA/Source peripheral to destination peripheral,?..." textline " " bitfld.long 0x10 6.--10. " DESTPERIPHERAL ,Destination peripheral" "SSP0 Tx,SSP0 Rx,SSP1 Tx,SSP1 Rx,ADC,I2S channel 0,I2S channel 1,DAC,UART0 Tx / MAT0.0,UART0 Rx / MAT0.1,UART1 Tx / MAT1.0,UART1 Rx / MAT1.1,UART2 Tx / MAT2.0,UART2 Rx / MAT2.1,UART3 Tx / MAT3.0,UART3 Rx / MAT3.1,?..." textline " " bitfld.long 0x10 1.--5. " SRCPERIPHERAL ,Source peripheral" "SSP0 Tx,SSP0 Rx,SSP1 Tx,SSP1 Rx,ADC,I2S channel 0,I2S channel 1,DAC,UART0 Tx / MAT0.0,UART0 Rx / MAT0.1,UART1 Tx / MAT1.0,UART1 Rx / MAT1.1,UART2 Tx / MAT2.0,UART2 Rx / MAT2.1,UART3 Tx / MAT3.0,UART3 Rx / MAT3.1,?..." endif textline " " bitfld.long 0x10 0. " E ,Channel enable" "Disabled,Enabled" width 0xB tree.end tree "Channel 5" base ad:0x200801A0 width 16. group.long 0x00++0x13 line.long 0x0 "DMACC5SRCADDR,DMA Channel 5 Source Address Register" line.long 0x4 "DMACC5DESTADDR,DMA Channel 5 Destination Address Register" line.long 0x8 "DMACC5LLI,DMA Channel 5 Linked List Item Register" hexmask.long 0x8 2.--31. 0x4 " LLI ,Address for next linked list item" line.long 0xC "DMACC5CONTROL,DMA channel 5 control Register" bitfld.long 0xC 31. " I ,Terminal count interrupt enable" "Disabled,Enabled" bitfld.long 0xC 30. " PROT3 ,DMA bus access mode" "Not cacheable,Cacheable" textline " " bitfld.long 0xC 29. " PROT2 ,DMA bus access mode" "Not bufferable,Bufferable" bitfld.long 0xC 28. " PROT1 ,DMA bus access mode" "User,Privileged" textline " " bitfld.long 0xC 27. " DI ,Destination increment after each transfer" "Not incremented,Incremented" bitfld.long 0xC 26. " SI ,Source increment after each transfer" "Not incremented,Incremented" textline " " bitfld.long 0xC 21.--23. " DWIDTH ,Destination transfer width" "8-bit,16-bit,32-bit,?..." bitfld.long 0xC 18.--20. " SWIDTH ,Source transfer width" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0xC 15.--17. " DBSIZE ,Destination burst size" "1,4,8,16,32,64,128,256" bitfld.long 0xC 12.--14. " SBSIZE ,Source burst size" "1,4,8,16,32,64,128,256" textline " " hexmask.long.word 0xC 0.--11. 1. " TRANSFERSIZE ,Transfer size" line.long 0x10 "DMACC5CONFIG,Channel 5 Configuration Register" bitfld.long 0x10 18. " H ,Halt" "Disabled,Enabled" bitfld.long 0x10 17. " A ,Active" "Inactive,Active" textline " " bitfld.long 0x10 16. " L ,Locked transfers enable" "Disabled,Enabled" bitfld.long 0x10 15. " ITC ,Terminal count interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x10 14. " IE ,Interrupt error mask" "Not masked,Masked" textline " " sif (cpu()=="LPC1772"||cpu()=="LPC1774"||cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778"||cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788") bitfld.long 0x10 11.--13. " TRANSFERTYPE ,Flow control and transfer type" "DMA/Memory to memory,DMA/Memory to peripheral,DMA/Peripheral to memory,DMA/Source peripheral to destination peripheral,DP/Source peripheral to destination peripheral,DP/Memory to peripheral,SP/Peripheral to memory,SP/Source peripheral to destination peripheral" textline " " sif (cpu()!="LPC1772"&&cpu()!="LPC1774") bitfld.long 0x10 6.--10. " DESTPERIPHERAL ,Destination peripheral" "SPIFI/T0_MAT[0],SD card/T0_MAT[1],SSP0 Tx/T1_MAT[0],SSP0 Rx/T1_MAT[1],SSP1 Tx/T2_MAT[0],SSP1 Rx/T2_MAT[1],SSP2 TX/I2S channel 0,SSP2 Rx/I2S channel 1,ADC,DAC,UART0 Tx/UART3 Tx,UART0 Rx/UART3 Rx,UART1 Tx/UART4 Tx,UART1 Rx/UART4 Rx,UART2 Tx/MAT3.0,UART2 Rx/MAT3.1,?..." textline " " bitfld.long 0x10 1.--5. " SRCPERIPHERAL ,Source peripheral" "SPIFI/T0_MAT[0],SD card/T0_MAT[1],SSP0 Tx/T1_MAT[0],SSP0 Rx/T1_MAT[1],SSP1 Tx/T2_MAT[0],SSP1 Rx/T2_MAT[1],SSP2 TX/I2S channel 0,SSP2 Rx/I2Schannel 1,ADC,DAC,UART0 Tx/UART3 Tx,UART0 Rx/UART3 Rx,UART1 Tx/UART4 Tx,UART1 Rx/UART4 Rx,UART2 Tx/MAT3.0,UART2 Rx/MAT3.1,?..." else bitfld.long 0x10 6.--10. " DESTPERIPHERAL ,Destination peripheral" "SPIFI/T0_MAT[0],T0_MAT[1],SSP0 Tx/T1_MAT[0],SSP0 Rx/T1_MAT[1],SSP1 Tx/T2_MAT[0],SSP1 Rx/T2_MAT[1],SSP2 TX,SSP2 Rx,ADC,DAC,UART0 Tx/UART3 Tx,UART0 Rx/UART3 Rx,UART1 Tx/UART4 Tx,UART1 Rx/UART4 Rx,UART2 Tx/MAT3.0,UART2 Rx/MAT3.1,?..." textline " " bitfld.long 0x10 1.--5. " SRCPERIPHERAL ,Source peripheral" "SPIFI/T0_MAT[0],T0_MAT[1],SSP0 Tx/T1_MAT[0],SSP0 Rx/T1_MAT[1],SSP1 Tx/T2_MAT[0],SSP1 Rx/T2_MAT[1],SSP2 TX,SSP2 Rx,ADC,DAC,UART0 Tx/UART3 Tx,UART0 Rx/UART3 Rx,UART1 Tx/UART4 Tx,UART1 Rx/UART4 Rx,UART2 Tx/MAT3.0,UART2 Rx/MAT3.1,?..." endif else bitfld.long 0x10 11.--13. " FLOWCNTRL ,Flow control and transfer type" "DMA/Memory to memory,DMA/Memory to peripheral,DMA/Peripheral to memory,DMA/Source peripheral to destination peripheral,?..." textline " " bitfld.long 0x10 6.--10. " DESTPERIPHERAL ,Destination peripheral" "SSP0 Tx,SSP0 Rx,SSP1 Tx,SSP1 Rx,ADC,I2S channel 0,I2S channel 1,DAC,UART0 Tx / MAT0.0,UART0 Rx / MAT0.1,UART1 Tx / MAT1.0,UART1 Rx / MAT1.1,UART2 Tx / MAT2.0,UART2 Rx / MAT2.1,UART3 Tx / MAT3.0,UART3 Rx / MAT3.1,?..." textline " " bitfld.long 0x10 1.--5. " SRCPERIPHERAL ,Source peripheral" "SSP0 Tx,SSP0 Rx,SSP1 Tx,SSP1 Rx,ADC,I2S channel 0,I2S channel 1,DAC,UART0 Tx / MAT0.0,UART0 Rx / MAT0.1,UART1 Tx / MAT1.0,UART1 Rx / MAT1.1,UART2 Tx / MAT2.0,UART2 Rx / MAT2.1,UART3 Tx / MAT3.0,UART3 Rx / MAT3.1,?..." endif textline " " bitfld.long 0x10 0. " E ,Channel enable" "Disabled,Enabled" width 0xB tree.end tree "Channel 6" base ad:0x200801C0 width 16. group.long 0x00++0x13 line.long 0x0 "DMACC6SRCADDR,DMA Channel 6 Source Address Register" line.long 0x4 "DMACC6DESTADDR,DMA Channel 6 Destination Address Register" line.long 0x8 "DMACC6LLI,DMA Channel 6 Linked List Item Register" hexmask.long 0x8 2.--31. 0x4 " LLI ,Address for next linked list item" line.long 0xC "DMACC6CONTROL,DMA channel 6 control Register" bitfld.long 0xC 31. " I ,Terminal count interrupt enable" "Disabled,Enabled" bitfld.long 0xC 30. " PROT3 ,DMA bus access mode" "Not cacheable,Cacheable" textline " " bitfld.long 0xC 29. " PROT2 ,DMA bus access mode" "Not bufferable,Bufferable" bitfld.long 0xC 28. " PROT1 ,DMA bus access mode" "User,Privileged" textline " " bitfld.long 0xC 27. " DI ,Destination increment after each transfer" "Not incremented,Incremented" bitfld.long 0xC 26. " SI ,Source increment after each transfer" "Not incremented,Incremented" textline " " bitfld.long 0xC 21.--23. " DWIDTH ,Destination transfer width" "8-bit,16-bit,32-bit,?..." bitfld.long 0xC 18.--20. " SWIDTH ,Source transfer width" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0xC 15.--17. " DBSIZE ,Destination burst size" "1,4,8,16,32,64,128,256" bitfld.long 0xC 12.--14. " SBSIZE ,Source burst size" "1,4,8,16,32,64,128,256" textline " " hexmask.long.word 0xC 0.--11. 1. " TRANSFERSIZE ,Transfer size" line.long 0x10 "DMACC6CONFIG,Channel 6 Configuration Register" bitfld.long 0x10 18. " H ,Halt" "Disabled,Enabled" bitfld.long 0x10 17. " A ,Active" "Inactive,Active" textline " " bitfld.long 0x10 16. " L ,Locked transfers enable" "Disabled,Enabled" bitfld.long 0x10 15. " ITC ,Terminal count interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x10 14. " IE ,Interrupt error mask" "Not masked,Masked" textline " " sif (cpu()=="LPC1772"||cpu()=="LPC1774"||cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778"||cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788") bitfld.long 0x10 11.--13. " TRANSFERTYPE ,Flow control and transfer type" "DMA/Memory to memory,DMA/Memory to peripheral,DMA/Peripheral to memory,DMA/Source peripheral to destination peripheral,DP/Source peripheral to destination peripheral,DP/Memory to peripheral,SP/Peripheral to memory,SP/Source peripheral to destination peripheral" textline " " sif (cpu()!="LPC1772"&&cpu()!="LPC1774") bitfld.long 0x10 6.--10. " DESTPERIPHERAL ,Destination peripheral" "SPIFI/T0_MAT[0],SD card/T0_MAT[1],SSP0 Tx/T1_MAT[0],SSP0 Rx/T1_MAT[1],SSP1 Tx/T2_MAT[0],SSP1 Rx/T2_MAT[1],SSP2 TX/I2S channel 0,SSP2 Rx/I2S channel 1,ADC,DAC,UART0 Tx/UART3 Tx,UART0 Rx/UART3 Rx,UART1 Tx/UART4 Tx,UART1 Rx/UART4 Rx,UART2 Tx/MAT3.0,UART2 Rx/MAT3.1,?..." textline " " bitfld.long 0x10 1.--5. " SRCPERIPHERAL ,Source peripheral" "SPIFI/T0_MAT[0],SD card/T0_MAT[1],SSP0 Tx/T1_MAT[0],SSP0 Rx/T1_MAT[1],SSP1 Tx/T2_MAT[0],SSP1 Rx/T2_MAT[1],SSP2 TX/I2S channel 0,SSP2 Rx/I2Schannel 1,ADC,DAC,UART0 Tx/UART3 Tx,UART0 Rx/UART3 Rx,UART1 Tx/UART4 Tx,UART1 Rx/UART4 Rx,UART2 Tx/MAT3.0,UART2 Rx/MAT3.1,?..." else bitfld.long 0x10 6.--10. " DESTPERIPHERAL ,Destination peripheral" "SPIFI/T0_MAT[0],T0_MAT[1],SSP0 Tx/T1_MAT[0],SSP0 Rx/T1_MAT[1],SSP1 Tx/T2_MAT[0],SSP1 Rx/T2_MAT[1],SSP2 TX,SSP2 Rx,ADC,DAC,UART0 Tx/UART3 Tx,UART0 Rx/UART3 Rx,UART1 Tx/UART4 Tx,UART1 Rx/UART4 Rx,UART2 Tx/MAT3.0,UART2 Rx/MAT3.1,?..." textline " " bitfld.long 0x10 1.--5. " SRCPERIPHERAL ,Source peripheral" "SPIFI/T0_MAT[0],T0_MAT[1],SSP0 Tx/T1_MAT[0],SSP0 Rx/T1_MAT[1],SSP1 Tx/T2_MAT[0],SSP1 Rx/T2_MAT[1],SSP2 TX,SSP2 Rx,ADC,DAC,UART0 Tx/UART3 Tx,UART0 Rx/UART3 Rx,UART1 Tx/UART4 Tx,UART1 Rx/UART4 Rx,UART2 Tx/MAT3.0,UART2 Rx/MAT3.1,?..." endif else bitfld.long 0x10 11.--13. " FLOWCNTRL ,Flow control and transfer type" "DMA/Memory to memory,DMA/Memory to peripheral,DMA/Peripheral to memory,DMA/Source peripheral to destination peripheral,?..." textline " " bitfld.long 0x10 6.--10. " DESTPERIPHERAL ,Destination peripheral" "SSP0 Tx,SSP0 Rx,SSP1 Tx,SSP1 Rx,ADC,I2S channel 0,I2S channel 1,DAC,UART0 Tx / MAT0.0,UART0 Rx / MAT0.1,UART1 Tx / MAT1.0,UART1 Rx / MAT1.1,UART2 Tx / MAT2.0,UART2 Rx / MAT2.1,UART3 Tx / MAT3.0,UART3 Rx / MAT3.1,?..." textline " " bitfld.long 0x10 1.--5. " SRCPERIPHERAL ,Source peripheral" "SSP0 Tx,SSP0 Rx,SSP1 Tx,SSP1 Rx,ADC,I2S channel 0,I2S channel 1,DAC,UART0 Tx / MAT0.0,UART0 Rx / MAT0.1,UART1 Tx / MAT1.0,UART1 Rx / MAT1.1,UART2 Tx / MAT2.0,UART2 Rx / MAT2.1,UART3 Tx / MAT3.0,UART3 Rx / MAT3.1,?..." endif textline " " bitfld.long 0x10 0. " E ,Channel enable" "Disabled,Enabled" width 0xB tree.end tree "Channel 7" base ad:0x200801E0 width 16. group.long 0x00++0x13 line.long 0x0 "DMACC7SRCADDR,DMA Channel 7 Source Address Register" line.long 0x4 "DMACC7DESTADDR,DMA Channel 7 Destination Address Register" line.long 0x8 "DMACC7LLI,DMA Channel 7 Linked List Item Register" hexmask.long 0x8 2.--31. 0x4 " LLI ,Address for next linked list item" line.long 0xC "DMACC7CONTROL,DMA channel 7 control Register" bitfld.long 0xC 31. " I ,Terminal count interrupt enable" "Disabled,Enabled" bitfld.long 0xC 30. " PROT3 ,DMA bus access mode" "Not cacheable,Cacheable" textline " " bitfld.long 0xC 29. " PROT2 ,DMA bus access mode" "Not bufferable,Bufferable" bitfld.long 0xC 28. " PROT1 ,DMA bus access mode" "User,Privileged" textline " " bitfld.long 0xC 27. " DI ,Destination increment after each transfer" "Not incremented,Incremented" bitfld.long 0xC 26. " SI ,Source increment after each transfer" "Not incremented,Incremented" textline " " bitfld.long 0xC 21.--23. " DWIDTH ,Destination transfer width" "8-bit,16-bit,32-bit,?..." bitfld.long 0xC 18.--20. " SWIDTH ,Source transfer width" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0xC 15.--17. " DBSIZE ,Destination burst size" "1,4,8,16,32,64,128,256" bitfld.long 0xC 12.--14. " SBSIZE ,Source burst size" "1,4,8,16,32,64,128,256" textline " " hexmask.long.word 0xC 0.--11. 1. " TRANSFERSIZE ,Transfer size" line.long 0x10 "DMACC7CONFIG,Channel 7 Configuration Register" bitfld.long 0x10 18. " H ,Halt" "Disabled,Enabled" bitfld.long 0x10 17. " A ,Active" "Inactive,Active" textline " " bitfld.long 0x10 16. " L ,Locked transfers enable" "Disabled,Enabled" bitfld.long 0x10 15. " ITC ,Terminal count interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x10 14. " IE ,Interrupt error mask" "Not masked,Masked" textline " " sif (cpu()=="LPC1772"||cpu()=="LPC1774"||cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778"||cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788") bitfld.long 0x10 11.--13. " TRANSFERTYPE ,Flow control and transfer type" "DMA/Memory to memory,DMA/Memory to peripheral,DMA/Peripheral to memory,DMA/Source peripheral to destination peripheral,DP/Source peripheral to destination peripheral,DP/Memory to peripheral,SP/Peripheral to memory,SP/Source peripheral to destination peripheral" textline " " sif (cpu()!="LPC1772"&&cpu()!="LPC1774") bitfld.long 0x10 6.--10. " DESTPERIPHERAL ,Destination peripheral" "SPIFI/T0_MAT[0],SD card/T0_MAT[1],SSP0 Tx/T1_MAT[0],SSP0 Rx/T1_MAT[1],SSP1 Tx/T2_MAT[0],SSP1 Rx/T2_MAT[1],SSP2 TX/I2S channel 0,SSP2 Rx/I2S channel 1,ADC,DAC,UART0 Tx/UART3 Tx,UART0 Rx/UART3 Rx,UART1 Tx/UART4 Tx,UART1 Rx/UART4 Rx,UART2 Tx/MAT3.0,UART2 Rx/MAT3.1,?..." textline " " bitfld.long 0x10 1.--5. " SRCPERIPHERAL ,Source peripheral" "SPIFI/T0_MAT[0],SD card/T0_MAT[1],SSP0 Tx/T1_MAT[0],SSP0 Rx/T1_MAT[1],SSP1 Tx/T2_MAT[0],SSP1 Rx/T2_MAT[1],SSP2 TX/I2S channel 0,SSP2 Rx/I2Schannel 1,ADC,DAC,UART0 Tx/UART3 Tx,UART0 Rx/UART3 Rx,UART1 Tx/UART4 Tx,UART1 Rx/UART4 Rx,UART2 Tx/MAT3.0,UART2 Rx/MAT3.1,?..." else bitfld.long 0x10 6.--10. " DESTPERIPHERAL ,Destination peripheral" "SPIFI/T0_MAT[0],T0_MAT[1],SSP0 Tx/T1_MAT[0],SSP0 Rx/T1_MAT[1],SSP1 Tx/T2_MAT[0],SSP1 Rx/T2_MAT[1],SSP2 TX,SSP2 Rx,ADC,DAC,UART0 Tx/UART3 Tx,UART0 Rx/UART3 Rx,UART1 Tx/UART4 Tx,UART1 Rx/UART4 Rx,UART2 Tx/MAT3.0,UART2 Rx/MAT3.1,?..." textline " " bitfld.long 0x10 1.--5. " SRCPERIPHERAL ,Source peripheral" "SPIFI/T0_MAT[0],T0_MAT[1],SSP0 Tx/T1_MAT[0],SSP0 Rx/T1_MAT[1],SSP1 Tx/T2_MAT[0],SSP1 Rx/T2_MAT[1],SSP2 TX,SSP2 Rx,ADC,DAC,UART0 Tx/UART3 Tx,UART0 Rx/UART3 Rx,UART1 Tx/UART4 Tx,UART1 Rx/UART4 Rx,UART2 Tx/MAT3.0,UART2 Rx/MAT3.1,?..." endif else bitfld.long 0x10 11.--13. " FLOWCNTRL ,Flow control and transfer type" "DMA/Memory to memory,DMA/Memory to peripheral,DMA/Peripheral to memory,DMA/Source peripheral to destination peripheral,?..." textline " " bitfld.long 0x10 6.--10. " DESTPERIPHERAL ,Destination peripheral" "SSP0 Tx,SSP0 Rx,SSP1 Tx,SSP1 Rx,ADC,I2S channel 0,I2S channel 1,DAC,UART0 Tx / MAT0.0,UART0 Rx / MAT0.1,UART1 Tx / MAT1.0,UART1 Rx / MAT1.1,UART2 Tx / MAT2.0,UART2 Rx / MAT2.1,UART3 Tx / MAT3.0,UART3 Rx / MAT3.1,?..." textline " " bitfld.long 0x10 1.--5. " SRCPERIPHERAL ,Source peripheral" "SSP0 Tx,SSP0 Rx,SSP1 Tx,SSP1 Rx,ADC,I2S channel 0,I2S channel 1,DAC,UART0 Tx / MAT0.0,UART0 Rx / MAT0.1,UART1 Tx / MAT1.0,UART1 Rx / MAT1.1,UART2 Tx / MAT2.0,UART2 Rx / MAT2.1,UART3 Tx / MAT3.0,UART3 Rx / MAT3.1,?..." endif textline " " bitfld.long 0x10 0. " E ,Channel enable" "Disabled,Enabled" width 0xB tree.end else tree "General registers" base ad:0x50004000 width 19. rgroup.long 0x00++0x7 line.long 0x0 "DMACINTSTAT,DMA Interrupt Status Register" bitfld.long 0x0 7. " INTSTAT7 ,DMA channel 7 interrupt" "Inactive,Active" bitfld.long 0x0 6. " INTSTAT6 ,DMA channel 6 interrupt" "Inactive,Active" textline " " bitfld.long 0x0 5. " INTSTAT5 ,DMA channel 5 interrupt" "Inactive,Active" bitfld.long 0x0 4. " INTSTAT4 ,DMA channel 4 interrupt" "Inactive,Active" textline " " bitfld.long 0x0 3. " INTSTAT3 ,DMA channel 3 interrupt" "Inactive,Active" bitfld.long 0x0 2. " INTSTAT2 ,DMA channel 2 interrupt" "Inactive,Active" textline " " bitfld.long 0x0 1. " INTSTAT1 ,DMA channel 1 interrupt" "Inactive,Active" bitfld.long 0x0 0. " INTSTAT0 ,DMA channel 0 interrupt" "Inactive,Active" line.long 0x4 "DMACINTTCSTAT,DMA Interrupt Terminal Count Request Status Register" bitfld.long 0x4 7. " INTTCSTAT7 ,DMA channel 7 terminal count interrupt request" "Inactive,Active" bitfld.long 0x4 6. " INTTCSTAT6 ,DMA channel 6 terminal count interrupt request" "Inactive,Active" textline " " bitfld.long 0x4 5. " INTTCSTAT5 ,DMA channel 5 terminal count interrupt request" "Inactive,Active" bitfld.long 0x4 4. " INTTCSTAT4 ,DMA channel 4 terminal count interrupt request" "Inactive,Active" textline " " bitfld.long 0x4 3. " INTTCSTAT3 ,DMA channel 3 terminal count interrupt request" "Inactive,Active" bitfld.long 0x4 2. " INTTCSTAT2 ,DMA channel 2 terminal count interrupt request" "Inactive,Active" textline " " bitfld.long 0x4 1. " INTTCSTAT1 ,DMA channel 1 terminal count interrupt request" "Inactive,Active" bitfld.long 0x4 0. " INTTCSTAT0 ,DMA channel 0 terminal count interrupt request" "Inactive,Active" wgroup.long 0x08++0x3 line.long 0x0 "DMACINTTCCLEAR,DMA Interrupt Terminal Count Request Clear Register" bitfld.long 0x0 7. " INTTCCLEAR7 ,DMA channel 7 terminal count interrupt request clear" "No effect,Clear" bitfld.long 0x0 6. " INTTCCLEAR6 ,DMA channel 6 terminal count interrupt request clear" "No effect,Clear" textline " " bitfld.long 0x0 5. " INTTCCLEAR5 ,DMA channel 5 terminal count interrupt request clear" "No effect,Clear" bitfld.long 0x0 4. " INTTCCLEAR4 ,DMA channel 4 terminal count interrupt request clear" "No effect,Clear" textline " " bitfld.long 0x0 3. " INTTCCLEAR3 ,DMA channel 3 terminal count interrupt request clear" "No effect,Clear" bitfld.long 0x0 2. " INTTCCLEAR2 ,DMA channel 2 terminal count interrupt request clear" "No effect,Clear" textline " " bitfld.long 0x0 1. " INTTCCLEAR1 ,DMA channel 1 terminal count interrupt request clear" "No effect,Clear" bitfld.long 0x0 0. " INTTCCLEAR0 ,DMA channel 0 terminal count interrupt request clear" "No effect,Clear" rgroup.long 0x0C++0x3 line.long 0x0 "DMACINTERRSTAT,DMA Interrupt Error Status Register" bitfld.long 0x0 7. " INTERRSTAT7 ,DMA channel 7 interrupt error status" "No error,Error" bitfld.long 0x0 6. " INTERRSTAT6 ,DMA channel 6 interrupt error status" "No error,Error" textline " " bitfld.long 0x0 5. " INTERRSTAT5 ,DMA channel 5 interrupt error status" "No error,Error" bitfld.long 0x0 4. " INTERRSTAT4 ,DMA channel 4 interrupt error status" "No error,Error" textline " " bitfld.long 0x0 3. " INTERRSTAT3 ,DMA channel 3 interrupt error status" "No error,Error" bitfld.long 0x0 2. " INTERRSTAT2 ,DMA channel 2 interrupt error status" "No error,Error" textline " " bitfld.long 0x0 1. " INTERRSTAT1 ,DMA channel 1 interrupt error status" "No error,Error" bitfld.long 0x0 0. " INTERRSTAT0 ,DMA channel 0 interrupt error status" "No error,Error" wgroup.long 0x10++0x3 line.long 0x0 "DMACINTERRCLR,DMA Interrupt Error Clear Register" bitfld.long 0x0 7. " INTERRCLR7 ,DMA channel 7 interrupt error clear" "No effect,Clear" bitfld.long 0x0 6. " INTERRCLR6 ,DMA channel 6 interrupt error clear" "No effect,Clear" textline " " bitfld.long 0x0 5. " INTERRCLR5 ,DMA channel 5 interrupt error clear" "No effect,Clear" bitfld.long 0x0 4. " INTERRCLR4 ,DMA channel 4 interrupt error clear" "No effect,Clear" textline " " bitfld.long 0x0 3. " INTERRCLR3 ,DMA channel 3 interrupt error clear" "No effect,Clear" bitfld.long 0x0 2. " INTERRCLR2 ,DMA channel 2 interrupt error clear" "No effect,Clear" textline " " bitfld.long 0x0 1. " INTERRCLR1 ,DMA channel 1 interrupt error clear" "No effect,Clear" bitfld.long 0x0 0. " INTERRCLR0 ,DMA channel 0 interrupt error clear" "No effect,Clear" rgroup.long 0x14++0xB line.long 0x0 "DMACRAWINTTCSTAT,DMA Raw Interrupt Terminal Count Status Register" bitfld.long 0x0 7. " RAWINTTCSTAT7 ,DMA channel 7 terminal count interrupt status" "No interrupt,Interrupt" bitfld.long 0x0 6. " RAWINTTCSTAT6 ,DMA channel 6 terminal count interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x0 5. " RAWINTTCSTAT5 ,DMA channel 5 terminal count interrupt status" "No interrupt,Interrupt" bitfld.long 0x0 4. " RAWINTTCSTAT4 ,DMA channel 4 terminal count interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x0 3. " RAWINTTCSTAT3 ,DMA channel 3 terminal count interrupt status" "No interrupt,Interrupt" bitfld.long 0x0 2. " RAWINTTCSTAT2 ,DMA channel 2 terminal count interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x0 1. " RAWINTTCSTAT1 ,DMA channel 1 terminal count interrupt status" "No interrupt,Interrupt" bitfld.long 0x0 0. " RAWINTTCSTAT0 ,DMA channel 0 terminal count interrupt status" "No interrupt,Interrupt" line.long 0x4 "DMACRAWINTERRSTAT,DMA Raw Error Interrupt Status Register" bitfld.long 0x4 7. " RAWINTERRSTAT7 ,DMA channel 7 raw interrupt error status" "No error,Error" bitfld.long 0x4 6. " RAWINTERRSTAT6 ,DMA channel 6 raw interrupt error status" "No error,Error" textline " " bitfld.long 0x4 5. " RAWINTERRSTAT5 ,DMA channel 5 raw interrupt error status" "No error,Error" bitfld.long 0x4 4. " RAWINTERRSTAT4 ,DMA channel 4 raw interrupt error status" "No error,Error" textline " " bitfld.long 0x4 3. " RAWINTERRSTAT3 ,DMA channel 3 raw interrupt error status" "No error,Error" bitfld.long 0x4 2. " RAWINTERRSTAT2 ,DMA channel 2 raw interrupt error status" "No error,Error" textline " " bitfld.long 0x4 1. " RAWINTERRSTAT1 ,DMA channel 1 raw interrupt error status" "No error,Error" bitfld.long 0x4 0. " RAWINTERRSTAT0 ,DMA channel 0 raw interrupt error status" "No error,Error" line.long 0x8 "DMACENBLDCHNS,DMA Enabled Channel Register" bitfld.long 0x8 7. " CHANNEL7EN ,DMA channel 7 enable status" "Disabled,Enabled" bitfld.long 0x8 6. " CHANNEL6EN ,DMA channel 6 enable status" "Disabled,Enabled" textline " " bitfld.long 0x8 5. " CHANNEL5EN ,DMA channel 5 enable status" "Disabled,Enabled" bitfld.long 0x8 4. " CHANNEL4EN ,DMA channel 4 enable status" "Disabled,Enabled" textline " " bitfld.long 0x8 3. " CHANNEL3EN ,DMA channel 3 enable status" "Disabled,Enabled" bitfld.long 0x8 2. " CHANNEL2EN ,DMA channel 2 enable status" "Disabled,Enabled" textline " " bitfld.long 0x8 1. " CHANNEL1EN ,DMA channel 1 enable status" "Disabled,Enabled" bitfld.long 0x8 0. " CHANNEL0EN ,DMA channel 0 enable status" "Disabled,Enabled" group.long 0x20++0x17 line.long 0x0 "DMACSOFTBREQ,DMA Software Burst Request Register" bitfld.long 0x0 15. " SOFTBREQ15 ,DMA burst request for line 15" "No effect,Requested" bitfld.long 0x0 14. " SOFTBREQ14 ,DMA burst request for line 14" "No effect,Requested" textline " " bitfld.long 0x0 13. " SOFTBREQ13 ,DMA burst request for line 13" "No effect,Requested" bitfld.long 0x0 12. " SOFTBREQ12 ,DMA burst request for line 12" "No effect,Requested" textline " " bitfld.long 0x0 11. " SOFTBREQ11 ,DMA burst request for line 11" "No effect,Requested" bitfld.long 0x0 10. " SOFTBREQ10 ,DMA burst request for line 10" "No effect,Requested" textline " " bitfld.long 0x0 9. " SOFTBREQ9 ,DMA burst request for line 9" "No effect,Requested" bitfld.long 0x0 8. " SOFTBREQ8 ,DMA burst request for line 8" "No effect,Requested" textline " " bitfld.long 0x0 7. " SOFTBREQ7 ,DMA burst request for line 7" "No effect,Requested" bitfld.long 0x0 6. " SOFTBREQ6 ,DMA burst request for line 6" "No effect,Requested" textline " " bitfld.long 0x0 5. " SOFTBREQ5 ,DMA burst request for line 5" "No effect,Requested" bitfld.long 0x0 4. " SOFTBREQ4 ,DMA burst request for line 4" "No effect,Requested" textline " " bitfld.long 0x0 3. " SOFTBREQ3 ,DMA burst request for line 3" "No effect,Requested" bitfld.long 0x0 2. " SOFTBREQ2 ,DMA burst request for line 2" "No effect,Requested" textline " " bitfld.long 0x0 1. " SOFTBREQ1 ,DMA burst request for line 1" "No effect,Requested" bitfld.long 0x0 0. " SOFTBREQ0 ,DMA burst request for line 0" "No effect,Requested" line.long 0x4 "DMACSOFTSREQ,DMA Software Single Request Register" bitfld.long 0x4 15. " SOFTSREQ15 ,DMA single transfer request for line 15" "No effect,Requested" bitfld.long 0x4 14. " SOFTSREQ14 ,DMA single transfer request for line 14" "No effect,Requested" textline " " bitfld.long 0x4 13. " SOFTSREQ13 ,DMA single transfer request for line 13" "No effect,Requested" bitfld.long 0x4 12. " SOFTSREQ12 ,DMA single transfer request for line 12" "No effect,Requested" textline " " bitfld.long 0x4 11. " SOFTSREQ11 ,DMA single transfer request for line 11" "No effect,Requested" bitfld.long 0x4 10. " SOFTSREQ10 ,DMA single transfer request for line 10" "No effect,Requested" textline " " bitfld.long 0x4 9. " SOFTSREQ9 ,DMA single transfer request for line 9" "No effect,Requested" bitfld.long 0x4 8. " SOFTSREQ8 ,DMA single transfer request for line 8" "No effect,Requested" textline " " bitfld.long 0x4 7. " SOFTSREQ7 ,DMA single transfer request for line 7" "No effect,Requested" bitfld.long 0x4 6. " SOFTSREQ6 ,DMA single transfer request for line 6" "No effect,Requested" textline " " bitfld.long 0x4 5. " SOFTSREQ5 ,DMA single transfer request for line 5" "No effect,Requested" bitfld.long 0x4 4. " SOFTSREQ4 ,DMA single transfer request for line 4" "No effect,Requested" textline " " bitfld.long 0x4 3. " SOFTSREQ3 ,DMA single transfer request for line 3" "No effect,Requested" bitfld.long 0x4 2. " SOFTSREQ2 ,DMA single transfer request for line 2" "No effect,Requested" textline " " bitfld.long 0x4 1. " SOFTSREQ1 ,DMA single transfer request for line 1" "No effect,Requested" bitfld.long 0x4 0. " SOFTSREQ0 ,DMA single transfer request for line 0" "No effect,Requested" line.long 0x8 "DMACSOFTLBREQ,DMA Software Last Burst Requested Register" bitfld.long 0x8 15. " SOFTLBREQ15 ,DMA last burst request for line 15" "No effect,Requested" bitfld.long 0x8 14. " SOFTLBREQ14 ,DMA last burst request for line 14" "No effect,Requested" textline " " bitfld.long 0x8 13. " SOFTLBREQ13 ,DMA last burst request for line 13" "No effect,Requested" bitfld.long 0x8 12. " SOFTLBREQ12 ,DMA last burst request for line 12" "No effect,Requested" textline " " bitfld.long 0x8 11. " SOFTLBREQ11 ,DMA last burst request for line 11" "No effect,Requested" bitfld.long 0x8 10. " SOFTLBREQ10 ,DMA last burst request for line 10" "No effect,Requested" textline " " bitfld.long 0x8 9. " SOFTLBREQ9 ,DMA last burst request for line 9" "No effect,Requested" bitfld.long 0x8 8. " SOFTLBREQ8 ,DMA last burst request for line 8" "No effect,Requested" textline " " bitfld.long 0x8 7. " SOFTLBREQ7 ,DMA last burst request for line 7" "No effect,Requested" bitfld.long 0x8 6. " SOFTLBREQ6 ,DMA last burst request for line 6" "No effect,Requested" textline " " bitfld.long 0x8 5. " SOFTLBREQ5 ,DMA last burst request for line 5" "No effect,Requested" bitfld.long 0x8 4. " SOFTLBREQ4 ,DMA last burst request for line 4" "No effect,Requested" textline " " bitfld.long 0x8 3. " SOFTLBREQ3 ,DMA last burst request for line 3" "No effect,Requested" bitfld.long 0x8 2. " SOFTLBREQ2 ,DMA last burst request for line 2" "No effect,Requested" textline " " bitfld.long 0x8 1. " SOFTLBREQ1 ,DMA last burst request for line 1" "No effect,Requested" bitfld.long 0x8 0. " SOFTLBREQ0 ,DMA last burst request for line 0" "No effect,Requested" line.long 0xC "DMACSOFTLSREQ,DMA Software Last Single Requested Register" bitfld.long 0xC 15. " SOFTLSREQ15 ,DMA last single transfer request for line 15" "No effect,Requested" bitfld.long 0xC 14. " SOFTLSREQ14 ,DMA last single transfer request for line 14" "No effect,Requested" textline " " bitfld.long 0xC 13. " SOFTLSREQ13 ,DMA last single transfer request for line 13" "No effect,Requested" bitfld.long 0xC 12. " SOFTLSREQ12 ,DMA last single transfer request for line 12" "No effect,Requested" textline " " bitfld.long 0xC 11. " SOFTLSREQ11 ,DMA last single transfer request for line 11" "No effect,Requested" bitfld.long 0xC 10. " SOFTLSREQ10 ,DMA last single transfer request for line 10" "No effect,Requested" textline " " bitfld.long 0xC 9. " SOFTLSREQ9 ,DMA last single transfer request for line 9" "No effect,Requested" bitfld.long 0xC 8. " SOFTLSREQ8 ,DMA last single transfer request for line 8" "No effect,Requested" textline " " bitfld.long 0xC 7. " SOFTLSREQ7 ,DMA last single transfer request for line 7" "No effect,Requested" bitfld.long 0xC 6. " SOFTLSREQ6 ,DMA last single transfer request for line 6" "No effect,Requested" textline " " bitfld.long 0xC 5. " SOFTLSREQ5 ,DMA last single transfer request for line 5" "No effect,Requested" bitfld.long 0xC 4. " SOFTLSREQ4 ,DMA last single transfer request for line 4" "No effect,Requested" textline " " bitfld.long 0xC 3. " SOFTLSREQ3 ,DMA last single transfer request for line 3" "No effect,Requested" bitfld.long 0xC 2. " SOFTLSREQ2 ,DMA last single transfer request for line 2" "No effect,Requested" textline " " bitfld.long 0xC 1. " SOFTLSREQ1 ,DMA last single transfer request for line 1" "No effect,Requested" bitfld.long 0xC 0. " SOFTLSREQ0 ,DMA last single transfer request for line 0" "No effect,Requested" line.long 0x10 "DMACCONFIG,DMA Configuration Register" bitfld.long 0x10 1. " M ,AHB Master endianness configuration" "Little-endian,Big-endian" bitfld.long 0x10 0. " E ,DMA controller enable" "Disabled,Enabled" line.long 0x14 "DMACSYNC, DMA Synchronization register" bitfld.long 0x14 15. " DMACSYNC15 ,Synchronization logic for DMA request 15" "Disabed,Enabled" bitfld.long 0x14 14. " DMACSYNC14 ,Synchronization logic for DMA request 14" "Disabed,Enabled" textline " " bitfld.long 0x14 13. " DMACSYNC13 ,Synchronization logic for DMA request 13" "Disabed,Enabled" bitfld.long 0x14 12. " DMACSYNC12 ,Synchronization logic for DMA request 12" "Disabed,Enabled" textline " " bitfld.long 0x14 11. " DMACSYNC11 ,Synchronization logic for DMA request 11" "Disabed,Enabled" bitfld.long 0x14 10. " DMACSYNC10 ,Synchronization logic for DMA request 10" "Disabed,Enabled" textline " " bitfld.long 0x14 9. " DMACSYNC9 ,Synchronization logic for DMA request 9" "Disabed,Enabled" bitfld.long 0x14 8. " DMACSYNC8 ,Synchronization logic for DMA request 8" "Disabed,Enabled" textline " " bitfld.long 0x14 7. " DMACSYNC7 ,Synchronization logic for DMA request 7" "Disabed,Enabled" bitfld.long 0x14 6. " DMACSYNC6 ,Synchronization logic for DMA request 6" "Disabed,Enabled" textline " " bitfld.long 0x14 5. " DMACSYNC5 ,Synchronization logic for DMA request 5" "Disabed,Enabled" bitfld.long 0x14 4. " DMACSYNC4 ,Synchronization logic for DMA request 4" "Disabed,Enabled" textline " " bitfld.long 0x14 3. " DMACSYNC3 ,Synchronization logic for DMA request 3" "Disabed,Enabled" bitfld.long 0x14 2. " DMACSYNC2 ,Synchronization logic for DMA request 2" "Disabed,Enabled" textline " " bitfld.long 0x14 1. " DMACSYNC1 ,Synchronization logic for DMA request 1" "Disabed,Enabled" bitfld.long 0x14 0. " DMACSYNC0 ,Synchronization logic for DMA request 0" "Disabed,Enabled" sif (cpu()=="LPC1772"||cpu()=="LPC1774"||cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778"||cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788") group.long 0x2007C1C4++0x3 line.long 0x00 "DMAREQSEL,DMA Request Select register" bitfld.long 0x00 15. " DMASEL15 ,Selects the DMA request for GPDMA input15" "UART2 RX,Timer 3 match 1" bitfld.long 0x00 14. " DMASEL14 ,Selects the DMA request for GPDMA input14" "UART2 TX,Timer 3 match 0" textline " " bitfld.long 0x00 13. " DMASEL13 ,Selects the DMA request for GPDMA input 13" "UART1 RX,UART4 RX" bitfld.long 0x00 12. " DMASEL12 ,Selects the DMA request for GPDMA input 12" "UART1 TX,UART4 TX" textline " " bitfld.long 0x00 11. " DMASEL11 ,Selects the DMA request for GPDMA input 11" "UART0 RX,UART3 RX" bitfld.long 0x00 10. " DMASEL10 ,Selects the DMA request for GPDMA input 10" "UART0 TX,UART3 TX" textline " " sif (cpu()!="LPC1772") bitfld.long 0x00 7. " DMASEL07 ,Selects the DMA request for GPDMA input 7" "SSP2 RX,I2S channel 1" bitfld.long 0x00 6. " DMASEL06 ,Selects the DMA request for GPDMA input 6" "SSP2 TX,I2S channel 0" else bitfld.long 0x00 7. " DMASEL07 ,Selects the DMA request for GPDMA input 7" "SSP2 RX,?..." bitfld.long 0x00 6. " DMASEL06 ,Selects the DMA request for GPDMA input 6" "SSP2 TX,?..." endif textline " " bitfld.long 0x00 5. " DMASEL05 ,Selects the DMA request for GPDMA input 5" "SSP1 RX,Timer 2 match 1" bitfld.long 0x00 4. " DMASEL04 ,Selects the DMA request for GPDMA input 4" "SSP1 TX,Timer 2 match 0" textline " " bitfld.long 0x00 3. " DMASEL03 ,Selects the DMA request for GPDMA input 3" "SSP0 RX,Timer 1 match 1" bitfld.long 0x00 2. " DMASEL02 ,Selects the DMA request for GPDMA input 2" "SSP0 TX,Timer 1 match 0" textline " " sif (cpu()!="LPC1772"&&cpu()!="LPC1774") bitfld.long 0x00 1. " DMASEL01 ,Selects the DMA request for GPDMA input 1" "SD card,Timer 0 match 1" else bitfld.long 0x00 1. " DMASEL01 ,Selects the DMA request for GPDMA input 1" "Reserved,Timer 0 match 1" endif bitfld.long 0x00 0. " DMASEL00 ,Selects the DMA request for GPDMA input 0" "SPIFI,Timer 0 match 0" else group.long 0x1c4++0x3 line.long 0x00 "DMAREQSEL,DMA Request Select register" bitfld.long 0x00 7. " DMASEL15 ,DMA request for GPDMA input 15" "UART3 RX,Timer 3 match 1" bitfld.long 0x00 6. " DMASEL14 ,DMA request for GPDMA input 14" "UART3 TX,Timer 3 match 0" textline " " bitfld.long 0x00 5. " DMASEL13 ,DMA request for GPDMA input 13" "UART2 RX,Timer 2 match 1" bitfld.long 0x00 4. " DMASEL12 ,DMA request for GPDMA input 12" "UART2 TX,Timer 2 match 0" textline " " bitfld.long 0x00 3. " DMASEL11 ,DMA request for GPDMA input 11" "UART1 RX,Timer 1 match 1" bitfld.long 0x00 2. " DMASEL10 ,DMA request for GPDMA input 10" "UART1 TX,Timer 1match 0" textline " " bitfld.long 0x00 1. " DMASEL09 ,DMA request for GPDMA input 9" "UART0 RX,Timer 0 match 1" bitfld.long 0x00 0. " DMASEL08 ,DMA request for GPDMA input 8" "UART0 TX,Timer 0 match 0" endif width 0xB tree.end tree "Channel 0" base ad:0x50004100 width 16. group.long 0x00++0x13 line.long 0x0 "DMACC0SRCADDR,DMA Channel 0 Source Address Register" line.long 0x4 "DMACC0DESTADDR,DMA Channel 0 Destination Address Register" line.long 0x8 "DMACC0LLI,DMA Channel 0 Linked List Item Register" hexmask.long 0x8 2.--31. 0x4 " LLI ,Address for next linked list item" line.long 0xC "DMACC0CONTROL,DMA channel 0 control Register" bitfld.long 0xC 31. " I ,Terminal count interrupt enable" "Disabled,Enabled" bitfld.long 0xC 30. " PROT3 ,DMA bus access mode" "Not cacheable,Cacheable" textline " " bitfld.long 0xC 29. " PROT2 ,DMA bus access mode" "Not bufferable,Bufferable" bitfld.long 0xC 28. " PROT1 ,DMA bus access mode" "User,Privileged" textline " " bitfld.long 0xC 27. " DI ,Destination increment after each transfer" "Not incremented,Incremented" bitfld.long 0xC 26. " SI ,Source increment after each transfer" "Not incremented,Incremented" textline " " bitfld.long 0xC 21.--23. " DWIDTH ,Destination transfer width" "8-bit,16-bit,32-bit,?..." bitfld.long 0xC 18.--20. " SWIDTH ,Source transfer width" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0xC 15.--17. " DBSIZE ,Destination burst size" "1,4,8,16,32,64,128,256" bitfld.long 0xC 12.--14. " SBSIZE ,Source burst size" "1,4,8,16,32,64,128,256" textline " " hexmask.long.word 0xC 0.--11. 1. " TRANSFERSIZE ,Transfer size" line.long 0x10 "DMACC0CONFIG,Channel 0 Configuration Register" bitfld.long 0x10 18. " H ,Halt" "Disabled,Enabled" bitfld.long 0x10 17. " A ,Active" "Inactive,Active" textline " " bitfld.long 0x10 16. " L ,Locked transfers enable" "Disabled,Enabled" bitfld.long 0x10 15. " ITC ,Terminal count interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x10 14. " IE ,Interrupt error mask" "Not masked,Masked" textline " " sif (cpu()=="LPC1772"||cpu()=="LPC1774"||cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778"||cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788") bitfld.long 0x10 11.--13. " TRANSFERTYPE ,Flow control and transfer type" "DMA/Memory to memory,DMA/Memory to peripheral,DMA/Peripheral to memory,DMA/Source peripheral to destination peripheral,DP/Source peripheral to destination peripheral,DP/Memory to peripheral,SP/Peripheral to memory,SP/Source peripheral to destination peripheral" textline " " sif (cpu()!="LPC1772"&&cpu()!="LPC1774") bitfld.long 0x10 6.--10. " DESTPERIPHERAL ,Destination peripheral" "SPIFI/T0_MAT[0],SD card/T0_MAT[1],SSP0 Tx/T1_MAT[0],SSP0 Rx/T1_MAT[1],SSP1 Tx/T2_MAT[0],SSP1 Rx/T2_MAT[1],SSP2 TX/I2S channel 0,SSP2 Rx/I2S channel 1,ADC,DAC,UART0 Tx/UART3 Tx,UART0 Rx/UART3 Rx,UART1 Tx/UART4 Tx,UART1 Rx/UART4 Rx,UART2 Tx/MAT3.0,UART2 Rx/MAT3.1,?..." textline " " bitfld.long 0x10 1.--5. " SRCPERIPHERAL ,Source peripheral" "SPIFI/T0_MAT[0],SD card/T0_MAT[1],SSP0 Tx/T1_MAT[0],SSP0 Rx/T1_MAT[1],SSP1 Tx/T2_MAT[0],SSP1 Rx/T2_MAT[1],SSP2 TX/I2S channel 0,SSP2 Rx/I2Schannel 1,ADC,DAC,UART0 Tx/UART3 Tx,UART0 Rx/UART3 Rx,UART1 Tx/UART4 Tx,UART1 Rx/UART4 Rx,UART2 Tx/MAT3.0,UART2 Rx/MAT3.1,?..." else bitfld.long 0x10 6.--10. " DESTPERIPHERAL ,Destination peripheral" "SPIFI/T0_MAT[0],T0_MAT[1],SSP0 Tx/T1_MAT[0],SSP0 Rx/T1_MAT[1],SSP1 Tx/T2_MAT[0],SSP1 Rx/T2_MAT[1],SSP2 TX,SSP2 Rx,ADC,DAC,UART0 Tx/UART3 Tx,UART0 Rx/UART3 Rx,UART1 Tx/UART4 Tx,UART1 Rx/UART4 Rx,UART2 Tx/MAT3.0,UART2 Rx/MAT3.1,?..." textline " " bitfld.long 0x10 1.--5. " SRCPERIPHERAL ,Source peripheral" "SPIFI/T0_MAT[0],T0_MAT[1],SSP0 Tx/T1_MAT[0],SSP0 Rx/T1_MAT[1],SSP1 Tx/T2_MAT[0],SSP1 Rx/T2_MAT[1],SSP2 TX,SSP2 Rx,ADC,DAC,UART0 Tx/UART3 Tx,UART0 Rx/UART3 Rx,UART1 Tx/UART4 Tx,UART1 Rx/UART4 Rx,UART2 Tx/MAT3.0,UART2 Rx/MAT3.1,?..." endif else bitfld.long 0x10 11.--13. " FLOWCNTRL ,Flow control and transfer type" "DMA/Memory to memory,DMA/Memory to peripheral,DMA/Peripheral to memory,DMA/Source peripheral to destination peripheral,?..." textline " " bitfld.long 0x10 6.--10. " DESTPERIPHERAL ,Destination peripheral" "SSP0 Tx,SSP0 Rx,SSP1 Tx,SSP1 Rx,ADC,I2S channel 0,I2S channel 1,DAC,UART0 Tx / MAT0.0,UART0 Rx / MAT0.1,UART1 Tx / MAT1.0,UART1 Rx / MAT1.1,UART2 Tx / MAT2.0,UART2 Rx / MAT2.1,UART3 Tx / MAT3.0,UART3 Rx / MAT3.1,?..." textline " " bitfld.long 0x10 1.--5. " SRCPERIPHERAL ,Source peripheral" "SSP0 Tx,SSP0 Rx,SSP1 Tx,SSP1 Rx,ADC,I2S channel 0,I2S channel 1,DAC,UART0 Tx / MAT0.0,UART0 Rx / MAT0.1,UART1 Tx / MAT1.0,UART1 Rx / MAT1.1,UART2 Tx / MAT2.0,UART2 Rx / MAT2.1,UART3 Tx / MAT3.0,UART3 Rx / MAT3.1,?..." endif textline " " bitfld.long 0x10 0. " E ,Channel enable" "Disabled,Enabled" width 0xB tree.end tree "Channel 1" base ad:0x50004120 width 16. group.long 0x00++0x13 line.long 0x0 "DMACC1SRCADDR,DMA Channel 1 Source Address Register" line.long 0x4 "DMACC1DESTADDR,DMA Channel 1 Destination Address Register" line.long 0x8 "DMACC1LLI,DMA Channel 1 Linked List Item Register" hexmask.long 0x8 2.--31. 0x4 " LLI ,Address for next linked list item" line.long 0xC "DMACC1CONTROL,DMA channel 1 control Register" bitfld.long 0xC 31. " I ,Terminal count interrupt enable" "Disabled,Enabled" bitfld.long 0xC 30. " PROT3 ,DMA bus access mode" "Not cacheable,Cacheable" textline " " bitfld.long 0xC 29. " PROT2 ,DMA bus access mode" "Not bufferable,Bufferable" bitfld.long 0xC 28. " PROT1 ,DMA bus access mode" "User,Privileged" textline " " bitfld.long 0xC 27. " DI ,Destination increment after each transfer" "Not incremented,Incremented" bitfld.long 0xC 26. " SI ,Source increment after each transfer" "Not incremented,Incremented" textline " " bitfld.long 0xC 21.--23. " DWIDTH ,Destination transfer width" "8-bit,16-bit,32-bit,?..." bitfld.long 0xC 18.--20. " SWIDTH ,Source transfer width" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0xC 15.--17. " DBSIZE ,Destination burst size" "1,4,8,16,32,64,128,256" bitfld.long 0xC 12.--14. " SBSIZE ,Source burst size" "1,4,8,16,32,64,128,256" textline " " hexmask.long.word 0xC 0.--11. 1. " TRANSFERSIZE ,Transfer size" line.long 0x10 "DMACC1CONFIG,Channel 1 Configuration Register" bitfld.long 0x10 18. " H ,Halt" "Disabled,Enabled" bitfld.long 0x10 17. " A ,Active" "Inactive,Active" textline " " bitfld.long 0x10 16. " L ,Locked transfers enable" "Disabled,Enabled" bitfld.long 0x10 15. " ITC ,Terminal count interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x10 14. " IE ,Interrupt error mask" "Not masked,Masked" textline " " sif (cpu()=="LPC1772"||cpu()=="LPC1774"||cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778"||cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788") bitfld.long 0x10 11.--13. " TRANSFERTYPE ,Flow control and transfer type" "DMA/Memory to memory,DMA/Memory to peripheral,DMA/Peripheral to memory,DMA/Source peripheral to destination peripheral,DP/Source peripheral to destination peripheral,DP/Memory to peripheral,SP/Peripheral to memory,SP/Source peripheral to destination peripheral" textline " " sif (cpu()!="LPC1772"&&cpu()!="LPC1774") bitfld.long 0x10 6.--10. " DESTPERIPHERAL ,Destination peripheral" "SPIFI/T0_MAT[0],SD card/T0_MAT[1],SSP0 Tx/T1_MAT[0],SSP0 Rx/T1_MAT[1],SSP1 Tx/T2_MAT[0],SSP1 Rx/T2_MAT[1],SSP2 TX/I2S channel 0,SSP2 Rx/I2S channel 1,ADC,DAC,UART0 Tx/UART3 Tx,UART0 Rx/UART3 Rx,UART1 Tx/UART4 Tx,UART1 Rx/UART4 Rx,UART2 Tx/MAT3.0,UART2 Rx/MAT3.1,?..." textline " " bitfld.long 0x10 1.--5. " SRCPERIPHERAL ,Source peripheral" "SPIFI/T0_MAT[0],SD card/T0_MAT[1],SSP0 Tx/T1_MAT[0],SSP0 Rx/T1_MAT[1],SSP1 Tx/T2_MAT[0],SSP1 Rx/T2_MAT[1],SSP2 TX/I2S channel 0,SSP2 Rx/I2Schannel 1,ADC,DAC,UART0 Tx/UART3 Tx,UART0 Rx/UART3 Rx,UART1 Tx/UART4 Tx,UART1 Rx/UART4 Rx,UART2 Tx/MAT3.0,UART2 Rx/MAT3.1,?..." else bitfld.long 0x10 6.--10. " DESTPERIPHERAL ,Destination peripheral" "SPIFI/T0_MAT[0],T0_MAT[1],SSP0 Tx/T1_MAT[0],SSP0 Rx/T1_MAT[1],SSP1 Tx/T2_MAT[0],SSP1 Rx/T2_MAT[1],SSP2 TX,SSP2 Rx,ADC,DAC,UART0 Tx/UART3 Tx,UART0 Rx/UART3 Rx,UART1 Tx/UART4 Tx,UART1 Rx/UART4 Rx,UART2 Tx/MAT3.0,UART2 Rx/MAT3.1,?..." textline " " bitfld.long 0x10 1.--5. " SRCPERIPHERAL ,Source peripheral" "SPIFI/T0_MAT[0],T0_MAT[1],SSP0 Tx/T1_MAT[0],SSP0 Rx/T1_MAT[1],SSP1 Tx/T2_MAT[0],SSP1 Rx/T2_MAT[1],SSP2 TX,SSP2 Rx,ADC,DAC,UART0 Tx/UART3 Tx,UART0 Rx/UART3 Rx,UART1 Tx/UART4 Tx,UART1 Rx/UART4 Rx,UART2 Tx/MAT3.0,UART2 Rx/MAT3.1,?..." endif else bitfld.long 0x10 11.--13. " FLOWCNTRL ,Flow control and transfer type" "DMA/Memory to memory,DMA/Memory to peripheral,DMA/Peripheral to memory,DMA/Source peripheral to destination peripheral,?..." textline " " bitfld.long 0x10 6.--10. " DESTPERIPHERAL ,Destination peripheral" "SSP0 Tx,SSP0 Rx,SSP1 Tx,SSP1 Rx,ADC,I2S channel 0,I2S channel 1,DAC,UART0 Tx / MAT0.0,UART0 Rx / MAT0.1,UART1 Tx / MAT1.0,UART1 Rx / MAT1.1,UART2 Tx / MAT2.0,UART2 Rx / MAT2.1,UART3 Tx / MAT3.0,UART3 Rx / MAT3.1,?..." textline " " bitfld.long 0x10 1.--5. " SRCPERIPHERAL ,Source peripheral" "SSP0 Tx,SSP0 Rx,SSP1 Tx,SSP1 Rx,ADC,I2S channel 0,I2S channel 1,DAC,UART0 Tx / MAT0.0,UART0 Rx / MAT0.1,UART1 Tx / MAT1.0,UART1 Rx / MAT1.1,UART2 Tx / MAT2.0,UART2 Rx / MAT2.1,UART3 Tx / MAT3.0,UART3 Rx / MAT3.1,?..." endif textline " " bitfld.long 0x10 0. " E ,Channel enable" "Disabled,Enabled" width 0xB tree.end tree "Channel 2" base ad:0x50004140 width 16. group.long 0x00++0x13 line.long 0x0 "DMACC2SRCADDR,DMA Channel 2 Source Address Register" line.long 0x4 "DMACC2DESTADDR,DMA Channel 2 Destination Address Register" line.long 0x8 "DMACC2LLI,DMA Channel 2 Linked List Item Register" hexmask.long 0x8 2.--31. 0x4 " LLI ,Address for next linked list item" line.long 0xC "DMACC2CONTROL,DMA channel 2 control Register" bitfld.long 0xC 31. " I ,Terminal count interrupt enable" "Disabled,Enabled" bitfld.long 0xC 30. " PROT3 ,DMA bus access mode" "Not cacheable,Cacheable" textline " " bitfld.long 0xC 29. " PROT2 ,DMA bus access mode" "Not bufferable,Bufferable" bitfld.long 0xC 28. " PROT1 ,DMA bus access mode" "User,Privileged" textline " " bitfld.long 0xC 27. " DI ,Destination increment after each transfer" "Not incremented,Incremented" bitfld.long 0xC 26. " SI ,Source increment after each transfer" "Not incremented,Incremented" textline " " bitfld.long 0xC 21.--23. " DWIDTH ,Destination transfer width" "8-bit,16-bit,32-bit,?..." bitfld.long 0xC 18.--20. " SWIDTH ,Source transfer width" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0xC 15.--17. " DBSIZE ,Destination burst size" "1,4,8,16,32,64,128,256" bitfld.long 0xC 12.--14. " SBSIZE ,Source burst size" "1,4,8,16,32,64,128,256" textline " " hexmask.long.word 0xC 0.--11. 1. " TRANSFERSIZE ,Transfer size" line.long 0x10 "DMACC2CONFIG,Channel 2 Configuration Register" bitfld.long 0x10 18. " H ,Halt" "Disabled,Enabled" bitfld.long 0x10 17. " A ,Active" "Inactive,Active" textline " " bitfld.long 0x10 16. " L ,Locked transfers enable" "Disabled,Enabled" bitfld.long 0x10 15. " ITC ,Terminal count interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x10 14. " IE ,Interrupt error mask" "Not masked,Masked" textline " " sif (cpu()=="LPC1772"||cpu()=="LPC1774"||cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778"||cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788") bitfld.long 0x10 11.--13. " TRANSFERTYPE ,Flow control and transfer type" "DMA/Memory to memory,DMA/Memory to peripheral,DMA/Peripheral to memory,DMA/Source peripheral to destination peripheral,DP/Source peripheral to destination peripheral,DP/Memory to peripheral,SP/Peripheral to memory,SP/Source peripheral to destination peripheral" textline " " sif (cpu()!="LPC1772"&&cpu()!="LPC1774") bitfld.long 0x10 6.--10. " DESTPERIPHERAL ,Destination peripheral" "SPIFI/T0_MAT[0],SD card/T0_MAT[1],SSP0 Tx/T1_MAT[0],SSP0 Rx/T1_MAT[1],SSP1 Tx/T2_MAT[0],SSP1 Rx/T2_MAT[1],SSP2 TX/I2S channel 0,SSP2 Rx/I2S channel 1,ADC,DAC,UART0 Tx/UART3 Tx,UART0 Rx/UART3 Rx,UART1 Tx/UART4 Tx,UART1 Rx/UART4 Rx,UART2 Tx/MAT3.0,UART2 Rx/MAT3.1,?..." textline " " bitfld.long 0x10 1.--5. " SRCPERIPHERAL ,Source peripheral" "SPIFI/T0_MAT[0],SD card/T0_MAT[1],SSP0 Tx/T1_MAT[0],SSP0 Rx/T1_MAT[1],SSP1 Tx/T2_MAT[0],SSP1 Rx/T2_MAT[1],SSP2 TX/I2S channel 0,SSP2 Rx/I2Schannel 1,ADC,DAC,UART0 Tx/UART3 Tx,UART0 Rx/UART3 Rx,UART1 Tx/UART4 Tx,UART1 Rx/UART4 Rx,UART2 Tx/MAT3.0,UART2 Rx/MAT3.1,?..." else bitfld.long 0x10 6.--10. " DESTPERIPHERAL ,Destination peripheral" "SPIFI/T0_MAT[0],T0_MAT[1],SSP0 Tx/T1_MAT[0],SSP0 Rx/T1_MAT[1],SSP1 Tx/T2_MAT[0],SSP1 Rx/T2_MAT[1],SSP2 TX,SSP2 Rx,ADC,DAC,UART0 Tx/UART3 Tx,UART0 Rx/UART3 Rx,UART1 Tx/UART4 Tx,UART1 Rx/UART4 Rx,UART2 Tx/MAT3.0,UART2 Rx/MAT3.1,?..." textline " " bitfld.long 0x10 1.--5. " SRCPERIPHERAL ,Source peripheral" "SPIFI/T0_MAT[0],T0_MAT[1],SSP0 Tx/T1_MAT[0],SSP0 Rx/T1_MAT[1],SSP1 Tx/T2_MAT[0],SSP1 Rx/T2_MAT[1],SSP2 TX,SSP2 Rx,ADC,DAC,UART0 Tx/UART3 Tx,UART0 Rx/UART3 Rx,UART1 Tx/UART4 Tx,UART1 Rx/UART4 Rx,UART2 Tx/MAT3.0,UART2 Rx/MAT3.1,?..." endif else bitfld.long 0x10 11.--13. " FLOWCNTRL ,Flow control and transfer type" "DMA/Memory to memory,DMA/Memory to peripheral,DMA/Peripheral to memory,DMA/Source peripheral to destination peripheral,?..." textline " " bitfld.long 0x10 6.--10. " DESTPERIPHERAL ,Destination peripheral" "SSP0 Tx,SSP0 Rx,SSP1 Tx,SSP1 Rx,ADC,I2S channel 0,I2S channel 1,DAC,UART0 Tx / MAT0.0,UART0 Rx / MAT0.1,UART1 Tx / MAT1.0,UART1 Rx / MAT1.1,UART2 Tx / MAT2.0,UART2 Rx / MAT2.1,UART3 Tx / MAT3.0,UART3 Rx / MAT3.1,?..." textline " " bitfld.long 0x10 1.--5. " SRCPERIPHERAL ,Source peripheral" "SSP0 Tx,SSP0 Rx,SSP1 Tx,SSP1 Rx,ADC,I2S channel 0,I2S channel 1,DAC,UART0 Tx / MAT0.0,UART0 Rx / MAT0.1,UART1 Tx / MAT1.0,UART1 Rx / MAT1.1,UART2 Tx / MAT2.0,UART2 Rx / MAT2.1,UART3 Tx / MAT3.0,UART3 Rx / MAT3.1,?..." endif textline " " bitfld.long 0x10 0. " E ,Channel enable" "Disabled,Enabled" width 0xB tree.end tree "Channel 3" base ad:0x50004160 width 16. group.long 0x00++0x13 line.long 0x0 "DMACC3SRCADDR,DMA Channel 3 Source Address Register" line.long 0x4 "DMACC3DESTADDR,DMA Channel 3 Destination Address Register" line.long 0x8 "DMACC3LLI,DMA Channel 3 Linked List Item Register" hexmask.long 0x8 2.--31. 0x4 " LLI ,Address for next linked list item" line.long 0xC "DMACC3CONTROL,DMA channel 3 control Register" bitfld.long 0xC 31. " I ,Terminal count interrupt enable" "Disabled,Enabled" bitfld.long 0xC 30. " PROT3 ,DMA bus access mode" "Not cacheable,Cacheable" textline " " bitfld.long 0xC 29. " PROT2 ,DMA bus access mode" "Not bufferable,Bufferable" bitfld.long 0xC 28. " PROT1 ,DMA bus access mode" "User,Privileged" textline " " bitfld.long 0xC 27. " DI ,Destination increment after each transfer" "Not incremented,Incremented" bitfld.long 0xC 26. " SI ,Source increment after each transfer" "Not incremented,Incremented" textline " " bitfld.long 0xC 21.--23. " DWIDTH ,Destination transfer width" "8-bit,16-bit,32-bit,?..." bitfld.long 0xC 18.--20. " SWIDTH ,Source transfer width" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0xC 15.--17. " DBSIZE ,Destination burst size" "1,4,8,16,32,64,128,256" bitfld.long 0xC 12.--14. " SBSIZE ,Source burst size" "1,4,8,16,32,64,128,256" textline " " hexmask.long.word 0xC 0.--11. 1. " TRANSFERSIZE ,Transfer size" line.long 0x10 "DMACC3CONFIG,Channel 3 Configuration Register" bitfld.long 0x10 18. " H ,Halt" "Disabled,Enabled" bitfld.long 0x10 17. " A ,Active" "Inactive,Active" textline " " bitfld.long 0x10 16. " L ,Locked transfers enable" "Disabled,Enabled" bitfld.long 0x10 15. " ITC ,Terminal count interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x10 14. " IE ,Interrupt error mask" "Not masked,Masked" textline " " sif (cpu()=="LPC1772"||cpu()=="LPC1774"||cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778"||cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788") bitfld.long 0x10 11.--13. " TRANSFERTYPE ,Flow control and transfer type" "DMA/Memory to memory,DMA/Memory to peripheral,DMA/Peripheral to memory,DMA/Source peripheral to destination peripheral,DP/Source peripheral to destination peripheral,DP/Memory to peripheral,SP/Peripheral to memory,SP/Source peripheral to destination peripheral" textline " " sif (cpu()!="LPC1772"&&cpu()!="LPC1774") bitfld.long 0x10 6.--10. " DESTPERIPHERAL ,Destination peripheral" "SPIFI/T0_MAT[0],SD card/T0_MAT[1],SSP0 Tx/T1_MAT[0],SSP0 Rx/T1_MAT[1],SSP1 Tx/T2_MAT[0],SSP1 Rx/T2_MAT[1],SSP2 TX/I2S channel 0,SSP2 Rx/I2S channel 1,ADC,DAC,UART0 Tx/UART3 Tx,UART0 Rx/UART3 Rx,UART1 Tx/UART4 Tx,UART1 Rx/UART4 Rx,UART2 Tx/MAT3.0,UART2 Rx/MAT3.1,?..." textline " " bitfld.long 0x10 1.--5. " SRCPERIPHERAL ,Source peripheral" "SPIFI/T0_MAT[0],SD card/T0_MAT[1],SSP0 Tx/T1_MAT[0],SSP0 Rx/T1_MAT[1],SSP1 Tx/T2_MAT[0],SSP1 Rx/T2_MAT[1],SSP2 TX/I2S channel 0,SSP2 Rx/I2Schannel 1,ADC,DAC,UART0 Tx/UART3 Tx,UART0 Rx/UART3 Rx,UART1 Tx/UART4 Tx,UART1 Rx/UART4 Rx,UART2 Tx/MAT3.0,UART2 Rx/MAT3.1,?..." else bitfld.long 0x10 6.--10. " DESTPERIPHERAL ,Destination peripheral" "SPIFI/T0_MAT[0],T0_MAT[1],SSP0 Tx/T1_MAT[0],SSP0 Rx/T1_MAT[1],SSP1 Tx/T2_MAT[0],SSP1 Rx/T2_MAT[1],SSP2 TX,SSP2 Rx,ADC,DAC,UART0 Tx/UART3 Tx,UART0 Rx/UART3 Rx,UART1 Tx/UART4 Tx,UART1 Rx/UART4 Rx,UART2 Tx/MAT3.0,UART2 Rx/MAT3.1,?..." textline " " bitfld.long 0x10 1.--5. " SRCPERIPHERAL ,Source peripheral" "SPIFI/T0_MAT[0],T0_MAT[1],SSP0 Tx/T1_MAT[0],SSP0 Rx/T1_MAT[1],SSP1 Tx/T2_MAT[0],SSP1 Rx/T2_MAT[1],SSP2 TX,SSP2 Rx,ADC,DAC,UART0 Tx/UART3 Tx,UART0 Rx/UART3 Rx,UART1 Tx/UART4 Tx,UART1 Rx/UART4 Rx,UART2 Tx/MAT3.0,UART2 Rx/MAT3.1,?..." endif else bitfld.long 0x10 11.--13. " FLOWCNTRL ,Flow control and transfer type" "DMA/Memory to memory,DMA/Memory to peripheral,DMA/Peripheral to memory,DMA/Source peripheral to destination peripheral,?..." textline " " bitfld.long 0x10 6.--10. " DESTPERIPHERAL ,Destination peripheral" "SSP0 Tx,SSP0 Rx,SSP1 Tx,SSP1 Rx,ADC,I2S channel 0,I2S channel 1,DAC,UART0 Tx / MAT0.0,UART0 Rx / MAT0.1,UART1 Tx / MAT1.0,UART1 Rx / MAT1.1,UART2 Tx / MAT2.0,UART2 Rx / MAT2.1,UART3 Tx / MAT3.0,UART3 Rx / MAT3.1,?..." textline " " bitfld.long 0x10 1.--5. " SRCPERIPHERAL ,Source peripheral" "SSP0 Tx,SSP0 Rx,SSP1 Tx,SSP1 Rx,ADC,I2S channel 0,I2S channel 1,DAC,UART0 Tx / MAT0.0,UART0 Rx / MAT0.1,UART1 Tx / MAT1.0,UART1 Rx / MAT1.1,UART2 Tx / MAT2.0,UART2 Rx / MAT2.1,UART3 Tx / MAT3.0,UART3 Rx / MAT3.1,?..." endif textline " " bitfld.long 0x10 0. " E ,Channel enable" "Disabled,Enabled" width 0xB tree.end tree "Channel 4" base ad:0x50004180 width 16. group.long 0x00++0x13 line.long 0x0 "DMACC4SRCADDR,DMA Channel 4 Source Address Register" line.long 0x4 "DMACC4DESTADDR,DMA Channel 4 Destination Address Register" line.long 0x8 "DMACC4LLI,DMA Channel 4 Linked List Item Register" hexmask.long 0x8 2.--31. 0x4 " LLI ,Address for next linked list item" line.long 0xC "DMACC4CONTROL,DMA channel 4 control Register" bitfld.long 0xC 31. " I ,Terminal count interrupt enable" "Disabled,Enabled" bitfld.long 0xC 30. " PROT3 ,DMA bus access mode" "Not cacheable,Cacheable" textline " " bitfld.long 0xC 29. " PROT2 ,DMA bus access mode" "Not bufferable,Bufferable" bitfld.long 0xC 28. " PROT1 ,DMA bus access mode" "User,Privileged" textline " " bitfld.long 0xC 27. " DI ,Destination increment after each transfer" "Not incremented,Incremented" bitfld.long 0xC 26. " SI ,Source increment after each transfer" "Not incremented,Incremented" textline " " bitfld.long 0xC 21.--23. " DWIDTH ,Destination transfer width" "8-bit,16-bit,32-bit,?..." bitfld.long 0xC 18.--20. " SWIDTH ,Source transfer width" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0xC 15.--17. " DBSIZE ,Destination burst size" "1,4,8,16,32,64,128,256" bitfld.long 0xC 12.--14. " SBSIZE ,Source burst size" "1,4,8,16,32,64,128,256" textline " " hexmask.long.word 0xC 0.--11. 1. " TRANSFERSIZE ,Transfer size" line.long 0x10 "DMACC4CONFIG,Channel 4 Configuration Register" bitfld.long 0x10 18. " H ,Halt" "Disabled,Enabled" bitfld.long 0x10 17. " A ,Active" "Inactive,Active" textline " " bitfld.long 0x10 16. " L ,Locked transfers enable" "Disabled,Enabled" bitfld.long 0x10 15. " ITC ,Terminal count interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x10 14. " IE ,Interrupt error mask" "Not masked,Masked" textline " " sif (cpu()=="LPC1772"||cpu()=="LPC1774"||cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778"||cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788") bitfld.long 0x10 11.--13. " TRANSFERTYPE ,Flow control and transfer type" "DMA/Memory to memory,DMA/Memory to peripheral,DMA/Peripheral to memory,DMA/Source peripheral to destination peripheral,DP/Source peripheral to destination peripheral,DP/Memory to peripheral,SP/Peripheral to memory,SP/Source peripheral to destination peripheral" textline " " sif (cpu()!="LPC1772"&&cpu()!="LPC1774") bitfld.long 0x10 6.--10. " DESTPERIPHERAL ,Destination peripheral" "SPIFI/T0_MAT[0],SD card/T0_MAT[1],SSP0 Tx/T1_MAT[0],SSP0 Rx/T1_MAT[1],SSP1 Tx/T2_MAT[0],SSP1 Rx/T2_MAT[1],SSP2 TX/I2S channel 0,SSP2 Rx/I2S channel 1,ADC,DAC,UART0 Tx/UART3 Tx,UART0 Rx/UART3 Rx,UART1 Tx/UART4 Tx,UART1 Rx/UART4 Rx,UART2 Tx/MAT3.0,UART2 Rx/MAT3.1,?..." textline " " bitfld.long 0x10 1.--5. " SRCPERIPHERAL ,Source peripheral" "SPIFI/T0_MAT[0],SD card/T0_MAT[1],SSP0 Tx/T1_MAT[0],SSP0 Rx/T1_MAT[1],SSP1 Tx/T2_MAT[0],SSP1 Rx/T2_MAT[1],SSP2 TX/I2S channel 0,SSP2 Rx/I2Schannel 1,ADC,DAC,UART0 Tx/UART3 Tx,UART0 Rx/UART3 Rx,UART1 Tx/UART4 Tx,UART1 Rx/UART4 Rx,UART2 Tx/MAT3.0,UART2 Rx/MAT3.1,?..." else bitfld.long 0x10 6.--10. " DESTPERIPHERAL ,Destination peripheral" "SPIFI/T0_MAT[0],T0_MAT[1],SSP0 Tx/T1_MAT[0],SSP0 Rx/T1_MAT[1],SSP1 Tx/T2_MAT[0],SSP1 Rx/T2_MAT[1],SSP2 TX,SSP2 Rx,ADC,DAC,UART0 Tx/UART3 Tx,UART0 Rx/UART3 Rx,UART1 Tx/UART4 Tx,UART1 Rx/UART4 Rx,UART2 Tx/MAT3.0,UART2 Rx/MAT3.1,?..." textline " " bitfld.long 0x10 1.--5. " SRCPERIPHERAL ,Source peripheral" "SPIFI/T0_MAT[0],T0_MAT[1],SSP0 Tx/T1_MAT[0],SSP0 Rx/T1_MAT[1],SSP1 Tx/T2_MAT[0],SSP1 Rx/T2_MAT[1],SSP2 TX,SSP2 Rx,ADC,DAC,UART0 Tx/UART3 Tx,UART0 Rx/UART3 Rx,UART1 Tx/UART4 Tx,UART1 Rx/UART4 Rx,UART2 Tx/MAT3.0,UART2 Rx/MAT3.1,?..." endif else bitfld.long 0x10 11.--13. " FLOWCNTRL ,Flow control and transfer type" "DMA/Memory to memory,DMA/Memory to peripheral,DMA/Peripheral to memory,DMA/Source peripheral to destination peripheral,?..." textline " " bitfld.long 0x10 6.--10. " DESTPERIPHERAL ,Destination peripheral" "SSP0 Tx,SSP0 Rx,SSP1 Tx,SSP1 Rx,ADC,I2S channel 0,I2S channel 1,DAC,UART0 Tx / MAT0.0,UART0 Rx / MAT0.1,UART1 Tx / MAT1.0,UART1 Rx / MAT1.1,UART2 Tx / MAT2.0,UART2 Rx / MAT2.1,UART3 Tx / MAT3.0,UART3 Rx / MAT3.1,?..." textline " " bitfld.long 0x10 1.--5. " SRCPERIPHERAL ,Source peripheral" "SSP0 Tx,SSP0 Rx,SSP1 Tx,SSP1 Rx,ADC,I2S channel 0,I2S channel 1,DAC,UART0 Tx / MAT0.0,UART0 Rx / MAT0.1,UART1 Tx / MAT1.0,UART1 Rx / MAT1.1,UART2 Tx / MAT2.0,UART2 Rx / MAT2.1,UART3 Tx / MAT3.0,UART3 Rx / MAT3.1,?..." endif textline " " bitfld.long 0x10 0. " E ,Channel enable" "Disabled,Enabled" width 0xB tree.end tree "Channel 5" base ad:0x500041A0 width 16. group.long 0x00++0x13 line.long 0x0 "DMACC5SRCADDR,DMA Channel 5 Source Address Register" line.long 0x4 "DMACC5DESTADDR,DMA Channel 5 Destination Address Register" line.long 0x8 "DMACC5LLI,DMA Channel 5 Linked List Item Register" hexmask.long 0x8 2.--31. 0x4 " LLI ,Address for next linked list item" line.long 0xC "DMACC5CONTROL,DMA channel 5 control Register" bitfld.long 0xC 31. " I ,Terminal count interrupt enable" "Disabled,Enabled" bitfld.long 0xC 30. " PROT3 ,DMA bus access mode" "Not cacheable,Cacheable" textline " " bitfld.long 0xC 29. " PROT2 ,DMA bus access mode" "Not bufferable,Bufferable" bitfld.long 0xC 28. " PROT1 ,DMA bus access mode" "User,Privileged" textline " " bitfld.long 0xC 27. " DI ,Destination increment after each transfer" "Not incremented,Incremented" bitfld.long 0xC 26. " SI ,Source increment after each transfer" "Not incremented,Incremented" textline " " bitfld.long 0xC 21.--23. " DWIDTH ,Destination transfer width" "8-bit,16-bit,32-bit,?..." bitfld.long 0xC 18.--20. " SWIDTH ,Source transfer width" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0xC 15.--17. " DBSIZE ,Destination burst size" "1,4,8,16,32,64,128,256" bitfld.long 0xC 12.--14. " SBSIZE ,Source burst size" "1,4,8,16,32,64,128,256" textline " " hexmask.long.word 0xC 0.--11. 1. " TRANSFERSIZE ,Transfer size" line.long 0x10 "DMACC5CONFIG,Channel 5 Configuration Register" bitfld.long 0x10 18. " H ,Halt" "Disabled,Enabled" bitfld.long 0x10 17. " A ,Active" "Inactive,Active" textline " " bitfld.long 0x10 16. " L ,Locked transfers enable" "Disabled,Enabled" bitfld.long 0x10 15. " ITC ,Terminal count interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x10 14. " IE ,Interrupt error mask" "Not masked,Masked" textline " " sif (cpu()=="LPC1772"||cpu()=="LPC1774"||cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778"||cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788") bitfld.long 0x10 11.--13. " TRANSFERTYPE ,Flow control and transfer type" "DMA/Memory to memory,DMA/Memory to peripheral,DMA/Peripheral to memory,DMA/Source peripheral to destination peripheral,DP/Source peripheral to destination peripheral,DP/Memory to peripheral,SP/Peripheral to memory,SP/Source peripheral to destination peripheral" textline " " sif (cpu()!="LPC1772"&&cpu()!="LPC1774") bitfld.long 0x10 6.--10. " DESTPERIPHERAL ,Destination peripheral" "SPIFI/T0_MAT[0],SD card/T0_MAT[1],SSP0 Tx/T1_MAT[0],SSP0 Rx/T1_MAT[1],SSP1 Tx/T2_MAT[0],SSP1 Rx/T2_MAT[1],SSP2 TX/I2S channel 0,SSP2 Rx/I2S channel 1,ADC,DAC,UART0 Tx/UART3 Tx,UART0 Rx/UART3 Rx,UART1 Tx/UART4 Tx,UART1 Rx/UART4 Rx,UART2 Tx/MAT3.0,UART2 Rx/MAT3.1,?..." textline " " bitfld.long 0x10 1.--5. " SRCPERIPHERAL ,Source peripheral" "SPIFI/T0_MAT[0],SD card/T0_MAT[1],SSP0 Tx/T1_MAT[0],SSP0 Rx/T1_MAT[1],SSP1 Tx/T2_MAT[0],SSP1 Rx/T2_MAT[1],SSP2 TX/I2S channel 0,SSP2 Rx/I2Schannel 1,ADC,DAC,UART0 Tx/UART3 Tx,UART0 Rx/UART3 Rx,UART1 Tx/UART4 Tx,UART1 Rx/UART4 Rx,UART2 Tx/MAT3.0,UART2 Rx/MAT3.1,?..." else bitfld.long 0x10 6.--10. " DESTPERIPHERAL ,Destination peripheral" "SPIFI/T0_MAT[0],T0_MAT[1],SSP0 Tx/T1_MAT[0],SSP0 Rx/T1_MAT[1],SSP1 Tx/T2_MAT[0],SSP1 Rx/T2_MAT[1],SSP2 TX,SSP2 Rx,ADC,DAC,UART0 Tx/UART3 Tx,UART0 Rx/UART3 Rx,UART1 Tx/UART4 Tx,UART1 Rx/UART4 Rx,UART2 Tx/MAT3.0,UART2 Rx/MAT3.1,?..." textline " " bitfld.long 0x10 1.--5. " SRCPERIPHERAL ,Source peripheral" "SPIFI/T0_MAT[0],T0_MAT[1],SSP0 Tx/T1_MAT[0],SSP0 Rx/T1_MAT[1],SSP1 Tx/T2_MAT[0],SSP1 Rx/T2_MAT[1],SSP2 TX,SSP2 Rx,ADC,DAC,UART0 Tx/UART3 Tx,UART0 Rx/UART3 Rx,UART1 Tx/UART4 Tx,UART1 Rx/UART4 Rx,UART2 Tx/MAT3.0,UART2 Rx/MAT3.1,?..." endif else bitfld.long 0x10 11.--13. " FLOWCNTRL ,Flow control and transfer type" "DMA/Memory to memory,DMA/Memory to peripheral,DMA/Peripheral to memory,DMA/Source peripheral to destination peripheral,?..." textline " " bitfld.long 0x10 6.--10. " DESTPERIPHERAL ,Destination peripheral" "SSP0 Tx,SSP0 Rx,SSP1 Tx,SSP1 Rx,ADC,I2S channel 0,I2S channel 1,DAC,UART0 Tx / MAT0.0,UART0 Rx / MAT0.1,UART1 Tx / MAT1.0,UART1 Rx / MAT1.1,UART2 Tx / MAT2.0,UART2 Rx / MAT2.1,UART3 Tx / MAT3.0,UART3 Rx / MAT3.1,?..." textline " " bitfld.long 0x10 1.--5. " SRCPERIPHERAL ,Source peripheral" "SSP0 Tx,SSP0 Rx,SSP1 Tx,SSP1 Rx,ADC,I2S channel 0,I2S channel 1,DAC,UART0 Tx / MAT0.0,UART0 Rx / MAT0.1,UART1 Tx / MAT1.0,UART1 Rx / MAT1.1,UART2 Tx / MAT2.0,UART2 Rx / MAT2.1,UART3 Tx / MAT3.0,UART3 Rx / MAT3.1,?..." endif textline " " bitfld.long 0x10 0. " E ,Channel enable" "Disabled,Enabled" width 0xB tree.end tree "Channel 6" base ad:0x500041C0 width 16. group.long 0x00++0x13 line.long 0x0 "DMACC6SRCADDR,DMA Channel 6 Source Address Register" line.long 0x4 "DMACC6DESTADDR,DMA Channel 6 Destination Address Register" line.long 0x8 "DMACC6LLI,DMA Channel 6 Linked List Item Register" hexmask.long 0x8 2.--31. 0x4 " LLI ,Address for next linked list item" line.long 0xC "DMACC6CONTROL,DMA channel 6 control Register" bitfld.long 0xC 31. " I ,Terminal count interrupt enable" "Disabled,Enabled" bitfld.long 0xC 30. " PROT3 ,DMA bus access mode" "Not cacheable,Cacheable" textline " " bitfld.long 0xC 29. " PROT2 ,DMA bus access mode" "Not bufferable,Bufferable" bitfld.long 0xC 28. " PROT1 ,DMA bus access mode" "User,Privileged" textline " " bitfld.long 0xC 27. " DI ,Destination increment after each transfer" "Not incremented,Incremented" bitfld.long 0xC 26. " SI ,Source increment after each transfer" "Not incremented,Incremented" textline " " bitfld.long 0xC 21.--23. " DWIDTH ,Destination transfer width" "8-bit,16-bit,32-bit,?..." bitfld.long 0xC 18.--20. " SWIDTH ,Source transfer width" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0xC 15.--17. " DBSIZE ,Destination burst size" "1,4,8,16,32,64,128,256" bitfld.long 0xC 12.--14. " SBSIZE ,Source burst size" "1,4,8,16,32,64,128,256" textline " " hexmask.long.word 0xC 0.--11. 1. " TRANSFERSIZE ,Transfer size" line.long 0x10 "DMACC6CONFIG,Channel 6 Configuration Register" bitfld.long 0x10 18. " H ,Halt" "Disabled,Enabled" bitfld.long 0x10 17. " A ,Active" "Inactive,Active" textline " " bitfld.long 0x10 16. " L ,Locked transfers enable" "Disabled,Enabled" bitfld.long 0x10 15. " ITC ,Terminal count interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x10 14. " IE ,Interrupt error mask" "Not masked,Masked" textline " " sif (cpu()=="LPC1772"||cpu()=="LPC1774"||cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778"||cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788") bitfld.long 0x10 11.--13. " TRANSFERTYPE ,Flow control and transfer type" "DMA/Memory to memory,DMA/Memory to peripheral,DMA/Peripheral to memory,DMA/Source peripheral to destination peripheral,DP/Source peripheral to destination peripheral,DP/Memory to peripheral,SP/Peripheral to memory,SP/Source peripheral to destination peripheral" textline " " sif (cpu()!="LPC1772"&&cpu()!="LPC1774") bitfld.long 0x10 6.--10. " DESTPERIPHERAL ,Destination peripheral" "SPIFI/T0_MAT[0],SD card/T0_MAT[1],SSP0 Tx/T1_MAT[0],SSP0 Rx/T1_MAT[1],SSP1 Tx/T2_MAT[0],SSP1 Rx/T2_MAT[1],SSP2 TX/I2S channel 0,SSP2 Rx/I2S channel 1,ADC,DAC,UART0 Tx/UART3 Tx,UART0 Rx/UART3 Rx,UART1 Tx/UART4 Tx,UART1 Rx/UART4 Rx,UART2 Tx/MAT3.0,UART2 Rx/MAT3.1,?..." textline " " bitfld.long 0x10 1.--5. " SRCPERIPHERAL ,Source peripheral" "SPIFI/T0_MAT[0],SD card/T0_MAT[1],SSP0 Tx/T1_MAT[0],SSP0 Rx/T1_MAT[1],SSP1 Tx/T2_MAT[0],SSP1 Rx/T2_MAT[1],SSP2 TX/I2S channel 0,SSP2 Rx/I2Schannel 1,ADC,DAC,UART0 Tx/UART3 Tx,UART0 Rx/UART3 Rx,UART1 Tx/UART4 Tx,UART1 Rx/UART4 Rx,UART2 Tx/MAT3.0,UART2 Rx/MAT3.1,?..." else bitfld.long 0x10 6.--10. " DESTPERIPHERAL ,Destination peripheral" "SPIFI/T0_MAT[0],T0_MAT[1],SSP0 Tx/T1_MAT[0],SSP0 Rx/T1_MAT[1],SSP1 Tx/T2_MAT[0],SSP1 Rx/T2_MAT[1],SSP2 TX,SSP2 Rx,ADC,DAC,UART0 Tx/UART3 Tx,UART0 Rx/UART3 Rx,UART1 Tx/UART4 Tx,UART1 Rx/UART4 Rx,UART2 Tx/MAT3.0,UART2 Rx/MAT3.1,?..." textline " " bitfld.long 0x10 1.--5. " SRCPERIPHERAL ,Source peripheral" "SPIFI/T0_MAT[0],T0_MAT[1],SSP0 Tx/T1_MAT[0],SSP0 Rx/T1_MAT[1],SSP1 Tx/T2_MAT[0],SSP1 Rx/T2_MAT[1],SSP2 TX,SSP2 Rx,ADC,DAC,UART0 Tx/UART3 Tx,UART0 Rx/UART3 Rx,UART1 Tx/UART4 Tx,UART1 Rx/UART4 Rx,UART2 Tx/MAT3.0,UART2 Rx/MAT3.1,?..." endif else bitfld.long 0x10 11.--13. " FLOWCNTRL ,Flow control and transfer type" "DMA/Memory to memory,DMA/Memory to peripheral,DMA/Peripheral to memory,DMA/Source peripheral to destination peripheral,?..." textline " " bitfld.long 0x10 6.--10. " DESTPERIPHERAL ,Destination peripheral" "SSP0 Tx,SSP0 Rx,SSP1 Tx,SSP1 Rx,ADC,I2S channel 0,I2S channel 1,DAC,UART0 Tx / MAT0.0,UART0 Rx / MAT0.1,UART1 Tx / MAT1.0,UART1 Rx / MAT1.1,UART2 Tx / MAT2.0,UART2 Rx / MAT2.1,UART3 Tx / MAT3.0,UART3 Rx / MAT3.1,?..." textline " " bitfld.long 0x10 1.--5. " SRCPERIPHERAL ,Source peripheral" "SSP0 Tx,SSP0 Rx,SSP1 Tx,SSP1 Rx,ADC,I2S channel 0,I2S channel 1,DAC,UART0 Tx / MAT0.0,UART0 Rx / MAT0.1,UART1 Tx / MAT1.0,UART1 Rx / MAT1.1,UART2 Tx / MAT2.0,UART2 Rx / MAT2.1,UART3 Tx / MAT3.0,UART3 Rx / MAT3.1,?..." endif textline " " bitfld.long 0x10 0. " E ,Channel enable" "Disabled,Enabled" width 0xB tree.end tree "Channel 7" base ad:0x500041E0 width 16. group.long 0x00++0x13 line.long 0x0 "DMACC7SRCADDR,DMA Channel 7 Source Address Register" line.long 0x4 "DMACC7DESTADDR,DMA Channel 7 Destination Address Register" line.long 0x8 "DMACC7LLI,DMA Channel 7 Linked List Item Register" hexmask.long 0x8 2.--31. 0x4 " LLI ,Address for next linked list item" line.long 0xC "DMACC7CONTROL,DMA channel 7 control Register" bitfld.long 0xC 31. " I ,Terminal count interrupt enable" "Disabled,Enabled" bitfld.long 0xC 30. " PROT3 ,DMA bus access mode" "Not cacheable,Cacheable" textline " " bitfld.long 0xC 29. " PROT2 ,DMA bus access mode" "Not bufferable,Bufferable" bitfld.long 0xC 28. " PROT1 ,DMA bus access mode" "User,Privileged" textline " " bitfld.long 0xC 27. " DI ,Destination increment after each transfer" "Not incremented,Incremented" bitfld.long 0xC 26. " SI ,Source increment after each transfer" "Not incremented,Incremented" textline " " bitfld.long 0xC 21.--23. " DWIDTH ,Destination transfer width" "8-bit,16-bit,32-bit,?..." bitfld.long 0xC 18.--20. " SWIDTH ,Source transfer width" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0xC 15.--17. " DBSIZE ,Destination burst size" "1,4,8,16,32,64,128,256" bitfld.long 0xC 12.--14. " SBSIZE ,Source burst size" "1,4,8,16,32,64,128,256" textline " " hexmask.long.word 0xC 0.--11. 1. " TRANSFERSIZE ,Transfer size" line.long 0x10 "DMACC7CONFIG,Channel 7 Configuration Register" bitfld.long 0x10 18. " H ,Halt" "Disabled,Enabled" bitfld.long 0x10 17. " A ,Active" "Inactive,Active" textline " " bitfld.long 0x10 16. " L ,Locked transfers enable" "Disabled,Enabled" bitfld.long 0x10 15. " ITC ,Terminal count interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x10 14. " IE ,Interrupt error mask" "Not masked,Masked" textline " " sif (cpu()=="LPC1772"||cpu()=="LPC1774"||cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778"||cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788") bitfld.long 0x10 11.--13. " TRANSFERTYPE ,Flow control and transfer type" "DMA/Memory to memory,DMA/Memory to peripheral,DMA/Peripheral to memory,DMA/Source peripheral to destination peripheral,DP/Source peripheral to destination peripheral,DP/Memory to peripheral,SP/Peripheral to memory,SP/Source peripheral to destination peripheral" textline " " sif (cpu()!="LPC1772"&&cpu()!="LPC1774") bitfld.long 0x10 6.--10. " DESTPERIPHERAL ,Destination peripheral" "SPIFI/T0_MAT[0],SD card/T0_MAT[1],SSP0 Tx/T1_MAT[0],SSP0 Rx/T1_MAT[1],SSP1 Tx/T2_MAT[0],SSP1 Rx/T2_MAT[1],SSP2 TX/I2S channel 0,SSP2 Rx/I2S channel 1,ADC,DAC,UART0 Tx/UART3 Tx,UART0 Rx/UART3 Rx,UART1 Tx/UART4 Tx,UART1 Rx/UART4 Rx,UART2 Tx/MAT3.0,UART2 Rx/MAT3.1,?..." textline " " bitfld.long 0x10 1.--5. " SRCPERIPHERAL ,Source peripheral" "SPIFI/T0_MAT[0],SD card/T0_MAT[1],SSP0 Tx/T1_MAT[0],SSP0 Rx/T1_MAT[1],SSP1 Tx/T2_MAT[0],SSP1 Rx/T2_MAT[1],SSP2 TX/I2S channel 0,SSP2 Rx/I2Schannel 1,ADC,DAC,UART0 Tx/UART3 Tx,UART0 Rx/UART3 Rx,UART1 Tx/UART4 Tx,UART1 Rx/UART4 Rx,UART2 Tx/MAT3.0,UART2 Rx/MAT3.1,?..." else bitfld.long 0x10 6.--10. " DESTPERIPHERAL ,Destination peripheral" "SPIFI/T0_MAT[0],T0_MAT[1],SSP0 Tx/T1_MAT[0],SSP0 Rx/T1_MAT[1],SSP1 Tx/T2_MAT[0],SSP1 Rx/T2_MAT[1],SSP2 TX,SSP2 Rx,ADC,DAC,UART0 Tx/UART3 Tx,UART0 Rx/UART3 Rx,UART1 Tx/UART4 Tx,UART1 Rx/UART4 Rx,UART2 Tx/MAT3.0,UART2 Rx/MAT3.1,?..." textline " " bitfld.long 0x10 1.--5. " SRCPERIPHERAL ,Source peripheral" "SPIFI/T0_MAT[0],T0_MAT[1],SSP0 Tx/T1_MAT[0],SSP0 Rx/T1_MAT[1],SSP1 Tx/T2_MAT[0],SSP1 Rx/T2_MAT[1],SSP2 TX,SSP2 Rx,ADC,DAC,UART0 Tx/UART3 Tx,UART0 Rx/UART3 Rx,UART1 Tx/UART4 Tx,UART1 Rx/UART4 Rx,UART2 Tx/MAT3.0,UART2 Rx/MAT3.1,?..." endif else bitfld.long 0x10 11.--13. " FLOWCNTRL ,Flow control and transfer type" "DMA/Memory to memory,DMA/Memory to peripheral,DMA/Peripheral to memory,DMA/Source peripheral to destination peripheral,?..." textline " " bitfld.long 0x10 6.--10. " DESTPERIPHERAL ,Destination peripheral" "SSP0 Tx,SSP0 Rx,SSP1 Tx,SSP1 Rx,ADC,I2S channel 0,I2S channel 1,DAC,UART0 Tx / MAT0.0,UART0 Rx / MAT0.1,UART1 Tx / MAT1.0,UART1 Rx / MAT1.1,UART2 Tx / MAT2.0,UART2 Rx / MAT2.1,UART3 Tx / MAT3.0,UART3 Rx / MAT3.1,?..." textline " " bitfld.long 0x10 1.--5. " SRCPERIPHERAL ,Source peripheral" "SSP0 Tx,SSP0 Rx,SSP1 Tx,SSP1 Rx,ADC,I2S channel 0,I2S channel 1,DAC,UART0 Tx / MAT0.0,UART0 Rx / MAT0.1,UART1 Tx / MAT1.0,UART1 Rx / MAT1.1,UART2 Tx / MAT2.0,UART2 Rx / MAT2.1,UART3 Tx / MAT3.0,UART3 Rx / MAT3.1,?..." endif textline " " bitfld.long 0x10 0. " E ,Channel enable" "Disabled,Enabled" width 0xB tree.end endif tree.end sif (cpu()=="LPC1772"||cpu()=="LPC1774"||cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778"||cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788") tree "CRC engine" base ad:0x20090000 width 10. group.long 0x00++0x7 line.long 0x00 "CRC_MODE,CRC mode register" bitfld.long 0x00 5. " CMPL_SUM ,1's complement for CRC_SUM" "Not complemented,Complemented" bitfld.long 0x00 4. " BIT_RVS_SUM ,Bit order reverse for CRC_SUM" "Not reversed,Reversed" bitfld.long 0x00 3. " CMPL_WR ,1's complement for CRC_WR_DATA" "Not complemented,Complemented" textline " " bitfld.long 0x00 2. " BIT_RVS_WR ,Bit order reverse for CRC_WR_DATA" "Not reversed,Reversed" bitfld.long 0x00 0.--1. " CRC_POLY ,CRC polynomial" "CRC-CCITT,CRC-16,CRC-32,CRC-32" line.long 0x04 "CRC_SEED,CRC seed register" rgroup.long 0x08++0x03 line.long 0x00 "CRC_SUM,CRC checksum register" wgroup.long 0x08++0x03 line.long 0x00 "CRC_DATA,CRC data register" width 0xB tree.end tree "EEPROM memory" base ad:0x00200000 width 10. group.long 0x0++0x3 "EEPROM registers" line.long 0x00 "EECMD,EEPROM command register" sif !cpuis("LPC1853")&&!cpuis("LPC1857") bitfld.long 0x00 3. " RDPREFETCH ,Read data prefetch bit" "Disabled,Enabled" endif bitfld.long 0x00 0.--2. " CMD ,Command" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Erase/Program,?..." sif !cpuis("LPC1853")&&!cpuis("LPC1857") group.long 0x04++0x03 line.long 0x00 "EEADDR,EEPROM address register" hexmask.long.word 0x00 0.--11. 1. " ADDR ,Address" endif sif cpuis("LPC1853")||cpuis("LPC1857") group.long 0x08++0x13 line.long 0x00 "RWSTATE,EEPROM read wait state register" hexmask.long.byte 0x00 8.--15. 1. " RPHASE1 ,Wait states 1" hexmask.long.byte 0x00 0.--7. 1. " RPHASE2 ,Wait states 2" line.long 0x04 "AUTOPROG,EEPROM auto programming register" bitfld.long 0x04 0.--1. " AUTOPROG ,Auto programming mode" "Off,After 1 word,After a write to AHB,?..." line.long 0x08 "WSTATE,EEPROM wait state register" bitfld.long 0x08 31. " LCK_PARWEP ,Lock timing parameters for write, erase and program operation" "R/W,R" hexmask.long.byte 0x08 16.--23. 1. " PHASE1 ,Wait states for phase 1" textline " " hexmask.long.byte 0x08 8.--15. 1. " PHASE2 ,Wait states for phase 2" hexmask.long.byte 0x08 0.--7. 1. " PHASE3 ,Wait states for phase 3" line.long 0x0C "CLKDIV,EEPROM clock divider register" hexmask.long.word 0x0C 0.--15. 1. " CLKDIV ,Division factor" line.long 0x10 "PWRDWN,EEPROM power down/DCM register" bitfld.long 0x10 0. " PWRDWN ,Power down mode bit" "No,Yes" endif sif !cpuis("LPC1853")&&!cpuis("LPC1857") if ((per.l(ad:0x00200000+0x80)&0x07)==0x03) wgroup.long 0x88++0x03 line.long 0x00 "EEWDATA,EEPROM write data register" hexmask.long.byte 0x00 0.--7. 1. " WDATA ,Write data" elif ((per.l(ad:0x00200000+0x80)&0x07)==0x04) wgroup.long 0x88++0x03 line.long 0x00 "EEWDATA,EEPROM write data register" hexmask.long.word 0x00 0.--15. 1. " WDATA ,Write data" elif ((per.l(ad:0x00200000+0x80)&0x07)==0x05) wgroup.long 0x88++0x03 line.long 0x00 "EEWDATA,EEPROM write data register" else hgroup.long 0x88++0x03 hide.long 0x00 "EEWDATA,EEPROM write data register" endif if ((per.l(ad:0x00200000+0x80)&0x07)==0x00) rgroup.long 0x8C++0x03 line.long 0x00 "EERDATA,EEPROM read data register" hexmask.long.byte 0x00 0.--7. 1. " WDATA ,Write data" elif ((per.l(ad:0x00200000+0x80)&0x07)==0x01) rgroup.long 0x8C++0x03 line.long 0x00 "EERDATA,EEPROM read data register" hexmask.long.word 0x00 0.--15. 1. " WDATA ,Write data" elif ((per.l(ad:0x00200000+0x80)&0x07)==0x02) rgroup.long 0x8C++0x03 line.long 0x00 "EERDATA,EEPROM read data register" else hgroup.long 0x8C++0x03 hide.long 0x00 "EERDATA,EEPROM read data register" endif group.long 0x90++0x0B line.long 0x00 "EEWSTATE,EEPROM wait state register" hexmask.long.byte 0x00 16.--23. 1. " PHASE1 ,Wait states 1" hexmask.long.byte 0x00 8.--15. 1. " PHASE2 ,Wait states 2" textline " " hexmask.long.byte 0x00 0.--7. 1. " PHASE3 ,Wait states 3" line.long 0x04 "EECLKDIV,EEPROM clock divider register" hexmask.long.word 0x04 0.--15. 1. " CLKDIV ,Division factor (minus 1 encoded)" line.long 0x08 "EEPWRDWN,EEPROM power down register" bitfld.long 0x08 0. " PWRDWN ,Power down mode" "Disabled,Enabled" endif group.long 0xFE0++0x07 "Interrupt registers" line.long 0x04 "EEINTEN,Interrupt enable register" sif !cpuis("LPC1853")&&!cpuis("LPC1857") setclrfld.long 0x04 28. -0x04 28. -0x08 28. " EE_PROG_DONE_set/clr ,EEPROM program operation finished interrupt enable" "Disabled,Enabled" setclrfld.long 0x04 26. -0x04 26. -0x08 26. " EE_RW_DONE_set/clr ,EEPROM read/write operation finished interrupt enable" "Disabled,Enabled" else setclrfld.long 0x04 2. -0x04 2. -0x08 2. " EE_PROG_DONE ,EEPROM program operation finished interrupt enable bit" "Disabled,Enabled" endif line.long 0x00 "EEINTSTAT,Interrupt status register" sif !cpuis("LPC1853")&&!cpuis("LPC1857") setclrfld.long 0x00 28. 0x0C 28. 0x08 28. " END_OF_PROG1_set/clr ,EEPROM program operation finished interrupt status bit" "Not finished,Finished" setclrfld.long 0x00 26. 0x0C 26. 0x08 26. " END_OF_RDWR_set/clr ,EEPROM read/write operation finished interrupt status bit" "Not finished,Finished" else setclrfld.long 0x00 2. 0x0c 2. 0x08 2. " END_OF_PROG ,EEPROM program operation finished interrupt status bit" "Not finished,Finished" endif tree.end endif tree "Flash signature generation" sif (cpu()=="LPC1772"||cpu()=="LPC1774"||cpu()=="LPC1776"||cpu()=="LPC1777"||cpu()=="LPC1778"||cpu()=="LPC1785"||cpu()=="LPC1786"||cpu()=="LPC1787"||cpu()=="LPC1788") base ad:0x00200000 else base ad:0x40084000 endif width 11. sif (cpuis("LPC11E*")||cpu()=="LPC11U12/201"||cpu()=="LPC11U13/201"||cpu()=="LPC11U14/201"||cpu()=="LPC11U23/301"||cpuis("LPC11U24*")||cpuis("LPC11U3*")||cpu()=="LPC1102"||cpu()=="LPC1102LV"||cpu()=="LPC1110"||cpuis("LPC1111*")||cpuis("LPC1112*")||cpu()=="LPC1112LV"||cpuis("LPC1113*")||cpuis("LPC1114*")||cpu()=="LPC1114LV"||cpuis("LPC1115*")||cpu()=="LPC11D14"||cpu()=="LPC11A02"||cpu()=="LPC11A04"||cpu()=="LPC11A11"||cpu()=="LPC11A12"||cpu()=="LPC11A13"||cpu()=="LPC11A14") group.long 0x10++0x3 line.long 0x00 "FLASHCFG,Flash Configuration Register" bitfld.long 0x00 0.--1. " FLASHTIM ,Flash memory access time" "1 system clock,2 system clocks,3 system clocks,?..." endif group.long 0x20++0x07 line.long 0x00 "FMSSTART,Flash Module Signature Start register" hexmask.long.tbyte 0x00 0.--16. 1. " START ,Signature generation start address" line.long 0x04 "FMSSTOP,Flash Module Signature Stop register" bitfld.long 0x04 17. " SIG_START ,Start control bit for signature generation" "Not started,Started" textline " " hexmask.long.tbyte 0x04 0.--16. 1. " STOP ,BIST stop address divided by 16" rgroup.long 0x2C++0x0F line.long 0x00 "FMSW0,FMSW0 register bit description (Word 0 of 128-bit signature)" line.long 0x04 "FMSW1,FMSW1 register bit description (Word 1 of 128-bit signature)" line.long 0x08 "FMSW2,FMSW2 register bit description (Word 2 of 128-bit signature)" line.long 0x0c "FMSW3,FMSW3 register bit description (Word 3 of 128-bit signature)" sif (cpu()=="LPC11A02"||cpu()=="LPC11A04"||cpu()=="LPC11A11"||cpu()=="LPC11A12"||cpu()=="LPC11A13"||cpu()=="LPC11A14"||cpu()=="LPC11U12/201"||cpu()=="LPC11U13/201"||cpu()=="LPC11U14/201"||cpu()=="LPC11U23/301"||cpuis("LPC11U24*")||cpuis("LPC11U3*")||cpuis("LPC11E*")) group.long 0x9C++0x07 line.long 0x00 "EEMSSTART,EEPROM BIST start address register" hexmask.long.word 0x00 0.--13. 1. " STARTA ,BIST start address" line.long 0x04 "EEMSSTOP,EEPROM BIST stop address register" bitfld.long 0x04 31. " STRTBIST ,BIST start bit" "No action,Start" textline " " bitfld.long 0x04 30. " DEVSEL ,BIST device select bit" "Total memory,EEPROM" textline " " hexmask.long.word 0x04 0.--13. 1. " STOPA ,BIST stop address" rgroup.long 0xA4++0x03 line.long 0x00 "EEMSSIG,EEPROM BIST signature register" hexmask.long.word 0x00 16.--31. 1. " PARITY_SIG ,BIST 16-bit signature calculated from only the parity bits of the data bytes" textline " " hexmask.long.word 0x00 0.--15. 1. " DATA_SIG ,16-bit signature calculated from only the data bytes" endif rgroup.long 0xfe0++0x03 line.long 0x00 "FMSTAT,Flash module Status register" bitfld.long 0x00 2. " SIG_DONE ,Signature generation complete flag" "Not completed,Completed" wgroup.long 0xfe8++0x03 line.long 0x00 "FMSTATCLR,Flash Module Status Clear register" bitfld.long 0x00 2. " SIG_DONE_CLR ,Clear signature generation complete flag" "No effect,Clear" width 0x0B tree.end tree "Debug" base ad:0x400FC040 width 8. group.long 0x00++0x3 line.long 0x00 "MEMMAP,Memory Mapping Control Register" bitfld.long 0x00 0. " MAP ,Memory map to address 0" "Boot ROM (boot mode),On-chip Flash memory (user mode)" width 0xb tree.end textline ""