; -------------------------------------------------------------------------------- ; @Title: lh79520 On-Chip Peripherals ; @Props: Released ; @Author: SYL ; @Changelog: 2005-02-13 SYL ; @Manufacturer: SHARP - SHARP ; @Core: ARM720T ; @Chip: LH79520 ; @Copyright: (C) 1989-2017 Lauterbach GmbH, licensed for use with TRACE32(R) only ; -------------------------------------------------------------------------------- ; $Id: perlh79520.per 17441 2024-02-02 17:32:46Z kwisniewski $ config 16. 8. width 0x0B base ad:0x00000000 tree "ARM Core" width 0x0F group (0xFFFE2000+0x008)--(0xFFFE2000+0x00F) line.long 0x000 "RCPCRemapCtrl,RCPC Remap Control Register" bitfld.long 0x0000 0.--1. " REMAP ,Remap Control" "External Static Memory at address 0x00000000,SDRAM Memory at address 0x00000000,Internal Static Memory at address 0x00000000,External Static Memory at address 0x00000000" group (0xFFFE2000+0x088)--(0xFFFE2000+0x08B) line.long 0x000 "CoreClkConfig,Core Clock Configuration Register" bitfld.long 0x000 0.--1. " CFGVAL ,CoreClkConfig Value" "Standard-asynchronous,Standard-synchronous,FastBus Extension,FastBus Extension" width 0x0B tree.end tree "External Static Memory Controller" width 0x09 group (0xFFFF1000+0x000)--(0xFFFF1000+0x003) line.long 0x000 "SMCBCR0,SMC Bank Configuration Register 0 (Read/Write Access)" bitfld.long 0x0000 28.--29. " MW ,External Static Memory Width" "8-bit,16-bit,32-bit,?..." bitfld.long 0x0000 27. " BM ,Burst Mode" "Non-burst,Burst ROM" bitfld.long 0x0000 26. " WP ,Write Protect" "Not protected,Protected" bitfld.long 0x0000 25. " WPERR ,Write Protect Error Status Flag" "No error,Error" textline " " bitfld.long 0x0000 24. " BUSERR ,Bus Transfer Error Status Flag" "No error,Error" bitfld.long 0x0000 11.--15. " WST2 ,Wait State2" "00000,00001,00010,00011,00100,00101,00110,00111,01000,01001,01010,01011,01100,01101,01110,01111,10000,10001,10010,10011,10100,10101,10110,10111,11000,11001,11010,11011,11100,11101,11110,11111" bitfld.long 0x0000 10. " RBLE ,Read Byte Lane Enable" "Disabled,Enabled" bitfld.long 0x0000 5.--9. " WST1 ,Wait State1" "00000,00001,00010,00011,00100,00101,00110,00111,01000,01001,01010,01011,01100,01101,01110,01111,10000,10001,10010,10011,10100,10101,10110,10111,11000,11001,11010,11011,11100,11101,11110,11111" textline " " bitfld.long 0x0000 0.--3. " IDCY ,Idle cycle memory data bus turn-around time" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" wgroup (0xFFFF1000+0x000)--(0xFFFF1000+0x003) line.long 0x000 "SMCBCR0,SMC Bank Configuration Register 0 (Write Access Only)" bitfld.long 0x000 25. " WPERR ,Write Protect Error Status Flag Clear" "No effect,Clear" bitfld.long 0x000 24. " BUSERR ,Bus Transfer Error Status Flag Clear" "No effect,Clear" group (0xFFFF1000+0x004)--(0xFFFF1000+0x007) line.long 0x000 "SMCBCR1,SMC Bank Configuration Register 1 (Read/Write Access)" bitfld.long 0x0000 28.--29. " MW ,External Static Memory Width" "8-bit,16-bit,32-bit,?..." bitfld.long 0x0000 27. " BM ,Burst Mode" "Non-burst,Burst ROM" bitfld.long 0x0000 26. " WP ,Write Protect" "Not protected,Protected" bitfld.long 0x0000 25. " WPERR ,Write Protect Error Status Flag" "No error,Error" textline " " bitfld.long 0x0000 24. " BUSERR ,Bus Transfer Error Status Flag" "No error,Error" bitfld.long 0x0000 11.--15. " WST2 ,Wait State2" "00000,00001,00010,00011,00100,00101,00110,00111,01000,01001,01010,01011,01100,01101,01110,01111,10000,10001,10010,10011,10100,10101,10110,10111,11000,11001,11010,11011,11100,11101,11110,11111" bitfld.long 0x0000 10. " RBLE ,Read Byte Lane Enable" "Disabled,Enabled" bitfld.long 0x0000 5.--9. " WST1 ,Wait State1" "00000,00001,00010,00011,00100,00101,00110,00111,01000,01001,01010,01011,01100,01101,01110,01111,10000,10001,10010,10011,10100,10101,10110,10111,11000,11001,11010,11011,11100,11101,11110,11111" textline " " bitfld.long 0x0000 0.--3. " IDCY ,Idle cycle memory data bus turn-around time" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" wgroup (0xFFFF1000+0x004)--(0xFFFF1000+0x007) line.long 0x000 "SMCBCR1,SMC Bank Configuration Register 1 (Write Access Only)" bitfld.long 0x000 25. " WPERR ,Write Protect Error Status Flag Clear" "No effect,Clear" bitfld.long 0x000 24. " BUSERR ,Bus Transfer Error Status Flag Clear" "No effect,Clear" group (0xFFFF1000+0x008)--(0xFFFF1000+0x00B) line.long 0x000 "SMCBCR2,SMC Bank Configuration Register 2 (Read/Write Access)" bitfld.long 0x0000 28.--29. " MW ,External Static Memory Width" "8-bit,16-bit,32-bit,?..." bitfld.long 0x0000 27. " BM ,Burst Mode" "Non-burst,Burst ROM" bitfld.long 0x0000 26. " WP ,Write Protect" "Not protected,Protected" bitfld.long 0x0000 25. " WPERR ,Write Protect Error Status Flag" "No error,Error" textline " " bitfld.long 0x0000 24. " BUSERR ,Bus Transfer Error Status Flag" "No error,Error" bitfld.long 0x0000 11.--15. " WST2 ,Wait State2" "00000,00001,00010,00011,00100,00101,00110,00111,01000,01001,01010,01011,01100,01101,01110,01111,10000,10001,10010,10011,10100,10101,10110,10111,11000,11001,11010,11011,11100,11101,11110,11111" bitfld.long 0x0000 10. " RBLE ,Read Byte Lane Enable" "Disabled,Enabled" bitfld.long 0x0000 5.--9. " WST1 ,Wait State1" "00000,00001,00010,00011,00100,00101,00110,00111,01000,01001,01010,01011,01100,01101,01110,01111,10000,10001,10010,10011,10100,10101,10110,10111,11000,11001,11010,11011,11100,11101,11110,11111" textline " " bitfld.long 0x0000 0.--3. " IDCY ,Idle cycle memory data bus turn-around time" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" wgroup (0xFFFF1000+0x008)--(0xFFFF1000+0x00B) line.long 0x000 "SMCBCR2,SMC Bank Configuration Register 2 (Write Access Only)" bitfld.long 0x000 25. " WPERR ,Write Protect Error Status Flag Clear" "No effect,Clear" bitfld.long 0x000 24. " BUSERR ,Bus Transfer Error Status Flag Clear" "No effect,Clear" group (0xFFFF1000+0x00C)--(0xFFFF1000+0x00F) line.long 0x000 "SMCBCR3,SMC Bank Configuration Register 3 (Read/Write Access)" bitfld.long 0x0000 28.--29. " MW ,External Static Memory Width" "8-bit,16-bit,32-bit,?..." bitfld.long 0x0000 27. " BM ,Burst Mode" "Non-burst,Burst ROM" bitfld.long 0x0000 26. " WP ,Write Protect" "Not protected,Protected" bitfld.long 0x0000 25. " WPERR ,Write Protect Error Status Flag" "No error,Error" textline " " bitfld.long 0x0000 24. " BUSERR ,Bus Transfer Error Status Flag" "No error,Error" bitfld.long 0x0000 11.--15. " WST2 ,Wait State2" "00000,00001,00010,00011,00100,00101,00110,00111,01000,01001,01010,01011,01100,01101,01110,01111,10000,10001,10010,10011,10100,10101,10110,10111,11000,11001,11010,11011,11100,11101,11110,11111" bitfld.long 0x0000 10. " RBLE ,Read Byte Lane Enable" "Disabled,Enabled" bitfld.long 0x0000 5.--9. " WST1 ,Wait State1" "00000,00001,00010,00011,00100,00101,00110,00111,01000,01001,01010,01011,01100,01101,01110,01111,10000,10001,10010,10011,10100,10101,10110,10111,11000,11001,11010,11011,11100,11101,11110,11111" textline " " bitfld.long 0x0000 0.--3. " IDCY ,Idle cycle memory data bus turn-around time" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" wgroup (0xFFFF1000+0x00C)--(0xFFFF1000+0x00F) line.long 0x000 "SMCBCR3,SMC Bank Configuration Register 3 (Write Access Only)" bitfld.long 0x000 25. " WPERR ,Write Protect Error Status Flag Clear" "No effect,Clear" bitfld.long 0x000 24. " BUSERR ,Bus Transfer Error Status Flag Clear" "No effect,Clear" group (0xFFFF1000+0x010)--(0xFFFF1000+0x013) line.long 0x000 "SMCBCR4,SMC Bank Configuration Register 4 (Read/Write Access)" bitfld.long 0x0000 28.--29. " MW ,External Static Memory Width" "8-bit,16-bit,32-bit,?..." bitfld.long 0x0000 27. " BM ,Burst Mode" "Non-burst,Burst ROM" bitfld.long 0x0000 26. " WP ,Write Protect" "Not protected,Protected" bitfld.long 0x0000 25. " WPERR ,Write Protect Error Status Flag" "No error,Error" textline " " bitfld.long 0x0000 24. " BUSERR ,Bus Transfer Error Status Flag" "No error,Error" bitfld.long 0x0000 11.--15. " WST2 ,Wait State2" "00000,00001,00010,00011,00100,00101,00110,00111,01000,01001,01010,01011,01100,01101,01110,01111,10000,10001,10010,10011,10100,10101,10110,10111,11000,11001,11010,11011,11100,11101,11110,11111" bitfld.long 0x0000 10. " RBLE ,Read Byte Lane Enable" "Disabled,Enabled" bitfld.long 0x0000 5.--9. " WST1 ,Wait State1" "00000,00001,00010,00011,00100,00101,00110,00111,01000,01001,01010,01011,01100,01101,01110,01111,10000,10001,10010,10011,10100,10101,10110,10111,11000,11001,11010,11011,11100,11101,11110,11111" textline " " bitfld.long 0x0000 0.--3. " IDCY ,Idle cycle memory data bus turn-around time" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" wgroup (0xFFFF1000+0x010)--(0xFFFF1000+0x013) line.long 0x000 "SMCBCR4,SMC Bank Configuration Register 4 (Write Access Only)" bitfld.long 0x000 25. " WPERR ,Write Protect Error Status Flag Clear" "No effect,Clear" bitfld.long 0x000 24. " BUSERR ,Bus Transfer Error Status Flag Clear" "No effect,Clear" group (0xFFFF1000+0x014)--(0xFFFF1000+0x017) line.long 0x000 "SMCBCR5,SMC Bank Configuration Register 5 (Read/Write Access)" bitfld.long 0x0000 28.--29. " MW ,External Static Memory Width" "8-bit,16-bit,32-bit,?..." bitfld.long 0x0000 27. " BM ,Burst Mode" "Non-burst,Burst ROM" bitfld.long 0x0000 26. " WP ,Write Protect" "Not protected,Protected" bitfld.long 0x0000 25. " WPERR ,Write Protect Error Status Flag" "No error,Error" textline " " bitfld.long 0x0000 24. " BUSERR ,Bus Transfer Error Status Flag" "No error,Error" bitfld.long 0x0000 11.--15. " WST2 ,Wait State2" "00000,00001,00010,00011,00100,00101,00110,00111,01000,01001,01010,01011,01100,01101,01110,01111,10000,10001,10010,10011,10100,10101,10110,10111,11000,11001,11010,11011,11100,11101,11110,11111" bitfld.long 0x0000 10. " RBLE ,Read Byte Lane Enable" "Disabled,Enabled" bitfld.long 0x0000 5.--9. " WST1 ,Wait State1" "00000,00001,00010,00011,00100,00101,00110,00111,01000,01001,01010,01011,01100,01101,01110,01111,10000,10001,10010,10011,10100,10101,10110,10111,11000,11001,11010,11011,11100,11101,11110,11111" textline " " bitfld.long 0x0000 0.--3. " IDCY ,Idle cycle memory data bus turn-around time" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" wgroup (0xFFFF1000+0x014)--(0xFFFF1000+0x017) line.long 0x000 "SMCBCR5,SMC Bank Configuration Register 5 (Write Access Only)" bitfld.long 0x000 25. " WPERR ,Write Protect Error Status Flag Clear" "No effect,Clear" bitfld.long 0x000 24. " BUSERR ,Bus Transfer Error Status Flag Clear" "No effect,Clear" group (0xFFFF1000+0x018)--(0xFFFF1000+0x01B) line.long 0x000 "SMCBCR6,SMC Bank Configuration Register 6 (Read/Write Access)" bitfld.long 0x0000 28.--29. " MW ,External Static Memory Width" "8-bit,16-bit,32-bit,?..." bitfld.long 0x0000 27. " BM ,Burst Mode" "Non-burst,Burst ROM" bitfld.long 0x0000 26. " WP ,Write Protect" "Not protected,Protected" bitfld.long 0x0000 25. " WPERR ,Write Protect Error Status Flag" "No error,Error" textline " " bitfld.long 0x0000 24. " BUSERR ,Bus Transfer Error Status Flag" "No error,Error" bitfld.long 0x0000 11.--15. " WST2 ,Wait State2" "00000,00001,00010,00011,00100,00101,00110,00111,01000,01001,01010,01011,01100,01101,01110,01111,10000,10001,10010,10011,10100,10101,10110,10111,11000,11001,11010,11011,11100,11101,11110,11111" bitfld.long 0x0000 10. " RBLE ,Read Byte Lane Enable" "Disabled,Enabled" bitfld.long 0x0000 5.--9. " WST1 ,Wait State1" "00000,00001,00010,00011,00100,00101,00110,00111,01000,01001,01010,01011,01100,01101,01110,01111,10000,10001,10010,10011,10100,10101,10110,10111,11000,11001,11010,11011,11100,11101,11110,11111" textline " " bitfld.long 0x0000 0.--3. " IDCY ,Idle cycle memory data bus turn-around time" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" wgroup (0xFFFF1000+0x018)--(0xFFFF1000+0x01B) line.long 0x000 "SMCBCR6,SMC Bank Configuration Register 6 (Write Access Only)" bitfld.long 0x000 25. " WPERR ,Write Protect Error Status Flag Clear" "No effect,Clear" bitfld.long 0x000 24. " BUSERR ,Bus Transfer Error Status Flag Clear" "No effect,Clear" width 0x0B tree.end tree "SDRAM Memory Controller" width 0x0F group (0xFFFF2000+0x000)--(0xFFFF2000+0x003) line.long 0x000 "SDRCConfig0,SDRAM Memory Bank 0 Configuration Register" bitfld.long 0x0000 24. " AP ,Auto Pre-Charge Control for SDRAM Accesses" "Disabled,Enabled" bitfld.long 0x0000 22.--23. " R ,RAS to CAS Latency SDRAM Mode" "Reserved,Reserved,2,3" bitfld.long 0x0000 20.--21. " C ,CAS Latency" "Reserved,1,2,3" bitfld.long 0x0000 19. " X ,External Bus Width" "Width=32,Width=16" textline " " bitfld.long 0x0000 18. " C ,SDRAM Clock Enable (SDCKE) Control (Shutdown Mode)" "De-asserted,Driven high" bitfld.long 0x0000 17. " E ,SDRAM Clock Control" "Runs continuously,Stop when all Idle" bitfld.long 0x0000 7. " B1 ,Indicates whether the SDRAM device attached to Chip Select nDCS1 is a 2- or 4-bank device" "2-bank,4-bank" bitfld.long 0x0000 6. " T1 ,Address multiplexing used for Chip Select nDCS1" "x16 or x32,x8" textline " " bitfld.long 0x0000 5. " F1 ,Address multiplexing for Chip Select nDCS1, for 256M SDRAM" "Not 256M,256M" bitfld.long 0x0000 3. " B0 ,Indicates whether the SDRAM device attached to Chip Select nDCS0 is a 2- or 4-bank device" "2-bank,4-bank" bitfld.long 0x0000 2. " T0 ,Address multiplexing used for Chip Select nDCS0" "x16 or x32,x8" bitfld.long 0x0000 1. " F0 ,Address multiplexing for Chip Select nDCS0, for 256M SDRAM" "Not 256M,256M" group (0xFFFF2000+0x004)--(0xFFFF2000+0x007) line.long 0x000 "SDRCConfig1,SDRAM Memory Bank 1 Configuration Register" bitfld.long 0x0000 5. " B ,SDRAM Controller Status Bit" "Idle,Busy" bitfld.long 0x0000 3. " W ,Write Buffer Enable" "Disabled,Enabled" bitfld.long 0x0000 2. " R ,Read Buffer Enable" "Disabled,Enabled" bitfld.long 0x0000 0.--1. " M/I ,Control bits for memory device initialization" "Normal operation,Automatically issue a PALL,Enable the SDRAM MODE,Automatically issue a NOP" group (0xFFFF2000+0x008)--(0xFFFF2000+0x00B) line.long 0x000 "SDRCRefTimer,SDRAM Refresh Timer Register" hexfld.word 0x000 " RTVAL ,The quantity of AHB clock cycles" group (0xFFFF2000+0x00C)--(0xFFFF2000+0x00F) line.long 0x000 "SDRCWBTimeout,SDRAM Write Buffer Time-Out Register" hexfld.word 0x000 " TOVAL ,The delay (in AHB clocks) that must occur before the SDRCs Merging Write Buffer is flushed" width 0x0B tree.end tree "Reset, Clock Generation, and Power Control (RCPC)" width 0x10 group (0xFFFE2000+0x000)--(0xFFFE2000+0x003) line.long 0x000 "RCPCCtrl,RCPC Control Register" bitfld.long 0x0000 9. " WRTLOCK ,Write Lock" "Locked,Not locked" bitfld.long 0x0000 7. " CLKSEL ,HCLK Source Select Status" "PLL output,CLKIN input pin" bitfld.long 0x0000 5.--6. " OUTSEL ,CLKOUT Source Select" "Internal oscillator,PLL,FCLK,HCLK" bitfld.long 0x0000 2.--4. " PWRDOWNSEL ,Power Down Mode Select" "Active,Standby,Sleep,Stop1,Stop2,?..." textline " " bitfld.long 0x0000 1. " EX ,Enable Internal Crystal Oscillator" "Disabled,Enabled" bitfld.long 0x0000 0. " EP ,Enable Phase-Locked Loop (PLL)" "Disabled,Enabled" rgroup (0xFFFE2000+0x004)--(0xFFFE2000+0x007) line.long 0x000 "IDString,Chip ID Register" hexmask.long.word 0x0000 0.--14. 1. " ID ,Chip ID" group (0xFFFE2000+0x008)--(0xFFFE2000+0x00F) line.long 0x000 "RCPCRemapCtrl,RCPC Remap Control Register" bitfld.long 0x0000 0.--1. " REMAP ,Remap Control" "External Static,SDRAM,Internal Static,External Static" line.long 0x004 "SoftReset,Soft Reset Register" hexfld.word 0x004 " SRVAL ,Soft Reset Value" rgroup (0xFFFE2000+0x010)--(0xFFFE2000+0x013) line.long 0x000 "ResetStatus,Reset Status Register" bitfld.long 0x0000 1. " WDTO ,WDT Timeout Status" "Not occured,Occured" bitfld.long 0x0000 0. " EXT ,External Reset Status" "Not occured,Occured" wgroup (0xFFFE2000+0x014)--(0xFFFE2000+0x017) line.long 0x000 "ResetStatusClr,Reset Status Clear Register" bitfld.long 0x0000 1. " TOCLR ,WDT Timeout Status Clear" "No effect,Clear" bitfld.long 0x0000 0. " EXTCLR ,External Reset Status Clear" "No effect,Clear" group (0xFFFE2000+0x018)--(0xFFFE2000+0x047) line.long 0x000 "HCLKPrescale,HCLK Prescale Register" bitfld.long 0x0000 0.--3. " HCPSVAL ,HCLK Prescale (Divider Value)" "Reserved,Reserved,Reserved,6,8,10,12,14,16,18,20,22,24,26,28,30" line.long 0x004 "CpuClkPrescale,CPU Clock Prescale Register" bitfld.long 0x0004 0.--3. " CCPSVAL ,CPUClk Prescale (Divider Value)" "Reserved,Reserved,4,6,8,10,12,14,16,18,20,22,24,26,28,30" line.long 0x00C "PeriphClkCtrl,Peripheral Clock Control Register" bitfld.long 0x000C 9. " RTC ,RTC clock" "Disabled,Enabled" bitfld.long 0x000C 8. " PWM1 ,PWM1 clock" "Disabled,Enabled" bitfld.long 0x000C 7. " PWM0 ,PWM0 clock" "Disabled,Enabled" bitfld.long 0x000C 5. " T23 ,Clock to Timer2 and Timer3" "Disabled,Enabled" textline " " bitfld.long 0x000C 4. " T01 ,Clock to Timer0 and Timer1" "Disabled,Enabled" bitfld.long 0x000C 2. " U2 ,UART2 clock" "Disabled,Enabled" bitfld.long 0x000C 1. " U1 ,UART1 clock" "Disabled,Enabled" bitfld.long 0x000C 0. " U0 ,UART0 clock" "Disabled,Enabled" line.long 0x010 "PeriphClkCtrl2,Peripheral Clock Control Register 2" bitfld.long 0x0010 1. " SSPCLK ,SSP clock" "Disabled,Enabled" bitfld.long 0x0010 0. " LCDCLK ,CLCDC clock" "Disabled,Enabled" line.long 0x014 "AHBClkCtrl,AHB Clock Control Register" bitfld.long 0x0014 1. " SDC ,HCLK signal fed to the SDRC" "Disabled,Enabled" bitfld.long 0x0014 0. " DMA ,HCLK signal fed to the DMAC" "Disabled,Enabled" line.long 0x018 "PeriphClkSel,Peripheral Clock Select Register" bitfld.long 0x0018 7.--8. " RTC ,RTC Clock Source" "1 Hz clock,Reserved,Reserved,32 kHz clock" bitfld.long 0x0018 3. " U2 ,UART2 Clock Source" "Crystal oscillator,CLKIN" bitfld.long 0x0018 2. " U1 ,UART1 Clock Source" "Crystal oscillator,CLKIN" bitfld.long 0x0018 1. " U0 ,UART0 Clock Source" "Crystal oscillator,CLKIN" line.long 0x01C "PeriphClkSel2,Peripheral Clock Select Register 2" bitfld.long 0x01C 0. " LCSRC ,LCD Clock Source" "HCLK,LCDCLKIN pin" line.long 0x020 "PWM0Prescale,PWM0 Prescale Register" hexmask.long.word 0x020 0.--14. 1. " PRESCALEVAL ,Prescale Value for PWM0" line.long 0x024 "PWM1Prescale,PWM1 Prescale Register" hexmask.long.word 0x024 0.--14. 1. " PRESCALEVAL ,Prescale Value for PWM1" line.long 0x028 "LCDClkPrescale,LCD Clock Prescale Register" hexfld.byte 0x028 " LCDPSVAL ,LCDClkPrescale Value" line.long 0x02C "SSPClkPrescale,SSP Clock Prescale Register" hexfld.byte 0x02C " SSPPSVAL ,SSPClkPrescale Value" group (0xFFFE2000+0x080)--(0xFFFE2000+0x083) line.long 0x000 "IntConfig,Interrupt Configuration Register" bitfld.long 0x000 14.--15. " INT7 ,Configure External Interrupt 7" "LOW level,HIGH level,Falling edge,Rising edge" bitfld.long 0x000 12.--13. " INT6 ,Configure External Interrupt 6" "LOW level,HIGH level,Falling edge,Rising edge" bitfld.long 0x000 10.--11. " INT5 ,Configure External Interrupt 5" "LOW level,HIGH level,Falling edge,Rising edge" bitfld.long 0x000 8.--9. " INT4 ,Configure External Interrupt 4" "LOW level,HIGH level,Falling edge,Rising edge" textline " " bitfld.long 0x000 6.--7. " INT3 ,Configure External Interrupt 3" "LOW level,HIGH level,Falling edge,Rising edge" bitfld.long 0x000 4.--5. " INT2 ,Configure External Interrupt 2" "LOW level,HIGH level,Falling edge,Rising edge" bitfld.long 0x000 2.--3. " INT1 ,Configure External Interrupt 1" "LOW level,HIGH level,Falling edge,Rising edge" bitfld.long 0x000 0.--1. " INT0 ,Configure External Interrupt 0" "LOW level,HIGH level,Falling edge,Rising edge" wgroup (0xFFFE2000+0x084)--(0xFFFE2000+0x087) line.long 0x000 "IntClear,Interrupt Clear Register" bitfld.long 0x000 31. " C31 ,Interrupt 31 Clear" "No effect,Clear" bitfld.long 0x000 30. " C30 ,Interrupt 30 Clear" "No effect,Clear" bitfld.long 0x000 29. " C29 ,Interrupt 29 Clear" "No effect,Clear" bitfld.long 0x000 28. " C28 ,Interrupt 28 Clear" "No effect,Clear" textline " " bitfld.long 0x000 27. " C27 ,Interrupt 27 Clear" "No effect,Clear" bitfld.long 0x000 26. " C26 ,Interrupt 26 Clear" "No effect,Clear" bitfld.long 0x000 25. " C25 ,Interrupt 25 Clear" "No effect,Clear" bitfld.long 0x000 24. " C24 ,Interrupt 24 Clear" "No effect,Clear" textline " " bitfld.long 0x000 23. " C23 ,Interrupt 23 Clear" "No effect,Clear" bitfld.long 0x000 22. " C22 ,Interrupt 22 Clear" "No effect,Clear" bitfld.long 0x000 21. " C21 ,Interrupt 21 Clear" "No effect,Clear" bitfld.long 0x000 20. " C20 ,Interrupt 20 Clear" "No effect,Clear" textline " " bitfld.long 0x000 19. " C19 ,Interrupt 19 Clear" "No effect,Clear" bitfld.long 0x000 18. " C18 ,Interrupt 18 Clear" "No effect,Clear" bitfld.long 0x000 17. " C17 ,Interrupt 17 Clear" "No effect,Clear" bitfld.long 0x000 16. " C16 ,Interrupt 16 Clear" "No effect,Clear" textline " " bitfld.long 0x000 15. " C15 ,Interrupt 15 Clear" "No effect,Clear" bitfld.long 0x000 14. " C14 ,Interrupt 14 Clear" "No effect,Clear" bitfld.long 0x000 13. " C13 ,Interrupt 13 Clear" "No effect,Clear" bitfld.long 0x000 12. " C12 ,Interrupt 12 Clear" "No effect,Clear" textline " " bitfld.long 0x000 11. " C11 ,Interrupt 11 Clear" "No effect,Clear" bitfld.long 0x000 10. " C10 ,Interrupt 10 Clear" "No effect,Clear" bitfld.long 0x000 9. " C9 ,Interrupt 9 Clear" "No effect,Clear" bitfld.long 0x000 8. " C8 ,Interrupt 8 Clear" "No effect,Clear" textline " " bitfld.long 0x000 7. " C7 ,Interrupt 7 Clear" "No effect,Clear" bitfld.long 0x000 6. " C6 ,Interrupt 6 Clear" "No effect,Clear" bitfld.long 0x000 5. " C5 ,Interrupt 5 Clear" "No effect,Clear" bitfld.long 0x000 4. " C4 ,Interrupt 4 Clear" "No effect,Clear" textline " " bitfld.long 0x000 3. " C3 ,Interrupt 3 Clear" "No effect,Clear" bitfld.long 0x000 2. " C2 ,Interrupt 2 Clear" "No effect,Clear" bitfld.long 0x000 1. " C1 ,Interrupt 1 Clear" "No effect,Clear" bitfld.long 0x000 0. " C0 ,Interrupt 0 Clear" "No effect,Clear" group (0xFFFE2000+0x088)--(0xFFFE2000+0x08B) line.long 0x000 "CoreClkConfig,Core Clock Configuration Register" bitfld.long 0x000 0.--1. " CFGVAL ,CoreClkConfig Value" "Standard-asynchronous,Standard-synchronous,FastBus Extension,FastBus Extension" width 0x0B tree.end tree "I/O Control and Multiplexing" width 0x09 group (0xFFFE5000+0x0000)--(0xFFFE5000+0x0017) line.long 0x0000 "MemMux,Memory Interface Multiplexing" bitfld.long 0x0000 13. " PIN34 ,Pin Function" "PH7,nBLE3" bitfld.long 0x0000 12. " PIN35 ,Pin Function" "PH6,nBLE2" bitfld.long 0x0000 11. " PIN41 ,Pin Function" "PH5,nCS6" textline " " bitfld.long 0x0000 10. " PIN42 ,Pin Function" "PH4,nCS5" bitfld.long 0x0000 9. " PIN43 ,Pin Function" "PH3,nCS4" bitfld.long 0x0000 8. " PIN44 ,Pin Function" "PH2,nCS3" textline " " bitfld.long 0x0000 7. " UPPER16 ,Enable Upper 16 Data Bus bits" "GPIO,Data" bitfld.long 0x0000 6. " PIN101 ,Pin Function" "PF0,SDCLK" bitfld.long 0x0000 5. " PIN102 ,Pin Function" "PE7,SDCKE" textline " " bitfld.long 0x0000 4. " PIN104 ,Pin Function" "PE6,nDCS1" bitfld.long 0x0000 3. " PIN105 ,Pin Function" "PE5,nDCS0" bitfld.long 0x0000 2. " PIN106 ,Pin Function" "PE4,nSDWE" textline " " bitfld.long 0x0000 0.--1. " PIN112:PIN109 ,Pins 112:109 Function" "PE0/PE1/PE2/PE3,DQM0/DQM1/PE2/PE3,PE0/PE1/PE2/PE3,DQM0/DQM1/DQM2/DQM3" line.long 0x0004 "LCDMux,LCD Signal Multiplexing" bitfld.long 0x0004 28. " PIN114 ,PIN114 Function" "INT7,LCDVD11" bitfld.long 0x0004 27. " PIN115 ,PIN115 Function" "INT6,LCDVD11" bitfld.long 0x0004 26. " PIN116 ,PIN116 Function" "PD7,LCDVD9" textline " " bitfld.long 0x0004 25. " PIN117 ,PIN117 Function" "PD6,LCDVD8" bitfld.long 0x0004 24. " PIN118 ,PIN118 Function" "PD5,LCDVD7" bitfld.long 0x0004 22.--23. " PIN119 ,PIN119 Function" "PD4,LCDVD6 (STN panels),LCDPS (AD-TFT HR-TFT),?..." textline " " bitfld.long 0x0004 21. " PIN121 ,PIN121 Function" "PD3,LCDVD5" bitfld.long 0x0004 20. " PIN122 ,PIN122 Function" "PD2,LCDVD4" bitfld.long 0x0004 19. " PIN123 ,PIN123 Function" "PD1,LCDVD3" textline " " bitfld.long 0x0004 18. " PIN124 ,PIN124 Function" "PD0,LCDVD2" bitfld.long 0x0004 16.--17. " PIN129 ,PIN129 Function" "PC7,LCDFP (STN and TFT),LCDSPS (AD-TFT HR-TFT),?..." bitfld.long 0x0004 15. " PIN130 ,PIN130 Function" "PC6,LCDVD17" textline " " bitfld.long 0x0004 13.--14. " PIN131 ,PIN131 Function" "PC5,LCDLP (TFT and STN),LCDLP (AD-TFT HR-TFT),?..." bitfld.long 0x0004 12. " PIN132 ,PIN132 Function" "PC4,LCDVD16" bitfld.long 0x0004 11. " PIN133 ,PIN133 Function" "PC3,LCDDCLK" textline " " bitfld.long 0x0004 10. " PIN134 ,PIN134 Function" "PC2,LCDCLKIN" bitfld.long 0x0004 8.--9. " PIN135 ,PIN135 Function" "PC1,LCDVDDEN (STN and TFT),LCDCLS (AD-TFT HR-TFT),?..." bitfld.long 0x0004 6.--7. " PIN137 ,PIN137 Function" "PC0,LCDENAB (STN and TFT),LCDSPL (AD-TFT HR-TFT),?..." textline " " bitfld.long 0x0004 4.--5. " PIN139 ,PIN139 Function" "PB7,LCDVD15,?..." bitfld.long 0x0004 3. " PIN140 ,PIN140 Function" "PB6,LCDVD14" bitfld.long 0x0004 2. " PIN141 ,PIN141 Function" "PB5,LCDVD13" textline " " bitfld.long 0x0004 0.--1. " PIN142 ,PIN142 Function" "PB4,LCDVD12 (STN and TFT),LCDREV (AD-TFT HR-TFT),?..." line.long 0x0008 "MiscMux,Miscellaneous Pin Multiplexing" bitfld.long 0x0008 10. " PIN98 ,PIN98 Function" "CLKIN,UARTCLK" bitfld.long 0x0008 9. " PIN99 ,PIN99 Function" "PF1,CLKEN" bitfld.long 0x0008 8. " PIN144 ,PIN144 Function" "INT5/DREQ1,nWAIT" textline " " bitfld.long 0x0008 7. " PIN145 ,PIN145 Function" "CTOUT1B,DACK1" bitfld.long 0x0008 6. " PIN150 ,PIN150 Function" "INT4,PWM0" bitfld.long 0x0008 5. " PIN151 ,PIN151 Function" "INT3,PWMSYNC0" textline " " bitfld.long 0x0008 4. " PIN152 ,PIN152 Function" "PB0,INT2" bitfld.long 0x0008 3. " PIN153 ,PIN153 Function" "PA7,INT1" bitfld.long 0x0008 2. " PIN155 ,PIN155 Function" "PA6,INT0" textline " " bitfld.long 0x0008 1. " PIN156 ,PIN156 Function" "PA5,CLKOUT" bitfld.long 0x0008 0. " PIN157 ,PIN157 Function" "PWM1,DEOT1" line.long 0x000C "DMAMux,DMA Multiplexing" bitfld.long 0x000C 2. " PIN146 ,PIN146 Function" "PB3,DREQ0" bitfld.long 0x000C 1. " PIN147 ,PIN147 Function" "PB2,nDACK0" bitfld.long 0x000C 0. " PIN148 ,PIN148 Function" "PB1,DEOT0" line.long 0x0010 "UARTMux,UART Multiplexing" bitfld.long 0x0010 3. " PIN159 ,PIN159 Function" "PA4,U1TxD" bitfld.long 0x0010 2. " PIN160 ,PIN160 Function" "PA3,U1RxD" bitfld.long 0x0010 1. " PIN162 ,PIN162 Function" "U0IRTxA,U0TxD" textline " " bitfld.long 0x0010 0. " PIN163 ,PIN163 Function" "U0IRRxA,U0RxD" line.long 0x0014 "SSPMux,SSP Multiplexing" bitfld.long 0x0014 4. " PIN164 ,PIN164 Function" "PA2,SSPFRM" bitfld.long 0x0014 3. " PIN165 ,PIN165 Function" "PA1,SSPCLK" bitfld.long 0x0014 2. " PIN166 ,PIN166 Function" "PA0,SSPEN" textline " " bitfld.long 0x0014 1. " PIN167 ,PIN167 Function" "SSPOUT,U2TxD" bitfld.long 0x0014 0. " PIN169 ,PIN169 Function" "SSPIN,U2RxD" width 0x0B tree.end tree "Exceptions and Interrupts" width 0x10 group (0xFFFE2000+0x080)--(0xFFFE2000+0x083) line.long 0x000 "IntConfig,Interrupt Configuration Register" bitfld.long 0x000 14.--15. " INT7 ,Configure External Interrupt 7" "LOW level,HIGH level,Falling edge,Rising edge" bitfld.long 0x000 12.--13. " INT6 ,Configure External Interrupt 6" "LOW level,HIGH level,Falling edge,Rising edge" bitfld.long 0x000 10.--11. " INT5 ,Configure External Interrupt 5" "LOW level,HIGH level,Falling edge,Rising edge" bitfld.long 0x000 8.--9. " INT4 ,Configure External Interrupt 4" "LOW level,HIGH level,Falling edge,Rising edge" textline " " bitfld.long 0x000 6.--7. " INT3 ,Configure External Interrupt 3" "LOW level,HIGH level,Falling edge,Rising edge" bitfld.long 0x000 4.--5. " INT2 ,Configure External Interrupt 2" "LOW level,HIGH level,Falling edge,Rising edge" bitfld.long 0x000 2.--3. " INT1 ,Configure External Interrupt 1" "LOW level,HIGH level,Falling edge,Rising edge" bitfld.long 0x000 0.--1. " INT0 ,Configure External Interrupt 0" "LOW level,HIGH level,Falling edge,Rising edge" wgroup (0xFFFE2000+0x084)--(0xFFFE2000+0x087) line.long 0x000 "IntClear,Interrupt Clear Register" bitfld.long 0x000 7. " INT7 ,Clear External Interrupt 7" "No effect,Clear" bitfld.long 0x000 6. " INT6 ,Clear External Interrupt 6" "No effect,Clear" bitfld.long 0x000 5. " INT5 ,Clear External Interrupt 5" "No effect,Clear" bitfld.long 0x000 4. " INT4 ,Clear External Interrupt 4" "No effect,Clear" textline " " bitfld.long 0x000 3. " INT3 ,Clear External Interrupt 3" "No effect,Clear" bitfld.long 0x000 2. " INT2 ,Clear External Interrupt 2" "No effect,Clear" bitfld.long 0x000 1. " INT1 ,Clear External Interrupt 1" "No effect,Clear" bitfld.long 0x000 0. " INT0 ,Clear External Interrupt 0" "No effect,Clear" group (0xFFFFF000+0x000)--(0xFFFFF000+0x003) line.long 0x000 "IRQStatus,VIC IRQ Status register" bitfld.long 0x000 31. " S31 ,IRQ31 Interrupt Status" "Not asserted,Asserted" bitfld.long 0x000 30. " S30 ,IRQ30 Interrupt Status" "Not asserted,Asserted" bitfld.long 0x000 29. " S29 ,IRQ29 Interrupt Status" "Not asserted,Asserted" bitfld.long 0x000 28. " S28 ,IRQ28 Interrupt Status" "Not asserted,Asserted" textline " " bitfld.long 0x000 27. " S27 ,IRQ27 Interrupt Status" "Not asserted,Asserted" bitfld.long 0x000 26. " S26 ,IRQ26 Interrupt Status" "Not asserted,Asserted" bitfld.long 0x000 25. " S25 ,IRQ25 Interrupt Status" "Not asserted,Asserted" bitfld.long 0x000 24. " S24 ,IRQ24 Interrupt Status" "Not asserted,Asserted" textline " " bitfld.long 0x000 23. " S23 ,IRQ23 Interrupt Status" "Not asserted,Asserted" bitfld.long 0x000 22. " S22 ,IRQ22 Interrupt Status" "Not asserted,Asserted" bitfld.long 0x000 21. " S21 ,IRQ21 Interrupt Status" "Not asserted,Asserted" bitfld.long 0x000 20. " S20 ,IRQ20 Interrupt Status" "Not asserted,Asserted" textline " " bitfld.long 0x000 19. " S19 ,IRQ19 Interrupt Status" "Not asserted,Asserted" bitfld.long 0x000 18. " S18 ,IRQ18 Interrupt Status" "Not asserted,Asserted" bitfld.long 0x000 17. " S17 ,IRQ17 Interrupt Status" "Not asserted,Asserted" bitfld.long 0x000 16. " S16 ,IRQ16 Interrupt Status" "Not asserted,Asserted" textline " " bitfld.long 0x000 15. " S15 ,IRQ15 Interrupt Status" "Not asserted,Asserted" bitfld.long 0x000 14. " S14 ,IRQ14 Interrupt Status" "Not asserted,Asserted" bitfld.long 0x000 13. " S13 ,IRQ13 Interrupt Status" "Not asserted,Asserted" bitfld.long 0x000 12. " S12 ,IRQ12 Interrupt Status" "Not asserted,Asserted" textline " " bitfld.long 0x000 11. " S11 ,IRQ11 Interrupt Status" "Not asserted,Asserted" bitfld.long 0x000 10. " S10 ,IRQ10 Interrupt Status" "Not asserted,Asserted" bitfld.long 0x000 9. " S9 ,IRQ9 Interrupt Status" "Not asserted,Asserted" bitfld.long 0x000 8. " S8 ,IRQ8 Interrupt Status" "Not asserted,Asserted" textline " " bitfld.long 0x000 7. " S7 ,IRQ7 Interrupt Status" "Not asserted,Asserted" bitfld.long 0x000 6. " S6 ,IRQ6 Interrupt Status" "Not asserted,Asserted" bitfld.long 0x000 5. " S5 ,IRQ5 Interrupt Status" "Not asserted,Asserted" bitfld.long 0x000 4. " S4 ,IRQ4 Interrupt Status" "Not asserted,Asserted" textline " " bitfld.long 0x000 3. " S3 ,IRQ3 Interrupt Status" "Not asserted,Asserted" bitfld.long 0x000 2. " S2 ,IRQ2 Interrupt Status" "Not asserted,Asserted" bitfld.long 0x000 1. " S1 ,IRQ1 Interrupt Status" "Not asserted,Asserted" bitfld.long 0x000 0. " S0 ,IRQ0 Interrupt Status" "Not asserted,Asserted" rgroup (0xFFFFF000+0x004)--(0xFFFFF000+0x007) line.long 0x000 "FIQStatus,VIC FIQ Status register" bitfld.long 0x000 31. " S31 ,FIQ31 Interrupt Status" "Not asserted,Asserted" bitfld.long 0x000 30. " S30 ,FIQ30 Interrupt Status" "Not asserted,Asserted" bitfld.long 0x000 29. " S29 ,FIQ29 Interrupt Status" "Not asserted,Asserted" bitfld.long 0x000 28. " S28 ,FIQ28 Interrupt Status" "Not asserted,Asserted" textline " " bitfld.long 0x000 27. " S27 ,FIQ27 Interrupt Status" "Not asserted,Asserted" bitfld.long 0x000 26. " S26 ,FIQ26 Interrupt Status" "Not asserted,Asserted" bitfld.long 0x000 25. " S25 ,FIQ25 Interrupt Status" "Not asserted,Asserted" bitfld.long 0x000 24. " S24 ,FIQ24 Interrupt Status" "Not asserted,Asserted" textline " " bitfld.long 0x000 23. " S23 ,FIQ23 Interrupt Status" "Not asserted,Asserted" bitfld.long 0x000 22. " S22 ,FIQ22 Interrupt Status" "Not asserted,Asserted" bitfld.long 0x000 21. " S21 ,FIQ21 Interrupt Status" "Not asserted,Asserted" bitfld.long 0x000 20. " S20 ,FIQ20 Interrupt Status" "Not asserted,Asserted" textline " " bitfld.long 0x000 19. " S19 ,FIQ19 Interrupt Status" "Not asserted,Asserted" bitfld.long 0x000 18. " S18 ,FIQ18 Interrupt Status" "Not asserted,Asserted" bitfld.long 0x000 17. " S17 ,FIQ17 Interrupt Status" "Not asserted,Asserted" bitfld.long 0x000 16. " S16 ,FIQ16 Interrupt Status" "Not asserted,Asserted" textline " " bitfld.long 0x000 15. " S15 ,FIQ15 Interrupt Status" "Not asserted,Asserted" bitfld.long 0x000 14. " S14 ,FIQ14 Interrupt Status" "Not asserted,Asserted" bitfld.long 0x000 13. " S13 ,FIQ13 Interrupt Status" "Not asserted,Asserted" bitfld.long 0x000 12. " S12 ,FIQ12 Interrupt Status" "Not asserted,Asserted" textline " " bitfld.long 0x000 11. " S11 ,FIQ11 Interrupt Status" "Not asserted,Asserted" bitfld.long 0x000 10. " S10 ,FIQ10 Interrupt Status" "Not asserted,Asserted" bitfld.long 0x000 9. " S9 ,FIQ9 Interrupt Status" "Not asserted,Asserted" bitfld.long 0x000 8. " S8 ,FIQ8 Interrupt Status" "Not asserted,Asserted" textline " " bitfld.long 0x000 7. " S7 ,FIQ7 Interrupt Status" "Not asserted,Asserted" bitfld.long 0x000 6. " S6 ,FIQ6 Interrupt Status" "Not asserted,Asserted" bitfld.long 0x000 5. " S5 ,FIQ5 Interrupt Status" "Not asserted,Asserted" bitfld.long 0x000 4. " S4 ,FIQ4 Interrupt Status" "Not asserted,Asserted" textline " " bitfld.long 0x000 3. " S3 ,FIQ3 Interrupt Status" "Not asserted,Asserted" bitfld.long 0x000 2. " S2 ,FIQ2 Interrupt Status" "Not asserted,Asserted" bitfld.long 0x000 1. " S1 ,FIQ1 Interrupt Status" "Not asserted,Asserted" bitfld.long 0x000 0. " S0 ,FIQ0 Interrupt Status" "Not asserted,Asserted" rgroup (0xFFFFF000+0x008)--(0xFFFFF000+0x00B) line.long 0x000 "RawInterrupt,VIC Raw Interrupt register" bitfld.long 0x000 31. " S31 ,Raw Interrupt 31 Status" "Not asserted,Asserted" bitfld.long 0x000 30. " S30 ,Raw Interrupt 30 Status" "Not asserted,Asserted" bitfld.long 0x000 29. " S29 ,Raw Interrupt 29 Status" "Not asserted,Asserted" bitfld.long 0x000 28. " S28 ,Raw Interrupt 28 Status" "Not asserted,Asserted" textline " " bitfld.long 0x000 27. " S27 ,Raw Interrupt 27 Status" "Not asserted,Asserted" bitfld.long 0x000 26. " S26 ,Raw Interrupt 26 Status" "Not asserted,Asserted" bitfld.long 0x000 25. " S25 ,Raw Interrupt 25 Status" "Not asserted,Asserted" bitfld.long 0x000 24. " S24 ,Raw Interrupt 24 Status" "Not asserted,Asserted" textline " " bitfld.long 0x000 23. " S23 ,Raw Interrupt 23 Status" "Not asserted,Asserted" bitfld.long 0x000 22. " S22 ,Raw Interrupt 22 Status" "Not asserted,Asserted" bitfld.long 0x000 21. " S21 ,Raw Interrupt 21 Status" "Not asserted,Asserted" bitfld.long 0x000 20. " S20 ,Raw Interrupt 20 Status" "Not asserted,Asserted" textline " " bitfld.long 0x000 19. " S19 ,Raw Interrupt 19 Status" "Not asserted,Asserted" bitfld.long 0x000 18. " S18 ,Raw Interrupt 18 Status" "Not asserted,Asserted" bitfld.long 0x000 17. " S17 ,Raw Interrupt 17 Status" "Not asserted,Asserted" bitfld.long 0x000 16. " S16 ,Raw Interrupt 16 Status" "Not asserted,Asserted" textline " " bitfld.long 0x000 15. " S15 ,Raw Interrupt 15 Status" "Not asserted,Asserted" bitfld.long 0x000 14. " S14 ,Raw Interrupt 14 Status" "Not asserted,Asserted" bitfld.long 0x000 13. " S13 ,Raw Interrupt 13 Status" "Not asserted,Asserted" bitfld.long 0x000 12. " S12 ,Raw Interrupt 12 Status" "Not asserted,Asserted" textline " " bitfld.long 0x000 11. " S11 ,Raw Interrupt 11 Status" "Not asserted,Asserted" bitfld.long 0x000 10. " S10 ,Raw Interrupt 10 Status" "Not asserted,Asserted" bitfld.long 0x000 9. " S9 ,Raw Interrupt 9 Status" "Not asserted,Asserted" bitfld.long 0x000 8. " S8 ,Raw Interrupt 8 Status" "Not asserted,Asserted" textline " " bitfld.long 0x000 7. " S7 ,Raw Interrupt 7 Status" "Not asserted,Asserted" bitfld.long 0x000 6. " S6 ,Raw Interrupt 6 Status" "Not asserted,Asserted" bitfld.long 0x000 5. " S5 ,Raw Interrupt 5 Status" "Not asserted,Asserted" bitfld.long 0x000 4. " S4 ,Raw Interrupt 4 Status" "Not asserted,Asserted" textline " " bitfld.long 0x000 3. " S3 ,Raw Interrupt 3 Status" "Not asserted,Asserted" bitfld.long 0x000 2. " S2 ,Raw Interrupt 2 Status" "Not asserted,Asserted" bitfld.long 0x000 1. " S1 ,Raw Interrupt 1 Status" "Not asserted,Asserted" bitfld.long 0x000 0. " S0 ,Raw Interrupt 0 Status" "Not asserted,Asserted" group (0xFFFFF000+0x00C)--(0xFFFFF000+0x00F) line.long 0x000 "IntSelect,VIC Interrupt Select register" bitfld.long 0x000 31. " S31 ,Interrupt 31 Type Selection" "IRQ,FIQ" bitfld.long 0x000 30. " S30 ,Interrupt 30 Type Selection" "IRQ,FIQ" bitfld.long 0x000 29. " S29 ,Interrupt 29 Type Selection" "IRQ,FIQ" bitfld.long 0x000 28. " S28 ,Interrupt 28 Type Selection" "IRQ,FIQ" textline " " bitfld.long 0x000 27. " S27 ,Interrupt 27 Type Selection" "IRQ,FIQ" bitfld.long 0x000 26. " S26 ,Interrupt 26 Type Selection" "IRQ,FIQ" bitfld.long 0x000 25. " S25 ,Interrupt 25 Type Selection" "IRQ,FIQ" bitfld.long 0x000 24. " S24 ,Interrupt 24 Type Selection" "IRQ,FIQ" textline " " bitfld.long 0x000 23. " S23 ,Interrupt 23 Type Selection" "IRQ,FIQ" bitfld.long 0x000 22. " S22 ,Interrupt 22 Type Selection" "IRQ,FIQ" bitfld.long 0x000 21. " S21 ,Interrupt 21 Type Selection" "IRQ,FIQ" bitfld.long 0x000 20. " S20 ,Interrupt 20 Type Selection" "IRQ,FIQ" textline " " bitfld.long 0x000 19. " S19 ,Interrupt 19 Type Selection" "IRQ,FIQ" bitfld.long 0x000 18. " S18 ,Interrupt 18 Type Selection" "IRQ,FIQ" bitfld.long 0x000 17. " S17 ,Interrupt 17 Type Selection" "IRQ,FIQ" bitfld.long 0x000 16. " S16 ,Interrupt 16 Type Selection" "IRQ,FIQ" textline " " bitfld.long 0x000 15. " S15 ,Interrupt 15 Type Selection" "IRQ,FIQ" bitfld.long 0x000 14. " S14 ,Interrupt 14 Type Selection" "IRQ,FIQ" bitfld.long 0x000 13. " S13 ,Interrupt 13 Type Selection" "IRQ,FIQ" bitfld.long 0x000 12. " S12 ,Interrupt 12 Type Selection" "IRQ,FIQ" textline " " bitfld.long 0x000 11. " S11 ,Interrupt 11 Type Selection" "IRQ,FIQ" bitfld.long 0x000 10. " S10 ,Interrupt 10 Type Selection" "IRQ,FIQ" bitfld.long 0x000 9. " S9 ,Interrupt 9 Type Selection" "IRQ,FIQ" bitfld.long 0x000 8. " S8 ,Interrupt 8 Type Selection" "IRQ,FIQ" textline " " bitfld.long 0x000 7. " S7 ,Interrupt 7 Type Selection" "IRQ,FIQ" bitfld.long 0x000 6. " S6 ,Interrupt 6 Type Selection" "IRQ,FIQ" bitfld.long 0x000 5. " S5 ,Interrupt 5 Type Selection" "IRQ,FIQ" bitfld.long 0x000 4. " S4 ,Interrupt 4 Type Selection" "IRQ,FIQ" textline " " bitfld.long 0x000 3. " S3 ,Interrupt 3 Type Selection" "IRQ,FIQ" bitfld.long 0x000 2. " S2 ,Interrupt 2 Type Selection" "IRQ,FIQ" bitfld.long 0x000 1. " S1 ,Interrupt 1 Type Selection" "IRQ,FIQ" bitfld.long 0x000 0. " S0 ,Interrupt 0 Type Selection" "IRQ,FIQ" rgroup (0xFFFFF000+0x010)--(0xFFFFF000+0x013) line.long 0x000 "IntEnable,VIC Interrupt Enable register (Read Access)" bitfld.long 0x000 31. " IE31 ,Interrupt 31 Enable" "Disabled,Enabled" bitfld.long 0x000 30. " IE30 ,Interrupt 30 Enable" "Disabled,Enabled" bitfld.long 0x000 29. " IE29 ,Interrupt 29 Enable" "Disabled,Enabled" bitfld.long 0x000 28. " IE28 ,Interrupt 28 Enable" "Disabled,Enabled" textline " " bitfld.long 0x000 27. " IE27 ,Interrupt 27 Enable" "Disabled,Enabled" bitfld.long 0x000 26. " IE26 ,Interrupt 26 Enable" "Disabled,Enabled" bitfld.long 0x000 25. " IE25 ,Interrupt 25 Enable" "Disabled,Enabled" bitfld.long 0x000 24. " IE24 ,Interrupt 24 Enable" "Disabled,Enabled" textline " " bitfld.long 0x000 23. " IE23 ,Interrupt 23 Enable" "Disabled,Enabled" bitfld.long 0x000 22. " IE22 ,Interrupt 22 Enable" "Disabled,Enabled" bitfld.long 0x000 21. " IE21 ,Interrupt 21 Enable" "Disabled,Enabled" bitfld.long 0x000 20. " IE20 ,Interrupt 20 Enable" "Disabled,Enabled" textline " " bitfld.long 0x000 19. " IE19 ,Interrupt 19 Enable" "Disabled,Enabled" bitfld.long 0x000 18. " IE18 ,Interrupt 18 Enable" "Disabled,Enabled" bitfld.long 0x000 17. " IE17 ,Interrupt 17 Enable" "Disabled,Enabled" bitfld.long 0x000 16. " IE16 ,Interrupt 16 Enable" "Disabled,Enabled" textline " " bitfld.long 0x000 15. " IE15 ,Interrupt 15 Enable" "Disabled,Enabled" bitfld.long 0x000 14. " IE14 ,Interrupt 14 Enable" "Disabled,Enabled" bitfld.long 0x000 13. " IE13 ,Interrupt 13 Enable" "Disabled,Enabled" bitfld.long 0x000 12. " IE12 ,Interrupt 12 Enable" "Disabled,Enabled" textline " " bitfld.long 0x000 11. " IE11 ,Interrupt 11 Enable" "Disabled,Enabled" bitfld.long 0x000 10. " IE10 ,Interrupt 10 Enable" "Disabled,Enabled" bitfld.long 0x000 9. " IE9 ,Interrupt 9 Enable" "Disabled,Enabled" bitfld.long 0x000 8. " IE8 ,Interrupt 8 Enable" "Disabled,Enabled" textline " " bitfld.long 0x000 7. " IE7 ,Interrupt 7 Enable" "Disabled,Enabled" bitfld.long 0x000 6. " IE6 ,Interrupt 6 Enable" "Disabled,Enabled" bitfld.long 0x000 5. " IE5 ,Interrupt 5 Enable" "Disabled,Enabled" bitfld.long 0x000 4. " IE4 ,Interrupt 4 Enable" "Disabled,Enabled" textline " " bitfld.long 0x000 3. " IE3 ,Interrupt 3 Enable" "Disabled,Enabled" bitfld.long 0x000 2. " IE2 ,Interrupt 2 Enable" "Disabled,Enabled" bitfld.long 0x000 1. " IE1 ,Interrupt 1 Enable" "Disabled,Enabled" bitfld.long 0x000 0. " IE0 ,Interrupt 0 Enable" "Disabled,Enabled" wgroup (0xFFFFF000+0x010)--(0xFFFFF000+0x013) line.long 0x000 "IntEnable,VIC Interrupt Enable register (Write Access)" bitfld.long 0x000 31. " IE31 ,Interrupt 31 Enable" "No effect,Enabled" bitfld.long 0x000 30. " IE30 ,Interrupt 30 Enable" "No effect,Enabled" bitfld.long 0x000 29. " IE29 ,Interrupt 29 Enable" "No effect,Enabled" bitfld.long 0x000 28. " IE28 ,Interrupt 28 Enable" "No effect,Enabled" textline " " bitfld.long 0x000 27. " IE27 ,Interrupt 27 Enable" "No effect,Enabled" bitfld.long 0x000 26. " IE26 ,Interrupt 26 Enable" "No effect,Enabled" bitfld.long 0x000 25. " IE25 ,Interrupt 25 Enable" "No effect,Enabled" bitfld.long 0x000 24. " IE24 ,Interrupt 24 Enable" "No effect,Enabled" textline " " bitfld.long 0x000 23. " IE23 ,Interrupt 23 Enable" "No effect,Enabled" bitfld.long 0x000 22. " IE22 ,Interrupt 22 Enable" "No effect,Enabled" bitfld.long 0x000 21. " IE21 ,Interrupt 21 Enable" "No effect,Enabled" bitfld.long 0x000 20. " IE20 ,Interrupt 20 Enable" "No effect,Enabled" textline " " bitfld.long 0x000 19. " IE19 ,Interrupt 19 Enable" "No effect,Enabled" bitfld.long 0x000 18. " IE18 ,Interrupt 18 Enable" "No effect,Enabled" bitfld.long 0x000 17. " IE17 ,Interrupt 17 Enable" "No effect,Enabled" bitfld.long 0x000 16. " IE16 ,Interrupt 16 Enable" "No effect,Enabled" textline " " bitfld.long 0x000 15. " IE15 ,Interrupt 15 Enable" "No effect,Enabled" bitfld.long 0x000 14. " IE14 ,Interrupt 14 Enable" "No effect,Enabled" bitfld.long 0x000 13. " IE13 ,Interrupt 13 Enable" "No effect,Enabled" bitfld.long 0x000 12. " IE12 ,Interrupt 12 Enable" "No effect,Enabled" textline " " bitfld.long 0x000 11. " IE11 ,Interrupt 11 Enable" "No effect,Enabled" bitfld.long 0x000 10. " IE10 ,Interrupt 10 Enable" "No effect,Enabled" bitfld.long 0x000 9. " IE9 ,Interrupt 9 Enable" "No effect,Enabled" bitfld.long 0x000 8. " IE8 ,Interrupt 8 Enable" "No effect,Enabled" textline " " bitfld.long 0x000 7. " IE7 ,Interrupt 7 Enable" "No effect,Enabled" bitfld.long 0x000 6. " IE6 ,Interrupt 6 Enable" "No effect,Enabled" bitfld.long 0x000 5. " IE5 ,Interrupt 5 Enable" "No effect,Enabled" bitfld.long 0x000 4. " IE4 ,Interrupt 4 Enable" "No effect,Enabled" textline " " bitfld.long 0x000 3. " IE3 ,Interrupt 3 Enable" "No effect,Enabled" bitfld.long 0x000 2. " IE2 ,Interrupt 2 Enable" "No effect,Enabled" bitfld.long 0x000 1. " IE1 ,Interrupt 1 Enable" "No effect,Enabled" bitfld.long 0x000 0. " IE0 ,Interrupt 0 Enable" "No effect,Enabled" wgroup (0xFFFFF000+0x014)--(0xFFFFF000+0x017) line.long 0x000 "IntEnableClear,VIC Interrupt Enable Clear register" bitfld.long 0x000 31. " C31 ,Interrupt 31 Clear" "No effect,Clear" bitfld.long 0x000 30. " C30 ,Interrupt 30 Clear" "No effect,Clear" bitfld.long 0x000 29. " C29 ,Interrupt 29 Clear" "No effect,Clear" bitfld.long 0x000 28. " C28 ,Interrupt 28 Clear" "No effect,Clear" textline " " bitfld.long 0x000 27. " C27 ,Interrupt 27 Clear" "No effect,Clear" bitfld.long 0x000 26. " C26 ,Interrupt 26 Clear" "No effect,Clear" bitfld.long 0x000 25. " C25 ,Interrupt 25 Clear" "No effect,Clear" bitfld.long 0x000 24. " C24 ,Interrupt 24 Clear" "No effect,Clear" textline " " bitfld.long 0x000 23. " C23 ,Interrupt 23 Clear" "No effect,Clear" bitfld.long 0x000 22. " C22 ,Interrupt 22 Clear" "No effect,Clear" bitfld.long 0x000 21. " C21 ,Interrupt 21 Clear" "No effect,Clear" bitfld.long 0x000 20. " C20 ,Interrupt 20 Clear" "No effect,Clear" textline " " bitfld.long 0x000 19. " C19 ,Interrupt 19 Clear" "No effect,Clear" bitfld.long 0x000 18. " C18 ,Interrupt 18 Clear" "No effect,Clear" bitfld.long 0x000 17. " C17 ,Interrupt 17 Clear" "No effect,Clear" bitfld.long 0x000 16. " C16 ,Interrupt 16 Clear" "No effect,Clear" textline " " bitfld.long 0x000 15. " C15 ,Interrupt 15 Clear" "No effect,Clear" bitfld.long 0x000 14. " C14 ,Interrupt 14 Clear" "No effect,Clear" bitfld.long 0x000 13. " C13 ,Interrupt 13 Clear" "No effect,Clear" bitfld.long 0x000 12. " C12 ,Interrupt 12 Clear" "No effect,Clear" textline " " bitfld.long 0x000 11. " C11 ,Interrupt 11 Clear" "No effect,Clear" bitfld.long 0x000 10. " C10 ,Interrupt 10 Clear" "No effect,Clear" bitfld.long 0x000 9. " C9 ,Interrupt 9 Clear" "No effect,Clear" bitfld.long 0x000 8. " C8 ,Interrupt 8 Clear" "No effect,Clear" textline " " bitfld.long 0x000 7. " C7 ,Interrupt 7 Clear" "No effect,Clear" bitfld.long 0x000 6. " C6 ,Interrupt 6 Clear" "No effect,Clear" bitfld.long 0x000 5. " C5 ,Interrupt 5 Clear" "No effect,Clear" bitfld.long 0x000 4. " C4 ,Interrupt 4 Clear" "No effect,Clear" textline " " bitfld.long 0x000 3. " C3 ,Interrupt 3 Clear" "No effect,Clear" bitfld.long 0x000 2. " C2 ,Interrupt 2 Clear" "No effect,Clear" bitfld.long 0x000 1. " C1 ,Interrupt 1 Clear" "No effect,Clear" bitfld.long 0x000 0. " C0 ,Interrupt 0 Clear" "No effect,Clear" rgroup (0xFFFFF000+0x018)--(0xFFFFF000+0x01B) line.long 0x000 "SoftInt,VIC Software Interrupt register (Read Access)" bitfld.long 0x000 31. " S31 ,Interrupt 31 generation under program control" "Not asserted,Asserted" bitfld.long 0x000 30. " S30 ,Interrupt 30 generation under program control" "Not asserted,Asserted" bitfld.long 0x000 29. " S29 ,Interrupt 29 generation under program control" "Not asserted,Asserted" bitfld.long 0x000 28. " S28 ,Interrupt 28 generation under program control" "Not asserted,Asserted" textline " " bitfld.long 0x000 27. " S27 ,Interrupt 27 generation under program control" "Not asserted,Asserted" bitfld.long 0x000 26. " S26 ,Interrupt 26 generation under program control" "Not asserted,Asserted" bitfld.long 0x000 25. " S25 ,Interrupt 25 generation under program control" "Not asserted,Asserted" bitfld.long 0x000 24. " S24 ,Interrupt 24 generation under program control" "Not asserted,Asserted" textline " " bitfld.long 0x000 23. " S23 ,Interrupt 23 generation under program control" "Not asserted,Asserted" bitfld.long 0x000 22. " S22 ,Interrupt 22 generation under program control" "Not asserted,Asserted" bitfld.long 0x000 21. " S21 ,Interrupt 21 generation under program control" "Not asserted,Asserted" bitfld.long 0x000 20. " S20 ,Interrupt 20 generation under program control" "Not asserted,Asserted" textline " " bitfld.long 0x000 19. " S19 ,Interrupt 19 generation under program control" "Not asserted,Asserted" bitfld.long 0x000 18. " S18 ,Interrupt 18 generation under program control" "Not asserted,Asserted" bitfld.long 0x000 17. " S17 ,Interrupt 17 generation under program control" "Not asserted,Asserted" bitfld.long 0x000 16. " S16 ,Interrupt 16 generation under program control" "Not asserted,Asserted" textline " " bitfld.long 0x000 15. " S15 ,Interrupt 15 generation under program control" "Not asserted,Asserted" bitfld.long 0x000 14. " S14 ,Interrupt 14 generation under program control" "Not asserted,Asserted" bitfld.long 0x000 13. " S13 ,Interrupt 13 generation under program control" "Not asserted,Asserted" bitfld.long 0x000 12. " S12 ,Interrupt 12 generation under program control" "Not asserted,Asserted" textline " " bitfld.long 0x000 11. " S11 ,Interrupt 11 generation under program control" "Not asserted,Asserted" bitfld.long 0x000 10. " S10 ,Interrupt 10 generation under program control" "Not asserted,Asserted" bitfld.long 0x000 9. " S9 ,Interrupt 9 generation under program control" "Not asserted,Asserted" bitfld.long 0x000 8. " S8 ,Interrupt 8 generation under program control" "Not asserted,Asserted" textline " " bitfld.long 0x000 7. " S7 ,Interrupt 7 generation under program control" "Not asserted,Asserted" bitfld.long 0x000 6. " S6 ,Interrupt 6 generation under program control" "Not asserted,Asserted" bitfld.long 0x000 5. " S5 ,Interrupt 5 generation under program control" "Not asserted,Asserted" bitfld.long 0x000 4. " S4 ,Interrupt 4 generation under program control" "Not asserted,Asserted" textline " " bitfld.long 0x000 3. " S3 ,Interrupt 3 generation under program control" "Not asserted,Asserted" bitfld.long 0x000 2. " S2 ,Interrupt 2 generation under program control" "Not asserted,Asserted" bitfld.long 0x000 1. " S1 ,Interrupt 1 generation under program control" "Not asserted,Asserted" bitfld.long 0x000 0. " S0 ,Interrupt 0 generation under program control" "Not asserted,Asserted" wgroup (0xFFFFF000+0x018)--(0xFFFFF000+0x01B) line.long 0x000 "SoftInt,VIC Software Interrupt register (Write Access)" bitfld.long 0x000 31. " S31 ,Interrupt 31 generation under program control" "No effect,Generate" bitfld.long 0x000 30. " S30 ,Interrupt 30 generation under program control" "No effect,Generate" bitfld.long 0x000 29. " S29 ,Interrupt 29 generation under program control" "No effect,Generate" bitfld.long 0x000 28. " S28 ,Interrupt 28 generation under program control" "No effect,Generate" textline " " bitfld.long 0x000 27. " S27 ,Interrupt 27 generation under program control" "No effect,Generate" bitfld.long 0x000 26. " S26 ,Interrupt 26 generation under program control" "No effect,Generate" bitfld.long 0x000 25. " S25 ,Interrupt 25 generation under program control" "No effect,Generate" bitfld.long 0x000 24. " S24 ,Interrupt 24 generation under program control" "No effect,Generate" textline " " bitfld.long 0x000 23. " S23 ,Interrupt 23 generation under program control" "No effect,Generate" bitfld.long 0x000 22. " S22 ,Interrupt 22 generation under program control" "No effect,Generate" bitfld.long 0x000 21. " S21 ,Interrupt 21 generation under program control" "No effect,Generate" bitfld.long 0x000 20. " S20 ,Interrupt 20 generation under program control" "No effect,Generate" textline " " bitfld.long 0x000 19. " S19 ,Interrupt 19 generation under program control" "No effect,Generate" bitfld.long 0x000 18. " S18 ,Interrupt 18 generation under program control" "No effect,Generate" bitfld.long 0x000 17. " S17 ,Interrupt 17 generation under program control" "No effect,Generate" bitfld.long 0x000 16. " S16 ,Interrupt 16 generation under program control" "No effect,Generate" textline " " bitfld.long 0x000 15. " S15 ,Interrupt 15 generation under program control" "No effect,Generate" bitfld.long 0x000 14. " S14 ,Interrupt 14 generation under program control" "No effect,Generate" bitfld.long 0x000 13. " S13 ,Interrupt 13 generation under program control" "No effect,Generate" bitfld.long 0x000 12. " S12 ,Interrupt 12 generation under program control" "No effect,Generate" textline " " bitfld.long 0x000 11. " S11 ,Interrupt 11 generation under program control" "No effect,Generate" bitfld.long 0x000 10. " S10 ,Interrupt 10 generation under program control" "No effect,Generate" bitfld.long 0x000 9. " S9 ,Interrupt 9 generation under program control" "No effect,Generate" bitfld.long 0x000 8. " S8 ,Interrupt 8 generation under program control" "No effect,Generate" textline " " bitfld.long 0x000 7. " S7 ,Interrupt 7 generation under program control" "No effect,Generate" bitfld.long 0x000 6. " S6 ,Interrupt 6 generation under program control" "No effect,Generate" bitfld.long 0x000 5. " S5 ,Interrupt 5 generation under program control" "No effect,Generate" bitfld.long 0x000 4. " S4 ,Interrupt 4 generation under program control" "No effect,Generate" textline " " bitfld.long 0x000 3. " S3 ,Interrupt 3 generation under program control" "No effect,Generate" bitfld.long 0x000 2. " S2 ,Interrupt 2 generation under program control" "No effect,Generate" bitfld.long 0x000 1. " S1 ,Interrupt 1 generation under program control" "No effect,Generate" bitfld.long 0x000 0. " S0 ,Interrupt 0 generation under program control" "No effect,Generate" wgroup (0xFFFFF000+0x01C)--(0xFFFFF000+0x01F) line.long 0x000 "SoftIntClear,VIC Software Interrupt Clear register" bitfld.long 0x000 31. " C31 ,Soft Interrupt 31 Clear" "No effect,Clear" bitfld.long 0x000 30. " C30 ,Soft Interrupt 30 Clear" "No effect,Clear" bitfld.long 0x000 29. " C29 ,Soft Interrupt 29 Clear" "No effect,Clear" bitfld.long 0x000 28. " C28 ,Soft Interrupt 28 Clear" "No effect,Clear" textline " " bitfld.long 0x000 27. " C27 ,Soft Interrupt 27 Clear" "No effect,Clear" bitfld.long 0x000 26. " C26 ,Soft Interrupt 26 Clear" "No effect,Clear" bitfld.long 0x000 25. " C25 ,Soft Interrupt 25 Clear" "No effect,Clear" bitfld.long 0x000 24. " C24 ,Soft Interrupt 24 Clear" "No effect,Clear" textline " " bitfld.long 0x000 23. " C23 ,Soft Interrupt 23 Clear" "No effect,Clear" bitfld.long 0x000 22. " C22 ,Soft Interrupt 22 Clear" "No effect,Clear" bitfld.long 0x000 21. " C21 ,Soft Interrupt 21 Clear" "No effect,Clear" bitfld.long 0x000 20. " C20 ,Soft Interrupt 20 Clear" "No effect,Clear" textline " " bitfld.long 0x000 19. " C19 ,Soft Interrupt 19 Clear" "No effect,Clear" bitfld.long 0x000 18. " C18 ,Soft Interrupt 18 Clear" "No effect,Clear" bitfld.long 0x000 17. " C17 ,Soft Interrupt 17 Clear" "No effect,Clear" bitfld.long 0x000 16. " C16 ,Soft Interrupt 16 Clear" "No effect,Clear" textline " " bitfld.long 0x000 15. " C15 ,Soft Interrupt 15 Clear" "No effect,Clear" bitfld.long 0x000 14. " C14 ,Soft Interrupt 14 Clear" "No effect,Clear" bitfld.long 0x000 13. " C13 ,Soft Interrupt 13 Clear" "No effect,Clear" bitfld.long 0x000 12. " C12 ,Soft Interrupt 12 Clear" "No effect,Clear" textline " " bitfld.long 0x000 11. " C11 ,Soft Interrupt 11 Clear" "No effect,Clear" bitfld.long 0x000 10. " C10 ,Soft Interrupt 10 Clear" "No effect,Clear" bitfld.long 0x000 9. " C9 ,Soft Interrupt 9 Clear" "No effect,Clear" bitfld.long 0x000 8. " C8 ,Soft Interrupt 8 Clear" "No effect,Clear" textline " " bitfld.long 0x000 7. " C7 ,Soft Interrupt 7 Clear" "No effect,Clear" bitfld.long 0x000 6. " C6 ,Soft Interrupt 6 Clear" "No effect,Clear" bitfld.long 0x000 5. " C5 ,Soft Interrupt 5 Clear" "No effect,Clear" bitfld.long 0x000 4. " C4 ,Soft Interrupt 4 Clear" "No effect,Clear" textline " " bitfld.long 0x000 3. " C3 ,Soft Interrupt 3 Clear" "No effect,Clear" bitfld.long 0x000 2. " C2 ,Soft Interrupt 2 Clear" "No effect,Clear" bitfld.long 0x000 1. " C1 ,Soft Interrupt 1 Clear" "No effect,Clear" bitfld.long 0x000 0. " C0 ,Soft Interrupt 0 Clear" "No effect,Clear" group (0xFFFFF000+0x030)--(0xFFFFF000+0x033) line.long 0x000 "VectorAddr,Interrupt Vector address" group (0xFFFFF000+0x034)--(0xFFFFF000+0x037) line.long 0x000 "DefVectAddr,Default Vector address" group (0xFFFFF000+0x30C)--(0xFFFFF000+0x30F) line.long 0x000 "ITOP1,Interrupt Test Output Register 1" bitfld.long 0x000 7. " VF ,VICFIO Output Status" "Not asserted,Asserted" bitfld.long 0x000 6. " VI ,VICIRO Output Status" "Not asserted,Asserted" width 0x0C tree "Interrupt Vector Address Registers" group (0xFFFFF000+0x100)--(0xFFFFF000+0x13F) line.long 0x000 "VectAddr0,Interrupt Vector Address 0" line.long 0x004 "VectAddr1,Interrupt Vector Address 1" line.long 0x008 "VectAddr2,Interrupt Vector Address 2" line.long 0x00C "VectAddr3,Interrupt Vector Address 3" line.long 0x010 "VectAddr4,Interrupt Vector Address 4" line.long 0x014 "VectAddr5,Interrupt Vector Address 5" line.long 0x018 "VectAddr6,Interrupt Vector Address 6" line.long 0x01C "VectAddr7,Interrupt Vector Address 7" line.long 0x020 "VectAddr8,Interrupt Vector Address 8" line.long 0x024 "VectAddr9,Interrupt Vector Address 9" line.long 0x028 "VectAddr10,Interrupt Vector Address 10" line.long 0x02C "VectAddr11,Interrupt Vector Address 11" line.long 0x030 "VectAddr12,Interrupt Vector Address 12" line.long 0x034 "VectAddr13,Interrupt Vector Address 13" line.long 0x038 "VectAddr14,Interrupt Vector Address 14" line.long 0x03C "VectAddr15,Interrupt Vector Address 15" tree.end width 0x0C tree "Interrupt Vector Control Registers" group (0xFFFFF000+0x200)--(0xFFFFF000+0x23F) line.long 0x000 "VectCntl0,Interrupt Vector Control 0" bitfld.long 0x000 5. " E ,Vectored Interrupt Enable" "Disabled,Enabled" bitfld.long 0x000 0.--4. " INTSRC ,Vectored Interrupt source select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x004 "VectCntl1,Interrupt Vector Control 1" bitfld.long 0x004 5. " E ,Vectored Interrupt Enable" "Disabled,Enabled" bitfld.long 0x004 0.--4. " INTSRC ,Vectored Interrupt source select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x008 "VectCntl2,Interrupt Vector Control 2" bitfld.long 0x008 5. " E ,Vectored Interrupt Enable" "Disabled,Enabled" bitfld.long 0x008 0.--4. " INTSRC ,Vectored Interrupt source select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x00C "VectCntl3,Interrupt Vector Control 3" bitfld.long 0x00C 5. " E ,Vectored Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00C 0.--4. " INTSRC ,Vectored Interrupt source select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x010 "VectCntl4,Interrupt Vector Control 4" bitfld.long 0x010 5. " E ,Vectored Interrupt Enable" "Disabled,Enabled" bitfld.long 0x010 0.--4. " INTSRC ,Vectored Interrupt source select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x014 "VectCntl5,Interrupt Vector Control 5" bitfld.long 0x014 5. " E ,Vectored Interrupt Enable" "Disabled,Enabled" bitfld.long 0x014 0.--4. " INTSRC ,Vectored Interrupt source select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x018 "VectCntl6,Interrupt Vector Control 6" bitfld.long 0x018 5. " E ,Vectored Interrupt Enable" "Disabled,Enabled" bitfld.long 0x018 0.--4. " INTSRC ,Vectored Interrupt source select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x01C "VectCntl7,Interrupt Vector Control 7" bitfld.long 0x01C 5. " E ,Vectored Interrupt Enable" "Disabled,Enabled" bitfld.long 0x01C 0.--4. " INTSRC ,Vectored Interrupt source select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x020 "VectCntl8,Interrupt Vector Control 8" bitfld.long 0x020 5. " E ,Vectored Interrupt Enable" "Disabled,Enabled" bitfld.long 0x020 0.--4. " INTSRC ,Vectored Interrupt source select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x024 "VectCntl9,Interrupt Vector Control 9" bitfld.long 0x024 5. " E ,Vectored Interrupt Enable" "Disabled,Enabled" bitfld.long 0x024 0.--4. " INTSRC ,Vectored Interrupt source select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x028 "VectCntl10,Interrupt Vector Control 10" bitfld.long 0x028 5. " E ,Vectored Interrupt Enable" "Disabled,Enabled" bitfld.long 0x028 0.--4. " INTSRC ,Vectored Interrupt source select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x02C "VectCntl11,Interrupt Vector Control 11" bitfld.long 0x02C 5. " E ,Vectored Interrupt Enable" "Disabled,Enabled" bitfld.long 0x02C 0.--4. " INTSRC ,Vectored Interrupt source select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x030 "VectCntl12,Interrupt Vector Control 12" bitfld.long 0x030 5. " E ,Vectored Interrupt Enable" "Disabled,Enabled" bitfld.long 0x030 0.--4. " INTSRC ,Vectored Interrupt source select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x034 "VectCntl13,Interrupt Vector Control 13" bitfld.long 0x034 5. " E ,Vectored Interrupt Enable" "Disabled,Enabled" bitfld.long 0x034 0.--4. " INTSRC ,Vectored Interrupt source select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x038 "VectCntl14,Interrupt Vector Control 14" bitfld.long 0x038 5. " E ,Vectored Interrupt Enable" "Disabled,Enabled" bitfld.long 0x038 0.--4. " INTSRC ,Vectored Interrupt source select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x03C "VectCntl15,Interrupt Vector Control 15" bitfld.long 0x03C 5. " E ,Vectored Interrupt Enable" "Disabled,Enabled" bitfld.long 0x03C 0.--4. " INTSRC ,Vectored Interrupt source select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" tree.end width 0x0B tree.end tree "DMA Controller (DMAC)" width 0x0B tree "Stream 0" ;begin include file lh79520/dmacx.ph ;parameters: 0xFFFE1000 0 width 0x0B group (0xFFFE1000+0x000)--(0xFFFE1000+0x013) line.long 0x000 "DMASourceLo,DMA Source Low Register" hexfld.word 0x000 " A[15:0] ,DMA Source Low Address" line.long 0x004 "DMASourceHi,DMA Source High Register" hexfld.word 0x004 " A[31:16] ,DMA Source High Address" line.long 0x008 "DMADestLo,DMA Destination Low Register" hexfld.word 0x008 " A[15:0] ,DMA Destination Low Address" line.long 0x00C "DMADestHi,DMA Destination High Register" hexfld.word 0x00C " A[31:16] ,DMA Destination High Address" line.long 0x010 "DMAMax,DMA Maximum Count Register" hexfld.word 0x010 " MAXCOUNT ,Maximum Count" if (0==3) group (0xFFFE1000+0x014)--(0xFFFE1000+0x017) line.long 0x000 "DMACtrl,DMA Control Register" bitfld.long 0x000 13. " DIR ,Controls the activity of the nDACK0 or DACK1 signals" "Peripheral-to-Memory,Memory-to-Peripheral" bitfld.long 0x000 11. " MEM2MEM ,Memory to memory transfer for stream3" "Not configured,Configured" bitfld.long 0x000 9. " ADDRMODE ,Addressing mode" "Wrapping,Incremental" bitfld.long 0x000 7.--8. " DESIZE ,DMAC-to-destination data width" "Byte,Half-word,Word,?..." textline " " bitfld.long 0x000 5.--6. " SOBURST ,Memory-to-Memory burst size for stream 3" "1 single burst,4 incrementing bursts,8 incrementing bursts,16 incrementing bursts" bitfld.long 0x000 3.--4. " SOSIZE ,Source-to-DMAC data width" "Byte,Half-word,Word,?..." bitfld.long 0x000 2. " DEINC ,Increment destination Register" "Unchanged,Incremented" bitfld.long 0x000 1. " SOINC ,Increment source Register" "Unchanged,Incremented" textline " " bitfld.long 0x000 0. " ENABLE ,Enable DMA transfer for this stream" "Disabled,Enabled" else group (0xFFFE1000+0x014)--(0xFFFE1000+0x017) line.long 0x000 "DMACtrl,DMA Control Register" bitfld.long 0x000 13. " DIR ,Controls the activity of the nDACK0 or DACK1 signals" "Peripheral-to-Memory,Memory-to-Peripheral" bitfld.long 0x000 9. " ADDRMODE ,Addressing mode" "Wrapping,Incremental" bitfld.long 0x000 7.--8. " DESIZE ,DMAC-to-destination data width" "Byte,Half-word,Word,?..." bitfld.long 0x000 3.--4. " SOSIZE ,Source-to-DMAC data width" "Byte,Half-word,Word,?..." textline " " bitfld.long 0x000 2. " DEINC ,Increment destination Register" "Unchanged,Incremented" bitfld.long 0x000 1. " SOINC ,Increment source Register" "Unchanged,Incremented" bitfld.long 0x000 0. " ENABLE ,Enable DMA transfer for this stream" "Disabled,Enabled" endif rgroup (0xFFFE1000+0x018)--(0xFFFE1000+0x02B) line.long 0x000 "DMASoCurrHi,DMA Current Source High Register" hexfld.word 0x000 " A[31:16] ,DMA Current Source High Address" line.long 0x004 "DMASoCurrLo,DMA Current Source Low Registers" hexfld.word 0x004 " A[15:0] ,DMA Current Source Low Address" line.long 0x008 "DMADeCurrHi,DMA Current Destination High Register" hexfld.word 0x008 " A[31:16] ,DMA Current Destination High Address" line.long 0x00C "DMADeCurrLo,DMA Current Destination Low Register" hexfld.word 0x00C " A[15:0] ,DMA Current Destination Low Address" line.long 0x010 "DMATcnt,DMA Terminal Count Register" hexfld.word 0x010 " TCOUNT ,Terminal Count" width 0x0B ;end include file lh79520/dmacx.ph tree.end tree "Stream 1" ;begin include file lh79520/dmacx.ph ;parameters: 0xFFFE1040 1 width 0x0B group (0xFFFE1040+0x000)--(0xFFFE1040+0x013) line.long 0x000 "DMASourceLo,DMA Source Low Register" hexfld.word 0x000 " A[15:0] ,DMA Source Low Address" line.long 0x004 "DMASourceHi,DMA Source High Register" hexfld.word 0x004 " A[31:16] ,DMA Source High Address" line.long 0x008 "DMADestLo,DMA Destination Low Register" hexfld.word 0x008 " A[15:0] ,DMA Destination Low Address" line.long 0x00C "DMADestHi,DMA Destination High Register" hexfld.word 0x00C " A[31:16] ,DMA Destination High Address" line.long 0x010 "DMAMax,DMA Maximum Count Register" hexfld.word 0x010 " MAXCOUNT ,Maximum Count" if (1==3) group (0xFFFE1040+0x014)--(0xFFFE1040+0x017) line.long 0x000 "DMACtrl,DMA Control Register" bitfld.long 0x000 13. " DIR ,Controls the activity of the nDACK0 or DACK1 signals" "Peripheral-to-Memory,Memory-to-Peripheral" bitfld.long 0x000 11. " MEM2MEM ,Memory to memory transfer for stream3" "Not configured,Configured" bitfld.long 0x000 9. " ADDRMODE ,Addressing mode" "Wrapping,Incremental" bitfld.long 0x000 7.--8. " DESIZE ,DMAC-to-destination data width" "Byte,Half-word,Word,?..." textline " " bitfld.long 0x000 5.--6. " SOBURST ,Memory-to-Memory burst size for stream 3" "1 single burst,4 incrementing bursts,8 incrementing bursts,16 incrementing bursts" bitfld.long 0x000 3.--4. " SOSIZE ,Source-to-DMAC data width" "Byte,Half-word,Word,?..." bitfld.long 0x000 2. " DEINC ,Increment destination Register" "Unchanged,Incremented" bitfld.long 0x000 1. " SOINC ,Increment source Register" "Unchanged,Incremented" textline " " bitfld.long 0x000 0. " ENABLE ,Enable DMA transfer for this stream" "Disabled,Enabled" else group (0xFFFE1040+0x014)--(0xFFFE1040+0x017) line.long 0x000 "DMACtrl,DMA Control Register" bitfld.long 0x000 13. " DIR ,Controls the activity of the nDACK0 or DACK1 signals" "Peripheral-to-Memory,Memory-to-Peripheral" bitfld.long 0x000 9. " ADDRMODE ,Addressing mode" "Wrapping,Incremental" bitfld.long 0x000 7.--8. " DESIZE ,DMAC-to-destination data width" "Byte,Half-word,Word,?..." bitfld.long 0x000 3.--4. " SOSIZE ,Source-to-DMAC data width" "Byte,Half-word,Word,?..." textline " " bitfld.long 0x000 2. " DEINC ,Increment destination Register" "Unchanged,Incremented" bitfld.long 0x000 1. " SOINC ,Increment source Register" "Unchanged,Incremented" bitfld.long 0x000 0. " ENABLE ,Enable DMA transfer for this stream" "Disabled,Enabled" endif rgroup (0xFFFE1040+0x018)--(0xFFFE1040+0x02B) line.long 0x000 "DMASoCurrHi,DMA Current Source High Register" hexfld.word 0x000 " A[31:16] ,DMA Current Source High Address" line.long 0x004 "DMASoCurrLo,DMA Current Source Low Registers" hexfld.word 0x004 " A[15:0] ,DMA Current Source Low Address" line.long 0x008 "DMADeCurrHi,DMA Current Destination High Register" hexfld.word 0x008 " A[31:16] ,DMA Current Destination High Address" line.long 0x00C "DMADeCurrLo,DMA Current Destination Low Register" hexfld.word 0x00C " A[15:0] ,DMA Current Destination Low Address" line.long 0x010 "DMATcnt,DMA Terminal Count Register" hexfld.word 0x010 " TCOUNT ,Terminal Count" width 0x0B ;end include file lh79520/dmacx.ph tree.end tree "Stream 2" ;begin include file lh79520/dmacx.ph ;parameters: 0xFFFE1080 2 width 0x0B group (0xFFFE1080+0x000)--(0xFFFE1080+0x013) line.long 0x000 "DMASourceLo,DMA Source Low Register" hexfld.word 0x000 " A[15:0] ,DMA Source Low Address" line.long 0x004 "DMASourceHi,DMA Source High Register" hexfld.word 0x004 " A[31:16] ,DMA Source High Address" line.long 0x008 "DMADestLo,DMA Destination Low Register" hexfld.word 0x008 " A[15:0] ,DMA Destination Low Address" line.long 0x00C "DMADestHi,DMA Destination High Register" hexfld.word 0x00C " A[31:16] ,DMA Destination High Address" line.long 0x010 "DMAMax,DMA Maximum Count Register" hexfld.word 0x010 " MAXCOUNT ,Maximum Count" if (2==3) group (0xFFFE1080+0x014)--(0xFFFE1080+0x017) line.long 0x000 "DMACtrl,DMA Control Register" bitfld.long 0x000 13. " DIR ,Controls the activity of the nDACK0 or DACK1 signals" "Peripheral-to-Memory,Memory-to-Peripheral" bitfld.long 0x000 11. " MEM2MEM ,Memory to memory transfer for stream3" "Not configured,Configured" bitfld.long 0x000 9. " ADDRMODE ,Addressing mode" "Wrapping,Incremental" bitfld.long 0x000 7.--8. " DESIZE ,DMAC-to-destination data width" "Byte,Half-word,Word,?..." textline " " bitfld.long 0x000 5.--6. " SOBURST ,Memory-to-Memory burst size for stream 3" "1 single burst,4 incrementing bursts,8 incrementing bursts,16 incrementing bursts" bitfld.long 0x000 3.--4. " SOSIZE ,Source-to-DMAC data width" "Byte,Half-word,Word,?..." bitfld.long 0x000 2. " DEINC ,Increment destination Register" "Unchanged,Incremented" bitfld.long 0x000 1. " SOINC ,Increment source Register" "Unchanged,Incremented" textline " " bitfld.long 0x000 0. " ENABLE ,Enable DMA transfer for this stream" "Disabled,Enabled" else group (0xFFFE1080+0x014)--(0xFFFE1080+0x017) line.long 0x000 "DMACtrl,DMA Control Register" bitfld.long 0x000 13. " DIR ,Controls the activity of the nDACK0 or DACK1 signals" "Peripheral-to-Memory,Memory-to-Peripheral" bitfld.long 0x000 9. " ADDRMODE ,Addressing mode" "Wrapping,Incremental" bitfld.long 0x000 7.--8. " DESIZE ,DMAC-to-destination data width" "Byte,Half-word,Word,?..." bitfld.long 0x000 3.--4. " SOSIZE ,Source-to-DMAC data width" "Byte,Half-word,Word,?..." textline " " bitfld.long 0x000 2. " DEINC ,Increment destination Register" "Unchanged,Incremented" bitfld.long 0x000 1. " SOINC ,Increment source Register" "Unchanged,Incremented" bitfld.long 0x000 0. " ENABLE ,Enable DMA transfer for this stream" "Disabled,Enabled" endif rgroup (0xFFFE1080+0x018)--(0xFFFE1080+0x02B) line.long 0x000 "DMASoCurrHi,DMA Current Source High Register" hexfld.word 0x000 " A[31:16] ,DMA Current Source High Address" line.long 0x004 "DMASoCurrLo,DMA Current Source Low Registers" hexfld.word 0x004 " A[15:0] ,DMA Current Source Low Address" line.long 0x008 "DMADeCurrHi,DMA Current Destination High Register" hexfld.word 0x008 " A[31:16] ,DMA Current Destination High Address" line.long 0x00C "DMADeCurrLo,DMA Current Destination Low Register" hexfld.word 0x00C " A[15:0] ,DMA Current Destination Low Address" line.long 0x010 "DMATcnt,DMA Terminal Count Register" hexfld.word 0x010 " TCOUNT ,Terminal Count" width 0x0B ;end include file lh79520/dmacx.ph tree.end tree "Stream 3" ;begin include file lh79520/dmacx.ph ;parameters: 0xFFFE10C0 3 width 0x0B group (0xFFFE10C0+0x000)--(0xFFFE10C0+0x013) line.long 0x000 "DMASourceLo,DMA Source Low Register" hexfld.word 0x000 " A[15:0] ,DMA Source Low Address" line.long 0x004 "DMASourceHi,DMA Source High Register" hexfld.word 0x004 " A[31:16] ,DMA Source High Address" line.long 0x008 "DMADestLo,DMA Destination Low Register" hexfld.word 0x008 " A[15:0] ,DMA Destination Low Address" line.long 0x00C "DMADestHi,DMA Destination High Register" hexfld.word 0x00C " A[31:16] ,DMA Destination High Address" line.long 0x010 "DMAMax,DMA Maximum Count Register" hexfld.word 0x010 " MAXCOUNT ,Maximum Count" if (3==3) group (0xFFFE10C0+0x014)--(0xFFFE10C0+0x017) line.long 0x000 "DMACtrl,DMA Control Register" bitfld.long 0x000 13. " DIR ,Controls the activity of the nDACK0 or DACK1 signals" "Peripheral-to-Memory,Memory-to-Peripheral" bitfld.long 0x000 11. " MEM2MEM ,Memory to memory transfer for stream3" "Not configured,Configured" bitfld.long 0x000 9. " ADDRMODE ,Addressing mode" "Wrapping,Incremental" bitfld.long 0x000 7.--8. " DESIZE ,DMAC-to-destination data width" "Byte,Half-word,Word,?..." textline " " bitfld.long 0x000 5.--6. " SOBURST ,Memory-to-Memory burst size for stream 3" "1 single burst,4 incrementing bursts,8 incrementing bursts,16 incrementing bursts" bitfld.long 0x000 3.--4. " SOSIZE ,Source-to-DMAC data width" "Byte,Half-word,Word,?..." bitfld.long 0x000 2. " DEINC ,Increment destination Register" "Unchanged,Incremented" bitfld.long 0x000 1. " SOINC ,Increment source Register" "Unchanged,Incremented" textline " " bitfld.long 0x000 0. " ENABLE ,Enable DMA transfer for this stream" "Disabled,Enabled" else group (0xFFFE10C0+0x014)--(0xFFFE10C0+0x017) line.long 0x000 "DMACtrl,DMA Control Register" bitfld.long 0x000 13. " DIR ,Controls the activity of the nDACK0 or DACK1 signals" "Peripheral-to-Memory,Memory-to-Peripheral" bitfld.long 0x000 9. " ADDRMODE ,Addressing mode" "Wrapping,Incremental" bitfld.long 0x000 7.--8. " DESIZE ,DMAC-to-destination data width" "Byte,Half-word,Word,?..." bitfld.long 0x000 3.--4. " SOSIZE ,Source-to-DMAC data width" "Byte,Half-word,Word,?..." textline " " bitfld.long 0x000 2. " DEINC ,Increment destination Register" "Unchanged,Incremented" bitfld.long 0x000 1. " SOINC ,Increment source Register" "Unchanged,Incremented" bitfld.long 0x000 0. " ENABLE ,Enable DMA transfer for this stream" "Disabled,Enabled" endif rgroup (0xFFFE10C0+0x018)--(0xFFFE10C0+0x02B) line.long 0x000 "DMASoCurrHi,DMA Current Source High Register" hexfld.word 0x000 " A[31:16] ,DMA Current Source High Address" line.long 0x004 "DMASoCurrLo,DMA Current Source Low Registers" hexfld.word 0x004 " A[15:0] ,DMA Current Source Low Address" line.long 0x008 "DMADeCurrHi,DMA Current Destination High Register" hexfld.word 0x008 " A[31:16] ,DMA Current Destination High Address" line.long 0x00C "DMADeCurrLo,DMA Current Destination Low Register" hexfld.word 0x00C " A[15:0] ,DMA Current Destination Low Address" line.long 0x010 "DMATcnt,DMA Terminal Count Register" hexfld.word 0x010 " TCOUNT ,Terminal Count" width 0x0B ;end include file lh79520/dmacx.ph tree.end textline "" rgroup (0xFFFE10F0)--(0xFFFE10F3) line.long 0x00 "DMAMask,DMA Interrupt Mask Register" bitfld.long 0x00 7. " MASKE3 ,Error interrupt for data stream 3 Enable" "Disabled,Enabled" bitfld.long 0x00 6. " MASKE2 ,Error interrupt for data stream 2 Enable" "Disabled,Enabled" bitfld.long 0x00 5. " MASKE1 ,Error interrupt for data stream 1 Enable" "Disabled,Enabled" bitfld.long 0x00 4. " MASKE0 ,Error interrupt for data stream 0 Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " MASK3 ,EOT interrupt for data stream 3 Enable" "Disabled,Enabled" bitfld.long 0x00 2. " MASK2 ,EOT interrupt for data stream 2 Enable" "Disabled,Enabled" bitfld.long 0x00 1. " MASK1 ,EOT interrupt for data stream 1 Enable" "Disabled,Enabled" bitfld.long 0x00 0. " MASK0 ,EOT interrupt for data stream 0 Enable" "Disabled,Enabled" wgroup (0xFFFE10F4)--(0xFFFE10F7) line.long 0x00 "DMAClr,DMA Interrupt Clear Register" bitfld.long 0x00 7. " CLEARE3 ,DMAStatus:ERROR3 Clear" "No effect,Clear" bitfld.long 0x00 6. " CLEARE2 ,DMAStatus:ERROR2 Clear" "No effect,Clear" bitfld.long 0x00 5. " CLEARE1 ,DMAStatus:ERROR1 Clear" "No effect,Clear" bitfld.long 0x00 4. " CLEARE0 ,DMAStatus:ERROR0 Clear" "No effect,Clear" textline " " bitfld.long 0x00 3. " CLEAR3 ,DMAStatus:EOT3 Clear" "No effect,Clear" bitfld.long 0x00 2. " CLEAR2 ,DMAStatus:EOT2 Clear" "No effect,Clear" bitfld.long 0x00 1. " CLEAR1 ,DMAStatus:EOT1 Clear" "No effect,Clear" bitfld.long 0x00 0. " CLEAR0 ,DMAStatus:EOT0 Clear" "No effect,Clear" rgroup (0xFFFE10F8)--(0xFFFE10FB) line.long 0x00 "DMAStatus,DMA Status Register" bitfld.long 0x00 11. " ACTIVE3 ,Data transfer is in progress on stream3" "Not in progress,In progress" bitfld.long 0x00 10. " ACTIVE2 ,Data transfer is in progress on stream2" "Not in progress,In progress" bitfld.long 0x00 9. " ACTIVE1 ,Data transfer is in progress on stream1" "Not in progress,In progress" bitfld.long 0x00 8. " ACTIVE0 ,Data transfer is in progress on stream0" "Not in progress,In progress" textline " " bitfld.long 0x00 7. " ERROR3 ,Data Stream 3 Error Flag" "Not aborted,Aborted" bitfld.long 0x00 6. " ERROR2 ,Data Stream 2 Error Flag" "Not aborted,Aborted" bitfld.long 0x00 5. " ERROR1 ,Data Stream 1 Error Flag" "Not aborted,Aborted" bitfld.long 0x00 4. " ERROR0 ,Data Stream 0 Error Flag" "Not aborted,Aborted" textline " " bitfld.long 0x00 3. " EOT3 ,Data Stream 3 EOT (End of Transfer) Flag" "Not completed,Completed" bitfld.long 0x00 2. " EOT2 ,Data Stream 2 EOT (End of Transfer) Flag" "Not completed,Completed" bitfld.long 0x00 1. " EOT1 ,Data Stream 1 EOT (End of Transfer) Flag" "Not completed,Completed" bitfld.long 0x00 0. " EOT0 ,Data Stream 0 EOT (End of Transfer) Flag" "Not completed,Completed" width 0x0B tree.end tree "Color LCD Controller" width 0x0B group (0xFFFF4000+0x0000)--(0xFFFF4000+0x0023) line.long 0x0000 "TIMING0,LCD Timing 0 Register" hexfld.byte 0x003 " HBP ,Horizontal Back Porch" hexfld.byte 0x002 " HFP ,Horizontal Front Porch" hexfld.byte 0x001 " HSW ,Horizontal Synchronization Pulse Width" hexfld.byte 0x000 " PPL ,Pixels-Per-Line" line.long 0x0004 "TIMING1,LCD Timing 1 Register" hexfld.byte 0x0007 " VBP ,Vertical Back Porch" hexfld.byte 0x0006 " VFP ,Vertical Front Porch" hexmask.long.byte 0x0004 10.--15. 1. " VSW ,Vertical Synchronization (Pulse) Width" hexmask.long.word 0x0004 0.--9. 1. " LPP ,Lines Per Panel" line.long 0x0008 "TIMING2,LCD Timing 2 Register" bitfld.long 0x0008 26. " BCD ,Bypass Pixel Clock Divider" "Use,Bypass" hexmask.long.word 0x0008 16.--25. 1. " CPL ,Clocks Per Line" bitfld.long 0x0008 14. " IOE ,Invert Output Enable" "Active high,Active low" bitfld.long 0x0008 13. " IPC ,Invert Panel Clock" "Rising-edge,Falling-edge" textline " " bitfld.long 0x0008 12. " IHS ,Invert Horizontal Synchronization" "Active high,Active low" bitfld.long 0x0008 11. " IVS ,Invert the Vertical Synchronization Signal" "Active high,Active low" bitfld.long 0x0008 6.--10. " ACB ,AC Bias Signal Frequency" "00000,00001,00010,00011,00100,00101,00110,00111,01000,01001,01010,01011,01100,01101,01110,01111,10000,10001,10010,10011,10100,10101,10110,10111,11000,11001,11010,11011,11100,11101,11110,11111" bitfld.long 0x0008 0.--4. " PCD ,Panel Clock Divisor" "00000,00001,00010,00011,00100,00101,00110,00111,01000,01001,01010,01011,01100,01101,01110,01111,10000,10001,10010,10011,10100,10101,10110,10111,11000,11001,11010,11011,11100,11101,11110,11111" line.long 0x0010 "UPBASE,LCD Upper Panel Base Address Register" line.long 0x0014 "LPBASE,LCD Lower Panel Base Address Register" line.long 0x0018 "INTREN,LCD Interrupt Enable Register" bitfld.long 0x0018 4. " MBEIEN ,Bus Master ERROR Interrupt Enable" "Disabled,Enabled" bitfld.long 0x0018 3. " VCIEN ,Vertical Compare Interrupt Enable" "Disabled,Enabled" bitfld.long 0x0018 2. " BUIEN ,Next Base Update Interrupt Enable" "Disabled,Enabled" bitfld.long 0x0018 1. " FUIEN ,FIFO Underflow Interrupt Enable" "Disabled,Enabled" line.long 0x001C "CONTROL,LCD Control Register" bitfld.long 0x001C 16. " WATERMARK ,LCD DMA FIFO Watermark Level" "Low / Full>=4,High / Empty>=8" bitfld.long 0x001C 12.--13. " VCI ,LCD Vertical Compare" "Vertical synchronization,Back porch,Active video,Front porch" bitfld.long 0x001C 11. " PWR ,LCD Power Enable" "Disabled,Enabled" bitfld.long 0x001C 10. " BEPO ,Big-Endian Pixel Ordering" "Little-endian,Big-endian" textline " " bitfld.long 0x001C 9. " BEBO ,Big-Endian Byte Ordering to the LCD" "Little-endian,Big-endian" bitfld.long 0x001C 8. " BGR ,RGB or BGR Format Selection" "RGB,BGR" bitfld.long 0x001C 7. " DUAL ,Dual Panel STN LCD" "Single,Dual" bitfld.long 0x001C 6. " MONO8L ,Monochrome LCD" "4-bit,8-bit" textline " " bitfld.long 0x001C 5. " TFT ,TFT LCD" "STN,TFT" bitfld.long 0x001C 4. " BW ,Monochrome STN LCD" "Color,Monochrome" bitfld.long 0x001C 1.--3. " BPP ,LCD Bits-Per-Pixel" "1 BPP,2 BPP,4 BPP,8 BPP,16 BPP,Invalid,Invalid,Invalid" bitfld.long 0x001C 0. " LCDEN ,Color LCD Controller Enable" "Disabled,Enabled" line.long 0x0020 "STATUS,Interrupt Status Register" bitfld.long 0x0020 4. " MBEI ,AMBA AHB Master Bus Error Status" "Cleared,Asserted" bitfld.long 0x0020 3. " VCI ,Vertical Compare" "Cleared,Asserted" bitfld.long 0x0020 2. " BUI ,LCD Next Base Address Update" "Cleared,Asserted" bitfld.long 0x0020 1. " FUI ,FIFO Underflow" "Cleared,Asserted" rgroup (0xFFFF4000+0x0024)--(0xFFFF4000+0x002F) line.long 0x0000 "INTERRUPT,INTERRUPT Register" bitfld.long 0x0000 4. " MBEIM ,Masked AHB Master Error Interrupt" "Cleared,Asserted & enabled" bitfld.long 0x0000 3. " VCIM ,Masked Vertical Compare Interrupt" "Cleared,Asserted & enabled" bitfld.long 0x0000 2. " BUIM ,Masked LCD Next Base Address Update Interrupt" "Cleared,Asserted & enabled" bitfld.long 0x0000 1. " FUIM ,Masked FIFO Underflow Interrupt" "Cleared,Asserted & enabled" line.long 0x0004 "UPCUR,LCD Upper Panel Current Address Register" line.long 0x0008 "LPCUR,LCD Lower Panel Current Address Register" group (0xFFFF4000+0x0200)--(0xFFFF4000+0x0203) line.long 0x0000 "PALLETTE,256x16-bit color palette" button "PALETTE" "d sd:(0xFFFF4000+0x0200)--(0xFFFF4000+0x03FF) /LONG" width 0x0B tree.end tree "Timers" width 0x09 tree "Timer 0" group (0xFFFC4000+0x000)--(0xFFFC4000+0x003) line.long 0x000 "Load,Timer0 Load Register" hexfld.word 0x0000 " LOADVAL ,Load Value" rgroup (0xFFFC4000+0x004)--(0xFFFC4000+0x007) line.long 0x000 "Value,Timer0 Value Register" hexfld.word 0x0000 " CURRENTCOUNT ,The current value of the Timer" group (0xFFFC4000+0x008)--(0xFFFC4000+0x00B) line.long 0x000 "Control,Timer0 Control Register" bitfld.long 0x000 7. " ENABLE ,Enable" "Disabled,Enabled" bitfld.long 0x000 6. " MODE ,Mode" "Free-Running,Periodic" bitfld.long 0x000 4. " CASCADE ,Cascade Enable" "Disabled,Enabled" bitfld.long 0x000 2.--3. " PRESCALE ,Input Clock Prescale (Clock Division/Stages of Prescale)" "1/0,16/4,256/8,?..." wgroup (0xFFFC4000+0x00C)--(0xFFFC4000+0x00F) line.long 0x000 "Clear,Timer0 Clear Register" hexfld.word 0x0000 " CLR ,Clear" tree.end tree "Timer 1" group (0xFFFC4020+0x000)--(0xFFFC4020+0x003) line.long 0x000 "Load,Timer1 Load Register" hexfld.word 0x0000 " LOADVAL ,Load Value" rgroup (0xFFFC4020+0x004)--(0xFFFC4020+0x007) line.long 0x000 "Value,Timer1 Value Register" hexfld.word 0x0000 " CURRENTCOUNT ,The current value of the Timer" group (0xFFFC4020+0x008)--(0xFFFC4020+0x00B) line.long 0x000 "Control,Timer1 Control Register" bitfld.long 0x000 7. " ENABLE ,Enable" "Disabled,Enabled" bitfld.long 0x000 6. " MODE ,Mode" "Free-Running,Periodic" bitfld.long 0x000 4. " CASCADE ,Cascade Enable" "Disabled,Enabled" bitfld.long 0x000 2.--3. " PRESCALE ,Input Clock Prescale (Clock Division/Stages of Prescale)" "1/0,16/4,256/8,?..." wgroup (0xFFFC4020+0x00C)--(0xFFFC4020+0x00F) line.long 0x000 "Clear,Timer1 Clear Register" hexfld.word 0x0000 " CLR ,Clear" tree.end tree "Timer 2" group (0xFFFC5000+0x000)--(0xFFFC5000+0x003) line.long 0x000 "Load,Timer2 Load Register" hexfld.word 0x0000 " LOADVAL ,Load Value" rgroup (0xFFFC5000+0x004)--(0xFFFC5000+0x007) line.long 0x000 "Value,Timer2 Value Register" hexfld.word 0x0000 " CURRENTCOUNT ,The current value of the Timer" group (0xFFFC5000+0x008)--(0xFFFC5000+0x00B) line.long 0x000 "Control,Timer2 Control Register" bitfld.long 0x000 7. " ENABLE ,Enable" "Disabled,Enabled" bitfld.long 0x000 6. " MODE ,Mode" "Free-Running,Periodic" bitfld.long 0x000 4. " CASCADE ,Cascade Enable" "Disabled,Enabled" bitfld.long 0x000 2.--3. " PRESCALE ,Input Clock Prescale (Clock Division/Stages of Prescale)" "1/0,16/4,256/8,?..." wgroup (0xFFFC5000+0x00C)--(0xFFFC5000+0x00F) line.long 0x000 "Clear,Timer2 Clear Register" hexfld.word 0x0000 " CLR ,Clear" tree.end tree "Timer 3" group (0xFFFC5020+0x000)--(0xFFFC5020+0x003) line.long 0x000 "Load,Timer3 Load Register" hexfld.word 0x0000 " LOADVAL ,Load Value" rgroup (0xFFFC5020+0x004)--(0xFFFC5020+0x007) line.long 0x000 "Value,Timer3 Value Register" hexfld.word 0x0000 " CURRENTCOUNT ,The current value of the Timer" group (0xFFFC5020+0x008)--(0xFFFC5020+0x00B) line.long 0x000 "Control,Timer3 Control Register" bitfld.long 0x000 7. " ENABLE ,Enable" "Disabled,Enabled" bitfld.long 0x000 6. " MODE ,Mode" "Free-Running,Periodic" bitfld.long 0x000 4. " CASCADE ,Cascade Enable" "Disabled,Enabled" bitfld.long 0x000 2.--3. " PRESCALE ,Input Clock Prescale (Clock Division/Stages of Prescale)" "1/0,16/4,256/8,?..." wgroup (0xFFFC5020+0x00C)--(0xFFFC5020+0x00F) line.long 0x000 "Clear,Timer3 Clear Register" hexfld.word 0x0000 " CLR ,Clear" tree.end width 0x0B tree.end tree "Watchdog Timer (WDT)" width 0x08 group (0xFFFE3000+0x00)--(0xFFFE3000+0x03) line.long 0x00 "WDCTLR,Watchdog Control Register" bitfld.long 0x00 4.--7. " TOP ,Timeout Period" "2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16" bitfld.long 0x00 3. " FRZ ,Freeze (Lock) the EN bit" "Not locked,Locked" bitfld.long 0x00 1. " RSP ,Timeout Response" "System Reset,Interrupt -> Reset" bitfld.long 0x00 0. " EN ,Watchdog Enable" "Disabled,Enabled" wgroup (0xFFFE3000+0x04)--(0xFFFE3000+0x07) line.long 0x00 "WDCNTR,Watchdog Counter Reset Register" hexfld.word 0x00 " WDT_RESET ,Writing the key value 0x1984 to this register restarts the WDT" rgroup (0xFFFE3000+0x08)--(0xFFFE3000+0x1B) line.long 0x00 "WDTSTR,Watchdog Status Register" bitfld.long 0x00 7. " nWDINT ,WDINT Interrupt Status" "Triggered,Not triggered" bitfld.long 0x00 6. " nWDRES ,System Reset Status" "Occured,Not occured" bitfld.long 0x00 4.--5. " RSP ,Response Status" "00,01,10,11" line.long 0x04 "WDCNT0,WDT Counter Section 0 Register(least-significant byte)" hexfld.byte 0x04 " CounterSection0 ,Counter Section 0" line.long 0x08 "WDCNT1,WDT Counter Section 1 Register" hexfld.byte 0x08 " CounterSection1 ,Counter Section 1" line.long 0x0C "WDCNT2,WDT Counter Section 2 Register" hexfld.byte 0x0C " CounterSection2 ,Counter Section 2" line.long 0x10 "WDCNT3,WDT Counter Section 3 Register (most significant byte)" hexfld.byte 0x10 " CounterSection3 ,Counter Section 3" width 0x0B tree.end tree "Real-Time Clock (RTC)" width 0x09 rgroup (0xFFFE0000+0x000)--(0xFFFE0000+0x003) line.long 0x000 "RTCDR,RTC Data Register" group (0xFFFE0000+0x004)--(0xFFFE0000+0x007) line.long 0x000 "RTCMR,RTC Match Register" rgroup (0xFFFE0000+0x008)--(0xFFFE0000+0x00B) line.long 0x000 "RTCSTAT,RTC Interrupt Status Register" bitfld.long 0x000 0. " RTCINTR ,Rtc Interrupt Status Flag" "Not asserted,Asserted" wgroup (0xFFFE0000+0x008)--(0xFFFE0000+0x00B) line.long 0x000 "RTCEOI,RTC Interrupt Clear Register" bitfld.long 0x000 0. " RTCINTR ,Rtc Interrupt Status Flag Clear" "Clear,Clear" group (0xFFFE0000+0x00C)--(0xFFFE0000+0x00F) line.long 0x000 "RTCLR,RTC Counter load Register" wgroup (0xFFFE0000+0x010)--(0xFFFE0000+0x013) line.long 0x000 "RTCCR,RTC Interrupt Control Register" bitfld.long 0x000 0. " MIE ,Match Interrupt Enable" "Disabled,Enabled" width 0x0B tree.end tree "Pulse Width Modulators" width 0x0B group (0xFFFC3000+0x00)--(0xFFFC3000+0x2F) line.long 0x00 "PWM0_TC,PWM0 Terminal Count register" hexfld.word 0x00 " TERMINALCOUNT ,PWM0 Total Period" line.long 0x04 "PWM0_DC,PWM0 Duty Cycle register" hexfld.word 0x04 " DCCOUNT ,PWM0 Duty Cycle" line.long 0x08 "PWM0_EN,PWM0 Enable register" bitfld.long 0x08 0. " EN ,PWM0 Enable" "Disabled,Enabled" line.long 0x0C "PWM0_INV,PWM0 Invert register" bitfld.long 0x0C 0. " INV ,Invert" "No invertion,Invertion" line.long 0x10 "PWM0_SYNC,PWM0 Synchronization register" bitfld.long 0x10 0. " MODE ,Mode of Operation" "Normal,Synchronous" line.long 0x20 "PWM1_TC,PWM1 Terminal Count register" hexfld.word 0x20 " TERMINALCOUNT ,PWM1 Total Period" line.long 0x24 "PWM1_DC,PWM1 Duty Cycle register" hexfld.word 0x24 " DCCOUNT ,PWM1 Duty Cycle" line.long 0x28 "PWM1_EN,PWM1 Enable register" bitfld.long 0x28 0. " EN ,PWM1 Enable" "Disabled,Enabled" line.long 0x2C "PWM1_INV,PWM1 Invert register" bitfld.long 0x2C 0. " INV ,Invert" "No invertion,Invertion" width 0x0B tree.end tree "Synchronous Serial Port (SSP)" width 0x09 group (0xFFFC6000+0x00)--(0xFFFC6000+0x07) line.long 0x00 "SSPCR0,SSP Control Register 0" hexmask.long.tbyte 0x0000 8.--31. 1. " SCR ,Serial Clock Rate" bitfld.long 0x0000 7. " SPH ,SCLK Phase" "LOW for each frame,Continuously LOW" bitfld.long 0x0000 6. " SPO ,SCLK Polarity" "0,1" bitfld.long 0x0000 4.--5. " FRF ,Data Frame Format" "Motorola SPI,TI synchronous,National Microwire,?..." textline " " bitfld.long 0x0000 0.--3. " DSS ,Data Size Select" "Reserved,Reserved,Reserved,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit" line.long 0x04 "SSPCR1,SSP Control Register 1" bitfld.long 0x0004 4. " SSE ,Synchronous Serial Port Enable" "Disabled,Enabled" bitfld.long 0x0004 3. " LBM ,Loopback Mode" "Normal mode,Loopback mode" bitfld.long 0x0004 2. " RORIE ,Receive FIFO Overrun Interrupt Enable" "Disabled,Enabled" bitfld.long 0x0004 1. " TIE ,Transmit FIFO Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x0004 0. " RIE ,Receive FIFO Interrupt Enable" "Disabled,Enabled" rgroup (0xFFFC6000+0x08)--(0xFFFC6000+0x0B) line.long 0x00 "SSPDR,SSP Receive FIFO Register (Read)" hexfld.word 0x00 " RDATA ,Receive FIFO" wgroup (0xFFFC6000+0x08)--(0xFFFC6000+0x0B) line.long 0x00 "SSPDR,SSP Transmit FIFO Data Register (Write)" hexfld.word 0x00 " TDATA ,Transmit FIFO" rgroup (0xFFFC6000+0x0C)--(0xFFFC6000+0x0F) line.long 0x00 "SSPSR,SSP Status Register" bitfld.long 0x0000 4. " BSY ,SSP Busy Flag" "Not busy,Busy" bitfld.long 0x0000 3. " RFF ,Receive FIFO Full" "Not full,Full" bitfld.long 0x0000 2. " RNE ,Receive FIFO Not Empty" "Not empty,Empty" bitfld.long 0x0000 1. " TNF ,Transmit FIFO Not Full" "Full,Not full" textline " " bitfld.long 0x0000 0. " TFE ,Transmit FIFO Empty" "Not empty,Empty" group (0xFFFC6000+0x10)--(0xFFFC6000+0x13) line.long 0x00 "SSPCPSR,SSP Clock Prescale Register" hexfld.byte 0x00 " CPSDVSR ,Clock Prescale Divisor" rgroup (0xFFFC6000+0x14)--(0xFFFC6000+0x17) line.long 0x00 "SSPIIR,SSP Interrupt Identification Register (Read)" bitfld.long 0x0000 2. " RORIS ,SSP Receive FIFO Overrun Interrupt Status" "Not asserted,Asserted" bitfld.long 0x0000 1. " TIS ,SSP Transmit FIFO Service Request Interrupt Status" "Not asserted,Asserted" bitfld.long 0x0000 0. " RIS ,SSP Receive FIFO Service Request Interrupt Status" "Not asserted,Asserted" wgroup (0xFFFC6000+0x14)--(0xFFFC6000+0x17) line.long 0x00 "SSPICR,SSP Interrupt Clear Register (Write)" hexfld.word 0x00 " CLEAR ,Interrupt Clear" group (0xFFFC6000+0x18)--(0xFFFC6000+0x1B) line.long 0x00 "SSPRXTO,SSP DMA Receive Timeout Register" hexfld.word 0x00 " TOCOUNT ,Timeout Count" width 0x0B tree.end tree "Universal Asynchronous Receiver/Transmitters" tree "UART 0" ;begin include file lh79520/uartx.ph ;parameters: 0xFFFC0000 0 width 0x0B rgroup (0xFFFC0000+0x000)--(0xFFFC0000+0x003) line.long 0x000 "UARTDR,UART Data Register (Received Data)" hexfld.byte 0x000 " DATA ,UART Receive Data" wgroup (0xFFFC0000+0x000)--(0xFFFC0000+0x003) line.long 0x000 "UARTDR,UART Data Register (Transmitted Data)" hexfld.byte 0x000 " DATA ,UART Transmit Data" group (0xFFFC0000+0x000)--(0xFFFC0000+0x003) line.long 0x000 "UARTDR,UART Data Register (Error Bits)" bitfld.long 0x0000 11. " OE ,OVERRUN Error" "Not error,Error" bitfld.long 0x0000 10. " BE ,BREAK Error" "No error,Error" bitfld.long 0x0000 9. " PE ,PARITY Error" "No error,Error" bitfld.long 0x0000 8. " FE ,FRAMING Error" "No error,Error" rgroup (0xFFFC0000+0x004)--(0xFFFC0000+0x007) line.long 0x000 "UARTRSR,UART Receive Status Register" bitfld.long 0x0000 3. " OE ,OVERRUN Error" "No error,Error" bitfld.long 0x0000 2. " BE ,BREAK Error" "No error,Error" bitfld.long 0x0000 1. " PE ,PARITY Error" "No error,Error" bitfld.long 0x0000 0. " FE ,FRAMING Error" "No error,Error" wgroup (0xFFFC0000+0x004)--(0xFFFC0000+0x007) line.long 0x000 "UARTECR,UART Receive Error Clear Register" bitfld.long 0x0000 3. " OE ,OVERRUN Error" "Clear,Clear" bitfld.long 0x0000 2. " BE ,BREAK Error" "Clear,Clear" bitfld.long 0x0000 1. " PE ,PARITY Error" "Clear,Clear" bitfld.long 0x0000 0. " FE ,FRAMING Error" "Clear,Clear" rgroup (0xFFFC0000+0x018)--(0xFFFC0000+0x01B) line.long 0x000 "UARTFR,UART Flag Register" bitfld.long 0x0000 7. " TXFE ,Transmit FIFO Empty" "Not empty,Empty" bitfld.long 0x0000 6. " RXFF ,Receive FIFO Full" "Not Full,Full" bitfld.long 0x0000 5. " TXFF ,Transmit FIFO Full" "Not Full,Full" bitfld.long 0x0000 4. " RXFE ,Receive FIFO Empty" "Not empty,Empty" textline " " bitfld.long 0x0000 3. " BUSY ,UART Busy" "Not busy,Busy" group (0xFFFC0000+0x024)--(0xFFFC0000+0x03C) line.long 0x000 "UARTIBRD,UART Integer Baud Rate Divisor Register" hexfld.word 0x000 " BAUDDIVINT ,Baud Rate Divider Integer" line.long 0x004 "UARTFBRD,UART Fractional Baud Rate Divisor Register" hexmask.long.byte 0x004 0.--6. 1. " BAUDDIVFRAC ,Baud Rate Fraction" line.long 0x008 "UARTLCR_H,UART Line Control Register (High Byte)" bitfld.long 0x0008 7. " SPS ,Stuck PARITY Select" "0,1" bitfld.long 0x0008 5.--6. " WLEN ,Length" "5-bits,6-bits,7-bits,8-bits" bitfld.long 0x0008 4. " FEN ,Enable FIFOs" "Disabled,Enabled" bitfld.long 0x0008 3. " STP2 ,Two STOP Bits Select" "Not selected,Selected" textline " " bitfld.long 0x0008 2. " EPS ,Even PARITY Select" "Odd,Even" bitfld.long 0x0008 1. " PEN ,PARITY Enable" "Disabled,Enabled" bitfld.long 0x0008 0. " BRK ,Send BREAK" "Not send,Send" line.long 0x010 "UARTIFLS,UART Interrupt FIFO Level Select Register" bitfld.long 0x0010 3.--5. " RXIFLSEL ,Receive Interrupt FIFO Level Select" ">= 1/8,>= 1/4,>= 1/2,>= 3/4,>= 7/8,?..." bitfld.long 0x0010 0.--2. " TXIFLSEL ,Transmit Interrupt FIFO Level Select" "<= 1/8,<= 1/4,<= 1/2,<= 3/4,<= 7/8,?..." line.long 0x014 "UARTIMSC,UART Interrupt Mask Set/Clear Register" bitfld.long 0x0014 10. " OEIM ,OVERRUN Error Interrupt Mask" "Disabled,Enabled" bitfld.long 0x0014 9. " BEIM ,BREAK Error Interrupt Mask" "Disabled,Enabled" bitfld.long 0x0014 8. " PEIM ,PARITY Error Interrupt Mask" "Disabled,Enabled" bitfld.long 0x0014 7. " FEIM ,FRAMING Error Interrupt Mask" "Disabled,Enabled" textline " " bitfld.long 0x0014 6. " RTIM ,Receive Timeout Interrupt Mask" "Disabled,Enabled" bitfld.long 0x0014 5. " TXIM ,Transmit Interrupt Mask" "Disabled,Enabled" bitfld.long 0x0014 4. " RXIM ,Receive Interrupt Mask" "Disabled,Enabled" if (0==0) group (0xFFFC0000+0x030)--(0xFFFC0000+0x033) line.long 0x000 "UARTCR,UART Control Register" bitfld.long 0x0000 9. " RXE ,Receive Enable" "Disabled,Enabled" bitfld.long 0x0000 8. " TXE ,Transmit Enable" "Disabled,Enabled" bitfld.long 0x0000 7. " LBE ,Loop Back Enable" "Disabled,Enabled" bitfld.long 0x0000 2. " SIRLP ,IrDA SIR Low Power Mode" "Disabled,Enabled" textline " " bitfld.long 0x0000 1. " SIREN ,SIR Enable" "Disabled,Enabled" bitfld.long 0x0000 0. " UARTEN ,UART Enable" "Disabled,Enabled" else group (0xFFFC0000+0x030)--(0xFFFC0000+0x033) line.long 0x000 "UARTCR,UART Control Register" bitfld.long 0x0000 9. " RXE ,Receive Enable" "Disabled,Enabled" bitfld.long 0x0000 8. " TXE ,Transmit Enable" "Disabled,Enabled" bitfld.long 0x0000 7. " LBE ,Loop Back Enable" "Disabled,Enabled" bitfld.long 0x0000 0. " UARTEN ,UART Enable" "Disabled,Enabled" endif rgroup (0xFFFC0000+0x03C)--(0xFFFC0000+0x043) line.long 0x000 "UARTRIS,UART Raw Interrupt Status Register" bitfld.long 0x0000 10. " OERIS ,OVERRUN Error Interrupt Status" "Not active,Active" bitfld.long 0x0000 9. " BERIS ,BREAK Error Interrupt Status" "Not active,Active" bitfld.long 0x0000 8. " PERIS ,PARITY Error Interrupt Status" "Not active,Active" bitfld.long 0x0000 7. " FERIS ,FRAMING Error Interrupt Status" "Not active,Active" textline " " bitfld.long 0x0000 6. " RTRIS ,Receive Timeout Interrupt Status" "Not active,Active" bitfld.long 0x0000 5. " TXRIS ,Transmit Interrupt Status" "Not active,Active" bitfld.long 0x0000 4. " RXRIS ,Receive Interrupt Status" "Not active,Active" line.long 0x004 "UARTMIS,UART Masked Interrupt Status Register" bitfld.long 0x0004 10. " OEMIS ,OVERRUN Error Masked Interrupt Status" "Not active,Active" bitfld.long 0x0004 9. " BEMIS ,BREAK Error Masked Interrupt Status" "Not active,Active" bitfld.long 0x0004 8. " PEMIS ,PARITY Error Masked Interrupt Status" "Not active,Active" bitfld.long 0x0004 7. " FEMIS ,FRAMING Error Masked Interrupt Status" "Not active,Active" textline " " bitfld.long 0x0004 6. " RTMIS ,Receive Timeout Masked Interrupt Status" "Not active,Active" bitfld.long 0x0004 5. " TXMIS ,Transmit Masked Interrupt Status" "Not active,Active" bitfld.long 0x0004 4. " RXMIS ,Receive Masked Interrupt Status" "Not active,Active" wgroup (0xFFFC0000+0x044)--(0xFFFC0000+0x047) line.long 0x000 "UARTICR,UART Interrupt Clear Register" bitfld.long 0x0000 10. " OEIC ,OVERRUN Error Interrupt Clear" "No effect,Clear" bitfld.long 0x0000 9. " BEIC ,BREAK Error Interrupt Clear" "No effect,Clear" bitfld.long 0x0000 8. " PEIC ,PARITY Error Interrupt Clear" "No effect,Clear" bitfld.long 0x0000 7. " FEIC ,FRAMING Error Interrupt Clear" "No effect,Clear" textline " " bitfld.long 0x0000 6. " RTIC ,Receive Timeout Interrupt Clear" "No effect,Clear" bitfld.long 0x0000 5. " TXIC ,Transmit Interrupt Clear" "No effect,Clear" bitfld.long 0x0000 4. " RXIC ,Receive Interrupt Clear" "No effect,Clear" width 0x0B ;end include file lh79520/uartx.ph tree.end tree "UART 1" ;begin include file lh79520/uartx.ph ;parameters: 0xFFFC1000 1 width 0x0B rgroup (0xFFFC1000+0x000)--(0xFFFC1000+0x003) line.long 0x000 "UARTDR,UART Data Register (Received Data)" hexfld.byte 0x000 " DATA ,UART Receive Data" wgroup (0xFFFC1000+0x000)--(0xFFFC1000+0x003) line.long 0x000 "UARTDR,UART Data Register (Transmitted Data)" hexfld.byte 0x000 " DATA ,UART Transmit Data" group (0xFFFC1000+0x000)--(0xFFFC1000+0x003) line.long 0x000 "UARTDR,UART Data Register (Error Bits)" bitfld.long 0x0000 11. " OE ,OVERRUN Error" "Not error,Error" bitfld.long 0x0000 10. " BE ,BREAK Error" "No error,Error" bitfld.long 0x0000 9. " PE ,PARITY Error" "No error,Error" bitfld.long 0x0000 8. " FE ,FRAMING Error" "No error,Error" rgroup (0xFFFC1000+0x004)--(0xFFFC1000+0x007) line.long 0x000 "UARTRSR,UART Receive Status Register" bitfld.long 0x0000 3. " OE ,OVERRUN Error" "No error,Error" bitfld.long 0x0000 2. " BE ,BREAK Error" "No error,Error" bitfld.long 0x0000 1. " PE ,PARITY Error" "No error,Error" bitfld.long 0x0000 0. " FE ,FRAMING Error" "No error,Error" wgroup (0xFFFC1000+0x004)--(0xFFFC1000+0x007) line.long 0x000 "UARTECR,UART Receive Error Clear Register" bitfld.long 0x0000 3. " OE ,OVERRUN Error" "Clear,Clear" bitfld.long 0x0000 2. " BE ,BREAK Error" "Clear,Clear" bitfld.long 0x0000 1. " PE ,PARITY Error" "Clear,Clear" bitfld.long 0x0000 0. " FE ,FRAMING Error" "Clear,Clear" rgroup (0xFFFC1000+0x018)--(0xFFFC1000+0x01B) line.long 0x000 "UARTFR,UART Flag Register" bitfld.long 0x0000 7. " TXFE ,Transmit FIFO Empty" "Not empty,Empty" bitfld.long 0x0000 6. " RXFF ,Receive FIFO Full" "Not Full,Full" bitfld.long 0x0000 5. " TXFF ,Transmit FIFO Full" "Not Full,Full" bitfld.long 0x0000 4. " RXFE ,Receive FIFO Empty" "Not empty,Empty" textline " " bitfld.long 0x0000 3. " BUSY ,UART Busy" "Not busy,Busy" group (0xFFFC1000+0x024)--(0xFFFC1000+0x03C) line.long 0x000 "UARTIBRD,UART Integer Baud Rate Divisor Register" hexfld.word 0x000 " BAUDDIVINT ,Baud Rate Divider Integer" line.long 0x004 "UARTFBRD,UART Fractional Baud Rate Divisor Register" hexmask.long.byte 0x004 0.--6. 1. " BAUDDIVFRAC ,Baud Rate Fraction" line.long 0x008 "UARTLCR_H,UART Line Control Register (High Byte)" bitfld.long 0x0008 7. " SPS ,Stuck PARITY Select" "0,1" bitfld.long 0x0008 5.--6. " WLEN ,Length" "5-bits,6-bits,7-bits,8-bits" bitfld.long 0x0008 4. " FEN ,Enable FIFOs" "Disabled,Enabled" bitfld.long 0x0008 3. " STP2 ,Two STOP Bits Select" "Not selected,Selected" textline " " bitfld.long 0x0008 2. " EPS ,Even PARITY Select" "Odd,Even" bitfld.long 0x0008 1. " PEN ,PARITY Enable" "Disabled,Enabled" bitfld.long 0x0008 0. " BRK ,Send BREAK" "Not send,Send" line.long 0x010 "UARTIFLS,UART Interrupt FIFO Level Select Register" bitfld.long 0x0010 3.--5. " RXIFLSEL ,Receive Interrupt FIFO Level Select" ">= 1/8,>= 1/4,>= 1/2,>= 3/4,>= 7/8,?..." bitfld.long 0x0010 0.--2. " TXIFLSEL ,Transmit Interrupt FIFO Level Select" "<= 1/8,<= 1/4,<= 1/2,<= 3/4,<= 7/8,?..." line.long 0x014 "UARTIMSC,UART Interrupt Mask Set/Clear Register" bitfld.long 0x0014 10. " OEIM ,OVERRUN Error Interrupt Mask" "Disabled,Enabled" bitfld.long 0x0014 9. " BEIM ,BREAK Error Interrupt Mask" "Disabled,Enabled" bitfld.long 0x0014 8. " PEIM ,PARITY Error Interrupt Mask" "Disabled,Enabled" bitfld.long 0x0014 7. " FEIM ,FRAMING Error Interrupt Mask" "Disabled,Enabled" textline " " bitfld.long 0x0014 6. " RTIM ,Receive Timeout Interrupt Mask" "Disabled,Enabled" bitfld.long 0x0014 5. " TXIM ,Transmit Interrupt Mask" "Disabled,Enabled" bitfld.long 0x0014 4. " RXIM ,Receive Interrupt Mask" "Disabled,Enabled" if (1==0) group (0xFFFC1000+0x030)--(0xFFFC1000+0x033) line.long 0x000 "UARTCR,UART Control Register" bitfld.long 0x0000 9. " RXE ,Receive Enable" "Disabled,Enabled" bitfld.long 0x0000 8. " TXE ,Transmit Enable" "Disabled,Enabled" bitfld.long 0x0000 7. " LBE ,Loop Back Enable" "Disabled,Enabled" bitfld.long 0x0000 2. " SIRLP ,IrDA SIR Low Power Mode" "Disabled,Enabled" textline " " bitfld.long 0x0000 1. " SIREN ,SIR Enable" "Disabled,Enabled" bitfld.long 0x0000 0. " UARTEN ,UART Enable" "Disabled,Enabled" else group (0xFFFC1000+0x030)--(0xFFFC1000+0x033) line.long 0x000 "UARTCR,UART Control Register" bitfld.long 0x0000 9. " RXE ,Receive Enable" "Disabled,Enabled" bitfld.long 0x0000 8. " TXE ,Transmit Enable" "Disabled,Enabled" bitfld.long 0x0000 7. " LBE ,Loop Back Enable" "Disabled,Enabled" bitfld.long 0x0000 0. " UARTEN ,UART Enable" "Disabled,Enabled" endif rgroup (0xFFFC1000+0x03C)--(0xFFFC1000+0x043) line.long 0x000 "UARTRIS,UART Raw Interrupt Status Register" bitfld.long 0x0000 10. " OERIS ,OVERRUN Error Interrupt Status" "Not active,Active" bitfld.long 0x0000 9. " BERIS ,BREAK Error Interrupt Status" "Not active,Active" bitfld.long 0x0000 8. " PERIS ,PARITY Error Interrupt Status" "Not active,Active" bitfld.long 0x0000 7. " FERIS ,FRAMING Error Interrupt Status" "Not active,Active" textline " " bitfld.long 0x0000 6. " RTRIS ,Receive Timeout Interrupt Status" "Not active,Active" bitfld.long 0x0000 5. " TXRIS ,Transmit Interrupt Status" "Not active,Active" bitfld.long 0x0000 4. " RXRIS ,Receive Interrupt Status" "Not active,Active" line.long 0x004 "UARTMIS,UART Masked Interrupt Status Register" bitfld.long 0x0004 10. " OEMIS ,OVERRUN Error Masked Interrupt Status" "Not active,Active" bitfld.long 0x0004 9. " BEMIS ,BREAK Error Masked Interrupt Status" "Not active,Active" bitfld.long 0x0004 8. " PEMIS ,PARITY Error Masked Interrupt Status" "Not active,Active" bitfld.long 0x0004 7. " FEMIS ,FRAMING Error Masked Interrupt Status" "Not active,Active" textline " " bitfld.long 0x0004 6. " RTMIS ,Receive Timeout Masked Interrupt Status" "Not active,Active" bitfld.long 0x0004 5. " TXMIS ,Transmit Masked Interrupt Status" "Not active,Active" bitfld.long 0x0004 4. " RXMIS ,Receive Masked Interrupt Status" "Not active,Active" wgroup (0xFFFC1000+0x044)--(0xFFFC1000+0x047) line.long 0x000 "UARTICR,UART Interrupt Clear Register" bitfld.long 0x0000 10. " OEIC ,OVERRUN Error Interrupt Clear" "No effect,Clear" bitfld.long 0x0000 9. " BEIC ,BREAK Error Interrupt Clear" "No effect,Clear" bitfld.long 0x0000 8. " PEIC ,PARITY Error Interrupt Clear" "No effect,Clear" bitfld.long 0x0000 7. " FEIC ,FRAMING Error Interrupt Clear" "No effect,Clear" textline " " bitfld.long 0x0000 6. " RTIC ,Receive Timeout Interrupt Clear" "No effect,Clear" bitfld.long 0x0000 5. " TXIC ,Transmit Interrupt Clear" "No effect,Clear" bitfld.long 0x0000 4. " RXIC ,Receive Interrupt Clear" "No effect,Clear" width 0x0B ;end include file lh79520/uartx.ph tree.end tree "UART 2" ;begin include file lh79520/uartx.ph ;parameters: 0xFFFC2000 2 width 0x0B rgroup (0xFFFC2000+0x000)--(0xFFFC2000+0x003) line.long 0x000 "UARTDR,UART Data Register (Received Data)" hexfld.byte 0x000 " DATA ,UART Receive Data" wgroup (0xFFFC2000+0x000)--(0xFFFC2000+0x003) line.long 0x000 "UARTDR,UART Data Register (Transmitted Data)" hexfld.byte 0x000 " DATA ,UART Transmit Data" group (0xFFFC2000+0x000)--(0xFFFC2000+0x003) line.long 0x000 "UARTDR,UART Data Register (Error Bits)" bitfld.long 0x0000 11. " OE ,OVERRUN Error" "Not error,Error" bitfld.long 0x0000 10. " BE ,BREAK Error" "No error,Error" bitfld.long 0x0000 9. " PE ,PARITY Error" "No error,Error" bitfld.long 0x0000 8. " FE ,FRAMING Error" "No error,Error" rgroup (0xFFFC2000+0x004)--(0xFFFC2000+0x007) line.long 0x000 "UARTRSR,UART Receive Status Register" bitfld.long 0x0000 3. " OE ,OVERRUN Error" "No error,Error" bitfld.long 0x0000 2. " BE ,BREAK Error" "No error,Error" bitfld.long 0x0000 1. " PE ,PARITY Error" "No error,Error" bitfld.long 0x0000 0. " FE ,FRAMING Error" "No error,Error" wgroup (0xFFFC2000+0x004)--(0xFFFC2000+0x007) line.long 0x000 "UARTECR,UART Receive Error Clear Register" bitfld.long 0x0000 3. " OE ,OVERRUN Error" "Clear,Clear" bitfld.long 0x0000 2. " BE ,BREAK Error" "Clear,Clear" bitfld.long 0x0000 1. " PE ,PARITY Error" "Clear,Clear" bitfld.long 0x0000 0. " FE ,FRAMING Error" "Clear,Clear" rgroup (0xFFFC2000+0x018)--(0xFFFC2000+0x01B) line.long 0x000 "UARTFR,UART Flag Register" bitfld.long 0x0000 7. " TXFE ,Transmit FIFO Empty" "Not empty,Empty" bitfld.long 0x0000 6. " RXFF ,Receive FIFO Full" "Not Full,Full" bitfld.long 0x0000 5. " TXFF ,Transmit FIFO Full" "Not Full,Full" bitfld.long 0x0000 4. " RXFE ,Receive FIFO Empty" "Not empty,Empty" textline " " bitfld.long 0x0000 3. " BUSY ,UART Busy" "Not busy,Busy" group (0xFFFC2000+0x024)--(0xFFFC2000+0x03C) line.long 0x000 "UARTIBRD,UART Integer Baud Rate Divisor Register" hexfld.word 0x000 " BAUDDIVINT ,Baud Rate Divider Integer" line.long 0x004 "UARTFBRD,UART Fractional Baud Rate Divisor Register" hexmask.long.byte 0x004 0.--6. 1. " BAUDDIVFRAC ,Baud Rate Fraction" line.long 0x008 "UARTLCR_H,UART Line Control Register (High Byte)" bitfld.long 0x0008 7. " SPS ,Stuck PARITY Select" "0,1" bitfld.long 0x0008 5.--6. " WLEN ,Length" "5-bits,6-bits,7-bits,8-bits" bitfld.long 0x0008 4. " FEN ,Enable FIFOs" "Disabled,Enabled" bitfld.long 0x0008 3. " STP2 ,Two STOP Bits Select" "Not selected,Selected" textline " " bitfld.long 0x0008 2. " EPS ,Even PARITY Select" "Odd,Even" bitfld.long 0x0008 1. " PEN ,PARITY Enable" "Disabled,Enabled" bitfld.long 0x0008 0. " BRK ,Send BREAK" "Not send,Send" line.long 0x010 "UARTIFLS,UART Interrupt FIFO Level Select Register" bitfld.long 0x0010 3.--5. " RXIFLSEL ,Receive Interrupt FIFO Level Select" ">= 1/8,>= 1/4,>= 1/2,>= 3/4,>= 7/8,?..." bitfld.long 0x0010 0.--2. " TXIFLSEL ,Transmit Interrupt FIFO Level Select" "<= 1/8,<= 1/4,<= 1/2,<= 3/4,<= 7/8,?..." line.long 0x014 "UARTIMSC,UART Interrupt Mask Set/Clear Register" bitfld.long 0x0014 10. " OEIM ,OVERRUN Error Interrupt Mask" "Disabled,Enabled" bitfld.long 0x0014 9. " BEIM ,BREAK Error Interrupt Mask" "Disabled,Enabled" bitfld.long 0x0014 8. " PEIM ,PARITY Error Interrupt Mask" "Disabled,Enabled" bitfld.long 0x0014 7. " FEIM ,FRAMING Error Interrupt Mask" "Disabled,Enabled" textline " " bitfld.long 0x0014 6. " RTIM ,Receive Timeout Interrupt Mask" "Disabled,Enabled" bitfld.long 0x0014 5. " TXIM ,Transmit Interrupt Mask" "Disabled,Enabled" bitfld.long 0x0014 4. " RXIM ,Receive Interrupt Mask" "Disabled,Enabled" if (2==0) group (0xFFFC2000+0x030)--(0xFFFC2000+0x033) line.long 0x000 "UARTCR,UART Control Register" bitfld.long 0x0000 9. " RXE ,Receive Enable" "Disabled,Enabled" bitfld.long 0x0000 8. " TXE ,Transmit Enable" "Disabled,Enabled" bitfld.long 0x0000 7. " LBE ,Loop Back Enable" "Disabled,Enabled" bitfld.long 0x0000 2. " SIRLP ,IrDA SIR Low Power Mode" "Disabled,Enabled" textline " " bitfld.long 0x0000 1. " SIREN ,SIR Enable" "Disabled,Enabled" bitfld.long 0x0000 0. " UARTEN ,UART Enable" "Disabled,Enabled" else group (0xFFFC2000+0x030)--(0xFFFC2000+0x033) line.long 0x000 "UARTCR,UART Control Register" bitfld.long 0x0000 9. " RXE ,Receive Enable" "Disabled,Enabled" bitfld.long 0x0000 8. " TXE ,Transmit Enable" "Disabled,Enabled" bitfld.long 0x0000 7. " LBE ,Loop Back Enable" "Disabled,Enabled" bitfld.long 0x0000 0. " UARTEN ,UART Enable" "Disabled,Enabled" endif rgroup (0xFFFC2000+0x03C)--(0xFFFC2000+0x043) line.long 0x000 "UARTRIS,UART Raw Interrupt Status Register" bitfld.long 0x0000 10. " OERIS ,OVERRUN Error Interrupt Status" "Not active,Active" bitfld.long 0x0000 9. " BERIS ,BREAK Error Interrupt Status" "Not active,Active" bitfld.long 0x0000 8. " PERIS ,PARITY Error Interrupt Status" "Not active,Active" bitfld.long 0x0000 7. " FERIS ,FRAMING Error Interrupt Status" "Not active,Active" textline " " bitfld.long 0x0000 6. " RTRIS ,Receive Timeout Interrupt Status" "Not active,Active" bitfld.long 0x0000 5. " TXRIS ,Transmit Interrupt Status" "Not active,Active" bitfld.long 0x0000 4. " RXRIS ,Receive Interrupt Status" "Not active,Active" line.long 0x004 "UARTMIS,UART Masked Interrupt Status Register" bitfld.long 0x0004 10. " OEMIS ,OVERRUN Error Masked Interrupt Status" "Not active,Active" bitfld.long 0x0004 9. " BEMIS ,BREAK Error Masked Interrupt Status" "Not active,Active" bitfld.long 0x0004 8. " PEMIS ,PARITY Error Masked Interrupt Status" "Not active,Active" bitfld.long 0x0004 7. " FEMIS ,FRAMING Error Masked Interrupt Status" "Not active,Active" textline " " bitfld.long 0x0004 6. " RTMIS ,Receive Timeout Masked Interrupt Status" "Not active,Active" bitfld.long 0x0004 5. " TXMIS ,Transmit Masked Interrupt Status" "Not active,Active" bitfld.long 0x0004 4. " RXMIS ,Receive Masked Interrupt Status" "Not active,Active" wgroup (0xFFFC2000+0x044)--(0xFFFC2000+0x047) line.long 0x000 "UARTICR,UART Interrupt Clear Register" bitfld.long 0x0000 10. " OEIC ,OVERRUN Error Interrupt Clear" "No effect,Clear" bitfld.long 0x0000 9. " BEIC ,BREAK Error Interrupt Clear" "No effect,Clear" bitfld.long 0x0000 8. " PEIC ,PARITY Error Interrupt Clear" "No effect,Clear" bitfld.long 0x0000 7. " FEIC ,FRAMING Error Interrupt Clear" "No effect,Clear" textline " " bitfld.long 0x0000 6. " RTIC ,Receive Timeout Interrupt Clear" "No effect,Clear" bitfld.long 0x0000 5. " TXIC ,Transmit Interrupt Clear" "No effect,Clear" bitfld.long 0x0000 4. " RXIC ,Receive Interrupt Clear" "No effect,Clear" width 0x0B ;end include file lh79520/uartx.ph tree.end tree.end tree "IrDA Communications (SIR)" width 0x0A group (0xFFFC0000+0x020)--(0xFFFC0000+0x023) line.long 0x000 "UARTILPR,IrDA low-power counter Register" hexfld.byte 0x000 " ILPDVSR ,InfraRed Low Power Divisor" group (0xFFFC0000+0x080)--(0xFFFC0000+0x083) line.long 0x000 "UARTTCR,SIR Test Control Register" bitfld.long 0x000 2. " SIRFDME ,SIR Full-Duplex Mode Enable for Loopback Testing" "Disabled,Enabled" width 0x0B tree.end tree "General Purpose I/O (GPIO)" width 0x0B group (0xFFFDF000+0x000)--(0xFFFDF000+0x00F) line.long 0x000 "GPIOPADR,Port A data register" bitfld.long 0x000 7. " PADATA.7 ,Port A.7 Data" "Low,High" bitfld.long 0x000 6. " PADATA.6 ,Port A.6 Data" "Low,High" bitfld.long 0x000 5. " PADATA.5 ,Port A.5 Data" "Low,High" bitfld.long 0x000 4. " PADATA.4 ,Port A.4 Data" "Low,High" textline " " bitfld.long 0x000 3. " PADATA.3 ,Port A.3 Data" "Low,High" bitfld.long 0x000 2. " PADATA.2 ,Port A.2 Data" "Low,High" bitfld.long 0x000 1. " PADATA.1 ,Port A.1 Data" "Low,High" bitfld.long 0x000 0. " PADATA.0 ,Port A.0 Data" "Low,High" line.long 0x008 "GPIOPADDR,Port A data direction register" bitfld.long 0x008 7. " PADDR.7 ,Port A.7 Direction" "Input,Output" bitfld.long 0x008 6. " PADDR.6 ,Port A.6 Direction" "Input,Output" bitfld.long 0x008 5. " PADDR.5 ,Port A.5 Direction" "Input,Output" bitfld.long 0x008 4. " PADDR.4 ,Port A.4 Direction" "Input,Output" textline " " bitfld.long 0x008 3. " PADDR.3 ,Port A.3 Direction" "Input,Output" bitfld.long 0x008 2. " PADDR.2 ,Port A.2 Direction" "Input,Output" bitfld.long 0x008 1. " PADDR.1 ,Port A.1 Direction" "Input,Output" bitfld.long 0x008 0. " PADDR.0 ,Port A.0 Direction" "Input,Output" line.long 0x004 "GPIOPBDR,Port B data register" bitfld.long 0x004 7. " PBDATA.7 ,Port B.7 Data" "Low,High" bitfld.long 0x004 6. " PBDATA.6 ,Port B.6 Data" "Low,High" bitfld.long 0x004 5. " PBDATA.5 ,Port B.5 Data" "Low,High" bitfld.long 0x004 4. " PBDATA.4 ,Port B.4 Data" "Low,High" textline " " bitfld.long 0x004 3. " PBDATA.3 ,Port B.3 Data" "Low,High" bitfld.long 0x004 2. " PBDATA.2 ,Port B.2 Data" "Low,High" bitfld.long 0x004 1. " PBDATA.1 ,Port B.1 Data" "Low,High" bitfld.long 0x004 0. " PBDATA.0 ,Port B.0 Data" "Low,High" line.long 0x00C "GPIOPBDDR,Port B data direction register" bitfld.long 0x00C 7. " PBDDR.7 ,Port B.7 Direction" "Input,Output" bitfld.long 0x00C 6. " PBDDR.6 ,Port B.6 Direction" "Input,Output" bitfld.long 0x00C 5. " PBDDR.5 ,Port B.5 Direction" "Input,Output" bitfld.long 0x00C 4. " PBDDR.4 ,Port B.4 Direction" "Input,Output" textline " " bitfld.long 0x00C 3. " PBDDR.3 ,Port B.3 Direction" "Input,Output" bitfld.long 0x00C 2. " PBDDR.2 ,Port B.2 Direction" "Input,Output" bitfld.long 0x00C 1. " PBDDR.1 ,Port B.1 Direction" "Input,Output" bitfld.long 0x00C 0. " PBDDR.0 ,Port B.0 Direction" "Input,Output" group (0xFFFDE000+0x000)--(0xFFFDE000+0x00F) line.long 0x000 "GPIOPCDR,Port C data register" bitfld.long 0x000 7. " PCDATA.7 ,Port C.7 Data" "Low,High" bitfld.long 0x000 6. " PCDATA.6 ,Port C.6 Data" "Low,High" bitfld.long 0x000 5. " PCDATA.5 ,Port C.5 Data" "Low,High" bitfld.long 0x000 4. " PCDATA.4 ,Port C.4 Data" "Low,High" textline " " bitfld.long 0x000 3. " PCDATA.3 ,Port C.3 Data" "Low,High" bitfld.long 0x000 2. " PCDATA.2 ,Port C.2 Data" "Low,High" bitfld.long 0x000 1. " PCDATA.1 ,Port C.1 Data" "Low,High" bitfld.long 0x000 0. " PCDATA.0 ,Port C.0 Data" "Low,High" line.long 0x008 "GPIOPCDDR,Port C data direction register" bitfld.long 0x008 7. " PCDDR.7 ,Port C.7 Direction" "Input,Output" bitfld.long 0x008 6. " PCDDR.6 ,Port C.6 Direction" "Input,Output" bitfld.long 0x008 5. " PCDDR.5 ,Port C.5 Direction" "Input,Output" bitfld.long 0x008 4. " PCDDR.4 ,Port C.4 Direction" "Input,Output" textline " " bitfld.long 0x008 3. " PCDDR.3 ,Port C.3 Direction" "Input,Output" bitfld.long 0x008 2. " PCDDR.2 ,Port C.2 Direction" "Input,Output" bitfld.long 0x008 1. " PCDDR.1 ,Port C.1 Direction" "Input,Output" bitfld.long 0x008 0. " PCDDR.0 ,Port C.0 Direction" "Input,Output" line.long 0x004 "GPIOPDDR,Port D data register" bitfld.long 0x004 7. " PDDATA.7 ,Port D.7 Data" "Low,High" bitfld.long 0x004 6. " PDDATA.6 ,Port D.6 Data" "Low,High" bitfld.long 0x004 5. " PDDATA.5 ,Port D.5 Data" "Low,High" bitfld.long 0x004 4. " PDDATA.4 ,Port D.4 Data" "Low,High" textline " " bitfld.long 0x004 3. " PDDATA.3 ,Port D.3 Data" "Low,High" bitfld.long 0x004 2. " PDDATA.2 ,Port D.2 Data" "Low,High" bitfld.long 0x004 1. " PDDATA.1 ,Port D.1 Data" "Low,High" bitfld.long 0x004 0. " PDDATA.0 ,Port D.0 Data" "Low,High" line.long 0x00C "GPIOPDDDR,Port D data direction register" bitfld.long 0x00C 7. " PDDDR.7 ,Port D.7 Direction" "Input,Output" bitfld.long 0x00C 6. " PDDDR.6 ,Port D.6 Direction" "Input,Output" bitfld.long 0x00C 5. " PDDDR.5 ,Port D.5 Direction" "Input,Output" bitfld.long 0x00C 4. " PDDDR.4 ,Port D.4 Direction" "Input,Output" textline " " bitfld.long 0x00C 3. " PDDDR.3 ,Port D.3 Direction" "Input,Output" bitfld.long 0x00C 2. " PDDDR.2 ,Port D.2 Direction" "Input,Output" bitfld.long 0x00C 1. " PDDDR.1 ,Port D.1 Direction" "Input,Output" bitfld.long 0x00C 0. " PDDDR.0 ,Port D.0 Direction" "Input,Output" group (0xFFFDD000+0x000)--(0xFFFDD000+0x00F) line.long 0x000 "GPIOPEDR,Port E data register" bitfld.long 0x000 7. " PEDATA.7 ,Port E.7 Data" "Low,High" bitfld.long 0x000 6. " PEDATA.6 ,Port E.6 Data" "Low,High" bitfld.long 0x000 5. " PEDATA.5 ,Port E.5 Data" "Low,High" bitfld.long 0x000 4. " PEDATA.4 ,Port E.4 Data" "Low,High" textline " " bitfld.long 0x000 3. " PEDATA.3 ,Port E.3 Data" "Low,High" bitfld.long 0x000 2. " PEDATA.2 ,Port E.2 Data" "Low,High" bitfld.long 0x000 1. " PEDATA.1 ,Port E.1 Data" "Low,High" bitfld.long 0x000 0. " PEDATA.0 ,Port E.0 Data" "Low,High" line.long 0x008 "GPIOPEDDR,Port E data direction register" bitfld.long 0x008 7. " PEDDR.7 ,Port E.7 Direction" "Input,Output" bitfld.long 0x008 6. " PEDDR.6 ,Port E.6 Direction" "Input,Output" bitfld.long 0x008 5. " PEDDR.5 ,Port E.5 Direction" "Input,Output" bitfld.long 0x008 4. " PEDDR.4 ,Port E.4 Direction" "Input,Output" textline " " bitfld.long 0x008 3. " PEDDR.3 ,Port E.3 Direction" "Input,Output" bitfld.long 0x008 2. " PEDDR.2 ,Port E.2 Direction" "Input,Output" bitfld.long 0x008 1. " PEDDR.1 ,Port E.1 Direction" "Input,Output" bitfld.long 0x008 0. " PEDDR.0 ,Port E.0 Direction" "Input,Output" line.long 0x004 "GPIOPFDR,Port F data register" bitfld.long 0x004 7. " PFDATA.7 ,Port F.7 Data" "Low,High" bitfld.long 0x004 6. " PFDATA.6 ,Port F.6 Data" "Low,High" bitfld.long 0x004 5. " PFDATA.5 ,Port F.5 Data" "Low,High" bitfld.long 0x004 4. " PFDATA.4 ,Port F.4 Data" "Low,High" textline " " bitfld.long 0x004 3. " PFDATA.3 ,Port F.3 Data" "Low,High" bitfld.long 0x004 2. " PFDATA.2 ,Port F.2 Data" "Low,High" bitfld.long 0x004 1. " PFDATA.1 ,Port F.1 Data" "Low,High" bitfld.long 0x004 0. " PFDATA.0 ,Port F.0 Data" "Low,High" line.long 0x00C "GPIOPFDDR,Port F data direction register" bitfld.long 0x00C 7. " PFDDR.7 ,Port F.7 Direction" "Input,Output" bitfld.long 0x00C 6. " PFDDR.6 ,Port F.6 Direction" "Input,Output" bitfld.long 0x00C 5. " PFDDR.5 ,Port F.5 Direction" "Input,Output" bitfld.long 0x00C 4. " PFDDR.4 ,Port F.4 Direction" "Input,Output" textline " " bitfld.long 0x00C 3. " PFDDR.3 ,Port F.3 Direction" "Input,Output" bitfld.long 0x00C 2. " PFDDR.2 ,Port F.2 Direction" "Input,Output" bitfld.long 0x00C 1. " PFDDR.1 ,Port F.1 Direction" "Input,Output" bitfld.long 0x00C 0. " PFDDR.0 ,Port F.0 Direction" "Input,Output" group (0xFFFDC000+0x000)--(0xFFFDC000+0x00F) line.long 0x000 "GPIOPGDR,Port G data register" bitfld.long 0x000 7. " PGDATA.7 ,Port G.7 Data" "Low,High" bitfld.long 0x000 6. " PGDATA.6 ,Port G.6 Data" "Low,High" bitfld.long 0x000 5. " PGDATA.5 ,Port G.5 Data" "Low,High" bitfld.long 0x000 4. " PGDATA.4 ,Port G.4 Data" "Low,High" textline " " bitfld.long 0x000 3. " PGDATA.3 ,Port G.3 Data" "Low,High" bitfld.long 0x000 2. " PGDATA.2 ,Port G.2 Data" "Low,High" bitfld.long 0x000 1. " PGDATA.1 ,Port G.1 Data" "Low,High" bitfld.long 0x000 0. " PGDATA.0 ,Port G.0 Data" "Low,High" line.long 0x008 "GPIOPGDDR,Port G data direction register" bitfld.long 0x008 7. " PGDDR.7 ,Port G.7 Direction" "Input,Output" bitfld.long 0x008 6. " PGDDR.6 ,Port G.6 Direction" "Input,Output" bitfld.long 0x008 5. " PGDDR.5 ,Port G.5 Direction" "Input,Output" bitfld.long 0x008 4. " PGDDR.4 ,Port G.4 Direction" "Input,Output" textline " " bitfld.long 0x008 3. " PGDDR.3 ,Port G.3 Direction" "Input,Output" bitfld.long 0x008 2. " PGDDR.2 ,Port G.2 Direction" "Input,Output" bitfld.long 0x008 1. " PGDDR.1 ,Port G.1 Direction" "Input,Output" bitfld.long 0x008 0. " PGDDR.0 ,Port G.0 Direction" "Input,Output" line.long 0x004 "GPIOPHDR,Port H data register" bitfld.long 0x004 7. " PHDATA.7 ,Port H.7 Data" "Low,High" bitfld.long 0x004 6. " PHDATA.6 ,Port H.6 Data" "Low,High" bitfld.long 0x004 5. " PHDATA.5 ,Port H.5 Data" "Low,High" bitfld.long 0x004 4. " PHDATA.4 ,Port H.4 Data" "Low,High" textline " " bitfld.long 0x004 3. " PHDATA.3 ,Port H.3 Data" "Low,High" bitfld.long 0x004 2. " PHDATA.2 ,Port H.2 Data" "Low,High" bitfld.long 0x004 1. " PHDATA.1 ,Port H.1 Data" "Low,High" bitfld.long 0x004 0. " PHDATA.0 ,Port H.0 Data" "Low,High" line.long 0x00C "GPIOPHDDR,Port H data direction register" bitfld.long 0x00C 7. " PHDDR.7 ,Port H.7 Direction" "Input,Output" bitfld.long 0x00C 6. " PHDDR.6 ,Port H.6 Direction" "Input,Output" bitfld.long 0x00C 5. " PHDDR.5 ,Port H.5 Direction" "Input,Output" bitfld.long 0x00C 4. " PHDDR.4 ,Port H.4 Direction" "Input,Output" textline " " bitfld.long 0x00C 3. " PHDDR.3 ,Port H.3 Direction" "Input,Output" bitfld.long 0x00C 2. " PHDDR.2 ,Port H.2 Direction" "Input,Output" bitfld.long 0x00C 1. " PHDDR.1 ,Port H.1 Direction" "Input,Output" bitfld.long 0x00C 0. " PHDDR.0 ,Port H.0 Direction" "Input,Output" width 0x0B tree.end